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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
85ec4feb | 2 | Copyright (C) 1987-2018 Free Software Foundation, Inc. |
3cf2715d | 3 | |
1322177d | 4 | This file is part of GCC. |
3cf2715d | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
3cf2715d | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
3cf2715d DE |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 19 | |
3cf2715d DE |
20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
44 | |
45 | #include "config.h" | |
01736018 | 46 | #define INCLUDE_ALGORITHM /* reverse */ |
670ee920 | 47 | #include "system.h" |
4977bab6 | 48 | #include "coretypes.h" |
c7131fb2 | 49 | #include "backend.h" |
957060b5 | 50 | #include "target.h" |
3cf2715d | 51 | #include "rtl.h" |
957060b5 AM |
52 | #include "tree.h" |
53 | #include "cfghooks.h" | |
c7131fb2 | 54 | #include "df.h" |
4d0cdd0c | 55 | #include "memmodel.h" |
6baf1cc8 | 56 | #include "tm_p.h" |
3cf2715d | 57 | #include "insn-config.h" |
957060b5 AM |
58 | #include "regs.h" |
59 | #include "emit-rtl.h" | |
3cf2715d | 60 | #include "recog.h" |
957060b5 | 61 | #include "cgraph.h" |
957060b5 | 62 | #include "tree-pretty-print.h" /* for dump_function_header */ |
957060b5 AM |
63 | #include "varasm.h" |
64 | #include "insn-attr.h" | |
3cf2715d DE |
65 | #include "conditions.h" |
66 | #include "flags.h" | |
3cf2715d | 67 | #include "output.h" |
3d195391 | 68 | #include "except.h" |
0cbd9993 MLI |
69 | #include "rtl-error.h" |
70 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 71 | #include "reload.h" |
ab87f8c8 | 72 | #include "intl.h" |
60393bbc | 73 | #include "cfgrtl.h" |
a5a42b92 | 74 | #include "debug.h" |
ef330312 | 75 | #include "tree-pass.h" |
442b4905 | 76 | #include "tree-ssa.h" |
edbed3d3 JH |
77 | #include "cfgloop.h" |
78 | #include "params.h" | |
314e6352 ML |
79 | #include "stringpool.h" |
80 | #include "attribs.h" | |
ef1b3fda | 81 | #include "asan.h" |
effb8a26 | 82 | #include "rtl-iter.h" |
013a8899 | 83 | #include "print-rtl.h" |
3cf2715d | 84 | |
440aabf8 | 85 | #ifdef XCOFF_DEBUGGING_INFO |
957060b5 | 86 | #include "xcoffout.h" /* Needed for external data declarations. */ |
440aabf8 NB |
87 | #endif |
88 | ||
76ead72b | 89 | #include "dwarf2out.h" |
76ead72b | 90 | |
6a08f7b3 DP |
91 | #ifdef DBX_DEBUGGING_INFO |
92 | #include "dbxout.h" | |
93 | #endif | |
94 | ||
906668bb BS |
95 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
96 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
97 | #ifndef CC_STATUS_INIT |
98 | #define CC_STATUS_INIT | |
99 | #endif | |
100 | ||
3cf2715d DE |
101 | /* Is the given character a logical line separator for the assembler? */ |
102 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 103 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
104 | #endif |
105 | ||
75197b37 BS |
106 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
107 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
108 | #endif | |
109 | ||
589fe865 | 110 | /* Bitflags used by final_scan_insn. */ |
70aacc97 JJ |
111 | #define SEEN_NOTE 1 |
112 | #define SEEN_EMITTED 2 | |
bd2b9f1e | 113 | #define SEEN_NEXT_VIEW 4 |
589fe865 | 114 | |
3cf2715d | 115 | /* Last insn processed by final_scan_insn. */ |
fa7af581 DM |
116 | static rtx_insn *debug_insn; |
117 | rtx_insn *current_output_insn; | |
3cf2715d DE |
118 | |
119 | /* Line number of last NOTE. */ | |
120 | static int last_linenum; | |
121 | ||
497b7c47 JJ |
122 | /* Column number of last NOTE. */ |
123 | static int last_columnnum; | |
124 | ||
6c52e687 CC |
125 | /* Last discriminator written to assembly. */ |
126 | static int last_discriminator; | |
127 | ||
128 | /* Discriminator of current block. */ | |
129 | static int discriminator; | |
130 | ||
eac40081 RK |
131 | /* Highest line number in current block. */ |
132 | static int high_block_linenum; | |
133 | ||
134 | /* Likewise for function. */ | |
135 | static int high_function_linenum; | |
136 | ||
3cf2715d | 137 | /* Filename of last NOTE. */ |
3cce094d | 138 | static const char *last_filename; |
3cf2715d | 139 | |
497b7c47 | 140 | /* Override filename, line and column number. */ |
d752cfdb JJ |
141 | static const char *override_filename; |
142 | static int override_linenum; | |
497b7c47 | 143 | static int override_columnnum; |
d752cfdb | 144 | |
b8176fe4 EB |
145 | /* Whether to force emission of a line note before the next insn. */ |
146 | static bool force_source_line = false; | |
b0efb46b | 147 | |
5f2f0edd | 148 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 149 | |
3cf2715d | 150 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 151 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 152 | The precise value is the insn being output, to pass to error_for_asm. */ |
1c22488e | 153 | const rtx_insn *this_is_asm_operands; |
3cf2715d DE |
154 | |
155 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 156 | static unsigned int insn_noperands; |
3cf2715d DE |
157 | |
158 | /* Compare optimization flag. */ | |
159 | ||
160 | static rtx last_ignored_compare = 0; | |
161 | ||
3cf2715d DE |
162 | /* Assign a unique number to each insn that is output. |
163 | This can be used to generate unique local labels. */ | |
164 | ||
165 | static int insn_counter = 0; | |
166 | ||
3cf2715d DE |
167 | /* This variable contains machine-dependent flags (defined in tm.h) |
168 | set and examined by output routines | |
169 | that describe how to interpret the condition codes properly. */ | |
170 | ||
171 | CC_STATUS cc_status; | |
172 | ||
173 | /* During output of an insn, this contains a copy of cc_status | |
174 | from before the insn. */ | |
175 | ||
176 | CC_STATUS cc_prev_status; | |
3cf2715d | 177 | |
18c038b9 | 178 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
179 | |
180 | static int block_depth; | |
181 | ||
182 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
183 | ||
184 | static int app_on; | |
185 | ||
186 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
187 | Zero otherwise. */ | |
188 | ||
b32d5189 | 189 | rtx_sequence *final_sequence; |
3cf2715d DE |
190 | |
191 | #ifdef ASSEMBLER_DIALECT | |
192 | ||
193 | /* Number of the assembler dialect to use, starting at 0. */ | |
194 | static int dialect_number; | |
195 | #endif | |
196 | ||
afe48e06 RH |
197 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
198 | rtx current_insn_predicate; | |
afe48e06 | 199 | |
7365279f | 200 | /* True if printing into -fdump-final-insns= dump. */ |
6ca5d1f6 JJ |
201 | bool final_insns_dump_p; |
202 | ||
ddd84654 JJ |
203 | /* True if profile_function should be called, but hasn't been called yet. */ |
204 | static bool need_profile_function; | |
205 | ||
6cf9ac28 | 206 | static int asm_insn_count (rtx); |
6cf9ac28 AJ |
207 | static void profile_function (FILE *); |
208 | static void profile_after_prologue (FILE *); | |
fa7af581 | 209 | static bool notice_source_line (rtx_insn *, bool *); |
6fb5fa3c | 210 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 | 211 | static void output_asm_name (void); |
fa7af581 | 212 | static void output_alternate_entry_point (FILE *, rtx_insn *); |
6cf9ac28 AJ |
213 | static tree get_mem_expr_from_op (rtx, int *); |
214 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 215 | #ifdef LEAF_REGISTERS |
fa7af581 | 216 | static void leaf_renumber_regs (rtx_insn *); |
e9a25f70 | 217 | #endif |
f1e52ed6 | 218 | #if HAVE_cc0 |
6cf9ac28 | 219 | static int alter_cond (rtx); |
e9a25f70 | 220 | #endif |
6cf9ac28 | 221 | static int align_fuzz (rtx, rtx, int, unsigned); |
27c07cc5 | 222 | static void collect_fn_hard_reg_usage (void); |
fa7af581 | 223 | static tree get_call_fndecl (rtx_insn *); |
3cf2715d DE |
224 | \f |
225 | /* Initialize data in final at the beginning of a compilation. */ | |
226 | ||
227 | void | |
6cf9ac28 | 228 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 229 | { |
3cf2715d | 230 | app_on = 0; |
3cf2715d DE |
231 | final_sequence = 0; |
232 | ||
233 | #ifdef ASSEMBLER_DIALECT | |
234 | dialect_number = ASSEMBLER_DIALECT; | |
235 | #endif | |
236 | } | |
237 | ||
08c148a8 | 238 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 239 | |
08c148a8 NB |
240 | If not overridden for epilogue code, then the function body itself |
241 | contains return instructions wherever needed. */ | |
242 | void | |
42776416 | 243 | default_function_pro_epilogue (FILE *) |
08c148a8 NB |
244 | { |
245 | } | |
246 | ||
14d11d40 IS |
247 | void |
248 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
249 | tree decl ATTRIBUTE_UNUSED, | |
250 | bool new_is_cold ATTRIBUTE_UNUSED) | |
251 | { | |
252 | } | |
253 | ||
b4c25db2 NB |
254 | /* Default target hook that outputs nothing to a stream. */ |
255 | void | |
6cf9ac28 | 256 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
257 | { |
258 | } | |
259 | ||
3cf2715d DE |
260 | /* Enable APP processing of subsequent output. |
261 | Used before the output from an `asm' statement. */ | |
262 | ||
263 | void | |
6cf9ac28 | 264 | app_enable (void) |
3cf2715d DE |
265 | { |
266 | if (! app_on) | |
267 | { | |
51723711 | 268 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
269 | app_on = 1; |
270 | } | |
271 | } | |
272 | ||
273 | /* Disable APP processing of subsequent output. | |
274 | Called from varasm.c before most kinds of output. */ | |
275 | ||
276 | void | |
6cf9ac28 | 277 | app_disable (void) |
3cf2715d DE |
278 | { |
279 | if (app_on) | |
280 | { | |
51723711 | 281 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
282 | app_on = 0; |
283 | } | |
284 | } | |
285 | \f | |
f5d927c0 | 286 | /* Return the number of slots filled in the current |
3cf2715d DE |
287 | delayed branch sequence (we don't count the insn needing the |
288 | delay slot). Zero if not in a delayed branch sequence. */ | |
289 | ||
3cf2715d | 290 | int |
6cf9ac28 | 291 | dbr_sequence_length (void) |
3cf2715d DE |
292 | { |
293 | if (final_sequence != 0) | |
294 | return XVECLEN (final_sequence, 0) - 1; | |
295 | else | |
296 | return 0; | |
297 | } | |
3cf2715d DE |
298 | \f |
299 | /* The next two pages contain routines used to compute the length of an insn | |
300 | and to shorten branches. */ | |
301 | ||
302 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
303 | `insn_current_length'. */ | |
304 | ||
addd7df6 | 305 | static int *insn_lengths; |
9d98a694 | 306 | |
9771b263 | 307 | vec<int> insn_addresses_; |
3cf2715d | 308 | |
ea3cbda5 R |
309 | /* Max uid for which the above arrays are valid. */ |
310 | static int insn_lengths_max_uid; | |
311 | ||
3cf2715d DE |
312 | /* Address of insn being processed. Used by `insn_current_length'. */ |
313 | int insn_current_address; | |
314 | ||
fc470718 R |
315 | /* Address of insn being processed in previous iteration. */ |
316 | int insn_last_address; | |
317 | ||
d6a7951f | 318 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
319 | int insn_current_align; |
320 | ||
95707627 R |
321 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
322 | gives the next following alignment insn that increases the known | |
323 | alignment, or NULL_RTX if there is no such insn. | |
324 | For any alignment obtained this way, we can again index uid_align with | |
325 | its uid to obtain the next following align that in turn increases the | |
326 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
327 | for each insn we'll call the alignment chain of this insn in the following | |
328 | comments. */ | |
329 | ||
f5d927c0 KH |
330 | struct label_alignment |
331 | { | |
9e423e6d JW |
332 | short alignment; |
333 | short max_skip; | |
334 | }; | |
335 | ||
336 | static rtx *uid_align; | |
337 | static int *uid_shuid; | |
338 | static struct label_alignment *label_align; | |
95707627 | 339 | |
3cf2715d DE |
340 | /* Indicate that branch shortening hasn't yet been done. */ |
341 | ||
342 | void | |
6cf9ac28 | 343 | init_insn_lengths (void) |
3cf2715d | 344 | { |
95707627 R |
345 | if (uid_shuid) |
346 | { | |
347 | free (uid_shuid); | |
348 | uid_shuid = 0; | |
349 | } | |
350 | if (insn_lengths) | |
351 | { | |
352 | free (insn_lengths); | |
353 | insn_lengths = 0; | |
ea3cbda5 | 354 | insn_lengths_max_uid = 0; |
95707627 | 355 | } |
d327457f JR |
356 | if (HAVE_ATTR_length) |
357 | INSN_ADDRESSES_FREE (); | |
95707627 R |
358 | if (uid_align) |
359 | { | |
360 | free (uid_align); | |
361 | uid_align = 0; | |
362 | } | |
3cf2715d DE |
363 | } |
364 | ||
365 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 366 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 | 367 | length. */ |
4df199d1 | 368 | static int |
84034c69 | 369 | get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *)) |
3cf2715d | 370 | { |
3cf2715d DE |
371 | rtx body; |
372 | int i; | |
373 | int length = 0; | |
374 | ||
d327457f JR |
375 | if (!HAVE_ATTR_length) |
376 | return 0; | |
377 | ||
ea3cbda5 | 378 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
379 | return insn_lengths[INSN_UID (insn)]; |
380 | else | |
381 | switch (GET_CODE (insn)) | |
382 | { | |
383 | case NOTE: | |
384 | case BARRIER: | |
385 | case CODE_LABEL: | |
b5b8b0ac | 386 | case DEBUG_INSN: |
3cf2715d DE |
387 | return 0; |
388 | ||
389 | case CALL_INSN: | |
3cf2715d | 390 | case JUMP_INSN: |
39718607 | 391 | length = fallback_fn (insn); |
3cf2715d DE |
392 | break; |
393 | ||
394 | case INSN: | |
395 | body = PATTERN (insn); | |
396 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
397 | return 0; | |
398 | ||
399 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 400 | length = asm_insn_count (body) * fallback_fn (insn); |
e429a50b DM |
401 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
402 | for (i = 0; i < seq->len (); i++) | |
403 | length += get_attr_length_1 (seq->insn (i), fallback_fn); | |
3cf2715d | 404 | else |
070a7956 | 405 | length = fallback_fn (insn); |
e9a25f70 JL |
406 | break; |
407 | ||
408 | default: | |
409 | break; | |
3cf2715d DE |
410 | } |
411 | ||
412 | #ifdef ADJUST_INSN_LENGTH | |
413 | ADJUST_INSN_LENGTH (insn, length); | |
414 | #endif | |
415 | return length; | |
3cf2715d | 416 | } |
070a7956 R |
417 | |
418 | /* Obtain the current length of an insn. If branch shortening has been done, | |
419 | get its actual length. Otherwise, get its maximum length. */ | |
420 | int | |
84034c69 | 421 | get_attr_length (rtx_insn *insn) |
070a7956 R |
422 | { |
423 | return get_attr_length_1 (insn, insn_default_length); | |
424 | } | |
425 | ||
426 | /* Obtain the current length of an insn. If branch shortening has been done, | |
427 | get its actual length. Otherwise, get its minimum length. */ | |
428 | int | |
84034c69 | 429 | get_attr_min_length (rtx_insn *insn) |
070a7956 R |
430 | { |
431 | return get_attr_length_1 (insn, insn_min_length); | |
432 | } | |
3cf2715d | 433 | \f |
fc470718 R |
434 | /* Code to handle alignment inside shorten_branches. */ |
435 | ||
436 | /* Here is an explanation how the algorithm in align_fuzz can give | |
437 | proper results: | |
438 | ||
439 | Call a sequence of instructions beginning with alignment point X | |
440 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 441 | is used in an expression, it means the alignment value of the |
fc470718 | 442 | alignment point. |
f5d927c0 | 443 | |
fc470718 R |
444 | Call the distance between the start of the first insn of block X, and |
445 | the end of the last insn of block X `IX', for the `inner size of X'. | |
446 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 447 | |
fc470718 R |
448 | Likewise with the next alignment-delimited block following X, which we |
449 | shall call block Y. | |
f5d927c0 | 450 | |
fc470718 R |
451 | Call the distance between the start of the first insn of block X, and |
452 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 453 | |
fc470718 | 454 | The estimated padding is then OX - IX. |
f5d927c0 | 455 | |
fc470718 | 456 | OX can be safely estimated as |
f5d927c0 | 457 | |
fc470718 R |
458 | if (X >= Y) |
459 | OX = round_up(IX, Y) | |
460 | else | |
461 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 462 | |
fc470718 R |
463 | Clearly est(IX) >= real(IX), because that only depends on the |
464 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 465 | |
fc470718 R |
466 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
467 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 468 | |
fc470718 R |
469 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
470 | for branch ranges starting before X, so we can just round what we have. | |
471 | But when X < Y, we don't know anything about the, so to speak, | |
472 | `middle bits', so we have to assume the worst when aligning up from an | |
473 | address mod X to one mod Y, which is Y - X. */ | |
474 | ||
475 | #ifndef LABEL_ALIGN | |
efa3896a | 476 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
477 | #endif |
478 | ||
479 | #ifndef LOOP_ALIGN | |
efa3896a | 480 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
481 | #endif |
482 | ||
483 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 484 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
485 | #endif |
486 | ||
247a370b JH |
487 | #ifndef JUMP_ALIGN |
488 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
489 | #endif | |
490 | ||
ad0c4c36 | 491 | int |
9158a0d8 | 492 | default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
493 | { |
494 | return 0; | |
495 | } | |
496 | ||
497 | int | |
9158a0d8 | 498 | default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
499 | { |
500 | return align_loops_max_skip; | |
501 | } | |
502 | ||
503 | int | |
9158a0d8 | 504 | default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
505 | { |
506 | return align_labels_max_skip; | |
507 | } | |
508 | ||
509 | int | |
9158a0d8 | 510 | default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
511 | { |
512 | return align_jumps_max_skip; | |
513 | } | |
9e423e6d | 514 | |
fc470718 | 515 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 516 | static int |
d305ca88 | 517 | final_addr_vec_align (rtx_jump_table_data *addr_vec) |
fc470718 | 518 | { |
d305ca88 | 519 | int align = GET_MODE_SIZE (addr_vec->get_data_mode ()); |
fc470718 R |
520 | |
521 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
522 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 523 | return exact_log2 (align); |
fc470718 R |
524 | |
525 | } | |
f5d927c0 | 526 | |
fc470718 R |
527 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
528 | #endif | |
529 | ||
530 | #ifndef INSN_LENGTH_ALIGNMENT | |
531 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
532 | #endif | |
533 | ||
fc470718 R |
534 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
535 | ||
de7987a6 | 536 | static int min_labelno, max_labelno; |
fc470718 R |
537 | |
538 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
539 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
540 | ||
541 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
542 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
543 | |
544 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 545 | |
fc470718 | 546 | int |
6cf9ac28 | 547 | label_to_alignment (rtx label) |
fc470718 | 548 | { |
40a8f07a JJ |
549 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
550 | return LABEL_TO_ALIGNMENT (label); | |
551 | return 0; | |
552 | } | |
553 | ||
554 | int | |
555 | label_to_max_skip (rtx label) | |
556 | { | |
557 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
558 | return LABEL_TO_MAX_SKIP (label); | |
559 | return 0; | |
fc470718 R |
560 | } |
561 | ||
fc470718 R |
562 | /* The differences in addresses |
563 | between a branch and its target might grow or shrink depending on | |
564 | the alignment the start insn of the range (the branch for a forward | |
565 | branch or the label for a backward branch) starts out on; if these | |
566 | differences are used naively, they can even oscillate infinitely. | |
567 | We therefore want to compute a 'worst case' address difference that | |
568 | is independent of the alignment the start insn of the range end | |
569 | up on, and that is at least as large as the actual difference. | |
570 | The function align_fuzz calculates the amount we have to add to the | |
571 | naively computed difference, by traversing the part of the alignment | |
572 | chain of the start insn of the range that is in front of the end insn | |
573 | of the range, and considering for each alignment the maximum amount | |
574 | that it might contribute to a size increase. | |
575 | ||
576 | For casesi tables, we also want to know worst case minimum amounts of | |
577 | address difference, in case a machine description wants to introduce | |
578 | some common offset that is added to all offsets in a table. | |
d6a7951f | 579 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
580 | appropriate adjustment. */ |
581 | ||
fc470718 R |
582 | /* Compute the maximum delta by which the difference of the addresses of |
583 | START and END might grow / shrink due to a different address for start | |
584 | which changes the size of alignment insns between START and END. | |
585 | KNOWN_ALIGN_LOG is the alignment known for START. | |
586 | GROWTH should be ~0 if the objective is to compute potential code size | |
587 | increase, and 0 if the objective is to compute potential shrink. | |
588 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 589 | |
ca3075bd | 590 | static int |
6cf9ac28 | 591 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
592 | { |
593 | int uid = INSN_UID (start); | |
594 | rtx align_label; | |
595 | int known_align = 1 << known_align_log; | |
596 | int end_shuid = INSN_SHUID (end); | |
597 | int fuzz = 0; | |
598 | ||
599 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
600 | { | |
601 | int align_addr, new_align; | |
602 | ||
603 | uid = INSN_UID (align_label); | |
9d98a694 | 604 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
605 | if (uid_shuid[uid] > end_shuid) |
606 | break; | |
607 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
608 | new_align = 1 << known_align_log; | |
609 | if (new_align < known_align) | |
610 | continue; | |
611 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
612 | known_align = new_align; | |
613 | } | |
614 | return fuzz; | |
615 | } | |
616 | ||
617 | /* Compute a worst-case reference address of a branch so that it | |
618 | can be safely used in the presence of aligned labels. Since the | |
619 | size of the branch itself is unknown, the size of the branch is | |
620 | not included in the range. I.e. for a forward branch, the reference | |
621 | address is the end address of the branch as known from the previous | |
622 | branch shortening pass, minus a value to account for possible size | |
623 | increase due to alignment. For a backward branch, it is the start | |
624 | address of the branch as known from the current pass, plus a value | |
625 | to account for possible size increase due to alignment. | |
626 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
627 | to exclude the branch size. */ | |
f5d927c0 | 628 | |
fc470718 | 629 | int |
8ba24b7b | 630 | insn_current_reference_address (rtx_insn *branch) |
fc470718 | 631 | { |
e67d1102 | 632 | rtx dest; |
5527bf14 RH |
633 | int seq_uid; |
634 | ||
635 | if (! INSN_ADDRESSES_SET_P ()) | |
636 | return 0; | |
637 | ||
e67d1102 | 638 | rtx_insn *seq = NEXT_INSN (PREV_INSN (branch)); |
5527bf14 | 639 | seq_uid = INSN_UID (seq); |
4b4bf941 | 640 | if (!JUMP_P (branch)) |
fc470718 R |
641 | /* This can happen for example on the PA; the objective is to know the |
642 | offset to address something in front of the start of the function. | |
643 | Thus, we can treat it like a backward branch. | |
644 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
645 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
646 | return insn_current_address; | |
647 | dest = JUMP_LABEL (branch); | |
5527bf14 | 648 | |
b9f22704 | 649 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
650 | BRANCH also has no INSN_SHUID. */ |
651 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 652 | { |
f5d927c0 | 653 | /* Forward branch. */ |
fc470718 | 654 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 655 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
656 | } |
657 | else | |
658 | { | |
f5d927c0 | 659 | /* Backward branch. */ |
fc470718 | 660 | return (insn_current_address |
923f7cf9 | 661 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
662 | } |
663 | } | |
fc470718 | 664 | \f |
6786ba1a | 665 | /* Compute branch alignments based on CFG profile. */ |
65727068 | 666 | |
e855c69d | 667 | unsigned int |
6cf9ac28 | 668 | compute_alignments (void) |
247a370b | 669 | { |
247a370b | 670 | int log, max_skip, max_log; |
e0082a72 | 671 | basic_block bb; |
247a370b JH |
672 | |
673 | if (label_align) | |
674 | { | |
675 | free (label_align); | |
676 | label_align = 0; | |
677 | } | |
678 | ||
679 | max_labelno = max_label_num (); | |
680 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 681 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
682 | |
683 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 684 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 685 | return 0; |
247a370b | 686 | |
edbed3d3 JH |
687 | if (dump_file) |
688 | { | |
532aafad | 689 | dump_reg_info (dump_file); |
edbed3d3 JH |
690 | dump_flow_info (dump_file, TDF_DETAILS); |
691 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 692 | } |
58082ff6 | 693 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
6786ba1a JH |
694 | profile_count count_threshold = cfun->cfg->count_max.apply_scale |
695 | (1, PARAM_VALUE (PARAM_ALIGN_THRESHOLD)); | |
edbed3d3 JH |
696 | |
697 | if (dump_file) | |
6786ba1a JH |
698 | { |
699 | fprintf (dump_file, "count_max: "); | |
700 | cfun->cfg->count_max.dump (dump_file); | |
701 | fprintf (dump_file, "\n"); | |
702 | } | |
11cd3bed | 703 | FOR_EACH_BB_FN (bb, cfun) |
247a370b | 704 | { |
fa7af581 | 705 | rtx_insn *label = BB_HEAD (bb); |
6786ba1a | 706 | bool has_fallthru = 0; |
247a370b | 707 | edge e; |
628f6a4e | 708 | edge_iterator ei; |
247a370b | 709 | |
4b4bf941 | 710 | if (!LABEL_P (label) |
8bcf15f6 | 711 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
712 | { |
713 | if (dump_file) | |
c3284718 | 714 | fprintf (dump_file, |
6786ba1a JH |
715 | "BB %4i loop %2i loop_depth %2i skipped.\n", |
716 | bb->index, | |
e7a74006 | 717 | bb->loop_father->num, |
c3284718 | 718 | bb_loop_depth (bb)); |
edbed3d3 JH |
719 | continue; |
720 | } | |
247a370b | 721 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 722 | max_skip = targetm.asm_out.label_align_max_skip (label); |
6786ba1a JH |
723 | profile_count fallthru_count = profile_count::zero (); |
724 | profile_count branch_count = profile_count::zero (); | |
247a370b | 725 | |
628f6a4e | 726 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
727 | { |
728 | if (e->flags & EDGE_FALLTHRU) | |
6786ba1a | 729 | has_fallthru = 1, fallthru_count += e->count (); |
247a370b | 730 | else |
6786ba1a | 731 | branch_count += e->count (); |
247a370b | 732 | } |
edbed3d3 JH |
733 | if (dump_file) |
734 | { | |
6786ba1a JH |
735 | fprintf (dump_file, "BB %4i loop %2i loop_depth" |
736 | " %2i fall ", | |
737 | bb->index, bb->loop_father->num, | |
738 | bb_loop_depth (bb)); | |
739 | fallthru_count.dump (dump_file); | |
740 | fprintf (dump_file, " branch "); | |
741 | branch_count.dump (dump_file); | |
edbed3d3 JH |
742 | if (!bb->loop_father->inner && bb->loop_father->num) |
743 | fprintf (dump_file, " inner_loop"); | |
744 | if (bb->loop_father->header == bb) | |
745 | fprintf (dump_file, " loop_header"); | |
746 | fprintf (dump_file, "\n"); | |
747 | } | |
6786ba1a JH |
748 | if (!fallthru_count.initialized_p () || !branch_count.initialized_p ()) |
749 | continue; | |
247a370b | 750 | |
f63d1bf7 | 751 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 752 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 753 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
754 | (so it does not need to be in the cache). |
755 | ||
756 | We to catch first case, we align frequently executed blocks. | |
757 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 758 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
759 | when function is called. */ |
760 | ||
761 | if (!has_fallthru | |
6786ba1a JH |
762 | && (branch_count > count_threshold |
763 | || (bb->count > bb->prev_bb->count.apply_scale (10, 1) | |
7365279f | 764 | && (bb->prev_bb->count |
6786ba1a JH |
765 | <= ENTRY_BLOCK_PTR_FOR_FN (cfun) |
766 | ->count.apply_scale (1, 2))))) | |
247a370b JH |
767 | { |
768 | log = JUMP_ALIGN (label); | |
edbed3d3 | 769 | if (dump_file) |
c3284718 | 770 | fprintf (dump_file, " jump alignment added.\n"); |
247a370b JH |
771 | if (max_log < log) |
772 | { | |
773 | max_log = log; | |
ad0c4c36 | 774 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
775 | } |
776 | } | |
777 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 778 | align it. It is most likely a first block of loop. */ |
247a370b | 779 | if (has_fallthru |
82b9c015 EB |
780 | && !(single_succ_p (bb) |
781 | && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
efd8f750 | 782 | && optimize_bb_for_speed_p (bb) |
6786ba1a JH |
783 | && branch_count + fallthru_count > count_threshold |
784 | && (branch_count | |
785 | > fallthru_count.apply_scale | |
786 | (PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS), 1))) | |
247a370b JH |
787 | { |
788 | log = LOOP_ALIGN (label); | |
edbed3d3 | 789 | if (dump_file) |
c3284718 | 790 | fprintf (dump_file, " internal loop alignment added.\n"); |
247a370b JH |
791 | if (max_log < log) |
792 | { | |
793 | max_log = log; | |
ad0c4c36 | 794 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
795 | } |
796 | } | |
797 | LABEL_TO_ALIGNMENT (label) = max_log; | |
798 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
799 | } | |
edbed3d3 | 800 | |
58082ff6 PH |
801 | loop_optimizer_finalize (); |
802 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 803 | return 0; |
247a370b | 804 | } |
ef330312 | 805 | |
5cf6635b EB |
806 | /* Grow the LABEL_ALIGN array after new labels are created. */ |
807 | ||
7365279f | 808 | static void |
5cf6635b EB |
809 | grow_label_align (void) |
810 | { | |
811 | int old = max_labelno; | |
812 | int n_labels; | |
813 | int n_old_labels; | |
814 | ||
815 | max_labelno = max_label_num (); | |
816 | ||
817 | n_labels = max_labelno - min_labelno + 1; | |
818 | n_old_labels = old - min_labelno + 1; | |
819 | ||
820 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); | |
821 | ||
822 | /* Range of labels grows monotonically in the function. Failing here | |
823 | means that the initialization of array got lost. */ | |
824 | gcc_assert (n_old_labels <= n_labels); | |
825 | ||
826 | memset (label_align + n_old_labels, 0, | |
827 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
828 | } | |
829 | ||
830 | /* Update the already computed alignment information. LABEL_PAIRS is a vector | |
831 | made up of pairs of labels for which the alignment information of the first | |
832 | element will be copied from that of the second element. */ | |
833 | ||
834 | void | |
835 | update_alignments (vec<rtx> &label_pairs) | |
836 | { | |
837 | unsigned int i = 0; | |
33fd5699 | 838 | rtx iter, label = NULL_RTX; |
5cf6635b EB |
839 | |
840 | if (max_labelno != max_label_num ()) | |
841 | grow_label_align (); | |
842 | ||
843 | FOR_EACH_VEC_ELT (label_pairs, i, iter) | |
844 | if (i & 1) | |
845 | { | |
846 | LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); | |
847 | LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); | |
848 | } | |
849 | else | |
850 | label = iter; | |
851 | } | |
852 | ||
27a4cd48 DM |
853 | namespace { |
854 | ||
855 | const pass_data pass_data_compute_alignments = | |
ef330312 | 856 | { |
27a4cd48 DM |
857 | RTL_PASS, /* type */ |
858 | "alignments", /* name */ | |
859 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
860 | TV_NONE, /* tv_id */ |
861 | 0, /* properties_required */ | |
862 | 0, /* properties_provided */ | |
863 | 0, /* properties_destroyed */ | |
864 | 0, /* todo_flags_start */ | |
3bea341f | 865 | 0, /* todo_flags_finish */ |
ef330312 PB |
866 | }; |
867 | ||
27a4cd48 DM |
868 | class pass_compute_alignments : public rtl_opt_pass |
869 | { | |
870 | public: | |
c3284718 RS |
871 | pass_compute_alignments (gcc::context *ctxt) |
872 | : rtl_opt_pass (pass_data_compute_alignments, ctxt) | |
27a4cd48 DM |
873 | {} |
874 | ||
875 | /* opt_pass methods: */ | |
be55bfe6 | 876 | virtual unsigned int execute (function *) { return compute_alignments (); } |
27a4cd48 DM |
877 | |
878 | }; // class pass_compute_alignments | |
879 | ||
880 | } // anon namespace | |
881 | ||
882 | rtl_opt_pass * | |
883 | make_pass_compute_alignments (gcc::context *ctxt) | |
884 | { | |
885 | return new pass_compute_alignments (ctxt); | |
886 | } | |
887 | ||
247a370b | 888 | \f |
3cf2715d DE |
889 | /* Make a pass over all insns and compute their actual lengths by shortening |
890 | any branches of variable length if possible. */ | |
891 | ||
fc470718 R |
892 | /* shorten_branches might be called multiple times: for example, the SH |
893 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
894 | In order to do this, it needs proper length information, which it obtains | |
895 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 896 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
897 | reorg.c, since the branch splitting exposes new instructions with delay |
898 | slots. */ | |
899 | ||
3cf2715d | 900 | void |
49922db8 | 901 | shorten_branches (rtx_insn *first) |
3cf2715d | 902 | { |
fa7af581 | 903 | rtx_insn *insn; |
fc470718 R |
904 | int max_uid; |
905 | int i; | |
fc470718 | 906 | int max_log; |
9e423e6d | 907 | int max_skip; |
fc470718 | 908 | #define MAX_CODE_ALIGN 16 |
fa7af581 | 909 | rtx_insn *seq; |
3cf2715d | 910 | int something_changed = 1; |
3cf2715d DE |
911 | char *varying_length; |
912 | rtx body; | |
913 | int uid; | |
fc470718 | 914 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 915 | |
3446405d JH |
916 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
917 | max_uid = get_max_uid (); | |
d9b6874b | 918 | |
471854f8 | 919 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 920 | free (uid_shuid); |
b0efb46b | 921 | |
5ed6ace5 | 922 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 923 | |
247a370b | 924 | if (max_labelno != max_label_num ()) |
5cf6635b | 925 | grow_label_align (); |
247a370b | 926 | |
fc470718 R |
927 | /* Initialize label_align and set up uid_shuid to be strictly |
928 | monotonically rising with insn order. */ | |
e2faec75 R |
929 | /* We use max_log here to keep track of the maximum alignment we want to |
930 | impose on the next CODE_LABEL (or the current one if we are processing | |
931 | the CODE_LABEL itself). */ | |
f5d927c0 | 932 | |
9e423e6d JW |
933 | max_log = 0; |
934 | max_skip = 0; | |
935 | ||
936 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
937 | { |
938 | int log; | |
939 | ||
940 | INSN_SHUID (insn) = i++; | |
2c3c49de | 941 | if (INSN_P (insn)) |
80838531 | 942 | continue; |
b0efb46b | 943 | |
d305ca88 | 944 | if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn)) |
fc470718 | 945 | { |
247a370b | 946 | /* Merge in alignments computed by compute_alignments. */ |
d305ca88 | 947 | log = LABEL_TO_ALIGNMENT (label); |
247a370b JH |
948 | if (max_log < log) |
949 | { | |
950 | max_log = log; | |
d305ca88 | 951 | max_skip = LABEL_TO_MAX_SKIP (label); |
247a370b | 952 | } |
fc470718 | 953 | |
d305ca88 RS |
954 | rtx_jump_table_data *table = jump_table_for_label (label); |
955 | if (!table) | |
9e423e6d | 956 | { |
d305ca88 | 957 | log = LABEL_ALIGN (label); |
0676c393 MM |
958 | if (max_log < log) |
959 | { | |
960 | max_log = log; | |
d305ca88 | 961 | max_skip = targetm.asm_out.label_align_max_skip (label); |
0676c393 | 962 | } |
9e423e6d | 963 | } |
75197b37 BS |
964 | /* ADDR_VECs only take room if read-only data goes into the text |
965 | section. */ | |
0676c393 MM |
966 | if ((JUMP_TABLES_IN_TEXT_SECTION |
967 | || readonly_data_section == text_section) | |
d305ca88 | 968 | && table) |
0676c393 | 969 | { |
d305ca88 | 970 | log = ADDR_VEC_ALIGN (table); |
0676c393 MM |
971 | if (max_log < log) |
972 | { | |
973 | max_log = log; | |
d305ca88 | 974 | max_skip = targetm.asm_out.label_align_max_skip (label); |
0676c393 MM |
975 | } |
976 | } | |
d305ca88 RS |
977 | LABEL_TO_ALIGNMENT (label) = max_log; |
978 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
fc470718 | 979 | max_log = 0; |
9e423e6d | 980 | max_skip = 0; |
fc470718 | 981 | } |
4b4bf941 | 982 | else if (BARRIER_P (insn)) |
fc470718 | 983 | { |
fa7af581 | 984 | rtx_insn *label; |
fc470718 | 985 | |
2c3c49de | 986 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 987 | label = NEXT_INSN (label)) |
4b4bf941 | 988 | if (LABEL_P (label)) |
fc470718 R |
989 | { |
990 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
991 | if (max_log < log) | |
9e423e6d JW |
992 | { |
993 | max_log = log; | |
ad0c4c36 | 994 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 995 | } |
fc470718 R |
996 | break; |
997 | } | |
998 | } | |
fc470718 | 999 | } |
d327457f JR |
1000 | if (!HAVE_ATTR_length) |
1001 | return; | |
fc470718 R |
1002 | |
1003 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 1004 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 1005 | insn_lengths_max_uid = max_uid; |
af035616 R |
1006 | /* Syntax errors can lead to labels being outside of the main insn stream. |
1007 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 1008 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1009 | |
5ed6ace5 | 1010 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
1011 | |
1012 | /* Initialize uid_align. We scan instructions | |
1013 | from end to start, and keep in align_tab[n] the last seen insn | |
1014 | that does an alignment of at least n+1, i.e. the successor | |
1015 | in the alignment chain for an insn that does / has a known | |
1016 | alignment of n. */ | |
5ed6ace5 | 1017 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 1018 | |
f5d927c0 | 1019 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1020 | align_tab[i] = NULL_RTX; |
1021 | seq = get_last_insn (); | |
33f7f353 | 1022 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1023 | { |
1024 | int uid = INSN_UID (seq); | |
1025 | int log; | |
4b4bf941 | 1026 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 1027 | uid_align[uid] = align_tab[0]; |
fc470718 R |
1028 | if (log) |
1029 | { | |
1030 | /* Found an alignment label. */ | |
1031 | uid_align[uid] = align_tab[log]; | |
1032 | for (i = log - 1; i >= 0; i--) | |
1033 | align_tab[i] = seq; | |
1034 | } | |
33f7f353 | 1035 | } |
f6df08e6 JR |
1036 | |
1037 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1038 | lengths as we find the need for this, till nothing changes. | |
1039 | When not optimizing, we start assuming maximum lengths, and | |
1040 | do a single pass to update the lengths. */ | |
1041 | bool increasing = optimize != 0; | |
1042 | ||
33f7f353 JR |
1043 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1044 | if (optimize) | |
1045 | { | |
1046 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1047 | label fields. */ | |
1048 | ||
1049 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1050 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1051 | int rel; | |
1052 | ||
1053 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1054 | { |
33f7f353 JR |
1055 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1056 | int len, i, min, max, insn_shuid; | |
1057 | int min_align; | |
1058 | addr_diff_vec_flags flags; | |
1059 | ||
34f0d87a | 1060 | if (! JUMP_TABLE_DATA_P (insn) |
33f7f353 JR |
1061 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1062 | continue; | |
1063 | pat = PATTERN (insn); | |
1064 | len = XVECLEN (pat, 1); | |
0bccc606 | 1065 | gcc_assert (len > 0); |
33f7f353 JR |
1066 | min_align = MAX_CODE_ALIGN; |
1067 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1068 | { | |
1069 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1070 | int shuid = INSN_SHUID (lab); | |
1071 | if (shuid < min) | |
1072 | { | |
1073 | min = shuid; | |
1074 | min_lab = lab; | |
1075 | } | |
1076 | if (shuid > max) | |
1077 | { | |
1078 | max = shuid; | |
1079 | max_lab = lab; | |
1080 | } | |
1081 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1082 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1083 | } | |
4c33cb26 R |
1084 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1085 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1086 | insn_shuid = INSN_SHUID (insn); |
1087 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1088 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1089 | flags.min_align = min_align; |
1090 | flags.base_after_vec = rel > insn_shuid; | |
1091 | flags.min_after_vec = min > insn_shuid; | |
1092 | flags.max_after_vec = max > insn_shuid; | |
1093 | flags.min_after_base = min > rel; | |
1094 | flags.max_after_base = max > rel; | |
1095 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f6df08e6 JR |
1096 | |
1097 | if (increasing) | |
1098 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
fc470718 R |
1099 | } |
1100 | } | |
33f7f353 | 1101 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1102 | |
3cf2715d | 1103 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
84034c69 | 1104 | int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length; |
f6df08e6 | 1105 | |
b816f339 | 1106 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1107 | insn != 0; |
1108 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1109 | { | |
1110 | uid = INSN_UID (insn); | |
fc470718 | 1111 | |
3cf2715d | 1112 | insn_lengths[uid] = 0; |
fc470718 | 1113 | |
4b4bf941 | 1114 | if (LABEL_P (insn)) |
fc470718 R |
1115 | { |
1116 | int log = LABEL_TO_ALIGNMENT (insn); | |
1117 | if (log) | |
1118 | { | |
1119 | int align = 1 << log; | |
ecb06768 | 1120 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1121 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1122 | } |
1123 | } | |
1124 | ||
5a09edba | 1125 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1126 | |
4b4bf941 | 1127 | if (NOTE_P (insn) || BARRIER_P (insn) |
c3284718 | 1128 | || LABEL_P (insn) || DEBUG_INSN_P (insn)) |
3cf2715d | 1129 | continue; |
4654c0cf | 1130 | if (insn->deleted ()) |
04da53bd | 1131 | continue; |
3cf2715d DE |
1132 | |
1133 | body = PATTERN (insn); | |
d305ca88 | 1134 | if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn)) |
5a32a90c JR |
1135 | { |
1136 | /* This only takes room if read-only data goes into the text | |
1137 | section. */ | |
d6b5193b RS |
1138 | if (JUMP_TABLES_IN_TEXT_SECTION |
1139 | || readonly_data_section == text_section) | |
75197b37 BS |
1140 | insn_lengths[uid] = (XVECLEN (body, |
1141 | GET_CODE (body) == ADDR_DIFF_VEC) | |
d305ca88 | 1142 | * GET_MODE_SIZE (table->get_data_mode ())); |
5a32a90c | 1143 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1144 | } |
a30caf5c | 1145 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d | 1146 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
e429a50b | 1147 | else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
1148 | { |
1149 | int i; | |
1150 | int const_delay_slots; | |
e90bedf5 TS |
1151 | if (DELAY_SLOTS) |
1152 | const_delay_slots = const_num_delay_slots (body_seq->insn (0)); | |
1153 | else | |
1154 | const_delay_slots = 0; | |
1155 | ||
84034c69 | 1156 | int (*inner_length_fun) (rtx_insn *) |
f6df08e6 | 1157 | = const_delay_slots ? length_fun : insn_default_length; |
3cf2715d DE |
1158 | /* Inside a delay slot sequence, we do not do any branch shortening |
1159 | if the shortening could change the number of delay slots | |
0f41302f | 1160 | of the branch. */ |
e429a50b | 1161 | for (i = 0; i < body_seq->len (); i++) |
3cf2715d | 1162 | { |
e429a50b | 1163 | rtx_insn *inner_insn = body_seq->insn (i); |
3cf2715d DE |
1164 | int inner_uid = INSN_UID (inner_insn); |
1165 | int inner_length; | |
1166 | ||
5dd2902a | 1167 | if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT |
e429a50b | 1168 | || asm_noperands (PATTERN (inner_insn)) >= 0) |
3cf2715d DE |
1169 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1170 | * insn_default_length (inner_insn)); | |
1171 | else | |
f6df08e6 | 1172 | inner_length = inner_length_fun (inner_insn); |
f5d927c0 | 1173 | |
3cf2715d DE |
1174 | insn_lengths[inner_uid] = inner_length; |
1175 | if (const_delay_slots) | |
1176 | { | |
1177 | if ((varying_length[inner_uid] | |
1178 | = insn_variable_length_p (inner_insn)) != 0) | |
1179 | varying_length[uid] = 1; | |
9d98a694 AO |
1180 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1181 | + insn_lengths[uid]); | |
3cf2715d DE |
1182 | } |
1183 | else | |
1184 | varying_length[inner_uid] = 0; | |
1185 | insn_lengths[uid] += inner_length; | |
1186 | } | |
1187 | } | |
1188 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1189 | { | |
f6df08e6 | 1190 | insn_lengths[uid] = length_fun (insn); |
3cf2715d DE |
1191 | varying_length[uid] = insn_variable_length_p (insn); |
1192 | } | |
1193 | ||
1194 | /* If needed, do any adjustment. */ | |
1195 | #ifdef ADJUST_INSN_LENGTH | |
1196 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1197 | if (insn_lengths[uid] < 0) |
c725bd79 | 1198 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1199 | #endif |
1200 | } | |
1201 | ||
1202 | /* Now loop over all the insns finding varying length insns. For each, | |
1203 | get the current insn length. If it has changed, reflect the change. | |
1204 | When nothing changes for a full pass, we are done. */ | |
1205 | ||
1206 | while (something_changed) | |
1207 | { | |
1208 | something_changed = 0; | |
fc470718 | 1209 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1210 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1211 | insn != 0; |
1212 | insn = NEXT_INSN (insn)) | |
1213 | { | |
1214 | int new_length; | |
b729186a | 1215 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1216 | int tmp_length; |
b729186a | 1217 | #endif |
fc470718 | 1218 | int length_align; |
3cf2715d DE |
1219 | |
1220 | uid = INSN_UID (insn); | |
fc470718 | 1221 | |
d305ca88 | 1222 | if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn)) |
fc470718 | 1223 | { |
d305ca88 | 1224 | int log = LABEL_TO_ALIGNMENT (label); |
b0fe107e JM |
1225 | |
1226 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1227 | /* If the mode of a following jump table was changed, we | |
1228 | may need to update the alignment of this label. */ | |
d305ca88 RS |
1229 | |
1230 | if (JUMP_TABLES_IN_TEXT_SECTION | |
1231 | || readonly_data_section == text_section) | |
b0fe107e | 1232 | { |
d305ca88 RS |
1233 | rtx_jump_table_data *table = jump_table_for_label (label); |
1234 | if (table) | |
b0fe107e | 1235 | { |
d305ca88 RS |
1236 | int newlog = ADDR_VEC_ALIGN (table); |
1237 | if (newlog != log) | |
1238 | { | |
1239 | log = newlog; | |
1240 | LABEL_TO_ALIGNMENT (insn) = log; | |
1241 | something_changed = 1; | |
1242 | } | |
b0fe107e JM |
1243 | } |
1244 | } | |
1245 | #endif | |
1246 | ||
fc470718 R |
1247 | if (log > insn_current_align) |
1248 | { | |
1249 | int align = 1 << log; | |
ecb06768 | 1250 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1251 | insn_lengths[uid] = new_address - insn_current_address; |
1252 | insn_current_align = log; | |
1253 | insn_current_address = new_address; | |
1254 | } | |
1255 | else | |
1256 | insn_lengths[uid] = 0; | |
9d98a694 | 1257 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1258 | continue; |
1259 | } | |
1260 | ||
1261 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1262 | if (length_align < insn_current_align) | |
1263 | insn_current_align = length_align; | |
1264 | ||
9d98a694 AO |
1265 | insn_last_address = INSN_ADDRESSES (uid); |
1266 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1267 | |
5e75ef4a | 1268 | #ifdef CASE_VECTOR_SHORTEN_MODE |
34f0d87a SB |
1269 | if (optimize |
1270 | && JUMP_TABLE_DATA_P (insn) | |
33f7f353 JR |
1271 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1272 | { | |
d305ca88 | 1273 | rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn); |
33f7f353 JR |
1274 | rtx body = PATTERN (insn); |
1275 | int old_length = insn_lengths[uid]; | |
b32d5189 DM |
1276 | rtx_insn *rel_lab = |
1277 | safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0)); | |
33f7f353 JR |
1278 | rtx min_lab = XEXP (XEXP (body, 2), 0); |
1279 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1280 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1281 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1282 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
b32d5189 | 1283 | rtx_insn *prev; |
33f7f353 | 1284 | int rel_align = 0; |
950a3816 | 1285 | addr_diff_vec_flags flags; |
095a2d76 | 1286 | scalar_int_mode vec_mode; |
950a3816 KG |
1287 | |
1288 | /* Avoid automatic aggregate initialization. */ | |
1289 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1290 | |
1291 | /* Try to find a known alignment for rel_lab. */ | |
1292 | for (prev = rel_lab; | |
1293 | prev | |
1294 | && ! insn_lengths[INSN_UID (prev)] | |
1295 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1296 | prev = PREV_INSN (prev)) | |
1297 | if (varying_length[INSN_UID (prev)] & 2) | |
1298 | { | |
1299 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1300 | break; | |
1301 | } | |
1302 | ||
1303 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1304 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1305 | /* Anything after INSN has still addresses from the last | |
1306 | pass; adjust these so that they reflect our current | |
1307 | estimate for this pass. */ | |
1308 | if (flags.base_after_vec) | |
1309 | rel_addr += insn_current_address - insn_last_address; | |
1310 | if (flags.min_after_vec) | |
1311 | min_addr += insn_current_address - insn_last_address; | |
1312 | if (flags.max_after_vec) | |
1313 | max_addr += insn_current_address - insn_last_address; | |
1314 | /* We want to know the worst case, i.e. lowest possible value | |
1315 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1316 | its offset is positive, and we have to be wary of code shrink; | |
1317 | otherwise, it is negative, and we have to be vary of code | |
1318 | size increase. */ | |
1319 | if (flags.min_after_base) | |
1320 | { | |
1321 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1322 | changes we are about to make can change the alignment | |
1323 | within the observed offset, therefore we have to break | |
1324 | it up into two parts that are independent. */ | |
1325 | if (! flags.base_after_vec && flags.min_after_vec) | |
1326 | { | |
1327 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1328 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1329 | } | |
1330 | else | |
1331 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1332 | } | |
1333 | else | |
1334 | { | |
1335 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1336 | { | |
1337 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1338 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1339 | } | |
1340 | else | |
1341 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1342 | } | |
1343 | /* Likewise, determine the highest lowest possible value | |
1344 | for the offset of MAX_LAB. */ | |
1345 | if (flags.max_after_base) | |
1346 | { | |
1347 | if (! flags.base_after_vec && flags.max_after_vec) | |
1348 | { | |
1349 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1350 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1351 | } | |
1352 | else | |
1353 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1354 | } | |
1355 | else | |
1356 | { | |
1357 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1358 | { | |
1359 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1360 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1361 | } | |
1362 | else | |
1363 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1364 | } | |
f6df08e6 JR |
1365 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1366 | max_addr - rel_addr, body); | |
1367 | if (!increasing | |
1368 | || (GET_MODE_SIZE (vec_mode) | |
d305ca88 | 1369 | >= GET_MODE_SIZE (table->get_data_mode ()))) |
f6df08e6 | 1370 | PUT_MODE (body, vec_mode); |
d6b5193b RS |
1371 | if (JUMP_TABLES_IN_TEXT_SECTION |
1372 | || readonly_data_section == text_section) | |
75197b37 BS |
1373 | { |
1374 | insn_lengths[uid] | |
d305ca88 RS |
1375 | = (XVECLEN (body, 1) |
1376 | * GET_MODE_SIZE (table->get_data_mode ())); | |
75197b37 BS |
1377 | insn_current_address += insn_lengths[uid]; |
1378 | if (insn_lengths[uid] != old_length) | |
1379 | something_changed = 1; | |
1380 | } | |
1381 | ||
33f7f353 | 1382 | continue; |
33f7f353 | 1383 | } |
5e75ef4a JL |
1384 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1385 | ||
1386 | if (! (varying_length[uid])) | |
3cf2715d | 1387 | { |
4b4bf941 | 1388 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1389 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1390 | { | |
1391 | int i; | |
1392 | ||
1393 | body = PATTERN (insn); | |
1394 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1395 | { | |
1396 | rtx inner_insn = XVECEXP (body, 0, i); | |
1397 | int inner_uid = INSN_UID (inner_insn); | |
1398 | ||
1399 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1400 | ||
1401 | insn_current_address += insn_lengths[inner_uid]; | |
1402 | } | |
dd3f0101 | 1403 | } |
674fc07d GS |
1404 | else |
1405 | insn_current_address += insn_lengths[uid]; | |
1406 | ||
3cf2715d DE |
1407 | continue; |
1408 | } | |
674fc07d | 1409 | |
4b4bf941 | 1410 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d | 1411 | { |
84034c69 | 1412 | rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn)); |
3cf2715d | 1413 | int i; |
f5d927c0 | 1414 | |
3cf2715d DE |
1415 | body = PATTERN (insn); |
1416 | new_length = 0; | |
84034c69 | 1417 | for (i = 0; i < seqn->len (); i++) |
3cf2715d | 1418 | { |
84034c69 | 1419 | rtx_insn *inner_insn = seqn->insn (i); |
3cf2715d DE |
1420 | int inner_uid = INSN_UID (inner_insn); |
1421 | int inner_length; | |
1422 | ||
9d98a694 | 1423 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1424 | |
1425 | /* insn_current_length returns 0 for insns with a | |
1426 | non-varying length. */ | |
1427 | if (! varying_length[inner_uid]) | |
1428 | inner_length = insn_lengths[inner_uid]; | |
1429 | else | |
1430 | inner_length = insn_current_length (inner_insn); | |
1431 | ||
1432 | if (inner_length != insn_lengths[inner_uid]) | |
1433 | { | |
f6df08e6 JR |
1434 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1435 | { | |
1436 | insn_lengths[inner_uid] = inner_length; | |
1437 | something_changed = 1; | |
1438 | } | |
1439 | else | |
1440 | inner_length = insn_lengths[inner_uid]; | |
3cf2715d | 1441 | } |
f6df08e6 | 1442 | insn_current_address += inner_length; |
3cf2715d DE |
1443 | new_length += inner_length; |
1444 | } | |
1445 | } | |
1446 | else | |
1447 | { | |
1448 | new_length = insn_current_length (insn); | |
1449 | insn_current_address += new_length; | |
1450 | } | |
1451 | ||
3cf2715d DE |
1452 | #ifdef ADJUST_INSN_LENGTH |
1453 | /* If needed, do any adjustment. */ | |
1454 | tmp_length = new_length; | |
1455 | ADJUST_INSN_LENGTH (insn, new_length); | |
1456 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1457 | #endif |
1458 | ||
f6df08e6 JR |
1459 | if (new_length != insn_lengths[uid] |
1460 | && (!increasing || new_length > insn_lengths[uid])) | |
3cf2715d DE |
1461 | { |
1462 | insn_lengths[uid] = new_length; | |
1463 | something_changed = 1; | |
1464 | } | |
f6df08e6 JR |
1465 | else |
1466 | insn_current_address += insn_lengths[uid] - new_length; | |
3cf2715d | 1467 | } |
bb4aaf18 | 1468 | /* For a non-optimizing compile, do only a single pass. */ |
f6df08e6 | 1469 | if (!increasing) |
bb4aaf18 | 1470 | break; |
3cf2715d | 1471 | } |
8cac4d85 | 1472 | crtl->max_insn_address = insn_current_address; |
fc470718 | 1473 | free (varying_length); |
3cf2715d DE |
1474 | } |
1475 | ||
3cf2715d DE |
1476 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1477 | the number of machine instructions likely to be generated for this insn. | |
1478 | This is used to compute its length. */ | |
1479 | ||
1480 | static int | |
6cf9ac28 | 1481 | asm_insn_count (rtx body) |
3cf2715d | 1482 | { |
48c54229 | 1483 | const char *templ; |
3cf2715d | 1484 | |
5d0930ea | 1485 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1486 | templ = XSTR (body, 0); |
5d0930ea | 1487 | else |
48c54229 | 1488 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1489 | |
2bd1d2c8 AP |
1490 | return asm_str_count (templ); |
1491 | } | |
2bd1d2c8 AP |
1492 | |
1493 | /* Return the number of machine instructions likely to be generated for the | |
1494 | inline-asm template. */ | |
1495 | int | |
1496 | asm_str_count (const char *templ) | |
1497 | { | |
1498 | int count = 1; | |
b8698a0f | 1499 | |
48c54229 | 1500 | if (!*templ) |
5bc4fa7c MS |
1501 | return 0; |
1502 | ||
48c54229 KG |
1503 | for (; *templ; templ++) |
1504 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1505 | || *templ == '\n') | |
3cf2715d DE |
1506 | count++; |
1507 | ||
1508 | return count; | |
1509 | } | |
3cf2715d | 1510 | \f |
725730f2 EB |
1511 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1512 | ||
1513 | static bool | |
1514 | dwarf2_debug_info_emitted_p (tree decl) | |
1515 | { | |
1516 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1517 | return false; | |
1518 | ||
1519 | if (DECL_IGNORED_P (decl)) | |
1520 | return false; | |
1521 | ||
1522 | return true; | |
1523 | } | |
1524 | ||
78bde837 SB |
1525 | /* Return scope resulting from combination of S1 and S2. */ |
1526 | static tree | |
1527 | choose_inner_scope (tree s1, tree s2) | |
1528 | { | |
1529 | if (!s1) | |
1530 | return s2; | |
1531 | if (!s2) | |
1532 | return s1; | |
1533 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1534 | return s1; | |
1535 | return s2; | |
1536 | } | |
1537 | ||
1538 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1539 | ||
1540 | static void | |
fa7af581 | 1541 | change_scope (rtx_insn *orig_insn, tree s1, tree s2) |
78bde837 | 1542 | { |
fa7af581 | 1543 | rtx_insn *insn = orig_insn; |
78bde837 SB |
1544 | tree com = NULL_TREE; |
1545 | tree ts1 = s1, ts2 = s2; | |
1546 | tree s; | |
1547 | ||
1548 | while (ts1 != ts2) | |
1549 | { | |
1550 | gcc_assert (ts1 && ts2); | |
1551 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1552 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1553 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1554 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1555 | else | |
1556 | { | |
1557 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1558 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1559 | } | |
1560 | } | |
1561 | com = ts1; | |
1562 | ||
1563 | /* Close scopes. */ | |
1564 | s = s1; | |
1565 | while (s != com) | |
1566 | { | |
66e8df53 | 1567 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
78bde837 SB |
1568 | NOTE_BLOCK (note) = s; |
1569 | s = BLOCK_SUPERCONTEXT (s); | |
1570 | } | |
1571 | ||
1572 | /* Open scopes. */ | |
1573 | s = s2; | |
1574 | while (s != com) | |
1575 | { | |
1576 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1577 | NOTE_BLOCK (insn) = s; | |
1578 | s = BLOCK_SUPERCONTEXT (s); | |
1579 | } | |
1580 | } | |
1581 | ||
1582 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1583 | on the scope tree and the newly reordered instructions. */ | |
1584 | ||
1585 | static void | |
1586 | reemit_insn_block_notes (void) | |
1587 | { | |
1588 | tree cur_block = DECL_INITIAL (cfun->decl); | |
66e8df53 | 1589 | rtx_insn *insn; |
78bde837 SB |
1590 | |
1591 | insn = get_insns (); | |
97aba8e9 | 1592 | for (; insn; insn = NEXT_INSN (insn)) |
78bde837 SB |
1593 | { |
1594 | tree this_block; | |
1595 | ||
67598720 | 1596 | /* Prevent lexical blocks from straddling section boundaries. */ |
96a95ac1 AO |
1597 | if (NOTE_P (insn)) |
1598 | switch (NOTE_KIND (insn)) | |
1599 | { | |
1600 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: | |
1601 | { | |
1602 | for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); | |
1603 | s = BLOCK_SUPERCONTEXT (s)) | |
1604 | { | |
1605 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); | |
1606 | NOTE_BLOCK (note) = s; | |
1607 | note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); | |
1608 | NOTE_BLOCK (note) = s; | |
1609 | } | |
1610 | } | |
1611 | break; | |
1612 | ||
1613 | case NOTE_INSN_BEGIN_STMT: | |
1614 | this_block = LOCATION_BLOCK (NOTE_MARKER_LOCATION (insn)); | |
1615 | goto set_cur_block_to_this_block; | |
1616 | ||
1617 | default: | |
1618 | continue; | |
1619 | } | |
67598720 TJ |
1620 | |
1621 | if (!active_insn_p (insn)) | |
1622 | continue; | |
1623 | ||
78bde837 SB |
1624 | /* Avoid putting scope notes between jump table and its label. */ |
1625 | if (JUMP_TABLE_DATA_P (insn)) | |
1626 | continue; | |
1627 | ||
1628 | this_block = insn_scope (insn); | |
1629 | /* For sequences compute scope resulting from merging all scopes | |
1630 | of instructions nested inside. */ | |
e429a50b | 1631 | if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
78bde837 SB |
1632 | { |
1633 | int i; | |
78bde837 SB |
1634 | |
1635 | this_block = NULL; | |
e429a50b | 1636 | for (i = 0; i < body->len (); i++) |
78bde837 | 1637 | this_block = choose_inner_scope (this_block, |
e429a50b | 1638 | insn_scope (body->insn (i))); |
78bde837 | 1639 | } |
96a95ac1 | 1640 | set_cur_block_to_this_block: |
78bde837 | 1641 | if (! this_block) |
48866799 DC |
1642 | { |
1643 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1644 | continue; | |
1645 | else | |
1646 | this_block = DECL_INITIAL (cfun->decl); | |
1647 | } | |
78bde837 SB |
1648 | |
1649 | if (this_block != cur_block) | |
1650 | { | |
1651 | change_scope (insn, cur_block, this_block); | |
1652 | cur_block = this_block; | |
1653 | } | |
1654 | } | |
1655 | ||
1656 | /* change_scope emits before the insn, not after. */ | |
96a95ac1 | 1657 | rtx_note *note = emit_note (NOTE_INSN_DELETED); |
78bde837 SB |
1658 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); |
1659 | delete_insn (note); | |
1660 | ||
1661 | reorder_blocks (); | |
1662 | } | |
1663 | ||
4fbca4ba RS |
1664 | static const char *some_local_dynamic_name; |
1665 | ||
1666 | /* Locate some local-dynamic symbol still in use by this function | |
1667 | so that we can print its name in local-dynamic base patterns. | |
1668 | Return null if there are no local-dynamic references. */ | |
1669 | ||
1670 | const char * | |
1671 | get_some_local_dynamic_name () | |
1672 | { | |
1673 | subrtx_iterator::array_type array; | |
1674 | rtx_insn *insn; | |
1675 | ||
1676 | if (some_local_dynamic_name) | |
1677 | return some_local_dynamic_name; | |
1678 | ||
1679 | for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) | |
1680 | if (NONDEBUG_INSN_P (insn)) | |
1681 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
1682 | { | |
1683 | const_rtx x = *iter; | |
1684 | if (GET_CODE (x) == SYMBOL_REF) | |
1685 | { | |
1686 | if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) | |
1687 | return some_local_dynamic_name = XSTR (x, 0); | |
1688 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1689 | iter.substitute (get_pool_constant (x)); | |
1690 | } | |
1691 | } | |
1692 | ||
1693 | return 0; | |
1694 | } | |
1695 | ||
bd2b9f1e AO |
1696 | /* Arrange for us to emit a source location note before any further |
1697 | real insns or section changes, by setting the SEEN_NEXT_VIEW bit in | |
1698 | *SEEN, as long as we are keeping track of location views. The bit | |
1699 | indicates we have referenced the next view at the current PC, so we | |
1700 | have to emit it. This should be called next to the var_location | |
1701 | debug hook. */ | |
1702 | ||
1703 | static inline void | |
1704 | set_next_view_needed (int *seen) | |
1705 | { | |
1706 | if (debug_variable_location_views) | |
1707 | *seen |= SEEN_NEXT_VIEW; | |
1708 | } | |
1709 | ||
1710 | /* Clear the flag in *SEEN indicating we need to emit the next view. | |
1711 | This should be called next to the source_line debug hook. */ | |
1712 | ||
1713 | static inline void | |
1714 | clear_next_view_needed (int *seen) | |
1715 | { | |
1716 | *seen &= ~SEEN_NEXT_VIEW; | |
1717 | } | |
1718 | ||
1719 | /* Test whether we have a pending request to emit the next view in | |
1720 | *SEEN, and emit it if needed, clearing the request bit. */ | |
1721 | ||
1722 | static inline void | |
1723 | maybe_output_next_view (int *seen) | |
1724 | { | |
1725 | if ((*seen & SEEN_NEXT_VIEW) != 0) | |
1726 | { | |
1727 | clear_next_view_needed (seen); | |
1728 | (*debug_hooks->source_line) (last_linenum, last_columnnum, | |
1729 | last_filename, last_discriminator, | |
1730 | false); | |
1731 | } | |
1732 | } | |
1733 | ||
1734 | /* We want to emit param bindings (before the first begin_stmt) in the | |
1735 | initial view, if we are emitting views. To that end, we may | |
1736 | consume initial notes in the function, processing them in | |
1737 | final_start_function, before signaling the beginning of the | |
1738 | prologue, rather than in final. | |
1739 | ||
1740 | We don't test whether the DECLs are PARM_DECLs: the assumption is | |
1741 | that there will be a NOTE_INSN_BEGIN_STMT marker before any | |
1742 | non-parameter NOTE_INSN_VAR_LOCATION. It's ok if the marker is not | |
1743 | there, we'll just have more variable locations bound in the initial | |
1744 | view, which is consistent with their being bound without any code | |
1745 | that would give them a value. */ | |
1746 | ||
1747 | static inline bool | |
1748 | in_initial_view_p (rtx_insn *insn) | |
1749 | { | |
1750 | return (!DECL_IGNORED_P (current_function_decl) | |
1751 | && debug_variable_location_views | |
1752 | && insn && GET_CODE (insn) == NOTE | |
1753 | && (NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION | |
1754 | || NOTE_KIND (insn) == NOTE_INSN_DELETED)); | |
1755 | } | |
1756 | ||
3cf2715d DE |
1757 | /* Output assembler code for the start of a function, |
1758 | and initialize some of the variables in this file | |
1759 | for the new function. The label for the function and associated | |
1760 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1761 | ||
1762 | FIRST is the first insn of the rtl for the function being compiled. | |
1763 | FILE is the file to write assembler code to. | |
bd2b9f1e AO |
1764 | SEEN should be initially set to zero, and it may be updated to |
1765 | indicate we have references to the next location view, that would | |
1766 | require us to emit it at the current PC. | |
46625112 | 1767 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1768 | test and compare insns. */ |
1769 | ||
bd2b9f1e AO |
1770 | static void |
1771 | final_start_function_1 (rtx_insn **firstp, FILE *file, int *seen, | |
1772 | int optimize_p ATTRIBUTE_UNUSED) | |
3cf2715d DE |
1773 | { |
1774 | block_depth = 0; | |
1775 | ||
1776 | this_is_asm_operands = 0; | |
1777 | ||
ddd84654 JJ |
1778 | need_profile_function = false; |
1779 | ||
5368224f DC |
1780 | last_filename = LOCATION_FILE (prologue_location); |
1781 | last_linenum = LOCATION_LINE (prologue_location); | |
497b7c47 | 1782 | last_columnnum = LOCATION_COLUMN (prologue_location); |
6c52e687 | 1783 | last_discriminator = discriminator = 0; |
9ae130f8 | 1784 | |
653e276c | 1785 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1786 | |
ef1b3fda KS |
1787 | if (flag_sanitize & SANITIZE_ADDRESS) |
1788 | asan_function_start (); | |
1789 | ||
bd2b9f1e AO |
1790 | rtx_insn *first = *firstp; |
1791 | if (in_initial_view_p (first)) | |
1792 | { | |
1793 | do | |
1794 | { | |
1795 | final_scan_insn (first, file, 0, 0, seen); | |
1796 | first = NEXT_INSN (first); | |
1797 | } | |
1798 | while (in_initial_view_p (first)); | |
1799 | *firstp = first; | |
1800 | } | |
1801 | ||
725730f2 | 1802 | if (!DECL_IGNORED_P (current_function_decl)) |
bd2b9f1e AO |
1803 | debug_hooks->begin_prologue (last_linenum, last_columnnum, |
1804 | last_filename); | |
d291dd49 | 1805 | |
725730f2 | 1806 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
497b7c47 | 1807 | dwarf2out_begin_prologue (0, 0, NULL); |
3cf2715d DE |
1808 | |
1809 | #ifdef LEAF_REG_REMAP | |
416ff32e | 1810 | if (crtl->uses_only_leaf_regs) |
3cf2715d DE |
1811 | leaf_renumber_regs (first); |
1812 | #endif | |
1813 | ||
1814 | /* The Sun386i and perhaps other machines don't work right | |
1815 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1816 | if (targetm.profile_before_prologue () && crtl->profile) |
ddd84654 | 1817 | { |
e86a9946 RS |
1818 | if (targetm.asm_out.function_prologue == default_function_pro_epilogue |
1819 | && targetm.have_prologue ()) | |
ddd84654 | 1820 | { |
fa7af581 | 1821 | rtx_insn *insn; |
ddd84654 JJ |
1822 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
1823 | if (!NOTE_P (insn)) | |
1824 | { | |
fa7af581 | 1825 | insn = NULL; |
ddd84654 JJ |
1826 | break; |
1827 | } | |
1828 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1829 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1830 | break; | |
1831 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1832 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1833 | continue; | |
1834 | else | |
1835 | { | |
fa7af581 | 1836 | insn = NULL; |
ddd84654 JJ |
1837 | break; |
1838 | } | |
1839 | ||
1840 | if (insn) | |
1841 | need_profile_function = true; | |
1842 | else | |
1843 | profile_function (file); | |
1844 | } | |
1845 | else | |
1846 | profile_function (file); | |
1847 | } | |
3cf2715d | 1848 | |
18c038b9 MM |
1849 | /* If debugging, assign block numbers to all of the blocks in this |
1850 | function. */ | |
1851 | if (write_symbols) | |
1852 | { | |
0435312e | 1853 | reemit_insn_block_notes (); |
a20612aa | 1854 | number_blocks (current_function_decl); |
18c038b9 MM |
1855 | /* We never actually put out begin/end notes for the top-level |
1856 | block in the function. But, conceptually, that block is | |
1857 | always needed. */ | |
1858 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1859 | } | |
1860 | ||
f075bd95 | 1861 | HOST_WIDE_INT min_frame_size = constant_lower_bound (get_frame_size ()); |
a214518f | 1862 | if (warn_frame_larger_than |
f075bd95 RS |
1863 | && min_frame_size > frame_larger_than_size) |
1864 | { | |
a214518f SP |
1865 | /* Issue a warning */ |
1866 | warning (OPT_Wframe_larger_than_, | |
f075bd95 RS |
1867 | "the frame size of %wd bytes is larger than %wd bytes", |
1868 | min_frame_size, frame_larger_than_size); | |
1869 | } | |
a214518f | 1870 | |
3cf2715d | 1871 | /* First output the function prologue: code to set up the stack frame. */ |
42776416 | 1872 | targetm.asm_out.function_prologue (file); |
3cf2715d | 1873 | |
3cf2715d DE |
1874 | /* If the machine represents the prologue as RTL, the profiling code must |
1875 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
e86a9946 | 1876 | if (! targetm.have_prologue ()) |
3cf2715d | 1877 | profile_after_prologue (file); |
3cf2715d DE |
1878 | } |
1879 | ||
bd2b9f1e AO |
1880 | /* This is an exported final_start_function_1, callable without SEEN. */ |
1881 | ||
1882 | void | |
1883 | final_start_function (rtx_insn *first, FILE *file, | |
1884 | int optimize_p ATTRIBUTE_UNUSED) | |
1885 | { | |
1886 | int seen = 0; | |
1887 | final_start_function_1 (&first, file, &seen, optimize_p); | |
1888 | gcc_assert (seen == 0); | |
1889 | } | |
1890 | ||
3cf2715d | 1891 | static void |
6cf9ac28 | 1892 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1893 | { |
3c5273a9 | 1894 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1895 | profile_function (file); |
3cf2715d DE |
1896 | } |
1897 | ||
1898 | static void | |
6cf9ac28 | 1899 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1900 | { |
dcacfa04 | 1901 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1902 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1903 | #endif |
531ca746 RH |
1904 | #ifdef ASM_OUTPUT_REG_PUSH |
1905 | rtx sval = NULL, chain = NULL; | |
1906 | ||
1907 | if (cfun->returns_struct) | |
1908 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1909 | true); | |
1910 | if (cfun->static_chain_decl) | |
1911 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1912 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1913 | |
9739c90c JJ |
1914 | if (! NO_PROFILE_COUNTERS) |
1915 | { | |
1916 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1917 | switch_to_section (data_section); |
9739c90c | 1918 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1919 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1920 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1921 | } | |
3cf2715d | 1922 | |
d6b5193b | 1923 | switch_to_section (current_function_section ()); |
3cf2715d | 1924 | |
531ca746 RH |
1925 | #ifdef ASM_OUTPUT_REG_PUSH |
1926 | if (sval && REG_P (sval)) | |
1927 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1928 | if (chain && REG_P (chain)) | |
1929 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1930 | #endif |
3cf2715d | 1931 | |
df696a75 | 1932 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1933 | |
531ca746 RH |
1934 | #ifdef ASM_OUTPUT_REG_PUSH |
1935 | if (chain && REG_P (chain)) | |
1936 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1937 | if (sval && REG_P (sval)) | |
1938 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1939 | #endif |
1940 | } | |
1941 | ||
1942 | /* Output assembler code for the end of a function. | |
1943 | For clarity, args are same as those of `final_start_function' | |
1944 | even though not all of them are needed. */ | |
1945 | ||
1946 | void | |
6cf9ac28 | 1947 | final_end_function (void) |
3cf2715d | 1948 | { |
be1bb652 | 1949 | app_disable (); |
3cf2715d | 1950 | |
725730f2 EB |
1951 | if (!DECL_IGNORED_P (current_function_decl)) |
1952 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1953 | |
3cf2715d DE |
1954 | /* Finally, output the function epilogue: |
1955 | code to restore the stack frame and return to the caller. */ | |
42776416 | 1956 | targetm.asm_out.function_epilogue (asm_out_file); |
3cf2715d | 1957 | |
e2a12aca | 1958 | /* And debug output. */ |
725730f2 EB |
1959 | if (!DECL_IGNORED_P (current_function_decl)) |
1960 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1961 | |
725730f2 | 1962 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1963 | && dwarf2out_do_frame ()) |
702ada3d | 1964 | dwarf2out_end_epilogue (last_linenum, last_filename); |
4fbca4ba RS |
1965 | |
1966 | some_local_dynamic_name = 0; | |
3cf2715d DE |
1967 | } |
1968 | \f | |
6a801cf2 XDL |
1969 | |
1970 | /* Dumper helper for basic block information. FILE is the assembly | |
1971 | output file, and INSN is the instruction being emitted. */ | |
1972 | ||
1973 | static void | |
fa7af581 | 1974 | dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb, |
6a801cf2 XDL |
1975 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) |
1976 | { | |
1977 | basic_block bb; | |
1978 | ||
1979 | if (!flag_debug_asm) | |
1980 | return; | |
1981 | ||
1982 | if (INSN_UID (insn) < bb_map_size | |
1983 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1984 | { | |
1985 | edge e; | |
1986 | edge_iterator ei; | |
1987 | ||
1c13f168 | 1988 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
3995f3a2 JH |
1989 | if (bb->count.initialized_p ()) |
1990 | { | |
1991 | fprintf (file, ", count:"); | |
1992 | bb->count.dump (file); | |
1993 | } | |
6a801cf2 | 1994 | fprintf (file, " seq:%d", (*bb_seqn)++); |
1c13f168 | 1995 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1996 | FOR_EACH_EDGE (e, ei, bb->preds) |
1997 | { | |
a315c44c | 1998 | dump_edge_info (file, e, TDF_DETAILS, 0); |
6a801cf2 XDL |
1999 | } |
2000 | fprintf (file, "\n"); | |
2001 | } | |
2002 | if (INSN_UID (insn) < bb_map_size | |
2003 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
2004 | { | |
2005 | edge e; | |
2006 | edge_iterator ei; | |
2007 | ||
1c13f168 | 2008 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
2009 | FOR_EACH_EDGE (e, ei, bb->succs) |
2010 | { | |
a315c44c | 2011 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
6a801cf2 XDL |
2012 | } |
2013 | fprintf (file, "\n"); | |
2014 | } | |
2015 | } | |
2016 | ||
3cf2715d | 2017 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 2018 | For description of args, see `final_start_function', above. */ |
3cf2715d | 2019 | |
bd2b9f1e AO |
2020 | static void |
2021 | final_1 (rtx_insn *first, FILE *file, int seen, int optimize_p) | |
3cf2715d | 2022 | { |
fa7af581 | 2023 | rtx_insn *insn, *next; |
3cf2715d | 2024 | |
6a801cf2 XDL |
2025 | /* Used for -dA dump. */ |
2026 | basic_block *start_to_bb = NULL; | |
2027 | basic_block *end_to_bb = NULL; | |
2028 | int bb_map_size = 0; | |
2029 | int bb_seqn = 0; | |
2030 | ||
3cf2715d | 2031 | last_ignored_compare = 0; |
3cf2715d | 2032 | |
618f4073 TS |
2033 | if (HAVE_cc0) |
2034 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2035 | { | |
2036 | /* If CC tracking across branches is enabled, record the insn which | |
2037 | jumps to each branch only reached from one place. */ | |
2038 | if (optimize_p && JUMP_P (insn)) | |
2039 | { | |
2040 | rtx lab = JUMP_LABEL (insn); | |
2041 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) | |
2042 | { | |
2043 | LABEL_REFS (lab) = insn; | |
2044 | } | |
2045 | } | |
2046 | } | |
a8c3510c | 2047 | |
3cf2715d DE |
2048 | init_recog (); |
2049 | ||
2050 | CC_STATUS_INIT; | |
2051 | ||
6a801cf2 XDL |
2052 | if (flag_debug_asm) |
2053 | { | |
2054 | basic_block bb; | |
2055 | ||
2056 | bb_map_size = get_max_uid () + 1; | |
2057 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2058 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2059 | ||
292ffe86 CC |
2060 | /* There is no cfg for a thunk. */ |
2061 | if (!cfun->is_thunk) | |
4f42035e | 2062 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
292ffe86 CC |
2063 | { |
2064 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
2065 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
2066 | } | |
6a801cf2 XDL |
2067 | } |
2068 | ||
3cf2715d | 2069 | /* Output the insns. */ |
9ff57809 | 2070 | for (insn = first; insn;) |
2f16edb1 | 2071 | { |
d327457f | 2072 | if (HAVE_ATTR_length) |
0ac76ad9 | 2073 | { |
d327457f JR |
2074 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
2075 | { | |
2076 | /* This can be triggered by bugs elsewhere in the compiler if | |
2077 | new insns are created after init_insn_lengths is called. */ | |
2078 | gcc_assert (NOTE_P (insn)); | |
2079 | insn_current_address = -1; | |
2080 | } | |
2081 | else | |
2082 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
0ac76ad9 | 2083 | } |
0ac76ad9 | 2084 | |
6a801cf2 XDL |
2085 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
2086 | bb_map_size, &bb_seqn); | |
46625112 | 2087 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 2088 | } |
6a801cf2 | 2089 | |
bd2b9f1e AO |
2090 | maybe_output_next_view (&seen); |
2091 | ||
6a801cf2 XDL |
2092 | if (flag_debug_asm) |
2093 | { | |
2094 | free (start_to_bb); | |
2095 | free (end_to_bb); | |
2096 | } | |
bc5612ed BS |
2097 | |
2098 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
2099 | for (insn = first; insn; insn = next) | |
2100 | { | |
2101 | next = NEXT_INSN (insn); | |
2102 | if (NOTE_P (insn) | |
2103 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
2104 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
2105 | delete_insn (insn); | |
2106 | } | |
3cf2715d | 2107 | } |
bd2b9f1e AO |
2108 | |
2109 | /* This is an exported final_1, callable without SEEN. */ | |
2110 | ||
2111 | void | |
2112 | final (rtx_insn *first, FILE *file, int optimize_p) | |
2113 | { | |
2114 | /* Those that use the internal final_start_function_1/final_1 API | |
2115 | skip initial debug bind notes in final_start_function_1, and pass | |
2116 | the modified FIRST to final_1. But those that use the public | |
2117 | final_start_function/final APIs, final_start_function can't move | |
2118 | FIRST because it's not passed by reference, so if they were | |
2119 | skipped there, skip them again here. */ | |
2120 | while (in_initial_view_p (first)) | |
2121 | first = NEXT_INSN (first); | |
2122 | ||
2123 | final_1 (first, file, 0, optimize_p); | |
2124 | } | |
3cf2715d | 2125 | \f |
4bbf910e | 2126 | const char * |
6cf9ac28 | 2127 | get_insn_template (int code, rtx insn) |
4bbf910e | 2128 | { |
4bbf910e RH |
2129 | switch (insn_data[code].output_format) |
2130 | { | |
2131 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 2132 | return insn_data[code].output.single; |
4bbf910e | 2133 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 2134 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 2135 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 2136 | gcc_assert (insn); |
95770ca3 DM |
2137 | return (*insn_data[code].output.function) (recog_data.operand, |
2138 | as_a <rtx_insn *> (insn)); | |
4bbf910e RH |
2139 | |
2140 | default: | |
0bccc606 | 2141 | gcc_unreachable (); |
4bbf910e RH |
2142 | } |
2143 | } | |
f5d927c0 | 2144 | |
0dc36574 ZW |
2145 | /* Emit the appropriate declaration for an alternate-entry-point |
2146 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2147 | LABEL_KIND != LABEL_NORMAL. | |
2148 | ||
2149 | The case fall-through in this function is intentional. */ | |
2150 | static void | |
fa7af581 | 2151 | output_alternate_entry_point (FILE *file, rtx_insn *insn) |
0dc36574 ZW |
2152 | { |
2153 | const char *name = LABEL_NAME (insn); | |
2154 | ||
2155 | switch (LABEL_KIND (insn)) | |
2156 | { | |
2157 | case LABEL_WEAK_ENTRY: | |
2158 | #ifdef ASM_WEAKEN_LABEL | |
2159 | ASM_WEAKEN_LABEL (file, name); | |
81fea426 | 2160 | gcc_fallthrough (); |
0dc36574 ZW |
2161 | #endif |
2162 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 2163 | targetm.asm_out.globalize_label (file, name); |
81fea426 | 2164 | gcc_fallthrough (); |
0dc36574 | 2165 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
2166 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2167 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2168 | #endif | |
0dc36574 ZW |
2169 | ASM_OUTPUT_LABEL (file, name); |
2170 | break; | |
2171 | ||
2172 | case LABEL_NORMAL: | |
2173 | default: | |
0bccc606 | 2174 | gcc_unreachable (); |
0dc36574 ZW |
2175 | } |
2176 | } | |
2177 | ||
f410e1b3 RAE |
2178 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2179 | static rtx | |
fa7af581 | 2180 | call_from_call_insn (rtx_call_insn *insn) |
f410e1b3 RAE |
2181 | { |
2182 | rtx x; | |
2183 | gcc_assert (CALL_P (insn)); | |
2184 | x = PATTERN (insn); | |
2185 | ||
2186 | while (GET_CODE (x) != CALL) | |
2187 | { | |
2188 | switch (GET_CODE (x)) | |
2189 | { | |
2190 | default: | |
2191 | gcc_unreachable (); | |
b8c71e40 RAE |
2192 | case COND_EXEC: |
2193 | x = COND_EXEC_CODE (x); | |
2194 | break; | |
f410e1b3 RAE |
2195 | case PARALLEL: |
2196 | x = XVECEXP (x, 0, 0); | |
2197 | break; | |
2198 | case SET: | |
2199 | x = XEXP (x, 1); | |
2200 | break; | |
2201 | } | |
2202 | } | |
2203 | return x; | |
2204 | } | |
2205 | ||
82f72146 DM |
2206 | /* Print a comment into the asm showing FILENAME, LINENUM, and the |
2207 | corresponding source line, if available. */ | |
2208 | ||
2209 | static void | |
2210 | asm_show_source (const char *filename, int linenum) | |
2211 | { | |
2212 | if (!filename) | |
2213 | return; | |
2214 | ||
2215 | int line_size; | |
2216 | const char *line = location_get_source_line (filename, linenum, &line_size); | |
2217 | if (!line) | |
2218 | return; | |
2219 | ||
2220 | fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum); | |
2221 | /* "line" is not 0-terminated, so we must use line_size. */ | |
2222 | fwrite (line, 1, line_size, asm_out_file); | |
2223 | fputc ('\n', asm_out_file); | |
2224 | } | |
2225 | ||
3cf2715d DE |
2226 | /* The final scan for one insn, INSN. |
2227 | Args are same as in `final', except that INSN | |
2228 | is the insn being scanned. | |
2229 | Value returned is the next insn to be scanned. | |
2230 | ||
ff8cea7e EB |
2231 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2232 | used for within delayed branch sequence output). | |
3cf2715d | 2233 | |
589fe865 DJ |
2234 | SEEN is used to track the end of the prologue, for emitting |
2235 | debug information. We force the emission of a line note after | |
70aacc97 | 2236 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ |
589fe865 | 2237 | |
fa7af581 | 2238 | rtx_insn * |
7fa55ff6 | 2239 | final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 2240 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 2241 | { |
f1e52ed6 | 2242 | #if HAVE_cc0 |
90ca38bb MM |
2243 | rtx set; |
2244 | #endif | |
fa7af581 | 2245 | rtx_insn *next; |
d305ca88 | 2246 | rtx_jump_table_data *table; |
fa7af581 | 2247 | |
3cf2715d DE |
2248 | insn_counter++; |
2249 | ||
2250 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2251 | template of "#") while not optimizing. */ | |
4654c0cf | 2252 | if (insn->deleted ()) |
3cf2715d DE |
2253 | return NEXT_INSN (insn); |
2254 | ||
2255 | switch (GET_CODE (insn)) | |
2256 | { | |
2257 | case NOTE: | |
a38e7aa5 | 2258 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
2259 | { |
2260 | case NOTE_INSN_DELETED: | |
d33606c3 | 2261 | case NOTE_INSN_UPDATE_SJLJ_CONTEXT: |
be1bb652 | 2262 | break; |
3cf2715d | 2263 | |
87c8b4be | 2264 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
bd2b9f1e AO |
2265 | maybe_output_next_view (seen); |
2266 | ||
c543ca49 | 2267 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 2268 | |
b8cb3096 JJ |
2269 | if (in_cold_section_p) |
2270 | cold_function_name | |
2271 | = clone_function_name (current_function_decl, "cold"); | |
2272 | ||
a4b6974e | 2273 | if (dwarf2out_do_frame ()) |
b8cb3096 JJ |
2274 | { |
2275 | dwarf2out_switch_text_section (); | |
2276 | if (!dwarf2_debug_info_emitted_p (current_function_decl) | |
2277 | && !DECL_IGNORED_P (current_function_decl)) | |
2278 | debug_hooks->switch_text_section (); | |
2279 | } | |
f0a0390e | 2280 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 2281 | debug_hooks->switch_text_section (); |
a4b6974e | 2282 | |
c543ca49 | 2283 | switch_to_section (current_function_section ()); |
14d11d40 IS |
2284 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2285 | current_function_decl, | |
2286 | in_cold_section_p); | |
2ae367c1 ST |
2287 | /* Emit a label for the split cold section. Form label name by |
2288 | suffixing "cold" to the original function's name. */ | |
2289 | if (in_cold_section_p) | |
2290 | { | |
11c3d071 CT |
2291 | #ifdef ASM_DECLARE_COLD_FUNCTION_NAME |
2292 | ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file, | |
2293 | IDENTIFIER_POINTER | |
2294 | (cold_function_name), | |
2295 | current_function_decl); | |
16d710b1 | 2296 | #else |
2ae367c1 ST |
2297 | ASM_OUTPUT_LABEL (asm_out_file, |
2298 | IDENTIFIER_POINTER (cold_function_name)); | |
16d710b1 | 2299 | #endif |
2ae367c1 | 2300 | } |
750054a2 | 2301 | break; |
b0efb46b | 2302 | |
be1bb652 | 2303 | case NOTE_INSN_BASIC_BLOCK: |
ddd84654 JJ |
2304 | if (need_profile_function) |
2305 | { | |
2306 | profile_function (asm_out_file); | |
2307 | need_profile_function = false; | |
2308 | } | |
2309 | ||
2784ed9c KT |
2310 | if (targetm.asm_out.unwind_emit) |
2311 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 2312 | |
6c52e687 CC |
2313 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2314 | ||
be1bb652 | 2315 | break; |
3cf2715d | 2316 | |
be1bb652 | 2317 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2318 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2319 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2320 | break; |
3d195391 | 2321 | |
be1bb652 | 2322 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2323 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2324 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2325 | break; |
3d195391 | 2326 | |
be1bb652 | 2327 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 2328 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 2329 | profile_after_prologue (file); |
589fe865 DJ |
2330 | |
2331 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2332 | { | |
2333 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2334 | force_source_line = true; |
589fe865 DJ |
2335 | } |
2336 | else | |
2337 | *seen |= SEEN_NOTE; | |
2338 | ||
3cf2715d | 2339 | break; |
3cf2715d | 2340 | |
be1bb652 | 2341 | case NOTE_INSN_EPILOGUE_BEG: |
bc45e4ba TG |
2342 | if (!DECL_IGNORED_P (current_function_decl)) |
2343 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
5fd9b178 | 2344 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 2345 | break; |
3cf2715d | 2346 | |
bc5612ed BS |
2347 | case NOTE_INSN_CFI: |
2348 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2349 | break; | |
2350 | ||
2351 | case NOTE_INSN_CFI_LABEL: | |
2352 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2353 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
2354 | break; |
2355 | ||
be1bb652 | 2356 | case NOTE_INSN_FUNCTION_BEG: |
ddd84654 JJ |
2357 | if (need_profile_function) |
2358 | { | |
2359 | profile_function (asm_out_file); | |
2360 | need_profile_function = false; | |
2361 | } | |
2362 | ||
653e276c | 2363 | app_disable (); |
725730f2 EB |
2364 | if (!DECL_IGNORED_P (current_function_decl)) |
2365 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
2366 | |
2367 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2368 | { | |
2369 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2370 | force_source_line = true; |
589fe865 DJ |
2371 | } |
2372 | else | |
2373 | *seen |= SEEN_NOTE; | |
2374 | ||
3cf2715d | 2375 | break; |
be1bb652 RH |
2376 | |
2377 | case NOTE_INSN_BLOCK_BEG: | |
2378 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2379 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2380 | || write_symbols == DWARF2_DEBUG |
2381 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2382 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2383 | { |
2384 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2385 | |
be1bb652 RH |
2386 | app_disable (); |
2387 | ++block_depth; | |
2388 | high_block_linenum = last_linenum; | |
eac40081 | 2389 | |
a5a42b92 | 2390 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2391 | if (!DECL_IGNORED_P (current_function_decl)) |
2392 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2393 | |
be1bb652 RH |
2394 | /* Mark this block as output. */ |
2395 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
aaec3d85 | 2396 | BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p; |
be1bb652 | 2397 | } |
180295ed | 2398 | if (write_symbols == DBX_DEBUG) |
d752cfdb JJ |
2399 | { |
2400 | location_t *locus_ptr | |
2401 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2402 | ||
2403 | if (locus_ptr != NULL) | |
2404 | { | |
2405 | override_filename = LOCATION_FILE (*locus_ptr); | |
2406 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2407 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2408 | } |
2409 | } | |
be1bb652 | 2410 | break; |
18c038b9 | 2411 | |
be1bb652 | 2412 | case NOTE_INSN_BLOCK_END: |
bd2b9f1e AO |
2413 | maybe_output_next_view (seen); |
2414 | ||
be1bb652 RH |
2415 | if (debug_info_level == DINFO_LEVEL_NORMAL |
2416 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2417 | || write_symbols == DWARF2_DEBUG |
2418 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2419 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2420 | { |
2421 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2422 | |
be1bb652 RH |
2423 | app_disable (); |
2424 | ||
2425 | /* End of a symbol-block. */ | |
2426 | --block_depth; | |
0bccc606 | 2427 | gcc_assert (block_depth >= 0); |
3cf2715d | 2428 | |
725730f2 EB |
2429 | if (!DECL_IGNORED_P (current_function_decl)) |
2430 | debug_hooks->end_block (high_block_linenum, n); | |
aaec3d85 JJ |
2431 | gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) |
2432 | == in_cold_section_p); | |
be1bb652 | 2433 | } |
180295ed | 2434 | if (write_symbols == DBX_DEBUG) |
d752cfdb JJ |
2435 | { |
2436 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2437 | location_t *locus_ptr | |
2438 | = block_nonartificial_location (outer_block); | |
2439 | ||
2440 | if (locus_ptr != NULL) | |
2441 | { | |
2442 | override_filename = LOCATION_FILE (*locus_ptr); | |
2443 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2444 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2445 | } |
2446 | else | |
2447 | { | |
2448 | override_filename = NULL; | |
2449 | override_linenum = 0; | |
497b7c47 | 2450 | override_columnnum = 0; |
d752cfdb JJ |
2451 | } |
2452 | } | |
be1bb652 RH |
2453 | break; |
2454 | ||
2455 | case NOTE_INSN_DELETED_LABEL: | |
2456 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2457 | the label could be proved to be unreachable, though still | |
2458 | referenced (in the form of having its address taken. */ | |
8215347e | 2459 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2460 | break; |
3cf2715d | 2461 | |
5619e52c JJ |
2462 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2463 | /* Similarly, but need to use different namespace for it. */ | |
2464 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2465 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2466 | break; | |
2467 | ||
014a1138 | 2468 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2469 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 | 2470 | if (!DECL_IGNORED_P (current_function_decl)) |
bd2b9f1e AO |
2471 | { |
2472 | debug_hooks->var_location (insn); | |
2473 | set_next_view_needed (seen); | |
2474 | } | |
014a1138 JZ |
2475 | break; |
2476 | ||
96a95ac1 AO |
2477 | case NOTE_INSN_BEGIN_STMT: |
2478 | gcc_checking_assert (cfun->debug_nonbind_markers); | |
2479 | if (!DECL_IGNORED_P (current_function_decl) | |
2480 | && notice_source_line (insn, NULL)) | |
2481 | { | |
2482 | (*debug_hooks->source_line) (last_linenum, last_columnnum, | |
2483 | last_filename, last_discriminator, | |
2484 | true); | |
bd2b9f1e | 2485 | clear_next_view_needed (seen); |
96a95ac1 AO |
2486 | } |
2487 | break; | |
2488 | ||
be1bb652 | 2489 | default: |
a38e7aa5 | 2490 | gcc_unreachable (); |
f5d927c0 | 2491 | break; |
3cf2715d DE |
2492 | } |
2493 | break; | |
2494 | ||
2495 | case BARRIER: | |
3cf2715d DE |
2496 | break; |
2497 | ||
2498 | case CODE_LABEL: | |
1dd8faa8 R |
2499 | /* The target port might emit labels in the output function for |
2500 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2501 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2502 | { | |
2503 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2504 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2505 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2506 | #endif |
fc470718 | 2507 | |
1dd8faa8 | 2508 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2509 | { |
9e423e6d | 2510 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2511 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2512 | #else |
2513 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2514 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2515 | #else |
40cdfca6 | 2516 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2517 | #endif |
9e423e6d | 2518 | #endif |
40cdfca6 | 2519 | } |
de7987a6 | 2520 | } |
3cf2715d | 2521 | CC_STATUS_INIT; |
03ffa171 | 2522 | |
725730f2 | 2523 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
f630fc6a | 2524 | debug_hooks->label (as_a <rtx_code_label *> (insn)); |
e1772ac0 | 2525 | |
bad4f40b | 2526 | app_disable (); |
b2a6a2fb | 2527 | |
0676c393 MM |
2528 | /* If this label is followed by a jump-table, make sure we put |
2529 | the label in the read-only section. Also possibly write the | |
2530 | label and jump table together. */ | |
d305ca88 RS |
2531 | table = jump_table_for_label (as_a <rtx_code_label *> (insn)); |
2532 | if (table) | |
3cf2715d | 2533 | { |
e0d80184 | 2534 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2535 | /* In this case, the case vector is being moved by the |
2536 | target, so don't output the label at all. Leave that | |
2537 | to the back end macros. */ | |
e0d80184 | 2538 | #else |
0676c393 MM |
2539 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2540 | { | |
2541 | int log_align; | |
340f7e7c | 2542 | |
0676c393 MM |
2543 | switch_to_section (targetm.asm_out.function_rodata_section |
2544 | (current_function_decl)); | |
340f7e7c RH |
2545 | |
2546 | #ifdef ADDR_VEC_ALIGN | |
d305ca88 | 2547 | log_align = ADDR_VEC_ALIGN (table); |
340f7e7c | 2548 | #else |
0676c393 | 2549 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2550 | #endif |
0676c393 MM |
2551 | ASM_OUTPUT_ALIGN (file, log_align); |
2552 | } | |
2553 | else | |
2554 | switch_to_section (current_function_section ()); | |
75197b37 | 2555 | |
3cf2715d | 2556 | #ifdef ASM_OUTPUT_CASE_LABEL |
d305ca88 | 2557 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table); |
3cf2715d | 2558 | #else |
0676c393 | 2559 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2560 | #endif |
3cf2715d | 2561 | #endif |
0676c393 | 2562 | break; |
3cf2715d | 2563 | } |
0dc36574 ZW |
2564 | if (LABEL_ALT_ENTRY_P (insn)) |
2565 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2566 | else |
5fd9b178 | 2567 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2568 | break; |
2569 | ||
2570 | default: | |
2571 | { | |
b3694847 | 2572 | rtx body = PATTERN (insn); |
3cf2715d | 2573 | int insn_code_number; |
48c54229 | 2574 | const char *templ; |
96a95ac1 AO |
2575 | bool is_stmt, *is_stmt_p; |
2576 | ||
2577 | if (MAY_HAVE_DEBUG_MARKER_INSNS && cfun->debug_nonbind_markers) | |
2578 | { | |
2579 | is_stmt = false; | |
2580 | is_stmt_p = NULL; | |
2581 | } | |
2582 | else | |
2583 | is_stmt_p = &is_stmt; | |
3cf2715d | 2584 | |
9a1a4737 PB |
2585 | /* Reset this early so it is correct for ASM statements. */ |
2586 | current_insn_predicate = NULL_RTX; | |
2929029c | 2587 | |
3cf2715d DE |
2588 | /* An INSN, JUMP_INSN or CALL_INSN. |
2589 | First check for special kinds that recog doesn't recognize. */ | |
2590 | ||
6614fd40 | 2591 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2592 | || GET_CODE (body) == CLOBBER) |
2593 | break; | |
2594 | ||
f1e52ed6 | 2595 | #if HAVE_cc0 |
4928181c SB |
2596 | { |
2597 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2598 | the setting of the condition code was done in the delay slot | |
2599 | of the insn that branched here. So recover the cc status | |
2600 | from the insn that set it. */ | |
3cf2715d | 2601 | |
4928181c SB |
2602 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2603 | if (note) | |
2604 | { | |
647d790d DM |
2605 | rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0)); |
2606 | NOTICE_UPDATE_CC (PATTERN (other), other); | |
4928181c SB |
2607 | cc_prev_status = cc_status; |
2608 | } | |
2609 | } | |
3cf2715d DE |
2610 | #endif |
2611 | ||
2612 | /* Detect insns that are really jump-tables | |
2613 | and output them as such. */ | |
2614 | ||
34f0d87a | 2615 | if (JUMP_TABLE_DATA_P (insn)) |
3cf2715d | 2616 | { |
7f7f8214 | 2617 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2618 | int vlen, idx; |
7f7f8214 | 2619 | #endif |
3cf2715d | 2620 | |
b2a6a2fb | 2621 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2622 | switch_to_section (targetm.asm_out.function_rodata_section |
2623 | (current_function_decl)); | |
b2a6a2fb | 2624 | else |
d6b5193b | 2625 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2626 | |
bad4f40b | 2627 | app_disable (); |
3cf2715d | 2628 | |
e0d80184 DM |
2629 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2630 | if (GET_CODE (body) == ADDR_VEC) | |
2631 | { | |
2632 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2633 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2634 | #else | |
0bccc606 | 2635 | gcc_unreachable (); |
e0d80184 DM |
2636 | #endif |
2637 | } | |
2638 | else | |
2639 | { | |
2640 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2641 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2642 | #else | |
0bccc606 | 2643 | gcc_unreachable (); |
e0d80184 DM |
2644 | #endif |
2645 | } | |
2646 | #else | |
3cf2715d DE |
2647 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2648 | for (idx = 0; idx < vlen; idx++) | |
2649 | { | |
2650 | if (GET_CODE (body) == ADDR_VEC) | |
2651 | { | |
2652 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2653 | ASM_OUTPUT_ADDR_VEC_ELT | |
2654 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2655 | #else | |
0bccc606 | 2656 | gcc_unreachable (); |
3cf2715d DE |
2657 | #endif |
2658 | } | |
2659 | else | |
2660 | { | |
2661 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2662 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2663 | (file, | |
33f7f353 | 2664 | body, |
3cf2715d DE |
2665 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2666 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2667 | #else | |
0bccc606 | 2668 | gcc_unreachable (); |
3cf2715d DE |
2669 | #endif |
2670 | } | |
2671 | } | |
2672 | #ifdef ASM_OUTPUT_CASE_END | |
2673 | ASM_OUTPUT_CASE_END (file, | |
2674 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2675 | insn); | |
e0d80184 | 2676 | #endif |
3cf2715d DE |
2677 | #endif |
2678 | ||
d6b5193b | 2679 | switch_to_section (current_function_section ()); |
3cf2715d | 2680 | |
bd2b9f1e AO |
2681 | if (debug_variable_location_views |
2682 | && !DECL_IGNORED_P (current_function_decl)) | |
2683 | debug_hooks->var_location (insn); | |
2684 | ||
3cf2715d DE |
2685 | break; |
2686 | } | |
0435312e JH |
2687 | /* Output this line note if it is the first or the last line |
2688 | note in a row. */ | |
725730f2 | 2689 | if (!DECL_IGNORED_P (current_function_decl) |
96a95ac1 | 2690 | && notice_source_line (insn, is_stmt_p)) |
82f72146 DM |
2691 | { |
2692 | if (flag_verbose_asm) | |
2693 | asm_show_source (last_filename, last_linenum); | |
497b7c47 JJ |
2694 | (*debug_hooks->source_line) (last_linenum, last_columnnum, |
2695 | last_filename, last_discriminator, | |
2696 | is_stmt); | |
bd2b9f1e | 2697 | clear_next_view_needed (seen); |
82f72146 | 2698 | } |
bd2b9f1e AO |
2699 | else |
2700 | maybe_output_next_view (seen); | |
2701 | ||
2702 | gcc_checking_assert (!DEBUG_INSN_P (insn)); | |
3cf2715d | 2703 | |
93671519 BE |
2704 | if (GET_CODE (body) == PARALLEL |
2705 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT) | |
2706 | body = XVECEXP (body, 0, 0); | |
2707 | ||
3cf2715d DE |
2708 | if (GET_CODE (body) == ASM_INPUT) |
2709 | { | |
36d7136e RH |
2710 | const char *string = XSTR (body, 0); |
2711 | ||
3cf2715d DE |
2712 | /* There's no telling what that did to the condition codes. */ |
2713 | CC_STATUS_INIT; | |
36d7136e RH |
2714 | |
2715 | if (string[0]) | |
3cf2715d | 2716 | { |
5ffeb913 | 2717 | expanded_location loc; |
bff4b63d | 2718 | |
3a694d86 | 2719 | app_enable (); |
5ffeb913 | 2720 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2721 | if (*loc.file && loc.line) |
bff4b63d AO |
2722 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2723 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2724 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2725 | #if HAVE_AS_LINE_ZERO |
2726 | if (*loc.file && loc.line) | |
bff4b63d | 2727 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2728 | #endif |
3cf2715d | 2729 | } |
3cf2715d DE |
2730 | break; |
2731 | } | |
2732 | ||
2733 | /* Detect `asm' construct with operands. */ | |
2734 | if (asm_noperands (body) >= 0) | |
2735 | { | |
22bf4422 | 2736 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2737 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2738 | const char *string; |
bff4b63d | 2739 | location_t loc; |
5ffeb913 | 2740 | expanded_location expanded; |
3cf2715d DE |
2741 | |
2742 | /* There's no telling what that did to the condition codes. */ | |
2743 | CC_STATUS_INIT; | |
3cf2715d | 2744 | |
3cf2715d | 2745 | /* Get out the operand values. */ |
bff4b63d | 2746 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2747 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2748 | insn_noperands = noperands; |
2749 | this_is_asm_operands = insn; | |
5ffeb913 | 2750 | expanded = expand_location (loc); |
3cf2715d | 2751 | |
ad7e39ca AO |
2752 | #ifdef FINAL_PRESCAN_INSN |
2753 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2754 | #endif | |
2755 | ||
3cf2715d | 2756 | /* Output the insn using them. */ |
36d7136e RH |
2757 | if (string[0]) |
2758 | { | |
3a694d86 | 2759 | app_enable (); |
5ffeb913 | 2760 | if (expanded.file && expanded.line) |
bff4b63d | 2761 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2762 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2763 | output_asm_insn (string, ops); |
03943c05 | 2764 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2765 | if (expanded.file && expanded.line) |
bff4b63d | 2766 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2767 | #endif |
36d7136e RH |
2768 | } |
2769 | ||
1afc5373 CF |
2770 | if (targetm.asm_out.final_postscan_insn) |
2771 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2772 | insn_noperands); | |
2773 | ||
3cf2715d DE |
2774 | this_is_asm_operands = 0; |
2775 | break; | |
2776 | } | |
2777 | ||
bad4f40b | 2778 | app_disable (); |
3cf2715d | 2779 | |
e429a50b | 2780 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
2781 | { |
2782 | /* A delayed-branch sequence */ | |
b3694847 | 2783 | int i; |
3cf2715d | 2784 | |
b32d5189 | 2785 | final_sequence = seq; |
3cf2715d DE |
2786 | |
2787 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2788 | force the restoration of a comparison that was previously | |
2789 | thought unnecessary. If that happens, cancel this sequence | |
2790 | and cause that insn to be restored. */ | |
2791 | ||
e429a50b DM |
2792 | next = final_scan_insn (seq->insn (0), file, 0, 1, seen); |
2793 | if (next != seq->insn (1)) | |
3cf2715d DE |
2794 | { |
2795 | final_sequence = 0; | |
2796 | return next; | |
2797 | } | |
2798 | ||
e429a50b | 2799 | for (i = 1; i < seq->len (); i++) |
c7eee2df | 2800 | { |
e429a50b | 2801 | rtx_insn *insn = seq->insn (i); |
fa7af581 | 2802 | rtx_insn *next = NEXT_INSN (insn); |
c7eee2df RK |
2803 | /* We loop in case any instruction in a delay slot gets |
2804 | split. */ | |
2805 | do | |
c9d691e9 | 2806 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2807 | while (insn != next); |
2808 | } | |
3cf2715d DE |
2809 | #ifdef DBR_OUTPUT_SEQEND |
2810 | DBR_OUTPUT_SEQEND (file); | |
2811 | #endif | |
2812 | final_sequence = 0; | |
2813 | ||
2814 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2815 | insns in the delay slot are actually executed before the | |
2816 | called function. Hence we don't preserve any CC-setting | |
2817 | actions in these insns and the CC must be marked as being | |
2818 | clobbered by the function. */ | |
e429a50b | 2819 | if (CALL_P (seq->insn (0))) |
b729186a JL |
2820 | { |
2821 | CC_STATUS_INIT; | |
2822 | } | |
3cf2715d DE |
2823 | break; |
2824 | } | |
2825 | ||
2826 | /* We have a real machine instruction as rtl. */ | |
2827 | ||
2828 | body = PATTERN (insn); | |
2829 | ||
f1e52ed6 | 2830 | #if HAVE_cc0 |
f5d927c0 | 2831 | set = single_set (insn); |
b88c92cc | 2832 | |
3cf2715d DE |
2833 | /* Check for redundant test and compare instructions |
2834 | (when the condition codes are already set up as desired). | |
2835 | This is done only when optimizing; if not optimizing, | |
2836 | it should be possible for the user to alter a variable | |
2837 | with the debugger in between statements | |
2838 | and the next statement should reexamine the variable | |
2839 | to compute the condition codes. */ | |
2840 | ||
46625112 | 2841 | if (optimize_p) |
3cf2715d | 2842 | { |
30f5e9f5 RK |
2843 | if (set |
2844 | && GET_CODE (SET_DEST (set)) == CC0 | |
2845 | && insn != last_ignored_compare) | |
3cf2715d | 2846 | { |
f90b7a5a | 2847 | rtx src1, src2; |
30f5e9f5 | 2848 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
55a2c322 | 2849 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
f90b7a5a PB |
2850 | |
2851 | src1 = SET_SRC (set); | |
2852 | src2 = NULL_RTX; | |
2853 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2854 | { |
2855 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2856 | XEXP (SET_SRC (set), 0) | |
55a2c322 | 2857 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
30f5e9f5 RK |
2858 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2859 | XEXP (SET_SRC (set), 1) | |
55a2c322 | 2860 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
f90b7a5a PB |
2861 | if (XEXP (SET_SRC (set), 1) |
2862 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2863 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2864 | } |
2865 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2866 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2867 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2868 | && rtx_equal_p (src1, cc_status.value2)) |
2869 | || (src2 != 0 && cc_status.value1 != 0 | |
2870 | && rtx_equal_p (src2, cc_status.value1)) | |
2871 | || (src2 != 0 && cc_status.value2 != 0 | |
2872 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2873 | { |
30f5e9f5 | 2874 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2875 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2876 | /* or if anything in it is volatile. */ |
2877 | && ! volatile_refs_p (PATTERN (insn))) | |
2878 | { | |
2879 | /* We don't really delete the insn; just ignore it. */ | |
2880 | last_ignored_compare = insn; | |
2881 | break; | |
2882 | } | |
3cf2715d DE |
2883 | } |
2884 | } | |
2885 | } | |
3cf2715d | 2886 | |
3cf2715d DE |
2887 | /* If this is a conditional branch, maybe modify it |
2888 | if the cc's are in a nonstandard state | |
2889 | so that it accomplishes the same thing that it would | |
2890 | do straightforwardly if the cc's were set up normally. */ | |
2891 | ||
2892 | if (cc_status.flags != 0 | |
4b4bf941 | 2893 | && JUMP_P (insn) |
3cf2715d DE |
2894 | && GET_CODE (body) == SET |
2895 | && SET_DEST (body) == pc_rtx | |
2896 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2897 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2898 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2899 | { |
2900 | /* This function may alter the contents of its argument | |
2901 | and clear some of the cc_status.flags bits. | |
2902 | It may also return 1 meaning condition now always true | |
2903 | or -1 meaning condition now always false | |
2904 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2905 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2906 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2907 | with its then-operand or its else-operand. */ | |
2908 | if (result == 1) | |
2909 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2910 | if (result == -1) | |
2911 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2912 | ||
2913 | /* The jump is now either unconditional or a no-op. | |
2914 | If it has become a no-op, don't try to output it. | |
2915 | (It would not be recognized.) */ | |
2916 | if (SET_SRC (body) == pc_rtx) | |
2917 | { | |
ca6c03ca | 2918 | delete_insn (insn); |
3cf2715d DE |
2919 | break; |
2920 | } | |
26898771 | 2921 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2922 | /* Replace (set (pc) (return)) with (return). */ |
2923 | PATTERN (insn) = body = SET_SRC (body); | |
2924 | ||
2925 | /* Rerecognize the instruction if it has changed. */ | |
2926 | if (result != 0) | |
2927 | INSN_CODE (insn) = -1; | |
2928 | } | |
2929 | ||
604e4ce3 | 2930 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2931 | are in a nonstandard state so that it accomplishes the same |
2932 | thing that it would do straightforwardly if the cc's were | |
2933 | set up normally. */ | |
2934 | if (cc_status.flags != 0 | |
2935 | && NONJUMP_INSN_P (insn) | |
2936 | && GET_CODE (body) == TRAP_IF | |
2937 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2938 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2939 | { | |
2940 | /* This function may alter the contents of its argument | |
2941 | and clear some of the cc_status.flags bits. | |
2942 | It may also return 1 meaning condition now always true | |
2943 | or -1 meaning condition now always false | |
2944 | or 2 meaning condition nontrivial but altered. */ | |
2945 | int result = alter_cond (TRAP_CONDITION (body)); | |
2946 | ||
2947 | /* If TRAP_CONDITION has become always false, delete the | |
2948 | instruction. */ | |
2949 | if (result == -1) | |
2950 | { | |
2951 | delete_insn (insn); | |
2952 | break; | |
2953 | } | |
2954 | ||
2955 | /* If TRAP_CONDITION has become always true, replace | |
2956 | TRAP_CONDITION with const_true_rtx. */ | |
2957 | if (result == 1) | |
2958 | TRAP_CONDITION (body) = const_true_rtx; | |
2959 | ||
2960 | /* Rerecognize the instruction if it has changed. */ | |
2961 | if (result != 0) | |
2962 | INSN_CODE (insn) = -1; | |
2963 | } | |
2964 | ||
3cf2715d | 2965 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2966 | condition codes without jumping and instructions that |
2967 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2968 | |
2969 | if (cc_status.flags != 0 | |
b88c92cc | 2970 | && set != 0) |
3cf2715d | 2971 | { |
462da2af | 2972 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2973 | |
4b4bf941 | 2974 | if (!JUMP_P (insn) |
b88c92cc | 2975 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2976 | { |
b88c92cc RK |
2977 | cond_rtx = XEXP (SET_SRC (set), 0); |
2978 | then_rtx = XEXP (SET_SRC (set), 1); | |
2979 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2980 | } |
2981 | else | |
2982 | { | |
b88c92cc | 2983 | cond_rtx = SET_SRC (set); |
462da2af SC |
2984 | then_rtx = const_true_rtx; |
2985 | else_rtx = const0_rtx; | |
2986 | } | |
f5d927c0 | 2987 | |
511d31d8 AS |
2988 | if (COMPARISON_P (cond_rtx) |
2989 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
3cf2715d | 2990 | { |
511d31d8 AS |
2991 | int result; |
2992 | result = alter_cond (cond_rtx); | |
2993 | if (result == 1) | |
2994 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2995 | else if (result == -1) | |
2996 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2997 | else if (result == 2) | |
2998 | INSN_CODE (insn) = -1; | |
2999 | if (SET_DEST (set) == SET_SRC (set)) | |
3000 | delete_insn (insn); | |
3cf2715d DE |
3001 | } |
3002 | } | |
462da2af | 3003 | |
3cf2715d DE |
3004 | #endif |
3005 | ||
3006 | /* Do machine-specific peephole optimizations if desired. */ | |
3007 | ||
d87834de | 3008 | if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d | 3009 | { |
fa7af581 | 3010 | rtx_insn *next = peephole (insn); |
3cf2715d DE |
3011 | /* When peepholing, if there were notes within the peephole, |
3012 | emit them before the peephole. */ | |
3013 | if (next != 0 && next != NEXT_INSN (insn)) | |
3014 | { | |
fa7af581 | 3015 | rtx_insn *note, *prev = PREV_INSN (insn); |
3cf2715d DE |
3016 | |
3017 | for (note = NEXT_INSN (insn); note != next; | |
3018 | note = NEXT_INSN (note)) | |
46625112 | 3019 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
3020 | |
3021 | /* Put the notes in the proper position for a later | |
3022 | rescan. For example, the SH target can do this | |
3023 | when generating a far jump in a delayed branch | |
3024 | sequence. */ | |
3025 | note = NEXT_INSN (insn); | |
0f82e5c9 DM |
3026 | SET_PREV_INSN (note) = prev; |
3027 | SET_NEXT_INSN (prev) = note; | |
3028 | SET_NEXT_INSN (PREV_INSN (next)) = insn; | |
3029 | SET_PREV_INSN (insn) = PREV_INSN (next); | |
3030 | SET_NEXT_INSN (insn) = next; | |
3031 | SET_PREV_INSN (next) = insn; | |
3cf2715d DE |
3032 | } |
3033 | ||
3034 | /* PEEPHOLE might have changed this. */ | |
3035 | body = PATTERN (insn); | |
3036 | } | |
3037 | ||
3038 | /* Try to recognize the instruction. | |
3039 | If successful, verify that the operands satisfy the | |
3040 | constraints for the instruction. Crash if they don't, | |
3041 | since `reload' should have changed them so that they do. */ | |
3042 | ||
3043 | insn_code_number = recog_memoized (insn); | |
0304f787 | 3044 | cleanup_subreg_operands (insn); |
3cf2715d | 3045 | |
8c503f0d SB |
3046 | /* Dump the insn in the assembly for debugging (-dAP). |
3047 | If the final dump is requested as slim RTL, dump slim | |
3048 | RTL to the assembly file also. */ | |
dd3f0101 KH |
3049 | if (flag_dump_rtl_in_asm) |
3050 | { | |
3051 | print_rtx_head = ASM_COMMENT_START; | |
8c503f0d SB |
3052 | if (! (dump_flags & TDF_SLIM)) |
3053 | print_rtl_single (asm_out_file, insn); | |
3054 | else | |
3055 | dump_insn_slim (asm_out_file, insn); | |
dd3f0101 KH |
3056 | print_rtx_head = ""; |
3057 | } | |
b9f22704 | 3058 | |
daca1a96 | 3059 | if (! constrain_operands_cached (insn, 1)) |
3cf2715d | 3060 | fatal_insn_not_found (insn); |
3cf2715d DE |
3061 | |
3062 | /* Some target machines need to prescan each insn before | |
3063 | it is output. */ | |
3064 | ||
3065 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 3066 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
3067 | #endif |
3068 | ||
2929029c WG |
3069 | if (targetm.have_conditional_execution () |
3070 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 3071 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 3072 | |
f1e52ed6 | 3073 | #if HAVE_cc0 |
3cf2715d DE |
3074 | cc_prev_status = cc_status; |
3075 | ||
3076 | /* Update `cc_status' for this instruction. | |
3077 | The instruction's output routine may change it further. | |
3078 | If the output routine for a jump insn needs to depend | |
3079 | on the cc status, it should look at cc_prev_status. */ | |
3080 | ||
3081 | NOTICE_UPDATE_CC (body, insn); | |
3082 | #endif | |
3083 | ||
b1a9f6a0 | 3084 | current_output_insn = debug_insn = insn; |
3cf2715d | 3085 | |
4bbf910e | 3086 | /* Find the proper template for this insn. */ |
48c54229 | 3087 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 3088 | |
4bbf910e RH |
3089 | /* If the C code returns 0, it means that it is a jump insn |
3090 | which follows a deleted test insn, and that test insn | |
3091 | needs to be reinserted. */ | |
48c54229 | 3092 | if (templ == 0) |
3cf2715d | 3093 | { |
fa7af581 | 3094 | rtx_insn *prev; |
efd0378b | 3095 | |
0bccc606 | 3096 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
3097 | |
3098 | /* We have already processed the notes between the setter and | |
3099 | the user. Make sure we don't process them again, this is | |
3100 | particularly important if one of the notes is a block | |
3101 | scope note or an EH note. */ | |
3102 | for (prev = insn; | |
3103 | prev != last_ignored_compare; | |
3104 | prev = PREV_INSN (prev)) | |
3105 | { | |
4b4bf941 | 3106 | if (NOTE_P (prev)) |
ca6c03ca | 3107 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
3108 | } |
3109 | ||
3110 | return prev; | |
3cf2715d DE |
3111 | } |
3112 | ||
3113 | /* If the template is the string "#", it means that this insn must | |
3114 | be split. */ | |
48c54229 | 3115 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 3116 | { |
fa7af581 | 3117 | rtx_insn *new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
3118 | |
3119 | /* If we didn't split the insn, go away. */ | |
48c54229 | 3120 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 3121 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 3122 | |
d327457f JR |
3123 | /* If we have a length attribute, this instruction should have |
3124 | been split in shorten_branches, to ensure that we would have | |
3125 | valid length info for the splitees. */ | |
3126 | gcc_assert (!HAVE_ATTR_length); | |
3d14e82f | 3127 | |
48c54229 | 3128 | return new_rtx; |
3cf2715d | 3129 | } |
f5d927c0 | 3130 | |
951120ea PB |
3131 | /* ??? This will put the directives in the wrong place if |
3132 | get_insn_template outputs assembly directly. However calling it | |
3133 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
3134 | if (targetm.asm_out.unwind_emit_before_insn |
3135 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 3136 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 3137 | |
f2834b5d PMR |
3138 | rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn); |
3139 | if (call_insn != NULL) | |
f410e1b3 | 3140 | { |
fa7af581 | 3141 | rtx x = call_from_call_insn (call_insn); |
f410e1b3 RAE |
3142 | x = XEXP (x, 0); |
3143 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
3144 | { | |
3145 | tree t; | |
3146 | x = XEXP (x, 0); | |
3147 | t = SYMBOL_REF_DECL (x); | |
3148 | if (t) | |
3149 | assemble_external (t); | |
3150 | } | |
3151 | } | |
3152 | ||
951120ea | 3153 | /* Output assembler code from the template. */ |
48c54229 | 3154 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 3155 | |
1afc5373 CF |
3156 | /* Some target machines need to postscan each insn after |
3157 | it is output. */ | |
3158 | if (targetm.asm_out.final_postscan_insn) | |
3159 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
3160 | recog_data.n_operands); | |
3161 | ||
3bc6b3e6 RH |
3162 | if (!targetm.asm_out.unwind_emit_before_insn |
3163 | && targetm.asm_out.unwind_emit) | |
3164 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
3165 | ||
f2834b5d PMR |
3166 | /* Let the debug info back-end know about this call. We do this only |
3167 | after the instruction has been emitted because labels that may be | |
3168 | created to reference the call instruction must appear after it. */ | |
bd2b9f1e AO |
3169 | if ((debug_variable_location_views || call_insn != NULL) |
3170 | && !DECL_IGNORED_P (current_function_decl)) | |
f2834b5d PMR |
3171 | debug_hooks->var_location (insn); |
3172 | ||
b1a9f6a0 | 3173 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
3174 | } |
3175 | } | |
3176 | return NEXT_INSN (insn); | |
3177 | } | |
3178 | \f | |
ed5ef2e4 CC |
3179 | /* Return whether a source line note needs to be emitted before INSN. |
3180 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
3181 | breakpoint location. */ | |
3cf2715d | 3182 | |
0435312e | 3183 | static bool |
fa7af581 | 3184 | notice_source_line (rtx_insn *insn, bool *is_stmt) |
3cf2715d | 3185 | { |
d752cfdb | 3186 | const char *filename; |
497b7c47 | 3187 | int linenum, columnnum; |
d752cfdb | 3188 | |
96a95ac1 AO |
3189 | if (NOTE_MARKER_P (insn)) |
3190 | { | |
3191 | location_t loc = NOTE_MARKER_LOCATION (insn); | |
3192 | expanded_location xloc = expand_location (loc); | |
3193 | if (xloc.line == 0) | |
3194 | { | |
3195 | gcc_checking_assert (LOCATION_LOCUS (loc) == UNKNOWN_LOCATION | |
3196 | || LOCATION_LOCUS (loc) == BUILTINS_LOCATION); | |
3197 | return false; | |
3198 | } | |
3199 | filename = xloc.file; | |
3200 | linenum = xloc.line; | |
3201 | columnnum = xloc.column; | |
3202 | force_source_line = true; | |
3203 | } | |
3204 | else if (override_filename) | |
d752cfdb JJ |
3205 | { |
3206 | filename = override_filename; | |
3207 | linenum = override_linenum; | |
497b7c47 | 3208 | columnnum = override_columnnum; |
d752cfdb | 3209 | } |
ffa4602f EB |
3210 | else if (INSN_HAS_LOCATION (insn)) |
3211 | { | |
3212 | expanded_location xloc = insn_location (insn); | |
3213 | filename = xloc.file; | |
3214 | linenum = xloc.line; | |
497b7c47 | 3215 | columnnum = xloc.column; |
ffa4602f | 3216 | } |
d752cfdb JJ |
3217 | else |
3218 | { | |
ffa4602f EB |
3219 | filename = NULL; |
3220 | linenum = 0; | |
497b7c47 | 3221 | columnnum = 0; |
d752cfdb | 3222 | } |
3cf2715d | 3223 | |
ed5ef2e4 CC |
3224 | if (filename == NULL) |
3225 | return false; | |
3226 | ||
3227 | if (force_source_line | |
3228 | || filename != last_filename | |
497b7c47 JJ |
3229 | || last_linenum != linenum |
3230 | || (debug_column_info && last_columnnum != columnnum)) | |
0435312e | 3231 | { |
b8176fe4 | 3232 | force_source_line = false; |
0435312e JH |
3233 | last_filename = filename; |
3234 | last_linenum = linenum; | |
497b7c47 | 3235 | last_columnnum = columnnum; |
6c52e687 | 3236 | last_discriminator = discriminator; |
96a95ac1 AO |
3237 | if (is_stmt) |
3238 | *is_stmt = true; | |
0435312e JH |
3239 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3240 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3241 | return true; | |
3242 | } | |
ed5ef2e4 CC |
3243 | |
3244 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
3245 | { | |
3246 | /* If the discriminator changed, but the line number did not, | |
3247 | output the line table entry with is_stmt false so the | |
3248 | debugger does not treat this as a breakpoint location. */ | |
3249 | last_discriminator = discriminator; | |
96a95ac1 AO |
3250 | if (is_stmt) |
3251 | *is_stmt = false; | |
ed5ef2e4 CC |
3252 | return true; |
3253 | } | |
3254 | ||
0435312e | 3255 | return false; |
3cf2715d DE |
3256 | } |
3257 | \f | |
0304f787 JL |
3258 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3259 | directly to the desired hard register. */ | |
f5d927c0 | 3260 | |
0304f787 | 3261 | void |
647d790d | 3262 | cleanup_subreg_operands (rtx_insn *insn) |
0304f787 | 3263 | { |
f62a15e3 | 3264 | int i; |
6fb5fa3c | 3265 | bool changed = false; |
6c698a6d | 3266 | extract_insn_cached (insn); |
1ccbefce | 3267 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3268 | { |
2067c116 | 3269 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
3270 | for a SUBREG: the underlying object might have been changed |
3271 | already if we are inside a match_operator expression that | |
3272 | matches the else clause. Instead we test the underlying | |
3273 | expression directly. */ | |
3274 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c | 3275 | { |
55a2c322 | 3276 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
6fb5fa3c DB |
3277 | changed = true; |
3278 | } | |
1ccbefce | 3279 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 3280 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 3281 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 3282 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
3283 | } |
3284 | ||
1ccbefce | 3285 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3286 | { |
1ccbefce | 3287 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c | 3288 | { |
55a2c322 | 3289 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
6fb5fa3c DB |
3290 | changed = true; |
3291 | } | |
1ccbefce | 3292 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 3293 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 3294 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 3295 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 3296 | } |
6fb5fa3c | 3297 | if (changed) |
647d790d | 3298 | df_insn_rescan (insn); |
0304f787 JL |
3299 | } |
3300 | ||
55a2c322 VM |
3301 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3302 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
3cf2715d DE |
3303 | |
3304 | rtx | |
55a2c322 | 3305 | alter_subreg (rtx *xp, bool final_p) |
3cf2715d | 3306 | { |
49d801d3 | 3307 | rtx x = *xp; |
b3694847 | 3308 | rtx y = SUBREG_REG (x); |
f5963e61 | 3309 | |
49d801d3 JH |
3310 | /* simplify_subreg does not remove subreg from volatile references. |
3311 | We are required to. */ | |
3c0cb5de | 3312 | if (MEM_P (y)) |
fd326ba8 | 3313 | { |
91914e56 | 3314 | poly_int64 offset = SUBREG_BYTE (x); |
fd326ba8 UW |
3315 | |
3316 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3317 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
03a95621 | 3318 | if (paradoxical_subreg_p (x)) |
90f2b7e2 | 3319 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); |
fd326ba8 | 3320 | |
55a2c322 VM |
3321 | if (final_p) |
3322 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3323 | else | |
3324 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
fd326ba8 | 3325 | } |
a50fa76a | 3326 | else if (REG_P (y) && HARD_REGISTER_P (y)) |
fea54805 | 3327 | { |
48c54229 | 3328 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
55a2c322 | 3329 | SUBREG_BYTE (x)); |
fea54805 | 3330 | |
48c54229 KG |
3331 | if (new_rtx != 0) |
3332 | *xp = new_rtx; | |
55a2c322 | 3333 | else if (final_p && REG_P (y)) |
fea54805 | 3334 | { |
0bccc606 | 3335 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 | 3336 | unsigned int regno; |
91914e56 | 3337 | poly_int64 offset; |
38ae7651 RS |
3338 | |
3339 | regno = subreg_regno (x); | |
3340 | if (subreg_lowpart_p (x)) | |
3341 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3342 | else | |
3343 | offset = SUBREG_BYTE (x); | |
3344 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 3345 | } |
fea54805 RK |
3346 | } |
3347 | ||
49d801d3 | 3348 | return *xp; |
3cf2715d DE |
3349 | } |
3350 | ||
3351 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3352 | ||
3353 | static rtx | |
6fb5fa3c | 3354 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 3355 | { |
49d801d3 | 3356 | rtx x = *xp; |
3cf2715d DE |
3357 | switch (GET_CODE (x)) |
3358 | { | |
3359 | case PLUS: | |
3360 | case MULT: | |
beed8fc0 | 3361 | case AND: |
6fb5fa3c DB |
3362 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3363 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
3364 | break; |
3365 | ||
3366 | case MEM: | |
beed8fc0 | 3367 | case ZERO_EXTEND: |
6fb5fa3c | 3368 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
3369 | break; |
3370 | ||
3371 | case SUBREG: | |
6fb5fa3c | 3372 | *changed = true; |
55a2c322 | 3373 | return alter_subreg (xp, true); |
f5d927c0 | 3374 | |
e9a25f70 JL |
3375 | default: |
3376 | break; | |
3cf2715d DE |
3377 | } |
3378 | ||
5bc72aeb | 3379 | return *xp; |
3cf2715d DE |
3380 | } |
3381 | \f | |
f1e52ed6 | 3382 | #if HAVE_cc0 |
3cf2715d DE |
3383 | |
3384 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3385 | as required by the bits that are set in cc_status.flags. | |
3386 | Not all of the bits there can be handled at this level in all cases. | |
3387 | ||
3388 | The value is normally 0. | |
3389 | 1 means that the condition has become always true. | |
3390 | -1 means that the condition has become always false. | |
3391 | 2 means that COND has been altered. */ | |
3392 | ||
3393 | static int | |
6cf9ac28 | 3394 | alter_cond (rtx cond) |
3cf2715d DE |
3395 | { |
3396 | int value = 0; | |
3397 | ||
3398 | if (cc_status.flags & CC_REVERSED) | |
3399 | { | |
3400 | value = 2; | |
3401 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3402 | } | |
3403 | ||
3404 | if (cc_status.flags & CC_INVERTED) | |
3405 | { | |
3406 | value = 2; | |
3407 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3408 | } | |
3409 | ||
3410 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3411 | switch (GET_CODE (cond)) | |
3412 | { | |
3413 | case LE: | |
3414 | case LEU: | |
3415 | case GEU: | |
3416 | /* Jump becomes unconditional. */ | |
3417 | return 1; | |
3418 | ||
3419 | case GT: | |
3420 | case GTU: | |
3421 | case LTU: | |
3422 | /* Jump becomes no-op. */ | |
3423 | return -1; | |
3424 | ||
3425 | case GE: | |
3426 | PUT_CODE (cond, EQ); | |
3427 | value = 2; | |
3428 | break; | |
3429 | ||
3430 | case LT: | |
3431 | PUT_CODE (cond, NE); | |
3432 | value = 2; | |
3433 | break; | |
f5d927c0 | 3434 | |
e9a25f70 JL |
3435 | default: |
3436 | break; | |
3cf2715d DE |
3437 | } |
3438 | ||
3439 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3440 | switch (GET_CODE (cond)) | |
3441 | { | |
3442 | case GE: | |
3443 | case GEU: | |
3444 | /* Jump becomes unconditional. */ | |
3445 | return 1; | |
3446 | ||
3447 | case LT: | |
3448 | case LTU: | |
3449 | /* Jump becomes no-op. */ | |
3450 | return -1; | |
3451 | ||
3452 | case LE: | |
3453 | case LEU: | |
3454 | PUT_CODE (cond, EQ); | |
3455 | value = 2; | |
3456 | break; | |
3457 | ||
3458 | case GT: | |
3459 | case GTU: | |
3460 | PUT_CODE (cond, NE); | |
3461 | value = 2; | |
3462 | break; | |
f5d927c0 | 3463 | |
e9a25f70 JL |
3464 | default: |
3465 | break; | |
3cf2715d DE |
3466 | } |
3467 | ||
3468 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3469 | switch (GET_CODE (cond)) | |
3470 | { | |
3471 | case GEU: | |
3472 | /* Jump becomes unconditional. */ | |
3473 | return 1; | |
3474 | ||
3475 | case LEU: | |
3476 | PUT_CODE (cond, EQ); | |
3477 | value = 2; | |
3478 | break; | |
3479 | ||
3480 | case GTU: | |
3481 | PUT_CODE (cond, NE); | |
3482 | value = 2; | |
3483 | break; | |
3484 | ||
3485 | case LTU: | |
3486 | /* Jump becomes no-op. */ | |
3487 | return -1; | |
f5d927c0 | 3488 | |
e9a25f70 JL |
3489 | default: |
3490 | break; | |
3cf2715d DE |
3491 | } |
3492 | ||
3493 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3494 | switch (GET_CODE (cond)) | |
3495 | { | |
e9a25f70 | 3496 | default: |
0bccc606 | 3497 | gcc_unreachable (); |
3cf2715d DE |
3498 | |
3499 | case NE: | |
3500 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3501 | value = 2; | |
3502 | break; | |
3503 | ||
3504 | case EQ: | |
3505 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3506 | value = 2; | |
3507 | break; | |
3508 | } | |
3509 | ||
3510 | if (cc_status.flags & CC_NOT_SIGNED) | |
3511 | /* The flags are valid if signed condition operators are converted | |
3512 | to unsigned. */ | |
3513 | switch (GET_CODE (cond)) | |
3514 | { | |
3515 | case LE: | |
3516 | PUT_CODE (cond, LEU); | |
3517 | value = 2; | |
3518 | break; | |
3519 | ||
3520 | case LT: | |
3521 | PUT_CODE (cond, LTU); | |
3522 | value = 2; | |
3523 | break; | |
3524 | ||
3525 | case GT: | |
3526 | PUT_CODE (cond, GTU); | |
3527 | value = 2; | |
3528 | break; | |
3529 | ||
3530 | case GE: | |
3531 | PUT_CODE (cond, GEU); | |
3532 | value = 2; | |
3533 | break; | |
e9a25f70 JL |
3534 | |
3535 | default: | |
3536 | break; | |
3cf2715d DE |
3537 | } |
3538 | ||
3539 | return value; | |
3540 | } | |
3541 | #endif | |
3542 | \f | |
3543 | /* Report inconsistency between the assembler template and the operands. | |
3544 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3545 | ||
3546 | void | |
4b794eaf | 3547 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3548 | { |
a52453cc PT |
3549 | char *fmt_string; |
3550 | char *new_message; | |
fd478a0a | 3551 | const char *pfx_str; |
e34d07f2 | 3552 | va_list ap; |
6cf9ac28 | 3553 | |
4b794eaf | 3554 | va_start (ap, cmsgid); |
a52453cc | 3555 | |
9e637a26 | 3556 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
582f770b UB |
3557 | fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid)); |
3558 | new_message = xvasprintf (fmt_string, ap); | |
dd3f0101 | 3559 | |
3cf2715d | 3560 | if (this_is_asm_operands) |
a52453cc | 3561 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3562 | else |
a52453cc PT |
3563 | internal_error ("%s", new_message); |
3564 | ||
3565 | free (fmt_string); | |
3566 | free (new_message); | |
e34d07f2 | 3567 | va_end (ap); |
3cf2715d DE |
3568 | } |
3569 | \f | |
3570 | /* Output of assembler code from a template, and its subroutines. */ | |
3571 | ||
0d4903b8 RK |
3572 | /* Annotate the assembly with a comment describing the pattern and |
3573 | alternative used. */ | |
3574 | ||
3575 | static void | |
6cf9ac28 | 3576 | output_asm_name (void) |
0d4903b8 RK |
3577 | { |
3578 | if (debug_insn) | |
3579 | { | |
dff125eb SB |
3580 | fprintf (asm_out_file, "\t%s %d\t", |
3581 | ASM_COMMENT_START, INSN_UID (debug_insn)); | |
d327457f | 3582 | |
dff125eb SB |
3583 | fprintf (asm_out_file, "[c=%d", |
3584 | insn_cost (debug_insn, optimize_insn_for_speed_p ())); | |
d327457f | 3585 | if (HAVE_ATTR_length) |
dff125eb | 3586 | fprintf (asm_out_file, " l=%d", |
d327457f | 3587 | get_attr_length (debug_insn)); |
dff125eb SB |
3588 | fprintf (asm_out_file, "] "); |
3589 | ||
3590 | int num = INSN_CODE (debug_insn); | |
3591 | fprintf (asm_out_file, "%s", insn_data[num].name); | |
3592 | if (insn_data[num].n_alternatives > 1) | |
3593 | fprintf (asm_out_file, "/%d", which_alternative); | |
d327457f | 3594 | |
0d4903b8 RK |
3595 | /* Clear this so only the first assembler insn |
3596 | of any rtl insn will get the special comment for -dp. */ | |
3597 | debug_insn = 0; | |
3598 | } | |
3599 | } | |
3600 | ||
998d7deb RH |
3601 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3602 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3603 | corresponds to the address of the object and 0 if to the object. */ |
3604 | ||
3605 | static tree | |
6cf9ac28 | 3606 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3607 | { |
998d7deb | 3608 | tree expr; |
c5adc06a RK |
3609 | int inner_addressp; |
3610 | ||
3611 | *paddressp = 0; | |
3612 | ||
f8cfc6aa | 3613 | if (REG_P (op)) |
a560d4d4 | 3614 | return REG_EXPR (op); |
3c0cb5de | 3615 | else if (!MEM_P (op)) |
c5adc06a RK |
3616 | return 0; |
3617 | ||
998d7deb RH |
3618 | if (MEM_EXPR (op) != 0) |
3619 | return MEM_EXPR (op); | |
c5adc06a RK |
3620 | |
3621 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3622 | *paddressp = 1; | |
3623 | op = XEXP (op, 0); | |
3624 | ||
3625 | /* First check if we have a decl for the address, then look at the right side | |
3626 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3627 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3628 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3629 | return expr; | |
c5adc06a | 3630 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3631 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3632 | return expr; | |
c5adc06a | 3633 | |
481683e1 | 3634 | while (UNARY_P (op) |
ec8e098d | 3635 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3636 | op = XEXP (op, 0); |
3637 | ||
998d7deb RH |
3638 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3639 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3640 | } |
ff81832f | 3641 | |
4f9b4029 RK |
3642 | /* Output operand names for assembler instructions. OPERANDS is the |
3643 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3644 | is the number of operands to write. */ | |
3645 | ||
3646 | static void | |
6cf9ac28 | 3647 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3648 | { |
3649 | int wrote = 0; | |
3650 | int i; | |
3651 | ||
3652 | for (i = 0; i < nops; i++) | |
3653 | { | |
3654 | int addressp; | |
a560d4d4 JH |
3655 | rtx op = operands[oporder[i]]; |
3656 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3657 | |
a560d4d4 JH |
3658 | fprintf (asm_out_file, "%c%s", |
3659 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3660 | wrote = 1; | |
998d7deb | 3661 | if (expr) |
4f9b4029 | 3662 | { |
a560d4d4 | 3663 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3664 | addressp ? "*" : ""); |
3665 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3666 | wrote = 1; |
3667 | } | |
a560d4d4 JH |
3668 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3669 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3670 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3671 | } |
3672 | } | |
3673 | ||
d1658619 SP |
3674 | #ifdef ASSEMBLER_DIALECT |
3675 | /* Helper function to parse assembler dialects in the asm string. | |
3676 | This is called from output_asm_insn and asm_fprintf. */ | |
3677 | static const char * | |
3678 | do_assembler_dialects (const char *p, int *dialect) | |
3679 | { | |
3680 | char c = *(p - 1); | |
3681 | ||
3682 | switch (c) | |
3683 | { | |
3684 | case '{': | |
3685 | { | |
3686 | int i; | |
3687 | ||
3688 | if (*dialect) | |
3689 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3690 | else | |
3691 | *dialect = 1; | |
3692 | ||
3693 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3694 | DIALECT_NUMBER of strings ending with '|'. */ | |
3695 | for (i = 0; i < dialect_number; i++) | |
3696 | { | |
382522cb MK |
3697 | while (*p && *p != '}') |
3698 | { | |
3699 | if (*p == '|') | |
3700 | { | |
3701 | p++; | |
3702 | break; | |
3703 | } | |
3704 | ||
3705 | /* Skip over any character after a percent sign. */ | |
3706 | if (*p == '%') | |
3707 | p++; | |
3708 | if (*p) | |
3709 | p++; | |
3710 | } | |
3711 | ||
d1658619 SP |
3712 | if (*p == '}') |
3713 | break; | |
3714 | } | |
3715 | ||
3716 | if (*p == '\0') | |
3717 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3718 | } | |
3719 | break; | |
3720 | ||
3721 | case '|': | |
3722 | if (*dialect) | |
3723 | { | |
3724 | /* Skip to close brace. */ | |
3725 | do | |
3726 | { | |
3727 | if (*p == '\0') | |
3728 | { | |
3729 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3730 | break; | |
3731 | } | |
382522cb MK |
3732 | |
3733 | /* Skip over any character after a percent sign. */ | |
3734 | if (*p == '%' && p[1]) | |
3735 | { | |
3736 | p += 2; | |
3737 | continue; | |
3738 | } | |
3739 | ||
3740 | if (*p++ == '}') | |
3741 | break; | |
d1658619 | 3742 | } |
382522cb MK |
3743 | while (1); |
3744 | ||
d1658619 SP |
3745 | *dialect = 0; |
3746 | } | |
3747 | else | |
3748 | putc (c, asm_out_file); | |
3749 | break; | |
3750 | ||
3751 | case '}': | |
3752 | if (! *dialect) | |
3753 | putc (c, asm_out_file); | |
3754 | *dialect = 0; | |
3755 | break; | |
3756 | default: | |
3757 | gcc_unreachable (); | |
3758 | } | |
3759 | ||
3760 | return p; | |
3761 | } | |
3762 | #endif | |
3763 | ||
3cf2715d DE |
3764 | /* Output text from TEMPLATE to the assembler output file, |
3765 | obeying %-directions to substitute operands taken from | |
3766 | the vector OPERANDS. | |
3767 | ||
3768 | %N (for N a digit) means print operand N in usual manner. | |
3769 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3770 | and print the label name with no punctuation. | |
3771 | %cN means require operand N to be a constant | |
3772 | and print the constant expression with no punctuation. | |
3773 | %aN means expect operand N to be a memory address | |
3774 | (not a memory reference!) and print a reference | |
3775 | to that address. | |
3776 | %nN means expect operand N to be a constant | |
3777 | and print a constant expression for minus the value | |
3778 | of the operand, with no other punctuation. */ | |
3779 | ||
3780 | void | |
48c54229 | 3781 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3782 | { |
b3694847 SS |
3783 | const char *p; |
3784 | int c; | |
8554d9a4 JJ |
3785 | #ifdef ASSEMBLER_DIALECT |
3786 | int dialect = 0; | |
3787 | #endif | |
0d4903b8 | 3788 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3789 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3790 | int ops = 0; |
3cf2715d DE |
3791 | |
3792 | /* An insn may return a null string template | |
3793 | in a case where no assembler code is needed. */ | |
48c54229 | 3794 | if (*templ == 0) |
3cf2715d DE |
3795 | return; |
3796 | ||
4f9b4029 | 3797 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3798 | p = templ; |
3cf2715d DE |
3799 | putc ('\t', asm_out_file); |
3800 | ||
3801 | #ifdef ASM_OUTPUT_OPCODE | |
3802 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3803 | #endif | |
3804 | ||
b729186a | 3805 | while ((c = *p++)) |
3cf2715d DE |
3806 | switch (c) |
3807 | { | |
3cf2715d | 3808 | case '\n': |
4f9b4029 RK |
3809 | if (flag_verbose_asm) |
3810 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3811 | if (flag_print_asm_name) |
3812 | output_asm_name (); | |
3813 | ||
4f9b4029 RK |
3814 | ops = 0; |
3815 | memset (opoutput, 0, sizeof opoutput); | |
3816 | ||
3cf2715d | 3817 | putc (c, asm_out_file); |
cb649530 | 3818 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3819 | while ((c = *p) == '\t') |
3820 | { | |
3821 | putc (c, asm_out_file); | |
3822 | p++; | |
3823 | } | |
3824 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3825 | #endif |
cb649530 | 3826 | break; |
3cf2715d DE |
3827 | |
3828 | #ifdef ASSEMBLER_DIALECT | |
3829 | case '{': | |
3cf2715d | 3830 | case '}': |
d1658619 SP |
3831 | case '|': |
3832 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
3833 | break; |
3834 | #endif | |
3835 | ||
3836 | case '%': | |
382522cb MK |
3837 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3838 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3839 | meaning as dialect delimiters.*/ | |
3840 | if (*p == '%' | |
3841 | #ifdef ASSEMBLER_DIALECT | |
3842 | || *p == '{' || *p == '}' || *p == '|' | |
3843 | #endif | |
3844 | ) | |
3cf2715d | 3845 | { |
382522cb | 3846 | putc (*p, asm_out_file); |
3cf2715d | 3847 | p++; |
3cf2715d DE |
3848 | } |
3849 | /* %= outputs a number which is unique to each insn in the entire | |
3850 | compilation. This is useful for making local labels that are | |
3851 | referred to more than once in a given insn. */ | |
3852 | else if (*p == '=') | |
3853 | { | |
3854 | p++; | |
3855 | fprintf (asm_out_file, "%d", insn_counter); | |
3856 | } | |
3857 | /* % followed by a letter and some digits | |
3858 | outputs an operand in a special way depending on the letter. | |
3859 | Letters `acln' are implemented directly. | |
3860 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3861 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3862 | else if (ISALPHA (*p)) |
3cf2715d DE |
3863 | { |
3864 | int letter = *p++; | |
c383c15f GK |
3865 | unsigned long opnum; |
3866 | char *endptr; | |
b0efb46b | 3867 | |
c383c15f GK |
3868 | opnum = strtoul (p, &endptr, 10); |
3869 | ||
3870 | if (endptr == p) | |
3871 | output_operand_lossage ("operand number missing " | |
3872 | "after %%-letter"); | |
3873 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3874 | output_operand_lossage ("operand number out of range"); |
3875 | else if (letter == 'l') | |
c383c15f | 3876 | output_asm_label (operands[opnum]); |
3cf2715d | 3877 | else if (letter == 'a') |
cc8ca59e | 3878 | output_address (VOIDmode, operands[opnum]); |
3cf2715d DE |
3879 | else if (letter == 'c') |
3880 | { | |
c383c15f GK |
3881 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3882 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3883 | else |
c383c15f | 3884 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3885 | } |
3886 | else if (letter == 'n') | |
3887 | { | |
481683e1 | 3888 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3889 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3890 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3891 | else |
3892 | { | |
3893 | putc ('-', asm_out_file); | |
c383c15f | 3894 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3895 | } |
3896 | } | |
3897 | else | |
c383c15f | 3898 | output_operand (operands[opnum], letter); |
f5d927c0 | 3899 | |
c383c15f | 3900 | if (!opoutput[opnum]) |
dc9d0b14 | 3901 | oporder[ops++] = opnum; |
c383c15f | 3902 | opoutput[opnum] = 1; |
0d4903b8 | 3903 | |
c383c15f GK |
3904 | p = endptr; |
3905 | c = *p; | |
3cf2715d DE |
3906 | } |
3907 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3908 | else if (ISDIGIT (*p)) |
3cf2715d | 3909 | { |
c383c15f GK |
3910 | unsigned long opnum; |
3911 | char *endptr; | |
b0efb46b | 3912 | |
c383c15f GK |
3913 | opnum = strtoul (p, &endptr, 10); |
3914 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3915 | output_operand_lossage ("operand number out of range"); |
3916 | else | |
c383c15f | 3917 | output_operand (operands[opnum], 0); |
0d4903b8 | 3918 | |
c383c15f | 3919 | if (!opoutput[opnum]) |
dc9d0b14 | 3920 | oporder[ops++] = opnum; |
c383c15f | 3921 | opoutput[opnum] = 1; |
4f9b4029 | 3922 | |
c383c15f GK |
3923 | p = endptr; |
3924 | c = *p; | |
3cf2715d DE |
3925 | } |
3926 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3927 | punctuation character alone, with no operand. The |
3928 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3929 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3930 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3931 | else |
3932 | output_operand_lossage ("invalid %%-code"); | |
3933 | break; | |
3934 | ||
3935 | default: | |
3936 | putc (c, asm_out_file); | |
3937 | } | |
3938 | ||
dff125eb SB |
3939 | /* Try to keep the asm a bit more readable. */ |
3940 | if ((flag_verbose_asm || flag_print_asm_name) && strlen (templ) < 9) | |
3941 | putc ('\t', asm_out_file); | |
3942 | ||
0d4903b8 RK |
3943 | /* Write out the variable names for operands, if we know them. */ |
3944 | if (flag_verbose_asm) | |
4f9b4029 | 3945 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3946 | if (flag_print_asm_name) |
3947 | output_asm_name (); | |
3cf2715d DE |
3948 | |
3949 | putc ('\n', asm_out_file); | |
3950 | } | |
3951 | \f | |
3952 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3953 | ||
3954 | void | |
6cf9ac28 | 3955 | output_asm_label (rtx x) |
3cf2715d DE |
3956 | { |
3957 | char buf[256]; | |
3958 | ||
3959 | if (GET_CODE (x) == LABEL_REF) | |
04a121a7 | 3960 | x = label_ref_label (x); |
4b4bf941 JQ |
3961 | if (LABEL_P (x) |
3962 | || (NOTE_P (x) | |
a38e7aa5 | 3963 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3964 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3965 | else | |
9e637a26 | 3966 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3967 | |
3968 | assemble_name (asm_out_file, buf); | |
3969 | } | |
3970 | ||
a7fe25b8 JJ |
3971 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3972 | ||
3973 | void | |
3974 | mark_symbol_refs_as_used (rtx x) | |
3975 | { | |
effb8a26 RS |
3976 | subrtx_iterator::array_type array; |
3977 | FOR_EACH_SUBRTX (iter, array, x, ALL) | |
3978 | { | |
3979 | const_rtx x = *iter; | |
3980 | if (GET_CODE (x) == SYMBOL_REF) | |
3981 | if (tree t = SYMBOL_REF_DECL (x)) | |
3982 | assemble_external (t); | |
3983 | } | |
a7fe25b8 JJ |
3984 | } |
3985 | ||
3cf2715d | 3986 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3987 | CODE is a non-digit that preceded the operand-number in the % spec, |
3988 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3989 | between the % and the digits. | |
3990 | When CODE is a non-letter, X is 0. | |
3991 | ||
3992 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3993 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3994 | |
6b3c42ae | 3995 | void |
6cf9ac28 | 3996 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3997 | { |
3998 | if (x && GET_CODE (x) == SUBREG) | |
55a2c322 | 3999 | x = alter_subreg (&x, true); |
3cf2715d | 4000 | |
04c7ae48 | 4001 | /* X must not be a pseudo reg. */ |
a50fa76a BS |
4002 | if (!targetm.no_register_allocation) |
4003 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); | |
3cf2715d | 4004 | |
6e2188e0 | 4005 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
4006 | |
4007 | if (x == NULL_RTX) | |
4008 | return; | |
4009 | ||
effb8a26 | 4010 | mark_symbol_refs_as_used (x); |
3cf2715d DE |
4011 | } |
4012 | ||
6e2188e0 NF |
4013 | /* Print a memory reference operand for address X using |
4014 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
4015 | |
4016 | void | |
cc8ca59e | 4017 | output_address (machine_mode mode, rtx x) |
3cf2715d | 4018 | { |
6fb5fa3c DB |
4019 | bool changed = false; |
4020 | walk_alter_subreg (&x, &changed); | |
cc8ca59e | 4021 | targetm.asm_out.print_operand_address (asm_out_file, mode, x); |
3cf2715d DE |
4022 | } |
4023 | \f | |
4024 | /* Print an integer constant expression in assembler syntax. | |
4025 | Addition and subtraction are the only arithmetic | |
4026 | that may appear in these expressions. */ | |
4027 | ||
4028 | void | |
6cf9ac28 | 4029 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
4030 | { |
4031 | char buf[256]; | |
4032 | ||
4033 | restart: | |
4034 | switch (GET_CODE (x)) | |
4035 | { | |
4036 | case PC: | |
eac50d7a | 4037 | putc ('.', file); |
3cf2715d DE |
4038 | break; |
4039 | ||
4040 | case SYMBOL_REF: | |
21dad7e6 | 4041 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 4042 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
4043 | #ifdef ASM_OUTPUT_SYMBOL_REF |
4044 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
4045 | #else | |
3cf2715d | 4046 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 4047 | #endif |
3cf2715d DE |
4048 | break; |
4049 | ||
4050 | case LABEL_REF: | |
04a121a7 | 4051 | x = label_ref_label (x); |
422be3c3 | 4052 | /* Fall through. */ |
3cf2715d DE |
4053 | case CODE_LABEL: |
4054 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
4055 | #ifdef ASM_OUTPUT_LABEL_REF |
4056 | ASM_OUTPUT_LABEL_REF (file, buf); | |
4057 | #else | |
3cf2715d | 4058 | assemble_name (file, buf); |
2f0b7af6 | 4059 | #endif |
3cf2715d DE |
4060 | break; |
4061 | ||
4062 | case CONST_INT: | |
6725cc58 | 4063 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
4064 | break; |
4065 | ||
4066 | case CONST: | |
4067 | /* This used to output parentheses around the expression, | |
4068 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
4069 | output_addr_const (file, XEXP (x, 0)); | |
4070 | break; | |
4071 | ||
807e902e KZ |
4072 | case CONST_WIDE_INT: |
4073 | /* We do not know the mode here so we have to use a round about | |
4074 | way to build a wide-int to get it printed properly. */ | |
4075 | { | |
4076 | wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), | |
4077 | CONST_WIDE_INT_NUNITS (x), | |
4078 | CONST_WIDE_INT_NUNITS (x) | |
4079 | * HOST_BITS_PER_WIDE_INT, | |
4080 | false); | |
4081 | print_decs (w, file); | |
4082 | } | |
4083 | break; | |
4084 | ||
3cf2715d | 4085 | case CONST_DOUBLE: |
807e902e | 4086 | if (CONST_DOUBLE_AS_INT_P (x)) |
3cf2715d DE |
4087 | { |
4088 | /* We can use %d if the number is one word and positive. */ | |
4089 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 4090 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
4091 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
4092 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 4093 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
4094 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
4095 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 4096 | else |
21e3a81b | 4097 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
4098 | } |
4099 | else | |
4100 | /* We can't handle floating point constants; | |
4101 | PRINT_OPERAND must handle them. */ | |
4102 | output_operand_lossage ("floating constant misused"); | |
4103 | break; | |
4104 | ||
14c931f1 | 4105 | case CONST_FIXED: |
848fac28 | 4106 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
4107 | break; |
4108 | ||
3cf2715d DE |
4109 | case PLUS: |
4110 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 4111 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
4112 | { |
4113 | output_addr_const (file, XEXP (x, 1)); | |
4114 | if (INTVAL (XEXP (x, 0)) >= 0) | |
4115 | fprintf (file, "+"); | |
4116 | output_addr_const (file, XEXP (x, 0)); | |
4117 | } | |
4118 | else | |
4119 | { | |
4120 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 4121 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 4122 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
4123 | fprintf (file, "+"); |
4124 | output_addr_const (file, XEXP (x, 1)); | |
4125 | } | |
4126 | break; | |
4127 | ||
4128 | case MINUS: | |
4129 | /* Avoid outputting things like x-x or x+5-x, | |
4130 | since some assemblers can't handle that. */ | |
4131 | x = simplify_subtraction (x); | |
4132 | if (GET_CODE (x) != MINUS) | |
4133 | goto restart; | |
4134 | ||
4135 | output_addr_const (file, XEXP (x, 0)); | |
4136 | fprintf (file, "-"); | |
481683e1 | 4137 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
4138 | || GET_CODE (XEXP (x, 1)) == PC |
4139 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
4140 | output_addr_const (file, XEXP (x, 1)); | |
4141 | else | |
3cf2715d | 4142 | { |
17b53c33 | 4143 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 4144 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 4145 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 4146 | } |
3cf2715d DE |
4147 | break; |
4148 | ||
4149 | case ZERO_EXTEND: | |
4150 | case SIGN_EXTEND: | |
fdf473ae | 4151 | case SUBREG: |
c01e4479 | 4152 | case TRUNCATE: |
3cf2715d DE |
4153 | output_addr_const (file, XEXP (x, 0)); |
4154 | break; | |
4155 | ||
4156 | default: | |
6cbd8875 AS |
4157 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
4158 | break; | |
422be3c3 | 4159 | |
3cf2715d DE |
4160 | output_operand_lossage ("invalid expression as operand"); |
4161 | } | |
4162 | } | |
4163 | \f | |
a803773f JM |
4164 | /* Output a quoted string. */ |
4165 | ||
4166 | void | |
4167 | output_quoted_string (FILE *asm_file, const char *string) | |
4168 | { | |
4169 | #ifdef OUTPUT_QUOTED_STRING | |
4170 | OUTPUT_QUOTED_STRING (asm_file, string); | |
4171 | #else | |
4172 | char c; | |
4173 | ||
4174 | putc ('\"', asm_file); | |
4175 | while ((c = *string++) != 0) | |
4176 | { | |
4177 | if (ISPRINT (c)) | |
4178 | { | |
4179 | if (c == '\"' || c == '\\') | |
4180 | putc ('\\', asm_file); | |
4181 | putc (c, asm_file); | |
4182 | } | |
4183 | else | |
4184 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
4185 | } | |
4186 | putc ('\"', asm_file); | |
4187 | #endif | |
4188 | } | |
4189 | \f | |
5e3929ed DA |
4190 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
4191 | ||
4192 | void | |
4193 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
4194 | { | |
4195 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
4196 | if (value == 0) | |
4197 | putc ('0', f); | |
4198 | else | |
4199 | { | |
4200 | char *p = buf + sizeof (buf); | |
4201 | do | |
4202 | *--p = "0123456789abcdef"[value % 16]; | |
4203 | while ((value /= 16) != 0); | |
4204 | *--p = 'x'; | |
4205 | *--p = '0'; | |
4206 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
4207 | } | |
4208 | } | |
4209 | ||
4210 | /* Internal function that prints an unsigned long in decimal in reverse. | |
4211 | The output string IS NOT null-terminated. */ | |
4212 | ||
4213 | static int | |
4214 | sprint_ul_rev (char *s, unsigned long value) | |
4215 | { | |
4216 | int i = 0; | |
4217 | do | |
4218 | { | |
4219 | s[i] = "0123456789"[value % 10]; | |
4220 | value /= 10; | |
4221 | i++; | |
4222 | /* alternate version, without modulo */ | |
4223 | /* oldval = value; */ | |
4224 | /* value /= 10; */ | |
4225 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
4226 | /* i++ */ | |
4227 | } | |
4228 | while (value != 0); | |
4229 | return i; | |
4230 | } | |
4231 | ||
5e3929ed DA |
4232 | /* Write an unsigned long as decimal to a file, fast. */ |
4233 | ||
4234 | void | |
4235 | fprint_ul (FILE *f, unsigned long value) | |
4236 | { | |
4237 | /* python says: len(str(2**64)) == 20 */ | |
4238 | char s[20]; | |
4239 | int i; | |
4240 | ||
4241 | i = sprint_ul_rev (s, value); | |
4242 | ||
4243 | /* It's probably too small to bother with string reversal and fputs. */ | |
4244 | do | |
4245 | { | |
4246 | i--; | |
4247 | putc (s[i], f); | |
4248 | } | |
4249 | while (i != 0); | |
4250 | } | |
4251 | ||
4252 | /* Write an unsigned long as decimal to a string, fast. | |
4253 | s must be wide enough to not overflow, at least 21 chars. | |
4254 | Returns the length of the string (without terminating '\0'). */ | |
4255 | ||
4256 | int | |
4257 | sprint_ul (char *s, unsigned long value) | |
4258 | { | |
fab27f52 | 4259 | int len = sprint_ul_rev (s, value); |
5e3929ed DA |
4260 | s[len] = '\0'; |
4261 | ||
fab27f52 | 4262 | std::reverse (s, s + len); |
5e3929ed DA |
4263 | return len; |
4264 | } | |
4265 | ||
3cf2715d DE |
4266 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4267 | %R prints the value of REGISTER_PREFIX. | |
4268 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4269 | %U prints the value of USER_LABEL_PREFIX. | |
4270 | %I prints the value of IMMEDIATE_PREFIX. | |
4271 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 4272 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
4273 | |
4274 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4275 | ||
4276 | void | |
e34d07f2 | 4277 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 4278 | { |
3cf2715d DE |
4279 | char buf[10]; |
4280 | char *q, c; | |
d1658619 SP |
4281 | #ifdef ASSEMBLER_DIALECT |
4282 | int dialect = 0; | |
4283 | #endif | |
e34d07f2 | 4284 | va_list argptr; |
6cf9ac28 | 4285 | |
e34d07f2 | 4286 | va_start (argptr, p); |
3cf2715d DE |
4287 | |
4288 | buf[0] = '%'; | |
4289 | ||
b729186a | 4290 | while ((c = *p++)) |
3cf2715d DE |
4291 | switch (c) |
4292 | { | |
4293 | #ifdef ASSEMBLER_DIALECT | |
4294 | case '{': | |
3cf2715d | 4295 | case '}': |
d1658619 SP |
4296 | case '|': |
4297 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
4298 | break; |
4299 | #endif | |
4300 | ||
4301 | case '%': | |
4302 | c = *p++; | |
4303 | q = &buf[1]; | |
b1721339 KG |
4304 | while (strchr ("-+ #0", c)) |
4305 | { | |
4306 | *q++ = c; | |
4307 | c = *p++; | |
4308 | } | |
0df6c2c7 | 4309 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
4310 | { |
4311 | *q++ = c; | |
4312 | c = *p++; | |
4313 | } | |
4314 | switch (c) | |
4315 | { | |
4316 | case '%': | |
b1721339 | 4317 | putc ('%', file); |
3cf2715d DE |
4318 | break; |
4319 | ||
4320 | case 'd': case 'i': case 'u': | |
b1721339 KG |
4321 | case 'x': case 'X': case 'o': |
4322 | case 'c': | |
3cf2715d DE |
4323 | *q++ = c; |
4324 | *q = 0; | |
4325 | fprintf (file, buf, va_arg (argptr, int)); | |
4326 | break; | |
4327 | ||
4328 | case 'w': | |
b1721339 KG |
4329 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4330 | 'o' cases, but we do not check for those cases. It | |
4331 | means that the value is a HOST_WIDE_INT, which may be | |
4332 | either `long' or `long long'. */ | |
85f015e1 KG |
4333 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4334 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
4335 | *q++ = *p++; |
4336 | *q = 0; | |
4337 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4338 | break; | |
4339 | ||
4340 | case 'l': | |
4341 | *q++ = c; | |
b1721339 KG |
4342 | #ifdef HAVE_LONG_LONG |
4343 | if (*p == 'l') | |
4344 | { | |
4345 | *q++ = *p++; | |
4346 | *q++ = *p++; | |
4347 | *q = 0; | |
4348 | fprintf (file, buf, va_arg (argptr, long long)); | |
4349 | } | |
4350 | else | |
4351 | #endif | |
4352 | { | |
4353 | *q++ = *p++; | |
4354 | *q = 0; | |
4355 | fprintf (file, buf, va_arg (argptr, long)); | |
4356 | } | |
6cf9ac28 | 4357 | |
3cf2715d DE |
4358 | break; |
4359 | ||
4360 | case 's': | |
4361 | *q++ = c; | |
4362 | *q = 0; | |
4363 | fprintf (file, buf, va_arg (argptr, char *)); | |
4364 | break; | |
4365 | ||
4366 | case 'O': | |
4367 | #ifdef ASM_OUTPUT_OPCODE | |
4368 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4369 | #endif | |
4370 | break; | |
4371 | ||
4372 | case 'R': | |
4373 | #ifdef REGISTER_PREFIX | |
4374 | fprintf (file, "%s", REGISTER_PREFIX); | |
4375 | #endif | |
4376 | break; | |
4377 | ||
4378 | case 'I': | |
4379 | #ifdef IMMEDIATE_PREFIX | |
4380 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4381 | #endif | |
4382 | break; | |
4383 | ||
4384 | case 'L': | |
4385 | #ifdef LOCAL_LABEL_PREFIX | |
4386 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4387 | #endif | |
4388 | break; | |
4389 | ||
4390 | case 'U': | |
19283265 | 4391 | fputs (user_label_prefix, file); |
3cf2715d DE |
4392 | break; |
4393 | ||
fe0503ea | 4394 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 4395 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
4396 | and so are not available to target specific code. In order to |
4397 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4398 | they are defined here. As they get turned into real extensions | |
4399 | to asm_fprintf they should be removed from this list. */ | |
4400 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4401 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4402 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4403 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4404 | break; | |
f5d927c0 | 4405 | |
fe0503ea NC |
4406 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4407 | #endif | |
3cf2715d | 4408 | default: |
0bccc606 | 4409 | gcc_unreachable (); |
3cf2715d DE |
4410 | } |
4411 | break; | |
4412 | ||
4413 | default: | |
b1721339 | 4414 | putc (c, file); |
3cf2715d | 4415 | } |
e34d07f2 | 4416 | va_end (argptr); |
3cf2715d DE |
4417 | } |
4418 | \f | |
3cf2715d DE |
4419 | /* Return nonzero if this function has no function calls. */ |
4420 | ||
4421 | int | |
6cf9ac28 | 4422 | leaf_function_p (void) |
3cf2715d | 4423 | { |
fa7af581 | 4424 | rtx_insn *insn; |
3cf2715d | 4425 | |
00d60013 WD |
4426 | /* Ensure we walk the entire function body. */ |
4427 | gcc_assert (!in_sequence_p ()); | |
4428 | ||
d56a43a0 AK |
4429 | /* Some back-ends (e.g. s390) want leaf functions to stay leaf |
4430 | functions even if they call mcount. */ | |
4431 | if (crtl->profile && !targetm.keep_leaf_when_profiled ()) | |
3cf2715d DE |
4432 | return 0; |
4433 | ||
4434 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4435 | { | |
4b4bf941 | 4436 | if (CALL_P (insn) |
7d167afd | 4437 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4438 | return 0; |
4b4bf941 | 4439 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4440 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4441 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4442 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4443 | return 0; |
4444 | } | |
3cf2715d DE |
4445 | |
4446 | return 1; | |
4447 | } | |
4448 | ||
09da1532 | 4449 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4450 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4451 | output templates to customary add branch prediction hints. | |
4452 | */ | |
4453 | int | |
fa7af581 | 4454 | final_forward_branch_p (rtx_insn *insn) |
ef6257cd JH |
4455 | { |
4456 | int insn_id, label_id; | |
b0efb46b | 4457 | |
0bccc606 | 4458 | gcc_assert (uid_shuid); |
ef6257cd JH |
4459 | insn_id = INSN_SHUID (insn); |
4460 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4461 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4462 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4463 | return insn_id < label_id; |
4464 | } | |
4465 | ||
3cf2715d DE |
4466 | /* On some machines, a function with no call insns |
4467 | can run faster if it doesn't create its own register window. | |
4468 | When output, the leaf function should use only the "output" | |
4469 | registers. Ordinarily, the function would be compiled to use | |
4470 | the "input" registers to find its arguments; it is a candidate | |
4471 | for leaf treatment if it uses only the "input" registers. | |
4472 | Leaf function treatment means renumbering so the function | |
4473 | uses the "output" registers instead. */ | |
4474 | ||
4475 | #ifdef LEAF_REGISTERS | |
4476 | ||
3cf2715d DE |
4477 | /* Return 1 if this function uses only the registers that can be |
4478 | safely renumbered. */ | |
4479 | ||
4480 | int | |
6cf9ac28 | 4481 | only_leaf_regs_used (void) |
3cf2715d DE |
4482 | { |
4483 | int i; | |
4977bab6 | 4484 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4485 | |
4486 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4487 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4488 | && ! permitted_reg_in_leaf_functions[i]) |
4489 | return 0; | |
4490 | ||
e3b5732b | 4491 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4492 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4493 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4494 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4495 | return 0; | |
4496 | ||
3cf2715d DE |
4497 | return 1; |
4498 | } | |
4499 | ||
4500 | /* Scan all instructions and renumber all registers into those | |
4501 | available in leaf functions. */ | |
4502 | ||
4503 | static void | |
fa7af581 | 4504 | leaf_renumber_regs (rtx_insn *first) |
3cf2715d | 4505 | { |
fa7af581 | 4506 | rtx_insn *insn; |
3cf2715d DE |
4507 | |
4508 | /* Renumber only the actual patterns. | |
4509 | The reg-notes can contain frame pointer refs, | |
4510 | and renumbering them could crash, and should not be needed. */ | |
4511 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4512 | if (INSN_P (insn)) |
3cf2715d | 4513 | leaf_renumber_regs_insn (PATTERN (insn)); |
3cf2715d DE |
4514 | } |
4515 | ||
4516 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4517 | available in leaf functions. */ | |
4518 | ||
4519 | void | |
6cf9ac28 | 4520 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4521 | { |
b3694847 SS |
4522 | int i, j; |
4523 | const char *format_ptr; | |
3cf2715d DE |
4524 | |
4525 | if (in_rtx == 0) | |
4526 | return; | |
4527 | ||
4528 | /* Renumber all input-registers into output-registers. | |
4529 | renumbered_regs would be 1 for an output-register; | |
4530 | they */ | |
4531 | ||
f8cfc6aa | 4532 | if (REG_P (in_rtx)) |
3cf2715d DE |
4533 | { |
4534 | int newreg; | |
4535 | ||
4536 | /* Don't renumber the same reg twice. */ | |
4537 | if (in_rtx->used) | |
4538 | return; | |
4539 | ||
4540 | newreg = REGNO (in_rtx); | |
4541 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4542 | to reach here as part of a REG_NOTE. */ | |
4543 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4544 | { | |
4545 | in_rtx->used = 1; | |
4546 | return; | |
4547 | } | |
4548 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4549 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4550 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4551 | df_set_regs_ever_live (newreg, true); | |
4552 | SET_REGNO (in_rtx, newreg); | |
3cf2715d | 4553 | in_rtx->used = 1; |
9fccb335 | 4554 | return; |
3cf2715d DE |
4555 | } |
4556 | ||
2c3c49de | 4557 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4558 | { |
4559 | /* Inside a SEQUENCE, we find insns. | |
4560 | Renumber just the patterns of these insns, | |
4561 | just as we do for the top-level insns. */ | |
4562 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4563 | return; | |
4564 | } | |
4565 | ||
4566 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4567 | ||
4568 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4569 | switch (*format_ptr++) | |
4570 | { | |
4571 | case 'e': | |
4572 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4573 | break; | |
4574 | ||
4575 | case 'E': | |
01512446 JJ |
4576 | if (XVEC (in_rtx, i) != NULL) |
4577 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4578 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
3cf2715d DE |
4579 | break; |
4580 | ||
4581 | case 'S': | |
4582 | case 's': | |
4583 | case '0': | |
4584 | case 'i': | |
4585 | case 'w': | |
91914e56 | 4586 | case 'p': |
3cf2715d DE |
4587 | case 'n': |
4588 | case 'u': | |
4589 | break; | |
4590 | ||
4591 | default: | |
0bccc606 | 4592 | gcc_unreachable (); |
3cf2715d DE |
4593 | } |
4594 | } | |
4595 | #endif | |
ef330312 PB |
4596 | \f |
4597 | /* Turn the RTL into assembly. */ | |
c2924966 | 4598 | static unsigned int |
ef330312 PB |
4599 | rest_of_handle_final (void) |
4600 | { | |
0d4b5b86 | 4601 | const char *fnname = get_fnname_from_decl (current_function_decl); |
ef330312 | 4602 | |
60012ddc JJ |
4603 | /* Turn debug markers into notes if the var-tracking pass has not |
4604 | been invoked. */ | |
4605 | if (!flag_var_tracking && MAY_HAVE_DEBUG_MARKER_INSNS) | |
e3a174d0 | 4606 | delete_vta_debug_insns (false); |
96a95ac1 | 4607 | |
ef330312 | 4608 | assemble_start_function (current_function_decl, fnname); |
bd2b9f1e AO |
4609 | rtx_insn *first = get_insns (); |
4610 | int seen = 0; | |
4611 | final_start_function_1 (&first, asm_out_file, &seen, optimize); | |
4612 | final_1 (first, asm_out_file, seen, optimize); | |
036ea399 JJ |
4613 | if (flag_ipa_ra |
4614 | && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl))) | |
27c07cc5 | 4615 | collect_fn_hard_reg_usage (); |
ef330312 PB |
4616 | final_end_function (); |
4617 | ||
182a0c11 RH |
4618 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4619 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4620 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4621 | output_function_exception_table (fnname); |
ef330312 PB |
4622 | |
4623 | assemble_end_function (current_function_decl, fnname); | |
4624 | ||
6fb5fa3c DB |
4625 | /* Free up reg info memory. */ |
4626 | free_reg_info (); | |
4627 | ||
ef330312 PB |
4628 | if (! quiet_flag) |
4629 | fflush (asm_out_file); | |
4630 | ||
ef330312 PB |
4631 | /* Write DBX symbols if requested. */ |
4632 | ||
4633 | /* Note that for those inline functions where we don't initially | |
4634 | know for certain that we will be generating an out-of-line copy, | |
4635 | the first invocation of this routine (rest_of_compilation) will | |
4636 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4637 | Later on, wrapup_global_declarations will (indirectly) call | |
4638 | rest_of_compilation again for those inline functions that need | |
4639 | to have out-of-line copies generated. During that call, we | |
4640 | *will* be routed past here. */ | |
4641 | ||
4642 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4643 | if (!DECL_IGNORED_P (current_function_decl)) |
4644 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4645 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4646 | |
4647 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4648 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4649 | ||
395a40e0 JH |
4650 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4651 | && targetm.have_ctors_dtors) | |
4652 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4653 | decl_init_priority_lookup | |
4654 | (current_function_decl)); | |
4655 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4656 | && targetm.have_ctors_dtors) | |
4657 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4658 | decl_fini_priority_lookup | |
4659 | (current_function_decl)); | |
c2924966 | 4660 | return 0; |
ef330312 PB |
4661 | } |
4662 | ||
27a4cd48 DM |
4663 | namespace { |
4664 | ||
4665 | const pass_data pass_data_final = | |
ef330312 | 4666 | { |
27a4cd48 DM |
4667 | RTL_PASS, /* type */ |
4668 | "final", /* name */ | |
4669 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4670 | TV_FINAL, /* tv_id */ |
4671 | 0, /* properties_required */ | |
4672 | 0, /* properties_provided */ | |
4673 | 0, /* properties_destroyed */ | |
4674 | 0, /* todo_flags_start */ | |
4675 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4676 | }; |
4677 | ||
27a4cd48 DM |
4678 | class pass_final : public rtl_opt_pass |
4679 | { | |
4680 | public: | |
c3284718 RS |
4681 | pass_final (gcc::context *ctxt) |
4682 | : rtl_opt_pass (pass_data_final, ctxt) | |
27a4cd48 DM |
4683 | {} |
4684 | ||
4685 | /* opt_pass methods: */ | |
be55bfe6 | 4686 | virtual unsigned int execute (function *) { return rest_of_handle_final (); } |
27a4cd48 DM |
4687 | |
4688 | }; // class pass_final | |
4689 | ||
4690 | } // anon namespace | |
4691 | ||
4692 | rtl_opt_pass * | |
4693 | make_pass_final (gcc::context *ctxt) | |
4694 | { | |
4695 | return new pass_final (ctxt); | |
4696 | } | |
4697 | ||
ef330312 | 4698 | |
c2924966 | 4699 | static unsigned int |
ef330312 PB |
4700 | rest_of_handle_shorten_branches (void) |
4701 | { | |
4702 | /* Shorten branches. */ | |
4703 | shorten_branches (get_insns ()); | |
c2924966 | 4704 | return 0; |
ef330312 | 4705 | } |
b0efb46b | 4706 | |
27a4cd48 DM |
4707 | namespace { |
4708 | ||
4709 | const pass_data pass_data_shorten_branches = | |
ef330312 | 4710 | { |
27a4cd48 DM |
4711 | RTL_PASS, /* type */ |
4712 | "shorten", /* name */ | |
4713 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4714 | TV_SHORTEN_BRANCH, /* tv_id */ |
4715 | 0, /* properties_required */ | |
4716 | 0, /* properties_provided */ | |
4717 | 0, /* properties_destroyed */ | |
4718 | 0, /* todo_flags_start */ | |
4719 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4720 | }; |
4721 | ||
27a4cd48 DM |
4722 | class pass_shorten_branches : public rtl_opt_pass |
4723 | { | |
4724 | public: | |
c3284718 RS |
4725 | pass_shorten_branches (gcc::context *ctxt) |
4726 | : rtl_opt_pass (pass_data_shorten_branches, ctxt) | |
27a4cd48 DM |
4727 | {} |
4728 | ||
4729 | /* opt_pass methods: */ | |
be55bfe6 TS |
4730 | virtual unsigned int execute (function *) |
4731 | { | |
4732 | return rest_of_handle_shorten_branches (); | |
4733 | } | |
27a4cd48 DM |
4734 | |
4735 | }; // class pass_shorten_branches | |
4736 | ||
4737 | } // anon namespace | |
4738 | ||
4739 | rtl_opt_pass * | |
4740 | make_pass_shorten_branches (gcc::context *ctxt) | |
4741 | { | |
4742 | return new pass_shorten_branches (ctxt); | |
4743 | } | |
4744 | ||
ef330312 | 4745 | |
c2924966 | 4746 | static unsigned int |
ef330312 PB |
4747 | rest_of_clean_state (void) |
4748 | { | |
fa7af581 | 4749 | rtx_insn *insn, *next; |
2153915d AO |
4750 | FILE *final_output = NULL; |
4751 | int save_unnumbered = flag_dump_unnumbered; | |
4752 | int save_noaddr = flag_dump_noaddr; | |
4753 | ||
4754 | if (flag_dump_final_insns) | |
4755 | { | |
4756 | final_output = fopen (flag_dump_final_insns, "a"); | |
4757 | if (!final_output) | |
4758 | { | |
7ca92787 JM |
4759 | error ("could not open final insn dump file %qs: %m", |
4760 | flag_dump_final_insns); | |
2153915d AO |
4761 | flag_dump_final_insns = NULL; |
4762 | } | |
4763 | else | |
4764 | { | |
2153915d | 4765 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb | 4766 | if (flag_compare_debug_opt || flag_compare_debug) |
171a55e7 | 4767 | dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG; |
6d8402ac AO |
4768 | dump_function_header (final_output, current_function_decl, |
4769 | dump_flags); | |
6ca5d1f6 | 4770 | final_insns_dump_p = true; |
2153915d AO |
4771 | |
4772 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4773 | if (LABEL_P (insn)) | |
4774 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4775 | else | |
a59d15cf AO |
4776 | { |
4777 | if (NOTE_P (insn)) | |
4778 | set_block_for_insn (insn, NULL); | |
4779 | INSN_UID (insn) = 0; | |
4780 | } | |
2153915d AO |
4781 | } |
4782 | } | |
ef330312 PB |
4783 | |
4784 | /* It is very important to decompose the RTL instruction chain here: | |
4785 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4786 | body. If these remain pointing to the other insns, we end up preserving | |
4787 | whole RTL chain and attached detailed debug info in memory. */ | |
4788 | for (insn = get_insns (); insn; insn = next) | |
4789 | { | |
4790 | next = NEXT_INSN (insn); | |
0f82e5c9 DM |
4791 | SET_NEXT_INSN (insn) = NULL; |
4792 | SET_PREV_INSN (insn) = NULL; | |
2153915d AO |
4793 | |
4794 | if (final_output | |
4795 | && (!NOTE_P (insn) || | |
4796 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
96a95ac1 | 4797 | && NOTE_KIND (insn) != NOTE_INSN_BEGIN_STMT |
2b1c5433 | 4798 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4799 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4800 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4801 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4802 | print_rtl_single (final_output, insn); |
2153915d AO |
4803 | } |
4804 | ||
4805 | if (final_output) | |
4806 | { | |
4807 | flag_dump_noaddr = save_noaddr; | |
4808 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4809 | final_insns_dump_p = false; |
2153915d AO |
4810 | |
4811 | if (fclose (final_output)) | |
4812 | { | |
7ca92787 JM |
4813 | error ("could not close final insn dump file %qs: %m", |
4814 | flag_dump_final_insns); | |
2153915d AO |
4815 | flag_dump_final_insns = NULL; |
4816 | } | |
ef330312 PB |
4817 | } |
4818 | ||
5f39ad47 | 4819 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4820 | reload_completed = 0; |
4821 | epilogue_completed = 0; | |
23249ac4 DB |
4822 | #ifdef STACK_REGS |
4823 | regstack_completed = 0; | |
4824 | #endif | |
ef330312 PB |
4825 | |
4826 | /* Clear out the insn_length contents now that they are no | |
4827 | longer valid. */ | |
4828 | init_insn_lengths (); | |
4829 | ||
4830 | /* Show no temporary slots allocated. */ | |
4831 | init_temp_slots (); | |
4832 | ||
ef330312 PB |
4833 | free_bb_for_insn (); |
4834 | ||
c2e84327 DM |
4835 | if (cfun->gimple_df) |
4836 | delete_tree_ssa (cfun); | |
55b34b5f | 4837 | |
051f8cc6 JH |
4838 | /* We can reduce stack alignment on call site only when we are sure that |
4839 | the function body just produced will be actually used in the final | |
4840 | executable. */ | |
4841 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4842 | { |
17b29c0a | 4843 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4844 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4845 | pref = crtl->stack_alignment_needed; | |
3dafb85c ML |
4846 | cgraph_node::rtl_info (current_function_decl) |
4847 | ->preferred_incoming_stack_boundary = pref; | |
ef330312 PB |
4848 | } |
4849 | ||
4850 | /* Make sure volatile mem refs aren't considered valid operands for | |
4851 | arithmetic insns. We must call this here if this is a nested inline | |
4852 | function, since the above code leaves us in the init_recog state, | |
4853 | and the function context push/pop code does not save/restore volatile_ok. | |
4854 | ||
4855 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4856 | anymore if we do it here? */ | |
4857 | ||
4858 | init_recog_no_volatile (); | |
4859 | ||
4860 | /* We're done with this function. Free up memory if we can. */ | |
4861 | free_after_parsing (cfun); | |
4862 | free_after_compilation (cfun); | |
c2924966 | 4863 | return 0; |
ef330312 PB |
4864 | } |
4865 | ||
27a4cd48 DM |
4866 | namespace { |
4867 | ||
4868 | const pass_data pass_data_clean_state = | |
ef330312 | 4869 | { |
27a4cd48 DM |
4870 | RTL_PASS, /* type */ |
4871 | "*clean_state", /* name */ | |
4872 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4873 | TV_FINAL, /* tv_id */ |
4874 | 0, /* properties_required */ | |
4875 | 0, /* properties_provided */ | |
4876 | PROP_rtl, /* properties_destroyed */ | |
4877 | 0, /* todo_flags_start */ | |
4878 | 0, /* todo_flags_finish */ | |
ef330312 | 4879 | }; |
27a4cd48 DM |
4880 | |
4881 | class pass_clean_state : public rtl_opt_pass | |
4882 | { | |
4883 | public: | |
c3284718 RS |
4884 | pass_clean_state (gcc::context *ctxt) |
4885 | : rtl_opt_pass (pass_data_clean_state, ctxt) | |
27a4cd48 DM |
4886 | {} |
4887 | ||
4888 | /* opt_pass methods: */ | |
be55bfe6 TS |
4889 | virtual unsigned int execute (function *) |
4890 | { | |
4891 | return rest_of_clean_state (); | |
4892 | } | |
27a4cd48 DM |
4893 | |
4894 | }; // class pass_clean_state | |
4895 | ||
4896 | } // anon namespace | |
4897 | ||
4898 | rtl_opt_pass * | |
4899 | make_pass_clean_state (gcc::context *ctxt) | |
4900 | { | |
4901 | return new pass_clean_state (ctxt); | |
4902 | } | |
27c07cc5 | 4903 | |
026c3cfd | 4904 | /* Return true if INSN is a call to the current function. */ |
26e288ba TV |
4905 | |
4906 | static bool | |
fa7af581 | 4907 | self_recursive_call_p (rtx_insn *insn) |
26e288ba TV |
4908 | { |
4909 | tree fndecl = get_call_fndecl (insn); | |
4910 | return (fndecl == current_function_decl | |
4911 | && decl_binds_to_current_def_p (fndecl)); | |
4912 | } | |
4913 | ||
27c07cc5 RO |
4914 | /* Collect hard register usage for the current function. */ |
4915 | ||
4916 | static void | |
4917 | collect_fn_hard_reg_usage (void) | |
4918 | { | |
fa7af581 | 4919 | rtx_insn *insn; |
4b29b965 | 4920 | #ifdef STACK_REGS |
27c07cc5 | 4921 | int i; |
4b29b965 | 4922 | #endif |
27c07cc5 | 4923 | struct cgraph_rtl_info *node; |
53f2f6c1 | 4924 | HARD_REG_SET function_used_regs; |
27c07cc5 RO |
4925 | |
4926 | /* ??? To be removed when all the ports have been fixed. */ | |
4927 | if (!targetm.call_fusage_contains_non_callee_clobbers) | |
4928 | return; | |
4929 | ||
53f2f6c1 | 4930 | CLEAR_HARD_REG_SET (function_used_regs); |
27c07cc5 RO |
4931 | |
4932 | for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) | |
4933 | { | |
4934 | HARD_REG_SET insn_used_regs; | |
4935 | ||
4936 | if (!NONDEBUG_INSN_P (insn)) | |
4937 | continue; | |
4938 | ||
26e288ba TV |
4939 | if (CALL_P (insn) |
4940 | && !self_recursive_call_p (insn)) | |
6621ab68 TV |
4941 | { |
4942 | if (!get_call_reg_set_usage (insn, &insn_used_regs, | |
4943 | call_used_reg_set)) | |
4944 | return; | |
27c07cc5 | 4945 | |
6621ab68 TV |
4946 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
4947 | } | |
27c07cc5 | 4948 | |
6621ab68 | 4949 | find_all_hard_reg_sets (insn, &insn_used_regs, false); |
53f2f6c1 | 4950 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
27c07cc5 RO |
4951 | } |
4952 | ||
4953 | /* Be conservative - mark fixed and global registers as used. */ | |
53f2f6c1 | 4954 | IOR_HARD_REG_SET (function_used_regs, fixed_reg_set); |
27c07cc5 RO |
4955 | |
4956 | #ifdef STACK_REGS | |
4957 | /* Handle STACK_REGS conservatively, since the df-framework does not | |
4958 | provide accurate information for them. */ | |
4959 | ||
4960 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
53f2f6c1 | 4961 | SET_HARD_REG_BIT (function_used_regs, i); |
27c07cc5 RO |
4962 | #endif |
4963 | ||
5fea8186 TV |
4964 | /* The information we have gathered is only interesting if it exposes a |
4965 | register from the call_used_regs that is not used in this function. */ | |
4966 | if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs)) | |
4967 | return; | |
4968 | ||
3dafb85c | 4969 | node = cgraph_node::rtl_info (current_function_decl); |
53f2f6c1 TV |
4970 | gcc_assert (node != NULL); |
4971 | ||
4972 | COPY_HARD_REG_SET (node->function_used_regs, function_used_regs); | |
27c07cc5 RO |
4973 | node->function_used_regs_valid = 1; |
4974 | } | |
4975 | ||
4976 | /* Get the declaration of the function called by INSN. */ | |
4977 | ||
4978 | static tree | |
fa7af581 | 4979 | get_call_fndecl (rtx_insn *insn) |
27c07cc5 RO |
4980 | { |
4981 | rtx note, datum; | |
4982 | ||
4983 | note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); | |
4984 | if (note == NULL_RTX) | |
4985 | return NULL_TREE; | |
4986 | ||
4987 | datum = XEXP (note, 0); | |
4988 | if (datum != NULL_RTX) | |
4989 | return SYMBOL_REF_DECL (datum); | |
4990 | ||
4991 | return NULL_TREE; | |
4992 | } | |
4993 | ||
4994 | /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for | |
4995 | call targets that can be overwritten. */ | |
4996 | ||
4997 | static struct cgraph_rtl_info * | |
fa7af581 | 4998 | get_call_cgraph_rtl_info (rtx_insn *insn) |
27c07cc5 RO |
4999 | { |
5000 | tree fndecl; | |
5001 | ||
5002 | if (insn == NULL_RTX) | |
5003 | return NULL; | |
5004 | ||
5005 | fndecl = get_call_fndecl (insn); | |
5006 | if (fndecl == NULL_TREE | |
5007 | || !decl_binds_to_current_def_p (fndecl)) | |
5008 | return NULL; | |
5009 | ||
3dafb85c | 5010 | return cgraph_node::rtl_info (fndecl); |
27c07cc5 RO |
5011 | } |
5012 | ||
5013 | /* Find hard registers used by function call instruction INSN, and return them | |
5014 | in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ | |
5015 | ||
5016 | bool | |
86bf2d46 | 5017 | get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, |
27c07cc5 RO |
5018 | HARD_REG_SET default_set) |
5019 | { | |
1e288103 | 5020 | if (flag_ipa_ra) |
27c07cc5 RO |
5021 | { |
5022 | struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); | |
5023 | if (node != NULL | |
5024 | && node->function_used_regs_valid) | |
5025 | { | |
5026 | COPY_HARD_REG_SET (*reg_set, node->function_used_regs); | |
5027 | AND_HARD_REG_SET (*reg_set, default_set); | |
5028 | return true; | |
5029 | } | |
5030 | } | |
5031 | ||
5032 | COPY_HARD_REG_SET (*reg_set, default_set); | |
5033 | return false; | |
5034 | } |