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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
2d593c86 | 3 | 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 |
17ac08e2 | 4 | Free Software Foundation, Inc. |
3cf2715d | 5 | |
1322177d | 6 | This file is part of GCC. |
3cf2715d | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 10 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 11 | version. |
3cf2715d | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
3cf2715d DE |
17 | |
18 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 21 | |
3cf2715d DE |
22 | /* This is the final pass of the compiler. |
23 | It looks at the rtl code for a function and outputs assembler code. | |
24 | ||
25 | Call `final_start_function' to output the assembler code for function entry, | |
26 | `final' to output assembler code for some RTL code, | |
27 | `final_end_function' to output assembler code for function exit. | |
28 | If a function is compiled in several pieces, each piece is | |
29 | output separately with `final'. | |
30 | ||
31 | Some optimizations are also done at this level. | |
32 | Move instructions that were made unnecessary by good register allocation | |
33 | are detected and omitted from the output. (Though most of these | |
34 | are removed by the last jump pass.) | |
35 | ||
36 | Instructions to set the condition codes are omitted when it can be | |
37 | seen that the condition codes already had the desired values. | |
38 | ||
39 | In some cases it is sufficient if the inherited condition codes | |
40 | have related values, but this may require the following insn | |
41 | (the one that tests the condition codes) to be modified. | |
42 | ||
43 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
44 | directly in assembler by the target functions function_prologue and |
45 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
46 | |
47 | #include "config.h" | |
670ee920 | 48 | #include "system.h" |
4977bab6 ZW |
49 | #include "coretypes.h" |
50 | #include "tm.h" | |
3cf2715d DE |
51 | |
52 | #include "tree.h" | |
53 | #include "rtl.h" | |
6baf1cc8 | 54 | #include "tm_p.h" |
3cf2715d DE |
55 | #include "regs.h" |
56 | #include "insn-config.h" | |
3cf2715d | 57 | #include "insn-attr.h" |
3cf2715d DE |
58 | #include "recog.h" |
59 | #include "conditions.h" | |
60 | #include "flags.h" | |
61 | #include "real.h" | |
62 | #include "hard-reg-set.h" | |
3cf2715d | 63 | #include "output.h" |
3d195391 | 64 | #include "except.h" |
49ad7cfa | 65 | #include "function.h" |
10f0ad3d | 66 | #include "toplev.h" |
d6f4ec51 | 67 | #include "reload.h" |
ab87f8c8 | 68 | #include "intl.h" |
be1bb652 | 69 | #include "basic-block.h" |
08c148a8 | 70 | #include "target.h" |
a5a42b92 | 71 | #include "debug.h" |
49d801d3 | 72 | #include "expr.h" |
ba4f7968 | 73 | #include "cfglayout.h" |
ef330312 PB |
74 | #include "tree-pass.h" |
75 | #include "timevar.h" | |
76 | #include "cgraph.h" | |
77 | #include "coverage.h" | |
6fb5fa3c | 78 | #include "df.h" |
294340bf | 79 | #include "vecprim.h" |
c8aea42c | 80 | #include "ggc.h" |
edbed3d3 JH |
81 | #include "cfgloop.h" |
82 | #include "params.h" | |
3cf2715d | 83 | |
440aabf8 NB |
84 | #ifdef XCOFF_DEBUGGING_INFO |
85 | #include "xcoffout.h" /* Needed for external data | |
86 | declarations for e.g. AIX 4.x. */ | |
87 | #endif | |
88 | ||
76ead72b RL |
89 | #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) |
90 | #include "dwarf2out.h" | |
91 | #endif | |
92 | ||
6a08f7b3 DP |
93 | #ifdef DBX_DEBUGGING_INFO |
94 | #include "dbxout.h" | |
95 | #endif | |
96 | ||
ce82daed DB |
97 | #ifdef SDB_DEBUGGING_INFO |
98 | #include "sdbout.h" | |
99 | #endif | |
100 | ||
3cf2715d DE |
101 | /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a |
102 | null default for it to save conditionalization later. */ | |
103 | #ifndef CC_STATUS_INIT | |
104 | #define CC_STATUS_INIT | |
105 | #endif | |
106 | ||
107 | /* How to start an assembler comment. */ | |
108 | #ifndef ASM_COMMENT_START | |
109 | #define ASM_COMMENT_START ";#" | |
110 | #endif | |
111 | ||
112 | /* Is the given character a logical line separator for the assembler? */ | |
113 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 114 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
115 | #endif |
116 | ||
75197b37 BS |
117 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
118 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
119 | #endif | |
120 | ||
589fe865 DJ |
121 | /* Bitflags used by final_scan_insn. */ |
122 | #define SEEN_BB 1 | |
123 | #define SEEN_NOTE 2 | |
124 | #define SEEN_EMITTED 4 | |
125 | ||
3cf2715d | 126 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
127 | static rtx debug_insn; |
128 | rtx current_output_insn; | |
3cf2715d DE |
129 | |
130 | /* Line number of last NOTE. */ | |
131 | static int last_linenum; | |
132 | ||
eac40081 RK |
133 | /* Highest line number in current block. */ |
134 | static int high_block_linenum; | |
135 | ||
136 | /* Likewise for function. */ | |
137 | static int high_function_linenum; | |
138 | ||
3cf2715d | 139 | /* Filename of last NOTE. */ |
3cce094d | 140 | static const char *last_filename; |
3cf2715d | 141 | |
d752cfdb JJ |
142 | /* Override filename and line number. */ |
143 | static const char *override_filename; | |
144 | static int override_linenum; | |
145 | ||
b8176fe4 EB |
146 | /* Whether to force emission of a line note before the next insn. */ |
147 | static bool force_source_line = false; | |
b0efb46b | 148 | |
5f2f0edd | 149 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 150 | |
3cf2715d | 151 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 152 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 153 | The precise value is the insn being output, to pass to error_for_asm. */ |
c8b94768 | 154 | rtx this_is_asm_operands; |
3cf2715d DE |
155 | |
156 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 157 | static unsigned int insn_noperands; |
3cf2715d DE |
158 | |
159 | /* Compare optimization flag. */ | |
160 | ||
161 | static rtx last_ignored_compare = 0; | |
162 | ||
3cf2715d DE |
163 | /* Assign a unique number to each insn that is output. |
164 | This can be used to generate unique local labels. */ | |
165 | ||
166 | static int insn_counter = 0; | |
167 | ||
168 | #ifdef HAVE_cc0 | |
169 | /* This variable contains machine-dependent flags (defined in tm.h) | |
170 | set and examined by output routines | |
171 | that describe how to interpret the condition codes properly. */ | |
172 | ||
173 | CC_STATUS cc_status; | |
174 | ||
175 | /* During output of an insn, this contains a copy of cc_status | |
176 | from before the insn. */ | |
177 | ||
178 | CC_STATUS cc_prev_status; | |
179 | #endif | |
180 | ||
3cf2715d | 181 | /* Nonzero means current function must be given a frame pointer. |
b483cfb7 EB |
182 | Initialized in function.c to 0. Set only in reload1.c as per |
183 | the needs of the function. */ | |
3cf2715d DE |
184 | |
185 | int frame_pointer_needed; | |
186 | ||
18c038b9 | 187 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
188 | |
189 | static int block_depth; | |
190 | ||
191 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
192 | ||
193 | static int app_on; | |
194 | ||
195 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
196 | Zero otherwise. */ | |
197 | ||
198 | rtx final_sequence; | |
199 | ||
200 | #ifdef ASSEMBLER_DIALECT | |
201 | ||
202 | /* Number of the assembler dialect to use, starting at 0. */ | |
203 | static int dialect_number; | |
204 | #endif | |
205 | ||
afe48e06 RH |
206 | #ifdef HAVE_conditional_execution |
207 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ | |
208 | rtx current_insn_predicate; | |
209 | #endif | |
210 | ||
1d300e19 | 211 | #ifdef HAVE_ATTR_length |
6cf9ac28 AJ |
212 | static int asm_insn_count (rtx); |
213 | #endif | |
214 | static void profile_function (FILE *); | |
215 | static void profile_after_prologue (FILE *); | |
216 | static bool notice_source_line (rtx); | |
6fb5fa3c | 217 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 AJ |
218 | static void output_asm_name (void); |
219 | static void output_alternate_entry_point (FILE *, rtx); | |
220 | static tree get_mem_expr_from_op (rtx, int *); | |
221 | static void output_asm_operand_names (rtx *, int *, int); | |
222 | static void output_operand (rtx, int); | |
e9a25f70 | 223 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 224 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
225 | #endif |
226 | #ifdef HAVE_cc0 | |
6cf9ac28 | 227 | static int alter_cond (rtx); |
e9a25f70 | 228 | #endif |
ca3075bd | 229 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 230 | static int final_addr_vec_align (rtx); |
ca3075bd | 231 | #endif |
7bdb32b9 | 232 | #ifdef HAVE_ATTR_length |
6cf9ac28 | 233 | static int align_fuzz (rtx, rtx, int, unsigned); |
7bdb32b9 | 234 | #endif |
3cf2715d DE |
235 | \f |
236 | /* Initialize data in final at the beginning of a compilation. */ | |
237 | ||
238 | void | |
6cf9ac28 | 239 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 240 | { |
3cf2715d | 241 | app_on = 0; |
3cf2715d DE |
242 | final_sequence = 0; |
243 | ||
244 | #ifdef ASSEMBLER_DIALECT | |
245 | dialect_number = ASSEMBLER_DIALECT; | |
246 | #endif | |
247 | } | |
248 | ||
08c148a8 | 249 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 250 | |
08c148a8 NB |
251 | If not overridden for epilogue code, then the function body itself |
252 | contains return instructions wherever needed. */ | |
253 | void | |
6cf9ac28 AJ |
254 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
255 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
256 | { |
257 | } | |
258 | ||
b4c25db2 NB |
259 | /* Default target hook that outputs nothing to a stream. */ |
260 | void | |
6cf9ac28 | 261 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
262 | { |
263 | } | |
264 | ||
3cf2715d DE |
265 | /* Enable APP processing of subsequent output. |
266 | Used before the output from an `asm' statement. */ | |
267 | ||
268 | void | |
6cf9ac28 | 269 | app_enable (void) |
3cf2715d DE |
270 | { |
271 | if (! app_on) | |
272 | { | |
51723711 | 273 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
274 | app_on = 1; |
275 | } | |
276 | } | |
277 | ||
278 | /* Disable APP processing of subsequent output. | |
279 | Called from varasm.c before most kinds of output. */ | |
280 | ||
281 | void | |
6cf9ac28 | 282 | app_disable (void) |
3cf2715d DE |
283 | { |
284 | if (app_on) | |
285 | { | |
51723711 | 286 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
287 | app_on = 0; |
288 | } | |
289 | } | |
290 | \f | |
f5d927c0 | 291 | /* Return the number of slots filled in the current |
3cf2715d DE |
292 | delayed branch sequence (we don't count the insn needing the |
293 | delay slot). Zero if not in a delayed branch sequence. */ | |
294 | ||
295 | #ifdef DELAY_SLOTS | |
296 | int | |
6cf9ac28 | 297 | dbr_sequence_length (void) |
3cf2715d DE |
298 | { |
299 | if (final_sequence != 0) | |
300 | return XVECLEN (final_sequence, 0) - 1; | |
301 | else | |
302 | return 0; | |
303 | } | |
304 | #endif | |
305 | \f | |
306 | /* The next two pages contain routines used to compute the length of an insn | |
307 | and to shorten branches. */ | |
308 | ||
309 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
310 | `insn_current_length'. */ | |
311 | ||
addd7df6 | 312 | static int *insn_lengths; |
9d98a694 | 313 | |
294340bf | 314 | VEC(int,heap) *insn_addresses_; |
3cf2715d | 315 | |
ea3cbda5 R |
316 | /* Max uid for which the above arrays are valid. */ |
317 | static int insn_lengths_max_uid; | |
318 | ||
3cf2715d DE |
319 | /* Address of insn being processed. Used by `insn_current_length'. */ |
320 | int insn_current_address; | |
321 | ||
fc470718 R |
322 | /* Address of insn being processed in previous iteration. */ |
323 | int insn_last_address; | |
324 | ||
d6a7951f | 325 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
326 | int insn_current_align; |
327 | ||
95707627 R |
328 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
329 | gives the next following alignment insn that increases the known | |
330 | alignment, or NULL_RTX if there is no such insn. | |
331 | For any alignment obtained this way, we can again index uid_align with | |
332 | its uid to obtain the next following align that in turn increases the | |
333 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
334 | for each insn we'll call the alignment chain of this insn in the following | |
335 | comments. */ | |
336 | ||
f5d927c0 KH |
337 | struct label_alignment |
338 | { | |
9e423e6d JW |
339 | short alignment; |
340 | short max_skip; | |
341 | }; | |
342 | ||
343 | static rtx *uid_align; | |
344 | static int *uid_shuid; | |
345 | static struct label_alignment *label_align; | |
95707627 | 346 | |
3cf2715d DE |
347 | /* Indicate that branch shortening hasn't yet been done. */ |
348 | ||
349 | void | |
6cf9ac28 | 350 | init_insn_lengths (void) |
3cf2715d | 351 | { |
95707627 R |
352 | if (uid_shuid) |
353 | { | |
354 | free (uid_shuid); | |
355 | uid_shuid = 0; | |
356 | } | |
357 | if (insn_lengths) | |
358 | { | |
359 | free (insn_lengths); | |
360 | insn_lengths = 0; | |
ea3cbda5 | 361 | insn_lengths_max_uid = 0; |
95707627 | 362 | } |
9d98a694 AO |
363 | #ifdef HAVE_ATTR_length |
364 | INSN_ADDRESSES_FREE (); | |
365 | #endif | |
95707627 R |
366 | if (uid_align) |
367 | { | |
368 | free (uid_align); | |
369 | uid_align = 0; | |
370 | } | |
3cf2715d DE |
371 | } |
372 | ||
373 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 374 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 R |
375 | length. */ |
376 | static inline int | |
377 | get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED, | |
378 | int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED) | |
3cf2715d DE |
379 | { |
380 | #ifdef HAVE_ATTR_length | |
381 | rtx body; | |
382 | int i; | |
383 | int length = 0; | |
384 | ||
ea3cbda5 | 385 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
386 | return insn_lengths[INSN_UID (insn)]; |
387 | else | |
388 | switch (GET_CODE (insn)) | |
389 | { | |
390 | case NOTE: | |
391 | case BARRIER: | |
392 | case CODE_LABEL: | |
393 | return 0; | |
394 | ||
395 | case CALL_INSN: | |
070a7956 | 396 | length = fallback_fn (insn); |
3cf2715d DE |
397 | break; |
398 | ||
399 | case JUMP_INSN: | |
400 | body = PATTERN (insn); | |
dd3f0101 | 401 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) |
3cf2715d | 402 | { |
fc470718 R |
403 | /* Alignment is machine-dependent and should be handled by |
404 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
405 | } |
406 | else | |
070a7956 | 407 | length = fallback_fn (insn); |
3cf2715d DE |
408 | break; |
409 | ||
410 | case INSN: | |
411 | body = PATTERN (insn); | |
412 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
413 | return 0; | |
414 | ||
415 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 416 | length = asm_insn_count (body) * fallback_fn (insn); |
3cf2715d DE |
417 | else if (GET_CODE (body) == SEQUENCE) |
418 | for (i = 0; i < XVECLEN (body, 0); i++) | |
419 | length += get_attr_length (XVECEXP (body, 0, i)); | |
420 | else | |
070a7956 | 421 | length = fallback_fn (insn); |
e9a25f70 JL |
422 | break; |
423 | ||
424 | default: | |
425 | break; | |
3cf2715d DE |
426 | } |
427 | ||
428 | #ifdef ADJUST_INSN_LENGTH | |
429 | ADJUST_INSN_LENGTH (insn, length); | |
430 | #endif | |
431 | return length; | |
432 | #else /* not HAVE_ATTR_length */ | |
433 | return 0; | |
a9305dcb R |
434 | #define insn_default_length 0 |
435 | #define insn_min_length 0 | |
3cf2715d DE |
436 | #endif /* not HAVE_ATTR_length */ |
437 | } | |
070a7956 R |
438 | |
439 | /* Obtain the current length of an insn. If branch shortening has been done, | |
440 | get its actual length. Otherwise, get its maximum length. */ | |
441 | int | |
442 | get_attr_length (rtx insn) | |
443 | { | |
444 | return get_attr_length_1 (insn, insn_default_length); | |
445 | } | |
446 | ||
447 | /* Obtain the current length of an insn. If branch shortening has been done, | |
448 | get its actual length. Otherwise, get its minimum length. */ | |
449 | int | |
450 | get_attr_min_length (rtx insn) | |
451 | { | |
452 | return get_attr_length_1 (insn, insn_min_length); | |
453 | } | |
3cf2715d | 454 | \f |
fc470718 R |
455 | /* Code to handle alignment inside shorten_branches. */ |
456 | ||
457 | /* Here is an explanation how the algorithm in align_fuzz can give | |
458 | proper results: | |
459 | ||
460 | Call a sequence of instructions beginning with alignment point X | |
461 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 462 | is used in an expression, it means the alignment value of the |
fc470718 | 463 | alignment point. |
f5d927c0 | 464 | |
fc470718 R |
465 | Call the distance between the start of the first insn of block X, and |
466 | the end of the last insn of block X `IX', for the `inner size of X'. | |
467 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 468 | |
fc470718 R |
469 | Likewise with the next alignment-delimited block following X, which we |
470 | shall call block Y. | |
f5d927c0 | 471 | |
fc470718 R |
472 | Call the distance between the start of the first insn of block X, and |
473 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 474 | |
fc470718 | 475 | The estimated padding is then OX - IX. |
f5d927c0 | 476 | |
fc470718 | 477 | OX can be safely estimated as |
f5d927c0 | 478 | |
fc470718 R |
479 | if (X >= Y) |
480 | OX = round_up(IX, Y) | |
481 | else | |
482 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 483 | |
fc470718 R |
484 | Clearly est(IX) >= real(IX), because that only depends on the |
485 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 486 | |
fc470718 R |
487 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
488 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 489 | |
fc470718 R |
490 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
491 | for branch ranges starting before X, so we can just round what we have. | |
492 | But when X < Y, we don't know anything about the, so to speak, | |
493 | `middle bits', so we have to assume the worst when aligning up from an | |
494 | address mod X to one mod Y, which is Y - X. */ | |
495 | ||
496 | #ifndef LABEL_ALIGN | |
efa3896a | 497 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
498 | #endif |
499 | ||
9e423e6d | 500 | #ifndef LABEL_ALIGN_MAX_SKIP |
2cca7283 | 501 | #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip |
9e423e6d JW |
502 | #endif |
503 | ||
fc470718 | 504 | #ifndef LOOP_ALIGN |
efa3896a | 505 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
506 | #endif |
507 | ||
9e423e6d | 508 | #ifndef LOOP_ALIGN_MAX_SKIP |
2cca7283 | 509 | #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip |
9e423e6d JW |
510 | #endif |
511 | ||
fc470718 | 512 | #ifndef LABEL_ALIGN_AFTER_BARRIER |
340f7e7c | 513 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
514 | #endif |
515 | ||
9e423e6d | 516 | #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP |
247a370b JH |
517 | #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 |
518 | #endif | |
519 | ||
520 | #ifndef JUMP_ALIGN | |
521 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
522 | #endif | |
523 | ||
524 | #ifndef JUMP_ALIGN_MAX_SKIP | |
2cca7283 | 525 | #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip |
9e423e6d JW |
526 | #endif |
527 | ||
fc470718 | 528 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 529 | static int |
6cf9ac28 | 530 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 531 | { |
2a841588 | 532 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
533 | |
534 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
535 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 536 | return exact_log2 (align); |
fc470718 R |
537 | |
538 | } | |
f5d927c0 | 539 | |
fc470718 R |
540 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
541 | #endif | |
542 | ||
543 | #ifndef INSN_LENGTH_ALIGNMENT | |
544 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
545 | #endif | |
546 | ||
fc470718 R |
547 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
548 | ||
de7987a6 | 549 | static int min_labelno, max_labelno; |
fc470718 R |
550 | |
551 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
552 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
553 | ||
554 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
555 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
556 | |
557 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 558 | |
fc470718 | 559 | int |
6cf9ac28 | 560 | label_to_alignment (rtx label) |
fc470718 R |
561 | { |
562 | return LABEL_TO_ALIGNMENT (label); | |
563 | } | |
564 | ||
565 | #ifdef HAVE_ATTR_length | |
566 | /* The differences in addresses | |
567 | between a branch and its target might grow or shrink depending on | |
568 | the alignment the start insn of the range (the branch for a forward | |
569 | branch or the label for a backward branch) starts out on; if these | |
570 | differences are used naively, they can even oscillate infinitely. | |
571 | We therefore want to compute a 'worst case' address difference that | |
572 | is independent of the alignment the start insn of the range end | |
573 | up on, and that is at least as large as the actual difference. | |
574 | The function align_fuzz calculates the amount we have to add to the | |
575 | naively computed difference, by traversing the part of the alignment | |
576 | chain of the start insn of the range that is in front of the end insn | |
577 | of the range, and considering for each alignment the maximum amount | |
578 | that it might contribute to a size increase. | |
579 | ||
580 | For casesi tables, we also want to know worst case minimum amounts of | |
581 | address difference, in case a machine description wants to introduce | |
582 | some common offset that is added to all offsets in a table. | |
d6a7951f | 583 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
584 | appropriate adjustment. */ |
585 | ||
fc470718 R |
586 | /* Compute the maximum delta by which the difference of the addresses of |
587 | START and END might grow / shrink due to a different address for start | |
588 | which changes the size of alignment insns between START and END. | |
589 | KNOWN_ALIGN_LOG is the alignment known for START. | |
590 | GROWTH should be ~0 if the objective is to compute potential code size | |
591 | increase, and 0 if the objective is to compute potential shrink. | |
592 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 593 | |
ca3075bd | 594 | static int |
6cf9ac28 | 595 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
596 | { |
597 | int uid = INSN_UID (start); | |
598 | rtx align_label; | |
599 | int known_align = 1 << known_align_log; | |
600 | int end_shuid = INSN_SHUID (end); | |
601 | int fuzz = 0; | |
602 | ||
603 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
604 | { | |
605 | int align_addr, new_align; | |
606 | ||
607 | uid = INSN_UID (align_label); | |
9d98a694 | 608 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
609 | if (uid_shuid[uid] > end_shuid) |
610 | break; | |
611 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
612 | new_align = 1 << known_align_log; | |
613 | if (new_align < known_align) | |
614 | continue; | |
615 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
616 | known_align = new_align; | |
617 | } | |
618 | return fuzz; | |
619 | } | |
620 | ||
621 | /* Compute a worst-case reference address of a branch so that it | |
622 | can be safely used in the presence of aligned labels. Since the | |
623 | size of the branch itself is unknown, the size of the branch is | |
624 | not included in the range. I.e. for a forward branch, the reference | |
625 | address is the end address of the branch as known from the previous | |
626 | branch shortening pass, minus a value to account for possible size | |
627 | increase due to alignment. For a backward branch, it is the start | |
628 | address of the branch as known from the current pass, plus a value | |
629 | to account for possible size increase due to alignment. | |
630 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
631 | to exclude the branch size. */ | |
f5d927c0 | 632 | |
fc470718 | 633 | int |
6cf9ac28 | 634 | insn_current_reference_address (rtx branch) |
fc470718 | 635 | { |
5527bf14 RH |
636 | rtx dest, seq; |
637 | int seq_uid; | |
638 | ||
639 | if (! INSN_ADDRESSES_SET_P ()) | |
640 | return 0; | |
641 | ||
642 | seq = NEXT_INSN (PREV_INSN (branch)); | |
643 | seq_uid = INSN_UID (seq); | |
4b4bf941 | 644 | if (!JUMP_P (branch)) |
fc470718 R |
645 | /* This can happen for example on the PA; the objective is to know the |
646 | offset to address something in front of the start of the function. | |
647 | Thus, we can treat it like a backward branch. | |
648 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
649 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
650 | return insn_current_address; | |
651 | dest = JUMP_LABEL (branch); | |
5527bf14 | 652 | |
b9f22704 | 653 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
654 | BRANCH also has no INSN_SHUID. */ |
655 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 656 | { |
f5d927c0 | 657 | /* Forward branch. */ |
fc470718 | 658 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 659 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
660 | } |
661 | else | |
662 | { | |
f5d927c0 | 663 | /* Backward branch. */ |
fc470718 | 664 | return (insn_current_address |
923f7cf9 | 665 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
666 | } |
667 | } | |
668 | #endif /* HAVE_ATTR_length */ | |
669 | \f | |
65727068 KH |
670 | /* Compute branch alignments based on frequency information in the |
671 | CFG. */ | |
672 | ||
c2924966 | 673 | static unsigned int |
6cf9ac28 | 674 | compute_alignments (void) |
247a370b | 675 | { |
247a370b | 676 | int log, max_skip, max_log; |
e0082a72 | 677 | basic_block bb; |
edbed3d3 JH |
678 | int freq_max = 0; |
679 | int freq_threshold = 0; | |
247a370b JH |
680 | |
681 | if (label_align) | |
682 | { | |
683 | free (label_align); | |
684 | label_align = 0; | |
685 | } | |
686 | ||
687 | max_labelno = max_label_num (); | |
688 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 689 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
690 | |
691 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
ba712955 | 692 | if (! optimize || optimize_size) |
c2924966 | 693 | return 0; |
247a370b | 694 | |
edbed3d3 JH |
695 | if (dump_file) |
696 | { | |
697 | dump_flow_info (dump_file, TDF_DETAILS); | |
698 | flow_loops_dump (dump_file, NULL, 1); | |
699 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); | |
700 | } | |
701 | FOR_EACH_BB (bb) | |
702 | if (bb->frequency > freq_max) | |
703 | freq_max = bb->frequency; | |
704 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
705 | ||
706 | if (dump_file) | |
707 | fprintf(dump_file, "freq_max: %i\n",freq_max); | |
e0082a72 | 708 | FOR_EACH_BB (bb) |
247a370b | 709 | { |
a813c111 | 710 | rtx label = BB_HEAD (bb); |
247a370b JH |
711 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
712 | edge e; | |
628f6a4e | 713 | edge_iterator ei; |
247a370b | 714 | |
4b4bf941 | 715 | if (!LABEL_P (label) |
66b4e478 | 716 | || probably_never_executed_bb_p (bb)) |
edbed3d3 JH |
717 | { |
718 | if (dump_file) | |
719 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
720 | bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth); | |
721 | continue; | |
722 | } | |
247a370b JH |
723 | max_log = LABEL_ALIGN (label); |
724 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
725 | ||
628f6a4e | 726 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
727 | { |
728 | if (e->flags & EDGE_FALLTHRU) | |
729 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
730 | else | |
731 | branch_frequency += EDGE_FREQUENCY (e); | |
732 | } | |
edbed3d3 JH |
733 | if (dump_file) |
734 | { | |
735 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i", | |
736 | bb->index, bb->frequency, bb->loop_father->num, | |
737 | bb->loop_depth, | |
738 | fallthru_frequency, branch_frequency); | |
739 | if (!bb->loop_father->inner && bb->loop_father->num) | |
740 | fprintf (dump_file, " inner_loop"); | |
741 | if (bb->loop_father->header == bb) | |
742 | fprintf (dump_file, " loop_header"); | |
743 | fprintf (dump_file, "\n"); | |
744 | } | |
247a370b | 745 | |
f63d1bf7 | 746 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 747 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 748 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
749 | (so it does not need to be in the cache). |
750 | ||
751 | We to catch first case, we align frequently executed blocks. | |
752 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 753 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
754 | when function is called. */ |
755 | ||
756 | if (!has_fallthru | |
edbed3d3 | 757 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
758 | || (bb->frequency > bb->prev_bb->frequency * 10 |
759 | && (bb->prev_bb->frequency | |
247a370b JH |
760 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
761 | { | |
762 | log = JUMP_ALIGN (label); | |
edbed3d3 JH |
763 | if (dump_file) |
764 | fprintf(dump_file, " jump alignment added.\n"); | |
247a370b JH |
765 | if (max_log < log) |
766 | { | |
767 | max_log = log; | |
768 | max_skip = JUMP_ALIGN_MAX_SKIP; | |
769 | } | |
770 | } | |
771 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 772 | align it. It is most likely a first block of loop. */ |
247a370b | 773 | if (has_fallthru |
66b4e478 | 774 | && maybe_hot_bb_p (bb) |
edbed3d3 JH |
775 | && branch_frequency + fallthru_frequency > freq_threshold |
776 | && (branch_frequency | |
777 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
778 | { |
779 | log = LOOP_ALIGN (label); | |
edbed3d3 JH |
780 | if (dump_file) |
781 | fprintf(dump_file, " internal loop alignment added.\n"); | |
247a370b JH |
782 | if (max_log < log) |
783 | { | |
784 | max_log = log; | |
785 | max_skip = LOOP_ALIGN_MAX_SKIP; | |
786 | } | |
787 | } | |
788 | LABEL_TO_ALIGNMENT (label) = max_log; | |
789 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
790 | } | |
edbed3d3 JH |
791 | |
792 | if (dump_file) | |
793 | loop_optimizer_finalize (); | |
c2924966 | 794 | return 0; |
247a370b | 795 | } |
ef330312 | 796 | |
8ddbbcae | 797 | struct rtl_opt_pass pass_compute_alignments = |
ef330312 | 798 | { |
8ddbbcae JH |
799 | { |
800 | RTL_PASS, | |
edbed3d3 | 801 | "alignments", /* name */ |
ef330312 PB |
802 | NULL, /* gate */ |
803 | compute_alignments, /* execute */ | |
804 | NULL, /* sub */ | |
805 | NULL, /* next */ | |
806 | 0, /* static_pass_number */ | |
807 | 0, /* tv_id */ | |
808 | 0, /* properties_required */ | |
809 | 0, /* properties_provided */ | |
810 | 0, /* properties_destroyed */ | |
811 | 0, /* todo_flags_start */ | |
edbed3d3 | 812 | TODO_dump_func | TODO_verify_rtl_sharing |
8ddbbcae JH |
813 | | TODO_ggc_collect /* todo_flags_finish */ |
814 | } | |
ef330312 PB |
815 | }; |
816 | ||
247a370b | 817 | \f |
3cf2715d DE |
818 | /* Make a pass over all insns and compute their actual lengths by shortening |
819 | any branches of variable length if possible. */ | |
820 | ||
fc470718 R |
821 | /* shorten_branches might be called multiple times: for example, the SH |
822 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
823 | In order to do this, it needs proper length information, which it obtains | |
824 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 825 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
826 | reorg.c, since the branch splitting exposes new instructions with delay |
827 | slots. */ | |
828 | ||
3cf2715d | 829 | void |
6cf9ac28 | 830 | shorten_branches (rtx first ATTRIBUTE_UNUSED) |
3cf2715d | 831 | { |
3cf2715d | 832 | rtx insn; |
fc470718 R |
833 | int max_uid; |
834 | int i; | |
fc470718 | 835 | int max_log; |
9e423e6d | 836 | int max_skip; |
fc470718 R |
837 | #ifdef HAVE_ATTR_length |
838 | #define MAX_CODE_ALIGN 16 | |
839 | rtx seq; | |
3cf2715d | 840 | int something_changed = 1; |
3cf2715d DE |
841 | char *varying_length; |
842 | rtx body; | |
843 | int uid; | |
fc470718 | 844 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 845 | |
fc470718 | 846 | #endif |
3d14e82f | 847 | |
3446405d JH |
848 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
849 | max_uid = get_max_uid (); | |
d9b6874b | 850 | |
471854f8 | 851 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 852 | free (uid_shuid); |
b0efb46b | 853 | |
5ed6ace5 | 854 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 855 | |
247a370b JH |
856 | if (max_labelno != max_label_num ()) |
857 | { | |
858 | int old = max_labelno; | |
859 | int n_labels; | |
860 | int n_old_labels; | |
861 | ||
862 | max_labelno = max_label_num (); | |
863 | ||
864 | n_labels = max_labelno - min_labelno + 1; | |
865 | n_old_labels = old - min_labelno + 1; | |
866 | ||
703ad42b KG |
867 | label_align = xrealloc (label_align, |
868 | n_labels * sizeof (struct label_alignment)); | |
247a370b | 869 | |
535a42b1 | 870 | /* Range of labels grows monotonically in the function. Failing here |
247a370b | 871 | means that the initialization of array got lost. */ |
0bccc606 | 872 | gcc_assert (n_old_labels <= n_labels); |
247a370b JH |
873 | |
874 | memset (label_align + n_old_labels, 0, | |
875 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
876 | } | |
877 | ||
fc470718 R |
878 | /* Initialize label_align and set up uid_shuid to be strictly |
879 | monotonically rising with insn order. */ | |
e2faec75 R |
880 | /* We use max_log here to keep track of the maximum alignment we want to |
881 | impose on the next CODE_LABEL (or the current one if we are processing | |
882 | the CODE_LABEL itself). */ | |
f5d927c0 | 883 | |
9e423e6d JW |
884 | max_log = 0; |
885 | max_skip = 0; | |
886 | ||
887 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
888 | { |
889 | int log; | |
890 | ||
891 | INSN_SHUID (insn) = i++; | |
2c3c49de | 892 | if (INSN_P (insn)) |
80838531 | 893 | continue; |
b0efb46b | 894 | |
80838531 | 895 | if (LABEL_P (insn)) |
fc470718 R |
896 | { |
897 | rtx next; | |
ff81832f | 898 | |
247a370b JH |
899 | /* Merge in alignments computed by compute_alignments. */ |
900 | log = LABEL_TO_ALIGNMENT (insn); | |
901 | if (max_log < log) | |
902 | { | |
903 | max_log = log; | |
904 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
905 | } | |
fc470718 R |
906 | |
907 | log = LABEL_ALIGN (insn); | |
908 | if (max_log < log) | |
9e423e6d JW |
909 | { |
910 | max_log = log; | |
911 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
912 | } | |
b2a6a2fb | 913 | next = next_nonnote_insn (insn); |
75197b37 BS |
914 | /* ADDR_VECs only take room if read-only data goes into the text |
915 | section. */ | |
d6b5193b RS |
916 | if (JUMP_TABLES_IN_TEXT_SECTION |
917 | || readonly_data_section == text_section) | |
4b4bf941 | 918 | if (next && JUMP_P (next)) |
75197b37 BS |
919 | { |
920 | rtx nextbody = PATTERN (next); | |
921 | if (GET_CODE (nextbody) == ADDR_VEC | |
922 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
923 | { | |
924 | log = ADDR_VEC_ALIGN (next); | |
925 | if (max_log < log) | |
926 | { | |
927 | max_log = log; | |
928 | max_skip = LABEL_ALIGN_MAX_SKIP; | |
929 | } | |
930 | } | |
931 | } | |
fc470718 | 932 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 933 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 934 | max_log = 0; |
9e423e6d | 935 | max_skip = 0; |
fc470718 | 936 | } |
4b4bf941 | 937 | else if (BARRIER_P (insn)) |
fc470718 R |
938 | { |
939 | rtx label; | |
940 | ||
2c3c49de | 941 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 942 | label = NEXT_INSN (label)) |
4b4bf941 | 943 | if (LABEL_P (label)) |
fc470718 R |
944 | { |
945 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
946 | if (max_log < log) | |
9e423e6d JW |
947 | { |
948 | max_log = log; | |
949 | max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; | |
950 | } | |
fc470718 R |
951 | break; |
952 | } | |
953 | } | |
fc470718 R |
954 | } |
955 | #ifdef HAVE_ATTR_length | |
956 | ||
957 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 958 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 959 | insn_lengths_max_uid = max_uid; |
af035616 R |
960 | /* Syntax errors can lead to labels being outside of the main insn stream. |
961 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 962 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 963 | |
5ed6ace5 | 964 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
965 | |
966 | /* Initialize uid_align. We scan instructions | |
967 | from end to start, and keep in align_tab[n] the last seen insn | |
968 | that does an alignment of at least n+1, i.e. the successor | |
969 | in the alignment chain for an insn that does / has a known | |
970 | alignment of n. */ | |
5ed6ace5 | 971 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 972 | |
f5d927c0 | 973 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
974 | align_tab[i] = NULL_RTX; |
975 | seq = get_last_insn (); | |
33f7f353 | 976 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
977 | { |
978 | int uid = INSN_UID (seq); | |
979 | int log; | |
4b4bf941 | 980 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 981 | uid_align[uid] = align_tab[0]; |
fc470718 R |
982 | if (log) |
983 | { | |
984 | /* Found an alignment label. */ | |
985 | uid_align[uid] = align_tab[log]; | |
986 | for (i = log - 1; i >= 0; i--) | |
987 | align_tab[i] = seq; | |
988 | } | |
33f7f353 JR |
989 | } |
990 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
991 | if (optimize) | |
992 | { | |
993 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
994 | label fields. */ | |
995 | ||
996 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
997 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
998 | int rel; | |
999 | ||
1000 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1001 | { |
33f7f353 JR |
1002 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1003 | int len, i, min, max, insn_shuid; | |
1004 | int min_align; | |
1005 | addr_diff_vec_flags flags; | |
1006 | ||
4b4bf941 | 1007 | if (!JUMP_P (insn) |
33f7f353 JR |
1008 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1009 | continue; | |
1010 | pat = PATTERN (insn); | |
1011 | len = XVECLEN (pat, 1); | |
0bccc606 | 1012 | gcc_assert (len > 0); |
33f7f353 JR |
1013 | min_align = MAX_CODE_ALIGN; |
1014 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1015 | { | |
1016 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1017 | int shuid = INSN_SHUID (lab); | |
1018 | if (shuid < min) | |
1019 | { | |
1020 | min = shuid; | |
1021 | min_lab = lab; | |
1022 | } | |
1023 | if (shuid > max) | |
1024 | { | |
1025 | max = shuid; | |
1026 | max_lab = lab; | |
1027 | } | |
1028 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1029 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1030 | } | |
4c33cb26 R |
1031 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1032 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1033 | insn_shuid = INSN_SHUID (insn); |
1034 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1035 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1036 | flags.min_align = min_align; |
1037 | flags.base_after_vec = rel > insn_shuid; | |
1038 | flags.min_after_vec = min > insn_shuid; | |
1039 | flags.max_after_vec = max > insn_shuid; | |
1040 | flags.min_after_base = min > rel; | |
1041 | flags.max_after_base = max > rel; | |
1042 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
1043 | } |
1044 | } | |
33f7f353 | 1045 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1046 | |
3cf2715d | 1047 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
b816f339 | 1048 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1049 | insn != 0; |
1050 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1051 | { | |
1052 | uid = INSN_UID (insn); | |
fc470718 | 1053 | |
3cf2715d | 1054 | insn_lengths[uid] = 0; |
fc470718 | 1055 | |
4b4bf941 | 1056 | if (LABEL_P (insn)) |
fc470718 R |
1057 | { |
1058 | int log = LABEL_TO_ALIGNMENT (insn); | |
1059 | if (log) | |
1060 | { | |
1061 | int align = 1 << log; | |
ecb06768 | 1062 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1063 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1064 | } |
1065 | } | |
1066 | ||
5a09edba | 1067 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1068 | |
4b4bf941 JQ |
1069 | if (NOTE_P (insn) || BARRIER_P (insn) |
1070 | || LABEL_P (insn)) | |
3cf2715d | 1071 | continue; |
04da53bd R |
1072 | if (INSN_DELETED_P (insn)) |
1073 | continue; | |
3cf2715d DE |
1074 | |
1075 | body = PATTERN (insn); | |
1076 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1077 | { |
1078 | /* This only takes room if read-only data goes into the text | |
1079 | section. */ | |
d6b5193b RS |
1080 | if (JUMP_TABLES_IN_TEXT_SECTION |
1081 | || readonly_data_section == text_section) | |
75197b37 BS |
1082 | insn_lengths[uid] = (XVECLEN (body, |
1083 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1084 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1085 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1086 | } |
a30caf5c | 1087 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1088 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1089 | else if (GET_CODE (body) == SEQUENCE) | |
1090 | { | |
1091 | int i; | |
1092 | int const_delay_slots; | |
1093 | #ifdef DELAY_SLOTS | |
1094 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1095 | #else | |
1096 | const_delay_slots = 0; | |
1097 | #endif | |
1098 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1099 | if the shortening could change the number of delay slots | |
0f41302f | 1100 | of the branch. */ |
3cf2715d DE |
1101 | for (i = 0; i < XVECLEN (body, 0); i++) |
1102 | { | |
1103 | rtx inner_insn = XVECEXP (body, 0, i); | |
1104 | int inner_uid = INSN_UID (inner_insn); | |
1105 | int inner_length; | |
1106 | ||
a30caf5c DC |
1107 | if (GET_CODE (body) == ASM_INPUT |
1108 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1109 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1110 | * insn_default_length (inner_insn)); | |
1111 | else | |
1112 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1113 | |
3cf2715d DE |
1114 | insn_lengths[inner_uid] = inner_length; |
1115 | if (const_delay_slots) | |
1116 | { | |
1117 | if ((varying_length[inner_uid] | |
1118 | = insn_variable_length_p (inner_insn)) != 0) | |
1119 | varying_length[uid] = 1; | |
9d98a694 AO |
1120 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1121 | + insn_lengths[uid]); | |
3cf2715d DE |
1122 | } |
1123 | else | |
1124 | varying_length[inner_uid] = 0; | |
1125 | insn_lengths[uid] += inner_length; | |
1126 | } | |
1127 | } | |
1128 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1129 | { | |
1130 | insn_lengths[uid] = insn_default_length (insn); | |
1131 | varying_length[uid] = insn_variable_length_p (insn); | |
1132 | } | |
1133 | ||
1134 | /* If needed, do any adjustment. */ | |
1135 | #ifdef ADJUST_INSN_LENGTH | |
1136 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1137 | if (insn_lengths[uid] < 0) |
c725bd79 | 1138 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1139 | #endif |
1140 | } | |
1141 | ||
1142 | /* Now loop over all the insns finding varying length insns. For each, | |
1143 | get the current insn length. If it has changed, reflect the change. | |
1144 | When nothing changes for a full pass, we are done. */ | |
1145 | ||
1146 | while (something_changed) | |
1147 | { | |
1148 | something_changed = 0; | |
fc470718 | 1149 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1150 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1151 | insn != 0; |
1152 | insn = NEXT_INSN (insn)) | |
1153 | { | |
1154 | int new_length; | |
b729186a | 1155 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1156 | int tmp_length; |
b729186a | 1157 | #endif |
fc470718 | 1158 | int length_align; |
3cf2715d DE |
1159 | |
1160 | uid = INSN_UID (insn); | |
fc470718 | 1161 | |
4b4bf941 | 1162 | if (LABEL_P (insn)) |
fc470718 R |
1163 | { |
1164 | int log = LABEL_TO_ALIGNMENT (insn); | |
1165 | if (log > insn_current_align) | |
1166 | { | |
1167 | int align = 1 << log; | |
ecb06768 | 1168 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1169 | insn_lengths[uid] = new_address - insn_current_address; |
1170 | insn_current_align = log; | |
1171 | insn_current_address = new_address; | |
1172 | } | |
1173 | else | |
1174 | insn_lengths[uid] = 0; | |
9d98a694 | 1175 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1176 | continue; |
1177 | } | |
1178 | ||
1179 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1180 | if (length_align < insn_current_align) | |
1181 | insn_current_align = length_align; | |
1182 | ||
9d98a694 AO |
1183 | insn_last_address = INSN_ADDRESSES (uid); |
1184 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1185 | |
5e75ef4a | 1186 | #ifdef CASE_VECTOR_SHORTEN_MODE |
4b4bf941 | 1187 | if (optimize && JUMP_P (insn) |
33f7f353 JR |
1188 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1189 | { | |
33f7f353 JR |
1190 | rtx body = PATTERN (insn); |
1191 | int old_length = insn_lengths[uid]; | |
1192 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1193 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1194 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1195 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1196 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1197 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1198 | rtx prev; |
1199 | int rel_align = 0; | |
950a3816 KG |
1200 | addr_diff_vec_flags flags; |
1201 | ||
1202 | /* Avoid automatic aggregate initialization. */ | |
1203 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1204 | |
1205 | /* Try to find a known alignment for rel_lab. */ | |
1206 | for (prev = rel_lab; | |
1207 | prev | |
1208 | && ! insn_lengths[INSN_UID (prev)] | |
1209 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1210 | prev = PREV_INSN (prev)) | |
1211 | if (varying_length[INSN_UID (prev)] & 2) | |
1212 | { | |
1213 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1214 | break; | |
1215 | } | |
1216 | ||
1217 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1218 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1219 | /* Anything after INSN has still addresses from the last | |
1220 | pass; adjust these so that they reflect our current | |
1221 | estimate for this pass. */ | |
1222 | if (flags.base_after_vec) | |
1223 | rel_addr += insn_current_address - insn_last_address; | |
1224 | if (flags.min_after_vec) | |
1225 | min_addr += insn_current_address - insn_last_address; | |
1226 | if (flags.max_after_vec) | |
1227 | max_addr += insn_current_address - insn_last_address; | |
1228 | /* We want to know the worst case, i.e. lowest possible value | |
1229 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1230 | its offset is positive, and we have to be wary of code shrink; | |
1231 | otherwise, it is negative, and we have to be vary of code | |
1232 | size increase. */ | |
1233 | if (flags.min_after_base) | |
1234 | { | |
1235 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1236 | changes we are about to make can change the alignment | |
1237 | within the observed offset, therefore we have to break | |
1238 | it up into two parts that are independent. */ | |
1239 | if (! flags.base_after_vec && flags.min_after_vec) | |
1240 | { | |
1241 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1242 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1243 | } | |
1244 | else | |
1245 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1246 | } | |
1247 | else | |
1248 | { | |
1249 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1250 | { | |
1251 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1252 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1253 | } | |
1254 | else | |
1255 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1256 | } | |
1257 | /* Likewise, determine the highest lowest possible value | |
1258 | for the offset of MAX_LAB. */ | |
1259 | if (flags.max_after_base) | |
1260 | { | |
1261 | if (! flags.base_after_vec && flags.max_after_vec) | |
1262 | { | |
1263 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1264 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1265 | } | |
1266 | else | |
1267 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1268 | } | |
1269 | else | |
1270 | { | |
1271 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1272 | { | |
1273 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1274 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1275 | } | |
1276 | else | |
1277 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1278 | } | |
1279 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1280 | max_addr - rel_addr, | |
1281 | body)); | |
d6b5193b RS |
1282 | if (JUMP_TABLES_IN_TEXT_SECTION |
1283 | || readonly_data_section == text_section) | |
75197b37 BS |
1284 | { |
1285 | insn_lengths[uid] | |
1286 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1287 | insn_current_address += insn_lengths[uid]; | |
1288 | if (insn_lengths[uid] != old_length) | |
1289 | something_changed = 1; | |
1290 | } | |
1291 | ||
33f7f353 | 1292 | continue; |
33f7f353 | 1293 | } |
5e75ef4a JL |
1294 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1295 | ||
1296 | if (! (varying_length[uid])) | |
3cf2715d | 1297 | { |
4b4bf941 | 1298 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1299 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1300 | { | |
1301 | int i; | |
1302 | ||
1303 | body = PATTERN (insn); | |
1304 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1305 | { | |
1306 | rtx inner_insn = XVECEXP (body, 0, i); | |
1307 | int inner_uid = INSN_UID (inner_insn); | |
1308 | ||
1309 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1310 | ||
1311 | insn_current_address += insn_lengths[inner_uid]; | |
1312 | } | |
dd3f0101 | 1313 | } |
674fc07d GS |
1314 | else |
1315 | insn_current_address += insn_lengths[uid]; | |
1316 | ||
3cf2715d DE |
1317 | continue; |
1318 | } | |
674fc07d | 1319 | |
4b4bf941 | 1320 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d DE |
1321 | { |
1322 | int i; | |
f5d927c0 | 1323 | |
3cf2715d DE |
1324 | body = PATTERN (insn); |
1325 | new_length = 0; | |
1326 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1327 | { | |
1328 | rtx inner_insn = XVECEXP (body, 0, i); | |
1329 | int inner_uid = INSN_UID (inner_insn); | |
1330 | int inner_length; | |
1331 | ||
9d98a694 | 1332 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1333 | |
1334 | /* insn_current_length returns 0 for insns with a | |
1335 | non-varying length. */ | |
1336 | if (! varying_length[inner_uid]) | |
1337 | inner_length = insn_lengths[inner_uid]; | |
1338 | else | |
1339 | inner_length = insn_current_length (inner_insn); | |
1340 | ||
1341 | if (inner_length != insn_lengths[inner_uid]) | |
1342 | { | |
1343 | insn_lengths[inner_uid] = inner_length; | |
1344 | something_changed = 1; | |
1345 | } | |
1346 | insn_current_address += insn_lengths[inner_uid]; | |
1347 | new_length += inner_length; | |
1348 | } | |
1349 | } | |
1350 | else | |
1351 | { | |
1352 | new_length = insn_current_length (insn); | |
1353 | insn_current_address += new_length; | |
1354 | } | |
1355 | ||
3cf2715d DE |
1356 | #ifdef ADJUST_INSN_LENGTH |
1357 | /* If needed, do any adjustment. */ | |
1358 | tmp_length = new_length; | |
1359 | ADJUST_INSN_LENGTH (insn, new_length); | |
1360 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1361 | #endif |
1362 | ||
1363 | if (new_length != insn_lengths[uid]) | |
1364 | { | |
1365 | insn_lengths[uid] = new_length; | |
1366 | something_changed = 1; | |
1367 | } | |
1368 | } | |
bb4aaf18 TG |
1369 | /* For a non-optimizing compile, do only a single pass. */ |
1370 | if (!optimize) | |
1371 | break; | |
3cf2715d | 1372 | } |
fc470718 R |
1373 | |
1374 | free (varying_length); | |
1375 | ||
3cf2715d DE |
1376 | #endif /* HAVE_ATTR_length */ |
1377 | } | |
1378 | ||
1379 | #ifdef HAVE_ATTR_length | |
1380 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1381 | the number of machine instructions likely to be generated for this insn. | |
1382 | This is used to compute its length. */ | |
1383 | ||
1384 | static int | |
6cf9ac28 | 1385 | asm_insn_count (rtx body) |
3cf2715d | 1386 | { |
3cce094d | 1387 | const char *template; |
3cf2715d DE |
1388 | int count = 1; |
1389 | ||
5d0930ea DE |
1390 | if (GET_CODE (body) == ASM_INPUT) |
1391 | template = XSTR (body, 0); | |
1392 | else | |
bff4b63d | 1393 | template = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1394 | |
f5d927c0 | 1395 | for (; *template; template++) |
980d8882 BS |
1396 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template, template) |
1397 | || *template == '\n') | |
3cf2715d DE |
1398 | count++; |
1399 | ||
1400 | return count; | |
1401 | } | |
1402 | #endif | |
1403 | \f | |
c8aea42c PB |
1404 | /* ??? This is probably the wrong place for these. */ |
1405 | /* Structure recording the mapping from source file and directory | |
1406 | names at compile time to those to be embedded in debug | |
1407 | information. */ | |
1408 | typedef struct debug_prefix_map | |
1409 | { | |
1410 | const char *old_prefix; | |
1411 | const char *new_prefix; | |
1412 | size_t old_len; | |
1413 | size_t new_len; | |
1414 | struct debug_prefix_map *next; | |
1415 | } debug_prefix_map; | |
1416 | ||
1417 | /* Linked list of such structures. */ | |
1418 | debug_prefix_map *debug_prefix_maps; | |
1419 | ||
1420 | ||
1421 | /* Record a debug file prefix mapping. ARG is the argument to | |
1422 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1423 | ||
1424 | void | |
1425 | add_debug_prefix_map (const char *arg) | |
1426 | { | |
1427 | debug_prefix_map *map; | |
1428 | const char *p; | |
1429 | ||
1430 | p = strchr (arg, '='); | |
1431 | if (!p) | |
1432 | { | |
1433 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1434 | return; | |
1435 | } | |
1436 | map = XNEW (debug_prefix_map); | |
1437 | map->old_prefix = ggc_alloc_string (arg, p - arg); | |
1438 | map->old_len = p - arg; | |
1439 | p++; | |
1440 | map->new_prefix = ggc_strdup (p); | |
1441 | map->new_len = strlen (p); | |
1442 | map->next = debug_prefix_maps; | |
1443 | debug_prefix_maps = map; | |
1444 | } | |
1445 | ||
1446 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1447 | the new name corresponding to FILENAME. */ | |
1448 | ||
1449 | const char * | |
1450 | remap_debug_filename (const char *filename) | |
1451 | { | |
1452 | debug_prefix_map *map; | |
1453 | char *s; | |
1454 | const char *name; | |
1455 | size_t name_len; | |
1456 | ||
1457 | for (map = debug_prefix_maps; map; map = map->next) | |
1458 | if (strncmp (filename, map->old_prefix, map->old_len) == 0) | |
1459 | break; | |
1460 | if (!map) | |
1461 | return filename; | |
1462 | name = filename + map->old_len; | |
1463 | name_len = strlen (name) + 1; | |
1464 | s = (char *) alloca (name_len + map->new_len); | |
1465 | memcpy (s, map->new_prefix, map->new_len); | |
1466 | memcpy (s + map->new_len, name, name_len); | |
1467 | return ggc_strdup (s); | |
1468 | } | |
1469 | \f | |
3cf2715d DE |
1470 | /* Output assembler code for the start of a function, |
1471 | and initialize some of the variables in this file | |
1472 | for the new function. The label for the function and associated | |
1473 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1474 | ||
1475 | FIRST is the first insn of the rtl for the function being compiled. | |
1476 | FILE is the file to write assembler code to. | |
1477 | OPTIMIZE is nonzero if we should eliminate redundant | |
1478 | test and compare insns. */ | |
1479 | ||
1480 | void | |
6cf9ac28 AJ |
1481 | final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, |
1482 | int optimize ATTRIBUTE_UNUSED) | |
3cf2715d DE |
1483 | { |
1484 | block_depth = 0; | |
1485 | ||
1486 | this_is_asm_operands = 0; | |
1487 | ||
9ae130f8 JH |
1488 | last_filename = locator_file (prologue_locator); |
1489 | last_linenum = locator_line (prologue_locator); | |
1490 | ||
653e276c | 1491 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1492 | |
653e276c | 1493 | (*debug_hooks->begin_prologue) (last_linenum, last_filename); |
d291dd49 | 1494 | |
951120ea | 1495 | #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO) |
7a0c8d71 | 1496 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) |
653e276c | 1497 | dwarf2out_begin_prologue (0, NULL); |
f5d927c0 | 1498 | #endif |
3cf2715d DE |
1499 | |
1500 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1501 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1502 | leaf_renumber_regs (first); |
1503 | #endif | |
1504 | ||
1505 | /* The Sun386i and perhaps other machines don't work right | |
1506 | if the profiling code comes after the prologue. */ | |
1507 | #ifdef PROFILE_BEFORE_PROLOGUE | |
70f4f91c | 1508 | if (current_function_profile) |
3cf2715d DE |
1509 | profile_function (file); |
1510 | #endif /* PROFILE_BEFORE_PROLOGUE */ | |
1511 | ||
0021b564 JM |
1512 | #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) |
1513 | if (dwarf2out_do_frame ()) | |
e0c0490b | 1514 | dwarf2out_frame_debug (NULL_RTX, false); |
0021b564 JM |
1515 | #endif |
1516 | ||
18c038b9 MM |
1517 | /* If debugging, assign block numbers to all of the blocks in this |
1518 | function. */ | |
1519 | if (write_symbols) | |
1520 | { | |
0435312e | 1521 | reemit_insn_block_notes (); |
a20612aa | 1522 | number_blocks (current_function_decl); |
18c038b9 MM |
1523 | /* We never actually put out begin/end notes for the top-level |
1524 | block in the function. But, conceptually, that block is | |
1525 | always needed. */ | |
1526 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1527 | } | |
1528 | ||
a214518f SP |
1529 | if (warn_frame_larger_than |
1530 | && get_frame_size () > frame_larger_than_size) | |
1531 | { | |
1532 | /* Issue a warning */ | |
1533 | warning (OPT_Wframe_larger_than_, | |
1534 | "the frame size of %wd bytes is larger than %wd bytes", | |
1535 | get_frame_size (), frame_larger_than_size); | |
1536 | } | |
1537 | ||
3cf2715d | 1538 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1539 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1540 | |
3cf2715d DE |
1541 | /* If the machine represents the prologue as RTL, the profiling code must |
1542 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1543 | #ifdef HAVE_prologue | |
1544 | if (! HAVE_prologue) | |
1545 | #endif | |
1546 | profile_after_prologue (file); | |
3cf2715d DE |
1547 | } |
1548 | ||
1549 | static void | |
6cf9ac28 | 1550 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1551 | { |
3cf2715d | 1552 | #ifndef PROFILE_BEFORE_PROLOGUE |
70f4f91c | 1553 | if (current_function_profile) |
3cf2715d DE |
1554 | profile_function (file); |
1555 | #endif /* not PROFILE_BEFORE_PROLOGUE */ | |
1556 | } | |
1557 | ||
1558 | static void | |
6cf9ac28 | 1559 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1560 | { |
dcacfa04 | 1561 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1562 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1563 | #endif |
b729186a | 1564 | #if defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1565 | int sval = current_function_returns_struct; |
61f71b34 | 1566 | rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1); |
b729186a | 1567 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM) |
6de9cd9a | 1568 | int cxt = cfun->static_chain_decl != NULL; |
b729186a JL |
1569 | #endif |
1570 | #endif /* ASM_OUTPUT_REG_PUSH */ | |
3cf2715d | 1571 | |
9739c90c JJ |
1572 | if (! NO_PROFILE_COUNTERS) |
1573 | { | |
1574 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1575 | switch_to_section (data_section); |
9739c90c | 1576 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1577 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1578 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1579 | } | |
3cf2715d | 1580 | |
d6b5193b | 1581 | switch_to_section (current_function_section ()); |
3cf2715d | 1582 | |
61f71b34 | 1583 | #if defined(ASM_OUTPUT_REG_PUSH) |
f8cfc6aa | 1584 | if (sval && svrtx != NULL_RTX && REG_P (svrtx)) |
586de218 KG |
1585 | { |
1586 | ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx)); | |
1587 | } | |
3cf2715d DE |
1588 | #endif |
1589 | ||
65ed39df | 1590 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1591 | if (cxt) |
1592 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1593 | #else | |
65ed39df | 1594 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1595 | if (cxt) |
51723711 KG |
1596 | { |
1597 | ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM); | |
1598 | } | |
3cf2715d DE |
1599 | #endif |
1600 | #endif | |
3cf2715d | 1601 | |
df696a75 | 1602 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1603 | |
65ed39df | 1604 | #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d DE |
1605 | if (cxt) |
1606 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM); | |
1607 | #else | |
65ed39df | 1608 | #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH) |
3cf2715d | 1609 | if (cxt) |
51723711 KG |
1610 | { |
1611 | ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM); | |
1612 | } | |
3cf2715d DE |
1613 | #endif |
1614 | #endif | |
3cf2715d | 1615 | |
61f71b34 | 1616 | #if defined(ASM_OUTPUT_REG_PUSH) |
f8cfc6aa | 1617 | if (sval && svrtx != NULL_RTX && REG_P (svrtx)) |
586de218 KG |
1618 | { |
1619 | ASM_OUTPUT_REG_POP (file, REGNO (svrtx)); | |
1620 | } | |
3cf2715d DE |
1621 | #endif |
1622 | } | |
1623 | ||
1624 | /* Output assembler code for the end of a function. | |
1625 | For clarity, args are same as those of `final_start_function' | |
1626 | even though not all of them are needed. */ | |
1627 | ||
1628 | void | |
6cf9ac28 | 1629 | final_end_function (void) |
3cf2715d | 1630 | { |
be1bb652 | 1631 | app_disable (); |
3cf2715d | 1632 | |
e2a12aca | 1633 | (*debug_hooks->end_function) (high_function_linenum); |
3cf2715d | 1634 | |
3cf2715d DE |
1635 | /* Finally, output the function epilogue: |
1636 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1637 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1638 | |
e2a12aca | 1639 | /* And debug output. */ |
702ada3d | 1640 | (*debug_hooks->end_epilogue) (last_linenum, last_filename); |
3cf2715d | 1641 | |
e2a12aca | 1642 | #if defined (DWARF2_UNWIND_INFO) |
7a0c8d71 DR |
1643 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG |
1644 | && dwarf2out_do_frame ()) | |
702ada3d | 1645 | dwarf2out_end_epilogue (last_linenum, last_filename); |
9a666dda | 1646 | #endif |
3cf2715d DE |
1647 | } |
1648 | \f | |
3cf2715d | 1649 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1650 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1651 | |
1652 | void | |
c9d691e9 | 1653 | final (rtx first, FILE *file, int optimize) |
3cf2715d | 1654 | { |
b3694847 | 1655 | rtx insn; |
a8c3510c | 1656 | int max_uid = 0; |
589fe865 | 1657 | int seen = 0; |
3cf2715d DE |
1658 | |
1659 | last_ignored_compare = 0; | |
3cf2715d | 1660 | |
3cf2715d | 1661 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
a8c3510c | 1662 | { |
938d968e | 1663 | if (INSN_UID (insn) > max_uid) /* Find largest UID. */ |
f5d927c0 | 1664 | max_uid = INSN_UID (insn); |
9ef4c6ef JC |
1665 | #ifdef HAVE_cc0 |
1666 | /* If CC tracking across branches is enabled, record the insn which | |
1667 | jumps to each branch only reached from one place. */ | |
4b4bf941 | 1668 | if (optimize && JUMP_P (insn)) |
9ef4c6ef JC |
1669 | { |
1670 | rtx lab = JUMP_LABEL (insn); | |
1671 | if (lab && LABEL_NUSES (lab) == 1) | |
1672 | { | |
1673 | LABEL_REFS (lab) = insn; | |
1674 | } | |
1675 | } | |
1676 | #endif | |
a8c3510c AM |
1677 | } |
1678 | ||
3cf2715d DE |
1679 | init_recog (); |
1680 | ||
1681 | CC_STATUS_INIT; | |
1682 | ||
1683 | /* Output the insns. */ | |
9ff57809 | 1684 | for (insn = first; insn;) |
2f16edb1 TG |
1685 | { |
1686 | #ifdef HAVE_ATTR_length | |
b9f22704 | 1687 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 | 1688 | { |
0ac76ad9 RH |
1689 | /* This can be triggered by bugs elsewhere in the compiler if |
1690 | new insns are created after init_insn_lengths is called. */ | |
0bccc606 NS |
1691 | gcc_assert (NOTE_P (insn)); |
1692 | insn_current_address = -1; | |
0ac76ad9 RH |
1693 | } |
1694 | else | |
9d98a694 | 1695 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
1696 | #endif /* HAVE_ATTR_length */ |
1697 | ||
c9d691e9 | 1698 | insn = final_scan_insn (insn, file, optimize, 0, &seen); |
2f16edb1 | 1699 | } |
3cf2715d DE |
1700 | } |
1701 | \f | |
4bbf910e | 1702 | const char * |
6cf9ac28 | 1703 | get_insn_template (int code, rtx insn) |
4bbf910e | 1704 | { |
4bbf910e RH |
1705 | switch (insn_data[code].output_format) |
1706 | { | |
1707 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 1708 | return insn_data[code].output.single; |
4bbf910e | 1709 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 1710 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 1711 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 1712 | gcc_assert (insn); |
3897f229 | 1713 | return (*insn_data[code].output.function) (recog_data.operand, insn); |
4bbf910e RH |
1714 | |
1715 | default: | |
0bccc606 | 1716 | gcc_unreachable (); |
4bbf910e RH |
1717 | } |
1718 | } | |
f5d927c0 | 1719 | |
0dc36574 ZW |
1720 | /* Emit the appropriate declaration for an alternate-entry-point |
1721 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
1722 | LABEL_KIND != LABEL_NORMAL. | |
1723 | ||
1724 | The case fall-through in this function is intentional. */ | |
1725 | static void | |
6cf9ac28 | 1726 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
1727 | { |
1728 | const char *name = LABEL_NAME (insn); | |
1729 | ||
1730 | switch (LABEL_KIND (insn)) | |
1731 | { | |
1732 | case LABEL_WEAK_ENTRY: | |
1733 | #ifdef ASM_WEAKEN_LABEL | |
1734 | ASM_WEAKEN_LABEL (file, name); | |
1735 | #endif | |
1736 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 1737 | targetm.asm_out.globalize_label (file, name); |
0dc36574 | 1738 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
1739 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
1740 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
1741 | #endif | |
0dc36574 ZW |
1742 | ASM_OUTPUT_LABEL (file, name); |
1743 | break; | |
1744 | ||
1745 | case LABEL_NORMAL: | |
1746 | default: | |
0bccc606 | 1747 | gcc_unreachable (); |
0dc36574 ZW |
1748 | } |
1749 | } | |
1750 | ||
3cf2715d DE |
1751 | /* The final scan for one insn, INSN. |
1752 | Args are same as in `final', except that INSN | |
1753 | is the insn being scanned. | |
1754 | Value returned is the next insn to be scanned. | |
1755 | ||
ff8cea7e EB |
1756 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
1757 | used for within delayed branch sequence output). | |
3cf2715d | 1758 | |
589fe865 DJ |
1759 | SEEN is used to track the end of the prologue, for emitting |
1760 | debug information. We force the emission of a line note after | |
1761 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or | |
1762 | at the beginning of the second basic block, whichever comes | |
1763 | first. */ | |
1764 | ||
5cfc5f84 | 1765 | rtx |
6cf9ac28 | 1766 | final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, |
c9d691e9 | 1767 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 1768 | { |
90ca38bb MM |
1769 | #ifdef HAVE_cc0 |
1770 | rtx set; | |
1771 | #endif | |
b2a6a2fb | 1772 | rtx next; |
90ca38bb | 1773 | |
3cf2715d DE |
1774 | insn_counter++; |
1775 | ||
1776 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
1777 | template of "#") while not optimizing. */ | |
1778 | if (INSN_DELETED_P (insn)) | |
1779 | return NEXT_INSN (insn); | |
1780 | ||
1781 | switch (GET_CODE (insn)) | |
1782 | { | |
1783 | case NOTE: | |
a38e7aa5 | 1784 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
1785 | { |
1786 | case NOTE_INSN_DELETED: | |
be1bb652 | 1787 | break; |
3cf2715d | 1788 | |
87c8b4be | 1789 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 1790 | in_cold_section_p = !in_cold_section_p; |
a4b6974e UB |
1791 | #ifdef DWARF2_UNWIND_INFO |
1792 | if (dwarf2out_do_frame ()) | |
1793 | dwarf2out_switch_text_section (); | |
1794 | else | |
1795 | #endif | |
1796 | (*debug_hooks->switch_text_section) (); | |
1797 | ||
c543ca49 | 1798 | switch_to_section (current_function_section ()); |
750054a2 | 1799 | break; |
b0efb46b | 1800 | |
be1bb652 | 1801 | case NOTE_INSN_BASIC_BLOCK: |
951120ea PB |
1802 | #ifdef TARGET_UNWIND_INFO |
1803 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
ad0fc698 | 1804 | #endif |
951120ea | 1805 | |
be1bb652 RH |
1806 | if (flag_debug_asm) |
1807 | fprintf (asm_out_file, "\t%s basic block %d\n", | |
0b17ab2f | 1808 | ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); |
589fe865 DJ |
1809 | |
1810 | if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) | |
1811 | { | |
1812 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1813 | force_source_line = true; |
589fe865 DJ |
1814 | } |
1815 | else | |
1816 | *seen |= SEEN_BB; | |
1817 | ||
be1bb652 | 1818 | break; |
3cf2715d | 1819 | |
be1bb652 | 1820 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
1821 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
1822 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1823 | break; |
3d195391 | 1824 | |
be1bb652 | 1825 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
1826 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
1827 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1828 | break; |
3d195391 | 1829 | |
be1bb652 | 1830 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 1831 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 1832 | profile_after_prologue (file); |
589fe865 DJ |
1833 | |
1834 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1835 | { | |
1836 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1837 | force_source_line = true; |
589fe865 DJ |
1838 | } |
1839 | else | |
1840 | *seen |= SEEN_NOTE; | |
1841 | ||
3cf2715d | 1842 | break; |
3cf2715d | 1843 | |
be1bb652 | 1844 | case NOTE_INSN_EPILOGUE_BEG: |
5fd9b178 | 1845 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 1846 | break; |
3cf2715d | 1847 | |
be1bb652 | 1848 | case NOTE_INSN_FUNCTION_BEG: |
653e276c | 1849 | app_disable (); |
702ada3d | 1850 | (*debug_hooks->end_prologue) (last_linenum, last_filename); |
589fe865 DJ |
1851 | |
1852 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1853 | { | |
1854 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1855 | force_source_line = true; |
589fe865 DJ |
1856 | } |
1857 | else | |
1858 | *seen |= SEEN_NOTE; | |
1859 | ||
3cf2715d | 1860 | break; |
be1bb652 RH |
1861 | |
1862 | case NOTE_INSN_BLOCK_BEG: | |
1863 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 1864 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
1865 | || write_symbols == DWARF2_DEBUG |
1866 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1867 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1868 | { |
1869 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1870 | |
be1bb652 RH |
1871 | app_disable (); |
1872 | ++block_depth; | |
1873 | high_block_linenum = last_linenum; | |
eac40081 | 1874 | |
a5a42b92 | 1875 | /* Output debugging info about the symbol-block beginning. */ |
e2a12aca | 1876 | (*debug_hooks->begin_block) (last_linenum, n); |
3cf2715d | 1877 | |
be1bb652 RH |
1878 | /* Mark this block as output. */ |
1879 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
1880 | } | |
d752cfdb JJ |
1881 | if (write_symbols == DBX_DEBUG |
1882 | || write_symbols == SDB_DEBUG) | |
1883 | { | |
1884 | location_t *locus_ptr | |
1885 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
1886 | ||
1887 | if (locus_ptr != NULL) | |
1888 | { | |
1889 | override_filename = LOCATION_FILE (*locus_ptr); | |
1890 | override_linenum = LOCATION_LINE (*locus_ptr); | |
1891 | } | |
1892 | } | |
be1bb652 | 1893 | break; |
18c038b9 | 1894 | |
be1bb652 RH |
1895 | case NOTE_INSN_BLOCK_END: |
1896 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
1897 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
1898 | || write_symbols == DWARF2_DEBUG |
1899 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
1900 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
1901 | { |
1902 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 1903 | |
be1bb652 RH |
1904 | app_disable (); |
1905 | ||
1906 | /* End of a symbol-block. */ | |
1907 | --block_depth; | |
0bccc606 | 1908 | gcc_assert (block_depth >= 0); |
3cf2715d | 1909 | |
e2a12aca | 1910 | (*debug_hooks->end_block) (high_block_linenum, n); |
be1bb652 | 1911 | } |
d752cfdb JJ |
1912 | if (write_symbols == DBX_DEBUG |
1913 | || write_symbols == SDB_DEBUG) | |
1914 | { | |
1915 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
1916 | location_t *locus_ptr | |
1917 | = block_nonartificial_location (outer_block); | |
1918 | ||
1919 | if (locus_ptr != NULL) | |
1920 | { | |
1921 | override_filename = LOCATION_FILE (*locus_ptr); | |
1922 | override_linenum = LOCATION_LINE (*locus_ptr); | |
1923 | } | |
1924 | else | |
1925 | { | |
1926 | override_filename = NULL; | |
1927 | override_linenum = 0; | |
1928 | } | |
1929 | } | |
be1bb652 RH |
1930 | break; |
1931 | ||
1932 | case NOTE_INSN_DELETED_LABEL: | |
1933 | /* Emit the label. We may have deleted the CODE_LABEL because | |
1934 | the label could be proved to be unreachable, though still | |
1935 | referenced (in the form of having its address taken. */ | |
8215347e | 1936 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 1937 | break; |
3cf2715d | 1938 | |
014a1138 JZ |
1939 | case NOTE_INSN_VAR_LOCATION: |
1940 | (*debug_hooks->var_location) (insn); | |
1941 | break; | |
1942 | ||
be1bb652 | 1943 | default: |
a38e7aa5 | 1944 | gcc_unreachable (); |
f5d927c0 | 1945 | break; |
3cf2715d DE |
1946 | } |
1947 | break; | |
1948 | ||
1949 | case BARRIER: | |
f73ad30e | 1950 | #if defined (DWARF2_UNWIND_INFO) |
fbfa55b0 | 1951 | if (dwarf2out_do_frame ()) |
e0c0490b | 1952 | dwarf2out_frame_debug (insn, false); |
3cf2715d DE |
1953 | #endif |
1954 | break; | |
1955 | ||
1956 | case CODE_LABEL: | |
1dd8faa8 R |
1957 | /* The target port might emit labels in the output function for |
1958 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
1959 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
1960 | { | |
1961 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 1962 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 1963 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 1964 | #endif |
fc470718 | 1965 | |
1dd8faa8 | 1966 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 1967 | { |
9e423e6d | 1968 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 1969 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
1970 | #else |
1971 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
1972 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 1973 | #else |
40cdfca6 | 1974 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 1975 | #endif |
9e423e6d | 1976 | #endif |
40cdfca6 | 1977 | } |
de7987a6 | 1978 | } |
9ef4c6ef | 1979 | #ifdef HAVE_cc0 |
3cf2715d | 1980 | CC_STATUS_INIT; |
9ef4c6ef | 1981 | #endif |
03ffa171 | 1982 | |
e1772ac0 NB |
1983 | if (LABEL_NAME (insn)) |
1984 | (*debug_hooks->label) (insn); | |
1985 | ||
3cf2715d DE |
1986 | if (app_on) |
1987 | { | |
51723711 | 1988 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
1989 | app_on = 0; |
1990 | } | |
b2a6a2fb JJ |
1991 | |
1992 | next = next_nonnote_insn (insn); | |
1993 | if (next != 0 && JUMP_P (next)) | |
3cf2715d | 1994 | { |
b2a6a2fb | 1995 | rtx nextbody = PATTERN (next); |
3cf2715d DE |
1996 | |
1997 | /* If this label is followed by a jump-table, | |
1998 | make sure we put the label in the read-only section. Also | |
1999 | possibly write the label and jump table together. */ | |
2000 | ||
2001 | if (GET_CODE (nextbody) == ADDR_VEC | |
2002 | || GET_CODE (nextbody) == ADDR_DIFF_VEC) | |
2003 | { | |
e0d80184 DM |
2004 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2005 | /* In this case, the case vector is being moved by the | |
2006 | target, so don't output the label at all. Leave that | |
2007 | to the back end macros. */ | |
2008 | #else | |
75197b37 BS |
2009 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2010 | { | |
340f7e7c RH |
2011 | int log_align; |
2012 | ||
d6b5193b RS |
2013 | switch_to_section (targetm.asm_out.function_rodata_section |
2014 | (current_function_decl)); | |
340f7e7c RH |
2015 | |
2016 | #ifdef ADDR_VEC_ALIGN | |
b2a6a2fb | 2017 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c RH |
2018 | #else |
2019 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); | |
2020 | #endif | |
2021 | ASM_OUTPUT_ALIGN (file, log_align); | |
75197b37 BS |
2022 | } |
2023 | else | |
d6b5193b | 2024 | switch_to_section (current_function_section ()); |
75197b37 | 2025 | |
3cf2715d DE |
2026 | #ifdef ASM_OUTPUT_CASE_LABEL |
2027 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), | |
b2a6a2fb | 2028 | next); |
3cf2715d | 2029 | #else |
5fd9b178 | 2030 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2031 | #endif |
3cf2715d DE |
2032 | #endif |
2033 | break; | |
2034 | } | |
2035 | } | |
0dc36574 ZW |
2036 | if (LABEL_ALT_ENTRY_P (insn)) |
2037 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2038 | else |
5fd9b178 | 2039 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2040 | break; |
2041 | ||
2042 | default: | |
2043 | { | |
b3694847 | 2044 | rtx body = PATTERN (insn); |
3cf2715d | 2045 | int insn_code_number; |
9b3142b3 | 2046 | const char *template; |
3cf2715d | 2047 | |
9a1a4737 PB |
2048 | #ifdef HAVE_conditional_execution |
2049 | /* Reset this early so it is correct for ASM statements. */ | |
2050 | current_insn_predicate = NULL_RTX; | |
2051 | #endif | |
3cf2715d DE |
2052 | /* An INSN, JUMP_INSN or CALL_INSN. |
2053 | First check for special kinds that recog doesn't recognize. */ | |
2054 | ||
6614fd40 | 2055 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2056 | || GET_CODE (body) == CLOBBER) |
2057 | break; | |
2058 | ||
2059 | #ifdef HAVE_cc0 | |
4928181c SB |
2060 | { |
2061 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2062 | the setting of the condition code was done in the delay slot | |
2063 | of the insn that branched here. So recover the cc status | |
2064 | from the insn that set it. */ | |
3cf2715d | 2065 | |
4928181c SB |
2066 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2067 | if (note) | |
2068 | { | |
2069 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2070 | cc_prev_status = cc_status; | |
2071 | } | |
2072 | } | |
3cf2715d DE |
2073 | #endif |
2074 | ||
2075 | /* Detect insns that are really jump-tables | |
2076 | and output them as such. */ | |
2077 | ||
2078 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2079 | { | |
7f7f8214 | 2080 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2081 | int vlen, idx; |
7f7f8214 | 2082 | #endif |
3cf2715d | 2083 | |
b2a6a2fb | 2084 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2085 | switch_to_section (targetm.asm_out.function_rodata_section |
2086 | (current_function_decl)); | |
b2a6a2fb | 2087 | else |
d6b5193b | 2088 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2089 | |
3cf2715d DE |
2090 | if (app_on) |
2091 | { | |
51723711 | 2092 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2093 | app_on = 0; |
2094 | } | |
2095 | ||
e0d80184 DM |
2096 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2097 | if (GET_CODE (body) == ADDR_VEC) | |
2098 | { | |
2099 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2100 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2101 | #else | |
0bccc606 | 2102 | gcc_unreachable (); |
e0d80184 DM |
2103 | #endif |
2104 | } | |
2105 | else | |
2106 | { | |
2107 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2108 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2109 | #else | |
0bccc606 | 2110 | gcc_unreachable (); |
e0d80184 DM |
2111 | #endif |
2112 | } | |
2113 | #else | |
3cf2715d DE |
2114 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2115 | for (idx = 0; idx < vlen; idx++) | |
2116 | { | |
2117 | if (GET_CODE (body) == ADDR_VEC) | |
2118 | { | |
2119 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2120 | ASM_OUTPUT_ADDR_VEC_ELT | |
2121 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2122 | #else | |
0bccc606 | 2123 | gcc_unreachable (); |
3cf2715d DE |
2124 | #endif |
2125 | } | |
2126 | else | |
2127 | { | |
2128 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2129 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2130 | (file, | |
33f7f353 | 2131 | body, |
3cf2715d DE |
2132 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2133 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2134 | #else | |
0bccc606 | 2135 | gcc_unreachable (); |
3cf2715d DE |
2136 | #endif |
2137 | } | |
2138 | } | |
2139 | #ifdef ASM_OUTPUT_CASE_END | |
2140 | ASM_OUTPUT_CASE_END (file, | |
2141 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2142 | insn); | |
e0d80184 | 2143 | #endif |
3cf2715d DE |
2144 | #endif |
2145 | ||
d6b5193b | 2146 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2147 | |
2148 | break; | |
2149 | } | |
0435312e JH |
2150 | /* Output this line note if it is the first or the last line |
2151 | note in a row. */ | |
2152 | if (notice_source_line (insn)) | |
2153 | { | |
2154 | (*debug_hooks->source_line) (last_linenum, last_filename); | |
2155 | } | |
3cf2715d | 2156 | |
3cf2715d DE |
2157 | if (GET_CODE (body) == ASM_INPUT) |
2158 | { | |
36d7136e RH |
2159 | const char *string = XSTR (body, 0); |
2160 | ||
3cf2715d DE |
2161 | /* There's no telling what that did to the condition codes. */ |
2162 | CC_STATUS_INIT; | |
36d7136e RH |
2163 | |
2164 | if (string[0]) | |
3cf2715d | 2165 | { |
5ffeb913 | 2166 | expanded_location loc; |
bff4b63d | 2167 | |
36d7136e RH |
2168 | if (! app_on) |
2169 | { | |
2170 | fputs (ASM_APP_ON, file); | |
2171 | app_on = 1; | |
2172 | } | |
5ffeb913 | 2173 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2174 | if (*loc.file && loc.line) |
bff4b63d AO |
2175 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2176 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2177 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2178 | #if HAVE_AS_LINE_ZERO |
2179 | if (*loc.file && loc.line) | |
bff4b63d | 2180 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2181 | #endif |
3cf2715d | 2182 | } |
3cf2715d DE |
2183 | break; |
2184 | } | |
2185 | ||
2186 | /* Detect `asm' construct with operands. */ | |
2187 | if (asm_noperands (body) >= 0) | |
2188 | { | |
22bf4422 | 2189 | unsigned int noperands = asm_noperands (body); |
703ad42b | 2190 | rtx *ops = alloca (noperands * sizeof (rtx)); |
3cce094d | 2191 | const char *string; |
bff4b63d | 2192 | location_t loc; |
5ffeb913 | 2193 | expanded_location expanded; |
3cf2715d DE |
2194 | |
2195 | /* There's no telling what that did to the condition codes. */ | |
2196 | CC_STATUS_INIT; | |
3cf2715d | 2197 | |
3cf2715d | 2198 | /* Get out the operand values. */ |
bff4b63d | 2199 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2200 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2201 | insn_noperands = noperands; |
2202 | this_is_asm_operands = insn; | |
5ffeb913 | 2203 | expanded = expand_location (loc); |
3cf2715d | 2204 | |
ad7e39ca AO |
2205 | #ifdef FINAL_PRESCAN_INSN |
2206 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2207 | #endif | |
2208 | ||
3cf2715d | 2209 | /* Output the insn using them. */ |
36d7136e RH |
2210 | if (string[0]) |
2211 | { | |
2212 | if (! app_on) | |
2213 | { | |
2214 | fputs (ASM_APP_ON, file); | |
2215 | app_on = 1; | |
2216 | } | |
5ffeb913 | 2217 | if (expanded.file && expanded.line) |
bff4b63d | 2218 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2219 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2220 | output_asm_insn (string, ops); |
03943c05 | 2221 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2222 | if (expanded.file && expanded.line) |
bff4b63d | 2223 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2224 | #endif |
36d7136e RH |
2225 | } |
2226 | ||
3cf2715d DE |
2227 | this_is_asm_operands = 0; |
2228 | break; | |
2229 | } | |
2230 | ||
c9d691e9 | 2231 | if (app_on) |
3cf2715d | 2232 | { |
51723711 | 2233 | fputs (ASM_APP_OFF, file); |
3cf2715d DE |
2234 | app_on = 0; |
2235 | } | |
2236 | ||
2237 | if (GET_CODE (body) == SEQUENCE) | |
2238 | { | |
2239 | /* A delayed-branch sequence */ | |
b3694847 | 2240 | int i; |
3cf2715d | 2241 | |
3cf2715d DE |
2242 | final_sequence = body; |
2243 | ||
d660cefe RS |
2244 | /* Record the delay slots' frame information before the branch. |
2245 | This is needed for delayed calls: see execute_cfa_program(). */ | |
2246 | #if defined (DWARF2_UNWIND_INFO) | |
2247 | if (dwarf2out_do_frame ()) | |
2248 | for (i = 1; i < XVECLEN (body, 0); i++) | |
e0c0490b | 2249 | dwarf2out_frame_debug (XVECEXP (body, 0, i), false); |
d660cefe RS |
2250 | #endif |
2251 | ||
3cf2715d DE |
2252 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will |
2253 | force the restoration of a comparison that was previously | |
2254 | thought unnecessary. If that happens, cancel this sequence | |
2255 | and cause that insn to be restored. */ | |
2256 | ||
c9d691e9 | 2257 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); |
3cf2715d DE |
2258 | if (next != XVECEXP (body, 0, 1)) |
2259 | { | |
2260 | final_sequence = 0; | |
2261 | return next; | |
2262 | } | |
2263 | ||
2264 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2265 | { |
2266 | rtx insn = XVECEXP (body, 0, i); | |
2267 | rtx next = NEXT_INSN (insn); | |
2268 | /* We loop in case any instruction in a delay slot gets | |
2269 | split. */ | |
2270 | do | |
c9d691e9 | 2271 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2272 | while (insn != next); |
2273 | } | |
3cf2715d DE |
2274 | #ifdef DBR_OUTPUT_SEQEND |
2275 | DBR_OUTPUT_SEQEND (file); | |
2276 | #endif | |
2277 | final_sequence = 0; | |
2278 | ||
2279 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2280 | insns in the delay slot are actually executed before the | |
2281 | called function. Hence we don't preserve any CC-setting | |
2282 | actions in these insns and the CC must be marked as being | |
2283 | clobbered by the function. */ | |
4b4bf941 | 2284 | if (CALL_P (XVECEXP (body, 0, 0))) |
b729186a JL |
2285 | { |
2286 | CC_STATUS_INIT; | |
2287 | } | |
3cf2715d DE |
2288 | break; |
2289 | } | |
2290 | ||
2291 | /* We have a real machine instruction as rtl. */ | |
2292 | ||
2293 | body = PATTERN (insn); | |
2294 | ||
2295 | #ifdef HAVE_cc0 | |
f5d927c0 | 2296 | set = single_set (insn); |
b88c92cc | 2297 | |
3cf2715d DE |
2298 | /* Check for redundant test and compare instructions |
2299 | (when the condition codes are already set up as desired). | |
2300 | This is done only when optimizing; if not optimizing, | |
2301 | it should be possible for the user to alter a variable | |
2302 | with the debugger in between statements | |
2303 | and the next statement should reexamine the variable | |
2304 | to compute the condition codes. */ | |
2305 | ||
30f5e9f5 | 2306 | if (optimize) |
3cf2715d | 2307 | { |
30f5e9f5 RK |
2308 | if (set |
2309 | && GET_CODE (SET_DEST (set)) == CC0 | |
2310 | && insn != last_ignored_compare) | |
3cf2715d | 2311 | { |
30f5e9f5 | 2312 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
49d801d3 | 2313 | SET_SRC (set) = alter_subreg (&SET_SRC (set)); |
30f5e9f5 RK |
2314 | else if (GET_CODE (SET_SRC (set)) == COMPARE) |
2315 | { | |
2316 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2317 | XEXP (SET_SRC (set), 0) | |
49d801d3 | 2318 | = alter_subreg (&XEXP (SET_SRC (set), 0)); |
30f5e9f5 RK |
2319 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2320 | XEXP (SET_SRC (set), 1) | |
49d801d3 | 2321 | = alter_subreg (&XEXP (SET_SRC (set), 1)); |
30f5e9f5 RK |
2322 | } |
2323 | if ((cc_status.value1 != 0 | |
2324 | && rtx_equal_p (SET_SRC (set), cc_status.value1)) | |
2325 | || (cc_status.value2 != 0 | |
2326 | && rtx_equal_p (SET_SRC (set), cc_status.value2))) | |
3cf2715d | 2327 | { |
30f5e9f5 | 2328 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2329 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2330 | /* or if anything in it is volatile. */ |
2331 | && ! volatile_refs_p (PATTERN (insn))) | |
2332 | { | |
2333 | /* We don't really delete the insn; just ignore it. */ | |
2334 | last_ignored_compare = insn; | |
2335 | break; | |
2336 | } | |
3cf2715d DE |
2337 | } |
2338 | } | |
2339 | } | |
2340 | #endif | |
2341 | ||
3cf2715d DE |
2342 | #ifdef HAVE_cc0 |
2343 | /* If this is a conditional branch, maybe modify it | |
2344 | if the cc's are in a nonstandard state | |
2345 | so that it accomplishes the same thing that it would | |
2346 | do straightforwardly if the cc's were set up normally. */ | |
2347 | ||
2348 | if (cc_status.flags != 0 | |
4b4bf941 | 2349 | && JUMP_P (insn) |
3cf2715d DE |
2350 | && GET_CODE (body) == SET |
2351 | && SET_DEST (body) == pc_rtx | |
2352 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2353 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2354 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2355 | { |
2356 | /* This function may alter the contents of its argument | |
2357 | and clear some of the cc_status.flags bits. | |
2358 | It may also return 1 meaning condition now always true | |
2359 | or -1 meaning condition now always false | |
2360 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2361 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2362 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2363 | with its then-operand or its else-operand. */ | |
2364 | if (result == 1) | |
2365 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2366 | if (result == -1) | |
2367 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2368 | ||
2369 | /* The jump is now either unconditional or a no-op. | |
2370 | If it has become a no-op, don't try to output it. | |
2371 | (It would not be recognized.) */ | |
2372 | if (SET_SRC (body) == pc_rtx) | |
2373 | { | |
ca6c03ca | 2374 | delete_insn (insn); |
3cf2715d DE |
2375 | break; |
2376 | } | |
2377 | else if (GET_CODE (SET_SRC (body)) == RETURN) | |
2378 | /* Replace (set (pc) (return)) with (return). */ | |
2379 | PATTERN (insn) = body = SET_SRC (body); | |
2380 | ||
2381 | /* Rerecognize the instruction if it has changed. */ | |
2382 | if (result != 0) | |
2383 | INSN_CODE (insn) = -1; | |
2384 | } | |
2385 | ||
604e4ce3 | 2386 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2387 | are in a nonstandard state so that it accomplishes the same |
2388 | thing that it would do straightforwardly if the cc's were | |
2389 | set up normally. */ | |
2390 | if (cc_status.flags != 0 | |
2391 | && NONJUMP_INSN_P (insn) | |
2392 | && GET_CODE (body) == TRAP_IF | |
2393 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2394 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2395 | { | |
2396 | /* This function may alter the contents of its argument | |
2397 | and clear some of the cc_status.flags bits. | |
2398 | It may also return 1 meaning condition now always true | |
2399 | or -1 meaning condition now always false | |
2400 | or 2 meaning condition nontrivial but altered. */ | |
2401 | int result = alter_cond (TRAP_CONDITION (body)); | |
2402 | ||
2403 | /* If TRAP_CONDITION has become always false, delete the | |
2404 | instruction. */ | |
2405 | if (result == -1) | |
2406 | { | |
2407 | delete_insn (insn); | |
2408 | break; | |
2409 | } | |
2410 | ||
2411 | /* If TRAP_CONDITION has become always true, replace | |
2412 | TRAP_CONDITION with const_true_rtx. */ | |
2413 | if (result == 1) | |
2414 | TRAP_CONDITION (body) = const_true_rtx; | |
2415 | ||
2416 | /* Rerecognize the instruction if it has changed. */ | |
2417 | if (result != 0) | |
2418 | INSN_CODE (insn) = -1; | |
2419 | } | |
2420 | ||
3cf2715d | 2421 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2422 | condition codes without jumping and instructions that |
2423 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2424 | |
2425 | if (cc_status.flags != 0 | |
b88c92cc | 2426 | && set != 0) |
3cf2715d | 2427 | { |
462da2af | 2428 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2429 | |
4b4bf941 | 2430 | if (!JUMP_P (insn) |
b88c92cc | 2431 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2432 | { |
b88c92cc RK |
2433 | cond_rtx = XEXP (SET_SRC (set), 0); |
2434 | then_rtx = XEXP (SET_SRC (set), 1); | |
2435 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2436 | } |
2437 | else | |
2438 | { | |
b88c92cc | 2439 | cond_rtx = SET_SRC (set); |
462da2af SC |
2440 | then_rtx = const_true_rtx; |
2441 | else_rtx = const0_rtx; | |
2442 | } | |
f5d927c0 | 2443 | |
462da2af | 2444 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2445 | { |
2446 | case GTU: | |
2447 | case GT: | |
2448 | case LTU: | |
2449 | case LT: | |
2450 | case GEU: | |
2451 | case GE: | |
2452 | case LEU: | |
2453 | case LE: | |
2454 | case EQ: | |
2455 | case NE: | |
2456 | { | |
b3694847 | 2457 | int result; |
462da2af | 2458 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2459 | break; |
462da2af | 2460 | result = alter_cond (cond_rtx); |
3cf2715d | 2461 | if (result == 1) |
b88c92cc | 2462 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2463 | else if (result == -1) |
b88c92cc | 2464 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2465 | else if (result == 2) |
2466 | INSN_CODE (insn) = -1; | |
b88c92cc | 2467 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2468 | delete_insn (insn); |
3cf2715d | 2469 | } |
e9a25f70 JL |
2470 | break; |
2471 | ||
2472 | default: | |
2473 | break; | |
3cf2715d DE |
2474 | } |
2475 | } | |
462da2af | 2476 | |
3cf2715d DE |
2477 | #endif |
2478 | ||
ede7cd44 | 2479 | #ifdef HAVE_peephole |
3cf2715d DE |
2480 | /* Do machine-specific peephole optimizations if desired. */ |
2481 | ||
2482 | if (optimize && !flag_no_peephole && !nopeepholes) | |
2483 | { | |
2484 | rtx next = peephole (insn); | |
2485 | /* When peepholing, if there were notes within the peephole, | |
2486 | emit them before the peephole. */ | |
2487 | if (next != 0 && next != NEXT_INSN (insn)) | |
2488 | { | |
a2785739 | 2489 | rtx note, prev = PREV_INSN (insn); |
3cf2715d DE |
2490 | |
2491 | for (note = NEXT_INSN (insn); note != next; | |
2492 | note = NEXT_INSN (note)) | |
c9d691e9 | 2493 | final_scan_insn (note, file, optimize, nopeepholes, seen); |
a2785739 ILT |
2494 | |
2495 | /* Put the notes in the proper position for a later | |
2496 | rescan. For example, the SH target can do this | |
2497 | when generating a far jump in a delayed branch | |
2498 | sequence. */ | |
2499 | note = NEXT_INSN (insn); | |
2500 | PREV_INSN (note) = prev; | |
2501 | NEXT_INSN (prev) = note; | |
2502 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2503 | PREV_INSN (insn) = PREV_INSN (next); | |
2504 | NEXT_INSN (insn) = next; | |
2505 | PREV_INSN (next) = insn; | |
3cf2715d DE |
2506 | } |
2507 | ||
2508 | /* PEEPHOLE might have changed this. */ | |
2509 | body = PATTERN (insn); | |
2510 | } | |
ede7cd44 | 2511 | #endif |
3cf2715d DE |
2512 | |
2513 | /* Try to recognize the instruction. | |
2514 | If successful, verify that the operands satisfy the | |
2515 | constraints for the instruction. Crash if they don't, | |
2516 | since `reload' should have changed them so that they do. */ | |
2517 | ||
2518 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2519 | cleanup_subreg_operands (insn); |
3cf2715d | 2520 | |
dd3f0101 KH |
2521 | /* Dump the insn in the assembly for debugging. */ |
2522 | if (flag_dump_rtl_in_asm) | |
2523 | { | |
2524 | print_rtx_head = ASM_COMMENT_START; | |
2525 | print_rtl_single (asm_out_file, insn); | |
2526 | print_rtx_head = ""; | |
2527 | } | |
b9f22704 | 2528 | |
6c698a6d | 2529 | if (! constrain_operands_cached (1)) |
3cf2715d | 2530 | fatal_insn_not_found (insn); |
3cf2715d DE |
2531 | |
2532 | /* Some target machines need to prescan each insn before | |
2533 | it is output. */ | |
2534 | ||
2535 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2536 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2537 | #endif |
2538 | ||
afe48e06 RH |
2539 | #ifdef HAVE_conditional_execution |
2540 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
2541 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); | |
afe48e06 RH |
2542 | #endif |
2543 | ||
3cf2715d DE |
2544 | #ifdef HAVE_cc0 |
2545 | cc_prev_status = cc_status; | |
2546 | ||
2547 | /* Update `cc_status' for this instruction. | |
2548 | The instruction's output routine may change it further. | |
2549 | If the output routine for a jump insn needs to depend | |
2550 | on the cc status, it should look at cc_prev_status. */ | |
2551 | ||
2552 | NOTICE_UPDATE_CC (body, insn); | |
2553 | #endif | |
2554 | ||
b1a9f6a0 | 2555 | current_output_insn = debug_insn = insn; |
3cf2715d | 2556 | |
f73ad30e | 2557 | #if defined (DWARF2_UNWIND_INFO) |
4b4bf941 | 2558 | if (CALL_P (insn) && dwarf2out_do_frame ()) |
e0c0490b | 2559 | dwarf2out_frame_debug (insn, false); |
b57d9225 JM |
2560 | #endif |
2561 | ||
4bbf910e RH |
2562 | /* Find the proper template for this insn. */ |
2563 | template = get_insn_template (insn_code_number, insn); | |
3cf2715d | 2564 | |
4bbf910e RH |
2565 | /* If the C code returns 0, it means that it is a jump insn |
2566 | which follows a deleted test insn, and that test insn | |
2567 | needs to be reinserted. */ | |
3cf2715d DE |
2568 | if (template == 0) |
2569 | { | |
efd0378b HPN |
2570 | rtx prev; |
2571 | ||
0bccc606 | 2572 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2573 | |
2574 | /* We have already processed the notes between the setter and | |
2575 | the user. Make sure we don't process them again, this is | |
2576 | particularly important if one of the notes is a block | |
2577 | scope note or an EH note. */ | |
2578 | for (prev = insn; | |
2579 | prev != last_ignored_compare; | |
2580 | prev = PREV_INSN (prev)) | |
2581 | { | |
4b4bf941 | 2582 | if (NOTE_P (prev)) |
ca6c03ca | 2583 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2584 | } |
2585 | ||
2586 | return prev; | |
3cf2715d DE |
2587 | } |
2588 | ||
2589 | /* If the template is the string "#", it means that this insn must | |
2590 | be split. */ | |
2591 | if (template[0] == '#' && template[1] == '\0') | |
2592 | { | |
2593 | rtx new = try_split (body, insn, 0); | |
2594 | ||
2595 | /* If we didn't split the insn, go away. */ | |
2596 | if (new == insn && PATTERN (new) == body) | |
c725bd79 | 2597 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2598 | |
3d14e82f JW |
2599 | #ifdef HAVE_ATTR_length |
2600 | /* This instruction should have been split in shorten_branches, | |
2601 | to ensure that we would have valid length info for the | |
2602 | splitees. */ | |
0bccc606 | 2603 | gcc_unreachable (); |
3d14e82f JW |
2604 | #endif |
2605 | ||
3cf2715d DE |
2606 | return new; |
2607 | } | |
f5d927c0 | 2608 | |
951120ea PB |
2609 | #ifdef TARGET_UNWIND_INFO |
2610 | /* ??? This will put the directives in the wrong place if | |
2611 | get_insn_template outputs assembly directly. However calling it | |
2612 | before get_insn_template breaks if the insns is split. */ | |
2613 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
ce152ef8 | 2614 | #endif |
3cf2715d | 2615 | |
951120ea | 2616 | /* Output assembler code from the template. */ |
1ccbefce | 2617 | output_asm_insn (template, recog_data.operand); |
3cf2715d | 2618 | |
d660cefe RS |
2619 | /* If necessary, report the effect that the instruction has on |
2620 | the unwind info. We've already done this for delay slots | |
2621 | and call instructions. */ | |
0021b564 | 2622 | #if defined (DWARF2_UNWIND_INFO) |
e0c0490b | 2623 | if (final_sequence == 0 |
d660cefe RS |
2624 | #if !defined (HAVE_prologue) |
2625 | && !ACCUMULATE_OUTGOING_ARGS | |
2626 | #endif | |
fbfa55b0 | 2627 | && dwarf2out_do_frame ()) |
e0c0490b | 2628 | dwarf2out_frame_debug (insn, true); |
0021b564 | 2629 | #endif |
469ac993 | 2630 | |
b1a9f6a0 | 2631 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2632 | } |
2633 | } | |
2634 | return NEXT_INSN (insn); | |
2635 | } | |
2636 | \f | |
b8176fe4 | 2637 | /* Return whether a source line note needs to be emitted before INSN. */ |
3cf2715d | 2638 | |
0435312e | 2639 | static bool |
6cf9ac28 | 2640 | notice_source_line (rtx insn) |
3cf2715d | 2641 | { |
d752cfdb JJ |
2642 | const char *filename; |
2643 | int linenum; | |
2644 | ||
2645 | if (override_filename) | |
2646 | { | |
2647 | filename = override_filename; | |
2648 | linenum = override_linenum; | |
2649 | } | |
2650 | else | |
2651 | { | |
2652 | filename = insn_file (insn); | |
2653 | linenum = insn_line (insn); | |
2654 | } | |
3cf2715d | 2655 | |
b8176fe4 EB |
2656 | if (filename |
2657 | && (force_source_line | |
2658 | || filename != last_filename | |
2659 | || last_linenum != linenum)) | |
0435312e | 2660 | { |
b8176fe4 | 2661 | force_source_line = false; |
0435312e JH |
2662 | last_filename = filename; |
2663 | last_linenum = linenum; | |
2664 | high_block_linenum = MAX (last_linenum, high_block_linenum); | |
2665 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
2666 | return true; | |
2667 | } | |
2668 | return false; | |
3cf2715d DE |
2669 | } |
2670 | \f | |
0304f787 JL |
2671 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2672 | directly to the desired hard register. */ | |
f5d927c0 | 2673 | |
0304f787 | 2674 | void |
6cf9ac28 | 2675 | cleanup_subreg_operands (rtx insn) |
0304f787 | 2676 | { |
f62a15e3 | 2677 | int i; |
6fb5fa3c | 2678 | bool changed = false; |
6c698a6d | 2679 | extract_insn_cached (insn); |
1ccbefce | 2680 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2681 | { |
2067c116 | 2682 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
2683 | for a SUBREG: the underlying object might have been changed |
2684 | already if we are inside a match_operator expression that | |
2685 | matches the else clause. Instead we test the underlying | |
2686 | expression directly. */ | |
2687 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c DB |
2688 | { |
2689 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); | |
2690 | changed = true; | |
2691 | } | |
1ccbefce | 2692 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 2693 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 2694 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 2695 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
2696 | } |
2697 | ||
1ccbefce | 2698 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 2699 | { |
1ccbefce | 2700 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c DB |
2701 | { |
2702 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); | |
2703 | changed = true; | |
2704 | } | |
1ccbefce | 2705 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 2706 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 2707 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 2708 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 2709 | } |
6fb5fa3c DB |
2710 | if (changed) |
2711 | df_insn_rescan (insn); | |
0304f787 JL |
2712 | } |
2713 | ||
3cf2715d DE |
2714 | /* If X is a SUBREG, replace it with a REG or a MEM, |
2715 | based on the thing it is a subreg of. */ | |
2716 | ||
2717 | rtx | |
6cf9ac28 | 2718 | alter_subreg (rtx *xp) |
3cf2715d | 2719 | { |
49d801d3 | 2720 | rtx x = *xp; |
b3694847 | 2721 | rtx y = SUBREG_REG (x); |
f5963e61 | 2722 | |
49d801d3 JH |
2723 | /* simplify_subreg does not remove subreg from volatile references. |
2724 | We are required to. */ | |
3c0cb5de | 2725 | if (MEM_P (y)) |
fd326ba8 UW |
2726 | { |
2727 | int offset = SUBREG_BYTE (x); | |
2728 | ||
2729 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
2730 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
2731 | if (offset == 0 | |
2732 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
2733 | { | |
2734 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
2735 | - GET_MODE_SIZE (GET_MODE (x)); | |
2736 | if (WORDS_BIG_ENDIAN) | |
2737 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
2738 | if (BYTES_BIG_ENDIAN) | |
2739 | offset += difference % UNITS_PER_WORD; | |
2740 | } | |
2741 | ||
2742 | *xp = adjust_address (y, GET_MODE (x), offset); | |
2743 | } | |
49d801d3 | 2744 | else |
fea54805 RK |
2745 | { |
2746 | rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y), | |
2747 | SUBREG_BYTE (x)); | |
2748 | ||
2749 | if (new != 0) | |
2750 | *xp = new; | |
bbe37912 | 2751 | else if (REG_P (y)) |
fea54805 | 2752 | { |
0bccc606 | 2753 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
2754 | unsigned int regno; |
2755 | HOST_WIDE_INT offset; | |
2756 | ||
2757 | regno = subreg_regno (x); | |
2758 | if (subreg_lowpart_p (x)) | |
2759 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
2760 | else | |
2761 | offset = SUBREG_BYTE (x); | |
2762 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 2763 | } |
fea54805 RK |
2764 | } |
2765 | ||
49d801d3 | 2766 | return *xp; |
3cf2715d DE |
2767 | } |
2768 | ||
2769 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
2770 | ||
2771 | static rtx | |
6fb5fa3c | 2772 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 2773 | { |
49d801d3 | 2774 | rtx x = *xp; |
3cf2715d DE |
2775 | switch (GET_CODE (x)) |
2776 | { | |
2777 | case PLUS: | |
2778 | case MULT: | |
beed8fc0 | 2779 | case AND: |
6fb5fa3c DB |
2780 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
2781 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
2782 | break; |
2783 | ||
2784 | case MEM: | |
beed8fc0 | 2785 | case ZERO_EXTEND: |
6fb5fa3c | 2786 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
2787 | break; |
2788 | ||
2789 | case SUBREG: | |
6fb5fa3c | 2790 | *changed = true; |
49d801d3 | 2791 | return alter_subreg (xp); |
f5d927c0 | 2792 | |
e9a25f70 JL |
2793 | default: |
2794 | break; | |
3cf2715d DE |
2795 | } |
2796 | ||
5bc72aeb | 2797 | return *xp; |
3cf2715d DE |
2798 | } |
2799 | \f | |
2800 | #ifdef HAVE_cc0 | |
2801 | ||
2802 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
2803 | as required by the bits that are set in cc_status.flags. | |
2804 | Not all of the bits there can be handled at this level in all cases. | |
2805 | ||
2806 | The value is normally 0. | |
2807 | 1 means that the condition has become always true. | |
2808 | -1 means that the condition has become always false. | |
2809 | 2 means that COND has been altered. */ | |
2810 | ||
2811 | static int | |
6cf9ac28 | 2812 | alter_cond (rtx cond) |
3cf2715d DE |
2813 | { |
2814 | int value = 0; | |
2815 | ||
2816 | if (cc_status.flags & CC_REVERSED) | |
2817 | { | |
2818 | value = 2; | |
2819 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
2820 | } | |
2821 | ||
2822 | if (cc_status.flags & CC_INVERTED) | |
2823 | { | |
2824 | value = 2; | |
2825 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
2826 | } | |
2827 | ||
2828 | if (cc_status.flags & CC_NOT_POSITIVE) | |
2829 | switch (GET_CODE (cond)) | |
2830 | { | |
2831 | case LE: | |
2832 | case LEU: | |
2833 | case GEU: | |
2834 | /* Jump becomes unconditional. */ | |
2835 | return 1; | |
2836 | ||
2837 | case GT: | |
2838 | case GTU: | |
2839 | case LTU: | |
2840 | /* Jump becomes no-op. */ | |
2841 | return -1; | |
2842 | ||
2843 | case GE: | |
2844 | PUT_CODE (cond, EQ); | |
2845 | value = 2; | |
2846 | break; | |
2847 | ||
2848 | case LT: | |
2849 | PUT_CODE (cond, NE); | |
2850 | value = 2; | |
2851 | break; | |
f5d927c0 | 2852 | |
e9a25f70 JL |
2853 | default: |
2854 | break; | |
3cf2715d DE |
2855 | } |
2856 | ||
2857 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
2858 | switch (GET_CODE (cond)) | |
2859 | { | |
2860 | case GE: | |
2861 | case GEU: | |
2862 | /* Jump becomes unconditional. */ | |
2863 | return 1; | |
2864 | ||
2865 | case LT: | |
2866 | case LTU: | |
2867 | /* Jump becomes no-op. */ | |
2868 | return -1; | |
2869 | ||
2870 | case LE: | |
2871 | case LEU: | |
2872 | PUT_CODE (cond, EQ); | |
2873 | value = 2; | |
2874 | break; | |
2875 | ||
2876 | case GT: | |
2877 | case GTU: | |
2878 | PUT_CODE (cond, NE); | |
2879 | value = 2; | |
2880 | break; | |
f5d927c0 | 2881 | |
e9a25f70 JL |
2882 | default: |
2883 | break; | |
3cf2715d DE |
2884 | } |
2885 | ||
2886 | if (cc_status.flags & CC_NO_OVERFLOW) | |
2887 | switch (GET_CODE (cond)) | |
2888 | { | |
2889 | case GEU: | |
2890 | /* Jump becomes unconditional. */ | |
2891 | return 1; | |
2892 | ||
2893 | case LEU: | |
2894 | PUT_CODE (cond, EQ); | |
2895 | value = 2; | |
2896 | break; | |
2897 | ||
2898 | case GTU: | |
2899 | PUT_CODE (cond, NE); | |
2900 | value = 2; | |
2901 | break; | |
2902 | ||
2903 | case LTU: | |
2904 | /* Jump becomes no-op. */ | |
2905 | return -1; | |
f5d927c0 | 2906 | |
e9a25f70 JL |
2907 | default: |
2908 | break; | |
3cf2715d DE |
2909 | } |
2910 | ||
2911 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
2912 | switch (GET_CODE (cond)) | |
2913 | { | |
e9a25f70 | 2914 | default: |
0bccc606 | 2915 | gcc_unreachable (); |
3cf2715d DE |
2916 | |
2917 | case NE: | |
2918 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
2919 | value = 2; | |
2920 | break; | |
2921 | ||
2922 | case EQ: | |
2923 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
2924 | value = 2; | |
2925 | break; | |
2926 | } | |
2927 | ||
2928 | if (cc_status.flags & CC_NOT_SIGNED) | |
2929 | /* The flags are valid if signed condition operators are converted | |
2930 | to unsigned. */ | |
2931 | switch (GET_CODE (cond)) | |
2932 | { | |
2933 | case LE: | |
2934 | PUT_CODE (cond, LEU); | |
2935 | value = 2; | |
2936 | break; | |
2937 | ||
2938 | case LT: | |
2939 | PUT_CODE (cond, LTU); | |
2940 | value = 2; | |
2941 | break; | |
2942 | ||
2943 | case GT: | |
2944 | PUT_CODE (cond, GTU); | |
2945 | value = 2; | |
2946 | break; | |
2947 | ||
2948 | case GE: | |
2949 | PUT_CODE (cond, GEU); | |
2950 | value = 2; | |
2951 | break; | |
e9a25f70 JL |
2952 | |
2953 | default: | |
2954 | break; | |
3cf2715d DE |
2955 | } |
2956 | ||
2957 | return value; | |
2958 | } | |
2959 | #endif | |
2960 | \f | |
2961 | /* Report inconsistency between the assembler template and the operands. | |
2962 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
2963 | ||
2964 | void | |
4b794eaf | 2965 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 2966 | { |
a52453cc PT |
2967 | char *fmt_string; |
2968 | char *new_message; | |
fd478a0a | 2969 | const char *pfx_str; |
e34d07f2 | 2970 | va_list ap; |
6cf9ac28 | 2971 | |
4b794eaf | 2972 | va_start (ap, cmsgid); |
a52453cc | 2973 | |
9e637a26 | 2974 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
4b794eaf | 2975 | asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); |
a52453cc | 2976 | vasprintf (&new_message, fmt_string, ap); |
dd3f0101 | 2977 | |
3cf2715d | 2978 | if (this_is_asm_operands) |
a52453cc | 2979 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 2980 | else |
a52453cc PT |
2981 | internal_error ("%s", new_message); |
2982 | ||
2983 | free (fmt_string); | |
2984 | free (new_message); | |
e34d07f2 | 2985 | va_end (ap); |
3cf2715d DE |
2986 | } |
2987 | \f | |
2988 | /* Output of assembler code from a template, and its subroutines. */ | |
2989 | ||
0d4903b8 RK |
2990 | /* Annotate the assembly with a comment describing the pattern and |
2991 | alternative used. */ | |
2992 | ||
2993 | static void | |
6cf9ac28 | 2994 | output_asm_name (void) |
0d4903b8 RK |
2995 | { |
2996 | if (debug_insn) | |
2997 | { | |
2998 | int num = INSN_CODE (debug_insn); | |
2999 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3000 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3001 | insn_data[num].name); | |
3002 | if (insn_data[num].n_alternatives > 1) | |
3003 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
3004 | #ifdef HAVE_ATTR_length | |
3005 | fprintf (asm_out_file, "\t[length = %d]", | |
3006 | get_attr_length (debug_insn)); | |
3007 | #endif | |
3008 | /* Clear this so only the first assembler insn | |
3009 | of any rtl insn will get the special comment for -dp. */ | |
3010 | debug_insn = 0; | |
3011 | } | |
3012 | } | |
3013 | ||
998d7deb RH |
3014 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3015 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3016 | corresponds to the address of the object and 0 if to the object. */ |
3017 | ||
3018 | static tree | |
6cf9ac28 | 3019 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3020 | { |
998d7deb | 3021 | tree expr; |
c5adc06a RK |
3022 | int inner_addressp; |
3023 | ||
3024 | *paddressp = 0; | |
3025 | ||
f8cfc6aa | 3026 | if (REG_P (op)) |
a560d4d4 | 3027 | return REG_EXPR (op); |
3c0cb5de | 3028 | else if (!MEM_P (op)) |
c5adc06a RK |
3029 | return 0; |
3030 | ||
998d7deb RH |
3031 | if (MEM_EXPR (op) != 0) |
3032 | return MEM_EXPR (op); | |
c5adc06a RK |
3033 | |
3034 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3035 | *paddressp = 1; | |
3036 | op = XEXP (op, 0); | |
3037 | ||
3038 | /* First check if we have a decl for the address, then look at the right side | |
3039 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3040 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3041 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3042 | return expr; | |
c5adc06a | 3043 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3044 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3045 | return expr; | |
c5adc06a | 3046 | |
ec8e098d PB |
3047 | while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY |
3048 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) | |
c5adc06a RK |
3049 | op = XEXP (op, 0); |
3050 | ||
998d7deb RH |
3051 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3052 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3053 | } |
ff81832f | 3054 | |
4f9b4029 RK |
3055 | /* Output operand names for assembler instructions. OPERANDS is the |
3056 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3057 | is the number of operands to write. */ | |
3058 | ||
3059 | static void | |
6cf9ac28 | 3060 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3061 | { |
3062 | int wrote = 0; | |
3063 | int i; | |
3064 | ||
3065 | for (i = 0; i < nops; i++) | |
3066 | { | |
3067 | int addressp; | |
a560d4d4 JH |
3068 | rtx op = operands[oporder[i]]; |
3069 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3070 | |
a560d4d4 JH |
3071 | fprintf (asm_out_file, "%c%s", |
3072 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3073 | wrote = 1; | |
998d7deb | 3074 | if (expr) |
4f9b4029 | 3075 | { |
a560d4d4 | 3076 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3077 | addressp ? "*" : ""); |
3078 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3079 | wrote = 1; |
3080 | } | |
a560d4d4 JH |
3081 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3082 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3083 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3084 | } |
3085 | } | |
3086 | ||
3cf2715d DE |
3087 | /* Output text from TEMPLATE to the assembler output file, |
3088 | obeying %-directions to substitute operands taken from | |
3089 | the vector OPERANDS. | |
3090 | ||
3091 | %N (for N a digit) means print operand N in usual manner. | |
3092 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3093 | and print the label name with no punctuation. | |
3094 | %cN means require operand N to be a constant | |
3095 | and print the constant expression with no punctuation. | |
3096 | %aN means expect operand N to be a memory address | |
3097 | (not a memory reference!) and print a reference | |
3098 | to that address. | |
3099 | %nN means expect operand N to be a constant | |
3100 | and print a constant expression for minus the value | |
3101 | of the operand, with no other punctuation. */ | |
3102 | ||
3103 | void | |
6cf9ac28 | 3104 | output_asm_insn (const char *template, rtx *operands) |
3cf2715d | 3105 | { |
b3694847 SS |
3106 | const char *p; |
3107 | int c; | |
8554d9a4 JJ |
3108 | #ifdef ASSEMBLER_DIALECT |
3109 | int dialect = 0; | |
3110 | #endif | |
0d4903b8 | 3111 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3112 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3113 | int ops = 0; |
3cf2715d DE |
3114 | |
3115 | /* An insn may return a null string template | |
3116 | in a case where no assembler code is needed. */ | |
3117 | if (*template == 0) | |
3118 | return; | |
3119 | ||
4f9b4029 | 3120 | memset (opoutput, 0, sizeof opoutput); |
3cf2715d DE |
3121 | p = template; |
3122 | putc ('\t', asm_out_file); | |
3123 | ||
3124 | #ifdef ASM_OUTPUT_OPCODE | |
3125 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3126 | #endif | |
3127 | ||
b729186a | 3128 | while ((c = *p++)) |
3cf2715d DE |
3129 | switch (c) |
3130 | { | |
3cf2715d | 3131 | case '\n': |
4f9b4029 RK |
3132 | if (flag_verbose_asm) |
3133 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3134 | if (flag_print_asm_name) |
3135 | output_asm_name (); | |
3136 | ||
4f9b4029 RK |
3137 | ops = 0; |
3138 | memset (opoutput, 0, sizeof opoutput); | |
3139 | ||
3cf2715d | 3140 | putc (c, asm_out_file); |
cb649530 | 3141 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3142 | while ((c = *p) == '\t') |
3143 | { | |
3144 | putc (c, asm_out_file); | |
3145 | p++; | |
3146 | } | |
3147 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3148 | #endif |
cb649530 | 3149 | break; |
3cf2715d DE |
3150 | |
3151 | #ifdef ASSEMBLER_DIALECT | |
3152 | case '{': | |
b729186a | 3153 | { |
b3694847 | 3154 | int i; |
f5d927c0 | 3155 | |
8554d9a4 JJ |
3156 | if (dialect) |
3157 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3158 | else | |
3159 | dialect = 1; | |
3160 | ||
b729186a JL |
3161 | /* If we want the first dialect, do nothing. Otherwise, skip |
3162 | DIALECT_NUMBER of strings ending with '|'. */ | |
3163 | for (i = 0; i < dialect_number; i++) | |
3164 | { | |
463a8384 | 3165 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3166 | ; |
463a8384 BS |
3167 | if (*p == '}') |
3168 | break; | |
b729186a JL |
3169 | if (*p == '|') |
3170 | p++; | |
3171 | } | |
8554d9a4 JJ |
3172 | |
3173 | if (*p == '\0') | |
3174 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
b729186a | 3175 | } |
3cf2715d DE |
3176 | break; |
3177 | ||
3178 | case '|': | |
8554d9a4 JJ |
3179 | if (dialect) |
3180 | { | |
3181 | /* Skip to close brace. */ | |
3182 | do | |
3183 | { | |
3184 | if (*p == '\0') | |
3185 | { | |
3186 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3187 | break; | |
3188 | } | |
ff81832f | 3189 | } |
8554d9a4 JJ |
3190 | while (*p++ != '}'); |
3191 | dialect = 0; | |
3192 | } | |
3193 | else | |
3194 | putc (c, asm_out_file); | |
3cf2715d DE |
3195 | break; |
3196 | ||
3197 | case '}': | |
8554d9a4 JJ |
3198 | if (! dialect) |
3199 | putc (c, asm_out_file); | |
3200 | dialect = 0; | |
3cf2715d DE |
3201 | break; |
3202 | #endif | |
3203 | ||
3204 | case '%': | |
3205 | /* %% outputs a single %. */ | |
3206 | if (*p == '%') | |
3207 | { | |
3208 | p++; | |
3209 | putc (c, asm_out_file); | |
3210 | } | |
3211 | /* %= outputs a number which is unique to each insn in the entire | |
3212 | compilation. This is useful for making local labels that are | |
3213 | referred to more than once in a given insn. */ | |
3214 | else if (*p == '=') | |
3215 | { | |
3216 | p++; | |
3217 | fprintf (asm_out_file, "%d", insn_counter); | |
3218 | } | |
3219 | /* % followed by a letter and some digits | |
3220 | outputs an operand in a special way depending on the letter. | |
3221 | Letters `acln' are implemented directly. | |
3222 | Other letters are passed to `output_operand' so that | |
3223 | the PRINT_OPERAND macro can define them. */ | |
0df6c2c7 | 3224 | else if (ISALPHA (*p)) |
3cf2715d DE |
3225 | { |
3226 | int letter = *p++; | |
c383c15f GK |
3227 | unsigned long opnum; |
3228 | char *endptr; | |
b0efb46b | 3229 | |
c383c15f GK |
3230 | opnum = strtoul (p, &endptr, 10); |
3231 | ||
3232 | if (endptr == p) | |
3233 | output_operand_lossage ("operand number missing " | |
3234 | "after %%-letter"); | |
3235 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3236 | output_operand_lossage ("operand number out of range"); |
3237 | else if (letter == 'l') | |
c383c15f | 3238 | output_asm_label (operands[opnum]); |
3cf2715d | 3239 | else if (letter == 'a') |
c383c15f | 3240 | output_address (operands[opnum]); |
3cf2715d DE |
3241 | else if (letter == 'c') |
3242 | { | |
c383c15f GK |
3243 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3244 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3245 | else |
c383c15f | 3246 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3247 | } |
3248 | else if (letter == 'n') | |
3249 | { | |
c383c15f | 3250 | if (GET_CODE (operands[opnum]) == CONST_INT) |
21e3a81b | 3251 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3252 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3253 | else |
3254 | { | |
3255 | putc ('-', asm_out_file); | |
c383c15f | 3256 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3257 | } |
3258 | } | |
3259 | else | |
c383c15f | 3260 | output_operand (operands[opnum], letter); |
f5d927c0 | 3261 | |
c383c15f | 3262 | if (!opoutput[opnum]) |
dc9d0b14 | 3263 | oporder[ops++] = opnum; |
c383c15f | 3264 | opoutput[opnum] = 1; |
0d4903b8 | 3265 | |
c383c15f GK |
3266 | p = endptr; |
3267 | c = *p; | |
3cf2715d DE |
3268 | } |
3269 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3270 | else if (ISDIGIT (*p)) |
3cf2715d | 3271 | { |
c383c15f GK |
3272 | unsigned long opnum; |
3273 | char *endptr; | |
b0efb46b | 3274 | |
c383c15f GK |
3275 | opnum = strtoul (p, &endptr, 10); |
3276 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3277 | output_operand_lossage ("operand number out of range"); |
3278 | else | |
c383c15f | 3279 | output_operand (operands[opnum], 0); |
0d4903b8 | 3280 | |
c383c15f | 3281 | if (!opoutput[opnum]) |
dc9d0b14 | 3282 | oporder[ops++] = opnum; |
c383c15f | 3283 | opoutput[opnum] = 1; |
4f9b4029 | 3284 | |
c383c15f GK |
3285 | p = endptr; |
3286 | c = *p; | |
3cf2715d DE |
3287 | } |
3288 | /* % followed by punctuation: output something for that | |
3289 | punctuation character alone, with no operand. | |
3290 | The PRINT_OPERAND macro decides what is actually done. */ | |
3291 | #ifdef PRINT_OPERAND_PUNCT_VALID_P | |
f5d927c0 | 3292 | else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) |
3cf2715d DE |
3293 | output_operand (NULL_RTX, *p++); |
3294 | #endif | |
3295 | else | |
3296 | output_operand_lossage ("invalid %%-code"); | |
3297 | break; | |
3298 | ||
3299 | default: | |
3300 | putc (c, asm_out_file); | |
3301 | } | |
3302 | ||
0d4903b8 RK |
3303 | /* Write out the variable names for operands, if we know them. */ |
3304 | if (flag_verbose_asm) | |
4f9b4029 | 3305 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3306 | if (flag_print_asm_name) |
3307 | output_asm_name (); | |
3cf2715d DE |
3308 | |
3309 | putc ('\n', asm_out_file); | |
3310 | } | |
3311 | \f | |
3312 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3313 | ||
3314 | void | |
6cf9ac28 | 3315 | output_asm_label (rtx x) |
3cf2715d DE |
3316 | { |
3317 | char buf[256]; | |
3318 | ||
3319 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 | 3320 | x = XEXP (x, 0); |
4b4bf941 JQ |
3321 | if (LABEL_P (x) |
3322 | || (NOTE_P (x) | |
a38e7aa5 | 3323 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3324 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3325 | else | |
9e637a26 | 3326 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3327 | |
3328 | assemble_name (asm_out_file, buf); | |
3329 | } | |
3330 | ||
3331 | /* Print operand X using machine-dependent assembler syntax. | |
3332 | The macro PRINT_OPERAND is defined just to control this function. | |
3333 | CODE is a non-digit that preceded the operand-number in the % spec, | |
3334 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3335 | between the % and the digits. | |
3336 | When CODE is a non-letter, X is 0. | |
3337 | ||
3338 | The meanings of the letters are machine-dependent and controlled | |
3339 | by PRINT_OPERAND. */ | |
3340 | ||
3341 | static void | |
6cf9ac28 | 3342 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3343 | { |
3344 | if (x && GET_CODE (x) == SUBREG) | |
49d801d3 | 3345 | x = alter_subreg (&x); |
3cf2715d | 3346 | |
04c7ae48 | 3347 | /* X must not be a pseudo reg. */ |
0bccc606 | 3348 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
3cf2715d DE |
3349 | |
3350 | PRINT_OPERAND (asm_out_file, x, code); | |
3351 | } | |
3352 | ||
3353 | /* Print a memory reference operand for address X | |
3354 | using machine-dependent assembler syntax. | |
3355 | The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ | |
3356 | ||
3357 | void | |
6cf9ac28 | 3358 | output_address (rtx x) |
3cf2715d | 3359 | { |
6fb5fa3c DB |
3360 | bool changed = false; |
3361 | walk_alter_subreg (&x, &changed); | |
3cf2715d DE |
3362 | PRINT_OPERAND_ADDRESS (asm_out_file, x); |
3363 | } | |
3364 | \f | |
3365 | /* Print an integer constant expression in assembler syntax. | |
3366 | Addition and subtraction are the only arithmetic | |
3367 | that may appear in these expressions. */ | |
3368 | ||
3369 | void | |
6cf9ac28 | 3370 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3371 | { |
3372 | char buf[256]; | |
3373 | ||
3374 | restart: | |
3375 | switch (GET_CODE (x)) | |
3376 | { | |
3377 | case PC: | |
eac50d7a | 3378 | putc ('.', file); |
3cf2715d DE |
3379 | break; |
3380 | ||
3381 | case SYMBOL_REF: | |
21dad7e6 RH |
3382 | if (SYMBOL_REF_DECL (x)) |
3383 | mark_decl_referenced (SYMBOL_REF_DECL (x)); | |
99c8c61c AO |
3384 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3385 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3386 | #else | |
3cf2715d | 3387 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3388 | #endif |
3cf2715d DE |
3389 | break; |
3390 | ||
3391 | case LABEL_REF: | |
422be3c3 AO |
3392 | x = XEXP (x, 0); |
3393 | /* Fall through. */ | |
3cf2715d DE |
3394 | case CODE_LABEL: |
3395 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3396 | #ifdef ASM_OUTPUT_LABEL_REF |
3397 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3398 | #else | |
3cf2715d | 3399 | assemble_name (file, buf); |
2f0b7af6 | 3400 | #endif |
3cf2715d DE |
3401 | break; |
3402 | ||
3403 | case CONST_INT: | |
21e3a81b | 3404 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3405 | break; |
3406 | ||
3407 | case CONST: | |
3408 | /* This used to output parentheses around the expression, | |
3409 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3410 | output_addr_const (file, XEXP (x, 0)); | |
3411 | break; | |
3412 | ||
3413 | case CONST_DOUBLE: | |
3414 | if (GET_MODE (x) == VOIDmode) | |
3415 | { | |
3416 | /* We can use %d if the number is one word and positive. */ | |
3417 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3418 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3cf2715d | 3419 | CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x)); |
f5d927c0 | 3420 | else if (CONST_DOUBLE_LOW (x) < 0) |
21e3a81b | 3421 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x)); |
3cf2715d | 3422 | else |
21e3a81b | 3423 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3424 | } |
3425 | else | |
3426 | /* We can't handle floating point constants; | |
3427 | PRINT_OPERAND must handle them. */ | |
3428 | output_operand_lossage ("floating constant misused"); | |
3429 | break; | |
3430 | ||
14c931f1 CF |
3431 | case CONST_FIXED: |
3432 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_FIXED_VALUE_LOW (x)); | |
3433 | break; | |
3434 | ||
3cf2715d DE |
3435 | case PLUS: |
3436 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
3437 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
3438 | { | |
3439 | output_addr_const (file, XEXP (x, 1)); | |
3440 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3441 | fprintf (file, "+"); | |
3442 | output_addr_const (file, XEXP (x, 0)); | |
3443 | } | |
3444 | else | |
3445 | { | |
3446 | output_addr_const (file, XEXP (x, 0)); | |
08106825 AO |
3447 | if (GET_CODE (XEXP (x, 1)) != CONST_INT |
3448 | || INTVAL (XEXP (x, 1)) >= 0) | |
3cf2715d DE |
3449 | fprintf (file, "+"); |
3450 | output_addr_const (file, XEXP (x, 1)); | |
3451 | } | |
3452 | break; | |
3453 | ||
3454 | case MINUS: | |
3455 | /* Avoid outputting things like x-x or x+5-x, | |
3456 | since some assemblers can't handle that. */ | |
3457 | x = simplify_subtraction (x); | |
3458 | if (GET_CODE (x) != MINUS) | |
3459 | goto restart; | |
3460 | ||
3461 | output_addr_const (file, XEXP (x, 0)); | |
3462 | fprintf (file, "-"); | |
301d03af RS |
3463 | if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0) |
3464 | || GET_CODE (XEXP (x, 1)) == PC | |
3465 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3466 | output_addr_const (file, XEXP (x, 1)); | |
3467 | else | |
3cf2715d | 3468 | { |
17b53c33 | 3469 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3470 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3471 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3472 | } |
3cf2715d DE |
3473 | break; |
3474 | ||
3475 | case ZERO_EXTEND: | |
3476 | case SIGN_EXTEND: | |
fdf473ae | 3477 | case SUBREG: |
c01e4479 | 3478 | case TRUNCATE: |
3cf2715d DE |
3479 | output_addr_const (file, XEXP (x, 0)); |
3480 | break; | |
3481 | ||
3482 | default: | |
422be3c3 AO |
3483 | #ifdef OUTPUT_ADDR_CONST_EXTRA |
3484 | OUTPUT_ADDR_CONST_EXTRA (file, x, fail); | |
3485 | break; | |
3486 | ||
3487 | fail: | |
3488 | #endif | |
3cf2715d DE |
3489 | output_operand_lossage ("invalid expression as operand"); |
3490 | } | |
3491 | } | |
3492 | \f | |
3493 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. | |
3494 | %R prints the value of REGISTER_PREFIX. | |
3495 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3496 | %U prints the value of USER_LABEL_PREFIX. | |
3497 | %I prints the value of IMMEDIATE_PREFIX. | |
3498 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 3499 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
3500 | |
3501 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3502 | ||
3503 | void | |
e34d07f2 | 3504 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 3505 | { |
3cf2715d DE |
3506 | char buf[10]; |
3507 | char *q, c; | |
e34d07f2 | 3508 | va_list argptr; |
6cf9ac28 | 3509 | |
e34d07f2 | 3510 | va_start (argptr, p); |
3cf2715d DE |
3511 | |
3512 | buf[0] = '%'; | |
3513 | ||
b729186a | 3514 | while ((c = *p++)) |
3cf2715d DE |
3515 | switch (c) |
3516 | { | |
3517 | #ifdef ASSEMBLER_DIALECT | |
3518 | case '{': | |
b729186a JL |
3519 | { |
3520 | int i; | |
3cf2715d | 3521 | |
b729186a JL |
3522 | /* If we want the first dialect, do nothing. Otherwise, skip |
3523 | DIALECT_NUMBER of strings ending with '|'. */ | |
3524 | for (i = 0; i < dialect_number; i++) | |
3525 | { | |
3526 | while (*p && *p++ != '|') | |
3527 | ; | |
3528 | ||
3529 | if (*p == '|') | |
3530 | p++; | |
f5d927c0 | 3531 | } |
b729186a | 3532 | } |
3cf2715d DE |
3533 | break; |
3534 | ||
3535 | case '|': | |
3536 | /* Skip to close brace. */ | |
3537 | while (*p && *p++ != '}') | |
3538 | ; | |
3539 | break; | |
3540 | ||
3541 | case '}': | |
3542 | break; | |
3543 | #endif | |
3544 | ||
3545 | case '%': | |
3546 | c = *p++; | |
3547 | q = &buf[1]; | |
b1721339 KG |
3548 | while (strchr ("-+ #0", c)) |
3549 | { | |
3550 | *q++ = c; | |
3551 | c = *p++; | |
3552 | } | |
0df6c2c7 | 3553 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
3554 | { |
3555 | *q++ = c; | |
3556 | c = *p++; | |
3557 | } | |
3558 | switch (c) | |
3559 | { | |
3560 | case '%': | |
b1721339 | 3561 | putc ('%', file); |
3cf2715d DE |
3562 | break; |
3563 | ||
3564 | case 'd': case 'i': case 'u': | |
b1721339 KG |
3565 | case 'x': case 'X': case 'o': |
3566 | case 'c': | |
3cf2715d DE |
3567 | *q++ = c; |
3568 | *q = 0; | |
3569 | fprintf (file, buf, va_arg (argptr, int)); | |
3570 | break; | |
3571 | ||
3572 | case 'w': | |
b1721339 KG |
3573 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
3574 | 'o' cases, but we do not check for those cases. It | |
3575 | means that the value is a HOST_WIDE_INT, which may be | |
3576 | either `long' or `long long'. */ | |
85f015e1 KG |
3577 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
3578 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
3579 | *q++ = *p++; |
3580 | *q = 0; | |
3581 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3582 | break; | |
3583 | ||
3584 | case 'l': | |
3585 | *q++ = c; | |
b1721339 KG |
3586 | #ifdef HAVE_LONG_LONG |
3587 | if (*p == 'l') | |
3588 | { | |
3589 | *q++ = *p++; | |
3590 | *q++ = *p++; | |
3591 | *q = 0; | |
3592 | fprintf (file, buf, va_arg (argptr, long long)); | |
3593 | } | |
3594 | else | |
3595 | #endif | |
3596 | { | |
3597 | *q++ = *p++; | |
3598 | *q = 0; | |
3599 | fprintf (file, buf, va_arg (argptr, long)); | |
3600 | } | |
6cf9ac28 | 3601 | |
3cf2715d DE |
3602 | break; |
3603 | ||
3604 | case 's': | |
3605 | *q++ = c; | |
3606 | *q = 0; | |
3607 | fprintf (file, buf, va_arg (argptr, char *)); | |
3608 | break; | |
3609 | ||
3610 | case 'O': | |
3611 | #ifdef ASM_OUTPUT_OPCODE | |
3612 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3613 | #endif | |
3614 | break; | |
3615 | ||
3616 | case 'R': | |
3617 | #ifdef REGISTER_PREFIX | |
3618 | fprintf (file, "%s", REGISTER_PREFIX); | |
3619 | #endif | |
3620 | break; | |
3621 | ||
3622 | case 'I': | |
3623 | #ifdef IMMEDIATE_PREFIX | |
3624 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3625 | #endif | |
3626 | break; | |
3627 | ||
3628 | case 'L': | |
3629 | #ifdef LOCAL_LABEL_PREFIX | |
3630 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3631 | #endif | |
3632 | break; | |
3633 | ||
3634 | case 'U': | |
19283265 | 3635 | fputs (user_label_prefix, file); |
3cf2715d DE |
3636 | break; |
3637 | ||
fe0503ea | 3638 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 3639 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
3640 | and so are not available to target specific code. In order to |
3641 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3642 | they are defined here. As they get turned into real extensions | |
3643 | to asm_fprintf they should be removed from this list. */ | |
3644 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3645 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3646 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3647 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3648 | break; | |
f5d927c0 | 3649 | |
fe0503ea NC |
3650 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3651 | #endif | |
3cf2715d | 3652 | default: |
0bccc606 | 3653 | gcc_unreachable (); |
3cf2715d DE |
3654 | } |
3655 | break; | |
3656 | ||
3657 | default: | |
b1721339 | 3658 | putc (c, file); |
3cf2715d | 3659 | } |
e34d07f2 | 3660 | va_end (argptr); |
3cf2715d DE |
3661 | } |
3662 | \f | |
3663 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3664 | into two rtx's for single words, | |
3665 | storing in *FIRST the word that comes first in memory in the target | |
3666 | and in *SECOND the other. */ | |
3667 | ||
3668 | void | |
6cf9ac28 | 3669 | split_double (rtx value, rtx *first, rtx *second) |
3cf2715d DE |
3670 | { |
3671 | if (GET_CODE (value) == CONST_INT) | |
3672 | { | |
5a1a6efd | 3673 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3674 | { |
5a1a6efd | 3675 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3676 | Extract the bits from it into two word-sized pieces. |
3677 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3678 | unsigned HOST_WIDE_INT low, high; |
3679 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
3680 | ||
3681 | /* Set sign_bit to the most significant bit of a word. */ | |
3682 | sign_bit = 1; | |
3683 | sign_bit <<= BITS_PER_WORD - 1; | |
3684 | ||
3685 | /* Set mask so that all bits of the word are set. We could | |
3686 | have used 1 << BITS_PER_WORD instead of basing the | |
3687 | calculation on sign_bit. However, on machines where | |
3688 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3689 | compiler warning, even though the code would never be | |
3690 | executed. */ | |
3691 | mask = sign_bit << 1; | |
3692 | mask--; | |
3693 | ||
3694 | /* Set sign_extend as any remaining bits. */ | |
3695 | sign_extend = ~mask; | |
f5d927c0 | 3696 | |
7f251dee AO |
3697 | /* Pick the lower word and sign-extend it. */ |
3698 | low = INTVAL (value); | |
3699 | low &= mask; | |
3700 | if (low & sign_bit) | |
3701 | low |= sign_extend; | |
3702 | ||
3703 | /* Pick the higher word, shifted to the least significant | |
3704 | bits, and sign-extend it. */ | |
3705 | high = INTVAL (value); | |
3706 | high >>= BITS_PER_WORD - 1; | |
3707 | high >>= 1; | |
3708 | high &= mask; | |
3709 | if (high & sign_bit) | |
3710 | high |= sign_extend; | |
3711 | ||
3712 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
3713 | if (WORDS_BIG_ENDIAN) |
3714 | { | |
7f251dee AO |
3715 | *first = GEN_INT (high); |
3716 | *second = GEN_INT (low); | |
5a1a6efd RK |
3717 | } |
3718 | else | |
3719 | { | |
7f251dee AO |
3720 | *first = GEN_INT (low); |
3721 | *second = GEN_INT (high); | |
5a1a6efd | 3722 | } |
f76b9db2 ILT |
3723 | } |
3724 | else | |
3725 | { | |
5a1a6efd RK |
3726 | /* The rule for using CONST_INT for a wider mode |
3727 | is that we regard the value as signed. | |
3728 | So sign-extend it. */ | |
3729 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
3730 | if (WORDS_BIG_ENDIAN) | |
3731 | { | |
3732 | *first = high; | |
3733 | *second = value; | |
3734 | } | |
3735 | else | |
3736 | { | |
3737 | *first = value; | |
3738 | *second = high; | |
3739 | } | |
f76b9db2 | 3740 | } |
3cf2715d DE |
3741 | } |
3742 | else if (GET_CODE (value) != CONST_DOUBLE) | |
3743 | { | |
f76b9db2 ILT |
3744 | if (WORDS_BIG_ENDIAN) |
3745 | { | |
3746 | *first = const0_rtx; | |
3747 | *second = value; | |
3748 | } | |
3749 | else | |
3750 | { | |
3751 | *first = value; | |
3752 | *second = const0_rtx; | |
3753 | } | |
3cf2715d DE |
3754 | } |
3755 | else if (GET_MODE (value) == VOIDmode | |
3756 | /* This is the old way we did CONST_DOUBLE integers. */ | |
3757 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
3758 | { | |
3759 | /* In an integer, the words are defined as most and least significant. | |
3760 | So order them by the target's convention. */ | |
f76b9db2 ILT |
3761 | if (WORDS_BIG_ENDIAN) |
3762 | { | |
3763 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3764 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3765 | } | |
3766 | else | |
3767 | { | |
3768 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
3769 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
3770 | } | |
3cf2715d DE |
3771 | } |
3772 | else | |
3773 | { | |
f5d927c0 KH |
3774 | REAL_VALUE_TYPE r; |
3775 | long l[2]; | |
3cf2715d DE |
3776 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
3777 | ||
3778 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
3779 | format, splits up the floating point double and outputs | |
3780 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 3781 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
3782 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
3783 | ||
b5a3eb84 JW |
3784 | /* If 32 bits is an entire word for the target, but not for the host, |
3785 | then sign-extend on the host so that the number will look the same | |
3786 | way on the host that it would on the target. See for instance | |
3787 | simplify_unary_operation. The #if is needed to avoid compiler | |
3788 | warnings. */ | |
3789 | ||
3790 | #if HOST_BITS_PER_LONG > 32 | |
3791 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
3792 | { | |
3793 | if (l[0] & ((long) 1 << 31)) | |
3794 | l[0] |= ((long) (-1) << 32); | |
3795 | if (l[1] & ((long) 1 << 31)) | |
3796 | l[1] |= ((long) (-1) << 32); | |
3797 | } | |
3798 | #endif | |
3799 | ||
3e95a7cb ZW |
3800 | *first = GEN_INT (l[0]); |
3801 | *second = GEN_INT (l[1]); | |
3cf2715d DE |
3802 | } |
3803 | } | |
3804 | \f | |
3805 | /* Return nonzero if this function has no function calls. */ | |
3806 | ||
3807 | int | |
6cf9ac28 | 3808 | leaf_function_p (void) |
3cf2715d DE |
3809 | { |
3810 | rtx insn; | |
b660f82f | 3811 | rtx link; |
3cf2715d | 3812 | |
70f4f91c | 3813 | if (current_function_profile || profile_arc_flag) |
3cf2715d DE |
3814 | return 0; |
3815 | ||
3816 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
3817 | { | |
4b4bf941 | 3818 | if (CALL_P (insn) |
7d167afd | 3819 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3820 | return 0; |
4b4bf941 | 3821 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 3822 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 3823 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 3824 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
3825 | return 0; |
3826 | } | |
b660f82f JW |
3827 | for (link = current_function_epilogue_delay_list; |
3828 | link; | |
3829 | link = XEXP (link, 1)) | |
3cf2715d | 3830 | { |
b660f82f JW |
3831 | insn = XEXP (link, 0); |
3832 | ||
4b4bf941 | 3833 | if (CALL_P (insn) |
7d167afd | 3834 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 3835 | return 0; |
4b4bf941 | 3836 | if (NONJUMP_INSN_P (insn) |
b660f82f | 3837 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 3838 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
b660f82f | 3839 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
3840 | return 0; |
3841 | } | |
3842 | ||
3843 | return 1; | |
3844 | } | |
3845 | ||
09da1532 | 3846 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
3847 | Uses insn_shuid array, so it works only in the final pass. May be used by |
3848 | output templates to customary add branch prediction hints. | |
3849 | */ | |
3850 | int | |
6cf9ac28 | 3851 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
3852 | { |
3853 | int insn_id, label_id; | |
b0efb46b | 3854 | |
0bccc606 | 3855 | gcc_assert (uid_shuid); |
ef6257cd JH |
3856 | insn_id = INSN_SHUID (insn); |
3857 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
3858 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 3859 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
3860 | return insn_id < label_id; |
3861 | } | |
3862 | ||
3cf2715d DE |
3863 | /* On some machines, a function with no call insns |
3864 | can run faster if it doesn't create its own register window. | |
3865 | When output, the leaf function should use only the "output" | |
3866 | registers. Ordinarily, the function would be compiled to use | |
3867 | the "input" registers to find its arguments; it is a candidate | |
3868 | for leaf treatment if it uses only the "input" registers. | |
3869 | Leaf function treatment means renumbering so the function | |
3870 | uses the "output" registers instead. */ | |
3871 | ||
3872 | #ifdef LEAF_REGISTERS | |
3873 | ||
3cf2715d DE |
3874 | /* Return 1 if this function uses only the registers that can be |
3875 | safely renumbered. */ | |
3876 | ||
3877 | int | |
6cf9ac28 | 3878 | only_leaf_regs_used (void) |
3cf2715d DE |
3879 | { |
3880 | int i; | |
4977bab6 | 3881 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
3882 | |
3883 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 3884 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
3885 | && ! permitted_reg_in_leaf_functions[i]) |
3886 | return 0; | |
3887 | ||
3888 | if (current_function_uses_pic_offset_table | |
3889 | && pic_offset_table_rtx != 0 | |
f8cfc6aa | 3890 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
3891 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
3892 | return 0; | |
3893 | ||
3cf2715d DE |
3894 | return 1; |
3895 | } | |
3896 | ||
3897 | /* Scan all instructions and renumber all registers into those | |
3898 | available in leaf functions. */ | |
3899 | ||
3900 | static void | |
6cf9ac28 | 3901 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
3902 | { |
3903 | rtx insn; | |
3904 | ||
3905 | /* Renumber only the actual patterns. | |
3906 | The reg-notes can contain frame pointer refs, | |
3907 | and renumbering them could crash, and should not be needed. */ | |
3908 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 3909 | if (INSN_P (insn)) |
3cf2715d | 3910 | leaf_renumber_regs_insn (PATTERN (insn)); |
f5d927c0 KH |
3911 | for (insn = current_function_epilogue_delay_list; |
3912 | insn; | |
3913 | insn = XEXP (insn, 1)) | |
2c3c49de | 3914 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
3915 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
3916 | } | |
3917 | ||
3918 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
3919 | available in leaf functions. */ | |
3920 | ||
3921 | void | |
6cf9ac28 | 3922 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 3923 | { |
b3694847 SS |
3924 | int i, j; |
3925 | const char *format_ptr; | |
3cf2715d DE |
3926 | |
3927 | if (in_rtx == 0) | |
3928 | return; | |
3929 | ||
3930 | /* Renumber all input-registers into output-registers. | |
3931 | renumbered_regs would be 1 for an output-register; | |
3932 | they */ | |
3933 | ||
f8cfc6aa | 3934 | if (REG_P (in_rtx)) |
3cf2715d DE |
3935 | { |
3936 | int newreg; | |
3937 | ||
3938 | /* Don't renumber the same reg twice. */ | |
3939 | if (in_rtx->used) | |
3940 | return; | |
3941 | ||
3942 | newreg = REGNO (in_rtx); | |
3943 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
3944 | to reach here as part of a REG_NOTE. */ | |
3945 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
3946 | { | |
3947 | in_rtx->used = 1; | |
3948 | return; | |
3949 | } | |
3950 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 3951 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
3952 | df_set_regs_ever_live (REGNO (in_rtx), false); |
3953 | df_set_regs_ever_live (newreg, true); | |
3954 | SET_REGNO (in_rtx, newreg); | |
3cf2715d DE |
3955 | in_rtx->used = 1; |
3956 | } | |
3957 | ||
2c3c49de | 3958 | if (INSN_P (in_rtx)) |
3cf2715d DE |
3959 | { |
3960 | /* Inside a SEQUENCE, we find insns. | |
3961 | Renumber just the patterns of these insns, | |
3962 | just as we do for the top-level insns. */ | |
3963 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
3964 | return; | |
3965 | } | |
3966 | ||
3967 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
3968 | ||
3969 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
3970 | switch (*format_ptr++) | |
3971 | { | |
3972 | case 'e': | |
3973 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
3974 | break; | |
3975 | ||
3976 | case 'E': | |
3977 | if (NULL != XVEC (in_rtx, i)) | |
3978 | { | |
3979 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
3980 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
3981 | } | |
3982 | break; | |
3983 | ||
3984 | case 'S': | |
3985 | case 's': | |
3986 | case '0': | |
3987 | case 'i': | |
3988 | case 'w': | |
3989 | case 'n': | |
3990 | case 'u': | |
3991 | break; | |
3992 | ||
3993 | default: | |
0bccc606 | 3994 | gcc_unreachable (); |
3cf2715d DE |
3995 | } |
3996 | } | |
3997 | #endif | |
6a08f7b3 DP |
3998 | |
3999 | ||
4000 | /* When -gused is used, emit debug info for only used symbols. But in | |
4001 | addition to the standard intercepted debug_hooks there are some direct | |
4002 | calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params. | |
4003 | Those routines may also be called from a higher level intercepted routine. So | |
4004 | to prevent recording data for an inner call to one of these for an intercept, | |
5d3cc252 | 4005 | we maintain an intercept nesting counter (debug_nesting). We only save the |
6a08f7b3 DP |
4006 | intercepted arguments if the nesting is 1. */ |
4007 | int debug_nesting = 0; | |
4008 | ||
4009 | static tree *symbol_queue; | |
4010 | int symbol_queue_index = 0; | |
4011 | static int symbol_queue_size = 0; | |
4012 | ||
4013 | /* Generate the symbols for any queued up type symbols we encountered | |
4014 | while generating the type info for some originally used symbol. | |
4015 | This might generate additional entries in the queue. Only when | |
4016 | the nesting depth goes to 0 is this routine called. */ | |
4017 | ||
4018 | void | |
6cf9ac28 | 4019 | debug_flush_symbol_queue (void) |
6a08f7b3 DP |
4020 | { |
4021 | int i; | |
6cf9ac28 | 4022 | |
6a08f7b3 DP |
4023 | /* Make sure that additionally queued items are not flushed |
4024 | prematurely. */ | |
6cf9ac28 | 4025 | |
6a08f7b3 | 4026 | ++debug_nesting; |
6cf9ac28 | 4027 | |
6a08f7b3 DP |
4028 | for (i = 0; i < symbol_queue_index; ++i) |
4029 | { | |
b0efb46b | 4030 | /* If we pushed queued symbols then such symbols must be |
6a08f7b3 DP |
4031 | output no matter what anyone else says. Specifically, |
4032 | we need to make sure dbxout_symbol() thinks the symbol was | |
4033 | used and also we need to override TYPE_DECL_SUPPRESS_DEBUG | |
4034 | which may be set for outside reasons. */ | |
4035 | int saved_tree_used = TREE_USED (symbol_queue[i]); | |
4036 | int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]); | |
4037 | TREE_USED (symbol_queue[i]) = 1; | |
4038 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0; | |
4039 | ||
4040 | #ifdef DBX_DEBUGGING_INFO | |
4041 | dbxout_symbol (symbol_queue[i], 0); | |
4042 | #endif | |
4043 | ||
4044 | TREE_USED (symbol_queue[i]) = saved_tree_used; | |
4045 | TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug; | |
4046 | } | |
4047 | ||
4048 | symbol_queue_index = 0; | |
6cf9ac28 | 4049 | --debug_nesting; |
6a08f7b3 DP |
4050 | } |
4051 | ||
4052 | /* Queue a type symbol needed as part of the definition of a decl | |
4053 | symbol. These symbols are generated when debug_flush_symbol_queue() | |
4054 | is called. */ | |
4055 | ||
6cf9ac28 | 4056 | void |
6a08f7b3 DP |
4057 | debug_queue_symbol (tree decl) |
4058 | { | |
6cf9ac28 | 4059 | if (symbol_queue_index >= symbol_queue_size) |
6a08f7b3 DP |
4060 | { |
4061 | symbol_queue_size += 10; | |
703ad42b KG |
4062 | symbol_queue = xrealloc (symbol_queue, |
4063 | symbol_queue_size * sizeof (tree)); | |
6a08f7b3 DP |
4064 | } |
4065 | ||
4066 | symbol_queue[symbol_queue_index++] = decl; | |
6cf9ac28 | 4067 | } |
6a08f7b3 | 4068 | |
f9da5064 | 4069 | /* Free symbol queue. */ |
6a08f7b3 | 4070 | void |
6cf9ac28 | 4071 | debug_free_queue (void) |
6a08f7b3 DP |
4072 | { |
4073 | if (symbol_queue) | |
4074 | { | |
4075 | free (symbol_queue); | |
4076 | symbol_queue = NULL; | |
4077 | symbol_queue_size = 0; | |
4078 | } | |
4079 | } | |
ef330312 PB |
4080 | \f |
4081 | /* Turn the RTL into assembly. */ | |
c2924966 | 4082 | static unsigned int |
ef330312 PB |
4083 | rest_of_handle_final (void) |
4084 | { | |
4085 | rtx x; | |
4086 | const char *fnname; | |
4087 | ||
4088 | /* Get the function's name, as described by its RTL. This may be | |
4089 | different from the DECL_NAME name used in the source file. */ | |
4090 | ||
4091 | x = DECL_RTL (current_function_decl); | |
4092 | gcc_assert (MEM_P (x)); | |
4093 | x = XEXP (x, 0); | |
4094 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
4095 | fnname = XSTR (x, 0); | |
4096 | ||
4097 | assemble_start_function (current_function_decl, fnname); | |
4098 | final_start_function (get_insns (), asm_out_file, optimize); | |
4099 | final (get_insns (), asm_out_file, optimize); | |
4100 | final_end_function (); | |
4101 | ||
4102 | #ifdef TARGET_UNWIND_INFO | |
4103 | /* ??? The IA-64 ".handlerdata" directive must be issued before | |
4104 | the ".endp" directive that closes the procedure descriptor. */ | |
22ba88ef | 4105 | output_function_exception_table (fnname); |
ef330312 PB |
4106 | #endif |
4107 | ||
4108 | assemble_end_function (current_function_decl, fnname); | |
4109 | ||
4110 | #ifndef TARGET_UNWIND_INFO | |
4111 | /* Otherwise, it feels unclean to switch sections in the middle. */ | |
22ba88ef | 4112 | output_function_exception_table (fnname); |
ef330312 PB |
4113 | #endif |
4114 | ||
4115 | user_defined_section_attribute = false; | |
4116 | ||
6fb5fa3c DB |
4117 | /* Free up reg info memory. */ |
4118 | free_reg_info (); | |
4119 | ||
ef330312 PB |
4120 | if (! quiet_flag) |
4121 | fflush (asm_out_file); | |
4122 | ||
ef330312 PB |
4123 | /* Write DBX symbols if requested. */ |
4124 | ||
4125 | /* Note that for those inline functions where we don't initially | |
4126 | know for certain that we will be generating an out-of-line copy, | |
4127 | the first invocation of this routine (rest_of_compilation) will | |
4128 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4129 | Later on, wrapup_global_declarations will (indirectly) call | |
4130 | rest_of_compilation again for those inline functions that need | |
4131 | to have out-of-line copies generated. During that call, we | |
4132 | *will* be routed past here. */ | |
4133 | ||
4134 | timevar_push (TV_SYMOUT); | |
4135 | (*debug_hooks->function_decl) (current_function_decl); | |
4136 | timevar_pop (TV_SYMOUT); | |
395a40e0 JH |
4137 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4138 | && targetm.have_ctors_dtors) | |
4139 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4140 | decl_init_priority_lookup | |
4141 | (current_function_decl)); | |
4142 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4143 | && targetm.have_ctors_dtors) | |
4144 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4145 | decl_fini_priority_lookup | |
4146 | (current_function_decl)); | |
c2924966 | 4147 | return 0; |
ef330312 PB |
4148 | } |
4149 | ||
8ddbbcae | 4150 | struct rtl_opt_pass pass_final = |
ef330312 | 4151 | { |
8ddbbcae JH |
4152 | { |
4153 | RTL_PASS, | |
ef330312 PB |
4154 | NULL, /* name */ |
4155 | NULL, /* gate */ | |
4156 | rest_of_handle_final, /* execute */ | |
4157 | NULL, /* sub */ | |
4158 | NULL, /* next */ | |
4159 | 0, /* static_pass_number */ | |
4160 | TV_FINAL, /* tv_id */ | |
4161 | 0, /* properties_required */ | |
4162 | 0, /* properties_provided */ | |
4163 | 0, /* properties_destroyed */ | |
4164 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4165 | TODO_ggc_collect /* todo_flags_finish */ |
4166 | } | |
ef330312 PB |
4167 | }; |
4168 | ||
4169 | ||
c2924966 | 4170 | static unsigned int |
ef330312 PB |
4171 | rest_of_handle_shorten_branches (void) |
4172 | { | |
4173 | /* Shorten branches. */ | |
4174 | shorten_branches (get_insns ()); | |
c2924966 | 4175 | return 0; |
ef330312 | 4176 | } |
b0efb46b | 4177 | |
8ddbbcae | 4178 | struct rtl_opt_pass pass_shorten_branches = |
ef330312 | 4179 | { |
8ddbbcae JH |
4180 | { |
4181 | RTL_PASS, | |
defb77dc | 4182 | "shorten", /* name */ |
ef330312 PB |
4183 | NULL, /* gate */ |
4184 | rest_of_handle_shorten_branches, /* execute */ | |
4185 | NULL, /* sub */ | |
4186 | NULL, /* next */ | |
4187 | 0, /* static_pass_number */ | |
4188 | TV_FINAL, /* tv_id */ | |
4189 | 0, /* properties_required */ | |
4190 | 0, /* properties_provided */ | |
4191 | 0, /* properties_destroyed */ | |
4192 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4193 | TODO_dump_func /* todo_flags_finish */ |
4194 | } | |
ef330312 PB |
4195 | }; |
4196 | ||
4197 | ||
c2924966 | 4198 | static unsigned int |
ef330312 PB |
4199 | rest_of_clean_state (void) |
4200 | { | |
4201 | rtx insn, next; | |
4202 | ||
4203 | /* It is very important to decompose the RTL instruction chain here: | |
4204 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4205 | body. If these remain pointing to the other insns, we end up preserving | |
4206 | whole RTL chain and attached detailed debug info in memory. */ | |
4207 | for (insn = get_insns (); insn; insn = next) | |
4208 | { | |
4209 | next = NEXT_INSN (insn); | |
4210 | NEXT_INSN (insn) = NULL; | |
4211 | PREV_INSN (insn) = NULL; | |
4212 | } | |
4213 | ||
4214 | /* In case the function was not output, | |
4215 | don't leave any temporary anonymous types | |
4216 | queued up for sdb output. */ | |
4217 | #ifdef SDB_DEBUGGING_INFO | |
4218 | if (write_symbols == SDB_DEBUG) | |
4219 | sdbout_types (NULL_TREE); | |
4220 | #endif | |
4221 | ||
4222 | reload_completed = 0; | |
4223 | epilogue_completed = 0; | |
23249ac4 DB |
4224 | #ifdef STACK_REGS |
4225 | regstack_completed = 0; | |
4226 | #endif | |
ef330312 PB |
4227 | |
4228 | /* Clear out the insn_length contents now that they are no | |
4229 | longer valid. */ | |
4230 | init_insn_lengths (); | |
4231 | ||
4232 | /* Show no temporary slots allocated. */ | |
4233 | init_temp_slots (); | |
4234 | ||
ef330312 PB |
4235 | free_bb_for_insn (); |
4236 | ||
ef330312 PB |
4237 | if (targetm.binds_local_p (current_function_decl)) |
4238 | { | |
4239 | int pref = cfun->preferred_stack_boundary; | |
4240 | if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary) | |
4241 | pref = cfun->stack_alignment_needed; | |
4242 | cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary | |
4243 | = pref; | |
4244 | } | |
4245 | ||
4246 | /* Make sure volatile mem refs aren't considered valid operands for | |
4247 | arithmetic insns. We must call this here if this is a nested inline | |
4248 | function, since the above code leaves us in the init_recog state, | |
4249 | and the function context push/pop code does not save/restore volatile_ok. | |
4250 | ||
4251 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4252 | anymore if we do it here? */ | |
4253 | ||
4254 | init_recog_no_volatile (); | |
4255 | ||
4256 | /* We're done with this function. Free up memory if we can. */ | |
4257 | free_after_parsing (cfun); | |
4258 | free_after_compilation (cfun); | |
c2924966 | 4259 | return 0; |
ef330312 PB |
4260 | } |
4261 | ||
8ddbbcae | 4262 | struct rtl_opt_pass pass_clean_state = |
ef330312 | 4263 | { |
8ddbbcae JH |
4264 | { |
4265 | RTL_PASS, | |
ef330312 PB |
4266 | NULL, /* name */ |
4267 | NULL, /* gate */ | |
4268 | rest_of_clean_state, /* execute */ | |
4269 | NULL, /* sub */ | |
4270 | NULL, /* next */ | |
4271 | 0, /* static_pass_number */ | |
4272 | TV_FINAL, /* tv_id */ | |
4273 | 0, /* properties_required */ | |
4274 | 0, /* properties_provided */ | |
4275 | PROP_rtl, /* properties_destroyed */ | |
4276 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4277 | 0 /* todo_flags_finish */ |
4278 | } | |
ef330312 PB |
4279 | }; |
4280 |