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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
3b708058 | 2 | Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, |
2b1c5433 JJ |
3 | 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, |
4 | 2010, 2011 | |
17ac08e2 | 5 | Free Software Foundation, Inc. |
3cf2715d | 6 | |
1322177d | 7 | This file is part of GCC. |
3cf2715d | 8 | |
1322177d LB |
9 | GCC is free software; you can redistribute it and/or modify it under |
10 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 11 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 12 | version. |
3cf2715d | 13 | |
1322177d LB |
14 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
15 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
17 | for more details. | |
3cf2715d DE |
18 | |
19 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
20 | along with GCC; see the file COPYING3. If not see |
21 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 22 | |
3cf2715d DE |
23 | /* This is the final pass of the compiler. |
24 | It looks at the rtl code for a function and outputs assembler code. | |
25 | ||
26 | Call `final_start_function' to output the assembler code for function entry, | |
27 | `final' to output assembler code for some RTL code, | |
28 | `final_end_function' to output assembler code for function exit. | |
29 | If a function is compiled in several pieces, each piece is | |
30 | output separately with `final'. | |
31 | ||
32 | Some optimizations are also done at this level. | |
33 | Move instructions that were made unnecessary by good register allocation | |
34 | are detected and omitted from the output. (Though most of these | |
35 | are removed by the last jump pass.) | |
36 | ||
37 | Instructions to set the condition codes are omitted when it can be | |
38 | seen that the condition codes already had the desired values. | |
39 | ||
40 | In some cases it is sufficient if the inherited condition codes | |
41 | have related values, but this may require the following insn | |
42 | (the one that tests the condition codes) to be modified. | |
43 | ||
44 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
45 | directly in assembler by the target functions function_prologue and |
46 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
47 | |
48 | #include "config.h" | |
670ee920 | 49 | #include "system.h" |
4977bab6 ZW |
50 | #include "coretypes.h" |
51 | #include "tm.h" | |
3cf2715d DE |
52 | |
53 | #include "tree.h" | |
54 | #include "rtl.h" | |
6baf1cc8 | 55 | #include "tm_p.h" |
3cf2715d DE |
56 | #include "regs.h" |
57 | #include "insn-config.h" | |
3cf2715d | 58 | #include "insn-attr.h" |
3cf2715d DE |
59 | #include "recog.h" |
60 | #include "conditions.h" | |
61 | #include "flags.h" | |
3cf2715d | 62 | #include "hard-reg-set.h" |
3cf2715d | 63 | #include "output.h" |
3d195391 | 64 | #include "except.h" |
49ad7cfa | 65 | #include "function.h" |
0cbd9993 MLI |
66 | #include "rtl-error.h" |
67 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 68 | #include "reload.h" |
ab87f8c8 | 69 | #include "intl.h" |
be1bb652 | 70 | #include "basic-block.h" |
08c148a8 | 71 | #include "target.h" |
ad0c4c36 | 72 | #include "targhooks.h" |
a5a42b92 | 73 | #include "debug.h" |
49d801d3 | 74 | #include "expr.h" |
ba4f7968 | 75 | #include "cfglayout.h" |
ef330312 | 76 | #include "tree-pass.h" |
55b34b5f | 77 | #include "tree-flow.h" |
ef330312 PB |
78 | #include "timevar.h" |
79 | #include "cgraph.h" | |
80 | #include "coverage.h" | |
6fb5fa3c | 81 | #include "df.h" |
294340bf | 82 | #include "vecprim.h" |
c8aea42c | 83 | #include "ggc.h" |
edbed3d3 JH |
84 | #include "cfgloop.h" |
85 | #include "params.h" | |
ea6cf778 | 86 | #include "tree-pretty-print.h" |
3cf2715d | 87 | |
440aabf8 NB |
88 | #ifdef XCOFF_DEBUGGING_INFO |
89 | #include "xcoffout.h" /* Needed for external data | |
90 | declarations for e.g. AIX 4.x. */ | |
91 | #endif | |
92 | ||
76ead72b | 93 | #include "dwarf2out.h" |
76ead72b | 94 | |
6a08f7b3 DP |
95 | #ifdef DBX_DEBUGGING_INFO |
96 | #include "dbxout.h" | |
97 | #endif | |
98 | ||
ce82daed DB |
99 | #ifdef SDB_DEBUGGING_INFO |
100 | #include "sdbout.h" | |
101 | #endif | |
102 | ||
906668bb BS |
103 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
104 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
105 | #ifndef CC_STATUS_INIT |
106 | #define CC_STATUS_INIT | |
107 | #endif | |
108 | ||
3cf2715d DE |
109 | /* Is the given character a logical line separator for the assembler? */ |
110 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 111 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
112 | #endif |
113 | ||
75197b37 BS |
114 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
115 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
116 | #endif | |
117 | ||
589fe865 DJ |
118 | /* Bitflags used by final_scan_insn. */ |
119 | #define SEEN_BB 1 | |
120 | #define SEEN_NOTE 2 | |
121 | #define SEEN_EMITTED 4 | |
122 | ||
3cf2715d | 123 | /* Last insn processed by final_scan_insn. */ |
b1a9f6a0 RH |
124 | static rtx debug_insn; |
125 | rtx current_output_insn; | |
3cf2715d DE |
126 | |
127 | /* Line number of last NOTE. */ | |
128 | static int last_linenum; | |
129 | ||
6c52e687 CC |
130 | /* Last discriminator written to assembly. */ |
131 | static int last_discriminator; | |
132 | ||
133 | /* Discriminator of current block. */ | |
134 | static int discriminator; | |
135 | ||
eac40081 RK |
136 | /* Highest line number in current block. */ |
137 | static int high_block_linenum; | |
138 | ||
139 | /* Likewise for function. */ | |
140 | static int high_function_linenum; | |
141 | ||
3cf2715d | 142 | /* Filename of last NOTE. */ |
3cce094d | 143 | static const char *last_filename; |
3cf2715d | 144 | |
d752cfdb JJ |
145 | /* Override filename and line number. */ |
146 | static const char *override_filename; | |
147 | static int override_linenum; | |
148 | ||
b8176fe4 EB |
149 | /* Whether to force emission of a line note before the next insn. */ |
150 | static bool force_source_line = false; | |
b0efb46b | 151 | |
5f2f0edd | 152 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 153 | |
3cf2715d | 154 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 155 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 156 | The precise value is the insn being output, to pass to error_for_asm. */ |
c8b94768 | 157 | rtx this_is_asm_operands; |
3cf2715d DE |
158 | |
159 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 160 | static unsigned int insn_noperands; |
3cf2715d DE |
161 | |
162 | /* Compare optimization flag. */ | |
163 | ||
164 | static rtx last_ignored_compare = 0; | |
165 | ||
3cf2715d DE |
166 | /* Assign a unique number to each insn that is output. |
167 | This can be used to generate unique local labels. */ | |
168 | ||
169 | static int insn_counter = 0; | |
170 | ||
171 | #ifdef HAVE_cc0 | |
172 | /* This variable contains machine-dependent flags (defined in tm.h) | |
173 | set and examined by output routines | |
174 | that describe how to interpret the condition codes properly. */ | |
175 | ||
176 | CC_STATUS cc_status; | |
177 | ||
178 | /* During output of an insn, this contains a copy of cc_status | |
179 | from before the insn. */ | |
180 | ||
181 | CC_STATUS cc_prev_status; | |
182 | #endif | |
183 | ||
18c038b9 | 184 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
185 | |
186 | static int block_depth; | |
187 | ||
188 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
189 | ||
190 | static int app_on; | |
191 | ||
192 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
193 | Zero otherwise. */ | |
194 | ||
195 | rtx final_sequence; | |
196 | ||
197 | #ifdef ASSEMBLER_DIALECT | |
198 | ||
199 | /* Number of the assembler dialect to use, starting at 0. */ | |
200 | static int dialect_number; | |
201 | #endif | |
202 | ||
afe48e06 RH |
203 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
204 | rtx current_insn_predicate; | |
afe48e06 | 205 | |
6ca5d1f6 JJ |
206 | /* True if printing into -fdump-final-insns= dump. */ |
207 | bool final_insns_dump_p; | |
208 | ||
1d300e19 | 209 | #ifdef HAVE_ATTR_length |
6cf9ac28 AJ |
210 | static int asm_insn_count (rtx); |
211 | #endif | |
212 | static void profile_function (FILE *); | |
213 | static void profile_after_prologue (FILE *); | |
ed5ef2e4 | 214 | static bool notice_source_line (rtx, bool *); |
6fb5fa3c | 215 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 AJ |
216 | static void output_asm_name (void); |
217 | static void output_alternate_entry_point (FILE *, rtx); | |
218 | static tree get_mem_expr_from_op (rtx, int *); | |
219 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 220 | #ifdef LEAF_REGISTERS |
6cf9ac28 | 221 | static void leaf_renumber_regs (rtx); |
e9a25f70 JL |
222 | #endif |
223 | #ifdef HAVE_cc0 | |
6cf9ac28 | 224 | static int alter_cond (rtx); |
e9a25f70 | 225 | #endif |
ca3075bd | 226 | #ifndef ADDR_VEC_ALIGN |
6cf9ac28 | 227 | static int final_addr_vec_align (rtx); |
ca3075bd | 228 | #endif |
7bdb32b9 | 229 | #ifdef HAVE_ATTR_length |
6cf9ac28 | 230 | static int align_fuzz (rtx, rtx, int, unsigned); |
7bdb32b9 | 231 | #endif |
3cf2715d DE |
232 | \f |
233 | /* Initialize data in final at the beginning of a compilation. */ | |
234 | ||
235 | void | |
6cf9ac28 | 236 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 237 | { |
3cf2715d | 238 | app_on = 0; |
3cf2715d DE |
239 | final_sequence = 0; |
240 | ||
241 | #ifdef ASSEMBLER_DIALECT | |
242 | dialect_number = ASSEMBLER_DIALECT; | |
243 | #endif | |
244 | } | |
245 | ||
08c148a8 | 246 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 247 | |
08c148a8 NB |
248 | If not overridden for epilogue code, then the function body itself |
249 | contains return instructions wherever needed. */ | |
250 | void | |
6cf9ac28 AJ |
251 | default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, |
252 | HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
08c148a8 NB |
253 | { |
254 | } | |
255 | ||
14d11d40 IS |
256 | void |
257 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
258 | tree decl ATTRIBUTE_UNUSED, | |
259 | bool new_is_cold ATTRIBUTE_UNUSED) | |
260 | { | |
261 | } | |
262 | ||
b4c25db2 NB |
263 | /* Default target hook that outputs nothing to a stream. */ |
264 | void | |
6cf9ac28 | 265 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
266 | { |
267 | } | |
268 | ||
3cf2715d DE |
269 | /* Enable APP processing of subsequent output. |
270 | Used before the output from an `asm' statement. */ | |
271 | ||
272 | void | |
6cf9ac28 | 273 | app_enable (void) |
3cf2715d DE |
274 | { |
275 | if (! app_on) | |
276 | { | |
51723711 | 277 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
278 | app_on = 1; |
279 | } | |
280 | } | |
281 | ||
282 | /* Disable APP processing of subsequent output. | |
283 | Called from varasm.c before most kinds of output. */ | |
284 | ||
285 | void | |
6cf9ac28 | 286 | app_disable (void) |
3cf2715d DE |
287 | { |
288 | if (app_on) | |
289 | { | |
51723711 | 290 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
291 | app_on = 0; |
292 | } | |
293 | } | |
294 | \f | |
f5d927c0 | 295 | /* Return the number of slots filled in the current |
3cf2715d DE |
296 | delayed branch sequence (we don't count the insn needing the |
297 | delay slot). Zero if not in a delayed branch sequence. */ | |
298 | ||
299 | #ifdef DELAY_SLOTS | |
300 | int | |
6cf9ac28 | 301 | dbr_sequence_length (void) |
3cf2715d DE |
302 | { |
303 | if (final_sequence != 0) | |
304 | return XVECLEN (final_sequence, 0) - 1; | |
305 | else | |
306 | return 0; | |
307 | } | |
308 | #endif | |
309 | \f | |
310 | /* The next two pages contain routines used to compute the length of an insn | |
311 | and to shorten branches. */ | |
312 | ||
313 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
314 | `insn_current_length'. */ | |
315 | ||
addd7df6 | 316 | static int *insn_lengths; |
9d98a694 | 317 | |
294340bf | 318 | VEC(int,heap) *insn_addresses_; |
3cf2715d | 319 | |
ea3cbda5 R |
320 | /* Max uid for which the above arrays are valid. */ |
321 | static int insn_lengths_max_uid; | |
322 | ||
3cf2715d DE |
323 | /* Address of insn being processed. Used by `insn_current_length'. */ |
324 | int insn_current_address; | |
325 | ||
fc470718 R |
326 | /* Address of insn being processed in previous iteration. */ |
327 | int insn_last_address; | |
328 | ||
d6a7951f | 329 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
330 | int insn_current_align; |
331 | ||
95707627 R |
332 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
333 | gives the next following alignment insn that increases the known | |
334 | alignment, or NULL_RTX if there is no such insn. | |
335 | For any alignment obtained this way, we can again index uid_align with | |
336 | its uid to obtain the next following align that in turn increases the | |
337 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
338 | for each insn we'll call the alignment chain of this insn in the following | |
339 | comments. */ | |
340 | ||
f5d927c0 KH |
341 | struct label_alignment |
342 | { | |
9e423e6d JW |
343 | short alignment; |
344 | short max_skip; | |
345 | }; | |
346 | ||
347 | static rtx *uid_align; | |
348 | static int *uid_shuid; | |
349 | static struct label_alignment *label_align; | |
95707627 | 350 | |
3cf2715d DE |
351 | /* Indicate that branch shortening hasn't yet been done. */ |
352 | ||
353 | void | |
6cf9ac28 | 354 | init_insn_lengths (void) |
3cf2715d | 355 | { |
95707627 R |
356 | if (uid_shuid) |
357 | { | |
358 | free (uid_shuid); | |
359 | uid_shuid = 0; | |
360 | } | |
361 | if (insn_lengths) | |
362 | { | |
363 | free (insn_lengths); | |
364 | insn_lengths = 0; | |
ea3cbda5 | 365 | insn_lengths_max_uid = 0; |
95707627 | 366 | } |
9d98a694 AO |
367 | #ifdef HAVE_ATTR_length |
368 | INSN_ADDRESSES_FREE (); | |
369 | #endif | |
95707627 R |
370 | if (uid_align) |
371 | { | |
372 | free (uid_align); | |
373 | uid_align = 0; | |
374 | } | |
3cf2715d DE |
375 | } |
376 | ||
377 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 378 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 R |
379 | length. */ |
380 | static inline int | |
381 | get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED, | |
382 | int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED) | |
3cf2715d DE |
383 | { |
384 | #ifdef HAVE_ATTR_length | |
385 | rtx body; | |
386 | int i; | |
387 | int length = 0; | |
388 | ||
ea3cbda5 | 389 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
390 | return insn_lengths[INSN_UID (insn)]; |
391 | else | |
392 | switch (GET_CODE (insn)) | |
393 | { | |
394 | case NOTE: | |
395 | case BARRIER: | |
396 | case CODE_LABEL: | |
b5b8b0ac | 397 | case DEBUG_INSN: |
3cf2715d DE |
398 | return 0; |
399 | ||
400 | case CALL_INSN: | |
070a7956 | 401 | length = fallback_fn (insn); |
3cf2715d DE |
402 | break; |
403 | ||
404 | case JUMP_INSN: | |
405 | body = PATTERN (insn); | |
dd3f0101 | 406 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) |
3cf2715d | 407 | { |
fc470718 R |
408 | /* Alignment is machine-dependent and should be handled by |
409 | ADDR_VEC_ALIGN. */ | |
3cf2715d DE |
410 | } |
411 | else | |
070a7956 | 412 | length = fallback_fn (insn); |
3cf2715d DE |
413 | break; |
414 | ||
415 | case INSN: | |
416 | body = PATTERN (insn); | |
417 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
418 | return 0; | |
419 | ||
420 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 421 | length = asm_insn_count (body) * fallback_fn (insn); |
3cf2715d DE |
422 | else if (GET_CODE (body) == SEQUENCE) |
423 | for (i = 0; i < XVECLEN (body, 0); i++) | |
47d268d0 | 424 | length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn); |
3cf2715d | 425 | else |
070a7956 | 426 | length = fallback_fn (insn); |
e9a25f70 JL |
427 | break; |
428 | ||
429 | default: | |
430 | break; | |
3cf2715d DE |
431 | } |
432 | ||
433 | #ifdef ADJUST_INSN_LENGTH | |
434 | ADJUST_INSN_LENGTH (insn, length); | |
435 | #endif | |
436 | return length; | |
437 | #else /* not HAVE_ATTR_length */ | |
438 | return 0; | |
a9305dcb R |
439 | #define insn_default_length 0 |
440 | #define insn_min_length 0 | |
3cf2715d DE |
441 | #endif /* not HAVE_ATTR_length */ |
442 | } | |
070a7956 R |
443 | |
444 | /* Obtain the current length of an insn. If branch shortening has been done, | |
445 | get its actual length. Otherwise, get its maximum length. */ | |
446 | int | |
447 | get_attr_length (rtx insn) | |
448 | { | |
449 | return get_attr_length_1 (insn, insn_default_length); | |
450 | } | |
451 | ||
452 | /* Obtain the current length of an insn. If branch shortening has been done, | |
453 | get its actual length. Otherwise, get its minimum length. */ | |
454 | int | |
455 | get_attr_min_length (rtx insn) | |
456 | { | |
457 | return get_attr_length_1 (insn, insn_min_length); | |
458 | } | |
3cf2715d | 459 | \f |
fc470718 R |
460 | /* Code to handle alignment inside shorten_branches. */ |
461 | ||
462 | /* Here is an explanation how the algorithm in align_fuzz can give | |
463 | proper results: | |
464 | ||
465 | Call a sequence of instructions beginning with alignment point X | |
466 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 467 | is used in an expression, it means the alignment value of the |
fc470718 | 468 | alignment point. |
f5d927c0 | 469 | |
fc470718 R |
470 | Call the distance between the start of the first insn of block X, and |
471 | the end of the last insn of block X `IX', for the `inner size of X'. | |
472 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 473 | |
fc470718 R |
474 | Likewise with the next alignment-delimited block following X, which we |
475 | shall call block Y. | |
f5d927c0 | 476 | |
fc470718 R |
477 | Call the distance between the start of the first insn of block X, and |
478 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 479 | |
fc470718 | 480 | The estimated padding is then OX - IX. |
f5d927c0 | 481 | |
fc470718 | 482 | OX can be safely estimated as |
f5d927c0 | 483 | |
fc470718 R |
484 | if (X >= Y) |
485 | OX = round_up(IX, Y) | |
486 | else | |
487 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 488 | |
fc470718 R |
489 | Clearly est(IX) >= real(IX), because that only depends on the |
490 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 491 | |
fc470718 R |
492 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
493 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 494 | |
fc470718 R |
495 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
496 | for branch ranges starting before X, so we can just round what we have. | |
497 | But when X < Y, we don't know anything about the, so to speak, | |
498 | `middle bits', so we have to assume the worst when aligning up from an | |
499 | address mod X to one mod Y, which is Y - X. */ | |
500 | ||
501 | #ifndef LABEL_ALIGN | |
efa3896a | 502 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
503 | #endif |
504 | ||
505 | #ifndef LOOP_ALIGN | |
efa3896a | 506 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
507 | #endif |
508 | ||
509 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 510 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
511 | #endif |
512 | ||
247a370b JH |
513 | #ifndef JUMP_ALIGN |
514 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
515 | #endif | |
516 | ||
ad0c4c36 DD |
517 | int |
518 | default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
519 | { | |
520 | return 0; | |
521 | } | |
522 | ||
523 | int | |
524 | default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
525 | { | |
526 | return align_loops_max_skip; | |
527 | } | |
528 | ||
529 | int | |
530 | default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
531 | { | |
532 | return align_labels_max_skip; | |
533 | } | |
534 | ||
535 | int | |
536 | default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED) | |
537 | { | |
538 | return align_jumps_max_skip; | |
539 | } | |
9e423e6d | 540 | |
fc470718 | 541 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 542 | static int |
6cf9ac28 | 543 | final_addr_vec_align (rtx addr_vec) |
fc470718 | 544 | { |
2a841588 | 545 | int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); |
fc470718 R |
546 | |
547 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
548 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 549 | return exact_log2 (align); |
fc470718 R |
550 | |
551 | } | |
f5d927c0 | 552 | |
fc470718 R |
553 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
554 | #endif | |
555 | ||
556 | #ifndef INSN_LENGTH_ALIGNMENT | |
557 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
558 | #endif | |
559 | ||
fc470718 R |
560 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
561 | ||
de7987a6 | 562 | static int min_labelno, max_labelno; |
fc470718 R |
563 | |
564 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
565 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
566 | ||
567 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
568 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
569 | |
570 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 571 | |
fc470718 | 572 | int |
6cf9ac28 | 573 | label_to_alignment (rtx label) |
fc470718 | 574 | { |
40a8f07a JJ |
575 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
576 | return LABEL_TO_ALIGNMENT (label); | |
577 | return 0; | |
578 | } | |
579 | ||
580 | int | |
581 | label_to_max_skip (rtx label) | |
582 | { | |
583 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
584 | return LABEL_TO_MAX_SKIP (label); | |
585 | return 0; | |
fc470718 R |
586 | } |
587 | ||
588 | #ifdef HAVE_ATTR_length | |
589 | /* The differences in addresses | |
590 | between a branch and its target might grow or shrink depending on | |
591 | the alignment the start insn of the range (the branch for a forward | |
592 | branch or the label for a backward branch) starts out on; if these | |
593 | differences are used naively, they can even oscillate infinitely. | |
594 | We therefore want to compute a 'worst case' address difference that | |
595 | is independent of the alignment the start insn of the range end | |
596 | up on, and that is at least as large as the actual difference. | |
597 | The function align_fuzz calculates the amount we have to add to the | |
598 | naively computed difference, by traversing the part of the alignment | |
599 | chain of the start insn of the range that is in front of the end insn | |
600 | of the range, and considering for each alignment the maximum amount | |
601 | that it might contribute to a size increase. | |
602 | ||
603 | For casesi tables, we also want to know worst case minimum amounts of | |
604 | address difference, in case a machine description wants to introduce | |
605 | some common offset that is added to all offsets in a table. | |
d6a7951f | 606 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
607 | appropriate adjustment. */ |
608 | ||
fc470718 R |
609 | /* Compute the maximum delta by which the difference of the addresses of |
610 | START and END might grow / shrink due to a different address for start | |
611 | which changes the size of alignment insns between START and END. | |
612 | KNOWN_ALIGN_LOG is the alignment known for START. | |
613 | GROWTH should be ~0 if the objective is to compute potential code size | |
614 | increase, and 0 if the objective is to compute potential shrink. | |
615 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 616 | |
ca3075bd | 617 | static int |
6cf9ac28 | 618 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
619 | { |
620 | int uid = INSN_UID (start); | |
621 | rtx align_label; | |
622 | int known_align = 1 << known_align_log; | |
623 | int end_shuid = INSN_SHUID (end); | |
624 | int fuzz = 0; | |
625 | ||
626 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
627 | { | |
628 | int align_addr, new_align; | |
629 | ||
630 | uid = INSN_UID (align_label); | |
9d98a694 | 631 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
632 | if (uid_shuid[uid] > end_shuid) |
633 | break; | |
634 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
635 | new_align = 1 << known_align_log; | |
636 | if (new_align < known_align) | |
637 | continue; | |
638 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
639 | known_align = new_align; | |
640 | } | |
641 | return fuzz; | |
642 | } | |
643 | ||
644 | /* Compute a worst-case reference address of a branch so that it | |
645 | can be safely used in the presence of aligned labels. Since the | |
646 | size of the branch itself is unknown, the size of the branch is | |
647 | not included in the range. I.e. for a forward branch, the reference | |
648 | address is the end address of the branch as known from the previous | |
649 | branch shortening pass, minus a value to account for possible size | |
650 | increase due to alignment. For a backward branch, it is the start | |
651 | address of the branch as known from the current pass, plus a value | |
652 | to account for possible size increase due to alignment. | |
653 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
654 | to exclude the branch size. */ | |
f5d927c0 | 655 | |
fc470718 | 656 | int |
6cf9ac28 | 657 | insn_current_reference_address (rtx branch) |
fc470718 | 658 | { |
5527bf14 RH |
659 | rtx dest, seq; |
660 | int seq_uid; | |
661 | ||
662 | if (! INSN_ADDRESSES_SET_P ()) | |
663 | return 0; | |
664 | ||
665 | seq = NEXT_INSN (PREV_INSN (branch)); | |
666 | seq_uid = INSN_UID (seq); | |
4b4bf941 | 667 | if (!JUMP_P (branch)) |
fc470718 R |
668 | /* This can happen for example on the PA; the objective is to know the |
669 | offset to address something in front of the start of the function. | |
670 | Thus, we can treat it like a backward branch. | |
671 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
672 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
673 | return insn_current_address; | |
674 | dest = JUMP_LABEL (branch); | |
5527bf14 | 675 | |
b9f22704 | 676 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
677 | BRANCH also has no INSN_SHUID. */ |
678 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 679 | { |
f5d927c0 | 680 | /* Forward branch. */ |
fc470718 | 681 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 682 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
683 | } |
684 | else | |
685 | { | |
f5d927c0 | 686 | /* Backward branch. */ |
fc470718 | 687 | return (insn_current_address |
923f7cf9 | 688 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
689 | } |
690 | } | |
691 | #endif /* HAVE_ATTR_length */ | |
692 | \f | |
65727068 KH |
693 | /* Compute branch alignments based on frequency information in the |
694 | CFG. */ | |
695 | ||
e855c69d | 696 | unsigned int |
6cf9ac28 | 697 | compute_alignments (void) |
247a370b | 698 | { |
247a370b | 699 | int log, max_skip, max_log; |
e0082a72 | 700 | basic_block bb; |
edbed3d3 JH |
701 | int freq_max = 0; |
702 | int freq_threshold = 0; | |
247a370b JH |
703 | |
704 | if (label_align) | |
705 | { | |
706 | free (label_align); | |
707 | label_align = 0; | |
708 | } | |
709 | ||
710 | max_labelno = max_label_num (); | |
711 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 712 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
713 | |
714 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 715 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 716 | return 0; |
247a370b | 717 | |
edbed3d3 JH |
718 | if (dump_file) |
719 | { | |
720 | dump_flow_info (dump_file, TDF_DETAILS); | |
721 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 722 | } |
58082ff6 | 723 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
edbed3d3 JH |
724 | FOR_EACH_BB (bb) |
725 | if (bb->frequency > freq_max) | |
726 | freq_max = bb->frequency; | |
727 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
728 | ||
729 | if (dump_file) | |
730 | fprintf(dump_file, "freq_max: %i\n",freq_max); | |
e0082a72 | 731 | FOR_EACH_BB (bb) |
247a370b | 732 | { |
a813c111 | 733 | rtx label = BB_HEAD (bb); |
247a370b JH |
734 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
735 | edge e; | |
628f6a4e | 736 | edge_iterator ei; |
247a370b | 737 | |
4b4bf941 | 738 | if (!LABEL_P (label) |
8bcf15f6 | 739 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
740 | { |
741 | if (dump_file) | |
742 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
743 | bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth); | |
744 | continue; | |
745 | } | |
247a370b | 746 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 747 | max_skip = targetm.asm_out.label_align_max_skip (label); |
247a370b | 748 | |
628f6a4e | 749 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
750 | { |
751 | if (e->flags & EDGE_FALLTHRU) | |
752 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
753 | else | |
754 | branch_frequency += EDGE_FREQUENCY (e); | |
755 | } | |
edbed3d3 JH |
756 | if (dump_file) |
757 | { | |
758 | fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i", | |
759 | bb->index, bb->frequency, bb->loop_father->num, | |
760 | bb->loop_depth, | |
761 | fallthru_frequency, branch_frequency); | |
762 | if (!bb->loop_father->inner && bb->loop_father->num) | |
763 | fprintf (dump_file, " inner_loop"); | |
764 | if (bb->loop_father->header == bb) | |
765 | fprintf (dump_file, " loop_header"); | |
766 | fprintf (dump_file, "\n"); | |
767 | } | |
247a370b | 768 | |
f63d1bf7 | 769 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 770 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 771 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
772 | (so it does not need to be in the cache). |
773 | ||
774 | We to catch first case, we align frequently executed blocks. | |
775 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 776 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
777 | when function is called. */ |
778 | ||
779 | if (!has_fallthru | |
edbed3d3 | 780 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
781 | || (bb->frequency > bb->prev_bb->frequency * 10 |
782 | && (bb->prev_bb->frequency | |
247a370b JH |
783 | <= ENTRY_BLOCK_PTR->frequency / 2)))) |
784 | { | |
785 | log = JUMP_ALIGN (label); | |
edbed3d3 JH |
786 | if (dump_file) |
787 | fprintf(dump_file, " jump alignment added.\n"); | |
247a370b JH |
788 | if (max_log < log) |
789 | { | |
790 | max_log = log; | |
ad0c4c36 | 791 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
792 | } |
793 | } | |
794 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 795 | align it. It is most likely a first block of loop. */ |
247a370b | 796 | if (has_fallthru |
efd8f750 | 797 | && optimize_bb_for_speed_p (bb) |
edbed3d3 JH |
798 | && branch_frequency + fallthru_frequency > freq_threshold |
799 | && (branch_frequency | |
800 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
801 | { |
802 | log = LOOP_ALIGN (label); | |
edbed3d3 JH |
803 | if (dump_file) |
804 | fprintf(dump_file, " internal loop alignment added.\n"); | |
247a370b JH |
805 | if (max_log < log) |
806 | { | |
807 | max_log = log; | |
ad0c4c36 | 808 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
809 | } |
810 | } | |
811 | LABEL_TO_ALIGNMENT (label) = max_log; | |
812 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
813 | } | |
edbed3d3 | 814 | |
58082ff6 PH |
815 | loop_optimizer_finalize (); |
816 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 817 | return 0; |
247a370b | 818 | } |
ef330312 | 819 | |
8ddbbcae | 820 | struct rtl_opt_pass pass_compute_alignments = |
ef330312 | 821 | { |
8ddbbcae JH |
822 | { |
823 | RTL_PASS, | |
edbed3d3 | 824 | "alignments", /* name */ |
ef330312 PB |
825 | NULL, /* gate */ |
826 | compute_alignments, /* execute */ | |
827 | NULL, /* sub */ | |
828 | NULL, /* next */ | |
829 | 0, /* static_pass_number */ | |
7072a650 | 830 | TV_NONE, /* tv_id */ |
ef330312 PB |
831 | 0, /* properties_required */ |
832 | 0, /* properties_provided */ | |
833 | 0, /* properties_destroyed */ | |
834 | 0, /* todo_flags_start */ | |
22c5fa5f | 835 | TODO_verify_rtl_sharing |
8ddbbcae JH |
836 | | TODO_ggc_collect /* todo_flags_finish */ |
837 | } | |
ef330312 PB |
838 | }; |
839 | ||
247a370b | 840 | \f |
3cf2715d DE |
841 | /* Make a pass over all insns and compute their actual lengths by shortening |
842 | any branches of variable length if possible. */ | |
843 | ||
fc470718 R |
844 | /* shorten_branches might be called multiple times: for example, the SH |
845 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
846 | In order to do this, it needs proper length information, which it obtains | |
847 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 848 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
849 | reorg.c, since the branch splitting exposes new instructions with delay |
850 | slots. */ | |
851 | ||
3cf2715d | 852 | void |
6cf9ac28 | 853 | shorten_branches (rtx first ATTRIBUTE_UNUSED) |
3cf2715d | 854 | { |
3cf2715d | 855 | rtx insn; |
fc470718 R |
856 | int max_uid; |
857 | int i; | |
fc470718 | 858 | int max_log; |
9e423e6d | 859 | int max_skip; |
fc470718 R |
860 | #ifdef HAVE_ATTR_length |
861 | #define MAX_CODE_ALIGN 16 | |
862 | rtx seq; | |
3cf2715d | 863 | int something_changed = 1; |
3cf2715d DE |
864 | char *varying_length; |
865 | rtx body; | |
866 | int uid; | |
fc470718 | 867 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 868 | |
fc470718 | 869 | #endif |
3d14e82f | 870 | |
3446405d JH |
871 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
872 | max_uid = get_max_uid (); | |
d9b6874b | 873 | |
471854f8 | 874 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 875 | free (uid_shuid); |
b0efb46b | 876 | |
5ed6ace5 | 877 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 878 | |
247a370b JH |
879 | if (max_labelno != max_label_num ()) |
880 | { | |
881 | int old = max_labelno; | |
882 | int n_labels; | |
883 | int n_old_labels; | |
884 | ||
885 | max_labelno = max_label_num (); | |
886 | ||
887 | n_labels = max_labelno - min_labelno + 1; | |
888 | n_old_labels = old - min_labelno + 1; | |
889 | ||
1b4572a8 | 890 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); |
247a370b | 891 | |
535a42b1 | 892 | /* Range of labels grows monotonically in the function. Failing here |
247a370b | 893 | means that the initialization of array got lost. */ |
0bccc606 | 894 | gcc_assert (n_old_labels <= n_labels); |
247a370b JH |
895 | |
896 | memset (label_align + n_old_labels, 0, | |
897 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
898 | } | |
899 | ||
fc470718 R |
900 | /* Initialize label_align and set up uid_shuid to be strictly |
901 | monotonically rising with insn order. */ | |
e2faec75 R |
902 | /* We use max_log here to keep track of the maximum alignment we want to |
903 | impose on the next CODE_LABEL (or the current one if we are processing | |
904 | the CODE_LABEL itself). */ | |
f5d927c0 | 905 | |
9e423e6d JW |
906 | max_log = 0; |
907 | max_skip = 0; | |
908 | ||
909 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
910 | { |
911 | int log; | |
912 | ||
913 | INSN_SHUID (insn) = i++; | |
2c3c49de | 914 | if (INSN_P (insn)) |
80838531 | 915 | continue; |
b0efb46b | 916 | |
80838531 | 917 | if (LABEL_P (insn)) |
fc470718 R |
918 | { |
919 | rtx next; | |
0676c393 | 920 | bool next_is_jumptable; |
ff81832f | 921 | |
247a370b JH |
922 | /* Merge in alignments computed by compute_alignments. */ |
923 | log = LABEL_TO_ALIGNMENT (insn); | |
924 | if (max_log < log) | |
925 | { | |
926 | max_log = log; | |
927 | max_skip = LABEL_TO_MAX_SKIP (insn); | |
928 | } | |
fc470718 | 929 | |
0676c393 MM |
930 | next = next_nonnote_insn (insn); |
931 | next_is_jumptable = next && JUMP_TABLE_DATA_P (next); | |
932 | if (!next_is_jumptable) | |
9e423e6d | 933 | { |
0676c393 MM |
934 | log = LABEL_ALIGN (insn); |
935 | if (max_log < log) | |
936 | { | |
937 | max_log = log; | |
ad0c4c36 | 938 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 | 939 | } |
9e423e6d | 940 | } |
75197b37 BS |
941 | /* ADDR_VECs only take room if read-only data goes into the text |
942 | section. */ | |
0676c393 MM |
943 | if ((JUMP_TABLES_IN_TEXT_SECTION |
944 | || readonly_data_section == text_section) | |
945 | && next_is_jumptable) | |
946 | { | |
947 | log = ADDR_VEC_ALIGN (next); | |
948 | if (max_log < log) | |
949 | { | |
950 | max_log = log; | |
ad0c4c36 | 951 | max_skip = targetm.asm_out.label_align_max_skip (insn); |
0676c393 MM |
952 | } |
953 | } | |
fc470718 | 954 | LABEL_TO_ALIGNMENT (insn) = max_log; |
9e423e6d | 955 | LABEL_TO_MAX_SKIP (insn) = max_skip; |
fc470718 | 956 | max_log = 0; |
9e423e6d | 957 | max_skip = 0; |
fc470718 | 958 | } |
4b4bf941 | 959 | else if (BARRIER_P (insn)) |
fc470718 R |
960 | { |
961 | rtx label; | |
962 | ||
2c3c49de | 963 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 964 | label = NEXT_INSN (label)) |
4b4bf941 | 965 | if (LABEL_P (label)) |
fc470718 R |
966 | { |
967 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
968 | if (max_log < log) | |
9e423e6d JW |
969 | { |
970 | max_log = log; | |
ad0c4c36 | 971 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 972 | } |
fc470718 R |
973 | break; |
974 | } | |
975 | } | |
fc470718 R |
976 | } |
977 | #ifdef HAVE_ATTR_length | |
978 | ||
979 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 980 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 981 | insn_lengths_max_uid = max_uid; |
af035616 R |
982 | /* Syntax errors can lead to labels being outside of the main insn stream. |
983 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 984 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 985 | |
5ed6ace5 | 986 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
987 | |
988 | /* Initialize uid_align. We scan instructions | |
989 | from end to start, and keep in align_tab[n] the last seen insn | |
990 | that does an alignment of at least n+1, i.e. the successor | |
991 | in the alignment chain for an insn that does / has a known | |
992 | alignment of n. */ | |
5ed6ace5 | 993 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 994 | |
f5d927c0 | 995 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
996 | align_tab[i] = NULL_RTX; |
997 | seq = get_last_insn (); | |
33f7f353 | 998 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
999 | { |
1000 | int uid = INSN_UID (seq); | |
1001 | int log; | |
4b4bf941 | 1002 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 1003 | uid_align[uid] = align_tab[0]; |
fc470718 R |
1004 | if (log) |
1005 | { | |
1006 | /* Found an alignment label. */ | |
1007 | uid_align[uid] = align_tab[log]; | |
1008 | for (i = log - 1; i >= 0; i--) | |
1009 | align_tab[i] = seq; | |
1010 | } | |
33f7f353 JR |
1011 | } |
1012 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1013 | if (optimize) | |
1014 | { | |
1015 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1016 | label fields. */ | |
1017 | ||
1018 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1019 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1020 | int rel; | |
1021 | ||
1022 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1023 | { |
33f7f353 JR |
1024 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1025 | int len, i, min, max, insn_shuid; | |
1026 | int min_align; | |
1027 | addr_diff_vec_flags flags; | |
1028 | ||
4b4bf941 | 1029 | if (!JUMP_P (insn) |
33f7f353 JR |
1030 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1031 | continue; | |
1032 | pat = PATTERN (insn); | |
1033 | len = XVECLEN (pat, 1); | |
0bccc606 | 1034 | gcc_assert (len > 0); |
33f7f353 JR |
1035 | min_align = MAX_CODE_ALIGN; |
1036 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1037 | { | |
1038 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1039 | int shuid = INSN_SHUID (lab); | |
1040 | if (shuid < min) | |
1041 | { | |
1042 | min = shuid; | |
1043 | min_lab = lab; | |
1044 | } | |
1045 | if (shuid > max) | |
1046 | { | |
1047 | max = shuid; | |
1048 | max_lab = lab; | |
1049 | } | |
1050 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1051 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1052 | } | |
4c33cb26 R |
1053 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1054 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1055 | insn_shuid = INSN_SHUID (insn); |
1056 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1057 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1058 | flags.min_align = min_align; |
1059 | flags.base_after_vec = rel > insn_shuid; | |
1060 | flags.min_after_vec = min > insn_shuid; | |
1061 | flags.max_after_vec = max > insn_shuid; | |
1062 | flags.min_after_base = min > rel; | |
1063 | flags.max_after_base = max > rel; | |
1064 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
fc470718 R |
1065 | } |
1066 | } | |
33f7f353 | 1067 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1068 | |
3cf2715d | 1069 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
b816f339 | 1070 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1071 | insn != 0; |
1072 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1073 | { | |
1074 | uid = INSN_UID (insn); | |
fc470718 | 1075 | |
3cf2715d | 1076 | insn_lengths[uid] = 0; |
fc470718 | 1077 | |
4b4bf941 | 1078 | if (LABEL_P (insn)) |
fc470718 R |
1079 | { |
1080 | int log = LABEL_TO_ALIGNMENT (insn); | |
1081 | if (log) | |
1082 | { | |
1083 | int align = 1 << log; | |
ecb06768 | 1084 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1085 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1086 | } |
1087 | } | |
1088 | ||
5a09edba | 1089 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1090 | |
4b4bf941 | 1091 | if (NOTE_P (insn) || BARRIER_P (insn) |
f90f4827 | 1092 | || LABEL_P (insn) || DEBUG_INSN_P(insn)) |
3cf2715d | 1093 | continue; |
04da53bd R |
1094 | if (INSN_DELETED_P (insn)) |
1095 | continue; | |
3cf2715d DE |
1096 | |
1097 | body = PATTERN (insn); | |
1098 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
5a32a90c JR |
1099 | { |
1100 | /* This only takes room if read-only data goes into the text | |
1101 | section. */ | |
d6b5193b RS |
1102 | if (JUMP_TABLES_IN_TEXT_SECTION |
1103 | || readonly_data_section == text_section) | |
75197b37 BS |
1104 | insn_lengths[uid] = (XVECLEN (body, |
1105 | GET_CODE (body) == ADDR_DIFF_VEC) | |
1106 | * GET_MODE_SIZE (GET_MODE (body))); | |
5a32a90c | 1107 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1108 | } |
a30caf5c | 1109 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d DE |
1110 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
1111 | else if (GET_CODE (body) == SEQUENCE) | |
1112 | { | |
1113 | int i; | |
1114 | int const_delay_slots; | |
1115 | #ifdef DELAY_SLOTS | |
1116 | const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); | |
1117 | #else | |
1118 | const_delay_slots = 0; | |
1119 | #endif | |
1120 | /* Inside a delay slot sequence, we do not do any branch shortening | |
1121 | if the shortening could change the number of delay slots | |
0f41302f | 1122 | of the branch. */ |
3cf2715d DE |
1123 | for (i = 0; i < XVECLEN (body, 0); i++) |
1124 | { | |
1125 | rtx inner_insn = XVECEXP (body, 0, i); | |
1126 | int inner_uid = INSN_UID (inner_insn); | |
1127 | int inner_length; | |
1128 | ||
a30caf5c DC |
1129 | if (GET_CODE (body) == ASM_INPUT |
1130 | || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) | |
3cf2715d DE |
1131 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1132 | * insn_default_length (inner_insn)); | |
1133 | else | |
1134 | inner_length = insn_default_length (inner_insn); | |
f5d927c0 | 1135 | |
3cf2715d DE |
1136 | insn_lengths[inner_uid] = inner_length; |
1137 | if (const_delay_slots) | |
1138 | { | |
1139 | if ((varying_length[inner_uid] | |
1140 | = insn_variable_length_p (inner_insn)) != 0) | |
1141 | varying_length[uid] = 1; | |
9d98a694 AO |
1142 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1143 | + insn_lengths[uid]); | |
3cf2715d DE |
1144 | } |
1145 | else | |
1146 | varying_length[inner_uid] = 0; | |
1147 | insn_lengths[uid] += inner_length; | |
1148 | } | |
1149 | } | |
1150 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1151 | { | |
1152 | insn_lengths[uid] = insn_default_length (insn); | |
1153 | varying_length[uid] = insn_variable_length_p (insn); | |
1154 | } | |
1155 | ||
1156 | /* If needed, do any adjustment. */ | |
1157 | #ifdef ADJUST_INSN_LENGTH | |
1158 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1159 | if (insn_lengths[uid] < 0) |
c725bd79 | 1160 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1161 | #endif |
1162 | } | |
1163 | ||
1164 | /* Now loop over all the insns finding varying length insns. For each, | |
1165 | get the current insn length. If it has changed, reflect the change. | |
1166 | When nothing changes for a full pass, we are done. */ | |
1167 | ||
1168 | while (something_changed) | |
1169 | { | |
1170 | something_changed = 0; | |
fc470718 | 1171 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1172 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1173 | insn != 0; |
1174 | insn = NEXT_INSN (insn)) | |
1175 | { | |
1176 | int new_length; | |
b729186a | 1177 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1178 | int tmp_length; |
b729186a | 1179 | #endif |
fc470718 | 1180 | int length_align; |
3cf2715d DE |
1181 | |
1182 | uid = INSN_UID (insn); | |
fc470718 | 1183 | |
4b4bf941 | 1184 | if (LABEL_P (insn)) |
fc470718 R |
1185 | { |
1186 | int log = LABEL_TO_ALIGNMENT (insn); | |
1187 | if (log > insn_current_align) | |
1188 | { | |
1189 | int align = 1 << log; | |
ecb06768 | 1190 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1191 | insn_lengths[uid] = new_address - insn_current_address; |
1192 | insn_current_align = log; | |
1193 | insn_current_address = new_address; | |
1194 | } | |
1195 | else | |
1196 | insn_lengths[uid] = 0; | |
9d98a694 | 1197 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1198 | continue; |
1199 | } | |
1200 | ||
1201 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1202 | if (length_align < insn_current_align) | |
1203 | insn_current_align = length_align; | |
1204 | ||
9d98a694 AO |
1205 | insn_last_address = INSN_ADDRESSES (uid); |
1206 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1207 | |
5e75ef4a | 1208 | #ifdef CASE_VECTOR_SHORTEN_MODE |
4b4bf941 | 1209 | if (optimize && JUMP_P (insn) |
33f7f353 JR |
1210 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1211 | { | |
33f7f353 JR |
1212 | rtx body = PATTERN (insn); |
1213 | int old_length = insn_lengths[uid]; | |
1214 | rtx rel_lab = XEXP (XEXP (body, 0), 0); | |
1215 | rtx min_lab = XEXP (XEXP (body, 2), 0); | |
1216 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1217 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1218 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1219 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
33f7f353 JR |
1220 | rtx prev; |
1221 | int rel_align = 0; | |
950a3816 KG |
1222 | addr_diff_vec_flags flags; |
1223 | ||
1224 | /* Avoid automatic aggregate initialization. */ | |
1225 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1226 | |
1227 | /* Try to find a known alignment for rel_lab. */ | |
1228 | for (prev = rel_lab; | |
1229 | prev | |
1230 | && ! insn_lengths[INSN_UID (prev)] | |
1231 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1232 | prev = PREV_INSN (prev)) | |
1233 | if (varying_length[INSN_UID (prev)] & 2) | |
1234 | { | |
1235 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1236 | break; | |
1237 | } | |
1238 | ||
1239 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1240 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1241 | /* Anything after INSN has still addresses from the last | |
1242 | pass; adjust these so that they reflect our current | |
1243 | estimate for this pass. */ | |
1244 | if (flags.base_after_vec) | |
1245 | rel_addr += insn_current_address - insn_last_address; | |
1246 | if (flags.min_after_vec) | |
1247 | min_addr += insn_current_address - insn_last_address; | |
1248 | if (flags.max_after_vec) | |
1249 | max_addr += insn_current_address - insn_last_address; | |
1250 | /* We want to know the worst case, i.e. lowest possible value | |
1251 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1252 | its offset is positive, and we have to be wary of code shrink; | |
1253 | otherwise, it is negative, and we have to be vary of code | |
1254 | size increase. */ | |
1255 | if (flags.min_after_base) | |
1256 | { | |
1257 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1258 | changes we are about to make can change the alignment | |
1259 | within the observed offset, therefore we have to break | |
1260 | it up into two parts that are independent. */ | |
1261 | if (! flags.base_after_vec && flags.min_after_vec) | |
1262 | { | |
1263 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1264 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1265 | } | |
1266 | else | |
1267 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1268 | } | |
1269 | else | |
1270 | { | |
1271 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1272 | { | |
1273 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1274 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1275 | } | |
1276 | else | |
1277 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1278 | } | |
1279 | /* Likewise, determine the highest lowest possible value | |
1280 | for the offset of MAX_LAB. */ | |
1281 | if (flags.max_after_base) | |
1282 | { | |
1283 | if (! flags.base_after_vec && flags.max_after_vec) | |
1284 | { | |
1285 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1286 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1287 | } | |
1288 | else | |
1289 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1290 | } | |
1291 | else | |
1292 | { | |
1293 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1294 | { | |
1295 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1296 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1297 | } | |
1298 | else | |
1299 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1300 | } | |
1301 | PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, | |
1302 | max_addr - rel_addr, | |
1303 | body)); | |
d6b5193b RS |
1304 | if (JUMP_TABLES_IN_TEXT_SECTION |
1305 | || readonly_data_section == text_section) | |
75197b37 BS |
1306 | { |
1307 | insn_lengths[uid] | |
1308 | = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); | |
1309 | insn_current_address += insn_lengths[uid]; | |
1310 | if (insn_lengths[uid] != old_length) | |
1311 | something_changed = 1; | |
1312 | } | |
1313 | ||
33f7f353 | 1314 | continue; |
33f7f353 | 1315 | } |
5e75ef4a JL |
1316 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1317 | ||
1318 | if (! (varying_length[uid])) | |
3cf2715d | 1319 | { |
4b4bf941 | 1320 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1321 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1322 | { | |
1323 | int i; | |
1324 | ||
1325 | body = PATTERN (insn); | |
1326 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1327 | { | |
1328 | rtx inner_insn = XVECEXP (body, 0, i); | |
1329 | int inner_uid = INSN_UID (inner_insn); | |
1330 | ||
1331 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1332 | ||
1333 | insn_current_address += insn_lengths[inner_uid]; | |
1334 | } | |
dd3f0101 | 1335 | } |
674fc07d GS |
1336 | else |
1337 | insn_current_address += insn_lengths[uid]; | |
1338 | ||
3cf2715d DE |
1339 | continue; |
1340 | } | |
674fc07d | 1341 | |
4b4bf941 | 1342 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d DE |
1343 | { |
1344 | int i; | |
f5d927c0 | 1345 | |
3cf2715d DE |
1346 | body = PATTERN (insn); |
1347 | new_length = 0; | |
1348 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1349 | { | |
1350 | rtx inner_insn = XVECEXP (body, 0, i); | |
1351 | int inner_uid = INSN_UID (inner_insn); | |
1352 | int inner_length; | |
1353 | ||
9d98a694 | 1354 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1355 | |
1356 | /* insn_current_length returns 0 for insns with a | |
1357 | non-varying length. */ | |
1358 | if (! varying_length[inner_uid]) | |
1359 | inner_length = insn_lengths[inner_uid]; | |
1360 | else | |
1361 | inner_length = insn_current_length (inner_insn); | |
1362 | ||
1363 | if (inner_length != insn_lengths[inner_uid]) | |
1364 | { | |
1365 | insn_lengths[inner_uid] = inner_length; | |
1366 | something_changed = 1; | |
1367 | } | |
1368 | insn_current_address += insn_lengths[inner_uid]; | |
1369 | new_length += inner_length; | |
1370 | } | |
1371 | } | |
1372 | else | |
1373 | { | |
1374 | new_length = insn_current_length (insn); | |
1375 | insn_current_address += new_length; | |
1376 | } | |
1377 | ||
3cf2715d DE |
1378 | #ifdef ADJUST_INSN_LENGTH |
1379 | /* If needed, do any adjustment. */ | |
1380 | tmp_length = new_length; | |
1381 | ADJUST_INSN_LENGTH (insn, new_length); | |
1382 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1383 | #endif |
1384 | ||
1385 | if (new_length != insn_lengths[uid]) | |
1386 | { | |
1387 | insn_lengths[uid] = new_length; | |
1388 | something_changed = 1; | |
1389 | } | |
1390 | } | |
bb4aaf18 TG |
1391 | /* For a non-optimizing compile, do only a single pass. */ |
1392 | if (!optimize) | |
1393 | break; | |
3cf2715d | 1394 | } |
fc470718 R |
1395 | |
1396 | free (varying_length); | |
1397 | ||
3cf2715d DE |
1398 | #endif /* HAVE_ATTR_length */ |
1399 | } | |
1400 | ||
1401 | #ifdef HAVE_ATTR_length | |
1402 | /* Given the body of an INSN known to be generated by an ASM statement, return | |
1403 | the number of machine instructions likely to be generated for this insn. | |
1404 | This is used to compute its length. */ | |
1405 | ||
1406 | static int | |
6cf9ac28 | 1407 | asm_insn_count (rtx body) |
3cf2715d | 1408 | { |
48c54229 | 1409 | const char *templ; |
3cf2715d | 1410 | |
5d0930ea | 1411 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1412 | templ = XSTR (body, 0); |
5d0930ea | 1413 | else |
48c54229 | 1414 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1415 | |
2bd1d2c8 AP |
1416 | return asm_str_count (templ); |
1417 | } | |
1418 | #endif | |
1419 | ||
1420 | /* Return the number of machine instructions likely to be generated for the | |
1421 | inline-asm template. */ | |
1422 | int | |
1423 | asm_str_count (const char *templ) | |
1424 | { | |
1425 | int count = 1; | |
b8698a0f | 1426 | |
48c54229 | 1427 | if (!*templ) |
5bc4fa7c MS |
1428 | return 0; |
1429 | ||
48c54229 KG |
1430 | for (; *templ; templ++) |
1431 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1432 | || *templ == '\n') | |
3cf2715d DE |
1433 | count++; |
1434 | ||
1435 | return count; | |
1436 | } | |
3cf2715d | 1437 | \f |
c8aea42c PB |
1438 | /* ??? This is probably the wrong place for these. */ |
1439 | /* Structure recording the mapping from source file and directory | |
1440 | names at compile time to those to be embedded in debug | |
1441 | information. */ | |
1442 | typedef struct debug_prefix_map | |
1443 | { | |
1444 | const char *old_prefix; | |
1445 | const char *new_prefix; | |
1446 | size_t old_len; | |
1447 | size_t new_len; | |
1448 | struct debug_prefix_map *next; | |
1449 | } debug_prefix_map; | |
1450 | ||
1451 | /* Linked list of such structures. */ | |
1452 | debug_prefix_map *debug_prefix_maps; | |
1453 | ||
1454 | ||
1455 | /* Record a debug file prefix mapping. ARG is the argument to | |
1456 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1457 | ||
1458 | void | |
1459 | add_debug_prefix_map (const char *arg) | |
1460 | { | |
1461 | debug_prefix_map *map; | |
1462 | const char *p; | |
1463 | ||
1464 | p = strchr (arg, '='); | |
1465 | if (!p) | |
1466 | { | |
1467 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1468 | return; | |
1469 | } | |
1470 | map = XNEW (debug_prefix_map); | |
fe83055d | 1471 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1472 | map->old_len = p - arg; |
1473 | p++; | |
fe83055d | 1474 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1475 | map->new_len = strlen (p); |
1476 | map->next = debug_prefix_maps; | |
1477 | debug_prefix_maps = map; | |
1478 | } | |
1479 | ||
1480 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1481 | the new name corresponding to FILENAME. */ | |
1482 | ||
1483 | const char * | |
1484 | remap_debug_filename (const char *filename) | |
1485 | { | |
1486 | debug_prefix_map *map; | |
1487 | char *s; | |
1488 | const char *name; | |
1489 | size_t name_len; | |
1490 | ||
1491 | for (map = debug_prefix_maps; map; map = map->next) | |
94369251 | 1492 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
c8aea42c PB |
1493 | break; |
1494 | if (!map) | |
1495 | return filename; | |
1496 | name = filename + map->old_len; | |
1497 | name_len = strlen (name) + 1; | |
1498 | s = (char *) alloca (name_len + map->new_len); | |
1499 | memcpy (s, map->new_prefix, map->new_len); | |
1500 | memcpy (s + map->new_len, name, name_len); | |
1501 | return ggc_strdup (s); | |
1502 | } | |
1503 | \f | |
725730f2 EB |
1504 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1505 | ||
1506 | static bool | |
1507 | dwarf2_debug_info_emitted_p (tree decl) | |
1508 | { | |
1509 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1510 | return false; | |
1511 | ||
1512 | if (DECL_IGNORED_P (decl)) | |
1513 | return false; | |
1514 | ||
1515 | return true; | |
1516 | } | |
1517 | ||
3cf2715d DE |
1518 | /* Output assembler code for the start of a function, |
1519 | and initialize some of the variables in this file | |
1520 | for the new function. The label for the function and associated | |
1521 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1522 | ||
1523 | FIRST is the first insn of the rtl for the function being compiled. | |
1524 | FILE is the file to write assembler code to. | |
46625112 | 1525 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1526 | test and compare insns. */ |
1527 | ||
1528 | void | |
6cf9ac28 | 1529 | final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, |
46625112 | 1530 | int optimize_p ATTRIBUTE_UNUSED) |
3cf2715d DE |
1531 | { |
1532 | block_depth = 0; | |
1533 | ||
1534 | this_is_asm_operands = 0; | |
1535 | ||
9ae130f8 JH |
1536 | last_filename = locator_file (prologue_locator); |
1537 | last_linenum = locator_line (prologue_locator); | |
6c52e687 | 1538 | last_discriminator = discriminator = 0; |
9ae130f8 | 1539 | |
653e276c | 1540 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1541 | |
725730f2 EB |
1542 | if (!DECL_IGNORED_P (current_function_decl)) |
1543 | debug_hooks->begin_prologue (last_linenum, last_filename); | |
d291dd49 | 1544 | |
725730f2 | 1545 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
653e276c | 1546 | dwarf2out_begin_prologue (0, NULL); |
3cf2715d DE |
1547 | |
1548 | #ifdef LEAF_REG_REMAP | |
54ff41b7 | 1549 | if (current_function_uses_only_leaf_regs) |
3cf2715d DE |
1550 | leaf_renumber_regs (first); |
1551 | #endif | |
1552 | ||
1553 | /* The Sun386i and perhaps other machines don't work right | |
1554 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1555 | if (targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1556 | profile_function (file); |
3cf2715d | 1557 | |
18c038b9 MM |
1558 | /* If debugging, assign block numbers to all of the blocks in this |
1559 | function. */ | |
1560 | if (write_symbols) | |
1561 | { | |
0435312e | 1562 | reemit_insn_block_notes (); |
a20612aa | 1563 | number_blocks (current_function_decl); |
18c038b9 MM |
1564 | /* We never actually put out begin/end notes for the top-level |
1565 | block in the function. But, conceptually, that block is | |
1566 | always needed. */ | |
1567 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1568 | } | |
1569 | ||
a214518f SP |
1570 | if (warn_frame_larger_than |
1571 | && get_frame_size () > frame_larger_than_size) | |
1572 | { | |
1573 | /* Issue a warning */ | |
1574 | warning (OPT_Wframe_larger_than_, | |
1575 | "the frame size of %wd bytes is larger than %wd bytes", | |
1576 | get_frame_size (), frame_larger_than_size); | |
1577 | } | |
1578 | ||
3cf2715d | 1579 | /* First output the function prologue: code to set up the stack frame. */ |
5fd9b178 | 1580 | targetm.asm_out.function_prologue (file, get_frame_size ()); |
3cf2715d | 1581 | |
3cf2715d DE |
1582 | /* If the machine represents the prologue as RTL, the profiling code must |
1583 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
1584 | #ifdef HAVE_prologue | |
1585 | if (! HAVE_prologue) | |
1586 | #endif | |
1587 | profile_after_prologue (file); | |
3cf2715d DE |
1588 | } |
1589 | ||
1590 | static void | |
6cf9ac28 | 1591 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1592 | { |
3c5273a9 | 1593 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1594 | profile_function (file); |
3cf2715d DE |
1595 | } |
1596 | ||
1597 | static void | |
6cf9ac28 | 1598 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1599 | { |
dcacfa04 | 1600 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1601 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1602 | #endif |
531ca746 RH |
1603 | #ifdef ASM_OUTPUT_REG_PUSH |
1604 | rtx sval = NULL, chain = NULL; | |
1605 | ||
1606 | if (cfun->returns_struct) | |
1607 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1608 | true); | |
1609 | if (cfun->static_chain_decl) | |
1610 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1611 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1612 | |
9739c90c JJ |
1613 | if (! NO_PROFILE_COUNTERS) |
1614 | { | |
1615 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1616 | switch_to_section (data_section); |
9739c90c | 1617 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1618 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1619 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1620 | } | |
3cf2715d | 1621 | |
d6b5193b | 1622 | switch_to_section (current_function_section ()); |
3cf2715d | 1623 | |
531ca746 RH |
1624 | #ifdef ASM_OUTPUT_REG_PUSH |
1625 | if (sval && REG_P (sval)) | |
1626 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1627 | if (chain && REG_P (chain)) | |
1628 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1629 | #endif |
3cf2715d | 1630 | |
df696a75 | 1631 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1632 | |
531ca746 RH |
1633 | #ifdef ASM_OUTPUT_REG_PUSH |
1634 | if (chain && REG_P (chain)) | |
1635 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1636 | if (sval && REG_P (sval)) | |
1637 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1638 | #endif |
1639 | } | |
1640 | ||
1641 | /* Output assembler code for the end of a function. | |
1642 | For clarity, args are same as those of `final_start_function' | |
1643 | even though not all of them are needed. */ | |
1644 | ||
1645 | void | |
6cf9ac28 | 1646 | final_end_function (void) |
3cf2715d | 1647 | { |
be1bb652 | 1648 | app_disable (); |
3cf2715d | 1649 | |
725730f2 EB |
1650 | if (!DECL_IGNORED_P (current_function_decl)) |
1651 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1652 | |
3cf2715d DE |
1653 | /* Finally, output the function epilogue: |
1654 | code to restore the stack frame and return to the caller. */ | |
5fd9b178 | 1655 | targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); |
3cf2715d | 1656 | |
e2a12aca | 1657 | /* And debug output. */ |
725730f2 EB |
1658 | if (!DECL_IGNORED_P (current_function_decl)) |
1659 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1660 | |
725730f2 | 1661 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1662 | && dwarf2out_do_frame ()) |
702ada3d | 1663 | dwarf2out_end_epilogue (last_linenum, last_filename); |
3cf2715d DE |
1664 | } |
1665 | \f | |
6a801cf2 XDL |
1666 | |
1667 | /* Dumper helper for basic block information. FILE is the assembly | |
1668 | output file, and INSN is the instruction being emitted. */ | |
1669 | ||
1670 | static void | |
1671 | dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb, | |
1672 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) | |
1673 | { | |
1674 | basic_block bb; | |
1675 | ||
1676 | if (!flag_debug_asm) | |
1677 | return; | |
1678 | ||
1679 | if (INSN_UID (insn) < bb_map_size | |
1680 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1681 | { | |
1682 | edge e; | |
1683 | edge_iterator ei; | |
1684 | ||
1c13f168 | 1685 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
6a801cf2 XDL |
1686 | if (bb->frequency) |
1687 | fprintf (file, " freq:%d", bb->frequency); | |
1688 | if (bb->count) | |
1689 | fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC, | |
1690 | bb->count); | |
1691 | fprintf (file, " seq:%d", (*bb_seqn)++); | |
1c13f168 | 1692 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1693 | FOR_EACH_EDGE (e, ei, bb->preds) |
1694 | { | |
1695 | dump_edge_info (file, e, 0); | |
1696 | } | |
1697 | fprintf (file, "\n"); | |
1698 | } | |
1699 | if (INSN_UID (insn) < bb_map_size | |
1700 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1701 | { | |
1702 | edge e; | |
1703 | edge_iterator ei; | |
1704 | ||
1c13f168 | 1705 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
1706 | FOR_EACH_EDGE (e, ei, bb->succs) |
1707 | { | |
1708 | dump_edge_info (asm_out_file, e, 1); | |
1709 | } | |
1710 | fprintf (file, "\n"); | |
1711 | } | |
1712 | } | |
1713 | ||
3cf2715d | 1714 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1715 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1716 | |
1717 | void | |
46625112 | 1718 | final (rtx first, FILE *file, int optimize_p) |
3cf2715d | 1719 | { |
bc5612ed | 1720 | rtx insn, next; |
a8c3510c | 1721 | int max_uid = 0; |
589fe865 | 1722 | int seen = 0; |
3cf2715d | 1723 | |
6a801cf2 XDL |
1724 | /* Used for -dA dump. */ |
1725 | basic_block *start_to_bb = NULL; | |
1726 | basic_block *end_to_bb = NULL; | |
1727 | int bb_map_size = 0; | |
1728 | int bb_seqn = 0; | |
1729 | ||
3cf2715d | 1730 | last_ignored_compare = 0; |
3cf2715d | 1731 | |
3cf2715d | 1732 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
a8c3510c | 1733 | { |
938d968e | 1734 | if (INSN_UID (insn) > max_uid) /* Find largest UID. */ |
f5d927c0 | 1735 | max_uid = INSN_UID (insn); |
9ef4c6ef JC |
1736 | #ifdef HAVE_cc0 |
1737 | /* If CC tracking across branches is enabled, record the insn which | |
1738 | jumps to each branch only reached from one place. */ | |
46625112 | 1739 | if (optimize_p && JUMP_P (insn)) |
9ef4c6ef JC |
1740 | { |
1741 | rtx lab = JUMP_LABEL (insn); | |
0c514727 | 1742 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) |
9ef4c6ef JC |
1743 | { |
1744 | LABEL_REFS (lab) = insn; | |
1745 | } | |
1746 | } | |
1747 | #endif | |
a8c3510c AM |
1748 | } |
1749 | ||
3cf2715d DE |
1750 | init_recog (); |
1751 | ||
1752 | CC_STATUS_INIT; | |
1753 | ||
6a801cf2 XDL |
1754 | if (flag_debug_asm) |
1755 | { | |
1756 | basic_block bb; | |
1757 | ||
1758 | bb_map_size = get_max_uid () + 1; | |
1759 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
1760 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
1761 | ||
1762 | FOR_EACH_BB_REVERSE (bb) | |
1763 | { | |
1764 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
1765 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
1766 | } | |
1767 | } | |
1768 | ||
3cf2715d | 1769 | /* Output the insns. */ |
9ff57809 | 1770 | for (insn = first; insn;) |
2f16edb1 TG |
1771 | { |
1772 | #ifdef HAVE_ATTR_length | |
b9f22704 | 1773 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
0ac76ad9 | 1774 | { |
0ac76ad9 RH |
1775 | /* This can be triggered by bugs elsewhere in the compiler if |
1776 | new insns are created after init_insn_lengths is called. */ | |
0bccc606 NS |
1777 | gcc_assert (NOTE_P (insn)); |
1778 | insn_current_address = -1; | |
0ac76ad9 RH |
1779 | } |
1780 | else | |
9d98a694 | 1781 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); |
0ac76ad9 RH |
1782 | #endif /* HAVE_ATTR_length */ |
1783 | ||
6a801cf2 XDL |
1784 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
1785 | bb_map_size, &bb_seqn); | |
46625112 | 1786 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 1787 | } |
6a801cf2 XDL |
1788 | |
1789 | if (flag_debug_asm) | |
1790 | { | |
1791 | free (start_to_bb); | |
1792 | free (end_to_bb); | |
1793 | } | |
bc5612ed BS |
1794 | |
1795 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
1796 | for (insn = first; insn; insn = next) | |
1797 | { | |
1798 | next = NEXT_INSN (insn); | |
1799 | if (NOTE_P (insn) | |
1800 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
1801 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
1802 | delete_insn (insn); | |
1803 | } | |
3cf2715d DE |
1804 | } |
1805 | \f | |
4bbf910e | 1806 | const char * |
6cf9ac28 | 1807 | get_insn_template (int code, rtx insn) |
4bbf910e | 1808 | { |
4bbf910e RH |
1809 | switch (insn_data[code].output_format) |
1810 | { | |
1811 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 1812 | return insn_data[code].output.single; |
4bbf910e | 1813 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 1814 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 1815 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 1816 | gcc_assert (insn); |
3897f229 | 1817 | return (*insn_data[code].output.function) (recog_data.operand, insn); |
4bbf910e RH |
1818 | |
1819 | default: | |
0bccc606 | 1820 | gcc_unreachable (); |
4bbf910e RH |
1821 | } |
1822 | } | |
f5d927c0 | 1823 | |
0dc36574 ZW |
1824 | /* Emit the appropriate declaration for an alternate-entry-point |
1825 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
1826 | LABEL_KIND != LABEL_NORMAL. | |
1827 | ||
1828 | The case fall-through in this function is intentional. */ | |
1829 | static void | |
6cf9ac28 | 1830 | output_alternate_entry_point (FILE *file, rtx insn) |
0dc36574 ZW |
1831 | { |
1832 | const char *name = LABEL_NAME (insn); | |
1833 | ||
1834 | switch (LABEL_KIND (insn)) | |
1835 | { | |
1836 | case LABEL_WEAK_ENTRY: | |
1837 | #ifdef ASM_WEAKEN_LABEL | |
1838 | ASM_WEAKEN_LABEL (file, name); | |
1839 | #endif | |
1840 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 1841 | targetm.asm_out.globalize_label (file, name); |
0dc36574 | 1842 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
1843 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
1844 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
1845 | #endif | |
0dc36574 ZW |
1846 | ASM_OUTPUT_LABEL (file, name); |
1847 | break; | |
1848 | ||
1849 | case LABEL_NORMAL: | |
1850 | default: | |
0bccc606 | 1851 | gcc_unreachable (); |
0dc36574 ZW |
1852 | } |
1853 | } | |
1854 | ||
f410e1b3 RAE |
1855 | /* Given a CALL_INSN, find and return the nested CALL. */ |
1856 | static rtx | |
1857 | call_from_call_insn (rtx insn) | |
1858 | { | |
1859 | rtx x; | |
1860 | gcc_assert (CALL_P (insn)); | |
1861 | x = PATTERN (insn); | |
1862 | ||
1863 | while (GET_CODE (x) != CALL) | |
1864 | { | |
1865 | switch (GET_CODE (x)) | |
1866 | { | |
1867 | default: | |
1868 | gcc_unreachable (); | |
b8c71e40 RAE |
1869 | case COND_EXEC: |
1870 | x = COND_EXEC_CODE (x); | |
1871 | break; | |
f410e1b3 RAE |
1872 | case PARALLEL: |
1873 | x = XVECEXP (x, 0, 0); | |
1874 | break; | |
1875 | case SET: | |
1876 | x = XEXP (x, 1); | |
1877 | break; | |
1878 | } | |
1879 | } | |
1880 | return x; | |
1881 | } | |
1882 | ||
3cf2715d DE |
1883 | /* The final scan for one insn, INSN. |
1884 | Args are same as in `final', except that INSN | |
1885 | is the insn being scanned. | |
1886 | Value returned is the next insn to be scanned. | |
1887 | ||
ff8cea7e EB |
1888 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
1889 | used for within delayed branch sequence output). | |
3cf2715d | 1890 | |
589fe865 DJ |
1891 | SEEN is used to track the end of the prologue, for emitting |
1892 | debug information. We force the emission of a line note after | |
1893 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or | |
1894 | at the beginning of the second basic block, whichever comes | |
1895 | first. */ | |
1896 | ||
5cfc5f84 | 1897 | rtx |
46625112 | 1898 | final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 1899 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 1900 | { |
90ca38bb MM |
1901 | #ifdef HAVE_cc0 |
1902 | rtx set; | |
1903 | #endif | |
b2a6a2fb | 1904 | rtx next; |
90ca38bb | 1905 | |
3cf2715d DE |
1906 | insn_counter++; |
1907 | ||
1908 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
1909 | template of "#") while not optimizing. */ | |
1910 | if (INSN_DELETED_P (insn)) | |
1911 | return NEXT_INSN (insn); | |
1912 | ||
1913 | switch (GET_CODE (insn)) | |
1914 | { | |
1915 | case NOTE: | |
a38e7aa5 | 1916 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
1917 | { |
1918 | case NOTE_INSN_DELETED: | |
be1bb652 | 1919 | break; |
3cf2715d | 1920 | |
87c8b4be | 1921 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 1922 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 1923 | |
a4b6974e UB |
1924 | if (dwarf2out_do_frame ()) |
1925 | dwarf2out_switch_text_section (); | |
f0a0390e | 1926 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 1927 | debug_hooks->switch_text_section (); |
a4b6974e | 1928 | |
c543ca49 | 1929 | switch_to_section (current_function_section ()); |
14d11d40 IS |
1930 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
1931 | current_function_decl, | |
1932 | in_cold_section_p); | |
750054a2 | 1933 | break; |
b0efb46b | 1934 | |
be1bb652 | 1935 | case NOTE_INSN_BASIC_BLOCK: |
2784ed9c KT |
1936 | if (targetm.asm_out.unwind_emit) |
1937 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 1938 | |
589fe865 DJ |
1939 | if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) |
1940 | { | |
1941 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1942 | force_source_line = true; |
589fe865 DJ |
1943 | } |
1944 | else | |
1945 | *seen |= SEEN_BB; | |
1946 | ||
6c52e687 CC |
1947 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
1948 | ||
be1bb652 | 1949 | break; |
3cf2715d | 1950 | |
be1bb652 | 1951 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
1952 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
1953 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1954 | break; |
3d195391 | 1955 | |
be1bb652 | 1956 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
1957 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
1958 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 1959 | break; |
3d195391 | 1960 | |
be1bb652 | 1961 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 1962 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 1963 | profile_after_prologue (file); |
589fe865 DJ |
1964 | |
1965 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1966 | { | |
1967 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1968 | force_source_line = true; |
589fe865 DJ |
1969 | } |
1970 | else | |
1971 | *seen |= SEEN_NOTE; | |
1972 | ||
3cf2715d | 1973 | break; |
3cf2715d | 1974 | |
be1bb652 | 1975 | case NOTE_INSN_EPILOGUE_BEG: |
67ad2ae7 | 1976 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); |
5fd9b178 | 1977 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 1978 | break; |
3cf2715d | 1979 | |
bc5612ed BS |
1980 | case NOTE_INSN_CFI: |
1981 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
1982 | break; | |
1983 | ||
1984 | case NOTE_INSN_CFI_LABEL: | |
1985 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
1986 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
1987 | break; |
1988 | ||
be1bb652 | 1989 | case NOTE_INSN_FUNCTION_BEG: |
653e276c | 1990 | app_disable (); |
725730f2 EB |
1991 | if (!DECL_IGNORED_P (current_function_decl)) |
1992 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
1993 | |
1994 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
1995 | { | |
1996 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 1997 | force_source_line = true; |
589fe865 DJ |
1998 | } |
1999 | else | |
2000 | *seen |= SEEN_NOTE; | |
2001 | ||
3cf2715d | 2002 | break; |
be1bb652 RH |
2003 | |
2004 | case NOTE_INSN_BLOCK_BEG: | |
2005 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2006 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2007 | || write_symbols == DWARF2_DEBUG |
2008 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2009 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2010 | { |
2011 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2012 | |
be1bb652 RH |
2013 | app_disable (); |
2014 | ++block_depth; | |
2015 | high_block_linenum = last_linenum; | |
eac40081 | 2016 | |
a5a42b92 | 2017 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2018 | if (!DECL_IGNORED_P (current_function_decl)) |
2019 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2020 | |
be1bb652 RH |
2021 | /* Mark this block as output. */ |
2022 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
2023 | } | |
d752cfdb JJ |
2024 | if (write_symbols == DBX_DEBUG |
2025 | || write_symbols == SDB_DEBUG) | |
2026 | { | |
2027 | location_t *locus_ptr | |
2028 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2029 | ||
2030 | if (locus_ptr != NULL) | |
2031 | { | |
2032 | override_filename = LOCATION_FILE (*locus_ptr); | |
2033 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2034 | } | |
2035 | } | |
be1bb652 | 2036 | break; |
18c038b9 | 2037 | |
be1bb652 RH |
2038 | case NOTE_INSN_BLOCK_END: |
2039 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2040 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2041 | || write_symbols == DWARF2_DEBUG |
2042 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2043 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2044 | { |
2045 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2046 | |
be1bb652 RH |
2047 | app_disable (); |
2048 | ||
2049 | /* End of a symbol-block. */ | |
2050 | --block_depth; | |
0bccc606 | 2051 | gcc_assert (block_depth >= 0); |
3cf2715d | 2052 | |
725730f2 EB |
2053 | if (!DECL_IGNORED_P (current_function_decl)) |
2054 | debug_hooks->end_block (high_block_linenum, n); | |
be1bb652 | 2055 | } |
d752cfdb JJ |
2056 | if (write_symbols == DBX_DEBUG |
2057 | || write_symbols == SDB_DEBUG) | |
2058 | { | |
2059 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2060 | location_t *locus_ptr | |
2061 | = block_nonartificial_location (outer_block); | |
2062 | ||
2063 | if (locus_ptr != NULL) | |
2064 | { | |
2065 | override_filename = LOCATION_FILE (*locus_ptr); | |
2066 | override_linenum = LOCATION_LINE (*locus_ptr); | |
2067 | } | |
2068 | else | |
2069 | { | |
2070 | override_filename = NULL; | |
2071 | override_linenum = 0; | |
2072 | } | |
2073 | } | |
be1bb652 RH |
2074 | break; |
2075 | ||
2076 | case NOTE_INSN_DELETED_LABEL: | |
2077 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2078 | the label could be proved to be unreachable, though still | |
2079 | referenced (in the form of having its address taken. */ | |
8215347e | 2080 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2081 | break; |
3cf2715d | 2082 | |
5619e52c JJ |
2083 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2084 | /* Similarly, but need to use different namespace for it. */ | |
2085 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2086 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2087 | break; | |
2088 | ||
014a1138 | 2089 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2090 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 EB |
2091 | if (!DECL_IGNORED_P (current_function_decl)) |
2092 | debug_hooks->var_location (insn); | |
014a1138 JZ |
2093 | break; |
2094 | ||
be1bb652 | 2095 | default: |
a38e7aa5 | 2096 | gcc_unreachable (); |
f5d927c0 | 2097 | break; |
3cf2715d DE |
2098 | } |
2099 | break; | |
2100 | ||
2101 | case BARRIER: | |
3cf2715d DE |
2102 | break; |
2103 | ||
2104 | case CODE_LABEL: | |
1dd8faa8 R |
2105 | /* The target port might emit labels in the output function for |
2106 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2107 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2108 | { | |
2109 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2110 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2111 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2112 | #endif |
fc470718 | 2113 | |
1dd8faa8 | 2114 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2115 | { |
9e423e6d | 2116 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2117 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2118 | #else |
2119 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2120 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2121 | #else |
40cdfca6 | 2122 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2123 | #endif |
9e423e6d | 2124 | #endif |
40cdfca6 | 2125 | } |
de7987a6 | 2126 | } |
3cf2715d | 2127 | CC_STATUS_INIT; |
03ffa171 | 2128 | |
725730f2 EB |
2129 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
2130 | debug_hooks->label (insn); | |
e1772ac0 | 2131 | |
bad4f40b | 2132 | app_disable (); |
b2a6a2fb JJ |
2133 | |
2134 | next = next_nonnote_insn (insn); | |
0676c393 MM |
2135 | /* If this label is followed by a jump-table, make sure we put |
2136 | the label in the read-only section. Also possibly write the | |
2137 | label and jump table together. */ | |
2138 | if (next != 0 && JUMP_TABLE_DATA_P (next)) | |
3cf2715d | 2139 | { |
e0d80184 | 2140 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2141 | /* In this case, the case vector is being moved by the |
2142 | target, so don't output the label at all. Leave that | |
2143 | to the back end macros. */ | |
e0d80184 | 2144 | #else |
0676c393 MM |
2145 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2146 | { | |
2147 | int log_align; | |
340f7e7c | 2148 | |
0676c393 MM |
2149 | switch_to_section (targetm.asm_out.function_rodata_section |
2150 | (current_function_decl)); | |
340f7e7c RH |
2151 | |
2152 | #ifdef ADDR_VEC_ALIGN | |
0676c393 | 2153 | log_align = ADDR_VEC_ALIGN (next); |
340f7e7c | 2154 | #else |
0676c393 | 2155 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2156 | #endif |
0676c393 MM |
2157 | ASM_OUTPUT_ALIGN (file, log_align); |
2158 | } | |
2159 | else | |
2160 | switch_to_section (current_function_section ()); | |
75197b37 | 2161 | |
3cf2715d | 2162 | #ifdef ASM_OUTPUT_CASE_LABEL |
0676c393 MM |
2163 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), |
2164 | next); | |
3cf2715d | 2165 | #else |
0676c393 | 2166 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2167 | #endif |
3cf2715d | 2168 | #endif |
0676c393 | 2169 | break; |
3cf2715d | 2170 | } |
0dc36574 ZW |
2171 | if (LABEL_ALT_ENTRY_P (insn)) |
2172 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2173 | else |
5fd9b178 | 2174 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2175 | break; |
2176 | ||
2177 | default: | |
2178 | { | |
b3694847 | 2179 | rtx body = PATTERN (insn); |
3cf2715d | 2180 | int insn_code_number; |
48c54229 | 2181 | const char *templ; |
ed5ef2e4 | 2182 | bool is_stmt; |
3cf2715d | 2183 | |
9a1a4737 PB |
2184 | /* Reset this early so it is correct for ASM statements. */ |
2185 | current_insn_predicate = NULL_RTX; | |
2929029c | 2186 | |
3cf2715d DE |
2187 | /* An INSN, JUMP_INSN or CALL_INSN. |
2188 | First check for special kinds that recog doesn't recognize. */ | |
2189 | ||
6614fd40 | 2190 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2191 | || GET_CODE (body) == CLOBBER) |
2192 | break; | |
2193 | ||
2194 | #ifdef HAVE_cc0 | |
4928181c SB |
2195 | { |
2196 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2197 | the setting of the condition code was done in the delay slot | |
2198 | of the insn that branched here. So recover the cc status | |
2199 | from the insn that set it. */ | |
3cf2715d | 2200 | |
4928181c SB |
2201 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2202 | if (note) | |
2203 | { | |
2204 | NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); | |
2205 | cc_prev_status = cc_status; | |
2206 | } | |
2207 | } | |
3cf2715d DE |
2208 | #endif |
2209 | ||
2210 | /* Detect insns that are really jump-tables | |
2211 | and output them as such. */ | |
2212 | ||
2213 | if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) | |
2214 | { | |
7f7f8214 | 2215 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2216 | int vlen, idx; |
7f7f8214 | 2217 | #endif |
3cf2715d | 2218 | |
b2a6a2fb | 2219 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2220 | switch_to_section (targetm.asm_out.function_rodata_section |
2221 | (current_function_decl)); | |
b2a6a2fb | 2222 | else |
d6b5193b | 2223 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2224 | |
bad4f40b | 2225 | app_disable (); |
3cf2715d | 2226 | |
e0d80184 DM |
2227 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2228 | if (GET_CODE (body) == ADDR_VEC) | |
2229 | { | |
2230 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2231 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2232 | #else | |
0bccc606 | 2233 | gcc_unreachable (); |
e0d80184 DM |
2234 | #endif |
2235 | } | |
2236 | else | |
2237 | { | |
2238 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2239 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2240 | #else | |
0bccc606 | 2241 | gcc_unreachable (); |
e0d80184 DM |
2242 | #endif |
2243 | } | |
2244 | #else | |
3cf2715d DE |
2245 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2246 | for (idx = 0; idx < vlen; idx++) | |
2247 | { | |
2248 | if (GET_CODE (body) == ADDR_VEC) | |
2249 | { | |
2250 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2251 | ASM_OUTPUT_ADDR_VEC_ELT | |
2252 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2253 | #else | |
0bccc606 | 2254 | gcc_unreachable (); |
3cf2715d DE |
2255 | #endif |
2256 | } | |
2257 | else | |
2258 | { | |
2259 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2260 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2261 | (file, | |
33f7f353 | 2262 | body, |
3cf2715d DE |
2263 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2264 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2265 | #else | |
0bccc606 | 2266 | gcc_unreachable (); |
3cf2715d DE |
2267 | #endif |
2268 | } | |
2269 | } | |
2270 | #ifdef ASM_OUTPUT_CASE_END | |
2271 | ASM_OUTPUT_CASE_END (file, | |
2272 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2273 | insn); | |
e0d80184 | 2274 | #endif |
3cf2715d DE |
2275 | #endif |
2276 | ||
d6b5193b | 2277 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2278 | |
2279 | break; | |
2280 | } | |
0435312e JH |
2281 | /* Output this line note if it is the first or the last line |
2282 | note in a row. */ | |
725730f2 EB |
2283 | if (!DECL_IGNORED_P (current_function_decl) |
2284 | && notice_source_line (insn, &is_stmt)) | |
2285 | (*debug_hooks->source_line) (last_linenum, last_filename, | |
2286 | last_discriminator, is_stmt); | |
3cf2715d | 2287 | |
3cf2715d DE |
2288 | if (GET_CODE (body) == ASM_INPUT) |
2289 | { | |
36d7136e RH |
2290 | const char *string = XSTR (body, 0); |
2291 | ||
3cf2715d DE |
2292 | /* There's no telling what that did to the condition codes. */ |
2293 | CC_STATUS_INIT; | |
36d7136e RH |
2294 | |
2295 | if (string[0]) | |
3cf2715d | 2296 | { |
5ffeb913 | 2297 | expanded_location loc; |
bff4b63d | 2298 | |
3a694d86 | 2299 | app_enable (); |
5ffeb913 | 2300 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2301 | if (*loc.file && loc.line) |
bff4b63d AO |
2302 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2303 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2304 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2305 | #if HAVE_AS_LINE_ZERO |
2306 | if (*loc.file && loc.line) | |
bff4b63d | 2307 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2308 | #endif |
3cf2715d | 2309 | } |
3cf2715d DE |
2310 | break; |
2311 | } | |
2312 | ||
2313 | /* Detect `asm' construct with operands. */ | |
2314 | if (asm_noperands (body) >= 0) | |
2315 | { | |
22bf4422 | 2316 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2317 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2318 | const char *string; |
bff4b63d | 2319 | location_t loc; |
5ffeb913 | 2320 | expanded_location expanded; |
3cf2715d DE |
2321 | |
2322 | /* There's no telling what that did to the condition codes. */ | |
2323 | CC_STATUS_INIT; | |
3cf2715d | 2324 | |
3cf2715d | 2325 | /* Get out the operand values. */ |
bff4b63d | 2326 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2327 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2328 | insn_noperands = noperands; |
2329 | this_is_asm_operands = insn; | |
5ffeb913 | 2330 | expanded = expand_location (loc); |
3cf2715d | 2331 | |
ad7e39ca AO |
2332 | #ifdef FINAL_PRESCAN_INSN |
2333 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2334 | #endif | |
2335 | ||
3cf2715d | 2336 | /* Output the insn using them. */ |
36d7136e RH |
2337 | if (string[0]) |
2338 | { | |
3a694d86 | 2339 | app_enable (); |
5ffeb913 | 2340 | if (expanded.file && expanded.line) |
bff4b63d | 2341 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2342 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2343 | output_asm_insn (string, ops); |
03943c05 | 2344 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2345 | if (expanded.file && expanded.line) |
bff4b63d | 2346 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2347 | #endif |
36d7136e RH |
2348 | } |
2349 | ||
1afc5373 CF |
2350 | if (targetm.asm_out.final_postscan_insn) |
2351 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2352 | insn_noperands); | |
2353 | ||
3cf2715d DE |
2354 | this_is_asm_operands = 0; |
2355 | break; | |
2356 | } | |
2357 | ||
bad4f40b | 2358 | app_disable (); |
3cf2715d DE |
2359 | |
2360 | if (GET_CODE (body) == SEQUENCE) | |
2361 | { | |
2362 | /* A delayed-branch sequence */ | |
b3694847 | 2363 | int i; |
3cf2715d | 2364 | |
3cf2715d DE |
2365 | final_sequence = body; |
2366 | ||
2367 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2368 | force the restoration of a comparison that was previously | |
2369 | thought unnecessary. If that happens, cancel this sequence | |
2370 | and cause that insn to be restored. */ | |
2371 | ||
c9d691e9 | 2372 | next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); |
3cf2715d DE |
2373 | if (next != XVECEXP (body, 0, 1)) |
2374 | { | |
2375 | final_sequence = 0; | |
2376 | return next; | |
2377 | } | |
2378 | ||
2379 | for (i = 1; i < XVECLEN (body, 0); i++) | |
c7eee2df RK |
2380 | { |
2381 | rtx insn = XVECEXP (body, 0, i); | |
2382 | rtx next = NEXT_INSN (insn); | |
2383 | /* We loop in case any instruction in a delay slot gets | |
2384 | split. */ | |
2385 | do | |
c9d691e9 | 2386 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2387 | while (insn != next); |
2388 | } | |
3cf2715d DE |
2389 | #ifdef DBR_OUTPUT_SEQEND |
2390 | DBR_OUTPUT_SEQEND (file); | |
2391 | #endif | |
2392 | final_sequence = 0; | |
2393 | ||
2394 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2395 | insns in the delay slot are actually executed before the | |
2396 | called function. Hence we don't preserve any CC-setting | |
2397 | actions in these insns and the CC must be marked as being | |
2398 | clobbered by the function. */ | |
4b4bf941 | 2399 | if (CALL_P (XVECEXP (body, 0, 0))) |
b729186a JL |
2400 | { |
2401 | CC_STATUS_INIT; | |
2402 | } | |
3cf2715d DE |
2403 | break; |
2404 | } | |
2405 | ||
2406 | /* We have a real machine instruction as rtl. */ | |
2407 | ||
2408 | body = PATTERN (insn); | |
2409 | ||
2410 | #ifdef HAVE_cc0 | |
f5d927c0 | 2411 | set = single_set (insn); |
b88c92cc | 2412 | |
3cf2715d DE |
2413 | /* Check for redundant test and compare instructions |
2414 | (when the condition codes are already set up as desired). | |
2415 | This is done only when optimizing; if not optimizing, | |
2416 | it should be possible for the user to alter a variable | |
2417 | with the debugger in between statements | |
2418 | and the next statement should reexamine the variable | |
2419 | to compute the condition codes. */ | |
2420 | ||
46625112 | 2421 | if (optimize_p) |
3cf2715d | 2422 | { |
30f5e9f5 RK |
2423 | if (set |
2424 | && GET_CODE (SET_DEST (set)) == CC0 | |
2425 | && insn != last_ignored_compare) | |
3cf2715d | 2426 | { |
f90b7a5a | 2427 | rtx src1, src2; |
30f5e9f5 | 2428 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
49d801d3 | 2429 | SET_SRC (set) = alter_subreg (&SET_SRC (set)); |
f90b7a5a PB |
2430 | |
2431 | src1 = SET_SRC (set); | |
2432 | src2 = NULL_RTX; | |
2433 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2434 | { |
2435 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2436 | XEXP (SET_SRC (set), 0) | |
49d801d3 | 2437 | = alter_subreg (&XEXP (SET_SRC (set), 0)); |
30f5e9f5 RK |
2438 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2439 | XEXP (SET_SRC (set), 1) | |
49d801d3 | 2440 | = alter_subreg (&XEXP (SET_SRC (set), 1)); |
f90b7a5a PB |
2441 | if (XEXP (SET_SRC (set), 1) |
2442 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2443 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2444 | } |
2445 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2446 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2447 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2448 | && rtx_equal_p (src1, cc_status.value2)) |
2449 | || (src2 != 0 && cc_status.value1 != 0 | |
2450 | && rtx_equal_p (src2, cc_status.value1)) | |
2451 | || (src2 != 0 && cc_status.value2 != 0 | |
2452 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2453 | { |
30f5e9f5 | 2454 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2455 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2456 | /* or if anything in it is volatile. */ |
2457 | && ! volatile_refs_p (PATTERN (insn))) | |
2458 | { | |
2459 | /* We don't really delete the insn; just ignore it. */ | |
2460 | last_ignored_compare = insn; | |
2461 | break; | |
2462 | } | |
3cf2715d DE |
2463 | } |
2464 | } | |
2465 | } | |
3cf2715d | 2466 | |
3cf2715d DE |
2467 | /* If this is a conditional branch, maybe modify it |
2468 | if the cc's are in a nonstandard state | |
2469 | so that it accomplishes the same thing that it would | |
2470 | do straightforwardly if the cc's were set up normally. */ | |
2471 | ||
2472 | if (cc_status.flags != 0 | |
4b4bf941 | 2473 | && JUMP_P (insn) |
3cf2715d DE |
2474 | && GET_CODE (body) == SET |
2475 | && SET_DEST (body) == pc_rtx | |
2476 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2477 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2478 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2479 | { |
2480 | /* This function may alter the contents of its argument | |
2481 | and clear some of the cc_status.flags bits. | |
2482 | It may also return 1 meaning condition now always true | |
2483 | or -1 meaning condition now always false | |
2484 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2485 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2486 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2487 | with its then-operand or its else-operand. */ | |
2488 | if (result == 1) | |
2489 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2490 | if (result == -1) | |
2491 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2492 | ||
2493 | /* The jump is now either unconditional or a no-op. | |
2494 | If it has become a no-op, don't try to output it. | |
2495 | (It would not be recognized.) */ | |
2496 | if (SET_SRC (body) == pc_rtx) | |
2497 | { | |
ca6c03ca | 2498 | delete_insn (insn); |
3cf2715d DE |
2499 | break; |
2500 | } | |
26898771 | 2501 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2502 | /* Replace (set (pc) (return)) with (return). */ |
2503 | PATTERN (insn) = body = SET_SRC (body); | |
2504 | ||
2505 | /* Rerecognize the instruction if it has changed. */ | |
2506 | if (result != 0) | |
2507 | INSN_CODE (insn) = -1; | |
2508 | } | |
2509 | ||
604e4ce3 | 2510 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2511 | are in a nonstandard state so that it accomplishes the same |
2512 | thing that it would do straightforwardly if the cc's were | |
2513 | set up normally. */ | |
2514 | if (cc_status.flags != 0 | |
2515 | && NONJUMP_INSN_P (insn) | |
2516 | && GET_CODE (body) == TRAP_IF | |
2517 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2518 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2519 | { | |
2520 | /* This function may alter the contents of its argument | |
2521 | and clear some of the cc_status.flags bits. | |
2522 | It may also return 1 meaning condition now always true | |
2523 | or -1 meaning condition now always false | |
2524 | or 2 meaning condition nontrivial but altered. */ | |
2525 | int result = alter_cond (TRAP_CONDITION (body)); | |
2526 | ||
2527 | /* If TRAP_CONDITION has become always false, delete the | |
2528 | instruction. */ | |
2529 | if (result == -1) | |
2530 | { | |
2531 | delete_insn (insn); | |
2532 | break; | |
2533 | } | |
2534 | ||
2535 | /* If TRAP_CONDITION has become always true, replace | |
2536 | TRAP_CONDITION with const_true_rtx. */ | |
2537 | if (result == 1) | |
2538 | TRAP_CONDITION (body) = const_true_rtx; | |
2539 | ||
2540 | /* Rerecognize the instruction if it has changed. */ | |
2541 | if (result != 0) | |
2542 | INSN_CODE (insn) = -1; | |
2543 | } | |
2544 | ||
3cf2715d | 2545 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2546 | condition codes without jumping and instructions that |
2547 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2548 | |
2549 | if (cc_status.flags != 0 | |
b88c92cc | 2550 | && set != 0) |
3cf2715d | 2551 | { |
462da2af | 2552 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2553 | |
4b4bf941 | 2554 | if (!JUMP_P (insn) |
b88c92cc | 2555 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2556 | { |
b88c92cc RK |
2557 | cond_rtx = XEXP (SET_SRC (set), 0); |
2558 | then_rtx = XEXP (SET_SRC (set), 1); | |
2559 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2560 | } |
2561 | else | |
2562 | { | |
b88c92cc | 2563 | cond_rtx = SET_SRC (set); |
462da2af SC |
2564 | then_rtx = const_true_rtx; |
2565 | else_rtx = const0_rtx; | |
2566 | } | |
f5d927c0 | 2567 | |
462da2af | 2568 | switch (GET_CODE (cond_rtx)) |
3cf2715d DE |
2569 | { |
2570 | case GTU: | |
2571 | case GT: | |
2572 | case LTU: | |
2573 | case LT: | |
2574 | case GEU: | |
2575 | case GE: | |
2576 | case LEU: | |
2577 | case LE: | |
2578 | case EQ: | |
2579 | case NE: | |
2580 | { | |
b3694847 | 2581 | int result; |
462da2af | 2582 | if (XEXP (cond_rtx, 0) != cc0_rtx) |
3cf2715d | 2583 | break; |
462da2af | 2584 | result = alter_cond (cond_rtx); |
3cf2715d | 2585 | if (result == 1) |
b88c92cc | 2586 | validate_change (insn, &SET_SRC (set), then_rtx, 0); |
3cf2715d | 2587 | else if (result == -1) |
b88c92cc | 2588 | validate_change (insn, &SET_SRC (set), else_rtx, 0); |
3cf2715d DE |
2589 | else if (result == 2) |
2590 | INSN_CODE (insn) = -1; | |
b88c92cc | 2591 | if (SET_DEST (set) == SET_SRC (set)) |
ca6c03ca | 2592 | delete_insn (insn); |
3cf2715d | 2593 | } |
e9a25f70 JL |
2594 | break; |
2595 | ||
2596 | default: | |
2597 | break; | |
3cf2715d DE |
2598 | } |
2599 | } | |
462da2af | 2600 | |
3cf2715d DE |
2601 | #endif |
2602 | ||
ede7cd44 | 2603 | #ifdef HAVE_peephole |
3cf2715d DE |
2604 | /* Do machine-specific peephole optimizations if desired. */ |
2605 | ||
46625112 | 2606 | if (optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d DE |
2607 | { |
2608 | rtx next = peephole (insn); | |
2609 | /* When peepholing, if there were notes within the peephole, | |
2610 | emit them before the peephole. */ | |
2611 | if (next != 0 && next != NEXT_INSN (insn)) | |
2612 | { | |
a2785739 | 2613 | rtx note, prev = PREV_INSN (insn); |
3cf2715d DE |
2614 | |
2615 | for (note = NEXT_INSN (insn); note != next; | |
2616 | note = NEXT_INSN (note)) | |
46625112 | 2617 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
2618 | |
2619 | /* Put the notes in the proper position for a later | |
2620 | rescan. For example, the SH target can do this | |
2621 | when generating a far jump in a delayed branch | |
2622 | sequence. */ | |
2623 | note = NEXT_INSN (insn); | |
2624 | PREV_INSN (note) = prev; | |
2625 | NEXT_INSN (prev) = note; | |
2626 | NEXT_INSN (PREV_INSN (next)) = insn; | |
2627 | PREV_INSN (insn) = PREV_INSN (next); | |
2628 | NEXT_INSN (insn) = next; | |
2629 | PREV_INSN (next) = insn; | |
3cf2715d DE |
2630 | } |
2631 | ||
2632 | /* PEEPHOLE might have changed this. */ | |
2633 | body = PATTERN (insn); | |
2634 | } | |
ede7cd44 | 2635 | #endif |
3cf2715d DE |
2636 | |
2637 | /* Try to recognize the instruction. | |
2638 | If successful, verify that the operands satisfy the | |
2639 | constraints for the instruction. Crash if they don't, | |
2640 | since `reload' should have changed them so that they do. */ | |
2641 | ||
2642 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2643 | cleanup_subreg_operands (insn); |
3cf2715d | 2644 | |
dd3f0101 KH |
2645 | /* Dump the insn in the assembly for debugging. */ |
2646 | if (flag_dump_rtl_in_asm) | |
2647 | { | |
2648 | print_rtx_head = ASM_COMMENT_START; | |
2649 | print_rtl_single (asm_out_file, insn); | |
2650 | print_rtx_head = ""; | |
2651 | } | |
b9f22704 | 2652 | |
6c698a6d | 2653 | if (! constrain_operands_cached (1)) |
3cf2715d | 2654 | fatal_insn_not_found (insn); |
3cf2715d DE |
2655 | |
2656 | /* Some target machines need to prescan each insn before | |
2657 | it is output. */ | |
2658 | ||
2659 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2660 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2661 | #endif |
2662 | ||
2929029c WG |
2663 | if (targetm.have_conditional_execution () |
2664 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 2665 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 2666 | |
3cf2715d DE |
2667 | #ifdef HAVE_cc0 |
2668 | cc_prev_status = cc_status; | |
2669 | ||
2670 | /* Update `cc_status' for this instruction. | |
2671 | The instruction's output routine may change it further. | |
2672 | If the output routine for a jump insn needs to depend | |
2673 | on the cc status, it should look at cc_prev_status. */ | |
2674 | ||
2675 | NOTICE_UPDATE_CC (body, insn); | |
2676 | #endif | |
2677 | ||
b1a9f6a0 | 2678 | current_output_insn = debug_insn = insn; |
3cf2715d | 2679 | |
4bbf910e | 2680 | /* Find the proper template for this insn. */ |
48c54229 | 2681 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 2682 | |
4bbf910e RH |
2683 | /* If the C code returns 0, it means that it is a jump insn |
2684 | which follows a deleted test insn, and that test insn | |
2685 | needs to be reinserted. */ | |
48c54229 | 2686 | if (templ == 0) |
3cf2715d | 2687 | { |
efd0378b HPN |
2688 | rtx prev; |
2689 | ||
0bccc606 | 2690 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2691 | |
2692 | /* We have already processed the notes between the setter and | |
2693 | the user. Make sure we don't process them again, this is | |
2694 | particularly important if one of the notes is a block | |
2695 | scope note or an EH note. */ | |
2696 | for (prev = insn; | |
2697 | prev != last_ignored_compare; | |
2698 | prev = PREV_INSN (prev)) | |
2699 | { | |
4b4bf941 | 2700 | if (NOTE_P (prev)) |
ca6c03ca | 2701 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
2702 | } |
2703 | ||
2704 | return prev; | |
3cf2715d DE |
2705 | } |
2706 | ||
2707 | /* If the template is the string "#", it means that this insn must | |
2708 | be split. */ | |
48c54229 | 2709 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 2710 | { |
48c54229 | 2711 | rtx new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
2712 | |
2713 | /* If we didn't split the insn, go away. */ | |
48c54229 | 2714 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 2715 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 2716 | |
3d14e82f JW |
2717 | #ifdef HAVE_ATTR_length |
2718 | /* This instruction should have been split in shorten_branches, | |
2719 | to ensure that we would have valid length info for the | |
2720 | splitees. */ | |
0bccc606 | 2721 | gcc_unreachable (); |
3d14e82f JW |
2722 | #endif |
2723 | ||
48c54229 | 2724 | return new_rtx; |
3cf2715d | 2725 | } |
f5d927c0 | 2726 | |
951120ea PB |
2727 | /* ??? This will put the directives in the wrong place if |
2728 | get_insn_template outputs assembly directly. However calling it | |
2729 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
2730 | if (targetm.asm_out.unwind_emit_before_insn |
2731 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 2732 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 2733 | |
f410e1b3 RAE |
2734 | if (CALL_P (insn)) |
2735 | { | |
2736 | rtx x = call_from_call_insn (insn); | |
2737 | x = XEXP (x, 0); | |
2738 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
2739 | { | |
2740 | tree t; | |
2741 | x = XEXP (x, 0); | |
2742 | t = SYMBOL_REF_DECL (x); | |
2743 | if (t) | |
2744 | assemble_external (t); | |
2745 | } | |
2b1c5433 JJ |
2746 | if (!DECL_IGNORED_P (current_function_decl)) |
2747 | debug_hooks->var_location (insn); | |
f410e1b3 RAE |
2748 | } |
2749 | ||
951120ea | 2750 | /* Output assembler code from the template. */ |
48c54229 | 2751 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 2752 | |
1afc5373 CF |
2753 | /* Some target machines need to postscan each insn after |
2754 | it is output. */ | |
2755 | if (targetm.asm_out.final_postscan_insn) | |
2756 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
2757 | recog_data.n_operands); | |
2758 | ||
3bc6b3e6 RH |
2759 | if (!targetm.asm_out.unwind_emit_before_insn |
2760 | && targetm.asm_out.unwind_emit) | |
2761 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
2762 | ||
b1a9f6a0 | 2763 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
2764 | } |
2765 | } | |
2766 | return NEXT_INSN (insn); | |
2767 | } | |
2768 | \f | |
ed5ef2e4 CC |
2769 | /* Return whether a source line note needs to be emitted before INSN. |
2770 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
2771 | breakpoint location. */ | |
3cf2715d | 2772 | |
0435312e | 2773 | static bool |
ed5ef2e4 | 2774 | notice_source_line (rtx insn, bool *is_stmt) |
3cf2715d | 2775 | { |
d752cfdb JJ |
2776 | const char *filename; |
2777 | int linenum; | |
2778 | ||
2779 | if (override_filename) | |
2780 | { | |
2781 | filename = override_filename; | |
2782 | linenum = override_linenum; | |
2783 | } | |
2784 | else | |
2785 | { | |
2786 | filename = insn_file (insn); | |
2787 | linenum = insn_line (insn); | |
2788 | } | |
3cf2715d | 2789 | |
ed5ef2e4 CC |
2790 | if (filename == NULL) |
2791 | return false; | |
2792 | ||
2793 | if (force_source_line | |
2794 | || filename != last_filename | |
2795 | || last_linenum != linenum) | |
0435312e | 2796 | { |
b8176fe4 | 2797 | force_source_line = false; |
0435312e JH |
2798 | last_filename = filename; |
2799 | last_linenum = linenum; | |
6c52e687 | 2800 | last_discriminator = discriminator; |
ed5ef2e4 | 2801 | *is_stmt = true; |
0435312e JH |
2802 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
2803 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
2804 | return true; | |
2805 | } | |
ed5ef2e4 CC |
2806 | |
2807 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
2808 | { | |
2809 | /* If the discriminator changed, but the line number did not, | |
2810 | output the line table entry with is_stmt false so the | |
2811 | debugger does not treat this as a breakpoint location. */ | |
2812 | last_discriminator = discriminator; | |
2813 | *is_stmt = false; | |
2814 | return true; | |
2815 | } | |
2816 | ||
0435312e | 2817 | return false; |
3cf2715d DE |
2818 | } |
2819 | \f | |
0304f787 JL |
2820 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
2821 | directly to the desired hard register. */ | |
f5d927c0 | 2822 | |
0304f787 | 2823 | void |
6cf9ac28 | 2824 | cleanup_subreg_operands (rtx insn) |
0304f787 | 2825 | { |
f62a15e3 | 2826 | int i; |
6fb5fa3c | 2827 | bool changed = false; |
6c698a6d | 2828 | extract_insn_cached (insn); |
1ccbefce | 2829 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 2830 | { |
2067c116 | 2831 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
2832 | for a SUBREG: the underlying object might have been changed |
2833 | already if we are inside a match_operator expression that | |
2834 | matches the else clause. Instead we test the underlying | |
2835 | expression directly. */ | |
2836 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c DB |
2837 | { |
2838 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); | |
2839 | changed = true; | |
2840 | } | |
1ccbefce | 2841 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 2842 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 2843 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 2844 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
2845 | } |
2846 | ||
1ccbefce | 2847 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 2848 | { |
1ccbefce | 2849 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c DB |
2850 | { |
2851 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); | |
2852 | changed = true; | |
2853 | } | |
1ccbefce | 2854 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 2855 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 2856 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 2857 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 2858 | } |
6fb5fa3c DB |
2859 | if (changed) |
2860 | df_insn_rescan (insn); | |
0304f787 JL |
2861 | } |
2862 | ||
3cf2715d DE |
2863 | /* If X is a SUBREG, replace it with a REG or a MEM, |
2864 | based on the thing it is a subreg of. */ | |
2865 | ||
2866 | rtx | |
6cf9ac28 | 2867 | alter_subreg (rtx *xp) |
3cf2715d | 2868 | { |
49d801d3 | 2869 | rtx x = *xp; |
b3694847 | 2870 | rtx y = SUBREG_REG (x); |
f5963e61 | 2871 | |
49d801d3 JH |
2872 | /* simplify_subreg does not remove subreg from volatile references. |
2873 | We are required to. */ | |
3c0cb5de | 2874 | if (MEM_P (y)) |
fd326ba8 UW |
2875 | { |
2876 | int offset = SUBREG_BYTE (x); | |
2877 | ||
2878 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
2879 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
2880 | if (offset == 0 | |
2881 | && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) | |
2882 | { | |
2883 | int difference = GET_MODE_SIZE (GET_MODE (y)) | |
2884 | - GET_MODE_SIZE (GET_MODE (x)); | |
2885 | if (WORDS_BIG_ENDIAN) | |
2886 | offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; | |
2887 | if (BYTES_BIG_ENDIAN) | |
2888 | offset += difference % UNITS_PER_WORD; | |
2889 | } | |
2890 | ||
2891 | *xp = adjust_address (y, GET_MODE (x), offset); | |
2892 | } | |
49d801d3 | 2893 | else |
fea54805 | 2894 | { |
48c54229 | 2895 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
fea54805 RK |
2896 | SUBREG_BYTE (x)); |
2897 | ||
48c54229 KG |
2898 | if (new_rtx != 0) |
2899 | *xp = new_rtx; | |
bbe37912 | 2900 | else if (REG_P (y)) |
fea54805 | 2901 | { |
0bccc606 | 2902 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
2903 | unsigned int regno; |
2904 | HOST_WIDE_INT offset; | |
2905 | ||
2906 | regno = subreg_regno (x); | |
2907 | if (subreg_lowpart_p (x)) | |
2908 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
2909 | else | |
2910 | offset = SUBREG_BYTE (x); | |
2911 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 2912 | } |
fea54805 RK |
2913 | } |
2914 | ||
49d801d3 | 2915 | return *xp; |
3cf2715d DE |
2916 | } |
2917 | ||
2918 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
2919 | ||
2920 | static rtx | |
6fb5fa3c | 2921 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 2922 | { |
49d801d3 | 2923 | rtx x = *xp; |
3cf2715d DE |
2924 | switch (GET_CODE (x)) |
2925 | { | |
2926 | case PLUS: | |
2927 | case MULT: | |
beed8fc0 | 2928 | case AND: |
6fb5fa3c DB |
2929 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
2930 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
2931 | break; |
2932 | ||
2933 | case MEM: | |
beed8fc0 | 2934 | case ZERO_EXTEND: |
6fb5fa3c | 2935 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
2936 | break; |
2937 | ||
2938 | case SUBREG: | |
6fb5fa3c | 2939 | *changed = true; |
49d801d3 | 2940 | return alter_subreg (xp); |
f5d927c0 | 2941 | |
e9a25f70 JL |
2942 | default: |
2943 | break; | |
3cf2715d DE |
2944 | } |
2945 | ||
5bc72aeb | 2946 | return *xp; |
3cf2715d DE |
2947 | } |
2948 | \f | |
2949 | #ifdef HAVE_cc0 | |
2950 | ||
2951 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
2952 | as required by the bits that are set in cc_status.flags. | |
2953 | Not all of the bits there can be handled at this level in all cases. | |
2954 | ||
2955 | The value is normally 0. | |
2956 | 1 means that the condition has become always true. | |
2957 | -1 means that the condition has become always false. | |
2958 | 2 means that COND has been altered. */ | |
2959 | ||
2960 | static int | |
6cf9ac28 | 2961 | alter_cond (rtx cond) |
3cf2715d DE |
2962 | { |
2963 | int value = 0; | |
2964 | ||
2965 | if (cc_status.flags & CC_REVERSED) | |
2966 | { | |
2967 | value = 2; | |
2968 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
2969 | } | |
2970 | ||
2971 | if (cc_status.flags & CC_INVERTED) | |
2972 | { | |
2973 | value = 2; | |
2974 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
2975 | } | |
2976 | ||
2977 | if (cc_status.flags & CC_NOT_POSITIVE) | |
2978 | switch (GET_CODE (cond)) | |
2979 | { | |
2980 | case LE: | |
2981 | case LEU: | |
2982 | case GEU: | |
2983 | /* Jump becomes unconditional. */ | |
2984 | return 1; | |
2985 | ||
2986 | case GT: | |
2987 | case GTU: | |
2988 | case LTU: | |
2989 | /* Jump becomes no-op. */ | |
2990 | return -1; | |
2991 | ||
2992 | case GE: | |
2993 | PUT_CODE (cond, EQ); | |
2994 | value = 2; | |
2995 | break; | |
2996 | ||
2997 | case LT: | |
2998 | PUT_CODE (cond, NE); | |
2999 | value = 2; | |
3000 | break; | |
f5d927c0 | 3001 | |
e9a25f70 JL |
3002 | default: |
3003 | break; | |
3cf2715d DE |
3004 | } |
3005 | ||
3006 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3007 | switch (GET_CODE (cond)) | |
3008 | { | |
3009 | case GE: | |
3010 | case GEU: | |
3011 | /* Jump becomes unconditional. */ | |
3012 | return 1; | |
3013 | ||
3014 | case LT: | |
3015 | case LTU: | |
3016 | /* Jump becomes no-op. */ | |
3017 | return -1; | |
3018 | ||
3019 | case LE: | |
3020 | case LEU: | |
3021 | PUT_CODE (cond, EQ); | |
3022 | value = 2; | |
3023 | break; | |
3024 | ||
3025 | case GT: | |
3026 | case GTU: | |
3027 | PUT_CODE (cond, NE); | |
3028 | value = 2; | |
3029 | break; | |
f5d927c0 | 3030 | |
e9a25f70 JL |
3031 | default: |
3032 | break; | |
3cf2715d DE |
3033 | } |
3034 | ||
3035 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3036 | switch (GET_CODE (cond)) | |
3037 | { | |
3038 | case GEU: | |
3039 | /* Jump becomes unconditional. */ | |
3040 | return 1; | |
3041 | ||
3042 | case LEU: | |
3043 | PUT_CODE (cond, EQ); | |
3044 | value = 2; | |
3045 | break; | |
3046 | ||
3047 | case GTU: | |
3048 | PUT_CODE (cond, NE); | |
3049 | value = 2; | |
3050 | break; | |
3051 | ||
3052 | case LTU: | |
3053 | /* Jump becomes no-op. */ | |
3054 | return -1; | |
f5d927c0 | 3055 | |
e9a25f70 JL |
3056 | default: |
3057 | break; | |
3cf2715d DE |
3058 | } |
3059 | ||
3060 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3061 | switch (GET_CODE (cond)) | |
3062 | { | |
e9a25f70 | 3063 | default: |
0bccc606 | 3064 | gcc_unreachable (); |
3cf2715d DE |
3065 | |
3066 | case NE: | |
3067 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3068 | value = 2; | |
3069 | break; | |
3070 | ||
3071 | case EQ: | |
3072 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3073 | value = 2; | |
3074 | break; | |
3075 | } | |
3076 | ||
3077 | if (cc_status.flags & CC_NOT_SIGNED) | |
3078 | /* The flags are valid if signed condition operators are converted | |
3079 | to unsigned. */ | |
3080 | switch (GET_CODE (cond)) | |
3081 | { | |
3082 | case LE: | |
3083 | PUT_CODE (cond, LEU); | |
3084 | value = 2; | |
3085 | break; | |
3086 | ||
3087 | case LT: | |
3088 | PUT_CODE (cond, LTU); | |
3089 | value = 2; | |
3090 | break; | |
3091 | ||
3092 | case GT: | |
3093 | PUT_CODE (cond, GTU); | |
3094 | value = 2; | |
3095 | break; | |
3096 | ||
3097 | case GE: | |
3098 | PUT_CODE (cond, GEU); | |
3099 | value = 2; | |
3100 | break; | |
e9a25f70 JL |
3101 | |
3102 | default: | |
3103 | break; | |
3cf2715d DE |
3104 | } |
3105 | ||
3106 | return value; | |
3107 | } | |
3108 | #endif | |
3109 | \f | |
3110 | /* Report inconsistency between the assembler template and the operands. | |
3111 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3112 | ||
3113 | void | |
4b794eaf | 3114 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3115 | { |
a52453cc PT |
3116 | char *fmt_string; |
3117 | char *new_message; | |
fd478a0a | 3118 | const char *pfx_str; |
e34d07f2 | 3119 | va_list ap; |
6cf9ac28 | 3120 | |
4b794eaf | 3121 | va_start (ap, cmsgid); |
a52453cc | 3122 | |
9e637a26 | 3123 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
4b794eaf | 3124 | asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); |
a52453cc | 3125 | vasprintf (&new_message, fmt_string, ap); |
dd3f0101 | 3126 | |
3cf2715d | 3127 | if (this_is_asm_operands) |
a52453cc | 3128 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3129 | else |
a52453cc PT |
3130 | internal_error ("%s", new_message); |
3131 | ||
3132 | free (fmt_string); | |
3133 | free (new_message); | |
e34d07f2 | 3134 | va_end (ap); |
3cf2715d DE |
3135 | } |
3136 | \f | |
3137 | /* Output of assembler code from a template, and its subroutines. */ | |
3138 | ||
0d4903b8 RK |
3139 | /* Annotate the assembly with a comment describing the pattern and |
3140 | alternative used. */ | |
3141 | ||
3142 | static void | |
6cf9ac28 | 3143 | output_asm_name (void) |
0d4903b8 RK |
3144 | { |
3145 | if (debug_insn) | |
3146 | { | |
3147 | int num = INSN_CODE (debug_insn); | |
3148 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3149 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3150 | insn_data[num].name); | |
3151 | if (insn_data[num].n_alternatives > 1) | |
3152 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
3153 | #ifdef HAVE_ATTR_length | |
3154 | fprintf (asm_out_file, "\t[length = %d]", | |
3155 | get_attr_length (debug_insn)); | |
3156 | #endif | |
3157 | /* Clear this so only the first assembler insn | |
3158 | of any rtl insn will get the special comment for -dp. */ | |
3159 | debug_insn = 0; | |
3160 | } | |
3161 | } | |
3162 | ||
998d7deb RH |
3163 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3164 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3165 | corresponds to the address of the object and 0 if to the object. */ |
3166 | ||
3167 | static tree | |
6cf9ac28 | 3168 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3169 | { |
998d7deb | 3170 | tree expr; |
c5adc06a RK |
3171 | int inner_addressp; |
3172 | ||
3173 | *paddressp = 0; | |
3174 | ||
f8cfc6aa | 3175 | if (REG_P (op)) |
a560d4d4 | 3176 | return REG_EXPR (op); |
3c0cb5de | 3177 | else if (!MEM_P (op)) |
c5adc06a RK |
3178 | return 0; |
3179 | ||
998d7deb RH |
3180 | if (MEM_EXPR (op) != 0) |
3181 | return MEM_EXPR (op); | |
c5adc06a RK |
3182 | |
3183 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3184 | *paddressp = 1; | |
3185 | op = XEXP (op, 0); | |
3186 | ||
3187 | /* First check if we have a decl for the address, then look at the right side | |
3188 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3189 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3190 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3191 | return expr; | |
c5adc06a | 3192 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3193 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3194 | return expr; | |
c5adc06a | 3195 | |
481683e1 | 3196 | while (UNARY_P (op) |
ec8e098d | 3197 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3198 | op = XEXP (op, 0); |
3199 | ||
998d7deb RH |
3200 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3201 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3202 | } |
ff81832f | 3203 | |
4f9b4029 RK |
3204 | /* Output operand names for assembler instructions. OPERANDS is the |
3205 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3206 | is the number of operands to write. */ | |
3207 | ||
3208 | static void | |
6cf9ac28 | 3209 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3210 | { |
3211 | int wrote = 0; | |
3212 | int i; | |
3213 | ||
3214 | for (i = 0; i < nops; i++) | |
3215 | { | |
3216 | int addressp; | |
a560d4d4 JH |
3217 | rtx op = operands[oporder[i]]; |
3218 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3219 | |
a560d4d4 JH |
3220 | fprintf (asm_out_file, "%c%s", |
3221 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3222 | wrote = 1; | |
998d7deb | 3223 | if (expr) |
4f9b4029 | 3224 | { |
a560d4d4 | 3225 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3226 | addressp ? "*" : ""); |
3227 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3228 | wrote = 1; |
3229 | } | |
a560d4d4 JH |
3230 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3231 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3232 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3233 | } |
3234 | } | |
3235 | ||
3cf2715d DE |
3236 | /* Output text from TEMPLATE to the assembler output file, |
3237 | obeying %-directions to substitute operands taken from | |
3238 | the vector OPERANDS. | |
3239 | ||
3240 | %N (for N a digit) means print operand N in usual manner. | |
3241 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3242 | and print the label name with no punctuation. | |
3243 | %cN means require operand N to be a constant | |
3244 | and print the constant expression with no punctuation. | |
3245 | %aN means expect operand N to be a memory address | |
3246 | (not a memory reference!) and print a reference | |
3247 | to that address. | |
3248 | %nN means expect operand N to be a constant | |
3249 | and print a constant expression for minus the value | |
3250 | of the operand, with no other punctuation. */ | |
3251 | ||
3252 | void | |
48c54229 | 3253 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3254 | { |
b3694847 SS |
3255 | const char *p; |
3256 | int c; | |
8554d9a4 JJ |
3257 | #ifdef ASSEMBLER_DIALECT |
3258 | int dialect = 0; | |
3259 | #endif | |
0d4903b8 | 3260 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3261 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3262 | int ops = 0; |
3cf2715d DE |
3263 | |
3264 | /* An insn may return a null string template | |
3265 | in a case where no assembler code is needed. */ | |
48c54229 | 3266 | if (*templ == 0) |
3cf2715d DE |
3267 | return; |
3268 | ||
4f9b4029 | 3269 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3270 | p = templ; |
3cf2715d DE |
3271 | putc ('\t', asm_out_file); |
3272 | ||
3273 | #ifdef ASM_OUTPUT_OPCODE | |
3274 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3275 | #endif | |
3276 | ||
b729186a | 3277 | while ((c = *p++)) |
3cf2715d DE |
3278 | switch (c) |
3279 | { | |
3cf2715d | 3280 | case '\n': |
4f9b4029 RK |
3281 | if (flag_verbose_asm) |
3282 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3283 | if (flag_print_asm_name) |
3284 | output_asm_name (); | |
3285 | ||
4f9b4029 RK |
3286 | ops = 0; |
3287 | memset (opoutput, 0, sizeof opoutput); | |
3288 | ||
3cf2715d | 3289 | putc (c, asm_out_file); |
cb649530 | 3290 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3291 | while ((c = *p) == '\t') |
3292 | { | |
3293 | putc (c, asm_out_file); | |
3294 | p++; | |
3295 | } | |
3296 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3297 | #endif |
cb649530 | 3298 | break; |
3cf2715d DE |
3299 | |
3300 | #ifdef ASSEMBLER_DIALECT | |
3301 | case '{': | |
b729186a | 3302 | { |
b3694847 | 3303 | int i; |
f5d927c0 | 3304 | |
8554d9a4 JJ |
3305 | if (dialect) |
3306 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3307 | else | |
3308 | dialect = 1; | |
3309 | ||
b729186a JL |
3310 | /* If we want the first dialect, do nothing. Otherwise, skip |
3311 | DIALECT_NUMBER of strings ending with '|'. */ | |
3312 | for (i = 0; i < dialect_number; i++) | |
3313 | { | |
463a8384 | 3314 | while (*p && *p != '}' && *p++ != '|') |
b729186a | 3315 | ; |
463a8384 BS |
3316 | if (*p == '}') |
3317 | break; | |
b729186a JL |
3318 | if (*p == '|') |
3319 | p++; | |
3320 | } | |
8554d9a4 JJ |
3321 | |
3322 | if (*p == '\0') | |
3323 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
b729186a | 3324 | } |
3cf2715d DE |
3325 | break; |
3326 | ||
3327 | case '|': | |
8554d9a4 JJ |
3328 | if (dialect) |
3329 | { | |
3330 | /* Skip to close brace. */ | |
3331 | do | |
3332 | { | |
3333 | if (*p == '\0') | |
3334 | { | |
3335 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3336 | break; | |
3337 | } | |
ff81832f | 3338 | } |
8554d9a4 JJ |
3339 | while (*p++ != '}'); |
3340 | dialect = 0; | |
3341 | } | |
3342 | else | |
3343 | putc (c, asm_out_file); | |
3cf2715d DE |
3344 | break; |
3345 | ||
3346 | case '}': | |
8554d9a4 JJ |
3347 | if (! dialect) |
3348 | putc (c, asm_out_file); | |
3349 | dialect = 0; | |
3cf2715d DE |
3350 | break; |
3351 | #endif | |
3352 | ||
3353 | case '%': | |
3354 | /* %% outputs a single %. */ | |
3355 | if (*p == '%') | |
3356 | { | |
3357 | p++; | |
3358 | putc (c, asm_out_file); | |
3359 | } | |
3360 | /* %= outputs a number which is unique to each insn in the entire | |
3361 | compilation. This is useful for making local labels that are | |
3362 | referred to more than once in a given insn. */ | |
3363 | else if (*p == '=') | |
3364 | { | |
3365 | p++; | |
3366 | fprintf (asm_out_file, "%d", insn_counter); | |
3367 | } | |
3368 | /* % followed by a letter and some digits | |
3369 | outputs an operand in a special way depending on the letter. | |
3370 | Letters `acln' are implemented directly. | |
3371 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3372 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3373 | else if (ISALPHA (*p)) |
3cf2715d DE |
3374 | { |
3375 | int letter = *p++; | |
c383c15f GK |
3376 | unsigned long opnum; |
3377 | char *endptr; | |
b0efb46b | 3378 | |
c383c15f GK |
3379 | opnum = strtoul (p, &endptr, 10); |
3380 | ||
3381 | if (endptr == p) | |
3382 | output_operand_lossage ("operand number missing " | |
3383 | "after %%-letter"); | |
3384 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3385 | output_operand_lossage ("operand number out of range"); |
3386 | else if (letter == 'l') | |
c383c15f | 3387 | output_asm_label (operands[opnum]); |
3cf2715d | 3388 | else if (letter == 'a') |
c383c15f | 3389 | output_address (operands[opnum]); |
3cf2715d DE |
3390 | else if (letter == 'c') |
3391 | { | |
c383c15f GK |
3392 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3393 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3394 | else |
c383c15f | 3395 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3396 | } |
3397 | else if (letter == 'n') | |
3398 | { | |
481683e1 | 3399 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3400 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3401 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3402 | else |
3403 | { | |
3404 | putc ('-', asm_out_file); | |
c383c15f | 3405 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3406 | } |
3407 | } | |
3408 | else | |
c383c15f | 3409 | output_operand (operands[opnum], letter); |
f5d927c0 | 3410 | |
c383c15f | 3411 | if (!opoutput[opnum]) |
dc9d0b14 | 3412 | oporder[ops++] = opnum; |
c383c15f | 3413 | opoutput[opnum] = 1; |
0d4903b8 | 3414 | |
c383c15f GK |
3415 | p = endptr; |
3416 | c = *p; | |
3cf2715d DE |
3417 | } |
3418 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3419 | else if (ISDIGIT (*p)) |
3cf2715d | 3420 | { |
c383c15f GK |
3421 | unsigned long opnum; |
3422 | char *endptr; | |
b0efb46b | 3423 | |
c383c15f GK |
3424 | opnum = strtoul (p, &endptr, 10); |
3425 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3426 | output_operand_lossage ("operand number out of range"); |
3427 | else | |
c383c15f | 3428 | output_operand (operands[opnum], 0); |
0d4903b8 | 3429 | |
c383c15f | 3430 | if (!opoutput[opnum]) |
dc9d0b14 | 3431 | oporder[ops++] = opnum; |
c383c15f | 3432 | opoutput[opnum] = 1; |
4f9b4029 | 3433 | |
c383c15f GK |
3434 | p = endptr; |
3435 | c = *p; | |
3cf2715d DE |
3436 | } |
3437 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3438 | punctuation character alone, with no operand. The |
3439 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3440 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3441 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3442 | else |
3443 | output_operand_lossage ("invalid %%-code"); | |
3444 | break; | |
3445 | ||
3446 | default: | |
3447 | putc (c, asm_out_file); | |
3448 | } | |
3449 | ||
0d4903b8 RK |
3450 | /* Write out the variable names for operands, if we know them. */ |
3451 | if (flag_verbose_asm) | |
4f9b4029 | 3452 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3453 | if (flag_print_asm_name) |
3454 | output_asm_name (); | |
3cf2715d DE |
3455 | |
3456 | putc ('\n', asm_out_file); | |
3457 | } | |
3458 | \f | |
3459 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3460 | ||
3461 | void | |
6cf9ac28 | 3462 | output_asm_label (rtx x) |
3cf2715d DE |
3463 | { |
3464 | char buf[256]; | |
3465 | ||
3466 | if (GET_CODE (x) == LABEL_REF) | |
be1bb652 | 3467 | x = XEXP (x, 0); |
4b4bf941 JQ |
3468 | if (LABEL_P (x) |
3469 | || (NOTE_P (x) | |
a38e7aa5 | 3470 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3471 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3472 | else | |
9e637a26 | 3473 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3474 | |
3475 | assemble_name (asm_out_file, buf); | |
3476 | } | |
3477 | ||
a7fe25b8 JJ |
3478 | /* Helper rtx-iteration-function for mark_symbol_refs_as_used and |
3479 | output_operand. Marks SYMBOL_REFs as referenced through use of | |
3480 | assemble_external. */ | |
c70d0414 HPN |
3481 | |
3482 | static int | |
3483 | mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED) | |
3484 | { | |
3485 | rtx x = *xp; | |
3486 | ||
3487 | /* If we have a used symbol, we may have to emit assembly | |
3488 | annotations corresponding to whether the symbol is external, weak | |
3489 | or has non-default visibility. */ | |
3490 | if (GET_CODE (x) == SYMBOL_REF) | |
3491 | { | |
3492 | tree t; | |
3493 | ||
3494 | t = SYMBOL_REF_DECL (x); | |
3495 | if (t) | |
3496 | assemble_external (t); | |
3497 | ||
3498 | return -1; | |
3499 | } | |
3500 | ||
3501 | return 0; | |
3502 | } | |
3503 | ||
a7fe25b8 JJ |
3504 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3505 | ||
3506 | void | |
3507 | mark_symbol_refs_as_used (rtx x) | |
3508 | { | |
3509 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3510 | } | |
3511 | ||
3cf2715d | 3512 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3513 | CODE is a non-digit that preceded the operand-number in the % spec, |
3514 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3515 | between the % and the digits. | |
3516 | When CODE is a non-letter, X is 0. | |
3517 | ||
3518 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3519 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3520 | |
6b3c42ae | 3521 | void |
6cf9ac28 | 3522 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3523 | { |
3524 | if (x && GET_CODE (x) == SUBREG) | |
49d801d3 | 3525 | x = alter_subreg (&x); |
3cf2715d | 3526 | |
04c7ae48 | 3527 | /* X must not be a pseudo reg. */ |
0bccc606 | 3528 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); |
3cf2715d | 3529 | |
6e2188e0 | 3530 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
3531 | |
3532 | if (x == NULL_RTX) | |
3533 | return; | |
3534 | ||
3535 | for_each_rtx (&x, mark_symbol_ref_as_used, NULL); | |
3cf2715d DE |
3536 | } |
3537 | ||
6e2188e0 NF |
3538 | /* Print a memory reference operand for address X using |
3539 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
3540 | |
3541 | void | |
6cf9ac28 | 3542 | output_address (rtx x) |
3cf2715d | 3543 | { |
6fb5fa3c DB |
3544 | bool changed = false; |
3545 | walk_alter_subreg (&x, &changed); | |
6e2188e0 | 3546 | targetm.asm_out.print_operand_address (asm_out_file, x); |
3cf2715d DE |
3547 | } |
3548 | \f | |
3549 | /* Print an integer constant expression in assembler syntax. | |
3550 | Addition and subtraction are the only arithmetic | |
3551 | that may appear in these expressions. */ | |
3552 | ||
3553 | void | |
6cf9ac28 | 3554 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3555 | { |
3556 | char buf[256]; | |
3557 | ||
3558 | restart: | |
3559 | switch (GET_CODE (x)) | |
3560 | { | |
3561 | case PC: | |
eac50d7a | 3562 | putc ('.', file); |
3cf2715d DE |
3563 | break; |
3564 | ||
3565 | case SYMBOL_REF: | |
21dad7e6 | 3566 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 3567 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
3568 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3569 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3570 | #else | |
3cf2715d | 3571 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3572 | #endif |
3cf2715d DE |
3573 | break; |
3574 | ||
3575 | case LABEL_REF: | |
422be3c3 AO |
3576 | x = XEXP (x, 0); |
3577 | /* Fall through. */ | |
3cf2715d DE |
3578 | case CODE_LABEL: |
3579 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3580 | #ifdef ASM_OUTPUT_LABEL_REF |
3581 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3582 | #else | |
3cf2715d | 3583 | assemble_name (file, buf); |
2f0b7af6 | 3584 | #endif |
3cf2715d DE |
3585 | break; |
3586 | ||
3587 | case CONST_INT: | |
6725cc58 | 3588 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3589 | break; |
3590 | ||
3591 | case CONST: | |
3592 | /* This used to output parentheses around the expression, | |
3593 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3594 | output_addr_const (file, XEXP (x, 0)); | |
3595 | break; | |
3596 | ||
3597 | case CONST_DOUBLE: | |
3598 | if (GET_MODE (x) == VOIDmode) | |
3599 | { | |
3600 | /* We can use %d if the number is one word and positive. */ | |
3601 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3602 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
3603 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3604 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 3605 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
3606 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3607 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 3608 | else |
21e3a81b | 3609 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3610 | } |
3611 | else | |
3612 | /* We can't handle floating point constants; | |
3613 | PRINT_OPERAND must handle them. */ | |
3614 | output_operand_lossage ("floating constant misused"); | |
3615 | break; | |
3616 | ||
14c931f1 | 3617 | case CONST_FIXED: |
848fac28 | 3618 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
3619 | break; |
3620 | ||
3cf2715d DE |
3621 | case PLUS: |
3622 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 3623 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
3624 | { |
3625 | output_addr_const (file, XEXP (x, 1)); | |
3626 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3627 | fprintf (file, "+"); | |
3628 | output_addr_const (file, XEXP (x, 0)); | |
3629 | } | |
3630 | else | |
3631 | { | |
3632 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 3633 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 3634 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
3635 | fprintf (file, "+"); |
3636 | output_addr_const (file, XEXP (x, 1)); | |
3637 | } | |
3638 | break; | |
3639 | ||
3640 | case MINUS: | |
3641 | /* Avoid outputting things like x-x or x+5-x, | |
3642 | since some assemblers can't handle that. */ | |
3643 | x = simplify_subtraction (x); | |
3644 | if (GET_CODE (x) != MINUS) | |
3645 | goto restart; | |
3646 | ||
3647 | output_addr_const (file, XEXP (x, 0)); | |
3648 | fprintf (file, "-"); | |
481683e1 | 3649 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
3650 | || GET_CODE (XEXP (x, 1)) == PC |
3651 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
3652 | output_addr_const (file, XEXP (x, 1)); | |
3653 | else | |
3cf2715d | 3654 | { |
17b53c33 | 3655 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 3656 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 3657 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 3658 | } |
3cf2715d DE |
3659 | break; |
3660 | ||
3661 | case ZERO_EXTEND: | |
3662 | case SIGN_EXTEND: | |
fdf473ae | 3663 | case SUBREG: |
c01e4479 | 3664 | case TRUNCATE: |
3cf2715d DE |
3665 | output_addr_const (file, XEXP (x, 0)); |
3666 | break; | |
3667 | ||
3668 | default: | |
6cbd8875 AS |
3669 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
3670 | break; | |
422be3c3 | 3671 | |
3cf2715d DE |
3672 | output_operand_lossage ("invalid expression as operand"); |
3673 | } | |
3674 | } | |
3675 | \f | |
a803773f JM |
3676 | /* Output a quoted string. */ |
3677 | ||
3678 | void | |
3679 | output_quoted_string (FILE *asm_file, const char *string) | |
3680 | { | |
3681 | #ifdef OUTPUT_QUOTED_STRING | |
3682 | OUTPUT_QUOTED_STRING (asm_file, string); | |
3683 | #else | |
3684 | char c; | |
3685 | ||
3686 | putc ('\"', asm_file); | |
3687 | while ((c = *string++) != 0) | |
3688 | { | |
3689 | if (ISPRINT (c)) | |
3690 | { | |
3691 | if (c == '\"' || c == '\\') | |
3692 | putc ('\\', asm_file); | |
3693 | putc (c, asm_file); | |
3694 | } | |
3695 | else | |
3696 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
3697 | } | |
3698 | putc ('\"', asm_file); | |
3699 | #endif | |
3700 | } | |
3701 | \f | |
5e3929ed DA |
3702 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
3703 | ||
3704 | void | |
3705 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
3706 | { | |
3707 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
3708 | if (value == 0) | |
3709 | putc ('0', f); | |
3710 | else | |
3711 | { | |
3712 | char *p = buf + sizeof (buf); | |
3713 | do | |
3714 | *--p = "0123456789abcdef"[value % 16]; | |
3715 | while ((value /= 16) != 0); | |
3716 | *--p = 'x'; | |
3717 | *--p = '0'; | |
3718 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
3719 | } | |
3720 | } | |
3721 | ||
3722 | /* Internal function that prints an unsigned long in decimal in reverse. | |
3723 | The output string IS NOT null-terminated. */ | |
3724 | ||
3725 | static int | |
3726 | sprint_ul_rev (char *s, unsigned long value) | |
3727 | { | |
3728 | int i = 0; | |
3729 | do | |
3730 | { | |
3731 | s[i] = "0123456789"[value % 10]; | |
3732 | value /= 10; | |
3733 | i++; | |
3734 | /* alternate version, without modulo */ | |
3735 | /* oldval = value; */ | |
3736 | /* value /= 10; */ | |
3737 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
3738 | /* i++ */ | |
3739 | } | |
3740 | while (value != 0); | |
3741 | return i; | |
3742 | } | |
3743 | ||
5e3929ed DA |
3744 | /* Write an unsigned long as decimal to a file, fast. */ |
3745 | ||
3746 | void | |
3747 | fprint_ul (FILE *f, unsigned long value) | |
3748 | { | |
3749 | /* python says: len(str(2**64)) == 20 */ | |
3750 | char s[20]; | |
3751 | int i; | |
3752 | ||
3753 | i = sprint_ul_rev (s, value); | |
3754 | ||
3755 | /* It's probably too small to bother with string reversal and fputs. */ | |
3756 | do | |
3757 | { | |
3758 | i--; | |
3759 | putc (s[i], f); | |
3760 | } | |
3761 | while (i != 0); | |
3762 | } | |
3763 | ||
3764 | /* Write an unsigned long as decimal to a string, fast. | |
3765 | s must be wide enough to not overflow, at least 21 chars. | |
3766 | Returns the length of the string (without terminating '\0'). */ | |
3767 | ||
3768 | int | |
3769 | sprint_ul (char *s, unsigned long value) | |
3770 | { | |
3771 | int len; | |
3772 | char tmp_c; | |
3773 | int i; | |
3774 | int j; | |
3775 | ||
3776 | len = sprint_ul_rev (s, value); | |
3777 | s[len] = '\0'; | |
3778 | ||
3779 | /* Reverse the string. */ | |
3780 | i = 0; | |
3781 | j = len - 1; | |
3782 | while (i < j) | |
3783 | { | |
3784 | tmp_c = s[i]; | |
3785 | s[i] = s[j]; | |
3786 | s[j] = tmp_c; | |
3787 | i++; j--; | |
3788 | } | |
3789 | ||
3790 | return len; | |
3791 | } | |
3792 | ||
3cf2715d DE |
3793 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
3794 | %R prints the value of REGISTER_PREFIX. | |
3795 | %L prints the value of LOCAL_LABEL_PREFIX. | |
3796 | %U prints the value of USER_LABEL_PREFIX. | |
3797 | %I prints the value of IMMEDIATE_PREFIX. | |
3798 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 3799 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
3800 | |
3801 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
3802 | ||
3803 | void | |
e34d07f2 | 3804 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 3805 | { |
3cf2715d DE |
3806 | char buf[10]; |
3807 | char *q, c; | |
e34d07f2 | 3808 | va_list argptr; |
6cf9ac28 | 3809 | |
e34d07f2 | 3810 | va_start (argptr, p); |
3cf2715d DE |
3811 | |
3812 | buf[0] = '%'; | |
3813 | ||
b729186a | 3814 | while ((c = *p++)) |
3cf2715d DE |
3815 | switch (c) |
3816 | { | |
3817 | #ifdef ASSEMBLER_DIALECT | |
3818 | case '{': | |
b729186a JL |
3819 | { |
3820 | int i; | |
3cf2715d | 3821 | |
b729186a JL |
3822 | /* If we want the first dialect, do nothing. Otherwise, skip |
3823 | DIALECT_NUMBER of strings ending with '|'. */ | |
3824 | for (i = 0; i < dialect_number; i++) | |
3825 | { | |
3826 | while (*p && *p++ != '|') | |
3827 | ; | |
3828 | ||
3829 | if (*p == '|') | |
3830 | p++; | |
f5d927c0 | 3831 | } |
b729186a | 3832 | } |
3cf2715d DE |
3833 | break; |
3834 | ||
3835 | case '|': | |
3836 | /* Skip to close brace. */ | |
3837 | while (*p && *p++ != '}') | |
3838 | ; | |
3839 | break; | |
3840 | ||
3841 | case '}': | |
3842 | break; | |
3843 | #endif | |
3844 | ||
3845 | case '%': | |
3846 | c = *p++; | |
3847 | q = &buf[1]; | |
b1721339 KG |
3848 | while (strchr ("-+ #0", c)) |
3849 | { | |
3850 | *q++ = c; | |
3851 | c = *p++; | |
3852 | } | |
0df6c2c7 | 3853 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
3854 | { |
3855 | *q++ = c; | |
3856 | c = *p++; | |
3857 | } | |
3858 | switch (c) | |
3859 | { | |
3860 | case '%': | |
b1721339 | 3861 | putc ('%', file); |
3cf2715d DE |
3862 | break; |
3863 | ||
3864 | case 'd': case 'i': case 'u': | |
b1721339 KG |
3865 | case 'x': case 'X': case 'o': |
3866 | case 'c': | |
3cf2715d DE |
3867 | *q++ = c; |
3868 | *q = 0; | |
3869 | fprintf (file, buf, va_arg (argptr, int)); | |
3870 | break; | |
3871 | ||
3872 | case 'w': | |
b1721339 KG |
3873 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
3874 | 'o' cases, but we do not check for those cases. It | |
3875 | means that the value is a HOST_WIDE_INT, which may be | |
3876 | either `long' or `long long'. */ | |
85f015e1 KG |
3877 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
3878 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
3879 | *q++ = *p++; |
3880 | *q = 0; | |
3881 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
3882 | break; | |
3883 | ||
3884 | case 'l': | |
3885 | *q++ = c; | |
b1721339 KG |
3886 | #ifdef HAVE_LONG_LONG |
3887 | if (*p == 'l') | |
3888 | { | |
3889 | *q++ = *p++; | |
3890 | *q++ = *p++; | |
3891 | *q = 0; | |
3892 | fprintf (file, buf, va_arg (argptr, long long)); | |
3893 | } | |
3894 | else | |
3895 | #endif | |
3896 | { | |
3897 | *q++ = *p++; | |
3898 | *q = 0; | |
3899 | fprintf (file, buf, va_arg (argptr, long)); | |
3900 | } | |
6cf9ac28 | 3901 | |
3cf2715d DE |
3902 | break; |
3903 | ||
3904 | case 's': | |
3905 | *q++ = c; | |
3906 | *q = 0; | |
3907 | fprintf (file, buf, va_arg (argptr, char *)); | |
3908 | break; | |
3909 | ||
3910 | case 'O': | |
3911 | #ifdef ASM_OUTPUT_OPCODE | |
3912 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3913 | #endif | |
3914 | break; | |
3915 | ||
3916 | case 'R': | |
3917 | #ifdef REGISTER_PREFIX | |
3918 | fprintf (file, "%s", REGISTER_PREFIX); | |
3919 | #endif | |
3920 | break; | |
3921 | ||
3922 | case 'I': | |
3923 | #ifdef IMMEDIATE_PREFIX | |
3924 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
3925 | #endif | |
3926 | break; | |
3927 | ||
3928 | case 'L': | |
3929 | #ifdef LOCAL_LABEL_PREFIX | |
3930 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
3931 | #endif | |
3932 | break; | |
3933 | ||
3934 | case 'U': | |
19283265 | 3935 | fputs (user_label_prefix, file); |
3cf2715d DE |
3936 | break; |
3937 | ||
fe0503ea | 3938 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 3939 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
3940 | and so are not available to target specific code. In order to |
3941 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
3942 | they are defined here. As they get turned into real extensions | |
3943 | to asm_fprintf they should be removed from this list. */ | |
3944 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
3945 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
3946 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
3947 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
3948 | break; | |
f5d927c0 | 3949 | |
fe0503ea NC |
3950 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
3951 | #endif | |
3cf2715d | 3952 | default: |
0bccc606 | 3953 | gcc_unreachable (); |
3cf2715d DE |
3954 | } |
3955 | break; | |
3956 | ||
3957 | default: | |
b1721339 | 3958 | putc (c, file); |
3cf2715d | 3959 | } |
e34d07f2 | 3960 | va_end (argptr); |
3cf2715d DE |
3961 | } |
3962 | \f | |
3963 | /* Split up a CONST_DOUBLE or integer constant rtx | |
3964 | into two rtx's for single words, | |
3965 | storing in *FIRST the word that comes first in memory in the target | |
3966 | and in *SECOND the other. */ | |
3967 | ||
3968 | void | |
6cf9ac28 | 3969 | split_double (rtx value, rtx *first, rtx *second) |
3cf2715d | 3970 | { |
481683e1 | 3971 | if (CONST_INT_P (value)) |
3cf2715d | 3972 | { |
5a1a6efd | 3973 | if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) |
f76b9db2 | 3974 | { |
5a1a6efd | 3975 | /* In this case the CONST_INT holds both target words. |
27eef9ce JC |
3976 | Extract the bits from it into two word-sized pieces. |
3977 | Sign extend each half to HOST_WIDE_INT. */ | |
7f251dee AO |
3978 | unsigned HOST_WIDE_INT low, high; |
3979 | unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; | |
ae77ff7a | 3980 | unsigned bits_per_word = BITS_PER_WORD; |
7f251dee AO |
3981 | |
3982 | /* Set sign_bit to the most significant bit of a word. */ | |
3983 | sign_bit = 1; | |
ae77ff7a | 3984 | sign_bit <<= bits_per_word - 1; |
7f251dee AO |
3985 | |
3986 | /* Set mask so that all bits of the word are set. We could | |
3987 | have used 1 << BITS_PER_WORD instead of basing the | |
3988 | calculation on sign_bit. However, on machines where | |
3989 | HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a | |
3990 | compiler warning, even though the code would never be | |
3991 | executed. */ | |
3992 | mask = sign_bit << 1; | |
3993 | mask--; | |
3994 | ||
3995 | /* Set sign_extend as any remaining bits. */ | |
3996 | sign_extend = ~mask; | |
f5d927c0 | 3997 | |
7f251dee AO |
3998 | /* Pick the lower word and sign-extend it. */ |
3999 | low = INTVAL (value); | |
4000 | low &= mask; | |
4001 | if (low & sign_bit) | |
4002 | low |= sign_extend; | |
4003 | ||
4004 | /* Pick the higher word, shifted to the least significant | |
4005 | bits, and sign-extend it. */ | |
4006 | high = INTVAL (value); | |
ae77ff7a | 4007 | high >>= bits_per_word - 1; |
7f251dee AO |
4008 | high >>= 1; |
4009 | high &= mask; | |
4010 | if (high & sign_bit) | |
4011 | high |= sign_extend; | |
4012 | ||
4013 | /* Store the words in the target machine order. */ | |
5a1a6efd RK |
4014 | if (WORDS_BIG_ENDIAN) |
4015 | { | |
7f251dee AO |
4016 | *first = GEN_INT (high); |
4017 | *second = GEN_INT (low); | |
5a1a6efd RK |
4018 | } |
4019 | else | |
4020 | { | |
7f251dee AO |
4021 | *first = GEN_INT (low); |
4022 | *second = GEN_INT (high); | |
5a1a6efd | 4023 | } |
f76b9db2 ILT |
4024 | } |
4025 | else | |
4026 | { | |
5a1a6efd RK |
4027 | /* The rule for using CONST_INT for a wider mode |
4028 | is that we regard the value as signed. | |
4029 | So sign-extend it. */ | |
4030 | rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); | |
4031 | if (WORDS_BIG_ENDIAN) | |
4032 | { | |
4033 | *first = high; | |
4034 | *second = value; | |
4035 | } | |
4036 | else | |
4037 | { | |
4038 | *first = value; | |
4039 | *second = high; | |
4040 | } | |
f76b9db2 | 4041 | } |
3cf2715d DE |
4042 | } |
4043 | else if (GET_CODE (value) != CONST_DOUBLE) | |
4044 | { | |
f76b9db2 ILT |
4045 | if (WORDS_BIG_ENDIAN) |
4046 | { | |
4047 | *first = const0_rtx; | |
4048 | *second = value; | |
4049 | } | |
4050 | else | |
4051 | { | |
4052 | *first = value; | |
4053 | *second = const0_rtx; | |
4054 | } | |
3cf2715d DE |
4055 | } |
4056 | else if (GET_MODE (value) == VOIDmode | |
4057 | /* This is the old way we did CONST_DOUBLE integers. */ | |
4058 | || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) | |
4059 | { | |
4060 | /* In an integer, the words are defined as most and least significant. | |
4061 | So order them by the target's convention. */ | |
f76b9db2 ILT |
4062 | if (WORDS_BIG_ENDIAN) |
4063 | { | |
4064 | *first = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
4065 | *second = GEN_INT (CONST_DOUBLE_LOW (value)); | |
4066 | } | |
4067 | else | |
4068 | { | |
4069 | *first = GEN_INT (CONST_DOUBLE_LOW (value)); | |
4070 | *second = GEN_INT (CONST_DOUBLE_HIGH (value)); | |
4071 | } | |
3cf2715d DE |
4072 | } |
4073 | else | |
4074 | { | |
f5d927c0 KH |
4075 | REAL_VALUE_TYPE r; |
4076 | long l[2]; | |
3cf2715d DE |
4077 | REAL_VALUE_FROM_CONST_DOUBLE (r, value); |
4078 | ||
4079 | /* Note, this converts the REAL_VALUE_TYPE to the target's | |
4080 | format, splits up the floating point double and outputs | |
4081 | exactly 32 bits of it into each of l[0] and l[1] -- | |
0f41302f | 4082 | not necessarily BITS_PER_WORD bits. */ |
3cf2715d DE |
4083 | REAL_VALUE_TO_TARGET_DOUBLE (r, l); |
4084 | ||
b5a3eb84 JW |
4085 | /* If 32 bits is an entire word for the target, but not for the host, |
4086 | then sign-extend on the host so that the number will look the same | |
4087 | way on the host that it would on the target. See for instance | |
4088 | simplify_unary_operation. The #if is needed to avoid compiler | |
4089 | warnings. */ | |
4090 | ||
4091 | #if HOST_BITS_PER_LONG > 32 | |
4092 | if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) | |
4093 | { | |
4094 | if (l[0] & ((long) 1 << 31)) | |
4095 | l[0] |= ((long) (-1) << 32); | |
4096 | if (l[1] & ((long) 1 << 31)) | |
4097 | l[1] |= ((long) (-1) << 32); | |
4098 | } | |
4099 | #endif | |
4100 | ||
3e95a7cb ZW |
4101 | *first = GEN_INT (l[0]); |
4102 | *second = GEN_INT (l[1]); | |
3cf2715d DE |
4103 | } |
4104 | } | |
4105 | \f | |
4106 | /* Return nonzero if this function has no function calls. */ | |
4107 | ||
4108 | int | |
6cf9ac28 | 4109 | leaf_function_p (void) |
3cf2715d DE |
4110 | { |
4111 | rtx insn; | |
b660f82f | 4112 | rtx link; |
3cf2715d | 4113 | |
e3b5732b | 4114 | if (crtl->profile || profile_arc_flag) |
3cf2715d DE |
4115 | return 0; |
4116 | ||
4117 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4118 | { | |
4b4bf941 | 4119 | if (CALL_P (insn) |
7d167afd | 4120 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4121 | return 0; |
4b4bf941 | 4122 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4123 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4124 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4125 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4126 | return 0; |
4127 | } | |
cb91fab0 | 4128 | for (link = crtl->epilogue_delay_list; |
b660f82f JW |
4129 | link; |
4130 | link = XEXP (link, 1)) | |
3cf2715d | 4131 | { |
b660f82f JW |
4132 | insn = XEXP (link, 0); |
4133 | ||
4b4bf941 | 4134 | if (CALL_P (insn) |
7d167afd | 4135 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4136 | return 0; |
4b4bf941 | 4137 | if (NONJUMP_INSN_P (insn) |
b660f82f | 4138 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4139 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
b660f82f | 4140 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4141 | return 0; |
4142 | } | |
4143 | ||
4144 | return 1; | |
4145 | } | |
4146 | ||
09da1532 | 4147 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4148 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4149 | output templates to customary add branch prediction hints. | |
4150 | */ | |
4151 | int | |
6cf9ac28 | 4152 | final_forward_branch_p (rtx insn) |
ef6257cd JH |
4153 | { |
4154 | int insn_id, label_id; | |
b0efb46b | 4155 | |
0bccc606 | 4156 | gcc_assert (uid_shuid); |
ef6257cd JH |
4157 | insn_id = INSN_SHUID (insn); |
4158 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4159 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4160 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4161 | return insn_id < label_id; |
4162 | } | |
4163 | ||
3cf2715d DE |
4164 | /* On some machines, a function with no call insns |
4165 | can run faster if it doesn't create its own register window. | |
4166 | When output, the leaf function should use only the "output" | |
4167 | registers. Ordinarily, the function would be compiled to use | |
4168 | the "input" registers to find its arguments; it is a candidate | |
4169 | for leaf treatment if it uses only the "input" registers. | |
4170 | Leaf function treatment means renumbering so the function | |
4171 | uses the "output" registers instead. */ | |
4172 | ||
4173 | #ifdef LEAF_REGISTERS | |
4174 | ||
3cf2715d DE |
4175 | /* Return 1 if this function uses only the registers that can be |
4176 | safely renumbered. */ | |
4177 | ||
4178 | int | |
6cf9ac28 | 4179 | only_leaf_regs_used (void) |
3cf2715d DE |
4180 | { |
4181 | int i; | |
4977bab6 | 4182 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4183 | |
4184 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4185 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4186 | && ! permitted_reg_in_leaf_functions[i]) |
4187 | return 0; | |
4188 | ||
e3b5732b | 4189 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4190 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4191 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4192 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4193 | return 0; | |
4194 | ||
3cf2715d DE |
4195 | return 1; |
4196 | } | |
4197 | ||
4198 | /* Scan all instructions and renumber all registers into those | |
4199 | available in leaf functions. */ | |
4200 | ||
4201 | static void | |
6cf9ac28 | 4202 | leaf_renumber_regs (rtx first) |
3cf2715d DE |
4203 | { |
4204 | rtx insn; | |
4205 | ||
4206 | /* Renumber only the actual patterns. | |
4207 | The reg-notes can contain frame pointer refs, | |
4208 | and renumbering them could crash, and should not be needed. */ | |
4209 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4210 | if (INSN_P (insn)) |
3cf2715d | 4211 | leaf_renumber_regs_insn (PATTERN (insn)); |
cb91fab0 | 4212 | for (insn = crtl->epilogue_delay_list; |
f5d927c0 KH |
4213 | insn; |
4214 | insn = XEXP (insn, 1)) | |
2c3c49de | 4215 | if (INSN_P (XEXP (insn, 0))) |
3cf2715d DE |
4216 | leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); |
4217 | } | |
4218 | ||
4219 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4220 | available in leaf functions. */ | |
4221 | ||
4222 | void | |
6cf9ac28 | 4223 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4224 | { |
b3694847 SS |
4225 | int i, j; |
4226 | const char *format_ptr; | |
3cf2715d DE |
4227 | |
4228 | if (in_rtx == 0) | |
4229 | return; | |
4230 | ||
4231 | /* Renumber all input-registers into output-registers. | |
4232 | renumbered_regs would be 1 for an output-register; | |
4233 | they */ | |
4234 | ||
f8cfc6aa | 4235 | if (REG_P (in_rtx)) |
3cf2715d DE |
4236 | { |
4237 | int newreg; | |
4238 | ||
4239 | /* Don't renumber the same reg twice. */ | |
4240 | if (in_rtx->used) | |
4241 | return; | |
4242 | ||
4243 | newreg = REGNO (in_rtx); | |
4244 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4245 | to reach here as part of a REG_NOTE. */ | |
4246 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4247 | { | |
4248 | in_rtx->used = 1; | |
4249 | return; | |
4250 | } | |
4251 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4252 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4253 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4254 | df_set_regs_ever_live (newreg, true); | |
4255 | SET_REGNO (in_rtx, newreg); | |
3cf2715d DE |
4256 | in_rtx->used = 1; |
4257 | } | |
4258 | ||
2c3c49de | 4259 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4260 | { |
4261 | /* Inside a SEQUENCE, we find insns. | |
4262 | Renumber just the patterns of these insns, | |
4263 | just as we do for the top-level insns. */ | |
4264 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4265 | return; | |
4266 | } | |
4267 | ||
4268 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4269 | ||
4270 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4271 | switch (*format_ptr++) | |
4272 | { | |
4273 | case 'e': | |
4274 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4275 | break; | |
4276 | ||
4277 | case 'E': | |
4278 | if (NULL != XVEC (in_rtx, i)) | |
4279 | { | |
4280 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4281 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4282 | } | |
4283 | break; | |
4284 | ||
4285 | case 'S': | |
4286 | case 's': | |
4287 | case '0': | |
4288 | case 'i': | |
4289 | case 'w': | |
4290 | case 'n': | |
4291 | case 'u': | |
4292 | break; | |
4293 | ||
4294 | default: | |
0bccc606 | 4295 | gcc_unreachable (); |
3cf2715d DE |
4296 | } |
4297 | } | |
4298 | #endif | |
ef330312 PB |
4299 | \f |
4300 | /* Turn the RTL into assembly. */ | |
c2924966 | 4301 | static unsigned int |
ef330312 PB |
4302 | rest_of_handle_final (void) |
4303 | { | |
4304 | rtx x; | |
4305 | const char *fnname; | |
4306 | ||
4307 | /* Get the function's name, as described by its RTL. This may be | |
4308 | different from the DECL_NAME name used in the source file. */ | |
4309 | ||
4310 | x = DECL_RTL (current_function_decl); | |
4311 | gcc_assert (MEM_P (x)); | |
4312 | x = XEXP (x, 0); | |
4313 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
4314 | fnname = XSTR (x, 0); | |
4315 | ||
4316 | assemble_start_function (current_function_decl, fnname); | |
4317 | final_start_function (get_insns (), asm_out_file, optimize); | |
4318 | final (get_insns (), asm_out_file, optimize); | |
4319 | final_end_function (); | |
4320 | ||
182a0c11 RH |
4321 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4322 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4323 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4324 | output_function_exception_table (fnname); |
ef330312 PB |
4325 | |
4326 | assemble_end_function (current_function_decl, fnname); | |
4327 | ||
ef330312 PB |
4328 | user_defined_section_attribute = false; |
4329 | ||
6fb5fa3c DB |
4330 | /* Free up reg info memory. */ |
4331 | free_reg_info (); | |
4332 | ||
ef330312 PB |
4333 | if (! quiet_flag) |
4334 | fflush (asm_out_file); | |
4335 | ||
ef330312 PB |
4336 | /* Write DBX symbols if requested. */ |
4337 | ||
4338 | /* Note that for those inline functions where we don't initially | |
4339 | know for certain that we will be generating an out-of-line copy, | |
4340 | the first invocation of this routine (rest_of_compilation) will | |
4341 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4342 | Later on, wrapup_global_declarations will (indirectly) call | |
4343 | rest_of_compilation again for those inline functions that need | |
4344 | to have out-of-line copies generated. During that call, we | |
4345 | *will* be routed past here. */ | |
4346 | ||
4347 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4348 | if (!DECL_IGNORED_P (current_function_decl)) |
4349 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4350 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4351 | |
4352 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4353 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4354 | ||
395a40e0 JH |
4355 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4356 | && targetm.have_ctors_dtors) | |
4357 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4358 | decl_init_priority_lookup | |
4359 | (current_function_decl)); | |
4360 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4361 | && targetm.have_ctors_dtors) | |
4362 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4363 | decl_fini_priority_lookup | |
4364 | (current_function_decl)); | |
c2924966 | 4365 | return 0; |
ef330312 PB |
4366 | } |
4367 | ||
8ddbbcae | 4368 | struct rtl_opt_pass pass_final = |
ef330312 | 4369 | { |
8ddbbcae JH |
4370 | { |
4371 | RTL_PASS, | |
e7f373fa | 4372 | "final", /* name */ |
ef330312 PB |
4373 | NULL, /* gate */ |
4374 | rest_of_handle_final, /* execute */ | |
4375 | NULL, /* sub */ | |
4376 | NULL, /* next */ | |
4377 | 0, /* static_pass_number */ | |
4378 | TV_FINAL, /* tv_id */ | |
4379 | 0, /* properties_required */ | |
4380 | 0, /* properties_provided */ | |
4381 | 0, /* properties_destroyed */ | |
4382 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4383 | TODO_ggc_collect /* todo_flags_finish */ |
4384 | } | |
ef330312 PB |
4385 | }; |
4386 | ||
4387 | ||
c2924966 | 4388 | static unsigned int |
ef330312 PB |
4389 | rest_of_handle_shorten_branches (void) |
4390 | { | |
4391 | /* Shorten branches. */ | |
4392 | shorten_branches (get_insns ()); | |
c2924966 | 4393 | return 0; |
ef330312 | 4394 | } |
b0efb46b | 4395 | |
8ddbbcae | 4396 | struct rtl_opt_pass pass_shorten_branches = |
ef330312 | 4397 | { |
8ddbbcae JH |
4398 | { |
4399 | RTL_PASS, | |
defb77dc | 4400 | "shorten", /* name */ |
ef330312 PB |
4401 | NULL, /* gate */ |
4402 | rest_of_handle_shorten_branches, /* execute */ | |
4403 | NULL, /* sub */ | |
4404 | NULL, /* next */ | |
4405 | 0, /* static_pass_number */ | |
4406 | TV_FINAL, /* tv_id */ | |
4407 | 0, /* properties_required */ | |
4408 | 0, /* properties_provided */ | |
4409 | 0, /* properties_destroyed */ | |
4410 | 0, /* todo_flags_start */ | |
22c5fa5f | 4411 | 0 /* todo_flags_finish */ |
8ddbbcae | 4412 | } |
ef330312 PB |
4413 | }; |
4414 | ||
4415 | ||
c2924966 | 4416 | static unsigned int |
ef330312 PB |
4417 | rest_of_clean_state (void) |
4418 | { | |
4419 | rtx insn, next; | |
2153915d AO |
4420 | FILE *final_output = NULL; |
4421 | int save_unnumbered = flag_dump_unnumbered; | |
4422 | int save_noaddr = flag_dump_noaddr; | |
4423 | ||
4424 | if (flag_dump_final_insns) | |
4425 | { | |
4426 | final_output = fopen (flag_dump_final_insns, "a"); | |
4427 | if (!final_output) | |
4428 | { | |
7ca92787 JM |
4429 | error ("could not open final insn dump file %qs: %m", |
4430 | flag_dump_final_insns); | |
2153915d AO |
4431 | flag_dump_final_insns = NULL; |
4432 | } | |
4433 | else | |
4434 | { | |
2153915d | 4435 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb RG |
4436 | if (flag_compare_debug_opt || flag_compare_debug) |
4437 | dump_flags |= TDF_NOUID; | |
6d8402ac AO |
4438 | dump_function_header (final_output, current_function_decl, |
4439 | dump_flags); | |
6ca5d1f6 | 4440 | final_insns_dump_p = true; |
2153915d AO |
4441 | |
4442 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4443 | if (LABEL_P (insn)) | |
4444 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4445 | else | |
a59d15cf AO |
4446 | { |
4447 | if (NOTE_P (insn)) | |
4448 | set_block_for_insn (insn, NULL); | |
4449 | INSN_UID (insn) = 0; | |
4450 | } | |
2153915d AO |
4451 | } |
4452 | } | |
ef330312 PB |
4453 | |
4454 | /* It is very important to decompose the RTL instruction chain here: | |
4455 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4456 | body. If these remain pointing to the other insns, we end up preserving | |
4457 | whole RTL chain and attached detailed debug info in memory. */ | |
4458 | for (insn = get_insns (); insn; insn = next) | |
4459 | { | |
4460 | next = NEXT_INSN (insn); | |
4461 | NEXT_INSN (insn) = NULL; | |
4462 | PREV_INSN (insn) = NULL; | |
2153915d AO |
4463 | |
4464 | if (final_output | |
4465 | && (!NOTE_P (insn) || | |
4466 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
2b1c5433 | 4467 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4468 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4469 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4470 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4471 | print_rtl_single (final_output, insn); |
2153915d AO |
4472 | } |
4473 | ||
4474 | if (final_output) | |
4475 | { | |
4476 | flag_dump_noaddr = save_noaddr; | |
4477 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4478 | final_insns_dump_p = false; |
2153915d AO |
4479 | |
4480 | if (fclose (final_output)) | |
4481 | { | |
7ca92787 JM |
4482 | error ("could not close final insn dump file %qs: %m", |
4483 | flag_dump_final_insns); | |
2153915d AO |
4484 | flag_dump_final_insns = NULL; |
4485 | } | |
ef330312 PB |
4486 | } |
4487 | ||
4488 | /* In case the function was not output, | |
4489 | don't leave any temporary anonymous types | |
4490 | queued up for sdb output. */ | |
4491 | #ifdef SDB_DEBUGGING_INFO | |
4492 | if (write_symbols == SDB_DEBUG) | |
4493 | sdbout_types (NULL_TREE); | |
4494 | #endif | |
4495 | ||
5f39ad47 | 4496 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4497 | reload_completed = 0; |
4498 | epilogue_completed = 0; | |
23249ac4 DB |
4499 | #ifdef STACK_REGS |
4500 | regstack_completed = 0; | |
4501 | #endif | |
ef330312 PB |
4502 | |
4503 | /* Clear out the insn_length contents now that they are no | |
4504 | longer valid. */ | |
4505 | init_insn_lengths (); | |
4506 | ||
4507 | /* Show no temporary slots allocated. */ | |
4508 | init_temp_slots (); | |
4509 | ||
ef330312 PB |
4510 | free_bb_for_insn (); |
4511 | ||
55b34b5f RG |
4512 | delete_tree_ssa (); |
4513 | ||
051f8cc6 JH |
4514 | /* We can reduce stack alignment on call site only when we are sure that |
4515 | the function body just produced will be actually used in the final | |
4516 | executable. */ | |
4517 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4518 | { |
17b29c0a | 4519 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4520 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4521 | pref = crtl->stack_alignment_needed; | |
ef330312 PB |
4522 | cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary |
4523 | = pref; | |
4524 | } | |
4525 | ||
4526 | /* Make sure volatile mem refs aren't considered valid operands for | |
4527 | arithmetic insns. We must call this here if this is a nested inline | |
4528 | function, since the above code leaves us in the init_recog state, | |
4529 | and the function context push/pop code does not save/restore volatile_ok. | |
4530 | ||
4531 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4532 | anymore if we do it here? */ | |
4533 | ||
4534 | init_recog_no_volatile (); | |
4535 | ||
4536 | /* We're done with this function. Free up memory if we can. */ | |
4537 | free_after_parsing (cfun); | |
4538 | free_after_compilation (cfun); | |
c2924966 | 4539 | return 0; |
ef330312 PB |
4540 | } |
4541 | ||
8ddbbcae | 4542 | struct rtl_opt_pass pass_clean_state = |
ef330312 | 4543 | { |
8ddbbcae JH |
4544 | { |
4545 | RTL_PASS, | |
cf400ddb | 4546 | "*clean_state", /* name */ |
ef330312 PB |
4547 | NULL, /* gate */ |
4548 | rest_of_clean_state, /* execute */ | |
4549 | NULL, /* sub */ | |
4550 | NULL, /* next */ | |
4551 | 0, /* static_pass_number */ | |
4552 | TV_FINAL, /* tv_id */ | |
4553 | 0, /* properties_required */ | |
4554 | 0, /* properties_provided */ | |
4555 | PROP_rtl, /* properties_destroyed */ | |
4556 | 0, /* todo_flags_start */ | |
8ddbbcae JH |
4557 | 0 /* todo_flags_finish */ |
4558 | } | |
ef330312 | 4559 | }; |