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d7429b6a | 1 | /* Data flow analysis for GNU compiler. |
c9bacfdb | 2 | Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
14b9dd55 BS |
3 | 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, |
4 | Inc. | |
d7429b6a | 5 | |
1322177d | 6 | This file is part of GCC. |
d7429b6a | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 2, or (at your option) any later | |
11 | version. | |
d7429b6a | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
d7429b6a RK |
17 | |
18 | You should have received a copy of the GNU General Public License | |
1322177d | 19 | along with GCC; see the file COPYING. If not, write to the Free |
366ccddb KC |
20 | Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA |
21 | 02110-1301, USA. */ | |
d7429b6a | 22 | |
e881bb1b RH |
23 | /* This file contains the data flow analysis pass of the compiler. It |
24 | computes data flow information which tells combine_instructions | |
25 | which insns to consider combining and controls register allocation. | |
d7429b6a | 26 | |
e881bb1b RH |
27 | Additional data flow information that is too bulky to record is |
28 | generated during the analysis, and is used at that time to create | |
29 | autoincrement and autodecrement addressing. | |
d7429b6a RK |
30 | |
31 | The first step is dividing the function into basic blocks. | |
32 | find_basic_blocks does this. Then life_analysis determines | |
33 | where each register is live and where it is dead. | |
34 | ||
35 | ** find_basic_blocks ** | |
36 | ||
e881bb1b RH |
37 | find_basic_blocks divides the current function's rtl into basic |
38 | blocks and constructs the CFG. The blocks are recorded in the | |
39 | basic_block_info array; the CFG exists in the edge structures | |
40 | referenced by the blocks. | |
d7429b6a | 41 | |
e881bb1b | 42 | find_basic_blocks also finds any unreachable loops and deletes them. |
d7429b6a RK |
43 | |
44 | ** life_analysis ** | |
45 | ||
46 | life_analysis is called immediately after find_basic_blocks. | |
47 | It uses the basic block information to determine where each | |
48 | hard or pseudo register is live. | |
49 | ||
50 | ** live-register info ** | |
51 | ||
52 | The information about where each register is live is in two parts: | |
e881bb1b | 53 | the REG_NOTES of insns, and the vector basic_block->global_live_at_start. |
d7429b6a | 54 | |
e881bb1b RH |
55 | basic_block->global_live_at_start has an element for each basic |
56 | block, and the element is a bit-vector with a bit for each hard or | |
57 | pseudo register. The bit is 1 if the register is live at the | |
58 | beginning of the basic block. | |
d7429b6a | 59 | |
c9bacfdb | 60 | Two types of elements can be added to an insn's REG_NOTES. |
d7429b6a RK |
61 | A REG_DEAD note is added to an insn's REG_NOTES for any register |
62 | that meets both of two conditions: The value in the register is not | |
63 | needed in subsequent insns and the insn does not replace the value in | |
64 | the register (in the case of multi-word hard registers, the value in | |
65 | each register must be replaced by the insn to avoid a REG_DEAD note). | |
66 | ||
67 | In the vast majority of cases, an object in a REG_DEAD note will be | |
68 | used somewhere in the insn. The (rare) exception to this is if an | |
69 | insn uses a multi-word hard register and only some of the registers are | |
70 | needed in subsequent insns. In that case, REG_DEAD notes will be | |
71 | provided for those hard registers that are not subsequently needed. | |
72 | Partial REG_DEAD notes of this type do not occur when an insn sets | |
73 | only some of the hard registers used in such a multi-word operand; | |
74 | omitting REG_DEAD notes for objects stored in an insn is optional and | |
75 | the desire to do so does not justify the complexity of the partial | |
76 | REG_DEAD notes. | |
77 | ||
78 | REG_UNUSED notes are added for each register that is set by the insn | |
79 | but is unused subsequently (if every register set by the insn is unused | |
80 | and the insn does not reference memory or have some other side-effect, | |
81 | the insn is deleted instead). If only part of a multi-word hard | |
82 | register is used in a subsequent insn, REG_UNUSED notes are made for | |
83 | the parts that will not be used. | |
84 | ||
85 | To determine which registers are live after any insn, one can | |
86 | start from the beginning of the basic block and scan insns, noting | |
87 | which registers are set by each insn and which die there. | |
88 | ||
89 | ** Other actions of life_analysis ** | |
90 | ||
91 | life_analysis sets up the LOG_LINKS fields of insns because the | |
92 | information needed to do so is readily available. | |
93 | ||
94 | life_analysis deletes insns whose only effect is to store a value | |
95 | that is never used. | |
96 | ||
97 | life_analysis notices cases where a reference to a register as | |
98 | a memory address can be combined with a preceding or following | |
99 | incrementation or decrementation of the register. The separate | |
100 | instruction to increment or decrement is deleted and the address | |
101 | is changed to a POST_INC or similar rtx. | |
102 | ||
103 | Each time an incrementing or decrementing address is created, | |
104 | a REG_INC element is added to the insn's REG_NOTES list. | |
105 | ||
106 | life_analysis fills in certain vectors containing information about | |
d4b60170 | 107 | register usage: REG_N_REFS, REG_N_DEATHS, REG_N_SETS, REG_LIVE_LENGTH, |
27004606 | 108 | REG_N_CALLS_CROSSED, REG_N_THROWING_CALLS_CROSSED and REG_BASIC_BLOCK. |
fdb8a883 JW |
109 | |
110 | life_analysis sets current_function_sp_is_unchanging if the function | |
111 | doesn't modify the stack pointer. */ | |
e881bb1b | 112 | |
c9bacfdb | 113 | /* TODO: |
e881bb1b RH |
114 | |
115 | Split out from life_analysis: | |
dda49b66 | 116 | - local property discovery |
e881bb1b RH |
117 | - global property computation |
118 | - log links creation | |
119 | - pre/post modify transformation | |
120 | */ | |
d7429b6a | 121 | \f |
d7429b6a | 122 | #include "config.h" |
670ee920 | 123 | #include "system.h" |
4977bab6 ZW |
124 | #include "coretypes.h" |
125 | #include "tm.h" | |
d3a923ee | 126 | #include "tree.h" |
d7429b6a | 127 | #include "rtl.h" |
6baf1cc8 | 128 | #include "tm_p.h" |
efc9bd41 | 129 | #include "hard-reg-set.h" |
d7429b6a RK |
130 | #include "basic-block.h" |
131 | #include "insn-config.h" | |
132 | #include "regs.h" | |
d7429b6a RK |
133 | #include "flags.h" |
134 | #include "output.h" | |
b384405b | 135 | #include "function.h" |
3d195391 | 136 | #include "except.h" |
2e107e9e | 137 | #include "toplev.h" |
79c9824e | 138 | #include "recog.h" |
11bdd2ae | 139 | #include "expr.h" |
4793dca1 | 140 | #include "timevar.h" |
d7429b6a RK |
141 | |
142 | #include "obstack.h" | |
11ae508b | 143 | #include "splay-tree.h" |
ef330312 | 144 | #include "tree-pass.h" |
95b9a3a5 | 145 | #include "params.h" |
c5c76735 | 146 | |
d3a923ee RH |
147 | #ifndef HAVE_epilogue |
148 | #define HAVE_epilogue 0 | |
149 | #endif | |
d3a923ee RH |
150 | #ifndef HAVE_prologue |
151 | #define HAVE_prologue 0 | |
152 | #endif | |
0a1c58a2 JL |
153 | #ifndef HAVE_sibcall_epilogue |
154 | #define HAVE_sibcall_epilogue 0 | |
155 | #endif | |
d3a923ee | 156 | |
2a3e384f RH |
157 | #ifndef EPILOGUE_USES |
158 | #define EPILOGUE_USES(REGNO) 0 | |
159 | #endif | |
15b5aef3 RH |
160 | #ifndef EH_USES |
161 | #define EH_USES(REGNO) 0 | |
162 | #endif | |
2a3e384f | 163 | |
7e6d8ba1 AH |
164 | #ifdef HAVE_conditional_execution |
165 | #ifndef REVERSE_CONDEXEC_PREDICATES_P | |
15dce812 RE |
166 | #define REVERSE_CONDEXEC_PREDICATES_P(x, y) \ |
167 | (GET_CODE ((x)) == reversed_comparison_code ((y), NULL)) | |
7e6d8ba1 AH |
168 | #endif |
169 | #endif | |
170 | ||
a310245f SB |
171 | /* This is the maximum number of times we process any given block if the |
172 | latest loop depth count is smaller than this number. Only used for the | |
173 | failure strategy to avoid infinite loops in calculate_global_regs_live. */ | |
174 | #define MAX_LIVENESS_ROUNDS 20 | |
175 | ||
56744d1a JL |
176 | /* Nonzero if the second flow pass has completed. */ |
177 | int flow2_completed; | |
178 | ||
d7429b6a RK |
179 | /* Maximum register number used in this function, plus one. */ |
180 | ||
181 | int max_regno; | |
182 | ||
b1f21e0a | 183 | /* Indexed by n, giving various register information */ |
d7429b6a | 184 | |
1935e8a8 | 185 | VEC(reg_info_p,heap) *reg_n_info; |
d7429b6a | 186 | |
d7429b6a | 187 | /* Regset of regs live when calls to `setjmp'-like functions happen. */ |
e881bb1b | 188 | /* ??? Does this exist only for the setjmp-clobbered warning message? */ |
d7429b6a | 189 | |
fa8718d7 | 190 | static regset regs_live_at_setjmp; |
d7429b6a RK |
191 | |
192 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers | |
193 | that have to go in the same hard reg. | |
194 | The first two regs in the list are a pair, and the next two | |
195 | are another pair, etc. */ | |
196 | rtx regs_may_share; | |
197 | ||
d7429b6a RK |
198 | /* Set of registers that may be eliminable. These are handled specially |
199 | in updating regs_ever_live. */ | |
200 | ||
201 | static HARD_REG_SET elim_reg_set; | |
202 | ||
11ae508b RH |
203 | /* Holds information for tracking conditional register life information. */ |
204 | struct reg_cond_life_info | |
205 | { | |
685af3af | 206 | /* A boolean expression of conditions under which a register is dead. */ |
11ae508b | 207 | rtx condition; |
685af3af JW |
208 | /* Conditions under which a register is dead at the basic block end. */ |
209 | rtx orig_condition; | |
210 | ||
211 | /* A boolean expression of conditions under which a register has been | |
212 | stored into. */ | |
213 | rtx stores; | |
11ae508b RH |
214 | |
215 | /* ??? Could store mask of bytes that are dead, so that we could finally | |
216 | track lifetimes of multi-word registers accessed via subregs. */ | |
217 | }; | |
218 | ||
62828c00 RH |
219 | /* For use in communicating between propagate_block and its subroutines. |
220 | Holds all information needed to compute life and def-use information. */ | |
221 | ||
222 | struct propagate_block_info | |
223 | { | |
224 | /* The basic block we're considering. */ | |
225 | basic_block bb; | |
226 | ||
227 | /* Bit N is set if register N is conditionally or unconditionally live. */ | |
228 | regset reg_live; | |
229 | ||
9785c68d RH |
230 | /* Bit N is set if register N is set this insn. */ |
231 | regset new_set; | |
8e3f9094 | 232 | |
62828c00 RH |
233 | /* Element N is the next insn that uses (hard or pseudo) register N |
234 | within the current basic block; or zero, if there is no such insn. */ | |
235 | rtx *reg_next_use; | |
236 | ||
237 | /* Contains a list of all the MEMs we are tracking for dead store | |
238 | elimination. */ | |
239 | rtx mem_set_list; | |
240 | ||
7dfc0fbe BS |
241 | /* If non-null, record the set of registers set unconditionally in the |
242 | basic block. */ | |
62828c00 RH |
243 | regset local_set; |
244 | ||
7dfc0fbe BS |
245 | /* If non-null, record the set of registers set conditionally in the |
246 | basic block. */ | |
247 | regset cond_local_set; | |
248 | ||
11ae508b RH |
249 | #ifdef HAVE_conditional_execution |
250 | /* Indexed by register number, holds a reg_cond_life_info for each | |
251 | register that is not unconditionally live or dead. */ | |
252 | splay_tree reg_cond_dead; | |
253 | ||
254 | /* Bit N is set if register N is in an expression in reg_cond_dead. */ | |
255 | regset reg_cond_reg; | |
256 | #endif | |
257 | ||
0875baa0 RH |
258 | /* The length of mem_set_list. */ |
259 | int mem_set_list_len; | |
260 | ||
cc2902df | 261 | /* Nonzero if the value of CC0 is live. */ |
62828c00 RH |
262 | int cc0_live; |
263 | ||
fbe5a4a6 | 264 | /* Flags controlling the set of information propagate_block collects. */ |
62828c00 | 265 | int flags; |
736b64dd JH |
266 | /* Index of instruction being processed. */ |
267 | int insn_num; | |
62828c00 RH |
268 | }; |
269 | ||
3dec4024 JH |
270 | /* Number of dead insns removed. */ |
271 | static int ndead; | |
272 | ||
736b64dd JH |
273 | /* When PROP_REG_INFO set, array contains pbi->insn_num of instruction |
274 | where given register died. When the register is marked alive, we use the | |
275 | information to compute amount of instructions life range cross. | |
276 | (remember, we are walking backward). This can be computed as current | |
277 | pbi->insn_num - reg_deaths[regno]. | |
278 | At the end of processing each basic block, the remaining live registers | |
aabcd309 | 279 | are inspected and live ranges are increased same way so liverange of global |
736b64dd JH |
280 | registers are computed correctly. |
281 | ||
282 | The array is maintained clear for dead registers, so it can be safely reused | |
283 | for next basic block without expensive memset of the whole array after | |
284 | reseting pbi->insn_num to 0. */ | |
285 | ||
286 | static int *reg_deaths; | |
287 | ||
d7429b6a | 288 | /* Forward declarations */ |
6cf9ac28 AJ |
289 | static int verify_wide_reg_1 (rtx *, void *); |
290 | static void verify_wide_reg (int, basic_block); | |
291 | static void verify_local_live_at_start (regset, basic_block); | |
292 | static void notice_stack_pointer_modification_1 (rtx, rtx, void *); | |
827c06b6 | 293 | static void notice_stack_pointer_modification (void); |
6cf9ac28 AJ |
294 | static void mark_reg (rtx, void *); |
295 | static void mark_regs_live_at_end (regset); | |
6cf9ac28 AJ |
296 | static void calculate_global_regs_live (sbitmap, sbitmap, int); |
297 | static void propagate_block_delete_insn (rtx); | |
298 | static rtx propagate_block_delete_libcall (rtx, rtx); | |
299 | static int insn_dead_p (struct propagate_block_info *, rtx, int, rtx); | |
300 | static int libcall_dead_p (struct propagate_block_info *, rtx, rtx); | |
301 | static void mark_set_regs (struct propagate_block_info *, rtx, rtx); | |
302 | static void mark_set_1 (struct propagate_block_info *, enum rtx_code, rtx, | |
303 | rtx, rtx, int); | |
304 | static int find_regno_partial (rtx *, void *); | |
0626ef8a | 305 | |
11ae508b | 306 | #ifdef HAVE_conditional_execution |
6cf9ac28 AJ |
307 | static int mark_regno_cond_dead (struct propagate_block_info *, int, rtx); |
308 | static void free_reg_cond_life_info (splay_tree_value); | |
309 | static int flush_reg_cond_reg_1 (splay_tree_node, void *); | |
310 | static void flush_reg_cond_reg (struct propagate_block_info *, int); | |
311 | static rtx elim_reg_cond (rtx, unsigned int); | |
312 | static rtx ior_reg_cond (rtx, rtx, int); | |
313 | static rtx not_reg_cond (rtx); | |
314 | static rtx and_reg_cond (rtx, rtx, int); | |
11ae508b | 315 | #endif |
1d300e19 | 316 | #ifdef AUTO_INC_DEC |
6cf9ac28 AJ |
317 | static void attempt_auto_inc (struct propagate_block_info *, rtx, rtx, rtx, |
318 | rtx, rtx); | |
319 | static void find_auto_inc (struct propagate_block_info *, rtx, rtx); | |
320 | static int try_pre_increment_1 (struct propagate_block_info *, rtx); | |
321 | static int try_pre_increment (rtx, rtx, HOST_WIDE_INT); | |
1d300e19 | 322 | #endif |
6cf9ac28 AJ |
323 | static void mark_used_reg (struct propagate_block_info *, rtx, rtx, rtx); |
324 | static void mark_used_regs (struct propagate_block_info *, rtx, rtx, rtx); | |
325 | void debug_flow_info (void); | |
326 | static void add_to_mem_set_list (struct propagate_block_info *, rtx); | |
327 | static int invalidate_mems_from_autoinc (rtx *, void *); | |
328 | static void invalidate_mems_from_set (struct propagate_block_info *, rtx); | |
329 | static void clear_log_links (sbitmap); | |
095c3bbd | 330 | static int count_or_remove_death_notes_bb (basic_block, int); |
60580286 | 331 | static void allocate_bb_life_data (void); |
d7429b6a | 332 | \f |
402209ff JH |
333 | /* Return the INSN immediately following the NOTE_INSN_BASIC_BLOCK |
334 | note associated with the BLOCK. */ | |
335 | ||
336 | rtx | |
6cf9ac28 | 337 | first_insn_after_basic_block_note (basic_block block) |
402209ff JH |
338 | { |
339 | rtx insn; | |
b313a0fe | 340 | |
402209ff | 341 | /* Get the first instruction in the block. */ |
a813c111 | 342 | insn = BB_HEAD (block); |
dc2ede84 | 343 | |
402209ff JH |
344 | if (insn == NULL_RTX) |
345 | return NULL_RTX; | |
4b4bf941 | 346 | if (LABEL_P (insn)) |
402209ff | 347 | insn = NEXT_INSN (insn); |
0bccc606 | 348 | gcc_assert (NOTE_INSN_BASIC_BLOCK_P (insn)); |
402209ff JH |
349 | |
350 | return NEXT_INSN (insn); | |
351 | } | |
352 | \f | |
827c06b6 SB |
353 | /* Perform data flow analysis for the whole control flow graph. |
354 | FLAGS is a set of PROP_* flags to be used in accumulating flow info. */ | |
402209ff JH |
355 | |
356 | void | |
10d22567 | 357 | life_analysis (int flags) |
e881bb1b | 358 | { |
cff9f8d5 | 359 | #ifdef ELIMINABLE_REGS |
c1b50e49 | 360 | int i; |
8b60264b | 361 | static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS; |
402209ff | 362 | #endif |
dc2ede84 | 363 | |
402209ff JH |
364 | /* Record which registers will be eliminated. We use this in |
365 | mark_used_regs. */ | |
e881bb1b | 366 | |
402209ff | 367 | CLEAR_HARD_REG_SET (elim_reg_set); |
314883b8 | 368 | |
402209ff JH |
369 | #ifdef ELIMINABLE_REGS |
370 | for (i = 0; i < (int) ARRAY_SIZE (eliminables); i++) | |
371 | SET_HARD_REG_BIT (elim_reg_set, eliminables[i].from); | |
372 | #else | |
373 | SET_HARD_REG_BIT (elim_reg_set, FRAME_POINTER_REGNUM); | |
374 | #endif | |
52a11cbf | 375 | |
cff9f8d5 AH |
376 | |
377 | #ifdef CANNOT_CHANGE_MODE_CLASS | |
378 | if (flags & PROP_REG_INFO) | |
41bf2a8b | 379 | init_subregs_of_mode (); |
cff9f8d5 AH |
380 | #endif |
381 | ||
402209ff JH |
382 | if (! optimize) |
383 | flags &= ~(PROP_LOG_LINKS | PROP_AUTOINC | PROP_ALLOW_CFG_CHANGES); | |
52a11cbf | 384 | |
402209ff JH |
385 | /* The post-reload life analysis have (on a global basis) the same |
386 | registers live as was computed by reload itself. elimination | |
387 | Otherwise offsets and such may be incorrect. | |
e881bb1b | 388 | |
402209ff JH |
389 | Reload will make some registers as live even though they do not |
390 | appear in the rtl. | |
e881bb1b | 391 | |
402209ff JH |
392 | We don't want to create new auto-incs after reload, since they |
393 | are unlikely to be useful and can cause problems with shared | |
394 | stack slots. */ | |
395 | if (reload_completed) | |
396 | flags &= ~(PROP_REG_INFO | PROP_AUTOINC); | |
e881bb1b | 397 | |
402209ff | 398 | /* We want alias analysis information for local dead store elimination. */ |
5149f070 | 399 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
402209ff | 400 | init_alias_analysis (); |
dc2ede84 | 401 | |
402209ff JH |
402 | /* Always remove no-op moves. Do this before other processing so |
403 | that we don't have to keep re-scanning them. */ | |
827c06b6 | 404 | delete_noop_moves (); |
1bc48f82 | 405 | |
402209ff JH |
406 | /* Some targets can emit simpler epilogues if they know that sp was |
407 | not ever modified during the function. After reload, of course, | |
408 | we've already emitted the epilogue so there's no sense searching. */ | |
409 | if (! reload_completed) | |
827c06b6 | 410 | notice_stack_pointer_modification (); |
1bc48f82 | 411 | |
402209ff JH |
412 | /* Allocate and zero out data structures that will record the |
413 | data from lifetime analysis. */ | |
414 | allocate_reg_life_data (); | |
415 | allocate_bb_life_data (); | |
1bc48f82 | 416 | |
402209ff | 417 | /* Find the set of registers live on function exit. */ |
5e2d947c | 418 | mark_regs_live_at_end (EXIT_BLOCK_PTR->il.rtl->global_live_at_start); |
1bc48f82 | 419 | |
402209ff JH |
420 | /* "Update" life info from zero. It'd be nice to begin the |
421 | relaxation with just the exit and noreturn blocks, but that set | |
422 | is not immediately handy. */ | |
c9bacfdb | 423 | |
402209ff | 424 | if (flags & PROP_REG_INFO) |
df2ef49b AM |
425 | { |
426 | memset (regs_ever_live, 0, sizeof (regs_ever_live)); | |
427 | memset (regs_asm_clobbered, 0, sizeof (regs_asm_clobbered)); | |
428 | } | |
402209ff | 429 | update_life_info (NULL, UPDATE_LIFE_GLOBAL, flags); |
736b64dd JH |
430 | if (reg_deaths) |
431 | { | |
432 | free (reg_deaths); | |
433 | reg_deaths = NULL; | |
434 | } | |
1bc48f82 | 435 | |
402209ff | 436 | /* Clean up. */ |
5149f070 | 437 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
402209ff | 438 | end_alias_analysis (); |
1bc48f82 | 439 | |
10d22567 | 440 | if (dump_file) |
5b4fdb20 | 441 | dump_flow_info (dump_file, dump_flags); |
0005550b | 442 | |
1f52178b | 443 | /* Removing dead insns should have made jumptables really dead. */ |
402209ff JH |
444 | delete_dead_jumptables (); |
445 | } | |
0005550b | 446 | |
402209ff | 447 | /* A subroutine of verify_wide_reg, called through for_each_rtx. |
08ef5437 RH |
448 | Search for REGNO. If found, return 2 if it is not wider than |
449 | word_mode. */ | |
a686dbf8 | 450 | |
402209ff | 451 | static int |
6cf9ac28 | 452 | verify_wide_reg_1 (rtx *px, void *pregno) |
402209ff JH |
453 | { |
454 | rtx x = *px; | |
455 | unsigned int regno = *(int *) pregno; | |
134d3a2e | 456 | |
f8cfc6aa | 457 | if (REG_P (x) && REGNO (x) == regno) |
134d3a2e | 458 | { |
402209ff | 459 | if (GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD) |
08ef5437 | 460 | return 2; |
402209ff | 461 | return 1; |
134d3a2e | 462 | } |
402209ff | 463 | return 0; |
a686dbf8 JH |
464 | } |
465 | ||
402209ff | 466 | /* A subroutine of verify_local_live_at_start. Search through insns |
08ef5437 | 467 | of BB looking for register REGNO. */ |
8329b5ec | 468 | |
be1bb652 | 469 | static void |
6cf9ac28 | 470 | verify_wide_reg (int regno, basic_block bb) |
e881bb1b | 471 | { |
a813c111 | 472 | rtx head = BB_HEAD (bb), end = BB_END (bb); |
08ef5437 | 473 | |
402209ff | 474 | while (1) |
e881bb1b | 475 | { |
08ef5437 RH |
476 | if (INSN_P (head)) |
477 | { | |
478 | int r = for_each_rtx (&PATTERN (head), verify_wide_reg_1, ®no); | |
479 | if (r == 1) | |
480 | return; | |
481 | if (r == 2) | |
482 | break; | |
483 | } | |
402209ff JH |
484 | if (head == end) |
485 | break; | |
486 | head = NEXT_INSN (head); | |
487 | } | |
c263766c | 488 | if (dump_file) |
08ef5437 | 489 | { |
c263766c RH |
490 | fprintf (dump_file, "Register %d died unexpectedly.\n", regno); |
491 | dump_bb (bb, dump_file, 0); | |
08ef5437 | 492 | } |
75a83c65 | 493 | internal_error ("internal consistency failure"); |
402209ff | 494 | } |
314883b8 | 495 | |
402209ff JH |
496 | /* A subroutine of update_life_info. Verify that there are no untoward |
497 | changes in live_at_start during a local update. */ | |
d06c6389 | 498 | |
402209ff | 499 | static void |
6cf9ac28 | 500 | verify_local_live_at_start (regset new_live_at_start, basic_block bb) |
402209ff JH |
501 | { |
502 | if (reload_completed) | |
503 | { | |
504 | /* After reload, there are no pseudos, nor subregs of multi-word | |
505 | registers. The regsets should exactly match. */ | |
5e2d947c JH |
506 | if (! REG_SET_EQUAL_P (new_live_at_start, |
507 | bb->il.rtl->global_live_at_start)) | |
402209ff | 508 | { |
c263766c | 509 | if (dump_file) |
e881bb1b | 510 | { |
c263766c | 511 | fprintf (dump_file, |
08ef5437 | 512 | "live_at_start mismatch in bb %d, aborting\nNew:\n", |
0b17ab2f | 513 | bb->index); |
c263766c RH |
514 | debug_bitmap_file (dump_file, new_live_at_start); |
515 | fputs ("Old:\n", dump_file); | |
516 | dump_bb (bb, dump_file, 0); | |
e881bb1b | 517 | } |
75a83c65 | 518 | internal_error ("internal consistency failure"); |
e881bb1b | 519 | } |
402209ff JH |
520 | } |
521 | else | |
522 | { | |
3cd8c58a | 523 | unsigned i; |
a2041967 | 524 | reg_set_iterator rsi; |
d7429b6a | 525 | |
402209ff | 526 | /* Find the set of changed registers. */ |
5e2d947c | 527 | XOR_REG_SET (new_live_at_start, bb->il.rtl->global_live_at_start); |
421382ac | 528 | |
a2041967 | 529 | EXECUTE_IF_SET_IN_REG_SET (new_live_at_start, 0, i, rsi) |
402209ff | 530 | { |
dd3f0101 | 531 | /* No registers should die. */ |
5e2d947c | 532 | if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, i)) |
402209ff | 533 | { |
c263766c | 534 | if (dump_file) |
08ef5437 | 535 | { |
c263766c | 536 | fprintf (dump_file, |
08ef5437 | 537 | "Register %d died unexpectedly.\n", i); |
c263766c | 538 | dump_bb (bb, dump_file, 0); |
08ef5437 | 539 | } |
75a83c65 | 540 | internal_error ("internal consistency failure"); |
402209ff | 541 | } |
dd3f0101 | 542 | /* Verify that the now-live register is wider than word_mode. */ |
08ef5437 | 543 | verify_wide_reg (i, bb); |
a2041967 | 544 | } |
e881bb1b | 545 | } |
402209ff | 546 | } |
d7429b6a | 547 | |
402209ff JH |
548 | /* Updates life information starting with the basic blocks set in BLOCKS. |
549 | If BLOCKS is null, consider it to be the universal set. | |
af14ce9c | 550 | |
e0bb17a8 | 551 | If EXTENT is UPDATE_LIFE_LOCAL, such as after splitting or peepholing, |
402209ff JH |
552 | we are only expecting local modifications to basic blocks. If we find |
553 | extra registers live at the beginning of a block, then we either killed | |
554 | useful data, or we have a broken split that wants data not provided. | |
555 | If we find registers removed from live_at_start, that means we have | |
556 | a broken peephole that is killing a register it shouldn't. | |
af14ce9c | 557 | |
402209ff JH |
558 | ??? This is not true in one situation -- when a pre-reload splitter |
559 | generates subregs of a multi-word pseudo, current life analysis will | |
560 | lose the kill. So we _can_ have a pseudo go live. How irritating. | |
5ece9746 | 561 | |
24908375 R |
562 | It is also not true when a peephole decides that it doesn't need one |
563 | or more of the inputs. | |
564 | ||
402209ff JH |
565 | Including PROP_REG_INFO does not properly refresh regs_ever_live |
566 | unless the caller resets it to zero. */ | |
19d3c25c | 567 | |
3dec4024 | 568 | int |
7932a3db NS |
569 | update_life_info (sbitmap blocks, enum update_life_extent extent, |
570 | int prop_flags) | |
19d3c25c | 571 | { |
402209ff | 572 | regset tmp; |
dfea6c85 | 573 | unsigned i = 0; |
566576e7 | 574 | int stabilized_prop_flags = prop_flags; |
e0082a72 | 575 | basic_block bb; |
006844a3 | 576 | |
04389919 | 577 | tmp = ALLOC_REG_SET (®_obstack); |
3dec4024 | 578 | ndead = 0; |
2cade2ad | 579 | |
298c28a8 | 580 | if ((prop_flags & PROP_REG_INFO) && !reg_deaths) |
5ed6ace5 | 581 | reg_deaths = XCNEWVEC (int, max_regno); |
298c28a8 | 582 | |
b932f770 JH |
583 | timevar_push ((extent == UPDATE_LIFE_LOCAL || blocks) |
584 | ? TV_LIFE_UPDATE : TV_LIFE); | |
585 | ||
402209ff JH |
586 | /* Changes to the CFG are only allowed when |
587 | doing a global update for the entire CFG. */ | |
0bccc606 NS |
588 | gcc_assert (!(prop_flags & PROP_ALLOW_CFG_CHANGES) |
589 | || (extent != UPDATE_LIFE_LOCAL && !blocks)); | |
006844a3 | 590 | |
402209ff JH |
591 | /* For a global update, we go through the relaxation process again. */ |
592 | if (extent != UPDATE_LIFE_LOCAL) | |
593 | { | |
594 | for ( ; ; ) | |
595 | { | |
596 | int changed = 0; | |
19d3c25c | 597 | |
402209ff JH |
598 | calculate_global_regs_live (blocks, blocks, |
599 | prop_flags & (PROP_SCAN_DEAD_CODE | |
5149f070 | 600 | | PROP_SCAN_DEAD_STORES |
402209ff | 601 | | PROP_ALLOW_CFG_CHANGES)); |
5ece9746 | 602 | |
402209ff JH |
603 | if ((prop_flags & (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES)) |
604 | != (PROP_KILL_DEAD_CODE | PROP_ALLOW_CFG_CHANGES)) | |
605 | break; | |
e881bb1b | 606 | |
402209ff JH |
607 | /* Removing dead code may allow the CFG to be simplified which |
608 | in turn may allow for further dead code detection / removal. */ | |
e0082a72 | 609 | FOR_EACH_BB_REVERSE (bb) |
402209ff | 610 | { |
5e2d947c | 611 | COPY_REG_SET (tmp, bb->il.rtl->global_live_at_end); |
402209ff JH |
612 | changed |= propagate_block (bb, tmp, NULL, NULL, |
613 | prop_flags & (PROP_SCAN_DEAD_CODE | |
5149f070 | 614 | | PROP_SCAN_DEAD_STORES |
402209ff JH |
615 | | PROP_KILL_DEAD_CODE)); |
616 | } | |
47095bfc | 617 | |
566576e7 HPN |
618 | /* Don't pass PROP_SCAN_DEAD_CODE or PROP_KILL_DEAD_CODE to |
619 | subsequent propagate_block calls, since removing or acting as | |
620 | removing dead code can affect global register liveness, which | |
621 | is supposed to be finalized for this call after this loop. */ | |
622 | stabilized_prop_flags | |
5149f070 JH |
623 | &= ~(PROP_SCAN_DEAD_CODE | PROP_SCAN_DEAD_STORES |
624 | | PROP_KILL_DEAD_CODE); | |
566576e7 HPN |
625 | |
626 | if (! changed) | |
402209ff | 627 | break; |
566576e7 HPN |
628 | |
629 | /* We repeat regardless of what cleanup_cfg says. If there were | |
630 | instructions deleted above, that might have been only a | |
95b9a3a5 | 631 | partial improvement (see PARAM_MAX_FLOW_MEMORY_LOCATIONS usage). |
566576e7 HPN |
632 | Further improvement may be possible. */ |
633 | cleanup_cfg (CLEANUP_EXPENSIVE); | |
cdd1f01b | 634 | |
6cf9ac28 | 635 | /* Zap the life information from the last round. If we don't |
cdd1f01b | 636 | do this, we can wind up with registers that no longer appear |
6de9cd9a | 637 | in the code being marked live at entry. */ |
cdd1f01b RH |
638 | FOR_EACH_BB (bb) |
639 | { | |
5e2d947c JH |
640 | CLEAR_REG_SET (bb->il.rtl->global_live_at_start); |
641 | CLEAR_REG_SET (bb->il.rtl->global_live_at_end); | |
cdd1f01b | 642 | } |
e881bb1b | 643 | } |
47095bfc | 644 | |
402209ff JH |
645 | /* If asked, remove notes from the blocks we'll update. */ |
646 | if (extent == UPDATE_LIFE_GLOBAL_RM_NOTES) | |
7d22e898 R |
647 | count_or_remove_death_notes (blocks, |
648 | prop_flags & PROP_POST_REGSTACK ? -1 : 1); | |
402209ff | 649 | } |
b5b84a7f AP |
650 | else |
651 | { | |
652 | /* FIXME: This can go when the dataflow branch has been merged in. */ | |
653 | /* For a local update, if we are creating new REG_DEAD notes, then we | |
654 | must delete the old ones first to avoid conflicts if they are | |
655 | different. */ | |
656 | if (prop_flags & PROP_DEATH_NOTES) | |
657 | count_or_remove_death_notes (blocks, | |
658 | prop_flags & PROP_POST_REGSTACK ? -1 : 1); | |
659 | } | |
660 | ||
402209ff | 661 | |
38c1593d JH |
662 | /* Clear log links in case we are asked to (re)compute them. */ |
663 | if (prop_flags & PROP_LOG_LINKS) | |
664 | clear_log_links (blocks); | |
665 | ||
402209ff JH |
666 | if (blocks) |
667 | { | |
b6e7e9af KH |
668 | sbitmap_iterator sbi; |
669 | ||
670 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, sbi) | |
402209ff | 671 | { |
e0082a72 | 672 | bb = BASIC_BLOCK (i); |
3d5f877a KZ |
673 | if (bb) |
674 | { | |
675 | /* The bitmap may be flawed in that one of the basic | |
676 | blocks may have been deleted before you get here. */ | |
677 | COPY_REG_SET (tmp, bb->il.rtl->global_live_at_end); | |
678 | propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags); | |
679 | ||
680 | if (extent == UPDATE_LIFE_LOCAL) | |
681 | verify_local_live_at_start (tmp, bb); | |
682 | } | |
b6e7e9af | 683 | }; |
5ece9746 | 684 | } |
e881bb1b RH |
685 | else |
686 | { | |
e0082a72 | 687 | FOR_EACH_BB_REVERSE (bb) |
355e4ec4 | 688 | { |
5e2d947c | 689 | COPY_REG_SET (tmp, bb->il.rtl->global_live_at_end); |
566576e7 HPN |
690 | |
691 | propagate_block (bb, tmp, NULL, NULL, stabilized_prop_flags); | |
421382ac | 692 | |
402209ff JH |
693 | if (extent == UPDATE_LIFE_LOCAL) |
694 | verify_local_live_at_start (tmp, bb); | |
e881bb1b | 695 | } |
e881bb1b RH |
696 | } |
697 | ||
402209ff | 698 | FREE_REG_SET (tmp); |
eeea333e | 699 | |
402209ff JH |
700 | if (prop_flags & PROP_REG_INFO) |
701 | { | |
a2041967 KH |
702 | reg_set_iterator rsi; |
703 | ||
402209ff JH |
704 | /* The only pseudos that are live at the beginning of the function |
705 | are those that were not set anywhere in the function. local-alloc | |
706 | doesn't know how to handle these correctly, so mark them as not | |
707 | local to any one basic block. */ | |
5e2d947c | 708 | EXECUTE_IF_SET_IN_REG_SET (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end, |
a2041967 KH |
709 | FIRST_PSEUDO_REGISTER, i, rsi) |
710 | REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; | |
e881bb1b | 711 | |
402209ff JH |
712 | /* We have a problem with any pseudoreg that lives across the setjmp. |
713 | ANSI says that if a user variable does not change in value between | |
714 | the setjmp and the longjmp, then the longjmp preserves it. This | |
715 | includes longjmp from a place where the pseudo appears dead. | |
716 | (In principle, the value still exists if it is in scope.) | |
717 | If the pseudo goes in a hard reg, some other value may occupy | |
718 | that hard reg where this pseudo is dead, thus clobbering the pseudo. | |
719 | Conclusion: such a pseudo must not go in a hard reg. */ | |
720 | EXECUTE_IF_SET_IN_REG_SET (regs_live_at_setjmp, | |
a2041967 KH |
721 | FIRST_PSEUDO_REGISTER, i, rsi) |
722 | { | |
723 | if (regno_reg_rtx[i] != 0) | |
724 | { | |
725 | REG_LIVE_LENGTH (i) = -1; | |
726 | REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; | |
727 | } | |
728 | } | |
402209ff | 729 | } |
736b64dd JH |
730 | if (reg_deaths) |
731 | { | |
732 | free (reg_deaths); | |
733 | reg_deaths = NULL; | |
734 | } | |
b932f770 JH |
735 | timevar_pop ((extent == UPDATE_LIFE_LOCAL || blocks) |
736 | ? TV_LIFE_UPDATE : TV_LIFE); | |
c263766c RH |
737 | if (ndead && dump_file) |
738 | fprintf (dump_file, "deleted %i dead insns\n", ndead); | |
3dec4024 | 739 | return ndead; |
421382ac | 740 | } |
b62c8881 | 741 | |
38c1593d JH |
742 | /* Update life information in all blocks where BB_DIRTY is set. */ |
743 | ||
3dec4024 | 744 | int |
6cf9ac28 | 745 | update_life_info_in_dirty_blocks (enum update_life_extent extent, int prop_flags) |
38c1593d | 746 | { |
d55bc081 | 747 | sbitmap update_life_blocks = sbitmap_alloc (last_basic_block); |
38c1593d | 748 | int n = 0; |
e0082a72 | 749 | basic_block bb; |
0a2ed1f1 | 750 | int retval = 0; |
38c1593d JH |
751 | |
752 | sbitmap_zero (update_life_blocks); | |
e0082a72 | 753 | FOR_EACH_BB (bb) |
e0e577a2 | 754 | { |
a310245f | 755 | if (bb->flags & BB_DIRTY) |
e0e577a2 | 756 | { |
e0e577a2 | 757 | SET_BIT (update_life_blocks, bb->index); |
a310245f | 758 | n++; |
e0e577a2 RH |
759 | } |
760 | } | |
38c1593d JH |
761 | |
762 | if (n) | |
0a2ed1f1 | 763 | retval = update_life_info (update_life_blocks, extent, prop_flags); |
38c1593d JH |
764 | |
765 | sbitmap_free (update_life_blocks); | |
0a2ed1f1 | 766 | return retval; |
38c1593d JH |
767 | } |
768 | ||
bb8a619e | 769 | /* Free the variables allocated by find_basic_blocks. */ |
421382ac | 770 | |
2307e372 | 771 | void |
bb8a619e | 772 | free_basic_block_vars (void) |
421382ac | 773 | { |
bb8a619e | 774 | if (basic_block_info) |
402209ff | 775 | { |
bb8a619e | 776 | clear_edges (); |
6de9cd9a | 777 | basic_block_info = NULL; |
e881bb1b | 778 | } |
bb8a619e SB |
779 | n_basic_blocks = 0; |
780 | last_basic_block = 0; | |
997de8ed SB |
781 | n_edges = 0; |
782 | ||
783 | label_to_block_map = NULL; | |
bb8a619e SB |
784 | |
785 | ENTRY_BLOCK_PTR->aux = NULL; | |
5e2d947c | 786 | ENTRY_BLOCK_PTR->il.rtl->global_live_at_end = NULL; |
bb8a619e | 787 | EXIT_BLOCK_PTR->aux = NULL; |
5e2d947c | 788 | EXIT_BLOCK_PTR->il.rtl->global_live_at_start = NULL; |
421382ac BS |
789 | } |
790 | ||
402209ff | 791 | /* Delete any insns that copy a register to itself. */ |
421382ac | 792 | |
3dec4024 | 793 | int |
827c06b6 | 794 | delete_noop_moves (void) |
421382ac | 795 | { |
402209ff JH |
796 | rtx insn, next; |
797 | basic_block bb; | |
3dec4024 | 798 | int nnoops = 0; |
421382ac | 799 | |
e0082a72 | 800 | FOR_EACH_BB (bb) |
421382ac | 801 | { |
a813c111 | 802 | for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb)); insn = next) |
421382ac | 803 | { |
402209ff JH |
804 | next = NEXT_INSN (insn); |
805 | if (INSN_P (insn) && noop_move_p (insn)) | |
806 | { | |
eb9d8e4d JW |
807 | rtx note; |
808 | ||
809 | /* If we're about to remove the first insn of a libcall | |
810 | then move the libcall note to the next real insn and | |
811 | update the retval note. */ | |
812 | if ((note = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
813 | && XEXP (note, 0) != insn) | |
814 | { | |
815 | rtx new_libcall_insn = next_real_insn (insn); | |
816 | rtx retval_note = find_reg_note (XEXP (note, 0), | |
817 | REG_RETVAL, NULL_RTX); | |
818 | REG_NOTES (new_libcall_insn) | |
819 | = gen_rtx_INSN_LIST (REG_LIBCALL, XEXP (note, 0), | |
820 | REG_NOTES (new_libcall_insn)); | |
821 | XEXP (retval_note, 0) = new_libcall_insn; | |
822 | } | |
823 | ||
3dec4024 JH |
824 | delete_insn_and_edges (insn); |
825 | nnoops++; | |
402209ff | 826 | } |
421382ac BS |
827 | } |
828 | } | |
916b9d4b | 829 | |
c263766c | 830 | if (nnoops && dump_file) |
916b9d4b EB |
831 | fprintf (dump_file, "deleted %i noop moves\n", nnoops); |
832 | ||
3dec4024 | 833 | return nnoops; |
421382ac BS |
834 | } |
835 | ||
402209ff | 836 | /* Delete any jump tables never referenced. We can't delete them at the |
eaec9b3d | 837 | time of removing tablejump insn as they are referenced by the preceding |
402209ff JH |
838 | insns computing the destination, so we delay deleting and garbagecollect |
839 | them once life information is computed. */ | |
0010687d | 840 | void |
6cf9ac28 | 841 | delete_dead_jumptables (void) |
402209ff | 842 | { |
88312d26 KH |
843 | basic_block bb; |
844 | ||
845 | /* A dead jump table does not belong to any basic block. Scan insns | |
846 | between two adjacent basic blocks. */ | |
847 | FOR_EACH_BB (bb) | |
421382ac | 848 | { |
88312d26 KH |
849 | rtx insn, next; |
850 | ||
851 | for (insn = NEXT_INSN (BB_END (bb)); | |
852 | insn && !NOTE_INSN_BASIC_BLOCK_P (insn); | |
853 | insn = next) | |
e881bb1b | 854 | { |
88312d26 KH |
855 | next = NEXT_INSN (insn); |
856 | if (LABEL_P (insn) | |
857 | && LABEL_NUSES (insn) == LABEL_PRESERVE_P (insn) | |
858 | && JUMP_P (next) | |
859 | && (GET_CODE (PATTERN (next)) == ADDR_VEC | |
860 | || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)) | |
861 | { | |
862 | rtx label = insn, jump = next; | |
863 | ||
864 | if (dump_file) | |
865 | fprintf (dump_file, "Dead jumptable %i removed\n", | |
866 | INSN_UID (insn)); | |
867 | ||
868 | next = NEXT_INSN (next); | |
869 | delete_insn (jump); | |
870 | delete_insn (label); | |
871 | } | |
e881bb1b | 872 | } |
dc2ede84 | 873 | } |
e881bb1b RH |
874 | } |
875 | ||
402209ff JH |
876 | /* Determine if the stack pointer is constant over the life of the function. |
877 | Only useful before prologues have been emitted. */ | |
e881bb1b RH |
878 | |
879 | static void | |
6cf9ac28 AJ |
880 | notice_stack_pointer_modification_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, |
881 | void *data ATTRIBUTE_UNUSED) | |
e881bb1b | 882 | { |
402209ff JH |
883 | if (x == stack_pointer_rtx |
884 | /* The stack pointer is only modified indirectly as the result | |
885 | of a push until later in flow. See the comments in rtl.texi | |
886 | regarding Embedded Side-Effects on Addresses. */ | |
3c0cb5de | 887 | || (MEM_P (x) |
ec8e098d | 888 | && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == RTX_AUTOINC |
402209ff JH |
889 | && XEXP (XEXP (x, 0), 0) == stack_pointer_rtx)) |
890 | current_function_sp_is_unchanging = 0; | |
e881bb1b | 891 | } |
e6cfb550 | 892 | |
336a6399 | 893 | static void |
827c06b6 | 894 | notice_stack_pointer_modification (void) |
e881bb1b | 895 | { |
827c06b6 | 896 | basic_block bb; |
402209ff | 897 | rtx insn; |
e881bb1b | 898 | |
402209ff JH |
899 | /* Assume that the stack pointer is unchanging if alloca hasn't |
900 | been used. */ | |
901 | current_function_sp_is_unchanging = !current_function_calls_alloca; | |
902 | if (! current_function_sp_is_unchanging) | |
903 | return; | |
e881bb1b | 904 | |
827c06b6 SB |
905 | FOR_EACH_BB (bb) |
906 | FOR_BB_INSNS (bb, insn) | |
907 | { | |
908 | if (INSN_P (insn)) | |
909 | { | |
910 | /* Check if insn modifies the stack pointer. */ | |
911 | note_stores (PATTERN (insn), | |
912 | notice_stack_pointer_modification_1, | |
913 | NULL); | |
914 | if (! current_function_sp_is_unchanging) | |
915 | return; | |
916 | } | |
917 | } | |
e881bb1b | 918 | } |
0ecf09f9 | 919 | |
402209ff JH |
920 | /* Mark a register in SET. Hard registers in large modes get all |
921 | of their component registers set as well. */ | |
0ecf09f9 | 922 | |
402209ff | 923 | static void |
6cf9ac28 | 924 | mark_reg (rtx reg, void *xset) |
0ecf09f9 | 925 | { |
402209ff JH |
926 | regset set = (regset) xset; |
927 | int regno = REGNO (reg); | |
0ecf09f9 | 928 | |
0bccc606 | 929 | gcc_assert (GET_MODE (reg) != BLKmode); |
0ecf09f9 | 930 | |
402209ff JH |
931 | SET_REGNO_REG_SET (set, regno); |
932 | if (regno < FIRST_PSEUDO_REGISTER) | |
0ecf09f9 | 933 | { |
66fd46b6 | 934 | int n = hard_regno_nregs[regno][GET_MODE (reg)]; |
402209ff JH |
935 | while (--n > 0) |
936 | SET_REGNO_REG_SET (set, regno + n); | |
0ecf09f9 | 937 | } |
0ecf09f9 | 938 | } |
c586192c | 939 | |
402209ff JH |
940 | /* Mark those regs which are needed at the end of the function as live |
941 | at the end of the last basic block. */ | |
c586192c | 942 | |
402209ff | 943 | static void |
6cf9ac28 | 944 | mark_regs_live_at_end (regset set) |
402209ff JH |
945 | { |
946 | unsigned int i; | |
c586192c | 947 | |
402209ff JH |
948 | /* If exiting needs the right stack value, consider the stack pointer |
949 | live at the end of the function. */ | |
fe3ad572 | 950 | if ((HAVE_epilogue && epilogue_completed) |
402209ff JH |
951 | || ! EXIT_IGNORE_STACK |
952 | || (! FRAME_POINTER_REQUIRED | |
953 | && ! current_function_calls_alloca | |
954 | && flag_omit_frame_pointer) | |
955 | || current_function_sp_is_unchanging) | |
c586192c | 956 | { |
402209ff | 957 | SET_REGNO_REG_SET (set, STACK_POINTER_REGNUM); |
c586192c MH |
958 | } |
959 | ||
402209ff JH |
960 | /* Mark the frame pointer if needed at the end of the function. If |
961 | we end up eliminating it, it will be removed from the live list | |
962 | of each basic block by reload. */ | |
c586192c | 963 | |
402209ff | 964 | if (! reload_completed || frame_pointer_needed) |
a686dbf8 | 965 | { |
402209ff JH |
966 | SET_REGNO_REG_SET (set, FRAME_POINTER_REGNUM); |
967 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
968 | /* If they are different, also mark the hard frame pointer as live. */ | |
969 | if (! LOCAL_REGNO (HARD_FRAME_POINTER_REGNUM)) | |
dd3f0101 | 970 | SET_REGNO_REG_SET (set, HARD_FRAME_POINTER_REGNUM); |
402209ff | 971 | #endif |
a686dbf8 | 972 | } |
c586192c | 973 | |
402209ff JH |
974 | #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED |
975 | /* Many architectures have a GP register even without flag_pic. | |
976 | Assume the pic register is not in use, or will be handled by | |
977 | other means, if it is not fixed. */ | |
fc555370 | 978 | if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM |
402209ff JH |
979 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) |
980 | SET_REGNO_REG_SET (set, PIC_OFFSET_TABLE_REGNUM); | |
981 | #endif | |
c586192c | 982 | |
402209ff JH |
983 | /* Mark all global registers, and all registers used by the epilogue |
984 | as being live at the end of the function since they may be | |
985 | referenced by our caller. */ | |
986 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
987 | if (global_regs[i] || EPILOGUE_USES (i)) | |
988 | SET_REGNO_REG_SET (set, i); | |
c586192c | 989 | |
fe3ad572 | 990 | if (HAVE_epilogue && epilogue_completed) |
ca9fef16 | 991 | { |
402209ff JH |
992 | /* Mark all call-saved registers that we actually used. */ |
993 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
994 | if (regs_ever_live[i] && ! LOCAL_REGNO (i) | |
995 | && ! TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
996 | SET_REGNO_REG_SET (set, i); | |
ca9fef16 | 997 | } |
b9b2c339 | 998 | |
402209ff JH |
999 | #ifdef EH_RETURN_DATA_REGNO |
1000 | /* Mark the registers that will contain data for the handler. */ | |
1001 | if (reload_completed && current_function_calls_eh_return) | |
1002 | for (i = 0; ; ++i) | |
1003 | { | |
1004 | unsigned regno = EH_RETURN_DATA_REGNO(i); | |
1005 | if (regno == INVALID_REGNUM) | |
1006 | break; | |
1007 | SET_REGNO_REG_SET (set, regno); | |
1008 | } | |
e9644cfe | 1009 | #endif |
402209ff | 1010 | #ifdef EH_RETURN_STACKADJ_RTX |
fe3ad572 | 1011 | if ((! HAVE_epilogue || ! epilogue_completed) |
402209ff | 1012 | && current_function_calls_eh_return) |
7a442791 | 1013 | { |
402209ff JH |
1014 | rtx tmp = EH_RETURN_STACKADJ_RTX; |
1015 | if (tmp && REG_P (tmp)) | |
1016 | mark_reg (tmp, set); | |
7a442791 | 1017 | } |
402209ff JH |
1018 | #endif |
1019 | #ifdef EH_RETURN_HANDLER_RTX | |
fe3ad572 | 1020 | if ((! HAVE_epilogue || ! epilogue_completed) |
402209ff | 1021 | && current_function_calls_eh_return) |
2b2c8b3e | 1022 | { |
402209ff JH |
1023 | rtx tmp = EH_RETURN_HANDLER_RTX; |
1024 | if (tmp && REG_P (tmp)) | |
1025 | mark_reg (tmp, set); | |
2b2c8b3e | 1026 | } |
402209ff | 1027 | #endif |
7a442791 | 1028 | |
402209ff JH |
1029 | /* Mark function return value. */ |
1030 | diddle_return_value (mark_reg, set); | |
7a442791 JH |
1031 | } |
1032 | ||
402209ff JH |
1033 | /* Propagate global life info around the graph of basic blocks. Begin |
1034 | considering blocks with their corresponding bit set in BLOCKS_IN. | |
1035 | If BLOCKS_IN is null, consider it the universal set. | |
b9b2c339 | 1036 | |
402209ff | 1037 | BLOCKS_OUT is set for every block that was changed. */ |
b9b2c339 | 1038 | |
402209ff | 1039 | static void |
6cf9ac28 | 1040 | calculate_global_regs_live (sbitmap blocks_in, sbitmap blocks_out, int flags) |
402209ff | 1041 | { |
e0082a72 | 1042 | basic_block *queue, *qhead, *qtail, *qend, bb; |
fcc42bca | 1043 | regset tmp, new_live_at_end, invalidated_by_eh_edge; |
a310245f SB |
1044 | regset registers_made_dead; |
1045 | bool failure_strategy_required = false; | |
1046 | int *block_accesses; | |
dda49b66 SB |
1047 | |
1048 | /* The registers that are modified within this in block. */ | |
1049 | regset *local_sets; | |
1050 | ||
1051 | /* The registers that are conditionally modified within this block. | |
1052 | In other words, regs that are set only as part of a COND_EXEC. */ | |
1053 | regset *cond_local_sets; | |
1054 | ||
b6e7e9af | 1055 | unsigned int i; |
b9b2c339 | 1056 | |
1540f9eb | 1057 | /* Some passes used to forget clear aux field of basic block causing |
8d9afc4e | 1058 | sick behavior here. */ |
1540f9eb | 1059 | #ifdef ENABLE_CHECKING |
e0082a72 | 1060 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb) |
0bccc606 | 1061 | gcc_assert (!bb->aux); |
1540f9eb JH |
1062 | #endif |
1063 | ||
04389919 NS |
1064 | tmp = ALLOC_REG_SET (®_obstack); |
1065 | new_live_at_end = ALLOC_REG_SET (®_obstack); | |
fcc42bca | 1066 | invalidated_by_eh_edge = ALLOC_REG_SET (®_obstack); |
a310245f | 1067 | registers_made_dead = ALLOC_REG_SET (®_obstack); |
b9b2c339 | 1068 | |
d6a7951f | 1069 | /* Inconveniently, this is only readily available in hard reg set form. */ |
402209ff | 1070 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) |
f3ea5f6a | 1071 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) |
fcc42bca AK |
1072 | SET_REGNO_REG_SET (invalidated_by_eh_edge, i); |
1073 | ||
1074 | /* The exception handling registers die at eh edges. */ | |
1075 | #ifdef EH_RETURN_DATA_REGNO | |
1076 | for (i = 0; ; ++i) | |
1077 | { | |
1078 | unsigned regno = EH_RETURN_DATA_REGNO (i); | |
1079 | if (regno == INVALID_REGNUM) | |
1080 | break; | |
1081 | SET_REGNO_REG_SET (invalidated_by_eh_edge, regno); | |
1082 | } | |
1083 | #endif | |
2b2c8b3e | 1084 | |
dda49b66 | 1085 | /* Allocate space for the sets of local properties. */ |
5ed6ace5 MD |
1086 | local_sets = XCNEWVEC (bitmap, last_basic_block); |
1087 | cond_local_sets = XCNEWVEC (bitmap, last_basic_block); | |
24bd1a0b DB |
1088 | |
1089 | /* Create a worklist. Allocate an extra slot for the `head == tail' | |
1090 | style test for an empty queue doesn't work with a full queue. */ | |
5ed6ace5 | 1091 | queue = XNEWVEC (basic_block, n_basic_blocks + 1); |
402209ff | 1092 | qtail = queue; |
24bd1a0b | 1093 | qhead = qend = queue + n_basic_blocks; |
2b2c8b3e | 1094 | |
402209ff JH |
1095 | /* Queue the blocks set in the initial mask. Do this in reverse block |
1096 | number order so that we are more likely for the first round to do | |
1097 | useful work. We use AUX non-null to flag that the block is queued. */ | |
1098 | if (blocks_in) | |
c319629b | 1099 | { |
e0082a72 ZD |
1100 | FOR_EACH_BB (bb) |
1101 | if (TEST_BIT (blocks_in, bb->index)) | |
1102 | { | |
1103 | *--qhead = bb; | |
1104 | bb->aux = bb; | |
1105 | } | |
2b2c8b3e | 1106 | } |
402209ff | 1107 | else |
e881bb1b | 1108 | { |
bf77398c | 1109 | FOR_EACH_BB (bb) |
402209ff | 1110 | { |
402209ff JH |
1111 | *--qhead = bb; |
1112 | bb->aux = bb; | |
1113 | } | |
e881bb1b | 1114 | } |
e881bb1b | 1115 | |
5ed6ace5 | 1116 | block_accesses = XCNEWVEC (int, last_basic_block); |
a310245f | 1117 | |
70e0ccd0 AO |
1118 | /* We clean aux when we remove the initially-enqueued bbs, but we |
1119 | don't enqueue ENTRY and EXIT initially, so clean them upfront and | |
1120 | unconditionally. */ | |
1121 | ENTRY_BLOCK_PTR->aux = EXIT_BLOCK_PTR->aux = NULL; | |
1122 | ||
402209ff JH |
1123 | if (blocks_out) |
1124 | sbitmap_zero (blocks_out); | |
e881bb1b | 1125 | |
402209ff JH |
1126 | /* We work through the queue until there are no more blocks. What |
1127 | is live at the end of this block is precisely the union of what | |
1128 | is live at the beginning of all its successors. So, we set its | |
1129 | GLOBAL_LIVE_AT_END field based on the GLOBAL_LIVE_AT_START field | |
1130 | for its successors. Then, we compute GLOBAL_LIVE_AT_START for | |
1131 | this block by walking through the instructions in this block in | |
1132 | reverse order and updating as we go. If that changed | |
1133 | GLOBAL_LIVE_AT_START, we add the predecessors of the block to the | |
1134 | queue; they will now need to recalculate GLOBAL_LIVE_AT_END. | |
e881bb1b | 1135 | |
402209ff JH |
1136 | We are guaranteed to terminate, because GLOBAL_LIVE_AT_START |
1137 | never shrinks. If a register appears in GLOBAL_LIVE_AT_START, it | |
1138 | must either be live at the end of the block, or used within the | |
1139 | block. In the latter case, it will certainly never disappear | |
1140 | from GLOBAL_LIVE_AT_START. In the former case, the register | |
1141 | could go away only if it disappeared from GLOBAL_LIVE_AT_START | |
1142 | for one of the successor blocks. By induction, that cannot | |
a310245f SB |
1143 | occur. |
1144 | ||
1145 | ??? This reasoning doesn't work if we start from non-empty initial | |
1146 | GLOBAL_LIVE_AT_START sets. And there are actually two problems: | |
1147 | 1) Updating may not terminate (endless oscillation). | |
1148 | 2) Even if it does (and it usually does), the resulting information | |
1149 | may be inaccurate. Consider for example the following case: | |
1150 | ||
1151 | a = ...; | |
1152 | while (...) {...} -- 'a' not mentioned at all | |
1153 | ... = a; | |
1154 | ||
1155 | If the use of 'a' is deleted between two calculations of liveness | |
1156 | information and the initial sets are not cleared, the information | |
1157 | about a's liveness will get stuck inside the loop and the set will | |
1158 | appear not to be dead. | |
1159 | ||
1160 | We do not attempt to solve 2) -- the information is conservatively | |
1161 | correct (i.e. we never claim that something live is dead) and the | |
1162 | amount of optimization opportunities missed due to this problem is | |
1163 | not significant. | |
1164 | ||
1165 | 1) is more serious. In order to fix it, we monitor the number of times | |
1166 | each block is processed. Once one of the blocks has been processed more | |
1167 | times than the maximum number of rounds, we use the following strategy: | |
1168 | When a register disappears from one of the sets, we add it to a MAKE_DEAD | |
1169 | set, remove all registers in this set from all GLOBAL_LIVE_AT_* sets and | |
1170 | add the blocks with changed sets into the queue. Thus we are guaranteed | |
1171 | to terminate (the worst case corresponds to all registers in MADE_DEAD, | |
1172 | in which case the original reasoning above is valid), but in general we | |
1173 | only fix up a few offending registers. | |
1174 | ||
1175 | The maximum number of rounds for computing liveness is the largest of | |
1176 | MAX_LIVENESS_ROUNDS and the latest loop depth count for this function. */ | |
1177 | ||
402209ff | 1178 | while (qhead != qtail) |
e881bb1b | 1179 | { |
402209ff JH |
1180 | int rescan, changed; |
1181 | basic_block bb; | |
e881bb1b | 1182 | edge e; |
628f6a4e | 1183 | edge_iterator ei; |
e881bb1b | 1184 | |
402209ff JH |
1185 | bb = *qhead++; |
1186 | if (qhead == qend) | |
1187 | qhead = queue; | |
1188 | bb->aux = NULL; | |
1189 | ||
a310245f SB |
1190 | /* Should we start using the failure strategy? */ |
1191 | if (bb != ENTRY_BLOCK_PTR) | |
1192 | { | |
1193 | int max_liveness_rounds = | |
1194 | MAX (MAX_LIVENESS_ROUNDS, cfun->max_loop_depth); | |
1195 | ||
1196 | block_accesses[bb->index]++; | |
1197 | if (block_accesses[bb->index] > max_liveness_rounds) | |
1198 | failure_strategy_required = true; | |
1199 | } | |
1200 | ||
402209ff JH |
1201 | /* Begin by propagating live_at_start from the successor blocks. */ |
1202 | CLEAR_REG_SET (new_live_at_end); | |
e881bb1b | 1203 | |
628f6a4e BE |
1204 | if (EDGE_COUNT (bb->succs) > 0) |
1205 | FOR_EACH_EDGE (e, ei, bb->succs) | |
15b5aef3 RH |
1206 | { |
1207 | basic_block sb = e->dest; | |
1208 | ||
1209 | /* Call-clobbered registers die across exception and | |
1210 | call edges. */ | |
1211 | /* ??? Abnormal call edges ignored for the moment, as this gets | |
1212 | confused by sibling call edges, which crashes reg-stack. */ | |
1213 | if (e->flags & EDGE_EH) | |
eb59b8de | 1214 | bitmap_ior_and_compl_into (new_live_at_end, |
5e2d947c | 1215 | sb->il.rtl->global_live_at_start, |
fcc42bca | 1216 | invalidated_by_eh_edge); |
15b5aef3 | 1217 | else |
5e2d947c | 1218 | IOR_REG_SET (new_live_at_end, sb->il.rtl->global_live_at_start); |
15b5aef3 RH |
1219 | |
1220 | /* If a target saves one register in another (instead of on | |
1221 | the stack) the save register will need to be live for EH. */ | |
1222 | if (e->flags & EDGE_EH) | |
1223 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1224 | if (EH_USES (i)) | |
1225 | SET_REGNO_REG_SET (new_live_at_end, i); | |
1226 | } | |
1227 | else | |
1228 | { | |
1229 | /* This might be a noreturn function that throws. And | |
1230 | even if it isn't, getting the unwind info right helps | |
1231 | debugging. */ | |
1232 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1233 | if (EH_USES (i)) | |
1234 | SET_REGNO_REG_SET (new_live_at_end, i); | |
402209ff | 1235 | } |
e881bb1b | 1236 | |
402209ff JH |
1237 | /* The all-important stack pointer must always be live. */ |
1238 | SET_REGNO_REG_SET (new_live_at_end, STACK_POINTER_REGNUM); | |
1e7d57a3 | 1239 | |
402209ff JH |
1240 | /* Before reload, there are a few registers that must be forced |
1241 | live everywhere -- which might not already be the case for | |
1242 | blocks within infinite loops. */ | |
1243 | if (! reload_completed) | |
1244 | { | |
1245 | /* Any reference to any pseudo before reload is a potential | |
1246 | reference of the frame pointer. */ | |
1247 | SET_REGNO_REG_SET (new_live_at_end, FRAME_POINTER_REGNUM); | |
c9bacfdb | 1248 | |
402209ff JH |
1249 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
1250 | /* Pseudos with argument area equivalences may require | |
1251 | reloading via the argument pointer. */ | |
1252 | if (fixed_regs[ARG_POINTER_REGNUM]) | |
1253 | SET_REGNO_REG_SET (new_live_at_end, ARG_POINTER_REGNUM); | |
1254 | #endif | |
e881bb1b | 1255 | |
402209ff JH |
1256 | /* Any constant, or pseudo with constant equivalences, may |
1257 | require reloading from memory using the pic register. */ | |
fc555370 | 1258 | if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM |
402209ff JH |
1259 | && fixed_regs[PIC_OFFSET_TABLE_REGNUM]) |
1260 | SET_REGNO_REG_SET (new_live_at_end, PIC_OFFSET_TABLE_REGNUM); | |
e881bb1b | 1261 | } |
e881bb1b | 1262 | |
402209ff JH |
1263 | if (bb == ENTRY_BLOCK_PTR) |
1264 | { | |
5e2d947c | 1265 | COPY_REG_SET (bb->il.rtl->global_live_at_end, new_live_at_end); |
402209ff JH |
1266 | continue; |
1267 | } | |
e881bb1b | 1268 | |
402209ff | 1269 | /* On our first pass through this block, we'll go ahead and continue. |
dda49b66 SB |
1270 | Recognize first pass by checking if local_set is NULL for this |
1271 | basic block. On subsequent passes, we get to skip out early if | |
1272 | live_at_end wouldn't have changed. */ | |
e881bb1b | 1273 | |
24bd1a0b | 1274 | if (local_sets[bb->index] == NULL) |
402209ff | 1275 | { |
24bd1a0b DB |
1276 | local_sets[bb->index] = ALLOC_REG_SET (®_obstack); |
1277 | cond_local_sets[bb->index] = ALLOC_REG_SET (®_obstack); | |
402209ff JH |
1278 | rescan = 1; |
1279 | } | |
1280 | else | |
1281 | { | |
1282 | /* If any bits were removed from live_at_end, we'll have to | |
1283 | rescan the block. This wouldn't be necessary if we had | |
1284 | precalculated local_live, however with PROP_SCAN_DEAD_CODE | |
1285 | local_live is really dependent on live_at_end. */ | |
5e2d947c | 1286 | rescan = bitmap_intersect_compl_p (bb->il.rtl->global_live_at_end, |
55994078 NS |
1287 | new_live_at_end); |
1288 | ||
1289 | if (!rescan) | |
dda49b66 SB |
1290 | { |
1291 | regset cond_local_set; | |
1292 | ||
1293 | /* If any of the registers in the new live_at_end set are | |
1294 | conditionally set in this basic block, we must rescan. | |
1295 | This is because conditional lifetimes at the end of the | |
1296 | block do not just take the live_at_end set into | |
1297 | account, but also the liveness at the start of each | |
1298 | successor block. We can miss changes in those sets if | |
1299 | we only compare the new live_at_end against the | |
1300 | previous one. */ | |
24bd1a0b | 1301 | cond_local_set = cond_local_sets[bb->index]; |
dda49b66 SB |
1302 | rescan = bitmap_intersect_p (new_live_at_end, cond_local_set); |
1303 | } | |
55994078 NS |
1304 | |
1305 | if (!rescan) | |
402209ff | 1306 | { |
dda49b66 SB |
1307 | regset local_set; |
1308 | ||
402209ff JH |
1309 | /* Find the set of changed bits. Take this opportunity |
1310 | to notice that this set is empty and early out. */ | |
5e2d947c | 1311 | bitmap_xor (tmp, bb->il.rtl->global_live_at_end, new_live_at_end); |
55994078 | 1312 | if (bitmap_empty_p (tmp)) |
402209ff | 1313 | continue; |
55994078 | 1314 | |
dda49b66 | 1315 | /* If any of the changed bits overlap with local_sets[bb], |
55994078 | 1316 | we'll have to rescan the block. */ |
24bd1a0b | 1317 | local_set = local_sets[bb->index]; |
dda49b66 | 1318 | rescan = bitmap_intersect_p (tmp, local_set); |
402209ff JH |
1319 | } |
1320 | } | |
e881bb1b | 1321 | |
402209ff JH |
1322 | /* Let our caller know that BB changed enough to require its |
1323 | death notes updated. */ | |
1324 | if (blocks_out) | |
0b17ab2f | 1325 | SET_BIT (blocks_out, bb->index); |
e881bb1b | 1326 | |
402209ff JH |
1327 | if (! rescan) |
1328 | { | |
1329 | /* Add to live_at_start the set of all registers in | |
1330 | new_live_at_end that aren't in the old live_at_end. */ | |
eb59b8de | 1331 | |
5e2d947c | 1332 | changed = bitmap_ior_and_compl_into (bb->il.rtl->global_live_at_start, |
eb59b8de | 1333 | new_live_at_end, |
5e2d947c JH |
1334 | bb->il.rtl->global_live_at_end); |
1335 | COPY_REG_SET (bb->il.rtl->global_live_at_end, new_live_at_end); | |
402209ff JH |
1336 | if (! changed) |
1337 | continue; | |
e881bb1b RH |
1338 | } |
1339 | else | |
1340 | { | |
5e2d947c | 1341 | COPY_REG_SET (bb->il.rtl->global_live_at_end, new_live_at_end); |
e881bb1b | 1342 | |
402209ff JH |
1343 | /* Rescan the block insn by insn to turn (a copy of) live_at_end |
1344 | into live_at_start. */ | |
dda49b66 | 1345 | propagate_block (bb, new_live_at_end, |
24bd1a0b DB |
1346 | local_sets[bb->index], |
1347 | cond_local_sets[bb->index], | |
dda49b66 | 1348 | flags); |
e881bb1b | 1349 | |
402209ff | 1350 | /* If live_at start didn't change, no need to go farther. */ |
5e2d947c JH |
1351 | if (REG_SET_EQUAL_P (bb->il.rtl->global_live_at_start, |
1352 | new_live_at_end)) | |
402209ff | 1353 | continue; |
e881bb1b | 1354 | |
a310245f SB |
1355 | if (failure_strategy_required) |
1356 | { | |
1357 | /* Get the list of registers that were removed from the | |
1358 | bb->global_live_at_start set. */ | |
5e2d947c | 1359 | bitmap_and_compl (tmp, bb->il.rtl->global_live_at_start, |
a310245f SB |
1360 | new_live_at_end); |
1361 | if (!bitmap_empty_p (tmp)) | |
1362 | { | |
1363 | bool pbb_changed; | |
1364 | basic_block pbb; | |
1365 | ||
1366 | /* It should not happen that one of registers we have | |
1367 | removed last time is disappears again before any other | |
1368 | register does. */ | |
1369 | pbb_changed = bitmap_ior_into (registers_made_dead, tmp); | |
1370 | gcc_assert (pbb_changed); | |
1371 | ||
1372 | /* Now remove the registers from all sets. */ | |
1373 | FOR_EACH_BB (pbb) | |
1374 | { | |
1375 | pbb_changed = false; | |
1376 | ||
1377 | pbb_changed | |
5e2d947c JH |
1378 | |= bitmap_and_compl_into |
1379 | (pbb->il.rtl->global_live_at_start, | |
1380 | registers_made_dead); | |
a310245f | 1381 | pbb_changed |
5e2d947c JH |
1382 | |= bitmap_and_compl_into |
1383 | (pbb->il.rtl->global_live_at_end, | |
1384 | registers_made_dead); | |
a310245f SB |
1385 | if (!pbb_changed) |
1386 | continue; | |
1387 | ||
1388 | /* Note the (possible) change. */ | |
1389 | if (blocks_out) | |
1390 | SET_BIT (blocks_out, pbb->index); | |
1391 | ||
1392 | /* Makes sure to really rescan the block. */ | |
24bd1a0b | 1393 | if (local_sets[pbb->index]) |
a310245f | 1394 | { |
24bd1a0b DB |
1395 | FREE_REG_SET (local_sets[pbb->index]); |
1396 | FREE_REG_SET (cond_local_sets[pbb->index]); | |
1397 | local_sets[pbb->index] = 0; | |
a310245f SB |
1398 | } |
1399 | ||
1400 | /* Add it to the queue. */ | |
1401 | if (pbb->aux == NULL) | |
1402 | { | |
1403 | *qtail++ = pbb; | |
1404 | if (qtail == qend) | |
1405 | qtail = queue; | |
1406 | pbb->aux = pbb; | |
1407 | } | |
1408 | } | |
1409 | continue; | |
1410 | } | |
1411 | } /* end of failure_strategy_required */ | |
1412 | ||
5e2d947c | 1413 | COPY_REG_SET (bb->il.rtl->global_live_at_start, new_live_at_end); |
402209ff | 1414 | } |
a8688bd6 | 1415 | |
402209ff JH |
1416 | /* Queue all predecessors of BB so that we may re-examine |
1417 | their live_at_end. */ | |
628f6a4e | 1418 | FOR_EACH_EDGE (e, ei, bb->preds) |
402209ff JH |
1419 | { |
1420 | basic_block pb = e->src; | |
14b9dd55 BS |
1421 | |
1422 | gcc_assert ((e->flags & EDGE_FAKE) == 0); | |
1423 | ||
402209ff JH |
1424 | if (pb->aux == NULL) |
1425 | { | |
1426 | *qtail++ = pb; | |
1427 | if (qtail == qend) | |
1428 | qtail = queue; | |
1429 | pb->aux = pb; | |
1430 | } | |
1431 | } | |
a8688bd6 AM |
1432 | } |
1433 | ||
402209ff JH |
1434 | FREE_REG_SET (tmp); |
1435 | FREE_REG_SET (new_live_at_end); | |
fcc42bca | 1436 | FREE_REG_SET (invalidated_by_eh_edge); |
a310245f | 1437 | FREE_REG_SET (registers_made_dead); |
f5540cd4 | 1438 | |
402209ff JH |
1439 | if (blocks_out) |
1440 | { | |
b6e7e9af KH |
1441 | sbitmap_iterator sbi; |
1442 | ||
1443 | EXECUTE_IF_SET_IN_SBITMAP (blocks_out, 0, i, sbi) | |
402209ff | 1444 | { |
0b17ab2f | 1445 | basic_block bb = BASIC_BLOCK (i); |
24bd1a0b DB |
1446 | FREE_REG_SET (local_sets[bb->index]); |
1447 | FREE_REG_SET (cond_local_sets[bb->index]); | |
b6e7e9af | 1448 | }; |
e881bb1b RH |
1449 | } |
1450 | else | |
1451 | { | |
e0082a72 | 1452 | FOR_EACH_BB (bb) |
402209ff | 1453 | { |
24bd1a0b DB |
1454 | FREE_REG_SET (local_sets[bb->index]); |
1455 | FREE_REG_SET (cond_local_sets[bb->index]); | |
402209ff | 1456 | } |
f5540cd4 | 1457 | } |
19d3c25c | 1458 | |
a310245f | 1459 | free (block_accesses); |
402209ff | 1460 | free (queue); |
dda49b66 SB |
1461 | free (cond_local_sets); |
1462 | free (local_sets); | |
e881bb1b | 1463 | } |
0626ef8a AM |
1464 | |
1465 | \f | |
09da1532 | 1466 | /* This structure is used to pass parameters to and from the |
4a913dd6 EC |
1467 | the function find_regno_partial(). It is used to pass in the |
1468 | register number we are looking, as well as to return any rtx | |
0626ef8a AM |
1469 | we find. */ |
1470 | ||
1471 | typedef struct { | |
1472 | unsigned regno_to_find; | |
1473 | rtx retval; | |
1474 | } find_regno_partial_param; | |
1475 | ||
1476 | ||
1477 | /* Find the rtx for the reg numbers specified in 'data' if it is | |
1478 | part of an expression which only uses part of the register. Return | |
1479 | it in the structure passed in. */ | |
4a913dd6 | 1480 | static int |
6cf9ac28 | 1481 | find_regno_partial (rtx *ptr, void *data) |
0626ef8a AM |
1482 | { |
1483 | find_regno_partial_param *param = (find_regno_partial_param *)data; | |
1484 | unsigned reg = param->regno_to_find; | |
1485 | param->retval = NULL_RTX; | |
1486 | ||
1487 | if (*ptr == NULL_RTX) | |
1488 | return 0; | |
1489 | ||
4a913dd6 | 1490 | switch (GET_CODE (*ptr)) |
0626ef8a | 1491 | { |
448cad06 AH |
1492 | case ZERO_EXTRACT: |
1493 | case SIGN_EXTRACT: | |
1494 | case STRICT_LOW_PART: | |
f8cfc6aa | 1495 | if (REG_P (XEXP (*ptr, 0)) && REGNO (XEXP (*ptr, 0)) == reg) |
448cad06 AH |
1496 | { |
1497 | param->retval = XEXP (*ptr, 0); | |
1498 | return 1; | |
1499 | } | |
1500 | break; | |
0626ef8a | 1501 | |
448cad06 | 1502 | case SUBREG: |
f8cfc6aa | 1503 | if (REG_P (SUBREG_REG (*ptr)) |
448cad06 AH |
1504 | && REGNO (SUBREG_REG (*ptr)) == reg) |
1505 | { | |
1506 | param->retval = SUBREG_REG (*ptr); | |
1507 | return 1; | |
1508 | } | |
1509 | break; | |
1510 | ||
1511 | default: | |
1512 | break; | |
0626ef8a AM |
1513 | } |
1514 | ||
1515 | return 0; | |
1516 | } | |
1517 | ||
1518 | /* Process all immediate successors of the entry block looking for pseudo | |
4a913dd6 EC |
1519 | registers which are live on entry. Find all of those whose first |
1520 | instance is a partial register reference of some kind, and initialize | |
0626ef8a | 1521 | them to 0 after the entry block. This will prevent bit sets within |
4a913dd6 | 1522 | registers whose value is unknown, and may contain some kind of sticky |
0626ef8a AM |
1523 | bits we don't want. */ |
1524 | ||
a0dc2bb6 | 1525 | static int |
6cf9ac28 | 1526 | initialize_uninitialized_subregs (void) |
0626ef8a AM |
1527 | { |
1528 | rtx insn; | |
1529 | edge e; | |
3cd8c58a | 1530 | unsigned reg, did_something = 0; |
0626ef8a | 1531 | find_regno_partial_param param; |
628f6a4e | 1532 | edge_iterator ei; |
0626ef8a | 1533 | |
628f6a4e | 1534 | FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) |
0626ef8a AM |
1535 | { |
1536 | basic_block bb = e->dest; | |
5e2d947c | 1537 | regset map = bb->il.rtl->global_live_at_start; |
a2041967 KH |
1538 | reg_set_iterator rsi; |
1539 | ||
1540 | EXECUTE_IF_SET_IN_REG_SET (map, FIRST_PSEUDO_REGISTER, reg, rsi) | |
0626ef8a AM |
1541 | { |
1542 | int uid = REGNO_FIRST_UID (reg); | |
1543 | rtx i; | |
1544 | ||
1545 | /* Find an insn which mentions the register we are looking for. | |
1546 | Its preferable to have an instance of the register's rtl since | |
4a913dd6 | 1547 | there may be various flags set which we need to duplicate. |
0626ef8a | 1548 | If we can't find it, its probably an automatic whose initial |
23d1aac4 | 1549 | value doesn't matter, or hopefully something we don't care about. */ |
0626ef8a AM |
1550 | for (i = get_insns (); i && INSN_UID (i) != uid; i = NEXT_INSN (i)) |
1551 | ; | |
1552 | if (i != NULL_RTX) | |
1553 | { | |
1554 | /* Found the insn, now get the REG rtx, if we can. */ | |
1555 | param.regno_to_find = reg; | |
1556 | for_each_rtx (&i, find_regno_partial, ¶m); | |
1557 | if (param.retval != NULL_RTX) | |
1558 | { | |
a7a7d7ac KH |
1559 | start_sequence (); |
1560 | emit_move_insn (param.retval, | |
1561 | CONST0_RTX (GET_MODE (param.retval))); | |
1562 | insn = get_insns (); | |
1563 | end_sequence (); | |
0626ef8a AM |
1564 | insert_insn_on_edge (insn, e); |
1565 | did_something = 1; | |
1566 | } | |
1567 | } | |
a2041967 | 1568 | } |
0626ef8a AM |
1569 | } |
1570 | ||
1571 | if (did_something) | |
1572 | commit_edge_insertions (); | |
1573 | return did_something; | |
1574 | } | |
1575 | ||
402209ff JH |
1576 | \f |
1577 | /* Subroutines of life analysis. */ | |
e881bb1b | 1578 | |
402209ff | 1579 | /* Allocate the permanent data structures that represent the results |
60580286 | 1580 | of life analysis. */ |
e881bb1b | 1581 | |
60580286 | 1582 | static void |
6cf9ac28 | 1583 | allocate_bb_life_data (void) |
e881bb1b | 1584 | { |
e0082a72 | 1585 | basic_block bb; |
c9bacfdb | 1586 | |
e0082a72 | 1587 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR, NULL, next_bb) |
e881bb1b | 1588 | { |
370adb7b JH |
1589 | if (bb->il.rtl->global_live_at_start) |
1590 | { | |
1591 | CLEAR_REG_SET (bb->il.rtl->global_live_at_start); | |
1592 | CLEAR_REG_SET (bb->il.rtl->global_live_at_end); | |
1593 | } | |
1594 | else | |
1595 | { | |
1596 | bb->il.rtl->global_live_at_start = ALLOC_REG_SET (®_obstack); | |
1597 | bb->il.rtl->global_live_at_end = ALLOC_REG_SET (®_obstack); | |
1598 | } | |
e881bb1b | 1599 | } |
f1330226 | 1600 | |
04389919 | 1601 | regs_live_at_setjmp = ALLOC_REG_SET (®_obstack); |
402209ff | 1602 | } |
0ab409ed | 1603 | |
402209ff | 1604 | void |
6cf9ac28 | 1605 | allocate_reg_life_data (void) |
0ab409ed MH |
1606 | { |
1607 | int i; | |
0ab409ed | 1608 | |
402209ff | 1609 | max_regno = max_reg_num (); |
0bccc606 | 1610 | gcc_assert (!reg_deaths); |
5ed6ace5 | 1611 | reg_deaths = XCNEWVEC (int, max_regno); |
0ab409ed | 1612 | |
402209ff JH |
1613 | /* Recalculate the register space, in case it has grown. Old style |
1614 | vector oriented regsets would set regset_{size,bytes} here also. */ | |
1615 | allocate_reg_info (max_regno, FALSE, FALSE); | |
0ab409ed | 1616 | |
402209ff JH |
1617 | /* Reset all the data we'll collect in propagate_block and its |
1618 | subroutines. */ | |
1619 | for (i = 0; i < max_regno; i++) | |
0ab409ed | 1620 | { |
402209ff JH |
1621 | REG_N_SETS (i) = 0; |
1622 | REG_N_REFS (i) = 0; | |
1623 | REG_N_DEATHS (i) = 0; | |
1624 | REG_N_CALLS_CROSSED (i) = 0; | |
27004606 | 1625 | REG_N_THROWING_CALLS_CROSSED (i) = 0; |
402209ff | 1626 | REG_LIVE_LENGTH (i) = 0; |
e505be85 | 1627 | REG_FREQ (i) = 0; |
402209ff | 1628 | REG_BASIC_BLOCK (i) = REG_BLOCK_UNKNOWN; |
0ab409ed | 1629 | } |
402209ff | 1630 | } |
0ab409ed | 1631 | |
402209ff | 1632 | /* Delete dead instructions for propagate_block. */ |
f1330226 | 1633 | |
402209ff | 1634 | static void |
6cf9ac28 | 1635 | propagate_block_delete_insn (rtx insn) |
402209ff JH |
1636 | { |
1637 | rtx inote = find_reg_note (insn, REG_LABEL, NULL_RTX); | |
f1330226 | 1638 | |
402209ff JH |
1639 | /* If the insn referred to a label, and that label was attached to |
1640 | an ADDR_VEC, it's safe to delete the ADDR_VEC. In fact, it's | |
1641 | pretty much mandatory to delete it, because the ADDR_VEC may be | |
1642 | referencing labels that no longer exist. | |
f1330226 | 1643 | |
402209ff JH |
1644 | INSN may reference a deleted label, particularly when a jump |
1645 | table has been optimized into a direct jump. There's no | |
1646 | real good way to fix up the reference to the deleted label | |
19f71cd7 | 1647 | when the label is deleted, so we just allow it here. */ |
0ab409ed | 1648 | |
4b4bf941 | 1649 | if (inote && LABEL_P (inote)) |
0ab409ed | 1650 | { |
402209ff JH |
1651 | rtx label = XEXP (inote, 0); |
1652 | rtx next; | |
0ab409ed | 1653 | |
402209ff JH |
1654 | /* The label may be forced if it has been put in the constant |
1655 | pool. If that is the only use we must discard the table | |
1656 | jump following it, but not the label itself. */ | |
1657 | if (LABEL_NUSES (label) == 1 + LABEL_PRESERVE_P (label) | |
1658 | && (next = next_nonnote_insn (label)) != NULL | |
4b4bf941 | 1659 | && JUMP_P (next) |
402209ff JH |
1660 | && (GET_CODE (PATTERN (next)) == ADDR_VEC |
1661 | || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)) | |
0ab409ed | 1662 | { |
402209ff JH |
1663 | rtx pat = PATTERN (next); |
1664 | int diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC; | |
1665 | int len = XVECLEN (pat, diff_vec_p); | |
1666 | int i; | |
f1330226 | 1667 | |
402209ff JH |
1668 | for (i = 0; i < len; i++) |
1669 | LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0))--; | |
0ab409ed | 1670 | |
3dec4024 JH |
1671 | delete_insn_and_edges (next); |
1672 | ndead++; | |
0ab409ed MH |
1673 | } |
1674 | } | |
1675 | ||
3dec4024 JH |
1676 | delete_insn_and_edges (insn); |
1677 | ndead++; | |
0ab409ed | 1678 | } |
e881bb1b | 1679 | |
402209ff JH |
1680 | /* Delete dead libcalls for propagate_block. Return the insn |
1681 | before the libcall. */ | |
e881bb1b | 1682 | |
402209ff | 1683 | static rtx |
6cf9ac28 | 1684 | propagate_block_delete_libcall (rtx insn, rtx note) |
402209ff JH |
1685 | { |
1686 | rtx first = XEXP (note, 0); | |
1687 | rtx before = PREV_INSN (first); | |
e881bb1b | 1688 | |
3dec4024 JH |
1689 | delete_insn_chain_and_edges (first, insn); |
1690 | ndead++; | |
402209ff | 1691 | return before; |
1e29ee12 JL |
1692 | } |
1693 | ||
402209ff JH |
1694 | /* Update the life-status of regs for one insn. Return the previous insn. */ |
1695 | ||
1696 | rtx | |
6cf9ac28 | 1697 | propagate_one_insn (struct propagate_block_info *pbi, rtx insn) |
1e29ee12 | 1698 | { |
402209ff JH |
1699 | rtx prev = PREV_INSN (insn); |
1700 | int flags = pbi->flags; | |
1701 | int insn_is_dead = 0; | |
1702 | int libcall_is_dead = 0; | |
1703 | rtx note; | |
3cd8c58a | 1704 | unsigned i; |
1e29ee12 | 1705 | |
402209ff JH |
1706 | if (! INSN_P (insn)) |
1707 | return prev; | |
164d59e0 | 1708 | |
402209ff JH |
1709 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); |
1710 | if (flags & PROP_SCAN_DEAD_CODE) | |
1711 | { | |
1712 | insn_is_dead = insn_dead_p (pbi, PATTERN (insn), 0, REG_NOTES (insn)); | |
1713 | libcall_is_dead = (insn_is_dead && note != 0 | |
1714 | && libcall_dead_p (pbi, note, insn)); | |
1715 | } | |
e881bb1b | 1716 | |
402209ff JH |
1717 | /* If an instruction consists of just dead store(s) on final pass, |
1718 | delete it. */ | |
1719 | if ((flags & PROP_KILL_DEAD_CODE) && insn_is_dead) | |
e881bb1b | 1720 | { |
402209ff JH |
1721 | /* If we're trying to delete a prologue or epilogue instruction |
1722 | that isn't flagged as possibly being dead, something is wrong. | |
1723 | But if we are keeping the stack pointer depressed, we might well | |
1724 | be deleting insns that are used to compute the amount to update | |
1725 | it by, so they are fine. */ | |
1726 | if (reload_completed | |
1727 | && !(TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE | |
1728 | && (TYPE_RETURNS_STACK_DEPRESSED | |
1729 | (TREE_TYPE (current_function_decl)))) | |
1730 | && (((HAVE_epilogue || HAVE_prologue) | |
1731 | && prologue_epilogue_contains (insn)) | |
1732 | || (HAVE_sibcall_epilogue | |
1733 | && sibcall_epilogue_contains (insn))) | |
1734 | && find_reg_note (insn, REG_MAYBE_DEAD, NULL_RTX) == 0) | |
31fce3c4 | 1735 | fatal_insn ("Attempt to delete prologue/epilogue insn:", insn); |
e881bb1b | 1736 | |
402209ff | 1737 | /* Record sets. Do this even for dead instructions, since they |
86d9571b R |
1738 | would have killed the values if they hadn't been deleted. To |
1739 | be consistent, we also have to emit a clobber when we delete | |
1740 | an insn that clobbers a live register. */ | |
1741 | pbi->flags |= PROP_DEAD_INSN; | |
402209ff | 1742 | mark_set_regs (pbi, PATTERN (insn), insn); |
86d9571b | 1743 | pbi->flags &= ~PROP_DEAD_INSN; |
e881bb1b | 1744 | |
402209ff JH |
1745 | /* CC0 is now known to be dead. Either this insn used it, |
1746 | in which case it doesn't anymore, or clobbered it, | |
1747 | so the next insn can't use it. */ | |
1748 | pbi->cc0_live = 0; | |
e881bb1b | 1749 | |
402209ff | 1750 | if (libcall_is_dead) |
b77302be | 1751 | prev = propagate_block_delete_libcall (insn, note); |
d35dfca9 JL |
1752 | else |
1753 | { | |
1754 | ||
b0ac73f8 JL |
1755 | /* If INSN contains a RETVAL note and is dead, but the libcall |
1756 | as a whole is not dead, then we want to remove INSN, but | |
1757 | not the whole libcall sequence. | |
1758 | ||
6cf9ac28 | 1759 | However, we need to also remove the dangling REG_LIBCALL |
b0ac73f8 JL |
1760 | note so that we do not have mis-matched LIBCALL/RETVAL |
1761 | notes. In theory we could find a new location for the | |
6cf9ac28 | 1762 | REG_RETVAL note, but it hardly seems worth the effort. |
b0ac73f8 JL |
1763 | |
1764 | NOTE at this point will be the RETVAL note if it exists. */ | |
d35dfca9 JL |
1765 | if (note) |
1766 | { | |
d35dfca9 | 1767 | rtx libcall_note; |
6cf9ac28 | 1768 | |
d35dfca9 JL |
1769 | libcall_note |
1770 | = find_reg_note (XEXP (note, 0), REG_LIBCALL, NULL_RTX); | |
1771 | remove_note (XEXP (note, 0), libcall_note); | |
1772 | } | |
b0ac73f8 JL |
1773 | |
1774 | /* Similarly if INSN contains a LIBCALL note, remove the | |
fbe5a4a6 | 1775 | dangling REG_RETVAL note. */ |
b0ac73f8 JL |
1776 | note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); |
1777 | if (note) | |
1778 | { | |
1779 | rtx retval_note; | |
1780 | ||
1781 | retval_note | |
1782 | = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL_RTX); | |
1783 | remove_note (XEXP (note, 0), retval_note); | |
1784 | } | |
1785 | ||
1786 | /* Now delete INSN. */ | |
d35dfca9 JL |
1787 | propagate_block_delete_insn (insn); |
1788 | } | |
e881bb1b | 1789 | |
402209ff JH |
1790 | return prev; |
1791 | } | |
e881bb1b | 1792 | |
402209ff JH |
1793 | /* See if this is an increment or decrement that can be merged into |
1794 | a following memory address. */ | |
1795 | #ifdef AUTO_INC_DEC | |
1796 | { | |
b3694847 | 1797 | rtx x = single_set (insn); |
e881bb1b | 1798 | |
402209ff JH |
1799 | /* Does this instruction increment or decrement a register? */ |
1800 | if ((flags & PROP_AUTOINC) | |
1801 | && x != 0 | |
f8cfc6aa | 1802 | && REG_P (SET_DEST (x)) |
402209ff JH |
1803 | && (GET_CODE (SET_SRC (x)) == PLUS |
1804 | || GET_CODE (SET_SRC (x)) == MINUS) | |
1805 | && XEXP (SET_SRC (x), 0) == SET_DEST (x) | |
1806 | && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT | |
1807 | /* Ok, look for a following memory ref we can combine with. | |
1808 | If one is found, change the memory ref to a PRE_INC | |
1809 | or PRE_DEC, cancel this insn, and return 1. | |
1810 | Return 0 if nothing has been done. */ | |
1811 | && try_pre_increment_1 (pbi, insn)) | |
1812 | return prev; | |
1813 | } | |
1814 | #endif /* AUTO_INC_DEC */ | |
e881bb1b | 1815 | |
402209ff | 1816 | CLEAR_REG_SET (pbi->new_set); |
e881bb1b | 1817 | |
402209ff JH |
1818 | /* If this is not the final pass, and this insn is copying the value of |
1819 | a library call and it's dead, don't scan the insns that perform the | |
1820 | library call, so that the call's arguments are not marked live. */ | |
1821 | if (libcall_is_dead) | |
e881bb1b | 1822 | { |
402209ff JH |
1823 | /* Record the death of the dest reg. */ |
1824 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1825 | |
402209ff JH |
1826 | insn = XEXP (note, 0); |
1827 | return PREV_INSN (insn); | |
e881bb1b | 1828 | } |
402209ff JH |
1829 | else if (GET_CODE (PATTERN (insn)) == SET |
1830 | && SET_DEST (PATTERN (insn)) == stack_pointer_rtx | |
1831 | && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS | |
1832 | && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx | |
1833 | && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT) | |
e344dbf3 R |
1834 | { |
1835 | /* We have an insn to pop a constant amount off the stack. | |
1836 | (Such insns use PLUS regardless of the direction of the stack, | |
1837 | and any insn to adjust the stack by a constant is always a pop | |
1838 | or part of a push.) | |
1839 | These insns, if not dead stores, have no effect on life, though | |
1840 | they do have an effect on the memory stores we are tracking. */ | |
1841 | invalidate_mems_from_set (pbi, stack_pointer_rtx); | |
1842 | /* Still, we need to update local_set, lest ifcvt.c:dead_or_predicable | |
1843 | concludes that the stack pointer is not modified. */ | |
1844 | mark_set_regs (pbi, PATTERN (insn), insn); | |
1845 | } | |
402209ff JH |
1846 | else |
1847 | { | |
1848 | /* Any regs live at the time of a call instruction must not go | |
1849 | in a register clobbered by calls. Find all regs now live and | |
1850 | record this for them. */ | |
e881bb1b | 1851 | |
4b4bf941 | 1852 | if (CALL_P (insn) && (flags & PROP_REG_INFO)) |
a2041967 KH |
1853 | { |
1854 | reg_set_iterator rsi; | |
1855 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, rsi) | |
1856 | REG_N_CALLS_CROSSED (i)++; | |
27004606 JJ |
1857 | if (can_throw_internal (insn)) |
1858 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, rsi) | |
1859 | REG_N_THROWING_CALLS_CROSSED (i)++; | |
a2041967 | 1860 | } |
e881bb1b | 1861 | |
402209ff JH |
1862 | /* Record sets. Do this even for dead instructions, since they |
1863 | would have killed the values if they hadn't been deleted. */ | |
1864 | mark_set_regs (pbi, PATTERN (insn), insn); | |
e881bb1b | 1865 | |
4b4bf941 | 1866 | if (CALL_P (insn)) |
402209ff | 1867 | { |
d444b5e8 RH |
1868 | regset live_at_end; |
1869 | bool sibcall_p; | |
402209ff | 1870 | rtx note, cond; |
d444b5e8 | 1871 | int i; |
e881bb1b | 1872 | |
402209ff JH |
1873 | cond = NULL_RTX; |
1874 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
1875 | cond = COND_EXEC_TEST (PATTERN (insn)); | |
e881bb1b | 1876 | |
fe4b3c79 JL |
1877 | /* Non-constant calls clobber memory, constant calls do not |
1878 | clobber memory, though they may clobber outgoing arguments | |
1879 | on the stack. */ | |
402209ff JH |
1880 | if (! CONST_OR_PURE_CALL_P (insn)) |
1881 | { | |
1882 | free_EXPR_LIST_list (&pbi->mem_set_list); | |
1883 | pbi->mem_set_list_len = 0; | |
1884 | } | |
dd3f0101 | 1885 | else |
fe4b3c79 | 1886 | invalidate_mems_from_set (pbi, stack_pointer_rtx); |
e881bb1b | 1887 | |
402209ff JH |
1888 | /* There may be extra registers to be clobbered. */ |
1889 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
1890 | note; | |
1891 | note = XEXP (note, 1)) | |
1892 | if (GET_CODE (XEXP (note, 0)) == CLOBBER) | |
1893 | mark_set_1 (pbi, CLOBBER, XEXP (XEXP (note, 0), 0), | |
1894 | cond, insn, pbi->flags); | |
c9bacfdb | 1895 | |
d444b5e8 | 1896 | /* Calls change all call-used and global registers; sibcalls do not |
99af0d26 RH |
1897 | clobber anything that must be preserved at end-of-function, |
1898 | except for return values. */ | |
d444b5e8 RH |
1899 | |
1900 | sibcall_p = SIBLING_CALL_P (insn); | |
5e2d947c | 1901 | live_at_end = EXIT_BLOCK_PTR->il.rtl->global_live_at_start; |
402209ff | 1902 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
d444b5e8 | 1903 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i) |
99af0d26 RH |
1904 | && ! (sibcall_p |
1905 | && REGNO_REG_SET_P (live_at_end, i) | |
57856e4d R |
1906 | && ! refers_to_regno_p (i, i+1, |
1907 | current_function_return_rtx, | |
1908 | (rtx *) 0))) | |
402209ff | 1909 | { |
a10016d3 | 1910 | enum rtx_code code = global_regs[i] ? SET : CLOBBER; |
402209ff | 1911 | /* We do not want REG_UNUSED notes for these registers. */ |
a10016d3 | 1912 | mark_set_1 (pbi, code, regno_reg_rtx[i], cond, insn, |
402209ff JH |
1913 | pbi->flags & ~(PROP_DEATH_NOTES | PROP_REG_INFO)); |
1914 | } | |
1915 | } | |
312f6255 | 1916 | |
402209ff JH |
1917 | /* If an insn doesn't use CC0, it becomes dead since we assume |
1918 | that every insn clobbers it. So show it dead here; | |
1919 | mark_used_regs will set it live if it is referenced. */ | |
1920 | pbi->cc0_live = 0; | |
e881bb1b | 1921 | |
402209ff JH |
1922 | /* Record uses. */ |
1923 | if (! insn_is_dead) | |
1924 | mark_used_regs (pbi, PATTERN (insn), NULL_RTX, insn); | |
e881bb1b | 1925 | |
402209ff JH |
1926 | /* Sometimes we may have inserted something before INSN (such as a move) |
1927 | when we make an auto-inc. So ensure we will scan those insns. */ | |
1928 | #ifdef AUTO_INC_DEC | |
1929 | prev = PREV_INSN (insn); | |
1930 | #endif | |
e881bb1b | 1931 | |
4b4bf941 | 1932 | if (! insn_is_dead && CALL_P (insn)) |
402209ff | 1933 | { |
b3694847 | 1934 | int i; |
402209ff | 1935 | rtx note, cond; |
e881bb1b | 1936 | |
402209ff JH |
1937 | cond = NULL_RTX; |
1938 | if (GET_CODE (PATTERN (insn)) == COND_EXEC) | |
1939 | cond = COND_EXEC_TEST (PATTERN (insn)); | |
e881bb1b | 1940 | |
ee960939 OH |
1941 | /* Calls use their arguments, and may clobber memory which |
1942 | address involves some register. */ | |
402209ff JH |
1943 | for (note = CALL_INSN_FUNCTION_USAGE (insn); |
1944 | note; | |
1945 | note = XEXP (note, 1)) | |
ee960939 OH |
1946 | /* We find USE or CLOBBER entities in a FUNCTION_USAGE list: both |
1947 | of which mark_used_regs knows how to handle. */ | |
1948 | mark_used_regs (pbi, XEXP (XEXP (note, 0), 0), cond, insn); | |
e881bb1b | 1949 | |
402209ff | 1950 | /* The stack ptr is used (honorarily) by a CALL insn. */ |
736b64dd JH |
1951 | if ((flags & PROP_REG_INFO) |
1952 | && !REGNO_REG_SET_P (pbi->reg_live, STACK_POINTER_REGNUM)) | |
1953 | reg_deaths[STACK_POINTER_REGNUM] = pbi->insn_num; | |
402209ff | 1954 | SET_REGNO_REG_SET (pbi->reg_live, STACK_POINTER_REGNUM); |
e881bb1b | 1955 | |
402209ff JH |
1956 | /* Calls may also reference any of the global registers, |
1957 | so they are made live. */ | |
1958 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1959 | if (global_regs[i]) | |
e50126e8 | 1960 | mark_used_reg (pbi, regno_reg_rtx[i], cond, insn); |
402209ff | 1961 | } |
e881bb1b RH |
1962 | } |
1963 | ||
736b64dd | 1964 | pbi->insn_num++; |
402209ff JH |
1965 | |
1966 | return prev; | |
e881bb1b RH |
1967 | } |
1968 | ||
402209ff JH |
1969 | /* Initialize a propagate_block_info struct for public consumption. |
1970 | Note that the structure itself is opaque to this file, but that | |
1971 | the user can use the regsets provided here. */ | |
e881bb1b | 1972 | |
402209ff | 1973 | struct propagate_block_info * |
6cf9ac28 AJ |
1974 | init_propagate_block_info (basic_block bb, regset live, regset local_set, |
1975 | regset cond_local_set, int flags) | |
e881bb1b | 1976 | { |
5ed6ace5 | 1977 | struct propagate_block_info *pbi = XNEW (struct propagate_block_info); |
e881bb1b | 1978 | |
402209ff JH |
1979 | pbi->bb = bb; |
1980 | pbi->reg_live = live; | |
1981 | pbi->mem_set_list = NULL_RTX; | |
1982 | pbi->mem_set_list_len = 0; | |
1983 | pbi->local_set = local_set; | |
1984 | pbi->cond_local_set = cond_local_set; | |
1985 | pbi->cc0_live = 0; | |
1986 | pbi->flags = flags; | |
736b64dd | 1987 | pbi->insn_num = 0; |
c9bacfdb | 1988 | |
402209ff | 1989 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) |
5ed6ace5 | 1990 | pbi->reg_next_use = XCNEWVEC (rtx, max_reg_num ()); |
e881bb1b | 1991 | else |
402209ff | 1992 | pbi->reg_next_use = NULL; |
e6cfb550 | 1993 | |
8bdbfff5 | 1994 | pbi->new_set = BITMAP_ALLOC (NULL); |
7a442791 | 1995 | |
402209ff JH |
1996 | #ifdef HAVE_conditional_execution |
1997 | pbi->reg_cond_dead = splay_tree_new (splay_tree_compare_ints, NULL, | |
1998 | free_reg_cond_life_info); | |
8bdbfff5 | 1999 | pbi->reg_cond_reg = BITMAP_ALLOC (NULL); |
7a442791 | 2000 | |
38b2a605 RE |
2001 | /* If this block ends in a conditional branch, for each register |
2002 | live from one side of the branch and not the other, record the | |
2003 | register as conditionally dead. */ | |
4b4bf941 | 2004 | if (JUMP_P (BB_END (bb)) |
a813c111 | 2005 | && any_condjump_p (BB_END (bb))) |
402209ff | 2006 | { |
04389919 | 2007 | regset diff = ALLOC_REG_SET (®_obstack); |
402209ff | 2008 | basic_block bb_true, bb_false; |
db20bd62 | 2009 | unsigned i; |
421382ac | 2010 | |
402209ff | 2011 | /* Identify the successor blocks. */ |
628f6a4e | 2012 | bb_true = EDGE_SUCC (bb, 0)->dest; |
c5cbcccf | 2013 | if (!single_succ_p (bb)) |
402209ff | 2014 | { |
628f6a4e | 2015 | bb_false = EDGE_SUCC (bb, 1)->dest; |
c9bacfdb | 2016 | |
628f6a4e | 2017 | if (EDGE_SUCC (bb, 0)->flags & EDGE_FALLTHRU) |
402209ff JH |
2018 | { |
2019 | basic_block t = bb_false; | |
2020 | bb_false = bb_true; | |
2021 | bb_true = t; | |
2022 | } | |
0bccc606 | 2023 | else |
628f6a4e | 2024 | gcc_assert (EDGE_SUCC (bb, 1)->flags & EDGE_FALLTHRU); |
402209ff JH |
2025 | } |
2026 | else | |
2027 | { | |
2028 | /* This can happen with a conditional jump to the next insn. */ | |
0bccc606 | 2029 | gcc_assert (JUMP_LABEL (BB_END (bb)) == BB_HEAD (bb_true)); |
421382ac | 2030 | |
402209ff JH |
2031 | /* Simplest way to do nothing. */ |
2032 | bb_false = bb_true; | |
2033 | } | |
be1bb652 | 2034 | |
402209ff | 2035 | /* Compute which register lead different lives in the successors. */ |
5e2d947c JH |
2036 | bitmap_xor (diff, bb_true->il.rtl->global_live_at_start, |
2037 | bb_false->il.rtl->global_live_at_start); | |
f7569f3a NS |
2038 | |
2039 | if (!bitmap_empty_p (diff)) | |
2040 | { | |
38b2a605 | 2041 | /* Extract the condition from the branch. */ |
a813c111 | 2042 | rtx set_src = SET_SRC (pc_set (BB_END (bb))); |
38b2a605 | 2043 | rtx cond_true = XEXP (set_src, 0); |
402209ff | 2044 | rtx reg = XEXP (cond_true, 0); |
8965ece1 | 2045 | enum rtx_code inv_cond; |
be1bb652 | 2046 | |
402209ff JH |
2047 | if (GET_CODE (reg) == SUBREG) |
2048 | reg = SUBREG_REG (reg); | |
dc108b7a | 2049 | |
38b2a605 | 2050 | /* We can only track conditional lifetimes if the condition is |
8965ece1 PB |
2051 | in the form of a reversible comparison of a register against |
2052 | zero. If the condition is more complex than that, then it is | |
2053 | safe not to record any information. */ | |
2054 | inv_cond = reversed_comparison_code (cond_true, BB_END (bb)); | |
2055 | if (inv_cond != UNKNOWN | |
2056 | && REG_P (reg) | |
38b2a605 RE |
2057 | && XEXP (cond_true, 1) == const0_rtx) |
2058 | { | |
2059 | rtx cond_false | |
8965ece1 | 2060 | = gen_rtx_fmt_ee (inv_cond, |
38b2a605 RE |
2061 | GET_MODE (cond_true), XEXP (cond_true, 0), |
2062 | XEXP (cond_true, 1)); | |
a2041967 KH |
2063 | reg_set_iterator rsi; |
2064 | ||
38b2a605 RE |
2065 | if (GET_CODE (XEXP (set_src, 1)) == PC) |
2066 | { | |
2067 | rtx t = cond_false; | |
2068 | cond_false = cond_true; | |
2069 | cond_true = t; | |
2070 | } | |
dc108b7a | 2071 | |
38b2a605 | 2072 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (reg)); |
dc108b7a | 2073 | |
38b2a605 | 2074 | /* For each such register, mark it conditionally dead. */ |
a2041967 KH |
2075 | EXECUTE_IF_SET_IN_REG_SET (diff, 0, i, rsi) |
2076 | { | |
2077 | struct reg_cond_life_info *rcli; | |
2078 | rtx cond; | |
2079 | ||
5ed6ace5 | 2080 | rcli = XNEW (struct reg_cond_life_info); |
a2041967 | 2081 | |
5e2d947c JH |
2082 | if (REGNO_REG_SET_P (bb_true->il.rtl->global_live_at_start, |
2083 | i)) | |
a2041967 KH |
2084 | cond = cond_false; |
2085 | else | |
2086 | cond = cond_true; | |
2087 | rcli->condition = cond; | |
2088 | rcli->stores = const0_rtx; | |
2089 | rcli->orig_condition = cond; | |
2090 | ||
2091 | splay_tree_insert (pbi->reg_cond_dead, i, | |
2092 | (splay_tree_value) rcli); | |
2093 | } | |
38b2a605 | 2094 | } |
dc108b7a | 2095 | } |
dc108b7a | 2096 | |
402209ff | 2097 | FREE_REG_SET (diff); |
dc108b7a | 2098 | } |
402209ff JH |
2099 | #endif |
2100 | ||
2101 | /* If this block has no successors, any stores to the frame that aren't | |
2102 | used later in the block are dead. So make a pass over the block | |
2103 | recording any such that are made and show them dead at the end. We do | |
2104 | a very conservative and simple job here. */ | |
2105 | if (optimize | |
2106 | && ! (TREE_CODE (TREE_TYPE (current_function_decl)) == FUNCTION_TYPE | |
2107 | && (TYPE_RETURNS_STACK_DEPRESSED | |
2108 | (TREE_TYPE (current_function_decl)))) | |
5149f070 | 2109 | && (flags & PROP_SCAN_DEAD_STORES) |
628f6a4e | 2110 | && (EDGE_COUNT (bb->succs) == 0 |
c5cbcccf ZD |
2111 | || (single_succ_p (bb) |
2112 | && single_succ (bb) == EXIT_BLOCK_PTR | |
402209ff | 2113 | && ! current_function_calls_eh_return))) |
dc108b7a | 2114 | { |
402209ff | 2115 | rtx insn, set; |
a813c111 | 2116 | for (insn = BB_END (bb); insn != BB_HEAD (bb); insn = PREV_INSN (insn)) |
4b4bf941 | 2117 | if (NONJUMP_INSN_P (insn) |
402209ff | 2118 | && (set = single_set (insn)) |
3c0cb5de | 2119 | && MEM_P (SET_DEST (set))) |
402209ff JH |
2120 | { |
2121 | rtx mem = SET_DEST (set); | |
2122 | rtx canon_mem = canon_rtx (mem); | |
2123 | ||
402209ff JH |
2124 | if (XEXP (canon_mem, 0) == frame_pointer_rtx |
2125 | || (GET_CODE (XEXP (canon_mem, 0)) == PLUS | |
2126 | && XEXP (XEXP (canon_mem, 0), 0) == frame_pointer_rtx | |
2127 | && GET_CODE (XEXP (XEXP (canon_mem, 0), 1)) == CONST_INT)) | |
2128 | add_to_mem_set_list (pbi, canon_mem); | |
2129 | } | |
dc108b7a | 2130 | } |
dc108b7a | 2131 | |
402209ff | 2132 | return pbi; |
dc108b7a RH |
2133 | } |
2134 | ||
402209ff | 2135 | /* Release a propagate_block_info struct. */ |
558389e3 | 2136 | |
402209ff | 2137 | void |
6cf9ac28 | 2138 | free_propagate_block_info (struct propagate_block_info *pbi) |
558389e3 | 2139 | { |
402209ff | 2140 | free_EXPR_LIST_list (&pbi->mem_set_list); |
558389e3 | 2141 | |
8bdbfff5 | 2142 | BITMAP_FREE (pbi->new_set); |
558389e3 | 2143 | |
402209ff JH |
2144 | #ifdef HAVE_conditional_execution |
2145 | splay_tree_delete (pbi->reg_cond_dead); | |
8bdbfff5 | 2146 | BITMAP_FREE (pbi->reg_cond_reg); |
402209ff | 2147 | #endif |
558389e3 | 2148 | |
736b64dd JH |
2149 | if (pbi->flags & PROP_REG_INFO) |
2150 | { | |
2151 | int num = pbi->insn_num; | |
3cd8c58a | 2152 | unsigned i; |
a2041967 | 2153 | reg_set_iterator rsi; |
736b64dd | 2154 | |
a2041967 KH |
2155 | EXECUTE_IF_SET_IN_REG_SET (pbi->reg_live, 0, i, rsi) |
2156 | { | |
2157 | REG_LIVE_LENGTH (i) += num - reg_deaths[i]; | |
2158 | reg_deaths[i] = 0; | |
2159 | } | |
736b64dd | 2160 | } |
402209ff JH |
2161 | if (pbi->reg_next_use) |
2162 | free (pbi->reg_next_use); | |
558389e3 | 2163 | |
402209ff JH |
2164 | free (pbi); |
2165 | } | |
336a6399 | 2166 | |
402209ff JH |
2167 | /* Compute the registers live at the beginning of a basic block BB from |
2168 | those live at the end. | |
c9bacfdb | 2169 | |
402209ff JH |
2170 | When called, REG_LIVE contains those live at the end. On return, it |
2171 | contains those live at the beginning. | |
ee7b8369 | 2172 | |
402209ff JH |
2173 | LOCAL_SET, if non-null, will be set with all registers killed |
2174 | unconditionally by this basic block. | |
2175 | Likewise, COND_LOCAL_SET, if non-null, will be set with all registers | |
2176 | killed conditionally by this basic block. If there is any unconditional | |
2177 | set of a register, then the corresponding bit will be set in LOCAL_SET | |
2178 | and cleared in COND_LOCAL_SET. | |
2179 | It is valid for LOCAL_SET and COND_LOCAL_SET to be the same set. In this | |
2180 | case, the resulting set will be equal to the union of the two sets that | |
2181 | would otherwise be computed. | |
558389e3 | 2182 | |
cc2902df | 2183 | Return nonzero if an INSN is deleted (i.e. by dead code removal). */ |
558389e3 | 2184 | |
402209ff | 2185 | int |
6cf9ac28 AJ |
2186 | propagate_block (basic_block bb, regset live, regset local_set, |
2187 | regset cond_local_set, int flags) | |
558389e3 | 2188 | { |
402209ff JH |
2189 | struct propagate_block_info *pbi; |
2190 | rtx insn, prev; | |
2191 | int changed; | |
558389e3 | 2192 | |
402209ff | 2193 | pbi = init_propagate_block_info (bb, live, local_set, cond_local_set, flags); |
be1bb652 | 2194 | |
402209ff | 2195 | if (flags & PROP_REG_INFO) |
be1bb652 | 2196 | { |
3cd8c58a | 2197 | unsigned i; |
a2041967 | 2198 | reg_set_iterator rsi; |
558389e3 | 2199 | |
402209ff JH |
2200 | /* Process the regs live at the end of the block. |
2201 | Mark them as not local to any one basic block. */ | |
a2041967 KH |
2202 | EXECUTE_IF_SET_IN_REG_SET (live, 0, i, rsi) |
2203 | REG_BASIC_BLOCK (i) = REG_BLOCK_GLOBAL; | |
402209ff | 2204 | } |
558389e3 | 2205 | |
402209ff | 2206 | /* Scan the block an insn at a time from end to beginning. */ |
558389e3 | 2207 | |
402209ff | 2208 | changed = 0; |
a813c111 | 2209 | for (insn = BB_END (bb); ; insn = prev) |
402209ff JH |
2210 | { |
2211 | /* If this is a call to `setjmp' et al, warn if any | |
2212 | non-volatile datum is live. */ | |
2213 | if ((flags & PROP_REG_INFO) | |
4b4bf941 | 2214 | && CALL_P (insn) |
402209ff JH |
2215 | && find_reg_note (insn, REG_SETJMP, NULL)) |
2216 | IOR_REG_SET (regs_live_at_setjmp, pbi->reg_live); | |
558389e3 | 2217 | |
402209ff | 2218 | prev = propagate_one_insn (pbi, insn); |
bc35512f JH |
2219 | if (!prev) |
2220 | changed |= insn != get_insns (); | |
2221 | else | |
2222 | changed |= NEXT_INSN (prev) != insn; | |
336a6399 | 2223 | |
a813c111 | 2224 | if (insn == BB_HEAD (bb)) |
402209ff | 2225 | break; |
336a6399 RH |
2226 | } |
2227 | ||
fcc42bca AK |
2228 | #ifdef EH_RETURN_DATA_REGNO |
2229 | if (bb_has_eh_pred (bb)) | |
2230 | { | |
2231 | unsigned int i; | |
2232 | for (i = 0; ; ++i) | |
2233 | { | |
2234 | unsigned regno = EH_RETURN_DATA_REGNO (i); | |
2235 | if (regno == INVALID_REGNUM) | |
2236 | break; | |
2237 | if (pbi->local_set) | |
2238 | { | |
2239 | CLEAR_REGNO_REG_SET (pbi->cond_local_set, regno); | |
2240 | SET_REGNO_REG_SET (pbi->local_set, regno); | |
2241 | } | |
2242 | if (REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2243 | SET_REGNO_REG_SET (pbi->new_set, regno); | |
2244 | ||
2245 | regs_ever_live[regno] = 1; | |
2246 | } | |
2247 | } | |
2248 | #endif | |
2249 | ||
402209ff JH |
2250 | free_propagate_block_info (pbi); |
2251 | ||
2252 | return changed; | |
558389e3 | 2253 | } |
402209ff JH |
2254 | \f |
2255 | /* Return 1 if X (the body of an insn, or part of it) is just dead stores | |
2256 | (SET expressions whose destinations are registers dead after the insn). | |
2257 | NEEDED is the regset that says which regs are alive after the insn. | |
2258 | ||
cc2902df | 2259 | Unless CALL_OK is nonzero, an insn is needed if it contains a CALL. |
558389e3 | 2260 | |
402209ff JH |
2261 | If X is the entire body of an insn, NOTES contains the reg notes |
2262 | pertaining to the insn. */ | |
dc2ede84 | 2263 | |
dc2ede84 | 2264 | static int |
6cf9ac28 AJ |
2265 | insn_dead_p (struct propagate_block_info *pbi, rtx x, int call_ok, |
2266 | rtx notes ATTRIBUTE_UNUSED) | |
dc2ede84 | 2267 | { |
402209ff | 2268 | enum rtx_code code = GET_CODE (x); |
be1bb652 | 2269 | |
a646f6cc AH |
2270 | /* Don't eliminate insns that may trap. */ |
2271 | if (flag_non_call_exceptions && may_trap_p (x)) | |
2272 | return 0; | |
2273 | ||
402209ff | 2274 | #ifdef AUTO_INC_DEC |
ff6051b7 GK |
2275 | /* As flow is invoked after combine, we must take existing AUTO_INC |
2276 | expressions into account. */ | |
2277 | for (; notes; notes = XEXP (notes, 1)) | |
e881bb1b | 2278 | { |
ff6051b7 | 2279 | if (REG_NOTE_KIND (notes) == REG_INC) |
336a6399 | 2280 | { |
ff6051b7 | 2281 | int regno = REGNO (XEXP (notes, 0)); |
4a913dd6 | 2282 | |
ff6051b7 GK |
2283 | /* Don't delete insns to set global regs. */ |
2284 | if ((regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2285 | || REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2286 | return 0; | |
402209ff | 2287 | } |
336a6399 | 2288 | } |
402209ff | 2289 | #endif |
4793dca1 | 2290 | |
402209ff JH |
2291 | /* If setting something that's a reg or part of one, |
2292 | see if that register's altered value will be live. */ | |
558389e3 | 2293 | |
402209ff | 2294 | if (code == SET) |
7a442791 | 2295 | { |
402209ff | 2296 | rtx r = SET_DEST (x); |
b02eea61 | 2297 | |
402209ff JH |
2298 | #ifdef HAVE_cc0 |
2299 | if (GET_CODE (r) == CC0) | |
2300 | return ! pbi->cc0_live; | |
2301 | #endif | |
b9f22704 | 2302 | |
402209ff JH |
2303 | /* A SET that is a subroutine call cannot be dead. */ |
2304 | if (GET_CODE (SET_SRC (x)) == CALL) | |
2305 | { | |
2306 | if (! call_ok) | |
2307 | return 0; | |
2308 | } | |
b02eea61 | 2309 | |
402209ff JH |
2310 | /* Don't eliminate loads from volatile memory or volatile asms. */ |
2311 | else if (volatile_refs_p (SET_SRC (x))) | |
2312 | return 0; | |
7a442791 | 2313 | |
3c0cb5de | 2314 | if (MEM_P (r)) |
7a442791 | 2315 | { |
402209ff | 2316 | rtx temp, canon_r; |
b9f22704 | 2317 | |
402209ff JH |
2318 | if (MEM_VOLATILE_P (r) || GET_MODE (r) == BLKmode) |
2319 | return 0; | |
0068fd96 | 2320 | |
402209ff | 2321 | canon_r = canon_rtx (r); |
0068fd96 | 2322 | |
402209ff JH |
2323 | /* Walk the set of memory locations we are currently tracking |
2324 | and see if one is an identical match to this memory location. | |
2325 | If so, this memory write is dead (remember, we're walking | |
2326 | backwards from the end of the block to the start). Since | |
2327 | rtx_equal_p does not check the alias set or flags, we also | |
2328 | must have the potential for them to conflict (anti_dependence). */ | |
2329 | for (temp = pbi->mem_set_list; temp != 0; temp = XEXP (temp, 1)) | |
389fdba0 | 2330 | if (anti_dependence (r, XEXP (temp, 0))) |
402209ff JH |
2331 | { |
2332 | rtx mem = XEXP (temp, 0); | |
0068fd96 | 2333 | |
402209ff JH |
2334 | if (rtx_equal_p (XEXP (canon_r, 0), XEXP (mem, 0)) |
2335 | && (GET_MODE_SIZE (GET_MODE (canon_r)) | |
2336 | <= GET_MODE_SIZE (GET_MODE (mem)))) | |
2337 | return 1; | |
7a442791 | 2338 | |
402209ff JH |
2339 | #ifdef AUTO_INC_DEC |
2340 | /* Check if memory reference matches an auto increment. Only | |
2341 | post increment/decrement or modify are valid. */ | |
2342 | if (GET_MODE (mem) == GET_MODE (r) | |
2343 | && (GET_CODE (XEXP (mem, 0)) == POST_DEC | |
2344 | || GET_CODE (XEXP (mem, 0)) == POST_INC | |
2345 | || GET_CODE (XEXP (mem, 0)) == POST_MODIFY) | |
2346 | && GET_MODE (XEXP (mem, 0)) == GET_MODE (r) | |
2347 | && rtx_equal_p (XEXP (XEXP (mem, 0), 0), XEXP (r, 0))) | |
2348 | return 1; | |
2349 | #endif | |
2350 | } | |
b02eea61 | 2351 | } |
d69d0316 | 2352 | else |
7a442791 | 2353 | { |
402209ff JH |
2354 | while (GET_CODE (r) == SUBREG |
2355 | || GET_CODE (r) == STRICT_LOW_PART | |
2356 | || GET_CODE (r) == ZERO_EXTRACT) | |
2357 | r = XEXP (r, 0); | |
b02eea61 | 2358 | |
f8cfc6aa | 2359 | if (REG_P (r)) |
d69d0316 | 2360 | { |
402209ff | 2361 | int regno = REGNO (r); |
b02eea61 | 2362 | |
402209ff JH |
2363 | /* Obvious. */ |
2364 | if (REGNO_REG_SET_P (pbi->reg_live, regno)) | |
2365 | return 0; | |
7a442791 | 2366 | |
402209ff JH |
2367 | /* If this is a hard register, verify that subsequent |
2368 | words are not needed. */ | |
2369 | if (regno < FIRST_PSEUDO_REGISTER) | |
2370 | { | |
66fd46b6 | 2371 | int n = hard_regno_nregs[regno][GET_MODE (r)]; |
46fac664 | 2372 | |
402209ff JH |
2373 | while (--n > 0) |
2374 | if (REGNO_REG_SET_P (pbi->reg_live, regno+n)) | |
2375 | return 0; | |
2376 | } | |
46fac664 | 2377 | |
402209ff JH |
2378 | /* Don't delete insns to set global regs. */ |
2379 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
2380 | return 0; | |
46fac664 | 2381 | |
402209ff JH |
2382 | /* Make sure insns to set the stack pointer aren't deleted. */ |
2383 | if (regno == STACK_POINTER_REGNUM) | |
2384 | return 0; | |
b02eea61 | 2385 | |
402209ff JH |
2386 | /* ??? These bits might be redundant with the force live bits |
2387 | in calculate_global_regs_live. We would delete from | |
2388 | sequential sets; whether this actually affects real code | |
2389 | for anything but the stack pointer I don't know. */ | |
2390 | /* Make sure insns to set the frame pointer aren't deleted. */ | |
2391 | if (regno == FRAME_POINTER_REGNUM | |
2392 | && (! reload_completed || frame_pointer_needed)) | |
2393 | return 0; | |
2394 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
2395 | if (regno == HARD_FRAME_POINTER_REGNUM | |
2396 | && (! reload_completed || frame_pointer_needed)) | |
2397 | return 0; | |
2398 | #endif | |
b02eea61 | 2399 | |
402209ff JH |
2400 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
2401 | /* Make sure insns to set arg pointer are never deleted | |
2402 | (if the arg pointer isn't fixed, there will be a USE | |
2403 | for it, so we can treat it normally). */ | |
2404 | if (regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
2405 | return 0; | |
2406 | #endif | |
46fac664 | 2407 | |
402209ff JH |
2408 | /* Otherwise, the set is dead. */ |
2409 | return 1; | |
2410 | } | |
2411 | } | |
2412 | } | |
46fac664 | 2413 | |
402209ff JH |
2414 | /* If performing several activities, insn is dead if each activity |
2415 | is individually dead. Also, CLOBBERs and USEs can be ignored; a | |
2416 | CLOBBER or USE that's inside a PARALLEL doesn't make the insn | |
2417 | worth keeping. */ | |
2418 | else if (code == PARALLEL) | |
2419 | { | |
2420 | int i = XVECLEN (x, 0); | |
46fac664 | 2421 | |
402209ff JH |
2422 | for (i--; i >= 0; i--) |
2423 | if (GET_CODE (XVECEXP (x, 0, i)) != CLOBBER | |
2424 | && GET_CODE (XVECEXP (x, 0, i)) != USE | |
2425 | && ! insn_dead_p (pbi, XVECEXP (x, 0, i), call_ok, NULL_RTX)) | |
2426 | return 0; | |
46fac664 | 2427 | |
402209ff JH |
2428 | return 1; |
2429 | } | |
46fac664 | 2430 | |
402209ff | 2431 | /* A CLOBBER of a pseudo-register that is dead serves no purpose. That |
a6abdce3 RH |
2432 | is not necessarily true for hard registers until after reload. */ |
2433 | else if (code == CLOBBER) | |
2434 | { | |
f8cfc6aa | 2435 | if (REG_P (XEXP (x, 0)) |
a6abdce3 RH |
2436 | && (REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER |
2437 | || reload_completed) | |
2438 | && ! REGNO_REG_SET_P (pbi->reg_live, REGNO (XEXP (x, 0)))) | |
2439 | return 1; | |
2440 | } | |
2441 | ||
2442 | /* ??? A base USE is a historical relic. It ought not be needed anymore. | |
2443 | Instances where it is still used are either (1) temporary and the USE | |
2444 | escaped the pass, (2) cruft and the USE need not be emitted anymore, | |
2445 | or (3) hiding bugs elsewhere that are not properly representing data | |
2446 | flow. */ | |
2447 | ||
402209ff JH |
2448 | return 0; |
2449 | } | |
46fac664 | 2450 | |
402209ff JH |
2451 | /* If INSN is the last insn in a libcall, and assuming INSN is dead, |
2452 | return 1 if the entire library call is dead. | |
2453 | This is true if INSN copies a register (hard or pseudo) | |
2454 | and if the hard return reg of the call insn is dead. | |
2455 | (The caller should have tested the destination of the SET inside | |
2456 | INSN already for death.) | |
46fac664 | 2457 | |
402209ff JH |
2458 | If this insn doesn't just copy a register, then we don't |
2459 | have an ordinary libcall. In that case, cse could not have | |
2460 | managed to substitute the source for the dest later on, | |
2461 | so we can assume the libcall is dead. | |
46fac664 | 2462 | |
402209ff JH |
2463 | PBI is the block info giving pseudoregs live before this insn. |
2464 | NOTE is the REG_RETVAL note of the insn. */ | |
46fac664 | 2465 | |
402209ff | 2466 | static int |
6cf9ac28 | 2467 | libcall_dead_p (struct propagate_block_info *pbi, rtx note, rtx insn) |
402209ff JH |
2468 | { |
2469 | rtx x = single_set (insn); | |
46fac664 | 2470 | |
402209ff JH |
2471 | if (x) |
2472 | { | |
b3694847 | 2473 | rtx r = SET_SRC (x); |
46fac664 | 2474 | |
b77302be | 2475 | if (REG_P (r) || GET_CODE (r) == SUBREG) |
402209ff JH |
2476 | { |
2477 | rtx call = XEXP (note, 0); | |
2478 | rtx call_pat; | |
b3694847 | 2479 | int i; |
46fac664 | 2480 | |
402209ff | 2481 | /* Find the call insn. */ |
4b4bf941 | 2482 | while (call != insn && !CALL_P (call)) |
402209ff | 2483 | call = NEXT_INSN (call); |
46fac664 | 2484 | |
402209ff JH |
2485 | /* If there is none, do nothing special, |
2486 | since ordinary death handling can understand these insns. */ | |
2487 | if (call == insn) | |
2488 | return 0; | |
b02eea61 | 2489 | |
402209ff JH |
2490 | /* See if the hard reg holding the value is dead. |
2491 | If this is a PARALLEL, find the call within it. */ | |
2492 | call_pat = PATTERN (call); | |
2493 | if (GET_CODE (call_pat) == PARALLEL) | |
46fac664 | 2494 | { |
402209ff JH |
2495 | for (i = XVECLEN (call_pat, 0) - 1; i >= 0; i--) |
2496 | if (GET_CODE (XVECEXP (call_pat, 0, i)) == SET | |
2497 | && GET_CODE (SET_SRC (XVECEXP (call_pat, 0, i))) == CALL) | |
2498 | break; | |
2499 | ||
2500 | /* This may be a library call that is returning a value | |
2501 | via invisible pointer. Do nothing special, since | |
2502 | ordinary death handling can understand these insns. */ | |
2503 | if (i < 0) | |
2504 | return 0; | |
2505 | ||
2506 | call_pat = XVECEXP (call_pat, 0, i); | |
46fac664 | 2507 | } |
46fac664 | 2508 | |
b77302be JJ |
2509 | if (! insn_dead_p (pbi, call_pat, 1, REG_NOTES (call))) |
2510 | return 0; | |
2511 | ||
2512 | while ((insn = PREV_INSN (insn)) != call) | |
2513 | { | |
2514 | if (! INSN_P (insn)) | |
2515 | continue; | |
2516 | if (! insn_dead_p (pbi, PATTERN (insn), 0, REG_NOTES (insn))) | |
2517 | return 0; | |
2518 | } | |
2519 | return 1; | |
46fac664 | 2520 | } |
46fac664 | 2521 | } |
b77302be | 2522 | return 0; |
402209ff | 2523 | } |
46fac664 | 2524 | |
402209ff JH |
2525 | /* 1 if register REGNO was alive at a place where `setjmp' was called |
2526 | and was set more than once or is an argument. | |
2527 | Such regs may be clobbered by `longjmp'. */ | |
b02eea61 | 2528 | |
402209ff | 2529 | int |
6cf9ac28 | 2530 | regno_clobbered_at_setjmp (int regno) |
402209ff | 2531 | { |
24bd1a0b | 2532 | if (n_basic_blocks == NUM_FIXED_BLOCKS) |
402209ff JH |
2533 | return 0; |
2534 | ||
2535 | return ((REG_N_SETS (regno) > 1 | |
5e2d947c JH |
2536 | || REGNO_REG_SET_P (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end, |
2537 | regno)) | |
402209ff JH |
2538 | && REGNO_REG_SET_P (regs_live_at_setjmp, regno)); |
2539 | } | |
2540 | \f | |
2541 | /* Add MEM to PBI->MEM_SET_LIST. MEM should be canonical. Respect the | |
2542 | maximal list size; look for overlaps in mode and select the largest. */ | |
2543 | static void | |
6cf9ac28 | 2544 | add_to_mem_set_list (struct propagate_block_info *pbi, rtx mem) |
46fac664 | 2545 | { |
402209ff JH |
2546 | rtx i; |
2547 | ||
2548 | /* We don't know how large a BLKmode store is, so we must not | |
2549 | take them into consideration. */ | |
2550 | if (GET_MODE (mem) == BLKmode) | |
2551 | return; | |
2552 | ||
2553 | for (i = pbi->mem_set_list; i ; i = XEXP (i, 1)) | |
46fac664 | 2554 | { |
402209ff JH |
2555 | rtx e = XEXP (i, 0); |
2556 | if (rtx_equal_p (XEXP (mem, 0), XEXP (e, 0))) | |
46fac664 | 2557 | { |
402209ff | 2558 | if (GET_MODE_SIZE (GET_MODE (mem)) > GET_MODE_SIZE (GET_MODE (e))) |
b02eea61 | 2559 | { |
402209ff JH |
2560 | #ifdef AUTO_INC_DEC |
2561 | /* If we must store a copy of the mem, we can just modify | |
2562 | the mode of the stored copy. */ | |
2563 | if (pbi->flags & PROP_AUTOINC) | |
2564 | PUT_MODE (e, GET_MODE (mem)); | |
2565 | else | |
2566 | #endif | |
2567 | XEXP (i, 0) = mem; | |
b02eea61 | 2568 | } |
402209ff | 2569 | return; |
46fac664 | 2570 | } |
46fac664 | 2571 | } |
b02eea61 | 2572 | |
95b9a3a5 | 2573 | if (pbi->mem_set_list_len < PARAM_VALUE (PARAM_MAX_FLOW_MEMORY_LOCATIONS)) |
402209ff JH |
2574 | { |
2575 | #ifdef AUTO_INC_DEC | |
2576 | /* Store a copy of mem, otherwise the address may be | |
2577 | scrogged by find_auto_inc. */ | |
2578 | if (pbi->flags & PROP_AUTOINC) | |
2579 | mem = shallow_copy_rtx (mem); | |
2580 | #endif | |
2581 | pbi->mem_set_list = alloc_EXPR_LIST (0, mem, pbi->mem_set_list); | |
2582 | pbi->mem_set_list_len++; | |
2583 | } | |
46fac664 JH |
2584 | } |
2585 | ||
402209ff JH |
2586 | /* INSN references memory, possibly using autoincrement addressing modes. |
2587 | Find any entries on the mem_set_list that need to be invalidated due | |
2588 | to an address change. */ | |
b02eea61 | 2589 | |
fe4b3c79 | 2590 | static int |
6cf9ac28 | 2591 | invalidate_mems_from_autoinc (rtx *px, void *data) |
46fac664 | 2592 | { |
fe4b3c79 JL |
2593 | rtx x = *px; |
2594 | struct propagate_block_info *pbi = data; | |
2595 | ||
ec8e098d | 2596 | if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC) |
fe4b3c79 JL |
2597 | { |
2598 | invalidate_mems_from_set (pbi, XEXP (x, 0)); | |
2599 | return -1; | |
2600 | } | |
2601 | ||
2602 | return 0; | |
402209ff | 2603 | } |
46fac664 | 2604 | |
797e15eb HPN |
2605 | /* EXP is a REG or MEM. Remove any dependent entries from |
2606 | pbi->mem_set_list. */ | |
46fac664 | 2607 | |
402209ff | 2608 | static void |
6cf9ac28 | 2609 | invalidate_mems_from_set (struct propagate_block_info *pbi, rtx exp) |
402209ff JH |
2610 | { |
2611 | rtx temp = pbi->mem_set_list; | |
2612 | rtx prev = NULL_RTX; | |
2613 | rtx next; | |
46fac664 | 2614 | |
402209ff | 2615 | while (temp) |
46fac664 | 2616 | { |
402209ff | 2617 | next = XEXP (temp, 1); |
797e15eb HPN |
2618 | if ((REG_P (exp) && reg_overlap_mentioned_p (exp, XEXP (temp, 0))) |
2619 | /* When we get an EXP that is a mem here, we want to check if EXP | |
2620 | overlaps the *address* of any of the mems in the list (i.e. not | |
2621 | whether the mems actually overlap; that's done elsewhere). */ | |
2622 | || (MEM_P (exp) | |
2623 | && reg_overlap_mentioned_p (exp, XEXP (XEXP (temp, 0), 0)))) | |
46fac664 | 2624 | { |
402209ff JH |
2625 | /* Splice this entry out of the list. */ |
2626 | if (prev) | |
2627 | XEXP (prev, 1) = next; | |
2628 | else | |
2629 | pbi->mem_set_list = next; | |
2630 | free_EXPR_LIST_node (temp); | |
2631 | pbi->mem_set_list_len--; | |
46fac664 | 2632 | } |
46fac664 | 2633 | else |
402209ff JH |
2634 | prev = temp; |
2635 | temp = next; | |
46fac664 | 2636 | } |
402209ff | 2637 | } |
46fac664 | 2638 | |
402209ff JH |
2639 | /* Process the registers that are set within X. Their bits are set to |
2640 | 1 in the regset DEAD, because they are dead prior to this insn. | |
b02eea61 | 2641 | |
402209ff | 2642 | If INSN is nonzero, it is the insn being processed. |
46fac664 | 2643 | |
402209ff | 2644 | FLAGS is the set of operations to perform. */ |
b02eea61 | 2645 | |
402209ff | 2646 | static void |
6cf9ac28 | 2647 | mark_set_regs (struct propagate_block_info *pbi, rtx x, rtx insn) |
46fac664 | 2648 | { |
402209ff JH |
2649 | rtx cond = NULL_RTX; |
2650 | rtx link; | |
2651 | enum rtx_code code; | |
df2ef49b | 2652 | int flags = pbi->flags; |
46fac664 | 2653 | |
402209ff JH |
2654 | if (insn) |
2655 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2656 | { | |
2657 | if (REG_NOTE_KIND (link) == REG_INC) | |
2658 | mark_set_1 (pbi, SET, XEXP (link, 0), | |
2659 | (GET_CODE (x) == COND_EXEC | |
2660 | ? COND_EXEC_TEST (x) : NULL_RTX), | |
df2ef49b | 2661 | insn, flags); |
402209ff JH |
2662 | } |
2663 | retry: | |
2664 | switch (code = GET_CODE (x)) | |
46fac664 | 2665 | { |
402209ff | 2666 | case SET: |
df2ef49b AM |
2667 | if (GET_CODE (XEXP (x, 1)) == ASM_OPERANDS) |
2668 | flags |= PROP_ASM_SCAN; | |
ba228239 | 2669 | /* Fall through */ |
402209ff | 2670 | case CLOBBER: |
df2ef49b | 2671 | mark_set_1 (pbi, code, SET_DEST (x), cond, insn, flags); |
402209ff | 2672 | return; |
b02eea61 | 2673 | |
402209ff JH |
2674 | case COND_EXEC: |
2675 | cond = COND_EXEC_TEST (x); | |
2676 | x = COND_EXEC_CODE (x); | |
2677 | goto retry; | |
b02eea61 | 2678 | |
402209ff JH |
2679 | case PARALLEL: |
2680 | { | |
b3694847 SS |
2681 | int i; |
2682 | ||
a06f01ba JW |
2683 | /* We must scan forwards. If we have an asm, we need to set |
2684 | the PROP_ASM_SCAN flag before scanning the clobbers. */ | |
2685 | for (i = 0; i < XVECLEN (x, 0); i++) | |
402209ff JH |
2686 | { |
2687 | rtx sub = XVECEXP (x, 0, i); | |
2688 | switch (code = GET_CODE (sub)) | |
2689 | { | |
2690 | case COND_EXEC: | |
0bccc606 | 2691 | gcc_assert (!cond); |
b02eea61 | 2692 | |
402209ff JH |
2693 | cond = COND_EXEC_TEST (sub); |
2694 | sub = COND_EXEC_CODE (sub); | |
df2ef49b AM |
2695 | if (GET_CODE (sub) == SET) |
2696 | goto mark_set; | |
2697 | if (GET_CODE (sub) == CLOBBER) | |
2698 | goto mark_clob; | |
2699 | break; | |
b02eea61 | 2700 | |
402209ff | 2701 | case SET: |
df2ef49b AM |
2702 | mark_set: |
2703 | if (GET_CODE (XEXP (sub, 1)) == ASM_OPERANDS) | |
2704 | flags |= PROP_ASM_SCAN; | |
ba228239 | 2705 | /* Fall through */ |
402209ff | 2706 | case CLOBBER: |
df2ef49b AM |
2707 | mark_clob: |
2708 | mark_set_1 (pbi, code, SET_DEST (sub), cond, insn, flags); | |
402209ff | 2709 | break; |
b02eea61 | 2710 | |
a06f01ba JW |
2711 | case ASM_OPERANDS: |
2712 | flags |= PROP_ASM_SCAN; | |
2713 | break; | |
2714 | ||
402209ff JH |
2715 | default: |
2716 | break; | |
2717 | } | |
2718 | } | |
2719 | break; | |
2720 | } | |
b02eea61 | 2721 | |
402209ff JH |
2722 | default: |
2723 | break; | |
46fac664 | 2724 | } |
46fac664 JH |
2725 | } |
2726 | ||
402209ff JH |
2727 | /* Process a single set, which appears in INSN. REG (which may not |
2728 | actually be a REG, it may also be a SUBREG, PARALLEL, etc.) is | |
2729 | being set using the CODE (which may be SET, CLOBBER, or COND_EXEC). | |
2730 | If the set is conditional (because it appear in a COND_EXEC), COND | |
2731 | will be the condition. */ | |
7a442791 | 2732 | |
402209ff | 2733 | static void |
6cf9ac28 | 2734 | mark_set_1 (struct propagate_block_info *pbi, enum rtx_code code, rtx reg, rtx cond, rtx insn, int flags) |
336a6399 | 2735 | { |
402209ff JH |
2736 | int regno_first = -1, regno_last = -1; |
2737 | unsigned long not_dead = 0; | |
336a6399 RH |
2738 | int i; |
2739 | ||
402209ff JH |
2740 | /* Modifying just one hardware register of a multi-reg value or just a |
2741 | byte field of a register does not mean the value from before this insn | |
2742 | is now dead. Of course, if it was dead after it's unused now. */ | |
336a6399 | 2743 | |
402209ff | 2744 | switch (GET_CODE (reg)) |
336a6399 | 2745 | { |
402209ff JH |
2746 | case PARALLEL: |
2747 | /* Some targets place small structures in registers for return values of | |
2748 | functions. We have to detect this case specially here to get correct | |
2749 | flow information. */ | |
2750 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) | |
2751 | if (XEXP (XVECEXP (reg, 0, i), 0) != 0) | |
2752 | mark_set_1 (pbi, code, XEXP (XVECEXP (reg, 0, i), 0), cond, insn, | |
2753 | flags); | |
2754 | return; | |
2755 | ||
402209ff | 2756 | case SIGN_EXTRACT: |
46d096a3 SB |
2757 | /* SIGN_EXTRACT cannot be an lvalue. */ |
2758 | gcc_unreachable (); | |
2759 | ||
2760 | case ZERO_EXTRACT: | |
402209ff JH |
2761 | case STRICT_LOW_PART: |
2762 | /* ??? Assumes STRICT_LOW_PART not used on multi-word registers. */ | |
2763 | do | |
2764 | reg = XEXP (reg, 0); | |
2765 | while (GET_CODE (reg) == SUBREG | |
2766 | || GET_CODE (reg) == ZERO_EXTRACT | |
402209ff | 2767 | || GET_CODE (reg) == STRICT_LOW_PART); |
3c0cb5de | 2768 | if (MEM_P (reg)) |
402209ff JH |
2769 | break; |
2770 | not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, REGNO (reg)); | |
2771 | /* Fall through. */ | |
b02eea61 | 2772 | |
402209ff JH |
2773 | case REG: |
2774 | regno_last = regno_first = REGNO (reg); | |
2775 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
66fd46b6 | 2776 | regno_last += hard_regno_nregs[regno_first][GET_MODE (reg)] - 1; |
402209ff | 2777 | break; |
b02eea61 | 2778 | |
402209ff | 2779 | case SUBREG: |
f8cfc6aa | 2780 | if (REG_P (SUBREG_REG (reg))) |
7a442791 | 2781 | { |
402209ff JH |
2782 | enum machine_mode outer_mode = GET_MODE (reg); |
2783 | enum machine_mode inner_mode = GET_MODE (SUBREG_REG (reg)); | |
7a442791 | 2784 | |
402209ff JH |
2785 | /* Identify the range of registers affected. This is moderately |
2786 | tricky for hard registers. See alter_subreg. */ | |
b02eea61 | 2787 | |
402209ff JH |
2788 | regno_last = regno_first = REGNO (SUBREG_REG (reg)); |
2789 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
4793dca1 | 2790 | { |
402209ff JH |
2791 | regno_first += subreg_regno_offset (regno_first, inner_mode, |
2792 | SUBREG_BYTE (reg), | |
2793 | outer_mode); | |
f1f4e530 | 2794 | regno_last = regno_first + subreg_nregs (reg) - 1; |
3e28fe44 | 2795 | |
402209ff JH |
2796 | /* Since we've just adjusted the register number ranges, make |
2797 | sure REG matches. Otherwise some_was_live will be clear | |
2798 | when it shouldn't have been, and we'll create incorrect | |
2799 | REG_UNUSED notes. */ | |
2800 | reg = gen_rtx_REG (outer_mode, regno_first); | |
62828c00 | 2801 | } |
402209ff | 2802 | else |
d3a923ee | 2803 | { |
402209ff JH |
2804 | /* If the number of words in the subreg is less than the number |
2805 | of words in the full register, we have a well-defined partial | |
2806 | set. Otherwise the high bits are undefined. | |
d3a923ee | 2807 | |
402209ff JH |
2808 | This is only really applicable to pseudos, since we just took |
2809 | care of multi-word hard registers. */ | |
2810 | if (((GET_MODE_SIZE (outer_mode) | |
2811 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
2812 | < ((GET_MODE_SIZE (inner_mode) | |
2813 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
2814 | not_dead = (unsigned long) REGNO_REG_SET_P (pbi->reg_live, | |
2815 | regno_first); | |
d3a923ee | 2816 | |
402209ff | 2817 | reg = SUBREG_REG (reg); |
d3a923ee | 2818 | } |
d3a923ee | 2819 | } |
402209ff JH |
2820 | else |
2821 | reg = SUBREG_REG (reg); | |
2822 | break; | |
c586192c | 2823 | |
402209ff JH |
2824 | default: |
2825 | break; | |
c586192c | 2826 | } |
c586192c | 2827 | |
797e15eb HPN |
2828 | /* If this set is a MEM, then it kills any aliased writes and any |
2829 | other MEMs which use it. | |
402209ff | 2830 | If this set is a REG, then it kills any MEMs which use the reg. */ |
5149f070 | 2831 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
e881bb1b | 2832 | { |
797e15eb | 2833 | if (REG_P (reg) || MEM_P (reg)) |
402209ff | 2834 | invalidate_mems_from_set (pbi, reg); |
e881bb1b | 2835 | |
402209ff | 2836 | /* If the memory reference had embedded side effects (autoincrement |
d67fb775 | 2837 | address modes) then we may need to kill some entries on the |
402209ff | 2838 | memory set list. */ |
3c0cb5de | 2839 | if (insn && MEM_P (reg)) |
fe4b3c79 | 2840 | for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi); |
ccbaf064 | 2841 | |
3c0cb5de | 2842 | if (MEM_P (reg) && ! side_effects_p (reg) |
402209ff | 2843 | /* ??? With more effort we could track conditional memory life. */ |
fe4b3c79 | 2844 | && ! cond) |
dd3f0101 | 2845 | add_to_mem_set_list (pbi, canon_rtx (reg)); |
ccbaf064 | 2846 | } |
f2a1bc02 | 2847 | |
f8cfc6aa | 2848 | if (REG_P (reg) |
402209ff JH |
2849 | && ! (regno_first == FRAME_POINTER_REGNUM |
2850 | && (! reload_completed || frame_pointer_needed)) | |
2851 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
2852 | && ! (regno_first == HARD_FRAME_POINTER_REGNUM | |
2853 | && (! reload_completed || frame_pointer_needed)) | |
2854 | #endif | |
2855 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
2856 | && ! (regno_first == ARG_POINTER_REGNUM && fixed_regs[regno_first]) | |
2857 | #endif | |
2858 | ) | |
f2a1bc02 | 2859 | { |
402209ff | 2860 | int some_was_live = 0, some_was_dead = 0; |
f2a1bc02 | 2861 | |
402209ff | 2862 | for (i = regno_first; i <= regno_last; ++i) |
f2a1bc02 | 2863 | { |
402209ff JH |
2864 | int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i); |
2865 | if (pbi->local_set) | |
f2a1bc02 | 2866 | { |
402209ff JH |
2867 | /* Order of the set operation matters here since both |
2868 | sets may be the same. */ | |
2869 | CLEAR_REGNO_REG_SET (pbi->cond_local_set, i); | |
2870 | if (cond != NULL_RTX | |
2871 | && ! REGNO_REG_SET_P (pbi->local_set, i)) | |
2872 | SET_REGNO_REG_SET (pbi->cond_local_set, i); | |
2873 | else | |
2874 | SET_REGNO_REG_SET (pbi->local_set, i); | |
f2a1bc02 | 2875 | } |
7221b4a1 | 2876 | if (code != CLOBBER || needed_regno) |
402209ff | 2877 | SET_REGNO_REG_SET (pbi->new_set, i); |
d3a923ee | 2878 | |
402209ff JH |
2879 | some_was_live |= needed_regno; |
2880 | some_was_dead |= ! needed_regno; | |
f2a1bc02 | 2881 | } |
402209ff JH |
2882 | |
2883 | #ifdef HAVE_conditional_execution | |
2884 | /* Consider conditional death in deciding that the register needs | |
2885 | a death note. */ | |
2886 | if (some_was_live && ! not_dead | |
2887 | /* The stack pointer is never dead. Well, not strictly true, | |
2888 | but it's very difficult to tell from here. Hopefully | |
2889 | combine_stack_adjustments will fix up the most egregious | |
2890 | errors. */ | |
2891 | && regno_first != STACK_POINTER_REGNUM) | |
d3a923ee | 2892 | { |
402209ff JH |
2893 | for (i = regno_first; i <= regno_last; ++i) |
2894 | if (! mark_regno_cond_dead (pbi, i, cond)) | |
2895 | not_dead |= ((unsigned long) 1) << (i - regno_first); | |
d3a923ee | 2896 | } |
402209ff | 2897 | #endif |
6ff71a97 | 2898 | |
402209ff JH |
2899 | /* Additional data to record if this is the final pass. */ |
2900 | if (flags & (PROP_LOG_LINKS | PROP_REG_INFO | |
2901 | | PROP_DEATH_NOTES | PROP_AUTOINC)) | |
f2a1bc02 | 2902 | { |
b3694847 | 2903 | rtx y; |
0b17ab2f | 2904 | int blocknum = pbi->bb->index; |
402209ff JH |
2905 | |
2906 | y = NULL_RTX; | |
2907 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
ca9fef16 | 2908 | { |
402209ff | 2909 | y = pbi->reg_next_use[regno_first]; |
ca9fef16 | 2910 | |
402209ff JH |
2911 | /* The next use is no longer next, since a store intervenes. */ |
2912 | for (i = regno_first; i <= regno_last; ++i) | |
2913 | pbi->reg_next_use[i] = 0; | |
2914 | } | |
6e64a52a | 2915 | |
402209ff | 2916 | if (flags & PROP_REG_INFO) |
46fac664 | 2917 | { |
402209ff JH |
2918 | for (i = regno_first; i <= regno_last; ++i) |
2919 | { | |
2920 | /* Count (weighted) references, stores, etc. This counts a | |
2921 | register twice if it is modified, but that is correct. */ | |
2922 | REG_N_SETS (i) += 1; | |
2923 | REG_N_REFS (i) += 1; | |
2924 | REG_FREQ (i) += REG_FREQ_FROM_BB (pbi->bb); | |
2925 | ||
2926 | /* The insns where a reg is live are normally counted | |
2927 | elsewhere, but we want the count to include the insn | |
2928 | where the reg is set, and the normal counting mechanism | |
2929 | would not count it. */ | |
2930 | REG_LIVE_LENGTH (i) += 1; | |
2931 | } | |
2932 | ||
2933 | /* If this is a hard reg, record this function uses the reg. */ | |
2934 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
6e64a52a | 2935 | { |
402209ff JH |
2936 | for (i = regno_first; i <= regno_last; i++) |
2937 | regs_ever_live[i] = 1; | |
df2ef49b AM |
2938 | if (flags & PROP_ASM_SCAN) |
2939 | for (i = regno_first; i <= regno_last; i++) | |
2940 | regs_asm_clobbered[i] = 1; | |
6e64a52a JH |
2941 | } |
2942 | else | |
6e64a52a | 2943 | { |
402209ff JH |
2944 | /* Keep track of which basic blocks each reg appears in. */ |
2945 | if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN) | |
2946 | REG_BASIC_BLOCK (regno_first) = blocknum; | |
2947 | else if (REG_BASIC_BLOCK (regno_first) != blocknum) | |
2948 | REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL; | |
6e64a52a | 2949 | } |
402209ff | 2950 | } |
f2a1bc02 | 2951 | |
402209ff | 2952 | if (! some_was_dead) |
f2a1bc02 | 2953 | { |
402209ff JH |
2954 | if (flags & PROP_LOG_LINKS) |
2955 | { | |
2956 | /* Make a logical link from the next following insn | |
2957 | that uses this register, back to this insn. | |
2958 | The following insns have already been processed. | |
2959 | ||
2960 | We don't build a LOG_LINK for hard registers containing | |
2961 | in ASM_OPERANDs. If these registers get replaced, | |
2962 | we might wind up changing the semantics of the insn, | |
2963 | even if reload can make what appear to be valid | |
a10016d3 ILT |
2964 | assignments later. |
2965 | ||
2966 | We don't build a LOG_LINK for global registers to | |
2967 | or from a function call. We don't want to let | |
2968 | combine think that it knows what is going on with | |
2969 | global registers. */ | |
402209ff JH |
2970 | if (y && (BLOCK_NUM (y) == blocknum) |
2971 | && (regno_first >= FIRST_PSEUDO_REGISTER | |
a10016d3 | 2972 | || (asm_noperands (PATTERN (y)) < 0 |
4b4bf941 JQ |
2973 | && ! ((CALL_P (insn) |
2974 | || CALL_P (y)) | |
a10016d3 | 2975 | && global_regs[regno_first])))) |
402209ff JH |
2976 | LOG_LINKS (y) = alloc_INSN_LIST (insn, LOG_LINKS (y)); |
2977 | } | |
34487bf8 | 2978 | } |
402209ff JH |
2979 | else if (not_dead) |
2980 | ; | |
2981 | else if (! some_was_live) | |
2982 | { | |
2983 | if (flags & PROP_REG_INFO) | |
2984 | REG_N_DEATHS (regno_first) += 1; | |
34487bf8 | 2985 | |
7d22e898 R |
2986 | if (flags & PROP_DEATH_NOTES |
2987 | #ifdef STACK_REGS | |
2988 | && (!(flags & PROP_POST_REGSTACK) | |
2989 | || !IN_RANGE (REGNO (reg), FIRST_STACK_REG, | |
2990 | LAST_STACK_REG)) | |
2991 | #endif | |
2992 | ) | |
402209ff JH |
2993 | { |
2994 | /* Note that dead stores have already been deleted | |
2995 | when possible. If we get here, we have found a | |
2996 | dead store that cannot be eliminated (because the | |
2997 | same insn does something useful). Indicate this | |
2998 | by marking the reg being set as dying here. */ | |
2999 | REG_NOTES (insn) | |
3000 | = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); | |
3001 | } | |
3002 | } | |
3003 | else | |
34487bf8 | 3004 | { |
7d22e898 R |
3005 | if (flags & PROP_DEATH_NOTES |
3006 | #ifdef STACK_REGS | |
3007 | && (!(flags & PROP_POST_REGSTACK) | |
3008 | || !IN_RANGE (REGNO (reg), FIRST_STACK_REG, | |
3009 | LAST_STACK_REG)) | |
3010 | #endif | |
3011 | ) | |
402209ff JH |
3012 | { |
3013 | /* This is a case where we have a multi-word hard register | |
3014 | and some, but not all, of the words of the register are | |
3015 | needed in subsequent insns. Write REG_UNUSED notes | |
3016 | for those parts that were not needed. This case should | |
3017 | be rare. */ | |
3018 | ||
3019 | for (i = regno_first; i <= regno_last; ++i) | |
3020 | if (! REGNO_REG_SET_P (pbi->reg_live, i)) | |
3021 | REG_NOTES (insn) | |
3022 | = alloc_EXPR_LIST (REG_UNUSED, | |
e50126e8 | 3023 | regno_reg_rtx[i], |
402209ff JH |
3024 | REG_NOTES (insn)); |
3025 | } | |
34487bf8 | 3026 | } |
34487bf8 | 3027 | } |
402209ff JH |
3028 | |
3029 | /* Mark the register as being dead. */ | |
3030 | if (some_was_live | |
3031 | /* The stack pointer is never dead. Well, not strictly true, | |
3032 | but it's very difficult to tell from here. Hopefully | |
3033 | combine_stack_adjustments will fix up the most egregious | |
3034 | errors. */ | |
3035 | && regno_first != STACK_POINTER_REGNUM) | |
34487bf8 | 3036 | { |
402209ff JH |
3037 | for (i = regno_first; i <= regno_last; ++i) |
3038 | if (!(not_dead & (((unsigned long) 1) << (i - regno_first)))) | |
736b64dd JH |
3039 | { |
3040 | if ((pbi->flags & PROP_REG_INFO) | |
3041 | && REGNO_REG_SET_P (pbi->reg_live, i)) | |
3042 | { | |
3043 | REG_LIVE_LENGTH (i) += pbi->insn_num - reg_deaths[i]; | |
3044 | reg_deaths[i] = 0; | |
3045 | } | |
3046 | CLEAR_REGNO_REG_SET (pbi->reg_live, i); | |
3047 | } | |
86d9571b R |
3048 | if (flags & PROP_DEAD_INSN) |
3049 | emit_insn_after (gen_rtx_CLOBBER (VOIDmode, reg), insn); | |
34487bf8 | 3050 | } |
402209ff | 3051 | } |
f8cfc6aa | 3052 | else if (REG_P (reg)) |
402209ff JH |
3053 | { |
3054 | if (flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
3055 | pbi->reg_next_use[regno_first] = 0; | |
df2ef49b AM |
3056 | |
3057 | if ((flags & PROP_REG_INFO) != 0 | |
3058 | && (flags & PROP_ASM_SCAN) != 0 | |
3059 | && regno_first < FIRST_PSEUDO_REGISTER) | |
3060 | { | |
3061 | for (i = regno_first; i <= regno_last; i++) | |
3062 | regs_asm_clobbered[i] = 1; | |
3063 | } | |
402209ff JH |
3064 | } |
3065 | ||
3066 | /* If this is the last pass and this is a SCRATCH, show it will be dying | |
3067 | here and count it. */ | |
3068 | else if (GET_CODE (reg) == SCRATCH) | |
3069 | { | |
7d22e898 R |
3070 | if (flags & PROP_DEATH_NOTES |
3071 | #ifdef STACK_REGS | |
3072 | && (!(flags & PROP_POST_REGSTACK) | |
3073 | || !IN_RANGE (REGNO (reg), FIRST_STACK_REG, LAST_STACK_REG)) | |
3074 | #endif | |
3075 | ) | |
402209ff JH |
3076 | REG_NOTES (insn) |
3077 | = alloc_EXPR_LIST (REG_UNUSED, reg, REG_NOTES (insn)); | |
3078 | } | |
3079 | } | |
3080 | \f | |
3081 | #ifdef HAVE_conditional_execution | |
3082 | /* Mark REGNO conditionally dead. | |
3083 | Return true if the register is now unconditionally dead. */ | |
3084 | ||
3085 | static int | |
6cf9ac28 | 3086 | mark_regno_cond_dead (struct propagate_block_info *pbi, int regno, rtx cond) |
402209ff JH |
3087 | { |
3088 | /* If this is a store to a predicate register, the value of the | |
3089 | predicate is changing, we don't know that the predicate as seen | |
3090 | before is the same as that seen after. Flush all dependent | |
3091 | conditions from reg_cond_dead. This will make all such | |
3092 | conditionally live registers unconditionally live. */ | |
3093 | if (REGNO_REG_SET_P (pbi->reg_cond_reg, regno)) | |
3094 | flush_reg_cond_reg (pbi, regno); | |
3095 | ||
3096 | /* If this is an unconditional store, remove any conditional | |
3097 | life that may have existed. */ | |
3098 | if (cond == NULL_RTX) | |
3099 | splay_tree_remove (pbi->reg_cond_dead, regno); | |
3100 | else | |
3101 | { | |
3102 | splay_tree_node node; | |
3103 | struct reg_cond_life_info *rcli; | |
3104 | rtx ncond; | |
3105 | ||
3106 | /* Otherwise this is a conditional set. Record that fact. | |
3107 | It may have been conditionally used, or there may be a | |
647eea9d | 3108 | subsequent set with a complementary condition. */ |
34487bf8 | 3109 | |
402209ff JH |
3110 | node = splay_tree_lookup (pbi->reg_cond_dead, regno); |
3111 | if (node == NULL) | |
34487bf8 | 3112 | { |
402209ff JH |
3113 | /* The register was unconditionally live previously. |
3114 | Record the current condition as the condition under | |
3115 | which it is dead. */ | |
5ed6ace5 | 3116 | rcli = XNEW (struct reg_cond_life_info); |
402209ff JH |
3117 | rcli->condition = cond; |
3118 | rcli->stores = cond; | |
3119 | rcli->orig_condition = const0_rtx; | |
3120 | splay_tree_insert (pbi->reg_cond_dead, regno, | |
3121 | (splay_tree_value) rcli); | |
3122 | ||
3123 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); | |
3124 | ||
d6a7951f | 3125 | /* Not unconditionally dead. */ |
402209ff | 3126 | return 0; |
34487bf8 RH |
3127 | } |
3128 | else | |
3129 | { | |
402209ff JH |
3130 | /* The register was conditionally live previously. |
3131 | Add the new condition to the old. */ | |
3132 | rcli = (struct reg_cond_life_info *) node->value; | |
3133 | ncond = rcli->condition; | |
3134 | ncond = ior_reg_cond (ncond, cond, 1); | |
3135 | if (rcli->stores == const0_rtx) | |
3136 | rcli->stores = cond; | |
3137 | else if (rcli->stores != const1_rtx) | |
3138 | rcli->stores = ior_reg_cond (rcli->stores, cond, 1); | |
34487bf8 | 3139 | |
402209ff JH |
3140 | /* If the register is now unconditionally dead, remove the entry |
3141 | in the splay_tree. A register is unconditionally dead if the | |
3142 | dead condition ncond is true. A register is also unconditionally | |
3143 | dead if the sum of all conditional stores is an unconditional | |
3144 | store (stores is true), and the dead condition is identically the | |
3145 | same as the original dead condition initialized at the end of | |
3146 | the block. This is a pointer compare, not an rtx_equal_p | |
3147 | compare. */ | |
3148 | if (ncond == const1_rtx | |
3149 | || (ncond == rcli->orig_condition && rcli->stores == const1_rtx)) | |
3150 | splay_tree_remove (pbi->reg_cond_dead, regno); | |
3151 | else | |
3152 | { | |
3153 | rcli->condition = ncond; | |
34487bf8 | 3154 | |
402209ff | 3155 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); |
34487bf8 | 3156 | |
d6a7951f | 3157 | /* Not unconditionally dead. */ |
402209ff | 3158 | return 0; |
34487bf8 RH |
3159 | } |
3160 | } | |
3161 | } | |
3162 | ||
402209ff JH |
3163 | return 1; |
3164 | } | |
bce7bfe8 | 3165 | |
402209ff | 3166 | /* Called from splay_tree_delete for pbi->reg_cond_life. */ |
b9f22704 | 3167 | |
402209ff | 3168 | static void |
6cf9ac28 | 3169 | free_reg_cond_life_info (splay_tree_value value) |
402209ff JH |
3170 | { |
3171 | struct reg_cond_life_info *rcli = (struct reg_cond_life_info *) value; | |
3172 | free (rcli); | |
3173 | } | |
18ca529b | 3174 | |
402209ff | 3175 | /* Helper function for flush_reg_cond_reg. */ |
34487bf8 | 3176 | |
402209ff | 3177 | static int |
6cf9ac28 | 3178 | flush_reg_cond_reg_1 (splay_tree_node node, void *data) |
402209ff JH |
3179 | { |
3180 | struct reg_cond_life_info *rcli; | |
3181 | int *xdata = (int *) data; | |
3182 | unsigned int regno = xdata[0]; | |
34487bf8 | 3183 | |
402209ff JH |
3184 | /* Don't need to search if last flushed value was farther on in |
3185 | the in-order traversal. */ | |
3186 | if (xdata[1] >= (int) node->key) | |
3187 | return 0; | |
34487bf8 | 3188 | |
402209ff JH |
3189 | /* Splice out portions of the expression that refer to regno. */ |
3190 | rcli = (struct reg_cond_life_info *) node->value; | |
3191 | rcli->condition = elim_reg_cond (rcli->condition, regno); | |
3192 | if (rcli->stores != const0_rtx && rcli->stores != const1_rtx) | |
3193 | rcli->stores = elim_reg_cond (rcli->stores, regno); | |
0edd203b | 3194 | |
402209ff JH |
3195 | /* If the entire condition is now false, signal the node to be removed. */ |
3196 | if (rcli->condition == const0_rtx) | |
3197 | { | |
3198 | xdata[1] = node->key; | |
3199 | return -1; | |
34487bf8 | 3200 | } |
0bccc606 NS |
3201 | else |
3202 | gcc_assert (rcli->condition != const1_rtx); | |
d3a923ee | 3203 | |
402209ff | 3204 | return 0; |
34487bf8 | 3205 | } |
410538ea | 3206 | |
402209ff | 3207 | /* Flush all (sub) expressions referring to REGNO from REG_COND_LIVE. */ |
410538ea | 3208 | |
402209ff | 3209 | static void |
6cf9ac28 | 3210 | flush_reg_cond_reg (struct propagate_block_info *pbi, int regno) |
402209ff JH |
3211 | { |
3212 | int pair[2]; | |
410538ea | 3213 | |
402209ff JH |
3214 | pair[0] = regno; |
3215 | pair[1] = -1; | |
3216 | while (splay_tree_foreach (pbi->reg_cond_dead, | |
3217 | flush_reg_cond_reg_1, pair) == -1) | |
3218 | splay_tree_remove (pbi->reg_cond_dead, pair[1]); | |
410538ea | 3219 | |
402209ff JH |
3220 | CLEAR_REGNO_REG_SET (pbi->reg_cond_reg, regno); |
3221 | } | |
410538ea | 3222 | |
402209ff JH |
3223 | /* Logical arithmetic on predicate conditions. IOR, NOT and AND. |
3224 | For ior/and, the ADD flag determines whether we want to add the new | |
3225 | condition X to the old one unconditionally. If it is zero, we will | |
3226 | only return a new expression if X allows us to simplify part of | |
b318748f | 3227 | OLD, otherwise we return NULL to the caller. |
402209ff JH |
3228 | If ADD is nonzero, we will return a new condition in all cases. The |
3229 | toplevel caller of one of these functions should always pass 1 for | |
3230 | ADD. */ | |
410538ea | 3231 | |
402209ff | 3232 | static rtx |
6cf9ac28 | 3233 | ior_reg_cond (rtx old, rtx x, int add) |
402209ff JH |
3234 | { |
3235 | rtx op0, op1; | |
410538ea | 3236 | |
ec8e098d | 3237 | if (COMPARISON_P (old)) |
410538ea | 3238 | { |
33e6a97a | 3239 | if (COMPARISON_P (x) |
15dce812 | 3240 | && REVERSE_CONDEXEC_PREDICATES_P (x, old) |
402209ff JH |
3241 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) |
3242 | return const1_rtx; | |
3243 | if (GET_CODE (x) == GET_CODE (old) | |
3244 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
3245 | return old; | |
3246 | if (! add) | |
b318748f | 3247 | return NULL; |
402209ff | 3248 | return gen_rtx_IOR (0, old, x); |
410538ea | 3249 | } |
c9bacfdb | 3250 | |
402209ff | 3251 | switch (GET_CODE (old)) |
410538ea | 3252 | { |
402209ff JH |
3253 | case IOR: |
3254 | op0 = ior_reg_cond (XEXP (old, 0), x, 0); | |
3255 | op1 = ior_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3256 | if (op0 != NULL || op1 != NULL) |
402209ff JH |
3257 | { |
3258 | if (op0 == const0_rtx) | |
b318748f | 3259 | return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x); |
402209ff | 3260 | if (op1 == const0_rtx) |
b318748f | 3261 | return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x); |
402209ff JH |
3262 | if (op0 == const1_rtx || op1 == const1_rtx) |
3263 | return const1_rtx; | |
b318748f JJ |
3264 | if (op0 == NULL) |
3265 | op0 = gen_rtx_IOR (0, XEXP (old, 0), x); | |
3266 | else if (rtx_equal_p (x, op0)) | |
3267 | /* (x | A) | x ~ (x | A). */ | |
3268 | return old; | |
3269 | if (op1 == NULL) | |
3270 | op1 = gen_rtx_IOR (0, XEXP (old, 1), x); | |
3271 | else if (rtx_equal_p (x, op1)) | |
3272 | /* (A | x) | x ~ (A | x). */ | |
3273 | return old; | |
402209ff JH |
3274 | return gen_rtx_IOR (0, op0, op1); |
3275 | } | |
3276 | if (! add) | |
b318748f | 3277 | return NULL; |
402209ff | 3278 | return gen_rtx_IOR (0, old, x); |
410538ea | 3279 | |
402209ff JH |
3280 | case AND: |
3281 | op0 = ior_reg_cond (XEXP (old, 0), x, 0); | |
3282 | op1 = ior_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3283 | if (op0 != NULL || op1 != NULL) |
410538ea | 3284 | { |
402209ff | 3285 | if (op0 == const1_rtx) |
b318748f | 3286 | return op1 ? op1 : gen_rtx_IOR (0, XEXP (old, 1), x); |
402209ff | 3287 | if (op1 == const1_rtx) |
b318748f | 3288 | return op0 ? op0 : gen_rtx_IOR (0, XEXP (old, 0), x); |
402209ff JH |
3289 | if (op0 == const0_rtx || op1 == const0_rtx) |
3290 | return const0_rtx; | |
b318748f JJ |
3291 | if (op0 == NULL) |
3292 | op0 = gen_rtx_IOR (0, XEXP (old, 0), x); | |
3293 | else if (rtx_equal_p (x, op0)) | |
3294 | /* (x & A) | x ~ x. */ | |
3295 | return op0; | |
3296 | if (op1 == NULL) | |
3297 | op1 = gen_rtx_IOR (0, XEXP (old, 1), x); | |
3298 | else if (rtx_equal_p (x, op1)) | |
3299 | /* (A & x) | x ~ x. */ | |
3300 | return op1; | |
402209ff | 3301 | return gen_rtx_AND (0, op0, op1); |
410538ea | 3302 | } |
402209ff | 3303 | if (! add) |
b318748f | 3304 | return NULL; |
402209ff | 3305 | return gen_rtx_IOR (0, old, x); |
410538ea | 3306 | |
402209ff JH |
3307 | case NOT: |
3308 | op0 = and_reg_cond (XEXP (old, 0), not_reg_cond (x), 0); | |
b318748f | 3309 | if (op0 != NULL) |
402209ff JH |
3310 | return not_reg_cond (op0); |
3311 | if (! add) | |
b318748f | 3312 | return NULL; |
402209ff | 3313 | return gen_rtx_IOR (0, old, x); |
c9bacfdb | 3314 | |
402209ff | 3315 | default: |
0bccc606 | 3316 | gcc_unreachable (); |
410538ea AM |
3317 | } |
3318 | } | |
3319 | ||
402209ff | 3320 | static rtx |
6cf9ac28 | 3321 | not_reg_cond (rtx x) |
410538ea | 3322 | { |
402209ff JH |
3323 | if (x == const0_rtx) |
3324 | return const1_rtx; | |
3325 | else if (x == const1_rtx) | |
3326 | return const0_rtx; | |
15dce812 | 3327 | if (GET_CODE (x) == NOT) |
402209ff | 3328 | return XEXP (x, 0); |
ec8e098d | 3329 | if (COMPARISON_P (x) |
f8cfc6aa | 3330 | && REG_P (XEXP (x, 0))) |
410538ea | 3331 | { |
0bccc606 | 3332 | gcc_assert (XEXP (x, 1) == const0_rtx); |
410538ea | 3333 | |
15dce812 | 3334 | return gen_rtx_fmt_ee (reversed_comparison_code (x, NULL), |
402209ff | 3335 | VOIDmode, XEXP (x, 0), const0_rtx); |
410538ea | 3336 | } |
402209ff | 3337 | return gen_rtx_NOT (0, x); |
410538ea AM |
3338 | } |
3339 | ||
402209ff | 3340 | static rtx |
6cf9ac28 | 3341 | and_reg_cond (rtx old, rtx x, int add) |
410538ea | 3342 | { |
402209ff | 3343 | rtx op0, op1; |
410538ea | 3344 | |
ec8e098d | 3345 | if (COMPARISON_P (old)) |
410538ea | 3346 | { |
33e6a97a | 3347 | if (COMPARISON_P (x) |
15dce812 | 3348 | && GET_CODE (x) == reversed_comparison_code (old, NULL) |
402209ff JH |
3349 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) |
3350 | return const0_rtx; | |
3351 | if (GET_CODE (x) == GET_CODE (old) | |
3352 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0))) | |
3353 | return old; | |
3354 | if (! add) | |
b318748f | 3355 | return NULL; |
402209ff JH |
3356 | return gen_rtx_AND (0, old, x); |
3357 | } | |
410538ea | 3358 | |
402209ff JH |
3359 | switch (GET_CODE (old)) |
3360 | { | |
3361 | case IOR: | |
3362 | op0 = and_reg_cond (XEXP (old, 0), x, 0); | |
3363 | op1 = and_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3364 | if (op0 != NULL || op1 != NULL) |
410538ea | 3365 | { |
402209ff | 3366 | if (op0 == const0_rtx) |
b318748f | 3367 | return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x); |
402209ff | 3368 | if (op1 == const0_rtx) |
b318748f | 3369 | return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x); |
402209ff JH |
3370 | if (op0 == const1_rtx || op1 == const1_rtx) |
3371 | return const1_rtx; | |
b318748f JJ |
3372 | if (op0 == NULL) |
3373 | op0 = gen_rtx_AND (0, XEXP (old, 0), x); | |
3374 | else if (rtx_equal_p (x, op0)) | |
3375 | /* (x | A) & x ~ x. */ | |
3376 | return op0; | |
3377 | if (op1 == NULL) | |
3378 | op1 = gen_rtx_AND (0, XEXP (old, 1), x); | |
3379 | else if (rtx_equal_p (x, op1)) | |
3380 | /* (A | x) & x ~ x. */ | |
3381 | return op1; | |
402209ff | 3382 | return gen_rtx_IOR (0, op0, op1); |
410538ea | 3383 | } |
402209ff | 3384 | if (! add) |
b318748f | 3385 | return NULL; |
402209ff JH |
3386 | return gen_rtx_AND (0, old, x); |
3387 | ||
3388 | case AND: | |
3389 | op0 = and_reg_cond (XEXP (old, 0), x, 0); | |
3390 | op1 = and_reg_cond (XEXP (old, 1), x, 0); | |
b318748f | 3391 | if (op0 != NULL || op1 != NULL) |
410538ea | 3392 | { |
402209ff | 3393 | if (op0 == const1_rtx) |
b318748f | 3394 | return op1 ? op1 : gen_rtx_AND (0, XEXP (old, 1), x); |
402209ff | 3395 | if (op1 == const1_rtx) |
b318748f | 3396 | return op0 ? op0 : gen_rtx_AND (0, XEXP (old, 0), x); |
402209ff JH |
3397 | if (op0 == const0_rtx || op1 == const0_rtx) |
3398 | return const0_rtx; | |
b318748f JJ |
3399 | if (op0 == NULL) |
3400 | op0 = gen_rtx_AND (0, XEXP (old, 0), x); | |
3401 | else if (rtx_equal_p (x, op0)) | |
3402 | /* (x & A) & x ~ (x & A). */ | |
3403 | return old; | |
3404 | if (op1 == NULL) | |
3405 | op1 = gen_rtx_AND (0, XEXP (old, 1), x); | |
3406 | else if (rtx_equal_p (x, op1)) | |
3407 | /* (A & x) & x ~ (A & x). */ | |
3408 | return old; | |
402209ff | 3409 | return gen_rtx_AND (0, op0, op1); |
410538ea | 3410 | } |
402209ff | 3411 | if (! add) |
b318748f | 3412 | return NULL; |
402209ff | 3413 | return gen_rtx_AND (0, old, x); |
410538ea | 3414 | |
402209ff JH |
3415 | case NOT: |
3416 | op0 = ior_reg_cond (XEXP (old, 0), not_reg_cond (x), 0); | |
b318748f | 3417 | if (op0 != NULL) |
402209ff JH |
3418 | return not_reg_cond (op0); |
3419 | if (! add) | |
b318748f | 3420 | return NULL; |
402209ff | 3421 | return gen_rtx_AND (0, old, x); |
410538ea | 3422 | |
402209ff | 3423 | default: |
0bccc606 | 3424 | gcc_unreachable (); |
c9bacfdb | 3425 | } |
410538ea AM |
3426 | } |
3427 | ||
402209ff JH |
3428 | /* Given a condition X, remove references to reg REGNO and return the |
3429 | new condition. The removal will be done so that all conditions | |
3430 | involving REGNO are considered to evaluate to false. This function | |
3431 | is used when the value of REGNO changes. */ | |
c9bacfdb | 3432 | |
402209ff | 3433 | static rtx |
6cf9ac28 | 3434 | elim_reg_cond (rtx x, unsigned int regno) |
410538ea | 3435 | { |
402209ff JH |
3436 | rtx op0, op1; |
3437 | ||
ec8e098d | 3438 | if (COMPARISON_P (x)) |
410538ea | 3439 | { |
402209ff JH |
3440 | if (REGNO (XEXP (x, 0)) == regno) |
3441 | return const0_rtx; | |
3442 | return x; | |
410538ea | 3443 | } |
c9bacfdb | 3444 | |
402209ff JH |
3445 | switch (GET_CODE (x)) |
3446 | { | |
3447 | case AND: | |
3448 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3449 | op1 = elim_reg_cond (XEXP (x, 1), regno); | |
3450 | if (op0 == const0_rtx || op1 == const0_rtx) | |
3451 | return const0_rtx; | |
3452 | if (op0 == const1_rtx) | |
3453 | return op1; | |
3454 | if (op1 == const1_rtx) | |
3455 | return op0; | |
3456 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) | |
3457 | return x; | |
3458 | return gen_rtx_AND (0, op0, op1); | |
87fdf7ff | 3459 | |
402209ff JH |
3460 | case IOR: |
3461 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3462 | op1 = elim_reg_cond (XEXP (x, 1), regno); | |
3463 | if (op0 == const1_rtx || op1 == const1_rtx) | |
3464 | return const1_rtx; | |
3465 | if (op0 == const0_rtx) | |
3466 | return op1; | |
3467 | if (op1 == const0_rtx) | |
3468 | return op0; | |
3469 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) | |
3470 | return x; | |
3471 | return gen_rtx_IOR (0, op0, op1); | |
87fdf7ff | 3472 | |
402209ff JH |
3473 | case NOT: |
3474 | op0 = elim_reg_cond (XEXP (x, 0), regno); | |
3475 | if (op0 == const0_rtx) | |
3476 | return const1_rtx; | |
3477 | if (op0 == const1_rtx) | |
3478 | return const0_rtx; | |
3479 | if (op0 != XEXP (x, 0)) | |
3480 | return not_reg_cond (op0); | |
3481 | return x; | |
87fdf7ff | 3482 | |
402209ff | 3483 | default: |
0bccc606 | 3484 | gcc_unreachable (); |
402209ff | 3485 | } |
87fdf7ff | 3486 | } |
402209ff JH |
3487 | #endif /* HAVE_conditional_execution */ |
3488 | \f | |
3489 | #ifdef AUTO_INC_DEC | |
87fdf7ff | 3490 | |
402209ff JH |
3491 | /* Try to substitute the auto-inc expression INC as the address inside |
3492 | MEM which occurs in INSN. Currently, the address of MEM is an expression | |
3493 | involving INCR_REG, and INCR is the next use of INCR_REG; it is an insn | |
3494 | that has a single set whose source is a PLUS of INCR_REG and something | |
3495 | else. */ | |
c9bacfdb | 3496 | |
87fdf7ff | 3497 | static void |
6cf9ac28 AJ |
3498 | attempt_auto_inc (struct propagate_block_info *pbi, rtx inc, rtx insn, |
3499 | rtx mem, rtx incr, rtx incr_reg) | |
87fdf7ff | 3500 | { |
402209ff JH |
3501 | int regno = REGNO (incr_reg); |
3502 | rtx set = single_set (incr); | |
3503 | rtx q = SET_DEST (set); | |
3504 | rtx y = SET_SRC (set); | |
3505 | int opnum = XEXP (y, 0) == incr_reg ? 0 : 1; | |
0bccc606 | 3506 | int changed; |
c9bacfdb | 3507 | |
402209ff JH |
3508 | /* Make sure this reg appears only once in this insn. */ |
3509 | if (count_occurrences (PATTERN (insn), incr_reg, 1) != 1) | |
3510 | return; | |
87fdf7ff | 3511 | |
402209ff JH |
3512 | if (dead_or_set_p (incr, incr_reg) |
3513 | /* Mustn't autoinc an eliminable register. */ | |
3514 | && (regno >= FIRST_PSEUDO_REGISTER | |
3515 | || ! TEST_HARD_REG_BIT (elim_reg_set, regno))) | |
3516 | { | |
3517 | /* This is the simple case. Try to make the auto-inc. If | |
3518 | we can't, we are done. Otherwise, we will do any | |
3519 | needed updates below. */ | |
3520 | if (! validate_change (insn, &XEXP (mem, 0), inc, 0)) | |
3521 | return; | |
3522 | } | |
f8cfc6aa | 3523 | else if (REG_P (q) |
402209ff JH |
3524 | /* PREV_INSN used here to check the semi-open interval |
3525 | [insn,incr). */ | |
3526 | && ! reg_used_between_p (q, PREV_INSN (insn), incr) | |
3527 | /* We must also check for sets of q as q may be | |
3528 | a call clobbered hard register and there may | |
3529 | be a call between PREV_INSN (insn) and incr. */ | |
3530 | && ! reg_set_between_p (q, PREV_INSN (insn), incr)) | |
3531 | { | |
3532 | /* We have *p followed sometime later by q = p+size. | |
3533 | Both p and q must be live afterward, | |
3534 | and q is not used between INSN and its assignment. | |
3535 | Change it to q = p, ...*q..., q = q+size. | |
3536 | Then fall into the usual case. */ | |
3537 | rtx insns, temp; | |
d3a923ee | 3538 | |
402209ff JH |
3539 | start_sequence (); |
3540 | emit_move_insn (q, incr_reg); | |
3541 | insns = get_insns (); | |
3542 | end_sequence (); | |
87fdf7ff | 3543 | |
402209ff JH |
3544 | /* If we can't make the auto-inc, or can't make the |
3545 | replacement into Y, exit. There's no point in making | |
3546 | the change below if we can't do the auto-inc and doing | |
3547 | so is not correct in the pre-inc case. */ | |
87fdf7ff | 3548 | |
402209ff JH |
3549 | XEXP (inc, 0) = q; |
3550 | validate_change (insn, &XEXP (mem, 0), inc, 1); | |
3551 | validate_change (incr, &XEXP (y, opnum), q, 1); | |
3552 | if (! apply_change_group ()) | |
3553 | return; | |
f008a564 | 3554 | |
402209ff JH |
3555 | /* We now know we'll be doing this change, so emit the |
3556 | new insn(s) and do the updates. */ | |
2f937369 | 3557 | emit_insn_before (insns, insn); |
f008a564 | 3558 | |
a813c111 SB |
3559 | if (BB_HEAD (pbi->bb) == insn) |
3560 | BB_HEAD (pbi->bb) = insns; | |
b53978a3 | 3561 | |
402209ff JH |
3562 | /* INCR will become a NOTE and INSN won't contain a |
3563 | use of INCR_REG. If a use of INCR_REG was just placed in | |
3564 | the insn before INSN, make that the next use. | |
3565 | Otherwise, invalidate it. */ | |
4b4bf941 | 3566 | if (NONJUMP_INSN_P (PREV_INSN (insn)) |
402209ff JH |
3567 | && GET_CODE (PATTERN (PREV_INSN (insn))) == SET |
3568 | && SET_SRC (PATTERN (PREV_INSN (insn))) == incr_reg) | |
3569 | pbi->reg_next_use[regno] = PREV_INSN (insn); | |
3570 | else | |
3571 | pbi->reg_next_use[regno] = 0; | |
c9bacfdb | 3572 | |
402209ff JH |
3573 | incr_reg = q; |
3574 | regno = REGNO (q); | |
b53978a3 | 3575 | |
298c28a8 JH |
3576 | if ((pbi->flags & PROP_REG_INFO) |
3577 | && !REGNO_REG_SET_P (pbi->reg_live, regno)) | |
3578 | reg_deaths[regno] = pbi->insn_num; | |
3579 | ||
402209ff JH |
3580 | /* REGNO is now used in INCR which is below INSN, but |
3581 | it previously wasn't live here. If we don't mark | |
3582 | it as live, we'll put a REG_DEAD note for it | |
3583 | on this insn, which is incorrect. */ | |
3584 | SET_REGNO_REG_SET (pbi->reg_live, regno); | |
b53978a3 | 3585 | |
402209ff JH |
3586 | /* If there are any calls between INSN and INCR, show |
3587 | that REGNO now crosses them. */ | |
3588 | for (temp = insn; temp != incr; temp = NEXT_INSN (temp)) | |
4b4bf941 | 3589 | if (CALL_P (temp)) |
27004606 JJ |
3590 | { |
3591 | REG_N_CALLS_CROSSED (regno)++; | |
3592 | if (can_throw_internal (temp)) | |
3593 | REG_N_THROWING_CALLS_CROSSED (regno)++; | |
3594 | } | |
c9bacfdb | 3595 | |
402209ff JH |
3596 | /* Invalidate alias info for Q since we just changed its value. */ |
3597 | clear_reg_alias_info (q); | |
b53978a3 | 3598 | } |
402209ff JH |
3599 | else |
3600 | return; | |
b53978a3 | 3601 | |
402209ff JH |
3602 | /* If we haven't returned, it means we were able to make the |
3603 | auto-inc, so update the status. First, record that this insn | |
3604 | has an implicit side effect. */ | |
f008a564 | 3605 | |
402209ff | 3606 | REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, incr_reg, REG_NOTES (insn)); |
f008a564 | 3607 | |
402209ff JH |
3608 | /* Modify the old increment-insn to simply copy |
3609 | the already-incremented value of our register. */ | |
0bccc606 NS |
3610 | changed = validate_change (incr, &SET_SRC (set), incr_reg, 0); |
3611 | gcc_assert (changed); | |
ca9fef16 | 3612 | |
402209ff JH |
3613 | /* If that makes it a no-op (copying the register into itself) delete |
3614 | it so it won't appear to be a "use" and a "set" of this | |
3615 | register. */ | |
3616 | if (REGNO (SET_DEST (set)) == REGNO (incr_reg)) | |
ca9fef16 | 3617 | { |
402209ff JH |
3618 | /* If the original source was dead, it's dead now. */ |
3619 | rtx note; | |
ca9fef16 | 3620 | |
402209ff JH |
3621 | while ((note = find_reg_note (incr, REG_DEAD, NULL_RTX)) != NULL_RTX) |
3622 | { | |
3623 | remove_note (incr, note); | |
3624 | if (XEXP (note, 0) != incr_reg) | |
298c28a8 JH |
3625 | { |
3626 | unsigned int regno = REGNO (XEXP (note, 0)); | |
3627 | ||
3628 | if ((pbi->flags & PROP_REG_INFO) | |
3629 | && REGNO_REG_SET_P (pbi->reg_live, regno)) | |
3630 | { | |
3631 | REG_LIVE_LENGTH (regno) += pbi->insn_num - reg_deaths[regno]; | |
3632 | reg_deaths[regno] = 0; | |
3633 | } | |
3634 | CLEAR_REGNO_REG_SET (pbi->reg_live, REGNO (XEXP (note, 0))); | |
3635 | } | |
402209ff | 3636 | } |
c9bacfdb | 3637 | |
6773e15f | 3638 | SET_INSN_DELETED (incr); |
402209ff | 3639 | } |
f008a564 | 3640 | |
402209ff JH |
3641 | if (regno >= FIRST_PSEUDO_REGISTER) |
3642 | { | |
3643 | /* Count an extra reference to the reg. When a reg is | |
3644 | incremented, spilling it is worse, so we want to make | |
3645 | that less likely. */ | |
3646 | REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb); | |
f008a564 | 3647 | |
402209ff JH |
3648 | /* Count the increment as a setting of the register, |
3649 | even though it isn't a SET in rtl. */ | |
3650 | REG_N_SETS (regno)++; | |
3651 | } | |
f008a564 | 3652 | } |
402209ff JH |
3653 | |
3654 | /* X is a MEM found in INSN. See if we can convert it into an auto-increment | |
3655 | reference. */ | |
c9bacfdb | 3656 | |
21c7361e | 3657 | static void |
6cf9ac28 | 3658 | find_auto_inc (struct propagate_block_info *pbi, rtx x, rtx insn) |
4dc9341c | 3659 | { |
402209ff JH |
3660 | rtx addr = XEXP (x, 0); |
3661 | HOST_WIDE_INT offset = 0; | |
3662 | rtx set, y, incr, inc_val; | |
3663 | int regno; | |
3664 | int size = GET_MODE_SIZE (GET_MODE (x)); | |
4dc9341c | 3665 | |
4b4bf941 | 3666 | if (JUMP_P (insn)) |
135ebc36 MH |
3667 | return; |
3668 | ||
402209ff JH |
3669 | /* Here we detect use of an index register which might be good for |
3670 | postincrement, postdecrement, preincrement, or predecrement. */ | |
3671 | ||
3672 | if (GET_CODE (addr) == PLUS && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
3673 | offset = INTVAL (XEXP (addr, 1)), addr = XEXP (addr, 0); | |
4dc9341c | 3674 | |
f8cfc6aa | 3675 | if (!REG_P (addr)) |
402209ff | 3676 | return; |
c9bacfdb | 3677 | |
402209ff | 3678 | regno = REGNO (addr); |
135ebc36 | 3679 | |
402209ff JH |
3680 | /* Is the next use an increment that might make auto-increment? */ |
3681 | incr = pbi->reg_next_use[regno]; | |
3682 | if (incr == 0 || BLOCK_NUM (incr) != BLOCK_NUM (insn)) | |
3683 | return; | |
3684 | set = single_set (incr); | |
3685 | if (set == 0 || GET_CODE (set) != SET) | |
3686 | return; | |
3687 | y = SET_SRC (set); | |
4dc9341c | 3688 | |
402209ff | 3689 | if (GET_CODE (y) != PLUS) |
135ebc36 MH |
3690 | return; |
3691 | ||
402209ff JH |
3692 | if (REG_P (XEXP (y, 0)) && REGNO (XEXP (y, 0)) == REGNO (addr)) |
3693 | inc_val = XEXP (y, 1); | |
3694 | else if (REG_P (XEXP (y, 1)) && REGNO (XEXP (y, 1)) == REGNO (addr)) | |
3695 | inc_val = XEXP (y, 0); | |
3696 | else | |
3697 | return; | |
4dc9341c | 3698 | |
402209ff JH |
3699 | if (GET_CODE (inc_val) == CONST_INT) |
3700 | { | |
3701 | if (HAVE_POST_INCREMENT | |
3702 | && (INTVAL (inc_val) == size && offset == 0)) | |
3703 | attempt_auto_inc (pbi, gen_rtx_POST_INC (Pmode, addr), insn, x, | |
3704 | incr, addr); | |
3705 | else if (HAVE_POST_DECREMENT | |
3706 | && (INTVAL (inc_val) == -size && offset == 0)) | |
3707 | attempt_auto_inc (pbi, gen_rtx_POST_DEC (Pmode, addr), insn, x, | |
3708 | incr, addr); | |
3709 | else if (HAVE_PRE_INCREMENT | |
3710 | && (INTVAL (inc_val) == size && offset == size)) | |
3711 | attempt_auto_inc (pbi, gen_rtx_PRE_INC (Pmode, addr), insn, x, | |
3712 | incr, addr); | |
3713 | else if (HAVE_PRE_DECREMENT | |
3714 | && (INTVAL (inc_val) == -size && offset == -size)) | |
3715 | attempt_auto_inc (pbi, gen_rtx_PRE_DEC (Pmode, addr), insn, x, | |
3716 | incr, addr); | |
3717 | else if (HAVE_POST_MODIFY_DISP && offset == 0) | |
3718 | attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr, | |
3719 | gen_rtx_PLUS (Pmode, | |
3720 | addr, | |
3721 | inc_val)), | |
3722 | insn, x, incr, addr); | |
89c4b810 RE |
3723 | else if (HAVE_PRE_MODIFY_DISP && offset == INTVAL (inc_val)) |
3724 | attempt_auto_inc (pbi, gen_rtx_PRE_MODIFY (Pmode, addr, | |
3725 | gen_rtx_PLUS (Pmode, | |
3726 | addr, | |
3727 | inc_val)), | |
3728 | insn, x, incr, addr); | |
402209ff | 3729 | } |
f8cfc6aa | 3730 | else if (REG_P (inc_val) |
402209ff JH |
3731 | && ! reg_set_between_p (inc_val, PREV_INSN (insn), |
3732 | NEXT_INSN (incr))) | |
135ebc36 | 3733 | |
402209ff JH |
3734 | { |
3735 | if (HAVE_POST_MODIFY_REG && offset == 0) | |
3736 | attempt_auto_inc (pbi, gen_rtx_POST_MODIFY (Pmode, addr, | |
3737 | gen_rtx_PLUS (Pmode, | |
3738 | addr, | |
3739 | inc_val)), | |
3740 | insn, x, incr, addr); | |
3741 | } | |
3742 | } | |
c9bacfdb | 3743 | |
402209ff JH |
3744 | #endif /* AUTO_INC_DEC */ |
3745 | \f | |
4dc9341c | 3746 | static void |
6cf9ac28 AJ |
3747 | mark_used_reg (struct propagate_block_info *pbi, rtx reg, |
3748 | rtx cond ATTRIBUTE_UNUSED, rtx insn) | |
4dc9341c | 3749 | { |
402209ff JH |
3750 | unsigned int regno_first, regno_last, i; |
3751 | int some_was_live, some_was_dead, some_not_set; | |
4dc9341c | 3752 | |
402209ff JH |
3753 | regno_last = regno_first = REGNO (reg); |
3754 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
66fd46b6 | 3755 | regno_last += hard_regno_nregs[regno_first][GET_MODE (reg)] - 1; |
4dc9341c | 3756 | |
402209ff JH |
3757 | /* Find out if any of this register is live after this instruction. */ |
3758 | some_was_live = some_was_dead = 0; | |
3759 | for (i = regno_first; i <= regno_last; ++i) | |
4dc9341c | 3760 | { |
402209ff JH |
3761 | int needed_regno = REGNO_REG_SET_P (pbi->reg_live, i); |
3762 | some_was_live |= needed_regno; | |
3763 | some_was_dead |= ! needed_regno; | |
4dc9341c MH |
3764 | } |
3765 | ||
402209ff JH |
3766 | /* Find out if any of the register was set this insn. */ |
3767 | some_not_set = 0; | |
3768 | for (i = regno_first; i <= regno_last; ++i) | |
3769 | some_not_set |= ! REGNO_REG_SET_P (pbi->new_set, i); | |
3770 | ||
3771 | if (pbi->flags & (PROP_LOG_LINKS | PROP_AUTOINC)) | |
c34d5374 | 3772 | { |
402209ff JH |
3773 | /* Record where each reg is used, so when the reg is set we know |
3774 | the next insn that uses it. */ | |
3775 | pbi->reg_next_use[regno_first] = insn; | |
c34d5374 | 3776 | } |
c9bacfdb | 3777 | |
402209ff JH |
3778 | if (pbi->flags & PROP_REG_INFO) |
3779 | { | |
3780 | if (regno_first < FIRST_PSEUDO_REGISTER) | |
3781 | { | |
3782 | /* If this is a register we are going to try to eliminate, | |
3783 | don't mark it live here. If we are successful in | |
3784 | eliminating it, it need not be live unless it is used for | |
3785 | pseudos, in which case it will have been set live when it | |
3786 | was allocated to the pseudos. If the register will not | |
3787 | be eliminated, reload will set it live at that point. | |
4dc9341c | 3788 | |
402209ff JH |
3789 | Otherwise, record that this function uses this register. */ |
3790 | /* ??? The PPC backend tries to "eliminate" on the pic | |
3791 | register to itself. This should be fixed. In the mean | |
3792 | time, hack around it. */ | |
c9bacfdb | 3793 | |
402209ff JH |
3794 | if (! (TEST_HARD_REG_BIT (elim_reg_set, regno_first) |
3795 | && (regno_first == FRAME_POINTER_REGNUM | |
3796 | || regno_first == ARG_POINTER_REGNUM))) | |
3797 | for (i = regno_first; i <= regno_last; ++i) | |
3798 | regs_ever_live[i] = 1; | |
3799 | } | |
3800 | else | |
3801 | { | |
3802 | /* Keep track of which basic block each reg appears in. */ | |
6057c0e6 | 3803 | |
0b17ab2f | 3804 | int blocknum = pbi->bb->index; |
402209ff JH |
3805 | if (REG_BASIC_BLOCK (regno_first) == REG_BLOCK_UNKNOWN) |
3806 | REG_BASIC_BLOCK (regno_first) = blocknum; | |
3807 | else if (REG_BASIC_BLOCK (regno_first) != blocknum) | |
3808 | REG_BASIC_BLOCK (regno_first) = REG_BLOCK_GLOBAL; | |
6057c0e6 | 3809 | |
402209ff JH |
3810 | /* Count (weighted) number of uses of each reg. */ |
3811 | REG_FREQ (regno_first) += REG_FREQ_FROM_BB (pbi->bb); | |
3812 | REG_N_REFS (regno_first)++; | |
3813 | } | |
736b64dd JH |
3814 | for (i = regno_first; i <= regno_last; ++i) |
3815 | if (! REGNO_REG_SET_P (pbi->reg_live, i)) | |
3816 | { | |
0bccc606 | 3817 | gcc_assert (!reg_deaths[i]); |
736b64dd JH |
3818 | reg_deaths[i] = pbi->insn_num; |
3819 | } | |
402209ff | 3820 | } |
6057c0e6 | 3821 | |
402209ff JH |
3822 | /* Record and count the insns in which a reg dies. If it is used in |
3823 | this insn and was dead below the insn then it dies in this insn. | |
3824 | If it was set in this insn, we do not make a REG_DEAD note; | |
3825 | likewise if we already made such a note. */ | |
3826 | if ((pbi->flags & (PROP_DEATH_NOTES | PROP_REG_INFO)) | |
3827 | && some_was_dead | |
3828 | && some_not_set) | |
3829 | { | |
3830 | /* Check for the case where the register dying partially | |
3831 | overlaps the register set by this insn. */ | |
3832 | if (regno_first != regno_last) | |
3833 | for (i = regno_first; i <= regno_last; ++i) | |
3834 | some_was_live |= REGNO_REG_SET_P (pbi->new_set, i); | |
4dc9341c | 3835 | |
402209ff JH |
3836 | /* If none of the words in X is needed, make a REG_DEAD note. |
3837 | Otherwise, we must make partial REG_DEAD notes. */ | |
3838 | if (! some_was_live) | |
3839 | { | |
3840 | if ((pbi->flags & PROP_DEATH_NOTES) | |
7d22e898 R |
3841 | #ifdef STACK_REGS |
3842 | && (!(pbi->flags & PROP_POST_REGSTACK) | |
3843 | || !IN_RANGE (REGNO (reg), FIRST_STACK_REG, LAST_STACK_REG)) | |
3844 | #endif | |
402209ff JH |
3845 | && ! find_regno_note (insn, REG_DEAD, regno_first)) |
3846 | REG_NOTES (insn) | |
3847 | = alloc_EXPR_LIST (REG_DEAD, reg, REG_NOTES (insn)); | |
4dc9341c | 3848 | |
402209ff JH |
3849 | if (pbi->flags & PROP_REG_INFO) |
3850 | REG_N_DEATHS (regno_first)++; | |
3851 | } | |
3852 | else | |
3853 | { | |
3854 | /* Don't make a REG_DEAD note for a part of a register | |
3855 | that is set in the insn. */ | |
3856 | for (i = regno_first; i <= regno_last; ++i) | |
3857 | if (! REGNO_REG_SET_P (pbi->reg_live, i) | |
3858 | && ! dead_or_set_regno_p (insn, i)) | |
3859 | REG_NOTES (insn) | |
3860 | = alloc_EXPR_LIST (REG_DEAD, | |
e50126e8 | 3861 | regno_reg_rtx[i], |
402209ff JH |
3862 | REG_NOTES (insn)); |
3863 | } | |
3864 | } | |
4dc9341c | 3865 | |
402209ff JH |
3866 | /* Mark the register as being live. */ |
3867 | for (i = regno_first; i <= regno_last; ++i) | |
4dc9341c | 3868 | { |
9be40833 RH |
3869 | #ifdef HAVE_conditional_execution |
3870 | int this_was_live = REGNO_REG_SET_P (pbi->reg_live, i); | |
3871 | #endif | |
3872 | ||
402209ff | 3873 | SET_REGNO_REG_SET (pbi->reg_live, i); |
4dc9341c | 3874 | |
402209ff JH |
3875 | #ifdef HAVE_conditional_execution |
3876 | /* If this is a conditional use, record that fact. If it is later | |
3877 | conditionally set, we'll know to kill the register. */ | |
3878 | if (cond != NULL_RTX) | |
4dc9341c | 3879 | { |
402209ff JH |
3880 | splay_tree_node node; |
3881 | struct reg_cond_life_info *rcli; | |
3882 | rtx ncond; | |
3883 | ||
9be40833 | 3884 | if (this_was_live) |
402209ff JH |
3885 | { |
3886 | node = splay_tree_lookup (pbi->reg_cond_dead, i); | |
3887 | if (node == NULL) | |
3888 | { | |
3889 | /* The register was unconditionally live previously. | |
3890 | No need to do anything. */ | |
3891 | } | |
3892 | else | |
3893 | { | |
3894 | /* The register was conditionally live previously. | |
3895 | Subtract the new life cond from the old death cond. */ | |
3896 | rcli = (struct reg_cond_life_info *) node->value; | |
3897 | ncond = rcli->condition; | |
3898 | ncond = and_reg_cond (ncond, not_reg_cond (cond), 1); | |
4dc9341c | 3899 | |
402209ff JH |
3900 | /* If the register is now unconditionally live, |
3901 | remove the entry in the splay_tree. */ | |
3902 | if (ncond == const0_rtx) | |
3903 | splay_tree_remove (pbi->reg_cond_dead, i); | |
3904 | else | |
3905 | { | |
3906 | rcli->condition = ncond; | |
3907 | SET_REGNO_REG_SET (pbi->reg_cond_reg, | |
3908 | REGNO (XEXP (cond, 0))); | |
3909 | } | |
3910 | } | |
3911 | } | |
3912 | else | |
4dc9341c | 3913 | { |
402209ff JH |
3914 | /* The register was not previously live at all. Record |
3915 | the condition under which it is still dead. */ | |
5ed6ace5 | 3916 | rcli = XNEW (struct reg_cond_life_info); |
402209ff JH |
3917 | rcli->condition = not_reg_cond (cond); |
3918 | rcli->stores = const0_rtx; | |
3919 | rcli->orig_condition = const0_rtx; | |
3920 | splay_tree_insert (pbi->reg_cond_dead, i, | |
3921 | (splay_tree_value) rcli); | |
4dc9341c | 3922 | |
402209ff | 3923 | SET_REGNO_REG_SET (pbi->reg_cond_reg, REGNO (XEXP (cond, 0))); |
4dc9341c MH |
3924 | } |
3925 | } | |
9be40833 | 3926 | else if (this_was_live) |
4dc9341c | 3927 | { |
402209ff JH |
3928 | /* The register may have been conditionally live previously, but |
3929 | is now unconditionally live. Remove it from the conditionally | |
3930 | dead list, so that a conditional set won't cause us to think | |
3931 | it dead. */ | |
3932 | splay_tree_remove (pbi->reg_cond_dead, i); | |
4dc9341c | 3933 | } |
402209ff | 3934 | #endif |
4dc9341c MH |
3935 | } |
3936 | } | |
3937 | ||
52c6b0b7 AK |
3938 | /* Scan expression X for registers which have to be marked used in PBI. |
3939 | X is considered to be the SET_DEST rtx of SET. TRUE is returned if | |
3940 | X could be handled by this function. */ | |
3941 | ||
3942 | static bool | |
3943 | mark_used_dest_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) | |
3944 | { | |
3945 | int regno; | |
3946 | bool mark_dest = false; | |
3947 | rtx dest = x; | |
3948 | ||
3949 | /* On some platforms calls return values spread over several | |
3950 | locations. These locations are wrapped in a EXPR_LIST rtx | |
3951 | together with a CONST_INT offset. */ | |
3952 | if (GET_CODE (x) == EXPR_LIST | |
3953 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
3954 | x = XEXP (x, 0); | |
3955 | ||
3956 | if (x == NULL_RTX) | |
3957 | return false; | |
3958 | ||
3959 | /* If storing into MEM, don't show it as being used. But do | |
3960 | show the address as being used. */ | |
3961 | if (MEM_P (x)) | |
3962 | { | |
3963 | #ifdef AUTO_INC_DEC | |
3964 | if (pbi->flags & PROP_AUTOINC) | |
3965 | find_auto_inc (pbi, x, insn); | |
3966 | #endif | |
3967 | mark_used_regs (pbi, XEXP (x, 0), cond, insn); | |
3968 | return true; | |
3969 | } | |
3970 | ||
3971 | /* Storing in STRICT_LOW_PART is like storing in a reg | |
3972 | in that this SET might be dead, so ignore it in TESTREG. | |
3973 | but in some other ways it is like using the reg. | |
3974 | ||
3975 | Storing in a SUBREG or a bit field is like storing the entire | |
3976 | register in that if the register's value is not used | |
3977 | then this SET is not needed. */ | |
3978 | while (GET_CODE (x) == STRICT_LOW_PART | |
3979 | || GET_CODE (x) == ZERO_EXTRACT | |
3980 | || GET_CODE (x) == SUBREG) | |
3981 | { | |
3982 | #ifdef CANNOT_CHANGE_MODE_CLASS | |
3983 | if ((pbi->flags & PROP_REG_INFO) && GET_CODE (x) == SUBREG) | |
3984 | record_subregs_of_mode (x); | |
3985 | #endif | |
3986 | ||
3987 | /* Modifying a single register in an alternate mode | |
3988 | does not use any of the old value. But these other | |
3989 | ways of storing in a register do use the old value. */ | |
3990 | if (GET_CODE (x) == SUBREG | |
3991 | && !((REG_BYTES (SUBREG_REG (x)) | |
3992 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD | |
3993 | > (REG_BYTES (x) | |
3994 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
3995 | ; | |
3996 | else | |
3997 | mark_dest = true; | |
3998 | ||
3999 | x = XEXP (x, 0); | |
4000 | } | |
4001 | ||
4002 | /* If this is a store into a register or group of registers, | |
4003 | recursively scan the value being stored. */ | |
4004 | if (REG_P (x) | |
4005 | && (regno = REGNO (x), | |
4006 | !(regno == FRAME_POINTER_REGNUM | |
4007 | && (!reload_completed || frame_pointer_needed))) | |
4008 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
4009 | && !(regno == HARD_FRAME_POINTER_REGNUM | |
4010 | && (!reload_completed || frame_pointer_needed)) | |
4011 | #endif | |
4012 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM | |
4013 | && !(regno == ARG_POINTER_REGNUM && fixed_regs[regno]) | |
4014 | #endif | |
4015 | ) | |
4016 | { | |
4017 | if (mark_dest) | |
4018 | mark_used_regs (pbi, dest, cond, insn); | |
4019 | return true; | |
4020 | } | |
4021 | return false; | |
4022 | } | |
4023 | ||
402209ff JH |
4024 | /* Scan expression X and store a 1-bit in NEW_LIVE for each reg it uses. |
4025 | This is done assuming the registers needed from X are those that | |
4026 | have 1-bits in PBI->REG_LIVE. | |
6057c0e6 | 4027 | |
402209ff JH |
4028 | INSN is the containing instruction. If INSN is dead, this function |
4029 | is not called. */ | |
135ebc36 | 4030 | |
402209ff | 4031 | static void |
6cf9ac28 | 4032 | mark_used_regs (struct propagate_block_info *pbi, rtx x, rtx cond, rtx insn) |
135ebc36 | 4033 | { |
b3694847 | 4034 | RTX_CODE code; |
402209ff | 4035 | int flags = pbi->flags; |
135ebc36 | 4036 | |
402209ff | 4037 | retry: |
5a133afd JH |
4038 | if (!x) |
4039 | return; | |
402209ff JH |
4040 | code = GET_CODE (x); |
4041 | switch (code) | |
135ebc36 | 4042 | { |
402209ff JH |
4043 | case LABEL_REF: |
4044 | case SYMBOL_REF: | |
4045 | case CONST_INT: | |
4046 | case CONST: | |
4047 | case CONST_DOUBLE: | |
69ef87e2 | 4048 | case CONST_VECTOR: |
402209ff JH |
4049 | case PC: |
4050 | case ADDR_VEC: | |
4051 | case ADDR_DIFF_VEC: | |
4052 | return; | |
4dc9341c | 4053 | |
402209ff JH |
4054 | #ifdef HAVE_cc0 |
4055 | case CC0: | |
4056 | pbi->cc0_live = 1; | |
4057 | return; | |
4058 | #endif | |
4dc9341c | 4059 | |
402209ff JH |
4060 | case CLOBBER: |
4061 | /* If we are clobbering a MEM, mark any registers inside the address | |
4062 | as being used. */ | |
3c0cb5de | 4063 | if (MEM_P (XEXP (x, 0))) |
402209ff JH |
4064 | mark_used_regs (pbi, XEXP (XEXP (x, 0), 0), cond, insn); |
4065 | return; | |
4dc9341c | 4066 | |
402209ff JH |
4067 | case MEM: |
4068 | /* Don't bother watching stores to mems if this is not the | |
4069 | final pass. We'll not be deleting dead stores this round. */ | |
5149f070 | 4070 | if (optimize && (flags & PROP_SCAN_DEAD_STORES)) |
4dc9341c | 4071 | { |
402209ff JH |
4072 | /* Invalidate the data for the last MEM stored, but only if MEM is |
4073 | something that can be stored into. */ | |
4074 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
4075 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))) | |
4076 | /* Needn't clear the memory set list. */ | |
4077 | ; | |
4078 | else | |
4dc9341c | 4079 | { |
402209ff JH |
4080 | rtx temp = pbi->mem_set_list; |
4081 | rtx prev = NULL_RTX; | |
4082 | rtx next; | |
4083 | ||
4084 | while (temp) | |
4085 | { | |
4086 | next = XEXP (temp, 1); | |
389fdba0 | 4087 | if (anti_dependence (XEXP (temp, 0), x)) |
402209ff JH |
4088 | { |
4089 | /* Splice temp out of the list. */ | |
4090 | if (prev) | |
4091 | XEXP (prev, 1) = next; | |
4092 | else | |
4093 | pbi->mem_set_list = next; | |
4094 | free_EXPR_LIST_node (temp); | |
4095 | pbi->mem_set_list_len--; | |
4096 | } | |
4097 | else | |
4098 | prev = temp; | |
4099 | temp = next; | |
4100 | } | |
4dc9341c | 4101 | } |
402209ff JH |
4102 | |
4103 | /* If the memory reference had embedded side effects (autoincrement | |
4104 | address modes. Then we may need to kill some entries on the | |
4105 | memory set list. */ | |
4106 | if (insn) | |
fe4b3c79 | 4107 | for_each_rtx (&PATTERN (insn), invalidate_mems_from_autoinc, pbi); |
4dc9341c | 4108 | } |
4dc9341c | 4109 | |
402209ff JH |
4110 | #ifdef AUTO_INC_DEC |
4111 | if (flags & PROP_AUTOINC) | |
dd3f0101 | 4112 | find_auto_inc (pbi, x, insn); |
402209ff JH |
4113 | #endif |
4114 | break; | |
d59c5346 | 4115 | |
402209ff | 4116 | case SUBREG: |
cff9f8d5 | 4117 | #ifdef CANNOT_CHANGE_MODE_CLASS |
41bf2a8b RH |
4118 | if (flags & PROP_REG_INFO) |
4119 | record_subregs_of_mode (x); | |
402209ff | 4120 | #endif |
d59c5346 | 4121 | |
402209ff JH |
4122 | /* While we're here, optimize this case. */ |
4123 | x = SUBREG_REG (x); | |
f8cfc6aa | 4124 | if (!REG_P (x)) |
402209ff JH |
4125 | goto retry; |
4126 | /* Fall through. */ | |
d59c5346 | 4127 | |
402209ff JH |
4128 | case REG: |
4129 | /* See a register other than being set => mark it as needed. */ | |
4130 | mark_used_reg (pbi, x, cond, insn); | |
4131 | return; | |
d59c5346 | 4132 | |
402209ff JH |
4133 | case SET: |
4134 | { | |
52c6b0b7 AK |
4135 | rtx dest = SET_DEST (x); |
4136 | int i; | |
4137 | bool ret = false; | |
4138 | ||
4139 | if (GET_CODE (dest) == PARALLEL) | |
4140 | for (i = 0; i < XVECLEN (dest, 0); i++) | |
4141 | ret |= mark_used_dest_regs (pbi, XVECEXP (dest, 0, i), cond, insn); | |
4142 | else | |
4143 | ret = mark_used_dest_regs (pbi, dest, cond, insn); | |
4144 | ||
4145 | if (ret) | |
402209ff | 4146 | { |
402209ff JH |
4147 | mark_used_regs (pbi, SET_SRC (x), cond, insn); |
4148 | return; | |
4149 | } | |
4150 | } | |
4151 | break; | |
c9bacfdb | 4152 | |
402209ff JH |
4153 | case ASM_OPERANDS: |
4154 | case UNSPEC_VOLATILE: | |
4155 | case TRAP_IF: | |
4156 | case ASM_INPUT: | |
4157 | { | |
4158 | /* Traditional and volatile asm instructions must be considered to use | |
4159 | and clobber all hard registers, all pseudo-registers and all of | |
4160 | memory. So must TRAP_IF and UNSPEC_VOLATILE operations. | |
4dc9341c | 4161 | |
402209ff JH |
4162 | Consider for instance a volatile asm that changes the fpu rounding |
4163 | mode. An insn should not be moved across this even if it only uses | |
4164 | pseudo-regs because it might give an incorrectly rounded result. | |
4dc9341c | 4165 | |
402209ff JH |
4166 | ?!? Unfortunately, marking all hard registers as live causes massive |
4167 | problems for the register allocator and marking all pseudos as live | |
4168 | creates mountains of uninitialized variable warnings. | |
4dc9341c | 4169 | |
402209ff JH |
4170 | So for now, just clear the memory set list and mark any regs |
4171 | we can find in ASM_OPERANDS as used. */ | |
4172 | if (code != ASM_OPERANDS || MEM_VOLATILE_P (x)) | |
4173 | { | |
4174 | free_EXPR_LIST_list (&pbi->mem_set_list); | |
4175 | pbi->mem_set_list_len = 0; | |
4176 | } | |
c9bacfdb | 4177 | |
402209ff JH |
4178 | /* For all ASM_OPERANDS, we must traverse the vector of input operands. |
4179 | We can not just fall through here since then we would be confused | |
4180 | by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate | |
4181 | traditional asms unlike their normal usage. */ | |
4182 | if (code == ASM_OPERANDS) | |
4183 | { | |
4184 | int j; | |
628f05b4 | 4185 | |
402209ff JH |
4186 | for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++) |
4187 | mark_used_regs (pbi, ASM_OPERANDS_INPUT (x, j), cond, insn); | |
4188 | } | |
4189 | break; | |
4190 | } | |
628f05b4 | 4191 | |
402209ff | 4192 | case COND_EXEC: |
0bccc606 | 4193 | gcc_assert (!cond); |
c9bacfdb | 4194 | |
402209ff | 4195 | mark_used_regs (pbi, COND_EXEC_TEST (x), NULL_RTX, insn); |
c9bacfdb | 4196 | |
402209ff JH |
4197 | cond = COND_EXEC_TEST (x); |
4198 | x = COND_EXEC_CODE (x); | |
4199 | goto retry; | |
628f05b4 | 4200 | |
402209ff JH |
4201 | default: |
4202 | break; | |
4dc9341c | 4203 | } |
628f05b4 | 4204 | |
402209ff | 4205 | /* Recursively scan the operands of this expression. */ |
4dc9341c | 4206 | |
402209ff | 4207 | { |
b3694847 SS |
4208 | const char * const fmt = GET_RTX_FORMAT (code); |
4209 | int i; | |
4dc9341c | 4210 | |
402209ff JH |
4211 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
4212 | { | |
4213 | if (fmt[i] == 'e') | |
4214 | { | |
4215 | /* Tail recursive case: save a function call level. */ | |
4216 | if (i == 0) | |
4217 | { | |
4218 | x = XEXP (x, 0); | |
4219 | goto retry; | |
4220 | } | |
4221 | mark_used_regs (pbi, XEXP (x, i), cond, insn); | |
4222 | } | |
4223 | else if (fmt[i] == 'E') | |
4224 | { | |
b3694847 | 4225 | int j; |
402209ff JH |
4226 | for (j = 0; j < XVECLEN (x, i); j++) |
4227 | mark_used_regs (pbi, XVECEXP (x, i, j), cond, insn); | |
4228 | } | |
4229 | } | |
4230 | } | |
4dc9341c | 4231 | } |
402209ff JH |
4232 | \f |
4233 | #ifdef AUTO_INC_DEC | |
4dc9341c | 4234 | |
402209ff | 4235 | static int |
6cf9ac28 | 4236 | try_pre_increment_1 (struct propagate_block_info *pbi, rtx insn) |
402209ff JH |
4237 | { |
4238 | /* Find the next use of this reg. If in same basic block, | |
4239 | make it do pre-increment or pre-decrement if appropriate. */ | |
4240 | rtx x = single_set (insn); | |
4241 | HOST_WIDE_INT amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1) | |
4242 | * INTVAL (XEXP (SET_SRC (x), 1))); | |
4243 | int regno = REGNO (SET_DEST (x)); | |
4244 | rtx y = pbi->reg_next_use[regno]; | |
4245 | if (y != 0 | |
4246 | && SET_DEST (x) != stack_pointer_rtx | |
4247 | && BLOCK_NUM (y) == BLOCK_NUM (insn) | |
4248 | /* Don't do this if the reg dies, or gets set in y; a standard addressing | |
4249 | mode would be better. */ | |
4250 | && ! dead_or_set_p (y, SET_DEST (x)) | |
4251 | && try_pre_increment (y, SET_DEST (x), amount)) | |
4252 | { | |
4253 | /* We have found a suitable auto-increment and already changed | |
4254 | insn Y to do it. So flush this increment instruction. */ | |
3dec4024 | 4255 | propagate_block_delete_insn (insn); |
b53978a3 | 4256 | |
402209ff JH |
4257 | /* Count a reference to this reg for the increment insn we are |
4258 | deleting. When a reg is incremented, spilling it is worse, | |
4259 | so we want to make that less likely. */ | |
4260 | if (regno >= FIRST_PSEUDO_REGISTER) | |
4261 | { | |
4262 | REG_FREQ (regno) += REG_FREQ_FROM_BB (pbi->bb); | |
4263 | REG_N_SETS (regno)++; | |
4264 | } | |
b53978a3 | 4265 | |
402209ff JH |
4266 | /* Flush any remembered memories depending on the value of |
4267 | the incremented register. */ | |
4268 | invalidate_mems_from_set (pbi, SET_DEST (x)); | |
b53978a3 | 4269 | |
402209ff JH |
4270 | return 1; |
4271 | } | |
4272 | return 0; | |
4273 | } | |
b53978a3 | 4274 | |
402209ff JH |
4275 | /* Try to change INSN so that it does pre-increment or pre-decrement |
4276 | addressing on register REG in order to add AMOUNT to REG. | |
4277 | AMOUNT is negative for pre-decrement. | |
4278 | Returns 1 if the change could be made. | |
4279 | This checks all about the validity of the result of modifying INSN. */ | |
b53978a3 | 4280 | |
402209ff | 4281 | static int |
6cf9ac28 | 4282 | try_pre_increment (rtx insn, rtx reg, HOST_WIDE_INT amount) |
b53978a3 | 4283 | { |
b3694847 | 4284 | rtx use; |
b53978a3 | 4285 | |
402209ff JH |
4286 | /* Nonzero if we can try to make a pre-increment or pre-decrement. |
4287 | For example, addl $4,r1; movl (r1),... can become movl +(r1),... */ | |
4288 | int pre_ok = 0; | |
4289 | /* Nonzero if we can try to make a post-increment or post-decrement. | |
4290 | For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,... | |
4291 | It is possible for both PRE_OK and POST_OK to be nonzero if the machine | |
4292 | supports both pre-inc and post-inc, or both pre-dec and post-dec. */ | |
4293 | int post_ok = 0; | |
b53978a3 | 4294 | |
402209ff JH |
4295 | /* Nonzero if the opportunity actually requires post-inc or post-dec. */ |
4296 | int do_post = 0; | |
b53978a3 | 4297 | |
402209ff JH |
4298 | /* From the sign of increment, see which possibilities are conceivable |
4299 | on this target machine. */ | |
4300 | if (HAVE_PRE_INCREMENT && amount > 0) | |
4301 | pre_ok = 1; | |
4302 | if (HAVE_POST_INCREMENT && amount > 0) | |
4303 | post_ok = 1; | |
b53978a3 | 4304 | |
402209ff JH |
4305 | if (HAVE_PRE_DECREMENT && amount < 0) |
4306 | pre_ok = 1; | |
4307 | if (HAVE_POST_DECREMENT && amount < 0) | |
4308 | post_ok = 1; | |
b53978a3 | 4309 | |
402209ff JH |
4310 | if (! (pre_ok || post_ok)) |
4311 | return 0; | |
b53978a3 | 4312 | |
402209ff JH |
4313 | /* It is not safe to add a side effect to a jump insn |
4314 | because if the incremented register is spilled and must be reloaded | |
4315 | there would be no way to store the incremented value back in memory. */ | |
c9bacfdb | 4316 | |
4b4bf941 | 4317 | if (JUMP_P (insn)) |
402209ff | 4318 | return 0; |
b53978a3 | 4319 | |
402209ff JH |
4320 | use = 0; |
4321 | if (pre_ok) | |
4322 | use = find_use_as_address (PATTERN (insn), reg, 0); | |
60e8b9f0 | 4323 | if (post_ok && (use == 0 || use == (rtx) (size_t) 1)) |
b53978a3 | 4324 | { |
402209ff JH |
4325 | use = find_use_as_address (PATTERN (insn), reg, -amount); |
4326 | do_post = 1; | |
b53978a3 JO |
4327 | } |
4328 | ||
60e8b9f0 | 4329 | if (use == 0 || use == (rtx) (size_t) 1) |
402209ff JH |
4330 | return 0; |
4331 | ||
4332 | if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount)) | |
4333 | return 0; | |
b53978a3 | 4334 | |
402209ff JH |
4335 | /* See if this combination of instruction and addressing mode exists. */ |
4336 | if (! validate_change (insn, &XEXP (use, 0), | |
4337 | gen_rtx_fmt_e (amount > 0 | |
4338 | ? (do_post ? POST_INC : PRE_INC) | |
4339 | : (do_post ? POST_DEC : PRE_DEC), | |
4340 | Pmode, reg), 0)) | |
4341 | return 0; | |
b53978a3 | 4342 | |
402209ff JH |
4343 | /* Record that this insn now has an implicit side effect on X. */ |
4344 | REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC, reg, REG_NOTES (insn)); | |
4345 | return 1; | |
b53978a3 JO |
4346 | } |
4347 | ||
402209ff JH |
4348 | #endif /* AUTO_INC_DEC */ |
4349 | \f | |
4350 | /* Find the place in the rtx X where REG is used as a memory address. | |
4351 | Return the MEM rtx that so uses it. | |
4352 | If PLUSCONST is nonzero, search instead for a memory address equivalent to | |
4353 | (plus REG (const_int PLUSCONST)). | |
5d6a16e2 | 4354 | |
402209ff JH |
4355 | If such an address does not appear, return 0. |
4356 | If REG appears more than once, or is used other than in such an address, | |
60e8b9f0 | 4357 | return (rtx) 1. */ |
5d6a16e2 | 4358 | |
402209ff | 4359 | rtx |
6cf9ac28 | 4360 | find_use_as_address (rtx x, rtx reg, HOST_WIDE_INT plusconst) |
5d6a16e2 | 4361 | { |
402209ff JH |
4362 | enum rtx_code code = GET_CODE (x); |
4363 | const char * const fmt = GET_RTX_FORMAT (code); | |
b3694847 SS |
4364 | int i; |
4365 | rtx value = 0; | |
4366 | rtx tem; | |
4a7da9b5 | 4367 | |
402209ff JH |
4368 | if (code == MEM && XEXP (x, 0) == reg && plusconst == 0) |
4369 | return x; | |
5d6a16e2 | 4370 | |
402209ff JH |
4371 | if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS |
4372 | && XEXP (XEXP (x, 0), 0) == reg | |
4373 | && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT | |
4374 | && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) | |
4375 | return x; | |
ef120fc0 | 4376 | |
402209ff | 4377 | if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) |
5d6a16e2 | 4378 | { |
402209ff JH |
4379 | /* If REG occurs inside a MEM used in a bit-field reference, |
4380 | that is unacceptable. */ | |
4381 | if (find_use_as_address (XEXP (x, 0), reg, 0) != 0) | |
60e8b9f0 | 4382 | return (rtx) (size_t) 1; |
5d6a16e2 | 4383 | } |
5d6a16e2 | 4384 | |
402209ff | 4385 | if (x == reg) |
60e8b9f0 | 4386 | return (rtx) (size_t) 1; |
4dc9341c | 4387 | |
402209ff | 4388 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
4dc9341c | 4389 | { |
402209ff JH |
4390 | if (fmt[i] == 'e') |
4391 | { | |
4392 | tem = find_use_as_address (XEXP (x, i), reg, plusconst); | |
4393 | if (value == 0) | |
4394 | value = tem; | |
4395 | else if (tem != 0) | |
60e8b9f0 | 4396 | return (rtx) (size_t) 1; |
402209ff JH |
4397 | } |
4398 | else if (fmt[i] == 'E') | |
4dc9341c | 4399 | { |
b3694847 | 4400 | int j; |
402209ff | 4401 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
4dc9341c | 4402 | { |
402209ff JH |
4403 | tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst); |
4404 | if (value == 0) | |
4405 | value = tem; | |
4406 | else if (tem != 0) | |
60e8b9f0 | 4407 | return (rtx) (size_t) 1; |
4dc9341c MH |
4408 | } |
4409 | } | |
4410 | } | |
4dc9341c | 4411 | |
402209ff JH |
4412 | return value; |
4413 | } | |
4414 | \f | |
4415 | /* Write information about registers and basic blocks into FILE. | |
4416 | This is part of making a debugging dump. */ | |
c9bacfdb | 4417 | |
402209ff | 4418 | void |
6cf9ac28 | 4419 | dump_regset (regset r, FILE *outf) |
4dc9341c | 4420 | { |
3cd8c58a | 4421 | unsigned i; |
a2041967 KH |
4422 | reg_set_iterator rsi; |
4423 | ||
402209ff | 4424 | if (r == NULL) |
3abd3239 | 4425 | { |
402209ff | 4426 | fputs (" (nil)", outf); |
3abd3239 MH |
4427 | return; |
4428 | } | |
4dc9341c | 4429 | |
a2041967 | 4430 | EXECUTE_IF_SET_IN_REG_SET (r, 0, i, rsi) |
4dc9341c | 4431 | { |
402209ff JH |
4432 | fprintf (outf, " %d", i); |
4433 | if (i < FIRST_PSEUDO_REGISTER) | |
4434 | fprintf (outf, " [%s]", | |
4435 | reg_names[i]); | |
a2041967 | 4436 | } |
4dc9341c MH |
4437 | } |
4438 | ||
fbe5a4a6 | 4439 | /* Print a human-readable representation of R on the standard error |
402209ff JH |
4440 | stream. This function is designed to be used from within the |
4441 | debugger. */ | |
c9bacfdb | 4442 | |
402209ff | 4443 | void |
6cf9ac28 | 4444 | debug_regset (regset r) |
4dc9341c | 4445 | { |
402209ff JH |
4446 | dump_regset (r, stderr); |
4447 | putc ('\n', stderr); | |
4dc9341c MH |
4448 | } |
4449 | ||
402209ff JH |
4450 | /* Recompute register set/reference counts immediately prior to register |
4451 | allocation. | |
5d6a16e2 | 4452 | |
402209ff JH |
4453 | This avoids problems with set/reference counts changing to/from values |
4454 | which have special meanings to the register allocators. | |
eab02feb | 4455 | |
402209ff JH |
4456 | Additionally, the reference counts are the primary component used by the |
4457 | register allocators to prioritize pseudos for allocation to hard regs. | |
4458 | More accurate reference counts generally lead to better register allocation. | |
eab02feb | 4459 | |
402209ff JH |
4460 | It might be worthwhile to update REG_LIVE_LENGTH, REG_BASIC_BLOCK and |
4461 | possibly other information which is used by the register allocators. */ | |
eab02feb | 4462 | |
a678e384 | 4463 | static unsigned int |
e22857eb | 4464 | recompute_reg_usage (void) |
402209ff JH |
4465 | { |
4466 | allocate_reg_life_data (); | |
535a42b1 NS |
4467 | /* distribute_notes in combiner fails to convert some of the |
4468 | REG_UNUSED notes to REG_DEAD notes. This causes CHECK_DEAD_NOTES | |
4469 | in sched1 to die. To solve this update the DEATH_NOTES | |
4470 | here. */ | |
58565a33 | 4471 | update_life_info (NULL, UPDATE_LIFE_LOCAL, PROP_REG_INFO | PROP_DEATH_NOTES); |
defb77dc PB |
4472 | |
4473 | if (dump_file) | |
5b4fdb20 | 4474 | dump_flow_info (dump_file, dump_flags); |
c2924966 | 4475 | return 0; |
eab02feb MH |
4476 | } |
4477 | ||
ef330312 PB |
4478 | struct tree_opt_pass pass_recompute_reg_usage = |
4479 | { | |
defb77dc | 4480 | "life2", /* name */ |
ef330312 PB |
4481 | NULL, /* gate */ |
4482 | recompute_reg_usage, /* execute */ | |
4483 | NULL, /* sub */ | |
4484 | NULL, /* next */ | |
4485 | 0, /* static_pass_number */ | |
4486 | 0, /* tv_id */ | |
4487 | 0, /* properties_required */ | |
4488 | 0, /* properties_provided */ | |
4489 | 0, /* properties_destroyed */ | |
4490 | 0, /* todo_flags_start */ | |
defb77dc PB |
4491 | TODO_dump_func, /* todo_flags_finish */ |
4492 | 'f' /* letter */ | |
ef330312 PB |
4493 | }; |
4494 | ||
402209ff JH |
4495 | /* Optionally removes all the REG_DEAD and REG_UNUSED notes from a set of |
4496 | blocks. If BLOCKS is NULL, assume the universal set. Returns a count | |
7d22e898 R |
4497 | of the number of registers that died. |
4498 | If KILL is 1, remove old REG_DEAD / REG_UNUSED notes. If it is 0, don't. | |
4499 | if it is -1, remove them unless they pertain to a stack reg. */ | |
d4b60170 | 4500 | |
c9bacfdb | 4501 | int |
6cf9ac28 | 4502 | count_or_remove_death_notes (sbitmap blocks, int kill) |
4dc9341c | 4503 | { |
e0082a72 | 4504 | int count = 0; |
dfea6c85 | 4505 | unsigned int i = 0; |
e0082a72 | 4506 | basic_block bb; |
ce4bbac7 | 4507 | |
095c3bbd JL |
4508 | /* This used to be a loop over all the blocks with a membership test |
4509 | inside the loop. That can be amazingly expensive on a large CFG | |
4510 | when only a small number of bits are set in BLOCKs (for example, | |
4511 | the calls from the scheduler typically have very few bits set). | |
4512 | ||
4513 | For extra credit, someone should convert BLOCKS to a bitmap rather | |
4514 | than an sbitmap. */ | |
4515 | if (blocks) | |
4516 | { | |
b6e7e9af KH |
4517 | sbitmap_iterator sbi; |
4518 | ||
4519 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, sbi) | |
095c3bbd | 4520 | { |
3d5f877a KZ |
4521 | basic_block bb = BASIC_BLOCK (i); |
4522 | /* The bitmap may be flawed in that one of the basic blocks | |
4523 | may have been deleted before you get here. */ | |
4524 | if (bb) | |
4525 | count += count_or_remove_death_notes_bb (bb, kill); | |
b6e7e9af | 4526 | }; |
095c3bbd JL |
4527 | } |
4528 | else | |
4dc9341c | 4529 | { |
095c3bbd JL |
4530 | FOR_EACH_BB (bb) |
4531 | { | |
4532 | count += count_or_remove_death_notes_bb (bb, kill); | |
4533 | } | |
4534 | } | |
5d6a16e2 | 4535 | |
095c3bbd JL |
4536 | return count; |
4537 | } | |
4538 | ||
4539 | /* Optionally removes all the REG_DEAD and REG_UNUSED notes from basic | |
4540 | block BB. Returns a count of the number of registers that died. */ | |
5d6a16e2 | 4541 | |
095c3bbd JL |
4542 | static int |
4543 | count_or_remove_death_notes_bb (basic_block bb, int kill) | |
4544 | { | |
4545 | int count = 0; | |
4546 | rtx insn; | |
4547 | ||
a813c111 | 4548 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
095c3bbd JL |
4549 | { |
4550 | if (INSN_P (insn)) | |
4dc9341c | 4551 | { |
095c3bbd JL |
4552 | rtx *pprev = ®_NOTES (insn); |
4553 | rtx link = *pprev; | |
402209ff | 4554 | |
095c3bbd JL |
4555 | while (link) |
4556 | { | |
4557 | switch (REG_NOTE_KIND (link)) | |
4dc9341c | 4558 | { |
095c3bbd | 4559 | case REG_DEAD: |
f8cfc6aa | 4560 | if (REG_P (XEXP (link, 0))) |
095c3bbd JL |
4561 | { |
4562 | rtx reg = XEXP (link, 0); | |
4563 | int n; | |
4564 | ||
4565 | if (REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
4566 | n = 1; | |
4567 | else | |
66fd46b6 | 4568 | n = hard_regno_nregs[REGNO (reg)][GET_MODE (reg)]; |
095c3bbd JL |
4569 | count += n; |
4570 | } | |
4571 | ||
4572 | /* Fall through. */ | |
4573 | ||
4574 | case REG_UNUSED: | |
7d22e898 R |
4575 | if (kill > 0 |
4576 | || (kill | |
4577 | #ifdef STACK_REGS | |
4578 | && (!REG_P (XEXP (link, 0)) | |
4579 | || !IN_RANGE (REGNO (XEXP (link, 0)), | |
4580 | FIRST_STACK_REG, LAST_STACK_REG)) | |
4581 | #endif | |
4582 | )) | |
402209ff | 4583 | { |
095c3bbd JL |
4584 | rtx next = XEXP (link, 1); |
4585 | free_EXPR_LIST_node (link); | |
4586 | *pprev = link = next; | |
402209ff JH |
4587 | break; |
4588 | } | |
095c3bbd JL |
4589 | /* Fall through. */ |
4590 | ||
4591 | default: | |
4592 | pprev = &XEXP (link, 1); | |
4593 | link = *pprev; | |
4594 | break; | |
4dc9341c MH |
4595 | } |
4596 | } | |
5d6a16e2 | 4597 | } |
095c3bbd | 4598 | |
a813c111 | 4599 | if (insn == BB_END (bb)) |
095c3bbd | 4600 | break; |
5a660bff | 4601 | } |
4dc9341c | 4602 | |
402209ff | 4603 | return count; |
4dc9341c | 4604 | } |
095c3bbd | 4605 | |
b932f770 JH |
4606 | /* Clear LOG_LINKS fields of insns in a selected blocks or whole chain |
4607 | if blocks is NULL. */ | |
efc9bd41 | 4608 | |
b932f770 | 4609 | static void |
6cf9ac28 | 4610 | clear_log_links (sbitmap blocks) |
d9d4fb43 | 4611 | { |
b932f770 | 4612 | rtx insn; |
1868b439 | 4613 | |
b932f770 | 4614 | if (!blocks) |
1868b439 | 4615 | { |
b932f770 JH |
4616 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) |
4617 | if (INSN_P (insn)) | |
e9cf0934 | 4618 | free_INSN_LIST_list (&LOG_LINKS (insn)); |
1868b439 | 4619 | } |
b932f770 | 4620 | else |
b6e7e9af | 4621 | { |
dfea6c85 | 4622 | unsigned int i = 0; |
b6e7e9af | 4623 | sbitmap_iterator sbi; |
16e99e29 | 4624 | |
b6e7e9af KH |
4625 | EXECUTE_IF_SET_IN_SBITMAP (blocks, 0, i, sbi) |
4626 | { | |
4627 | basic_block bb = BASIC_BLOCK (i); | |
4628 | ||
4629 | for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb)); | |
4630 | insn = NEXT_INSN (insn)) | |
4631 | if (INSN_P (insn)) | |
4632 | free_INSN_LIST_list (&LOG_LINKS (insn)); | |
4633 | } | |
4634 | } | |
d9d4fb43 | 4635 | } |
efc9bd41 RK |
4636 | |
4637 | /* Given a register bitmap, turn on the bits in a HARD_REG_SET that | |
4638 | correspond to the hard registers, if any, set in that map. This | |
4639 | could be done far more efficiently by having all sorts of special-cases | |
4640 | with moving single words, but probably isn't worth the trouble. */ | |
4641 | ||
4642 | void | |
6cf9ac28 | 4643 | reg_set_to_hard_reg_set (HARD_REG_SET *to, bitmap from) |
efc9bd41 | 4644 | { |
3cd8c58a | 4645 | unsigned i; |
87c476a2 | 4646 | bitmap_iterator bi; |
efc9bd41 | 4647 | |
87c476a2 ZD |
4648 | EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi) |
4649 | { | |
4650 | if (i >= FIRST_PSEUDO_REGISTER) | |
4651 | return; | |
4652 | SET_HARD_REG_BIT (*to, i); | |
4653 | } | |
efc9bd41 | 4654 | } |
ef330312 PB |
4655 | \f |
4656 | ||
4657 | static bool | |
4658 | gate_remove_death_notes (void) | |
4659 | { | |
4660 | return flag_profile_values; | |
4661 | } | |
4662 | ||
c2924966 | 4663 | static unsigned int |
ef330312 PB |
4664 | rest_of_handle_remove_death_notes (void) |
4665 | { | |
4666 | count_or_remove_death_notes (NULL, 1); | |
c2924966 | 4667 | return 0; |
ef330312 PB |
4668 | } |
4669 | ||
4670 | struct tree_opt_pass pass_remove_death_notes = | |
4671 | { | |
defb77dc | 4672 | "ednotes", /* name */ |
ef330312 PB |
4673 | gate_remove_death_notes, /* gate */ |
4674 | rest_of_handle_remove_death_notes, /* execute */ | |
4675 | NULL, /* sub */ | |
4676 | NULL, /* next */ | |
4677 | 0, /* static_pass_number */ | |
4678 | 0, /* tv_id */ | |
4679 | 0, /* properties_required */ | |
4680 | 0, /* properties_provided */ | |
4681 | 0, /* properties_destroyed */ | |
4682 | 0, /* todo_flags_start */ | |
4683 | 0, /* todo_flags_finish */ | |
4684 | 0 /* letter */ | |
4685 | }; | |
4686 | ||
4687 | /* Perform life analysis. */ | |
c2924966 | 4688 | static unsigned int |
ef330312 PB |
4689 | rest_of_handle_life (void) |
4690 | { | |
4691 | regclass_init (); | |
4692 | ||
10d22567 | 4693 | life_analysis (PROP_FINAL); |
ef330312 PB |
4694 | if (optimize) |
4695 | cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_UPDATE_LIFE | CLEANUP_LOG_LINKS | |
4696 | | (flag_thread_jumps ? CLEANUP_THREADING : 0)); | |
4697 | ||
4698 | if (extra_warnings) | |
4699 | { | |
4700 | setjmp_vars_warning (DECL_INITIAL (current_function_decl)); | |
4701 | setjmp_args_warning (); | |
4702 | } | |
4703 | ||
4704 | if (optimize) | |
4705 | { | |
4706 | if (initialize_uninitialized_subregs ()) | |
4707 | { | |
4708 | /* Insns were inserted, and possibly pseudos created, so | |
4709 | things might look a bit different. */ | |
4710 | allocate_reg_life_data (); | |
4711 | update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES, | |
4712 | PROP_LOG_LINKS | PROP_REG_INFO | PROP_DEATH_NOTES); | |
4713 | } | |
4714 | } | |
4715 | ||
4716 | no_new_pseudos = 1; | |
c2924966 | 4717 | return 0; |
ef330312 PB |
4718 | } |
4719 | ||
4720 | struct tree_opt_pass pass_life = | |
4721 | { | |
defb77dc | 4722 | "life1", /* name */ |
ef330312 PB |
4723 | NULL, /* gate */ |
4724 | rest_of_handle_life, /* execute */ | |
4725 | NULL, /* sub */ | |
4726 | NULL, /* next */ | |
4727 | 0, /* static_pass_number */ | |
4728 | TV_FLOW, /* tv_id */ | |
4729 | 0, /* properties_required */ | |
4730 | 0, /* properties_provided */ | |
4731 | 0, /* properties_destroyed */ | |
4732 | TODO_verify_flow, /* todo_flags_start */ | |
4733 | TODO_dump_func | | |
4734 | TODO_ggc_collect, /* todo_flags_finish */ | |
4735 | 'f' /* letter */ | |
4736 | }; | |
4737 | ||
c2924966 | 4738 | static unsigned int |
ef330312 PB |
4739 | rest_of_handle_flow2 (void) |
4740 | { | |
ef330312 PB |
4741 | /* If optimizing, then go ahead and split insns now. */ |
4742 | #ifndef STACK_REGS | |
4743 | if (optimize > 0) | |
4744 | #endif | |
4745 | split_all_insns (0); | |
4746 | ||
4747 | if (flag_branch_target_load_optimize) | |
4748 | branch_target_load_optimize (epilogue_completed); | |
4749 | ||
4750 | if (optimize) | |
4751 | cleanup_cfg (CLEANUP_EXPENSIVE); | |
4752 | ||
4753 | /* On some machines, the prologue and epilogue code, or parts thereof, | |
4754 | can be represented as RTL. Doing so lets us schedule insns between | |
4755 | it and the rest of the code and also allows delayed branch | |
4756 | scheduling to operate in the epilogue. */ | |
4757 | thread_prologue_and_epilogue_insns (get_insns ()); | |
4758 | epilogue_completed = 1; | |
4759 | flow2_completed = 1; | |
c2924966 | 4760 | return 0; |
ef330312 PB |
4761 | } |
4762 | ||
4763 | struct tree_opt_pass pass_flow2 = | |
4764 | { | |
4765 | "flow2", /* name */ | |
4766 | NULL, /* gate */ | |
4767 | rest_of_handle_flow2, /* execute */ | |
4768 | NULL, /* sub */ | |
4769 | NULL, /* next */ | |
4770 | 0, /* static_pass_number */ | |
4771 | TV_FLOW2, /* tv_id */ | |
4772 | 0, /* properties_required */ | |
4773 | 0, /* properties_provided */ | |
4774 | 0, /* properties_destroyed */ | |
4775 | TODO_verify_flow, /* todo_flags_start */ | |
4776 | TODO_dump_func | | |
4777 | TODO_ggc_collect, /* todo_flags_finish */ | |
4778 | 'w' /* letter */ | |
4779 | }; | |
4780 |