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a52b023a | 1 | /* RTL-based forward propagation pass for GNU compiler. |
ce372372 | 2 | Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. |
a52b023a PB |
3 | Contributed by Paolo Bonzini and Steven Bosscher. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 9 | Software Foundation; either version 3, or (at your option) any later |
a52b023a PB |
10 | version. |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
a52b023a PB |
20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
23 | #include "coretypes.h" | |
24 | #include "tm.h" | |
25 | #include "toplev.h" | |
26 | ||
27 | #include "timevar.h" | |
28 | #include "rtl.h" | |
29 | #include "tm_p.h" | |
30 | #include "emit-rtl.h" | |
31 | #include "insn-config.h" | |
32 | #include "recog.h" | |
33 | #include "flags.h" | |
34 | #include "obstack.h" | |
35 | #include "basic-block.h" | |
36 | #include "output.h" | |
37 | #include "df.h" | |
38 | #include "target.h" | |
39 | #include "cfgloop.h" | |
40 | #include "tree-pass.h" | |
c6741572 | 41 | #include "domwalk.h" |
a52b023a PB |
42 | |
43 | ||
44 | /* This pass does simple forward propagation and simplification when an | |
45 | operand of an insn can only come from a single def. This pass uses | |
46 | df.c, so it is global. However, we only do limited analysis of | |
47 | available expressions. | |
48 | ||
49 | 1) The pass tries to propagate the source of the def into the use, | |
50 | and checks if the result is independent of the substituted value. | |
51 | For example, the high word of a (zero_extend:DI (reg:SI M)) is always | |
52 | zero, independent of the source register. | |
53 | ||
54 | In particular, we propagate constants into the use site. Sometimes | |
55 | RTL expansion did not put the constant in the same insn on purpose, | |
56 | to satisfy a predicate, and the result will fail to be recognized; | |
57 | but this happens rarely and in this case we can still create a | |
58 | REG_EQUAL note. For multi-word operations, this | |
59 | ||
60 | (set (subreg:SI (reg:DI 120) 0) (const_int 0)) | |
61 | (set (subreg:SI (reg:DI 120) 4) (const_int -1)) | |
62 | (set (subreg:SI (reg:DI 122) 0) | |
63 | (ior:SI (subreg:SI (reg:DI 119) 0) (subreg:SI (reg:DI 120) 0))) | |
64 | (set (subreg:SI (reg:DI 122) 4) | |
65 | (ior:SI (subreg:SI (reg:DI 119) 4) (subreg:SI (reg:DI 120) 4))) | |
66 | ||
67 | can be simplified to the much simpler | |
68 | ||
69 | (set (subreg:SI (reg:DI 122) 0) (subreg:SI (reg:DI 119))) | |
70 | (set (subreg:SI (reg:DI 122) 4) (const_int -1)) | |
71 | ||
72 | This particular propagation is also effective at putting together | |
73 | complex addressing modes. We are more aggressive inside MEMs, in | |
74 | that all definitions are propagated if the use is in a MEM; if the | |
75 | result is a valid memory address we check address_cost to decide | |
76 | whether the substitution is worthwhile. | |
77 | ||
78 | 2) The pass propagates register copies. This is not as effective as | |
79 | the copy propagation done by CSE's canon_reg, which works by walking | |
80 | the instruction chain, it can help the other transformations. | |
81 | ||
82 | We should consider removing this optimization, and instead reorder the | |
83 | RTL passes, because GCSE does this transformation too. With some luck, | |
84 | the CSE pass at the end of rest_of_handle_gcse could also go away. | |
85 | ||
86 | 3) The pass looks for paradoxical subregs that are actually unnecessary. | |
87 | Things like this: | |
88 | ||
89 | (set (reg:QI 120) (subreg:QI (reg:SI 118) 0)) | |
90 | (set (reg:QI 121) (subreg:QI (reg:SI 119) 0)) | |
91 | (set (reg:SI 122) (plus:SI (subreg:SI (reg:QI 120) 0) | |
92 | (subreg:SI (reg:QI 121) 0))) | |
93 | ||
94 | are very common on machines that can only do word-sized operations. | |
95 | For each use of a paradoxical subreg (subreg:WIDER (reg:NARROW N) 0), | |
96 | if it has a single def and it is (subreg:NARROW (reg:WIDE M) 0), | |
97 | we can replace the paradoxical subreg with simply (reg:WIDE M). The | |
98 | above will simplify this to | |
99 | ||
100 | (set (reg:QI 120) (subreg:QI (reg:SI 118) 0)) | |
101 | (set (reg:QI 121) (subreg:QI (reg:SI 119) 0)) | |
102 | (set (reg:SI 122) (plus:SI (reg:SI 118) (reg:SI 119))) | |
103 | ||
c6741572 PB |
104 | where the first two insns are now dead. |
105 | ||
106 | We used to use reaching definitions to find which uses have a | |
107 | single reaching definition (sounds obvious...), but this is too | |
108 | complex a problem in nasty testcases like PR33928. Now we use the | |
109 | multiple definitions problem in df-problems.c. The similarity | |
110 | between that problem and SSA form creation is taken further, in | |
111 | that fwprop does a dominator walk to create its chains; however, | |
112 | instead of creating a PHI function where multiple definitions meet | |
113 | I just punt and record only singleton use-def chains, which is | |
114 | all that is needed by fwprop. */ | |
a52b023a PB |
115 | |
116 | ||
a52b023a PB |
117 | static int num_changes; |
118 | ||
00952e97 PB |
119 | DEF_VEC_P(df_ref); |
120 | DEF_VEC_ALLOC_P(df_ref,heap); | |
121 | VEC(df_ref,heap) *use_def_ref; | |
c6741572 PB |
122 | VEC(df_ref,heap) *reg_defs; |
123 | VEC(df_ref,heap) *reg_defs_stack; | |
00952e97 PB |
124 | |
125 | ||
126 | /* Return the only def in USE's use-def chain, or NULL if there is | |
127 | more than one def in the chain. */ | |
128 | ||
129 | static inline df_ref | |
130 | get_def_for_use (df_ref use) | |
131 | { | |
132 | return VEC_index (df_ref, use_def_ref, DF_REF_ID (use)); | |
133 | } | |
134 | ||
135 | ||
c6741572 PB |
136 | /* Update the reg_defs vector with non-partial definitions in DEF_REC. |
137 | TOP_FLAG says which artificials uses should be used, when DEF_REC | |
138 | is an artificial def vector. LOCAL_MD is modified as after a | |
139 | df_md_simulate_* function; we do more or less the same processing | |
140 | done there, so we do not use those functions. */ | |
141 | ||
142 | #define DF_MD_GEN_FLAGS \ | |
143 | (DF_REF_PARTIAL | DF_REF_CONDITIONAL | DF_REF_MAY_CLOBBER) | |
00952e97 | 144 | |
c6741572 PB |
145 | static void |
146 | process_defs (bitmap local_md, df_ref *def_rec, int top_flag) | |
00952e97 | 147 | { |
c6741572 PB |
148 | df_ref def; |
149 | while ((def = *def_rec++) != NULL) | |
150 | { | |
151 | df_ref curr_def = VEC_index (df_ref, reg_defs, DF_REF_REGNO (def)); | |
152 | unsigned int dregno; | |
00952e97 | 153 | |
c6741572 PB |
154 | if ((DF_REF_FLAGS (def) & DF_REF_AT_TOP) != top_flag) |
155 | continue; | |
00952e97 | 156 | |
c6741572 PB |
157 | dregno = DF_REF_REGNO (def); |
158 | if (curr_def) | |
159 | VEC_safe_push (df_ref, heap, reg_defs_stack, curr_def); | |
160 | else | |
161 | { | |
162 | /* Do not store anything if "transitioning" from NULL to NULL. But | |
163 | otherwise, push a special entry on the stack to tell the | |
164 | leave_block callback that the entry in reg_defs was NULL. */ | |
165 | if (DF_REF_FLAGS (def) & DF_MD_GEN_FLAGS) | |
166 | ; | |
167 | else | |
168 | VEC_safe_push (df_ref, heap, reg_defs_stack, def); | |
169 | } | |
170 | ||
171 | if (DF_REF_FLAGS (def) & DF_MD_GEN_FLAGS) | |
172 | { | |
173 | bitmap_set_bit (local_md, dregno); | |
174 | VEC_replace (df_ref, reg_defs, dregno, NULL); | |
175 | } | |
176 | else | |
177 | { | |
178 | bitmap_clear_bit (local_md, dregno); | |
179 | VEC_replace (df_ref, reg_defs, dregno, def); | |
180 | } | |
00952e97 | 181 | } |
00952e97 PB |
182 | } |
183 | ||
184 | ||
185 | /* Fill the use_def_ref vector with values for the uses in USE_REC, | |
c6741572 PB |
186 | taking reaching definitions info from LOCAL_MD and REG_DEFS. |
187 | TOP_FLAG says which artificials uses should be used, when USE_REC | |
188 | is an artificial use vector. */ | |
00952e97 PB |
189 | |
190 | static void | |
c6741572 | 191 | process_uses (bitmap local_md, df_ref *use_rec, int top_flag) |
00952e97 PB |
192 | { |
193 | df_ref use; | |
194 | while ((use = *use_rec++) != NULL) | |
c6741572 | 195 | if ((DF_REF_FLAGS (use) & DF_REF_AT_TOP) == top_flag) |
00952e97 | 196 | { |
c6741572 PB |
197 | unsigned int uregno = DF_REF_REGNO (use); |
198 | if (VEC_index (df_ref, reg_defs, uregno) | |
199 | && !bitmap_bit_p (local_md, uregno)) | |
200 | VEC_replace (df_ref, use_def_ref, DF_REF_ID (use), | |
201 | VEC_index (df_ref, reg_defs, uregno)); | |
202 | } | |
203 | } | |
204 | ||
00952e97 | 205 | |
c6741572 PB |
206 | static void |
207 | single_def_use_enter_block (struct dom_walk_data *walk_data, basic_block bb) | |
208 | { | |
209 | bitmap local_md = (bitmap) walk_data->global_data; | |
210 | int bb_index = bb->index; | |
211 | struct df_md_bb_info *bb_info = df_md_get_bb_info (bb_index); | |
212 | rtx insn; | |
213 | ||
214 | bitmap_copy (local_md, bb_info->in); | |
215 | ||
216 | /* Push a marker for the leave_block callback. */ | |
217 | VEC_safe_push (df_ref, heap, reg_defs_stack, NULL); | |
218 | ||
219 | process_uses (local_md, df_get_artificial_uses (bb_index), DF_REF_AT_TOP); | |
220 | process_defs (local_md, df_get_artificial_defs (bb_index), DF_REF_AT_TOP); | |
221 | ||
222 | FOR_BB_INSNS (bb, insn) | |
223 | if (INSN_P (insn)) | |
224 | { | |
225 | unsigned int uid = INSN_UID (insn); | |
226 | process_uses (local_md, DF_INSN_UID_USES (uid), 0); | |
227 | process_uses (local_md, DF_INSN_UID_EQ_USES (uid), 0); | |
228 | process_defs (local_md, DF_INSN_UID_DEFS (uid), 0); | |
00952e97 | 229 | } |
c6741572 PB |
230 | |
231 | process_uses (local_md, df_get_artificial_uses (bb_index), 0); | |
232 | process_defs (local_md, df_get_artificial_defs (bb_index), 0); | |
233 | } | |
234 | ||
235 | /* Pop the definitions created in this basic block when leaving its | |
236 | dominated parts. */ | |
237 | ||
238 | static void | |
239 | single_def_use_leave_block (struct dom_walk_data *walk_data ATTRIBUTE_UNUSED, | |
240 | basic_block bb ATTRIBUTE_UNUSED) | |
241 | { | |
242 | df_ref saved_def; | |
243 | while ((saved_def = VEC_pop (df_ref, reg_defs_stack)) != NULL) | |
244 | { | |
245 | unsigned int dregno = DF_REF_REGNO (saved_def); | |
246 | ||
247 | /* See also process_defs. */ | |
248 | if (saved_def == VEC_index (df_ref, reg_defs, dregno)) | |
249 | VEC_replace (df_ref, reg_defs, dregno, NULL); | |
250 | else | |
251 | VEC_replace (df_ref, reg_defs, dregno, saved_def); | |
252 | } | |
00952e97 PB |
253 | } |
254 | ||
255 | ||
c6741572 PB |
256 | /* Build a vector holding the reaching definitions of uses reached by a |
257 | single dominating definition. */ | |
00952e97 PB |
258 | |
259 | static void | |
260 | build_single_def_use_links (void) | |
261 | { | |
c6741572 PB |
262 | struct dom_walk_data walk_data; |
263 | bitmap local_md; | |
00952e97 | 264 | |
c6741572 PB |
265 | /* We use the multiple definitions problem to compute our restricted |
266 | use-def chains. */ | |
00952e97 | 267 | df_set_flags (DF_EQ_NOTES); |
c6741572 | 268 | df_md_add_problem (); |
00952e97 PB |
269 | df_analyze (); |
270 | df_maybe_reorganize_use_refs (DF_REF_ORDER_BY_INSN_WITH_NOTES); | |
271 | ||
272 | use_def_ref = VEC_alloc (df_ref, heap, DF_USES_TABLE_SIZE ()); | |
c6741572 | 273 | VEC_safe_grow_cleared (df_ref, heap, use_def_ref, DF_USES_TABLE_SIZE ()); |
00952e97 | 274 | |
c6741572 PB |
275 | reg_defs = VEC_alloc (df_ref, heap, max_reg_num ()); |
276 | VEC_safe_grow_cleared (df_ref, heap, reg_defs, max_reg_num ()); | |
00952e97 | 277 | |
c6741572 PB |
278 | reg_defs_stack = VEC_alloc (df_ref, heap, n_basic_blocks * 10); |
279 | local_md = BITMAP_ALLOC (NULL); | |
280 | ||
281 | /* Walk the dominator tree looking for single reaching definitions | |
282 | dominating the uses. This is similar to how SSA form is built. */ | |
283 | walk_data.dom_direction = CDI_DOMINATORS; | |
284 | walk_data.initialize_block_local_data = NULL; | |
285 | walk_data.before_dom_children = single_def_use_enter_block; | |
286 | walk_data.after_dom_children = single_def_use_leave_block; | |
287 | walk_data.global_data = local_md; | |
00952e97 | 288 | |
c6741572 PB |
289 | init_walk_dominator_tree (&walk_data); |
290 | walk_dominator_tree (&walk_data, ENTRY_BLOCK_PTR); | |
291 | fini_walk_dominator_tree (&walk_data); | |
292 | ||
293 | BITMAP_FREE (local_md); | |
294 | VEC_free (df_ref, heap, reg_defs); | |
295 | VEC_free (df_ref, heap, reg_defs_stack); | |
00952e97 | 296 | } |
c6741572 | 297 | |
a52b023a PB |
298 | \f |
299 | /* Do not try to replace constant addresses or addresses of local and | |
300 | argument slots. These MEM expressions are made only once and inserted | |
301 | in many instructions, as well as being used to control symbol table | |
302 | output. It is not safe to clobber them. | |
303 | ||
304 | There are some uncommon cases where the address is already in a register | |
305 | for some reason, but we cannot take advantage of that because we have | |
306 | no easy way to unshare the MEM. In addition, looking up all stack | |
307 | addresses is costly. */ | |
308 | ||
309 | static bool | |
310 | can_simplify_addr (rtx addr) | |
311 | { | |
312 | rtx reg; | |
313 | ||
314 | if (CONSTANT_ADDRESS_P (addr)) | |
315 | return false; | |
316 | ||
317 | if (GET_CODE (addr) == PLUS) | |
318 | reg = XEXP (addr, 0); | |
319 | else | |
320 | reg = addr; | |
321 | ||
322 | return (!REG_P (reg) | |
323 | || (REGNO (reg) != FRAME_POINTER_REGNUM | |
324 | && REGNO (reg) != HARD_FRAME_POINTER_REGNUM | |
325 | && REGNO (reg) != ARG_POINTER_REGNUM)); | |
326 | } | |
327 | ||
328 | /* Returns a canonical version of X for the address, from the point of view, | |
329 | that all multiplications are represented as MULT instead of the multiply | |
330 | by a power of 2 being represented as ASHIFT. | |
331 | ||
332 | Every ASHIFT we find has been made by simplify_gen_binary and was not | |
333 | there before, so it is not shared. So we can do this in place. */ | |
334 | ||
335 | static void | |
336 | canonicalize_address (rtx x) | |
337 | { | |
338 | for (;;) | |
339 | switch (GET_CODE (x)) | |
340 | { | |
341 | case ASHIFT: | |
481683e1 | 342 | if (CONST_INT_P (XEXP (x, 1)) |
a52b023a PB |
343 | && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (GET_MODE (x)) |
344 | && INTVAL (XEXP (x, 1)) >= 0) | |
345 | { | |
346 | HOST_WIDE_INT shift = INTVAL (XEXP (x, 1)); | |
347 | PUT_CODE (x, MULT); | |
348 | XEXP (x, 1) = gen_int_mode ((HOST_WIDE_INT) 1 << shift, | |
349 | GET_MODE (x)); | |
350 | } | |
351 | ||
352 | x = XEXP (x, 0); | |
353 | break; | |
354 | ||
355 | case PLUS: | |
356 | if (GET_CODE (XEXP (x, 0)) == PLUS | |
357 | || GET_CODE (XEXP (x, 0)) == ASHIFT | |
358 | || GET_CODE (XEXP (x, 0)) == CONST) | |
359 | canonicalize_address (XEXP (x, 0)); | |
360 | ||
361 | x = XEXP (x, 1); | |
362 | break; | |
363 | ||
364 | case CONST: | |
365 | x = XEXP (x, 0); | |
366 | break; | |
367 | ||
368 | default: | |
369 | return; | |
370 | } | |
371 | } | |
372 | ||
373 | /* OLD is a memory address. Return whether it is good to use NEW instead, | |
374 | for a memory access in the given MODE. */ | |
375 | ||
376 | static bool | |
f40751dd JH |
377 | should_replace_address (rtx old_rtx, rtx new_rtx, enum machine_mode mode, |
378 | bool speed) | |
a52b023a PB |
379 | { |
380 | int gain; | |
381 | ||
60564289 | 382 | if (rtx_equal_p (old_rtx, new_rtx) || !memory_address_p (mode, new_rtx)) |
a52b023a PB |
383 | return false; |
384 | ||
385 | /* Copy propagation is always ok. */ | |
60564289 | 386 | if (REG_P (old_rtx) && REG_P (new_rtx)) |
a52b023a PB |
387 | return true; |
388 | ||
389 | /* Prefer the new address if it is less expensive. */ | |
f40751dd | 390 | gain = address_cost (old_rtx, mode, speed) - address_cost (new_rtx, mode, speed); |
a52b023a PB |
391 | |
392 | /* If the addresses have equivalent cost, prefer the new address | |
393 | if it has the highest `rtx_cost'. That has the potential of | |
394 | eliminating the most insns without additional costs, and it | |
395 | is the same that cse.c used to do. */ | |
396 | if (gain == 0) | |
f40751dd | 397 | gain = rtx_cost (new_rtx, SET, speed) - rtx_cost (old_rtx, SET, speed); |
a52b023a PB |
398 | |
399 | return (gain > 0); | |
400 | } | |
401 | ||
460d667d PB |
402 | |
403 | /* Flags for the last parameter of propagate_rtx_1. */ | |
404 | ||
405 | enum { | |
406 | /* If PR_CAN_APPEAR is true, propagate_rtx_1 always returns true; | |
407 | if it is false, propagate_rtx_1 returns false if, for at least | |
408 | one occurrence OLD, it failed to collapse the result to a constant. | |
409 | For example, (mult:M (reg:M A) (minus:M (reg:M B) (reg:M A))) may | |
410 | collapse to zero if replacing (reg:M B) with (reg:M A). | |
411 | ||
412 | PR_CAN_APPEAR is disregarded inside MEMs: in that case, | |
413 | propagate_rtx_1 just tries to make cheaper and valid memory | |
414 | addresses. */ | |
415 | PR_CAN_APPEAR = 1, | |
416 | ||
417 | /* If PR_HANDLE_MEM is not set, propagate_rtx_1 won't attempt any replacement | |
418 | outside memory addresses. This is needed because propagate_rtx_1 does | |
419 | not do any analysis on memory; thus it is very conservative and in general | |
420 | it will fail if non-read-only MEMs are found in the source expression. | |
421 | ||
422 | PR_HANDLE_MEM is set when the source of the propagation was not | |
423 | another MEM. Then, it is safe not to treat non-read-only MEMs as | |
424 | ``opaque'' objects. */ | |
f40751dd JH |
425 | PR_HANDLE_MEM = 2, |
426 | ||
427 | /* Set when costs should be optimized for speed. */ | |
428 | PR_OPTIMIZE_FOR_SPEED = 4 | |
460d667d PB |
429 | }; |
430 | ||
431 | ||
a52b023a PB |
432 | /* Replace all occurrences of OLD in *PX with NEW and try to simplify the |
433 | resulting expression. Replace *PX with a new RTL expression if an | |
434 | occurrence of OLD was found. | |
435 | ||
a52b023a PB |
436 | This is only a wrapper around simplify-rtx.c: do not add any pattern |
437 | matching code here. (The sole exception is the handling of LO_SUM, but | |
438 | that is because there is no simplify_gen_* function for LO_SUM). */ | |
439 | ||
440 | static bool | |
60564289 | 441 | propagate_rtx_1 (rtx *px, rtx old_rtx, rtx new_rtx, int flags) |
a52b023a PB |
442 | { |
443 | rtx x = *px, tem = NULL_RTX, op0, op1, op2; | |
444 | enum rtx_code code = GET_CODE (x); | |
445 | enum machine_mode mode = GET_MODE (x); | |
446 | enum machine_mode op_mode; | |
460d667d | 447 | bool can_appear = (flags & PR_CAN_APPEAR) != 0; |
a52b023a PB |
448 | bool valid_ops = true; |
449 | ||
460d667d PB |
450 | if (!(flags & PR_HANDLE_MEM) && MEM_P (x) && !MEM_READONLY_P (x)) |
451 | { | |
452 | /* If unsafe, change MEMs to CLOBBERs or SCRATCHes (to preserve whether | |
453 | they have side effects or not). */ | |
454 | *px = (side_effects_p (x) | |
455 | ? gen_rtx_CLOBBER (GET_MODE (x), const0_rtx) | |
456 | : gen_rtx_SCRATCH (GET_MODE (x))); | |
457 | return false; | |
458 | } | |
a52b023a | 459 | |
460d667d PB |
460 | /* If X is OLD_RTX, return NEW_RTX. But not if replacing only within an |
461 | address, and we are *not* inside one. */ | |
60564289 | 462 | if (x == old_rtx) |
a52b023a | 463 | { |
60564289 | 464 | *px = new_rtx; |
a52b023a PB |
465 | return can_appear; |
466 | } | |
467 | ||
460d667d | 468 | /* If this is an expression, try recursive substitution. */ |
a52b023a PB |
469 | switch (GET_RTX_CLASS (code)) |
470 | { | |
471 | case RTX_UNARY: | |
472 | op0 = XEXP (x, 0); | |
473 | op_mode = GET_MODE (op0); | |
60564289 | 474 | valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags); |
a52b023a PB |
475 | if (op0 == XEXP (x, 0)) |
476 | return true; | |
477 | tem = simplify_gen_unary (code, mode, op0, op_mode); | |
478 | break; | |
479 | ||
480 | case RTX_BIN_ARITH: | |
481 | case RTX_COMM_ARITH: | |
482 | op0 = XEXP (x, 0); | |
483 | op1 = XEXP (x, 1); | |
60564289 KG |
484 | valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags); |
485 | valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags); | |
a52b023a PB |
486 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) |
487 | return true; | |
488 | tem = simplify_gen_binary (code, mode, op0, op1); | |
489 | break; | |
490 | ||
491 | case RTX_COMPARE: | |
492 | case RTX_COMM_COMPARE: | |
493 | op0 = XEXP (x, 0); | |
494 | op1 = XEXP (x, 1); | |
495 | op_mode = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1); | |
60564289 KG |
496 | valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags); |
497 | valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags); | |
a52b023a PB |
498 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) |
499 | return true; | |
500 | tem = simplify_gen_relational (code, mode, op_mode, op0, op1); | |
501 | break; | |
502 | ||
503 | case RTX_TERNARY: | |
504 | case RTX_BITFIELD_OPS: | |
505 | op0 = XEXP (x, 0); | |
506 | op1 = XEXP (x, 1); | |
507 | op2 = XEXP (x, 2); | |
508 | op_mode = GET_MODE (op0); | |
60564289 KG |
509 | valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags); |
510 | valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags); | |
511 | valid_ops &= propagate_rtx_1 (&op2, old_rtx, new_rtx, flags); | |
a52b023a PB |
512 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1) && op2 == XEXP (x, 2)) |
513 | return true; | |
514 | if (op_mode == VOIDmode) | |
515 | op_mode = GET_MODE (op0); | |
516 | tem = simplify_gen_ternary (code, mode, op_mode, op0, op1, op2); | |
517 | break; | |
518 | ||
519 | case RTX_EXTRA: | |
520 | /* The only case we try to handle is a SUBREG. */ | |
521 | if (code == SUBREG) | |
522 | { | |
523 | op0 = XEXP (x, 0); | |
60564289 | 524 | valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags); |
a52b023a PB |
525 | if (op0 == XEXP (x, 0)) |
526 | return true; | |
527 | tem = simplify_gen_subreg (mode, op0, GET_MODE (SUBREG_REG (x)), | |
528 | SUBREG_BYTE (x)); | |
529 | } | |
530 | break; | |
531 | ||
532 | case RTX_OBJ: | |
60564289 | 533 | if (code == MEM && x != new_rtx) |
a52b023a PB |
534 | { |
535 | rtx new_op0; | |
536 | op0 = XEXP (x, 0); | |
537 | ||
538 | /* There are some addresses that we cannot work on. */ | |
539 | if (!can_simplify_addr (op0)) | |
540 | return true; | |
541 | ||
542 | op0 = new_op0 = targetm.delegitimize_address (op0); | |
60564289 | 543 | valid_ops &= propagate_rtx_1 (&new_op0, old_rtx, new_rtx, |
460d667d | 544 | flags | PR_CAN_APPEAR); |
a52b023a PB |
545 | |
546 | /* Dismiss transformation that we do not want to carry on. */ | |
547 | if (!valid_ops | |
548 | || new_op0 == op0 | |
c0729306 PB |
549 | || !(GET_MODE (new_op0) == GET_MODE (op0) |
550 | || GET_MODE (new_op0) == VOIDmode)) | |
a52b023a PB |
551 | return true; |
552 | ||
553 | canonicalize_address (new_op0); | |
554 | ||
555 | /* Copy propagations are always ok. Otherwise check the costs. */ | |
60564289 | 556 | if (!(REG_P (old_rtx) && REG_P (new_rtx)) |
f40751dd JH |
557 | && !should_replace_address (op0, new_op0, GET_MODE (x), |
558 | flags & PR_OPTIMIZE_FOR_SPEED)) | |
a52b023a PB |
559 | return true; |
560 | ||
561 | tem = replace_equiv_address_nv (x, new_op0); | |
562 | } | |
563 | ||
564 | else if (code == LO_SUM) | |
565 | { | |
566 | op0 = XEXP (x, 0); | |
567 | op1 = XEXP (x, 1); | |
568 | ||
569 | /* The only simplification we do attempts to remove references to op0 | |
570 | or make it constant -- in both cases, op0's invalidity will not | |
571 | make the result invalid. */ | |
60564289 KG |
572 | propagate_rtx_1 (&op0, old_rtx, new_rtx, flags | PR_CAN_APPEAR); |
573 | valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags); | |
a52b023a PB |
574 | if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1)) |
575 | return true; | |
576 | ||
577 | /* (lo_sum (high x) x) -> x */ | |
578 | if (GET_CODE (op0) == HIGH && rtx_equal_p (XEXP (op0, 0), op1)) | |
579 | tem = op1; | |
580 | else | |
581 | tem = gen_rtx_LO_SUM (mode, op0, op1); | |
582 | ||
583 | /* OP1 is likely not a legitimate address, otherwise there would have | |
584 | been no LO_SUM. We want it to disappear if it is invalid, return | |
585 | false in that case. */ | |
586 | return memory_address_p (mode, tem); | |
587 | } | |
588 | ||
589 | else if (code == REG) | |
590 | { | |
60564289 | 591 | if (rtx_equal_p (x, old_rtx)) |
a52b023a | 592 | { |
60564289 | 593 | *px = new_rtx; |
a52b023a PB |
594 | return can_appear; |
595 | } | |
596 | } | |
597 | break; | |
598 | ||
599 | default: | |
600 | break; | |
601 | } | |
602 | ||
603 | /* No change, no trouble. */ | |
604 | if (tem == NULL_RTX) | |
605 | return true; | |
606 | ||
607 | *px = tem; | |
608 | ||
609 | /* The replacement we made so far is valid, if all of the recursive | |
610 | replacements were valid, or we could simplify everything to | |
611 | a constant. */ | |
612 | return valid_ops || can_appear || CONSTANT_P (tem); | |
613 | } | |
614 | ||
460d667d PB |
615 | |
616 | /* for_each_rtx traversal function that returns 1 if BODY points to | |
617 | a non-constant mem. */ | |
618 | ||
619 | static int | |
620 | varying_mem_p (rtx *body, void *data ATTRIBUTE_UNUSED) | |
621 | { | |
622 | rtx x = *body; | |
623 | return MEM_P (x) && !MEM_READONLY_P (x); | |
624 | } | |
625 | ||
626 | ||
a52b023a | 627 | /* Replace all occurrences of OLD in X with NEW and try to simplify the |
2f8e468b | 628 | resulting expression (in mode MODE). Return a new expression if it is |
a52b023a PB |
629 | a constant, otherwise X. |
630 | ||
631 | Simplifications where occurrences of NEW collapse to a constant are always | |
632 | accepted. All simplifications are accepted if NEW is a pseudo too. | |
633 | Otherwise, we accept simplifications that have a lower or equal cost. */ | |
634 | ||
635 | static rtx | |
f40751dd JH |
636 | propagate_rtx (rtx x, enum machine_mode mode, rtx old_rtx, rtx new_rtx, |
637 | bool speed) | |
a52b023a PB |
638 | { |
639 | rtx tem; | |
640 | bool collapsed; | |
460d667d | 641 | int flags; |
a52b023a | 642 | |
60564289 | 643 | if (REG_P (new_rtx) && REGNO (new_rtx) < FIRST_PSEUDO_REGISTER) |
a52b023a PB |
644 | return NULL_RTX; |
645 | ||
460d667d | 646 | flags = 0; |
60564289 | 647 | if (REG_P (new_rtx) || CONSTANT_P (new_rtx)) |
460d667d | 648 | flags |= PR_CAN_APPEAR; |
60564289 | 649 | if (!for_each_rtx (&new_rtx, varying_mem_p, NULL)) |
460d667d | 650 | flags |= PR_HANDLE_MEM; |
a52b023a | 651 | |
f40751dd JH |
652 | if (speed) |
653 | flags |= PR_OPTIMIZE_FOR_SPEED; | |
654 | ||
a52b023a | 655 | tem = x; |
60564289 | 656 | collapsed = propagate_rtx_1 (&tem, old_rtx, copy_rtx (new_rtx), flags); |
a52b023a PB |
657 | if (tem == x || !collapsed) |
658 | return NULL_RTX; | |
659 | ||
660 | /* gen_lowpart_common will not be able to process VOIDmode entities other | |
661 | than CONST_INTs. */ | |
481683e1 | 662 | if (GET_MODE (tem) == VOIDmode && !CONST_INT_P (tem)) |
a52b023a PB |
663 | return NULL_RTX; |
664 | ||
665 | if (GET_MODE (tem) == VOIDmode) | |
666 | tem = rtl_hooks.gen_lowpart_no_emit (mode, tem); | |
667 | else | |
668 | gcc_assert (GET_MODE (tem) == mode); | |
669 | ||
670 | return tem; | |
671 | } | |
672 | ||
673 | ||
674 | \f | |
675 | ||
676 | /* Return true if the register from reference REF is killed | |
677 | between FROM to (but not including) TO. */ | |
678 | ||
6fb5fa3c | 679 | static bool |
57512f53 | 680 | local_ref_killed_between_p (df_ref ref, rtx from, rtx to) |
a52b023a PB |
681 | { |
682 | rtx insn; | |
a52b023a PB |
683 | |
684 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
685 | { | |
57512f53 | 686 | df_ref *def_rec; |
a52b023a PB |
687 | if (!INSN_P (insn)) |
688 | continue; | |
689 | ||
6fb5fa3c | 690 | for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++) |
a52b023a | 691 | { |
57512f53 | 692 | df_ref def = *def_rec; |
a52b023a PB |
693 | if (DF_REF_REGNO (ref) == DF_REF_REGNO (def)) |
694 | return true; | |
a52b023a PB |
695 | } |
696 | } | |
697 | return false; | |
698 | } | |
699 | ||
700 | ||
701 | /* Check if the given DEF is available in INSN. This would require full | |
702 | computation of available expressions; we check only restricted conditions: | |
703 | - if DEF is the sole definition of its register, go ahead; | |
704 | - in the same basic block, we check for no definitions killing the | |
705 | definition of DEF_INSN; | |
706 | - if USE's basic block has DEF's basic block as the sole predecessor, | |
707 | we check if the definition is killed after DEF_INSN or before | |
708 | TARGET_INSN insn, in their respective basic blocks. */ | |
709 | static bool | |
57512f53 | 710 | use_killed_between (df_ref use, rtx def_insn, rtx target_insn) |
a52b023a | 711 | { |
6e0b633f PB |
712 | basic_block def_bb = BLOCK_FOR_INSN (def_insn); |
713 | basic_block target_bb = BLOCK_FOR_INSN (target_insn); | |
a52b023a | 714 | int regno; |
57512f53 | 715 | df_ref def; |
a52b023a | 716 | |
c6741572 PB |
717 | /* We used to have a def reaching a use that is _before_ the def, |
718 | with the def not dominating the use even though the use and def | |
719 | are in the same basic block, when a register may be used | |
720 | uninitialized in a loop. This should not happen anymore since | |
721 | we do not use reaching definitions, but still we test for such | |
722 | cases and assume that DEF is not available. */ | |
6e0b633f | 723 | if (def_bb == target_bb |
6fb5fa3c | 724 | ? DF_INSN_LUID (def_insn) >= DF_INSN_LUID (target_insn) |
6e0b633f PB |
725 | : !dominated_by_p (CDI_DOMINATORS, target_bb, def_bb)) |
726 | return true; | |
727 | ||
a52b023a | 728 | /* Check if the reg in USE has only one definition. We already |
b08c5108 PB |
729 | know that this definition reaches use, or we wouldn't be here. |
730 | However, this is invalid for hard registers because if they are | |
731 | live at the beginning of the function it does not mean that we | |
732 | have an uninitialized access. */ | |
a52b023a | 733 | regno = DF_REF_REGNO (use); |
6fb5fa3c | 734 | def = DF_REG_DEF_CHAIN (regno); |
b08c5108 | 735 | if (def |
57512f53 | 736 | && DF_REF_NEXT_REG (def) == NULL |
b08c5108 | 737 | && regno >= FIRST_PSEUDO_REGISTER) |
a52b023a PB |
738 | return false; |
739 | ||
6e0b633f | 740 | /* Check locally if we are in the same basic block. */ |
a52b023a | 741 | if (def_bb == target_bb) |
6e0b633f | 742 | return local_ref_killed_between_p (use, def_insn, target_insn); |
a52b023a PB |
743 | |
744 | /* Finally, if DEF_BB is the sole predecessor of TARGET_BB. */ | |
745 | if (single_pred_p (target_bb) | |
746 | && single_pred (target_bb) == def_bb) | |
747 | { | |
57512f53 | 748 | df_ref x; |
a52b023a PB |
749 | |
750 | /* See if USE is killed between DEF_INSN and the last insn in the | |
751 | basic block containing DEF_INSN. */ | |
6fb5fa3c | 752 | x = df_bb_regno_last_def_find (def_bb, regno); |
50e94c7e | 753 | if (x && DF_INSN_LUID (DF_REF_INSN (x)) >= DF_INSN_LUID (def_insn)) |
a52b023a PB |
754 | return true; |
755 | ||
756 | /* See if USE is killed between TARGET_INSN and the first insn in the | |
757 | basic block containing TARGET_INSN. */ | |
6fb5fa3c | 758 | x = df_bb_regno_first_def_find (target_bb, regno); |
50e94c7e | 759 | if (x && DF_INSN_LUID (DF_REF_INSN (x)) < DF_INSN_LUID (target_insn)) |
a52b023a PB |
760 | return true; |
761 | ||
762 | return false; | |
763 | } | |
764 | ||
765 | /* Otherwise assume the worst case. */ | |
766 | return true; | |
767 | } | |
768 | ||
769 | ||
a52b023a PB |
770 | /* Check if all uses in DEF_INSN can be used in TARGET_INSN. This |
771 | would require full computation of available expressions; | |
772 | we check only restricted conditions, see use_killed_between. */ | |
773 | static bool | |
774 | all_uses_available_at (rtx def_insn, rtx target_insn) | |
775 | { | |
57512f53 | 776 | df_ref *use_rec; |
50e94c7e | 777 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (def_insn); |
a52b023a PB |
778 | rtx def_set = single_set (def_insn); |
779 | ||
780 | gcc_assert (def_set); | |
781 | ||
782 | /* If target_insn comes right after def_insn, which is very common | |
783 | for addresses, we can use a quicker test. */ | |
784 | if (NEXT_INSN (def_insn) == target_insn | |
785 | && REG_P (SET_DEST (def_set))) | |
786 | { | |
787 | rtx def_reg = SET_DEST (def_set); | |
788 | ||
789 | /* If the insn uses the reg that it defines, the substitution is | |
790 | invalid. */ | |
50e94c7e | 791 | for (use_rec = DF_INSN_INFO_USES (insn_info); *use_rec; use_rec++) |
6fb5fa3c | 792 | { |
57512f53 | 793 | df_ref use = *use_rec; |
6fb5fa3c DB |
794 | if (rtx_equal_p (DF_REF_REG (use), def_reg)) |
795 | return false; | |
796 | } | |
50e94c7e | 797 | for (use_rec = DF_INSN_INFO_EQ_USES (insn_info); *use_rec; use_rec++) |
6fb5fa3c | 798 | { |
57512f53 KZ |
799 | df_ref use = *use_rec; |
800 | if (rtx_equal_p (DF_REF_REG (use), def_reg)) | |
6fb5fa3c DB |
801 | return false; |
802 | } | |
a52b023a PB |
803 | } |
804 | else | |
805 | { | |
806 | /* Look at all the uses of DEF_INSN, and see if they are not | |
807 | killed between DEF_INSN and TARGET_INSN. */ | |
50e94c7e | 808 | for (use_rec = DF_INSN_INFO_USES (insn_info); *use_rec; use_rec++) |
6fb5fa3c | 809 | { |
57512f53 | 810 | df_ref use = *use_rec; |
6fb5fa3c DB |
811 | if (use_killed_between (use, def_insn, target_insn)) |
812 | return false; | |
813 | } | |
50e94c7e | 814 | for (use_rec = DF_INSN_INFO_EQ_USES (insn_info); *use_rec; use_rec++) |
6fb5fa3c | 815 | { |
57512f53 | 816 | df_ref use = *use_rec; |
6fb5fa3c DB |
817 | if (use_killed_between (use, def_insn, target_insn)) |
818 | return false; | |
819 | } | |
a52b023a PB |
820 | } |
821 | ||
460d667d | 822 | return true; |
a52b023a PB |
823 | } |
824 | ||
825 | \f | |
826 | struct find_occurrence_data | |
827 | { | |
828 | rtx find; | |
829 | rtx *retval; | |
830 | }; | |
831 | ||
832 | /* Callback for for_each_rtx, used in find_occurrence. | |
833 | See if PX is the rtx we have to find. Return 1 to stop for_each_rtx | |
834 | if successful, or 0 to continue traversing otherwise. */ | |
835 | ||
836 | static int | |
837 | find_occurrence_callback (rtx *px, void *data) | |
838 | { | |
839 | struct find_occurrence_data *fod = (struct find_occurrence_data *) data; | |
840 | rtx x = *px; | |
841 | rtx find = fod->find; | |
842 | ||
843 | if (x == find) | |
844 | { | |
845 | fod->retval = px; | |
846 | return 1; | |
847 | } | |
848 | ||
849 | return 0; | |
850 | } | |
851 | ||
852 | /* Return a pointer to one of the occurrences of register FIND in *PX. */ | |
853 | ||
854 | static rtx * | |
855 | find_occurrence (rtx *px, rtx find) | |
856 | { | |
857 | struct find_occurrence_data data; | |
858 | ||
859 | gcc_assert (REG_P (find) | |
860 | || (GET_CODE (find) == SUBREG | |
861 | && REG_P (SUBREG_REG (find)))); | |
862 | ||
863 | data.find = find; | |
864 | data.retval = NULL; | |
865 | for_each_rtx (px, find_occurrence_callback, &data); | |
866 | return data.retval; | |
867 | } | |
868 | ||
869 | \f | |
870 | /* Inside INSN, the expression rooted at *LOC has been changed, moving some | |
6fb5fa3c | 871 | uses from USE_VEC. Find those that are present, and create new items |
a52b023a PB |
872 | in the data flow object of the pass. Mark any new uses as having the |
873 | given TYPE. */ | |
874 | static void | |
57512f53 | 875 | update_df (rtx insn, rtx *loc, df_ref *use_rec, enum df_ref_type type, |
a52b023a PB |
876 | int new_flags) |
877 | { | |
6fb5fa3c | 878 | bool changed = false; |
a52b023a PB |
879 | |
880 | /* Add a use for the registers that were propagated. */ | |
6fb5fa3c | 881 | while (*use_rec) |
a52b023a | 882 | { |
57512f53 KZ |
883 | df_ref use = *use_rec; |
884 | df_ref orig_use = use, new_use; | |
ca9052ce KZ |
885 | int width = -1; |
886 | int offset = -1; | |
81f40b79 | 887 | enum machine_mode mode = VOIDmode; |
a52b023a | 888 | rtx *new_loc = find_occurrence (loc, DF_REF_REG (orig_use)); |
6fb5fa3c | 889 | use_rec++; |
a52b023a PB |
890 | |
891 | if (!new_loc) | |
892 | continue; | |
893 | ||
ca9052ce KZ |
894 | if (DF_REF_FLAGS_IS_SET (orig_use, DF_REF_SIGN_EXTRACT | DF_REF_ZERO_EXTRACT)) |
895 | { | |
cc806ac1 RS |
896 | width = DF_REF_EXTRACT_WIDTH (orig_use); |
897 | offset = DF_REF_EXTRACT_OFFSET (orig_use); | |
898 | mode = DF_REF_EXTRACT_MODE (orig_use); | |
ca9052ce KZ |
899 | } |
900 | ||
a52b023a PB |
901 | /* Add a new insn use. Use the original type, because it says if the |
902 | use was within a MEM. */ | |
6fb5fa3c | 903 | new_use = df_ref_create (DF_REF_REG (orig_use), new_loc, |
a52b023a | 904 | insn, BLOCK_FOR_INSN (insn), |
cc806ac1 RS |
905 | type, DF_REF_FLAGS (orig_use) | new_flags, |
906 | width, offset, mode); | |
a52b023a PB |
907 | |
908 | /* Set up the use-def chain. */ | |
00952e97 PB |
909 | gcc_assert (DF_REF_ID (new_use) == (int) VEC_length (df_ref, use_def_ref)); |
910 | VEC_safe_push (df_ref, heap, use_def_ref, get_def_for_use (orig_use)); | |
6fb5fa3c | 911 | changed = true; |
a52b023a | 912 | } |
6fb5fa3c DB |
913 | if (changed) |
914 | df_insn_rescan (insn); | |
a52b023a PB |
915 | } |
916 | ||
917 | ||
918 | /* Try substituting NEW into LOC, which originated from forward propagation | |
919 | of USE's value from DEF_INSN. SET_REG_EQUAL says whether we are | |
920 | substituting the whole SET_SRC, so we can set a REG_EQUAL note if the | |
921 | new insn is not recognized. Return whether the substitution was | |
922 | performed. */ | |
923 | ||
924 | static bool | |
57512f53 | 925 | try_fwprop_subst (df_ref use, rtx *loc, rtx new_rtx, rtx def_insn, bool set_reg_equal) |
a52b023a PB |
926 | { |
927 | rtx insn = DF_REF_INSN (use); | |
928 | enum df_ref_type type = DF_REF_TYPE (use); | |
929 | int flags = DF_REF_FLAGS (use); | |
de266950 | 930 | rtx set = single_set (insn); |
f40751dd | 931 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); |
e25b7843 | 932 | int old_cost = 0; |
de266950 | 933 | bool ok; |
a52b023a | 934 | |
e25b7843 AM |
935 | /* forward_propagate_subreg may be operating on an instruction with |
936 | multiple sets. If so, assume the cost of the new instruction is | |
937 | not greater than the old one. */ | |
938 | if (set) | |
939 | old_cost = rtx_cost (SET_SRC (set), SET, speed); | |
a52b023a PB |
940 | if (dump_file) |
941 | { | |
942 | fprintf (dump_file, "\nIn insn %d, replacing\n ", INSN_UID (insn)); | |
943 | print_inline_rtx (dump_file, *loc, 2); | |
944 | fprintf (dump_file, "\n with "); | |
60564289 | 945 | print_inline_rtx (dump_file, new_rtx, 2); |
a52b023a PB |
946 | fprintf (dump_file, "\n"); |
947 | } | |
948 | ||
60564289 | 949 | validate_unshare_change (insn, loc, new_rtx, true); |
de266950 PB |
950 | if (!verify_changes (0)) |
951 | { | |
952 | if (dump_file) | |
953 | fprintf (dump_file, "Changes to insn %d not recognized\n", | |
954 | INSN_UID (insn)); | |
955 | ok = false; | |
956 | } | |
957 | ||
ea668464 | 958 | else if (DF_REF_TYPE (use) == DF_REF_REG_USE |
e25b7843 | 959 | && set |
f40751dd | 960 | && rtx_cost (SET_SRC (set), SET, speed) > old_cost) |
de266950 PB |
961 | { |
962 | if (dump_file) | |
963 | fprintf (dump_file, "Changes to insn %d not profitable\n", | |
964 | INSN_UID (insn)); | |
965 | ok = false; | |
966 | } | |
967 | ||
968 | else | |
a52b023a | 969 | { |
a52b023a PB |
970 | if (dump_file) |
971 | fprintf (dump_file, "Changed insn %d\n", INSN_UID (insn)); | |
de266950 PB |
972 | ok = true; |
973 | } | |
974 | ||
975 | if (ok) | |
976 | { | |
977 | confirm_change_group (); | |
978 | num_changes++; | |
a52b023a | 979 | |
6fb5fa3c | 980 | df_ref_remove (use); |
60564289 | 981 | if (!CONSTANT_P (new_rtx)) |
6fb5fa3c | 982 | { |
50e94c7e SB |
983 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (def_insn); |
984 | update_df (insn, loc, DF_INSN_INFO_USES (insn_info), type, flags); | |
985 | update_df (insn, loc, DF_INSN_INFO_EQ_USES (insn_info), type, flags); | |
6fb5fa3c | 986 | } |
a52b023a PB |
987 | } |
988 | else | |
989 | { | |
de266950 | 990 | cancel_changes (0); |
a52b023a | 991 | |
3e836a31 | 992 | /* Can also record a simplified value in a REG_EQUAL note, |
4a8cae83 SB |
993 | making a new one if one does not already exist. */ |
994 | if (set_reg_equal) | |
a52b023a PB |
995 | { |
996 | if (dump_file) | |
997 | fprintf (dump_file, " Setting REG_EQUAL note\n"); | |
998 | ||
60564289 | 999 | set_unique_reg_note (insn, REG_EQUAL, copy_rtx (new_rtx)); |
a52b023a | 1000 | |
a31830a7 SB |
1001 | /* ??? Is this still necessary if we add the note through |
1002 | set_unique_reg_note? */ | |
60564289 | 1003 | if (!CONSTANT_P (new_rtx)) |
6fb5fa3c | 1004 | { |
50e94c7e SB |
1005 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (def_insn); |
1006 | update_df (insn, loc, DF_INSN_INFO_USES (insn_info), | |
6fb5fa3c | 1007 | type, DF_REF_IN_NOTE); |
50e94c7e | 1008 | update_df (insn, loc, DF_INSN_INFO_EQ_USES (insn_info), |
6fb5fa3c DB |
1009 | type, DF_REF_IN_NOTE); |
1010 | } | |
a52b023a | 1011 | } |
a52b023a | 1012 | } |
de266950 PB |
1013 | |
1014 | return ok; | |
a52b023a PB |
1015 | } |
1016 | ||
e85122be AM |
1017 | /* For the given single_set INSN, containing SRC known to be a |
1018 | ZERO_EXTEND or SIGN_EXTEND of a register, return true if INSN | |
1019 | is redundant due to the register being set by a LOAD_EXTEND_OP | |
1020 | load from memory. */ | |
1021 | ||
1022 | static bool | |
1023 | free_load_extend (rtx src, rtx insn) | |
e25b7843 | 1024 | { |
e85122be | 1025 | rtx reg; |
e25b7843 | 1026 | df_ref *use_vec; |
e85122be AM |
1027 | df_ref use, def; |
1028 | ||
1029 | reg = XEXP (src, 0); | |
1030 | #ifdef LOAD_EXTEND_OP | |
1031 | if (LOAD_EXTEND_OP (GET_MODE (reg)) != GET_CODE (src)) | |
1032 | #endif | |
1033 | return false; | |
e25b7843 AM |
1034 | |
1035 | for (use_vec = DF_INSN_USES (insn); *use_vec; use_vec++) | |
1036 | { | |
e85122be | 1037 | use = *use_vec; |
a52b023a | 1038 | |
e25b7843 AM |
1039 | if (!DF_REF_IS_ARTIFICIAL (use) |
1040 | && DF_REF_TYPE (use) == DF_REF_REG_USE | |
1041 | && DF_REF_REG (use) == reg) | |
e85122be AM |
1042 | break; |
1043 | } | |
1044 | if (!use) | |
1045 | return false; | |
1046 | ||
1047 | def = get_def_for_use (use); | |
1048 | if (!def) | |
1049 | return false; | |
1050 | ||
1051 | if (DF_REF_IS_ARTIFICIAL (def)) | |
1052 | return false; | |
1053 | ||
1054 | if (NONJUMP_INSN_P (DF_REF_INSN (def))) | |
1055 | { | |
1056 | rtx patt = PATTERN (DF_REF_INSN (def)); | |
1057 | ||
1058 | if (GET_CODE (patt) == SET | |
1059 | && GET_CODE (SET_SRC (patt)) == MEM | |
1060 | && rtx_equal_p (SET_DEST (patt), reg)) | |
1061 | return true; | |
e25b7843 | 1062 | } |
e85122be | 1063 | return false; |
e25b7843 | 1064 | } |
e25b7843 AM |
1065 | |
1066 | /* If USE is a subreg, see if it can be replaced by a pseudo. */ | |
a52b023a PB |
1067 | |
1068 | static bool | |
57512f53 | 1069 | forward_propagate_subreg (df_ref use, rtx def_insn, rtx def_set) |
a52b023a PB |
1070 | { |
1071 | rtx use_reg = DF_REF_REG (use); | |
1072 | rtx use_insn, src; | |
1073 | ||
e25b7843 | 1074 | /* Only consider subregs... */ |
a52b023a PB |
1075 | enum machine_mode use_mode = GET_MODE (use_reg); |
1076 | if (GET_CODE (use_reg) != SUBREG | |
e25b7843 | 1077 | || !REG_P (SET_DEST (def_set))) |
a52b023a PB |
1078 | return false; |
1079 | ||
e25b7843 AM |
1080 | /* If this is a paradoxical SUBREG... */ |
1081 | if (GET_MODE_SIZE (use_mode) | |
1082 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (use_reg)))) | |
1083 | { | |
1084 | /* If this is a paradoxical SUBREG, we have no idea what value the | |
1085 | extra bits would have. However, if the operand is equivalent to | |
1086 | a SUBREG whose operand is the same as our mode, and all the modes | |
1087 | are within a word, we can just use the inner operand because | |
1088 | these SUBREGs just say how to treat the register. */ | |
1089 | use_insn = DF_REF_INSN (use); | |
1090 | src = SET_SRC (def_set); | |
1091 | if (GET_CODE (src) == SUBREG | |
1092 | && REG_P (SUBREG_REG (src)) | |
1093 | && GET_MODE (SUBREG_REG (src)) == use_mode | |
1094 | && subreg_lowpart_p (src) | |
1095 | && all_uses_available_at (def_insn, use_insn)) | |
1096 | return try_fwprop_subst (use, DF_REF_LOC (use), SUBREG_REG (src), | |
1097 | def_insn, false); | |
1098 | } | |
1099 | ||
1100 | /* If this is a SUBREG of a ZERO_EXTEND or SIGN_EXTEND, and the SUBREG | |
1101 | is the low part of the reg being extended then just use the inner | |
1102 | operand. Don't do this if the ZERO_EXTEND or SIGN_EXTEND insn will | |
1103 | be removed due to it matching a LOAD_EXTEND_OP load from memory. */ | |
1104 | else if (subreg_lowpart_p (use_reg)) | |
1105 | { | |
e25b7843 AM |
1106 | use_insn = DF_REF_INSN (use); |
1107 | src = SET_SRC (def_set); | |
1108 | if ((GET_CODE (src) == ZERO_EXTEND | |
1109 | || GET_CODE (src) == SIGN_EXTEND) | |
1110 | && REG_P (XEXP (src, 0)) | |
1111 | && GET_MODE (XEXP (src, 0)) == use_mode | |
e85122be | 1112 | && !free_load_extend (src, def_insn) |
e25b7843 AM |
1113 | && all_uses_available_at (def_insn, use_insn)) |
1114 | return try_fwprop_subst (use, DF_REF_LOC (use), XEXP (src, 0), | |
1115 | def_insn, false); | |
1116 | } | |
1117 | ||
1118 | return false; | |
a52b023a PB |
1119 | } |
1120 | ||
ce372372 JJ |
1121 | /* Try to replace USE with SRC (defined in DEF_INSN) in __asm. */ |
1122 | ||
1123 | static bool | |
1124 | forward_propagate_asm (df_ref use, rtx def_insn, rtx def_set, rtx reg) | |
1125 | { | |
1126 | rtx use_insn = DF_REF_INSN (use), src, use_pat, asm_operands, new_rtx, *loc; | |
1127 | int speed_p, i; | |
1128 | df_ref *use_vec; | |
1129 | ||
1130 | gcc_assert ((DF_REF_FLAGS (use) & DF_REF_IN_NOTE) == 0); | |
1131 | ||
1132 | src = SET_SRC (def_set); | |
1133 | use_pat = PATTERN (use_insn); | |
1134 | ||
1135 | /* In __asm don't replace if src might need more registers than | |
1136 | reg, as that could increase register pressure on the __asm. */ | |
1137 | use_vec = DF_INSN_USES (def_insn); | |
1138 | if (use_vec[0] && use_vec[1]) | |
1139 | return false; | |
1140 | ||
1141 | speed_p = optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn)); | |
1142 | asm_operands = NULL_RTX; | |
1143 | switch (GET_CODE (use_pat)) | |
1144 | { | |
1145 | case ASM_OPERANDS: | |
1146 | asm_operands = use_pat; | |
1147 | break; | |
1148 | case SET: | |
1149 | if (MEM_P (SET_DEST (use_pat))) | |
1150 | { | |
1151 | loc = &SET_DEST (use_pat); | |
1152 | new_rtx = propagate_rtx (*loc, GET_MODE (*loc), reg, src, speed_p); | |
1153 | if (new_rtx) | |
1154 | validate_unshare_change (use_insn, loc, new_rtx, true); | |
1155 | } | |
1156 | asm_operands = SET_SRC (use_pat); | |
1157 | break; | |
1158 | case PARALLEL: | |
1159 | for (i = 0; i < XVECLEN (use_pat, 0); i++) | |
1160 | if (GET_CODE (XVECEXP (use_pat, 0, i)) == SET) | |
1161 | { | |
1162 | if (MEM_P (SET_DEST (XVECEXP (use_pat, 0, i)))) | |
1163 | { | |
1164 | loc = &SET_DEST (XVECEXP (use_pat, 0, i)); | |
1165 | new_rtx = propagate_rtx (*loc, GET_MODE (*loc), reg, | |
1166 | src, speed_p); | |
1167 | if (new_rtx) | |
1168 | validate_unshare_change (use_insn, loc, new_rtx, true); | |
1169 | } | |
1170 | asm_operands = SET_SRC (XVECEXP (use_pat, 0, i)); | |
1171 | } | |
1172 | else if (GET_CODE (XVECEXP (use_pat, 0, i)) == ASM_OPERANDS) | |
1173 | asm_operands = XVECEXP (use_pat, 0, i); | |
1174 | break; | |
1175 | default: | |
1176 | gcc_unreachable (); | |
1177 | } | |
1178 | ||
1179 | gcc_assert (asm_operands && GET_CODE (asm_operands) == ASM_OPERANDS); | |
1180 | for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (asm_operands); i++) | |
1181 | { | |
1182 | loc = &ASM_OPERANDS_INPUT (asm_operands, i); | |
1183 | new_rtx = propagate_rtx (*loc, GET_MODE (*loc), reg, src, speed_p); | |
1184 | if (new_rtx) | |
1185 | validate_unshare_change (use_insn, loc, new_rtx, true); | |
1186 | } | |
1187 | ||
1188 | if (num_changes_pending () == 0 || !apply_change_group ()) | |
1189 | return false; | |
1190 | ||
1191 | num_changes++; | |
1192 | return true; | |
1193 | } | |
1194 | ||
a52b023a PB |
1195 | /* Try to replace USE with SRC (defined in DEF_INSN) and simplify the |
1196 | result. */ | |
1197 | ||
1198 | static bool | |
57512f53 | 1199 | forward_propagate_and_simplify (df_ref use, rtx def_insn, rtx def_set) |
a52b023a PB |
1200 | { |
1201 | rtx use_insn = DF_REF_INSN (use); | |
1202 | rtx use_set = single_set (use_insn); | |
60564289 | 1203 | rtx src, reg, new_rtx, *loc; |
a52b023a PB |
1204 | bool set_reg_equal; |
1205 | enum machine_mode mode; | |
ce372372 JJ |
1206 | int asm_use = -1; |
1207 | ||
1208 | if (INSN_CODE (use_insn) < 0) | |
1209 | asm_use = asm_noperands (PATTERN (use_insn)); | |
a52b023a | 1210 | |
b5b8b0ac | 1211 | if (!use_set && asm_use < 0 && !DEBUG_INSN_P (use_insn)) |
a52b023a PB |
1212 | return false; |
1213 | ||
1214 | /* Do not propagate into PC, CC0, etc. */ | |
ce372372 | 1215 | if (use_set && GET_MODE (SET_DEST (use_set)) == VOIDmode) |
a52b023a PB |
1216 | return false; |
1217 | ||
1218 | /* If def and use are subreg, check if they match. */ | |
1219 | reg = DF_REF_REG (use); | |
1220 | if (GET_CODE (reg) == SUBREG | |
1221 | && GET_CODE (SET_DEST (def_set)) == SUBREG | |
1222 | && (SUBREG_BYTE (SET_DEST (def_set)) != SUBREG_BYTE (reg) | |
1223 | || GET_MODE (SET_DEST (def_set)) != GET_MODE (reg))) | |
1224 | return false; | |
1225 | ||
1226 | /* Check if the def had a subreg, but the use has the whole reg. */ | |
1227 | if (REG_P (reg) && GET_CODE (SET_DEST (def_set)) == SUBREG) | |
1228 | return false; | |
1229 | ||
1230 | /* Check if the use has a subreg, but the def had the whole reg. Unlike the | |
1231 | previous case, the optimization is possible and often useful indeed. */ | |
1232 | if (GET_CODE (reg) == SUBREG && REG_P (SET_DEST (def_set))) | |
1233 | reg = SUBREG_REG (reg); | |
1234 | ||
1235 | /* Check if the substitution is valid (last, because it's the most | |
1236 | expensive check!). */ | |
1237 | src = SET_SRC (def_set); | |
1238 | if (!CONSTANT_P (src) && !all_uses_available_at (def_insn, use_insn)) | |
1239 | return false; | |
1240 | ||
1241 | /* Check if the def is loading something from the constant pool; in this | |
1242 | case we would undo optimization such as compress_float_constant. | |
1243 | Still, we can set a REG_EQUAL note. */ | |
1244 | if (MEM_P (src) && MEM_READONLY_P (src)) | |
1245 | { | |
1246 | rtx x = avoid_constant_pool_reference (src); | |
ce372372 | 1247 | if (x != src && use_set) |
a52b023a PB |
1248 | { |
1249 | rtx note = find_reg_note (use_insn, REG_EQUAL, NULL_RTX); | |
60564289 KG |
1250 | rtx old_rtx = note ? XEXP (note, 0) : SET_SRC (use_set); |
1251 | rtx new_rtx = simplify_replace_rtx (old_rtx, src, x); | |
1252 | if (old_rtx != new_rtx) | |
1253 | set_unique_reg_note (use_insn, REG_EQUAL, copy_rtx (new_rtx)); | |
a52b023a PB |
1254 | } |
1255 | return false; | |
1256 | } | |
1257 | ||
ce372372 JJ |
1258 | if (asm_use >= 0) |
1259 | return forward_propagate_asm (use, def_insn, def_set, reg); | |
1260 | ||
a52b023a PB |
1261 | /* Else try simplifying. */ |
1262 | ||
1263 | if (DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE) | |
1264 | { | |
1265 | loc = &SET_DEST (use_set); | |
1266 | set_reg_equal = false; | |
1267 | } | |
b5b8b0ac AO |
1268 | else if (!use_set) |
1269 | { | |
1270 | loc = &INSN_VAR_LOCATION_LOC (use_insn); | |
1271 | set_reg_equal = false; | |
1272 | } | |
a52b023a PB |
1273 | else |
1274 | { | |
1275 | rtx note = find_reg_note (use_insn, REG_EQUAL, NULL_RTX); | |
1276 | if (DF_REF_FLAGS (use) & DF_REF_IN_NOTE) | |
1277 | loc = &XEXP (note, 0); | |
1278 | else | |
1279 | loc = &SET_SRC (use_set); | |
6fb5fa3c | 1280 | |
a52b023a PB |
1281 | /* Do not replace an existing REG_EQUAL note if the insn is not |
1282 | recognized. Either we're already replacing in the note, or | |
1283 | we'll separately try plugging the definition in the note and | |
1284 | simplifying. */ | |
1285 | set_reg_equal = (note == NULL_RTX); | |
1286 | } | |
1287 | ||
1288 | if (GET_MODE (*loc) == VOIDmode) | |
1289 | mode = GET_MODE (SET_DEST (use_set)); | |
1290 | else | |
1291 | mode = GET_MODE (*loc); | |
1292 | ||
f40751dd JH |
1293 | new_rtx = propagate_rtx (*loc, mode, reg, src, |
1294 | optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn))); | |
6fb5fa3c | 1295 | |
60564289 | 1296 | if (!new_rtx) |
a52b023a PB |
1297 | return false; |
1298 | ||
60564289 | 1299 | return try_fwprop_subst (use, loc, new_rtx, def_insn, set_reg_equal); |
a52b023a PB |
1300 | } |
1301 | ||
1302 | ||
1303 | /* Given a use USE of an insn, if it has a single reaching | |
1304 | definition, try to forward propagate it into that insn. */ | |
1305 | ||
1306 | static void | |
57512f53 | 1307 | forward_propagate_into (df_ref use) |
a52b023a | 1308 | { |
57512f53 | 1309 | df_ref def; |
a52b023a | 1310 | rtx def_insn, def_set, use_insn; |
6fb5fa3c | 1311 | rtx parent; |
a52b023a PB |
1312 | |
1313 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) | |
1314 | return; | |
6fb5fa3c | 1315 | if (DF_REF_IS_ARTIFICIAL (use)) |
46fd10da | 1316 | return; |
a52b023a PB |
1317 | |
1318 | /* Only consider uses that have a single definition. */ | |
00952e97 PB |
1319 | def = get_def_for_use (use); |
1320 | if (!def) | |
a52b023a | 1321 | return; |
a52b023a PB |
1322 | if (DF_REF_FLAGS (def) & DF_REF_READ_WRITE) |
1323 | return; | |
6fb5fa3c | 1324 | if (DF_REF_IS_ARTIFICIAL (def)) |
46fd10da | 1325 | return; |
a52b023a | 1326 | |
fb406162 PB |
1327 | /* Do not propagate loop invariant definitions inside the loop. */ |
1328 | if (DF_REF_BB (def)->loop_father != DF_REF_BB (use)->loop_father) | |
a52b023a PB |
1329 | return; |
1330 | ||
1331 | /* Check if the use is still present in the insn! */ | |
1332 | use_insn = DF_REF_INSN (use); | |
1333 | if (DF_REF_FLAGS (use) & DF_REF_IN_NOTE) | |
1334 | parent = find_reg_note (use_insn, REG_EQUAL, NULL_RTX); | |
1335 | else | |
1336 | parent = PATTERN (use_insn); | |
1337 | ||
4fefbcdb | 1338 | if (!reg_mentioned_p (DF_REF_REG (use), parent)) |
a52b023a PB |
1339 | return; |
1340 | ||
1341 | def_insn = DF_REF_INSN (def); | |
6fb5fa3c DB |
1342 | if (multiple_sets (def_insn)) |
1343 | return; | |
a52b023a PB |
1344 | def_set = single_set (def_insn); |
1345 | if (!def_set) | |
1346 | return; | |
1347 | ||
1348 | /* Only try one kind of propagation. If two are possible, we'll | |
1349 | do it on the following iterations. */ | |
1350 | if (!forward_propagate_and_simplify (use, def_insn, def_set)) | |
1351 | forward_propagate_subreg (use, def_insn, def_set); | |
1352 | } | |
1353 | ||
1354 | \f | |
1355 | static void | |
1356 | fwprop_init (void) | |
1357 | { | |
1358 | num_changes = 0; | |
6e0b633f | 1359 | calculate_dominance_info (CDI_DOMINATORS); |
a52b023a PB |
1360 | |
1361 | /* We do not always want to propagate into loops, so we have to find | |
1362 | loops and be careful about them. But we have to call flow_loops_find | |
1363 | before df_analyze, because flow_loops_find may introduce new jump | |
1364 | insns (sadly) if we are not working in cfglayout mode. */ | |
fb406162 | 1365 | loop_optimizer_init (0); |
a52b023a | 1366 | |
00952e97 | 1367 | build_single_def_use_links (); |
6fb5fa3c | 1368 | df_set_flags (DF_DEFER_INSN_RESCAN); |
a52b023a PB |
1369 | } |
1370 | ||
1371 | static void | |
1372 | fwprop_done (void) | |
1373 | { | |
fb406162 | 1374 | loop_optimizer_finalize (); |
6fb5fa3c | 1375 | |
00952e97 | 1376 | VEC_free (df_ref, heap, use_def_ref); |
6e0b633f | 1377 | free_dominance_info (CDI_DOMINATORS); |
a52b023a PB |
1378 | cleanup_cfg (0); |
1379 | delete_trivially_dead_insns (get_insns (), max_reg_num ()); | |
1380 | ||
1381 | if (dump_file) | |
1382 | fprintf (dump_file, | |
1383 | "\nNumber of successful forward propagations: %d\n\n", | |
1384 | num_changes); | |
6724bb92 | 1385 | df_remove_problem (df_chain); |
a52b023a PB |
1386 | } |
1387 | ||
1388 | ||
1389 | ||
1390 | /* Main entry point. */ | |
1391 | ||
1392 | static bool | |
1393 | gate_fwprop (void) | |
1394 | { | |
1395 | return optimize > 0 && flag_forward_propagate; | |
1396 | } | |
1397 | ||
1398 | static unsigned int | |
1399 | fwprop (void) | |
1400 | { | |
1401 | unsigned i; | |
1402 | ||
1403 | fwprop_init (); | |
1404 | ||
1405 | /* Go through all the uses. update_df will create new ones at the | |
1406 | end, and we'll go through them as well. | |
1407 | ||
1408 | Do not forward propagate addresses into loops until after unrolling. | |
1409 | CSE did so because it was able to fix its own mess, but we are not. */ | |
1410 | ||
6fb5fa3c | 1411 | for (i = 0; i < DF_USES_TABLE_SIZE (); i++) |
a52b023a | 1412 | { |
57512f53 | 1413 | df_ref use = DF_USES_GET (i); |
a52b023a | 1414 | if (use) |
fb406162 | 1415 | if (DF_REF_TYPE (use) == DF_REF_REG_USE |
24713e85 AP |
1416 | || DF_REF_BB (use)->loop_father == NULL |
1417 | /* The outer most loop is not really a loop. */ | |
1418 | || loop_outer (DF_REF_BB (use)->loop_father) == NULL) | |
a52b023a PB |
1419 | forward_propagate_into (use); |
1420 | } | |
1421 | ||
1422 | fwprop_done (); | |
a52b023a PB |
1423 | return 0; |
1424 | } | |
1425 | ||
8ddbbcae | 1426 | struct rtl_opt_pass pass_rtl_fwprop = |
a52b023a | 1427 | { |
8ddbbcae JH |
1428 | { |
1429 | RTL_PASS, | |
a52b023a | 1430 | "fwprop1", /* name */ |
6fb5fa3c DB |
1431 | gate_fwprop, /* gate */ |
1432 | fwprop, /* execute */ | |
a52b023a PB |
1433 | NULL, /* sub */ |
1434 | NULL, /* next */ | |
1435 | 0, /* static_pass_number */ | |
1436 | TV_FWPROP, /* tv_id */ | |
1437 | 0, /* properties_required */ | |
1438 | 0, /* properties_provided */ | |
1439 | 0, /* properties_destroyed */ | |
1440 | 0, /* todo_flags_start */ | |
a36b8a1e | 1441 | TODO_df_finish | TODO_verify_rtl_sharing | |
8ddbbcae JH |
1442 | TODO_dump_func /* todo_flags_finish */ |
1443 | } | |
a52b023a PB |
1444 | }; |
1445 | ||
a52b023a PB |
1446 | static unsigned int |
1447 | fwprop_addr (void) | |
1448 | { | |
1449 | unsigned i; | |
1450 | fwprop_init (); | |
1451 | ||
1452 | /* Go through all the uses. update_df will create new ones at the | |
1453 | end, and we'll go through them as well. */ | |
6fb5fa3c | 1454 | for (i = 0; i < DF_USES_TABLE_SIZE (); i++) |
a52b023a | 1455 | { |
57512f53 | 1456 | df_ref use = DF_USES_GET (i); |
a52b023a PB |
1457 | if (use) |
1458 | if (DF_REF_TYPE (use) != DF_REF_REG_USE | |
24713e85 AP |
1459 | && DF_REF_BB (use)->loop_father != NULL |
1460 | /* The outer most loop is not really a loop. */ | |
1461 | && loop_outer (DF_REF_BB (use)->loop_father) != NULL) | |
a52b023a PB |
1462 | forward_propagate_into (use); |
1463 | } | |
1464 | ||
1465 | fwprop_done (); | |
1466 | ||
1467 | return 0; | |
1468 | } | |
1469 | ||
8ddbbcae | 1470 | struct rtl_opt_pass pass_rtl_fwprop_addr = |
a52b023a | 1471 | { |
8ddbbcae JH |
1472 | { |
1473 | RTL_PASS, | |
a52b023a | 1474 | "fwprop2", /* name */ |
6fb5fa3c DB |
1475 | gate_fwprop, /* gate */ |
1476 | fwprop_addr, /* execute */ | |
a52b023a PB |
1477 | NULL, /* sub */ |
1478 | NULL, /* next */ | |
1479 | 0, /* static_pass_number */ | |
1480 | TV_FWPROP, /* tv_id */ | |
1481 | 0, /* properties_required */ | |
1482 | 0, /* properties_provided */ | |
1483 | 0, /* properties_destroyed */ | |
1484 | 0, /* todo_flags_start */ | |
a36b8a1e | 1485 | TODO_df_finish | TODO_verify_rtl_sharing | |
8ddbbcae JH |
1486 | TODO_dump_func /* todo_flags_finish */ |
1487 | } | |
a52b023a | 1488 | }; |