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07abdb66 | 1 | /* Partial redundancy elimination / Hoisting for RTL. |
fbd26352 | 2 | Copyright (C) 1997-2019 Free Software Foundation, Inc. |
18aa2adf | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
18aa2adf | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 8 | Software Foundation; either version 3, or (at your option) any later |
f12b58b3 | 9 | version. |
18aa2adf | 10 | |
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
18aa2adf | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
18aa2adf | 19 | |
20 | /* TODO | |
21 | - reordering of memory allocation and freeing to be more space efficient | |
1ec78e16 | 22 | - calc rough register pressure information and use the info to drive all |
23 | kinds of code motion (including code hoisting) in a unified way. | |
18aa2adf | 24 | */ |
25 | ||
26 | /* References searched while implementing this. | |
18aa2adf | 27 | |
28 | Compilers Principles, Techniques and Tools | |
29 | Aho, Sethi, Ullman | |
30 | Addison-Wesley, 1988 | |
31 | ||
32 | Global Optimization by Suppression of Partial Redundancies | |
33 | E. Morel, C. Renvoise | |
34 | communications of the acm, Vol. 22, Num. 2, Feb. 1979 | |
35 | ||
36 | A Portable Machine-Independent Global Optimizer - Design and Measurements | |
37 | Frederick Chow | |
38 | Stanford Ph.D. thesis, Dec. 1983 | |
39 | ||
18aa2adf | 40 | A Fast Algorithm for Code Movement Optimization |
41 | D.M. Dhamdhere | |
42 | SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988 | |
43 | ||
44 | A Solution to a Problem with Morel and Renvoise's | |
45 | Global Optimization by Suppression of Partial Redundancies | |
46 | K-H Drechsler, M.P. Stadel | |
47 | ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988 | |
48 | ||
49 | Practical Adaptation of the Global Optimization | |
50 | Algorithm of Morel and Renvoise | |
51 | D.M. Dhamdhere | |
52 | ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991 | |
53 | ||
54 | Efficiently Computing Static Single Assignment Form and the Control | |
55 | Dependence Graph | |
56 | R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck | |
57 | ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991 | |
58 | ||
18aa2adf | 59 | Lazy Code Motion |
60 | J. Knoop, O. Ruthing, B. Steffen | |
61 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
62 | ||
63 | What's In a Region? Or Computing Control Dependence Regions in Near-Linear | |
64 | Time for Reducible Flow Control | |
65 | Thomas Ball | |
66 | ACM Letters on Programming Languages and Systems, | |
67 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
68 | ||
69 | An Efficient Representation for Sparse Sets | |
70 | Preston Briggs, Linda Torczon | |
71 | ACM Letters on Programming Languages and Systems, | |
72 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
73 | ||
74 | A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion | |
75 | K-H Drechsler, M.P. Stadel | |
76 | ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993 | |
77 | ||
78 | Partial Dead Code Elimination | |
79 | J. Knoop, O. Ruthing, B. Steffen | |
80 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
81 | ||
82 | Effective Partial Redundancy Elimination | |
83 | P. Briggs, K.D. Cooper | |
84 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
85 | ||
86 | The Program Structure Tree: Computing Control Regions in Linear Time | |
87 | R. Johnson, D. Pearson, K. Pingali | |
88 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
89 | ||
90 | Optimal Code Motion: Theory and Practice | |
91 | J. Knoop, O. Ruthing, B. Steffen | |
92 | ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994 | |
93 | ||
94 | The power of assignment motion | |
95 | J. Knoop, O. Ruthing, B. Steffen | |
96 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
97 | ||
98 | Global code motion / global value numbering | |
99 | C. Click | |
100 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
101 | ||
102 | Value Driven Redundancy Elimination | |
103 | L.T. Simpson | |
104 | Rice University Ph.D. thesis, Apr. 1996 | |
105 | ||
106 | Value Numbering | |
107 | L.T. Simpson | |
108 | Massively Scalar Compiler Project, Rice University, Sep. 1996 | |
109 | ||
110 | High Performance Compilers for Parallel Computing | |
111 | Michael Wolfe | |
112 | Addison-Wesley, 1996 | |
113 | ||
ef0d57a0 | 114 | Advanced Compiler Design and Implementation |
115 | Steven Muchnick | |
116 | Morgan Kaufmann, 1997 | |
117 | ||
7bcd381b | 118 | Building an Optimizing Compiler |
119 | Robert Morgan | |
120 | Digital Press, 1998 | |
121 | ||
ef0d57a0 | 122 | People wishing to speed up the code here should read: |
123 | Elimination Algorithms for Data Flow Analysis | |
124 | B.G. Ryder, M.C. Paull | |
125 | ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986 | |
126 | ||
127 | How to Analyze Large Programs Efficiently and Informatively | |
128 | D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck | |
129 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
130 | ||
18aa2adf | 131 | People wishing to do something different can find various possibilities |
132 | in the above papers and elsewhere. | |
133 | */ | |
134 | ||
135 | #include "config.h" | |
ebd9163c | 136 | #include "system.h" |
805e22b2 | 137 | #include "coretypes.h" |
9ef16211 | 138 | #include "backend.h" |
7c29e30e | 139 | #include "target.h" |
9ef16211 | 140 | #include "rtl.h" |
7c29e30e | 141 | #include "tree.h" |
142 | #include "predict.h" | |
9ef16211 | 143 | #include "df.h" |
ad7b10a2 | 144 | #include "memmodel.h" |
7953c610 | 145 | #include "tm_p.h" |
7c29e30e | 146 | #include "insn-config.h" |
d30c5be2 | 147 | #include "print-rtl.h" |
18aa2adf | 148 | #include "regs.h" |
1ec78e16 | 149 | #include "ira.h" |
18aa2adf | 150 | #include "recog.h" |
7c29e30e | 151 | #include "diagnostic-core.h" |
94ea8568 | 152 | #include "cfgrtl.h" |
153 | #include "cfganal.h" | |
154 | #include "lcm.h" | |
155 | #include "cfgcleanup.h" | |
3cfec666 | 156 | #include "expr.h" |
9159979b | 157 | #include "params.h" |
c8a8ab0f | 158 | #include "intl.h" |
77fce4cd | 159 | #include "tree-pass.h" |
3072d30e | 160 | #include "dbgcnt.h" |
049d15fc | 161 | #include "gcse.h" |
d2ac64b1 | 162 | #include "gcse-common.h" |
4059f3f0 | 163 | |
ef0d57a0 | 164 | /* We support GCSE via Partial Redundancy Elimination. PRE optimizations |
05476866 | 165 | are a superset of those done by classic GCSE. |
18aa2adf | 166 | |
07abdb66 | 167 | Two passes of copy/constant propagation are done around PRE or hoisting |
168 | because the first one enables more GCSE and the second one helps to clean | |
169 | up the copies that PRE and HOIST create. This is needed more for PRE than | |
170 | for HOIST because code hoisting will try to use an existing register | |
171 | containing the common subexpression rather than create a new one. This is | |
172 | harder to do for PRE because of the code motion (which HOIST doesn't do). | |
18aa2adf | 173 | |
174 | Expressions we are interested in GCSE-ing are of the form | |
175 | (set (pseudo-reg) (expression)). | |
176 | Function want_to_gcse_p says what these are. | |
177 | ||
05476866 | 178 | In addition, expressions in REG_EQUAL notes are candidates for GCSE-ing. |
d45a307d | 179 | This allows PRE to hoist expressions that are expressed in multiple insns, |
05476866 | 180 | such as complex address calculations (e.g. for PIC code, or loads with a |
181 | high part and a low part). | |
d45a307d | 182 | |
18aa2adf | 183 | PRE handles moving invariant expressions out of loops (by treating them as |
ef0d57a0 | 184 | partially redundant). |
18aa2adf | 185 | |
18aa2adf | 186 | ********************** |
187 | ||
188 | We used to support multiple passes but there are diminishing returns in | |
189 | doing so. The first pass usually makes 90% of the changes that are doable. | |
190 | A second pass can make a few more changes made possible by the first pass. | |
191 | Experiments show any further passes don't make enough changes to justify | |
192 | the expense. | |
193 | ||
194 | A study of spec92 using an unlimited number of passes: | |
195 | [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83, | |
196 | [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2, | |
197 | [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1 | |
198 | ||
199 | It was found doing copy propagation between each pass enables further | |
200 | substitutions. | |
201 | ||
d45a307d | 202 | This study was done before expressions in REG_EQUAL notes were added as |
203 | candidate expressions for optimization, and before the GIMPLE optimizers | |
204 | were added. Probably, multiple passes is even less efficient now than | |
205 | at the time when the study was conducted. | |
206 | ||
18aa2adf | 207 | PRE is quite expensive in complicated functions because the DFA can take |
d45a307d | 208 | a while to converge. Hence we only perform one pass. |
18aa2adf | 209 | |
210 | ********************** | |
211 | ||
212 | The steps for PRE are: | |
213 | ||
214 | 1) Build the hash table of expressions we wish to GCSE (expr_hash_table). | |
215 | ||
216 | 2) Perform the data flow analysis for PRE. | |
217 | ||
218 | 3) Delete the redundant instructions | |
219 | ||
220 | 4) Insert the required copies [if any] that make the partially | |
221 | redundant instructions fully redundant. | |
222 | ||
223 | 5) For other reaching expressions, insert an instruction to copy the value | |
224 | to a newly created pseudo that will reach the redundant instruction. | |
225 | ||
226 | The deletion is done first so that when we do insertions we | |
227 | know which pseudo reg to use. | |
228 | ||
229 | Various papers have argued that PRE DFA is expensive (O(n^2)) and others | |
230 | argue it is not. The number of iterations for the algorithm to converge | |
231 | is typically 2-4 so I don't view it as that expensive (relatively speaking). | |
232 | ||
05476866 | 233 | PRE GCSE depends heavily on the second CPROP pass to clean up the copies |
18aa2adf | 234 | we create. To make an expression reach the place where it's redundant, |
235 | the result of the expression is copied to a new register, and the redundant | |
236 | expression is deleted by replacing it with this new register. Classic GCSE | |
237 | doesn't have this problem as much as it computes the reaching defs of | |
04a40f24 | 238 | each register in each block and thus can try to use an existing |
239 | register. */ | |
18aa2adf | 240 | \f |
241 | /* GCSE global vars. */ | |
242 | ||
049d15fc | 243 | struct target_gcse default_target_gcse; |
244 | #if SWITCHABLE_TARGET | |
245 | struct target_gcse *this_target_gcse = &default_target_gcse; | |
246 | #endif | |
247 | ||
d743aba2 | 248 | /* Set to non-zero if CSE should run after all GCSE optimizations are done. */ |
249 | int flag_rerun_cse_after_global_opts; | |
ef0d57a0 | 250 | |
18aa2adf | 251 | /* An obstack for our working variables. */ |
252 | static struct obstack gcse_obstack; | |
253 | ||
18aa2adf | 254 | /* Hash table of expressions. */ |
255 | ||
9908fe4d | 256 | struct gcse_expr |
18aa2adf | 257 | { |
bc8197c0 | 258 | /* The expression. */ |
18aa2adf | 259 | rtx expr; |
260 | /* Index in the available expression bitmaps. */ | |
261 | int bitmap_index; | |
262 | /* Next entry with the same hash. */ | |
9908fe4d | 263 | struct gcse_expr *next_same_hash; |
18aa2adf | 264 | /* List of anticipatable occurrences in basic blocks in the function. |
265 | An "anticipatable occurrence" is one that is the first occurrence in the | |
ef0d57a0 | 266 | basic block, the operands are not modified in the basic block prior |
267 | to the occurrence and the output is not used between the start of | |
268 | the block and the occurrence. */ | |
9908fe4d | 269 | struct gcse_occr *antic_occr; |
18aa2adf | 270 | /* List of available occurrence in basic blocks in the function. |
271 | An "available occurrence" is one that is the last occurrence in the | |
272 | basic block and the operands are not modified by following statements in | |
273 | the basic block [including this insn]. */ | |
9908fe4d | 274 | struct gcse_occr *avail_occr; |
18aa2adf | 275 | /* Non-null if the computation is PRE redundant. |
276 | The value is the newly created pseudo-reg to record a copy of the | |
277 | expression in all the places that reach the redundant copy. */ | |
278 | rtx reaching_reg; | |
8b38b150 | 279 | /* Maximum distance in instructions this expression can travel. |
280 | We avoid moving simple expressions for more than a few instructions | |
281 | to keep register pressure under control. | |
282 | A value of "0" removes restrictions on how far the expression can | |
283 | travel. */ | |
7125d9ac | 284 | HOST_WIDE_INT max_distance; |
18aa2adf | 285 | }; |
286 | ||
287 | /* Occurrence of an expression. | |
288 | There is one per basic block. If a pattern appears more than once the | |
289 | last appearance is used [or first for anticipatable expressions]. */ | |
290 | ||
9908fe4d | 291 | struct gcse_occr |
18aa2adf | 292 | { |
293 | /* Next occurrence of this expression. */ | |
9908fe4d | 294 | struct gcse_occr *next; |
18aa2adf | 295 | /* The insn that computes the expression. */ |
526d7387 | 296 | rtx_insn *insn; |
6ef828f9 | 297 | /* Nonzero if this [anticipatable] occurrence has been deleted. */ |
18aa2adf | 298 | char deleted_p; |
6ef828f9 | 299 | /* Nonzero if this [available] occurrence has been copied to |
18aa2adf | 300 | reaching_reg. */ |
301 | /* ??? This is mutually exclusive with deleted_p, so they could share | |
302 | the same byte. */ | |
303 | char copied_p; | |
304 | }; | |
305 | ||
9908fe4d | 306 | typedef struct gcse_occr *occr_t; |
c0939130 | 307 | |
07abdb66 | 308 | /* Expression hash tables. |
18aa2adf | 309 | Each hash table is an array of buckets. |
310 | ??? It is known that if it were an array of entries, structure elements | |
311 | `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is | |
312 | not clear whether in the final analysis a sufficient amount of memory would | |
313 | be saved as the size of the available expression bitmaps would be larger | |
314 | [one could build a mapping table without holes afterwards though]. | |
2c084240 | 315 | Someday I'll perform the computation and figure it out. */ |
18aa2adf | 316 | |
9908fe4d | 317 | struct gcse_hash_table_d |
27cfe3f1 | 318 | { |
319 | /* The table itself. | |
320 | This is an array of `expr_hash_table_size' elements. */ | |
9908fe4d | 321 | struct gcse_expr **table; |
27cfe3f1 | 322 | |
323 | /* Size of the hash table, in elements. */ | |
324 | unsigned int size; | |
a08b57af | 325 | |
27cfe3f1 | 326 | /* Number of hash table elements. */ |
327 | unsigned int n_elems; | |
27cfe3f1 | 328 | }; |
2c084240 | 329 | |
27cfe3f1 | 330 | /* Expression hash table. */ |
9908fe4d | 331 | static struct gcse_hash_table_d expr_hash_table; |
27cfe3f1 | 332 | |
8e802be9 | 333 | /* This is a list of expressions which are MEMs and will be used by load |
3cfec666 | 334 | or store motion. |
bc8197c0 | 335 | Load motion tracks MEMs which aren't killed by anything except itself, |
336 | i.e. loads and stores to a single location. | |
3cfec666 | 337 | We can then allow movement of these MEM refs with a little special |
8e802be9 | 338 | allowance. (all stores copy the same value to the reaching reg used |
339 | for the loads). This means all values used to store into memory must have | |
bc8197c0 | 340 | no side effects so we can re-issue the setter value. */ |
8e802be9 | 341 | |
342 | struct ls_expr | |
343 | { | |
9908fe4d | 344 | struct gcse_expr * expr; /* Gcse expression reference for LM. */ |
8e802be9 | 345 | rtx pattern; /* Pattern of this mem. */ |
64928ee5 | 346 | rtx pattern_regs; /* List of registers mentioned by the mem. */ |
d30c5be2 | 347 | vec<rtx_insn *> stores; /* INSN list of stores seen. */ |
8e802be9 | 348 | struct ls_expr * next; /* Next in the list. */ |
349 | int invalid; /* Invalid for some reason. */ | |
350 | int index; /* If it maps to a bitmap index. */ | |
69333952 | 351 | unsigned int hash_index; /* Index when in a hash table. */ |
8e802be9 | 352 | rtx reaching_reg; /* Register to use when re-writing. */ |
353 | }; | |
354 | ||
355 | /* Head of the list of load/store memory refs. */ | |
356 | static struct ls_expr * pre_ldst_mems = NULL; | |
357 | ||
770ff93b | 358 | struct pre_ldst_expr_hasher : nofree_ptr_hash <ls_expr> |
d9dd21a8 | 359 | { |
d9dd21a8 | 360 | typedef value_type compare_type; |
9969c043 | 361 | static inline hashval_t hash (const ls_expr *); |
362 | static inline bool equal (const ls_expr *, const ls_expr *); | |
d9dd21a8 | 363 | }; |
364 | ||
365 | /* Hashtable helpers. */ | |
366 | inline hashval_t | |
9969c043 | 367 | pre_ldst_expr_hasher::hash (const ls_expr *x) |
d9dd21a8 | 368 | { |
369 | int do_not_record_p = 0; | |
370 | return | |
371 | hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false); | |
372 | } | |
373 | ||
374 | static int expr_equiv_p (const_rtx, const_rtx); | |
375 | ||
376 | inline bool | |
9969c043 | 377 | pre_ldst_expr_hasher::equal (const ls_expr *ptr1, |
378 | const ls_expr *ptr2) | |
d9dd21a8 | 379 | { |
380 | return expr_equiv_p (ptr1->pattern, ptr2->pattern); | |
381 | } | |
382 | ||
0d707271 | 383 | /* Hashtable for the load/store memory refs. */ |
c1f445d2 | 384 | static hash_table<pre_ldst_expr_hasher> *pre_ldst_table; |
0d707271 | 385 | |
18aa2adf | 386 | /* Bitmap containing one bit for each register in the program. |
387 | Used when performing GCSE to track which registers have been set since | |
388 | the start of the basic block. */ | |
7fb47f9f | 389 | static regset reg_set_bitmap; |
18aa2adf | 390 | |
8e802be9 | 391 | /* Array, indexed by basic block number for a list of insns which modify |
392 | memory within that block. */ | |
e050de51 | 393 | static vec<rtx_insn *> *modify_mem_list; |
78d140c9 | 394 | static bitmap modify_mem_list_set; |
8e802be9 | 395 | |
57c8e46c | 396 | /* This array parallels modify_mem_list, except that it stores MEMs |
397 | being set and their canonicalized memory addresses. */ | |
f1f41a6c | 398 | static vec<modify_pair> *canon_modify_mem_list; |
78d140c9 | 399 | |
f55d2721 | 400 | /* Bitmap indexed by block numbers to record which blocks contain |
401 | function calls. */ | |
402 | static bitmap blocks_with_calls; | |
403 | ||
18aa2adf | 404 | /* Various variables for statistics gathering. */ |
405 | ||
406 | /* Memory used in a pass. | |
407 | This isn't intended to be absolutely precise. Its intent is only | |
408 | to keep an eye on memory usage. */ | |
409 | static int bytes_used; | |
2c084240 | 410 | |
18aa2adf | 411 | /* GCSE substitutions made. */ |
412 | static int gcse_subst_count; | |
413 | /* Number of copy instructions created. */ | |
414 | static int gcse_create_count; | |
18aa2adf | 415 | \f |
8b38b150 | 416 | /* Doing code hoisting. */ |
417 | static bool doing_code_hoisting_p = false; | |
418 | \f | |
0ca684f3 | 419 | /* For available exprs */ |
4b673aa1 | 420 | static sbitmap *ae_kill; |
18aa2adf | 421 | \f |
1ec78e16 | 422 | /* Data stored for each basic block. */ |
423 | struct bb_data | |
424 | { | |
425 | /* Maximal register pressure inside basic block for given register class | |
426 | (defined only for the pressure classes). */ | |
427 | int max_reg_pressure[N_REG_CLASSES]; | |
ded17066 | 428 | /* Recorded register pressure of basic block before trying to hoist |
429 | an expression. Will be used to restore the register pressure | |
430 | if the expression should not be hoisted. */ | |
431 | int old_pressure; | |
432 | /* Recorded register live_in info of basic block during code hoisting | |
433 | process. BACKUP is used to record live_in info before trying to | |
434 | hoist an expression, and will be used to restore LIVE_IN if the | |
435 | expression should not be hoisted. */ | |
436 | bitmap live_in, backup; | |
1ec78e16 | 437 | }; |
438 | ||
439 | #define BB_DATA(bb) ((struct bb_data *) (bb)->aux) | |
440 | ||
441 | static basic_block curr_bb; | |
442 | ||
443 | /* Current register pressure for each pressure class. */ | |
444 | static int curr_reg_pressure[N_REG_CLASSES]; | |
445 | \f | |
446 | ||
952f0048 | 447 | static void compute_can_copy (void); |
2f800191 | 448 | static void *gmalloc (size_t) ATTRIBUTE_MALLOC; |
449 | static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC; | |
f0af5a88 | 450 | static void *gcse_alloc (unsigned long); |
defc8016 | 451 | static void alloc_gcse_mem (void); |
952f0048 | 452 | static void free_gcse_mem (void); |
9908fe4d | 453 | static void hash_scan_insn (rtx_insn *, struct gcse_hash_table_d *); |
454 | static void hash_scan_set (rtx, rtx_insn *, struct gcse_hash_table_d *); | |
455 | static void hash_scan_clobber (rtx, rtx_insn *, struct gcse_hash_table_d *); | |
456 | static void hash_scan_call (rtx, rtx_insn *, struct gcse_hash_table_d *); | |
526d7387 | 457 | static int oprs_unchanged_p (const_rtx, const rtx_insn *, int); |
458 | static int oprs_anticipatable_p (const_rtx, const rtx_insn *); | |
459 | static int oprs_available_p (const_rtx, const rtx_insn *); | |
3754d046 | 460 | static void insert_expr_in_table (rtx, machine_mode, rtx_insn *, int, int, |
7125d9ac | 461 | HOST_WIDE_INT, struct gcse_hash_table_d *); |
3754d046 | 462 | static unsigned int hash_expr (const_rtx, machine_mode, int *, int); |
84b4ae13 | 463 | static void record_last_reg_set_info (rtx_insn *, int); |
e050de51 | 464 | static void record_last_mem_set_info (rtx_insn *); |
81a410b1 | 465 | static void record_last_set_info (rtx, const_rtx, void *); |
9908fe4d | 466 | static void compute_hash_table (struct gcse_hash_table_d *); |
467 | static void alloc_hash_table (struct gcse_hash_table_d *); | |
468 | static void free_hash_table (struct gcse_hash_table_d *); | |
469 | static void compute_hash_table_work (struct gcse_hash_table_d *); | |
470 | static void dump_hash_table (FILE *, const char *, struct gcse_hash_table_d *); | |
952f0048 | 471 | static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *, |
9908fe4d | 472 | struct gcse_hash_table_d *); |
81a410b1 | 473 | static void mems_conflict_for_gcse_p (rtx, const_rtx, void *); |
7ecb5bb2 | 474 | static int load_killed_in_block_p (const_basic_block, int, const_rtx, int); |
952f0048 | 475 | static void alloc_pre_mem (int, int); |
476 | static void free_pre_mem (void); | |
bc8197c0 | 477 | static struct edge_list *compute_pre_data (void); |
9908fe4d | 478 | static int pre_expr_reaches_here_p (basic_block, struct gcse_expr *, |
952f0048 | 479 | basic_block); |
9908fe4d | 480 | static void insert_insn_end_basic_block (struct gcse_expr *, basic_block); |
481 | static void pre_insert_copy_insn (struct gcse_expr *, rtx_insn *); | |
952f0048 | 482 | static void pre_insert_copies (void); |
483 | static int pre_delete (void); | |
bc8197c0 | 484 | static int pre_gcse (struct edge_list *); |
d743aba2 | 485 | static int one_pre_gcse_pass (void); |
84b4ae13 | 486 | static void add_label_notes (rtx, rtx_insn *); |
952f0048 | 487 | static void alloc_code_hoist_mem (int, int); |
488 | static void free_code_hoist_mem (void); | |
489 | static void compute_code_hoist_vbeinout (void); | |
490 | static void compute_code_hoist_data (void); | |
7125d9ac | 491 | static int should_hoist_expr_to_dom (basic_block, struct gcse_expr *, |
492 | basic_block, | |
493 | sbitmap, HOST_WIDE_INT, int *, | |
494 | enum reg_class, | |
526d7387 | 495 | int *, bitmap, rtx_insn *); |
d743aba2 | 496 | static int hoist_code (void); |
ded17066 | 497 | static enum reg_class get_regno_pressure_class (int regno, int *nregs); |
526d7387 | 498 | static enum reg_class get_pressure_class_and_nregs (rtx_insn *insn, int *nregs); |
952f0048 | 499 | static int one_code_hoisting_pass (void); |
9908fe4d | 500 | static rtx_insn *process_insert_insn (struct gcse_expr *); |
501 | static int pre_edge_insert (struct edge_list *, struct gcse_expr **); | |
502 | static int pre_expr_reaches_here_p_work (basic_block, struct gcse_expr *, | |
952f0048 | 503 | basic_block, char *); |
504 | static struct ls_expr * ldst_entry (rtx); | |
505 | static void free_ldst_entry (struct ls_expr *); | |
bc8197c0 | 506 | static void free_ld_motion_mems (void); |
952f0048 | 507 | static void print_ldst_list (FILE *); |
508 | static struct ls_expr * find_rtx_in_ldst (rtx); | |
7ecb5bb2 | 509 | static int simple_mem (const_rtx); |
952f0048 | 510 | static void invalidate_any_buried_refs (rtx); |
511 | static void compute_ld_motion_mems (void); | |
512 | static void trim_ld_motion_mems (void); | |
9908fe4d | 513 | static void update_ld_motion_stores (struct gcse_expr *); |
952f0048 | 514 | static void clear_modify_mem_tables (void); |
515 | static void free_modify_mem_tables (void); | |
2457c754 | 516 | |
517 | #define GNEW(T) ((T *) gmalloc (sizeof (T))) | |
518 | #define GCNEW(T) ((T *) gcalloc (1, sizeof (T))) | |
519 | ||
520 | #define GNEWVEC(T, N) ((T *) gmalloc (sizeof (T) * (N))) | |
521 | #define GCNEWVEC(T, N) ((T *) gcalloc ((N), sizeof (T))) | |
2457c754 | 522 | |
523 | #define GNEWVAR(T, S) ((T *) gmalloc ((S))) | |
524 | #define GCNEWVAR(T, S) ((T *) gcalloc (1, (S))) | |
2457c754 | 525 | |
526 | #define GOBNEW(T) ((T *) gcse_alloc (sizeof (T))) | |
527 | #define GOBNEWVAR(T, S) ((T *) gcse_alloc ((S))) | |
18aa2adf | 528 | \f |
18aa2adf | 529 | /* Misc. utilities. */ |
530 | ||
049d15fc | 531 | #define can_copy \ |
532 | (this_target_gcse->x_can_copy) | |
533 | #define can_copy_init_p \ | |
534 | (this_target_gcse->x_can_copy_init_p) | |
3d055936 | 535 | |
18aa2adf | 536 | /* Compute which modes support reg/reg copy operations. */ |
537 | ||
538 | static void | |
952f0048 | 539 | compute_can_copy (void) |
18aa2adf | 540 | { |
541 | int i; | |
ebd9163c | 542 | #ifndef AVOID_CCMODE_COPIES |
bf79ca12 | 543 | rtx reg; |
544 | rtx_insn *insn; | |
ebd9163c | 545 | #endif |
3d055936 | 546 | memset (can_copy, 0, NUM_MACHINE_MODES); |
18aa2adf | 547 | |
548 | start_sequence (); | |
549 | for (i = 0; i < NUM_MACHINE_MODES; i++) | |
2c084240 | 550 | if (GET_MODE_CLASS (i) == MODE_CC) |
551 | { | |
18aa2adf | 552 | #ifdef AVOID_CCMODE_COPIES |
3d055936 | 553 | can_copy[i] = 0; |
18aa2adf | 554 | #else |
3754d046 | 555 | reg = gen_rtx_REG ((machine_mode) i, LAST_VIRTUAL_REGISTER + 1); |
d1f9b275 | 556 | insn = emit_insn (gen_rtx_SET (reg, reg)); |
4679ade3 | 557 | if (recog (PATTERN (insn), insn, NULL) >= 0) |
3d055936 | 558 | can_copy[i] = 1; |
18aa2adf | 559 | #endif |
2c084240 | 560 | } |
72f3466e | 561 | else |
3d055936 | 562 | can_copy[i] = 1; |
2c084240 | 563 | |
18aa2adf | 564 | end_sequence (); |
18aa2adf | 565 | } |
3d055936 | 566 | |
567 | /* Returns whether the mode supports reg/reg copy operations. */ | |
568 | ||
569 | bool | |
3754d046 | 570 | can_copy_p (machine_mode mode) |
3d055936 | 571 | { |
3d055936 | 572 | if (! can_copy_init_p) |
573 | { | |
574 | compute_can_copy (); | |
575 | can_copy_init_p = true; | |
576 | } | |
577 | ||
578 | return can_copy[mode] != 0; | |
579 | } | |
18aa2adf | 580 | \f |
581 | /* Cover function to xmalloc to record bytes allocated. */ | |
582 | ||
f0af5a88 | 583 | static void * |
a41493eb | 584 | gmalloc (size_t size) |
18aa2adf | 585 | { |
586 | bytes_used += size; | |
587 | return xmalloc (size); | |
588 | } | |
589 | ||
2f800191 | 590 | /* Cover function to xcalloc to record bytes allocated. */ |
591 | ||
592 | static void * | |
593 | gcalloc (size_t nelem, size_t elsize) | |
594 | { | |
595 | bytes_used += nelem * elsize; | |
596 | return xcalloc (nelem, elsize); | |
597 | } | |
598 | ||
7cdd3716 | 599 | /* Cover function to obstack_alloc. */ |
18aa2adf | 600 | |
f0af5a88 | 601 | static void * |
952f0048 | 602 | gcse_alloc (unsigned long size) |
18aa2adf | 603 | { |
7cdd3716 | 604 | bytes_used += size; |
f0af5a88 | 605 | return obstack_alloc (&gcse_obstack, size); |
18aa2adf | 606 | } |
607 | ||
2e81afe5 | 608 | /* Allocate memory for the reg/memory set tracking tables. |
18aa2adf | 609 | This is called at the start of each pass. */ |
610 | ||
611 | static void | |
defc8016 | 612 | alloc_gcse_mem (void) |
18aa2adf | 613 | { |
18aa2adf | 614 | /* Allocate vars to track sets of regs. */ |
0f71a633 | 615 | reg_set_bitmap = ALLOC_REG_SET (NULL); |
18aa2adf | 616 | |
8e802be9 | 617 | /* Allocate array to keep a list of insns which modify memory in each |
f1f41a6c | 618 | basic block. The two typedefs are needed to work around the |
619 | pre-processor limitation with template types in macro arguments. */ | |
e050de51 | 620 | typedef vec<rtx_insn *> vec_rtx_heap; |
f1f41a6c | 621 | typedef vec<modify_pair> vec_modify_pair_heap; |
fe672ac0 | 622 | modify_mem_list = GCNEWVEC (vec_rtx_heap, last_basic_block_for_fn (cfun)); |
623 | canon_modify_mem_list = GCNEWVEC (vec_modify_pair_heap, | |
624 | last_basic_block_for_fn (cfun)); | |
27335ffd | 625 | modify_mem_list_set = BITMAP_ALLOC (NULL); |
626 | blocks_with_calls = BITMAP_ALLOC (NULL); | |
18aa2adf | 627 | } |
628 | ||
629 | /* Free memory allocated by alloc_gcse_mem. */ | |
630 | ||
631 | static void | |
952f0048 | 632 | free_gcse_mem (void) |
18aa2adf | 633 | { |
98076867 | 634 | FREE_REG_SET (reg_set_bitmap); |
635 | ||
7fb47f9f | 636 | free_modify_mem_tables (); |
27335ffd | 637 | BITMAP_FREE (modify_mem_list_set); |
638 | BITMAP_FREE (blocks_with_calls); | |
18aa2adf | 639 | } |
c7a3eccf | 640 | \f |
641 | /* Compute the local properties of each recorded expression. | |
2c084240 | 642 | |
643 | Local properties are those that are defined by the block, irrespective of | |
644 | other blocks. | |
c7a3eccf | 645 | |
646 | An expression is transparent in a block if its operands are not modified | |
647 | in the block. | |
648 | ||
649 | An expression is computed (locally available) in a block if it is computed | |
650 | at least once and expression would contain the same value if the | |
651 | computation was moved to the end of the block. | |
652 | ||
653 | An expression is locally anticipatable in a block if it is computed at | |
654 | least once and expression would contain the same value if the computation | |
655 | was moved to the beginning of the block. | |
656 | ||
07abdb66 | 657 | We call this routine for pre and code hoisting. They all compute |
2c084240 | 658 | basically the same information and thus can easily share this code. |
18aa2adf | 659 | |
2c084240 | 660 | TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local |
661 | properties. If NULL, then it is not necessary to compute or record that | |
662 | particular property. | |
c7a3eccf | 663 | |
07abdb66 | 664 | TABLE controls which hash table to look at. */ |
3cfec666 | 665 | |
c7a3eccf | 666 | static void |
b9f02dbb | 667 | compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc, |
9908fe4d | 668 | struct gcse_hash_table_d *table) |
c7a3eccf | 669 | { |
27cfe3f1 | 670 | unsigned int i; |
3cfec666 | 671 | |
c7a3eccf | 672 | /* Initialize any bitmaps that were passed in. */ |
673 | if (transp) | |
3d5c627e | 674 | { |
fe672ac0 | 675 | bitmap_vector_ones (transp, last_basic_block_for_fn (cfun)); |
3d5c627e | 676 | } |
2c084240 | 677 | |
c7a3eccf | 678 | if (comp) |
fe672ac0 | 679 | bitmap_vector_clear (comp, last_basic_block_for_fn (cfun)); |
c7a3eccf | 680 | if (antloc) |
fe672ac0 | 681 | bitmap_vector_clear (antloc, last_basic_block_for_fn (cfun)); |
c7a3eccf | 682 | |
27cfe3f1 | 683 | for (i = 0; i < table->size; i++) |
18aa2adf | 684 | { |
9908fe4d | 685 | struct gcse_expr *expr; |
c7a3eccf | 686 | |
27cfe3f1 | 687 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) |
c7a3eccf | 688 | { |
c7a3eccf | 689 | int indx = expr->bitmap_index; |
9908fe4d | 690 | struct gcse_occr *occr; |
c7a3eccf | 691 | |
692 | /* The expression is transparent in this block if it is not killed. | |
693 | We start by assuming all are transparent [none are killed], and | |
694 | then reset the bits for those that are. */ | |
c7a3eccf | 695 | if (transp) |
d2ac64b1 | 696 | compute_transp (expr->expr, indx, transp, |
697 | blocks_with_calls, | |
698 | modify_mem_list_set, | |
699 | canon_modify_mem_list); | |
c7a3eccf | 700 | |
701 | /* The occurrences recorded in antic_occr are exactly those that | |
6ef828f9 | 702 | we want to set to nonzero in ANTLOC. */ |
c7a3eccf | 703 | if (antloc) |
2c084240 | 704 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
705 | { | |
08b7917c | 706 | bitmap_set_bit (antloc[BLOCK_FOR_INSN (occr->insn)->index], indx); |
c7a3eccf | 707 | |
2c084240 | 708 | /* While we're scanning the table, this is a good place to |
709 | initialize this. */ | |
710 | occr->deleted_p = 0; | |
711 | } | |
c7a3eccf | 712 | |
713 | /* The occurrences recorded in avail_occr are exactly those that | |
6ef828f9 | 714 | we want to set to nonzero in COMP. */ |
c7a3eccf | 715 | if (comp) |
2c084240 | 716 | for (occr = expr->avail_occr; occr != NULL; occr = occr->next) |
717 | { | |
08b7917c | 718 | bitmap_set_bit (comp[BLOCK_FOR_INSN (occr->insn)->index], indx); |
c7a3eccf | 719 | |
2c084240 | 720 | /* While we're scanning the table, this is a good place to |
721 | initialize this. */ | |
722 | occr->copied_p = 0; | |
723 | } | |
c7a3eccf | 724 | |
725 | /* While we're scanning the table, this is a good place to | |
726 | initialize this. */ | |
727 | expr->reaching_reg = 0; | |
728 | } | |
18aa2adf | 729 | } |
18aa2adf | 730 | } |
731 | \f | |
18aa2adf | 732 | /* Hash table support. */ |
733 | ||
eac13465 | 734 | struct reg_avail_info |
735 | { | |
4c26117a | 736 | basic_block last_bb; |
eac13465 | 737 | int first_set; |
738 | int last_set; | |
739 | }; | |
740 | ||
741 | static struct reg_avail_info *reg_avail_info; | |
4c26117a | 742 | static basic_block current_bb; |
18aa2adf | 743 | |
06e2144a | 744 | /* See whether X, the source of a set, is something we want to consider for |
745 | GCSE. */ | |
18aa2adf | 746 | |
747 | static int | |
7125d9ac | 748 | want_to_gcse_p (rtx x, machine_mode mode, HOST_WIDE_INT *max_distance_ptr) |
18aa2adf | 749 | { |
e207fd7a | 750 | #ifdef STACK_REGS |
751 | /* On register stack architectures, don't GCSE constants from the | |
752 | constant pool, as the benefits are often swamped by the overhead | |
753 | of shuffling the register stack between basic blocks. */ | |
754 | if (IS_STACK_MODE (GET_MODE (x))) | |
755 | x = avoid_constant_pool_reference (x); | |
756 | #endif | |
757 | ||
8b38b150 | 758 | /* GCSE'ing constants: |
759 | ||
760 | We do not specifically distinguish between constant and non-constant | |
7013e87c | 761 | expressions in PRE and Hoist. We use set_src_cost below to limit |
8b38b150 | 762 | the maximum distance simple expressions can travel. |
763 | ||
764 | Nevertheless, constants are much easier to GCSE, and, hence, | |
765 | it is easy to overdo the optimizations. Usually, excessive PRE and | |
766 | Hoisting of constant leads to increased register pressure. | |
767 | ||
768 | RA can deal with this by rematerialing some of the constants. | |
769 | Therefore, it is important that the back-end generates sets of constants | |
770 | in a way that allows reload rematerialize them under high register | |
771 | pressure, i.e., a pseudo register with REG_EQUAL to constant | |
772 | is set only once. Failing to do so will result in IRA/reload | |
773 | spilling such constants under high register pressure instead of | |
774 | rematerializing them. */ | |
775 | ||
2c084240 | 776 | switch (GET_CODE (x)) |
18aa2adf | 777 | { |
778 | case REG: | |
779 | case SUBREG: | |
8b38b150 | 780 | case CALL: |
781 | return 0; | |
782 | ||
0349edce | 783 | CASE_CONST_ANY: |
8b38b150 | 784 | if (!doing_code_hoisting_p) |
785 | /* Do not PRE constants. */ | |
786 | return 0; | |
787 | ||
788 | /* FALLTHRU */ | |
18aa2adf | 789 | |
790 | default: | |
8b38b150 | 791 | if (doing_code_hoisting_p) |
792 | /* PRE doesn't implement max_distance restriction. */ | |
793 | { | |
794 | int cost; | |
46418b43 | 795 | HOST_WIDE_INT max_distance; |
8b38b150 | 796 | |
797 | gcc_assert (!optimize_function_for_speed_p (cfun) | |
798 | && optimize_function_for_size_p (cfun)); | |
5ae4887d | 799 | cost = set_src_cost (x, mode, 0); |
8b38b150 | 800 | |
801 | if (cost < COSTS_N_INSNS (GCSE_UNRESTRICTED_COST)) | |
802 | { | |
46418b43 | 803 | max_distance |
804 | = ((HOST_WIDE_INT)GCSE_COST_DISTANCE_RATIO * cost) / 10; | |
8b38b150 | 805 | if (max_distance == 0) |
806 | return 0; | |
807 | ||
808 | gcc_assert (max_distance > 0); | |
809 | } | |
810 | else | |
811 | max_distance = 0; | |
812 | ||
813 | if (max_distance_ptr) | |
814 | *max_distance_ptr = max_distance; | |
815 | } | |
816 | ||
9c9680b5 | 817 | return can_assign_to_reg_without_clobbers_p (x, mode); |
18aa2adf | 818 | } |
69dbb666 | 819 | } |
820 | ||
4b673aa1 | 821 | /* Used internally by can_assign_to_reg_without_clobbers_p. */ |
69dbb666 | 822 | |
526d7387 | 823 | static GTY(()) rtx_insn *test_insn; |
69dbb666 | 824 | |
9c9680b5 | 825 | /* Return true if we can assign X to a pseudo register of mode MODE |
826 | such that the resulting insn does not result in clobbering a hard | |
827 | register as a side-effect. | |
2b86a75a | 828 | |
829 | Additionally, if the target requires it, check that the resulting insn | |
830 | can be copied. If it cannot, this means that X is special and probably | |
831 | has hidden side-effects we don't want to mess with. | |
832 | ||
4b673aa1 | 833 | This function is typically used by code motion passes, to verify |
834 | that it is safe to insert an insn without worrying about clobbering | |
835 | maybe live hard regs. */ | |
69dbb666 | 836 | |
4b673aa1 | 837 | bool |
9c9680b5 | 838 | can_assign_to_reg_without_clobbers_p (rtx x, machine_mode mode) |
69dbb666 | 839 | { |
840 | int num_clobbers = 0; | |
841 | int icode; | |
e899b9f2 | 842 | bool can_assign = false; |
18aa2adf | 843 | |
06e2144a | 844 | /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */ |
9c9680b5 | 845 | if (general_operand (x, mode)) |
06e2144a | 846 | return 1; |
847 | else if (GET_MODE (x) == VOIDmode) | |
848 | return 0; | |
849 | ||
850 | /* Otherwise, check if we can make a valid insn from it. First initialize | |
851 | our test insn if we haven't already. */ | |
852 | if (test_insn == 0) | |
853 | { | |
854 | test_insn | |
d1f9b275 | 855 | = make_insn_raw (gen_rtx_SET (gen_rtx_REG (word_mode, |
06e2144a | 856 | FIRST_PSEUDO_REGISTER * 2), |
857 | const0_rtx)); | |
4a57a2e8 | 858 | SET_NEXT_INSN (test_insn) = SET_PREV_INSN (test_insn) = 0; |
e899b9f2 | 859 | INSN_LOCATION (test_insn) = UNKNOWN_LOCATION; |
06e2144a | 860 | } |
861 | ||
862 | /* Now make an insn like the one we would make when GCSE'ing and see if | |
863 | valid. */ | |
9c9680b5 | 864 | PUT_MODE (SET_DEST (PATTERN (test_insn)), mode); |
06e2144a | 865 | SET_SRC (PATTERN (test_insn)) = x; |
48e1416a | 866 | |
2b86a75a | 867 | icode = recog (PATTERN (test_insn), test_insn, &num_clobbers); |
48e1416a | 868 | |
e899b9f2 | 869 | /* If the test insn is valid and doesn't need clobbers, and the target also |
870 | has no objections, we're good. */ | |
871 | if (icode >= 0 | |
872 | && (num_clobbers == 0 || !added_clobbers_hard_reg_p (icode)) | |
873 | && ! (targetm.cannot_copy_insn_p | |
874 | && targetm.cannot_copy_insn_p (test_insn))) | |
875 | can_assign = true; | |
48e1416a | 876 | |
e899b9f2 | 877 | /* Make sure test_insn doesn't have any pointers into GC space. */ |
878 | SET_SRC (PATTERN (test_insn)) = NULL_RTX; | |
48e1416a | 879 | |
e899b9f2 | 880 | return can_assign; |
18aa2adf | 881 | } |
882 | ||
6ef828f9 | 883 | /* Return nonzero if the operands of expression X are unchanged from the |
18aa2adf | 884 | start of INSN's basic block up to but not including INSN (if AVAIL_P == 0), |
885 | or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */ | |
886 | ||
887 | static int | |
526d7387 | 888 | oprs_unchanged_p (const_rtx x, const rtx_insn *insn, int avail_p) |
18aa2adf | 889 | { |
2c084240 | 890 | int i, j; |
18aa2adf | 891 | enum rtx_code code; |
d2ca078f | 892 | const char *fmt; |
18aa2adf | 893 | |
18aa2adf | 894 | if (x == 0) |
895 | return 1; | |
896 | ||
897 | code = GET_CODE (x); | |
898 | switch (code) | |
899 | { | |
900 | case REG: | |
eac13465 | 901 | { |
902 | struct reg_avail_info *info = ®_avail_info[REGNO (x)]; | |
903 | ||
904 | if (info->last_bb != current_bb) | |
905 | return 1; | |
3cfec666 | 906 | if (avail_p) |
2e81afe5 | 907 | return info->last_set < DF_INSN_LUID (insn); |
eac13465 | 908 | else |
2e81afe5 | 909 | return info->first_set >= DF_INSN_LUID (insn); |
eac13465 | 910 | } |
18aa2adf | 911 | |
912 | case MEM: | |
37495d69 | 913 | if (! flag_gcse_lm |
914 | || load_killed_in_block_p (current_bb, DF_INSN_LUID (insn), | |
915 | x, avail_p)) | |
8e802be9 | 916 | return 0; |
18aa2adf | 917 | else |
2c084240 | 918 | return oprs_unchanged_p (XEXP (x, 0), insn, avail_p); |
18aa2adf | 919 | |
920 | case PRE_DEC: | |
921 | case PRE_INC: | |
922 | case POST_DEC: | |
923 | case POST_INC: | |
40988080 | 924 | case PRE_MODIFY: |
925 | case POST_MODIFY: | |
18aa2adf | 926 | return 0; |
927 | ||
928 | case PC: | |
929 | case CC0: /*FIXME*/ | |
930 | case CONST: | |
0349edce | 931 | CASE_CONST_ANY: |
18aa2adf | 932 | case SYMBOL_REF: |
933 | case LABEL_REF: | |
934 | case ADDR_VEC: | |
935 | case ADDR_DIFF_VEC: | |
936 | return 1; | |
937 | ||
938 | default: | |
939 | break; | |
940 | } | |
941 | ||
2c084240 | 942 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
18aa2adf | 943 | { |
944 | if (fmt[i] == 'e') | |
945 | { | |
2c084240 | 946 | /* If we are about to do the last recursive call needed at this |
947 | level, change it into iteration. This function is called enough | |
948 | to be worth it. */ | |
18aa2adf | 949 | if (i == 0) |
2c084240 | 950 | return oprs_unchanged_p (XEXP (x, i), insn, avail_p); |
951 | ||
952 | else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p)) | |
18aa2adf | 953 | return 0; |
954 | } | |
955 | else if (fmt[i] == 'E') | |
2c084240 | 956 | for (j = 0; j < XVECLEN (x, i); j++) |
957 | if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p)) | |
958 | return 0; | |
18aa2adf | 959 | } |
960 | ||
961 | return 1; | |
962 | } | |
963 | ||
bc8197c0 | 964 | /* Info passed from load_killed_in_block_p to mems_conflict_for_gcse_p. */ |
8e802be9 | 965 | |
bc8197c0 | 966 | struct mem_conflict_info |
967 | { | |
968 | /* A memory reference for a load instruction, mems_conflict_for_gcse_p will | |
969 | see if a memory store conflicts with this memory load. */ | |
970 | const_rtx mem; | |
8e802be9 | 971 | |
bc8197c0 | 972 | /* True if mems_conflict_for_gcse_p finds a conflict between two memory |
973 | references. */ | |
974 | bool conflict; | |
975 | }; | |
976 | ||
977 | /* DEST is the output of an instruction. If it is a memory reference and | |
978 | possibly conflicts with the load found in DATA, then communicate this | |
979 | information back through DATA. */ | |
8e802be9 | 980 | |
981 | static void | |
81a410b1 | 982 | mems_conflict_for_gcse_p (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, |
bc8197c0 | 983 | void *data) |
8e802be9 | 984 | { |
bc8197c0 | 985 | struct mem_conflict_info *mci = (struct mem_conflict_info *) data; |
986 | ||
8e802be9 | 987 | while (GET_CODE (dest) == SUBREG |
988 | || GET_CODE (dest) == ZERO_EXTRACT | |
8e802be9 | 989 | || GET_CODE (dest) == STRICT_LOW_PART) |
990 | dest = XEXP (dest, 0); | |
991 | ||
992 | /* If DEST is not a MEM, then it will not conflict with the load. Note | |
993 | that function calls are assumed to clobber memory, but are handled | |
994 | elsewhere. */ | |
b9f02dbb | 995 | if (! MEM_P (dest)) |
8e802be9 | 996 | return; |
7a676a9f | 997 | |
8e802be9 | 998 | /* If we are setting a MEM in our list of specially recognized MEMs, |
3cfec666 | 999 | don't mark as killed this time. */ |
bc8197c0 | 1000 | if (pre_ldst_mems != NULL && expr_equiv_p (dest, mci->mem)) |
8e802be9 | 1001 | { |
1002 | if (!find_rtx_in_ldst (dest)) | |
bc8197c0 | 1003 | mci->conflict = true; |
8e802be9 | 1004 | return; |
1005 | } | |
7a676a9f | 1006 | |
376a287d | 1007 | if (true_dependence (dest, GET_MODE (dest), mci->mem)) |
bc8197c0 | 1008 | mci->conflict = true; |
8e802be9 | 1009 | } |
1010 | ||
1011 | /* Return nonzero if the expression in X (a memory reference) is killed | |
2e81afe5 | 1012 | in block BB before or after the insn with the LUID in UID_LIMIT. |
8e802be9 | 1013 | AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills |
1014 | before UID_LIMIT. | |
1015 | ||
1016 | To check the entire block, set UID_LIMIT to max_uid + 1 and | |
1017 | AVAIL_P to 0. */ | |
1018 | ||
1019 | static int | |
bc8197c0 | 1020 | load_killed_in_block_p (const_basic_block bb, int uid_limit, const_rtx x, |
1021 | int avail_p) | |
8e802be9 | 1022 | { |
e050de51 | 1023 | vec<rtx_insn *> list = modify_mem_list[bb->index]; |
1024 | rtx_insn *setter; | |
577cca34 | 1025 | unsigned ix; |
a2658f4a | 1026 | |
1027 | /* If this is a readonly then we aren't going to be changing it. */ | |
1028 | if (MEM_READONLY_P (x)) | |
1029 | return 0; | |
1030 | ||
f1f41a6c | 1031 | FOR_EACH_VEC_ELT_REVERSE (list, ix, setter) |
8e802be9 | 1032 | { |
bc8197c0 | 1033 | struct mem_conflict_info mci; |
1034 | ||
8e802be9 | 1035 | /* Ignore entries in the list that do not apply. */ |
1036 | if ((avail_p | |
577cca34 | 1037 | && DF_INSN_LUID (setter) < uid_limit) |
8e802be9 | 1038 | || (! avail_p |
577cca34 | 1039 | && DF_INSN_LUID (setter) > uid_limit)) |
1040 | continue; | |
8e802be9 | 1041 | |
1042 | /* If SETTER is a call everything is clobbered. Note that calls | |
1043 | to pure functions are never put on the list, so we need not | |
1044 | worry about them. */ | |
b9f02dbb | 1045 | if (CALL_P (setter)) |
8e802be9 | 1046 | return 1; |
1047 | ||
1048 | /* SETTER must be an INSN of some kind that sets memory. Call | |
bc8197c0 | 1049 | note_stores to examine each hunk of memory that is modified. */ |
1050 | mci.mem = x; | |
1051 | mci.conflict = false; | |
1052 | note_stores (PATTERN (setter), mems_conflict_for_gcse_p, &mci); | |
1053 | if (mci.conflict) | |
8e802be9 | 1054 | return 1; |
8e802be9 | 1055 | } |
1056 | return 0; | |
1057 | } | |
1058 | ||
6ef828f9 | 1059 | /* Return nonzero if the operands of expression X are unchanged from |
18aa2adf | 1060 | the start of INSN's basic block up to but not including INSN. */ |
1061 | ||
1062 | static int | |
526d7387 | 1063 | oprs_anticipatable_p (const_rtx x, const rtx_insn *insn) |
18aa2adf | 1064 | { |
1065 | return oprs_unchanged_p (x, insn, 0); | |
1066 | } | |
1067 | ||
6ef828f9 | 1068 | /* Return nonzero if the operands of expression X are unchanged from |
18aa2adf | 1069 | INSN to the end of INSN's basic block. */ |
1070 | ||
1071 | static int | |
526d7387 | 1072 | oprs_available_p (const_rtx x, const rtx_insn *insn) |
18aa2adf | 1073 | { |
1074 | return oprs_unchanged_p (x, insn, 1); | |
1075 | } | |
1076 | ||
1077 | /* Hash expression X. | |
2c084240 | 1078 | |
1079 | MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean | |
1080 | indicating if a volatile operand is found or if the expression contains | |
69333952 | 1081 | something we don't want to insert in the table. HASH_TABLE_SIZE is |
78d140c9 | 1082 | the current size of the hash table to be probed. */ |
18aa2adf | 1083 | |
1084 | static unsigned int | |
3754d046 | 1085 | hash_expr (const_rtx x, machine_mode mode, int *do_not_record_p, |
69333952 | 1086 | int hash_table_size) |
18aa2adf | 1087 | { |
1088 | unsigned int hash; | |
1089 | ||
1090 | *do_not_record_p = 0; | |
1091 | ||
bc8197c0 | 1092 | hash = hash_rtx (x, mode, do_not_record_p, NULL, /*have_reg_qty=*/false); |
18aa2adf | 1093 | return hash % hash_table_size; |
1094 | } | |
1b80ba05 | 1095 | |
78d140c9 | 1096 | /* Return nonzero if exp1 is equivalent to exp2. */ |
18aa2adf | 1097 | |
1098 | static int | |
7ecb5bb2 | 1099 | expr_equiv_p (const_rtx x, const_rtx y) |
18aa2adf | 1100 | { |
78d140c9 | 1101 | return exp_equiv_p (x, y, 0, true); |
18aa2adf | 1102 | } |
1103 | ||
27cfe3f1 | 1104 | /* Insert expression X in INSN in the hash TABLE. |
18aa2adf | 1105 | If it is already present, record it as the last occurrence in INSN's |
1106 | basic block. | |
1107 | ||
1108 | MODE is the mode of the value X is being stored into. | |
1109 | It is only used if X is a CONST_INT. | |
1110 | ||
6ef828f9 | 1111 | ANTIC_P is nonzero if X is an anticipatable expression. |
8b38b150 | 1112 | AVAIL_P is nonzero if X is an available expression. |
1113 | ||
1114 | MAX_DISTANCE is the maximum distance in instructions this expression can | |
1115 | be moved. */ | |
18aa2adf | 1116 | |
1117 | static void | |
3754d046 | 1118 | insert_expr_in_table (rtx x, machine_mode mode, rtx_insn *insn, |
526d7387 | 1119 | int antic_p, |
7125d9ac | 1120 | int avail_p, HOST_WIDE_INT max_distance, |
1121 | struct gcse_hash_table_d *table) | |
18aa2adf | 1122 | { |
1123 | int found, do_not_record_p; | |
1124 | unsigned int hash; | |
9908fe4d | 1125 | struct gcse_expr *cur_expr, *last_expr = NULL; |
1126 | struct gcse_occr *antic_occr, *avail_occr; | |
18aa2adf | 1127 | |
27cfe3f1 | 1128 | hash = hash_expr (x, mode, &do_not_record_p, table->size); |
18aa2adf | 1129 | |
1130 | /* Do not insert expression in table if it contains volatile operands, | |
1131 | or if hash_expr determines the expression is something we don't want | |
1132 | to or can't handle. */ | |
1133 | if (do_not_record_p) | |
1134 | return; | |
1135 | ||
27cfe3f1 | 1136 | cur_expr = table->table[hash]; |
18aa2adf | 1137 | found = 0; |
1138 | ||
c9281ef8 | 1139 | while (cur_expr && (found = expr_equiv_p (cur_expr->expr, x)) == 0) |
18aa2adf | 1140 | { |
1141 | /* If the expression isn't found, save a pointer to the end of | |
1142 | the list. */ | |
1143 | last_expr = cur_expr; | |
1144 | cur_expr = cur_expr->next_same_hash; | |
1145 | } | |
1146 | ||
1147 | if (! found) | |
1148 | { | |
9908fe4d | 1149 | cur_expr = GOBNEW (struct gcse_expr); |
1150 | bytes_used += sizeof (struct gcse_expr); | |
27cfe3f1 | 1151 | if (table->table[hash] == NULL) |
2c084240 | 1152 | /* This is the first pattern that hashed to this index. */ |
27cfe3f1 | 1153 | table->table[hash] = cur_expr; |
18aa2adf | 1154 | else |
2c084240 | 1155 | /* Add EXPR to end of this hash chain. */ |
1156 | last_expr->next_same_hash = cur_expr; | |
1157 | ||
3cfec666 | 1158 | /* Set the fields of the expr element. */ |
18aa2adf | 1159 | cur_expr->expr = x; |
27cfe3f1 | 1160 | cur_expr->bitmap_index = table->n_elems++; |
18aa2adf | 1161 | cur_expr->next_same_hash = NULL; |
1162 | cur_expr->antic_occr = NULL; | |
1163 | cur_expr->avail_occr = NULL; | |
8b38b150 | 1164 | gcc_assert (max_distance >= 0); |
1165 | cur_expr->max_distance = max_distance; | |
18aa2adf | 1166 | } |
8b38b150 | 1167 | else |
1168 | gcc_assert (cur_expr->max_distance == max_distance); | |
18aa2adf | 1169 | |
1170 | /* Now record the occurrence(s). */ | |
18aa2adf | 1171 | if (antic_p) |
1172 | { | |
1173 | antic_occr = cur_expr->antic_occr; | |
1174 | ||
90bd219d | 1175 | if (antic_occr |
1176 | && BLOCK_FOR_INSN (antic_occr->insn) != BLOCK_FOR_INSN (insn)) | |
77780ba6 | 1177 | antic_occr = NULL; |
18aa2adf | 1178 | |
1179 | if (antic_occr) | |
2c084240 | 1180 | /* Found another instance of the expression in the same basic block. |
1181 | Prefer the currently recorded one. We want the first one in the | |
1182 | block and the block is scanned from start to end. */ | |
1183 | ; /* nothing to do */ | |
18aa2adf | 1184 | else |
1185 | { | |
1186 | /* First occurrence of this expression in this basic block. */ | |
9908fe4d | 1187 | antic_occr = GOBNEW (struct gcse_occr); |
1188 | bytes_used += sizeof (struct gcse_occr); | |
18aa2adf | 1189 | antic_occr->insn = insn; |
77780ba6 | 1190 | antic_occr->next = cur_expr->antic_occr; |
839f8415 | 1191 | antic_occr->deleted_p = 0; |
77780ba6 | 1192 | cur_expr->antic_occr = antic_occr; |
18aa2adf | 1193 | } |
1194 | } | |
1195 | ||
1196 | if (avail_p) | |
1197 | { | |
1198 | avail_occr = cur_expr->avail_occr; | |
1199 | ||
90bd219d | 1200 | if (avail_occr |
1201 | && BLOCK_FOR_INSN (avail_occr->insn) == BLOCK_FOR_INSN (insn)) | |
18aa2adf | 1202 | { |
77780ba6 | 1203 | /* Found another instance of the expression in the same basic block. |
1204 | Prefer this occurrence to the currently recorded one. We want | |
1205 | the last one in the block and the block is scanned from start | |
1206 | to end. */ | |
1207 | avail_occr->insn = insn; | |
18aa2adf | 1208 | } |
18aa2adf | 1209 | else |
1210 | { | |
1211 | /* First occurrence of this expression in this basic block. */ | |
9908fe4d | 1212 | avail_occr = GOBNEW (struct gcse_occr); |
1213 | bytes_used += sizeof (struct gcse_occr); | |
18aa2adf | 1214 | avail_occr->insn = insn; |
77780ba6 | 1215 | avail_occr->next = cur_expr->avail_occr; |
839f8415 | 1216 | avail_occr->deleted_p = 0; |
77780ba6 | 1217 | cur_expr->avail_occr = avail_occr; |
18aa2adf | 1218 | } |
1219 | } | |
1220 | } | |
1221 | ||
bc8197c0 | 1222 | /* Scan SET present in INSN and add an entry to the hash TABLE. */ |
18aa2adf | 1223 | |
1224 | static void | |
9908fe4d | 1225 | hash_scan_set (rtx set, rtx_insn *insn, struct gcse_hash_table_d *table) |
18aa2adf | 1226 | { |
bc8197c0 | 1227 | rtx src = SET_SRC (set); |
1228 | rtx dest = SET_DEST (set); | |
1b80ba05 | 1229 | rtx note; |
18aa2adf | 1230 | |
19595145 | 1231 | if (GET_CODE (src) == CALL) |
27cfe3f1 | 1232 | hash_scan_call (src, insn, table); |
18aa2adf | 1233 | |
b9f02dbb | 1234 | else if (REG_P (dest)) |
18aa2adf | 1235 | { |
1b80ba05 | 1236 | unsigned int regno = REGNO (dest); |
7125d9ac | 1237 | HOST_WIDE_INT max_distance = 0; |
18aa2adf | 1238 | |
ad6cd748 | 1239 | /* See if a REG_EQUAL note shows this equivalent to a simpler expression. |
1240 | ||
59254d98 | 1241 | This allows us to do a single GCSE pass and still eliminate |
1242 | redundant constants, addresses or other expressions that are | |
ad6cd748 | 1243 | constructed with multiple instructions. |
1244 | ||
07abdb66 | 1245 | However, keep the original SRC if INSN is a simple reg-reg move. |
ad6cd748 | 1246 | In this case, there will almost always be a REG_EQUAL note on the |
1247 | insn that sets SRC. By recording the REG_EQUAL value here as SRC | |
1248 | for INSN, we miss copy propagation opportunities and we perform the | |
1249 | same PRE GCSE operation repeatedly on the same REG_EQUAL value if we | |
1250 | do more than one PRE GCSE pass. | |
1251 | ||
f0b5f617 | 1252 | Note that this does not impede profitable constant propagations. We |
ad6cd748 | 1253 | "look through" reg-reg sets in lookup_avail_set. */ |
59254d98 | 1254 | note = find_reg_equal_equiv_note (insn); |
1255 | if (note != 0 | |
ad6cd748 | 1256 | && REG_NOTE_KIND (note) == REG_EQUAL |
1257 | && !REG_P (src) | |
5ae4887d | 1258 | && want_to_gcse_p (XEXP (note, 0), GET_MODE (dest), NULL)) |
d1f9b275 | 1259 | src = XEXP (note, 0), set = gen_rtx_SET (dest, src); |
1b80ba05 | 1260 | |
18aa2adf | 1261 | /* Only record sets of pseudo-regs in the hash table. */ |
07abdb66 | 1262 | if (regno >= FIRST_PSEUDO_REGISTER |
18aa2adf | 1263 | /* Don't GCSE something if we can't do a reg/reg copy. */ |
3d055936 | 1264 | && can_copy_p (GET_MODE (dest)) |
17a54dac | 1265 | /* GCSE commonly inserts instruction after the insn. We can't |
e38def9c | 1266 | do that easily for EH edges so disable GCSE on these for now. */ |
1267 | /* ??? We can now easily create new EH landing pads at the | |
1268 | gimple level, for splitting edges; there's no reason we | |
1269 | can't do the same thing at the rtl level. */ | |
1270 | && !can_throw_internal (insn) | |
18aa2adf | 1271 | /* Is SET_SRC something we want to gcse? */ |
5ae4887d | 1272 | && want_to_gcse_p (src, GET_MODE (dest), &max_distance) |
1b80ba05 | 1273 | /* Don't CSE a nop. */ |
bc8197c0 | 1274 | && ! set_noop_p (set) |
75f84104 | 1275 | /* Don't GCSE if it has attached REG_EQUIV note. |
1276 | At this point this only function parameters should have | |
1277 | REG_EQUIV notes and if the argument slot is used somewhere | |
3fb1e43b | 1278 | explicitly, it means address of parameter has been taken, |
75f84104 | 1279 | so we should not extend the lifetime of the pseudo. */ |
59254d98 | 1280 | && (note == NULL_RTX || ! MEM_P (XEXP (note, 0)))) |
18aa2adf | 1281 | { |
1282 | /* An expression is not anticipatable if its operands are | |
232bbfff | 1283 | modified before this insn or if this is not the only SET in |
3072d30e | 1284 | this insn. The latter condition does not have to mean that |
1285 | SRC itself is not anticipatable, but we just will not be | |
1286 | able to handle code motion of insns with multiple sets. */ | |
1287 | int antic_p = oprs_anticipatable_p (src, insn) | |
1288 | && !multiple_sets (insn); | |
18aa2adf | 1289 | /* An expression is not available if its operands are |
f441a382 | 1290 | subsequently modified, including this insn. It's also not |
1291 | available if this is a branch, because we can't insert | |
1292 | a set after the branch. */ | |
1293 | int avail_p = (oprs_available_p (src, insn) | |
1294 | && ! JUMP_P (insn)); | |
2c084240 | 1295 | |
8b38b150 | 1296 | insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, |
1297 | max_distance, table); | |
18aa2adf | 1298 | } |
18aa2adf | 1299 | } |
40e55fbb | 1300 | /* In case of store we want to consider the memory value as available in |
5c47e414 | 1301 | the REG stored in that memory. This makes it possible to remove |
1302 | redundant loads from due to stores to the same location. */ | |
b9f02dbb | 1303 | else if (flag_gcse_las && REG_P (src) && MEM_P (dest)) |
5ae4887d | 1304 | { |
1305 | unsigned int regno = REGNO (src); | |
7125d9ac | 1306 | HOST_WIDE_INT max_distance = 0; |
5ae4887d | 1307 | |
1308 | /* Only record sets of pseudo-regs in the hash table. */ | |
1309 | if (regno >= FIRST_PSEUDO_REGISTER | |
1310 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
1311 | && can_copy_p (GET_MODE (src)) | |
1312 | /* GCSE commonly inserts instruction after the insn. We can't | |
1313 | do that easily for EH edges so disable GCSE on these for now. */ | |
1314 | && !can_throw_internal (insn) | |
1315 | /* Is SET_DEST something we want to gcse? */ | |
1316 | && want_to_gcse_p (dest, GET_MODE (dest), &max_distance) | |
1317 | /* Don't CSE a nop. */ | |
1318 | && ! set_noop_p (set) | |
1319 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1320 | At this point this only function parameters should have | |
1321 | REG_EQUIV notes and if the argument slot is used somewhere | |
1322 | explicitly, it means address of parameter has been taken, | |
1323 | so we should not extend the lifetime of the pseudo. */ | |
1324 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
1325 | || ! MEM_P (XEXP (note, 0)))) | |
1326 | { | |
1327 | /* Stores are never anticipatable. */ | |
1328 | int antic_p = 0; | |
1329 | /* An expression is not available if its operands are | |
1330 | subsequently modified, including this insn. It's also not | |
1331 | available if this is a branch, because we can't insert | |
1332 | a set after the branch. */ | |
1333 | int avail_p = oprs_available_p (dest, insn) && ! JUMP_P (insn); | |
1334 | ||
1335 | /* Record the memory expression (DEST) in the hash table. */ | |
1336 | insert_expr_in_table (dest, GET_MODE (dest), insn, | |
1337 | antic_p, avail_p, max_distance, table); | |
1338 | } | |
1339 | } | |
18aa2adf | 1340 | } |
1341 | ||
1342 | static void | |
526d7387 | 1343 | hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED, |
9908fe4d | 1344 | struct gcse_hash_table_d *table ATTRIBUTE_UNUSED) |
18aa2adf | 1345 | { |
1346 | /* Currently nothing to do. */ | |
1347 | } | |
1348 | ||
1349 | static void | |
526d7387 | 1350 | hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED, |
9908fe4d | 1351 | struct gcse_hash_table_d *table ATTRIBUTE_UNUSED) |
18aa2adf | 1352 | { |
1353 | /* Currently nothing to do. */ | |
1354 | } | |
1355 | ||
bc8197c0 | 1356 | /* Process INSN and add hash table entries as appropriate. */ |
18aa2adf | 1357 | |
1358 | static void | |
9908fe4d | 1359 | hash_scan_insn (rtx_insn *insn, struct gcse_hash_table_d *table) |
18aa2adf | 1360 | { |
1361 | rtx pat = PATTERN (insn); | |
2c084240 | 1362 | int i; |
18aa2adf | 1363 | |
1364 | /* Pick out the sets of INSN and for other forms of instructions record | |
1365 | what's been modified. */ | |
1366 | ||
1b80ba05 | 1367 | if (GET_CODE (pat) == SET) |
27cfe3f1 | 1368 | hash_scan_set (pat, insn, table); |
bc8197c0 | 1369 | |
1370 | else if (GET_CODE (pat) == CLOBBER) | |
1371 | hash_scan_clobber (pat, insn, table); | |
1372 | ||
1373 | else if (GET_CODE (pat) == CALL) | |
1374 | hash_scan_call (pat, insn, table); | |
1375 | ||
18aa2adf | 1376 | else if (GET_CODE (pat) == PARALLEL) |
2c084240 | 1377 | for (i = 0; i < XVECLEN (pat, 0); i++) |
1378 | { | |
1379 | rtx x = XVECEXP (pat, 0, i); | |
18aa2adf | 1380 | |
2c084240 | 1381 | if (GET_CODE (x) == SET) |
27cfe3f1 | 1382 | hash_scan_set (x, insn, table); |
2c084240 | 1383 | else if (GET_CODE (x) == CLOBBER) |
27cfe3f1 | 1384 | hash_scan_clobber (x, insn, table); |
19595145 | 1385 | else if (GET_CODE (x) == CALL) |
27cfe3f1 | 1386 | hash_scan_call (x, insn, table); |
2c084240 | 1387 | } |
18aa2adf | 1388 | } |
1389 | ||
bc8197c0 | 1390 | /* Dump the hash table TABLE to file FILE under the name NAME. */ |
1391 | ||
18aa2adf | 1392 | static void |
9908fe4d | 1393 | dump_hash_table (FILE *file, const char *name, struct gcse_hash_table_d *table) |
18aa2adf | 1394 | { |
1395 | int i; | |
1396 | /* Flattened out table, so it's printed in proper order. */ | |
9908fe4d | 1397 | struct gcse_expr **flat_table; |
b9cf3f63 | 1398 | unsigned int *hash_val; |
9908fe4d | 1399 | struct gcse_expr *expr; |
b9cf3f63 | 1400 | |
9908fe4d | 1401 | flat_table = XCNEWVEC (struct gcse_expr *, table->n_elems); |
2457c754 | 1402 | hash_val = XNEWVEC (unsigned int, table->n_elems); |
18aa2adf | 1403 | |
27cfe3f1 | 1404 | for (i = 0; i < (int) table->size; i++) |
1405 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) | |
2c084240 | 1406 | { |
1407 | flat_table[expr->bitmap_index] = expr; | |
1408 | hash_val[expr->bitmap_index] = i; | |
1409 | } | |
18aa2adf | 1410 | |
1411 | fprintf (file, "%s hash table (%d buckets, %d entries)\n", | |
27cfe3f1 | 1412 | name, table->size, table->n_elems); |
18aa2adf | 1413 | |
27cfe3f1 | 1414 | for (i = 0; i < (int) table->n_elems; i++) |
46fd7177 | 1415 | if (flat_table[i] != 0) |
1416 | { | |
b16f1e6c | 1417 | expr = flat_table[i]; |
7125d9ac | 1418 | fprintf (file, "Index %d (hash value %d; max distance " |
1419 | HOST_WIDE_INT_PRINT_DEC ")\n ", | |
8b38b150 | 1420 | expr->bitmap_index, hash_val[i], expr->max_distance); |
b16f1e6c | 1421 | print_rtl (file, expr->expr); |
46fd7177 | 1422 | fprintf (file, "\n"); |
1423 | } | |
18aa2adf | 1424 | |
1425 | fprintf (file, "\n"); | |
b9cf3f63 | 1426 | |
b9cf3f63 | 1427 | free (flat_table); |
1428 | free (hash_val); | |
18aa2adf | 1429 | } |
1430 | ||
1431 | /* Record register first/last/block set information for REGNO in INSN. | |
2c084240 | 1432 | |
eac13465 | 1433 | first_set records the first place in the block where the register |
18aa2adf | 1434 | is set and is used to compute "anticipatability". |
2c084240 | 1435 | |
eac13465 | 1436 | last_set records the last place in the block where the register |
18aa2adf | 1437 | is set and is used to compute "availability". |
2c084240 | 1438 | |
eac13465 | 1439 | last_bb records the block for which first_set and last_set are |
2e81afe5 | 1440 | valid, as a quick test to invalidate them. */ |
18aa2adf | 1441 | |
1442 | static void | |
84b4ae13 | 1443 | record_last_reg_set_info (rtx_insn *insn, int regno) |
18aa2adf | 1444 | { |
eac13465 | 1445 | struct reg_avail_info *info = ®_avail_info[regno]; |
2e81afe5 | 1446 | int luid = DF_INSN_LUID (insn); |
2c084240 | 1447 | |
2e81afe5 | 1448 | info->last_set = luid; |
eac13465 | 1449 | if (info->last_bb != current_bb) |
1450 | { | |
1451 | info->last_bb = current_bb; | |
2e81afe5 | 1452 | info->first_set = luid; |
eac13465 | 1453 | } |
18aa2adf | 1454 | } |
1455 | ||
8e802be9 | 1456 | /* Record memory modification information for INSN. We do not actually care |
1457 | about the memory location(s) that are set, or even how they are set (consider | |
1458 | a CALL_INSN). We merely need to record which insns modify memory. */ | |
18aa2adf | 1459 | |
1460 | static void | |
e050de51 | 1461 | record_last_mem_set_info (rtx_insn *insn) |
18aa2adf | 1462 | { |
37495d69 | 1463 | if (! flag_gcse_lm) |
1464 | return; | |
d7b592b0 | 1465 | |
d2ac64b1 | 1466 | record_last_mem_set_info_common (insn, modify_mem_list, |
1467 | canon_modify_mem_list, | |
1468 | modify_mem_list_set, | |
1469 | blocks_with_calls); | |
18aa2adf | 1470 | } |
1471 | ||
18aa2adf | 1472 | /* Called from compute_hash_table via note_stores to handle one |
ec8895d7 | 1473 | SET or CLOBBER in an insn. DATA is really the instruction in which |
1474 | the SET is taking place. */ | |
18aa2adf | 1475 | |
1476 | static void | |
81a410b1 | 1477 | record_last_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, void *data) |
18aa2adf | 1478 | { |
e050de51 | 1479 | rtx_insn *last_set_insn = (rtx_insn *) data; |
ec8895d7 | 1480 | |
18aa2adf | 1481 | if (GET_CODE (dest) == SUBREG) |
1482 | dest = SUBREG_REG (dest); | |
1483 | ||
b9f02dbb | 1484 | if (REG_P (dest)) |
18aa2adf | 1485 | record_last_reg_set_info (last_set_insn, REGNO (dest)); |
b9f02dbb | 1486 | else if (MEM_P (dest) |
18aa2adf | 1487 | /* Ignore pushes, they clobber nothing. */ |
1488 | && ! push_operand (dest, GET_MODE (dest))) | |
1489 | record_last_mem_set_info (last_set_insn); | |
1490 | } | |
1491 | ||
07abdb66 | 1492 | /* Top level function to create an expression hash table. |
18aa2adf | 1493 | |
1494 | Expression entries are placed in the hash table if | |
1495 | - they are of the form (set (pseudo-reg) src), | |
1496 | - src is something we want to perform GCSE on, | |
1497 | - none of the operands are subsequently modified in the block | |
1498 | ||
18aa2adf | 1499 | Currently src must be a pseudo-reg or a const_int. |
1500 | ||
27cfe3f1 | 1501 | TABLE is the table computed. */ |
18aa2adf | 1502 | |
1503 | static void | |
9908fe4d | 1504 | compute_hash_table_work (struct gcse_hash_table_d *table) |
18aa2adf | 1505 | { |
d743aba2 | 1506 | int i; |
18aa2adf | 1507 | |
8e802be9 | 1508 | /* re-Cache any INSN_LIST nodes we have allocated. */ |
7fb47f9f | 1509 | clear_modify_mem_tables (); |
18aa2adf | 1510 | /* Some working arrays used to track first and last set in each block. */ |
d743aba2 | 1511 | reg_avail_info = GNEWVEC (struct reg_avail_info, max_reg_num ()); |
eac13465 | 1512 | |
d743aba2 | 1513 | for (i = 0; i < max_reg_num (); ++i) |
4c26117a | 1514 | reg_avail_info[i].last_bb = NULL; |
18aa2adf | 1515 | |
fc00614f | 1516 | FOR_EACH_BB_FN (current_bb, cfun) |
18aa2adf | 1517 | { |
526d7387 | 1518 | rtx_insn *insn; |
02e7a332 | 1519 | unsigned int regno; |
18aa2adf | 1520 | |
1521 | /* First pass over the instructions records information used to | |
2e81afe5 | 1522 | determine when registers and memory are first and last set. */ |
defc8016 | 1523 | FOR_BB_INSNS (current_bb, insn) |
18aa2adf | 1524 | { |
da6f6776 | 1525 | if (!NONDEBUG_INSN_P (insn)) |
18aa2adf | 1526 | continue; |
1527 | ||
b9f02dbb | 1528 | if (CALL_P (insn)) |
18aa2adf | 1529 | { |
24ec6636 | 1530 | hard_reg_set_iterator hrsi; |
1531 | EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, | |
1532 | 0, regno, hrsi) | |
1533 | record_last_reg_set_info (insn, regno); | |
2c084240 | 1534 | |
948ac165 | 1535 | if (! RTL_CONST_OR_PURE_CALL_P (insn) |
1536 | || RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)) | |
07abdb66 | 1537 | record_last_mem_set_info (insn); |
18aa2adf | 1538 | } |
1539 | ||
ec8895d7 | 1540 | note_stores (PATTERN (insn), record_last_set_info, insn); |
18aa2adf | 1541 | } |
1542 | ||
1543 | /* The next pass builds the hash table. */ | |
defc8016 | 1544 | FOR_BB_INSNS (current_bb, insn) |
da6f6776 | 1545 | if (NONDEBUG_INSN_P (insn)) |
1e5b92fa | 1546 | hash_scan_insn (insn, table); |
18aa2adf | 1547 | } |
1548 | ||
eac13465 | 1549 | free (reg_avail_info); |
1550 | reg_avail_info = NULL; | |
18aa2adf | 1551 | } |
1552 | ||
27cfe3f1 | 1553 | /* Allocate space for the set/expr hash TABLE. |
07abdb66 | 1554 | It is used to determine the number of buckets to use. */ |
18aa2adf | 1555 | |
1556 | static void | |
9908fe4d | 1557 | alloc_hash_table (struct gcse_hash_table_d *table) |
18aa2adf | 1558 | { |
1559 | int n; | |
1560 | ||
9845d120 | 1561 | n = get_max_insn_count (); |
1562 | ||
1563 | table->size = n / 4; | |
27cfe3f1 | 1564 | if (table->size < 11) |
1565 | table->size = 11; | |
2c084240 | 1566 | |
18aa2adf | 1567 | /* Attempt to maintain efficient use of hash table. |
1568 | Making it an odd number is simplest for now. | |
1569 | ??? Later take some measurements. */ | |
27cfe3f1 | 1570 | table->size |= 1; |
9908fe4d | 1571 | n = table->size * sizeof (struct gcse_expr *); |
1572 | table->table = GNEWVAR (struct gcse_expr *, n); | |
18aa2adf | 1573 | } |
1574 | ||
27cfe3f1 | 1575 | /* Free things allocated by alloc_hash_table. */ |
18aa2adf | 1576 | |
1577 | static void | |
9908fe4d | 1578 | free_hash_table (struct gcse_hash_table_d *table) |
18aa2adf | 1579 | { |
27cfe3f1 | 1580 | free (table->table); |
18aa2adf | 1581 | } |
1582 | ||
07abdb66 | 1583 | /* Compute the expression hash table TABLE. */ |
18aa2adf | 1584 | |
1585 | static void | |
9908fe4d | 1586 | compute_hash_table (struct gcse_hash_table_d *table) |
18aa2adf | 1587 | { |
1588 | /* Initialize count of number of entries in hash table. */ | |
27cfe3f1 | 1589 | table->n_elems = 0; |
9908fe4d | 1590 | memset (table->table, 0, table->size * sizeof (struct gcse_expr *)); |
18aa2adf | 1591 | |
27cfe3f1 | 1592 | compute_hash_table_work (table); |
18aa2adf | 1593 | } |
1594 | \f | |
1595 | /* Expression tracking support. */ | |
1596 | ||
07abdb66 | 1597 | /* Clear canon_modify_mem_list and modify_mem_list tables. */ |
1598 | static void | |
1599 | clear_modify_mem_tables (void) | |
23e5207c | 1600 | { |
07abdb66 | 1601 | unsigned i; |
1602 | bitmap_iterator bi; | |
23e5207c | 1603 | |
07abdb66 | 1604 | EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi) |
23e5207c | 1605 | { |
f1f41a6c | 1606 | modify_mem_list[i].release (); |
1607 | canon_modify_mem_list[i].release (); | |
23e5207c | 1608 | } |
07abdb66 | 1609 | bitmap_clear (modify_mem_list_set); |
1610 | bitmap_clear (blocks_with_calls); | |
23e5207c | 1611 | } |
1612 | ||
07abdb66 | 1613 | /* Release memory used by modify_mem_list_set. */ |
23e5207c | 1614 | |
07abdb66 | 1615 | static void |
1616 | free_modify_mem_tables (void) | |
375b98af | 1617 | { |
07abdb66 | 1618 | clear_modify_mem_tables (); |
1619 | free (modify_mem_list); | |
1620 | free (canon_modify_mem_list); | |
1621 | modify_mem_list = 0; | |
1622 | canon_modify_mem_list = 0; | |
375b98af | 1623 | } |
07abdb66 | 1624 | \f |
b3f3796c | 1625 | /* Compute PRE+LCM working variables. */ |
18aa2adf | 1626 | |
1627 | /* Local properties of expressions. */ | |
bc8197c0 | 1628 | |
18aa2adf | 1629 | /* Nonzero for expressions that are transparent in the block. */ |
b3f3796c | 1630 | static sbitmap *transp; |
18aa2adf | 1631 | |
b3f3796c | 1632 | /* Nonzero for expressions that are computed (available) in the block. */ |
1633 | static sbitmap *comp; | |
18aa2adf | 1634 | |
b3f3796c | 1635 | /* Nonzero for expressions that are locally anticipatable in the block. */ |
1636 | static sbitmap *antloc; | |
18aa2adf | 1637 | |
b3f3796c | 1638 | /* Nonzero for expressions where this block is an optimal computation |
1639 | point. */ | |
1640 | static sbitmap *pre_optimal; | |
7bdba5dd | 1641 | |
b3f3796c | 1642 | /* Nonzero for expressions which are redundant in a particular block. */ |
1643 | static sbitmap *pre_redundant; | |
18aa2adf | 1644 | |
7bcd381b | 1645 | /* Nonzero for expressions which should be inserted on a specific edge. */ |
1646 | static sbitmap *pre_insert_map; | |
1647 | ||
1648 | /* Nonzero for expressions which should be deleted in a specific block. */ | |
1649 | static sbitmap *pre_delete_map; | |
1650 | ||
b3f3796c | 1651 | /* Allocate vars used for PRE analysis. */ |
18aa2adf | 1652 | |
1653 | static void | |
952f0048 | 1654 | alloc_pre_mem (int n_blocks, int n_exprs) |
18aa2adf | 1655 | { |
b3f3796c | 1656 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); |
1657 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
1658 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
0388e90f | 1659 | |
7bcd381b | 1660 | pre_optimal = NULL; |
1661 | pre_redundant = NULL; | |
1662 | pre_insert_map = NULL; | |
1663 | pre_delete_map = NULL; | |
7bcd381b | 1664 | ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs); |
2c084240 | 1665 | |
7bcd381b | 1666 | /* pre_insert and pre_delete are allocated later. */ |
18aa2adf | 1667 | } |
1668 | ||
b3f3796c | 1669 | /* Free vars used for PRE analysis. */ |
18aa2adf | 1670 | |
1671 | static void | |
952f0048 | 1672 | free_pre_mem (void) |
18aa2adf | 1673 | { |
cca23eb2 | 1674 | sbitmap_vector_free (transp); |
1675 | sbitmap_vector_free (comp); | |
8123d49b | 1676 | |
1677 | /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */ | |
18aa2adf | 1678 | |
7bcd381b | 1679 | if (pre_optimal) |
cca23eb2 | 1680 | sbitmap_vector_free (pre_optimal); |
7bcd381b | 1681 | if (pre_redundant) |
cca23eb2 | 1682 | sbitmap_vector_free (pre_redundant); |
7bcd381b | 1683 | if (pre_insert_map) |
cca23eb2 | 1684 | sbitmap_vector_free (pre_insert_map); |
7bcd381b | 1685 | if (pre_delete_map) |
cca23eb2 | 1686 | sbitmap_vector_free (pre_delete_map); |
7bcd381b | 1687 | |
8123d49b | 1688 | transp = comp = NULL; |
7bcd381b | 1689 | pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL; |
18aa2adf | 1690 | } |
1691 | ||
f151d0c6 | 1692 | /* Remove certain expressions from anticipatable and transparent |
1693 | sets of basic blocks that have incoming abnormal edge. | |
1694 | For PRE remove potentially trapping expressions to avoid placing | |
1695 | them on abnormal edges. For hoisting remove memory references that | |
1696 | can be clobbered by calls. */ | |
18aa2adf | 1697 | |
1698 | static void | |
f151d0c6 | 1699 | prune_expressions (bool pre_p) |
18aa2adf | 1700 | { |
9908fe4d | 1701 | struct gcse_expr *expr; |
e531b5f0 | 1702 | unsigned int ui; |
f151d0c6 | 1703 | basic_block bb; |
bafa5ac7 | 1704 | |
3c6549f8 | 1705 | auto_sbitmap prune_exprs (expr_hash_table.n_elems); |
53c5d9d4 | 1706 | bitmap_clear (prune_exprs); |
27cfe3f1 | 1707 | for (ui = 0; ui < expr_hash_table.size; ui++) |
e531b5f0 | 1708 | { |
bc8197c0 | 1709 | for (expr = expr_hash_table.table[ui]; expr; expr = expr->next_same_hash) |
f151d0c6 | 1710 | { |
1711 | /* Note potentially trapping expressions. */ | |
bc8197c0 | 1712 | if (may_trap_p (expr->expr)) |
f151d0c6 | 1713 | { |
08b7917c | 1714 | bitmap_set_bit (prune_exprs, expr->bitmap_index); |
f151d0c6 | 1715 | continue; |
1716 | } | |
e531b5f0 | 1717 | |
050ae453 | 1718 | if (!pre_p && contains_mem_rtx_p (expr->expr)) |
f151d0c6 | 1719 | /* Note memory references that can be clobbered by a call. |
1720 | We do not split abnormal edges in hoisting, so would | |
1721 | a memory reference get hoisted along an abnormal edge, | |
1722 | it would be placed /before/ the call. Therefore, only | |
1723 | constant memory references can be hoisted along abnormal | |
1724 | edges. */ | |
1725 | { | |
050ae453 | 1726 | rtx x = expr->expr; |
1727 | ||
1728 | /* Common cases where we might find the MEM which may allow us | |
1729 | to avoid pruning the expression. */ | |
1730 | while (GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) | |
1731 | x = XEXP (x, 0); | |
1732 | ||
1733 | /* If we found the MEM, go ahead and look at it to see if it has | |
1734 | properties that allow us to avoid pruning its expression out | |
1735 | of the tables. */ | |
1736 | if (MEM_P (x)) | |
1737 | { | |
1738 | if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
1739 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))) | |
1740 | continue; | |
1741 | ||
1742 | if (MEM_READONLY_P (x) | |
1743 | && !MEM_VOLATILE_P (x) | |
1744 | && MEM_NOTRAP_P (x)) | |
1745 | /* Constant memory reference, e.g., a PIC address. */ | |
1746 | continue; | |
1747 | } | |
f151d0c6 | 1748 | |
1749 | /* ??? Optimally, we would use interprocedural alias | |
1750 | analysis to determine if this mem is actually killed | |
1751 | by this call. */ | |
1752 | ||
08b7917c | 1753 | bitmap_set_bit (prune_exprs, expr->bitmap_index); |
f151d0c6 | 1754 | } |
1755 | } | |
1756 | } | |
bafa5ac7 | 1757 | |
fc00614f | 1758 | FOR_EACH_BB_FN (bb, cfun) |
bafa5ac7 | 1759 | { |
e531b5f0 | 1760 | edge e; |
cd665a06 | 1761 | edge_iterator ei; |
e531b5f0 | 1762 | |
1763 | /* If the current block is the destination of an abnormal edge, we | |
f151d0c6 | 1764 | kill all trapping (for PRE) and memory (for hoist) expressions |
1765 | because we won't be able to properly place the instruction on | |
1766 | the edge. So make them neither anticipatable nor transparent. | |
1767 | This is fairly conservative. | |
1768 | ||
1769 | ??? For hoisting it may be necessary to check for set-and-jump | |
1770 | instructions here, not just for abnormal edges. The general problem | |
1771 | is that when an expression cannot not be placed right at the end of | |
1772 | a basic block we should account for any side-effects of a subsequent | |
1773 | jump instructions that could clobber the expression. It would | |
1774 | be best to implement this check along the lines of | |
1ec78e16 | 1775 | should_hoist_expr_to_dom where the target block is already known |
f151d0c6 | 1776 | and, hence, there's no need to conservatively prune expressions on |
1777 | "intermediate" set-and-jump instructions. */ | |
cd665a06 | 1778 | FOR_EACH_EDGE (e, ei, bb->preds) |
f151d0c6 | 1779 | if ((e->flags & EDGE_ABNORMAL) |
1780 | && (pre_p || CALL_P (BB_END (e->src)))) | |
e531b5f0 | 1781 | { |
53c5d9d4 | 1782 | bitmap_and_compl (antloc[bb->index], |
f151d0c6 | 1783 | antloc[bb->index], prune_exprs); |
53c5d9d4 | 1784 | bitmap_and_compl (transp[bb->index], |
f151d0c6 | 1785 | transp[bb->index], prune_exprs); |
e531b5f0 | 1786 | break; |
1787 | } | |
f151d0c6 | 1788 | } |
f151d0c6 | 1789 | } |
1790 | ||
b89c219c | 1791 | /* It may be necessary to insert a large number of insns on edges to |
1792 | make the existing occurrences of expressions fully redundant. This | |
1793 | routine examines the set of insertions and deletions and if the ratio | |
1794 | of insertions to deletions is too high for a particular expression, then | |
1795 | the expression is removed from the insertion/deletion sets. | |
1796 | ||
1797 | N_ELEMS is the number of elements in the hash table. */ | |
1798 | ||
1799 | static void | |
1800 | prune_insertions_deletions (int n_elems) | |
1801 | { | |
1802 | sbitmap_iterator sbi; | |
b89c219c | 1803 | |
1804 | /* We always use I to iterate over blocks/edges and J to iterate over | |
1805 | expressions. */ | |
1806 | unsigned int i, j; | |
1807 | ||
1808 | /* Counts for the number of times an expression needs to be inserted and | |
1809 | number of times an expression can be removed as a result. */ | |
1810 | int *insertions = GCNEWVEC (int, n_elems); | |
1811 | int *deletions = GCNEWVEC (int, n_elems); | |
1812 | ||
1813 | /* Set of expressions which require too many insertions relative to | |
1814 | the number of deletions achieved. We will prune these out of the | |
1815 | insertion/deletion sets. */ | |
3c6549f8 | 1816 | auto_sbitmap prune_exprs (n_elems); |
53c5d9d4 | 1817 | bitmap_clear (prune_exprs); |
b89c219c | 1818 | |
1819 | /* Iterate over the edges counting the number of times each expression | |
1820 | needs to be inserted. */ | |
f1955b22 | 1821 | for (i = 0; i < (unsigned) n_edges_for_fn (cfun); i++) |
b89c219c | 1822 | { |
0d211963 | 1823 | EXECUTE_IF_SET_IN_BITMAP (pre_insert_map[i], 0, j, sbi) |
b89c219c | 1824 | insertions[j]++; |
1825 | } | |
1826 | ||
1827 | /* Similarly for deletions, but those occur in blocks rather than on | |
1828 | edges. */ | |
fe672ac0 | 1829 | for (i = 0; i < (unsigned) last_basic_block_for_fn (cfun); i++) |
b89c219c | 1830 | { |
0d211963 | 1831 | EXECUTE_IF_SET_IN_BITMAP (pre_delete_map[i], 0, j, sbi) |
b89c219c | 1832 | deletions[j]++; |
1833 | } | |
1834 | ||
1835 | /* Now that we have accurate counts, iterate over the elements in the | |
1836 | hash table and see if any need too many insertions relative to the | |
1837 | number of evaluations that can be removed. If so, mark them in | |
1838 | PRUNE_EXPRS. */ | |
1839 | for (j = 0; j < (unsigned) n_elems; j++) | |
1840 | if (deletions[j] | |
1841 | && ((unsigned) insertions[j] / deletions[j]) > MAX_GCSE_INSERTION_RATIO) | |
08b7917c | 1842 | bitmap_set_bit (prune_exprs, j); |
b89c219c | 1843 | |
1844 | /* Now prune PRE_INSERT_MAP and PRE_DELETE_MAP based on PRUNE_EXPRS. */ | |
0d211963 | 1845 | EXECUTE_IF_SET_IN_BITMAP (prune_exprs, 0, j, sbi) |
b89c219c | 1846 | { |
f1955b22 | 1847 | for (i = 0; i < (unsigned) n_edges_for_fn (cfun); i++) |
08b7917c | 1848 | bitmap_clear_bit (pre_insert_map[i], j); |
b89c219c | 1849 | |
fe672ac0 | 1850 | for (i = 0; i < (unsigned) last_basic_block_for_fn (cfun); i++) |
08b7917c | 1851 | bitmap_clear_bit (pre_delete_map[i], j); |
b89c219c | 1852 | } |
1853 | ||
b89c219c | 1854 | free (insertions); |
1855 | free (deletions); | |
1856 | } | |
1857 | ||
f151d0c6 | 1858 | /* Top level routine to do the dataflow analysis needed by PRE. */ |
e531b5f0 | 1859 | |
bc8197c0 | 1860 | static struct edge_list * |
f151d0c6 | 1861 | compute_pre_data (void) |
1862 | { | |
bc8197c0 | 1863 | struct edge_list *edge_list; |
f151d0c6 | 1864 | basic_block bb; |
1865 | ||
1866 | compute_local_properties (transp, comp, antloc, &expr_hash_table); | |
1867 | prune_expressions (true); | |
fe672ac0 | 1868 | bitmap_vector_clear (ae_kill, last_basic_block_for_fn (cfun)); |
f151d0c6 | 1869 | |
1870 | /* Compute ae_kill for each basic block using: | |
1871 | ||
1872 | ~(TRANSP | COMP) | |
1873 | */ | |
1874 | ||
fc00614f | 1875 | FOR_EACH_BB_FN (bb, cfun) |
f151d0c6 | 1876 | { |
53c5d9d4 | 1877 | bitmap_ior (ae_kill[bb->index], transp[bb->index], comp[bb->index]); |
1878 | bitmap_not (ae_kill[bb->index], ae_kill[bb->index]); | |
bafa5ac7 | 1879 | } |
1880 | ||
3f5be5f4 | 1881 | edge_list = pre_edge_lcm (expr_hash_table.n_elems, transp, comp, antloc, |
7bcd381b | 1882 | ae_kill, &pre_insert_map, &pre_delete_map); |
cca23eb2 | 1883 | sbitmap_vector_free (antloc); |
8123d49b | 1884 | antloc = NULL; |
cca23eb2 | 1885 | sbitmap_vector_free (ae_kill); |
3cfec666 | 1886 | ae_kill = NULL; |
b89c219c | 1887 | |
1888 | prune_insertions_deletions (expr_hash_table.n_elems); | |
bc8197c0 | 1889 | |
1890 | return edge_list; | |
18aa2adf | 1891 | } |
1892 | \f | |
1893 | /* PRE utilities */ | |
1894 | ||
6ef828f9 | 1895 | /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach |
b3f3796c | 1896 | block BB. |
18aa2adf | 1897 | |
1898 | VISITED is a pointer to a working buffer for tracking which BB's have | |
1899 | been visited. It is NULL for the top-level call. | |
1900 | ||
1901 | We treat reaching expressions that go through blocks containing the same | |
1902 | reaching expression as "not reaching". E.g. if EXPR is generated in blocks | |
1903 | 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block | |
1904 | 2 as not reaching. The intent is to improve the probability of finding | |
1905 | only one reaching expression and to reduce register lifetimes by picking | |
1906 | the closest such expression. */ | |
1907 | ||
1908 | static int | |
9908fe4d | 1909 | pre_expr_reaches_here_p_work (basic_block occr_bb, struct gcse_expr *expr, |
bc8197c0 | 1910 | basic_block bb, char *visited) |
18aa2adf | 1911 | { |
cb7e28c3 | 1912 | edge pred; |
cd665a06 | 1913 | edge_iterator ei; |
48e1416a | 1914 | |
cd665a06 | 1915 | FOR_EACH_EDGE (pred, ei, bb->preds) |
18aa2adf | 1916 | { |
8d4a53c7 | 1917 | basic_block pred_bb = pred->src; |
18aa2adf | 1918 | |
34154e27 | 1919 | if (pred->src == ENTRY_BLOCK_PTR_FOR_FN (cfun) |
18aa2adf | 1920 | /* Has predecessor has already been visited? */ |
b3d6de89 | 1921 | || visited[pred_bb->index]) |
2c084240 | 1922 | ;/* Nothing to do. */ |
1923 | ||
18aa2adf | 1924 | /* Does this predecessor generate this expression? */ |
08b7917c | 1925 | else if (bitmap_bit_p (comp[pred_bb->index], expr->bitmap_index)) |
18aa2adf | 1926 | { |
1927 | /* Is this the occurrence we're looking for? | |
1928 | Note that there's only one generating occurrence per block | |
1929 | so we just need to check the block number. */ | |
b3f3796c | 1930 | if (occr_bb == pred_bb) |
18aa2adf | 1931 | return 1; |
2c084240 | 1932 | |
b3d6de89 | 1933 | visited[pred_bb->index] = 1; |
18aa2adf | 1934 | } |
1935 | /* Ignore this predecessor if it kills the expression. */ | |
08b7917c | 1936 | else if (! bitmap_bit_p (transp[pred_bb->index], expr->bitmap_index)) |
b3d6de89 | 1937 | visited[pred_bb->index] = 1; |
2c084240 | 1938 | |
18aa2adf | 1939 | /* Neither gen nor kill. */ |
1940 | else | |
b65b4f63 | 1941 | { |
b3d6de89 | 1942 | visited[pred_bb->index] = 1; |
048599b9 | 1943 | if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited)) |
18aa2adf | 1944 | return 1; |
b65b4f63 | 1945 | } |
18aa2adf | 1946 | } |
1947 | ||
1948 | /* All paths have been checked. */ | |
1949 | return 0; | |
1950 | } | |
cd55d9d6 | 1951 | |
1952 | /* The wrapper for pre_expr_reaches_here_work that ensures that any | |
aa40f561 | 1953 | memory allocated for that function is returned. */ |
cd55d9d6 | 1954 | |
1955 | static int | |
9908fe4d | 1956 | pre_expr_reaches_here_p (basic_block occr_bb, struct gcse_expr *expr, basic_block bb) |
cd55d9d6 | 1957 | { |
1958 | int rval; | |
fe672ac0 | 1959 | char *visited = XCNEWVEC (char, last_basic_block_for_fn (cfun)); |
cd55d9d6 | 1960 | |
387732c1 | 1961 | rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited); |
cd55d9d6 | 1962 | |
1963 | free (visited); | |
2c084240 | 1964 | return rval; |
cd55d9d6 | 1965 | } |
18aa2adf | 1966 | \f |
42202832 | 1967 | /* Generate RTL to copy an EXP to REG and return it. */ |
7bcd381b | 1968 | |
42202832 | 1969 | rtx_insn * |
1970 | prepare_copy_insn (rtx reg, rtx exp) | |
7bcd381b | 1971 | { |
526d7387 | 1972 | rtx_insn *pat; |
7bcd381b | 1973 | |
1974 | start_sequence (); | |
06e2144a | 1975 | |
1976 | /* If the expression is something that's an operand, like a constant, | |
1977 | just copy it to a register. */ | |
1978 | if (general_operand (exp, GET_MODE (reg))) | |
1979 | emit_move_insn (reg, exp); | |
1980 | ||
1981 | /* Otherwise, make a new insn to compute this expression and make sure the | |
bc8197c0 | 1982 | insn will be recognized (this also adds any needed CLOBBERs). */ |
0d59b19d | 1983 | else |
1984 | { | |
d1f9b275 | 1985 | rtx_insn *insn = emit_insn (gen_rtx_SET (reg, exp)); |
0d59b19d | 1986 | |
dae9d0e7 | 1987 | if (insn_invalid_p (insn, false)) |
0fa137b8 | 1988 | gcc_unreachable (); |
0d59b19d | 1989 | } |
48e1416a | 1990 | |
31d3e01c | 1991 | pat = get_insns (); |
7bcd381b | 1992 | end_sequence (); |
1993 | ||
1994 | return pat; | |
1995 | } | |
3cfec666 | 1996 | |
42202832 | 1997 | /* Generate RTL to copy an EXPR to its `reaching_reg' and return it. */ |
1998 | ||
1999 | static rtx_insn * | |
2000 | process_insert_insn (struct gcse_expr *expr) | |
2001 | { | |
2002 | rtx reg = expr->reaching_reg; | |
2003 | /* Copy the expression to make sure we don't have any sharing issues. */ | |
2004 | rtx exp = copy_rtx (expr->expr); | |
2005 | ||
2006 | return prepare_copy_insn (reg, exp); | |
2007 | } | |
2008 | ||
b3f3796c | 2009 | /* Add EXPR to the end of basic block BB. |
2010 | ||
36f52b0d | 2011 | This is used by both the PRE and code hoisting. */ |
18aa2adf | 2012 | |
2013 | static void | |
9908fe4d | 2014 | insert_insn_end_basic_block (struct gcse_expr *expr, basic_block bb) |
18aa2adf | 2015 | { |
4cd001d5 | 2016 | rtx_insn *insn = BB_END (bb); |
526d7387 | 2017 | rtx_insn *new_insn; |
18aa2adf | 2018 | rtx reg = expr->reaching_reg; |
2019 | int regno = REGNO (reg); | |
526d7387 | 2020 | rtx_insn *pat, *pat_end; |
18aa2adf | 2021 | |
7bcd381b | 2022 | pat = process_insert_insn (expr); |
0d59b19d | 2023 | gcc_assert (pat && INSN_P (pat)); |
31d3e01c | 2024 | |
2025 | pat_end = pat; | |
2026 | while (NEXT_INSN (pat_end) != NULL_RTX) | |
2027 | pat_end = NEXT_INSN (pat_end); | |
18aa2adf | 2028 | |
2029 | /* If the last insn is a jump, insert EXPR in front [taking care to | |
917bbcab | 2030 | handle cc0, etc. properly]. Similarly we need to care trapping |
17a54dac | 2031 | instructions in presence of non-call exceptions. */ |
18aa2adf | 2032 | |
b9f02dbb | 2033 | if (JUMP_P (insn) |
6d7dc5b9 | 2034 | || (NONJUMP_INSN_P (insn) |
ea091dfd | 2035 | && (!single_succ_p (bb) |
2036 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL))) | |
18aa2adf | 2037 | { |
18aa2adf | 2038 | /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts |
2039 | if cc0 isn't set. */ | |
693c9f42 | 2040 | if (HAVE_cc0) |
18aa2adf | 2041 | { |
693c9f42 | 2042 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2043 | if (note) | |
2044 | insn = safe_as_a <rtx_insn *> (XEXP (note, 0)); | |
2045 | else | |
2046 | { | |
2047 | rtx_insn *maybe_cc0_setter = prev_nonnote_insn (insn); | |
2048 | if (maybe_cc0_setter | |
2049 | && INSN_P (maybe_cc0_setter) | |
2050 | && sets_cc0_p (PATTERN (maybe_cc0_setter))) | |
2051 | insn = maybe_cc0_setter; | |
2052 | } | |
18aa2adf | 2053 | } |
693c9f42 | 2054 | |
18aa2adf | 2055 | /* FIXME: What if something in cc0/jump uses value set in new insn? */ |
3072d30e | 2056 | new_insn = emit_insn_before_noloc (pat, insn, bb); |
170e5c6c | 2057 | } |
2c084240 | 2058 | |
170e5c6c | 2059 | /* Likewise if the last insn is a call, as will happen in the presence |
2060 | of exception handling. */ | |
b9f02dbb | 2061 | else if (CALL_P (insn) |
ea091dfd | 2062 | && (!single_succ_p (bb) |
2063 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL)) | |
170e5c6c | 2064 | { |
ed5527ca | 2065 | /* Keeping in mind targets with small register classes and parameters |
2066 | in registers, we search backward and place the instructions before | |
2067 | the first parameter is loaded. Do this for everyone for consistency | |
36f52b0d | 2068 | and a presumption that we'll get better code elsewhere as well. */ |
170e5c6c | 2069 | |
2070 | /* Since different machines initialize their parameter registers | |
2071 | in different orders, assume nothing. Collect the set of all | |
2072 | parameter registers. */ | |
5496dbfc | 2073 | insn = find_first_parameter_load (insn, BB_HEAD (bb)); |
170e5c6c | 2074 | |
9fc37e9d | 2075 | /* If we found all the parameter loads, then we want to insert |
2076 | before the first parameter load. | |
2077 | ||
2078 | If we did not find all the parameter loads, then we might have | |
2079 | stopped on the head of the block, which could be a CODE_LABEL. | |
2080 | If we inserted before the CODE_LABEL, then we would be putting | |
2081 | the insn in the wrong basic block. In that case, put the insn | |
8b3dea0b | 2082 | after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */ |
b9f02dbb | 2083 | while (LABEL_P (insn) |
83458610 | 2084 | || NOTE_INSN_BASIC_BLOCK_P (insn)) |
8b3dea0b | 2085 | insn = NEXT_INSN (insn); |
2c084240 | 2086 | |
3072d30e | 2087 | new_insn = emit_insn_before_noloc (pat, insn, bb); |
18aa2adf | 2088 | } |
2089 | else | |
3072d30e | 2090 | new_insn = emit_insn_after_noloc (pat, insn, bb); |
18aa2adf | 2091 | |
31d3e01c | 2092 | while (1) |
b3f3796c | 2093 | { |
31d3e01c | 2094 | if (INSN_P (pat)) |
2e81afe5 | 2095 | add_label_notes (PATTERN (pat), new_insn); |
31d3e01c | 2096 | if (pat == pat_end) |
2097 | break; | |
2098 | pat = NEXT_INSN (pat); | |
b3f3796c | 2099 | } |
170e5c6c | 2100 | |
18aa2adf | 2101 | gcse_create_count++; |
2102 | ||
3f5be5f4 | 2103 | if (dump_file) |
18aa2adf | 2104 | { |
3f5be5f4 | 2105 | fprintf (dump_file, "PRE/HOIST: end of bb %d, insn %d, ", |
b3d6de89 | 2106 | bb->index, INSN_UID (new_insn)); |
3f5be5f4 | 2107 | fprintf (dump_file, "copying expression %d to reg %d\n", |
2c084240 | 2108 | expr->bitmap_index, regno); |
18aa2adf | 2109 | } |
2110 | } | |
2111 | ||
7bcd381b | 2112 | /* Insert partially redundant expressions on edges in the CFG to make |
2113 | the expressions fully redundant. */ | |
18aa2adf | 2114 | |
7bcd381b | 2115 | static int |
9908fe4d | 2116 | pre_edge_insert (struct edge_list *edge_list, struct gcse_expr **index_map) |
18aa2adf | 2117 | { |
2c084240 | 2118 | int e, i, j, num_edges, set_size, did_insert = 0; |
b3f3796c | 2119 | sbitmap *inserted; |
2120 | ||
7bcd381b | 2121 | /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge |
2122 | if it reaches any of the deleted expressions. */ | |
18aa2adf | 2123 | |
7bcd381b | 2124 | set_size = pre_insert_map[0]->size; |
2125 | num_edges = NUM_EDGES (edge_list); | |
27cfe3f1 | 2126 | inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems); |
53c5d9d4 | 2127 | bitmap_vector_clear (inserted, num_edges); |
18aa2adf | 2128 | |
7bcd381b | 2129 | for (e = 0; e < num_edges; e++) |
18aa2adf | 2130 | { |
2131 | int indx; | |
8d4a53c7 | 2132 | basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e); |
b3f3796c | 2133 | |
b3f3796c | 2134 | for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS) |
18aa2adf | 2135 | { |
7bcd381b | 2136 | SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i]; |
18aa2adf | 2137 | |
bc8197c0 | 2138 | for (j = indx; |
2139 | insert && j < (int) expr_hash_table.n_elems; | |
2140 | j++, insert >>= 1) | |
2c084240 | 2141 | if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX) |
2142 | { | |
9908fe4d | 2143 | struct gcse_expr *expr = index_map[j]; |
2144 | struct gcse_occr *occr; | |
b3f3796c | 2145 | |
424da949 | 2146 | /* Now look at each deleted occurrence of this expression. */ |
2c084240 | 2147 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
2148 | { | |
2149 | if (! occr->deleted_p) | |
2150 | continue; | |
2151 | ||
822e391f | 2152 | /* Insert this expression on this edge if it would |
424da949 | 2153 | reach the deleted occurrence in BB. */ |
08b7917c | 2154 | if (!bitmap_bit_p (inserted[e], j)) |
2c084240 | 2155 | { |
526d7387 | 2156 | rtx_insn *insn; |
2c084240 | 2157 | edge eg = INDEX_EDGE (edge_list, e); |
2158 | ||
2159 | /* We can't insert anything on an abnormal and | |
2160 | critical edge, so we insert the insn at the end of | |
2161 | the previous block. There are several alternatives | |
2162 | detailed in Morgans book P277 (sec 10.5) for | |
2163 | handling this situation. This one is easiest for | |
2164 | now. */ | |
2165 | ||
164aece4 | 2166 | if (eg->flags & EDGE_ABNORMAL) |
36f52b0d | 2167 | insert_insn_end_basic_block (index_map[j], bb); |
2c084240 | 2168 | else |
2169 | { | |
2170 | insn = process_insert_insn (index_map[j]); | |
2171 | insert_insn_on_edge (insn, eg); | |
2172 | } | |
2173 | ||
3f5be5f4 | 2174 | if (dump_file) |
2c084240 | 2175 | { |
d743aba2 | 2176 | fprintf (dump_file, "PRE: edge (%d,%d), ", |
b3d6de89 | 2177 | bb->index, |
2178 | INDEX_EDGE_SUCC_BB (edge_list, e)->index); | |
3f5be5f4 | 2179 | fprintf (dump_file, "copy expression %d\n", |
2c084240 | 2180 | expr->bitmap_index); |
2181 | } | |
2182 | ||
8e802be9 | 2183 | update_ld_motion_stores (expr); |
08b7917c | 2184 | bitmap_set_bit (inserted[e], j); |
2c084240 | 2185 | did_insert = 1; |
2186 | gcse_create_count++; | |
2187 | } | |
2188 | } | |
2189 | } | |
18aa2adf | 2190 | } |
2191 | } | |
0388e90f | 2192 | |
cca23eb2 | 2193 | sbitmap_vector_free (inserted); |
7bcd381b | 2194 | return did_insert; |
18aa2adf | 2195 | } |
2196 | ||
53ee16e4 | 2197 | /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG. |
9d344979 | 2198 | Given "old_reg <- expr" (INSN), instead of adding after it |
2199 | reaching_reg <- old_reg | |
2200 | it's better to do the following: | |
2201 | reaching_reg <- expr | |
2202 | old_reg <- reaching_reg | |
2203 | because this way copy propagation can discover additional PRE | |
5c47e414 | 2204 | opportunities. But if this fails, we try the old way. |
2205 | When "expr" is a store, i.e. | |
2206 | given "MEM <- old_reg", instead of adding after it | |
2207 | reaching_reg <- old_reg | |
2208 | it's better to add it before as follows: | |
2209 | reaching_reg <- old_reg | |
2210 | MEM <- reaching_reg. */ | |
18aa2adf | 2211 | |
2212 | static void | |
9908fe4d | 2213 | pre_insert_copy_insn (struct gcse_expr *expr, rtx_insn *insn) |
18aa2adf | 2214 | { |
2215 | rtx reg = expr->reaching_reg; | |
2216 | int regno = REGNO (reg); | |
2217 | int indx = expr->bitmap_index; | |
53ee16e4 | 2218 | rtx pat = PATTERN (insn); |
f9a00e9e | 2219 | rtx set, first_set; |
2220 | rtx_insn *new_insn; | |
9d344979 | 2221 | rtx old_reg; |
53ee16e4 | 2222 | int i; |
18aa2adf | 2223 | |
53ee16e4 | 2224 | /* This block matches the logic in hash_scan_insn. */ |
0d59b19d | 2225 | switch (GET_CODE (pat)) |
53ee16e4 | 2226 | { |
0d59b19d | 2227 | case SET: |
2228 | set = pat; | |
2229 | break; | |
2230 | ||
2231 | case PARALLEL: | |
53ee16e4 | 2232 | /* Search through the parallel looking for the set whose |
2233 | source was the expression that we're interested in. */ | |
00ce82e3 | 2234 | first_set = NULL_RTX; |
53ee16e4 | 2235 | set = NULL_RTX; |
2236 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
2237 | { | |
2238 | rtx x = XVECEXP (pat, 0, i); | |
00ce82e3 | 2239 | if (GET_CODE (x) == SET) |
53ee16e4 | 2240 | { |
00ce82e3 | 2241 | /* If the source was a REG_EQUAL or REG_EQUIV note, we |
2242 | may not find an equivalent expression, but in this | |
2243 | case the PARALLEL will have a single set. */ | |
2244 | if (first_set == NULL_RTX) | |
2245 | first_set = x; | |
2246 | if (expr_equiv_p (SET_SRC (x), expr->expr)) | |
2247 | { | |
2248 | set = x; | |
2249 | break; | |
2250 | } | |
53ee16e4 | 2251 | } |
2252 | } | |
00ce82e3 | 2253 | |
2254 | gcc_assert (first_set); | |
2255 | if (set == NULL_RTX) | |
2256 | set = first_set; | |
0d59b19d | 2257 | break; |
2258 | ||
2259 | default: | |
2260 | gcc_unreachable (); | |
53ee16e4 | 2261 | } |
2c084240 | 2262 | |
b9f02dbb | 2263 | if (REG_P (SET_DEST (set))) |
53ee16e4 | 2264 | { |
5c47e414 | 2265 | old_reg = SET_DEST (set); |
2266 | /* Check if we can modify the set destination in the original insn. */ | |
2267 | if (validate_change (insn, &SET_DEST (set), reg, 0)) | |
2268 | { | |
2269 | new_insn = gen_move_insn (old_reg, reg); | |
2270 | new_insn = emit_insn_after (new_insn, insn); | |
5c47e414 | 2271 | } |
2272 | else | |
2273 | { | |
2274 | new_insn = gen_move_insn (reg, old_reg); | |
2275 | new_insn = emit_insn_after (new_insn, insn); | |
5c47e414 | 2276 | } |
53ee16e4 | 2277 | } |
5c47e414 | 2278 | else /* This is possible only in case of a store to memory. */ |
53ee16e4 | 2279 | { |
5c47e414 | 2280 | old_reg = SET_SRC (set); |
53ee16e4 | 2281 | new_insn = gen_move_insn (reg, old_reg); |
5c47e414 | 2282 | |
2283 | /* Check if we can modify the set source in the original insn. */ | |
2284 | if (validate_change (insn, &SET_SRC (set), reg, 0)) | |
2285 | new_insn = emit_insn_before (new_insn, insn); | |
2286 | else | |
2287 | new_insn = emit_insn_after (new_insn, insn); | |
53ee16e4 | 2288 | } |
18aa2adf | 2289 | |
2290 | gcse_create_count++; | |
2291 | ||
3f5be5f4 | 2292 | if (dump_file) |
2293 | fprintf (dump_file, | |
7bcd381b | 2294 | "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n", |
90bd219d | 2295 | BLOCK_FOR_INSN (insn)->index, INSN_UID (new_insn), indx, |
7bcd381b | 2296 | INSN_UID (insn), regno); |
18aa2adf | 2297 | } |
2298 | ||
2299 | /* Copy available expressions that reach the redundant expression | |
2300 | to `reaching_reg'. */ | |
2301 | ||
2302 | static void | |
952f0048 | 2303 | pre_insert_copies (void) |
18aa2adf | 2304 | { |
5c47e414 | 2305 | unsigned int i, added_copy; |
9908fe4d | 2306 | struct gcse_expr *expr; |
2307 | struct gcse_occr *occr; | |
2308 | struct gcse_occr *avail; | |
b3f3796c | 2309 | |
18aa2adf | 2310 | /* For each available expression in the table, copy the result to |
2311 | `reaching_reg' if the expression reaches a deleted one. | |
2312 | ||
2313 | ??? The current algorithm is rather brute force. | |
2314 | Need to do some profiling. */ | |
2315 | ||
27cfe3f1 | 2316 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 2317 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 2318 | { |
2319 | /* If the basic block isn't reachable, PPOUT will be TRUE. However, | |
2320 | we don't want to insert a copy here because the expression may not | |
2321 | really be redundant. So only insert an insn if the expression was | |
2322 | deleted. This test also avoids further processing if the | |
2323 | expression wasn't deleted anywhere. */ | |
2324 | if (expr->reaching_reg == NULL) | |
2325 | continue; | |
b9f02dbb | 2326 | |
5c47e414 | 2327 | /* Set when we add a copy for that expression. */ |
b9f02dbb | 2328 | added_copy = 0; |
2c084240 | 2329 | |
2330 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) | |
2331 | { | |
2332 | if (! occr->deleted_p) | |
2333 | continue; | |
18aa2adf | 2334 | |
2c084240 | 2335 | for (avail = expr->avail_occr; avail != NULL; avail = avail->next) |
2336 | { | |
526d7387 | 2337 | rtx_insn *insn = avail->insn; |
18aa2adf | 2338 | |
2c084240 | 2339 | /* No need to handle this one if handled already. */ |
2340 | if (avail->copied_p) | |
2341 | continue; | |
18aa2adf | 2342 | |
2c084240 | 2343 | /* Don't handle this one if it's a redundant one. */ |
dd1286fb | 2344 | if (insn->deleted ()) |
2c084240 | 2345 | continue; |
18aa2adf | 2346 | |
2c084240 | 2347 | /* Or if the expression doesn't reach the deleted one. */ |
3cfec666 | 2348 | if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn), |
8d4a53c7 | 2349 | expr, |
2350 | BLOCK_FOR_INSN (occr->insn))) | |
2c084240 | 2351 | continue; |
18aa2adf | 2352 | |
5c47e414 | 2353 | added_copy = 1; |
2354 | ||
2c084240 | 2355 | /* Copy the result of avail to reaching_reg. */ |
2356 | pre_insert_copy_insn (expr, insn); | |
2357 | avail->copied_p = 1; | |
2358 | } | |
2359 | } | |
5c47e414 | 2360 | |
b9f02dbb | 2361 | if (added_copy) |
5c47e414 | 2362 | update_ld_motion_stores (expr); |
2c084240 | 2363 | } |
18aa2adf | 2364 | } |
2365 | ||
97f436b3 | 2366 | struct set_data |
2367 | { | |
526d7387 | 2368 | rtx_insn *insn; |
97f436b3 | 2369 | const_rtx set; |
2370 | int nsets; | |
2371 | }; | |
2372 | ||
2373 | /* Increment number of sets and record set in DATA. */ | |
2374 | ||
2375 | static void | |
2376 | record_set_data (rtx dest, const_rtx set, void *data) | |
2377 | { | |
2378 | struct set_data *s = (struct set_data *)data; | |
2379 | ||
2380 | if (GET_CODE (set) == SET) | |
2381 | { | |
2382 | /* We allow insns having multiple sets, where all but one are | |
2383 | dead as single set insns. In the common case only a single | |
2384 | set is present, so we want to avoid checking for REG_UNUSED | |
2385 | notes unless necessary. */ | |
2386 | if (s->nsets == 1 | |
2387 | && find_reg_note (s->insn, REG_UNUSED, SET_DEST (s->set)) | |
2388 | && !side_effects_p (s->set)) | |
2389 | s->nsets = 0; | |
2390 | ||
2391 | if (!s->nsets) | |
2392 | { | |
2393 | /* Record this set. */ | |
2394 | s->nsets += 1; | |
2395 | s->set = set; | |
2396 | } | |
2397 | else if (!find_reg_note (s->insn, REG_UNUSED, dest) | |
2398 | || side_effects_p (set)) | |
2399 | s->nsets += 1; | |
2400 | } | |
2401 | } | |
2402 | ||
2403 | static const_rtx | |
526d7387 | 2404 | single_set_gcse (rtx_insn *insn) |
97f436b3 | 2405 | { |
2406 | struct set_data s; | |
2407 | rtx pattern; | |
2408 | ||
2409 | gcc_assert (INSN_P (insn)); | |
2410 | ||
2411 | /* Optimize common case. */ | |
2412 | pattern = PATTERN (insn); | |
2413 | if (GET_CODE (pattern) == SET) | |
2414 | return pattern; | |
2415 | ||
2416 | s.insn = insn; | |
2417 | s.nsets = 0; | |
2418 | note_stores (pattern, record_set_data, &s); | |
2419 | ||
2420 | /* Considered invariant insns have exactly one set. */ | |
2421 | gcc_assert (s.nsets == 1); | |
2422 | return s.set; | |
2423 | } | |
2424 | ||
51f6e244 | 2425 | /* Emit move from SRC to DEST noting the equivalence with expression computed |
2426 | in INSN. */ | |
bc8197c0 | 2427 | |
9ed997be | 2428 | static rtx_insn * |
526d7387 | 2429 | gcse_emit_move_after (rtx dest, rtx src, rtx_insn *insn) |
51f6e244 | 2430 | { |
50fc2d35 | 2431 | rtx_insn *new_rtx; |
97f436b3 | 2432 | const_rtx set = single_set_gcse (insn); |
2433 | rtx set2; | |
51f6e244 | 2434 | rtx note; |
264adf90 | 2435 | rtx eqv = NULL_RTX; |
51f6e244 | 2436 | |
2437 | /* This should never fail since we're creating a reg->reg copy | |
2438 | we've verified to be valid. */ | |
2439 | ||
9ce37fa7 | 2440 | new_rtx = emit_insn_after (gen_move_insn (dest, src), insn); |
27442180 | 2441 | |
264adf90 | 2442 | /* Note the equivalence for local CSE pass. Take the note from the old |
2443 | set if there was one. Otherwise record the SET_SRC from the old set | |
2444 | unless DEST is also an operand of the SET_SRC. */ | |
9ce37fa7 | 2445 | set2 = single_set (new_rtx); |
65e78aeb | 2446 | if (!set2 || !rtx_equal_p (SET_DEST (set2), dest)) |
9ce37fa7 | 2447 | return new_rtx; |
51f6e244 | 2448 | if ((note = find_reg_equal_equiv_note (insn))) |
2449 | eqv = XEXP (note, 0); | |
264adf90 | 2450 | else if (! REG_P (dest) |
2451 | || ! reg_mentioned_p (dest, SET_SRC (set))) | |
51f6e244 | 2452 | eqv = SET_SRC (set); |
2453 | ||
264adf90 | 2454 | if (eqv != NULL_RTX) |
2455 | set_unique_reg_note (new_rtx, REG_EQUAL, copy_insn_1 (eqv)); | |
51f6e244 | 2456 | |
9ce37fa7 | 2457 | return new_rtx; |
51f6e244 | 2458 | } |
2459 | ||
18aa2adf | 2460 | /* Delete redundant computations. |
18aa2adf | 2461 | Deletion is done by changing the insn to copy the `reaching_reg' of |
2462 | the expression into the result of the SET. It is left to later passes | |
67d57e27 | 2463 | to propagate the copy or eliminate it. |
18aa2adf | 2464 | |
bc8197c0 | 2465 | Return nonzero if a change is made. */ |
18aa2adf | 2466 | |
2467 | static int | |
952f0048 | 2468 | pre_delete (void) |
18aa2adf | 2469 | { |
a08b57af | 2470 | unsigned int i; |
256d47d0 | 2471 | int changed; |
9908fe4d | 2472 | struct gcse_expr *expr; |
2473 | struct gcse_occr *occr; | |
b3f3796c | 2474 | |
18aa2adf | 2475 | changed = 0; |
27cfe3f1 | 2476 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 2477 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 2478 | { |
2479 | int indx = expr->bitmap_index; | |
18aa2adf | 2480 | |
bc8197c0 | 2481 | /* We only need to search antic_occr since we require ANTLOC != 0. */ |
2c084240 | 2482 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
2483 | { | |
526d7387 | 2484 | rtx_insn *insn = occr->insn; |
2c084240 | 2485 | rtx set; |
8d4a53c7 | 2486 | basic_block bb = BLOCK_FOR_INSN (insn); |
18aa2adf | 2487 | |
53ee16e4 | 2488 | /* We only delete insns that have a single_set. */ |
08b7917c | 2489 | if (bitmap_bit_p (pre_delete_map[bb->index], indx) |
3072d30e | 2490 | && (set = single_set (insn)) != 0 |
2491 | && dbg_cnt (pre_insn)) | |
2c084240 | 2492 | { |
2c084240 | 2493 | /* Create a pseudo-reg to store the result of reaching |
2494 | expressions into. Get the mode for the new pseudo from | |
2495 | the mode of the original destination pseudo. */ | |
2496 | if (expr->reaching_reg == NULL) | |
ae12ddda | 2497 | expr->reaching_reg = gen_reg_rtx_and_attrs (SET_DEST (set)); |
2c084240 | 2498 | |
bc8197c0 | 2499 | gcse_emit_move_after (SET_DEST (set), expr->reaching_reg, insn); |
51f6e244 | 2500 | delete_insn (insn); |
2501 | occr->deleted_p = 1; | |
51f6e244 | 2502 | changed = 1; |
2503 | gcse_subst_count++; | |
18aa2adf | 2504 | |
3f5be5f4 | 2505 | if (dump_file) |
2c084240 | 2506 | { |
3f5be5f4 | 2507 | fprintf (dump_file, |
2c084240 | 2508 | "PRE: redundant insn %d (expression %d) in ", |
2509 | INSN_UID (insn), indx); | |
3f5be5f4 | 2510 | fprintf (dump_file, "bb %d, reaching reg is %d\n", |
b3d6de89 | 2511 | bb->index, REGNO (expr->reaching_reg)); |
2c084240 | 2512 | } |
2513 | } | |
2514 | } | |
2515 | } | |
18aa2adf | 2516 | |
2517 | return changed; | |
2518 | } | |
2519 | ||
2520 | /* Perform GCSE optimizations using PRE. | |
2521 | This is called by one_pre_gcse_pass after all the dataflow analysis | |
2522 | has been done. | |
2523 | ||
2c084240 | 2524 | This is based on the original Morel-Renvoise paper Fred Chow's thesis, and |
2525 | lazy code motion from Knoop, Ruthing and Steffen as described in Advanced | |
2526 | Compiler Design and Implementation. | |
18aa2adf | 2527 | |
2c084240 | 2528 | ??? A new pseudo reg is created to hold the reaching expression. The nice |
2529 | thing about the classical approach is that it would try to use an existing | |
2530 | reg. If the register can't be adequately optimized [i.e. we introduce | |
2531 | reload problems], one could add a pass here to propagate the new register | |
2532 | through the block. | |
18aa2adf | 2533 | |
2c084240 | 2534 | ??? We don't handle single sets in PARALLELs because we're [currently] not |
2535 | able to copy the rest of the parallel when we insert copies to create full | |
2536 | redundancies from partial redundancies. However, there's no reason why we | |
2537 | can't handle PARALLELs in the cases where there are no partial | |
18aa2adf | 2538 | redundancies. */ |
2539 | ||
2540 | static int | |
bc8197c0 | 2541 | pre_gcse (struct edge_list *edge_list) |
18aa2adf | 2542 | { |
a08b57af | 2543 | unsigned int i; |
2544 | int did_insert, changed; | |
9908fe4d | 2545 | struct gcse_expr **index_map; |
2546 | struct gcse_expr *expr; | |
18aa2adf | 2547 | |
2548 | /* Compute a mapping from expression number (`bitmap_index') to | |
2549 | hash table entry. */ | |
2550 | ||
9908fe4d | 2551 | index_map = XCNEWVEC (struct gcse_expr *, expr_hash_table.n_elems); |
27cfe3f1 | 2552 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 2553 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 2554 | index_map[expr->bitmap_index] = expr; |
18aa2adf | 2555 | |
18aa2adf | 2556 | /* Delete the redundant insns first so that |
2557 | - we know what register to use for the new insns and for the other | |
2558 | ones with reaching expressions | |
2559 | - we know which insns are redundant when we go to create copies */ | |
2c084240 | 2560 | |
18aa2adf | 2561 | changed = pre_delete (); |
7bcd381b | 2562 | did_insert = pre_edge_insert (edge_list, index_map); |
2c084240 | 2563 | |
18aa2adf | 2564 | /* In other places with reaching expressions, copy the expression to the |
7bcd381b | 2565 | specially allocated pseudo-reg that reaches the redundant expr. */ |
18aa2adf | 2566 | pre_insert_copies (); |
7bcd381b | 2567 | if (did_insert) |
2568 | { | |
2569 | commit_edge_insertions (); | |
2570 | changed = 1; | |
2571 | } | |
18aa2adf | 2572 | |
cd55d9d6 | 2573 | free (index_map); |
18aa2adf | 2574 | return changed; |
2575 | } | |
2576 | ||
2577 | /* Top level routine to perform one PRE GCSE pass. | |
2578 | ||
6ef828f9 | 2579 | Return nonzero if a change was made. */ |
18aa2adf | 2580 | |
2581 | static int | |
d743aba2 | 2582 | one_pre_gcse_pass (void) |
18aa2adf | 2583 | { |
2584 | int changed = 0; | |
2585 | ||
2586 | gcse_subst_count = 0; | |
2587 | gcse_create_count = 0; | |
2588 | ||
d743aba2 | 2589 | /* Return if there's nothing to do, or it is too expensive. */ |
a28770e1 | 2590 | if (n_basic_blocks_for_fn (cfun) <= NUM_FIXED_BLOCKS + 1 |
82b9069d | 2591 | || gcse_or_cprop_is_too_expensive (_("PRE disabled"))) |
d743aba2 | 2592 | return 0; |
2593 | ||
2594 | /* We need alias. */ | |
2595 | init_alias_analysis (); | |
2596 | ||
2597 | bytes_used = 0; | |
2598 | gcc_obstack_init (&gcse_obstack); | |
2599 | alloc_gcse_mem (); | |
2600 | ||
07abdb66 | 2601 | alloc_hash_table (&expr_hash_table); |
7bcd381b | 2602 | add_noreturn_fake_exit_edges (); |
8e802be9 | 2603 | if (flag_gcse_lm) |
2604 | compute_ld_motion_mems (); | |
2605 | ||
27cfe3f1 | 2606 | compute_hash_table (&expr_hash_table); |
bc8197c0 | 2607 | if (flag_gcse_lm) |
2608 | trim_ld_motion_mems (); | |
3f5be5f4 | 2609 | if (dump_file) |
2610 | dump_hash_table (dump_file, "Expression", &expr_hash_table); | |
2c084240 | 2611 | |
27cfe3f1 | 2612 | if (expr_hash_table.n_elems > 0) |
18aa2adf | 2613 | { |
bc8197c0 | 2614 | struct edge_list *edge_list; |
fe672ac0 | 2615 | alloc_pre_mem (last_basic_block_for_fn (cfun), expr_hash_table.n_elems); |
bc8197c0 | 2616 | edge_list = compute_pre_data (); |
2617 | changed |= pre_gcse (edge_list); | |
7bcd381b | 2618 | free_edge_list (edge_list); |
18aa2adf | 2619 | free_pre_mem (); |
2620 | } | |
2c084240 | 2621 | |
bc8197c0 | 2622 | if (flag_gcse_lm) |
2623 | free_ld_motion_mems (); | |
41d24834 | 2624 | remove_fake_exit_edges (); |
27cfe3f1 | 2625 | free_hash_table (&expr_hash_table); |
18aa2adf | 2626 | |
d743aba2 | 2627 | free_gcse_mem (); |
2628 | obstack_free (&gcse_obstack, NULL); | |
2629 | ||
2630 | /* We are finished with alias. */ | |
2631 | end_alias_analysis (); | |
2632 | ||
3f5be5f4 | 2633 | if (dump_file) |
18aa2adf | 2634 | { |
d743aba2 | 2635 | fprintf (dump_file, "PRE GCSE of %s, %d basic blocks, %d bytes needed, ", |
a28770e1 | 2636 | current_function_name (), n_basic_blocks_for_fn (cfun), |
2637 | bytes_used); | |
3f5be5f4 | 2638 | fprintf (dump_file, "%d substs, %d insns created\n", |
2c084240 | 2639 | gcse_subst_count, gcse_create_count); |
18aa2adf | 2640 | } |
2641 | ||
2642 | return changed; | |
2643 | } | |
322b2436 | 2644 | \f |
19d2fe05 | 2645 | /* If X contains any LABEL_REF's, add REG_LABEL_OPERAND notes for them |
2646 | to INSN. If such notes are added to an insn which references a | |
2647 | CODE_LABEL, the LABEL_NUSES count is incremented. We have to add | |
2648 | that note, because the following loop optimization pass requires | |
2649 | them. */ | |
322b2436 | 2650 | |
322b2436 | 2651 | /* ??? If there was a jump optimization pass after gcse and before loop, |
2652 | then we would not need to do this here, because jump would add the | |
19d2fe05 | 2653 | necessary REG_LABEL_OPERAND and REG_LABEL_TARGET notes. */ |
322b2436 | 2654 | |
2655 | static void | |
84b4ae13 | 2656 | add_label_notes (rtx x, rtx_insn *insn) |
322b2436 | 2657 | { |
2658 | enum rtx_code code = GET_CODE (x); | |
2659 | int i, j; | |
d2ca078f | 2660 | const char *fmt; |
322b2436 | 2661 | |
2662 | if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x)) | |
2663 | { | |
e72f55f8 | 2664 | /* This code used to ignore labels that referred to dispatch tables to |
d01481af | 2665 | avoid flow generating (slightly) worse code. |
e72f55f8 | 2666 | |
b65b4f63 | 2667 | We no longer ignore such label references (see LABEL_REF handling in |
2668 | mark_jump_label for additional information). */ | |
2c084240 | 2669 | |
a8d1dae0 | 2670 | /* There's no reason for current users to emit jump-insns with |
2671 | such a LABEL_REF, so we don't have to handle REG_LABEL_TARGET | |
2672 | notes. */ | |
2673 | gcc_assert (!JUMP_P (insn)); | |
c7799456 | 2674 | add_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)); |
a1ddb869 | 2675 | |
c7799456 | 2676 | if (LABEL_P (label_ref_label (x))) |
2677 | LABEL_NUSES (label_ref_label (x))++; | |
a8d1dae0 | 2678 | |
322b2436 | 2679 | return; |
2680 | } | |
2681 | ||
2c084240 | 2682 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
322b2436 | 2683 | { |
2684 | if (fmt[i] == 'e') | |
2685 | add_label_notes (XEXP (x, i), insn); | |
2686 | else if (fmt[i] == 'E') | |
2687 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2688 | add_label_notes (XVECEXP (x, i, j), insn); | |
2689 | } | |
2690 | } | |
b3f3796c | 2691 | |
6627f3ed | 2692 | /* Code Hoisting variables and subroutines. */ |
2693 | ||
2694 | /* Very busy expressions. */ | |
2695 | static sbitmap *hoist_vbein; | |
2696 | static sbitmap *hoist_vbeout; | |
2697 | ||
6627f3ed | 2698 | /* ??? We could compute post dominators and run this algorithm in |
95cc2547 | 2699 | reverse to perform tail merging, doing so would probably be |
6627f3ed | 2700 | more effective than the tail merging code in jump.c. |
2701 | ||
2702 | It's unclear if tail merging could be run in parallel with | |
2703 | code hoisting. It would be nice. */ | |
2704 | ||
2705 | /* Allocate vars used for code hoisting analysis. */ | |
2706 | ||
2707 | static void | |
952f0048 | 2708 | alloc_code_hoist_mem (int n_blocks, int n_exprs) |
6627f3ed | 2709 | { |
2710 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2711 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2712 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2713 | ||
2714 | hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2715 | hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
6627f3ed | 2716 | } |
2717 | ||
2718 | /* Free vars used for code hoisting analysis. */ | |
2719 | ||
2720 | static void | |
952f0048 | 2721 | free_code_hoist_mem (void) |
6627f3ed | 2722 | { |
cca23eb2 | 2723 | sbitmap_vector_free (antloc); |
2724 | sbitmap_vector_free (transp); | |
2725 | sbitmap_vector_free (comp); | |
6627f3ed | 2726 | |
cca23eb2 | 2727 | sbitmap_vector_free (hoist_vbein); |
2728 | sbitmap_vector_free (hoist_vbeout); | |
6627f3ed | 2729 | |
0051c76a | 2730 | free_dominance_info (CDI_DOMINATORS); |
6627f3ed | 2731 | } |
2732 | ||
2733 | /* Compute the very busy expressions at entry/exit from each block. | |
2734 | ||
2735 | An expression is very busy if all paths from a given point | |
2736 | compute the expression. */ | |
2737 | ||
2738 | static void | |
952f0048 | 2739 | compute_code_hoist_vbeinout (void) |
6627f3ed | 2740 | { |
4c26117a | 2741 | int changed, passes; |
2742 | basic_block bb; | |
6627f3ed | 2743 | |
fe672ac0 | 2744 | bitmap_vector_clear (hoist_vbeout, last_basic_block_for_fn (cfun)); |
2745 | bitmap_vector_clear (hoist_vbein, last_basic_block_for_fn (cfun)); | |
6627f3ed | 2746 | |
2747 | passes = 0; | |
2748 | changed = 1; | |
2c084240 | 2749 | |
6627f3ed | 2750 | while (changed) |
2751 | { | |
2752 | changed = 0; | |
2c084240 | 2753 | |
6627f3ed | 2754 | /* We scan the blocks in the reverse order to speed up |
2755 | the convergence. */ | |
7a46197b | 2756 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
6627f3ed | 2757 | { |
34154e27 | 2758 | if (bb->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
33ff724a | 2759 | { |
08b7917c | 2760 | bitmap_intersection_of_succs (hoist_vbeout[bb->index], |
2761 | hoist_vbein, bb); | |
33ff724a | 2762 | |
2763 | /* Include expressions in VBEout that are calculated | |
2764 | in BB and available at its end. */ | |
53c5d9d4 | 2765 | bitmap_ior (hoist_vbeout[bb->index], |
33ff724a | 2766 | hoist_vbeout[bb->index], comp[bb->index]); |
2767 | } | |
0f11b6b5 | 2768 | |
53c5d9d4 | 2769 | changed |= bitmap_or_and (hoist_vbein[bb->index], |
0f11b6b5 | 2770 | antloc[bb->index], |
2771 | hoist_vbeout[bb->index], | |
2772 | transp[bb->index]); | |
6627f3ed | 2773 | } |
2c084240 | 2774 | |
6627f3ed | 2775 | passes++; |
2776 | } | |
2777 | ||
3f5be5f4 | 2778 | if (dump_file) |
c0939130 | 2779 | { |
2780 | fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes); | |
2781 | ||
fc00614f | 2782 | FOR_EACH_BB_FN (bb, cfun) |
c0939130 | 2783 | { |
2784 | fprintf (dump_file, "vbein (%d): ", bb->index); | |
53c5d9d4 | 2785 | dump_bitmap_file (dump_file, hoist_vbein[bb->index]); |
c0939130 | 2786 | fprintf (dump_file, "vbeout(%d): ", bb->index); |
53c5d9d4 | 2787 | dump_bitmap_file (dump_file, hoist_vbeout[bb->index]); |
c0939130 | 2788 | } |
2789 | } | |
6627f3ed | 2790 | } |
2791 | ||
2792 | /* Top level routine to do the dataflow analysis needed by code hoisting. */ | |
2793 | ||
2794 | static void | |
952f0048 | 2795 | compute_code_hoist_data (void) |
6627f3ed | 2796 | { |
27cfe3f1 | 2797 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
f151d0c6 | 2798 | prune_expressions (false); |
6627f3ed | 2799 | compute_code_hoist_vbeinout (); |
0051c76a | 2800 | calculate_dominance_info (CDI_DOMINATORS); |
3f5be5f4 | 2801 | if (dump_file) |
2802 | fprintf (dump_file, "\n"); | |
6627f3ed | 2803 | } |
2804 | ||
ded17066 | 2805 | /* Update register pressure for BB when hoisting an expression from |
2806 | instruction FROM, if live ranges of inputs are shrunk. Also | |
2807 | maintain live_in information if live range of register referred | |
2808 | in FROM is shrunk. | |
2809 | ||
2810 | Return 0 if register pressure doesn't change, otherwise return | |
2811 | the number by which register pressure is decreased. | |
2812 | ||
2813 | NOTE: Register pressure won't be increased in this function. */ | |
2814 | ||
2815 | static int | |
526d7387 | 2816 | update_bb_reg_pressure (basic_block bb, rtx_insn *from) |
ded17066 | 2817 | { |
526d7387 | 2818 | rtx dreg; |
2819 | rtx_insn *insn; | |
ded17066 | 2820 | basic_block succ_bb; |
be10bb5a | 2821 | df_ref use, op_ref; |
ded17066 | 2822 | edge succ; |
2823 | edge_iterator ei; | |
2824 | int decreased_pressure = 0; | |
2825 | int nregs; | |
2826 | enum reg_class pressure_class; | |
be10bb5a | 2827 | |
2828 | FOR_EACH_INSN_USE (use, from) | |
ded17066 | 2829 | { |
be10bb5a | 2830 | dreg = DF_REF_REAL_REG (use); |
ded17066 | 2831 | /* The live range of register is shrunk only if it isn't: |
2832 | 1. referred on any path from the end of this block to EXIT, or | |
2833 | 2. referred by insns other than FROM in this block. */ | |
2834 | FOR_EACH_EDGE (succ, ei, bb->succs) | |
2835 | { | |
2836 | succ_bb = succ->dest; | |
34154e27 | 2837 | if (succ_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
ded17066 | 2838 | continue; |
2839 | ||
2840 | if (bitmap_bit_p (BB_DATA (succ_bb)->live_in, REGNO (dreg))) | |
2841 | break; | |
2842 | } | |
2843 | if (succ != NULL) | |
2844 | continue; | |
2845 | ||
2846 | op_ref = DF_REG_USE_CHAIN (REGNO (dreg)); | |
2847 | for (; op_ref; op_ref = DF_REF_NEXT_REG (op_ref)) | |
2848 | { | |
2849 | if (!DF_REF_INSN_INFO (op_ref)) | |
2850 | continue; | |
2851 | ||
2852 | insn = DF_REF_INSN (op_ref); | |
2853 | if (BLOCK_FOR_INSN (insn) == bb | |
2854 | && NONDEBUG_INSN_P (insn) && insn != from) | |
2855 | break; | |
2856 | } | |
2857 | ||
2858 | pressure_class = get_regno_pressure_class (REGNO (dreg), &nregs); | |
2859 | /* Decrease register pressure and update live_in information for | |
2860 | this block. */ | |
2861 | if (!op_ref && pressure_class != NO_REGS) | |
2862 | { | |
2863 | decreased_pressure += nregs; | |
2864 | BB_DATA (bb)->max_reg_pressure[pressure_class] -= nregs; | |
2865 | bitmap_clear_bit (BB_DATA (bb)->live_in, REGNO (dreg)); | |
2866 | } | |
2867 | } | |
2868 | return decreased_pressure; | |
2869 | } | |
2870 | ||
1ec78e16 | 2871 | /* Determine if the expression EXPR should be hoisted to EXPR_BB up in |
2872 | flow graph, if it can reach BB unimpared. Stop the search if the | |
2873 | expression would need to be moved more than DISTANCE instructions. | |
2874 | ||
2875 | DISTANCE is the number of instructions through which EXPR can be | |
2876 | hoisted up in flow graph. | |
2877 | ||
2878 | BB_SIZE points to an array which contains the number of instructions | |
2879 | for each basic block. | |
2880 | ||
2881 | PRESSURE_CLASS and NREGS are register class and number of hard registers | |
2882 | for storing EXPR. | |
2883 | ||
2884 | HOISTED_BBS points to a bitmap indicating basic blocks through which | |
2885 | EXPR is hoisted. | |
6627f3ed | 2886 | |
ded17066 | 2887 | FROM is the instruction from which EXPR is hoisted. |
2888 | ||
6627f3ed | 2889 | It's unclear exactly what Muchnick meant by "unimpared". It seems |
2890 | to me that the expression must either be computed or transparent in | |
2891 | *every* block in the path(s) from EXPR_BB to BB. Any other definition | |
2892 | would allow the expression to be hoisted out of loops, even if | |
2893 | the expression wasn't a loop invariant. | |
2894 | ||
2895 | Contrast this to reachability for PRE where an expression is | |
2896 | considered reachable if *any* path reaches instead of *all* | |
2897 | paths. */ | |
2898 | ||
2899 | static int | |
9908fe4d | 2900 | should_hoist_expr_to_dom (basic_block expr_bb, struct gcse_expr *expr, |
7125d9ac | 2901 | basic_block bb, sbitmap visited, |
2902 | HOST_WIDE_INT distance, | |
1ec78e16 | 2903 | int *bb_size, enum reg_class pressure_class, |
526d7387 | 2904 | int *nregs, bitmap hoisted_bbs, rtx_insn *from) |
6627f3ed | 2905 | { |
1ec78e16 | 2906 | unsigned int i; |
6627f3ed | 2907 | edge pred; |
cd665a06 | 2908 | edge_iterator ei; |
1ec78e16 | 2909 | sbitmap_iterator sbi; |
cd55d9d6 | 2910 | int visited_allocated_locally = 0; |
ded17066 | 2911 | int decreased_pressure = 0; |
3cfec666 | 2912 | |
ded17066 | 2913 | if (flag_ira_hoist_pressure) |
2914 | { | |
2915 | /* Record old information of basic block BB when it is visited | |
2916 | at the first time. */ | |
2917 | if (!bitmap_bit_p (hoisted_bbs, bb->index)) | |
2918 | { | |
2919 | struct bb_data *data = BB_DATA (bb); | |
2920 | bitmap_copy (data->backup, data->live_in); | |
2921 | data->old_pressure = data->max_reg_pressure[pressure_class]; | |
2922 | } | |
2923 | decreased_pressure = update_bb_reg_pressure (bb, from); | |
2924 | } | |
8b38b150 | 2925 | /* Terminate the search if distance, for which EXPR is allowed to move, |
2926 | is exhausted. */ | |
2927 | if (distance > 0) | |
2928 | { | |
ded17066 | 2929 | if (flag_ira_hoist_pressure) |
2930 | { | |
2931 | /* Prefer to hoist EXPR if register pressure is decreased. */ | |
2932 | if (decreased_pressure > *nregs) | |
2933 | distance += bb_size[bb->index]; | |
2934 | /* Let EXPR be hoisted through basic block at no cost if one | |
2935 | of following conditions is satisfied: | |
2936 | ||
2937 | 1. The basic block has low register pressure. | |
2938 | 2. Register pressure won't be increases after hoisting EXPR. | |
2939 | ||
2940 | Constant expressions is handled conservatively, because | |
2941 | hoisting constant expression aggressively results in worse | |
2942 | code. This decision is made by the observation of CSiBE | |
2943 | on ARM target, while it has no obvious effect on other | |
2944 | targets like x86, x86_64, mips and powerpc. */ | |
2945 | else if (CONST_INT_P (expr->expr) | |
2946 | || (BB_DATA (bb)->max_reg_pressure[pressure_class] | |
2947 | >= ira_class_hard_regs_num[pressure_class] | |
2948 | && decreased_pressure < *nregs)) | |
2949 | distance -= bb_size[bb->index]; | |
2950 | } | |
2951 | else | |
1ec78e16 | 2952 | distance -= bb_size[bb->index]; |
8b38b150 | 2953 | |
2954 | if (distance <= 0) | |
2955 | return 0; | |
2956 | } | |
2957 | else | |
2958 | gcc_assert (distance == 0); | |
6627f3ed | 2959 | |
2960 | if (visited == NULL) | |
2961 | { | |
387732c1 | 2962 | visited_allocated_locally = 1; |
fe672ac0 | 2963 | visited = sbitmap_alloc (last_basic_block_for_fn (cfun)); |
53c5d9d4 | 2964 | bitmap_clear (visited); |
6627f3ed | 2965 | } |
2966 | ||
cd665a06 | 2967 | FOR_EACH_EDGE (pred, ei, bb->preds) |
6627f3ed | 2968 | { |
8d4a53c7 | 2969 | basic_block pred_bb = pred->src; |
6627f3ed | 2970 | |
34154e27 | 2971 | if (pred->src == ENTRY_BLOCK_PTR_FOR_FN (cfun)) |
6627f3ed | 2972 | break; |
2e281af0 | 2973 | else if (pred_bb == expr_bb) |
2974 | continue; | |
08b7917c | 2975 | else if (bitmap_bit_p (visited, pred_bb->index)) |
6627f3ed | 2976 | continue; |
08b7917c | 2977 | else if (! bitmap_bit_p (transp[pred_bb->index], expr->bitmap_index)) |
6627f3ed | 2978 | break; |
2979 | /* Not killed. */ | |
2980 | else | |
2981 | { | |
08b7917c | 2982 | bitmap_set_bit (visited, pred_bb->index); |
1ec78e16 | 2983 | if (! should_hoist_expr_to_dom (expr_bb, expr, pred_bb, |
2984 | visited, distance, bb_size, | |
ded17066 | 2985 | pressure_class, nregs, |
2986 | hoisted_bbs, from)) | |
6627f3ed | 2987 | break; |
2988 | } | |
2989 | } | |
3cfec666 | 2990 | if (visited_allocated_locally) |
1ec78e16 | 2991 | { |
2992 | /* If EXPR can be hoisted to expr_bb, record basic blocks through | |
ded17066 | 2993 | which EXPR is hoisted in hoisted_bbs. */ |
1ec78e16 | 2994 | if (flag_ira_hoist_pressure && !pred) |
2995 | { | |
ded17066 | 2996 | /* Record the basic block from which EXPR is hoisted. */ |
2997 | bitmap_set_bit (visited, bb->index); | |
0d211963 | 2998 | EXECUTE_IF_SET_IN_BITMAP (visited, 0, i, sbi) |
ded17066 | 2999 | bitmap_set_bit (hoisted_bbs, i); |
1ec78e16 | 3000 | } |
3001 | sbitmap_free (visited); | |
3002 | } | |
2c084240 | 3003 | |
6627f3ed | 3004 | return (pred == NULL); |
3005 | } | |
3006 | \f | |
9d75589a | 3007 | /* Find occurrence in BB. */ |
bc8197c0 | 3008 | |
9908fe4d | 3009 | static struct gcse_occr * |
3010 | find_occr_in_bb (struct gcse_occr *occr, basic_block bb) | |
8b38b150 | 3011 | { |
3012 | /* Find the right occurrence of this expression. */ | |
3013 | while (occr && BLOCK_FOR_INSN (occr->insn) != bb) | |
3014 | occr = occr->next; | |
3015 | ||
3016 | return occr; | |
3017 | } | |
3018 | ||
1ec78e16 | 3019 | /* Actually perform code hoisting. |
3020 | ||
3021 | The code hoisting pass can hoist multiple computations of the same | |
3022 | expression along dominated path to a dominating basic block, like | |
3023 | from b2/b3 to b1 as depicted below: | |
3024 | ||
3025 | b1 ------ | |
3026 | /\ | | |
3027 | / \ | | |
3028 | bx by distance | |
3029 | / \ | | |
3030 | / \ | | |
3031 | b2 b3 ------ | |
3032 | ||
3033 | Unfortunately code hoisting generally extends the live range of an | |
3034 | output pseudo register, which increases register pressure and hurts | |
3035 | register allocation. To address this issue, an attribute MAX_DISTANCE | |
3036 | is computed and attached to each expression. The attribute is computed | |
3037 | from rtx cost of the corresponding expression and it's used to control | |
3038 | how long the expression can be hoisted up in flow graph. As the | |
3039 | expression is hoisted up in flow graph, GCC decreases its DISTANCE | |
ded17066 | 3040 | and stops the hoist if DISTANCE reaches 0. Code hoisting can decrease |
3041 | register pressure if live ranges of inputs are shrunk. | |
1ec78e16 | 3042 | |
3043 | Option "-fira-hoist-pressure" implements register pressure directed | |
3044 | hoist based on upper method. The rationale is: | |
3045 | 1. Calculate register pressure for each basic block by reusing IRA | |
3046 | facility. | |
3047 | 2. When expression is hoisted through one basic block, GCC checks | |
ded17066 | 3048 | the change of live ranges for inputs/output. The basic block's |
3049 | register pressure will be increased because of extended live | |
3050 | range of output. However, register pressure will be decreased | |
3051 | if the live ranges of inputs are shrunk. | |
3052 | 3. After knowing how hoisting affects register pressure, GCC prefers | |
3053 | to hoist the expression if it can decrease register pressure, by | |
3054 | increasing DISTANCE of the corresponding expression. | |
3055 | 4. If hoisting the expression increases register pressure, GCC checks | |
3056 | register pressure of the basic block and decrease DISTANCE only if | |
3057 | the register pressure is high. In other words, expression will be | |
3058 | hoisted through at no cost if the basic block has low register | |
3059 | pressure. | |
3060 | 5. Update register pressure information for basic blocks through | |
3061 | which expression is hoisted. */ | |
2c084240 | 3062 | |
d743aba2 | 3063 | static int |
952f0048 | 3064 | hoist_code (void) |
6627f3ed | 3065 | { |
4c26117a | 3066 | basic_block bb, dominated; |
f1f41a6c | 3067 | vec<basic_block> dom_tree_walk; |
c0939130 | 3068 | unsigned int dom_tree_walk_index; |
f1f41a6c | 3069 | vec<basic_block> domby; |
1ec78e16 | 3070 | unsigned int i, j, k; |
9908fe4d | 3071 | struct gcse_expr **index_map; |
3072 | struct gcse_expr *expr; | |
8b38b150 | 3073 | int *to_bb_head; |
3074 | int *bb_size; | |
d743aba2 | 3075 | int changed = 0; |
1ec78e16 | 3076 | struct bb_data *data; |
3077 | /* Basic blocks that have occurrences reachable from BB. */ | |
3078 | bitmap from_bbs; | |
3079 | /* Basic blocks through which expr is hoisted. */ | |
3080 | bitmap hoisted_bbs = NULL; | |
3081 | bitmap_iterator bi; | |
6627f3ed | 3082 | |
6627f3ed | 3083 | /* Compute a mapping from expression number (`bitmap_index') to |
3084 | hash table entry. */ | |
3085 | ||
9908fe4d | 3086 | index_map = XCNEWVEC (struct gcse_expr *, expr_hash_table.n_elems); |
27cfe3f1 | 3087 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 3088 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 3089 | index_map[expr->bitmap_index] = expr; |
6627f3ed | 3090 | |
8b38b150 | 3091 | /* Calculate sizes of basic blocks and note how far |
3092 | each instruction is from the start of its block. We then use this | |
3093 | data to restrict distance an expression can travel. */ | |
3094 | ||
3095 | to_bb_head = XCNEWVEC (int, get_max_uid ()); | |
fe672ac0 | 3096 | bb_size = XCNEWVEC (int, last_basic_block_for_fn (cfun)); |
8b38b150 | 3097 | |
fc00614f | 3098 | FOR_EACH_BB_FN (bb, cfun) |
8b38b150 | 3099 | { |
526d7387 | 3100 | rtx_insn *insn; |
8b38b150 | 3101 | int to_head; |
3102 | ||
8b38b150 | 3103 | to_head = 0; |
2241e3a7 | 3104 | FOR_BB_INSNS (bb, insn) |
8b38b150 | 3105 | { |
3106 | /* Don't count debug instructions to avoid them affecting | |
3107 | decision choices. */ | |
3108 | if (NONDEBUG_INSN_P (insn)) | |
3109 | to_bb_head[INSN_UID (insn)] = to_head++; | |
8b38b150 | 3110 | } |
3111 | ||
3112 | bb_size[bb->index] = to_head; | |
3113 | } | |
3114 | ||
34154e27 | 3115 | gcc_assert (EDGE_COUNT (ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) == 1 |
3116 | && (EDGE_SUCC (ENTRY_BLOCK_PTR_FOR_FN (cfun), 0)->dest | |
3117 | == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb)); | |
c0939130 | 3118 | |
1ec78e16 | 3119 | from_bbs = BITMAP_ALLOC (NULL); |
3120 | if (flag_ira_hoist_pressure) | |
3121 | hoisted_bbs = BITMAP_ALLOC (NULL); | |
3122 | ||
c0939130 | 3123 | dom_tree_walk = get_all_dominated_blocks (CDI_DOMINATORS, |
34154e27 | 3124 | ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb); |
c0939130 | 3125 | |
6627f3ed | 3126 | /* Walk over each basic block looking for potentially hoistable |
3127 | expressions, nothing gets hoisted from the entry block. */ | |
f1f41a6c | 3128 | FOR_EACH_VEC_ELT (dom_tree_walk, dom_tree_walk_index, bb) |
6627f3ed | 3129 | { |
c0939130 | 3130 | domby = get_dominated_to_depth (CDI_DOMINATORS, bb, MAX_HOIST_DEPTH); |
3131 | ||
f1f41a6c | 3132 | if (domby.length () == 0) |
c0939130 | 3133 | continue; |
6627f3ed | 3134 | |
3135 | /* Examine each expression that is very busy at the exit of this | |
3136 | block. These are the potentially hoistable expressions. */ | |
156093aa | 3137 | for (i = 0; i < SBITMAP_SIZE (hoist_vbeout[bb->index]); i++) |
6627f3ed | 3138 | { |
08b7917c | 3139 | if (bitmap_bit_p (hoist_vbeout[bb->index], i)) |
6627f3ed | 3140 | { |
1ec78e16 | 3141 | int nregs = 0; |
3142 | enum reg_class pressure_class = NO_REGS; | |
c0939130 | 3143 | /* Current expression. */ |
9908fe4d | 3144 | struct gcse_expr *expr = index_map[i]; |
9d75589a | 3145 | /* Number of occurrences of EXPR that can be hoisted to BB. */ |
c0939130 | 3146 | int hoistable = 0; |
9d75589a | 3147 | /* Occurrences reachable from BB. */ |
1e094109 | 3148 | vec<occr_t> occrs_to_hoist = vNULL; |
c0939130 | 3149 | /* We want to insert the expression into BB only once, so |
3150 | note when we've inserted it. */ | |
3151 | int insn_inserted_p; | |
3152 | occr_t occr; | |
3153 | ||
33ff724a | 3154 | /* If an expression is computed in BB and is available at end of |
9d75589a | 3155 | BB, hoist all occurrences dominated by BB to BB. */ |
08b7917c | 3156 | if (bitmap_bit_p (comp[bb->index], i)) |
c0939130 | 3157 | { |
3158 | occr = find_occr_in_bb (expr->antic_occr, bb); | |
3159 | ||
3160 | if (occr) | |
3161 | { | |
9d75589a | 3162 | /* An occurrence might've been already deleted |
c0939130 | 3163 | while processing a dominator of BB. */ |
c96e0a0a | 3164 | if (!occr->deleted_p) |
c0939130 | 3165 | { |
3166 | gcc_assert (NONDEBUG_INSN_P (occr->insn)); | |
3167 | hoistable++; | |
3168 | } | |
3169 | } | |
3170 | else | |
3171 | hoistable++; | |
3172 | } | |
33ff724a | 3173 | |
6627f3ed | 3174 | /* We've found a potentially hoistable expression, now |
3175 | we look at every block BB dominates to see if it | |
3176 | computes the expression. */ | |
f1f41a6c | 3177 | FOR_EACH_VEC_ELT (domby, j, dominated) |
6627f3ed | 3178 | { |
7125d9ac | 3179 | HOST_WIDE_INT max_distance; |
8b38b150 | 3180 | |
6627f3ed | 3181 | /* Ignore self dominance. */ |
8c4bd339 | 3182 | if (bb == dominated) |
6627f3ed | 3183 | continue; |
6627f3ed | 3184 | /* We've found a dominated block, now see if it computes |
3185 | the busy expression and whether or not moving that | |
3186 | expression to the "beginning" of that block is safe. */ | |
08b7917c | 3187 | if (!bitmap_bit_p (antloc[dominated->index], i)) |
6627f3ed | 3188 | continue; |
3189 | ||
c0939130 | 3190 | occr = find_occr_in_bb (expr->antic_occr, dominated); |
3191 | gcc_assert (occr); | |
8b38b150 | 3192 | |
9d75589a | 3193 | /* An occurrence might've been already deleted |
c0939130 | 3194 | while processing a dominator of BB. */ |
3195 | if (occr->deleted_p) | |
c96e0a0a | 3196 | continue; |
c0939130 | 3197 | gcc_assert (NONDEBUG_INSN_P (occr->insn)); |
3198 | ||
3199 | max_distance = expr->max_distance; | |
3200 | if (max_distance > 0) | |
3201 | /* Adjust MAX_DISTANCE to account for the fact that | |
3202 | OCCR won't have to travel all of DOMINATED, but | |
3203 | only part of it. */ | |
3204 | max_distance += (bb_size[dominated->index] | |
3205 | - to_bb_head[INSN_UID (occr->insn)]); | |
8b38b150 | 3206 | |
1ec78e16 | 3207 | pressure_class = get_pressure_class_and_nregs (occr->insn, |
3208 | &nregs); | |
3209 | ||
3210 | /* Note if the expression should be hoisted from the dominated | |
3211 | block to BB if it can reach DOMINATED unimpared. | |
6627f3ed | 3212 | |
3213 | Keep track of how many times this expression is hoistable | |
3214 | from a dominated block into BB. */ | |
1ec78e16 | 3215 | if (should_hoist_expr_to_dom (bb, expr, dominated, NULL, |
3216 | max_distance, bb_size, | |
3217 | pressure_class, &nregs, | |
ded17066 | 3218 | hoisted_bbs, occr->insn)) |
c0939130 | 3219 | { |
3220 | hoistable++; | |
f1f41a6c | 3221 | occrs_to_hoist.safe_push (occr); |
c0939130 | 3222 | bitmap_set_bit (from_bbs, dominated->index); |
3223 | } | |
6627f3ed | 3224 | } |
3225 | ||
424da949 | 3226 | /* If we found more than one hoistable occurrence of this |
c0939130 | 3227 | expression, then note it in the vector of expressions to |
6627f3ed | 3228 | hoist. It makes no sense to hoist things which are computed |
3229 | in only one BB, and doing so tends to pessimize register | |
3230 | allocation. One could increase this value to try harder | |
3231 | to avoid any possible code expansion due to register | |
3232 | allocation issues; however experiments have shown that | |
3233 | the vast majority of hoistable expressions are only movable | |
d01481af | 3234 | from two successors, so raising this threshold is likely |
6627f3ed | 3235 | to nullify any benefit we get from code hoisting. */ |
da54886a | 3236 | if (hoistable > 1 && dbg_cnt (hoist_insn)) |
6627f3ed | 3237 | { |
f1f41a6c | 3238 | /* If (hoistable != vec::length), then there is |
9d75589a | 3239 | an occurrence of EXPR in BB itself. Don't waste |
c0939130 | 3240 | time looking for LCA in this case. */ |
f1f41a6c | 3241 | if ((unsigned) hoistable == occrs_to_hoist.length ()) |
c0939130 | 3242 | { |
3243 | basic_block lca; | |
3244 | ||
3245 | lca = nearest_common_dominator_for_set (CDI_DOMINATORS, | |
3246 | from_bbs); | |
3247 | if (lca != bb) | |
9d75589a | 3248 | /* Punt, it's better to hoist these occurrences to |
c0939130 | 3249 | LCA. */ |
f1f41a6c | 3250 | occrs_to_hoist.release (); |
c0939130 | 3251 | } |
6627f3ed | 3252 | } |
c0939130 | 3253 | else |
a04e8d62 | 3254 | /* Punt, no point hoisting a single occurrence. */ |
f1f41a6c | 3255 | occrs_to_hoist.release (); |
6627f3ed | 3256 | |
1ec78e16 | 3257 | if (flag_ira_hoist_pressure |
f1f41a6c | 3258 | && !occrs_to_hoist.is_empty ()) |
1ec78e16 | 3259 | { |
ded17066 | 3260 | /* Increase register pressure of basic blocks to which |
3261 | expr is hoisted because of extended live range of | |
3262 | output. */ | |
1ec78e16 | 3263 | data = BB_DATA (bb); |
3264 | data->max_reg_pressure[pressure_class] += nregs; | |
ded17066 | 3265 | EXECUTE_IF_SET_IN_BITMAP (hoisted_bbs, 0, k, bi) |
3266 | { | |
f5a6b05f | 3267 | data = BB_DATA (BASIC_BLOCK_FOR_FN (cfun, k)); |
ded17066 | 3268 | data->max_reg_pressure[pressure_class] += nregs; |
3269 | } | |
1ec78e16 | 3270 | } |
3271 | else if (flag_ira_hoist_pressure) | |
3272 | { | |
ded17066 | 3273 | /* Restore register pressure and live_in info for basic |
3274 | blocks recorded in hoisted_bbs when expr will not be | |
3275 | hoisted. */ | |
1ec78e16 | 3276 | EXECUTE_IF_SET_IN_BITMAP (hoisted_bbs, 0, k, bi) |
3277 | { | |
f5a6b05f | 3278 | data = BB_DATA (BASIC_BLOCK_FOR_FN (cfun, k)); |
ded17066 | 3279 | bitmap_copy (data->live_in, data->backup); |
3280 | data->max_reg_pressure[pressure_class] | |
3281 | = data->old_pressure; | |
1ec78e16 | 3282 | } |
3283 | } | |
3284 | ||
3285 | if (flag_ira_hoist_pressure) | |
3286 | bitmap_clear (hoisted_bbs); | |
3287 | ||
c0939130 | 3288 | insn_inserted_p = 0; |
6627f3ed | 3289 | |
9d75589a | 3290 | /* Walk through occurrences of I'th expressions we want |
c0939130 | 3291 | to hoist to BB and make the transformations. */ |
f1f41a6c | 3292 | FOR_EACH_VEC_ELT (occrs_to_hoist, j, occr) |
6627f3ed | 3293 | { |
526d7387 | 3294 | rtx_insn *insn; |
97f436b3 | 3295 | const_rtx set; |
c0939130 | 3296 | |
3297 | gcc_assert (!occr->deleted_p); | |
3298 | ||
3299 | insn = occr->insn; | |
97f436b3 | 3300 | set = single_set_gcse (insn); |
c0939130 | 3301 | |
3302 | /* Create a pseudo-reg to store the result of reaching | |
3303 | expressions into. Get the mode for the new pseudo | |
3304 | from the mode of the original destination pseudo. | |
3305 | ||
3306 | It is important to use new pseudos whenever we | |
3307 | emit a set. This will allow reload to use | |
3308 | rematerialization for such registers. */ | |
3309 | if (!insn_inserted_p) | |
3310 | expr->reaching_reg | |
3311 | = gen_reg_rtx_and_attrs (SET_DEST (set)); | |
3312 | ||
bc8197c0 | 3313 | gcse_emit_move_after (SET_DEST (set), expr->reaching_reg, |
c0939130 | 3314 | insn); |
3315 | delete_insn (insn); | |
3316 | occr->deleted_p = 1; | |
3317 | changed = 1; | |
3318 | gcse_subst_count++; | |
3319 | ||
3320 | if (!insn_inserted_p) | |
6627f3ed | 3321 | { |
c0939130 | 3322 | insert_insn_end_basic_block (expr, bb); |
3323 | insn_inserted_p = 1; | |
6627f3ed | 3324 | } |
3325 | } | |
c0939130 | 3326 | |
f1f41a6c | 3327 | occrs_to_hoist.release (); |
c0939130 | 3328 | bitmap_clear (from_bbs); |
6627f3ed | 3329 | } |
3330 | } | |
f1f41a6c | 3331 | domby.release (); |
6627f3ed | 3332 | } |
2c084240 | 3333 | |
f1f41a6c | 3334 | dom_tree_walk.release (); |
1ec78e16 | 3335 | BITMAP_FREE (from_bbs); |
3336 | if (flag_ira_hoist_pressure) | |
3337 | BITMAP_FREE (hoisted_bbs); | |
3338 | ||
8b38b150 | 3339 | free (bb_size); |
3340 | free (to_bb_head); | |
387732c1 | 3341 | free (index_map); |
d743aba2 | 3342 | |
3343 | return changed; | |
6627f3ed | 3344 | } |
3345 | ||
1ec78e16 | 3346 | /* Return pressure class and number of needed hard registers (through |
3347 | *NREGS) of register REGNO. */ | |
3348 | static enum reg_class | |
3349 | get_regno_pressure_class (int regno, int *nregs) | |
3350 | { | |
3351 | if (regno >= FIRST_PSEUDO_REGISTER) | |
3352 | { | |
3353 | enum reg_class pressure_class; | |
3354 | ||
3355 | pressure_class = reg_allocno_class (regno); | |
3356 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
3357 | *nregs | |
3358 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
3359 | return pressure_class; | |
3360 | } | |
3361 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
3362 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
3363 | { | |
3364 | *nregs = 1; | |
3365 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; | |
3366 | } | |
3367 | else | |
3368 | { | |
3369 | *nregs = 0; | |
3370 | return NO_REGS; | |
3371 | } | |
3372 | } | |
3373 | ||
3374 | /* Return pressure class and number of hard registers (through *NREGS) | |
3375 | for destination of INSN. */ | |
3376 | static enum reg_class | |
526d7387 | 3377 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1ec78e16 | 3378 | { |
3379 | rtx reg; | |
3380 | enum reg_class pressure_class; | |
97f436b3 | 3381 | const_rtx set = single_set_gcse (insn); |
1ec78e16 | 3382 | |
1ec78e16 | 3383 | reg = SET_DEST (set); |
3384 | if (GET_CODE (reg) == SUBREG) | |
3385 | reg = SUBREG_REG (reg); | |
3386 | if (MEM_P (reg)) | |
3387 | { | |
3388 | *nregs = 0; | |
3389 | pressure_class = NO_REGS; | |
3390 | } | |
3391 | else | |
3392 | { | |
3393 | gcc_assert (REG_P (reg)); | |
3394 | pressure_class = reg_allocno_class (REGNO (reg)); | |
3395 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
3396 | *nregs | |
3397 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
3398 | } | |
3399 | return pressure_class; | |
3400 | } | |
3401 | ||
3402 | /* Increase (if INCR_P) or decrease current register pressure for | |
3403 | register REGNO. */ | |
3404 | static void | |
3405 | change_pressure (int regno, bool incr_p) | |
3406 | { | |
3407 | int nregs; | |
3408 | enum reg_class pressure_class; | |
3409 | ||
3410 | pressure_class = get_regno_pressure_class (regno, &nregs); | |
3411 | if (! incr_p) | |
3412 | curr_reg_pressure[pressure_class] -= nregs; | |
3413 | else | |
3414 | { | |
3415 | curr_reg_pressure[pressure_class] += nregs; | |
3416 | if (BB_DATA (curr_bb)->max_reg_pressure[pressure_class] | |
3417 | < curr_reg_pressure[pressure_class]) | |
3418 | BB_DATA (curr_bb)->max_reg_pressure[pressure_class] | |
3419 | = curr_reg_pressure[pressure_class]; | |
3420 | } | |
3421 | } | |
3422 | ||
3423 | /* Calculate register pressure for each basic block by walking insns | |
3424 | from last to first. */ | |
3425 | static void | |
3426 | calculate_bb_reg_pressure (void) | |
3427 | { | |
3428 | int i; | |
3429 | unsigned int j; | |
526d7387 | 3430 | rtx_insn *insn; |
1ec78e16 | 3431 | basic_block bb; |
3432 | bitmap curr_regs_live; | |
3433 | bitmap_iterator bi; | |
3434 | ||
3435 | ||
3b3a5e5f | 3436 | ira_setup_eliminable_regset (); |
1ec78e16 | 3437 | curr_regs_live = BITMAP_ALLOC (®_obstack); |
fc00614f | 3438 | FOR_EACH_BB_FN (bb, cfun) |
1ec78e16 | 3439 | { |
3440 | curr_bb = bb; | |
ded17066 | 3441 | BB_DATA (bb)->live_in = BITMAP_ALLOC (NULL); |
3442 | BB_DATA (bb)->backup = BITMAP_ALLOC (NULL); | |
3443 | bitmap_copy (BB_DATA (bb)->live_in, df_get_live_in (bb)); | |
3444 | bitmap_copy (curr_regs_live, df_get_live_out (bb)); | |
1ec78e16 | 3445 | for (i = 0; i < ira_pressure_classes_num; i++) |
3446 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
3447 | EXECUTE_IF_SET_IN_BITMAP (curr_regs_live, 0, j, bi) | |
3448 | change_pressure (j, true); | |
3449 | ||
3450 | FOR_BB_INSNS_REVERSE (bb, insn) | |
3451 | { | |
3452 | rtx dreg; | |
3453 | int regno; | |
be10bb5a | 3454 | df_ref def, use; |
1ec78e16 | 3455 | |
3456 | if (! NONDEBUG_INSN_P (insn)) | |
3457 | continue; | |
3458 | ||
be10bb5a | 3459 | FOR_EACH_INSN_DEF (def, insn) |
1ec78e16 | 3460 | { |
be10bb5a | 3461 | dreg = DF_REF_REAL_REG (def); |
1ec78e16 | 3462 | gcc_assert (REG_P (dreg)); |
3463 | regno = REGNO (dreg); | |
be10bb5a | 3464 | if (!(DF_REF_FLAGS (def) |
1ec78e16 | 3465 | & (DF_REF_PARTIAL | DF_REF_CONDITIONAL))) |
3466 | { | |
3467 | if (bitmap_clear_bit (curr_regs_live, regno)) | |
3468 | change_pressure (regno, false); | |
3469 | } | |
3470 | } | |
3471 | ||
be10bb5a | 3472 | FOR_EACH_INSN_USE (use, insn) |
1ec78e16 | 3473 | { |
be10bb5a | 3474 | dreg = DF_REF_REAL_REG (use); |
1ec78e16 | 3475 | gcc_assert (REG_P (dreg)); |
3476 | regno = REGNO (dreg); | |
3477 | if (bitmap_set_bit (curr_regs_live, regno)) | |
3478 | change_pressure (regno, true); | |
3479 | } | |
3480 | } | |
3481 | } | |
3482 | BITMAP_FREE (curr_regs_live); | |
3483 | ||
3484 | if (dump_file == NULL) | |
3485 | return; | |
3486 | ||
3487 | fprintf (dump_file, "\nRegister Pressure: \n"); | |
fc00614f | 3488 | FOR_EACH_BB_FN (bb, cfun) |
1ec78e16 | 3489 | { |
3490 | fprintf (dump_file, " Basic block %d: \n", bb->index); | |
3491 | for (i = 0; (int) i < ira_pressure_classes_num; i++) | |
3492 | { | |
3493 | enum reg_class pressure_class; | |
3494 | ||
3495 | pressure_class = ira_pressure_classes[i]; | |
3496 | if (BB_DATA (bb)->max_reg_pressure[pressure_class] == 0) | |
3497 | continue; | |
3498 | ||
3499 | fprintf (dump_file, " %s=%d\n", reg_class_names[pressure_class], | |
3500 | BB_DATA (bb)->max_reg_pressure[pressure_class]); | |
3501 | } | |
3502 | } | |
3503 | fprintf (dump_file, "\n"); | |
3504 | } | |
3505 | ||
6627f3ed | 3506 | /* Top level routine to perform one code hoisting (aka unification) pass |
3507 | ||
6ef828f9 | 3508 | Return nonzero if a change was made. */ |
6627f3ed | 3509 | |
3510 | static int | |
952f0048 | 3511 | one_code_hoisting_pass (void) |
6627f3ed | 3512 | { |
3513 | int changed = 0; | |
3514 | ||
d743aba2 | 3515 | gcse_subst_count = 0; |
3516 | gcse_create_count = 0; | |
3517 | ||
3518 | /* Return if there's nothing to do, or it is too expensive. */ | |
a28770e1 | 3519 | if (n_basic_blocks_for_fn (cfun) <= NUM_FIXED_BLOCKS + 1 |
82b9069d | 3520 | || gcse_or_cprop_is_too_expensive (_("GCSE disabled"))) |
d743aba2 | 3521 | return 0; |
3522 | ||
8b38b150 | 3523 | doing_code_hoisting_p = true; |
3524 | ||
1ec78e16 | 3525 | /* Calculate register pressure for each basic block. */ |
3526 | if (flag_ira_hoist_pressure) | |
3527 | { | |
3528 | regstat_init_n_sets_and_refs (); | |
3529 | ira_set_pseudo_classes (false, dump_file); | |
3530 | alloc_aux_for_blocks (sizeof (struct bb_data)); | |
3531 | calculate_bb_reg_pressure (); | |
3532 | regstat_free_n_sets_and_refs (); | |
3533 | } | |
3534 | ||
d743aba2 | 3535 | /* We need alias. */ |
3536 | init_alias_analysis (); | |
3537 | ||
3538 | bytes_used = 0; | |
3539 | gcc_obstack_init (&gcse_obstack); | |
3540 | alloc_gcse_mem (); | |
3541 | ||
07abdb66 | 3542 | alloc_hash_table (&expr_hash_table); |
27cfe3f1 | 3543 | compute_hash_table (&expr_hash_table); |
3f5be5f4 | 3544 | if (dump_file) |
3545 | dump_hash_table (dump_file, "Code Hosting Expressions", &expr_hash_table); | |
2c084240 | 3546 | |
27cfe3f1 | 3547 | if (expr_hash_table.n_elems > 0) |
6627f3ed | 3548 | { |
fe672ac0 | 3549 | alloc_code_hoist_mem (last_basic_block_for_fn (cfun), |
3550 | expr_hash_table.n_elems); | |
6627f3ed | 3551 | compute_code_hoist_data (); |
d743aba2 | 3552 | changed = hoist_code (); |
6627f3ed | 3553 | free_code_hoist_mem (); |
3554 | } | |
2c084240 | 3555 | |
1ec78e16 | 3556 | if (flag_ira_hoist_pressure) |
3557 | { | |
3558 | free_aux_for_blocks (); | |
3559 | free_reg_info (); | |
3560 | } | |
27cfe3f1 | 3561 | free_hash_table (&expr_hash_table); |
d743aba2 | 3562 | free_gcse_mem (); |
3563 | obstack_free (&gcse_obstack, NULL); | |
3564 | ||
3565 | /* We are finished with alias. */ | |
3566 | end_alias_analysis (); | |
3567 | ||
3568 | if (dump_file) | |
3569 | { | |
3570 | fprintf (dump_file, "HOIST of %s, %d basic blocks, %d bytes needed, ", | |
a28770e1 | 3571 | current_function_name (), n_basic_blocks_for_fn (cfun), |
3572 | bytes_used); | |
d743aba2 | 3573 | fprintf (dump_file, "%d substs, %d insns created\n", |
3574 | gcse_subst_count, gcse_create_count); | |
3575 | } | |
6627f3ed | 3576 | |
8b38b150 | 3577 | doing_code_hoisting_p = false; |
3578 | ||
6627f3ed | 3579 | return changed; |
3580 | } | |
8e802be9 | 3581 | \f |
bc8197c0 | 3582 | /* Here we provide the things required to do store motion towards the exit. |
3583 | In order for this to be effective, gcse also needed to be taught how to | |
3584 | move a load when it is killed only by a store to itself. | |
8e802be9 | 3585 | |
3586 | int i; | |
3587 | float a[10]; | |
3588 | ||
3589 | void foo(float scale) | |
3590 | { | |
3591 | for (i=0; i<10; i++) | |
3592 | a[i] *= scale; | |
3593 | } | |
3594 | ||
3595 | 'i' is both loaded and stored to in the loop. Normally, gcse cannot move | |
3cfec666 | 3596 | the load out since its live around the loop, and stored at the bottom |
3597 | of the loop. | |
8e802be9 | 3598 | |
3cfec666 | 3599 | The 'Load Motion' referred to and implemented in this file is |
bc8197c0 | 3600 | an enhancement to gcse which when using edge based LCM, recognizes |
8e802be9 | 3601 | this situation and allows gcse to move the load out of the loop. |
3602 | ||
3603 | Once gcse has hoisted the load, store motion can then push this | |
3604 | load towards the exit, and we end up with no loads or stores of 'i' | |
3605 | in the loop. */ | |
3606 | ||
424da949 | 3607 | /* This will search the ldst list for a matching expression. If it |
8e802be9 | 3608 | doesn't find one, we create one and initialize it. */ |
3609 | ||
3610 | static struct ls_expr * | |
952f0048 | 3611 | ldst_entry (rtx x) |
8e802be9 | 3612 | { |
69333952 | 3613 | int do_not_record_p = 0; |
8e802be9 | 3614 | struct ls_expr * ptr; |
69333952 | 3615 | unsigned int hash; |
d9dd21a8 | 3616 | ls_expr **slot; |
0d707271 | 3617 | struct ls_expr e; |
8e802be9 | 3618 | |
78d140c9 | 3619 | hash = hash_rtx (x, GET_MODE (x), &do_not_record_p, |
3620 | NULL, /*have_reg_qty=*/false); | |
8e802be9 | 3621 | |
0d707271 | 3622 | e.pattern = x; |
c1f445d2 | 3623 | slot = pre_ldst_table->find_slot_with_hash (&e, hash, INSERT); |
0d707271 | 3624 | if (*slot) |
d9dd21a8 | 3625 | return *slot; |
69333952 | 3626 | |
4c36ffe6 | 3627 | ptr = XNEW (struct ls_expr); |
69333952 | 3628 | |
3629 | ptr->next = pre_ldst_mems; | |
3630 | ptr->expr = NULL; | |
3631 | ptr->pattern = x; | |
3632 | ptr->pattern_regs = NULL_RTX; | |
d30c5be2 | 3633 | ptr->stores.create (0); |
69333952 | 3634 | ptr->reaching_reg = NULL_RTX; |
3635 | ptr->invalid = 0; | |
3636 | ptr->index = 0; | |
3637 | ptr->hash_index = hash; | |
3638 | pre_ldst_mems = ptr; | |
0d707271 | 3639 | *slot = ptr; |
3cfec666 | 3640 | |
8e802be9 | 3641 | return ptr; |
3642 | } | |
3643 | ||
3644 | /* Free up an individual ldst entry. */ | |
3645 | ||
3cfec666 | 3646 | static void |
952f0048 | 3647 | free_ldst_entry (struct ls_expr * ptr) |
8e802be9 | 3648 | { |
d30c5be2 | 3649 | ptr->stores.release (); |
8e802be9 | 3650 | |
3651 | free (ptr); | |
3652 | } | |
3653 | ||
3654 | /* Free up all memory associated with the ldst list. */ | |
3655 | ||
3656 | static void | |
bc8197c0 | 3657 | free_ld_motion_mems (void) |
8e802be9 | 3658 | { |
c1f445d2 | 3659 | delete pre_ldst_table; |
3660 | pre_ldst_table = NULL; | |
0d707271 | 3661 | |
3cfec666 | 3662 | while (pre_ldst_mems) |
8e802be9 | 3663 | { |
3664 | struct ls_expr * tmp = pre_ldst_mems; | |
3665 | ||
3666 | pre_ldst_mems = pre_ldst_mems->next; | |
3667 | ||
3668 | free_ldst_entry (tmp); | |
3669 | } | |
3670 | ||
3671 | pre_ldst_mems = NULL; | |
3672 | } | |
3673 | ||
3674 | /* Dump debugging info about the ldst list. */ | |
3675 | ||
3676 | static void | |
952f0048 | 3677 | print_ldst_list (FILE * file) |
8e802be9 | 3678 | { |
3679 | struct ls_expr * ptr; | |
3680 | ||
3681 | fprintf (file, "LDST list: \n"); | |
3682 | ||
bc8197c0 | 3683 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) |
8e802be9 | 3684 | { |
3685 | fprintf (file, " Pattern (%3d): ", ptr->index); | |
3686 | ||
3687 | print_rtl (file, ptr->pattern); | |
3688 | ||
8e802be9 | 3689 | fprintf (file, "\n Stores : "); |
d30c5be2 | 3690 | print_rtx_insn_vec (file, ptr->stores); |
8e802be9 | 3691 | |
3692 | fprintf (file, "\n\n"); | |
3693 | } | |
3694 | ||
3695 | fprintf (file, "\n"); | |
3696 | } | |
3697 | ||
3698 | /* Returns 1 if X is in the list of ldst only expressions. */ | |
3699 | ||
3700 | static struct ls_expr * | |
952f0048 | 3701 | find_rtx_in_ldst (rtx x) |
8e802be9 | 3702 | { |
0d707271 | 3703 | struct ls_expr e; |
d9dd21a8 | 3704 | ls_expr **slot; |
c1f445d2 | 3705 | if (!pre_ldst_table) |
00784725 | 3706 | return NULL; |
0d707271 | 3707 | e.pattern = x; |
c1f445d2 | 3708 | slot = pre_ldst_table->find_slot (&e, NO_INSERT); |
d9dd21a8 | 3709 | if (!slot || (*slot)->invalid) |
0d707271 | 3710 | return NULL; |
d9dd21a8 | 3711 | return *slot; |
8e802be9 | 3712 | } |
8e802be9 | 3713 | \f |
3714 | /* Load Motion for loads which only kill themselves. */ | |
3715 | ||
bc8197c0 | 3716 | /* Return true if x, a MEM, is a simple access with no side effects. |
3717 | These are the types of loads we consider for the ld_motion list, | |
3718 | otherwise we let the usual aliasing take care of it. */ | |
8e802be9 | 3719 | |
3cfec666 | 3720 | static int |
7ecb5bb2 | 3721 | simple_mem (const_rtx x) |
8e802be9 | 3722 | { |
8e802be9 | 3723 | if (MEM_VOLATILE_P (x)) |
3724 | return 0; | |
3cfec666 | 3725 | |
8e802be9 | 3726 | if (GET_MODE (x) == BLKmode) |
3727 | return 0; | |
7a676a9f | 3728 | |
64928ee5 | 3729 | /* If we are handling exceptions, we must be careful with memory references |
cbeb677e | 3730 | that may trap. If we are not, the behavior is undefined, so we may just |
64928ee5 | 3731 | continue. */ |
cbeb677e | 3732 | if (cfun->can_throw_non_call_exceptions && may_trap_p (x)) |
43f5be72 | 3733 | return 0; |
3734 | ||
64928ee5 | 3735 | if (side_effects_p (x)) |
3736 | return 0; | |
3cfec666 | 3737 | |
64928ee5 | 3738 | /* Do not consider function arguments passed on stack. */ |
3739 | if (reg_mentioned_p (stack_pointer_rtx, x)) | |
3740 | return 0; | |
3741 | ||
3742 | if (flag_float_store && FLOAT_MODE_P (GET_MODE (x))) | |
3743 | return 0; | |
3744 | ||
3745 | return 1; | |
8e802be9 | 3746 | } |
3747 | ||
3cfec666 | 3748 | /* Make sure there isn't a buried reference in this pattern anywhere. |
3749 | If there is, invalidate the entry for it since we're not capable | |
3750 | of fixing it up just yet.. We have to be sure we know about ALL | |
8e802be9 | 3751 | loads since the aliasing code will allow all entries in the |
3752 | ld_motion list to not-alias itself. If we miss a load, we will get | |
3cfec666 | 3753 | the wrong value since gcse might common it and we won't know to |
8e802be9 | 3754 | fix it up. */ |
3755 | ||
3756 | static void | |
952f0048 | 3757 | invalidate_any_buried_refs (rtx x) |
8e802be9 | 3758 | { |
3759 | const char * fmt; | |
387732c1 | 3760 | int i, j; |
8e802be9 | 3761 | struct ls_expr * ptr; |
3762 | ||
3763 | /* Invalidate it in the list. */ | |
b9f02dbb | 3764 | if (MEM_P (x) && simple_mem (x)) |
8e802be9 | 3765 | { |
3766 | ptr = ldst_entry (x); | |
3767 | ptr->invalid = 1; | |
3768 | } | |
3769 | ||
3770 | /* Recursively process the insn. */ | |
3771 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
3cfec666 | 3772 | |
8e802be9 | 3773 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) |
3774 | { | |
3775 | if (fmt[i] == 'e') | |
3776 | invalidate_any_buried_refs (XEXP (x, i)); | |
3777 | else if (fmt[i] == 'E') | |
3778 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
3779 | invalidate_any_buried_refs (XVECEXP (x, i, j)); | |
3780 | } | |
3781 | } | |
3782 | ||
c5d8ca43 | 3783 | /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple |
3784 | being defined as MEM loads and stores to symbols, with no side effects | |
3785 | and no registers in the expression. For a MEM destination, we also | |
3786 | check that the insn is still valid if we replace the destination with a | |
3787 | REG, as is done in update_ld_motion_stores. If there are any uses/defs | |
3788 | which don't match this criteria, they are invalidated and trimmed out | |
3789 | later. */ | |
8e802be9 | 3790 | |
3cfec666 | 3791 | static void |
952f0048 | 3792 | compute_ld_motion_mems (void) |
8e802be9 | 3793 | { |
3794 | struct ls_expr * ptr; | |
4c26117a | 3795 | basic_block bb; |
526d7387 | 3796 | rtx_insn *insn; |
3cfec666 | 3797 | |
8e802be9 | 3798 | pre_ldst_mems = NULL; |
c1f445d2 | 3799 | pre_ldst_table = new hash_table<pre_ldst_expr_hasher> (13); |
8e802be9 | 3800 | |
fc00614f | 3801 | FOR_EACH_BB_FN (bb, cfun) |
8e802be9 | 3802 | { |
defc8016 | 3803 | FOR_BB_INSNS (bb, insn) |
8e802be9 | 3804 | { |
9845d120 | 3805 | if (NONDEBUG_INSN_P (insn)) |
8e802be9 | 3806 | { |
3807 | if (GET_CODE (PATTERN (insn)) == SET) | |
3808 | { | |
3809 | rtx src = SET_SRC (PATTERN (insn)); | |
3810 | rtx dest = SET_DEST (PATTERN (insn)); | |
3811 | ||
066c8e94 | 3812 | /* Check for a simple load. */ |
b9f02dbb | 3813 | if (MEM_P (src) && simple_mem (src)) |
8e802be9 | 3814 | { |
3815 | ptr = ldst_entry (src); | |
acec9605 | 3816 | if (!REG_P (dest)) |
8e802be9 | 3817 | ptr->invalid = 1; |
3818 | } | |
3819 | else | |
3820 | { | |
3821 | /* Make sure there isn't a buried load somewhere. */ | |
3822 | invalidate_any_buried_refs (src); | |
3823 | } | |
3cfec666 | 3824 | |
066c8e94 | 3825 | /* Check for a simple load through a REG_EQUAL note. */ |
3826 | rtx note = find_reg_equal_equiv_note (insn), src_eq; | |
3827 | if (note | |
3828 | && REG_NOTE_KIND (note) == REG_EQUAL | |
3829 | && (src_eq = XEXP (note, 0)) | |
f473eb72 | 3830 | && !(MEM_P (src_eq) && simple_mem (src_eq))) |
3831 | invalidate_any_buried_refs (src_eq); | |
3832 | ||
8e802be9 | 3833 | /* Check for stores. Don't worry about aliased ones, they |
3834 | will block any movement we might do later. We only care | |
3835 | about this exact pattern since those are the only | |
3836 | circumstance that we will ignore the aliasing info. */ | |
b9f02dbb | 3837 | if (MEM_P (dest) && simple_mem (dest)) |
8e802be9 | 3838 | { |
3839 | ptr = ldst_entry (dest); | |
9c9680b5 | 3840 | machine_mode src_mode = GET_MODE (src); |
b9f02dbb | 3841 | if (! MEM_P (src) |
c5d8ca43 | 3842 | && GET_CODE (src) != ASM_OPERANDS |
3843 | /* Check for REG manually since want_to_gcse_p | |
3844 | returns 0 for all REGs. */ | |
9c9680b5 | 3845 | && can_assign_to_reg_without_clobbers_p (src, |
3846 | src_mode)) | |
d30c5be2 | 3847 | ptr->stores.safe_push (insn); |
8e802be9 | 3848 | else |
3849 | ptr->invalid = 1; | |
3850 | } | |
3851 | } | |
3852 | else | |
066c8e94 | 3853 | { |
3854 | /* Invalidate all MEMs in the pattern and... */ | |
3855 | invalidate_any_buried_refs (PATTERN (insn)); | |
3856 | ||
3857 | /* ...in REG_EQUAL notes for PARALLELs with single SET. */ | |
3858 | rtx note = find_reg_equal_equiv_note (insn), src_eq; | |
3859 | if (note | |
3860 | && REG_NOTE_KIND (note) == REG_EQUAL | |
3861 | && (src_eq = XEXP (note, 0))) | |
3862 | invalidate_any_buried_refs (src_eq); | |
3863 | } | |
8e802be9 | 3864 | } |
3865 | } | |
3866 | } | |
3867 | } | |
3868 | ||
3cfec666 | 3869 | /* Remove any references that have been either invalidated or are not in the |
8e802be9 | 3870 | expression list for pre gcse. */ |
3871 | ||
3872 | static void | |
952f0048 | 3873 | trim_ld_motion_mems (void) |
8e802be9 | 3874 | { |
69333952 | 3875 | struct ls_expr * * last = & pre_ldst_mems; |
3876 | struct ls_expr * ptr = pre_ldst_mems; | |
8e802be9 | 3877 | |
3878 | while (ptr != NULL) | |
3879 | { | |
9908fe4d | 3880 | struct gcse_expr * expr; |
3cfec666 | 3881 | |
8e802be9 | 3882 | /* Delete if entry has been made invalid. */ |
69333952 | 3883 | if (! ptr->invalid) |
8e802be9 | 3884 | { |
8e802be9 | 3885 | /* Delete if we cannot find this mem in the expression list. */ |
69333952 | 3886 | unsigned int hash = ptr->hash_index % expr_hash_table.size; |
3cfec666 | 3887 | |
69333952 | 3888 | for (expr = expr_hash_table.table[hash]; |
3889 | expr != NULL; | |
3890 | expr = expr->next_same_hash) | |
3891 | if (expr_equiv_p (expr->expr, ptr->pattern)) | |
3892 | break; | |
8e802be9 | 3893 | } |
3894 | else | |
9908fe4d | 3895 | expr = (struct gcse_expr *) 0; |
69333952 | 3896 | |
3897 | if (expr) | |
8e802be9 | 3898 | { |
3899 | /* Set the expression field if we are keeping it. */ | |
8e802be9 | 3900 | ptr->expr = expr; |
69333952 | 3901 | last = & ptr->next; |
8e802be9 | 3902 | ptr = ptr->next; |
3903 | } | |
69333952 | 3904 | else |
3905 | { | |
3906 | *last = ptr->next; | |
c1f445d2 | 3907 | pre_ldst_table->remove_elt_with_hash (ptr, ptr->hash_index); |
69333952 | 3908 | free_ldst_entry (ptr); |
3909 | ptr = * last; | |
3910 | } | |
8e802be9 | 3911 | } |
3912 | ||
3913 | /* Show the world what we've found. */ | |
3f5be5f4 | 3914 | if (dump_file && pre_ldst_mems != NULL) |
3915 | print_ldst_list (dump_file); | |
8e802be9 | 3916 | } |
3917 | ||
3918 | /* This routine will take an expression which we are replacing with | |
3919 | a reaching register, and update any stores that are needed if | |
3920 | that expression is in the ld_motion list. Stores are updated by | |
91c82c20 | 3921 | copying their SRC to the reaching register, and then storing |
8e802be9 | 3922 | the reaching register into the store location. These keeps the |
3923 | correct value in the reaching register for the loads. */ | |
3924 | ||
3925 | static void | |
9908fe4d | 3926 | update_ld_motion_stores (struct gcse_expr * expr) |
8e802be9 | 3927 | { |
3928 | struct ls_expr * mem_ptr; | |
3929 | ||
3930 | if ((mem_ptr = find_rtx_in_ldst (expr->expr))) | |
3931 | { | |
3cfec666 | 3932 | /* We can try to find just the REACHED stores, but is shouldn't |
3933 | matter to set the reaching reg everywhere... some might be | |
8e802be9 | 3934 | dead and should be eliminated later. */ |
3935 | ||
c5d8ca43 | 3936 | /* We replace (set mem expr) with (set reg expr) (set mem reg) |
3937 | where reg is the reaching reg used in the load. We checked in | |
3938 | compute_ld_motion_mems that we can replace (set mem expr) with | |
3939 | (set reg expr) in that insn. */ | |
d30c5be2 | 3940 | rtx_insn *insn; |
3941 | unsigned int i; | |
3942 | FOR_EACH_VEC_ELT_REVERSE (mem_ptr->stores, i, insn) | |
8e802be9 | 3943 | { |
8e802be9 | 3944 | rtx pat = PATTERN (insn); |
3945 | rtx src = SET_SRC (pat); | |
3946 | rtx reg = expr->reaching_reg; | |
8e802be9 | 3947 | |
3948 | /* If we've already copied it, continue. */ | |
3949 | if (expr->reaching_reg == src) | |
3950 | continue; | |
3cfec666 | 3951 | |
3f5be5f4 | 3952 | if (dump_file) |
8e802be9 | 3953 | { |
3f5be5f4 | 3954 | fprintf (dump_file, "PRE: store updated with reaching reg "); |
bc8197c0 | 3955 | print_rtl (dump_file, reg); |
3f5be5f4 | 3956 | fprintf (dump_file, ":\n "); |
3957 | print_inline_rtx (dump_file, insn, 8); | |
3958 | fprintf (dump_file, "\n"); | |
8e802be9 | 3959 | } |
3cfec666 | 3960 | |
9ed997be | 3961 | rtx_insn *copy = gen_move_insn (reg, copy_rtx (SET_SRC (pat))); |
d52d7a3a | 3962 | emit_insn_before (copy, insn); |
8e802be9 | 3963 | SET_SRC (pat) = reg; |
3072d30e | 3964 | df_insn_rescan (insn); |
8e802be9 | 3965 | |
3966 | /* un-recognize this pattern since it's probably different now. */ | |
3967 | INSN_CODE (insn) = -1; | |
3968 | gcse_create_count++; | |
3969 | } | |
3970 | } | |
3971 | } | |
3972 | \f | |
4b673aa1 | 3973 | /* Return true if the graph is too expensive to optimize. PASS is the |
3974 | optimization about to be performed. */ | |
64928ee5 | 3975 | |
82b9069d | 3976 | bool |
3977 | gcse_or_cprop_is_too_expensive (const char *pass) | |
4b673aa1 | 3978 | { |
82b9069d | 3979 | unsigned int memory_request = (n_basic_blocks_for_fn (cfun) |
3980 | * SBITMAP_SET_SIZE (max_reg_num ()) | |
3981 | * sizeof (SBITMAP_ELT_TYPE)); | |
3982 | ||
4b673aa1 | 3983 | /* Trying to perform global optimizations on flow graphs which have |
3984 | a high connectivity will take a long time and is unlikely to be | |
3985 | particularly useful. | |
7a676a9f | 3986 | |
4b673aa1 | 3987 | In normal circumstances a cfg should have about twice as many |
3988 | edges as blocks. But we do not want to punish small functions | |
3989 | which have a couple switch statements. Rather than simply | |
3990 | threshold the number of blocks, uses something with a more | |
3991 | graceful degradation. */ | |
f1955b22 | 3992 | if (n_edges_for_fn (cfun) > 20000 + n_basic_blocks_for_fn (cfun) * 4) |
4b673aa1 | 3993 | { |
3994 | warning (OPT_Wdisabled_optimization, | |
3995 | "%s: %d basic blocks and %d edges/basic block", | |
a28770e1 | 3996 | pass, n_basic_blocks_for_fn (cfun), |
f1955b22 | 3997 | n_edges_for_fn (cfun) / n_basic_blocks_for_fn (cfun)); |
8e802be9 | 3998 | |
4b673aa1 | 3999 | return true; |
4000 | } | |
8e802be9 | 4001 | |
07abdb66 | 4002 | /* If allocating memory for the dataflow bitmaps would take up too much |
4b673aa1 | 4003 | storage it's better just to disable the optimization. */ |
82b9069d | 4004 | if (memory_request > MAX_GCSE_MEMORY) |
4b673aa1 | 4005 | { |
4006 | warning (OPT_Wdisabled_optimization, | |
85b9be9b | 4007 | "%s: %d basic blocks and %d registers; " |
4008 | "increase %<--param max-gcse-memory%> above %d", | |
82b9069d | 4009 | pass, n_basic_blocks_for_fn (cfun), max_reg_num (), |
4010 | memory_request); | |
8e802be9 | 4011 | |
4b673aa1 | 4012 | return true; |
4013 | } | |
42334a67 | 4014 | |
4b673aa1 | 4015 | return false; |
9e4a9ceb | 4016 | } |
4b673aa1 | 4017 | \f |
4b673aa1 | 4018 | static unsigned int |
4019 | execute_rtl_pre (void) | |
4020 | { | |
805e3e15 | 4021 | int changed; |
4b673aa1 | 4022 | delete_unreachable_blocks (); |
4b673aa1 | 4023 | df_analyze (); |
805e3e15 | 4024 | changed = one_pre_gcse_pass (); |
4025 | flag_rerun_cse_after_global_opts |= changed; | |
4026 | if (changed) | |
4027 | cleanup_cfg (0); | |
4b673aa1 | 4028 | return 0; |
4029 | } | |
7a676a9f | 4030 | |
4b673aa1 | 4031 | static unsigned int |
4032 | execute_rtl_hoist (void) | |
4033 | { | |
805e3e15 | 4034 | int changed; |
4b673aa1 | 4035 | delete_unreachable_blocks (); |
4b673aa1 | 4036 | df_analyze (); |
805e3e15 | 4037 | changed = one_code_hoisting_pass (); |
4038 | flag_rerun_cse_after_global_opts |= changed; | |
4039 | if (changed) | |
4040 | cleanup_cfg (0); | |
4b673aa1 | 4041 | return 0; |
4042 | } | |
77fce4cd | 4043 | |
cbe8bda8 | 4044 | namespace { |
4045 | ||
4046 | const pass_data pass_data_rtl_pre = | |
77fce4cd | 4047 | { |
cbe8bda8 | 4048 | RTL_PASS, /* type */ |
4049 | "rtl pre", /* name */ | |
4050 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4051 | TV_PRE, /* tv_id */ |
4052 | PROP_cfglayout, /* properties_required */ | |
4053 | 0, /* properties_provided */ | |
4054 | 0, /* properties_destroyed */ | |
4055 | 0, /* todo_flags_start */ | |
8b88439e | 4056 | TODO_df_finish, /* todo_flags_finish */ |
d743aba2 | 4057 | }; |
77fce4cd | 4058 | |
cbe8bda8 | 4059 | class pass_rtl_pre : public rtl_opt_pass |
4060 | { | |
4061 | public: | |
9af5ce0c | 4062 | pass_rtl_pre (gcc::context *ctxt) |
4063 | : rtl_opt_pass (pass_data_rtl_pre, ctxt) | |
cbe8bda8 | 4064 | {} |
4065 | ||
4066 | /* opt_pass methods: */ | |
31315c24 | 4067 | virtual bool gate (function *); |
65b0537f | 4068 | virtual unsigned int execute (function *) { return execute_rtl_pre (); } |
cbe8bda8 | 4069 | |
4070 | }; // class pass_rtl_pre | |
4071 | ||
31315c24 | 4072 | /* We do not construct an accurate cfg in functions which call |
4073 | setjmp, so none of these passes runs if the function calls | |
4074 | setjmp. | |
4075 | FIXME: Should just handle setjmp via REG_SETJMP notes. */ | |
4076 | ||
4077 | bool | |
4078 | pass_rtl_pre::gate (function *fun) | |
4079 | { | |
4080 | return optimize > 0 && flag_gcse | |
4081 | && !fun->calls_setjmp | |
4082 | && optimize_function_for_speed_p (fun) | |
4083 | && dbg_cnt (pre); | |
4084 | } | |
4085 | ||
cbe8bda8 | 4086 | } // anon namespace |
4087 | ||
4088 | rtl_opt_pass * | |
4089 | make_pass_rtl_pre (gcc::context *ctxt) | |
4090 | { | |
4091 | return new pass_rtl_pre (ctxt); | |
4092 | } | |
4093 | ||
4094 | namespace { | |
4095 | ||
4096 | const pass_data pass_data_rtl_hoist = | |
77fce4cd | 4097 | { |
cbe8bda8 | 4098 | RTL_PASS, /* type */ |
4099 | "hoist", /* name */ | |
4100 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4101 | TV_HOIST, /* tv_id */ |
4102 | PROP_cfglayout, /* properties_required */ | |
4103 | 0, /* properties_provided */ | |
4104 | 0, /* properties_destroyed */ | |
4105 | 0, /* todo_flags_start */ | |
8b88439e | 4106 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 4107 | }; |
4108 | ||
cbe8bda8 | 4109 | class pass_rtl_hoist : public rtl_opt_pass |
4110 | { | |
4111 | public: | |
9af5ce0c | 4112 | pass_rtl_hoist (gcc::context *ctxt) |
4113 | : rtl_opt_pass (pass_data_rtl_hoist, ctxt) | |
cbe8bda8 | 4114 | {} |
4115 | ||
4116 | /* opt_pass methods: */ | |
31315c24 | 4117 | virtual bool gate (function *); |
65b0537f | 4118 | virtual unsigned int execute (function *) { return execute_rtl_hoist (); } |
cbe8bda8 | 4119 | |
4120 | }; // class pass_rtl_hoist | |
4121 | ||
31315c24 | 4122 | bool |
4123 | pass_rtl_hoist::gate (function *) | |
4124 | { | |
4125 | return optimize > 0 && flag_gcse | |
4126 | && !cfun->calls_setjmp | |
4127 | /* It does not make sense to run code hoisting unless we are optimizing | |
4128 | for code size -- it rarely makes programs faster, and can make then | |
4129 | bigger if we did PRE (when optimizing for space, we don't run PRE). */ | |
4130 | && optimize_function_for_size_p (cfun) | |
4131 | && dbg_cnt (hoist); | |
4132 | } | |
4133 | ||
cbe8bda8 | 4134 | } // anon namespace |
4135 | ||
4136 | rtl_opt_pass * | |
4137 | make_pass_rtl_hoist (gcc::context *ctxt) | |
4138 | { | |
4139 | return new pass_rtl_hoist (ctxt); | |
4140 | } | |
4141 | ||
415309e2 | 4142 | /* Reset all state within gcse.c so that we can rerun the compiler |
4143 | within the same process. For use by toplev::finalize. */ | |
4144 | ||
4145 | void | |
4146 | gcse_c_finalize (void) | |
4147 | { | |
4148 | test_insn = NULL; | |
4149 | } | |
4150 | ||
1f3233d1 | 4151 | #include "gt-gcse.h" |