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f4e584dc 1/* Global common subexpression elimination/Partial redundancy elimination
7506f491 2 and global constant/copy propagation for GNU compiler.
a0134312 3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003
8e42ace1 4 Free Software Foundation, Inc.
7506f491 5
1322177d 6This file is part of GCC.
7506f491 7
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8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
7506f491 12
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13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
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17
18You should have received a copy of the GNU General Public License
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19along with GCC; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2102111-1307, USA. */
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22
23/* TODO
24 - reordering of memory allocation and freeing to be more space efficient
25 - do rough calc of how many regs are needed in each block, and a rough
26 calc of how many regs are available in each class and use that to
27 throttle back the code in cases where RTX_COST is minimal.
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28 - a store to the same address as a load does not kill the load if the
29 source of the store is also the destination of the load. Handling this
30 allows more load motion, particularly out of loops.
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31 - ability to realloc sbitmap vectors would allow one initial computation
32 of reg_set_in_block with only subsequent additions, rather than
33 recomputing it for each pass
34
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35*/
36
37/* References searched while implementing this.
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38
39 Compilers Principles, Techniques and Tools
40 Aho, Sethi, Ullman
41 Addison-Wesley, 1988
42
43 Global Optimization by Suppression of Partial Redundancies
44 E. Morel, C. Renvoise
45 communications of the acm, Vol. 22, Num. 2, Feb. 1979
46
47 A Portable Machine-Independent Global Optimizer - Design and Measurements
48 Frederick Chow
49 Stanford Ph.D. thesis, Dec. 1983
50
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51 A Fast Algorithm for Code Movement Optimization
52 D.M. Dhamdhere
53 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
54
55 A Solution to a Problem with Morel and Renvoise's
56 Global Optimization by Suppression of Partial Redundancies
57 K-H Drechsler, M.P. Stadel
58 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
59
60 Practical Adaptation of the Global Optimization
61 Algorithm of Morel and Renvoise
62 D.M. Dhamdhere
63 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
64
65 Efficiently Computing Static Single Assignment Form and the Control
66 Dependence Graph
67 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
68 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
69
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70 Lazy Code Motion
71 J. Knoop, O. Ruthing, B. Steffen
72 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
73
74 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
75 Time for Reducible Flow Control
76 Thomas Ball
77 ACM Letters on Programming Languages and Systems,
78 Vol. 2, Num. 1-4, Mar-Dec 1993
79
80 An Efficient Representation for Sparse Sets
81 Preston Briggs, Linda Torczon
82 ACM Letters on Programming Languages and Systems,
83 Vol. 2, Num. 1-4, Mar-Dec 1993
84
85 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
86 K-H Drechsler, M.P. Stadel
87 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
88
89 Partial Dead Code Elimination
90 J. Knoop, O. Ruthing, B. Steffen
91 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
92
93 Effective Partial Redundancy Elimination
94 P. Briggs, K.D. Cooper
95 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
96
97 The Program Structure Tree: Computing Control Regions in Linear Time
98 R. Johnson, D. Pearson, K. Pingali
99 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
100
101 Optimal Code Motion: Theory and Practice
102 J. Knoop, O. Ruthing, B. Steffen
103 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
104
105 The power of assignment motion
106 J. Knoop, O. Ruthing, B. Steffen
107 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
108
109 Global code motion / global value numbering
110 C. Click
111 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
112
113 Value Driven Redundancy Elimination
114 L.T. Simpson
115 Rice University Ph.D. thesis, Apr. 1996
116
117 Value Numbering
118 L.T. Simpson
119 Massively Scalar Compiler Project, Rice University, Sep. 1996
120
121 High Performance Compilers for Parallel Computing
122 Michael Wolfe
123 Addison-Wesley, 1996
124
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125 Advanced Compiler Design and Implementation
126 Steven Muchnick
127 Morgan Kaufmann, 1997
128
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129 Building an Optimizing Compiler
130 Robert Morgan
131 Digital Press, 1998
132
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133 People wishing to speed up the code here should read:
134 Elimination Algorithms for Data Flow Analysis
135 B.G. Ryder, M.C. Paull
136 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
137
138 How to Analyze Large Programs Efficiently and Informatively
139 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
140 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
141
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142 People wishing to do something different can find various possibilities
143 in the above papers and elsewhere.
144*/
145
146#include "config.h"
50b2596f 147#include "system.h"
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148#include "coretypes.h"
149#include "tm.h"
01198c2f 150#include "toplev.h"
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151
152#include "rtl.h"
6baf1cc8 153#include "tm_p.h"
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154#include "regs.h"
155#include "hard-reg-set.h"
156#include "flags.h"
157#include "real.h"
158#include "insn-config.h"
159#include "recog.h"
160#include "basic-block.h"
50b2596f 161#include "output.h"
49ad7cfa 162#include "function.h"
589005ff 163#include "expr.h"
e7d482b9 164#include "except.h"
fb0c0a12 165#include "ggc.h"
f1fa37ff 166#include "params.h"
ae860ff7 167#include "cselib.h"
aaa4ca30 168
7506f491 169#include "obstack.h"
4fa31c2a 170
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171/* Propagate flow information through back edges and thus enable PRE's
172 moving loop invariant calculations out of loops.
173
174 Originally this tended to create worse overall code, but several
175 improvements during the development of PRE seem to have made following
176 back edges generally a win.
177
178 Note much of the loop invariant code motion done here would normally
179 be done by loop.c, which has more heuristics for when to move invariants
180 out of loops. At some point we might need to move some of those
181 heuristics into gcse.c. */
7506f491 182
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183/* We support GCSE via Partial Redundancy Elimination. PRE optimizations
184 are a superset of those done by GCSE.
7506f491 185
f4e584dc 186 We perform the following steps:
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187
188 1) Compute basic block information.
189
190 2) Compute table of places where registers are set.
191
192 3) Perform copy/constant propagation.
193
194 4) Perform global cse.
195
e78d9500 196 5) Perform another pass of copy/constant propagation.
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197
198 Two passes of copy/constant propagation are done because the first one
199 enables more GCSE and the second one helps to clean up the copies that
200 GCSE creates. This is needed more for PRE than for Classic because Classic
201 GCSE will try to use an existing register containing the common
202 subexpression rather than create a new one. This is harder to do for PRE
203 because of the code motion (which Classic GCSE doesn't do).
204
205 Expressions we are interested in GCSE-ing are of the form
206 (set (pseudo-reg) (expression)).
207 Function want_to_gcse_p says what these are.
208
209 PRE handles moving invariant expressions out of loops (by treating them as
f4e584dc 210 partially redundant).
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211
212 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
213 assignment) based GVN (global value numbering). L. T. Simpson's paper
214 (Rice University) on value numbering is a useful reference for this.
215
216 **********************
217
218 We used to support multiple passes but there are diminishing returns in
219 doing so. The first pass usually makes 90% of the changes that are doable.
220 A second pass can make a few more changes made possible by the first pass.
221 Experiments show any further passes don't make enough changes to justify
222 the expense.
223
224 A study of spec92 using an unlimited number of passes:
225 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
226 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
227 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
228
229 It was found doing copy propagation between each pass enables further
230 substitutions.
231
232 PRE is quite expensive in complicated functions because the DFA can take
740f35a0 233 awhile to converge. Hence we only perform one pass. The parameter max-gcse-passes can
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234 be modified if one wants to experiment.
235
236 **********************
237
238 The steps for PRE are:
239
240 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
241
242 2) Perform the data flow analysis for PRE.
243
244 3) Delete the redundant instructions
245
246 4) Insert the required copies [if any] that make the partially
247 redundant instructions fully redundant.
248
249 5) For other reaching expressions, insert an instruction to copy the value
250 to a newly created pseudo that will reach the redundant instruction.
251
252 The deletion is done first so that when we do insertions we
253 know which pseudo reg to use.
254
255 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
256 argue it is not. The number of iterations for the algorithm to converge
257 is typically 2-4 so I don't view it as that expensive (relatively speaking).
258
f4e584dc 259 PRE GCSE depends heavily on the second CSE pass to clean up the copies
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260 we create. To make an expression reach the place where it's redundant,
261 the result of the expression is copied to a new register, and the redundant
262 expression is deleted by replacing it with this new register. Classic GCSE
263 doesn't have this problem as much as it computes the reaching defs of
264 each register in each block and thus can try to use an existing register.
265
266 **********************
267
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268 A fair bit of simplicity is created by creating small functions for simple
269 tasks, even when the function is only called in one place. This may
270 measurably slow things down [or may not] by creating more function call
271 overhead than is necessary. The source is laid out so that it's trivial
272 to make the affected functions inline so that one can measure what speed
273 up, if any, can be achieved, and maybe later when things settle things can
274 be rearranged.
275
276 Help stamp out big monolithic functions! */
277\f
278/* GCSE global vars. */
279
280/* -dG dump file. */
281static FILE *gcse_file;
282
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283/* Note whether or not we should run jump optimization after gcse. We
284 want to do this for two cases.
285
286 * If we changed any jumps via cprop.
287
288 * If we added any labels via edge splitting. */
289
290static int run_jump_opt_after_gcse;
291
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292/* Bitmaps are normally not included in debugging dumps.
293 However it's useful to be able to print them from GDB.
294 We could create special functions for this, but it's simpler to
295 just allow passing stderr to the dump_foo fns. Since stderr can
296 be a macro, we store a copy here. */
297static FILE *debug_stderr;
298
299/* An obstack for our working variables. */
300static struct obstack gcse_obstack;
301
cc2902df 302/* Nonzero for each mode that supports (set (reg) (reg)).
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303 This is trivially true for integer and floating point values.
304 It may or may not be true for condition codes. */
305static char can_copy_p[(int) NUM_MACHINE_MODES];
306
cc2902df 307/* Nonzero if can_copy_p has been initialized. */
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308static int can_copy_init_p;
309
c4c81601 310struct reg_use {rtx reg_rtx; };
abd535b6 311
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312/* Hash table of expressions. */
313
314struct expr
315{
316 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
317 rtx expr;
318 /* Index in the available expression bitmaps. */
319 int bitmap_index;
320 /* Next entry with the same hash. */
321 struct expr *next_same_hash;
322 /* List of anticipatable occurrences in basic blocks in the function.
323 An "anticipatable occurrence" is one that is the first occurrence in the
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324 basic block, the operands are not modified in the basic block prior
325 to the occurrence and the output is not used between the start of
326 the block and the occurrence. */
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327 struct occr *antic_occr;
328 /* List of available occurrence in basic blocks in the function.
329 An "available occurrence" is one that is the last occurrence in the
330 basic block and the operands are not modified by following statements in
331 the basic block [including this insn]. */
332 struct occr *avail_occr;
333 /* Non-null if the computation is PRE redundant.
334 The value is the newly created pseudo-reg to record a copy of the
335 expression in all the places that reach the redundant copy. */
336 rtx reaching_reg;
337};
338
339/* Occurrence of an expression.
340 There is one per basic block. If a pattern appears more than once the
341 last appearance is used [or first for anticipatable expressions]. */
342
343struct occr
344{
345 /* Next occurrence of this expression. */
346 struct occr *next;
347 /* The insn that computes the expression. */
348 rtx insn;
cc2902df 349 /* Nonzero if this [anticipatable] occurrence has been deleted. */
7506f491 350 char deleted_p;
cc2902df 351 /* Nonzero if this [available] occurrence has been copied to
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352 reaching_reg. */
353 /* ??? This is mutually exclusive with deleted_p, so they could share
354 the same byte. */
355 char copied_p;
356};
357
358/* Expression and copy propagation hash tables.
359 Each hash table is an array of buckets.
360 ??? It is known that if it were an array of entries, structure elements
361 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
362 not clear whether in the final analysis a sufficient amount of memory would
363 be saved as the size of the available expression bitmaps would be larger
364 [one could build a mapping table without holes afterwards though].
c4c81601 365 Someday I'll perform the computation and figure it out. */
7506f491 366
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367struct hash_table
368{
369 /* The table itself.
370 This is an array of `expr_hash_table_size' elements. */
371 struct expr **table;
372
373 /* Size of the hash table, in elements. */
374 unsigned int size;
2e653e39 375
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376 /* Number of hash table elements. */
377 unsigned int n_elems;
7506f491 378
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379 /* Whether the table is expression of copy propagation one. */
380 int set_p;
381};
c4c81601 382
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383/* Expression hash table. */
384static struct hash_table expr_hash_table;
385
386/* Copy propagation hash table. */
387static struct hash_table set_hash_table;
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388
389/* Mapping of uids to cuids.
390 Only real insns get cuids. */
391static int *uid_cuid;
392
393/* Highest UID in UID_CUID. */
394static int max_uid;
395
396/* Get the cuid of an insn. */
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397#ifdef ENABLE_CHECKING
398#define INSN_CUID(INSN) (INSN_UID (INSN) > max_uid ? (abort (), 0) : uid_cuid[INSN_UID (INSN)])
399#else
7506f491 400#define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
b86db3eb 401#endif
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402
403/* Number of cuids. */
404static int max_cuid;
405
406/* Mapping of cuids to insns. */
407static rtx *cuid_insn;
408
409/* Get insn from cuid. */
410#define CUID_INSN(CUID) (cuid_insn[CUID])
411
412/* Maximum register number in function prior to doing gcse + 1.
413 Registers created during this pass have regno >= max_gcse_regno.
414 This is named with "gcse" to not collide with global of same name. */
770ae6cc 415static unsigned int max_gcse_regno;
7506f491 416
7506f491 417/* Table of registers that are modified.
c4c81601 418
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419 For each register, each element is a list of places where the pseudo-reg
420 is set.
421
422 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
423 requires knowledge of which blocks kill which regs [and thus could use
f4e584dc 424 a bitmap instead of the lists `reg_set_table' uses].
7506f491 425
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426 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
427 num-regs) [however perhaps it may be useful to keep the data as is]. One
428 advantage of recording things this way is that `reg_set_table' is fairly
429 sparse with respect to pseudo regs but for hard regs could be fairly dense
430 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
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431 up functions like compute_transp since in the case of pseudo-regs we only
432 need to iterate over the number of times a pseudo-reg is set, not over the
433 number of basic blocks [clearly there is a bit of a slow down in the cases
434 where a pseudo is set more than once in a block, however it is believed
435 that the net effect is to speed things up]. This isn't done for hard-regs
436 because recording call-clobbered hard-regs in `reg_set_table' at each
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437 function call can consume a fair bit of memory, and iterating over
438 hard-regs stored this way in compute_transp will be more expensive. */
7506f491 439
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440typedef struct reg_set
441{
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442 /* The next setting of this register. */
443 struct reg_set *next;
444 /* The insn where it was set. */
445 rtx insn;
446} reg_set;
c4c81601 447
7506f491 448static reg_set **reg_set_table;
c4c81601 449
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450/* Size of `reg_set_table'.
451 The table starts out at max_gcse_regno + slop, and is enlarged as
452 necessary. */
453static int reg_set_table_size;
c4c81601 454
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455/* Amount to grow `reg_set_table' by when it's full. */
456#define REG_SET_TABLE_SLOP 100
457
a13d4ebf 458/* This is a list of expressions which are MEMs and will be used by load
589005ff 459 or store motion.
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460 Load motion tracks MEMs which aren't killed by
461 anything except itself. (ie, loads and stores to a single location).
589005ff 462 We can then allow movement of these MEM refs with a little special
a13d4ebf
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463 allowance. (all stores copy the same value to the reaching reg used
464 for the loads). This means all values used to store into memory must have
589005ff 465 no side effects so we can re-issue the setter value.
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466 Store Motion uses this structure as an expression table to track stores
467 which look interesting, and might be moveable towards the exit block. */
468
469struct ls_expr
470{
471 struct expr * expr; /* Gcse expression reference for LM. */
472 rtx pattern; /* Pattern of this mem. */
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473 rtx loads; /* INSN list of loads seen. */
474 rtx stores; /* INSN list of stores seen. */
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475 struct ls_expr * next; /* Next in the list. */
476 int invalid; /* Invalid for some reason. */
477 int index; /* If it maps to a bitmap index. */
478 int hash_index; /* Index when in a hash table. */
479 rtx reaching_reg; /* Register to use when re-writing. */
480};
481
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482/* Array of implicit set patterns indexed by basic block index. */
483static rtx *implicit_sets;
484
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485/* Head of the list of load/store memory refs. */
486static struct ls_expr * pre_ldst_mems = NULL;
487
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488/* Bitmap containing one bit for each register in the program.
489 Used when performing GCSE to track which registers have been set since
490 the start of the basic block. */
73991d6a 491static regset reg_set_bitmap;
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492
493/* For each block, a bitmap of registers set in the block.
494 This is used by expr_killed_p and compute_transp.
495 It is computed during hash table computation and not by compute_sets
496 as it includes registers added since the last pass (or between cprop and
497 gcse) and it's currently not easy to realloc sbitmap vectors. */
498static sbitmap *reg_set_in_block;
499
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500/* Array, indexed by basic block number for a list of insns which modify
501 memory within that block. */
502static rtx * modify_mem_list;
73991d6a 503bitmap modify_mem_list_set;
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504
505/* This array parallels modify_mem_list, but is kept canonicalized. */
506static rtx * canon_modify_mem_list;
73991d6a 507bitmap canon_modify_mem_list_set;
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508/* Various variables for statistics gathering. */
509
510/* Memory used in a pass.
511 This isn't intended to be absolutely precise. Its intent is only
512 to keep an eye on memory usage. */
513static int bytes_used;
c4c81601 514
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515/* GCSE substitutions made. */
516static int gcse_subst_count;
517/* Number of copy instructions created. */
518static int gcse_create_count;
519/* Number of constants propagated. */
520static int const_prop_count;
521/* Number of copys propagated. */
522static int copy_prop_count;
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523\f
524/* These variables are used by classic GCSE.
525 Normally they'd be defined a bit later, but `rd_gen' needs to
526 be declared sooner. */
527
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528/* Each block has a bitmap of each type.
529 The length of each blocks bitmap is:
530
531 max_cuid - for reaching definitions
532 n_exprs - for available expressions
533
534 Thus we view the bitmaps as 2 dimensional arrays. i.e.
535 rd_kill[block_num][cuid_num]
c4c81601 536 ae_kill[block_num][expr_num] */
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537
538/* For reaching defs */
539static sbitmap *rd_kill, *rd_gen, *reaching_defs, *rd_out;
540
541/* for available exprs */
542static sbitmap *ae_kill, *ae_gen, *ae_in, *ae_out;
b5ce41ff 543
0511851c
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544/* Objects of this type are passed around by the null-pointer check
545 removal routines. */
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546struct null_pointer_info
547{
0511851c 548 /* The basic block being processed. */
e0082a72 549 basic_block current_block;
0511851c 550 /* The first register to be handled in this pass. */
770ae6cc 551 unsigned int min_reg;
0511851c 552 /* One greater than the last register to be handled in this pass. */
770ae6cc 553 unsigned int max_reg;
0511851c
MM
554 sbitmap *nonnull_local;
555 sbitmap *nonnull_killed;
556};
7506f491 557\f
c4c81601
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558static void compute_can_copy PARAMS ((void));
559static char *gmalloc PARAMS ((unsigned int));
560static char *grealloc PARAMS ((char *, unsigned int));
561static char *gcse_alloc PARAMS ((unsigned long));
562static void alloc_gcse_mem PARAMS ((rtx));
563static void free_gcse_mem PARAMS ((void));
564static void alloc_reg_set_mem PARAMS ((int));
565static void free_reg_set_mem PARAMS ((void));
566static int get_bitmap_width PARAMS ((int, int, int));
567static void record_one_set PARAMS ((int, rtx));
568static void record_set_info PARAMS ((rtx, rtx, void *));
569static void compute_sets PARAMS ((rtx));
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570static void hash_scan_insn PARAMS ((rtx, struct hash_table *, int));
571static void hash_scan_set PARAMS ((rtx, rtx, struct hash_table *));
572static void hash_scan_clobber PARAMS ((rtx, rtx, struct hash_table *));
573static void hash_scan_call PARAMS ((rtx, rtx, struct hash_table *));
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574static int want_to_gcse_p PARAMS ((rtx));
575static int oprs_unchanged_p PARAMS ((rtx, rtx, int));
576static int oprs_anticipatable_p PARAMS ((rtx, rtx));
577static int oprs_available_p PARAMS ((rtx, rtx));
578static void insert_expr_in_table PARAMS ((rtx, enum machine_mode, rtx,
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579 int, int, struct hash_table *));
580static void insert_set_in_table PARAMS ((rtx, rtx, struct hash_table *));
c4c81601
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581static unsigned int hash_expr PARAMS ((rtx, enum machine_mode, int *, int));
582static unsigned int hash_expr_1 PARAMS ((rtx, enum machine_mode, int *));
c0712acb 583static unsigned int hash_string_1 PARAMS ((const char *));
c4c81601
RK
584static unsigned int hash_set PARAMS ((int, int));
585static int expr_equiv_p PARAMS ((rtx, rtx));
586static void record_last_reg_set_info PARAMS ((rtx, int));
587static void record_last_mem_set_info PARAMS ((rtx));
588static void record_last_set_info PARAMS ((rtx, rtx, void *));
02280659
ZD
589static void compute_hash_table PARAMS ((struct hash_table *));
590static void alloc_hash_table PARAMS ((int, struct hash_table *, int));
591static void free_hash_table PARAMS ((struct hash_table *));
592static void compute_hash_table_work PARAMS ((struct hash_table *));
593static void dump_hash_table PARAMS ((FILE *, const char *,
594 struct hash_table *));
595static struct expr *lookup_expr PARAMS ((rtx, struct hash_table *));
596static struct expr *lookup_set PARAMS ((unsigned int, rtx, struct hash_table *));
770ae6cc 597static struct expr *next_set PARAMS ((unsigned int, struct expr *));
c4c81601
RK
598static void reset_opr_set_tables PARAMS ((void));
599static int oprs_not_set_p PARAMS ((rtx, rtx));
600static void mark_call PARAMS ((rtx));
601static void mark_set PARAMS ((rtx, rtx));
602static void mark_clobber PARAMS ((rtx, rtx));
603static void mark_oprs_set PARAMS ((rtx));
604static void alloc_cprop_mem PARAMS ((int, int));
605static void free_cprop_mem PARAMS ((void));
606static void compute_transp PARAMS ((rtx, int, sbitmap *, int));
607static void compute_transpout PARAMS ((void));
608static void compute_local_properties PARAMS ((sbitmap *, sbitmap *, sbitmap *,
02280659 609 struct hash_table *));
711d877c 610static void compute_cprop_data PARAMS ((void));
9e71c818 611static void find_used_regs PARAMS ((rtx *, void *));
c4c81601
RK
612static int try_replace_reg PARAMS ((rtx, rtx, rtx));
613static struct expr *find_avail_set PARAMS ((int, rtx));
0e3f0221 614static int cprop_jump PARAMS ((basic_block, rtx, rtx, rtx, rtx));
a13d4ebf 615static void mems_conflict_for_gcse_p PARAMS ((rtx, rtx, void *));
e2d2ed72 616static int load_killed_in_block_p PARAMS ((basic_block, int, rtx, int));
a13d4ebf 617static void canon_list_insert PARAMS ((rtx, rtx, void *));
ae860ff7 618static int cprop_insn PARAMS ((rtx, int));
c4c81601 619static int cprop PARAMS ((int));
fbef91d8
RS
620static rtx fis_get_condition PARAMS ((rtx));
621static void find_implicit_sets PARAMS ((void));
a0134312 622static int one_cprop_pass PARAMS ((int, int, int));
ae860ff7 623static bool constprop_register PARAMS ((rtx, rtx, rtx, int));
0e3f0221
RS
624static struct expr *find_bypass_set PARAMS ((int, int));
625static int bypass_block PARAMS ((basic_block, rtx, rtx));
626static int bypass_conditional_jumps PARAMS ((void));
c4c81601
RK
627static void alloc_pre_mem PARAMS ((int, int));
628static void free_pre_mem PARAMS ((void));
629static void compute_pre_data PARAMS ((void));
589005ff 630static int pre_expr_reaches_here_p PARAMS ((basic_block, struct expr *,
e2d2ed72
AM
631 basic_block));
632static void insert_insn_end_bb PARAMS ((struct expr *, basic_block, int));
c4c81601
RK
633static void pre_insert_copy_insn PARAMS ((struct expr *, rtx));
634static void pre_insert_copies PARAMS ((void));
635static int pre_delete PARAMS ((void));
636static int pre_gcse PARAMS ((void));
637static int one_pre_gcse_pass PARAMS ((int));
638static void add_label_notes PARAMS ((rtx, rtx));
639static void alloc_code_hoist_mem PARAMS ((int, int));
640static void free_code_hoist_mem PARAMS ((void));
711d877c 641static void compute_code_hoist_vbeinout PARAMS ((void));
c4c81601 642static void compute_code_hoist_data PARAMS ((void));
589005ff 643static int hoist_expr_reaches_here_p PARAMS ((basic_block, int, basic_block,
e2d2ed72 644 char *));
c4c81601
RK
645static void hoist_code PARAMS ((void));
646static int one_code_hoisting_pass PARAMS ((void));
647static void alloc_rd_mem PARAMS ((int, int));
648static void free_rd_mem PARAMS ((void));
e2d2ed72 649static void handle_rd_kill_set PARAMS ((rtx, int, basic_block));
c4c81601 650static void compute_kill_rd PARAMS ((void));
711d877c 651static void compute_rd PARAMS ((void));
c4c81601
RK
652static void alloc_avail_expr_mem PARAMS ((int, int));
653static void free_avail_expr_mem PARAMS ((void));
02280659 654static void compute_ae_gen PARAMS ((struct hash_table *));
e2d2ed72 655static int expr_killed_p PARAMS ((rtx, basic_block));
02280659 656static void compute_ae_kill PARAMS ((sbitmap *, sbitmap *, struct hash_table *));
711d877c 657static int expr_reaches_here_p PARAMS ((struct occr *, struct expr *,
e2d2ed72 658 basic_block, int));
c4c81601
RK
659static rtx computing_insn PARAMS ((struct expr *, rtx));
660static int def_reaches_here_p PARAMS ((rtx, rtx));
661static int can_disregard_other_sets PARAMS ((struct reg_set **, rtx, int));
662static int handle_avail_expr PARAMS ((rtx, struct expr *));
663static int classic_gcse PARAMS ((void));
664static int one_classic_gcse_pass PARAMS ((int));
665static void invalidate_nonnull_info PARAMS ((rtx, rtx, void *));
99a15921 666static int delete_null_pointer_checks_1 PARAMS ((unsigned int *,
8e184d9c 667 sbitmap *, sbitmap *,
711d877c
KG
668 struct null_pointer_info *));
669static rtx process_insert_insn PARAMS ((struct expr *));
670static int pre_edge_insert PARAMS ((struct edge_list *, struct expr **));
c4c81601 671static int expr_reaches_here_p_work PARAMS ((struct occr *, struct expr *,
e2d2ed72
AM
672 basic_block, int, char *));
673static int pre_expr_reaches_here_p_work PARAMS ((basic_block, struct expr *,
674 basic_block, char *));
a13d4ebf
AM
675static struct ls_expr * ldst_entry PARAMS ((rtx));
676static void free_ldst_entry PARAMS ((struct ls_expr *));
677static void free_ldst_mems PARAMS ((void));
678static void print_ldst_list PARAMS ((FILE *));
679static struct ls_expr * find_rtx_in_ldst PARAMS ((rtx));
680static int enumerate_ldsts PARAMS ((void));
681static inline struct ls_expr * first_ls_expr PARAMS ((void));
682static inline struct ls_expr * next_ls_expr PARAMS ((struct ls_expr *));
683static int simple_mem PARAMS ((rtx));
684static void invalidate_any_buried_refs PARAMS ((rtx));
589005ff 685static void compute_ld_motion_mems PARAMS ((void));
a13d4ebf
AM
686static void trim_ld_motion_mems PARAMS ((void));
687static void update_ld_motion_stores PARAMS ((struct expr *));
aaa4ca30
AJ
688static void reg_set_info PARAMS ((rtx, rtx, void *));
689static int store_ops_ok PARAMS ((rtx, basic_block));
a13d4ebf
AM
690static void find_moveable_store PARAMS ((rtx));
691static int compute_store_table PARAMS ((void));
692static int load_kills_store PARAMS ((rtx, rtx));
693static int find_loads PARAMS ((rtx, rtx));
694static int store_killed_in_insn PARAMS ((rtx, rtx));
aaa4ca30 695static int store_killed_after PARAMS ((rtx, rtx, basic_block));
e2d2ed72 696static int store_killed_before PARAMS ((rtx, rtx, basic_block));
a13d4ebf 697static void build_store_vectors PARAMS ((void));
e2d2ed72 698static void insert_insn_start_bb PARAMS ((rtx, basic_block));
a13d4ebf 699static int insert_store PARAMS ((struct ls_expr *, edge));
e2d2ed72 700static void replace_store_insn PARAMS ((rtx, rtx, basic_block));
589005ff 701static void delete_store PARAMS ((struct ls_expr *,
e2d2ed72 702 basic_block));
a13d4ebf
AM
703static void free_store_memory PARAMS ((void));
704static void store_motion PARAMS ((void));
0fe854a7 705static void free_insn_expr_list_list PARAMS ((rtx *));
73991d6a
JH
706static void clear_modify_mem_tables PARAMS ((void));
707static void free_modify_mem_tables PARAMS ((void));
10d1bb36 708static rtx gcse_emit_move_after PARAMS ((rtx, rtx, rtx));
8ba46434
R
709static bool do_local_cprop PARAMS ((rtx, rtx, int, rtx*));
710static bool adjust_libcall_notes PARAMS ((rtx, rtx, rtx, rtx*));
ae860ff7 711static void local_cprop_pass PARAMS ((int));
7506f491
DE
712\f
713/* Entry point for global common subexpression elimination.
714 F is the first instruction in the function. */
715
e78d9500 716int
7506f491
DE
717gcse_main (f, file)
718 rtx f;
719 FILE *file;
720{
721 int changed, pass;
722 /* Bytes used at start of pass. */
723 int initial_bytes_used;
724 /* Maximum number of bytes used by a pass. */
725 int max_pass_bytes;
726 /* Point to release obstack data from for each pass. */
727 char *gcse_obstack_bottom;
728
b5ce41ff
JL
729 /* We do not construct an accurate cfg in functions which call
730 setjmp, so just punt to be safe. */
7506f491 731 if (current_function_calls_setjmp)
e78d9500 732 return 0;
589005ff 733
b5ce41ff
JL
734 /* Assume that we do not need to run jump optimizations after gcse. */
735 run_jump_opt_after_gcse = 0;
736
7506f491
DE
737 /* For calling dump_foo fns from gdb. */
738 debug_stderr = stderr;
b5ce41ff 739 gcse_file = file;
7506f491 740
b5ce41ff
JL
741 /* Identify the basic block information for this function, including
742 successors and predecessors. */
7506f491 743 max_gcse_regno = max_reg_num ();
7506f491 744
a42cd965
AM
745 if (file)
746 dump_flow_info (file);
747
7506f491 748 /* Return if there's nothing to do. */
0b17ab2f 749 if (n_basic_blocks <= 1)
a18820c6 750 return 0;
7506f491 751
55f7891b
JL
752 /* Trying to perform global optimizations on flow graphs which have
753 a high connectivity will take a long time and is unlikely to be
754 particularly useful.
755
43e72072 756 In normal circumstances a cfg should have about twice as many edges
55f7891b
JL
757 as blocks. But we do not want to punish small functions which have
758 a couple switch statements. So we require a relatively large number
759 of basic blocks and the ratio of edges to blocks to be high. */
0b17ab2f 760 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
18424ae1
BL
761 {
762 if (warn_disabled_optimization)
8e42ace1 763 warning ("GCSE disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
0b17ab2f 764 n_basic_blocks, n_edges / n_basic_blocks);
18424ae1
BL
765 return 0;
766 }
55f7891b 767
f1fa37ff
MM
768 /* If allocating memory for the cprop bitmap would take up too much
769 storage it's better just to disable the optimization. */
589005ff 770 if ((n_basic_blocks
f1fa37ff
MM
771 * SBITMAP_SET_SIZE (max_gcse_regno)
772 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
773 {
774 if (warn_disabled_optimization)
775 warning ("GCSE disabled: %d basic blocks and %d registers",
0b17ab2f 776 n_basic_blocks, max_gcse_regno);
f1fa37ff
MM
777
778 return 0;
779 }
780
7506f491
DE
781 /* See what modes support reg/reg copy operations. */
782 if (! can_copy_init_p)
783 {
784 compute_can_copy ();
785 can_copy_init_p = 1;
786 }
787
788 gcc_obstack_init (&gcse_obstack);
a42cd965 789 bytes_used = 0;
7506f491 790
a13d4ebf
AM
791 /* We need alias. */
792 init_alias_analysis ();
c4c81601
RK
793 /* Record where pseudo-registers are set. This data is kept accurate
794 during each pass. ??? We could also record hard-reg information here
795 [since it's unchanging], however it is currently done during hash table
796 computation.
b5ce41ff 797
c4c81601
RK
798 It may be tempting to compute MEM set information here too, but MEM sets
799 will be subject to code motion one day and thus we need to compute
b5ce41ff 800 information about memory sets when we build the hash tables. */
7506f491
DE
801
802 alloc_reg_set_mem (max_gcse_regno);
803 compute_sets (f);
804
805 pass = 0;
806 initial_bytes_used = bytes_used;
807 max_pass_bytes = 0;
808 gcse_obstack_bottom = gcse_alloc (1);
809 changed = 1;
740f35a0 810 while (changed && pass < MAX_GCSE_PASSES)
7506f491
DE
811 {
812 changed = 0;
813 if (file)
814 fprintf (file, "GCSE pass %d\n\n", pass + 1);
815
816 /* Initialize bytes_used to the space for the pred/succ lists,
817 and the reg_set_table data. */
818 bytes_used = initial_bytes_used;
819
820 /* Each pass may create new registers, so recalculate each time. */
821 max_gcse_regno = max_reg_num ();
822
823 alloc_gcse_mem (f);
824
b5ce41ff
JL
825 /* Don't allow constant propagation to modify jumps
826 during this pass. */
a0134312 827 changed = one_cprop_pass (pass + 1, 0, 0);
7506f491
DE
828
829 if (optimize_size)
b5ce41ff 830 changed |= one_classic_gcse_pass (pass + 1);
7506f491 831 else
589005ff 832 {
a42cd965 833 changed |= one_pre_gcse_pass (pass + 1);
a13d4ebf
AM
834 /* We may have just created new basic blocks. Release and
835 recompute various things which are sized on the number of
836 basic blocks. */
837 if (changed)
838 {
73991d6a 839 free_modify_mem_tables ();
a13d4ebf 840 modify_mem_list
d55bc081 841 = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
a13d4ebf 842 canon_modify_mem_list
d55bc081
ZD
843 = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
844 memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
845 memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
a13d4ebf 846 }
a42cd965
AM
847 free_reg_set_mem ();
848 alloc_reg_set_mem (max_reg_num ());
849 compute_sets (f);
850 run_jump_opt_after_gcse = 1;
851 }
7506f491
DE
852
853 if (max_pass_bytes < bytes_used)
854 max_pass_bytes = bytes_used;
855
bb457bd9
JL
856 /* Free up memory, then reallocate for code hoisting. We can
857 not re-use the existing allocated memory because the tables
858 will not have info for the insns or registers created by
859 partial redundancy elimination. */
7506f491
DE
860 free_gcse_mem ();
861
bb457bd9
JL
862 /* It does not make sense to run code hoisting unless we optimizing
863 for code size -- it rarely makes programs faster, and can make
864 them bigger if we did partial redundancy elimination (when optimizing
865 for space, we use a classic gcse algorithm instead of partial
866 redundancy algorithms). */
867 if (optimize_size)
589005ff 868 {
bb457bd9
JL
869 max_gcse_regno = max_reg_num ();
870 alloc_gcse_mem (f);
871 changed |= one_code_hoisting_pass ();
872 free_gcse_mem ();
873
874 if (max_pass_bytes < bytes_used)
875 max_pass_bytes = bytes_used;
589005ff 876 }
bb457bd9 877
7506f491
DE
878 if (file)
879 {
880 fprintf (file, "\n");
881 fflush (file);
882 }
c4c81601 883
7506f491
DE
884 obstack_free (&gcse_obstack, gcse_obstack_bottom);
885 pass++;
886 }
887
b5ce41ff
JL
888 /* Do one last pass of copy propagation, including cprop into
889 conditional jumps. */
890
891 max_gcse_regno = max_reg_num ();
892 alloc_gcse_mem (f);
893 /* This time, go ahead and allow cprop to alter jumps. */
a0134312 894 one_cprop_pass (pass + 1, 1, 0);
b5ce41ff 895 free_gcse_mem ();
7506f491
DE
896
897 if (file)
898 {
899 fprintf (file, "GCSE of %s: %d basic blocks, ",
0b17ab2f 900 current_function_name, n_basic_blocks);
7506f491
DE
901 fprintf (file, "%d pass%s, %d bytes\n\n",
902 pass, pass > 1 ? "es" : "", max_pass_bytes);
903 }
904
6496a589 905 obstack_free (&gcse_obstack, NULL);
7506f491 906 free_reg_set_mem ();
a13d4ebf
AM
907 /* We are finished with alias. */
908 end_alias_analysis ();
909 allocate_reg_info (max_reg_num (), FALSE, FALSE);
910
61ad9a34
JJ
911 /* Store motion disabled until it is fixed. */
912 if (0 && !optimize_size && flag_gcse_sm)
a13d4ebf
AM
913 store_motion ();
914 /* Record where pseudo-registers are set. */
e78d9500 915 return run_jump_opt_after_gcse;
7506f491
DE
916}
917\f
918/* Misc. utilities. */
919
920/* Compute which modes support reg/reg copy operations. */
921
922static void
923compute_can_copy ()
924{
925 int i;
50b2596f 926#ifndef AVOID_CCMODE_COPIES
8e42ace1 927 rtx reg, insn;
50b2596f 928#endif
961192e1 929 memset (can_copy_p, 0, NUM_MACHINE_MODES);
7506f491
DE
930
931 start_sequence ();
932 for (i = 0; i < NUM_MACHINE_MODES; i++)
c4c81601
RK
933 if (GET_MODE_CLASS (i) == MODE_CC)
934 {
7506f491 935#ifdef AVOID_CCMODE_COPIES
c4c81601 936 can_copy_p[i] = 0;
7506f491 937#else
c4c81601
RK
938 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
939 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
9714cf43 940 if (recog (PATTERN (insn), insn, NULL) >= 0)
c4c81601 941 can_copy_p[i] = 1;
7506f491 942#endif
c4c81601 943 }
141b5810
AO
944 else
945 can_copy_p[i] = 1;
c4c81601 946
7506f491 947 end_sequence ();
7506f491
DE
948}
949\f
950/* Cover function to xmalloc to record bytes allocated. */
951
952static char *
953gmalloc (size)
954 unsigned int size;
955{
956 bytes_used += size;
957 return xmalloc (size);
958}
959
960/* Cover function to xrealloc.
961 We don't record the additional size since we don't know it.
962 It won't affect memory usage stats much anyway. */
963
964static char *
965grealloc (ptr, size)
966 char *ptr;
967 unsigned int size;
968{
969 return xrealloc (ptr, size);
970}
971
77bbd421 972/* Cover function to obstack_alloc. */
7506f491
DE
973
974static char *
975gcse_alloc (size)
976 unsigned long size;
977{
77bbd421 978 bytes_used += size;
7506f491
DE
979 return (char *) obstack_alloc (&gcse_obstack, size);
980}
981
982/* Allocate memory for the cuid mapping array,
983 and reg/memory set tracking tables.
984
985 This is called at the start of each pass. */
986
987static void
988alloc_gcse_mem (f)
989 rtx f;
990{
8e42ace1 991 int i, n;
7506f491
DE
992 rtx insn;
993
994 /* Find the largest UID and create a mapping from UIDs to CUIDs.
995 CUIDs are like UIDs except they increase monotonically, have no gaps,
996 and only apply to real insns. */
997
998 max_uid = get_max_uid ();
999 n = (max_uid + 1) * sizeof (int);
1000 uid_cuid = (int *) gmalloc (n);
961192e1 1001 memset ((char *) uid_cuid, 0, n);
7506f491
DE
1002 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
1003 {
2c3c49de 1004 if (INSN_P (insn))
b86db3eb 1005 uid_cuid[INSN_UID (insn)] = i++;
7506f491 1006 else
b86db3eb 1007 uid_cuid[INSN_UID (insn)] = i;
7506f491
DE
1008 }
1009
1010 /* Create a table mapping cuids to insns. */
1011
1012 max_cuid = i;
1013 n = (max_cuid + 1) * sizeof (rtx);
1014 cuid_insn = (rtx *) gmalloc (n);
961192e1 1015 memset ((char *) cuid_insn, 0, n);
7506f491 1016 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
2c3c49de 1017 if (INSN_P (insn))
c4c81601 1018 CUID_INSN (i++) = insn;
7506f491
DE
1019
1020 /* Allocate vars to track sets of regs. */
73991d6a 1021 reg_set_bitmap = BITMAP_XMALLOC ();
7506f491
DE
1022
1023 /* Allocate vars to track sets of regs, memory per block. */
d55bc081 1024 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
7506f491 1025 max_gcse_regno);
a13d4ebf
AM
1026 /* Allocate array to keep a list of insns which modify memory in each
1027 basic block. */
d55bc081
ZD
1028 modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
1029 canon_modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
1030 memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
1031 memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
73991d6a
JH
1032 modify_mem_list_set = BITMAP_XMALLOC ();
1033 canon_modify_mem_list_set = BITMAP_XMALLOC ();
7506f491
DE
1034}
1035
1036/* Free memory allocated by alloc_gcse_mem. */
1037
1038static void
1039free_gcse_mem ()
1040{
1041 free (uid_cuid);
1042 free (cuid_insn);
1043
73991d6a 1044 BITMAP_XFREE (reg_set_bitmap);
7506f491 1045
5a660bff 1046 sbitmap_vector_free (reg_set_in_block);
73991d6a
JH
1047 free_modify_mem_tables ();
1048 BITMAP_XFREE (modify_mem_list_set);
1049 BITMAP_XFREE (canon_modify_mem_list_set);
7506f491
DE
1050}
1051
0511851c
MM
1052/* Many of the global optimization algorithms work by solving dataflow
1053 equations for various expressions. Initially, some local value is
c4c81601
RK
1054 computed for each expression in each block. Then, the values across the
1055 various blocks are combined (by following flow graph edges) to arrive at
1056 global values. Conceptually, each set of equations is independent. We
1057 may therefore solve all the equations in parallel, solve them one at a
1058 time, or pick any intermediate approach.
1059
1060 When you're going to need N two-dimensional bitmaps, each X (say, the
1061 number of blocks) by Y (say, the number of expressions), call this
1062 function. It's not important what X and Y represent; only that Y
1063 correspond to the things that can be done in parallel. This function will
1064 return an appropriate chunking factor C; you should solve C sets of
1065 equations in parallel. By going through this function, we can easily
1066 trade space against time; by solving fewer equations in parallel we use
1067 less space. */
0511851c
MM
1068
1069static int
1070get_bitmap_width (n, x, y)
1071 int n;
1072 int x;
1073 int y;
1074{
1075 /* It's not really worth figuring out *exactly* how much memory will
1076 be used by a particular choice. The important thing is to get
1077 something approximately right. */
1078 size_t max_bitmap_memory = 10 * 1024 * 1024;
1079
1080 /* The number of bytes we'd use for a single column of minimum
1081 width. */
1082 size_t column_size = n * x * sizeof (SBITMAP_ELT_TYPE);
1083
1084 /* Often, it's reasonable just to solve all the equations in
1085 parallel. */
1086 if (column_size * SBITMAP_SET_SIZE (y) <= max_bitmap_memory)
1087 return y;
1088
1089 /* Otherwise, pick the largest width we can, without going over the
1090 limit. */
1091 return SBITMAP_ELT_BITS * ((max_bitmap_memory + column_size - 1)
1092 / column_size);
1093}
b5ce41ff
JL
1094\f
1095/* Compute the local properties of each recorded expression.
c4c81601
RK
1096
1097 Local properties are those that are defined by the block, irrespective of
1098 other blocks.
b5ce41ff
JL
1099
1100 An expression is transparent in a block if its operands are not modified
1101 in the block.
1102
1103 An expression is computed (locally available) in a block if it is computed
1104 at least once and expression would contain the same value if the
1105 computation was moved to the end of the block.
1106
1107 An expression is locally anticipatable in a block if it is computed at
1108 least once and expression would contain the same value if the computation
1109 was moved to the beginning of the block.
1110
c4c81601
RK
1111 We call this routine for cprop, pre and code hoisting. They all compute
1112 basically the same information and thus can easily share this code.
7506f491 1113
c4c81601
RK
1114 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1115 properties. If NULL, then it is not necessary to compute or record that
1116 particular property.
b5ce41ff 1117
02280659
ZD
1118 TABLE controls which hash table to look at. If it is set hash table,
1119 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
c4c81601 1120 ABSALTERED. */
589005ff 1121
b5ce41ff 1122static void
02280659 1123compute_local_properties (transp, comp, antloc, table)
b5ce41ff
JL
1124 sbitmap *transp;
1125 sbitmap *comp;
1126 sbitmap *antloc;
02280659 1127 struct hash_table *table;
b5ce41ff 1128{
02280659 1129 unsigned int i;
589005ff 1130
b5ce41ff
JL
1131 /* Initialize any bitmaps that were passed in. */
1132 if (transp)
695ab36a 1133 {
02280659 1134 if (table->set_p)
d55bc081 1135 sbitmap_vector_zero (transp, last_basic_block);
695ab36a 1136 else
d55bc081 1137 sbitmap_vector_ones (transp, last_basic_block);
695ab36a 1138 }
c4c81601 1139
b5ce41ff 1140 if (comp)
d55bc081 1141 sbitmap_vector_zero (comp, last_basic_block);
b5ce41ff 1142 if (antloc)
d55bc081 1143 sbitmap_vector_zero (antloc, last_basic_block);
b5ce41ff 1144
02280659 1145 for (i = 0; i < table->size; i++)
7506f491 1146 {
b5ce41ff
JL
1147 struct expr *expr;
1148
02280659 1149 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
b5ce41ff 1150 {
b5ce41ff 1151 int indx = expr->bitmap_index;
c4c81601 1152 struct occr *occr;
b5ce41ff
JL
1153
1154 /* The expression is transparent in this block if it is not killed.
1155 We start by assuming all are transparent [none are killed], and
1156 then reset the bits for those that are. */
b5ce41ff 1157 if (transp)
02280659 1158 compute_transp (expr->expr, indx, transp, table->set_p);
b5ce41ff
JL
1159
1160 /* The occurrences recorded in antic_occr are exactly those that
cc2902df 1161 we want to set to nonzero in ANTLOC. */
b5ce41ff 1162 if (antloc)
c4c81601
RK
1163 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1164 {
1165 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
b5ce41ff 1166
c4c81601
RK
1167 /* While we're scanning the table, this is a good place to
1168 initialize this. */
1169 occr->deleted_p = 0;
1170 }
b5ce41ff
JL
1171
1172 /* The occurrences recorded in avail_occr are exactly those that
cc2902df 1173 we want to set to nonzero in COMP. */
b5ce41ff 1174 if (comp)
c4c81601
RK
1175 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1176 {
1177 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
b5ce41ff 1178
c4c81601
RK
1179 /* While we're scanning the table, this is a good place to
1180 initialize this. */
1181 occr->copied_p = 0;
1182 }
b5ce41ff
JL
1183
1184 /* While we're scanning the table, this is a good place to
1185 initialize this. */
1186 expr->reaching_reg = 0;
1187 }
7506f491 1188 }
7506f491
DE
1189}
1190\f
1191/* Register set information.
1192
1193 `reg_set_table' records where each register is set or otherwise
1194 modified. */
1195
1196static struct obstack reg_set_obstack;
1197
1198static void
1199alloc_reg_set_mem (n_regs)
1200 int n_regs;
1201{
c4c81601 1202 unsigned int n;
7506f491
DE
1203
1204 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1205 n = reg_set_table_size * sizeof (struct reg_set *);
1206 reg_set_table = (struct reg_set **) gmalloc (n);
961192e1 1207 memset ((char *) reg_set_table, 0, n);
7506f491
DE
1208
1209 gcc_obstack_init (&reg_set_obstack);
1210}
1211
1212static void
1213free_reg_set_mem ()
1214{
1215 free (reg_set_table);
6496a589 1216 obstack_free (&reg_set_obstack, NULL);
7506f491
DE
1217}
1218
1219/* Record REGNO in the reg_set table. */
1220
1221static void
1222record_one_set (regno, insn)
1223 int regno;
1224 rtx insn;
1225{
172890a2 1226 /* Allocate a new reg_set element and link it onto the list. */
63bc1d05 1227 struct reg_set *new_reg_info;
7506f491
DE
1228
1229 /* If the table isn't big enough, enlarge it. */
1230 if (regno >= reg_set_table_size)
1231 {
1232 int new_size = regno + REG_SET_TABLE_SLOP;
c4c81601
RK
1233
1234 reg_set_table
1235 = (struct reg_set **) grealloc ((char *) reg_set_table,
1236 new_size * sizeof (struct reg_set *));
961192e1 1237 memset ((char *) (reg_set_table + reg_set_table_size), 0,
8e42ace1 1238 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
7506f491
DE
1239 reg_set_table_size = new_size;
1240 }
1241
1242 new_reg_info = (struct reg_set *) obstack_alloc (&reg_set_obstack,
1243 sizeof (struct reg_set));
1244 bytes_used += sizeof (struct reg_set);
1245 new_reg_info->insn = insn;
274969ea
MM
1246 new_reg_info->next = reg_set_table[regno];
1247 reg_set_table[regno] = new_reg_info;
7506f491
DE
1248}
1249
c4c81601
RK
1250/* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1251 an insn. The DATA is really the instruction in which the SET is
1252 occurring. */
7506f491
DE
1253
1254static void
84832317 1255record_set_info (dest, setter, data)
50b2596f 1256 rtx dest, setter ATTRIBUTE_UNUSED;
84832317 1257 void *data;
7506f491 1258{
84832317
MM
1259 rtx record_set_insn = (rtx) data;
1260
c4c81601
RK
1261 if (GET_CODE (dest) == REG && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1262 record_one_set (REGNO (dest), record_set_insn);
7506f491
DE
1263}
1264
1265/* Scan the function and record each set of each pseudo-register.
1266
c4c81601 1267 This is called once, at the start of the gcse pass. See the comments for
fbe5a4a6 1268 `reg_set_table' for further documentation. */
7506f491
DE
1269
1270static void
1271compute_sets (f)
1272 rtx f;
1273{
c4c81601 1274 rtx insn;
7506f491 1275
c4c81601 1276 for (insn = f; insn != 0; insn = NEXT_INSN (insn))
2c3c49de 1277 if (INSN_P (insn))
c4c81601 1278 note_stores (PATTERN (insn), record_set_info, insn);
7506f491
DE
1279}
1280\f
1281/* Hash table support. */
1282
80c29cc4
RZ
1283struct reg_avail_info
1284{
e0082a72 1285 basic_block last_bb;
80c29cc4
RZ
1286 int first_set;
1287 int last_set;
1288};
1289
1290static struct reg_avail_info *reg_avail_info;
e0082a72 1291static basic_block current_bb;
7506f491 1292
7506f491 1293
fb0c0a12
RK
1294/* See whether X, the source of a set, is something we want to consider for
1295 GCSE. */
7506f491 1296
e2500fed 1297static GTY(()) rtx test_insn;
7506f491
DE
1298static int
1299want_to_gcse_p (x)
1300 rtx x;
1301{
fb0c0a12
RK
1302 int num_clobbers = 0;
1303 int icode;
1304
c4c81601 1305 switch (GET_CODE (x))
7506f491
DE
1306 {
1307 case REG:
1308 case SUBREG:
1309 case CONST_INT:
1310 case CONST_DOUBLE:
69ef87e2 1311 case CONST_VECTOR:
7506f491 1312 case CALL:
34ee7f82 1313 case CONSTANT_P_RTX:
7506f491
DE
1314 return 0;
1315
1316 default:
1317 break;
1318 }
1319
fb0c0a12
RK
1320 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1321 if (general_operand (x, GET_MODE (x)))
1322 return 1;
1323 else if (GET_MODE (x) == VOIDmode)
1324 return 0;
1325
1326 /* Otherwise, check if we can make a valid insn from it. First initialize
1327 our test insn if we haven't already. */
1328 if (test_insn == 0)
1329 {
1330 test_insn
1331 = make_insn_raw (gen_rtx_SET (VOIDmode,
1332 gen_rtx_REG (word_mode,
1333 FIRST_PSEUDO_REGISTER * 2),
1334 const0_rtx));
1335 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
fb0c0a12
RK
1336 }
1337
1338 /* Now make an insn like the one we would make when GCSE'ing and see if
1339 valid. */
1340 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1341 SET_SRC (PATTERN (test_insn)) = x;
1342 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1343 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
7506f491
DE
1344}
1345
cc2902df 1346/* Return nonzero if the operands of expression X are unchanged from the
7506f491
DE
1347 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1348 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1349
1350static int
1351oprs_unchanged_p (x, insn, avail_p)
1352 rtx x, insn;
1353 int avail_p;
1354{
c4c81601 1355 int i, j;
7506f491 1356 enum rtx_code code;
6f7d635c 1357 const char *fmt;
7506f491 1358
7506f491
DE
1359 if (x == 0)
1360 return 1;
1361
1362 code = GET_CODE (x);
1363 switch (code)
1364 {
1365 case REG:
80c29cc4
RZ
1366 {
1367 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1368
1369 if (info->last_bb != current_bb)
1370 return 1;
589005ff 1371 if (avail_p)
80c29cc4
RZ
1372 return info->last_set < INSN_CUID (insn);
1373 else
1374 return info->first_set >= INSN_CUID (insn);
1375 }
7506f491
DE
1376
1377 case MEM:
e0082a72 1378 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
a13d4ebf
AM
1379 x, avail_p))
1380 return 0;
7506f491 1381 else
c4c81601 1382 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
7506f491
DE
1383
1384 case PRE_DEC:
1385 case PRE_INC:
1386 case POST_DEC:
1387 case POST_INC:
4b983fdc
RH
1388 case PRE_MODIFY:
1389 case POST_MODIFY:
7506f491
DE
1390 return 0;
1391
1392 case PC:
1393 case CC0: /*FIXME*/
1394 case CONST:
1395 case CONST_INT:
1396 case CONST_DOUBLE:
69ef87e2 1397 case CONST_VECTOR:
7506f491
DE
1398 case SYMBOL_REF:
1399 case LABEL_REF:
1400 case ADDR_VEC:
1401 case ADDR_DIFF_VEC:
1402 return 1;
1403
1404 default:
1405 break;
1406 }
1407
c4c81601 1408 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
1409 {
1410 if (fmt[i] == 'e')
1411 {
c4c81601
RK
1412 /* If we are about to do the last recursive call needed at this
1413 level, change it into iteration. This function is called enough
1414 to be worth it. */
7506f491 1415 if (i == 0)
c4c81601
RK
1416 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1417
1418 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
7506f491
DE
1419 return 0;
1420 }
1421 else if (fmt[i] == 'E')
c4c81601
RK
1422 for (j = 0; j < XVECLEN (x, i); j++)
1423 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1424 return 0;
7506f491
DE
1425 }
1426
1427 return 1;
1428}
1429
a13d4ebf
AM
1430/* Used for communication between mems_conflict_for_gcse_p and
1431 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1432 conflict between two memory references. */
1433static int gcse_mems_conflict_p;
1434
1435/* Used for communication between mems_conflict_for_gcse_p and
1436 load_killed_in_block_p. A memory reference for a load instruction,
1437 mems_conflict_for_gcse_p will see if a memory store conflicts with
1438 this memory load. */
1439static rtx gcse_mem_operand;
1440
1441/* DEST is the output of an instruction. If it is a memory reference, and
1442 possibly conflicts with the load found in gcse_mem_operand, then set
1443 gcse_mems_conflict_p to a nonzero value. */
1444
1445static void
1446mems_conflict_for_gcse_p (dest, setter, data)
1447 rtx dest, setter ATTRIBUTE_UNUSED;
1448 void *data ATTRIBUTE_UNUSED;
1449{
1450 while (GET_CODE (dest) == SUBREG
1451 || GET_CODE (dest) == ZERO_EXTRACT
1452 || GET_CODE (dest) == SIGN_EXTRACT
1453 || GET_CODE (dest) == STRICT_LOW_PART)
1454 dest = XEXP (dest, 0);
1455
1456 /* If DEST is not a MEM, then it will not conflict with the load. Note
1457 that function calls are assumed to clobber memory, but are handled
1458 elsewhere. */
1459 if (GET_CODE (dest) != MEM)
1460 return;
aaa4ca30 1461
a13d4ebf 1462 /* If we are setting a MEM in our list of specially recognized MEMs,
589005ff
KH
1463 don't mark as killed this time. */
1464
a13d4ebf
AM
1465 if (dest == gcse_mem_operand && pre_ldst_mems != NULL)
1466 {
1467 if (!find_rtx_in_ldst (dest))
1468 gcse_mems_conflict_p = 1;
1469 return;
1470 }
aaa4ca30 1471
a13d4ebf
AM
1472 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1473 rtx_addr_varies_p))
1474 gcse_mems_conflict_p = 1;
1475}
1476
1477/* Return nonzero if the expression in X (a memory reference) is killed
1478 in block BB before or after the insn with the CUID in UID_LIMIT.
1479 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1480 before UID_LIMIT.
1481
1482 To check the entire block, set UID_LIMIT to max_uid + 1 and
1483 AVAIL_P to 0. */
1484
1485static int
1486load_killed_in_block_p (bb, uid_limit, x, avail_p)
e2d2ed72 1487 basic_block bb;
a13d4ebf
AM
1488 int uid_limit;
1489 rtx x;
1490 int avail_p;
1491{
0b17ab2f 1492 rtx list_entry = modify_mem_list[bb->index];
a13d4ebf
AM
1493 while (list_entry)
1494 {
1495 rtx setter;
1496 /* Ignore entries in the list that do not apply. */
1497 if ((avail_p
1498 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1499 || (! avail_p
1500 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1501 {
1502 list_entry = XEXP (list_entry, 1);
1503 continue;
1504 }
1505
1506 setter = XEXP (list_entry, 0);
1507
1508 /* If SETTER is a call everything is clobbered. Note that calls
1509 to pure functions are never put on the list, so we need not
1510 worry about them. */
1511 if (GET_CODE (setter) == CALL_INSN)
1512 return 1;
1513
1514 /* SETTER must be an INSN of some kind that sets memory. Call
589005ff 1515 note_stores to examine each hunk of memory that is modified.
a13d4ebf
AM
1516
1517 The note_stores interface is pretty limited, so we have to
1518 communicate via global variables. Yuk. */
1519 gcse_mem_operand = x;
1520 gcse_mems_conflict_p = 0;
1521 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1522 if (gcse_mems_conflict_p)
1523 return 1;
1524 list_entry = XEXP (list_entry, 1);
1525 }
1526 return 0;
1527}
1528
cc2902df 1529/* Return nonzero if the operands of expression X are unchanged from
7506f491
DE
1530 the start of INSN's basic block up to but not including INSN. */
1531
1532static int
1533oprs_anticipatable_p (x, insn)
1534 rtx x, insn;
1535{
1536 return oprs_unchanged_p (x, insn, 0);
1537}
1538
cc2902df 1539/* Return nonzero if the operands of expression X are unchanged from
7506f491
DE
1540 INSN to the end of INSN's basic block. */
1541
1542static int
1543oprs_available_p (x, insn)
1544 rtx x, insn;
1545{
1546 return oprs_unchanged_p (x, insn, 1);
1547}
1548
1549/* Hash expression X.
c4c81601
RK
1550
1551 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1552 indicating if a volatile operand is found or if the expression contains
1553 something we don't want to insert in the table.
7506f491
DE
1554
1555 ??? One might want to merge this with canon_hash. Later. */
1556
1557static unsigned int
1558hash_expr (x, mode, do_not_record_p, hash_table_size)
1559 rtx x;
1560 enum machine_mode mode;
1561 int *do_not_record_p;
1562 int hash_table_size;
1563{
1564 unsigned int hash;
1565
1566 *do_not_record_p = 0;
1567
1568 hash = hash_expr_1 (x, mode, do_not_record_p);
1569 return hash % hash_table_size;
1570}
172890a2 1571
6462bb43 1572/* Hash a string. Just add its bytes up. */
172890a2 1573
6462bb43
AO
1574static inline unsigned
1575hash_string_1 (ps)
1576 const char *ps;
1577{
1578 unsigned hash = 0;
8e42ace1 1579 const unsigned char *p = (const unsigned char *) ps;
589005ff 1580
6462bb43
AO
1581 if (p)
1582 while (*p)
1583 hash += *p++;
1584
1585 return hash;
1586}
7506f491
DE
1587
1588/* Subroutine of hash_expr to do the actual work. */
1589
1590static unsigned int
1591hash_expr_1 (x, mode, do_not_record_p)
1592 rtx x;
1593 enum machine_mode mode;
1594 int *do_not_record_p;
1595{
1596 int i, j;
1597 unsigned hash = 0;
1598 enum rtx_code code;
6f7d635c 1599 const char *fmt;
7506f491 1600
c4c81601 1601 /* Used to turn recursion into iteration. We can't rely on GCC's
fbe5a4a6 1602 tail-recursion elimination since we need to keep accumulating values
c4c81601 1603 in HASH. */
7506f491
DE
1604
1605 if (x == 0)
1606 return hash;
1607
c4c81601 1608 repeat:
7506f491
DE
1609 code = GET_CODE (x);
1610 switch (code)
1611 {
1612 case REG:
c4c81601
RK
1613 hash += ((unsigned int) REG << 7) + REGNO (x);
1614 return hash;
7506f491
DE
1615
1616 case CONST_INT:
c4c81601
RK
1617 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
1618 + (unsigned int) INTVAL (x));
1619 return hash;
7506f491
DE
1620
1621 case CONST_DOUBLE:
1622 /* This is like the general case, except that it only counts
1623 the integers representing the constant. */
c4c81601 1624 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
7506f491
DE
1625 if (GET_MODE (x) != VOIDmode)
1626 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
c4c81601 1627 hash += (unsigned int) XWINT (x, i);
7506f491 1628 else
c4c81601
RK
1629 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
1630 + (unsigned int) CONST_DOUBLE_HIGH (x));
7506f491
DE
1631 return hash;
1632
69ef87e2
AH
1633 case CONST_VECTOR:
1634 {
1635 int units;
1636 rtx elt;
1637
1638 units = CONST_VECTOR_NUNITS (x);
1639
1640 for (i = 0; i < units; ++i)
1641 {
1642 elt = CONST_VECTOR_ELT (x, i);
1643 hash += hash_expr_1 (elt, GET_MODE (elt), do_not_record_p);
1644 }
1645
1646 return hash;
1647 }
1648
7506f491
DE
1649 /* Assume there is only one rtx object for any given label. */
1650 case LABEL_REF:
1651 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
1652 differences and differences between each stage's debugging dumps. */
c4c81601
RK
1653 hash += (((unsigned int) LABEL_REF << 7)
1654 + CODE_LABEL_NUMBER (XEXP (x, 0)));
7506f491
DE
1655 return hash;
1656
1657 case SYMBOL_REF:
1658 {
1659 /* Don't hash on the symbol's address to avoid bootstrap differences.
1660 Different hash values may cause expressions to be recorded in
1661 different orders and thus different registers to be used in the
1662 final assembler. This also avoids differences in the dump files
1663 between various stages. */
1664 unsigned int h = 0;
3cce094d 1665 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
c4c81601 1666
7506f491
DE
1667 while (*p)
1668 h += (h << 7) + *p++; /* ??? revisit */
c4c81601
RK
1669
1670 hash += ((unsigned int) SYMBOL_REF << 7) + h;
7506f491
DE
1671 return hash;
1672 }
1673
1674 case MEM:
1675 if (MEM_VOLATILE_P (x))
1676 {
1677 *do_not_record_p = 1;
1678 return 0;
1679 }
c4c81601
RK
1680
1681 hash += (unsigned int) MEM;
d51f3632
JH
1682 /* We used alias set for hashing, but this is not good, since the alias
1683 set may differ in -fprofile-arcs and -fbranch-probabilities compilation
1684 causing the profiles to fail to match. */
7506f491
DE
1685 x = XEXP (x, 0);
1686 goto repeat;
1687
1688 case PRE_DEC:
1689 case PRE_INC:
1690 case POST_DEC:
1691 case POST_INC:
1692 case PC:
1693 case CC0:
1694 case CALL:
1695 case UNSPEC_VOLATILE:
1696 *do_not_record_p = 1;
1697 return 0;
1698
1699 case ASM_OPERANDS:
1700 if (MEM_VOLATILE_P (x))
1701 {
1702 *do_not_record_p = 1;
1703 return 0;
1704 }
6462bb43
AO
1705 else
1706 {
1707 /* We don't want to take the filename and line into account. */
1708 hash += (unsigned) code + (unsigned) GET_MODE (x)
1709 + hash_string_1 (ASM_OPERANDS_TEMPLATE (x))
1710 + hash_string_1 (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
1711 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
1712
1713 if (ASM_OPERANDS_INPUT_LENGTH (x))
1714 {
1715 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
1716 {
1717 hash += (hash_expr_1 (ASM_OPERANDS_INPUT (x, i),
1718 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
1719 do_not_record_p)
1720 + hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT
1721 (x, i)));
1722 }
1723
1724 hash += hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
1725 x = ASM_OPERANDS_INPUT (x, 0);
1726 mode = GET_MODE (x);
1727 goto repeat;
1728 }
1729 return hash;
1730 }
7506f491
DE
1731
1732 default:
1733 break;
1734 }
1735
7506f491 1736 hash += (unsigned) code + (unsigned) GET_MODE (x);
c4c81601 1737 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
1738 {
1739 if (fmt[i] == 'e')
1740 {
7506f491
DE
1741 /* If we are about to do the last recursive call
1742 needed at this level, change it into iteration.
1743 This function is called enough to be worth it. */
1744 if (i == 0)
1745 {
c4c81601 1746 x = XEXP (x, i);
7506f491
DE
1747 goto repeat;
1748 }
c4c81601
RK
1749
1750 hash += hash_expr_1 (XEXP (x, i), 0, do_not_record_p);
7506f491
DE
1751 if (*do_not_record_p)
1752 return 0;
1753 }
c4c81601 1754
7506f491
DE
1755 else if (fmt[i] == 'E')
1756 for (j = 0; j < XVECLEN (x, i); j++)
1757 {
1758 hash += hash_expr_1 (XVECEXP (x, i, j), 0, do_not_record_p);
1759 if (*do_not_record_p)
1760 return 0;
1761 }
c4c81601 1762
7506f491 1763 else if (fmt[i] == 's')
6462bb43 1764 hash += hash_string_1 (XSTR (x, i));
7506f491 1765 else if (fmt[i] == 'i')
c4c81601 1766 hash += (unsigned int) XINT (x, i);
7506f491
DE
1767 else
1768 abort ();
1769 }
1770
1771 return hash;
1772}
1773
1774/* Hash a set of register REGNO.
1775
c4c81601
RK
1776 Sets are hashed on the register that is set. This simplifies the PRE copy
1777 propagation code.
7506f491
DE
1778
1779 ??? May need to make things more elaborate. Later, as necessary. */
1780
1781static unsigned int
1782hash_set (regno, hash_table_size)
1783 int regno;
1784 int hash_table_size;
1785{
1786 unsigned int hash;
1787
1788 hash = regno;
1789 return hash % hash_table_size;
1790}
1791
cc2902df 1792/* Return nonzero if exp1 is equivalent to exp2.
7506f491
DE
1793 ??? Borrowed from cse.c. Might want to remerge with cse.c. Later. */
1794
1795static int
1796expr_equiv_p (x, y)
1797 rtx x, y;
1798{
b3694847
SS
1799 int i, j;
1800 enum rtx_code code;
1801 const char *fmt;
7506f491
DE
1802
1803 if (x == y)
1804 return 1;
c4c81601 1805
7506f491
DE
1806 if (x == 0 || y == 0)
1807 return x == y;
1808
1809 code = GET_CODE (x);
1810 if (code != GET_CODE (y))
1811 return 0;
1812
1813 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1814 if (GET_MODE (x) != GET_MODE (y))
1815 return 0;
1816
1817 switch (code)
1818 {
1819 case PC:
1820 case CC0:
1821 return x == y;
1822
1823 case CONST_INT:
1824 return INTVAL (x) == INTVAL (y);
1825
1826 case LABEL_REF:
1827 return XEXP (x, 0) == XEXP (y, 0);
1828
1829 case SYMBOL_REF:
1830 return XSTR (x, 0) == XSTR (y, 0);
1831
1832 case REG:
1833 return REGNO (x) == REGNO (y);
1834
297c3335
RH
1835 case MEM:
1836 /* Can't merge two expressions in different alias sets, since we can
1837 decide that the expression is transparent in a block when it isn't,
1838 due to it being set with the different alias set. */
1839 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
1840 return 0;
1841 break;
1842
7506f491
DE
1843 /* For commutative operations, check both orders. */
1844 case PLUS:
1845 case MULT:
1846 case AND:
1847 case IOR:
1848 case XOR:
1849 case NE:
1850 case EQ:
1851 return ((expr_equiv_p (XEXP (x, 0), XEXP (y, 0))
1852 && expr_equiv_p (XEXP (x, 1), XEXP (y, 1)))
1853 || (expr_equiv_p (XEXP (x, 0), XEXP (y, 1))
1854 && expr_equiv_p (XEXP (x, 1), XEXP (y, 0))));
1855
6462bb43
AO
1856 case ASM_OPERANDS:
1857 /* We don't use the generic code below because we want to
1858 disregard filename and line numbers. */
1859
1860 /* A volatile asm isn't equivalent to any other. */
1861 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
1862 return 0;
1863
1864 if (GET_MODE (x) != GET_MODE (y)
1865 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
1866 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
1867 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
1868 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
1869 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
1870 return 0;
1871
1872 if (ASM_OPERANDS_INPUT_LENGTH (x))
1873 {
1874 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
1875 if (! expr_equiv_p (ASM_OPERANDS_INPUT (x, i),
1876 ASM_OPERANDS_INPUT (y, i))
1877 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
1878 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
1879 return 0;
1880 }
1881
1882 return 1;
1883
7506f491
DE
1884 default:
1885 break;
1886 }
1887
1888 /* Compare the elements. If any pair of corresponding elements
1889 fail to match, return 0 for the whole thing. */
1890
1891 fmt = GET_RTX_FORMAT (code);
1892 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1893 {
1894 switch (fmt[i])
1895 {
1896 case 'e':
1897 if (! expr_equiv_p (XEXP (x, i), XEXP (y, i)))
1898 return 0;
1899 break;
1900
1901 case 'E':
1902 if (XVECLEN (x, i) != XVECLEN (y, i))
1903 return 0;
1904 for (j = 0; j < XVECLEN (x, i); j++)
1905 if (! expr_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
1906 return 0;
1907 break;
1908
1909 case 's':
1910 if (strcmp (XSTR (x, i), XSTR (y, i)))
1911 return 0;
1912 break;
1913
1914 case 'i':
1915 if (XINT (x, i) != XINT (y, i))
1916 return 0;
1917 break;
1918
1919 case 'w':
1920 if (XWINT (x, i) != XWINT (y, i))
1921 return 0;
1922 break;
1923
1924 case '0':
1925 break;
aaa4ca30 1926
7506f491
DE
1927 default:
1928 abort ();
1929 }
8e42ace1 1930 }
7506f491
DE
1931
1932 return 1;
1933}
1934
02280659 1935/* Insert expression X in INSN in the hash TABLE.
7506f491
DE
1936 If it is already present, record it as the last occurrence in INSN's
1937 basic block.
1938
1939 MODE is the mode of the value X is being stored into.
1940 It is only used if X is a CONST_INT.
1941
cc2902df
KH
1942 ANTIC_P is nonzero if X is an anticipatable expression.
1943 AVAIL_P is nonzero if X is an available expression. */
7506f491
DE
1944
1945static void
02280659 1946insert_expr_in_table (x, mode, insn, antic_p, avail_p, table)
7506f491
DE
1947 rtx x;
1948 enum machine_mode mode;
1949 rtx insn;
1950 int antic_p, avail_p;
02280659 1951 struct hash_table *table;
7506f491
DE
1952{
1953 int found, do_not_record_p;
1954 unsigned int hash;
1955 struct expr *cur_expr, *last_expr = NULL;
1956 struct occr *antic_occr, *avail_occr;
1957 struct occr *last_occr = NULL;
1958
02280659 1959 hash = hash_expr (x, mode, &do_not_record_p, table->size);
7506f491
DE
1960
1961 /* Do not insert expression in table if it contains volatile operands,
1962 or if hash_expr determines the expression is something we don't want
1963 to or can't handle. */
1964 if (do_not_record_p)
1965 return;
1966
02280659 1967 cur_expr = table->table[hash];
7506f491
DE
1968 found = 0;
1969
c4c81601 1970 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
7506f491
DE
1971 {
1972 /* If the expression isn't found, save a pointer to the end of
1973 the list. */
1974 last_expr = cur_expr;
1975 cur_expr = cur_expr->next_same_hash;
1976 }
1977
1978 if (! found)
1979 {
1980 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
1981 bytes_used += sizeof (struct expr);
02280659 1982 if (table->table[hash] == NULL)
c4c81601 1983 /* This is the first pattern that hashed to this index. */
02280659 1984 table->table[hash] = cur_expr;
7506f491 1985 else
c4c81601
RK
1986 /* Add EXPR to end of this hash chain. */
1987 last_expr->next_same_hash = cur_expr;
1988
589005ff 1989 /* Set the fields of the expr element. */
7506f491 1990 cur_expr->expr = x;
02280659 1991 cur_expr->bitmap_index = table->n_elems++;
7506f491
DE
1992 cur_expr->next_same_hash = NULL;
1993 cur_expr->antic_occr = NULL;
1994 cur_expr->avail_occr = NULL;
1995 }
1996
1997 /* Now record the occurrence(s). */
7506f491
DE
1998 if (antic_p)
1999 {
2000 antic_occr = cur_expr->antic_occr;
2001
2002 /* Search for another occurrence in the same basic block. */
2003 while (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
2004 {
2005 /* If an occurrence isn't found, save a pointer to the end of
2006 the list. */
2007 last_occr = antic_occr;
2008 antic_occr = antic_occr->next;
2009 }
2010
2011 if (antic_occr)
c4c81601
RK
2012 /* Found another instance of the expression in the same basic block.
2013 Prefer the currently recorded one. We want the first one in the
2014 block and the block is scanned from start to end. */
2015 ; /* nothing to do */
7506f491
DE
2016 else
2017 {
2018 /* First occurrence of this expression in this basic block. */
2019 antic_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2020 bytes_used += sizeof (struct occr);
2021 /* First occurrence of this expression in any block? */
2022 if (cur_expr->antic_occr == NULL)
2023 cur_expr->antic_occr = antic_occr;
2024 else
2025 last_occr->next = antic_occr;
c4c81601 2026
7506f491
DE
2027 antic_occr->insn = insn;
2028 antic_occr->next = NULL;
2029 }
2030 }
2031
2032 if (avail_p)
2033 {
2034 avail_occr = cur_expr->avail_occr;
2035
2036 /* Search for another occurrence in the same basic block. */
2037 while (avail_occr && BLOCK_NUM (avail_occr->insn) != BLOCK_NUM (insn))
2038 {
2039 /* If an occurrence isn't found, save a pointer to the end of
2040 the list. */
2041 last_occr = avail_occr;
2042 avail_occr = avail_occr->next;
2043 }
2044
2045 if (avail_occr)
c4c81601
RK
2046 /* Found another instance of the expression in the same basic block.
2047 Prefer this occurrence to the currently recorded one. We want
2048 the last one in the block and the block is scanned from start
2049 to end. */
2050 avail_occr->insn = insn;
7506f491
DE
2051 else
2052 {
2053 /* First occurrence of this expression in this basic block. */
2054 avail_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2055 bytes_used += sizeof (struct occr);
c4c81601 2056
7506f491
DE
2057 /* First occurrence of this expression in any block? */
2058 if (cur_expr->avail_occr == NULL)
2059 cur_expr->avail_occr = avail_occr;
2060 else
2061 last_occr->next = avail_occr;
c4c81601 2062
7506f491
DE
2063 avail_occr->insn = insn;
2064 avail_occr->next = NULL;
2065 }
2066 }
2067}
2068
2069/* Insert pattern X in INSN in the hash table.
2070 X is a SET of a reg to either another reg or a constant.
2071 If it is already present, record it as the last occurrence in INSN's
2072 basic block. */
2073
2074static void
02280659 2075insert_set_in_table (x, insn, table)
7506f491
DE
2076 rtx x;
2077 rtx insn;
02280659 2078 struct hash_table *table;
7506f491
DE
2079{
2080 int found;
2081 unsigned int hash;
2082 struct expr *cur_expr, *last_expr = NULL;
2083 struct occr *cur_occr, *last_occr = NULL;
2084
2085 if (GET_CODE (x) != SET
2086 || GET_CODE (SET_DEST (x)) != REG)
2087 abort ();
2088
02280659 2089 hash = hash_set (REGNO (SET_DEST (x)), table->size);
7506f491 2090
02280659 2091 cur_expr = table->table[hash];
7506f491
DE
2092 found = 0;
2093
c4c81601 2094 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
7506f491
DE
2095 {
2096 /* If the expression isn't found, save a pointer to the end of
2097 the list. */
2098 last_expr = cur_expr;
2099 cur_expr = cur_expr->next_same_hash;
2100 }
2101
2102 if (! found)
2103 {
2104 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
2105 bytes_used += sizeof (struct expr);
02280659 2106 if (table->table[hash] == NULL)
c4c81601 2107 /* This is the first pattern that hashed to this index. */
02280659 2108 table->table[hash] = cur_expr;
7506f491 2109 else
c4c81601
RK
2110 /* Add EXPR to end of this hash chain. */
2111 last_expr->next_same_hash = cur_expr;
2112
7506f491
DE
2113 /* Set the fields of the expr element.
2114 We must copy X because it can be modified when copy propagation is
2115 performed on its operands. */
7506f491 2116 cur_expr->expr = copy_rtx (x);
02280659 2117 cur_expr->bitmap_index = table->n_elems++;
7506f491
DE
2118 cur_expr->next_same_hash = NULL;
2119 cur_expr->antic_occr = NULL;
2120 cur_expr->avail_occr = NULL;
2121 }
2122
2123 /* Now record the occurrence. */
7506f491
DE
2124 cur_occr = cur_expr->avail_occr;
2125
2126 /* Search for another occurrence in the same basic block. */
2127 while (cur_occr && BLOCK_NUM (cur_occr->insn) != BLOCK_NUM (insn))
2128 {
2129 /* If an occurrence isn't found, save a pointer to the end of
2130 the list. */
2131 last_occr = cur_occr;
2132 cur_occr = cur_occr->next;
2133 }
2134
2135 if (cur_occr)
c4c81601
RK
2136 /* Found another instance of the expression in the same basic block.
2137 Prefer this occurrence to the currently recorded one. We want the
2138 last one in the block and the block is scanned from start to end. */
2139 cur_occr->insn = insn;
7506f491
DE
2140 else
2141 {
2142 /* First occurrence of this expression in this basic block. */
2143 cur_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2144 bytes_used += sizeof (struct occr);
c4c81601 2145
7506f491
DE
2146 /* First occurrence of this expression in any block? */
2147 if (cur_expr->avail_occr == NULL)
2148 cur_expr->avail_occr = cur_occr;
2149 else
2150 last_occr->next = cur_occr;
c4c81601 2151
7506f491
DE
2152 cur_occr->insn = insn;
2153 cur_occr->next = NULL;
2154 }
2155}
2156
02280659
ZD
2157/* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
2158 expression one). */
7506f491
DE
2159
2160static void
02280659 2161hash_scan_set (pat, insn, table)
7506f491 2162 rtx pat, insn;
02280659 2163 struct hash_table *table;
7506f491
DE
2164{
2165 rtx src = SET_SRC (pat);
2166 rtx dest = SET_DEST (pat);
172890a2 2167 rtx note;
7506f491
DE
2168
2169 if (GET_CODE (src) == CALL)
02280659 2170 hash_scan_call (src, insn, table);
7506f491 2171
172890a2 2172 else if (GET_CODE (dest) == REG)
7506f491 2173 {
172890a2 2174 unsigned int regno = REGNO (dest);
7506f491
DE
2175 rtx tmp;
2176
172890a2
RK
2177 /* If this is a single set and we are doing constant propagation,
2178 see if a REG_NOTE shows this equivalent to a constant. */
02280659 2179 if (table->set_p && (note = find_reg_equal_equiv_note (insn)) != 0
172890a2
RK
2180 && CONSTANT_P (XEXP (note, 0)))
2181 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
2182
7506f491 2183 /* Only record sets of pseudo-regs in the hash table. */
02280659 2184 if (! table->set_p
7506f491
DE
2185 && regno >= FIRST_PSEUDO_REGISTER
2186 /* Don't GCSE something if we can't do a reg/reg copy. */
2187 && can_copy_p [GET_MODE (dest)]
068473ec
JH
2188 /* GCSE commonly inserts instruction after the insn. We can't
2189 do that easily for EH_REGION notes so disable GCSE on these
2190 for now. */
2191 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7506f491 2192 /* Is SET_SRC something we want to gcse? */
172890a2
RK
2193 && want_to_gcse_p (src)
2194 /* Don't CSE a nop. */
43e72072
JJ
2195 && ! set_noop_p (pat)
2196 /* Don't GCSE if it has attached REG_EQUIV note.
2197 At this point this only function parameters should have
2198 REG_EQUIV notes and if the argument slot is used somewhere
a1f300c0 2199 explicitly, it means address of parameter has been taken,
43e72072
JJ
2200 so we should not extend the lifetime of the pseudo. */
2201 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
2202 || GET_CODE (XEXP (note, 0)) != MEM))
7506f491
DE
2203 {
2204 /* An expression is not anticipatable if its operands are
52d76e11
RK
2205 modified before this insn or if this is not the only SET in
2206 this insn. */
2207 int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn);
7506f491 2208 /* An expression is not available if its operands are
eb296bd9
GK
2209 subsequently modified, including this insn. It's also not
2210 available if this is a branch, because we can't insert
2211 a set after the branch. */
2212 int avail_p = (oprs_available_p (src, insn)
2213 && ! JUMP_P (insn));
c4c81601 2214
02280659 2215 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
7506f491 2216 }
c4c81601 2217
7506f491 2218 /* Record sets for constant/copy propagation. */
02280659 2219 else if (table->set_p
7506f491
DE
2220 && regno >= FIRST_PSEUDO_REGISTER
2221 && ((GET_CODE (src) == REG
2222 && REGNO (src) >= FIRST_PSEUDO_REGISTER
172890a2
RK
2223 && can_copy_p [GET_MODE (dest)]
2224 && REGNO (src) != regno)
34ee7f82
RS
2225 || (CONSTANT_P (src)
2226 && GET_CODE (src) != CONSTANT_P_RTX))
7506f491
DE
2227 /* A copy is not available if its src or dest is subsequently
2228 modified. Here we want to search from INSN+1 on, but
2229 oprs_available_p searches from INSN on. */
2230 && (insn == BLOCK_END (BLOCK_NUM (insn))
2231 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
2232 && oprs_available_p (pat, tmp))))
02280659 2233 insert_set_in_table (pat, insn, table);
7506f491 2234 }
7506f491
DE
2235}
2236
2237static void
02280659 2238hash_scan_clobber (x, insn, table)
50b2596f 2239 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
02280659 2240 struct hash_table *table ATTRIBUTE_UNUSED;
7506f491
DE
2241{
2242 /* Currently nothing to do. */
2243}
2244
2245static void
02280659 2246hash_scan_call (x, insn, table)
50b2596f 2247 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
02280659 2248 struct hash_table *table ATTRIBUTE_UNUSED;
7506f491
DE
2249{
2250 /* Currently nothing to do. */
2251}
2252
2253/* Process INSN and add hash table entries as appropriate.
2254
2255 Only available expressions that set a single pseudo-reg are recorded.
2256
2257 Single sets in a PARALLEL could be handled, but it's an extra complication
2258 that isn't dealt with right now. The trick is handling the CLOBBERs that
2259 are also in the PARALLEL. Later.
2260
cc2902df 2261 If SET_P is nonzero, this is for the assignment hash table,
ed79bb3d
R
2262 otherwise it is for the expression hash table.
2263 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
2264 not record any expressions. */
7506f491
DE
2265
2266static void
02280659 2267hash_scan_insn (insn, table, in_libcall_block)
7506f491 2268 rtx insn;
02280659 2269 struct hash_table *table;
48e87cef 2270 int in_libcall_block;
7506f491
DE
2271{
2272 rtx pat = PATTERN (insn);
c4c81601 2273 int i;
7506f491 2274
172890a2
RK
2275 if (in_libcall_block)
2276 return;
2277
7506f491
DE
2278 /* Pick out the sets of INSN and for other forms of instructions record
2279 what's been modified. */
2280
172890a2 2281 if (GET_CODE (pat) == SET)
02280659 2282 hash_scan_set (pat, insn, table);
7506f491 2283 else if (GET_CODE (pat) == PARALLEL)
c4c81601
RK
2284 for (i = 0; i < XVECLEN (pat, 0); i++)
2285 {
2286 rtx x = XVECEXP (pat, 0, i);
7506f491 2287
c4c81601 2288 if (GET_CODE (x) == SET)
02280659 2289 hash_scan_set (x, insn, table);
c4c81601 2290 else if (GET_CODE (x) == CLOBBER)
02280659 2291 hash_scan_clobber (x, insn, table);
c4c81601 2292 else if (GET_CODE (x) == CALL)
02280659 2293 hash_scan_call (x, insn, table);
c4c81601 2294 }
7506f491 2295
7506f491 2296 else if (GET_CODE (pat) == CLOBBER)
02280659 2297 hash_scan_clobber (pat, insn, table);
7506f491 2298 else if (GET_CODE (pat) == CALL)
02280659 2299 hash_scan_call (pat, insn, table);
7506f491
DE
2300}
2301
2302static void
02280659 2303dump_hash_table (file, name, table)
7506f491 2304 FILE *file;
dff01034 2305 const char *name;
02280659 2306 struct hash_table *table;
7506f491
DE
2307{
2308 int i;
2309 /* Flattened out table, so it's printed in proper order. */
4da896b2
MM
2310 struct expr **flat_table;
2311 unsigned int *hash_val;
c4c81601 2312 struct expr *expr;
4da896b2 2313
589005ff 2314 flat_table
02280659
ZD
2315 = (struct expr **) xcalloc (table->n_elems, sizeof (struct expr *));
2316 hash_val = (unsigned int *) xmalloc (table->n_elems * sizeof (unsigned int));
7506f491 2317
02280659
ZD
2318 for (i = 0; i < (int) table->size; i++)
2319 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
2320 {
2321 flat_table[expr->bitmap_index] = expr;
2322 hash_val[expr->bitmap_index] = i;
2323 }
7506f491
DE
2324
2325 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
02280659 2326 name, table->size, table->n_elems);
7506f491 2327
02280659 2328 for (i = 0; i < (int) table->n_elems; i++)
21318741
RK
2329 if (flat_table[i] != 0)
2330 {
a0ac9e5a 2331 expr = flat_table[i];
21318741
RK
2332 fprintf (file, "Index %d (hash value %d)\n ",
2333 expr->bitmap_index, hash_val[i]);
a0ac9e5a 2334 print_rtl (file, expr->expr);
21318741
RK
2335 fprintf (file, "\n");
2336 }
7506f491
DE
2337
2338 fprintf (file, "\n");
4da896b2 2339
4da896b2
MM
2340 free (flat_table);
2341 free (hash_val);
7506f491
DE
2342}
2343
2344/* Record register first/last/block set information for REGNO in INSN.
c4c81601 2345
80c29cc4 2346 first_set records the first place in the block where the register
7506f491 2347 is set and is used to compute "anticipatability".
c4c81601 2348
80c29cc4 2349 last_set records the last place in the block where the register
7506f491 2350 is set and is used to compute "availability".
c4c81601 2351
80c29cc4
RZ
2352 last_bb records the block for which first_set and last_set are
2353 valid, as a quick test to invalidate them.
2354
7506f491
DE
2355 reg_set_in_block records whether the register is set in the block
2356 and is used to compute "transparency". */
2357
2358static void
2359record_last_reg_set_info (insn, regno)
2360 rtx insn;
2361 int regno;
2362{
80c29cc4
RZ
2363 struct reg_avail_info *info = &reg_avail_info[regno];
2364 int cuid = INSN_CUID (insn);
c4c81601 2365
80c29cc4
RZ
2366 info->last_set = cuid;
2367 if (info->last_bb != current_bb)
2368 {
2369 info->last_bb = current_bb;
2370 info->first_set = cuid;
e0082a72 2371 SET_BIT (reg_set_in_block[current_bb->index], regno);
80c29cc4 2372 }
7506f491
DE
2373}
2374
a13d4ebf
AM
2375
2376/* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
2377 Note we store a pair of elements in the list, so they have to be
2378 taken off pairwise. */
2379
589005ff 2380static void
a13d4ebf
AM
2381canon_list_insert (dest, unused1, v_insn)
2382 rtx dest ATTRIBUTE_UNUSED;
2383 rtx unused1 ATTRIBUTE_UNUSED;
2384 void * v_insn;
2385{
2386 rtx dest_addr, insn;
0fe854a7 2387 int bb;
a13d4ebf
AM
2388
2389 while (GET_CODE (dest) == SUBREG
2390 || GET_CODE (dest) == ZERO_EXTRACT
2391 || GET_CODE (dest) == SIGN_EXTRACT
2392 || GET_CODE (dest) == STRICT_LOW_PART)
2393 dest = XEXP (dest, 0);
2394
2395 /* If DEST is not a MEM, then it will not conflict with a load. Note
2396 that function calls are assumed to clobber memory, but are handled
2397 elsewhere. */
2398
2399 if (GET_CODE (dest) != MEM)
2400 return;
2401
2402 dest_addr = get_addr (XEXP (dest, 0));
2403 dest_addr = canon_rtx (dest_addr);
589005ff 2404 insn = (rtx) v_insn;
0fe854a7 2405 bb = BLOCK_NUM (insn);
a13d4ebf 2406
589005ff 2407 canon_modify_mem_list[bb] =
0fe854a7 2408 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
589005ff 2409 canon_modify_mem_list[bb] =
0fe854a7
RH
2410 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
2411 bitmap_set_bit (canon_modify_mem_list_set, bb);
a13d4ebf
AM
2412}
2413
a13d4ebf
AM
2414/* Record memory modification information for INSN. We do not actually care
2415 about the memory location(s) that are set, or even how they are set (consider
2416 a CALL_INSN). We merely need to record which insns modify memory. */
7506f491
DE
2417
2418static void
2419record_last_mem_set_info (insn)
2420 rtx insn;
2421{
0fe854a7
RH
2422 int bb = BLOCK_NUM (insn);
2423
ccef9ef5 2424 /* load_killed_in_block_p will handle the case of calls clobbering
dc297297 2425 everything. */
0fe854a7
RH
2426 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
2427 bitmap_set_bit (modify_mem_list_set, bb);
a13d4ebf
AM
2428
2429 if (GET_CODE (insn) == CALL_INSN)
2430 {
2431 /* Note that traversals of this loop (other than for free-ing)
2432 will break after encountering a CALL_INSN. So, there's no
dc297297 2433 need to insert a pair of items, as canon_list_insert does. */
589005ff
KH
2434 canon_modify_mem_list[bb] =
2435 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
0fe854a7 2436 bitmap_set_bit (canon_modify_mem_list_set, bb);
a13d4ebf
AM
2437 }
2438 else
0fe854a7 2439 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
7506f491
DE
2440}
2441
7506f491 2442/* Called from compute_hash_table via note_stores to handle one
84832317
MM
2443 SET or CLOBBER in an insn. DATA is really the instruction in which
2444 the SET is taking place. */
7506f491
DE
2445
2446static void
84832317 2447record_last_set_info (dest, setter, data)
50b2596f 2448 rtx dest, setter ATTRIBUTE_UNUSED;
84832317 2449 void *data;
7506f491 2450{
84832317
MM
2451 rtx last_set_insn = (rtx) data;
2452
7506f491
DE
2453 if (GET_CODE (dest) == SUBREG)
2454 dest = SUBREG_REG (dest);
2455
2456 if (GET_CODE (dest) == REG)
2457 record_last_reg_set_info (last_set_insn, REGNO (dest));
2458 else if (GET_CODE (dest) == MEM
2459 /* Ignore pushes, they clobber nothing. */
2460 && ! push_operand (dest, GET_MODE (dest)))
2461 record_last_mem_set_info (last_set_insn);
2462}
2463
2464/* Top level function to create an expression or assignment hash table.
2465
2466 Expression entries are placed in the hash table if
2467 - they are of the form (set (pseudo-reg) src),
2468 - src is something we want to perform GCSE on,
2469 - none of the operands are subsequently modified in the block
2470
2471 Assignment entries are placed in the hash table if
2472 - they are of the form (set (pseudo-reg) src),
2473 - src is something we want to perform const/copy propagation on,
2474 - none of the operands or target are subsequently modified in the block
c4c81601 2475
7506f491
DE
2476 Currently src must be a pseudo-reg or a const_int.
2477
02280659 2478 TABLE is the table computed. */
7506f491
DE
2479
2480static void
02280659
ZD
2481compute_hash_table_work (table)
2482 struct hash_table *table;
7506f491 2483{
80c29cc4 2484 unsigned int i;
7506f491
DE
2485
2486 /* While we compute the hash table we also compute a bit array of which
2487 registers are set in which blocks.
7506f491
DE
2488 ??? This isn't needed during const/copy propagation, but it's cheap to
2489 compute. Later. */
d55bc081 2490 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
7506f491 2491
a13d4ebf 2492 /* re-Cache any INSN_LIST nodes we have allocated. */
73991d6a 2493 clear_modify_mem_tables ();
7506f491 2494 /* Some working arrays used to track first and last set in each block. */
80c29cc4
RZ
2495 reg_avail_info = (struct reg_avail_info*)
2496 gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
2497
2498 for (i = 0; i < max_gcse_regno; ++i)
e0082a72 2499 reg_avail_info[i].last_bb = NULL;
7506f491 2500
e0082a72 2501 FOR_EACH_BB (current_bb)
7506f491
DE
2502 {
2503 rtx insn;
770ae6cc 2504 unsigned int regno;
ed79bb3d 2505 int in_libcall_block;
7506f491
DE
2506
2507 /* First pass over the instructions records information used to
2508 determine when registers and memory are first and last set.
ccef9ef5 2509 ??? hard-reg reg_set_in_block computation
7506f491
DE
2510 could be moved to compute_sets since they currently don't change. */
2511
e0082a72
ZD
2512 for (insn = current_bb->head;
2513 insn && insn != NEXT_INSN (current_bb->end);
7506f491
DE
2514 insn = NEXT_INSN (insn))
2515 {
2c3c49de 2516 if (! INSN_P (insn))
7506f491
DE
2517 continue;
2518
2519 if (GET_CODE (insn) == CALL_INSN)
2520 {
19652adf 2521 bool clobbers_all = false;
589005ff 2522#ifdef NON_SAVING_SETJMP
19652adf
ZW
2523 if (NON_SAVING_SETJMP
2524 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
2525 clobbers_all = true;
2526#endif
2527
7506f491 2528 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
19652adf
ZW
2529 if (clobbers_all
2530 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
7506f491 2531 record_last_reg_set_info (insn, regno);
c4c81601 2532
24a28584 2533 mark_call (insn);
7506f491
DE
2534 }
2535
84832317 2536 note_stores (PATTERN (insn), record_last_set_info, insn);
7506f491
DE
2537 }
2538
fbef91d8
RS
2539 /* Insert implicit sets in the hash table. */
2540 if (table->set_p
2541 && implicit_sets[current_bb->index] != NULL_RTX)
2542 hash_scan_set (implicit_sets[current_bb->index],
2543 current_bb->head, table);
2544
7506f491
DE
2545 /* The next pass builds the hash table. */
2546
e0082a72
ZD
2547 for (insn = current_bb->head, in_libcall_block = 0;
2548 insn && insn != NEXT_INSN (current_bb->end);
7506f491 2549 insn = NEXT_INSN (insn))
2c3c49de 2550 if (INSN_P (insn))
c4c81601
RK
2551 {
2552 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
589005ff 2553 in_libcall_block = 1;
02280659 2554 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
589005ff 2555 in_libcall_block = 0;
02280659
ZD
2556 hash_scan_insn (insn, table, in_libcall_block);
2557 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
589005ff 2558 in_libcall_block = 0;
8e42ace1 2559 }
7506f491
DE
2560 }
2561
80c29cc4
RZ
2562 free (reg_avail_info);
2563 reg_avail_info = NULL;
7506f491
DE
2564}
2565
02280659 2566/* Allocate space for the set/expr hash TABLE.
7506f491 2567 N_INSNS is the number of instructions in the function.
02280659
ZD
2568 It is used to determine the number of buckets to use.
2569 SET_P determines whether set or expression table will
2570 be created. */
7506f491
DE
2571
2572static void
02280659 2573alloc_hash_table (n_insns, table, set_p)
7506f491 2574 int n_insns;
02280659
ZD
2575 struct hash_table *table;
2576 int set_p;
7506f491
DE
2577{
2578 int n;
2579
02280659
ZD
2580 table->size = n_insns / 4;
2581 if (table->size < 11)
2582 table->size = 11;
c4c81601 2583
7506f491
DE
2584 /* Attempt to maintain efficient use of hash table.
2585 Making it an odd number is simplest for now.
2586 ??? Later take some measurements. */
02280659
ZD
2587 table->size |= 1;
2588 n = table->size * sizeof (struct expr *);
2589 table->table = (struct expr **) gmalloc (n);
2590 table->set_p = set_p;
7506f491
DE
2591}
2592
02280659 2593/* Free things allocated by alloc_hash_table. */
7506f491
DE
2594
2595static void
02280659
ZD
2596free_hash_table (table)
2597 struct hash_table *table;
7506f491 2598{
02280659 2599 free (table->table);
7506f491
DE
2600}
2601
02280659
ZD
2602/* Compute the hash TABLE for doing copy/const propagation or
2603 expression hash table. */
7506f491
DE
2604
2605static void
02280659
ZD
2606compute_hash_table (table)
2607 struct hash_table *table;
7506f491
DE
2608{
2609 /* Initialize count of number of entries in hash table. */
02280659
ZD
2610 table->n_elems = 0;
2611 memset ((char *) table->table, 0,
2612 table->size * sizeof (struct expr *));
7506f491 2613
02280659 2614 compute_hash_table_work (table);
7506f491
DE
2615}
2616\f
2617/* Expression tracking support. */
2618
02280659 2619/* Lookup pattern PAT in the expression TABLE.
7506f491
DE
2620 The result is a pointer to the table entry, or NULL if not found. */
2621
2622static struct expr *
02280659 2623lookup_expr (pat, table)
7506f491 2624 rtx pat;
02280659 2625 struct hash_table *table;
7506f491
DE
2626{
2627 int do_not_record_p;
2628 unsigned int hash = hash_expr (pat, GET_MODE (pat), &do_not_record_p,
02280659 2629 table->size);
7506f491
DE
2630 struct expr *expr;
2631
2632 if (do_not_record_p)
2633 return NULL;
2634
02280659 2635 expr = table->table[hash];
7506f491
DE
2636
2637 while (expr && ! expr_equiv_p (expr->expr, pat))
2638 expr = expr->next_same_hash;
2639
2640 return expr;
2641}
2642
02280659 2643/* Lookup REGNO in the set TABLE. If PAT is non-NULL look for the entry that
c4c81601
RK
2644 matches it, otherwise return the first entry for REGNO. The result is a
2645 pointer to the table entry, or NULL if not found. */
7506f491
DE
2646
2647static struct expr *
02280659 2648lookup_set (regno, pat, table)
770ae6cc 2649 unsigned int regno;
7506f491 2650 rtx pat;
02280659 2651 struct hash_table *table;
7506f491 2652{
02280659 2653 unsigned int hash = hash_set (regno, table->size);
7506f491
DE
2654 struct expr *expr;
2655
02280659 2656 expr = table->table[hash];
7506f491
DE
2657
2658 if (pat)
2659 {
2660 while (expr && ! expr_equiv_p (expr->expr, pat))
2661 expr = expr->next_same_hash;
2662 }
2663 else
2664 {
2665 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2666 expr = expr->next_same_hash;
2667 }
2668
2669 return expr;
2670}
2671
2672/* Return the next entry for REGNO in list EXPR. */
2673
2674static struct expr *
2675next_set (regno, expr)
770ae6cc 2676 unsigned int regno;
7506f491
DE
2677 struct expr *expr;
2678{
2679 do
2680 expr = expr->next_same_hash;
2681 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
c4c81601 2682
7506f491
DE
2683 return expr;
2684}
2685
0fe854a7
RH
2686/* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2687 types may be mixed. */
2688
2689static void
2690free_insn_expr_list_list (listp)
2691 rtx *listp;
2692{
2693 rtx list, next;
2694
2695 for (list = *listp; list ; list = next)
2696 {
2697 next = XEXP (list, 1);
2698 if (GET_CODE (list) == EXPR_LIST)
2699 free_EXPR_LIST_node (list);
2700 else
2701 free_INSN_LIST_node (list);
2702 }
2703
2704 *listp = NULL;
2705}
2706
73991d6a
JH
2707/* Clear canon_modify_mem_list and modify_mem_list tables. */
2708static void
2709clear_modify_mem_tables ()
2710{
2711 int i;
2712
2713 EXECUTE_IF_SET_IN_BITMAP
0fe854a7
RH
2714 (modify_mem_list_set, 0, i, free_INSN_LIST_list (modify_mem_list + i));
2715 bitmap_clear (modify_mem_list_set);
73991d6a
JH
2716
2717 EXECUTE_IF_SET_IN_BITMAP
2718 (canon_modify_mem_list_set, 0, i,
0fe854a7
RH
2719 free_insn_expr_list_list (canon_modify_mem_list + i));
2720 bitmap_clear (canon_modify_mem_list_set);
73991d6a
JH
2721}
2722
2723/* Release memory used by modify_mem_list_set and canon_modify_mem_list_set. */
2724
2725static void
2726free_modify_mem_tables ()
2727{
2728 clear_modify_mem_tables ();
2729 free (modify_mem_list);
2730 free (canon_modify_mem_list);
2731 modify_mem_list = 0;
2732 canon_modify_mem_list = 0;
2733}
2734
7506f491
DE
2735/* Reset tables used to keep track of what's still available [since the
2736 start of the block]. */
2737
2738static void
2739reset_opr_set_tables ()
2740{
2741 /* Maintain a bitmap of which regs have been set since beginning of
2742 the block. */
73991d6a 2743 CLEAR_REG_SET (reg_set_bitmap);
c4c81601 2744
7506f491
DE
2745 /* Also keep a record of the last instruction to modify memory.
2746 For now this is very trivial, we only record whether any memory
2747 location has been modified. */
73991d6a 2748 clear_modify_mem_tables ();
7506f491
DE
2749}
2750
cc2902df 2751/* Return nonzero if the operands of X are not set before INSN in
7506f491
DE
2752 INSN's basic block. */
2753
2754static int
2755oprs_not_set_p (x, insn)
2756 rtx x, insn;
2757{
c4c81601 2758 int i, j;
7506f491 2759 enum rtx_code code;
6f7d635c 2760 const char *fmt;
7506f491 2761
7506f491
DE
2762 if (x == 0)
2763 return 1;
2764
2765 code = GET_CODE (x);
2766 switch (code)
2767 {
2768 case PC:
2769 case CC0:
2770 case CONST:
2771 case CONST_INT:
2772 case CONST_DOUBLE:
69ef87e2 2773 case CONST_VECTOR:
7506f491
DE
2774 case SYMBOL_REF:
2775 case LABEL_REF:
2776 case ADDR_VEC:
2777 case ADDR_DIFF_VEC:
2778 return 1;
2779
2780 case MEM:
589005ff 2781 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
e2d2ed72 2782 INSN_CUID (insn), x, 0))
a13d4ebf 2783 return 0;
c4c81601
RK
2784 else
2785 return oprs_not_set_p (XEXP (x, 0), insn);
7506f491
DE
2786
2787 case REG:
73991d6a 2788 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
7506f491
DE
2789
2790 default:
2791 break;
2792 }
2793
c4c81601 2794 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
2795 {
2796 if (fmt[i] == 'e')
2797 {
7506f491
DE
2798 /* If we are about to do the last recursive call
2799 needed at this level, change it into iteration.
2800 This function is called enough to be worth it. */
2801 if (i == 0)
c4c81601
RK
2802 return oprs_not_set_p (XEXP (x, i), insn);
2803
2804 if (! oprs_not_set_p (XEXP (x, i), insn))
7506f491
DE
2805 return 0;
2806 }
2807 else if (fmt[i] == 'E')
c4c81601
RK
2808 for (j = 0; j < XVECLEN (x, i); j++)
2809 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2810 return 0;
7506f491
DE
2811 }
2812
2813 return 1;
2814}
2815
2816/* Mark things set by a CALL. */
2817
2818static void
b5ce41ff
JL
2819mark_call (insn)
2820 rtx insn;
7506f491 2821{
24a28584 2822 if (! CONST_OR_PURE_CALL_P (insn))
a13d4ebf 2823 record_last_mem_set_info (insn);
7506f491
DE
2824}
2825
2826/* Mark things set by a SET. */
2827
2828static void
2829mark_set (pat, insn)
2830 rtx pat, insn;
2831{
2832 rtx dest = SET_DEST (pat);
2833
2834 while (GET_CODE (dest) == SUBREG
2835 || GET_CODE (dest) == ZERO_EXTRACT
2836 || GET_CODE (dest) == SIGN_EXTRACT
2837 || GET_CODE (dest) == STRICT_LOW_PART)
2838 dest = XEXP (dest, 0);
2839
a13d4ebf 2840 if (GET_CODE (dest) == REG)
73991d6a 2841 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
a13d4ebf
AM
2842 else if (GET_CODE (dest) == MEM)
2843 record_last_mem_set_info (insn);
2844
7506f491 2845 if (GET_CODE (SET_SRC (pat)) == CALL)
b5ce41ff 2846 mark_call (insn);
7506f491
DE
2847}
2848
2849/* Record things set by a CLOBBER. */
2850
2851static void
2852mark_clobber (pat, insn)
2853 rtx pat, insn;
2854{
2855 rtx clob = XEXP (pat, 0);
2856
2857 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2858 clob = XEXP (clob, 0);
2859
a13d4ebf 2860 if (GET_CODE (clob) == REG)
73991d6a 2861 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
a13d4ebf
AM
2862 else
2863 record_last_mem_set_info (insn);
7506f491
DE
2864}
2865
2866/* Record things set by INSN.
2867 This data is used by oprs_not_set_p. */
2868
2869static void
2870mark_oprs_set (insn)
2871 rtx insn;
2872{
2873 rtx pat = PATTERN (insn);
c4c81601 2874 int i;
7506f491
DE
2875
2876 if (GET_CODE (pat) == SET)
2877 mark_set (pat, insn);
2878 else if (GET_CODE (pat) == PARALLEL)
c4c81601
RK
2879 for (i = 0; i < XVECLEN (pat, 0); i++)
2880 {
2881 rtx x = XVECEXP (pat, 0, i);
2882
2883 if (GET_CODE (x) == SET)
2884 mark_set (x, insn);
2885 else if (GET_CODE (x) == CLOBBER)
2886 mark_clobber (x, insn);
2887 else if (GET_CODE (x) == CALL)
2888 mark_call (insn);
2889 }
7506f491 2890
7506f491
DE
2891 else if (GET_CODE (pat) == CLOBBER)
2892 mark_clobber (pat, insn);
2893 else if (GET_CODE (pat) == CALL)
b5ce41ff 2894 mark_call (insn);
7506f491 2895}
b5ce41ff 2896
7506f491
DE
2897\f
2898/* Classic GCSE reaching definition support. */
2899
2900/* Allocate reaching def variables. */
2901
2902static void
2903alloc_rd_mem (n_blocks, n_insns)
2904 int n_blocks, n_insns;
2905{
2906 rd_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2907 sbitmap_vector_zero (rd_kill, n_blocks);
7506f491
DE
2908
2909 rd_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2910 sbitmap_vector_zero (rd_gen, n_blocks);
7506f491
DE
2911
2912 reaching_defs = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2913 sbitmap_vector_zero (reaching_defs, n_blocks);
7506f491
DE
2914
2915 rd_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2916 sbitmap_vector_zero (rd_out, n_blocks);
7506f491
DE
2917}
2918
2919/* Free reaching def variables. */
2920
2921static void
2922free_rd_mem ()
2923{
5a660bff
DB
2924 sbitmap_vector_free (rd_kill);
2925 sbitmap_vector_free (rd_gen);
2926 sbitmap_vector_free (reaching_defs);
2927 sbitmap_vector_free (rd_out);
7506f491
DE
2928}
2929
c4c81601 2930/* Add INSN to the kills of BB. REGNO, set in BB, is killed by INSN. */
7506f491
DE
2931
2932static void
2933handle_rd_kill_set (insn, regno, bb)
2934 rtx insn;
e2d2ed72
AM
2935 int regno;
2936 basic_block bb;
7506f491 2937{
c4c81601 2938 struct reg_set *this_reg;
7506f491 2939
c4c81601
RK
2940 for (this_reg = reg_set_table[regno]; this_reg; this_reg = this_reg ->next)
2941 if (BLOCK_NUM (this_reg->insn) != BLOCK_NUM (insn))
0b17ab2f 2942 SET_BIT (rd_kill[bb->index], INSN_CUID (this_reg->insn));
7506f491
DE
2943}
2944
7506f491
DE
2945/* Compute the set of kill's for reaching definitions. */
2946
2947static void
2948compute_kill_rd ()
2949{
e0082a72 2950 int cuid;
172890a2
RK
2951 unsigned int regno;
2952 int i;
e0082a72 2953 basic_block bb;
7506f491
DE
2954
2955 /* For each block
2956 For each set bit in `gen' of the block (i.e each insn which
ac7c5af5
JL
2957 generates a definition in the block)
2958 Call the reg set by the insn corresponding to that bit regx
2959 Look at the linked list starting at reg_set_table[regx]
2960 For each setting of regx in the linked list, which is not in
2961 this block
6d2f8887 2962 Set the bit in `kill' corresponding to that insn. */
e0082a72 2963 FOR_EACH_BB (bb)
c4c81601 2964 for (cuid = 0; cuid < max_cuid; cuid++)
e0082a72 2965 if (TEST_BIT (rd_gen[bb->index], cuid))
7506f491 2966 {
c4c81601
RK
2967 rtx insn = CUID_INSN (cuid);
2968 rtx pat = PATTERN (insn);
7506f491 2969
c4c81601
RK
2970 if (GET_CODE (insn) == CALL_INSN)
2971 {
2972 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4e2db584 2973 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
e0082a72 2974 handle_rd_kill_set (insn, regno, bb);
c4c81601 2975 }
7506f491 2976
c4c81601
RK
2977 if (GET_CODE (pat) == PARALLEL)
2978 {
2979 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7506f491 2980 {
c4c81601 2981 enum rtx_code code = GET_CODE (XVECEXP (pat, 0, i));
7506f491 2982
c4c81601
RK
2983 if ((code == SET || code == CLOBBER)
2984 && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == REG)
2985 handle_rd_kill_set (insn,
2986 REGNO (XEXP (XVECEXP (pat, 0, i), 0)),
e0082a72 2987 bb);
ac7c5af5 2988 }
ac7c5af5 2989 }
c4c81601
RK
2990 else if (GET_CODE (pat) == SET && GET_CODE (SET_DEST (pat)) == REG)
2991 /* Each setting of this register outside of this block
2992 must be marked in the set of kills in this block. */
e0082a72 2993 handle_rd_kill_set (insn, REGNO (SET_DEST (pat)), bb);
7506f491 2994 }
7506f491
DE
2995}
2996
589005ff 2997/* Compute the reaching definitions as in
7506f491
DE
2998 Compilers Principles, Techniques, and Tools. Aho, Sethi, Ullman,
2999 Chapter 10. It is the same algorithm as used for computing available
3000 expressions but applied to the gens and kills of reaching definitions. */
3001
3002static void
3003compute_rd ()
3004{
e0082a72
ZD
3005 int changed, passes;
3006 basic_block bb;
7506f491 3007
e0082a72
ZD
3008 FOR_EACH_BB (bb)
3009 sbitmap_copy (rd_out[bb->index] /*dst*/, rd_gen[bb->index] /*src*/);
7506f491
DE
3010
3011 passes = 0;
3012 changed = 1;
3013 while (changed)
3014 {
3015 changed = 0;
e0082a72 3016 FOR_EACH_BB (bb)
ac7c5af5 3017 {
e0082a72
ZD
3018 sbitmap_union_of_preds (reaching_defs[bb->index], rd_out, bb->index);
3019 changed |= sbitmap_union_of_diff_cg (rd_out[bb->index], rd_gen[bb->index],
3020 reaching_defs[bb->index], rd_kill[bb->index]);
ac7c5af5 3021 }
7506f491
DE
3022 passes++;
3023 }
3024
3025 if (gcse_file)
3026 fprintf (gcse_file, "reaching def computation: %d passes\n", passes);
3027}
3028\f
3029/* Classic GCSE available expression support. */
3030
3031/* Allocate memory for available expression computation. */
3032
3033static void
3034alloc_avail_expr_mem (n_blocks, n_exprs)
3035 int n_blocks, n_exprs;
3036{
3037 ae_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3038 sbitmap_vector_zero (ae_kill, n_blocks);
7506f491
DE
3039
3040 ae_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3041 sbitmap_vector_zero (ae_gen, n_blocks);
7506f491
DE
3042
3043 ae_in = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3044 sbitmap_vector_zero (ae_in, n_blocks);
7506f491
DE
3045
3046 ae_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3047 sbitmap_vector_zero (ae_out, n_blocks);
7506f491
DE
3048}
3049
3050static void
3051free_avail_expr_mem ()
3052{
5a660bff
DB
3053 sbitmap_vector_free (ae_kill);
3054 sbitmap_vector_free (ae_gen);
3055 sbitmap_vector_free (ae_in);
3056 sbitmap_vector_free (ae_out);
7506f491
DE
3057}
3058
3059/* Compute the set of available expressions generated in each basic block. */
3060
3061static void
02280659
ZD
3062compute_ae_gen (expr_hash_table)
3063 struct hash_table *expr_hash_table;
7506f491 3064{
2e653e39 3065 unsigned int i;
c4c81601
RK
3066 struct expr *expr;
3067 struct occr *occr;
7506f491
DE
3068
3069 /* For each recorded occurrence of each expression, set ae_gen[bb][expr].
3070 This is all we have to do because an expression is not recorded if it
3071 is not available, and the only expressions we want to work with are the
3072 ones that are recorded. */
02280659
ZD
3073 for (i = 0; i < expr_hash_table->size; i++)
3074 for (expr = expr_hash_table->table[i]; expr != 0; expr = expr->next_same_hash)
c4c81601
RK
3075 for (occr = expr->avail_occr; occr != 0; occr = occr->next)
3076 SET_BIT (ae_gen[BLOCK_NUM (occr->insn)], expr->bitmap_index);
7506f491
DE
3077}
3078
cc2902df 3079/* Return nonzero if expression X is killed in BB. */
7506f491
DE
3080
3081static int
3082expr_killed_p (x, bb)
3083 rtx x;
e2d2ed72 3084 basic_block bb;
7506f491 3085{
c4c81601 3086 int i, j;
7506f491 3087 enum rtx_code code;
6f7d635c 3088 const char *fmt;
7506f491 3089
7506f491
DE
3090 if (x == 0)
3091 return 1;
3092
3093 code = GET_CODE (x);
3094 switch (code)
3095 {
3096 case REG:
0b17ab2f 3097 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
7506f491
DE
3098
3099 case MEM:
a13d4ebf
AM
3100 if (load_killed_in_block_p (bb, get_max_uid () + 1, x, 0))
3101 return 1;
c4c81601
RK
3102 else
3103 return expr_killed_p (XEXP (x, 0), bb);
7506f491
DE
3104
3105 case PC:
3106 case CC0: /*FIXME*/
3107 case CONST:
3108 case CONST_INT:
3109 case CONST_DOUBLE:
69ef87e2 3110 case CONST_VECTOR:
7506f491
DE
3111 case SYMBOL_REF:
3112 case LABEL_REF:
3113 case ADDR_VEC:
3114 case ADDR_DIFF_VEC:
3115 return 0;
3116
3117 default:
3118 break;
3119 }
3120
c4c81601 3121 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3122 {
3123 if (fmt[i] == 'e')
3124 {
7506f491
DE
3125 /* If we are about to do the last recursive call
3126 needed at this level, change it into iteration.
3127 This function is called enough to be worth it. */
3128 if (i == 0)
c4c81601
RK
3129 return expr_killed_p (XEXP (x, i), bb);
3130 else if (expr_killed_p (XEXP (x, i), bb))
7506f491
DE
3131 return 1;
3132 }
3133 else if (fmt[i] == 'E')
c4c81601
RK
3134 for (j = 0; j < XVECLEN (x, i); j++)
3135 if (expr_killed_p (XVECEXP (x, i, j), bb))
3136 return 1;
7506f491
DE
3137 }
3138
3139 return 0;
3140}
3141
3142/* Compute the set of available expressions killed in each basic block. */
3143
3144static void
02280659 3145compute_ae_kill (ae_gen, ae_kill, expr_hash_table)
a42cd965 3146 sbitmap *ae_gen, *ae_kill;
02280659 3147 struct hash_table *expr_hash_table;
7506f491 3148{
e0082a72 3149 basic_block bb;
2e653e39 3150 unsigned int i;
c4c81601 3151 struct expr *expr;
7506f491 3152
e0082a72 3153 FOR_EACH_BB (bb)
02280659
ZD
3154 for (i = 0; i < expr_hash_table->size; i++)
3155 for (expr = expr_hash_table->table[i]; expr; expr = expr->next_same_hash)
7506f491 3156 {
c4c81601 3157 /* Skip EXPR if generated in this block. */
e0082a72 3158 if (TEST_BIT (ae_gen[bb->index], expr->bitmap_index))
c4c81601 3159 continue;
7506f491 3160
e0082a72
ZD
3161 if (expr_killed_p (expr->expr, bb))
3162 SET_BIT (ae_kill[bb->index], expr->bitmap_index);
7506f491 3163 }
7506f491 3164}
7506f491
DE
3165\f
3166/* Actually perform the Classic GCSE optimizations. */
3167
cc2902df 3168/* Return nonzero if occurrence OCCR of expression EXPR reaches block BB.
7506f491 3169
cc2902df 3170 CHECK_SELF_LOOP is nonzero if we should consider a block reaching itself
7506f491
DE
3171 as a positive reach. We want to do this when there are two computations
3172 of the expression in the block.
3173
3174 VISITED is a pointer to a working buffer for tracking which BB's have
3175 been visited. It is NULL for the top-level call.
3176
3177 We treat reaching expressions that go through blocks containing the same
3178 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3179 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3180 2 as not reaching. The intent is to improve the probability of finding
3181 only one reaching expression and to reduce register lifetimes by picking
3182 the closest such expression. */
3183
3184static int
283a2545 3185expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited)
7506f491
DE
3186 struct occr *occr;
3187 struct expr *expr;
e2d2ed72 3188 basic_block bb;
7506f491
DE
3189 int check_self_loop;
3190 char *visited;
3191{
36349f8b 3192 edge pred;
7506f491 3193
e2d2ed72 3194 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7506f491 3195 {
e2d2ed72 3196 basic_block pred_bb = pred->src;
7506f491 3197
0b17ab2f 3198 if (visited[pred_bb->index])
c4c81601 3199 /* This predecessor has already been visited. Nothing to do. */
7506f491 3200 ;
7506f491 3201 else if (pred_bb == bb)
ac7c5af5 3202 {
7506f491
DE
3203 /* BB loops on itself. */
3204 if (check_self_loop
0b17ab2f
RH
3205 && TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index)
3206 && BLOCK_NUM (occr->insn) == pred_bb->index)
7506f491 3207 return 1;
c4c81601 3208
0b17ab2f 3209 visited[pred_bb->index] = 1;
ac7c5af5 3210 }
c4c81601 3211
7506f491 3212 /* Ignore this predecessor if it kills the expression. */
0b17ab2f
RH
3213 else if (TEST_BIT (ae_kill[pred_bb->index], expr->bitmap_index))
3214 visited[pred_bb->index] = 1;
c4c81601 3215
7506f491 3216 /* Does this predecessor generate this expression? */
0b17ab2f 3217 else if (TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index))
7506f491
DE
3218 {
3219 /* Is this the occurrence we're looking for?
3220 Note that there's only one generating occurrence per block
3221 so we just need to check the block number. */
0b17ab2f 3222 if (BLOCK_NUM (occr->insn) == pred_bb->index)
7506f491 3223 return 1;
c4c81601 3224
0b17ab2f 3225 visited[pred_bb->index] = 1;
7506f491 3226 }
c4c81601 3227
7506f491
DE
3228 /* Neither gen nor kill. */
3229 else
ac7c5af5 3230 {
0b17ab2f 3231 visited[pred_bb->index] = 1;
589005ff 3232 if (expr_reaches_here_p_work (occr, expr, pred_bb, check_self_loop,
283a2545 3233 visited))
c4c81601 3234
7506f491 3235 return 1;
ac7c5af5 3236 }
7506f491
DE
3237 }
3238
3239 /* All paths have been checked. */
3240 return 0;
3241}
3242
283a2545 3243/* This wrapper for expr_reaches_here_p_work() is to ensure that any
dc297297 3244 memory allocated for that function is returned. */
283a2545
RL
3245
3246static int
3247expr_reaches_here_p (occr, expr, bb, check_self_loop)
3248 struct occr *occr;
3249 struct expr *expr;
e2d2ed72 3250 basic_block bb;
283a2545
RL
3251 int check_self_loop;
3252{
3253 int rval;
d55bc081 3254 char *visited = (char *) xcalloc (last_basic_block, 1);
283a2545 3255
c4c81601 3256 rval = expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited);
589005ff 3257
283a2545 3258 free (visited);
c4c81601 3259 return rval;
283a2545
RL
3260}
3261
7506f491
DE
3262/* Return the instruction that computes EXPR that reaches INSN's basic block.
3263 If there is more than one such instruction, return NULL.
3264
3265 Called only by handle_avail_expr. */
3266
3267static rtx
3268computing_insn (expr, insn)
3269 struct expr *expr;
3270 rtx insn;
3271{
e2d2ed72 3272 basic_block bb = BLOCK_FOR_INSN (insn);
7506f491
DE
3273
3274 if (expr->avail_occr->next == NULL)
589005ff 3275 {
e2d2ed72 3276 if (BLOCK_FOR_INSN (expr->avail_occr->insn) == bb)
c4c81601
RK
3277 /* The available expression is actually itself
3278 (i.e. a loop in the flow graph) so do nothing. */
3279 return NULL;
3280
7506f491
DE
3281 /* (FIXME) Case that we found a pattern that was created by
3282 a substitution that took place. */
3283 return expr->avail_occr->insn;
3284 }
3285 else
3286 {
3287 /* Pattern is computed more than once.
589005ff 3288 Search backwards from this insn to see how many of these
7506f491
DE
3289 computations actually reach this insn. */
3290 struct occr *occr;
3291 rtx insn_computes_expr = NULL;
3292 int can_reach = 0;
3293
3294 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
3295 {
e2d2ed72 3296 if (BLOCK_FOR_INSN (occr->insn) == bb)
7506f491
DE
3297 {
3298 /* The expression is generated in this block.
3299 The only time we care about this is when the expression
3300 is generated later in the block [and thus there's a loop].
3301 We let the normal cse pass handle the other cases. */
c4c81601
RK
3302 if (INSN_CUID (insn) < INSN_CUID (occr->insn)
3303 && expr_reaches_here_p (occr, expr, bb, 1))
7506f491
DE
3304 {
3305 can_reach++;
3306 if (can_reach > 1)
3307 return NULL;
c4c81601 3308
7506f491
DE
3309 insn_computes_expr = occr->insn;
3310 }
3311 }
c4c81601
RK
3312 else if (expr_reaches_here_p (occr, expr, bb, 0))
3313 {
3314 can_reach++;
3315 if (can_reach > 1)
3316 return NULL;
3317
3318 insn_computes_expr = occr->insn;
3319 }
7506f491
DE
3320 }
3321
3322 if (insn_computes_expr == NULL)
3323 abort ();
c4c81601 3324
7506f491
DE
3325 return insn_computes_expr;
3326 }
3327}
3328
cc2902df 3329/* Return nonzero if the definition in DEF_INSN can reach INSN.
7506f491
DE
3330 Only called by can_disregard_other_sets. */
3331
3332static int
3333def_reaches_here_p (insn, def_insn)
3334 rtx insn, def_insn;
3335{
3336 rtx reg;
3337
3338 if (TEST_BIT (reaching_defs[BLOCK_NUM (insn)], INSN_CUID (def_insn)))
3339 return 1;
3340
3341 if (BLOCK_NUM (insn) == BLOCK_NUM (def_insn))
3342 {
3343 if (INSN_CUID (def_insn) < INSN_CUID (insn))
ac7c5af5 3344 {
7506f491
DE
3345 if (GET_CODE (PATTERN (def_insn)) == PARALLEL)
3346 return 1;
c4c81601 3347 else if (GET_CODE (PATTERN (def_insn)) == CLOBBER)
7506f491
DE
3348 reg = XEXP (PATTERN (def_insn), 0);
3349 else if (GET_CODE (PATTERN (def_insn)) == SET)
3350 reg = SET_DEST (PATTERN (def_insn));
3351 else
3352 abort ();
c4c81601 3353
7506f491
DE
3354 return ! reg_set_between_p (reg, NEXT_INSN (def_insn), insn);
3355 }
3356 else
3357 return 0;
3358 }
3359
3360 return 0;
3361}
3362
cc2902df 3363/* Return nonzero if *ADDR_THIS_REG can only have one value at INSN. The
c4c81601
RK
3364 value returned is the number of definitions that reach INSN. Returning a
3365 value of zero means that [maybe] more than one definition reaches INSN and
3366 the caller can't perform whatever optimization it is trying. i.e. it is
3367 always safe to return zero. */
7506f491
DE
3368
3369static int
3370can_disregard_other_sets (addr_this_reg, insn, for_combine)
3371 struct reg_set **addr_this_reg;
3372 rtx insn;
3373 int for_combine;
3374{
3375 int number_of_reaching_defs = 0;
c4c81601 3376 struct reg_set *this_reg;
7506f491 3377
c4c81601
RK
3378 for (this_reg = *addr_this_reg; this_reg != 0; this_reg = this_reg->next)
3379 if (def_reaches_here_p (insn, this_reg->insn))
3380 {
3381 number_of_reaching_defs++;
3382 /* Ignore parallels for now. */
3383 if (GET_CODE (PATTERN (this_reg->insn)) == PARALLEL)
3384 return 0;
3385
3386 if (!for_combine
3387 && (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER
3388 || ! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3389 SET_SRC (PATTERN (insn)))))
3390 /* A setting of the reg to a different value reaches INSN. */
3391 return 0;
3392
3393 if (number_of_reaching_defs > 1)
3394 {
3395 /* If in this setting the value the register is being set to is
3396 equal to the previous value the register was set to and this
3397 setting reaches the insn we are trying to do the substitution
3398 on then we are ok. */
3399 if (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER)
7506f491 3400 return 0;
c4c81601
RK
3401 else if (! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3402 SET_SRC (PATTERN (insn))))
3403 return 0;
3404 }
7506f491 3405
589005ff 3406 *addr_this_reg = this_reg;
c4c81601 3407 }
7506f491
DE
3408
3409 return number_of_reaching_defs;
3410}
3411
3412/* Expression computed by insn is available and the substitution is legal,
3413 so try to perform the substitution.
3414
cc2902df 3415 The result is nonzero if any changes were made. */
7506f491
DE
3416
3417static int
3418handle_avail_expr (insn, expr)
3419 rtx insn;
3420 struct expr *expr;
3421{
0631e0bf 3422 rtx pat, insn_computes_expr, expr_set;
7506f491
DE
3423 rtx to;
3424 struct reg_set *this_reg;
3425 int found_setting, use_src;
3426 int changed = 0;
3427
3428 /* We only handle the case where one computation of the expression
3429 reaches this instruction. */
3430 insn_computes_expr = computing_insn (expr, insn);
3431 if (insn_computes_expr == NULL)
3432 return 0;
0631e0bf
JH
3433 expr_set = single_set (insn_computes_expr);
3434 if (!expr_set)
3435 abort ();
7506f491
DE
3436
3437 found_setting = 0;
3438 use_src = 0;
3439
3440 /* At this point we know only one computation of EXPR outside of this
3441 block reaches this insn. Now try to find a register that the
3442 expression is computed into. */
0631e0bf 3443 if (GET_CODE (SET_SRC (expr_set)) == REG)
7506f491
DE
3444 {
3445 /* This is the case when the available expression that reaches
3446 here has already been handled as an available expression. */
770ae6cc 3447 unsigned int regnum_for_replacing
0631e0bf 3448 = REGNO (SET_SRC (expr_set));
c4c81601 3449
7506f491
DE
3450 /* If the register was created by GCSE we can't use `reg_set_table',
3451 however we know it's set only once. */
3452 if (regnum_for_replacing >= max_gcse_regno
3453 /* If the register the expression is computed into is set only once,
3454 or only one set reaches this insn, we can use it. */
3455 || (((this_reg = reg_set_table[regnum_for_replacing]),
3456 this_reg->next == NULL)
3457 || can_disregard_other_sets (&this_reg, insn, 0)))
8e42ace1
KH
3458 {
3459 use_src = 1;
3460 found_setting = 1;
3461 }
7506f491
DE
3462 }
3463
3464 if (!found_setting)
3465 {
770ae6cc 3466 unsigned int regnum_for_replacing
0631e0bf 3467 = REGNO (SET_DEST (expr_set));
c4c81601 3468
7506f491
DE
3469 /* This shouldn't happen. */
3470 if (regnum_for_replacing >= max_gcse_regno)
3471 abort ();
c4c81601 3472
7506f491 3473 this_reg = reg_set_table[regnum_for_replacing];
c4c81601 3474
7506f491
DE
3475 /* If the register the expression is computed into is set only once,
3476 or only one set reaches this insn, use it. */
3477 if (this_reg->next == NULL
3478 || can_disregard_other_sets (&this_reg, insn, 0))
3479 found_setting = 1;
3480 }
3481
3482 if (found_setting)
3483 {
3484 pat = PATTERN (insn);
3485 if (use_src)
0631e0bf 3486 to = SET_SRC (expr_set);
7506f491 3487 else
0631e0bf 3488 to = SET_DEST (expr_set);
7506f491
DE
3489 changed = validate_change (insn, &SET_SRC (pat), to, 0);
3490
3491 /* We should be able to ignore the return code from validate_change but
3492 to play it safe we check. */
3493 if (changed)
3494 {
3495 gcse_subst_count++;
3496 if (gcse_file != NULL)
3497 {
c4c81601
RK
3498 fprintf (gcse_file, "GCSE: Replacing the source in insn %d with",
3499 INSN_UID (insn));
3500 fprintf (gcse_file, " reg %d %s insn %d\n",
3501 REGNO (to), use_src ? "from" : "set in",
7506f491
DE
3502 INSN_UID (insn_computes_expr));
3503 }
7506f491
DE
3504 }
3505 }
c4c81601 3506
7506f491
DE
3507 /* The register that the expr is computed into is set more than once. */
3508 else if (1 /*expensive_op(this_pattrn->op) && do_expensive_gcse)*/)
3509 {
3510 /* Insert an insn after insnx that copies the reg set in insnx
3511 into a new pseudo register call this new register REGN.
3512 From insnb until end of basic block or until REGB is set
3513 replace all uses of REGB with REGN. */
3514 rtx new_insn;
3515
0631e0bf 3516 to = gen_reg_rtx (GET_MODE (SET_DEST (expr_set)));
7506f491
DE
3517
3518 /* Generate the new insn. */
3519 /* ??? If the change fails, we return 0, even though we created
3520 an insn. I think this is ok. */
9e6a5703
JC
3521 new_insn
3522 = emit_insn_after (gen_rtx_SET (VOIDmode, to,
0631e0bf 3523 SET_DEST (expr_set)),
c4c81601
RK
3524 insn_computes_expr);
3525
7506f491
DE
3526 /* Keep register set table up to date. */
3527 record_one_set (REGNO (to), new_insn);
3528
3529 gcse_create_count++;
3530 if (gcse_file != NULL)
ac7c5af5 3531 {
c4c81601 3532 fprintf (gcse_file, "GCSE: Creating insn %d to copy value of reg %d",
7506f491 3533 INSN_UID (NEXT_INSN (insn_computes_expr)),
c4c81601
RK
3534 REGNO (SET_SRC (PATTERN (NEXT_INSN (insn_computes_expr)))));
3535 fprintf (gcse_file, ", computed in insn %d,\n",
7506f491 3536 INSN_UID (insn_computes_expr));
c4c81601
RK
3537 fprintf (gcse_file, " into newly allocated reg %d\n",
3538 REGNO (to));
ac7c5af5 3539 }
7506f491
DE
3540
3541 pat = PATTERN (insn);
3542
3543 /* Do register replacement for INSN. */
3544 changed = validate_change (insn, &SET_SRC (pat),
c4c81601
RK
3545 SET_DEST (PATTERN
3546 (NEXT_INSN (insn_computes_expr))),
7506f491
DE
3547 0);
3548
3549 /* We should be able to ignore the return code from validate_change but
3550 to play it safe we check. */
3551 if (changed)
3552 {
3553 gcse_subst_count++;
3554 if (gcse_file != NULL)
3555 {
c4c81601
RK
3556 fprintf (gcse_file,
3557 "GCSE: Replacing the source in insn %d with reg %d ",
7506f491 3558 INSN_UID (insn),
c4c81601
RK
3559 REGNO (SET_DEST (PATTERN (NEXT_INSN
3560 (insn_computes_expr)))));
3561 fprintf (gcse_file, "set in insn %d\n",
589005ff 3562 INSN_UID (insn_computes_expr));
7506f491 3563 }
7506f491
DE
3564 }
3565 }
3566
3567 return changed;
3568}
3569
c4c81601
RK
3570/* Perform classic GCSE. This is called by one_classic_gcse_pass after all
3571 the dataflow analysis has been done.
7506f491 3572
cc2902df 3573 The result is nonzero if a change was made. */
7506f491
DE
3574
3575static int
3576classic_gcse ()
3577{
e0082a72 3578 int changed;
7506f491 3579 rtx insn;
e0082a72 3580 basic_block bb;
7506f491
DE
3581
3582 /* Note we start at block 1. */
3583
e0082a72
ZD
3584 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3585 return 0;
3586
7506f491 3587 changed = 0;
e0082a72 3588 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
7506f491
DE
3589 {
3590 /* Reset tables used to keep track of what's still valid [since the
3591 start of the block]. */
3592 reset_opr_set_tables ();
3593
e0082a72
ZD
3594 for (insn = bb->head;
3595 insn != NULL && insn != NEXT_INSN (bb->end);
7506f491
DE
3596 insn = NEXT_INSN (insn))
3597 {
3598 /* Is insn of form (set (pseudo-reg) ...)? */
7506f491
DE
3599 if (GET_CODE (insn) == INSN
3600 && GET_CODE (PATTERN (insn)) == SET
3601 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
3602 && REGNO (SET_DEST (PATTERN (insn))) >= FIRST_PSEUDO_REGISTER)
3603 {
3604 rtx pat = PATTERN (insn);
3605 rtx src = SET_SRC (pat);
3606 struct expr *expr;
3607
3608 if (want_to_gcse_p (src)
3609 /* Is the expression recorded? */
02280659 3610 && ((expr = lookup_expr (src, &expr_hash_table)) != NULL)
7506f491
DE
3611 /* Is the expression available [at the start of the
3612 block]? */
e0082a72 3613 && TEST_BIT (ae_in[bb->index], expr->bitmap_index)
7506f491
DE
3614 /* Are the operands unchanged since the start of the
3615 block? */
3616 && oprs_not_set_p (src, insn))
3617 changed |= handle_avail_expr (insn, expr);
3618 }
3619
3620 /* Keep track of everything modified by this insn. */
3621 /* ??? Need to be careful w.r.t. mods done to INSN. */
2c3c49de 3622 if (INSN_P (insn))
7506f491 3623 mark_oprs_set (insn);
ac7c5af5 3624 }
7506f491
DE
3625 }
3626
3627 return changed;
3628}
3629
3630/* Top level routine to perform one classic GCSE pass.
3631
cc2902df 3632 Return nonzero if a change was made. */
7506f491
DE
3633
3634static int
b5ce41ff 3635one_classic_gcse_pass (pass)
7506f491
DE
3636 int pass;
3637{
3638 int changed = 0;
3639
3640 gcse_subst_count = 0;
3641 gcse_create_count = 0;
3642
02280659 3643 alloc_hash_table (max_cuid, &expr_hash_table, 0);
d55bc081 3644 alloc_rd_mem (last_basic_block, max_cuid);
02280659 3645 compute_hash_table (&expr_hash_table);
7506f491 3646 if (gcse_file)
02280659 3647 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
c4c81601 3648
02280659 3649 if (expr_hash_table.n_elems > 0)
7506f491
DE
3650 {
3651 compute_kill_rd ();
3652 compute_rd ();
02280659
ZD
3653 alloc_avail_expr_mem (last_basic_block, expr_hash_table.n_elems);
3654 compute_ae_gen (&expr_hash_table);
3655 compute_ae_kill (ae_gen, ae_kill, &expr_hash_table);
bd0eaec2 3656 compute_available (ae_gen, ae_kill, ae_out, ae_in);
7506f491
DE
3657 changed = classic_gcse ();
3658 free_avail_expr_mem ();
3659 }
c4c81601 3660
7506f491 3661 free_rd_mem ();
02280659 3662 free_hash_table (&expr_hash_table);
7506f491
DE
3663
3664 if (gcse_file)
3665 {
3666 fprintf (gcse_file, "\n");
c4c81601
RK
3667 fprintf (gcse_file, "GCSE of %s, pass %d: %d bytes needed, %d substs,",
3668 current_function_name, pass, bytes_used, gcse_subst_count);
3669 fprintf (gcse_file, "%d insns created\n", gcse_create_count);
7506f491
DE
3670 }
3671
3672 return changed;
3673}
3674\f
3675/* Compute copy/constant propagation working variables. */
3676
3677/* Local properties of assignments. */
7506f491
DE
3678static sbitmap *cprop_pavloc;
3679static sbitmap *cprop_absaltered;
3680
3681/* Global properties of assignments (computed from the local properties). */
7506f491
DE
3682static sbitmap *cprop_avin;
3683static sbitmap *cprop_avout;
3684
c4c81601
RK
3685/* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
3686 basic blocks. N_SETS is the number of sets. */
7506f491
DE
3687
3688static void
3689alloc_cprop_mem (n_blocks, n_sets)
3690 int n_blocks, n_sets;
3691{
3692 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
3693 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
3694
3695 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
3696 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
3697}
3698
3699/* Free vars used by copy/const propagation. */
3700
3701static void
3702free_cprop_mem ()
3703{
5a660bff
DB
3704 sbitmap_vector_free (cprop_pavloc);
3705 sbitmap_vector_free (cprop_absaltered);
3706 sbitmap_vector_free (cprop_avin);
3707 sbitmap_vector_free (cprop_avout);
7506f491
DE
3708}
3709
c4c81601
RK
3710/* For each block, compute whether X is transparent. X is either an
3711 expression or an assignment [though we don't care which, for this context
3712 an assignment is treated as an expression]. For each block where an
3713 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
3714 bit in BMAP. */
7506f491
DE
3715
3716static void
3717compute_transp (x, indx, bmap, set_p)
3718 rtx x;
3719 int indx;
3720 sbitmap *bmap;
3721 int set_p;
3722{
e0082a72
ZD
3723 int i, j;
3724 basic_block bb;
7506f491 3725 enum rtx_code code;
c4c81601 3726 reg_set *r;
6f7d635c 3727 const char *fmt;
7506f491 3728
c4c81601
RK
3729 /* repeat is used to turn tail-recursion into iteration since GCC
3730 can't do it when there's no return value. */
7506f491
DE
3731 repeat:
3732
3733 if (x == 0)
3734 return;
3735
3736 code = GET_CODE (x);
3737 switch (code)
3738 {
3739 case REG:
c4c81601
RK
3740 if (set_p)
3741 {
3742 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3743 {
e0082a72
ZD
3744 FOR_EACH_BB (bb)
3745 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
3746 SET_BIT (bmap[bb->index], indx);
c4c81601
RK
3747 }
3748 else
3749 {
3750 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3751 SET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3752 }
3753 }
3754 else
3755 {
3756 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3757 {
e0082a72
ZD
3758 FOR_EACH_BB (bb)
3759 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
3760 RESET_BIT (bmap[bb->index], indx);
c4c81601
RK
3761 }
3762 else
3763 {
3764 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3765 RESET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3766 }
3767 }
7506f491 3768
c4c81601 3769 return;
7506f491
DE
3770
3771 case MEM:
e0082a72 3772 FOR_EACH_BB (bb)
a13d4ebf 3773 {
e0082a72 3774 rtx list_entry = canon_modify_mem_list[bb->index];
a13d4ebf
AM
3775
3776 while (list_entry)
3777 {
3778 rtx dest, dest_addr;
3779
3780 if (GET_CODE (XEXP (list_entry, 0)) == CALL_INSN)
3781 {
3782 if (set_p)
e0082a72 3783 SET_BIT (bmap[bb->index], indx);
a13d4ebf 3784 else
e0082a72 3785 RESET_BIT (bmap[bb->index], indx);
a13d4ebf
AM
3786 break;
3787 }
3788 /* LIST_ENTRY must be an INSN of some kind that sets memory.
3789 Examine each hunk of memory that is modified. */
3790
3791 dest = XEXP (list_entry, 0);
3792 list_entry = XEXP (list_entry, 1);
3793 dest_addr = XEXP (list_entry, 0);
589005ff 3794
a13d4ebf
AM
3795 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
3796 x, rtx_addr_varies_p))
3797 {
3798 if (set_p)
e0082a72 3799 SET_BIT (bmap[bb->index], indx);
a13d4ebf 3800 else
e0082a72 3801 RESET_BIT (bmap[bb->index], indx);
a13d4ebf
AM
3802 break;
3803 }
3804 list_entry = XEXP (list_entry, 1);
3805 }
3806 }
c4c81601 3807
7506f491
DE
3808 x = XEXP (x, 0);
3809 goto repeat;
3810
3811 case PC:
3812 case CC0: /*FIXME*/
3813 case CONST:
3814 case CONST_INT:
3815 case CONST_DOUBLE:
69ef87e2 3816 case CONST_VECTOR:
7506f491
DE
3817 case SYMBOL_REF:
3818 case LABEL_REF:
3819 case ADDR_VEC:
3820 case ADDR_DIFF_VEC:
3821 return;
3822
3823 default:
3824 break;
3825 }
3826
c4c81601 3827 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3828 {
3829 if (fmt[i] == 'e')
3830 {
7506f491
DE
3831 /* If we are about to do the last recursive call
3832 needed at this level, change it into iteration.
3833 This function is called enough to be worth it. */
3834 if (i == 0)
3835 {
c4c81601 3836 x = XEXP (x, i);
7506f491
DE
3837 goto repeat;
3838 }
c4c81601
RK
3839
3840 compute_transp (XEXP (x, i), indx, bmap, set_p);
7506f491
DE
3841 }
3842 else if (fmt[i] == 'E')
c4c81601
RK
3843 for (j = 0; j < XVECLEN (x, i); j++)
3844 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
7506f491
DE
3845 }
3846}
3847
7506f491
DE
3848/* Top level routine to do the dataflow analysis needed by copy/const
3849 propagation. */
3850
3851static void
3852compute_cprop_data ()
3853{
02280659 3854 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
ce724250
JL
3855 compute_available (cprop_pavloc, cprop_absaltered,
3856 cprop_avout, cprop_avin);
7506f491
DE
3857}
3858\f
3859/* Copy/constant propagation. */
3860
7506f491
DE
3861/* Maximum number of register uses in an insn that we handle. */
3862#define MAX_USES 8
3863
3864/* Table of uses found in an insn.
3865 Allocated statically to avoid alloc/free complexity and overhead. */
3866static struct reg_use reg_use_table[MAX_USES];
3867
3868/* Index into `reg_use_table' while building it. */
3869static int reg_use_count;
3870
c4c81601
RK
3871/* Set up a list of register numbers used in INSN. The found uses are stored
3872 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
3873 and contains the number of uses in the table upon exit.
7506f491 3874
c4c81601
RK
3875 ??? If a register appears multiple times we will record it multiple times.
3876 This doesn't hurt anything but it will slow things down. */
7506f491
DE
3877
3878static void
9e71c818
JH
3879find_used_regs (xptr, data)
3880 rtx *xptr;
3881 void *data ATTRIBUTE_UNUSED;
7506f491 3882{
c4c81601 3883 int i, j;
7506f491 3884 enum rtx_code code;
6f7d635c 3885 const char *fmt;
9e71c818 3886 rtx x = *xptr;
7506f491 3887
c4c81601
RK
3888 /* repeat is used to turn tail-recursion into iteration since GCC
3889 can't do it when there's no return value. */
7506f491 3890 repeat:
7506f491
DE
3891 if (x == 0)
3892 return;
3893
3894 code = GET_CODE (x);
9e71c818 3895 if (REG_P (x))
7506f491 3896 {
7506f491
DE
3897 if (reg_use_count == MAX_USES)
3898 return;
c4c81601 3899
7506f491
DE
3900 reg_use_table[reg_use_count].reg_rtx = x;
3901 reg_use_count++;
7506f491
DE
3902 }
3903
3904 /* Recursively scan the operands of this expression. */
3905
c4c81601 3906 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3907 {
3908 if (fmt[i] == 'e')
3909 {
3910 /* If we are about to do the last recursive call
3911 needed at this level, change it into iteration.
3912 This function is called enough to be worth it. */
3913 if (i == 0)
3914 {
3915 x = XEXP (x, 0);
3916 goto repeat;
3917 }
c4c81601 3918
9e71c818 3919 find_used_regs (&XEXP (x, i), data);
7506f491
DE
3920 }
3921 else if (fmt[i] == 'E')
c4c81601 3922 for (j = 0; j < XVECLEN (x, i); j++)
9e71c818 3923 find_used_regs (&XVECEXP (x, i, j), data);
7506f491
DE
3924 }
3925}
3926
3927/* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
cc2902df 3928 Returns nonzero is successful. */
7506f491
DE
3929
3930static int
3931try_replace_reg (from, to, insn)
3932 rtx from, to, insn;
3933{
172890a2 3934 rtx note = find_reg_equal_equiv_note (insn);
fb0c0a12 3935 rtx src = 0;
172890a2
RK
3936 int success = 0;
3937 rtx set = single_set (insn);
833fc3ad 3938
2b773ee2
JH
3939 validate_replace_src_group (from, to, insn);
3940 if (num_changes_pending () && apply_change_group ())
3941 success = 1;
9e71c818 3942
f305679f 3943 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
833fc3ad 3944 {
f305679f
JH
3945 /* If above failed and this is a single set, try to simplify the source of
3946 the set given our substitution. We could perhaps try this for multiple
3947 SETs, but it probably won't buy us anything. */
172890a2
RK
3948 src = simplify_replace_rtx (SET_SRC (set), from, to);
3949
9e71c818
JH
3950 if (!rtx_equal_p (src, SET_SRC (set))
3951 && validate_change (insn, &SET_SRC (set), src, 0))
172890a2 3952 success = 1;
833fc3ad 3953
f305679f
JH
3954 /* If we've failed to do replacement, have a single SET, and don't already
3955 have a note, add a REG_EQUAL note to not lose information. */
3956 if (!success && note == 0 && set != 0)
3957 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
3958 }
e251e2a2 3959
172890a2
RK
3960 /* If there is already a NOTE, update the expression in it with our
3961 replacement. */
3962 else if (note != 0)
3963 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to);
833fc3ad 3964
172890a2
RK
3965 /* REG_EQUAL may get simplified into register.
3966 We don't allow that. Remove that note. This code ought
fbe5a4a6 3967 not to happen, because previous code ought to synthesize
172890a2
RK
3968 reg-reg move, but be on the safe side. */
3969 if (note && REG_P (XEXP (note, 0)))
3970 remove_note (insn, note);
833fc3ad 3971
833fc3ad
JH
3972 return success;
3973}
c4c81601
RK
3974
3975/* Find a set of REGNOs that are available on entry to INSN's block. Returns
3976 NULL no such set is found. */
7506f491
DE
3977
3978static struct expr *
3979find_avail_set (regno, insn)
3980 int regno;
3981 rtx insn;
3982{
cafba495
BS
3983 /* SET1 contains the last set found that can be returned to the caller for
3984 use in a substitution. */
3985 struct expr *set1 = 0;
589005ff 3986
cafba495
BS
3987 /* Loops are not possible here. To get a loop we would need two sets
3988 available at the start of the block containing INSN. ie we would
3989 need two sets like this available at the start of the block:
3990
3991 (set (reg X) (reg Y))
3992 (set (reg Y) (reg X))
3993
3994 This can not happen since the set of (reg Y) would have killed the
3995 set of (reg X) making it unavailable at the start of this block. */
3996 while (1)
8e42ace1 3997 {
cafba495 3998 rtx src;
02280659 3999 struct expr *set = lookup_set (regno, NULL_RTX, &set_hash_table);
cafba495
BS
4000
4001 /* Find a set that is available at the start of the block
4002 which contains INSN. */
4003 while (set)
4004 {
4005 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
4006 break;
4007 set = next_set (regno, set);
4008 }
7506f491 4009
cafba495
BS
4010 /* If no available set was found we've reached the end of the
4011 (possibly empty) copy chain. */
4012 if (set == 0)
589005ff 4013 break;
cafba495
BS
4014
4015 if (GET_CODE (set->expr) != SET)
4016 abort ();
4017
4018 src = SET_SRC (set->expr);
4019
4020 /* We know the set is available.
4021 Now check that SRC is ANTLOC (i.e. none of the source operands
589005ff 4022 have changed since the start of the block).
cafba495
BS
4023
4024 If the source operand changed, we may still use it for the next
4025 iteration of this loop, but we may not use it for substitutions. */
c4c81601 4026
cafba495
BS
4027 if (CONSTANT_P (src) || oprs_not_set_p (src, insn))
4028 set1 = set;
4029
4030 /* If the source of the set is anything except a register, then
4031 we have reached the end of the copy chain. */
4032 if (GET_CODE (src) != REG)
7506f491 4033 break;
7506f491 4034
cafba495
BS
4035 /* Follow the copy chain, ie start another iteration of the loop
4036 and see if we have an available copy into SRC. */
4037 regno = REGNO (src);
8e42ace1 4038 }
cafba495
BS
4039
4040 /* SET1 holds the last set that was available and anticipatable at
4041 INSN. */
4042 return set1;
7506f491
DE
4043}
4044
abd535b6 4045/* Subroutine of cprop_insn that tries to propagate constants into
0e3f0221 4046 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
fbe5a4a6 4047 it is the instruction that immediately precedes JUMP, and must be a
818b6b7f 4048 single SET of a register. FROM is what we will try to replace,
0e3f0221 4049 SRC is the constant we will try to substitute for it. Returns nonzero
589005ff 4050 if a change was made. */
c4c81601 4051
abd535b6 4052static int
0e3f0221
RS
4053cprop_jump (bb, setcc, jump, from, src)
4054 basic_block bb;
4055 rtx setcc;
4056 rtx jump;
172890a2 4057 rtx from;
abd535b6
BS
4058 rtx src;
4059{
0e3f0221
RS
4060 rtx new, new_set;
4061 rtx set = pc_set (jump);
4062
4063 /* First substitute in the INSN condition as the SET_SRC of the JUMP,
4064 then substitute that given values in this expanded JUMP. */
48ddd46c
JH
4065 if (setcc != NULL
4066 && !modified_between_p (from, setcc, jump)
4067 && !modified_between_p (src, setcc, jump))
b2f02503
RS
4068 {
4069 rtx setcc_set = single_set (setcc);
4070 new_set = simplify_replace_rtx (SET_SRC (set),
4071 SET_DEST (setcc_set),
4072 SET_SRC (setcc_set));
4073 }
0e3f0221
RS
4074 else
4075 new_set = set;
4076
4077 new = simplify_replace_rtx (new_set, from, src);
abd535b6
BS
4078
4079 /* If no simplification can be made, then try the next
4080 register. */
48ddd46c 4081 if (rtx_equal_p (new, new_set) || rtx_equal_p (new, SET_SRC (set)))
abd535b6 4082 return 0;
589005ff 4083
7d5ab30e 4084 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
172890a2 4085 if (new == pc_rtx)
0e3f0221 4086 delete_insn (jump);
7d5ab30e 4087 else
abd535b6 4088 {
48ddd46c
JH
4089 /* Ensure the value computed inside the jump insn to be equivalent
4090 to one computed by setcc. */
4091 if (setcc
4092 && modified_in_p (new, setcc))
4093 return 0;
0e3f0221 4094 if (! validate_change (jump, &SET_SRC (set), new, 0))
7d5ab30e 4095 return 0;
abd535b6 4096
7d5ab30e
JH
4097 /* If this has turned into an unconditional jump,
4098 then put a barrier after it so that the unreachable
4099 code will be deleted. */
4100 if (GET_CODE (SET_SRC (set)) == LABEL_REF)
0e3f0221 4101 emit_barrier_after (jump);
7d5ab30e 4102 }
abd535b6 4103
0e3f0221
RS
4104#ifdef HAVE_cc0
4105 /* Delete the cc0 setter. */
818b6b7f 4106 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
0e3f0221
RS
4107 delete_insn (setcc);
4108#endif
4109
172890a2 4110 run_jump_opt_after_gcse = 1;
c4c81601 4111
172890a2
RK
4112 const_prop_count++;
4113 if (gcse_file != NULL)
4114 {
4115 fprintf (gcse_file,
818b6b7f 4116 "CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
0e3f0221 4117 REGNO (from), INSN_UID (jump));
172890a2
RK
4118 print_rtl (gcse_file, src);
4119 fprintf (gcse_file, "\n");
abd535b6 4120 }
0005550b 4121 purge_dead_edges (bb);
172890a2
RK
4122
4123 return 1;
abd535b6
BS
4124}
4125
ae860ff7
JH
4126static bool
4127constprop_register (insn, from, to, alter_jumps)
4128 rtx insn;
4129 rtx from;
4130 rtx to;
4131 int alter_jumps;
4132{
4133 rtx sset;
4134
4135 /* Check for reg or cc0 setting instructions followed by
4136 conditional branch instructions first. */
4137 if (alter_jumps
4138 && (sset = single_set (insn)) != NULL
244d05fb 4139 && NEXT_INSN (insn)
ae860ff7
JH
4140 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
4141 {
4142 rtx dest = SET_DEST (sset);
4143 if ((REG_P (dest) || CC0_P (dest))
4144 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
4145 return 1;
4146 }
4147
4148 /* Handle normal insns next. */
4149 if (GET_CODE (insn) == INSN
4150 && try_replace_reg (from, to, insn))
4151 return 1;
4152
4153 /* Try to propagate a CONST_INT into a conditional jump.
4154 We're pretty specific about what we will handle in this
4155 code, we can extend this as necessary over time.
4156
4157 Right now the insn in question must look like
4158 (set (pc) (if_then_else ...)) */
4159 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
4160 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
4161 return 0;
4162}
4163
7506f491 4164/* Perform constant and copy propagation on INSN.
cc2902df 4165 The result is nonzero if a change was made. */
7506f491
DE
4166
4167static int
ae860ff7 4168cprop_insn (insn, alter_jumps)
7506f491 4169 rtx insn;
b5ce41ff 4170 int alter_jumps;
7506f491
DE
4171{
4172 struct reg_use *reg_used;
4173 int changed = 0;
833fc3ad 4174 rtx note;
7506f491 4175
9e71c818 4176 if (!INSN_P (insn))
7506f491
DE
4177 return 0;
4178
4179 reg_use_count = 0;
9e71c818 4180 note_uses (&PATTERN (insn), find_used_regs, NULL);
589005ff 4181
172890a2 4182 note = find_reg_equal_equiv_note (insn);
833fc3ad 4183
dc297297 4184 /* We may win even when propagating constants into notes. */
833fc3ad 4185 if (note)
9e71c818 4186 find_used_regs (&XEXP (note, 0), NULL);
7506f491 4187
c4c81601
RK
4188 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4189 reg_used++, reg_use_count--)
7506f491 4190 {
770ae6cc 4191 unsigned int regno = REGNO (reg_used->reg_rtx);
7506f491
DE
4192 rtx pat, src;
4193 struct expr *set;
7506f491
DE
4194
4195 /* Ignore registers created by GCSE.
dc297297 4196 We do this because ... */
7506f491
DE
4197 if (regno >= max_gcse_regno)
4198 continue;
4199
4200 /* If the register has already been set in this block, there's
4201 nothing we can do. */
4202 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
4203 continue;
4204
4205 /* Find an assignment that sets reg_used and is available
4206 at the start of the block. */
4207 set = find_avail_set (regno, insn);
4208 if (! set)
4209 continue;
589005ff 4210
7506f491
DE
4211 pat = set->expr;
4212 /* ??? We might be able to handle PARALLELs. Later. */
4213 if (GET_CODE (pat) != SET)
4214 abort ();
c4c81601 4215
7506f491
DE
4216 src = SET_SRC (pat);
4217
e78d9500 4218 /* Constant propagation. */
b446e5a2 4219 if (CONSTANT_P (src))
7506f491 4220 {
ae860ff7 4221 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
7506f491
DE
4222 {
4223 changed = 1;
4224 const_prop_count++;
4225 if (gcse_file != NULL)
4226 {
ae860ff7
JH
4227 fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
4228 fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn));
e78d9500 4229 print_rtl (gcse_file, src);
7506f491
DE
4230 fprintf (gcse_file, "\n");
4231 }
7506f491
DE
4232 }
4233 }
4234 else if (GET_CODE (src) == REG
4235 && REGNO (src) >= FIRST_PSEUDO_REGISTER
4236 && REGNO (src) != regno)
4237 {
cafba495 4238 if (try_replace_reg (reg_used->reg_rtx, src, insn))
7506f491 4239 {
cafba495
BS
4240 changed = 1;
4241 copy_prop_count++;
4242 if (gcse_file != NULL)
7506f491 4243 {
ae860ff7 4244 fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
c4c81601
RK
4245 regno, INSN_UID (insn));
4246 fprintf (gcse_file, " with reg %d\n", REGNO (src));
7506f491 4247 }
cafba495
BS
4248
4249 /* The original insn setting reg_used may or may not now be
4250 deletable. We leave the deletion to flow. */
4251 /* FIXME: If it turns out that the insn isn't deletable,
4252 then we may have unnecessarily extended register lifetimes
4253 and made things worse. */
7506f491
DE
4254 }
4255 }
4256 }
4257
4258 return changed;
4259}
4260
8ba46434
R
4261/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
4262 their REG_EQUAL notes need updating. */
e197b6fc 4263
ae860ff7 4264static bool
8ba46434 4265do_local_cprop (x, insn, alter_jumps, libcall_sp)
ae860ff7
JH
4266 rtx x;
4267 rtx insn;
4268 int alter_jumps;
8ba46434 4269 rtx *libcall_sp;
ae860ff7
JH
4270{
4271 rtx newreg = NULL, newcnst = NULL;
4272
e197b6fc
RH
4273 /* Rule out USE instructions and ASM statements as we don't want to
4274 change the hard registers mentioned. */
ae860ff7
JH
4275 if (GET_CODE (x) == REG
4276 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
e197b6fc
RH
4277 || (GET_CODE (PATTERN (insn)) != USE
4278 && asm_noperands (PATTERN (insn)) < 0)))
ae860ff7
JH
4279 {
4280 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
4281 struct elt_loc_list *l;
4282
4283 if (!val)
4284 return false;
4285 for (l = val->locs; l; l = l->next)
4286 {
4287 rtx this_rtx = l->loc;
46690369
JH
4288 rtx note;
4289
9635cfad
JH
4290 if (l->in_libcall)
4291 continue;
4292
34ee7f82
RS
4293 if (CONSTANT_P (this_rtx)
4294 && GET_CODE (this_rtx) != CONSTANT_P_RTX)
ae860ff7 4295 newcnst = this_rtx;
46690369
JH
4296 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
4297 /* Don't copy propagate if it has attached REG_EQUIV note.
4298 At this point this only function parameters should have
4299 REG_EQUIV notes and if the argument slot is used somewhere
4300 explicitly, it means address of parameter has been taken,
4301 so we should not extend the lifetime of the pseudo. */
4302 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
4303 || GET_CODE (XEXP (note, 0)) != MEM))
ae860ff7
JH
4304 newreg = this_rtx;
4305 }
4306 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
4307 {
8ba46434 4308 /* If we find a case where we can't fix the retval REG_EQUAL notes
fbe5a4a6 4309 match the new register, we either have to abandon this replacement
8ba46434
R
4310 or fix delete_trivially_dead_insns to preserve the setting insn,
4311 or make it delete the REG_EUAQL note, and fix up all passes that
4312 require the REG_EQUAL note there. */
4313 if (!adjust_libcall_notes (x, newcnst, insn, libcall_sp))
4314 abort ();
ae860ff7
JH
4315 if (gcse_file != NULL)
4316 {
4317 fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ",
4318 REGNO (x));
4319 fprintf (gcse_file, "insn %d with constant ",
4320 INSN_UID (insn));
4321 print_rtl (gcse_file, newcnst);
4322 fprintf (gcse_file, "\n");
4323 }
4324 const_prop_count++;
4325 return true;
4326 }
4327 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
4328 {
8ba46434 4329 adjust_libcall_notes (x, newreg, insn, libcall_sp);
ae860ff7
JH
4330 if (gcse_file != NULL)
4331 {
4332 fprintf (gcse_file,
4333 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
4334 REGNO (x), INSN_UID (insn));
4335 fprintf (gcse_file, " with reg %d\n", REGNO (newreg));
4336 }
4337 copy_prop_count++;
4338 return true;
4339 }
4340 }
4341 return false;
4342}
4343
8ba46434
R
4344/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
4345 their REG_EQUAL notes need updating to reflect that OLDREG has been
f4e3e618
RH
4346 replaced with NEWVAL in INSN. Return true if all substitutions could
4347 be made. */
8ba46434
R
4348static bool
4349adjust_libcall_notes (oldreg, newval, insn, libcall_sp)
4350 rtx oldreg, newval, insn, *libcall_sp;
4351{
f4e3e618 4352 rtx end;
8ba46434
R
4353
4354 while ((end = *libcall_sp++))
4355 {
f4e3e618 4356 rtx note = find_reg_equal_equiv_note (end);
8ba46434
R
4357
4358 if (! note)
4359 continue;
4360
4361 if (REG_P (newval))
4362 {
4363 if (reg_set_between_p (newval, PREV_INSN (insn), end))
4364 {
4365 do
4366 {
4367 note = find_reg_equal_equiv_note (end);
4368 if (! note)
4369 continue;
4370 if (reg_mentioned_p (newval, XEXP (note, 0)))
4371 return false;
4372 }
4373 while ((end = *libcall_sp++));
4374 return true;
4375 }
4376 }
4377 XEXP (note, 0) = replace_rtx (XEXP (note, 0), oldreg, newval);
4378 insn = end;
4379 }
4380 return true;
4381}
4382
4383#define MAX_NESTED_LIBCALLS 9
4384
ae860ff7
JH
4385static void
4386local_cprop_pass (alter_jumps)
4387 int alter_jumps;
4388{
4389 rtx insn;
4390 struct reg_use *reg_used;
8ba46434 4391 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
1649d92f 4392 bool changed = false;
ae860ff7
JH
4393
4394 cselib_init ();
8ba46434
R
4395 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
4396 *libcall_sp = 0;
ae860ff7
JH
4397 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4398 {
4399 if (INSN_P (insn))
4400 {
8ba46434 4401 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
ae860ff7 4402
8ba46434
R
4403 if (note)
4404 {
4405 if (libcall_sp == libcall_stack)
4406 abort ();
4407 *--libcall_sp = XEXP (note, 0);
4408 }
4409 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
4410 if (note)
4411 libcall_sp++;
4412 note = find_reg_equal_equiv_note (insn);
ae860ff7
JH
4413 do
4414 {
4415 reg_use_count = 0;
4416 note_uses (&PATTERN (insn), find_used_regs, NULL);
4417 if (note)
4418 find_used_regs (&XEXP (note, 0), NULL);
4419
4420 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4421 reg_used++, reg_use_count--)
8ba46434
R
4422 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
4423 libcall_sp))
1649d92f
JH
4424 {
4425 changed = true;
4426 break;
4427 }
ae860ff7
JH
4428 }
4429 while (reg_use_count);
4430 }
4431 cselib_process_insn (insn);
4432 }
4433 cselib_finish ();
1649d92f
JH
4434 /* Global analysis may get into infinite loops for unreachable blocks. */
4435 if (changed && alter_jumps)
5f0bea72
JH
4436 {
4437 delete_unreachable_blocks ();
4438 free_reg_set_mem ();
4439 alloc_reg_set_mem (max_reg_num ());
4440 compute_sets (get_insns ());
4441 }
ae860ff7
JH
4442}
4443
c4c81601 4444/* Forward propagate copies. This includes copies and constants. Return
cc2902df 4445 nonzero if a change was made. */
7506f491
DE
4446
4447static int
b5ce41ff
JL
4448cprop (alter_jumps)
4449 int alter_jumps;
7506f491 4450{
e0082a72
ZD
4451 int changed;
4452 basic_block bb;
7506f491
DE
4453 rtx insn;
4454
4455 /* Note we start at block 1. */
e0082a72
ZD
4456 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4457 {
4458 if (gcse_file != NULL)
4459 fprintf (gcse_file, "\n");
4460 return 0;
4461 }
7506f491
DE
4462
4463 changed = 0;
e0082a72 4464 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
7506f491
DE
4465 {
4466 /* Reset tables used to keep track of what's still valid [since the
4467 start of the block]. */
4468 reset_opr_set_tables ();
4469
e0082a72
ZD
4470 for (insn = bb->head;
4471 insn != NULL && insn != NEXT_INSN (bb->end);
7506f491 4472 insn = NEXT_INSN (insn))
172890a2
RK
4473 if (INSN_P (insn))
4474 {
ae860ff7 4475 changed |= cprop_insn (insn, alter_jumps);
7506f491 4476
172890a2
RK
4477 /* Keep track of everything modified by this insn. */
4478 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
4479 call mark_oprs_set if we turned the insn into a NOTE. */
4480 if (GET_CODE (insn) != NOTE)
4481 mark_oprs_set (insn);
8e42ace1 4482 }
7506f491
DE
4483 }
4484
4485 if (gcse_file != NULL)
4486 fprintf (gcse_file, "\n");
4487
4488 return changed;
4489}
4490
fbef91d8
RS
4491/* Similar to get_condition, only the resulting condition must be
4492 valid at JUMP, instead of at EARLIEST.
4493
4494 This differs from noce_get_condition in ifcvt.c in that we prefer not to
4495 settle for the condition variable in the jump instruction being integral.
4496 We prefer to be able to record the value of a user variable, rather than
4497 the value of a temporary used in a condition. This could be solved by
4498 recording the value of *every* register scaned by canonicalize_condition,
4499 but this would require some code reorganization. */
4500
4501static rtx
4502fis_get_condition (jump)
4503 rtx jump;
4504{
4505 rtx cond, set, tmp, insn, earliest;
4506 bool reverse;
4507
4508 if (! any_condjump_p (jump))
4509 return NULL_RTX;
4510
4511 set = pc_set (jump);
4512 cond = XEXP (SET_SRC (set), 0);
4513
4514 /* If this branches to JUMP_LABEL when the condition is false,
4515 reverse the condition. */
4516 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4517 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump));
4518
4519 /* Use canonicalize_condition to do the dirty work of manipulating
4520 MODE_CC values and COMPARE rtx codes. */
4521 tmp = canonicalize_condition (jump, cond, reverse, &earliest, NULL_RTX);
4522 if (!tmp)
4523 return NULL_RTX;
4524
4525 /* Verify that the given condition is valid at JUMP by virtue of not
4526 having been modified since EARLIEST. */
4527 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
4528 if (INSN_P (insn) && modified_in_p (tmp, insn))
4529 break;
4530 if (insn == jump)
4531 return tmp;
4532
4533 /* The condition was modified. See if we can get a partial result
4534 that doesn't follow all the reversals. Perhaps combine can fold
4535 them together later. */
4536 tmp = XEXP (tmp, 0);
4537 if (!REG_P (tmp) || GET_MODE_CLASS (GET_MODE (tmp)) != MODE_INT)
4538 return NULL_RTX;
4539 tmp = canonicalize_condition (jump, cond, reverse, &earliest, tmp);
4540 if (!tmp)
4541 return NULL_RTX;
4542
4543 /* For sanity's sake, re-validate the new result. */
4544 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
4545 if (INSN_P (insn) && modified_in_p (tmp, insn))
4546 return NULL_RTX;
4547
4548 return tmp;
4549}
4550
4551/* Find the implicit sets of a function. An "implicit set" is a constraint
4552 on the value of a variable, implied by a conditional jump. For example,
4553 following "if (x == 2)", the then branch may be optimized as though the
4554 conditional performed an "explicit set", in this example, "x = 2". This
4555 function records the set patterns that are implicit at the start of each
4556 basic block. */
4557
4558static void
4559find_implicit_sets ()
4560{
4561 basic_block bb, dest;
4562 unsigned int count;
4563 rtx cond, new;
4564
4565 count = 0;
4566 FOR_EACH_BB (bb)
4567 /* Check for more than one sucessor. */
4568 if (bb->succ && bb->succ->succ_next)
4569 {
4570 cond = fis_get_condition (bb->end);
4571
4572 if (cond
4573 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
4574 && GET_CODE (XEXP (cond, 0)) == REG
4575 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
4576 && CONSTANT_P (XEXP (cond, 1)))
4577 {
4578 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
4579 : FALLTHRU_EDGE (bb)->dest;
4580
4581 if (dest && ! dest->pred->pred_next
4582 && dest != EXIT_BLOCK_PTR)
4583 {
4584 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
4585 XEXP (cond, 1));
4586 implicit_sets[dest->index] = new;
4587 if (gcse_file)
4588 {
4589 fprintf(gcse_file, "Implicit set of reg %d in ",
4590 REGNO (XEXP (cond, 0)));
4591 fprintf(gcse_file, "basic block %d\n", dest->index);
4592 }
4593 count++;
4594 }
4595 }
4596 }
4597
4598 if (gcse_file)
4599 fprintf (gcse_file, "Found %d implicit sets\n", count);
4600}
4601
7506f491 4602/* Perform one copy/constant propagation pass.
a0134312
RS
4603 PASS is the pass count. If CPROP_JUMPS is true, perform constant
4604 propagation into conditional jumps. If BYPASS_JUMPS is true,
4605 perform conditional jump bypassing optimizations. */
7506f491
DE
4606
4607static int
a0134312 4608one_cprop_pass (pass, cprop_jumps, bypass_jumps)
7506f491 4609 int pass;
a0134312
RS
4610 int cprop_jumps;
4611 int bypass_jumps;
7506f491
DE
4612{
4613 int changed = 0;
4614
4615 const_prop_count = 0;
4616 copy_prop_count = 0;
4617
a0134312 4618 local_cprop_pass (cprop_jumps);
ae860ff7 4619
fbef91d8
RS
4620 /* Determine implicit sets. */
4621 implicit_sets = (rtx *) xcalloc (last_basic_block, sizeof (rtx));
4622 find_implicit_sets ();
4623
02280659
ZD
4624 alloc_hash_table (max_cuid, &set_hash_table, 1);
4625 compute_hash_table (&set_hash_table);
fbef91d8
RS
4626
4627 /* Free implicit_sets before peak usage. */
4628 free (implicit_sets);
4629 implicit_sets = NULL;
4630
7506f491 4631 if (gcse_file)
02280659
ZD
4632 dump_hash_table (gcse_file, "SET", &set_hash_table);
4633 if (set_hash_table.n_elems > 0)
7506f491 4634 {
02280659 4635 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
7506f491 4636 compute_cprop_data ();
a0134312
RS
4637 changed = cprop (cprop_jumps);
4638 if (bypass_jumps)
0e3f0221 4639 changed |= bypass_conditional_jumps ();
7506f491
DE
4640 free_cprop_mem ();
4641 }
c4c81601 4642
02280659 4643 free_hash_table (&set_hash_table);
7506f491
DE
4644
4645 if (gcse_file)
4646 {
c4c81601
RK
4647 fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ",
4648 current_function_name, pass, bytes_used);
4649 fprintf (gcse_file, "%d const props, %d copy props\n\n",
4650 const_prop_count, copy_prop_count);
7506f491 4651 }
1649d92f
JH
4652 /* Global analysis may get into infinite loops for unreachable blocks. */
4653 if (changed && cprop_jumps)
4654 delete_unreachable_blocks ();
7506f491
DE
4655
4656 return changed;
4657}
4658\f
0e3f0221
RS
4659/* Bypass conditional jumps. */
4660
7821bfc7
RS
4661/* The value of last_basic_block at the beginning of the jump_bypass
4662 pass. The use of redirect_edge_and_branch_force may introduce new
4663 basic blocks, but the data flow analysis is only valid for basic
4664 block indices less than bypass_last_basic_block. */
4665
4666static int bypass_last_basic_block;
4667
0e3f0221
RS
4668/* Find a set of REGNO to a constant that is available at the end of basic
4669 block BB. Returns NULL if no such set is found. Based heavily upon
4670 find_avail_set. */
4671
4672static struct expr *
4673find_bypass_set (regno, bb)
4674 int regno;
4675 int bb;
4676{
4677 struct expr *result = 0;
4678
4679 for (;;)
4680 {
4681 rtx src;
02280659 4682 struct expr *set = lookup_set (regno, NULL_RTX, &set_hash_table);
0e3f0221
RS
4683
4684 while (set)
4685 {
4686 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
4687 break;
4688 set = next_set (regno, set);
4689 }
4690
4691 if (set == 0)
4692 break;
4693
4694 if (GET_CODE (set->expr) != SET)
4695 abort ();
4696
4697 src = SET_SRC (set->expr);
4698 if (CONSTANT_P (src))
4699 result = set;
4700
4701 if (GET_CODE (src) != REG)
4702 break;
4703
4704 regno = REGNO (src);
4705 }
4706 return result;
4707}
4708
4709
4710/* Subroutine of bypass_conditional_jumps that attempts to bypass the given
4711 basic block BB which has more than one predecessor. If not NULL, SETCC
4712 is the first instruction of BB, which is immediately followed by JUMP_INSN
4713 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
4714 Returns nonzero if a change was made. */
4715
4716static int
4717bypass_block (bb, setcc, jump)
4718 basic_block bb;
4719 rtx setcc, jump;
4720{
4721 rtx insn, note;
4722 edge e, enext;
818b6b7f 4723 int i, change;
0e3f0221
RS
4724
4725 insn = (setcc != NULL) ? setcc : jump;
4726
4727 /* Determine set of register uses in INSN. */
4728 reg_use_count = 0;
4729 note_uses (&PATTERN (insn), find_used_regs, NULL);
4730 note = find_reg_equal_equiv_note (insn);
4731 if (note)
4732 find_used_regs (&XEXP (note, 0), NULL);
4733
4734 change = 0;
4735 for (e = bb->pred; e; e = enext)
4736 {
4737 enext = e->pred_next;
7821bfc7
RS
4738 if (e->flags & EDGE_COMPLEX)
4739 continue;
4740
4741 /* We can't redirect edges from new basic blocks. */
4742 if (e->src->index >= bypass_last_basic_block)
4743 continue;
4744
0e3f0221
RS
4745 for (i = 0; i < reg_use_count; i++)
4746 {
4747 struct reg_use *reg_used = &reg_use_table[i];
589005ff 4748 unsigned int regno = REGNO (reg_used->reg_rtx);
818b6b7f 4749 basic_block dest, old_dest;
589005ff
KH
4750 struct expr *set;
4751 rtx src, new;
0e3f0221 4752
589005ff
KH
4753 if (regno >= max_gcse_regno)
4754 continue;
0e3f0221 4755
589005ff 4756 set = find_bypass_set (regno, e->src->index);
0e3f0221
RS
4757
4758 if (! set)
4759 continue;
4760
589005ff 4761 src = SET_SRC (pc_set (jump));
0e3f0221
RS
4762
4763 if (setcc != NULL)
4764 src = simplify_replace_rtx (src,
589005ff
KH
4765 SET_DEST (PATTERN (setcc)),
4766 SET_SRC (PATTERN (setcc)));
0e3f0221
RS
4767
4768 new = simplify_replace_rtx (src, reg_used->reg_rtx,
589005ff 4769 SET_SRC (set->expr));
0e3f0221 4770
589005ff 4771 if (new == pc_rtx)
0e3f0221
RS
4772 dest = FALLTHRU_EDGE (bb)->dest;
4773 else if (GET_CODE (new) == LABEL_REF)
4774 dest = BRANCH_EDGE (bb)->dest;
4775 else
4776 dest = NULL;
4777
818b6b7f 4778 old_dest = e->dest;
7821bfc7
RS
4779 if (dest != NULL
4780 && dest != old_dest
4781 && dest != EXIT_BLOCK_PTR)
4782 {
4783 redirect_edge_and_branch_force (e, dest);
4784
818b6b7f 4785 /* Copy the register setter to the redirected edge.
0e3f0221
RS
4786 Don't copy CC0 setters, as CC0 is dead after jump. */
4787 if (setcc)
4788 {
4789 rtx pat = PATTERN (setcc);
818b6b7f 4790 if (!CC0_P (SET_DEST (pat)))
0e3f0221
RS
4791 insert_insn_on_edge (copy_insn (pat), e);
4792 }
4793
4794 if (gcse_file != NULL)
4795 {
818b6b7f
RH
4796 fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d in jump_insn %d equals constant ",
4797 regno, INSN_UID (jump));
0e3f0221
RS
4798 print_rtl (gcse_file, SET_SRC (set->expr));
4799 fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n",
818b6b7f 4800 e->src->index, old_dest->index, dest->index);
0e3f0221
RS
4801 }
4802 change = 1;
4803 break;
4804 }
4805 }
4806 }
4807 return change;
4808}
4809
4810/* Find basic blocks with more than one predecessor that only contain a
4811 single conditional jump. If the result of the comparison is known at
4812 compile-time from any incoming edge, redirect that edge to the
4813 appropriate target. Returns nonzero if a change was made. */
4814
4815static int
4816bypass_conditional_jumps ()
4817{
4818 basic_block bb;
4819 int changed;
4820 rtx setcc;
4821 rtx insn;
4822 rtx dest;
4823
4824 /* Note we start at block 1. */
4825 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4826 return 0;
4827
7821bfc7
RS
4828 bypass_last_basic_block = last_basic_block;
4829
0e3f0221
RS
4830 changed = 0;
4831 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
589005ff 4832 EXIT_BLOCK_PTR, next_bb)
0e3f0221
RS
4833 {
4834 /* Check for more than one predecessor. */
4835 if (bb->pred && bb->pred->pred_next)
4836 {
4837 setcc = NULL_RTX;
4838 for (insn = bb->head;
4839 insn != NULL && insn != NEXT_INSN (bb->end);
4840 insn = NEXT_INSN (insn))
4841 if (GET_CODE (insn) == INSN)
4842 {
9543a9d2 4843 if (setcc)
0e3f0221 4844 break;
ba4f7968 4845 if (GET_CODE (PATTERN (insn)) != SET)
0e3f0221
RS
4846 break;
4847
ba4f7968 4848 dest = SET_DEST (PATTERN (insn));
818b6b7f 4849 if (REG_P (dest) || CC0_P (dest))
0e3f0221 4850 setcc = insn;
0e3f0221
RS
4851 else
4852 break;
4853 }
4854 else if (GET_CODE (insn) == JUMP_INSN)
4855 {
4856 if (any_condjump_p (insn) && onlyjump_p (insn))
4857 changed |= bypass_block (bb, setcc, insn);
4858 break;
4859 }
4860 else if (INSN_P (insn))
4861 break;
4862 }
4863 }
4864
818b6b7f 4865 /* If we bypassed any register setting insns, we inserted a
fbe5a4a6 4866 copy on the redirected edge. These need to be committed. */
0e3f0221
RS
4867 if (changed)
4868 commit_edge_insertions();
4869
4870 return changed;
4871}
4872\f
a65f3558 4873/* Compute PRE+LCM working variables. */
7506f491
DE
4874
4875/* Local properties of expressions. */
4876/* Nonzero for expressions that are transparent in the block. */
a65f3558 4877static sbitmap *transp;
7506f491 4878
5c35539b
RH
4879/* Nonzero for expressions that are transparent at the end of the block.
4880 This is only zero for expressions killed by abnormal critical edge
4881 created by a calls. */
a65f3558 4882static sbitmap *transpout;
5c35539b 4883
a65f3558
JL
4884/* Nonzero for expressions that are computed (available) in the block. */
4885static sbitmap *comp;
7506f491 4886
a65f3558
JL
4887/* Nonzero for expressions that are locally anticipatable in the block. */
4888static sbitmap *antloc;
7506f491 4889
a65f3558
JL
4890/* Nonzero for expressions where this block is an optimal computation
4891 point. */
4892static sbitmap *pre_optimal;
5c35539b 4893
a65f3558
JL
4894/* Nonzero for expressions which are redundant in a particular block. */
4895static sbitmap *pre_redundant;
7506f491 4896
a42cd965
AM
4897/* Nonzero for expressions which should be inserted on a specific edge. */
4898static sbitmap *pre_insert_map;
4899
4900/* Nonzero for expressions which should be deleted in a specific block. */
4901static sbitmap *pre_delete_map;
4902
4903/* Contains the edge_list returned by pre_edge_lcm. */
4904static struct edge_list *edge_list;
4905
a65f3558
JL
4906/* Redundant insns. */
4907static sbitmap pre_redundant_insns;
7506f491 4908
a65f3558 4909/* Allocate vars used for PRE analysis. */
7506f491
DE
4910
4911static void
a65f3558
JL
4912alloc_pre_mem (n_blocks, n_exprs)
4913 int n_blocks, n_exprs;
7506f491 4914{
a65f3558
JL
4915 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4916 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4917 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
5faf03ae 4918
a42cd965
AM
4919 pre_optimal = NULL;
4920 pre_redundant = NULL;
4921 pre_insert_map = NULL;
4922 pre_delete_map = NULL;
4923 ae_in = NULL;
4924 ae_out = NULL;
a42cd965 4925 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
c4c81601 4926
a42cd965 4927 /* pre_insert and pre_delete are allocated later. */
7506f491
DE
4928}
4929
a65f3558 4930/* Free vars used for PRE analysis. */
7506f491
DE
4931
4932static void
a65f3558 4933free_pre_mem ()
7506f491 4934{
5a660bff
DB
4935 sbitmap_vector_free (transp);
4936 sbitmap_vector_free (comp);
bd3675fc
JL
4937
4938 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
7506f491 4939
a42cd965 4940 if (pre_optimal)
5a660bff 4941 sbitmap_vector_free (pre_optimal);
a42cd965 4942 if (pre_redundant)
5a660bff 4943 sbitmap_vector_free (pre_redundant);
a42cd965 4944 if (pre_insert_map)
5a660bff 4945 sbitmap_vector_free (pre_insert_map);
a42cd965 4946 if (pre_delete_map)
5a660bff 4947 sbitmap_vector_free (pre_delete_map);
a42cd965 4948 if (ae_in)
5a660bff 4949 sbitmap_vector_free (ae_in);
a42cd965 4950 if (ae_out)
5a660bff 4951 sbitmap_vector_free (ae_out);
a42cd965 4952
bd3675fc 4953 transp = comp = NULL;
a42cd965 4954 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
55d3f917 4955 ae_in = ae_out = NULL;
7506f491
DE
4956}
4957
4958/* Top level routine to do the dataflow analysis needed by PRE. */
4959
4960static void
4961compute_pre_data ()
4962{
b614171e 4963 sbitmap trapping_expr;
e0082a72 4964 basic_block bb;
b614171e 4965 unsigned int ui;
c66e8ae9 4966
02280659 4967 compute_local_properties (transp, comp, antloc, &expr_hash_table);
d55bc081 4968 sbitmap_vector_zero (ae_kill, last_basic_block);
c66e8ae9 4969
b614171e 4970 /* Collect expressions which might trap. */
02280659 4971 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
b614171e 4972 sbitmap_zero (trapping_expr);
02280659 4973 for (ui = 0; ui < expr_hash_table.size; ui++)
b614171e
MM
4974 {
4975 struct expr *e;
02280659 4976 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
b614171e
MM
4977 if (may_trap_p (e->expr))
4978 SET_BIT (trapping_expr, e->bitmap_index);
4979 }
4980
c66e8ae9
JL
4981 /* Compute ae_kill for each basic block using:
4982
4983 ~(TRANSP | COMP)
4984
a2e90653 4985 This is significantly faster than compute_ae_kill. */
c66e8ae9 4986
e0082a72 4987 FOR_EACH_BB (bb)
c66e8ae9 4988 {
b614171e
MM
4989 edge e;
4990
4991 /* If the current block is the destination of an abnormal edge, we
4992 kill all trapping expressions because we won't be able to properly
4993 place the instruction on the edge. So make them neither
4994 anticipatable nor transparent. This is fairly conservative. */
e0082a72 4995 for (e = bb->pred; e ; e = e->pred_next)
b614171e
MM
4996 if (e->flags & EDGE_ABNORMAL)
4997 {
e0082a72
ZD
4998 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
4999 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
b614171e
MM
5000 break;
5001 }
5002
e0082a72
ZD
5003 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
5004 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
c66e8ae9
JL
5005 }
5006
02280659 5007 edge_list = pre_edge_lcm (gcse_file, expr_hash_table.n_elems, transp, comp, antloc,
a42cd965 5008 ae_kill, &pre_insert_map, &pre_delete_map);
5a660bff 5009 sbitmap_vector_free (antloc);
bd3675fc 5010 antloc = NULL;
5a660bff 5011 sbitmap_vector_free (ae_kill);
589005ff 5012 ae_kill = NULL;
76ac938b 5013 sbitmap_free (trapping_expr);
7506f491
DE
5014}
5015\f
5016/* PRE utilities */
5017
cc2902df 5018/* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
a65f3558 5019 block BB.
7506f491
DE
5020
5021 VISITED is a pointer to a working buffer for tracking which BB's have
5022 been visited. It is NULL for the top-level call.
5023
5024 We treat reaching expressions that go through blocks containing the same
5025 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
5026 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
5027 2 as not reaching. The intent is to improve the probability of finding
5028 only one reaching expression and to reduce register lifetimes by picking
5029 the closest such expression. */
5030
5031static int
89e606c9 5032pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited)
e2d2ed72 5033 basic_block occr_bb;
7506f491 5034 struct expr *expr;
e2d2ed72 5035 basic_block bb;
7506f491
DE
5036 char *visited;
5037{
36349f8b 5038 edge pred;
7506f491 5039
e2d2ed72 5040 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7506f491 5041 {
e2d2ed72 5042 basic_block pred_bb = pred->src;
7506f491 5043
36349f8b 5044 if (pred->src == ENTRY_BLOCK_PTR
7506f491 5045 /* Has predecessor has already been visited? */
0b17ab2f 5046 || visited[pred_bb->index])
c4c81601
RK
5047 ;/* Nothing to do. */
5048
7506f491 5049 /* Does this predecessor generate this expression? */
0b17ab2f 5050 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
7506f491
DE
5051 {
5052 /* Is this the occurrence we're looking for?
5053 Note that there's only one generating occurrence per block
5054 so we just need to check the block number. */
a65f3558 5055 if (occr_bb == pred_bb)
7506f491 5056 return 1;
c4c81601 5057
0b17ab2f 5058 visited[pred_bb->index] = 1;
7506f491
DE
5059 }
5060 /* Ignore this predecessor if it kills the expression. */
0b17ab2f
RH
5061 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
5062 visited[pred_bb->index] = 1;
c4c81601 5063
7506f491
DE
5064 /* Neither gen nor kill. */
5065 else
ac7c5af5 5066 {
0b17ab2f 5067 visited[pred_bb->index] = 1;
89e606c9 5068 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
7506f491 5069 return 1;
ac7c5af5 5070 }
7506f491
DE
5071 }
5072
5073 /* All paths have been checked. */
5074 return 0;
5075}
283a2545
RL
5076
5077/* The wrapper for pre_expr_reaches_here_work that ensures that any
dc297297 5078 memory allocated for that function is returned. */
283a2545
RL
5079
5080static int
89e606c9 5081pre_expr_reaches_here_p (occr_bb, expr, bb)
e2d2ed72 5082 basic_block occr_bb;
283a2545 5083 struct expr *expr;
e2d2ed72 5084 basic_block bb;
283a2545
RL
5085{
5086 int rval;
d55bc081 5087 char *visited = (char *) xcalloc (last_basic_block, 1);
283a2545 5088
8e42ace1 5089 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
283a2545
RL
5090
5091 free (visited);
c4c81601 5092 return rval;
283a2545 5093}
7506f491 5094\f
a42cd965
AM
5095
5096/* Given an expr, generate RTL which we can insert at the end of a BB,
589005ff 5097 or on an edge. Set the block number of any insns generated to
a42cd965
AM
5098 the value of BB. */
5099
5100static rtx
5101process_insert_insn (expr)
5102 struct expr *expr;
5103{
5104 rtx reg = expr->reaching_reg;
fb0c0a12
RK
5105 rtx exp = copy_rtx (expr->expr);
5106 rtx pat;
a42cd965
AM
5107
5108 start_sequence ();
fb0c0a12
RK
5109
5110 /* If the expression is something that's an operand, like a constant,
5111 just copy it to a register. */
5112 if (general_operand (exp, GET_MODE (reg)))
5113 emit_move_insn (reg, exp);
5114
5115 /* Otherwise, make a new insn to compute this expression and make sure the
5116 insn will be recognized (this also adds any needed CLOBBERs). Copy the
5117 expression to make sure we don't have any sharing issues. */
8d444206 5118 else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
fb0c0a12 5119 abort ();
589005ff 5120
2f937369 5121 pat = get_insns ();
a42cd965
AM
5122 end_sequence ();
5123
5124 return pat;
5125}
589005ff 5126
a65f3558
JL
5127/* Add EXPR to the end of basic block BB.
5128
5129 This is used by both the PRE and code hoisting.
5130
5131 For PRE, we want to verify that the expr is either transparent
5132 or locally anticipatable in the target block. This check makes
5133 no sense for code hoisting. */
7506f491
DE
5134
5135static void
a65f3558 5136insert_insn_end_bb (expr, bb, pre)
7506f491 5137 struct expr *expr;
e2d2ed72 5138 basic_block bb;
a65f3558 5139 int pre;
7506f491 5140{
e2d2ed72 5141 rtx insn = bb->end;
7506f491
DE
5142 rtx new_insn;
5143 rtx reg = expr->reaching_reg;
5144 int regno = REGNO (reg);
2f937369 5145 rtx pat, pat_end;
7506f491 5146
a42cd965 5147 pat = process_insert_insn (expr);
2f937369
DM
5148 if (pat == NULL_RTX || ! INSN_P (pat))
5149 abort ();
5150
5151 pat_end = pat;
5152 while (NEXT_INSN (pat_end) != NULL_RTX)
5153 pat_end = NEXT_INSN (pat_end);
7506f491
DE
5154
5155 /* If the last insn is a jump, insert EXPR in front [taking care to
068473ec
JH
5156 handle cc0, etc. properly]. Similary we need to care trapping
5157 instructions in presence of non-call exceptions. */
7506f491 5158
068473ec
JH
5159 if (GET_CODE (insn) == JUMP_INSN
5160 || (GET_CODE (insn) == INSN
5161 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL))))
7506f491 5162 {
50b2596f 5163#ifdef HAVE_cc0
7506f491 5164 rtx note;
50b2596f 5165#endif
068473ec
JH
5166 /* It should always be the case that we can put these instructions
5167 anywhere in the basic block with performing PRE optimizations.
5168 Check this. */
3b25fbfe 5169 if (GET_CODE (insn) == INSN && pre
0b17ab2f 5170 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
589005ff 5171 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
068473ec 5172 abort ();
7506f491
DE
5173
5174 /* If this is a jump table, then we can't insert stuff here. Since
5175 we know the previous real insn must be the tablejump, we insert
5176 the new instruction just before the tablejump. */
5177 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
5178 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
5179 insn = prev_real_insn (insn);
5180
5181#ifdef HAVE_cc0
5182 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
5183 if cc0 isn't set. */
5184 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
5185 if (note)
5186 insn = XEXP (note, 0);
5187 else
5188 {
5189 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
5190 if (maybe_cc0_setter
2c3c49de 5191 && INSN_P (maybe_cc0_setter)
7506f491
DE
5192 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
5193 insn = maybe_cc0_setter;
5194 }
5195#endif
5196 /* FIXME: What if something in cc0/jump uses value set in new insn? */
3c030e88 5197 new_insn = emit_insn_before (pat, insn);
3947e2f9 5198 }
c4c81601 5199
3947e2f9
RH
5200 /* Likewise if the last insn is a call, as will happen in the presence
5201 of exception handling. */
068473ec
JH
5202 else if (GET_CODE (insn) == CALL_INSN
5203 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL)))
3947e2f9 5204 {
3947e2f9
RH
5205 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
5206 we search backward and place the instructions before the first
5207 parameter is loaded. Do this for everyone for consistency and a
fbe5a4a6 5208 presumption that we'll get better code elsewhere as well.
3947e2f9 5209
c4c81601 5210 It should always be the case that we can put these instructions
a65f3558
JL
5211 anywhere in the basic block with performing PRE optimizations.
5212 Check this. */
c4c81601 5213
a65f3558 5214 if (pre
0b17ab2f 5215 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
589005ff 5216 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
3947e2f9
RH
5217 abort ();
5218
5219 /* Since different machines initialize their parameter registers
5220 in different orders, assume nothing. Collect the set of all
5221 parameter registers. */
833366d6 5222 insn = find_first_parameter_load (insn, bb->head);
3947e2f9 5223
b1d26727
JL
5224 /* If we found all the parameter loads, then we want to insert
5225 before the first parameter load.
5226
5227 If we did not find all the parameter loads, then we might have
5228 stopped on the head of the block, which could be a CODE_LABEL.
5229 If we inserted before the CODE_LABEL, then we would be putting
5230 the insn in the wrong basic block. In that case, put the insn
b5229628 5231 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
0a377997 5232 while (GET_CODE (insn) == CODE_LABEL
589ca5cb 5233 || NOTE_INSN_BASIC_BLOCK_P (insn))
b5229628 5234 insn = NEXT_INSN (insn);
c4c81601 5235
3c030e88 5236 new_insn = emit_insn_before (pat, insn);
7506f491
DE
5237 }
5238 else
3c030e88 5239 new_insn = emit_insn_after (pat, insn);
7506f491 5240
2f937369 5241 while (1)
a65f3558 5242 {
2f937369 5243 if (INSN_P (pat))
a65f3558 5244 {
2f937369
DM
5245 add_label_notes (PATTERN (pat), new_insn);
5246 note_stores (PATTERN (pat), record_set_info, pat);
a65f3558 5247 }
2f937369
DM
5248 if (pat == pat_end)
5249 break;
5250 pat = NEXT_INSN (pat);
a65f3558 5251 }
3947e2f9 5252
7506f491
DE
5253 gcse_create_count++;
5254
5255 if (gcse_file)
5256 {
c4c81601 5257 fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ",
0b17ab2f 5258 bb->index, INSN_UID (new_insn));
c4c81601
RK
5259 fprintf (gcse_file, "copying expression %d to reg %d\n",
5260 expr->bitmap_index, regno);
7506f491
DE
5261 }
5262}
5263
a42cd965
AM
5264/* Insert partially redundant expressions on edges in the CFG to make
5265 the expressions fully redundant. */
7506f491 5266
a42cd965
AM
5267static int
5268pre_edge_insert (edge_list, index_map)
5269 struct edge_list *edge_list;
7506f491
DE
5270 struct expr **index_map;
5271{
c4c81601 5272 int e, i, j, num_edges, set_size, did_insert = 0;
a65f3558
JL
5273 sbitmap *inserted;
5274
a42cd965
AM
5275 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
5276 if it reaches any of the deleted expressions. */
7506f491 5277
a42cd965
AM
5278 set_size = pre_insert_map[0]->size;
5279 num_edges = NUM_EDGES (edge_list);
02280659 5280 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
a42cd965 5281 sbitmap_vector_zero (inserted, num_edges);
7506f491 5282
a42cd965 5283 for (e = 0; e < num_edges; e++)
7506f491
DE
5284 {
5285 int indx;
e2d2ed72 5286 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
a65f3558 5287
a65f3558 5288 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
7506f491 5289 {
a42cd965 5290 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
7506f491 5291
02280659 5292 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
c4c81601
RK
5293 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
5294 {
5295 struct expr *expr = index_map[j];
5296 struct occr *occr;
a65f3558 5297
ff7cc307 5298 /* Now look at each deleted occurrence of this expression. */
c4c81601
RK
5299 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5300 {
5301 if (! occr->deleted_p)
5302 continue;
5303
5304 /* Insert this expression on this edge if if it would
ff7cc307 5305 reach the deleted occurrence in BB. */
c4c81601
RK
5306 if (!TEST_BIT (inserted[e], j))
5307 {
5308 rtx insn;
5309 edge eg = INDEX_EDGE (edge_list, e);
5310
5311 /* We can't insert anything on an abnormal and
5312 critical edge, so we insert the insn at the end of
5313 the previous block. There are several alternatives
5314 detailed in Morgans book P277 (sec 10.5) for
5315 handling this situation. This one is easiest for
5316 now. */
5317
5318 if ((eg->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
5319 insert_insn_end_bb (index_map[j], bb, 0);
5320 else
5321 {
5322 insn = process_insert_insn (index_map[j]);
5323 insert_insn_on_edge (insn, eg);
5324 }
5325
5326 if (gcse_file)
5327 {
5328 fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ",
0b17ab2f
RH
5329 bb->index,
5330 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
c4c81601
RK
5331 fprintf (gcse_file, "copy expression %d\n",
5332 expr->bitmap_index);
5333 }
5334
a13d4ebf 5335 update_ld_motion_stores (expr);
c4c81601
RK
5336 SET_BIT (inserted[e], j);
5337 did_insert = 1;
5338 gcse_create_count++;
5339 }
5340 }
5341 }
7506f491
DE
5342 }
5343 }
5faf03ae 5344
5a660bff 5345 sbitmap_vector_free (inserted);
a42cd965 5346 return did_insert;
7506f491
DE
5347}
5348
c4c81601 5349/* Copy the result of INSN to REG. INDX is the expression number. */
7506f491
DE
5350
5351static void
5352pre_insert_copy_insn (expr, insn)
5353 struct expr *expr;
5354 rtx insn;
5355{
5356 rtx reg = expr->reaching_reg;
5357 int regno = REGNO (reg);
5358 int indx = expr->bitmap_index;
5359 rtx set = single_set (insn);
5360 rtx new_insn;
5361
5362 if (!set)
5363 abort ();
c4c81601 5364
cccf0ae8 5365 new_insn = emit_insn_after (gen_move_insn (reg, SET_DEST (set)), insn);
c4c81601 5366
7506f491
DE
5367 /* Keep register set table up to date. */
5368 record_one_set (regno, new_insn);
5369
5370 gcse_create_count++;
5371
5372 if (gcse_file)
a42cd965
AM
5373 fprintf (gcse_file,
5374 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
5375 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
5376 INSN_UID (insn), regno);
222f7ba9 5377 update_ld_motion_stores (expr);
7506f491
DE
5378}
5379
5380/* Copy available expressions that reach the redundant expression
5381 to `reaching_reg'. */
5382
5383static void
5384pre_insert_copies ()
5385{
2e653e39 5386 unsigned int i;
c4c81601
RK
5387 struct expr *expr;
5388 struct occr *occr;
5389 struct occr *avail;
a65f3558 5390
7506f491
DE
5391 /* For each available expression in the table, copy the result to
5392 `reaching_reg' if the expression reaches a deleted one.
5393
5394 ??? The current algorithm is rather brute force.
5395 Need to do some profiling. */
5396
02280659
ZD
5397 for (i = 0; i < expr_hash_table.size; i++)
5398 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
5399 {
5400 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
5401 we don't want to insert a copy here because the expression may not
5402 really be redundant. So only insert an insn if the expression was
5403 deleted. This test also avoids further processing if the
5404 expression wasn't deleted anywhere. */
5405 if (expr->reaching_reg == NULL)
5406 continue;
5407
5408 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5409 {
5410 if (! occr->deleted_p)
5411 continue;
7506f491 5412
c4c81601
RK
5413 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
5414 {
5415 rtx insn = avail->insn;
7506f491 5416
c4c81601
RK
5417 /* No need to handle this one if handled already. */
5418 if (avail->copied_p)
5419 continue;
7506f491 5420
c4c81601
RK
5421 /* Don't handle this one if it's a redundant one. */
5422 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
5423 continue;
7506f491 5424
c4c81601 5425 /* Or if the expression doesn't reach the deleted one. */
589005ff 5426 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
e2d2ed72
AM
5427 expr,
5428 BLOCK_FOR_INSN (occr->insn)))
c4c81601 5429 continue;
7506f491 5430
c4c81601
RK
5431 /* Copy the result of avail to reaching_reg. */
5432 pre_insert_copy_insn (expr, insn);
5433 avail->copied_p = 1;
5434 }
5435 }
5436 }
7506f491
DE
5437}
5438
10d1bb36
JH
5439/* Emit move from SRC to DEST noting the equivalence with expression computed
5440 in INSN. */
5441static rtx
5442gcse_emit_move_after (src, dest, insn)
5443 rtx src, dest, insn;
5444{
5445 rtx new;
6bdb8dd6 5446 rtx set = single_set (insn), set2;
10d1bb36
JH
5447 rtx note;
5448 rtx eqv;
5449
5450 /* This should never fail since we're creating a reg->reg copy
5451 we've verified to be valid. */
5452
6bdb8dd6 5453 new = emit_insn_after (gen_move_insn (dest, src), insn);
285464d0 5454
10d1bb36 5455 /* Note the equivalence for local CSE pass. */
6bdb8dd6
JH
5456 set2 = single_set (new);
5457 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
5458 return new;
10d1bb36
JH
5459 if ((note = find_reg_equal_equiv_note (insn)))
5460 eqv = XEXP (note, 0);
5461 else
5462 eqv = SET_SRC (set);
5463
a500466b 5464 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
10d1bb36
JH
5465
5466 return new;
5467}
5468
7506f491 5469/* Delete redundant computations.
7506f491
DE
5470 Deletion is done by changing the insn to copy the `reaching_reg' of
5471 the expression into the result of the SET. It is left to later passes
5472 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
5473
cc2902df 5474 Returns nonzero if a change is made. */
7506f491
DE
5475
5476static int
5477pre_delete ()
5478{
2e653e39 5479 unsigned int i;
63bc1d05 5480 int changed;
c4c81601
RK
5481 struct expr *expr;
5482 struct occr *occr;
a65f3558 5483
7506f491 5484 changed = 0;
02280659
ZD
5485 for (i = 0; i < expr_hash_table.size; i++)
5486 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
5487 {
5488 int indx = expr->bitmap_index;
7506f491 5489
c4c81601
RK
5490 /* We only need to search antic_occr since we require
5491 ANTLOC != 0. */
7506f491 5492
c4c81601
RK
5493 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5494 {
5495 rtx insn = occr->insn;
5496 rtx set;
e2d2ed72 5497 basic_block bb = BLOCK_FOR_INSN (insn);
7506f491 5498
0b17ab2f 5499 if (TEST_BIT (pre_delete_map[bb->index], indx))
c4c81601
RK
5500 {
5501 set = single_set (insn);
5502 if (! set)
5503 abort ();
5504
5505 /* Create a pseudo-reg to store the result of reaching
5506 expressions into. Get the mode for the new pseudo from
5507 the mode of the original destination pseudo. */
5508 if (expr->reaching_reg == NULL)
5509 expr->reaching_reg
5510 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
5511
10d1bb36
JH
5512 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
5513 delete_insn (insn);
5514 occr->deleted_p = 1;
5515 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
5516 changed = 1;
5517 gcse_subst_count++;
7506f491 5518
c4c81601
RK
5519 if (gcse_file)
5520 {
5521 fprintf (gcse_file,
5522 "PRE: redundant insn %d (expression %d) in ",
5523 INSN_UID (insn), indx);
5524 fprintf (gcse_file, "bb %d, reaching reg is %d\n",
0b17ab2f 5525 bb->index, REGNO (expr->reaching_reg));
c4c81601
RK
5526 }
5527 }
5528 }
5529 }
7506f491
DE
5530
5531 return changed;
5532}
5533
5534/* Perform GCSE optimizations using PRE.
5535 This is called by one_pre_gcse_pass after all the dataflow analysis
5536 has been done.
5537
c4c81601
RK
5538 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
5539 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
5540 Compiler Design and Implementation.
7506f491 5541
c4c81601
RK
5542 ??? A new pseudo reg is created to hold the reaching expression. The nice
5543 thing about the classical approach is that it would try to use an existing
5544 reg. If the register can't be adequately optimized [i.e. we introduce
5545 reload problems], one could add a pass here to propagate the new register
5546 through the block.
7506f491 5547
c4c81601
RK
5548 ??? We don't handle single sets in PARALLELs because we're [currently] not
5549 able to copy the rest of the parallel when we insert copies to create full
5550 redundancies from partial redundancies. However, there's no reason why we
5551 can't handle PARALLELs in the cases where there are no partial
7506f491
DE
5552 redundancies. */
5553
5554static int
5555pre_gcse ()
5556{
2e653e39
RK
5557 unsigned int i;
5558 int did_insert, changed;
7506f491 5559 struct expr **index_map;
c4c81601 5560 struct expr *expr;
7506f491
DE
5561
5562 /* Compute a mapping from expression number (`bitmap_index') to
5563 hash table entry. */
5564
02280659
ZD
5565 index_map = (struct expr **) xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
5566 for (i = 0; i < expr_hash_table.size; i++)
5567 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601 5568 index_map[expr->bitmap_index] = expr;
7506f491
DE
5569
5570 /* Reset bitmap used to track which insns are redundant. */
a65f3558
JL
5571 pre_redundant_insns = sbitmap_alloc (max_cuid);
5572 sbitmap_zero (pre_redundant_insns);
7506f491
DE
5573
5574 /* Delete the redundant insns first so that
5575 - we know what register to use for the new insns and for the other
5576 ones with reaching expressions
5577 - we know which insns are redundant when we go to create copies */
c4c81601 5578
7506f491
DE
5579 changed = pre_delete ();
5580
a42cd965 5581 did_insert = pre_edge_insert (edge_list, index_map);
c4c81601 5582
7506f491 5583 /* In other places with reaching expressions, copy the expression to the
a42cd965 5584 specially allocated pseudo-reg that reaches the redundant expr. */
7506f491 5585 pre_insert_copies ();
a42cd965
AM
5586 if (did_insert)
5587 {
5588 commit_edge_insertions ();
5589 changed = 1;
5590 }
7506f491 5591
283a2545 5592 free (index_map);
76ac938b 5593 sbitmap_free (pre_redundant_insns);
7506f491
DE
5594 return changed;
5595}
5596
5597/* Top level routine to perform one PRE GCSE pass.
5598
cc2902df 5599 Return nonzero if a change was made. */
7506f491
DE
5600
5601static int
b5ce41ff 5602one_pre_gcse_pass (pass)
7506f491
DE
5603 int pass;
5604{
5605 int changed = 0;
5606
5607 gcse_subst_count = 0;
5608 gcse_create_count = 0;
5609
02280659 5610 alloc_hash_table (max_cuid, &expr_hash_table, 0);
a42cd965 5611 add_noreturn_fake_exit_edges ();
a13d4ebf
AM
5612 if (flag_gcse_lm)
5613 compute_ld_motion_mems ();
5614
02280659 5615 compute_hash_table (&expr_hash_table);
a13d4ebf 5616 trim_ld_motion_mems ();
7506f491 5617 if (gcse_file)
02280659 5618 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
c4c81601 5619
02280659 5620 if (expr_hash_table.n_elems > 0)
7506f491 5621 {
02280659 5622 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
7506f491
DE
5623 compute_pre_data ();
5624 changed |= pre_gcse ();
a42cd965 5625 free_edge_list (edge_list);
7506f491
DE
5626 free_pre_mem ();
5627 }
c4c81601 5628
a13d4ebf 5629 free_ldst_mems ();
a42cd965 5630 remove_fake_edges ();
02280659 5631 free_hash_table (&expr_hash_table);
7506f491
DE
5632
5633 if (gcse_file)
5634 {
c4c81601
RK
5635 fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
5636 current_function_name, pass, bytes_used);
5637 fprintf (gcse_file, "%d substs, %d insns created\n",
5638 gcse_subst_count, gcse_create_count);
7506f491
DE
5639 }
5640
5641 return changed;
5642}
aeb2f500
JW
5643\f
5644/* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
5b1ef594
JDA
5645 If notes are added to an insn which references a CODE_LABEL, the
5646 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
5647 because the following loop optimization pass requires them. */
aeb2f500
JW
5648
5649/* ??? This is very similar to the loop.c add_label_notes function. We
5650 could probably share code here. */
5651
5652/* ??? If there was a jump optimization pass after gcse and before loop,
5653 then we would not need to do this here, because jump would add the
5654 necessary REG_LABEL notes. */
5655
5656static void
5657add_label_notes (x, insn)
5658 rtx x;
5659 rtx insn;
5660{
5661 enum rtx_code code = GET_CODE (x);
5662 int i, j;
6f7d635c 5663 const char *fmt;
aeb2f500
JW
5664
5665 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
5666 {
6b3603c2 5667 /* This code used to ignore labels that referred to dispatch tables to
ac7c5af5 5668 avoid flow generating (slighly) worse code.
6b3603c2 5669
ac7c5af5
JL
5670 We no longer ignore such label references (see LABEL_REF handling in
5671 mark_jump_label for additional information). */
c4c81601 5672
6b8c9327 5673 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
6b3603c2 5674 REG_NOTES (insn));
5b1ef594 5675 if (LABEL_P (XEXP (x, 0)))
589005ff 5676 LABEL_NUSES (XEXP (x, 0))++;
aeb2f500
JW
5677 return;
5678 }
5679
c4c81601 5680 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
aeb2f500
JW
5681 {
5682 if (fmt[i] == 'e')
5683 add_label_notes (XEXP (x, i), insn);
5684 else if (fmt[i] == 'E')
5685 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5686 add_label_notes (XVECEXP (x, i, j), insn);
5687 }
5688}
a65f3558
JL
5689
5690/* Compute transparent outgoing information for each block.
5691
5692 An expression is transparent to an edge unless it is killed by
5693 the edge itself. This can only happen with abnormal control flow,
5694 when the edge is traversed through a call. This happens with
5695 non-local labels and exceptions.
5696
5697 This would not be necessary if we split the edge. While this is
5698 normally impossible for abnormal critical edges, with some effort
5699 it should be possible with exception handling, since we still have
5700 control over which handler should be invoked. But due to increased
5701 EH table sizes, this may not be worthwhile. */
5702
5703static void
5704compute_transpout ()
5705{
e0082a72 5706 basic_block bb;
2e653e39 5707 unsigned int i;
c4c81601 5708 struct expr *expr;
a65f3558 5709
d55bc081 5710 sbitmap_vector_ones (transpout, last_basic_block);
a65f3558 5711
e0082a72 5712 FOR_EACH_BB (bb)
a65f3558 5713 {
a65f3558
JL
5714 /* Note that flow inserted a nop a the end of basic blocks that
5715 end in call instructions for reasons other than abnormal
5716 control flow. */
e0082a72 5717 if (GET_CODE (bb->end) != CALL_INSN)
a65f3558
JL
5718 continue;
5719
02280659
ZD
5720 for (i = 0; i < expr_hash_table.size; i++)
5721 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
c4c81601
RK
5722 if (GET_CODE (expr->expr) == MEM)
5723 {
5724 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
5725 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
5726 continue;
589005ff 5727
c4c81601
RK
5728 /* ??? Optimally, we would use interprocedural alias
5729 analysis to determine if this mem is actually killed
5730 by this call. */
e0082a72 5731 RESET_BIT (transpout[bb->index], expr->bitmap_index);
c4c81601 5732 }
a65f3558
JL
5733 }
5734}
dfdb644f
JL
5735
5736/* Removal of useless null pointer checks */
5737
dfdb644f 5738/* Called via note_stores. X is set by SETTER. If X is a register we must
0511851c
MM
5739 invalidate nonnull_local and set nonnull_killed. DATA is really a
5740 `null_pointer_info *'.
dfdb644f
JL
5741
5742 We ignore hard registers. */
c4c81601 5743
dfdb644f 5744static void
84832317 5745invalidate_nonnull_info (x, setter, data)
dfdb644f
JL
5746 rtx x;
5747 rtx setter ATTRIBUTE_UNUSED;
0511851c 5748 void *data;
dfdb644f 5749{
770ae6cc
RK
5750 unsigned int regno;
5751 struct null_pointer_info *npi = (struct null_pointer_info *) data;
c4c81601 5752
dfdb644f
JL
5753 while (GET_CODE (x) == SUBREG)
5754 x = SUBREG_REG (x);
5755
5756 /* Ignore anything that is not a register or is a hard register. */
5757 if (GET_CODE (x) != REG
0511851c
MM
5758 || REGNO (x) < npi->min_reg
5759 || REGNO (x) >= npi->max_reg)
dfdb644f
JL
5760 return;
5761
0511851c 5762 regno = REGNO (x) - npi->min_reg;
dfdb644f 5763
e0082a72
ZD
5764 RESET_BIT (npi->nonnull_local[npi->current_block->index], regno);
5765 SET_BIT (npi->nonnull_killed[npi->current_block->index], regno);
dfdb644f
JL
5766}
5767
0511851c
MM
5768/* Do null-pointer check elimination for the registers indicated in
5769 NPI. NONNULL_AVIN and NONNULL_AVOUT are pre-allocated sbitmaps;
5770 they are not our responsibility to free. */
dfdb644f 5771
99a15921 5772static int
9cd56be1 5773delete_null_pointer_checks_1 (block_reg, nonnull_avin,
8e184d9c 5774 nonnull_avout, npi)
770ae6cc 5775 unsigned int *block_reg;
0511851c
MM
5776 sbitmap *nonnull_avin;
5777 sbitmap *nonnull_avout;
5778 struct null_pointer_info *npi;
dfdb644f 5779{
e0082a72 5780 basic_block bb, current_block;
0511851c
MM
5781 sbitmap *nonnull_local = npi->nonnull_local;
5782 sbitmap *nonnull_killed = npi->nonnull_killed;
99a15921 5783 int something_changed = 0;
589005ff 5784
dfdb644f
JL
5785 /* Compute local properties, nonnull and killed. A register will have
5786 the nonnull property if at the end of the current block its value is
5787 known to be nonnull. The killed property indicates that somewhere in
5788 the block any information we had about the register is killed.
5789
5790 Note that a register can have both properties in a single block. That
5791 indicates that it's killed, then later in the block a new value is
5792 computed. */
d55bc081
ZD
5793 sbitmap_vector_zero (nonnull_local, last_basic_block);
5794 sbitmap_vector_zero (nonnull_killed, last_basic_block);
c4c81601 5795
e0082a72 5796 FOR_EACH_BB (current_block)
dfdb644f
JL
5797 {
5798 rtx insn, stop_insn;
5799
0511851c
MM
5800 /* Set the current block for invalidate_nonnull_info. */
5801 npi->current_block = current_block;
5802
dfdb644f
JL
5803 /* Scan each insn in the basic block looking for memory references and
5804 register sets. */
e0082a72
ZD
5805 stop_insn = NEXT_INSN (current_block->end);
5806 for (insn = current_block->head;
dfdb644f
JL
5807 insn != stop_insn;
5808 insn = NEXT_INSN (insn))
5809 {
5810 rtx set;
0511851c 5811 rtx reg;
dfdb644f
JL
5812
5813 /* Ignore anything that is not a normal insn. */
2c3c49de 5814 if (! INSN_P (insn))
dfdb644f
JL
5815 continue;
5816
5817 /* Basically ignore anything that is not a simple SET. We do have
5818 to make sure to invalidate nonnull_local and set nonnull_killed
5819 for such insns though. */
5820 set = single_set (insn);
5821 if (!set)
5822 {
0511851c 5823 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
dfdb644f
JL
5824 continue;
5825 }
5826
f63d1bf7 5827 /* See if we've got a usable memory load. We handle it first
dfdb644f
JL
5828 in case it uses its address register as a dest (which kills
5829 the nonnull property). */
5830 if (GET_CODE (SET_SRC (set)) == MEM
0511851c
MM
5831 && GET_CODE ((reg = XEXP (SET_SRC (set), 0))) == REG
5832 && REGNO (reg) >= npi->min_reg
5833 && REGNO (reg) < npi->max_reg)
e0082a72 5834 SET_BIT (nonnull_local[current_block->index],
0511851c 5835 REGNO (reg) - npi->min_reg);
dfdb644f
JL
5836
5837 /* Now invalidate stuff clobbered by this insn. */
0511851c 5838 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
dfdb644f
JL
5839
5840 /* And handle stores, we do these last since any sets in INSN can
5841 not kill the nonnull property if it is derived from a MEM
5842 appearing in a SET_DEST. */
5843 if (GET_CODE (SET_DEST (set)) == MEM
0511851c
MM
5844 && GET_CODE ((reg = XEXP (SET_DEST (set), 0))) == REG
5845 && REGNO (reg) >= npi->min_reg
5846 && REGNO (reg) < npi->max_reg)
e0082a72 5847 SET_BIT (nonnull_local[current_block->index],
0511851c 5848 REGNO (reg) - npi->min_reg);
dfdb644f
JL
5849 }
5850 }
5851
5852 /* Now compute global properties based on the local properties. This
fbe5a4a6 5853 is a classic global availability algorithm. */
ce724250
JL
5854 compute_available (nonnull_local, nonnull_killed,
5855 nonnull_avout, nonnull_avin);
dfdb644f
JL
5856
5857 /* Now look at each bb and see if it ends with a compare of a value
5858 against zero. */
e0082a72 5859 FOR_EACH_BB (bb)
dfdb644f 5860 {
e0082a72 5861 rtx last_insn = bb->end;
0511851c 5862 rtx condition, earliest;
dfdb644f
JL
5863 int compare_and_branch;
5864
0511851c
MM
5865 /* Since MIN_REG is always at least FIRST_PSEUDO_REGISTER, and
5866 since BLOCK_REG[BB] is zero if this block did not end with a
5867 comparison against zero, this condition works. */
e0082a72
ZD
5868 if (block_reg[bb->index] < npi->min_reg
5869 || block_reg[bb->index] >= npi->max_reg)
dfdb644f
JL
5870 continue;
5871
5872 /* LAST_INSN is a conditional jump. Get its condition. */
5873 condition = get_condition (last_insn, &earliest);
5874
40d7a3fe
NB
5875 /* If we can't determine the condition then skip. */
5876 if (! condition)
5877 continue;
5878
dfdb644f 5879 /* Is the register known to have a nonzero value? */
e0082a72 5880 if (!TEST_BIT (nonnull_avout[bb->index], block_reg[bb->index] - npi->min_reg))
dfdb644f
JL
5881 continue;
5882
5883 /* Try to compute whether the compare/branch at the loop end is one or
5884 two instructions. */
5885 if (earliest == last_insn)
5886 compare_and_branch = 1;
5887 else if (earliest == prev_nonnote_insn (last_insn))
5888 compare_and_branch = 2;
5889 else
5890 continue;
5891
5892 /* We know the register in this comparison is nonnull at exit from
5893 this block. We can optimize this comparison. */
5894 if (GET_CODE (condition) == NE)
5895 {
5896 rtx new_jump;
5897
38c1593d
JH
5898 new_jump = emit_jump_insn_after (gen_jump (JUMP_LABEL (last_insn)),
5899 last_insn);
dfdb644f
JL
5900 JUMP_LABEL (new_jump) = JUMP_LABEL (last_insn);
5901 LABEL_NUSES (JUMP_LABEL (new_jump))++;
5902 emit_barrier_after (new_jump);
5903 }
8e184d9c 5904
99a15921 5905 something_changed = 1;
9cd56be1 5906 delete_insn (last_insn);
dfdb644f 5907 if (compare_and_branch == 2)
589005ff 5908 delete_insn (earliest);
e0082a72 5909 purge_dead_edges (bb);
0511851c
MM
5910
5911 /* Don't check this block again. (Note that BLOCK_END is
589005ff 5912 invalid here; we deleted the last instruction in the
0511851c 5913 block.) */
e0082a72 5914 block_reg[bb->index] = 0;
0511851c 5915 }
99a15921
JL
5916
5917 return something_changed;
0511851c
MM
5918}
5919
5920/* Find EQ/NE comparisons against zero which can be (indirectly) evaluated
5921 at compile time.
5922
5923 This is conceptually similar to global constant/copy propagation and
5924 classic global CSE (it even uses the same dataflow equations as cprop).
5925
5926 If a register is used as memory address with the form (mem (reg)), then we
5927 know that REG can not be zero at that point in the program. Any instruction
5928 which sets REG "kills" this property.
5929
5930 So, if every path leading to a conditional branch has an available memory
5931 reference of that form, then we know the register can not have the value
589005ff 5932 zero at the conditional branch.
0511851c 5933
fbe5a4a6 5934 So we merely need to compute the local properties and propagate that data
0511851c
MM
5935 around the cfg, then optimize where possible.
5936
5937 We run this pass two times. Once before CSE, then again after CSE. This
5938 has proven to be the most profitable approach. It is rare for new
5939 optimization opportunities of this nature to appear after the first CSE
5940 pass.
5941
5942 This could probably be integrated with global cprop with a little work. */
5943
99a15921 5944int
0511851c 5945delete_null_pointer_checks (f)
2e653e39 5946 rtx f ATTRIBUTE_UNUSED;
0511851c 5947{
0511851c 5948 sbitmap *nonnull_avin, *nonnull_avout;
770ae6cc 5949 unsigned int *block_reg;
e0082a72 5950 basic_block bb;
0511851c
MM
5951 int reg;
5952 int regs_per_pass;
5953 int max_reg;
5954 struct null_pointer_info npi;
99a15921 5955 int something_changed = 0;
0511851c 5956
0511851c 5957 /* If we have only a single block, then there's nothing to do. */
0b17ab2f 5958 if (n_basic_blocks <= 1)
99a15921 5959 return 0;
0511851c
MM
5960
5961 /* Trying to perform global optimizations on flow graphs which have
5962 a high connectivity will take a long time and is unlikely to be
5963 particularly useful.
5964
43e72072 5965 In normal circumstances a cfg should have about twice as many edges
0511851c
MM
5966 as blocks. But we do not want to punish small functions which have
5967 a couple switch statements. So we require a relatively large number
5968 of basic blocks and the ratio of edges to blocks to be high. */
0b17ab2f 5969 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
99a15921 5970 return 0;
0511851c 5971
0511851c
MM
5972 /* We need four bitmaps, each with a bit for each register in each
5973 basic block. */
5974 max_reg = max_reg_num ();
d55bc081 5975 regs_per_pass = get_bitmap_width (4, last_basic_block, max_reg);
0511851c
MM
5976
5977 /* Allocate bitmaps to hold local and global properties. */
d55bc081
ZD
5978 npi.nonnull_local = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
5979 npi.nonnull_killed = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
5980 nonnull_avin = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
5981 nonnull_avout = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
0511851c
MM
5982
5983 /* Go through the basic blocks, seeing whether or not each block
5984 ends with a conditional branch whose condition is a comparison
5985 against zero. Record the register compared in BLOCK_REG. */
d55bc081 5986 block_reg = (unsigned int *) xcalloc (last_basic_block, sizeof (int));
e0082a72 5987 FOR_EACH_BB (bb)
0511851c 5988 {
e0082a72 5989 rtx last_insn = bb->end;
0511851c
MM
5990 rtx condition, earliest, reg;
5991
5992 /* We only want conditional branches. */
5993 if (GET_CODE (last_insn) != JUMP_INSN
7f1c097d
JH
5994 || !any_condjump_p (last_insn)
5995 || !onlyjump_p (last_insn))
0511851c
MM
5996 continue;
5997
5998 /* LAST_INSN is a conditional jump. Get its condition. */
5999 condition = get_condition (last_insn, &earliest);
6000
4fe9b91c 6001 /* If we were unable to get the condition, or it is not an equality
0511851c
MM
6002 comparison against zero then there's nothing we can do. */
6003 if (!condition
6004 || (GET_CODE (condition) != NE && GET_CODE (condition) != EQ)
6005 || GET_CODE (XEXP (condition, 1)) != CONST_INT
589005ff 6006 || (XEXP (condition, 1)
0511851c
MM
6007 != CONST0_RTX (GET_MODE (XEXP (condition, 0)))))
6008 continue;
6009
6010 /* We must be checking a register against zero. */
6011 reg = XEXP (condition, 0);
6012 if (GET_CODE (reg) != REG)
6013 continue;
6014
e0082a72 6015 block_reg[bb->index] = REGNO (reg);
0511851c
MM
6016 }
6017
6018 /* Go through the algorithm for each block of registers. */
6019 for (reg = FIRST_PSEUDO_REGISTER; reg < max_reg; reg += regs_per_pass)
6020 {
6021 npi.min_reg = reg;
6022 npi.max_reg = MIN (reg + regs_per_pass, max_reg);
99a15921
JL
6023 something_changed |= delete_null_pointer_checks_1 (block_reg,
6024 nonnull_avin,
6025 nonnull_avout,
6026 &npi);
dfdb644f
JL
6027 }
6028
0511851c
MM
6029 /* Free the table of registers compared at the end of every block. */
6030 free (block_reg);
6031
dfdb644f 6032 /* Free bitmaps. */
5a660bff
DB
6033 sbitmap_vector_free (npi.nonnull_local);
6034 sbitmap_vector_free (npi.nonnull_killed);
6035 sbitmap_vector_free (nonnull_avin);
6036 sbitmap_vector_free (nonnull_avout);
99a15921
JL
6037
6038 return something_changed;
dfdb644f 6039}
bb457bd9
JL
6040
6041/* Code Hoisting variables and subroutines. */
6042
6043/* Very busy expressions. */
6044static sbitmap *hoist_vbein;
6045static sbitmap *hoist_vbeout;
6046
6047/* Hoistable expressions. */
6048static sbitmap *hoist_exprs;
6049
6050/* Dominator bitmaps. */
355be0dc 6051dominance_info dominators;
bb457bd9
JL
6052
6053/* ??? We could compute post dominators and run this algorithm in
68e82b83 6054 reverse to perform tail merging, doing so would probably be
bb457bd9
JL
6055 more effective than the tail merging code in jump.c.
6056
6057 It's unclear if tail merging could be run in parallel with
6058 code hoisting. It would be nice. */
6059
6060/* Allocate vars used for code hoisting analysis. */
6061
6062static void
6063alloc_code_hoist_mem (n_blocks, n_exprs)
6064 int n_blocks, n_exprs;
6065{
6066 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
6067 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
6068 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
6069
6070 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
6071 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
6072 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
6073 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
bb457bd9
JL
6074}
6075
6076/* Free vars used for code hoisting analysis. */
6077
6078static void
6079free_code_hoist_mem ()
6080{
5a660bff
DB
6081 sbitmap_vector_free (antloc);
6082 sbitmap_vector_free (transp);
6083 sbitmap_vector_free (comp);
bb457bd9 6084
5a660bff
DB
6085 sbitmap_vector_free (hoist_vbein);
6086 sbitmap_vector_free (hoist_vbeout);
6087 sbitmap_vector_free (hoist_exprs);
6088 sbitmap_vector_free (transpout);
bb457bd9 6089
355be0dc 6090 free_dominance_info (dominators);
bb457bd9
JL
6091}
6092
6093/* Compute the very busy expressions at entry/exit from each block.
6094
6095 An expression is very busy if all paths from a given point
6096 compute the expression. */
6097
6098static void
6099compute_code_hoist_vbeinout ()
6100{
e0082a72
ZD
6101 int changed, passes;
6102 basic_block bb;
bb457bd9 6103
d55bc081
ZD
6104 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
6105 sbitmap_vector_zero (hoist_vbein, last_basic_block);
bb457bd9
JL
6106
6107 passes = 0;
6108 changed = 1;
c4c81601 6109
bb457bd9
JL
6110 while (changed)
6111 {
6112 changed = 0;
c4c81601 6113
bb457bd9
JL
6114 /* We scan the blocks in the reverse order to speed up
6115 the convergence. */
e0082a72 6116 FOR_EACH_BB_REVERSE (bb)
bb457bd9 6117 {
e0082a72
ZD
6118 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
6119 hoist_vbeout[bb->index], transp[bb->index]);
6120 if (bb->next_bb != EXIT_BLOCK_PTR)
6121 sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
bb457bd9 6122 }
c4c81601 6123
bb457bd9
JL
6124 passes++;
6125 }
6126
6127 if (gcse_file)
6128 fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes);
6129}
6130
6131/* Top level routine to do the dataflow analysis needed by code hoisting. */
6132
6133static void
6134compute_code_hoist_data ()
6135{
02280659 6136 compute_local_properties (transp, comp, antloc, &expr_hash_table);
bb457bd9
JL
6137 compute_transpout ();
6138 compute_code_hoist_vbeinout ();
355be0dc 6139 dominators = calculate_dominance_info (CDI_DOMINATORS);
bb457bd9
JL
6140 if (gcse_file)
6141 fprintf (gcse_file, "\n");
6142}
6143
6144/* Determine if the expression identified by EXPR_INDEX would
6145 reach BB unimpared if it was placed at the end of EXPR_BB.
6146
6147 It's unclear exactly what Muchnick meant by "unimpared". It seems
6148 to me that the expression must either be computed or transparent in
6149 *every* block in the path(s) from EXPR_BB to BB. Any other definition
6150 would allow the expression to be hoisted out of loops, even if
6151 the expression wasn't a loop invariant.
6152
6153 Contrast this to reachability for PRE where an expression is
6154 considered reachable if *any* path reaches instead of *all*
6155 paths. */
6156
6157static int
6158hoist_expr_reaches_here_p (expr_bb, expr_index, bb, visited)
e2d2ed72 6159 basic_block expr_bb;
bb457bd9 6160 int expr_index;
e2d2ed72 6161 basic_block bb;
bb457bd9
JL
6162 char *visited;
6163{
6164 edge pred;
283a2545 6165 int visited_allocated_locally = 0;
589005ff 6166
bb457bd9
JL
6167
6168 if (visited == NULL)
6169 {
8e42ace1 6170 visited_allocated_locally = 1;
d55bc081 6171 visited = xcalloc (last_basic_block, 1);
bb457bd9
JL
6172 }
6173
e2d2ed72 6174 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
bb457bd9 6175 {
e2d2ed72 6176 basic_block pred_bb = pred->src;
bb457bd9
JL
6177
6178 if (pred->src == ENTRY_BLOCK_PTR)
6179 break;
f305679f
JH
6180 else if (pred_bb == expr_bb)
6181 continue;
0b17ab2f 6182 else if (visited[pred_bb->index])
bb457bd9 6183 continue;
c4c81601 6184
bb457bd9 6185 /* Does this predecessor generate this expression? */
0b17ab2f 6186 else if (TEST_BIT (comp[pred_bb->index], expr_index))
bb457bd9 6187 break;
0b17ab2f 6188 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
bb457bd9 6189 break;
c4c81601 6190
bb457bd9
JL
6191 /* Not killed. */
6192 else
6193 {
0b17ab2f 6194 visited[pred_bb->index] = 1;
bb457bd9
JL
6195 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
6196 pred_bb, visited))
6197 break;
6198 }
6199 }
589005ff 6200 if (visited_allocated_locally)
283a2545 6201 free (visited);
c4c81601 6202
bb457bd9
JL
6203 return (pred == NULL);
6204}
6205\f
6206/* Actually perform code hoisting. */
c4c81601 6207
bb457bd9
JL
6208static void
6209hoist_code ()
6210{
e0082a72 6211 basic_block bb, dominated;
c635a1ec
DB
6212 basic_block *domby;
6213 unsigned int domby_len;
6214 unsigned int i,j;
bb457bd9 6215 struct expr **index_map;
c4c81601 6216 struct expr *expr;
bb457bd9 6217
d55bc081 6218 sbitmap_vector_zero (hoist_exprs, last_basic_block);
bb457bd9
JL
6219
6220 /* Compute a mapping from expression number (`bitmap_index') to
6221 hash table entry. */
6222
02280659
ZD
6223 index_map = (struct expr **) xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
6224 for (i = 0; i < expr_hash_table.size; i++)
6225 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601 6226 index_map[expr->bitmap_index] = expr;
bb457bd9
JL
6227
6228 /* Walk over each basic block looking for potentially hoistable
6229 expressions, nothing gets hoisted from the entry block. */
e0082a72 6230 FOR_EACH_BB (bb)
bb457bd9
JL
6231 {
6232 int found = 0;
6233 int insn_inserted_p;
6234
c635a1ec 6235 domby_len = get_dominated_by (dominators, bb, &domby);
bb457bd9
JL
6236 /* Examine each expression that is very busy at the exit of this
6237 block. These are the potentially hoistable expressions. */
e0082a72 6238 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
bb457bd9
JL
6239 {
6240 int hoistable = 0;
c4c81601 6241
c635a1ec
DB
6242 if (TEST_BIT (hoist_vbeout[bb->index], i)
6243 && TEST_BIT (transpout[bb->index], i))
bb457bd9
JL
6244 {
6245 /* We've found a potentially hoistable expression, now
6246 we look at every block BB dominates to see if it
6247 computes the expression. */
c635a1ec 6248 for (j = 0; j < domby_len; j++)
bb457bd9 6249 {
c635a1ec 6250 dominated = domby[j];
bb457bd9 6251 /* Ignore self dominance. */
c635a1ec 6252 if (bb == dominated)
bb457bd9 6253 continue;
bb457bd9
JL
6254 /* We've found a dominated block, now see if it computes
6255 the busy expression and whether or not moving that
6256 expression to the "beginning" of that block is safe. */
e0082a72 6257 if (!TEST_BIT (antloc[dominated->index], i))
bb457bd9
JL
6258 continue;
6259
6260 /* Note if the expression would reach the dominated block
589005ff 6261 unimpared if it was placed at the end of BB.
bb457bd9
JL
6262
6263 Keep track of how many times this expression is hoistable
6264 from a dominated block into BB. */
e0082a72 6265 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
bb457bd9
JL
6266 hoistable++;
6267 }
6268
ff7cc307 6269 /* If we found more than one hoistable occurrence of this
bb457bd9
JL
6270 expression, then note it in the bitmap of expressions to
6271 hoist. It makes no sense to hoist things which are computed
6272 in only one BB, and doing so tends to pessimize register
6273 allocation. One could increase this value to try harder
6274 to avoid any possible code expansion due to register
6275 allocation issues; however experiments have shown that
6276 the vast majority of hoistable expressions are only movable
6277 from two successors, so raising this threshhold is likely
6278 to nullify any benefit we get from code hoisting. */
6279 if (hoistable > 1)
6280 {
e0082a72 6281 SET_BIT (hoist_exprs[bb->index], i);
bb457bd9
JL
6282 found = 1;
6283 }
6284 }
6285 }
bb457bd9
JL
6286 /* If we found nothing to hoist, then quit now. */
6287 if (! found)
c635a1ec
DB
6288 {
6289 free (domby);
bb457bd9 6290 continue;
c635a1ec 6291 }
bb457bd9
JL
6292
6293 /* Loop over all the hoistable expressions. */
e0082a72 6294 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
bb457bd9
JL
6295 {
6296 /* We want to insert the expression into BB only once, so
6297 note when we've inserted it. */
6298 insn_inserted_p = 0;
6299
6300 /* These tests should be the same as the tests above. */
e0082a72 6301 if (TEST_BIT (hoist_vbeout[bb->index], i))
bb457bd9
JL
6302 {
6303 /* We've found a potentially hoistable expression, now
6304 we look at every block BB dominates to see if it
6305 computes the expression. */
c635a1ec 6306 for (j = 0; j < domby_len; j++)
bb457bd9 6307 {
c635a1ec 6308 dominated = domby[j];
bb457bd9 6309 /* Ignore self dominance. */
c635a1ec 6310 if (bb == dominated)
bb457bd9
JL
6311 continue;
6312
6313 /* We've found a dominated block, now see if it computes
6314 the busy expression and whether or not moving that
6315 expression to the "beginning" of that block is safe. */
e0082a72 6316 if (!TEST_BIT (antloc[dominated->index], i))
bb457bd9
JL
6317 continue;
6318
6319 /* The expression is computed in the dominated block and
6320 it would be safe to compute it at the start of the
6321 dominated block. Now we have to determine if the
ff7cc307 6322 expression would reach the dominated block if it was
bb457bd9 6323 placed at the end of BB. */
e0082a72 6324 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
bb457bd9
JL
6325 {
6326 struct expr *expr = index_map[i];
6327 struct occr *occr = expr->antic_occr;
6328 rtx insn;
6329 rtx set;
6330
ff7cc307 6331 /* Find the right occurrence of this expression. */
e0082a72 6332 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
bb457bd9
JL
6333 occr = occr->next;
6334
6335 /* Should never happen. */
6336 if (!occr)
6337 abort ();
6338
6339 insn = occr->insn;
589005ff 6340
bb457bd9
JL
6341 set = single_set (insn);
6342 if (! set)
6343 abort ();
6344
6345 /* Create a pseudo-reg to store the result of reaching
6346 expressions into. Get the mode for the new pseudo
6347 from the mode of the original destination pseudo. */
6348 if (expr->reaching_reg == NULL)
6349 expr->reaching_reg
6350 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
6351
10d1bb36
JH
6352 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
6353 delete_insn (insn);
6354 occr->deleted_p = 1;
6355 if (!insn_inserted_p)
bb457bd9 6356 {
10d1bb36
JH
6357 insert_insn_end_bb (index_map[i], bb, 0);
6358 insn_inserted_p = 1;
bb457bd9
JL
6359 }
6360 }
6361 }
6362 }
6363 }
c635a1ec 6364 free (domby);
bb457bd9 6365 }
c4c81601 6366
8e42ace1 6367 free (index_map);
bb457bd9
JL
6368}
6369
6370/* Top level routine to perform one code hoisting (aka unification) pass
6371
cc2902df 6372 Return nonzero if a change was made. */
bb457bd9
JL
6373
6374static int
6375one_code_hoisting_pass ()
6376{
6377 int changed = 0;
6378
02280659
ZD
6379 alloc_hash_table (max_cuid, &expr_hash_table, 0);
6380 compute_hash_table (&expr_hash_table);
bb457bd9 6381 if (gcse_file)
02280659 6382 dump_hash_table (gcse_file, "Code Hosting Expressions", &expr_hash_table);
c4c81601 6383
02280659 6384 if (expr_hash_table.n_elems > 0)
bb457bd9 6385 {
02280659 6386 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
bb457bd9
JL
6387 compute_code_hoist_data ();
6388 hoist_code ();
6389 free_code_hoist_mem ();
6390 }
c4c81601 6391
02280659 6392 free_hash_table (&expr_hash_table);
bb457bd9
JL
6393
6394 return changed;
6395}
a13d4ebf
AM
6396\f
6397/* Here we provide the things required to do store motion towards
6398 the exit. In order for this to be effective, gcse also needed to
6399 be taught how to move a load when it is kill only by a store to itself.
6400
6401 int i;
6402 float a[10];
6403
6404 void foo(float scale)
6405 {
6406 for (i=0; i<10; i++)
6407 a[i] *= scale;
6408 }
6409
6410 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
589005ff
KH
6411 the load out since its live around the loop, and stored at the bottom
6412 of the loop.
a13d4ebf 6413
589005ff 6414 The 'Load Motion' referred to and implemented in this file is
a13d4ebf
AM
6415 an enhancement to gcse which when using edge based lcm, recognizes
6416 this situation and allows gcse to move the load out of the loop.
6417
6418 Once gcse has hoisted the load, store motion can then push this
6419 load towards the exit, and we end up with no loads or stores of 'i'
6420 in the loop. */
6421
ff7cc307 6422/* This will search the ldst list for a matching expression. If it
a13d4ebf
AM
6423 doesn't find one, we create one and initialize it. */
6424
6425static struct ls_expr *
6426ldst_entry (x)
6427 rtx x;
6428{
6429 struct ls_expr * ptr;
6430
6431 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6432 if (expr_equiv_p (ptr->pattern, x))
6433 break;
6434
6435 if (!ptr)
6436 {
6437 ptr = (struct ls_expr *) xmalloc (sizeof (struct ls_expr));
6438
6439 ptr->next = pre_ldst_mems;
6440 ptr->expr = NULL;
6441 ptr->pattern = x;
6442 ptr->loads = NULL_RTX;
6443 ptr->stores = NULL_RTX;
6444 ptr->reaching_reg = NULL_RTX;
6445 ptr->invalid = 0;
6446 ptr->index = 0;
6447 ptr->hash_index = 0;
6448 pre_ldst_mems = ptr;
6449 }
589005ff 6450
a13d4ebf
AM
6451 return ptr;
6452}
6453
6454/* Free up an individual ldst entry. */
6455
589005ff 6456static void
a13d4ebf
AM
6457free_ldst_entry (ptr)
6458 struct ls_expr * ptr;
6459{
aaa4ca30
AJ
6460 free_INSN_LIST_list (& ptr->loads);
6461 free_INSN_LIST_list (& ptr->stores);
a13d4ebf
AM
6462
6463 free (ptr);
6464}
6465
6466/* Free up all memory associated with the ldst list. */
6467
6468static void
6469free_ldst_mems ()
6470{
589005ff 6471 while (pre_ldst_mems)
a13d4ebf
AM
6472 {
6473 struct ls_expr * tmp = pre_ldst_mems;
6474
6475 pre_ldst_mems = pre_ldst_mems->next;
6476
6477 free_ldst_entry (tmp);
6478 }
6479
6480 pre_ldst_mems = NULL;
6481}
6482
6483/* Dump debugging info about the ldst list. */
6484
6485static void
6486print_ldst_list (file)
6487 FILE * file;
6488{
6489 struct ls_expr * ptr;
6490
6491 fprintf (file, "LDST list: \n");
6492
6493 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6494 {
6495 fprintf (file, " Pattern (%3d): ", ptr->index);
6496
6497 print_rtl (file, ptr->pattern);
6498
6499 fprintf (file, "\n Loads : ");
6500
6501 if (ptr->loads)
6502 print_rtl (file, ptr->loads);
6503 else
6504 fprintf (file, "(nil)");
6505
6506 fprintf (file, "\n Stores : ");
6507
6508 if (ptr->stores)
6509 print_rtl (file, ptr->stores);
6510 else
6511 fprintf (file, "(nil)");
6512
6513 fprintf (file, "\n\n");
6514 }
6515
6516 fprintf (file, "\n");
6517}
6518
6519/* Returns 1 if X is in the list of ldst only expressions. */
6520
6521static struct ls_expr *
6522find_rtx_in_ldst (x)
6523 rtx x;
6524{
6525 struct ls_expr * ptr;
589005ff 6526
a13d4ebf
AM
6527 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6528 if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid)
6529 return ptr;
6530
6531 return NULL;
6532}
6533
6534/* Assign each element of the list of mems a monotonically increasing value. */
6535
6536static int
6537enumerate_ldsts ()
6538{
6539 struct ls_expr * ptr;
6540 int n = 0;
6541
6542 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6543 ptr->index = n++;
6544
6545 return n;
6546}
6547
6548/* Return first item in the list. */
6549
6550static inline struct ls_expr *
6551first_ls_expr ()
6552{
6553 return pre_ldst_mems;
6554}
6555
6556/* Return the next item in ther list after the specified one. */
6557
6558static inline struct ls_expr *
6559next_ls_expr (ptr)
6560 struct ls_expr * ptr;
6561{
6562 return ptr->next;
6563}
6564\f
6565/* Load Motion for loads which only kill themselves. */
6566
6567/* Return true if x is a simple MEM operation, with no registers or
6568 side effects. These are the types of loads we consider for the
6569 ld_motion list, otherwise we let the usual aliasing take care of it. */
6570
589005ff 6571static int
a13d4ebf
AM
6572simple_mem (x)
6573 rtx x;
6574{
6575 if (GET_CODE (x) != MEM)
6576 return 0;
589005ff 6577
a13d4ebf
AM
6578 if (MEM_VOLATILE_P (x))
6579 return 0;
589005ff 6580
a13d4ebf
AM
6581 if (GET_MODE (x) == BLKmode)
6582 return 0;
aaa4ca30
AJ
6583
6584 if (!rtx_varies_p (XEXP (x, 0), 0))
a13d4ebf 6585 return 1;
589005ff 6586
a13d4ebf
AM
6587 return 0;
6588}
6589
589005ff
KH
6590/* Make sure there isn't a buried reference in this pattern anywhere.
6591 If there is, invalidate the entry for it since we're not capable
6592 of fixing it up just yet.. We have to be sure we know about ALL
a13d4ebf
AM
6593 loads since the aliasing code will allow all entries in the
6594 ld_motion list to not-alias itself. If we miss a load, we will get
589005ff 6595 the wrong value since gcse might common it and we won't know to
a13d4ebf
AM
6596 fix it up. */
6597
6598static void
6599invalidate_any_buried_refs (x)
6600 rtx x;
6601{
6602 const char * fmt;
8e42ace1 6603 int i, j;
a13d4ebf
AM
6604 struct ls_expr * ptr;
6605
6606 /* Invalidate it in the list. */
6607 if (GET_CODE (x) == MEM && simple_mem (x))
6608 {
6609 ptr = ldst_entry (x);
6610 ptr->invalid = 1;
6611 }
6612
6613 /* Recursively process the insn. */
6614 fmt = GET_RTX_FORMAT (GET_CODE (x));
589005ff 6615
a13d4ebf
AM
6616 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6617 {
6618 if (fmt[i] == 'e')
6619 invalidate_any_buried_refs (XEXP (x, i));
6620 else if (fmt[i] == 'E')
6621 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6622 invalidate_any_buried_refs (XVECEXP (x, i, j));
6623 }
6624}
6625
6626/* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
6627 being defined as MEM loads and stores to symbols, with no
589005ff 6628 side effects and no registers in the expression. If there are any
f63d1bf7 6629 uses/defs which don't match this criteria, it is invalidated and
a13d4ebf
AM
6630 trimmed out later. */
6631
589005ff 6632static void
a13d4ebf
AM
6633compute_ld_motion_mems ()
6634{
6635 struct ls_expr * ptr;
e0082a72 6636 basic_block bb;
a13d4ebf 6637 rtx insn;
589005ff 6638
a13d4ebf
AM
6639 pre_ldst_mems = NULL;
6640
e0082a72 6641 FOR_EACH_BB (bb)
a13d4ebf 6642 {
e0082a72
ZD
6643 for (insn = bb->head;
6644 insn && insn != NEXT_INSN (bb->end);
a13d4ebf
AM
6645 insn = NEXT_INSN (insn))
6646 {
6647 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
6648 {
6649 if (GET_CODE (PATTERN (insn)) == SET)
6650 {
6651 rtx src = SET_SRC (PATTERN (insn));
6652 rtx dest = SET_DEST (PATTERN (insn));
6653
6654 /* Check for a simple LOAD... */
6655 if (GET_CODE (src) == MEM && simple_mem (src))
6656 {
6657 ptr = ldst_entry (src);
6658 if (GET_CODE (dest) == REG)
6659 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
6660 else
6661 ptr->invalid = 1;
6662 }
6663 else
6664 {
6665 /* Make sure there isn't a buried load somewhere. */
6666 invalidate_any_buried_refs (src);
6667 }
589005ff 6668
a13d4ebf
AM
6669 /* Check for stores. Don't worry about aliased ones, they
6670 will block any movement we might do later. We only care
6671 about this exact pattern since those are the only
6672 circumstance that we will ignore the aliasing info. */
6673 if (GET_CODE (dest) == MEM && simple_mem (dest))
6674 {
6675 ptr = ldst_entry (dest);
589005ff 6676
f54104df
AO
6677 if (GET_CODE (src) != MEM
6678 && GET_CODE (src) != ASM_OPERANDS)
a13d4ebf
AM
6679 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
6680 else
6681 ptr->invalid = 1;
6682 }
6683 }
6684 else
6685 invalidate_any_buried_refs (PATTERN (insn));
6686 }
6687 }
6688 }
6689}
6690
589005ff 6691/* Remove any references that have been either invalidated or are not in the
a13d4ebf
AM
6692 expression list for pre gcse. */
6693
6694static void
6695trim_ld_motion_mems ()
6696{
6697 struct ls_expr * last = NULL;
6698 struct ls_expr * ptr = first_ls_expr ();
6699
6700 while (ptr != NULL)
6701 {
6702 int del = ptr->invalid;
6703 struct expr * expr = NULL;
589005ff 6704
a13d4ebf 6705 /* Delete if entry has been made invalid. */
589005ff 6706 if (!del)
a13d4ebf
AM
6707 {
6708 unsigned int i;
589005ff 6709
a13d4ebf
AM
6710 del = 1;
6711 /* Delete if we cannot find this mem in the expression list. */
02280659 6712 for (i = 0; i < expr_hash_table.size && del; i++)
a13d4ebf 6713 {
02280659 6714 for (expr = expr_hash_table.table[i];
589005ff 6715 expr != NULL;
a13d4ebf
AM
6716 expr = expr->next_same_hash)
6717 if (expr_equiv_p (expr->expr, ptr->pattern))
6718 {
6719 del = 0;
6720 break;
6721 }
6722 }
6723 }
589005ff 6724
a13d4ebf
AM
6725 if (del)
6726 {
6727 if (last != NULL)
6728 {
6729 last->next = ptr->next;
6730 free_ldst_entry (ptr);
6731 ptr = last->next;
6732 }
6733 else
6734 {
6735 pre_ldst_mems = pre_ldst_mems->next;
6736 free_ldst_entry (ptr);
6737 ptr = pre_ldst_mems;
6738 }
6739 }
6740 else
6741 {
6742 /* Set the expression field if we are keeping it. */
6743 last = ptr;
6744 ptr->expr = expr;
6745 ptr = ptr->next;
6746 }
6747 }
6748
6749 /* Show the world what we've found. */
6750 if (gcse_file && pre_ldst_mems != NULL)
6751 print_ldst_list (gcse_file);
6752}
6753
6754/* This routine will take an expression which we are replacing with
6755 a reaching register, and update any stores that are needed if
6756 that expression is in the ld_motion list. Stores are updated by
6757 copying their SRC to the reaching register, and then storeing
6758 the reaching register into the store location. These keeps the
6759 correct value in the reaching register for the loads. */
6760
6761static void
6762update_ld_motion_stores (expr)
6763 struct expr * expr;
6764{
6765 struct ls_expr * mem_ptr;
6766
6767 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
6768 {
589005ff
KH
6769 /* We can try to find just the REACHED stores, but is shouldn't
6770 matter to set the reaching reg everywhere... some might be
a13d4ebf
AM
6771 dead and should be eliminated later. */
6772
6773 /* We replace SET mem = expr with
6774 SET reg = expr
589005ff 6775 SET mem = reg , where reg is the
a13d4ebf
AM
6776 reaching reg used in the load. */
6777 rtx list = mem_ptr->stores;
589005ff 6778
a13d4ebf
AM
6779 for ( ; list != NULL_RTX; list = XEXP (list, 1))
6780 {
6781 rtx insn = XEXP (list, 0);
6782 rtx pat = PATTERN (insn);
6783 rtx src = SET_SRC (pat);
6784 rtx reg = expr->reaching_reg;
c57718d3 6785 rtx copy, new;
a13d4ebf
AM
6786
6787 /* If we've already copied it, continue. */
6788 if (expr->reaching_reg == src)
6789 continue;
589005ff 6790
a13d4ebf
AM
6791 if (gcse_file)
6792 {
6793 fprintf (gcse_file, "PRE: store updated with reaching reg ");
6794 print_rtl (gcse_file, expr->reaching_reg);
6795 fprintf (gcse_file, ":\n ");
6796 print_inline_rtx (gcse_file, insn, 8);
6797 fprintf (gcse_file, "\n");
6798 }
589005ff 6799
a13d4ebf 6800 copy = gen_move_insn ( reg, SET_SRC (pat));
c57718d3
RK
6801 new = emit_insn_before (copy, insn);
6802 record_one_set (REGNO (reg), new);
a13d4ebf
AM
6803 SET_SRC (pat) = reg;
6804
6805 /* un-recognize this pattern since it's probably different now. */
6806 INSN_CODE (insn) = -1;
6807 gcse_create_count++;
6808 }
6809 }
6810}
6811\f
6812/* Store motion code. */
6813
589005ff 6814/* This is used to communicate the target bitvector we want to use in the
aaa4ca30
AJ
6815 reg_set_info routine when called via the note_stores mechanism. */
6816static sbitmap * regvec;
6817
a13d4ebf
AM
6818/* Used in computing the reverse edge graph bit vectors. */
6819static sbitmap * st_antloc;
6820
6821/* Global holding the number of store expressions we are dealing with. */
6822static int num_stores;
6823
aaa4ca30 6824/* Checks to set if we need to mark a register set. Called from note_stores. */
a13d4ebf 6825
aaa4ca30
AJ
6826static void
6827reg_set_info (dest, setter, data)
6828 rtx dest, setter ATTRIBUTE_UNUSED;
6829 void * data ATTRIBUTE_UNUSED;
a13d4ebf 6830{
aaa4ca30
AJ
6831 if (GET_CODE (dest) == SUBREG)
6832 dest = SUBREG_REG (dest);
adfcce61 6833
aaa4ca30
AJ
6834 if (GET_CODE (dest) == REG)
6835 SET_BIT (*regvec, REGNO (dest));
a13d4ebf
AM
6836}
6837
cc2902df 6838/* Return nonzero if the register operands of expression X are killed
aaa4ca30 6839 anywhere in basic block BB. */
a13d4ebf
AM
6840
6841static int
aaa4ca30 6842store_ops_ok (x, bb)
a13d4ebf 6843 rtx x;
e2d2ed72 6844 basic_block bb;
a13d4ebf
AM
6845{
6846 int i;
6847 enum rtx_code code;
6848 const char * fmt;
6849
6850 /* Repeat is used to turn tail-recursion into iteration. */
6851 repeat:
6852
6853 if (x == 0)
6854 return 1;
6855
6856 code = GET_CODE (x);
6857 switch (code)
6858 {
6859 case REG:
aaa4ca30
AJ
6860 /* If a reg has changed after us in this
6861 block, the operand has been killed. */
0b17ab2f 6862 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
a13d4ebf
AM
6863
6864 case MEM:
6865 x = XEXP (x, 0);
6866 goto repeat;
6867
6868 case PRE_DEC:
6869 case PRE_INC:
6870 case POST_DEC:
6871 case POST_INC:
6872 return 0;
6873
6874 case PC:
6875 case CC0: /*FIXME*/
6876 case CONST:
6877 case CONST_INT:
6878 case CONST_DOUBLE:
69ef87e2 6879 case CONST_VECTOR:
a13d4ebf
AM
6880 case SYMBOL_REF:
6881 case LABEL_REF:
6882 case ADDR_VEC:
6883 case ADDR_DIFF_VEC:
6884 return 1;
6885
6886 default:
6887 break;
6888 }
6889
6890 i = GET_RTX_LENGTH (code) - 1;
6891 fmt = GET_RTX_FORMAT (code);
589005ff 6892
a13d4ebf
AM
6893 for (; i >= 0; i--)
6894 {
6895 if (fmt[i] == 'e')
6896 {
6897 rtx tem = XEXP (x, i);
6898
6899 /* If we are about to do the last recursive call
6900 needed at this level, change it into iteration.
6901 This function is called enough to be worth it. */
6902 if (i == 0)
6903 {
6904 x = tem;
6905 goto repeat;
6906 }
589005ff 6907
aaa4ca30 6908 if (! store_ops_ok (tem, bb))
a13d4ebf
AM
6909 return 0;
6910 }
6911 else if (fmt[i] == 'E')
6912 {
6913 int j;
589005ff 6914
a13d4ebf
AM
6915 for (j = 0; j < XVECLEN (x, i); j++)
6916 {
aaa4ca30 6917 if (! store_ops_ok (XVECEXP (x, i, j), bb))
a13d4ebf
AM
6918 return 0;
6919 }
6920 }
6921 }
6922
6923 return 1;
6924}
6925
aaa4ca30 6926/* Determine whether insn is MEM store pattern that we will consider moving. */
a13d4ebf
AM
6927
6928static void
6929find_moveable_store (insn)
6930 rtx insn;
6931{
6932 struct ls_expr * ptr;
6933 rtx dest = PATTERN (insn);
6934
f54104df
AO
6935 if (GET_CODE (dest) != SET
6936 || GET_CODE (SET_SRC (dest)) == ASM_OPERANDS)
a13d4ebf
AM
6937 return;
6938
6939 dest = SET_DEST (dest);
589005ff 6940
a13d4ebf
AM
6941 if (GET_CODE (dest) != MEM || MEM_VOLATILE_P (dest)
6942 || GET_MODE (dest) == BLKmode)
aaa4ca30
AJ
6943 return;
6944
6945 if (GET_CODE (XEXP (dest, 0)) != SYMBOL_REF)
a13d4ebf 6946 return;
aaa4ca30
AJ
6947
6948 if (rtx_varies_p (XEXP (dest, 0), 0))
a13d4ebf 6949 return;
aaa4ca30 6950
a13d4ebf
AM
6951 ptr = ldst_entry (dest);
6952 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
6953}
6954
aaa4ca30
AJ
6955/* Perform store motion. Much like gcse, except we move expressions the
6956 other way by looking at the flowgraph in reverse. */
a13d4ebf
AM
6957
6958static int
6959compute_store_table ()
6960{
e0082a72
ZD
6961 int ret;
6962 basic_block bb;
aaa4ca30 6963 unsigned regno;
a13d4ebf 6964 rtx insn, pat;
aaa4ca30 6965
a13d4ebf
AM
6966 max_gcse_regno = max_reg_num ();
6967
d55bc081 6968 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
aaa4ca30 6969 max_gcse_regno);
d55bc081 6970 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
a13d4ebf 6971 pre_ldst_mems = 0;
aaa4ca30 6972
a13d4ebf 6973 /* Find all the stores we care about. */
e0082a72 6974 FOR_EACH_BB (bb)
a13d4ebf 6975 {
e0082a72
ZD
6976 regvec = & (reg_set_in_block[bb->index]);
6977 for (insn = bb->end;
6978 insn && insn != PREV_INSN (bb->end);
a13d4ebf
AM
6979 insn = PREV_INSN (insn))
6980 {
19652adf
ZW
6981 /* Ignore anything that is not a normal insn. */
6982 if (! INSN_P (insn))
a13d4ebf
AM
6983 continue;
6984
aaa4ca30
AJ
6985 if (GET_CODE (insn) == CALL_INSN)
6986 {
19652adf 6987 bool clobbers_all = false;
589005ff 6988#ifdef NON_SAVING_SETJMP
19652adf
ZW
6989 if (NON_SAVING_SETJMP
6990 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
6991 clobbers_all = true;
6992#endif
6993
aaa4ca30 6994 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
19652adf
ZW
6995 if (clobbers_all
6996 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
e0082a72 6997 SET_BIT (reg_set_in_block[bb->index], regno);
aaa4ca30 6998 }
589005ff 6999
a13d4ebf 7000 pat = PATTERN (insn);
aaa4ca30 7001 note_stores (pat, reg_set_info, NULL);
589005ff 7002
a13d4ebf
AM
7003 /* Now that we've marked regs, look for stores. */
7004 if (GET_CODE (pat) == SET)
7005 find_moveable_store (insn);
7006 }
7007 }
7008
7009 ret = enumerate_ldsts ();
589005ff 7010
a13d4ebf
AM
7011 if (gcse_file)
7012 {
7013 fprintf (gcse_file, "Store Motion Expressions.\n");
7014 print_ldst_list (gcse_file);
7015 }
589005ff 7016
a13d4ebf
AM
7017 return ret;
7018}
7019
aaa4ca30 7020/* Check to see if the load X is aliased with STORE_PATTERN. */
a13d4ebf
AM
7021
7022static int
7023load_kills_store (x, store_pattern)
7024 rtx x, store_pattern;
7025{
7026 if (true_dependence (x, GET_MODE (x), store_pattern, rtx_addr_varies_p))
7027 return 1;
7028 return 0;
7029}
7030
589005ff 7031/* Go through the entire insn X, looking for any loads which might alias
aaa4ca30 7032 STORE_PATTERN. Return 1 if found. */
a13d4ebf
AM
7033
7034static int
7035find_loads (x, store_pattern)
7036 rtx x, store_pattern;
7037{
7038 const char * fmt;
8e42ace1 7039 int i, j;
a13d4ebf
AM
7040 int ret = 0;
7041
24a28584
JH
7042 if (!x)
7043 return 0;
7044
589005ff 7045 if (GET_CODE (x) == SET)
a13d4ebf
AM
7046 x = SET_SRC (x);
7047
7048 if (GET_CODE (x) == MEM)
7049 {
7050 if (load_kills_store (x, store_pattern))
7051 return 1;
7052 }
7053
7054 /* Recursively process the insn. */
7055 fmt = GET_RTX_FORMAT (GET_CODE (x));
589005ff 7056
a13d4ebf
AM
7057 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
7058 {
7059 if (fmt[i] == 'e')
7060 ret |= find_loads (XEXP (x, i), store_pattern);
7061 else if (fmt[i] == 'E')
7062 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7063 ret |= find_loads (XVECEXP (x, i, j), store_pattern);
7064 }
7065 return ret;
7066}
7067
589005ff 7068/* Check if INSN kills the store pattern X (is aliased with it).
a13d4ebf
AM
7069 Return 1 if it it does. */
7070
589005ff 7071static int
a13d4ebf
AM
7072store_killed_in_insn (x, insn)
7073 rtx x, insn;
7074{
7075 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7076 return 0;
589005ff 7077
a13d4ebf
AM
7078 if (GET_CODE (insn) == CALL_INSN)
7079 {
1218665b
JJ
7080 /* A normal or pure call might read from pattern,
7081 but a const call will not. */
a6a063b8 7082 return ! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn);
a13d4ebf 7083 }
589005ff 7084
a13d4ebf
AM
7085 if (GET_CODE (PATTERN (insn)) == SET)
7086 {
7087 rtx pat = PATTERN (insn);
7088 /* Check for memory stores to aliased objects. */
7089 if (GET_CODE (SET_DEST (pat)) == MEM && !expr_equiv_p (SET_DEST (pat), x))
aaa4ca30 7090 /* pretend its a load and check for aliasing. */
a13d4ebf
AM
7091 if (find_loads (SET_DEST (pat), x))
7092 return 1;
7093 return find_loads (SET_SRC (pat), x);
7094 }
7095 else
7096 return find_loads (PATTERN (insn), x);
7097}
7098
7099/* Returns 1 if the expression X is loaded or clobbered on or after INSN
7100 within basic block BB. */
7101
589005ff 7102static int
aaa4ca30 7103store_killed_after (x, insn, bb)
a13d4ebf 7104 rtx x, insn;
e2d2ed72 7105 basic_block bb;
a13d4ebf 7106{
8e42ace1 7107 rtx last = bb->end;
589005ff 7108
8e42ace1
KH
7109 if (insn == last)
7110 return 0;
aaa4ca30
AJ
7111
7112 /* Check if the register operands of the store are OK in this block.
589005ff
KH
7113 Note that if registers are changed ANYWHERE in the block, we'll
7114 decide we can't move it, regardless of whether it changed above
aaa4ca30 7115 or below the store. This could be improved by checking the register
fbe5a4a6 7116 operands while looking for aliasing in each insn. */
aaa4ca30 7117 if (!store_ops_ok (XEXP (x, 0), bb))
a13d4ebf
AM
7118 return 1;
7119
8e42ace1
KH
7120 for ( ; insn && insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
7121 if (store_killed_in_insn (x, insn))
7122 return 1;
589005ff 7123
a13d4ebf
AM
7124 return 0;
7125}
7126
aaa4ca30 7127/* Returns 1 if the expression X is loaded or clobbered on or before INSN
a13d4ebf 7128 within basic block BB. */
589005ff 7129static int
a13d4ebf
AM
7130store_killed_before (x, insn, bb)
7131 rtx x, insn;
e2d2ed72 7132 basic_block bb;
a13d4ebf 7133{
8e42ace1 7134 rtx first = bb->head;
a13d4ebf 7135
8e42ace1
KH
7136 if (insn == first)
7137 return store_killed_in_insn (x, insn);
589005ff 7138
aaa4ca30 7139 /* Check if the register operands of the store are OK in this block.
589005ff
KH
7140 Note that if registers are changed ANYWHERE in the block, we'll
7141 decide we can't move it, regardless of whether it changed above
aaa4ca30 7142 or below the store. This could be improved by checking the register
fbe5a4a6 7143 operands while looking for aliasing in each insn. */
aaa4ca30 7144 if (!store_ops_ok (XEXP (x, 0), bb))
a13d4ebf
AM
7145 return 1;
7146
8e42ace1
KH
7147 for ( ; insn && insn != PREV_INSN (first); insn = PREV_INSN (insn))
7148 if (store_killed_in_insn (x, insn))
7149 return 1;
589005ff 7150
8e42ace1 7151 return 0;
a13d4ebf
AM
7152}
7153
7154#define ANTIC_STORE_LIST(x) ((x)->loads)
7155#define AVAIL_STORE_LIST(x) ((x)->stores)
7156
7157/* Given the table of available store insns at the end of blocks,
7158 determine which ones are not killed by aliasing, and generate
7159 the appropriate vectors for gen and killed. */
7160static void
589005ff 7161build_store_vectors ()
a13d4ebf 7162{
e0082a72 7163 basic_block bb, b;
a13d4ebf
AM
7164 rtx insn, st;
7165 struct ls_expr * ptr;
7166
7167 /* Build the gen_vector. This is any store in the table which is not killed
7168 by aliasing later in its block. */
d55bc081
ZD
7169 ae_gen = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7170 sbitmap_vector_zero (ae_gen, last_basic_block);
a13d4ebf 7171
d55bc081
ZD
7172 st_antloc = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7173 sbitmap_vector_zero (st_antloc, last_basic_block);
aaa4ca30 7174
a13d4ebf 7175 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
589005ff 7176 {
a13d4ebf
AM
7177 /* Put all the stores into either the antic list, or the avail list,
7178 or both. */
7179 rtx store_list = ptr->stores;
7180 ptr->stores = NULL_RTX;
7181
7182 for (st = store_list; st != NULL; st = XEXP (st, 1))
7183 {
7184 insn = XEXP (st, 0);
e2d2ed72 7185 bb = BLOCK_FOR_INSN (insn);
589005ff 7186
aaa4ca30 7187 if (!store_killed_after (ptr->pattern, insn, bb))
a13d4ebf 7188 {
fbe5a4a6 7189 /* If we've already seen an available expression in this block,
a13d4ebf
AM
7190 we can delete the one we saw already (It occurs earlier in
7191 the block), and replace it with this one). We'll copy the
7192 old SRC expression to an unused register in case there
7193 are any side effects. */
0b17ab2f 7194 if (TEST_BIT (ae_gen[bb->index], ptr->index))
a13d4ebf
AM
7195 {
7196 /* Find previous store. */
7197 rtx st;
7198 for (st = AVAIL_STORE_LIST (ptr); st ; st = XEXP (st, 1))
e2d2ed72 7199 if (BLOCK_FOR_INSN (XEXP (st, 0)) == bb)
a13d4ebf
AM
7200 break;
7201 if (st)
7202 {
7203 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
7204 if (gcse_file)
8e42ace1 7205 fprintf (gcse_file, "Removing redundant store:\n");
a13d4ebf
AM
7206 replace_store_insn (r, XEXP (st, 0), bb);
7207 XEXP (st, 0) = insn;
7208 continue;
7209 }
7210 }
0b17ab2f 7211 SET_BIT (ae_gen[bb->index], ptr->index);
a13d4ebf
AM
7212 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
7213 AVAIL_STORE_LIST (ptr));
7214 }
589005ff 7215
a13d4ebf
AM
7216 if (!store_killed_before (ptr->pattern, insn, bb))
7217 {
7218 SET_BIT (st_antloc[BLOCK_NUM (insn)], ptr->index);
7219 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
7220 ANTIC_STORE_LIST (ptr));
7221 }
7222 }
589005ff 7223
a13d4ebf
AM
7224 /* Free the original list of store insns. */
7225 free_INSN_LIST_list (&store_list);
7226 }
589005ff 7227
d55bc081
ZD
7228 ae_kill = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7229 sbitmap_vector_zero (ae_kill, last_basic_block);
a13d4ebf 7230
d55bc081
ZD
7231 transp = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7232 sbitmap_vector_zero (transp, last_basic_block);
a13d4ebf
AM
7233
7234 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
e0082a72 7235 FOR_EACH_BB (b)
a13d4ebf 7236 {
e0082a72 7237 if (store_killed_after (ptr->pattern, b->head, b))
a13d4ebf 7238 {
dc297297 7239 /* The anticipatable expression is not killed if it's gen'd. */
aaa4ca30 7240 /*
589005ff 7241 We leave this check out for now. If we have a code sequence
aaa4ca30
AJ
7242 in a block which looks like:
7243 ST MEMa = x
7244 L y = MEMa
7245 ST MEMa = z
7246 We should flag this as having an ANTIC expression, NOT
7247 transparent, NOT killed, and AVAIL.
7248 Unfortunately, since we haven't re-written all loads to
589005ff 7249 use the reaching reg, we'll end up doing an incorrect
aaa4ca30
AJ
7250 Load in the middle here if we push the store down. It happens in
7251 gcc.c-torture/execute/960311-1.c with -O3
7252 If we always kill it in this case, we'll sometimes do
fbe5a4a6 7253 unnecessary work, but it shouldn't actually hurt anything.
aaa4ca30 7254 if (!TEST_BIT (ae_gen[b], ptr->index)). */
e0082a72 7255 SET_BIT (ae_kill[b->index], ptr->index);
aaa4ca30
AJ
7256 }
7257 else
e0082a72 7258 SET_BIT (transp[b->index], ptr->index);
aaa4ca30
AJ
7259 }
7260
7261 /* Any block with no exits calls some non-returning function, so
7262 we better mark the store killed here, or we might not store to
7263 it at all. If we knew it was abort, we wouldn't have to store,
7264 but we don't know that for sure. */
589005ff 7265 if (gcse_file)
aaa4ca30
AJ
7266 {
7267 fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n");
7268 print_ldst_list (gcse_file);
d55bc081
ZD
7269 dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block);
7270 dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block);
7271 dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block);
7272 dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block);
a13d4ebf
AM
7273 }
7274}
7275
fbe5a4a6 7276/* Insert an instruction at the beginning of a basic block, and update
a13d4ebf
AM
7277 the BLOCK_HEAD if needed. */
7278
589005ff 7279static void
a13d4ebf
AM
7280insert_insn_start_bb (insn, bb)
7281 rtx insn;
e2d2ed72 7282 basic_block bb;
a13d4ebf
AM
7283{
7284 /* Insert at start of successor block. */
e2d2ed72
AM
7285 rtx prev = PREV_INSN (bb->head);
7286 rtx before = bb->head;
a13d4ebf
AM
7287 while (before != 0)
7288 {
7289 if (GET_CODE (before) != CODE_LABEL
7290 && (GET_CODE (before) != NOTE
7291 || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK))
7292 break;
7293 prev = before;
e2d2ed72 7294 if (prev == bb->end)
a13d4ebf
AM
7295 break;
7296 before = NEXT_INSN (before);
7297 }
7298
7299 insn = emit_insn_after (insn, prev);
7300
a13d4ebf
AM
7301 if (gcse_file)
7302 {
7303 fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n",
0b17ab2f 7304 bb->index);
a13d4ebf
AM
7305 print_inline_rtx (gcse_file, insn, 6);
7306 fprintf (gcse_file, "\n");
7307 }
7308}
7309
7310/* This routine will insert a store on an edge. EXPR is the ldst entry for
cc2902df 7311 the memory reference, and E is the edge to insert it on. Returns nonzero
a13d4ebf
AM
7312 if an edge insertion was performed. */
7313
7314static int
7315insert_store (expr, e)
7316 struct ls_expr * expr;
7317 edge e;
7318{
7319 rtx reg, insn;
e2d2ed72 7320 basic_block bb;
a13d4ebf
AM
7321 edge tmp;
7322
7323 /* We did all the deleted before this insert, so if we didn't delete a
7324 store, then we haven't set the reaching reg yet either. */
7325 if (expr->reaching_reg == NULL_RTX)
7326 return 0;
7327
7328 reg = expr->reaching_reg;
7329 insn = gen_move_insn (expr->pattern, reg);
589005ff 7330
a13d4ebf
AM
7331 /* If we are inserting this expression on ALL predecessor edges of a BB,
7332 insert it at the start of the BB, and reset the insert bits on the other
ff7cc307 7333 edges so we don't try to insert it on the other edges. */
e2d2ed72 7334 bb = e->dest;
a13d4ebf
AM
7335 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
7336 {
7337 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
7338 if (index == EDGE_INDEX_NO_EDGE)
7339 abort ();
7340 if (! TEST_BIT (pre_insert_map[index], expr->index))
7341 break;
7342 }
7343
7344 /* If tmp is NULL, we found an insertion on every edge, blank the
7345 insertion vector for these edges, and insert at the start of the BB. */
e2d2ed72 7346 if (!tmp && bb != EXIT_BLOCK_PTR)
a13d4ebf
AM
7347 {
7348 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
7349 {
7350 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
7351 RESET_BIT (pre_insert_map[index], expr->index);
7352 }
7353 insert_insn_start_bb (insn, bb);
7354 return 0;
7355 }
589005ff 7356
a13d4ebf
AM
7357 /* We can't insert on this edge, so we'll insert at the head of the
7358 successors block. See Morgan, sec 10.5. */
7359 if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
7360 {
7361 insert_insn_start_bb (insn, bb);
7362 return 0;
7363 }
7364
7365 insert_insn_on_edge (insn, e);
589005ff 7366
a13d4ebf
AM
7367 if (gcse_file)
7368 {
7369 fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
0b17ab2f 7370 e->src->index, e->dest->index);
a13d4ebf
AM
7371 print_inline_rtx (gcse_file, insn, 6);
7372 fprintf (gcse_file, "\n");
7373 }
589005ff 7374
a13d4ebf
AM
7375 return 1;
7376}
7377
7378/* This routine will replace a store with a SET to a specified register. */
7379
7380static void
7381replace_store_insn (reg, del, bb)
7382 rtx reg, del;
e2d2ed72 7383 basic_block bb;
a13d4ebf
AM
7384{
7385 rtx insn;
589005ff 7386
a13d4ebf
AM
7387 insn = gen_move_insn (reg, SET_SRC (PATTERN (del)));
7388 insn = emit_insn_after (insn, del);
589005ff 7389
a13d4ebf
AM
7390 if (gcse_file)
7391 {
589005ff 7392 fprintf (gcse_file,
0b17ab2f 7393 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
a13d4ebf 7394 print_inline_rtx (gcse_file, del, 6);
8e42ace1 7395 fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n ");
a13d4ebf 7396 print_inline_rtx (gcse_file, insn, 6);
8e42ace1 7397 fprintf (gcse_file, "\n");
a13d4ebf 7398 }
589005ff 7399
49ce134f 7400 delete_insn (del);
a13d4ebf
AM
7401}
7402
7403
7404/* Delete a store, but copy the value that would have been stored into
7405 the reaching_reg for later storing. */
7406
7407static void
7408delete_store (expr, bb)
7409 struct ls_expr * expr;
e2d2ed72 7410 basic_block bb;
a13d4ebf
AM
7411{
7412 rtx reg, i, del;
7413
7414 if (expr->reaching_reg == NULL_RTX)
7415 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
a13d4ebf 7416
589005ff
KH
7417
7418 /* If there is more than 1 store, the earlier ones will be dead,
7419 but it doesn't hurt to replace them here. */
a13d4ebf 7420 reg = expr->reaching_reg;
589005ff 7421
a13d4ebf
AM
7422 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
7423 {
7424 del = XEXP (i, 0);
e2d2ed72 7425 if (BLOCK_FOR_INSN (del) == bb)
a13d4ebf 7426 {
589005ff 7427 /* We know there is only one since we deleted redundant
a13d4ebf
AM
7428 ones during the available computation. */
7429 replace_store_insn (reg, del, bb);
7430 break;
7431 }
7432 }
7433}
7434
7435/* Free memory used by store motion. */
7436
589005ff 7437static void
a13d4ebf
AM
7438free_store_memory ()
7439{
7440 free_ldst_mems ();
589005ff 7441
a13d4ebf 7442 if (ae_gen)
5a660bff 7443 sbitmap_vector_free (ae_gen);
a13d4ebf 7444 if (ae_kill)
5a660bff 7445 sbitmap_vector_free (ae_kill);
a13d4ebf 7446 if (transp)
5a660bff 7447 sbitmap_vector_free (transp);
a13d4ebf 7448 if (st_antloc)
5a660bff 7449 sbitmap_vector_free (st_antloc);
a13d4ebf 7450 if (pre_insert_map)
5a660bff 7451 sbitmap_vector_free (pre_insert_map);
a13d4ebf 7452 if (pre_delete_map)
5a660bff 7453 sbitmap_vector_free (pre_delete_map);
aaa4ca30
AJ
7454 if (reg_set_in_block)
7455 sbitmap_vector_free (reg_set_in_block);
589005ff 7456
a13d4ebf
AM
7457 ae_gen = ae_kill = transp = st_antloc = NULL;
7458 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
7459}
7460
7461/* Perform store motion. Much like gcse, except we move expressions the
7462 other way by looking at the flowgraph in reverse. */
7463
7464static void
7465store_motion ()
7466{
e0082a72 7467 basic_block bb;
0b17ab2f 7468 int x;
a13d4ebf 7469 struct ls_expr * ptr;
adfcce61 7470 int update_flow = 0;
aaa4ca30 7471
a13d4ebf
AM
7472 if (gcse_file)
7473 {
7474 fprintf (gcse_file, "before store motion\n");
7475 print_rtl (gcse_file, get_insns ());
7476 }
7477
7478
7479 init_alias_analysis ();
aaa4ca30 7480
a13d4ebf
AM
7481 /* Find all the stores that are live to the end of their block. */
7482 num_stores = compute_store_table ();
7483 if (num_stores == 0)
7484 {
aaa4ca30 7485 sbitmap_vector_free (reg_set_in_block);
a13d4ebf
AM
7486 end_alias_analysis ();
7487 return;
7488 }
7489
7490 /* Now compute whats actually available to move. */
7491 add_noreturn_fake_exit_edges ();
7492 build_store_vectors ();
7493
589005ff
KH
7494 edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
7495 st_antloc, ae_kill, &pre_insert_map,
a13d4ebf
AM
7496 &pre_delete_map);
7497
7498 /* Now we want to insert the new stores which are going to be needed. */
7499 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
7500 {
e0082a72
ZD
7501 FOR_EACH_BB (bb)
7502 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
7503 delete_store (ptr, bb);
a13d4ebf 7504
0b17ab2f
RH
7505 for (x = 0; x < NUM_EDGES (edge_list); x++)
7506 if (TEST_BIT (pre_insert_map[x], ptr->index))
7507 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
a13d4ebf
AM
7508 }
7509
7510 if (update_flow)
7511 commit_edge_insertions ();
aaa4ca30 7512
a13d4ebf
AM
7513 free_store_memory ();
7514 free_edge_list (edge_list);
7515 remove_fake_edges ();
7516 end_alias_analysis ();
7517}
e2500fed 7518
a0134312
RS
7519\f
7520/* Entry point for jump bypassing optimization pass. */
7521
7522int
7523bypass_jumps (file)
7524 FILE *file;
7525{
7526 int changed;
7527
7528 /* We do not construct an accurate cfg in functions which call
7529 setjmp, so just punt to be safe. */
7530 if (current_function_calls_setjmp)
7531 return 0;
7532
7533 /* For calling dump_foo fns from gdb. */
7534 debug_stderr = stderr;
7535 gcse_file = file;
7536
7537 /* Identify the basic block information for this function, including
7538 successors and predecessors. */
7539 max_gcse_regno = max_reg_num ();
7540
7541 if (file)
7542 dump_flow_info (file);
7543
7544 /* Return if there's nothing to do. */
7545 if (n_basic_blocks <= 1)
7546 return 0;
7547
7548 /* Trying to perform global optimizations on flow graphs which have
7549 a high connectivity will take a long time and is unlikely to be
7550 particularly useful.
7551
7552 In normal circumstances a cfg should have about twice as many edges
7553 as blocks. But we do not want to punish small functions which have
7554 a couple switch statements. So we require a relatively large number
7555 of basic blocks and the ratio of edges to blocks to be high. */
7556 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
7557 {
7558 if (warn_disabled_optimization)
7559 warning ("BYPASS disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
7560 n_basic_blocks, n_edges / n_basic_blocks);
7561 return 0;
7562 }
7563
7564 /* If allocating memory for the cprop bitmap would take up too much
7565 storage it's better just to disable the optimization. */
7566 if ((n_basic_blocks
7567 * SBITMAP_SET_SIZE (max_gcse_regno)
7568 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
7569 {
7570 if (warn_disabled_optimization)
7571 warning ("GCSE disabled: %d basic blocks and %d registers",
7572 n_basic_blocks, max_gcse_regno);
7573
7574 return 0;
7575 }
7576
7577 /* See what modes support reg/reg copy operations. */
7578 if (! can_copy_init_p)
7579 {
7580 compute_can_copy ();
7581 can_copy_init_p = 1;
7582 }
7583
7584 gcc_obstack_init (&gcse_obstack);
7585 bytes_used = 0;
7586
7587 /* We need alias. */
7588 init_alias_analysis ();
7589
7590 /* Record where pseudo-registers are set. This data is kept accurate
7591 during each pass. ??? We could also record hard-reg information here
7592 [since it's unchanging], however it is currently done during hash table
7593 computation.
7594
7595 It may be tempting to compute MEM set information here too, but MEM sets
7596 will be subject to code motion one day and thus we need to compute
7597 information about memory sets when we build the hash tables. */
7598
7599 alloc_reg_set_mem (max_gcse_regno);
7600 compute_sets (get_insns ());
7601
7602 max_gcse_regno = max_reg_num ();
7603 alloc_gcse_mem (get_insns ());
7604 changed = one_cprop_pass (1, 1, 1);
7605 free_gcse_mem ();
7606
7607 if (file)
7608 {
7609 fprintf (file, "BYPASS of %s: %d basic blocks, ",
7610 current_function_name, n_basic_blocks);
7611 fprintf (file, "%d bytes\n\n", bytes_used);
7612 }
7613
7614 obstack_free (&gcse_obstack, NULL);
7615 free_reg_set_mem ();
7616
7617 /* We are finished with alias. */
7618 end_alias_analysis ();
7619 allocate_reg_info (max_reg_num (), FALSE, FALSE);
7620
7621 return changed;
7622}
7623
e2500fed 7624#include "gt-gcse.h"