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ef0d57a0 1/* Global common subexpression elimination/Partial redundancy elimination
18aa2adf 2 and global constant/copy propagation for GNU compiler.
2b4876d2 3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
387732c1 4 Free Software Foundation, Inc.
18aa2adf 5
f12b58b3 6This file is part of GCC.
18aa2adf 7
f12b58b3 8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
18aa2adf 12
f12b58b3 13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
18aa2adf 17
18You should have received a copy of the GNU General Public License
f12b58b3 19along with GCC; see the file COPYING. If not, write to the Free
67ce556b 20Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
2102110-1301, USA. */
18aa2adf 22
23/* TODO
24 - reordering of memory allocation and freeing to be more space efficient
25 - do rough calc of how many regs are needed in each block, and a rough
26 calc of how many regs are available in each class and use that to
27 throttle back the code in cases where RTX_COST is minimal.
ef0d57a0 28 - a store to the same address as a load does not kill the load if the
29 source of the store is also the destination of the load. Handling this
30 allows more load motion, particularly out of loops.
18aa2adf 31 - ability to realloc sbitmap vectors would allow one initial computation
32 of reg_set_in_block with only subsequent additions, rather than
33 recomputing it for each pass
34
18aa2adf 35*/
36
37/* References searched while implementing this.
18aa2adf 38
39 Compilers Principles, Techniques and Tools
40 Aho, Sethi, Ullman
41 Addison-Wesley, 1988
42
43 Global Optimization by Suppression of Partial Redundancies
44 E. Morel, C. Renvoise
45 communications of the acm, Vol. 22, Num. 2, Feb. 1979
46
47 A Portable Machine-Independent Global Optimizer - Design and Measurements
48 Frederick Chow
49 Stanford Ph.D. thesis, Dec. 1983
50
18aa2adf 51 A Fast Algorithm for Code Movement Optimization
52 D.M. Dhamdhere
53 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
54
55 A Solution to a Problem with Morel and Renvoise's
56 Global Optimization by Suppression of Partial Redundancies
57 K-H Drechsler, M.P. Stadel
58 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
59
60 Practical Adaptation of the Global Optimization
61 Algorithm of Morel and Renvoise
62 D.M. Dhamdhere
63 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
64
65 Efficiently Computing Static Single Assignment Form and the Control
66 Dependence Graph
67 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
68 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
69
18aa2adf 70 Lazy Code Motion
71 J. Knoop, O. Ruthing, B. Steffen
72 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
73
74 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
75 Time for Reducible Flow Control
76 Thomas Ball
77 ACM Letters on Programming Languages and Systems,
78 Vol. 2, Num. 1-4, Mar-Dec 1993
79
80 An Efficient Representation for Sparse Sets
81 Preston Briggs, Linda Torczon
82 ACM Letters on Programming Languages and Systems,
83 Vol. 2, Num. 1-4, Mar-Dec 1993
84
85 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
86 K-H Drechsler, M.P. Stadel
87 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
88
89 Partial Dead Code Elimination
90 J. Knoop, O. Ruthing, B. Steffen
91 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
92
93 Effective Partial Redundancy Elimination
94 P. Briggs, K.D. Cooper
95 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
96
97 The Program Structure Tree: Computing Control Regions in Linear Time
98 R. Johnson, D. Pearson, K. Pingali
99 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
100
101 Optimal Code Motion: Theory and Practice
102 J. Knoop, O. Ruthing, B. Steffen
103 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
104
105 The power of assignment motion
106 J. Knoop, O. Ruthing, B. Steffen
107 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
108
109 Global code motion / global value numbering
110 C. Click
111 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
112
113 Value Driven Redundancy Elimination
114 L.T. Simpson
115 Rice University Ph.D. thesis, Apr. 1996
116
117 Value Numbering
118 L.T. Simpson
119 Massively Scalar Compiler Project, Rice University, Sep. 1996
120
121 High Performance Compilers for Parallel Computing
122 Michael Wolfe
123 Addison-Wesley, 1996
124
ef0d57a0 125 Advanced Compiler Design and Implementation
126 Steven Muchnick
127 Morgan Kaufmann, 1997
128
7bcd381b 129 Building an Optimizing Compiler
130 Robert Morgan
131 Digital Press, 1998
132
ef0d57a0 133 People wishing to speed up the code here should read:
134 Elimination Algorithms for Data Flow Analysis
135 B.G. Ryder, M.C. Paull
136 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
137
138 How to Analyze Large Programs Efficiently and Informatively
139 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
140 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
141
18aa2adf 142 People wishing to do something different can find various possibilities
143 in the above papers and elsewhere.
144*/
145
146#include "config.h"
ebd9163c 147#include "system.h"
805e22b2 148#include "coretypes.h"
149#include "tm.h"
d3b64f2d 150#include "toplev.h"
18aa2adf 151
152#include "rtl.h"
95b49b1d 153#include "tree.h"
7953c610 154#include "tm_p.h"
18aa2adf 155#include "regs.h"
156#include "hard-reg-set.h"
157#include "flags.h"
158#include "real.h"
159#include "insn-config.h"
160#include "recog.h"
161#include "basic-block.h"
ebd9163c 162#include "output.h"
0a893c29 163#include "function.h"
3cfec666 164#include "expr.h"
a17466fa 165#include "except.h"
06e2144a 166#include "ggc.h"
9159979b 167#include "params.h"
09a762be 168#include "cselib.h"
c8a8ab0f 169#include "intl.h"
18aa2adf 170#include "obstack.h"
6416ac03 171#include "timevar.h"
77fce4cd 172#include "tree-pass.h"
0d707271 173#include "hashtab.h"
4059f3f0 174
18aa2adf 175/* Propagate flow information through back edges and thus enable PRE's
176 moving loop invariant calculations out of loops.
177
178 Originally this tended to create worse overall code, but several
179 improvements during the development of PRE seem to have made following
180 back edges generally a win.
181
182 Note much of the loop invariant code motion done here would normally
183 be done by loop.c, which has more heuristics for when to move invariants
184 out of loops. At some point we might need to move some of those
185 heuristics into gcse.c. */
18aa2adf 186
ef0d57a0 187/* We support GCSE via Partial Redundancy Elimination. PRE optimizations
188 are a superset of those done by GCSE.
18aa2adf 189
ef0d57a0 190 We perform the following steps:
18aa2adf 191
192 1) Compute basic block information.
193
194 2) Compute table of places where registers are set.
195
196 3) Perform copy/constant propagation.
197
0ca684f3 198 4) Perform global cse using lazy code motion if not optimizing
199 for size, or code hoisting if we are.
18aa2adf 200
c5826237 201 5) Perform another pass of copy/constant propagation.
18aa2adf 202
203 Two passes of copy/constant propagation are done because the first one
204 enables more GCSE and the second one helps to clean up the copies that
205 GCSE creates. This is needed more for PRE than for Classic because Classic
206 GCSE will try to use an existing register containing the common
207 subexpression rather than create a new one. This is harder to do for PRE
208 because of the code motion (which Classic GCSE doesn't do).
209
210 Expressions we are interested in GCSE-ing are of the form
211 (set (pseudo-reg) (expression)).
212 Function want_to_gcse_p says what these are.
213
214 PRE handles moving invariant expressions out of loops (by treating them as
ef0d57a0 215 partially redundant).
18aa2adf 216
217 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
218 assignment) based GVN (global value numbering). L. T. Simpson's paper
219 (Rice University) on value numbering is a useful reference for this.
220
221 **********************
222
223 We used to support multiple passes but there are diminishing returns in
224 doing so. The first pass usually makes 90% of the changes that are doable.
225 A second pass can make a few more changes made possible by the first pass.
226 Experiments show any further passes don't make enough changes to justify
227 the expense.
228
229 A study of spec92 using an unlimited number of passes:
230 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
231 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
232 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
233
234 It was found doing copy propagation between each pass enables further
235 substitutions.
236
237 PRE is quite expensive in complicated functions because the DFA can take
b9f02dbb 238 a while to converge. Hence we only perform one pass. The parameter
239 max-gcse-passes can be modified if one wants to experiment.
18aa2adf 240
241 **********************
242
243 The steps for PRE are:
244
245 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
246
247 2) Perform the data flow analysis for PRE.
248
249 3) Delete the redundant instructions
250
251 4) Insert the required copies [if any] that make the partially
252 redundant instructions fully redundant.
253
254 5) For other reaching expressions, insert an instruction to copy the value
255 to a newly created pseudo that will reach the redundant instruction.
256
257 The deletion is done first so that when we do insertions we
258 know which pseudo reg to use.
259
260 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
261 argue it is not. The number of iterations for the algorithm to converge
262 is typically 2-4 so I don't view it as that expensive (relatively speaking).
263
ef0d57a0 264 PRE GCSE depends heavily on the second CSE pass to clean up the copies
18aa2adf 265 we create. To make an expression reach the place where it's redundant,
266 the result of the expression is copied to a new register, and the redundant
267 expression is deleted by replacing it with this new register. Classic GCSE
268 doesn't have this problem as much as it computes the reaching defs of
04a40f24 269 each register in each block and thus can try to use an existing
270 register. */
18aa2adf 271\f
272/* GCSE global vars. */
273
ef0d57a0 274/* Note whether or not we should run jump optimization after gcse. We
275 want to do this for two cases.
276
277 * If we changed any jumps via cprop.
278
279 * If we added any labels via edge splitting. */
ef0d57a0 280static int run_jump_opt_after_gcse;
281
18aa2adf 282/* An obstack for our working variables. */
283static struct obstack gcse_obstack;
284
2c084240 285struct reg_use {rtx reg_rtx; };
bd7a25c8 286
18aa2adf 287/* Hash table of expressions. */
288
289struct expr
290{
291 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
292 rtx expr;
293 /* Index in the available expression bitmaps. */
294 int bitmap_index;
295 /* Next entry with the same hash. */
296 struct expr *next_same_hash;
297 /* List of anticipatable occurrences in basic blocks in the function.
298 An "anticipatable occurrence" is one that is the first occurrence in the
ef0d57a0 299 basic block, the operands are not modified in the basic block prior
300 to the occurrence and the output is not used between the start of
301 the block and the occurrence. */
18aa2adf 302 struct occr *antic_occr;
303 /* List of available occurrence in basic blocks in the function.
304 An "available occurrence" is one that is the last occurrence in the
305 basic block and the operands are not modified by following statements in
306 the basic block [including this insn]. */
307 struct occr *avail_occr;
308 /* Non-null if the computation is PRE redundant.
309 The value is the newly created pseudo-reg to record a copy of the
310 expression in all the places that reach the redundant copy. */
311 rtx reaching_reg;
312};
313
314/* Occurrence of an expression.
315 There is one per basic block. If a pattern appears more than once the
316 last appearance is used [or first for anticipatable expressions]. */
317
318struct occr
319{
320 /* Next occurrence of this expression. */
321 struct occr *next;
322 /* The insn that computes the expression. */
323 rtx insn;
6ef828f9 324 /* Nonzero if this [anticipatable] occurrence has been deleted. */
18aa2adf 325 char deleted_p;
6ef828f9 326 /* Nonzero if this [available] occurrence has been copied to
18aa2adf 327 reaching_reg. */
328 /* ??? This is mutually exclusive with deleted_p, so they could share
329 the same byte. */
330 char copied_p;
331};
332
333/* Expression and copy propagation hash tables.
334 Each hash table is an array of buckets.
335 ??? It is known that if it were an array of entries, structure elements
336 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
337 not clear whether in the final analysis a sufficient amount of memory would
338 be saved as the size of the available expression bitmaps would be larger
339 [one could build a mapping table without holes afterwards though].
2c084240 340 Someday I'll perform the computation and figure it out. */
18aa2adf 341
27cfe3f1 342struct hash_table
343{
344 /* The table itself.
345 This is an array of `expr_hash_table_size' elements. */
346 struct expr **table;
347
348 /* Size of the hash table, in elements. */
349 unsigned int size;
a08b57af 350
27cfe3f1 351 /* Number of hash table elements. */
352 unsigned int n_elems;
18aa2adf 353
27cfe3f1 354 /* Whether the table is expression of copy propagation one. */
355 int set_p;
356};
2c084240 357
27cfe3f1 358/* Expression hash table. */
359static struct hash_table expr_hash_table;
360
361/* Copy propagation hash table. */
362static struct hash_table set_hash_table;
18aa2adf 363
364/* Mapping of uids to cuids.
365 Only real insns get cuids. */
366static int *uid_cuid;
367
368/* Highest UID in UID_CUID. */
369static int max_uid;
370
371/* Get the cuid of an insn. */
91d4291d 372#ifdef ENABLE_CHECKING
0d59b19d 373#define INSN_CUID(INSN) \
374 (gcc_assert (INSN_UID (INSN) <= max_uid), uid_cuid[INSN_UID (INSN)])
91d4291d 375#else
18aa2adf 376#define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
91d4291d 377#endif
18aa2adf 378
379/* Number of cuids. */
380static int max_cuid;
381
382/* Mapping of cuids to insns. */
383static rtx *cuid_insn;
384
385/* Get insn from cuid. */
386#define CUID_INSN(CUID) (cuid_insn[CUID])
387
388/* Maximum register number in function prior to doing gcse + 1.
389 Registers created during this pass have regno >= max_gcse_regno.
390 This is named with "gcse" to not collide with global of same name. */
02e7a332 391static unsigned int max_gcse_regno;
18aa2adf 392
18aa2adf 393/* Table of registers that are modified.
2c084240 394
18aa2adf 395 For each register, each element is a list of places where the pseudo-reg
396 is set.
397
398 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
399 requires knowledge of which blocks kill which regs [and thus could use
ef0d57a0 400 a bitmap instead of the lists `reg_set_table' uses].
18aa2adf 401
2c084240 402 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
403 num-regs) [however perhaps it may be useful to keep the data as is]. One
404 advantage of recording things this way is that `reg_set_table' is fairly
405 sparse with respect to pseudo regs but for hard regs could be fairly dense
406 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
18aa2adf 407 up functions like compute_transp since in the case of pseudo-regs we only
408 need to iterate over the number of times a pseudo-reg is set, not over the
409 number of basic blocks [clearly there is a bit of a slow down in the cases
410 where a pseudo is set more than once in a block, however it is believed
411 that the net effect is to speed things up]. This isn't done for hard-regs
412 because recording call-clobbered hard-regs in `reg_set_table' at each
2c084240 413 function call can consume a fair bit of memory, and iterating over
414 hard-regs stored this way in compute_transp will be more expensive. */
18aa2adf 415
2c084240 416typedef struct reg_set
417{
18aa2adf 418 /* The next setting of this register. */
419 struct reg_set *next;
2d68741d 420 /* The index of the block where it was set. */
421 int bb_index;
18aa2adf 422} reg_set;
2c084240 423
18aa2adf 424static reg_set **reg_set_table;
2c084240 425
18aa2adf 426/* Size of `reg_set_table'.
427 The table starts out at max_gcse_regno + slop, and is enlarged as
428 necessary. */
429static int reg_set_table_size;
2c084240 430
18aa2adf 431/* Amount to grow `reg_set_table' by when it's full. */
432#define REG_SET_TABLE_SLOP 100
433
8e802be9 434/* This is a list of expressions which are MEMs and will be used by load
3cfec666 435 or store motion.
8e802be9 436 Load motion tracks MEMs which aren't killed by
0c6d8c36 437 anything except itself. (i.e., loads and stores to a single location).
3cfec666 438 We can then allow movement of these MEM refs with a little special
8e802be9 439 allowance. (all stores copy the same value to the reaching reg used
440 for the loads). This means all values used to store into memory must have
3cfec666 441 no side effects so we can re-issue the setter value.
8e802be9 442 Store Motion uses this structure as an expression table to track stores
443 which look interesting, and might be moveable towards the exit block. */
444
445struct ls_expr
446{
447 struct expr * expr; /* Gcse expression reference for LM. */
448 rtx pattern; /* Pattern of this mem. */
64928ee5 449 rtx pattern_regs; /* List of registers mentioned by the mem. */
7a676a9f 450 rtx loads; /* INSN list of loads seen. */
451 rtx stores; /* INSN list of stores seen. */
8e802be9 452 struct ls_expr * next; /* Next in the list. */
453 int invalid; /* Invalid for some reason. */
454 int index; /* If it maps to a bitmap index. */
69333952 455 unsigned int hash_index; /* Index when in a hash table. */
8e802be9 456 rtx reaching_reg; /* Register to use when re-writing. */
457};
458
47dd33b5 459/* Array of implicit set patterns indexed by basic block index. */
460static rtx *implicit_sets;
461
8e802be9 462/* Head of the list of load/store memory refs. */
463static struct ls_expr * pre_ldst_mems = NULL;
464
0d707271 465/* Hashtable for the load/store memory refs. */
466static htab_t pre_ldst_table = NULL;
467
18aa2adf 468/* Bitmap containing one bit for each register in the program.
469 Used when performing GCSE to track which registers have been set since
470 the start of the basic block. */
7fb47f9f 471static regset reg_set_bitmap;
18aa2adf 472
473/* For each block, a bitmap of registers set in the block.
0ca684f3 474 This is used by compute_transp.
18aa2adf 475 It is computed during hash table computation and not by compute_sets
476 as it includes registers added since the last pass (or between cprop and
477 gcse) and it's currently not easy to realloc sbitmap vectors. */
478static sbitmap *reg_set_in_block;
479
8e802be9 480/* Array, indexed by basic block number for a list of insns which modify
481 memory within that block. */
482static rtx * modify_mem_list;
78d140c9 483static bitmap modify_mem_list_set;
8e802be9 484
485/* This array parallels modify_mem_list, but is kept canonicalized. */
486static rtx * canon_modify_mem_list;
78d140c9 487
f55d2721 488/* Bitmap indexed by block numbers to record which blocks contain
489 function calls. */
490static bitmap blocks_with_calls;
491
18aa2adf 492/* Various variables for statistics gathering. */
493
494/* Memory used in a pass.
495 This isn't intended to be absolutely precise. Its intent is only
496 to keep an eye on memory usage. */
497static int bytes_used;
2c084240 498
18aa2adf 499/* GCSE substitutions made. */
500static int gcse_subst_count;
501/* Number of copy instructions created. */
502static int gcse_create_count;
6416ac03 503/* Number of local constants propagated. */
504static int local_const_prop_count;
442e3cb9 505/* Number of local copies propagated. */
6416ac03 506static int local_copy_prop_count;
507/* Number of global constants propagated. */
508static int global_const_prop_count;
442e3cb9 509/* Number of global copies propagated. */
6416ac03 510static int global_copy_prop_count;
18aa2adf 511\f
0ca684f3 512/* For available exprs */
513static sbitmap *ae_kill, *ae_gen;
18aa2adf 514\f
952f0048 515static void compute_can_copy (void);
2f800191 516static void *gmalloc (size_t) ATTRIBUTE_MALLOC;
517static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
518static void *grealloc (void *, size_t);
f0af5a88 519static void *gcse_alloc (unsigned long);
defc8016 520static void alloc_gcse_mem (void);
952f0048 521static void free_gcse_mem (void);
522static void alloc_reg_set_mem (int);
523static void free_reg_set_mem (void);
952f0048 524static void record_one_set (int, rtx);
525static void record_set_info (rtx, rtx, void *);
defc8016 526static void compute_sets (void);
952f0048 527static void hash_scan_insn (rtx, struct hash_table *, int);
528static void hash_scan_set (rtx, rtx, struct hash_table *);
529static void hash_scan_clobber (rtx, rtx, struct hash_table *);
530static void hash_scan_call (rtx, rtx, struct hash_table *);
531static int want_to_gcse_p (rtx);
69dbb666 532static bool can_assign_to_reg_p (rtx);
952f0048 533static bool gcse_constant_p (rtx);
534static int oprs_unchanged_p (rtx, rtx, int);
535static int oprs_anticipatable_p (rtx, rtx);
536static int oprs_available_p (rtx, rtx);
537static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int,
538 struct hash_table *);
539static void insert_set_in_table (rtx, rtx, struct hash_table *);
540static unsigned int hash_expr (rtx, enum machine_mode, int *, int);
952f0048 541static unsigned int hash_set (int, int);
542static int expr_equiv_p (rtx, rtx);
543static void record_last_reg_set_info (rtx, int);
544static void record_last_mem_set_info (rtx);
545static void record_last_set_info (rtx, rtx, void *);
546static void compute_hash_table (struct hash_table *);
547static void alloc_hash_table (int, struct hash_table *, int);
548static void free_hash_table (struct hash_table *);
549static void compute_hash_table_work (struct hash_table *);
550static void dump_hash_table (FILE *, const char *, struct hash_table *);
952f0048 551static struct expr *lookup_set (unsigned int, struct hash_table *);
552static struct expr *next_set (unsigned int, struct expr *);
553static void reset_opr_set_tables (void);
554static int oprs_not_set_p (rtx, rtx);
555static void mark_call (rtx);
556static void mark_set (rtx, rtx);
557static void mark_clobber (rtx, rtx);
558static void mark_oprs_set (rtx);
559static void alloc_cprop_mem (int, int);
560static void free_cprop_mem (void);
561static void compute_transp (rtx, int, sbitmap *, int);
562static void compute_transpout (void);
563static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *,
564 struct hash_table *);
565static void compute_cprop_data (void);
566static void find_used_regs (rtx *, void *);
567static int try_replace_reg (rtx, rtx, rtx);
568static struct expr *find_avail_set (int, rtx);
569static int cprop_jump (basic_block, rtx, rtx, rtx, rtx);
570static void mems_conflict_for_gcse_p (rtx, rtx, void *);
571static int load_killed_in_block_p (basic_block, int, rtx, int);
572static void canon_list_insert (rtx, rtx, void *);
573static int cprop_insn (rtx, int);
574static int cprop (int);
575static void find_implicit_sets (void);
defc8016 576static int one_cprop_pass (int, bool, bool);
577static bool constprop_register (rtx, rtx, rtx, bool);
952f0048 578static struct expr *find_bypass_set (int, int);
579static bool reg_killed_on_edge (rtx, edge);
580static int bypass_block (basic_block, rtx, rtx);
581static int bypass_conditional_jumps (void);
582static void alloc_pre_mem (int, int);
583static void free_pre_mem (void);
584static void compute_pre_data (void);
585static int pre_expr_reaches_here_p (basic_block, struct expr *,
586 basic_block);
587static void insert_insn_end_bb (struct expr *, basic_block, int);
588static void pre_insert_copy_insn (struct expr *, rtx);
589static void pre_insert_copies (void);
590static int pre_delete (void);
591static int pre_gcse (void);
592static int one_pre_gcse_pass (int);
593static void add_label_notes (rtx, rtx);
594static void alloc_code_hoist_mem (int, int);
595static void free_code_hoist_mem (void);
596static void compute_code_hoist_vbeinout (void);
597static void compute_code_hoist_data (void);
598static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *);
599static void hoist_code (void);
600static int one_code_hoisting_pass (void);
952f0048 601static rtx process_insert_insn (struct expr *);
602static int pre_edge_insert (struct edge_list *, struct expr **);
952f0048 603static int pre_expr_reaches_here_p_work (basic_block, struct expr *,
604 basic_block, char *);
605static struct ls_expr * ldst_entry (rtx);
606static void free_ldst_entry (struct ls_expr *);
607static void free_ldst_mems (void);
608static void print_ldst_list (FILE *);
609static struct ls_expr * find_rtx_in_ldst (rtx);
610static int enumerate_ldsts (void);
611static inline struct ls_expr * first_ls_expr (void);
612static inline struct ls_expr * next_ls_expr (struct ls_expr *);
613static int simple_mem (rtx);
614static void invalidate_any_buried_refs (rtx);
615static void compute_ld_motion_mems (void);
616static void trim_ld_motion_mems (void);
617static void update_ld_motion_stores (struct expr *);
618static void reg_set_info (rtx, rtx, void *);
9e4a9ceb 619static void reg_clear_last_set (rtx, rtx, void *);
952f0048 620static bool store_ops_ok (rtx, int *);
621static rtx extract_mentioned_regs (rtx);
622static rtx extract_mentioned_regs_helper (rtx, rtx);
623static void find_moveable_store (rtx, int *, int *);
624static int compute_store_table (void);
1d7429d8 625static bool load_kills_store (rtx, rtx, int);
626static bool find_loads (rtx, rtx, int);
627static bool store_killed_in_insn (rtx, rtx, rtx, int);
952f0048 628static bool store_killed_after (rtx, rtx, rtx, basic_block, int *, rtx *);
629static bool store_killed_before (rtx, rtx, rtx, basic_block, int *);
630static void build_store_vectors (void);
631static void insert_insn_start_bb (rtx, basic_block);
632static int insert_store (struct ls_expr *, edge);
609e463e 633static void remove_reachable_equiv_notes (basic_block, struct ls_expr *);
634static void replace_store_insn (rtx, rtx, basic_block, struct ls_expr *);
952f0048 635static void delete_store (struct ls_expr *, basic_block);
636static void free_store_memory (void);
637static void store_motion (void);
638static void free_insn_expr_list_list (rtx *);
639static void clear_modify_mem_tables (void);
640static void free_modify_mem_tables (void);
641static rtx gcse_emit_move_after (rtx, rtx, rtx);
642static void local_cprop_find_used_regs (rtx *, void *);
defc8016 643static bool do_local_cprop (rtx, rtx, bool, rtx*);
952f0048 644static bool adjust_libcall_notes (rtx, rtx, rtx, rtx*);
defc8016 645static void local_cprop_pass (bool);
c8a8ab0f 646static bool is_too_expensive (const char *);
18aa2adf 647\f
c8a8ab0f 648
18aa2adf 649/* Entry point for global common subexpression elimination.
b0c9d2cb 650 F is the first instruction in the function. Return nonzero if a
651 change is mode. */
18aa2adf 652
f9567f01 653static int
3f5be5f4 654gcse_main (rtx f ATTRIBUTE_UNUSED)
18aa2adf 655{
656 int changed, pass;
657 /* Bytes used at start of pass. */
658 int initial_bytes_used;
659 /* Maximum number of bytes used by a pass. */
660 int max_pass_bytes;
661 /* Point to release obstack data from for each pass. */
662 char *gcse_obstack_bottom;
663
c7a3eccf 664 /* We do not construct an accurate cfg in functions which call
665 setjmp, so just punt to be safe. */
18aa2adf 666 if (current_function_calls_setjmp)
c5826237 667 return 0;
3cfec666 668
c7a3eccf 669 /* Assume that we do not need to run jump optimizations after gcse. */
670 run_jump_opt_after_gcse = 0;
671
c7a3eccf 672 /* Identify the basic block information for this function, including
673 successors and predecessors. */
18aa2adf 674 max_gcse_regno = max_reg_num ();
18aa2adf 675
3f5be5f4 676 if (dump_file)
677 dump_flow_info (dump_file);
7bcd381b 678
c8a8ab0f 679 /* Return if there's nothing to do, or it is too expensive. */
4e9a0141 680 if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1
681 || is_too_expensive (_("GCSE disabled")))
1d1e21f3 682 return 0;
b9f02dbb 683
18aa2adf 684 gcc_obstack_init (&gcse_obstack);
7bcd381b 685 bytes_used = 0;
18aa2adf 686
8e802be9 687 /* We need alias. */
688 init_alias_analysis ();
2c084240 689 /* Record where pseudo-registers are set. This data is kept accurate
690 during each pass. ??? We could also record hard-reg information here
691 [since it's unchanging], however it is currently done during hash table
692 computation.
c7a3eccf 693
2c084240 694 It may be tempting to compute MEM set information here too, but MEM sets
695 will be subject to code motion one day and thus we need to compute
c7a3eccf 696 information about memory sets when we build the hash tables. */
18aa2adf 697
698 alloc_reg_set_mem (max_gcse_regno);
defc8016 699 compute_sets ();
18aa2adf 700
701 pass = 0;
702 initial_bytes_used = bytes_used;
703 max_pass_bytes = 0;
704 gcse_obstack_bottom = gcse_alloc (1);
705 changed = 1;
d023fd14 706 while (changed && pass < MAX_GCSE_PASSES)
18aa2adf 707 {
708 changed = 0;
3f5be5f4 709 if (dump_file)
710 fprintf (dump_file, "GCSE pass %d\n\n", pass + 1);
18aa2adf 711
712 /* Initialize bytes_used to the space for the pred/succ lists,
713 and the reg_set_table data. */
714 bytes_used = initial_bytes_used;
715
716 /* Each pass may create new registers, so recalculate each time. */
717 max_gcse_regno = max_reg_num ();
718
defc8016 719 alloc_gcse_mem ();
18aa2adf 720
c7a3eccf 721 /* Don't allow constant propagation to modify jumps
722 during this pass. */
6416ac03 723 timevar_push (TV_CPROP1);
defc8016 724 changed = one_cprop_pass (pass + 1, false, false);
6416ac03 725 timevar_pop (TV_CPROP1);
18aa2adf 726
727 if (optimize_size)
0ca684f3 728 /* Do nothing. */ ;
18aa2adf 729 else
3cfec666 730 {
6416ac03 731 timevar_push (TV_PRE);
7bcd381b 732 changed |= one_pre_gcse_pass (pass + 1);
8e802be9 733 /* We may have just created new basic blocks. Release and
734 recompute various things which are sized on the number of
735 basic blocks. */
736 if (changed)
737 {
7fb47f9f 738 free_modify_mem_tables ();
2f800191 739 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
740 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
8e802be9 741 }
7bcd381b 742 free_reg_set_mem ();
743 alloc_reg_set_mem (max_reg_num ());
defc8016 744 compute_sets ();
7bcd381b 745 run_jump_opt_after_gcse = 1;
6416ac03 746 timevar_pop (TV_PRE);
7bcd381b 747 }
18aa2adf 748
749 if (max_pass_bytes < bytes_used)
750 max_pass_bytes = bytes_used;
751
6627f3ed 752 /* Free up memory, then reallocate for code hoisting. We can
753 not re-use the existing allocated memory because the tables
754 will not have info for the insns or registers created by
755 partial redundancy elimination. */
18aa2adf 756 free_gcse_mem ();
757
d632b59a 758 /* It does not make sense to run code hoisting unless we are optimizing
6627f3ed 759 for code size -- it rarely makes programs faster, and can make
760 them bigger if we did partial redundancy elimination (when optimizing
0ca684f3 761 for space, we don't run the partial redundancy algorithms). */
6627f3ed 762 if (optimize_size)
3cfec666 763 {
6416ac03 764 timevar_push (TV_HOIST);
6627f3ed 765 max_gcse_regno = max_reg_num ();
defc8016 766 alloc_gcse_mem ();
6627f3ed 767 changed |= one_code_hoisting_pass ();
768 free_gcse_mem ();
769
770 if (max_pass_bytes < bytes_used)
771 max_pass_bytes = bytes_used;
6416ac03 772 timevar_pop (TV_HOIST);
3cfec666 773 }
6627f3ed 774
3f5be5f4 775 if (dump_file)
18aa2adf 776 {
3f5be5f4 777 fprintf (dump_file, "\n");
778 fflush (dump_file);
18aa2adf 779 }
2c084240 780
18aa2adf 781 obstack_free (&gcse_obstack, gcse_obstack_bottom);
782 pass++;
783 }
784
c7a3eccf 785 /* Do one last pass of copy propagation, including cprop into
786 conditional jumps. */
787
788 max_gcse_regno = max_reg_num ();
defc8016 789 alloc_gcse_mem ();
c7a3eccf 790 /* This time, go ahead and allow cprop to alter jumps. */
6416ac03 791 timevar_push (TV_CPROP2);
defc8016 792 one_cprop_pass (pass + 1, true, false);
6416ac03 793 timevar_pop (TV_CPROP2);
c7a3eccf 794 free_gcse_mem ();
18aa2adf 795
3f5be5f4 796 if (dump_file)
18aa2adf 797 {
3f5be5f4 798 fprintf (dump_file, "GCSE of %s: %d basic blocks, ",
35901471 799 current_function_name (), n_basic_blocks);
3f5be5f4 800 fprintf (dump_file, "%d pass%s, %d bytes\n\n",
18aa2adf 801 pass, pass > 1 ? "es" : "", max_pass_bytes);
802 }
803
d946ea19 804 obstack_free (&gcse_obstack, NULL);
18aa2adf 805 free_reg_set_mem ();
b9f02dbb 806
8e802be9 807 /* We are finished with alias. */
808 end_alias_analysis ();
809 allocate_reg_info (max_reg_num (), FALSE, FALSE);
810
64928ee5 811 if (!optimize_size && flag_gcse_sm)
6416ac03 812 {
813 timevar_push (TV_LSM);
814 store_motion ();
815 timevar_pop (TV_LSM);
816 }
64928ee5 817
8e802be9 818 /* Record where pseudo-registers are set. */
c5826237 819 return run_jump_opt_after_gcse;
18aa2adf 820}
821\f
822/* Misc. utilities. */
823
3d055936 824/* Nonzero for each mode that supports (set (reg) (reg)).
825 This is trivially true for integer and floating point values.
826 It may or may not be true for condition codes. */
827static char can_copy[(int) NUM_MACHINE_MODES];
828
18aa2adf 829/* Compute which modes support reg/reg copy operations. */
830
831static void
952f0048 832compute_can_copy (void)
18aa2adf 833{
834 int i;
ebd9163c 835#ifndef AVOID_CCMODE_COPIES
387732c1 836 rtx reg, insn;
ebd9163c 837#endif
3d055936 838 memset (can_copy, 0, NUM_MACHINE_MODES);
18aa2adf 839
840 start_sequence ();
841 for (i = 0; i < NUM_MACHINE_MODES; i++)
2c084240 842 if (GET_MODE_CLASS (i) == MODE_CC)
843 {
18aa2adf 844#ifdef AVOID_CCMODE_COPIES
3d055936 845 can_copy[i] = 0;
18aa2adf 846#else
2c084240 847 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
848 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
4679ade3 849 if (recog (PATTERN (insn), insn, NULL) >= 0)
3d055936 850 can_copy[i] = 1;
18aa2adf 851#endif
2c084240 852 }
72f3466e 853 else
3d055936 854 can_copy[i] = 1;
2c084240 855
18aa2adf 856 end_sequence ();
18aa2adf 857}
3d055936 858
859/* Returns whether the mode supports reg/reg copy operations. */
860
861bool
952f0048 862can_copy_p (enum machine_mode mode)
3d055936 863{
864 static bool can_copy_init_p = false;
865
866 if (! can_copy_init_p)
867 {
868 compute_can_copy ();
869 can_copy_init_p = true;
870 }
871
872 return can_copy[mode] != 0;
873}
18aa2adf 874\f
875/* Cover function to xmalloc to record bytes allocated. */
876
f0af5a88 877static void *
a41493eb 878gmalloc (size_t size)
18aa2adf 879{
880 bytes_used += size;
881 return xmalloc (size);
882}
883
2f800191 884/* Cover function to xcalloc to record bytes allocated. */
885
886static void *
887gcalloc (size_t nelem, size_t elsize)
888{
889 bytes_used += nelem * elsize;
890 return xcalloc (nelem, elsize);
891}
892
18aa2adf 893/* Cover function to xrealloc.
894 We don't record the additional size since we don't know it.
895 It won't affect memory usage stats much anyway. */
896
f0af5a88 897static void *
2f800191 898grealloc (void *ptr, size_t size)
18aa2adf 899{
900 return xrealloc (ptr, size);
901}
902
7cdd3716 903/* Cover function to obstack_alloc. */
18aa2adf 904
f0af5a88 905static void *
952f0048 906gcse_alloc (unsigned long size)
18aa2adf 907{
7cdd3716 908 bytes_used += size;
f0af5a88 909 return obstack_alloc (&gcse_obstack, size);
18aa2adf 910}
911
912/* Allocate memory for the cuid mapping array,
913 and reg/memory set tracking tables.
914
915 This is called at the start of each pass. */
916
917static void
defc8016 918alloc_gcse_mem (void)
18aa2adf 919{
2f800191 920 int i;
defc8016 921 basic_block bb;
18aa2adf 922 rtx insn;
923
924 /* Find the largest UID and create a mapping from UIDs to CUIDs.
925 CUIDs are like UIDs except they increase monotonically, have no gaps,
defc8016 926 and only apply to real insns.
927 (Actually, there are gaps, for insn that are not inside a basic block.
928 but we should never see those anyway, so this is OK.) */
18aa2adf 929
930 max_uid = get_max_uid ();
2f800191 931 uid_cuid = gcalloc (max_uid + 1, sizeof (int));
defc8016 932 i = 0;
933 FOR_EACH_BB (bb)
934 FOR_BB_INSNS (bb, insn)
935 {
936 if (INSN_P (insn))
937 uid_cuid[INSN_UID (insn)] = i++;
938 else
939 uid_cuid[INSN_UID (insn)] = i;
940 }
18aa2adf 941
942 /* Create a table mapping cuids to insns. */
943
944 max_cuid = i;
2f800191 945 cuid_insn = gcalloc (max_cuid + 1, sizeof (rtx));
defc8016 946 i = 0;
947 FOR_EACH_BB (bb)
948 FOR_BB_INSNS (bb, insn)
949 if (INSN_P (insn))
950 CUID_INSN (i++) = insn;
18aa2adf 951
952 /* Allocate vars to track sets of regs. */
27335ffd 953 reg_set_bitmap = BITMAP_ALLOC (NULL);
18aa2adf 954
955 /* Allocate vars to track sets of regs, memory per block. */
f0af5a88 956 reg_set_in_block = sbitmap_vector_alloc (last_basic_block, max_gcse_regno);
8e802be9 957 /* Allocate array to keep a list of insns which modify memory in each
958 basic block. */
2f800191 959 modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
960 canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx));
27335ffd 961 modify_mem_list_set = BITMAP_ALLOC (NULL);
962 blocks_with_calls = BITMAP_ALLOC (NULL);
18aa2adf 963}
964
965/* Free memory allocated by alloc_gcse_mem. */
966
967static void
952f0048 968free_gcse_mem (void)
18aa2adf 969{
970 free (uid_cuid);
971 free (cuid_insn);
972
27335ffd 973 BITMAP_FREE (reg_set_bitmap);
18aa2adf 974
cca23eb2 975 sbitmap_vector_free (reg_set_in_block);
7fb47f9f 976 free_modify_mem_tables ();
27335ffd 977 BITMAP_FREE (modify_mem_list_set);
978 BITMAP_FREE (blocks_with_calls);
18aa2adf 979}
c7a3eccf 980\f
981/* Compute the local properties of each recorded expression.
2c084240 982
983 Local properties are those that are defined by the block, irrespective of
984 other blocks.
c7a3eccf 985
986 An expression is transparent in a block if its operands are not modified
987 in the block.
988
989 An expression is computed (locally available) in a block if it is computed
990 at least once and expression would contain the same value if the
991 computation was moved to the end of the block.
992
993 An expression is locally anticipatable in a block if it is computed at
994 least once and expression would contain the same value if the computation
995 was moved to the beginning of the block.
996
2c084240 997 We call this routine for cprop, pre and code hoisting. They all compute
998 basically the same information and thus can easily share this code.
18aa2adf 999
2c084240 1000 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1001 properties. If NULL, then it is not necessary to compute or record that
1002 particular property.
c7a3eccf 1003
27cfe3f1 1004 TABLE controls which hash table to look at. If it is set hash table,
1005 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
2c084240 1006 ABSALTERED. */
3cfec666 1007
c7a3eccf 1008static void
b9f02dbb 1009compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc,
1010 struct hash_table *table)
c7a3eccf 1011{
27cfe3f1 1012 unsigned int i;
3cfec666 1013
c7a3eccf 1014 /* Initialize any bitmaps that were passed in. */
1015 if (transp)
3d5c627e 1016 {
27cfe3f1 1017 if (table->set_p)
f20183e6 1018 sbitmap_vector_zero (transp, last_basic_block);
3d5c627e 1019 else
f20183e6 1020 sbitmap_vector_ones (transp, last_basic_block);
3d5c627e 1021 }
2c084240 1022
c7a3eccf 1023 if (comp)
f20183e6 1024 sbitmap_vector_zero (comp, last_basic_block);
c7a3eccf 1025 if (antloc)
f20183e6 1026 sbitmap_vector_zero (antloc, last_basic_block);
c7a3eccf 1027
27cfe3f1 1028 for (i = 0; i < table->size; i++)
18aa2adf 1029 {
c7a3eccf 1030 struct expr *expr;
1031
27cfe3f1 1032 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
c7a3eccf 1033 {
c7a3eccf 1034 int indx = expr->bitmap_index;
2c084240 1035 struct occr *occr;
c7a3eccf 1036
1037 /* The expression is transparent in this block if it is not killed.
1038 We start by assuming all are transparent [none are killed], and
1039 then reset the bits for those that are. */
c7a3eccf 1040 if (transp)
27cfe3f1 1041 compute_transp (expr->expr, indx, transp, table->set_p);
c7a3eccf 1042
1043 /* The occurrences recorded in antic_occr are exactly those that
6ef828f9 1044 we want to set to nonzero in ANTLOC. */
c7a3eccf 1045 if (antloc)
2c084240 1046 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1047 {
1048 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
c7a3eccf 1049
2c084240 1050 /* While we're scanning the table, this is a good place to
1051 initialize this. */
1052 occr->deleted_p = 0;
1053 }
c7a3eccf 1054
1055 /* The occurrences recorded in avail_occr are exactly those that
6ef828f9 1056 we want to set to nonzero in COMP. */
c7a3eccf 1057 if (comp)
2c084240 1058 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1059 {
1060 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
c7a3eccf 1061
2c084240 1062 /* While we're scanning the table, this is a good place to
1063 initialize this. */
1064 occr->copied_p = 0;
1065 }
c7a3eccf 1066
1067 /* While we're scanning the table, this is a good place to
1068 initialize this. */
1069 expr->reaching_reg = 0;
1070 }
18aa2adf 1071 }
18aa2adf 1072}
1073\f
1074/* Register set information.
1075
1076 `reg_set_table' records where each register is set or otherwise
1077 modified. */
1078
1079static struct obstack reg_set_obstack;
1080
1081static void
952f0048 1082alloc_reg_set_mem (int n_regs)
18aa2adf 1083{
18aa2adf 1084 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
2f800191 1085 reg_set_table = gcalloc (reg_set_table_size, sizeof (struct reg_set *));
18aa2adf 1086
1087 gcc_obstack_init (&reg_set_obstack);
1088}
1089
1090static void
952f0048 1091free_reg_set_mem (void)
18aa2adf 1092{
1093 free (reg_set_table);
d946ea19 1094 obstack_free (&reg_set_obstack, NULL);
18aa2adf 1095}
1096
1097/* Record REGNO in the reg_set table. */
1098
1099static void
952f0048 1100record_one_set (int regno, rtx insn)
18aa2adf 1101{
1b80ba05 1102 /* Allocate a new reg_set element and link it onto the list. */
256d47d0 1103 struct reg_set *new_reg_info;
18aa2adf 1104
1105 /* If the table isn't big enough, enlarge it. */
1106 if (regno >= reg_set_table_size)
1107 {
1108 int new_size = regno + REG_SET_TABLE_SLOP;
2c084240 1109
f0af5a88 1110 reg_set_table = grealloc (reg_set_table,
1111 new_size * sizeof (struct reg_set *));
1112 memset (reg_set_table + reg_set_table_size, 0,
387732c1 1113 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
18aa2adf 1114 reg_set_table_size = new_size;
1115 }
1116
f0af5a88 1117 new_reg_info = obstack_alloc (&reg_set_obstack, sizeof (struct reg_set));
18aa2adf 1118 bytes_used += sizeof (struct reg_set);
2d68741d 1119 new_reg_info->bb_index = BLOCK_NUM (insn);
2c59145b 1120 new_reg_info->next = reg_set_table[regno];
1121 reg_set_table[regno] = new_reg_info;
18aa2adf 1122}
1123
2c084240 1124/* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1125 an insn. The DATA is really the instruction in which the SET is
1126 occurring. */
18aa2adf 1127
1128static void
952f0048 1129record_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data)
18aa2adf 1130{
ec8895d7 1131 rtx record_set_insn = (rtx) data;
1132
b9f02dbb 1133 if (REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
2c084240 1134 record_one_set (REGNO (dest), record_set_insn);
18aa2adf 1135}
1136
1137/* Scan the function and record each set of each pseudo-register.
1138
2c084240 1139 This is called once, at the start of the gcse pass. See the comments for
98667efb 1140 `reg_set_table' for further documentation. */
18aa2adf 1141
1142static void
defc8016 1143compute_sets (void)
18aa2adf 1144{
defc8016 1145 basic_block bb;
2c084240 1146 rtx insn;
18aa2adf 1147
defc8016 1148 FOR_EACH_BB (bb)
1149 FOR_BB_INSNS (bb, insn)
1150 if (INSN_P (insn))
1151 note_stores (PATTERN (insn), record_set_info, insn);
18aa2adf 1152}
1153\f
1154/* Hash table support. */
1155
eac13465 1156struct reg_avail_info
1157{
4c26117a 1158 basic_block last_bb;
eac13465 1159 int first_set;
1160 int last_set;
1161};
1162
1163static struct reg_avail_info *reg_avail_info;
4c26117a 1164static basic_block current_bb;
18aa2adf 1165
18aa2adf 1166
06e2144a 1167/* See whether X, the source of a set, is something we want to consider for
1168 GCSE. */
18aa2adf 1169
1170static int
952f0048 1171want_to_gcse_p (rtx x)
18aa2adf 1172{
2c084240 1173 switch (GET_CODE (x))
18aa2adf 1174 {
1175 case REG:
1176 case SUBREG:
1177 case CONST_INT:
1178 case CONST_DOUBLE:
886cfd4f 1179 case CONST_VECTOR:
18aa2adf 1180 case CALL:
1181 return 0;
1182
1183 default:
69dbb666 1184 return can_assign_to_reg_p (x);
18aa2adf 1185 }
69dbb666 1186}
1187
1188/* Used internally by can_assign_to_reg_p. */
1189
1190static GTY(()) rtx test_insn;
1191
1192/* Return true if we can assign X to a pseudo register. */
1193
1194static bool
1195can_assign_to_reg_p (rtx x)
1196{
1197 int num_clobbers = 0;
1198 int icode;
18aa2adf 1199
06e2144a 1200 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1201 if (general_operand (x, GET_MODE (x)))
1202 return 1;
1203 else if (GET_MODE (x) == VOIDmode)
1204 return 0;
1205
1206 /* Otherwise, check if we can make a valid insn from it. First initialize
1207 our test insn if we haven't already. */
1208 if (test_insn == 0)
1209 {
1210 test_insn
1211 = make_insn_raw (gen_rtx_SET (VOIDmode,
1212 gen_rtx_REG (word_mode,
1213 FIRST_PSEUDO_REGISTER * 2),
1214 const0_rtx));
1215 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
06e2144a 1216 }
1217
1218 /* Now make an insn like the one we would make when GCSE'ing and see if
1219 valid. */
1220 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1221 SET_SRC (PATTERN (test_insn)) = x;
1222 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1223 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
18aa2adf 1224}
1225
6ef828f9 1226/* Return nonzero if the operands of expression X are unchanged from the
18aa2adf 1227 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1228 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1229
1230static int
952f0048 1231oprs_unchanged_p (rtx x, rtx insn, int avail_p)
18aa2adf 1232{
2c084240 1233 int i, j;
18aa2adf 1234 enum rtx_code code;
d2ca078f 1235 const char *fmt;
18aa2adf 1236
18aa2adf 1237 if (x == 0)
1238 return 1;
1239
1240 code = GET_CODE (x);
1241 switch (code)
1242 {
1243 case REG:
eac13465 1244 {
1245 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1246
1247 if (info->last_bb != current_bb)
1248 return 1;
3cfec666 1249 if (avail_p)
eac13465 1250 return info->last_set < INSN_CUID (insn);
1251 else
1252 return info->first_set >= INSN_CUID (insn);
1253 }
18aa2adf 1254
1255 case MEM:
4c26117a 1256 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
8e802be9 1257 x, avail_p))
1258 return 0;
18aa2adf 1259 else
2c084240 1260 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
18aa2adf 1261
1262 case PRE_DEC:
1263 case PRE_INC:
1264 case POST_DEC:
1265 case POST_INC:
40988080 1266 case PRE_MODIFY:
1267 case POST_MODIFY:
18aa2adf 1268 return 0;
1269
1270 case PC:
1271 case CC0: /*FIXME*/
1272 case CONST:
1273 case CONST_INT:
1274 case CONST_DOUBLE:
886cfd4f 1275 case CONST_VECTOR:
18aa2adf 1276 case SYMBOL_REF:
1277 case LABEL_REF:
1278 case ADDR_VEC:
1279 case ADDR_DIFF_VEC:
1280 return 1;
1281
1282 default:
1283 break;
1284 }
1285
2c084240 1286 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
18aa2adf 1287 {
1288 if (fmt[i] == 'e')
1289 {
2c084240 1290 /* If we are about to do the last recursive call needed at this
1291 level, change it into iteration. This function is called enough
1292 to be worth it. */
18aa2adf 1293 if (i == 0)
2c084240 1294 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1295
1296 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
18aa2adf 1297 return 0;
1298 }
1299 else if (fmt[i] == 'E')
2c084240 1300 for (j = 0; j < XVECLEN (x, i); j++)
1301 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1302 return 0;
18aa2adf 1303 }
1304
1305 return 1;
1306}
1307
8e802be9 1308/* Used for communication between mems_conflict_for_gcse_p and
1309 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1310 conflict between two memory references. */
1311static int gcse_mems_conflict_p;
1312
1313/* Used for communication between mems_conflict_for_gcse_p and
1314 load_killed_in_block_p. A memory reference for a load instruction,
1315 mems_conflict_for_gcse_p will see if a memory store conflicts with
1316 this memory load. */
1317static rtx gcse_mem_operand;
1318
1319/* DEST is the output of an instruction. If it is a memory reference, and
1320 possibly conflicts with the load found in gcse_mem_operand, then set
1321 gcse_mems_conflict_p to a nonzero value. */
1322
1323static void
952f0048 1324mems_conflict_for_gcse_p (rtx dest, rtx setter ATTRIBUTE_UNUSED,
1325 void *data ATTRIBUTE_UNUSED)
8e802be9 1326{
1327 while (GET_CODE (dest) == SUBREG
1328 || GET_CODE (dest) == ZERO_EXTRACT
8e802be9 1329 || GET_CODE (dest) == STRICT_LOW_PART)
1330 dest = XEXP (dest, 0);
1331
1332 /* If DEST is not a MEM, then it will not conflict with the load. Note
1333 that function calls are assumed to clobber memory, but are handled
1334 elsewhere. */
b9f02dbb 1335 if (! MEM_P (dest))
8e802be9 1336 return;
7a676a9f 1337
8e802be9 1338 /* If we are setting a MEM in our list of specially recognized MEMs,
3cfec666 1339 don't mark as killed this time. */
1340
64928ee5 1341 if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL)
8e802be9 1342 {
1343 if (!find_rtx_in_ldst (dest))
1344 gcse_mems_conflict_p = 1;
1345 return;
1346 }
7a676a9f 1347
8e802be9 1348 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1349 rtx_addr_varies_p))
1350 gcse_mems_conflict_p = 1;
1351}
1352
1353/* Return nonzero if the expression in X (a memory reference) is killed
1354 in block BB before or after the insn with the CUID in UID_LIMIT.
1355 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1356 before UID_LIMIT.
1357
1358 To check the entire block, set UID_LIMIT to max_uid + 1 and
1359 AVAIL_P to 0. */
1360
1361static int
952f0048 1362load_killed_in_block_p (basic_block bb, int uid_limit, rtx x, int avail_p)
8e802be9 1363{
b3d6de89 1364 rtx list_entry = modify_mem_list[bb->index];
a2658f4a 1365
1366 /* If this is a readonly then we aren't going to be changing it. */
1367 if (MEM_READONLY_P (x))
1368 return 0;
1369
8e802be9 1370 while (list_entry)
1371 {
1372 rtx setter;
1373 /* Ignore entries in the list that do not apply. */
1374 if ((avail_p
1375 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1376 || (! avail_p
1377 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1378 {
1379 list_entry = XEXP (list_entry, 1);
1380 continue;
1381 }
1382
1383 setter = XEXP (list_entry, 0);
1384
1385 /* If SETTER is a call everything is clobbered. Note that calls
1386 to pure functions are never put on the list, so we need not
1387 worry about them. */
b9f02dbb 1388 if (CALL_P (setter))
8e802be9 1389 return 1;
1390
1391 /* SETTER must be an INSN of some kind that sets memory. Call
3cfec666 1392 note_stores to examine each hunk of memory that is modified.
8e802be9 1393
1394 The note_stores interface is pretty limited, so we have to
1395 communicate via global variables. Yuk. */
1396 gcse_mem_operand = x;
1397 gcse_mems_conflict_p = 0;
1398 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1399 if (gcse_mems_conflict_p)
1400 return 1;
1401 list_entry = XEXP (list_entry, 1);
1402 }
1403 return 0;
1404}
1405
6ef828f9 1406/* Return nonzero if the operands of expression X are unchanged from
18aa2adf 1407 the start of INSN's basic block up to but not including INSN. */
1408
1409static int
952f0048 1410oprs_anticipatable_p (rtx x, rtx insn)
18aa2adf 1411{
1412 return oprs_unchanged_p (x, insn, 0);
1413}
1414
6ef828f9 1415/* Return nonzero if the operands of expression X are unchanged from
18aa2adf 1416 INSN to the end of INSN's basic block. */
1417
1418static int
952f0048 1419oprs_available_p (rtx x, rtx insn)
18aa2adf 1420{
1421 return oprs_unchanged_p (x, insn, 1);
1422}
1423
1424/* Hash expression X.
2c084240 1425
1426 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1427 indicating if a volatile operand is found or if the expression contains
69333952 1428 something we don't want to insert in the table. HASH_TABLE_SIZE is
78d140c9 1429 the current size of the hash table to be probed. */
18aa2adf 1430
1431static unsigned int
69333952 1432hash_expr (rtx x, enum machine_mode mode, int *do_not_record_p,
1433 int hash_table_size)
18aa2adf 1434{
1435 unsigned int hash;
1436
1437 *do_not_record_p = 0;
1438
78d140c9 1439 hash = hash_rtx (x, mode, do_not_record_p,
1440 NULL, /*have_reg_qty=*/false);
18aa2adf 1441 return hash % hash_table_size;
1442}
1b80ba05 1443
18aa2adf 1444/* Hash a set of register REGNO.
1445
2c084240 1446 Sets are hashed on the register that is set. This simplifies the PRE copy
1447 propagation code.
18aa2adf 1448
1449 ??? May need to make things more elaborate. Later, as necessary. */
1450
1451static unsigned int
952f0048 1452hash_set (int regno, int hash_table_size)
18aa2adf 1453{
1454 unsigned int hash;
1455
1456 hash = regno;
1457 return hash % hash_table_size;
1458}
1459
78d140c9 1460/* Return nonzero if exp1 is equivalent to exp2. */
18aa2adf 1461
1462static int
952f0048 1463expr_equiv_p (rtx x, rtx y)
18aa2adf 1464{
78d140c9 1465 return exp_equiv_p (x, y, 0, true);
18aa2adf 1466}
1467
27cfe3f1 1468/* Insert expression X in INSN in the hash TABLE.
18aa2adf 1469 If it is already present, record it as the last occurrence in INSN's
1470 basic block.
1471
1472 MODE is the mode of the value X is being stored into.
1473 It is only used if X is a CONST_INT.
1474
6ef828f9 1475 ANTIC_P is nonzero if X is an anticipatable expression.
1476 AVAIL_P is nonzero if X is an available expression. */
18aa2adf 1477
1478static void
952f0048 1479insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
1480 int avail_p, struct hash_table *table)
18aa2adf 1481{
1482 int found, do_not_record_p;
1483 unsigned int hash;
1484 struct expr *cur_expr, *last_expr = NULL;
1485 struct occr *antic_occr, *avail_occr;
18aa2adf 1486
27cfe3f1 1487 hash = hash_expr (x, mode, &do_not_record_p, table->size);
18aa2adf 1488
1489 /* Do not insert expression in table if it contains volatile operands,
1490 or if hash_expr determines the expression is something we don't want
1491 to or can't handle. */
1492 if (do_not_record_p)
1493 return;
1494
27cfe3f1 1495 cur_expr = table->table[hash];
18aa2adf 1496 found = 0;
1497
2c084240 1498 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
18aa2adf 1499 {
1500 /* If the expression isn't found, save a pointer to the end of
1501 the list. */
1502 last_expr = cur_expr;
1503 cur_expr = cur_expr->next_same_hash;
1504 }
1505
1506 if (! found)
1507 {
f0af5a88 1508 cur_expr = gcse_alloc (sizeof (struct expr));
18aa2adf 1509 bytes_used += sizeof (struct expr);
27cfe3f1 1510 if (table->table[hash] == NULL)
2c084240 1511 /* This is the first pattern that hashed to this index. */
27cfe3f1 1512 table->table[hash] = cur_expr;
18aa2adf 1513 else
2c084240 1514 /* Add EXPR to end of this hash chain. */
1515 last_expr->next_same_hash = cur_expr;
1516
3cfec666 1517 /* Set the fields of the expr element. */
18aa2adf 1518 cur_expr->expr = x;
27cfe3f1 1519 cur_expr->bitmap_index = table->n_elems++;
18aa2adf 1520 cur_expr->next_same_hash = NULL;
1521 cur_expr->antic_occr = NULL;
1522 cur_expr->avail_occr = NULL;
1523 }
1524
1525 /* Now record the occurrence(s). */
18aa2adf 1526 if (antic_p)
1527 {
1528 antic_occr = cur_expr->antic_occr;
1529
77780ba6 1530 if (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
1531 antic_occr = NULL;
18aa2adf 1532
1533 if (antic_occr)
2c084240 1534 /* Found another instance of the expression in the same basic block.
1535 Prefer the currently recorded one. We want the first one in the
1536 block and the block is scanned from start to end. */
1537 ; /* nothing to do */
18aa2adf 1538 else
1539 {
1540 /* First occurrence of this expression in this basic block. */
f0af5a88 1541 antic_occr = gcse_alloc (sizeof (struct occr));
18aa2adf 1542 bytes_used += sizeof (struct occr);
18aa2adf 1543 antic_occr->insn = insn;
77780ba6 1544 antic_occr->next = cur_expr->antic_occr;
839f8415 1545 antic_occr->deleted_p = 0;
77780ba6 1546 cur_expr->antic_occr = antic_occr;
18aa2adf 1547 }
1548 }
1549
1550 if (avail_p)
1551 {
1552 avail_occr = cur_expr->avail_occr;
1553
77780ba6 1554 if (avail_occr && BLOCK_NUM (avail_occr->insn) == BLOCK_NUM (insn))
18aa2adf 1555 {
77780ba6 1556 /* Found another instance of the expression in the same basic block.
1557 Prefer this occurrence to the currently recorded one. We want
1558 the last one in the block and the block is scanned from start
1559 to end. */
1560 avail_occr->insn = insn;
18aa2adf 1561 }
18aa2adf 1562 else
1563 {
1564 /* First occurrence of this expression in this basic block. */
f0af5a88 1565 avail_occr = gcse_alloc (sizeof (struct occr));
18aa2adf 1566 bytes_used += sizeof (struct occr);
18aa2adf 1567 avail_occr->insn = insn;
77780ba6 1568 avail_occr->next = cur_expr->avail_occr;
839f8415 1569 avail_occr->deleted_p = 0;
77780ba6 1570 cur_expr->avail_occr = avail_occr;
18aa2adf 1571 }
1572 }
1573}
1574
1575/* Insert pattern X in INSN in the hash table.
1576 X is a SET of a reg to either another reg or a constant.
1577 If it is already present, record it as the last occurrence in INSN's
1578 basic block. */
1579
1580static void
952f0048 1581insert_set_in_table (rtx x, rtx insn, struct hash_table *table)
18aa2adf 1582{
1583 int found;
1584 unsigned int hash;
1585 struct expr *cur_expr, *last_expr = NULL;
77780ba6 1586 struct occr *cur_occr;
18aa2adf 1587
0d59b19d 1588 gcc_assert (GET_CODE (x) == SET && REG_P (SET_DEST (x)));
18aa2adf 1589
27cfe3f1 1590 hash = hash_set (REGNO (SET_DEST (x)), table->size);
18aa2adf 1591
27cfe3f1 1592 cur_expr = table->table[hash];
18aa2adf 1593 found = 0;
1594
2c084240 1595 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
18aa2adf 1596 {
1597 /* If the expression isn't found, save a pointer to the end of
1598 the list. */
1599 last_expr = cur_expr;
1600 cur_expr = cur_expr->next_same_hash;
1601 }
1602
1603 if (! found)
1604 {
f0af5a88 1605 cur_expr = gcse_alloc (sizeof (struct expr));
18aa2adf 1606 bytes_used += sizeof (struct expr);
27cfe3f1 1607 if (table->table[hash] == NULL)
2c084240 1608 /* This is the first pattern that hashed to this index. */
27cfe3f1 1609 table->table[hash] = cur_expr;
18aa2adf 1610 else
2c084240 1611 /* Add EXPR to end of this hash chain. */
1612 last_expr->next_same_hash = cur_expr;
1613
18aa2adf 1614 /* Set the fields of the expr element.
1615 We must copy X because it can be modified when copy propagation is
1616 performed on its operands. */
18aa2adf 1617 cur_expr->expr = copy_rtx (x);
27cfe3f1 1618 cur_expr->bitmap_index = table->n_elems++;
18aa2adf 1619 cur_expr->next_same_hash = NULL;
1620 cur_expr->antic_occr = NULL;
1621 cur_expr->avail_occr = NULL;
1622 }
1623
1624 /* Now record the occurrence. */
18aa2adf 1625 cur_occr = cur_expr->avail_occr;
1626
77780ba6 1627 if (cur_occr && BLOCK_NUM (cur_occr->insn) == BLOCK_NUM (insn))
18aa2adf 1628 {
77780ba6 1629 /* Found another instance of the expression in the same basic block.
1630 Prefer this occurrence to the currently recorded one. We want
1631 the last one in the block and the block is scanned from start
1632 to end. */
1633 cur_occr->insn = insn;
18aa2adf 1634 }
18aa2adf 1635 else
1636 {
1637 /* First occurrence of this expression in this basic block. */
f0af5a88 1638 cur_occr = gcse_alloc (sizeof (struct occr));
18aa2adf 1639 bytes_used += sizeof (struct occr);
2c084240 1640
77780ba6 1641 cur_occr->insn = insn;
1642 cur_occr->next = cur_expr->avail_occr;
1643 cur_occr->deleted_p = 0;
1644 cur_expr->avail_occr = cur_occr;
18aa2adf 1645 }
1646}
1647
041378f3 1648/* Determine whether the rtx X should be treated as a constant for
1649 the purposes of GCSE's constant propagation. */
1650
1651static bool
952f0048 1652gcse_constant_p (rtx x)
041378f3 1653{
1654 /* Consider a COMPARE of two integers constant. */
1655 if (GET_CODE (x) == COMPARE
1656 && GET_CODE (XEXP (x, 0)) == CONST_INT
1657 && GET_CODE (XEXP (x, 1)) == CONST_INT)
1658 return true;
1659
c353833f 1660 /* Consider a COMPARE of the same registers is a constant
b9f02dbb 1661 if they are not floating point registers. */
c353833f 1662 if (GET_CODE(x) == COMPARE
b9f02dbb 1663 && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1))
c353833f 1664 && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1))
1665 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0)))
1666 && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1))))
1667 return true;
1668
041378f3 1669 return CONSTANT_P (x);
1670}
1671
27cfe3f1 1672/* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
1673 expression one). */
18aa2adf 1674
1675static void
952f0048 1676hash_scan_set (rtx pat, rtx insn, struct hash_table *table)
18aa2adf 1677{
1678 rtx src = SET_SRC (pat);
1679 rtx dest = SET_DEST (pat);
1b80ba05 1680 rtx note;
18aa2adf 1681
19595145 1682 if (GET_CODE (src) == CALL)
27cfe3f1 1683 hash_scan_call (src, insn, table);
18aa2adf 1684
b9f02dbb 1685 else if (REG_P (dest))
18aa2adf 1686 {
1b80ba05 1687 unsigned int regno = REGNO (dest);
18aa2adf 1688 rtx tmp;
1689
59254d98 1690 /* See if a REG_NOTE shows this equivalent to a simpler expression.
1691 This allows us to do a single GCSE pass and still eliminate
1692 redundant constants, addresses or other expressions that are
1693 constructed with multiple instructions. */
1694 note = find_reg_equal_equiv_note (insn);
1695 if (note != 0
1696 && (table->set_p
1697 ? gcse_constant_p (XEXP (note, 0))
1698 : want_to_gcse_p (XEXP (note, 0))))
1b80ba05 1699 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
1700
18aa2adf 1701 /* Only record sets of pseudo-regs in the hash table. */
27cfe3f1 1702 if (! table->set_p
18aa2adf 1703 && regno >= FIRST_PSEUDO_REGISTER
1704 /* Don't GCSE something if we can't do a reg/reg copy. */
3d055936 1705 && can_copy_p (GET_MODE (dest))
17a54dac 1706 /* GCSE commonly inserts instruction after the insn. We can't
1707 do that easily for EH_REGION notes so disable GCSE on these
1708 for now. */
1709 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
18aa2adf 1710 /* Is SET_SRC something we want to gcse? */
1b80ba05 1711 && want_to_gcse_p (src)
1712 /* Don't CSE a nop. */
75f84104 1713 && ! set_noop_p (pat)
1714 /* Don't GCSE if it has attached REG_EQUIV note.
1715 At this point this only function parameters should have
1716 REG_EQUIV notes and if the argument slot is used somewhere
3fb1e43b 1717 explicitly, it means address of parameter has been taken,
75f84104 1718 so we should not extend the lifetime of the pseudo. */
59254d98 1719 && (note == NULL_RTX || ! MEM_P (XEXP (note, 0))))
18aa2adf 1720 {
1721 /* An expression is not anticipatable if its operands are
232bbfff 1722 modified before this insn or if this is not the only SET in
1723 this insn. */
1724 int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn);
18aa2adf 1725 /* An expression is not available if its operands are
f441a382 1726 subsequently modified, including this insn. It's also not
1727 available if this is a branch, because we can't insert
1728 a set after the branch. */
1729 int avail_p = (oprs_available_p (src, insn)
1730 && ! JUMP_P (insn));
2c084240 1731
27cfe3f1 1732 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
18aa2adf 1733 }
2c084240 1734
18aa2adf 1735 /* Record sets for constant/copy propagation. */
27cfe3f1 1736 else if (table->set_p
18aa2adf 1737 && regno >= FIRST_PSEUDO_REGISTER
b9f02dbb 1738 && ((REG_P (src)
18aa2adf 1739 && REGNO (src) >= FIRST_PSEUDO_REGISTER
3d055936 1740 && can_copy_p (GET_MODE (dest))
1b80ba05 1741 && REGNO (src) != regno)
041378f3 1742 || gcse_constant_p (src))
18aa2adf 1743 /* A copy is not available if its src or dest is subsequently
1744 modified. Here we want to search from INSN+1 on, but
1745 oprs_available_p searches from INSN on. */
5496dbfc 1746 && (insn == BB_END (BLOCK_FOR_INSN (insn))
18aa2adf 1747 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
1748 && oprs_available_p (pat, tmp))))
27cfe3f1 1749 insert_set_in_table (pat, insn, table);
18aa2adf 1750 }
40e55fbb 1751 /* In case of store we want to consider the memory value as available in
5c47e414 1752 the REG stored in that memory. This makes it possible to remove
1753 redundant loads from due to stores to the same location. */
b9f02dbb 1754 else if (flag_gcse_las && REG_P (src) && MEM_P (dest))
5c47e414 1755 {
1756 unsigned int regno = REGNO (src);
1757
1758 /* Do not do this for constant/copy propagation. */
1759 if (! table->set_p
1760 /* Only record sets of pseudo-regs in the hash table. */
1761 && regno >= FIRST_PSEUDO_REGISTER
1762 /* Don't GCSE something if we can't do a reg/reg copy. */
1763 && can_copy_p (GET_MODE (src))
1764 /* GCSE commonly inserts instruction after the insn. We can't
1765 do that easily for EH_REGION notes so disable GCSE on these
1766 for now. */
1767 && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
1768 /* Is SET_DEST something we want to gcse? */
1769 && want_to_gcse_p (dest)
1770 /* Don't CSE a nop. */
1771 && ! set_noop_p (pat)
1772 /* Don't GCSE if it has attached REG_EQUIV note.
1773 At this point this only function parameters should have
1774 REG_EQUIV notes and if the argument slot is used somewhere
1775 explicitly, it means address of parameter has been taken,
1776 so we should not extend the lifetime of the pseudo. */
1777 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
b9f02dbb 1778 || ! MEM_P (XEXP (note, 0))))
5c47e414 1779 {
1780 /* Stores are never anticipatable. */
1781 int antic_p = 0;
1782 /* An expression is not available if its operands are
1783 subsequently modified, including this insn. It's also not
1784 available if this is a branch, because we can't insert
1785 a set after the branch. */
1786 int avail_p = oprs_available_p (dest, insn)
1787 && ! JUMP_P (insn);
1788
1789 /* Record the memory expression (DEST) in the hash table. */
1790 insert_expr_in_table (dest, GET_MODE (dest), insn,
1791 antic_p, avail_p, table);
1792 }
1793 }
18aa2adf 1794}
1795
1796static void
952f0048 1797hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
1798 struct hash_table *table ATTRIBUTE_UNUSED)
18aa2adf 1799{
1800 /* Currently nothing to do. */
1801}
1802
1803static void
952f0048 1804hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
1805 struct hash_table *table ATTRIBUTE_UNUSED)
18aa2adf 1806{
1807 /* Currently nothing to do. */
1808}
1809
1810/* Process INSN and add hash table entries as appropriate.
1811
1812 Only available expressions that set a single pseudo-reg are recorded.
1813
1814 Single sets in a PARALLEL could be handled, but it's an extra complication
1815 that isn't dealt with right now. The trick is handling the CLOBBERs that
1816 are also in the PARALLEL. Later.
1817
6ef828f9 1818 If SET_P is nonzero, this is for the assignment hash table,
855e19b7 1819 otherwise it is for the expression hash table.
1820 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
1821 not record any expressions. */
18aa2adf 1822
1823static void
952f0048 1824hash_scan_insn (rtx insn, struct hash_table *table, int in_libcall_block)
18aa2adf 1825{
1826 rtx pat = PATTERN (insn);
2c084240 1827 int i;
18aa2adf 1828
1b80ba05 1829 if (in_libcall_block)
1830 return;
1831
18aa2adf 1832 /* Pick out the sets of INSN and for other forms of instructions record
1833 what's been modified. */
1834
1b80ba05 1835 if (GET_CODE (pat) == SET)
27cfe3f1 1836 hash_scan_set (pat, insn, table);
18aa2adf 1837 else if (GET_CODE (pat) == PARALLEL)
2c084240 1838 for (i = 0; i < XVECLEN (pat, 0); i++)
1839 {
1840 rtx x = XVECEXP (pat, 0, i);
18aa2adf 1841
2c084240 1842 if (GET_CODE (x) == SET)
27cfe3f1 1843 hash_scan_set (x, insn, table);
2c084240 1844 else if (GET_CODE (x) == CLOBBER)
27cfe3f1 1845 hash_scan_clobber (x, insn, table);
19595145 1846 else if (GET_CODE (x) == CALL)
27cfe3f1 1847 hash_scan_call (x, insn, table);
2c084240 1848 }
18aa2adf 1849
18aa2adf 1850 else if (GET_CODE (pat) == CLOBBER)
27cfe3f1 1851 hash_scan_clobber (pat, insn, table);
19595145 1852 else if (GET_CODE (pat) == CALL)
27cfe3f1 1853 hash_scan_call (pat, insn, table);
18aa2adf 1854}
1855
1856static void
952f0048 1857dump_hash_table (FILE *file, const char *name, struct hash_table *table)
18aa2adf 1858{
1859 int i;
1860 /* Flattened out table, so it's printed in proper order. */
b9cf3f63 1861 struct expr **flat_table;
1862 unsigned int *hash_val;
2c084240 1863 struct expr *expr;
b9cf3f63 1864
f0af5a88 1865 flat_table = xcalloc (table->n_elems, sizeof (struct expr *));
1866 hash_val = xmalloc (table->n_elems * sizeof (unsigned int));
18aa2adf 1867
27cfe3f1 1868 for (i = 0; i < (int) table->size; i++)
1869 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
2c084240 1870 {
1871 flat_table[expr->bitmap_index] = expr;
1872 hash_val[expr->bitmap_index] = i;
1873 }
18aa2adf 1874
1875 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
27cfe3f1 1876 name, table->size, table->n_elems);
18aa2adf 1877
27cfe3f1 1878 for (i = 0; i < (int) table->n_elems; i++)
46fd7177 1879 if (flat_table[i] != 0)
1880 {
b16f1e6c 1881 expr = flat_table[i];
46fd7177 1882 fprintf (file, "Index %d (hash value %d)\n ",
1883 expr->bitmap_index, hash_val[i]);
b16f1e6c 1884 print_rtl (file, expr->expr);
46fd7177 1885 fprintf (file, "\n");
1886 }
18aa2adf 1887
1888 fprintf (file, "\n");
b9cf3f63 1889
b9cf3f63 1890 free (flat_table);
1891 free (hash_val);
18aa2adf 1892}
1893
1894/* Record register first/last/block set information for REGNO in INSN.
2c084240 1895
eac13465 1896 first_set records the first place in the block where the register
18aa2adf 1897 is set and is used to compute "anticipatability".
2c084240 1898
eac13465 1899 last_set records the last place in the block where the register
18aa2adf 1900 is set and is used to compute "availability".
2c084240 1901
eac13465 1902 last_bb records the block for which first_set and last_set are
1903 valid, as a quick test to invalidate them.
1904
18aa2adf 1905 reg_set_in_block records whether the register is set in the block
1906 and is used to compute "transparency". */
1907
1908static void
952f0048 1909record_last_reg_set_info (rtx insn, int regno)
18aa2adf 1910{
eac13465 1911 struct reg_avail_info *info = &reg_avail_info[regno];
1912 int cuid = INSN_CUID (insn);
2c084240 1913
eac13465 1914 info->last_set = cuid;
1915 if (info->last_bb != current_bb)
1916 {
1917 info->last_bb = current_bb;
1918 info->first_set = cuid;
4c26117a 1919 SET_BIT (reg_set_in_block[current_bb->index], regno);
eac13465 1920 }
18aa2adf 1921}
1922
8e802be9 1923
1924/* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
1925 Note we store a pair of elements in the list, so they have to be
1926 taken off pairwise. */
1927
3cfec666 1928static void
952f0048 1929canon_list_insert (rtx dest ATTRIBUTE_UNUSED, rtx unused1 ATTRIBUTE_UNUSED,
1930 void * v_insn)
8e802be9 1931{
1932 rtx dest_addr, insn;
d7b592b0 1933 int bb;
8e802be9 1934
1935 while (GET_CODE (dest) == SUBREG
1936 || GET_CODE (dest) == ZERO_EXTRACT
8e802be9 1937 || GET_CODE (dest) == STRICT_LOW_PART)
1938 dest = XEXP (dest, 0);
1939
1940 /* If DEST is not a MEM, then it will not conflict with a load. Note
1941 that function calls are assumed to clobber memory, but are handled
1942 elsewhere. */
1943
b9f02dbb 1944 if (! MEM_P (dest))
8e802be9 1945 return;
1946
1947 dest_addr = get_addr (XEXP (dest, 0));
1948 dest_addr = canon_rtx (dest_addr);
3cfec666 1949 insn = (rtx) v_insn;
d7b592b0 1950 bb = BLOCK_NUM (insn);
8e802be9 1951
3cfec666 1952 canon_modify_mem_list[bb] =
d7b592b0 1953 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
3cfec666 1954 canon_modify_mem_list[bb] =
d7b592b0 1955 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
8e802be9 1956}
1957
8e802be9 1958/* Record memory modification information for INSN. We do not actually care
1959 about the memory location(s) that are set, or even how they are set (consider
1960 a CALL_INSN). We merely need to record which insns modify memory. */
18aa2adf 1961
1962static void
952f0048 1963record_last_mem_set_info (rtx insn)
18aa2adf 1964{
d7b592b0 1965 int bb = BLOCK_NUM (insn);
1966
45b51429 1967 /* load_killed_in_block_p will handle the case of calls clobbering
aa40f561 1968 everything. */
d7b592b0 1969 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
1970 bitmap_set_bit (modify_mem_list_set, bb);
8e802be9 1971
b9f02dbb 1972 if (CALL_P (insn))
8e802be9 1973 {
1974 /* Note that traversals of this loop (other than for free-ing)
1975 will break after encountering a CALL_INSN. So, there's no
aa40f561 1976 need to insert a pair of items, as canon_list_insert does. */
3cfec666 1977 canon_modify_mem_list[bb] =
1978 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
f55d2721 1979 bitmap_set_bit (blocks_with_calls, bb);
8e802be9 1980 }
1981 else
d7b592b0 1982 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
18aa2adf 1983}
1984
18aa2adf 1985/* Called from compute_hash_table via note_stores to handle one
ec8895d7 1986 SET or CLOBBER in an insn. DATA is really the instruction in which
1987 the SET is taking place. */
18aa2adf 1988
1989static void
952f0048 1990record_last_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data)
18aa2adf 1991{
ec8895d7 1992 rtx last_set_insn = (rtx) data;
1993
18aa2adf 1994 if (GET_CODE (dest) == SUBREG)
1995 dest = SUBREG_REG (dest);
1996
b9f02dbb 1997 if (REG_P (dest))
18aa2adf 1998 record_last_reg_set_info (last_set_insn, REGNO (dest));
b9f02dbb 1999 else if (MEM_P (dest)
18aa2adf 2000 /* Ignore pushes, they clobber nothing. */
2001 && ! push_operand (dest, GET_MODE (dest)))
2002 record_last_mem_set_info (last_set_insn);
2003}
2004
2005/* Top level function to create an expression or assignment hash table.
2006
2007 Expression entries are placed in the hash table if
2008 - they are of the form (set (pseudo-reg) src),
2009 - src is something we want to perform GCSE on,
2010 - none of the operands are subsequently modified in the block
2011
2012 Assignment entries are placed in the hash table if
2013 - they are of the form (set (pseudo-reg) src),
2014 - src is something we want to perform const/copy propagation on,
2015 - none of the operands or target are subsequently modified in the block
2c084240 2016
18aa2adf 2017 Currently src must be a pseudo-reg or a const_int.
2018
27cfe3f1 2019 TABLE is the table computed. */
18aa2adf 2020
2021static void
952f0048 2022compute_hash_table_work (struct hash_table *table)
18aa2adf 2023{
eac13465 2024 unsigned int i;
18aa2adf 2025
2026 /* While we compute the hash table we also compute a bit array of which
2027 registers are set in which blocks.
18aa2adf 2028 ??? This isn't needed during const/copy propagation, but it's cheap to
2029 compute. Later. */
f20183e6 2030 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
18aa2adf 2031
8e802be9 2032 /* re-Cache any INSN_LIST nodes we have allocated. */
7fb47f9f 2033 clear_modify_mem_tables ();
18aa2adf 2034 /* Some working arrays used to track first and last set in each block. */
f0af5a88 2035 reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
eac13465 2036
2037 for (i = 0; i < max_gcse_regno; ++i)
4c26117a 2038 reg_avail_info[i].last_bb = NULL;
18aa2adf 2039
4c26117a 2040 FOR_EACH_BB (current_bb)
18aa2adf 2041 {
2042 rtx insn;
02e7a332 2043 unsigned int regno;
855e19b7 2044 int in_libcall_block;
18aa2adf 2045
2046 /* First pass over the instructions records information used to
2047 determine when registers and memory are first and last set.
45b51429 2048 ??? hard-reg reg_set_in_block computation
18aa2adf 2049 could be moved to compute_sets since they currently don't change. */
2050
defc8016 2051 FOR_BB_INSNS (current_bb, insn)
18aa2adf 2052 {
9204e736 2053 if (! INSN_P (insn))
18aa2adf 2054 continue;
2055
b9f02dbb 2056 if (CALL_P (insn))
18aa2adf 2057 {
2058 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4fec1d6c 2059 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
18aa2adf 2060 record_last_reg_set_info (insn, regno);
2c084240 2061
06a652d1 2062 mark_call (insn);
18aa2adf 2063 }
2064
ec8895d7 2065 note_stores (PATTERN (insn), record_last_set_info, insn);
18aa2adf 2066 }
2067
47dd33b5 2068 /* Insert implicit sets in the hash table. */
2069 if (table->set_p
2070 && implicit_sets[current_bb->index] != NULL_RTX)
2071 hash_scan_set (implicit_sets[current_bb->index],
5496dbfc 2072 BB_HEAD (current_bb), table);
47dd33b5 2073
18aa2adf 2074 /* The next pass builds the hash table. */
defc8016 2075 in_libcall_block = 0;
2076 FOR_BB_INSNS (current_bb, insn)
9204e736 2077 if (INSN_P (insn))
2c084240 2078 {
2079 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
3cfec666 2080 in_libcall_block = 1;
27cfe3f1 2081 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
3cfec666 2082 in_libcall_block = 0;
27cfe3f1 2083 hash_scan_insn (insn, table, in_libcall_block);
2084 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
3cfec666 2085 in_libcall_block = 0;
387732c1 2086 }
18aa2adf 2087 }
2088
eac13465 2089 free (reg_avail_info);
2090 reg_avail_info = NULL;
18aa2adf 2091}
2092
27cfe3f1 2093/* Allocate space for the set/expr hash TABLE.
18aa2adf 2094 N_INSNS is the number of instructions in the function.
27cfe3f1 2095 It is used to determine the number of buckets to use.
2096 SET_P determines whether set or expression table will
2097 be created. */
18aa2adf 2098
2099static void
952f0048 2100alloc_hash_table (int n_insns, struct hash_table *table, int set_p)
18aa2adf 2101{
2102 int n;
2103
27cfe3f1 2104 table->size = n_insns / 4;
2105 if (table->size < 11)
2106 table->size = 11;
2c084240 2107
18aa2adf 2108 /* Attempt to maintain efficient use of hash table.
2109 Making it an odd number is simplest for now.
2110 ??? Later take some measurements. */
27cfe3f1 2111 table->size |= 1;
2112 n = table->size * sizeof (struct expr *);
f0af5a88 2113 table->table = gmalloc (n);
27cfe3f1 2114 table->set_p = set_p;
18aa2adf 2115}
2116
27cfe3f1 2117/* Free things allocated by alloc_hash_table. */
18aa2adf 2118
2119static void
952f0048 2120free_hash_table (struct hash_table *table)
18aa2adf 2121{
27cfe3f1 2122 free (table->table);
18aa2adf 2123}
2124
27cfe3f1 2125/* Compute the hash TABLE for doing copy/const propagation or
2126 expression hash table. */
18aa2adf 2127
2128static void
952f0048 2129compute_hash_table (struct hash_table *table)
18aa2adf 2130{
2131 /* Initialize count of number of entries in hash table. */
27cfe3f1 2132 table->n_elems = 0;
f0af5a88 2133 memset (table->table, 0, table->size * sizeof (struct expr *));
18aa2adf 2134
27cfe3f1 2135 compute_hash_table_work (table);
18aa2adf 2136}
2137\f
2138/* Expression tracking support. */
2139
217a3395 2140/* Lookup REGNO in the set TABLE. The result is a pointer to the
2141 table entry, or NULL if not found. */
18aa2adf 2142
2143static struct expr *
952f0048 2144lookup_set (unsigned int regno, struct hash_table *table)
18aa2adf 2145{
27cfe3f1 2146 unsigned int hash = hash_set (regno, table->size);
18aa2adf 2147 struct expr *expr;
2148
27cfe3f1 2149 expr = table->table[hash];
18aa2adf 2150
217a3395 2151 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2152 expr = expr->next_same_hash;
18aa2adf 2153
2154 return expr;
2155}
2156
2157/* Return the next entry for REGNO in list EXPR. */
2158
2159static struct expr *
952f0048 2160next_set (unsigned int regno, struct expr *expr)
18aa2adf 2161{
2162 do
2163 expr = expr->next_same_hash;
2164 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
2c084240 2165
18aa2adf 2166 return expr;
2167}
2168
d7b592b0 2169/* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2170 types may be mixed. */
2171
2172static void
952f0048 2173free_insn_expr_list_list (rtx *listp)
d7b592b0 2174{
2175 rtx list, next;
2176
2177 for (list = *listp; list ; list = next)
2178 {
2179 next = XEXP (list, 1);
2180 if (GET_CODE (list) == EXPR_LIST)
2181 free_EXPR_LIST_node (list);
2182 else
2183 free_INSN_LIST_node (list);
2184 }
2185
2186 *listp = NULL;
2187}
2188
7fb47f9f 2189/* Clear canon_modify_mem_list and modify_mem_list tables. */
2190static void
952f0048 2191clear_modify_mem_tables (void)
7fb47f9f 2192{
4f917ffe 2193 unsigned i;
0cc4271a 2194 bitmap_iterator bi;
7fb47f9f 2195
0cc4271a 2196 EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi)
2197 {
2198 free_INSN_LIST_list (modify_mem_list + i);
0cc4271a 2199 free_insn_expr_list_list (canon_modify_mem_list + i);
2200 }
c9a4236e 2201 bitmap_clear (modify_mem_list_set);
f55d2721 2202 bitmap_clear (blocks_with_calls);
7fb47f9f 2203}
2204
c9a4236e 2205/* Release memory used by modify_mem_list_set. */
7fb47f9f 2206
2207static void
952f0048 2208free_modify_mem_tables (void)
7fb47f9f 2209{
2210 clear_modify_mem_tables ();
2211 free (modify_mem_list);
2212 free (canon_modify_mem_list);
2213 modify_mem_list = 0;
2214 canon_modify_mem_list = 0;
2215}
2216
18aa2adf 2217/* Reset tables used to keep track of what's still available [since the
2218 start of the block]. */
2219
2220static void
952f0048 2221reset_opr_set_tables (void)
18aa2adf 2222{
2223 /* Maintain a bitmap of which regs have been set since beginning of
2224 the block. */
7fb47f9f 2225 CLEAR_REG_SET (reg_set_bitmap);
2c084240 2226
18aa2adf 2227 /* Also keep a record of the last instruction to modify memory.
2228 For now this is very trivial, we only record whether any memory
2229 location has been modified. */
7fb47f9f 2230 clear_modify_mem_tables ();
18aa2adf 2231}
2232
6ef828f9 2233/* Return nonzero if the operands of X are not set before INSN in
18aa2adf 2234 INSN's basic block. */
2235
2236static int
952f0048 2237oprs_not_set_p (rtx x, rtx insn)
18aa2adf 2238{
2c084240 2239 int i, j;
18aa2adf 2240 enum rtx_code code;
d2ca078f 2241 const char *fmt;
18aa2adf 2242
18aa2adf 2243 if (x == 0)
2244 return 1;
2245
2246 code = GET_CODE (x);
2247 switch (code)
2248 {
2249 case PC:
2250 case CC0:
2251 case CONST:
2252 case CONST_INT:
2253 case CONST_DOUBLE:
886cfd4f 2254 case CONST_VECTOR:
18aa2adf 2255 case SYMBOL_REF:
2256 case LABEL_REF:
2257 case ADDR_VEC:
2258 case ADDR_DIFF_VEC:
2259 return 1;
2260
2261 case MEM:
3cfec666 2262 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
8d4a53c7 2263 INSN_CUID (insn), x, 0))
8e802be9 2264 return 0;
2c084240 2265 else
2266 return oprs_not_set_p (XEXP (x, 0), insn);
18aa2adf 2267
2268 case REG:
7fb47f9f 2269 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
18aa2adf 2270
2271 default:
2272 break;
2273 }
2274
2c084240 2275 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
18aa2adf 2276 {
2277 if (fmt[i] == 'e')
2278 {
18aa2adf 2279 /* If we are about to do the last recursive call
2280 needed at this level, change it into iteration.
2281 This function is called enough to be worth it. */
2282 if (i == 0)
2c084240 2283 return oprs_not_set_p (XEXP (x, i), insn);
2284
2285 if (! oprs_not_set_p (XEXP (x, i), insn))
18aa2adf 2286 return 0;
2287 }
2288 else if (fmt[i] == 'E')
2c084240 2289 for (j = 0; j < XVECLEN (x, i); j++)
2290 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2291 return 0;
18aa2adf 2292 }
2293
2294 return 1;
2295}
2296
2297/* Mark things set by a CALL. */
2298
2299static void
952f0048 2300mark_call (rtx insn)
18aa2adf 2301{
06a652d1 2302 if (! CONST_OR_PURE_CALL_P (insn))
8e802be9 2303 record_last_mem_set_info (insn);
18aa2adf 2304}
2305
2306/* Mark things set by a SET. */
2307
2308static void
952f0048 2309mark_set (rtx pat, rtx insn)
18aa2adf 2310{
2311 rtx dest = SET_DEST (pat);
2312
2313 while (GET_CODE (dest) == SUBREG
2314 || GET_CODE (dest) == ZERO_EXTRACT
18aa2adf 2315 || GET_CODE (dest) == STRICT_LOW_PART)
2316 dest = XEXP (dest, 0);
2317
b9f02dbb 2318 if (REG_P (dest))
7fb47f9f 2319 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
b9f02dbb 2320 else if (MEM_P (dest))
8e802be9 2321 record_last_mem_set_info (insn);
2322
19595145 2323 if (GET_CODE (SET_SRC (pat)) == CALL)
c7a3eccf 2324 mark_call (insn);
18aa2adf 2325}
2326
2327/* Record things set by a CLOBBER. */
2328
2329static void
952f0048 2330mark_clobber (rtx pat, rtx insn)
18aa2adf 2331{
2332 rtx clob = XEXP (pat, 0);
2333
2334 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2335 clob = XEXP (clob, 0);
2336
b9f02dbb 2337 if (REG_P (clob))
7fb47f9f 2338 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
8e802be9 2339 else
2340 record_last_mem_set_info (insn);
18aa2adf 2341}
2342
2343/* Record things set by INSN.
2344 This data is used by oprs_not_set_p. */
2345
2346static void
952f0048 2347mark_oprs_set (rtx insn)
18aa2adf 2348{
2349 rtx pat = PATTERN (insn);
2c084240 2350 int i;
18aa2adf 2351
2352 if (GET_CODE (pat) == SET)
2353 mark_set (pat, insn);
2354 else if (GET_CODE (pat) == PARALLEL)
2c084240 2355 for (i = 0; i < XVECLEN (pat, 0); i++)
2356 {
2357 rtx x = XVECEXP (pat, 0, i);
2358
2359 if (GET_CODE (x) == SET)
2360 mark_set (x, insn);
2361 else if (GET_CODE (x) == CLOBBER)
2362 mark_clobber (x, insn);
19595145 2363 else if (GET_CODE (x) == CALL)
2c084240 2364 mark_call (insn);
2365 }
18aa2adf 2366
18aa2adf 2367 else if (GET_CODE (pat) == CLOBBER)
2368 mark_clobber (pat, insn);
19595145 2369 else if (GET_CODE (pat) == CALL)
c7a3eccf 2370 mark_call (insn);
18aa2adf 2371}
c7a3eccf 2372
18aa2adf 2373\f
2374/* Compute copy/constant propagation working variables. */
2375
2376/* Local properties of assignments. */
18aa2adf 2377static sbitmap *cprop_pavloc;
2378static sbitmap *cprop_absaltered;
2379
2380/* Global properties of assignments (computed from the local properties). */
18aa2adf 2381static sbitmap *cprop_avin;
2382static sbitmap *cprop_avout;
2383
2c084240 2384/* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
2385 basic blocks. N_SETS is the number of sets. */
18aa2adf 2386
2387static void
952f0048 2388alloc_cprop_mem (int n_blocks, int n_sets)
18aa2adf 2389{
2390 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
2391 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
2392
2393 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
2394 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
2395}
2396
2397/* Free vars used by copy/const propagation. */
2398
2399static void
952f0048 2400free_cprop_mem (void)
18aa2adf 2401{
cca23eb2 2402 sbitmap_vector_free (cprop_pavloc);
2403 sbitmap_vector_free (cprop_absaltered);
2404 sbitmap_vector_free (cprop_avin);
2405 sbitmap_vector_free (cprop_avout);
18aa2adf 2406}
2407
2c084240 2408/* For each block, compute whether X is transparent. X is either an
2409 expression or an assignment [though we don't care which, for this context
2410 an assignment is treated as an expression]. For each block where an
2411 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
2412 bit in BMAP. */
18aa2adf 2413
2414static void
952f0048 2415compute_transp (rtx x, int indx, sbitmap *bmap, int set_p)
18aa2adf 2416{
4c26117a 2417 int i, j;
2418 basic_block bb;
18aa2adf 2419 enum rtx_code code;
2c084240 2420 reg_set *r;
d2ca078f 2421 const char *fmt;
18aa2adf 2422
2c084240 2423 /* repeat is used to turn tail-recursion into iteration since GCC
2424 can't do it when there's no return value. */
18aa2adf 2425 repeat:
2426
2427 if (x == 0)
2428 return;
2429
2430 code = GET_CODE (x);
2431 switch (code)
2432 {
2433 case REG:
2c084240 2434 if (set_p)
2435 {
2436 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2437 {
4c26117a 2438 FOR_EACH_BB (bb)
2439 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2440 SET_BIT (bmap[bb->index], indx);
2c084240 2441 }
2442 else
2443 {
2444 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2d68741d 2445 SET_BIT (bmap[r->bb_index], indx);
2c084240 2446 }
2447 }
2448 else
2449 {
2450 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
2451 {
4c26117a 2452 FOR_EACH_BB (bb)
2453 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
2454 RESET_BIT (bmap[bb->index], indx);
2c084240 2455 }
2456 else
2457 {
2458 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
2d68741d 2459 RESET_BIT (bmap[r->bb_index], indx);
2c084240 2460 }
2461 }
18aa2adf 2462
2c084240 2463 return;
18aa2adf 2464
2465 case MEM:
a2658f4a 2466 if (! MEM_READONLY_P (x))
2467 {
2468 bitmap_iterator bi;
2469 unsigned bb_index;
f55d2721 2470
a2658f4a 2471 /* First handle all the blocks with calls. We don't need to
2472 do any list walking for them. */
2473 EXECUTE_IF_SET_IN_BITMAP (blocks_with_calls, 0, bb_index, bi)
2474 {
2475 if (set_p)
2476 SET_BIT (bmap[bb_index], indx);
2477 else
2478 RESET_BIT (bmap[bb_index], indx);
2479 }
f55d2721 2480
a2658f4a 2481 /* Now iterate over the blocks which have memory modifications
2482 but which do not have any calls. */
2483 EXECUTE_IF_AND_COMPL_IN_BITMAP (modify_mem_list_set,
2484 blocks_with_calls,
2485 0, bb_index, bi)
f55d2721 2486 {
a2658f4a 2487 rtx list_entry = canon_modify_mem_list[bb_index];
f55d2721 2488
a2658f4a 2489 while (list_entry)
f55d2721 2490 {
a2658f4a 2491 rtx dest, dest_addr;
2492
2493 /* LIST_ENTRY must be an INSN of some kind that sets memory.
2494 Examine each hunk of memory that is modified. */
2495
2496 dest = XEXP (list_entry, 0);
2497 list_entry = XEXP (list_entry, 1);
2498 dest_addr = XEXP (list_entry, 0);
2499
2500 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
2501 x, rtx_addr_varies_p))
2502 {
2503 if (set_p)
2504 SET_BIT (bmap[bb_index], indx);
2505 else
2506 RESET_BIT (bmap[bb_index], indx);
2507 break;
2508 }
2509 list_entry = XEXP (list_entry, 1);
2510 }
f55d2721 2511 }
a2658f4a 2512 }
2c084240 2513
18aa2adf 2514 x = XEXP (x, 0);
2515 goto repeat;
2516
2517 case PC:
2518 case CC0: /*FIXME*/
2519 case CONST:
2520 case CONST_INT:
2521 case CONST_DOUBLE:
886cfd4f 2522 case CONST_VECTOR:
18aa2adf 2523 case SYMBOL_REF:
2524 case LABEL_REF:
2525 case ADDR_VEC:
2526 case ADDR_DIFF_VEC:
2527 return;
2528
2529 default:
2530 break;
2531 }
2532
2c084240 2533 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
18aa2adf 2534 {
2535 if (fmt[i] == 'e')
2536 {
18aa2adf 2537 /* If we are about to do the last recursive call
2538 needed at this level, change it into iteration.
2539 This function is called enough to be worth it. */
2540 if (i == 0)
2541 {
2c084240 2542 x = XEXP (x, i);
18aa2adf 2543 goto repeat;
2544 }
2c084240 2545
2546 compute_transp (XEXP (x, i), indx, bmap, set_p);
18aa2adf 2547 }
2548 else if (fmt[i] == 'E')
2c084240 2549 for (j = 0; j < XVECLEN (x, i); j++)
2550 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
18aa2adf 2551 }
2552}
2553
18aa2adf 2554/* Top level routine to do the dataflow analysis needed by copy/const
2555 propagation. */
2556
2557static void
952f0048 2558compute_cprop_data (void)
18aa2adf 2559{
27cfe3f1 2560 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
5d6931e2 2561 compute_available (cprop_pavloc, cprop_absaltered,
2562 cprop_avout, cprop_avin);
18aa2adf 2563}
2564\f
2565/* Copy/constant propagation. */
2566
18aa2adf 2567/* Maximum number of register uses in an insn that we handle. */
2568#define MAX_USES 8
2569
2570/* Table of uses found in an insn.
2571 Allocated statically to avoid alloc/free complexity and overhead. */
2572static struct reg_use reg_use_table[MAX_USES];
2573
2574/* Index into `reg_use_table' while building it. */
2575static int reg_use_count;
2576
2c084240 2577/* Set up a list of register numbers used in INSN. The found uses are stored
2578 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
2579 and contains the number of uses in the table upon exit.
18aa2adf 2580
2c084240 2581 ??? If a register appears multiple times we will record it multiple times.
2582 This doesn't hurt anything but it will slow things down. */
18aa2adf 2583
2584static void
952f0048 2585find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED)
18aa2adf 2586{
2c084240 2587 int i, j;
18aa2adf 2588 enum rtx_code code;
d2ca078f 2589 const char *fmt;
c997c1e2 2590 rtx x = *xptr;
18aa2adf 2591
2c084240 2592 /* repeat is used to turn tail-recursion into iteration since GCC
2593 can't do it when there's no return value. */
18aa2adf 2594 repeat:
18aa2adf 2595 if (x == 0)
2596 return;
2597
2598 code = GET_CODE (x);
c997c1e2 2599 if (REG_P (x))
18aa2adf 2600 {
18aa2adf 2601 if (reg_use_count == MAX_USES)
2602 return;
2c084240 2603
18aa2adf 2604 reg_use_table[reg_use_count].reg_rtx = x;
2605 reg_use_count++;
18aa2adf 2606 }
2607
2608 /* Recursively scan the operands of this expression. */
2609
2c084240 2610 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
18aa2adf 2611 {
2612 if (fmt[i] == 'e')
2613 {
2614 /* If we are about to do the last recursive call
2615 needed at this level, change it into iteration.
2616 This function is called enough to be worth it. */
2617 if (i == 0)
2618 {
2619 x = XEXP (x, 0);
2620 goto repeat;
2621 }
2c084240 2622
c997c1e2 2623 find_used_regs (&XEXP (x, i), data);
18aa2adf 2624 }
2625 else if (fmt[i] == 'E')
2c084240 2626 for (j = 0; j < XVECLEN (x, i); j++)
c997c1e2 2627 find_used_regs (&XVECEXP (x, i, j), data);
18aa2adf 2628 }
2629}
2630
2631/* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
6ef828f9 2632 Returns nonzero is successful. */
18aa2adf 2633
2634static int
952f0048 2635try_replace_reg (rtx from, rtx to, rtx insn)
18aa2adf 2636{
1b80ba05 2637 rtx note = find_reg_equal_equiv_note (insn);
06e2144a 2638 rtx src = 0;
1b80ba05 2639 int success = 0;
2640 rtx set = single_set (insn);
b96034f3 2641
34073249 2642 validate_replace_src_group (from, to, insn);
2643 if (num_changes_pending () && apply_change_group ())
2644 success = 1;
c997c1e2 2645
48691de1 2646 /* Try to simplify SET_SRC if we have substituted a constant. */
2647 if (success && set && CONSTANT_P (to))
2648 {
2649 src = simplify_rtx (SET_SRC (set));
2650
2651 if (src)
2652 validate_change (insn, &SET_SRC (set), src, 0);
2653 }
2654
1ae40d72 2655 /* If there is already a NOTE, update the expression in it with our
2656 replacement. */
2657 if (note != 0)
2658 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to);
2659
2e281af0 2660 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
b96034f3 2661 {
2e281af0 2662 /* If above failed and this is a single set, try to simplify the source of
2663 the set given our substitution. We could perhaps try this for multiple
2664 SETs, but it probably won't buy us anything. */
1b80ba05 2665 src = simplify_replace_rtx (SET_SRC (set), from, to);
2666
c997c1e2 2667 if (!rtx_equal_p (src, SET_SRC (set))
2668 && validate_change (insn, &SET_SRC (set), src, 0))
1b80ba05 2669 success = 1;
b96034f3 2670
d0442ae9 2671 /* If we've failed to do replacement, have a single SET, don't already
2672 have a note, and have no special SET, add a REG_EQUAL note to not
2673 lose information. */
2674 if (!success && note == 0 && set != 0
76c66009 2675 && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT
2676 && GET_CODE (SET_DEST (set)) != STRICT_LOW_PART)
2e281af0 2677 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
2678 }
f0c2dca0 2679
1b80ba05 2680 /* REG_EQUAL may get simplified into register.
2681 We don't allow that. Remove that note. This code ought
98667efb 2682 not to happen, because previous code ought to synthesize
1b80ba05 2683 reg-reg move, but be on the safe side. */
2684 if (note && REG_P (XEXP (note, 0)))
2685 remove_note (insn, note);
b96034f3 2686
b96034f3 2687 return success;
2688}
2c084240 2689
2690/* Find a set of REGNOs that are available on entry to INSN's block. Returns
2691 NULL no such set is found. */
18aa2adf 2692
2693static struct expr *
952f0048 2694find_avail_set (int regno, rtx insn)
18aa2adf 2695{
a3d89e66 2696 /* SET1 contains the last set found that can be returned to the caller for
2697 use in a substitution. */
2698 struct expr *set1 = 0;
3cfec666 2699
a3d89e66 2700 /* Loops are not possible here. To get a loop we would need two sets
0c6d8c36 2701 available at the start of the block containing INSN. i.e. we would
a3d89e66 2702 need two sets like this available at the start of the block:
2703
2704 (set (reg X) (reg Y))
2705 (set (reg Y) (reg X))
2706
2707 This can not happen since the set of (reg Y) would have killed the
2708 set of (reg X) making it unavailable at the start of this block. */
2709 while (1)
387732c1 2710 {
a3d89e66 2711 rtx src;
217a3395 2712 struct expr *set = lookup_set (regno, &set_hash_table);
a3d89e66 2713
2714 /* Find a set that is available at the start of the block
2715 which contains INSN. */
2716 while (set)
2717 {
2718 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
2719 break;
2720 set = next_set (regno, set);
2721 }
18aa2adf 2722
a3d89e66 2723 /* If no available set was found we've reached the end of the
2724 (possibly empty) copy chain. */
2725 if (set == 0)
3cfec666 2726 break;
a3d89e66 2727
0d59b19d 2728 gcc_assert (GET_CODE (set->expr) == SET);
a3d89e66 2729
2730 src = SET_SRC (set->expr);
2731
2732 /* We know the set is available.
2733 Now check that SRC is ANTLOC (i.e. none of the source operands
3cfec666 2734 have changed since the start of the block).
a3d89e66 2735
2736 If the source operand changed, we may still use it for the next
2737 iteration of this loop, but we may not use it for substitutions. */
2c084240 2738
041378f3 2739 if (gcse_constant_p (src) || oprs_not_set_p (src, insn))
a3d89e66 2740 set1 = set;
2741
2742 /* If the source of the set is anything except a register, then
2743 we have reached the end of the copy chain. */
b9f02dbb 2744 if (! REG_P (src))
18aa2adf 2745 break;
18aa2adf 2746
0c6d8c36 2747 /* Follow the copy chain, i.e. start another iteration of the loop
a3d89e66 2748 and see if we have an available copy into SRC. */
2749 regno = REGNO (src);
387732c1 2750 }
a3d89e66 2751
2752 /* SET1 holds the last set that was available and anticipatable at
2753 INSN. */
2754 return set1;
18aa2adf 2755}
2756
bd7a25c8 2757/* Subroutine of cprop_insn that tries to propagate constants into
23e5207c 2758 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
98667efb 2759 it is the instruction that immediately precedes JUMP, and must be a
40f7ee9a 2760 single SET of a register. FROM is what we will try to replace,
23e5207c 2761 SRC is the constant we will try to substitute for it. Returns nonzero
3cfec666 2762 if a change was made. */
2c084240 2763
bd7a25c8 2764static int
952f0048 2765cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
bd7a25c8 2766{
1e0703ac 2767 rtx new, set_src, note_src;
23e5207c 2768 rtx set = pc_set (jump);
1e0703ac 2769 rtx note = find_reg_equal_equiv_note (jump);
23e5207c 2770
1e0703ac 2771 if (note)
2772 {
2773 note_src = XEXP (note, 0);
2774 if (GET_CODE (note_src) == EXPR_LIST)
2775 note_src = NULL_RTX;
2776 }
2777 else note_src = NULL_RTX;
2778
2779 /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */
2780 set_src = note_src ? note_src : SET_SRC (set);
2781
2782 /* First substitute the SETCC condition into the JUMP instruction,
2783 then substitute that given values into this expanded JUMP. */
2784 if (setcc != NULL_RTX
7832abdc 2785 && !modified_between_p (from, setcc, jump)
2786 && !modified_between_p (src, setcc, jump))
6237f2b2 2787 {
1e0703ac 2788 rtx setcc_src;
6237f2b2 2789 rtx setcc_set = single_set (setcc);
1e0703ac 2790 rtx setcc_note = find_reg_equal_equiv_note (setcc);
2791 setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST)
2792 ? XEXP (setcc_note, 0) : SET_SRC (setcc_set);
2793 set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set),
2794 setcc_src);
6237f2b2 2795 }
23e5207c 2796 else
1e0703ac 2797 setcc = NULL_RTX;
23e5207c 2798
1e0703ac 2799 new = simplify_replace_rtx (set_src, from, src);
bd7a25c8 2800
1e0703ac 2801 /* If no simplification can be made, then try the next register. */
2802 if (rtx_equal_p (new, SET_SRC (set)))
84766aa0 2803 return 0;
3cfec666 2804
27465d7d 2805 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
1b80ba05 2806 if (new == pc_rtx)
23e5207c 2807 delete_insn (jump);
27465d7d 2808 else
bd7a25c8 2809 {
7832abdc 2810 /* Ensure the value computed inside the jump insn to be equivalent
2811 to one computed by setcc. */
1e0703ac 2812 if (setcc && modified_in_p (new, setcc))
7832abdc 2813 return 0;
23e5207c 2814 if (! validate_change (jump, &SET_SRC (set), new, 0))
1e0703ac 2815 {
2816 /* When (some) constants are not valid in a comparison, and there
2817 are two registers to be replaced by constants before the entire
2818 comparison can be folded into a constant, we need to keep
2819 intermediate information in REG_EQUAL notes. For targets with
2820 separate compare insns, such notes are added by try_replace_reg.
2821 When we have a combined compare-and-branch instruction, however,
2822 we need to attach a note to the branch itself to make this
2823 optimization work. */
2824
2825 if (!rtx_equal_p (new, note_src))
2826 set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new));
2827 return 0;
2828 }
2829
2830 /* Remove REG_EQUAL note after simplification. */
2831 if (note_src)
2832 remove_note (jump, note);
bd7a25c8 2833
27465d7d 2834 /* If this has turned into an unconditional jump,
2835 then put a barrier after it so that the unreachable
2836 code will be deleted. */
2837 if (GET_CODE (SET_SRC (set)) == LABEL_REF)
23e5207c 2838 emit_barrier_after (jump);
27465d7d 2839 }
bd7a25c8 2840
23e5207c 2841#ifdef HAVE_cc0
2842 /* Delete the cc0 setter. */
40f7ee9a 2843 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
23e5207c 2844 delete_insn (setcc);
2845#endif
2846
1b80ba05 2847 run_jump_opt_after_gcse = 1;
2c084240 2848
6416ac03 2849 global_const_prop_count++;
3f5be5f4 2850 if (dump_file != NULL)
1b80ba05 2851 {
3f5be5f4 2852 fprintf (dump_file,
6416ac03 2853 "GLOBAL CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
23e5207c 2854 REGNO (from), INSN_UID (jump));
3f5be5f4 2855 print_rtl (dump_file, src);
2856 fprintf (dump_file, "\n");
bd7a25c8 2857 }
b08cd584 2858 purge_dead_edges (bb);
1b80ba05 2859
2860 return 1;
bd7a25c8 2861}
2862
09a762be 2863static bool
defc8016 2864constprop_register (rtx insn, rtx from, rtx to, bool alter_jumps)
09a762be 2865{
2866 rtx sset;
2867
2868 /* Check for reg or cc0 setting instructions followed by
2869 conditional branch instructions first. */
2870 if (alter_jumps
2871 && (sset = single_set (insn)) != NULL
a8b52821 2872 && NEXT_INSN (insn)
09a762be 2873 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
2874 {
2875 rtx dest = SET_DEST (sset);
2876 if ((REG_P (dest) || CC0_P (dest))
2877 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
2878 return 1;
2879 }
2880
2881 /* Handle normal insns next. */
6d7dc5b9 2882 if (NONJUMP_INSN_P (insn)
09a762be 2883 && try_replace_reg (from, to, insn))
2884 return 1;
2885
2886 /* Try to propagate a CONST_INT into a conditional jump.
2887 We're pretty specific about what we will handle in this
2888 code, we can extend this as necessary over time.
2889
2890 Right now the insn in question must look like
2891 (set (pc) (if_then_else ...)) */
2892 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
2893 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
2894 return 0;
2895}
2896
18aa2adf 2897/* Perform constant and copy propagation on INSN.
6ef828f9 2898 The result is nonzero if a change was made. */
18aa2adf 2899
2900static int
952f0048 2901cprop_insn (rtx insn, int alter_jumps)
18aa2adf 2902{
2903 struct reg_use *reg_used;
2904 int changed = 0;
b96034f3 2905 rtx note;
18aa2adf 2906
c997c1e2 2907 if (!INSN_P (insn))
18aa2adf 2908 return 0;
2909
2910 reg_use_count = 0;
c997c1e2 2911 note_uses (&PATTERN (insn), find_used_regs, NULL);
3cfec666 2912
1b80ba05 2913 note = find_reg_equal_equiv_note (insn);
b96034f3 2914
aa40f561 2915 /* We may win even when propagating constants into notes. */
b96034f3 2916 if (note)
c997c1e2 2917 find_used_regs (&XEXP (note, 0), NULL);
18aa2adf 2918
2c084240 2919 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
2920 reg_used++, reg_use_count--)
18aa2adf 2921 {
02e7a332 2922 unsigned int regno = REGNO (reg_used->reg_rtx);
18aa2adf 2923 rtx pat, src;
2924 struct expr *set;
18aa2adf 2925
2926 /* Ignore registers created by GCSE.
aa40f561 2927 We do this because ... */
18aa2adf 2928 if (regno >= max_gcse_regno)
2929 continue;
2930
2931 /* If the register has already been set in this block, there's
2932 nothing we can do. */
2933 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
2934 continue;
2935
2936 /* Find an assignment that sets reg_used and is available
2937 at the start of the block. */
2938 set = find_avail_set (regno, insn);
2939 if (! set)
2940 continue;
3cfec666 2941
18aa2adf 2942 pat = set->expr;
2943 /* ??? We might be able to handle PARALLELs. Later. */
0d59b19d 2944 gcc_assert (GET_CODE (pat) == SET);
2c084240 2945
18aa2adf 2946 src = SET_SRC (pat);
2947
c5826237 2948 /* Constant propagation. */
041378f3 2949 if (gcse_constant_p (src))
18aa2adf 2950 {
09a762be 2951 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
18aa2adf 2952 {
2953 changed = 1;
6416ac03 2954 global_const_prop_count++;
3f5be5f4 2955 if (dump_file != NULL)
18aa2adf 2956 {
3f5be5f4 2957 fprintf (dump_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
2958 fprintf (dump_file, "insn %d with constant ", INSN_UID (insn));
2959 print_rtl (dump_file, src);
2960 fprintf (dump_file, "\n");
18aa2adf 2961 }
1e0703ac 2962 if (INSN_DELETED_P (insn))
2963 return 1;
18aa2adf 2964 }
2965 }
b9f02dbb 2966 else if (REG_P (src)
18aa2adf 2967 && REGNO (src) >= FIRST_PSEUDO_REGISTER
2968 && REGNO (src) != regno)
2969 {
a3d89e66 2970 if (try_replace_reg (reg_used->reg_rtx, src, insn))
18aa2adf 2971 {
a3d89e66 2972 changed = 1;
6416ac03 2973 global_copy_prop_count++;
3f5be5f4 2974 if (dump_file != NULL)
18aa2adf 2975 {
3f5be5f4 2976 fprintf (dump_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
2c084240 2977 regno, INSN_UID (insn));
3f5be5f4 2978 fprintf (dump_file, " with reg %d\n", REGNO (src));
18aa2adf 2979 }
a3d89e66 2980
2981 /* The original insn setting reg_used may or may not now be
2982 deletable. We leave the deletion to flow. */
2983 /* FIXME: If it turns out that the insn isn't deletable,
2984 then we may have unnecessarily extended register lifetimes
2985 and made things worse. */
18aa2adf 2986 }
2987 }
2988 }
2989
2990 return changed;
2991}
2992
3b281834 2993/* Like find_used_regs, but avoid recording uses that appear in
2994 input-output contexts such as zero_extract or pre_dec. This
2995 restricts the cases we consider to those for which local cprop
2996 can legitimately make replacements. */
2997
2998static void
952f0048 2999local_cprop_find_used_regs (rtx *xptr, void *data)
3b281834 3000{
3001 rtx x = *xptr;
3002
3003 if (x == 0)
3004 return;
3005
3006 switch (GET_CODE (x))
3007 {
3008 case ZERO_EXTRACT:
3009 case SIGN_EXTRACT:
3010 case STRICT_LOW_PART:
3011 return;
3012
3013 case PRE_DEC:
3014 case PRE_INC:
3015 case POST_DEC:
3016 case POST_INC:
3017 case PRE_MODIFY:
3018 case POST_MODIFY:
3019 /* Can only legitimately appear this early in the context of
3020 stack pushes for function arguments, but handle all of the
3021 codes nonetheless. */
3022 return;
3023
3024 case SUBREG:
3025 /* Setting a subreg of a register larger than word_mode leaves
3026 the non-written words unchanged. */
3027 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD)
3028 return;
3029 break;
3030
3031 default:
3032 break;
3033 }
3034
3035 find_used_regs (xptr, data);
3036}
952f0048 3037
99bb04c9 3038/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3039 their REG_EQUAL notes need updating. */
aef680bd 3040
09a762be 3041static bool
defc8016 3042do_local_cprop (rtx x, rtx insn, bool alter_jumps, rtx *libcall_sp)
09a762be 3043{
3044 rtx newreg = NULL, newcnst = NULL;
3045
aef680bd 3046 /* Rule out USE instructions and ASM statements as we don't want to
3047 change the hard registers mentioned. */
b9f02dbb 3048 if (REG_P (x)
09a762be 3049 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
aef680bd 3050 || (GET_CODE (PATTERN (insn)) != USE
3051 && asm_noperands (PATTERN (insn)) < 0)))
09a762be 3052 {
3053 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
3054 struct elt_loc_list *l;
3055
3056 if (!val)
3057 return false;
3058 for (l = val->locs; l; l = l->next)
3059 {
3060 rtx this_rtx = l->loc;
4b121ab2 3061 rtx note;
3062
9913d3a4 3063 /* Don't CSE non-constant values out of libcall blocks. */
3064 if (l->in_libcall && ! CONSTANT_P (this_rtx))
8a98e28f 3065 continue;
3066
041378f3 3067 if (gcse_constant_p (this_rtx))
09a762be 3068 newcnst = this_rtx;
4b121ab2 3069 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
3070 /* Don't copy propagate if it has attached REG_EQUIV note.
3071 At this point this only function parameters should have
3072 REG_EQUIV notes and if the argument slot is used somewhere
3073 explicitly, it means address of parameter has been taken,
3074 so we should not extend the lifetime of the pseudo. */
3075 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
b9f02dbb 3076 || ! MEM_P (XEXP (note, 0))))
09a762be 3077 newreg = this_rtx;
3078 }
3079 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
3080 {
99bb04c9 3081 /* If we find a case where we can't fix the retval REG_EQUAL notes
98667efb 3082 match the new register, we either have to abandon this replacement
99bb04c9 3083 or fix delete_trivially_dead_insns to preserve the setting insn,
3084 or make it delete the REG_EUAQL note, and fix up all passes that
3085 require the REG_EQUAL note there. */
0d59b19d 3086 bool adjusted;
3087
3088 adjusted = adjust_libcall_notes (x, newcnst, insn, libcall_sp);
3089 gcc_assert (adjusted);
3090
3f5be5f4 3091 if (dump_file != NULL)
09a762be 3092 {
3f5be5f4 3093 fprintf (dump_file, "LOCAL CONST-PROP: Replacing reg %d in ",
09a762be 3094 REGNO (x));
3f5be5f4 3095 fprintf (dump_file, "insn %d with constant ",
09a762be 3096 INSN_UID (insn));
3f5be5f4 3097 print_rtl (dump_file, newcnst);
3098 fprintf (dump_file, "\n");
09a762be 3099 }
6416ac03 3100 local_const_prop_count++;
09a762be 3101 return true;
3102 }
3103 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
3104 {
99bb04c9 3105 adjust_libcall_notes (x, newreg, insn, libcall_sp);
3f5be5f4 3106 if (dump_file != NULL)
09a762be 3107 {
3f5be5f4 3108 fprintf (dump_file,
09a762be 3109 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
3110 REGNO (x), INSN_UID (insn));
3f5be5f4 3111 fprintf (dump_file, " with reg %d\n", REGNO (newreg));
09a762be 3112 }
6416ac03 3113 local_copy_prop_count++;
09a762be 3114 return true;
3115 }
3116 }
3117 return false;
3118}
3119
99bb04c9 3120/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
3121 their REG_EQUAL notes need updating to reflect that OLDREG has been
805ae000 3122 replaced with NEWVAL in INSN. Return true if all substitutions could
3123 be made. */
99bb04c9 3124static bool
952f0048 3125adjust_libcall_notes (rtx oldreg, rtx newval, rtx insn, rtx *libcall_sp)
99bb04c9 3126{
805ae000 3127 rtx end;
99bb04c9 3128
3129 while ((end = *libcall_sp++))
3130 {
805ae000 3131 rtx note = find_reg_equal_equiv_note (end);
99bb04c9 3132
3133 if (! note)
3134 continue;
3135
3136 if (REG_P (newval))
3137 {
3138 if (reg_set_between_p (newval, PREV_INSN (insn), end))
3139 {
3140 do
3141 {
3142 note = find_reg_equal_equiv_note (end);
3143 if (! note)
3144 continue;
3145 if (reg_mentioned_p (newval, XEXP (note, 0)))
3146 return false;
3147 }
3148 while ((end = *libcall_sp++));
3149 return true;
3150 }
3151 }
9913d3a4 3152 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), oldreg, newval);
99bb04c9 3153 insn = end;
3154 }
3155 return true;
3156}
3157
3158#define MAX_NESTED_LIBCALLS 9
3159
defc8016 3160/* Do local const/copy propagation (i.e. within each basic block).
3161 If ALTER_JUMPS is true, allow propagating into jump insns, which
3162 could modify the CFG. */
3163
09a762be 3164static void
defc8016 3165local_cprop_pass (bool alter_jumps)
09a762be 3166{
defc8016 3167 basic_block bb;
09a762be 3168 rtx insn;
3169 struct reg_use *reg_used;
99bb04c9 3170 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
819f2ab7 3171 bool changed = false;
09a762be 3172
53622482 3173 cselib_init (false);
99bb04c9 3174 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
3175 *libcall_sp = 0;
defc8016 3176 FOR_EACH_BB (bb)
09a762be 3177 {
defc8016 3178 FOR_BB_INSNS (bb, insn)
09a762be 3179 {
defc8016 3180 if (INSN_P (insn))
09a762be 3181 {
defc8016 3182 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
09a762be 3183
defc8016 3184 if (note)
3185 {
3186 gcc_assert (libcall_sp != libcall_stack);
3187 *--libcall_sp = XEXP (note, 0);
3188 }
3189 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
3190 if (note)
3191 libcall_sp++;
3192 note = find_reg_equal_equiv_note (insn);
3193 do
3194 {
3195 reg_use_count = 0;
3196 note_uses (&PATTERN (insn), local_cprop_find_used_regs,
3197 NULL);
3198 if (note)
3199 local_cprop_find_used_regs (&XEXP (note, 0), NULL);
3200
3201 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
3202 reg_used++, reg_use_count--)
3203 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
3204 libcall_sp))
3205 {
3206 changed = true;
3207 break;
3208 }
3209 if (INSN_DELETED_P (insn))
819f2ab7 3210 break;
defc8016 3211 }
3212 while (reg_use_count);
09a762be 3213 }
defc8016 3214 cselib_process_insn (insn);
09a762be 3215 }
defc8016 3216
3217 /* Forget everything at the end of a basic block. Make sure we are
3218 not inside a libcall, they should never cross basic blocks. */
3219 cselib_clear_table ();
3220 gcc_assert (libcall_sp == &libcall_stack[MAX_NESTED_LIBCALLS]);
09a762be 3221 }
defc8016 3222
09a762be 3223 cselib_finish ();
defc8016 3224
819f2ab7 3225 /* Global analysis may get into infinite loops for unreachable blocks. */
3226 if (changed && alter_jumps)
69010836 3227 {
3228 delete_unreachable_blocks ();
3229 free_reg_set_mem ();
3230 alloc_reg_set_mem (max_reg_num ());
defc8016 3231 compute_sets ();
69010836 3232 }
09a762be 3233}
3234
2c084240 3235/* Forward propagate copies. This includes copies and constants. Return
6ef828f9 3236 nonzero if a change was made. */
18aa2adf 3237
3238static int
952f0048 3239cprop (int alter_jumps)
18aa2adf 3240{
4c26117a 3241 int changed;
3242 basic_block bb;
18aa2adf 3243 rtx insn;
3244
3245 /* Note we start at block 1. */
4c26117a 3246 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3247 {
3f5be5f4 3248 if (dump_file != NULL)
3249 fprintf (dump_file, "\n");
4c26117a 3250 return 0;
3251 }
18aa2adf 3252
3253 changed = 0;
4c26117a 3254 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
18aa2adf 3255 {
3256 /* Reset tables used to keep track of what's still valid [since the
3257 start of the block]. */
3258 reset_opr_set_tables ();
3259
defc8016 3260 FOR_BB_INSNS (bb, insn)
1b80ba05 3261 if (INSN_P (insn))
3262 {
09a762be 3263 changed |= cprop_insn (insn, alter_jumps);
18aa2adf 3264
1b80ba05 3265 /* Keep track of everything modified by this insn. */
3266 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
3267 call mark_oprs_set if we turned the insn into a NOTE. */
b9f02dbb 3268 if (! NOTE_P (insn))
1b80ba05 3269 mark_oprs_set (insn);
387732c1 3270 }
18aa2adf 3271 }
3272
3f5be5f4 3273 if (dump_file != NULL)
3274 fprintf (dump_file, "\n");
18aa2adf 3275
3276 return changed;
3277}
3278
47dd33b5 3279/* Similar to get_condition, only the resulting condition must be
3280 valid at JUMP, instead of at EARLIEST.
3281
3282 This differs from noce_get_condition in ifcvt.c in that we prefer not to
3283 settle for the condition variable in the jump instruction being integral.
3284 We prefer to be able to record the value of a user variable, rather than
3285 the value of a temporary used in a condition. This could be solved by
06b27565 3286 recording the value of *every* register scanned by canonicalize_condition,
47dd33b5 3287 but this would require some code reorganization. */
3288
c763ec28 3289rtx
952f0048 3290fis_get_condition (rtx jump)
47dd33b5 3291{
a255f65a 3292 return get_condition (jump, NULL, false, true);
47dd33b5 3293}
3294
95b49b1d 3295/* Check the comparison COND to see if we can safely form an implicit set from
3296 it. COND is either an EQ or NE comparison. */
3297
3298static bool
3299implicit_set_cond_p (rtx cond)
3300{
3301 enum machine_mode mode = GET_MODE (XEXP (cond, 0));
3302 rtx cst = XEXP (cond, 1);
3303
3304 /* We can't perform this optimization if either operand might be or might
3305 contain a signed zero. */
3306 if (HONOR_SIGNED_ZEROS (mode))
3307 {
3308 /* It is sufficient to check if CST is or contains a zero. We must
3309 handle float, complex, and vector. If any subpart is a zero, then
3310 the optimization can't be performed. */
3311 /* ??? The complex and vector checks are not implemented yet. We just
3312 always return zero for them. */
3313 if (GET_CODE (cst) == CONST_DOUBLE)
3314 {
3315 REAL_VALUE_TYPE d;
3316 REAL_VALUE_FROM_CONST_DOUBLE (d, cst);
3317 if (REAL_VALUES_EQUAL (d, dconst0))
3318 return 0;
3319 }
3320 else
3321 return 0;
3322 }
3323
3324 return gcse_constant_p (cst);
3325}
3326
47dd33b5 3327/* Find the implicit sets of a function. An "implicit set" is a constraint
3328 on the value of a variable, implied by a conditional jump. For example,
3329 following "if (x == 2)", the then branch may be optimized as though the
3330 conditional performed an "explicit set", in this example, "x = 2". This
3331 function records the set patterns that are implicit at the start of each
3332 basic block. */
3333
3334static void
952f0048 3335find_implicit_sets (void)
47dd33b5 3336{
3337 basic_block bb, dest;
3338 unsigned int count;
3339 rtx cond, new;
3340
3341 count = 0;
3342 FOR_EACH_BB (bb)
91c82c20 3343 /* Check for more than one successor. */
cd665a06 3344 if (EDGE_COUNT (bb->succs) > 1)
47dd33b5 3345 {
5496dbfc 3346 cond = fis_get_condition (BB_END (bb));
47dd33b5 3347
3348 if (cond
3349 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
b9f02dbb 3350 && REG_P (XEXP (cond, 0))
47dd33b5 3351 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
95b49b1d 3352 && implicit_set_cond_p (cond))
47dd33b5 3353 {
3354 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
3355 : FALLTHRU_EDGE (bb)->dest;
3356
ea091dfd 3357 if (dest && single_pred_p (dest)
47dd33b5 3358 && dest != EXIT_BLOCK_PTR)
3359 {
3360 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
3361 XEXP (cond, 1));
3362 implicit_sets[dest->index] = new;
3f5be5f4 3363 if (dump_file)
47dd33b5 3364 {
3f5be5f4 3365 fprintf(dump_file, "Implicit set of reg %d in ",
47dd33b5 3366 REGNO (XEXP (cond, 0)));
3f5be5f4 3367 fprintf(dump_file, "basic block %d\n", dest->index);
47dd33b5 3368 }
3369 count++;
3370 }
3371 }
3372 }
3373
3f5be5f4 3374 if (dump_file)
3375 fprintf (dump_file, "Found %d implicit sets\n", count);
47dd33b5 3376}
3377
18aa2adf 3378/* Perform one copy/constant propagation pass.
e736d585 3379 PASS is the pass count. If CPROP_JUMPS is true, perform constant
3380 propagation into conditional jumps. If BYPASS_JUMPS is true,
3381 perform conditional jump bypassing optimizations. */
18aa2adf 3382
3383static int
defc8016 3384one_cprop_pass (int pass, bool cprop_jumps, bool bypass_jumps)
18aa2adf 3385{
3386 int changed = 0;
3387
6416ac03 3388 global_const_prop_count = local_const_prop_count = 0;
3389 global_copy_prop_count = local_copy_prop_count = 0;
18aa2adf 3390
e736d585 3391 local_cprop_pass (cprop_jumps);
09a762be 3392
47dd33b5 3393 /* Determine implicit sets. */
4c36ffe6 3394 implicit_sets = XCNEWVEC (rtx, last_basic_block);
47dd33b5 3395 find_implicit_sets ();
3396
27cfe3f1 3397 alloc_hash_table (max_cuid, &set_hash_table, 1);
3398 compute_hash_table (&set_hash_table);
47dd33b5 3399
3400 /* Free implicit_sets before peak usage. */
3401 free (implicit_sets);
3402 implicit_sets = NULL;
3403
3f5be5f4 3404 if (dump_file)
3405 dump_hash_table (dump_file, "SET", &set_hash_table);
27cfe3f1 3406 if (set_hash_table.n_elems > 0)
18aa2adf 3407 {
27cfe3f1 3408 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
18aa2adf 3409 compute_cprop_data ();
e736d585 3410 changed = cprop (cprop_jumps);
3411 if (bypass_jumps)
23e5207c 3412 changed |= bypass_conditional_jumps ();
18aa2adf 3413 free_cprop_mem ();
3414 }
2c084240 3415
27cfe3f1 3416 free_hash_table (&set_hash_table);
18aa2adf 3417
3f5be5f4 3418 if (dump_file)
18aa2adf 3419 {
3f5be5f4 3420 fprintf (dump_file, "CPROP of %s, pass %d: %d bytes needed, ",
35901471 3421 current_function_name (), pass, bytes_used);
3f5be5f4 3422 fprintf (dump_file, "%d local const props, %d local copy props, ",
6416ac03 3423 local_const_prop_count, local_copy_prop_count);
3f5be5f4 3424 fprintf (dump_file, "%d global const props, %d global copy props\n\n",
6416ac03 3425 global_const_prop_count, global_copy_prop_count);
18aa2adf 3426 }
819f2ab7 3427 /* Global analysis may get into infinite loops for unreachable blocks. */
3428 if (changed && cprop_jumps)
3429 delete_unreachable_blocks ();
18aa2adf 3430
3431 return changed;
3432}
3433\f
23e5207c 3434/* Bypass conditional jumps. */
3435
8724a717 3436/* The value of last_basic_block at the beginning of the jump_bypass
3437 pass. The use of redirect_edge_and_branch_force may introduce new
3438 basic blocks, but the data flow analysis is only valid for basic
3439 block indices less than bypass_last_basic_block. */
3440
3441static int bypass_last_basic_block;
3442
23e5207c 3443/* Find a set of REGNO to a constant that is available at the end of basic
3444 block BB. Returns NULL if no such set is found. Based heavily upon
3445 find_avail_set. */
3446
3447static struct expr *
952f0048 3448find_bypass_set (int regno, int bb)
23e5207c 3449{
3450 struct expr *result = 0;
3451
3452 for (;;)
3453 {
3454 rtx src;
217a3395 3455 struct expr *set = lookup_set (regno, &set_hash_table);
23e5207c 3456
3457 while (set)
3458 {
3459 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
3460 break;
3461 set = next_set (regno, set);
3462 }
3463
3464 if (set == 0)
3465 break;
3466
0d59b19d 3467 gcc_assert (GET_CODE (set->expr) == SET);
23e5207c 3468
3469 src = SET_SRC (set->expr);
041378f3 3470 if (gcse_constant_p (src))
23e5207c 3471 result = set;
3472
b9f02dbb 3473 if (! REG_P (src))
23e5207c 3474 break;
3475
3476 regno = REGNO (src);
3477 }
3478 return result;
3479}
3480
3481
375b98af 3482/* Subroutine of bypass_block that checks whether a pseudo is killed by
3483 any of the instructions inserted on an edge. Jump bypassing places
3484 condition code setters on CFG edges using insert_insn_on_edge. This
3485 function is required to check that our data flow analysis is still
3486 valid prior to commit_edge_insertions. */
3487
3488static bool
952f0048 3489reg_killed_on_edge (rtx reg, edge e)
375b98af 3490{
3491 rtx insn;
3492
4ee9c684 3493 for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
375b98af 3494 if (INSN_P (insn) && reg_set_p (reg, insn))
3495 return true;
3496
3497 return false;
3498}
3499
23e5207c 3500/* Subroutine of bypass_conditional_jumps that attempts to bypass the given
3501 basic block BB which has more than one predecessor. If not NULL, SETCC
3502 is the first instruction of BB, which is immediately followed by JUMP_INSN
3503 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
375b98af 3504 Returns nonzero if a change was made.
3505
d01481af 3506 During the jump bypassing pass, we may place copies of SETCC instructions
375b98af 3507 on CFG edges. The following routine must be careful to pay attention to
3508 these inserted insns when performing its transformations. */
23e5207c 3509
3510static int
952f0048 3511bypass_block (basic_block bb, rtx setcc, rtx jump)
23e5207c 3512{
3513 rtx insn, note;
cd665a06 3514 edge e, edest;
40f7ee9a 3515 int i, change;
a964683a 3516 int may_be_loop_header;
cd665a06 3517 unsigned removed_p;
3518 edge_iterator ei;
23e5207c 3519
3520 insn = (setcc != NULL) ? setcc : jump;
3521
3522 /* Determine set of register uses in INSN. */
3523 reg_use_count = 0;
3524 note_uses (&PATTERN (insn), find_used_regs, NULL);
3525 note = find_reg_equal_equiv_note (insn);
3526 if (note)
3527 find_used_regs (&XEXP (note, 0), NULL);
3528
a964683a 3529 may_be_loop_header = false;
cd665a06 3530 FOR_EACH_EDGE (e, ei, bb->preds)
a964683a 3531 if (e->flags & EDGE_DFS_BACK)
3532 {
3533 may_be_loop_header = true;
3534 break;
3535 }
3536
23e5207c 3537 change = 0;
cd665a06 3538 for (ei = ei_start (bb->preds); (e = ei_safe_edge (ei)); )
23e5207c 3539 {
cd665a06 3540 removed_p = 0;
3541
8724a717 3542 if (e->flags & EDGE_COMPLEX)
cd665a06 3543 {
3544 ei_next (&ei);
3545 continue;
3546 }
8724a717 3547
3548 /* We can't redirect edges from new basic blocks. */
3549 if (e->src->index >= bypass_last_basic_block)
cd665a06 3550 {
3551 ei_next (&ei);
3552 continue;
3553 }
8724a717 3554
a964683a 3555 /* The irreducible loops created by redirecting of edges entering the
d01481af 3556 loop from outside would decrease effectiveness of some of the following
3557 optimizations, so prevent this. */
a964683a 3558 if (may_be_loop_header
3559 && !(e->flags & EDGE_DFS_BACK))
cd665a06 3560 {
3561 ei_next (&ei);
3562 continue;
3563 }
a964683a 3564
23e5207c 3565 for (i = 0; i < reg_use_count; i++)
3566 {
3567 struct reg_use *reg_used = &reg_use_table[i];
3cfec666 3568 unsigned int regno = REGNO (reg_used->reg_rtx);
40f7ee9a 3569 basic_block dest, old_dest;
3cfec666 3570 struct expr *set;
3571 rtx src, new;
23e5207c 3572
3cfec666 3573 if (regno >= max_gcse_regno)
3574 continue;
23e5207c 3575
3cfec666 3576 set = find_bypass_set (regno, e->src->index);
23e5207c 3577
3578 if (! set)
3579 continue;
3580
375b98af 3581 /* Check the data flow is valid after edge insertions. */
4ee9c684 3582 if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e))
375b98af 3583 continue;
3584
3cfec666 3585 src = SET_SRC (pc_set (jump));
23e5207c 3586
3587 if (setcc != NULL)
3588 src = simplify_replace_rtx (src,
3cfec666 3589 SET_DEST (PATTERN (setcc)),
3590 SET_SRC (PATTERN (setcc)));
23e5207c 3591
3592 new = simplify_replace_rtx (src, reg_used->reg_rtx,
3cfec666 3593 SET_SRC (set->expr));
23e5207c 3594
952f0048 3595 /* Jump bypassing may have already placed instructions on
375b98af 3596 edges of the CFG. We can't bypass an outgoing edge that
3597 has instructions associated with it, as these insns won't
3598 get executed if the incoming edge is redirected. */
3599
3cfec666 3600 if (new == pc_rtx)
375b98af 3601 {
3602 edest = FALLTHRU_EDGE (bb);
4ee9c684 3603 dest = edest->insns.r ? NULL : edest->dest;
375b98af 3604 }
23e5207c 3605 else if (GET_CODE (new) == LABEL_REF)
375b98af 3606 {
3607 dest = BLOCK_FOR_INSN (XEXP (new, 0));
3608 /* Don't bypass edges containing instructions. */
51d5ff28 3609 edest = find_edge (bb, dest);
3610 if (edest && edest->insns.r)
3611 dest = NULL;
375b98af 3612 }
23e5207c 3613 else
3614 dest = NULL;
3615
433e77e8 3616 /* Avoid unification of the edge with other edges from original
3617 branch. We would end up emitting the instruction on "both"
3618 edges. */
b9f02dbb 3619
51d5ff28 3620 if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc)))
3621 && find_edge (e->src, dest))
3622 dest = NULL;
433e77e8 3623
40f7ee9a 3624 old_dest = e->dest;
8724a717 3625 if (dest != NULL
3626 && dest != old_dest
3627 && dest != EXIT_BLOCK_PTR)
3628 {
3629 redirect_edge_and_branch_force (e, dest);
3630
40f7ee9a 3631 /* Copy the register setter to the redirected edge.
23e5207c 3632 Don't copy CC0 setters, as CC0 is dead after jump. */
3633 if (setcc)
3634 {
3635 rtx pat = PATTERN (setcc);
40f7ee9a 3636 if (!CC0_P (SET_DEST (pat)))
23e5207c 3637 insert_insn_on_edge (copy_insn (pat), e);
3638 }
3639
3f5be5f4 3640 if (dump_file != NULL)
23e5207c 3641 {
3f5be5f4 3642 fprintf (dump_file, "JUMP-BYPASS: Proved reg %d "
6416ac03 3643 "in jump_insn %d equals constant ",
40f7ee9a 3644 regno, INSN_UID (jump));
3f5be5f4 3645 print_rtl (dump_file, SET_SRC (set->expr));
3646 fprintf (dump_file, "\nBypass edge from %d->%d to %d\n",
40f7ee9a 3647 e->src->index, old_dest->index, dest->index);
23e5207c 3648 }
3649 change = 1;
cd665a06 3650 removed_p = 1;
23e5207c 3651 break;
3652 }
3653 }
cd665a06 3654 if (!removed_p)
3655 ei_next (&ei);
23e5207c 3656 }
3657 return change;
3658}
3659
3660/* Find basic blocks with more than one predecessor that only contain a
3661 single conditional jump. If the result of the comparison is known at
3662 compile-time from any incoming edge, redirect that edge to the
9eadb793 3663 appropriate target. Returns nonzero if a change was made.
3664
3665 This function is now mis-named, because we also handle indirect jumps. */
23e5207c 3666
3667static int
952f0048 3668bypass_conditional_jumps (void)
23e5207c 3669{
3670 basic_block bb;
3671 int changed;
3672 rtx setcc;
3673 rtx insn;
3674 rtx dest;
3675
3676 /* Note we start at block 1. */
3677 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3678 return 0;
3679
8724a717 3680 bypass_last_basic_block = last_basic_block;
a964683a 3681 mark_dfs_back_edges ();
8724a717 3682
23e5207c 3683 changed = 0;
3684 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
3cfec666 3685 EXIT_BLOCK_PTR, next_bb)
23e5207c 3686 {
3687 /* Check for more than one predecessor. */
ea091dfd 3688 if (!single_pred_p (bb))
23e5207c 3689 {
3690 setcc = NULL_RTX;
defc8016 3691 FOR_BB_INSNS (bb, insn)
6d7dc5b9 3692 if (NONJUMP_INSN_P (insn))
23e5207c 3693 {
29deee35 3694 if (setcc)
23e5207c 3695 break;
ab87d1bc 3696 if (GET_CODE (PATTERN (insn)) != SET)
23e5207c 3697 break;
3698
ab87d1bc 3699 dest = SET_DEST (PATTERN (insn));
40f7ee9a 3700 if (REG_P (dest) || CC0_P (dest))
23e5207c 3701 setcc = insn;
23e5207c 3702 else
3703 break;
3704 }
b9f02dbb 3705 else if (JUMP_P (insn))
23e5207c 3706 {
9eadb793 3707 if ((any_condjump_p (insn) || computed_jump_p (insn))
3708 && onlyjump_p (insn))
23e5207c 3709 changed |= bypass_block (bb, setcc, insn);
3710 break;
3711 }
3712 else if (INSN_P (insn))
3713 break;
3714 }
3715 }
3716
40f7ee9a 3717 /* If we bypassed any register setting insns, we inserted a
98667efb 3718 copy on the redirected edge. These need to be committed. */
23e5207c 3719 if (changed)
3720 commit_edge_insertions();
3721
3722 return changed;
3723}
3724\f
b3f3796c 3725/* Compute PRE+LCM working variables. */
18aa2adf 3726
3727/* Local properties of expressions. */
3728/* Nonzero for expressions that are transparent in the block. */
b3f3796c 3729static sbitmap *transp;
18aa2adf 3730
7bdba5dd 3731/* Nonzero for expressions that are transparent at the end of the block.
3732 This is only zero for expressions killed by abnormal critical edge
3733 created by a calls. */
b3f3796c 3734static sbitmap *transpout;
7bdba5dd 3735
b3f3796c 3736/* Nonzero for expressions that are computed (available) in the block. */
3737static sbitmap *comp;
18aa2adf 3738
b3f3796c 3739/* Nonzero for expressions that are locally anticipatable in the block. */
3740static sbitmap *antloc;
18aa2adf 3741
b3f3796c 3742/* Nonzero for expressions where this block is an optimal computation
3743 point. */
3744static sbitmap *pre_optimal;
7bdba5dd 3745
b3f3796c 3746/* Nonzero for expressions which are redundant in a particular block. */
3747static sbitmap *pre_redundant;
18aa2adf 3748
7bcd381b 3749/* Nonzero for expressions which should be inserted on a specific edge. */
3750static sbitmap *pre_insert_map;
3751
3752/* Nonzero for expressions which should be deleted in a specific block. */
3753static sbitmap *pre_delete_map;
3754
3755/* Contains the edge_list returned by pre_edge_lcm. */
3756static struct edge_list *edge_list;
3757
b3f3796c 3758/* Redundant insns. */
3759static sbitmap pre_redundant_insns;
18aa2adf 3760
b3f3796c 3761/* Allocate vars used for PRE analysis. */
18aa2adf 3762
3763static void
952f0048 3764alloc_pre_mem (int n_blocks, int n_exprs)
18aa2adf 3765{
b3f3796c 3766 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
3767 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
3768 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
0388e90f 3769
7bcd381b 3770 pre_optimal = NULL;
3771 pre_redundant = NULL;
3772 pre_insert_map = NULL;
3773 pre_delete_map = NULL;
7bcd381b 3774 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
2c084240 3775
7bcd381b 3776 /* pre_insert and pre_delete are allocated later. */
18aa2adf 3777}
3778
b3f3796c 3779/* Free vars used for PRE analysis. */
18aa2adf 3780
3781static void
952f0048 3782free_pre_mem (void)
18aa2adf 3783{
cca23eb2 3784 sbitmap_vector_free (transp);
3785 sbitmap_vector_free (comp);
8123d49b 3786
3787 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
18aa2adf 3788
7bcd381b 3789 if (pre_optimal)
cca23eb2 3790 sbitmap_vector_free (pre_optimal);
7bcd381b 3791 if (pre_redundant)
cca23eb2 3792 sbitmap_vector_free (pre_redundant);
7bcd381b 3793 if (pre_insert_map)
cca23eb2 3794 sbitmap_vector_free (pre_insert_map);
7bcd381b 3795 if (pre_delete_map)
cca23eb2 3796 sbitmap_vector_free (pre_delete_map);
7bcd381b 3797
8123d49b 3798 transp = comp = NULL;
7bcd381b 3799 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
18aa2adf 3800}
3801
3802/* Top level routine to do the dataflow analysis needed by PRE. */
3803
3804static void
952f0048 3805compute_pre_data (void)
18aa2adf 3806{
e531b5f0 3807 sbitmap trapping_expr;
4c26117a 3808 basic_block bb;
e531b5f0 3809 unsigned int ui;
bafa5ac7 3810
27cfe3f1 3811 compute_local_properties (transp, comp, antloc, &expr_hash_table);
f20183e6 3812 sbitmap_vector_zero (ae_kill, last_basic_block);
bafa5ac7 3813
e531b5f0 3814 /* Collect expressions which might trap. */
27cfe3f1 3815 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
e531b5f0 3816 sbitmap_zero (trapping_expr);
27cfe3f1 3817 for (ui = 0; ui < expr_hash_table.size; ui++)
e531b5f0 3818 {
3819 struct expr *e;
27cfe3f1 3820 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
e531b5f0 3821 if (may_trap_p (e->expr))
3822 SET_BIT (trapping_expr, e->bitmap_index);
3823 }
3824
bafa5ac7 3825 /* Compute ae_kill for each basic block using:
3826
3827 ~(TRANSP | COMP)
0ca684f3 3828 */
bafa5ac7 3829
4c26117a 3830 FOR_EACH_BB (bb)
bafa5ac7 3831 {
e531b5f0 3832 edge e;
cd665a06 3833 edge_iterator ei;
e531b5f0 3834
3835 /* If the current block is the destination of an abnormal edge, we
3836 kill all trapping expressions because we won't be able to properly
3837 place the instruction on the edge. So make them neither
3838 anticipatable nor transparent. This is fairly conservative. */
cd665a06 3839 FOR_EACH_EDGE (e, ei, bb->preds)
e531b5f0 3840 if (e->flags & EDGE_ABNORMAL)
3841 {
4c26117a 3842 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
3843 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
e531b5f0 3844 break;
3845 }
3846
4c26117a 3847 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
3848 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
bafa5ac7 3849 }
3850
3f5be5f4 3851 edge_list = pre_edge_lcm (expr_hash_table.n_elems, transp, comp, antloc,
7bcd381b 3852 ae_kill, &pre_insert_map, &pre_delete_map);
cca23eb2 3853 sbitmap_vector_free (antloc);
8123d49b 3854 antloc = NULL;
cca23eb2 3855 sbitmap_vector_free (ae_kill);
3cfec666 3856 ae_kill = NULL;
f5123ed5 3857 sbitmap_free (trapping_expr);
18aa2adf 3858}
3859\f
3860/* PRE utilities */
3861
6ef828f9 3862/* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
b3f3796c 3863 block BB.
18aa2adf 3864
3865 VISITED is a pointer to a working buffer for tracking which BB's have
3866 been visited. It is NULL for the top-level call.
3867
3868 We treat reaching expressions that go through blocks containing the same
3869 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3870 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3871 2 as not reaching. The intent is to improve the probability of finding
3872 only one reaching expression and to reduce register lifetimes by picking
3873 the closest such expression. */
3874
3875static int
952f0048 3876pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited)
18aa2adf 3877{
cb7e28c3 3878 edge pred;
cd665a06 3879 edge_iterator ei;
3880
3881 FOR_EACH_EDGE (pred, ei, bb->preds)
18aa2adf 3882 {
8d4a53c7 3883 basic_block pred_bb = pred->src;
18aa2adf 3884
cb7e28c3 3885 if (pred->src == ENTRY_BLOCK_PTR
18aa2adf 3886 /* Has predecessor has already been visited? */
b3d6de89 3887 || visited[pred_bb->index])
2c084240 3888 ;/* Nothing to do. */
3889
18aa2adf 3890 /* Does this predecessor generate this expression? */
b3d6de89 3891 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
18aa2adf 3892 {
3893 /* Is this the occurrence we're looking for?
3894 Note that there's only one generating occurrence per block
3895 so we just need to check the block number. */
b3f3796c 3896 if (occr_bb == pred_bb)
18aa2adf 3897 return 1;
2c084240 3898
b3d6de89 3899 visited[pred_bb->index] = 1;
18aa2adf 3900 }
3901 /* Ignore this predecessor if it kills the expression. */
b3d6de89 3902 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
3903 visited[pred_bb->index] = 1;
2c084240 3904
18aa2adf 3905 /* Neither gen nor kill. */
3906 else
b65b4f63 3907 {
b3d6de89 3908 visited[pred_bb->index] = 1;
048599b9 3909 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
18aa2adf 3910 return 1;
b65b4f63 3911 }
18aa2adf 3912 }
3913
3914 /* All paths have been checked. */
3915 return 0;
3916}
cd55d9d6 3917
3918/* The wrapper for pre_expr_reaches_here_work that ensures that any
aa40f561 3919 memory allocated for that function is returned. */
cd55d9d6 3920
3921static int
952f0048 3922pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb)
cd55d9d6 3923{
3924 int rval;
4c36ffe6 3925 char *visited = XCNEWVEC (char, last_basic_block);
cd55d9d6 3926
387732c1 3927 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
cd55d9d6 3928
3929 free (visited);
2c084240 3930 return rval;
cd55d9d6 3931}
18aa2adf 3932\f
7bcd381b 3933
3934/* Given an expr, generate RTL which we can insert at the end of a BB,
3cfec666 3935 or on an edge. Set the block number of any insns generated to
7bcd381b 3936 the value of BB. */
3937
3938static rtx
952f0048 3939process_insert_insn (struct expr *expr)
7bcd381b 3940{
3941 rtx reg = expr->reaching_reg;
06e2144a 3942 rtx exp = copy_rtx (expr->expr);
3943 rtx pat;
7bcd381b 3944
3945 start_sequence ();
06e2144a 3946
3947 /* If the expression is something that's an operand, like a constant,
3948 just copy it to a register. */
3949 if (general_operand (exp, GET_MODE (reg)))
3950 emit_move_insn (reg, exp);
3951
3952 /* Otherwise, make a new insn to compute this expression and make sure the
3953 insn will be recognized (this also adds any needed CLOBBERs). Copy the
3954 expression to make sure we don't have any sharing issues. */
0d59b19d 3955 else
3956 {
3957 rtx insn = emit_insn (gen_rtx_SET (VOIDmode, reg, exp));
3958
0fa137b8 3959 if (insn_invalid_p (insn))
3960 gcc_unreachable ();
0d59b19d 3961 }
3962
3cfec666 3963
31d3e01c 3964 pat = get_insns ();
7bcd381b 3965 end_sequence ();
3966
3967 return pat;
3968}
3cfec666 3969
b3f3796c 3970/* Add EXPR to the end of basic block BB.
3971
3972 This is used by both the PRE and code hoisting.
3973
3974 For PRE, we want to verify that the expr is either transparent
3975 or locally anticipatable in the target block. This check makes
3976 no sense for code hoisting. */
18aa2adf 3977
3978static void
952f0048 3979insert_insn_end_bb (struct expr *expr, basic_block bb, int pre)
18aa2adf 3980{
5496dbfc 3981 rtx insn = BB_END (bb);
18aa2adf 3982 rtx new_insn;
3983 rtx reg = expr->reaching_reg;
3984 int regno = REGNO (reg);
31d3e01c 3985 rtx pat, pat_end;
18aa2adf 3986
7bcd381b 3987 pat = process_insert_insn (expr);
0d59b19d 3988 gcc_assert (pat && INSN_P (pat));
31d3e01c 3989
3990 pat_end = pat;
3991 while (NEXT_INSN (pat_end) != NULL_RTX)
3992 pat_end = NEXT_INSN (pat_end);
18aa2adf 3993
3994 /* If the last insn is a jump, insert EXPR in front [taking care to
917bbcab 3995 handle cc0, etc. properly]. Similarly we need to care trapping
17a54dac 3996 instructions in presence of non-call exceptions. */
18aa2adf 3997
b9f02dbb 3998 if (JUMP_P (insn)
6d7dc5b9 3999 || (NONJUMP_INSN_P (insn)
ea091dfd 4000 && (!single_succ_p (bb)
4001 || single_succ_edge (bb)->flags & EDGE_ABNORMAL)))
18aa2adf 4002 {
ebd9163c 4003#ifdef HAVE_cc0
18aa2adf 4004 rtx note;
ebd9163c 4005#endif
17a54dac 4006 /* It should always be the case that we can put these instructions
4007 anywhere in the basic block with performing PRE optimizations.
4008 Check this. */
0d59b19d 4009 gcc_assert (!NONJUMP_INSN_P (insn) || !pre
4010 || TEST_BIT (antloc[bb->index], expr->bitmap_index)
4011 || TEST_BIT (transp[bb->index], expr->bitmap_index));
18aa2adf 4012
4013 /* If this is a jump table, then we can't insert stuff here. Since
4014 we know the previous real insn must be the tablejump, we insert
4015 the new instruction just before the tablejump. */
4016 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
4017 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
4018 insn = prev_real_insn (insn);
4019
4020#ifdef HAVE_cc0
4021 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
4022 if cc0 isn't set. */
4023 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
4024 if (note)
4025 insn = XEXP (note, 0);
4026 else
4027 {
4028 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
4029 if (maybe_cc0_setter
9204e736 4030 && INSN_P (maybe_cc0_setter)
18aa2adf 4031 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
4032 insn = maybe_cc0_setter;
4033 }
4034#endif
4035 /* FIXME: What if something in cc0/jump uses value set in new insn? */
0891f67c 4036 new_insn = emit_insn_before_noloc (pat, insn);
170e5c6c 4037 }
2c084240 4038
170e5c6c 4039 /* Likewise if the last insn is a call, as will happen in the presence
4040 of exception handling. */
b9f02dbb 4041 else if (CALL_P (insn)
ea091dfd 4042 && (!single_succ_p (bb)
4043 || single_succ_edge (bb)->flags & EDGE_ABNORMAL))
170e5c6c 4044 {
170e5c6c 4045 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
4046 we search backward and place the instructions before the first
4047 parameter is loaded. Do this for everyone for consistency and a
98667efb 4048 presumption that we'll get better code elsewhere as well.
170e5c6c 4049
2c084240 4050 It should always be the case that we can put these instructions
b3f3796c 4051 anywhere in the basic block with performing PRE optimizations.
4052 Check this. */
2c084240 4053
0d59b19d 4054 gcc_assert (!pre
4055 || TEST_BIT (antloc[bb->index], expr->bitmap_index)
4056 || TEST_BIT (transp[bb->index], expr->bitmap_index));
170e5c6c 4057
4058 /* Since different machines initialize their parameter registers
4059 in different orders, assume nothing. Collect the set of all
4060 parameter registers. */
5496dbfc 4061 insn = find_first_parameter_load (insn, BB_HEAD (bb));
170e5c6c 4062
9fc37e9d 4063 /* If we found all the parameter loads, then we want to insert
4064 before the first parameter load.
4065
4066 If we did not find all the parameter loads, then we might have
4067 stopped on the head of the block, which could be a CODE_LABEL.
4068 If we inserted before the CODE_LABEL, then we would be putting
4069 the insn in the wrong basic block. In that case, put the insn
8b3dea0b 4070 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
b9f02dbb 4071 while (LABEL_P (insn)
83458610 4072 || NOTE_INSN_BASIC_BLOCK_P (insn))
8b3dea0b 4073 insn = NEXT_INSN (insn);
2c084240 4074
0891f67c 4075 new_insn = emit_insn_before_noloc (pat, insn);
18aa2adf 4076 }
4077 else
0891f67c 4078 new_insn = emit_insn_after_noloc (pat, insn);
18aa2adf 4079
31d3e01c 4080 while (1)
b3f3796c 4081 {
31d3e01c 4082 if (INSN_P (pat))
b3f3796c 4083 {
31d3e01c 4084 add_label_notes (PATTERN (pat), new_insn);
4085 note_stores (PATTERN (pat), record_set_info, pat);
b3f3796c 4086 }
31d3e01c 4087 if (pat == pat_end)
4088 break;
4089 pat = NEXT_INSN (pat);
b3f3796c 4090 }
170e5c6c 4091
18aa2adf 4092 gcse_create_count++;
4093
3f5be5f4 4094 if (dump_file)
18aa2adf 4095 {
3f5be5f4 4096 fprintf (dump_file, "PRE/HOIST: end of bb %d, insn %d, ",
b3d6de89 4097 bb->index, INSN_UID (new_insn));
3f5be5f4 4098 fprintf (dump_file, "copying expression %d to reg %d\n",
2c084240 4099 expr->bitmap_index, regno);
18aa2adf 4100 }
4101}
4102
7bcd381b 4103/* Insert partially redundant expressions on edges in the CFG to make
4104 the expressions fully redundant. */
18aa2adf 4105
7bcd381b 4106static int
952f0048 4107pre_edge_insert (struct edge_list *edge_list, struct expr **index_map)
18aa2adf 4108{
2c084240 4109 int e, i, j, num_edges, set_size, did_insert = 0;
b3f3796c 4110 sbitmap *inserted;
4111
7bcd381b 4112 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
4113 if it reaches any of the deleted expressions. */
18aa2adf 4114
7bcd381b 4115 set_size = pre_insert_map[0]->size;
4116 num_edges = NUM_EDGES (edge_list);
27cfe3f1 4117 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
7bcd381b 4118 sbitmap_vector_zero (inserted, num_edges);
18aa2adf 4119
7bcd381b 4120 for (e = 0; e < num_edges; e++)
18aa2adf 4121 {
4122 int indx;
8d4a53c7 4123 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
b3f3796c 4124
b3f3796c 4125 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
18aa2adf 4126 {
7bcd381b 4127 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
18aa2adf 4128
27cfe3f1 4129 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
2c084240 4130 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
4131 {
4132 struct expr *expr = index_map[j];
4133 struct occr *occr;
b3f3796c 4134
424da949 4135 /* Now look at each deleted occurrence of this expression. */
2c084240 4136 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4137 {
4138 if (! occr->deleted_p)
4139 continue;
4140
822e391f 4141 /* Insert this expression on this edge if it would
424da949 4142 reach the deleted occurrence in BB. */
2c084240 4143 if (!TEST_BIT (inserted[e], j))
4144 {
4145 rtx insn;
4146 edge eg = INDEX_EDGE (edge_list, e);
4147
4148 /* We can't insert anything on an abnormal and
4149 critical edge, so we insert the insn at the end of
4150 the previous block. There are several alternatives
4151 detailed in Morgans book P277 (sec 10.5) for
4152 handling this situation. This one is easiest for
4153 now. */
4154
164aece4 4155 if (eg->flags & EDGE_ABNORMAL)
2c084240 4156 insert_insn_end_bb (index_map[j], bb, 0);
4157 else
4158 {
4159 insn = process_insert_insn (index_map[j]);
4160 insert_insn_on_edge (insn, eg);
4161 }
4162
3f5be5f4 4163 if (dump_file)
2c084240 4164 {
3f5be5f4 4165 fprintf (dump_file, "PRE/HOIST: edge (%d,%d), ",
b3d6de89 4166 bb->index,
4167 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
3f5be5f4 4168 fprintf (dump_file, "copy expression %d\n",
2c084240 4169 expr->bitmap_index);
4170 }
4171
8e802be9 4172 update_ld_motion_stores (expr);
2c084240 4173 SET_BIT (inserted[e], j);
4174 did_insert = 1;
4175 gcse_create_count++;
4176 }
4177 }
4178 }
18aa2adf 4179 }
4180 }
0388e90f 4181
cca23eb2 4182 sbitmap_vector_free (inserted);
7bcd381b 4183 return did_insert;
18aa2adf 4184}
4185
53ee16e4 4186/* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG.
9d344979 4187 Given "old_reg <- expr" (INSN), instead of adding after it
4188 reaching_reg <- old_reg
4189 it's better to do the following:
4190 reaching_reg <- expr
4191 old_reg <- reaching_reg
4192 because this way copy propagation can discover additional PRE
5c47e414 4193 opportunities. But if this fails, we try the old way.
4194 When "expr" is a store, i.e.
4195 given "MEM <- old_reg", instead of adding after it
4196 reaching_reg <- old_reg
4197 it's better to add it before as follows:
4198 reaching_reg <- old_reg
4199 MEM <- reaching_reg. */
18aa2adf 4200
4201static void
952f0048 4202pre_insert_copy_insn (struct expr *expr, rtx insn)
18aa2adf 4203{
4204 rtx reg = expr->reaching_reg;
4205 int regno = REGNO (reg);
4206 int indx = expr->bitmap_index;
53ee16e4 4207 rtx pat = PATTERN (insn);
00ce82e3 4208 rtx set, first_set, new_insn;
9d344979 4209 rtx old_reg;
53ee16e4 4210 int i;
18aa2adf 4211
53ee16e4 4212 /* This block matches the logic in hash_scan_insn. */
0d59b19d 4213 switch (GET_CODE (pat))
53ee16e4 4214 {
0d59b19d 4215 case SET:
4216 set = pat;
4217 break;
4218
4219 case PARALLEL:
53ee16e4 4220 /* Search through the parallel looking for the set whose
4221 source was the expression that we're interested in. */
00ce82e3 4222 first_set = NULL_RTX;
53ee16e4 4223 set = NULL_RTX;
4224 for (i = 0; i < XVECLEN (pat, 0); i++)
4225 {
4226 rtx x = XVECEXP (pat, 0, i);
00ce82e3 4227 if (GET_CODE (x) == SET)
53ee16e4 4228 {
00ce82e3 4229 /* If the source was a REG_EQUAL or REG_EQUIV note, we
4230 may not find an equivalent expression, but in this
4231 case the PARALLEL will have a single set. */
4232 if (first_set == NULL_RTX)
4233 first_set = x;
4234 if (expr_equiv_p (SET_SRC (x), expr->expr))
4235 {
4236 set = x;
4237 break;
4238 }
53ee16e4 4239 }
4240 }
00ce82e3 4241
4242 gcc_assert (first_set);
4243 if (set == NULL_RTX)
4244 set = first_set;
0d59b19d 4245 break;
4246
4247 default:
4248 gcc_unreachable ();
53ee16e4 4249 }
2c084240 4250
b9f02dbb 4251 if (REG_P (SET_DEST (set)))
53ee16e4 4252 {
5c47e414 4253 old_reg = SET_DEST (set);
4254 /* Check if we can modify the set destination in the original insn. */
4255 if (validate_change (insn, &SET_DEST (set), reg, 0))
4256 {
4257 new_insn = gen_move_insn (old_reg, reg);
4258 new_insn = emit_insn_after (new_insn, insn);
4259
4260 /* Keep register set table up to date. */
5c47e414 4261 record_one_set (regno, insn);
4262 }
4263 else
4264 {
4265 new_insn = gen_move_insn (reg, old_reg);
4266 new_insn = emit_insn_after (new_insn, insn);
53ee16e4 4267
5c47e414 4268 /* Keep register set table up to date. */
4269 record_one_set (regno, new_insn);
4270 }
53ee16e4 4271 }
5c47e414 4272 else /* This is possible only in case of a store to memory. */
53ee16e4 4273 {
5c47e414 4274 old_reg = SET_SRC (set);
53ee16e4 4275 new_insn = gen_move_insn (reg, old_reg);
5c47e414 4276
4277 /* Check if we can modify the set source in the original insn. */
4278 if (validate_change (insn, &SET_SRC (set), reg, 0))
4279 new_insn = emit_insn_before (new_insn, insn);
4280 else
4281 new_insn = emit_insn_after (new_insn, insn);
2c084240 4282
53ee16e4 4283 /* Keep register set table up to date. */
4284 record_one_set (regno, new_insn);
4285 }
18aa2adf 4286
4287 gcse_create_count++;
4288
3f5be5f4 4289 if (dump_file)
4290 fprintf (dump_file,
7bcd381b 4291 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
4292 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
4293 INSN_UID (insn), regno);
18aa2adf 4294}
4295
4296/* Copy available expressions that reach the redundant expression
4297 to `reaching_reg'. */
4298
4299static void
952f0048 4300pre_insert_copies (void)
18aa2adf 4301{
5c47e414 4302 unsigned int i, added_copy;
2c084240 4303 struct expr *expr;
4304 struct occr *occr;
4305 struct occr *avail;
b3f3796c 4306
18aa2adf 4307 /* For each available expression in the table, copy the result to
4308 `reaching_reg' if the expression reaches a deleted one.
4309
4310 ??? The current algorithm is rather brute force.
4311 Need to do some profiling. */
4312
27cfe3f1 4313 for (i = 0; i < expr_hash_table.size; i++)
4314 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
2c084240 4315 {
4316 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
4317 we don't want to insert a copy here because the expression may not
4318 really be redundant. So only insert an insn if the expression was
4319 deleted. This test also avoids further processing if the
4320 expression wasn't deleted anywhere. */
4321 if (expr->reaching_reg == NULL)
4322 continue;
b9f02dbb 4323
5c47e414 4324 /* Set when we add a copy for that expression. */
b9f02dbb 4325 added_copy = 0;
2c084240 4326
4327 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4328 {
4329 if (! occr->deleted_p)
4330 continue;
18aa2adf 4331
2c084240 4332 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
4333 {
4334 rtx insn = avail->insn;
18aa2adf 4335
2c084240 4336 /* No need to handle this one if handled already. */
4337 if (avail->copied_p)
4338 continue;
18aa2adf 4339
2c084240 4340 /* Don't handle this one if it's a redundant one. */
4341 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
4342 continue;
18aa2adf 4343
2c084240 4344 /* Or if the expression doesn't reach the deleted one. */
3cfec666 4345 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
8d4a53c7 4346 expr,
4347 BLOCK_FOR_INSN (occr->insn)))
2c084240 4348 continue;
18aa2adf 4349
5c47e414 4350 added_copy = 1;
4351
2c084240 4352 /* Copy the result of avail to reaching_reg. */
4353 pre_insert_copy_insn (expr, insn);
4354 avail->copied_p = 1;
4355 }
4356 }
5c47e414 4357
b9f02dbb 4358 if (added_copy)
5c47e414 4359 update_ld_motion_stores (expr);
2c084240 4360 }
18aa2adf 4361}
4362
51f6e244 4363/* Emit move from SRC to DEST noting the equivalence with expression computed
4364 in INSN. */
4365static rtx
952f0048 4366gcse_emit_move_after (rtx src, rtx dest, rtx insn)
51f6e244 4367{
4368 rtx new;
65e78aeb 4369 rtx set = single_set (insn), set2;
51f6e244 4370 rtx note;
4371 rtx eqv;
4372
4373 /* This should never fail since we're creating a reg->reg copy
4374 we've verified to be valid. */
4375
65e78aeb 4376 new = emit_insn_after (gen_move_insn (dest, src), insn);
27442180 4377
51f6e244 4378 /* Note the equivalence for local CSE pass. */
65e78aeb 4379 set2 = single_set (new);
4380 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
4381 return new;
51f6e244 4382 if ((note = find_reg_equal_equiv_note (insn)))
4383 eqv = XEXP (note, 0);
4384 else
4385 eqv = SET_SRC (set);
4386
67055a78 4387 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
51f6e244 4388
4389 return new;
4390}
4391
18aa2adf 4392/* Delete redundant computations.
18aa2adf 4393 Deletion is done by changing the insn to copy the `reaching_reg' of
4394 the expression into the result of the SET. It is left to later passes
4395 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
4396
6ef828f9 4397 Returns nonzero if a change is made. */
18aa2adf 4398
4399static int
952f0048 4400pre_delete (void)
18aa2adf 4401{
a08b57af 4402 unsigned int i;
256d47d0 4403 int changed;
2c084240 4404 struct expr *expr;
4405 struct occr *occr;
b3f3796c 4406
18aa2adf 4407 changed = 0;
27cfe3f1 4408 for (i = 0; i < expr_hash_table.size; i++)
53ee16e4 4409 for (expr = expr_hash_table.table[i];
4410 expr != NULL;
4411 expr = expr->next_same_hash)
2c084240 4412 {
4413 int indx = expr->bitmap_index;
18aa2adf 4414
2c084240 4415 /* We only need to search antic_occr since we require
4416 ANTLOC != 0. */
18aa2adf 4417
2c084240 4418 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4419 {
4420 rtx insn = occr->insn;
4421 rtx set;
8d4a53c7 4422 basic_block bb = BLOCK_FOR_INSN (insn);
18aa2adf 4423
53ee16e4 4424 /* We only delete insns that have a single_set. */
4425 if (TEST_BIT (pre_delete_map[bb->index], indx)
4426 && (set = single_set (insn)) != 0)
2c084240 4427 {
2c084240 4428 /* Create a pseudo-reg to store the result of reaching
4429 expressions into. Get the mode for the new pseudo from
4430 the mode of the original destination pseudo. */
4431 if (expr->reaching_reg == NULL)
4432 expr->reaching_reg
4433 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
4434
bef3b33e 4435 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
51f6e244 4436 delete_insn (insn);
4437 occr->deleted_p = 1;
4438 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
4439 changed = 1;
4440 gcse_subst_count++;
18aa2adf 4441
3f5be5f4 4442 if (dump_file)
2c084240 4443 {
3f5be5f4 4444 fprintf (dump_file,
2c084240 4445 "PRE: redundant insn %d (expression %d) in ",
4446 INSN_UID (insn), indx);
3f5be5f4 4447 fprintf (dump_file, "bb %d, reaching reg is %d\n",
b3d6de89 4448 bb->index, REGNO (expr->reaching_reg));
2c084240 4449 }
4450 }
4451 }
4452 }
18aa2adf 4453
4454 return changed;
4455}
4456
4457/* Perform GCSE optimizations using PRE.
4458 This is called by one_pre_gcse_pass after all the dataflow analysis
4459 has been done.
4460
2c084240 4461 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
4462 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
4463 Compiler Design and Implementation.
18aa2adf 4464
2c084240 4465 ??? A new pseudo reg is created to hold the reaching expression. The nice
4466 thing about the classical approach is that it would try to use an existing
4467 reg. If the register can't be adequately optimized [i.e. we introduce
4468 reload problems], one could add a pass here to propagate the new register
4469 through the block.
18aa2adf 4470
2c084240 4471 ??? We don't handle single sets in PARALLELs because we're [currently] not
4472 able to copy the rest of the parallel when we insert copies to create full
4473 redundancies from partial redundancies. However, there's no reason why we
4474 can't handle PARALLELs in the cases where there are no partial
18aa2adf 4475 redundancies. */
4476
4477static int
952f0048 4478pre_gcse (void)
18aa2adf 4479{
a08b57af 4480 unsigned int i;
4481 int did_insert, changed;
18aa2adf 4482 struct expr **index_map;
2c084240 4483 struct expr *expr;
18aa2adf 4484
4485 /* Compute a mapping from expression number (`bitmap_index') to
4486 hash table entry. */
4487
4c36ffe6 4488 index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems);
27cfe3f1 4489 for (i = 0; i < expr_hash_table.size; i++)
4490 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
2c084240 4491 index_map[expr->bitmap_index] = expr;
18aa2adf 4492
4493 /* Reset bitmap used to track which insns are redundant. */
b3f3796c 4494 pre_redundant_insns = sbitmap_alloc (max_cuid);
4495 sbitmap_zero (pre_redundant_insns);
18aa2adf 4496
4497 /* Delete the redundant insns first so that
4498 - we know what register to use for the new insns and for the other
4499 ones with reaching expressions
4500 - we know which insns are redundant when we go to create copies */
2c084240 4501
18aa2adf 4502 changed = pre_delete ();
4503
7bcd381b 4504 did_insert = pre_edge_insert (edge_list, index_map);
2c084240 4505
18aa2adf 4506 /* In other places with reaching expressions, copy the expression to the
7bcd381b 4507 specially allocated pseudo-reg that reaches the redundant expr. */
18aa2adf 4508 pre_insert_copies ();
7bcd381b 4509 if (did_insert)
4510 {
4511 commit_edge_insertions ();
4512 changed = 1;
4513 }
18aa2adf 4514
cd55d9d6 4515 free (index_map);
f5123ed5 4516 sbitmap_free (pre_redundant_insns);
18aa2adf 4517 return changed;
4518}
4519
4520/* Top level routine to perform one PRE GCSE pass.
4521
6ef828f9 4522 Return nonzero if a change was made. */
18aa2adf 4523
4524static int
952f0048 4525one_pre_gcse_pass (int pass)
18aa2adf 4526{
4527 int changed = 0;
4528
4529 gcse_subst_count = 0;
4530 gcse_create_count = 0;
4531
27cfe3f1 4532 alloc_hash_table (max_cuid, &expr_hash_table, 0);
7bcd381b 4533 add_noreturn_fake_exit_edges ();
8e802be9 4534 if (flag_gcse_lm)
4535 compute_ld_motion_mems ();
4536
27cfe3f1 4537 compute_hash_table (&expr_hash_table);
8e802be9 4538 trim_ld_motion_mems ();
3f5be5f4 4539 if (dump_file)
4540 dump_hash_table (dump_file, "Expression", &expr_hash_table);
2c084240 4541
27cfe3f1 4542 if (expr_hash_table.n_elems > 0)
18aa2adf 4543 {
27cfe3f1 4544 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
18aa2adf 4545 compute_pre_data ();
4546 changed |= pre_gcse ();
7bcd381b 4547 free_edge_list (edge_list);
18aa2adf 4548 free_pre_mem ();
4549 }
2c084240 4550
8e802be9 4551 free_ldst_mems ();
41d24834 4552 remove_fake_exit_edges ();
27cfe3f1 4553 free_hash_table (&expr_hash_table);
18aa2adf 4554
3f5be5f4 4555 if (dump_file)
18aa2adf 4556 {
3f5be5f4 4557 fprintf (dump_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
35901471 4558 current_function_name (), pass, bytes_used);
3f5be5f4 4559 fprintf (dump_file, "%d substs, %d insns created\n",
2c084240 4560 gcse_subst_count, gcse_create_count);
18aa2adf 4561 }
4562
4563 return changed;
4564}
322b2436 4565\f
4566/* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
05bcc2d9 4567 If notes are added to an insn which references a CODE_LABEL, the
4568 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
4569 because the following loop optimization pass requires them. */
322b2436 4570
4571/* ??? This is very similar to the loop.c add_label_notes function. We
4572 could probably share code here. */
4573
4574/* ??? If there was a jump optimization pass after gcse and before loop,
4575 then we would not need to do this here, because jump would add the
4576 necessary REG_LABEL notes. */
4577
4578static void
952f0048 4579add_label_notes (rtx x, rtx insn)
322b2436 4580{
4581 enum rtx_code code = GET_CODE (x);
4582 int i, j;
d2ca078f 4583 const char *fmt;
322b2436 4584
4585 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
4586 {
e72f55f8 4587 /* This code used to ignore labels that referred to dispatch tables to
d01481af 4588 avoid flow generating (slightly) worse code.
e72f55f8 4589
b65b4f63 4590 We no longer ignore such label references (see LABEL_REF handling in
4591 mark_jump_label for additional information). */
2c084240 4592
4bb30577 4593 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
e72f55f8 4594 REG_NOTES (insn));
05bcc2d9 4595 if (LABEL_P (XEXP (x, 0)))
3cfec666 4596 LABEL_NUSES (XEXP (x, 0))++;
322b2436 4597 return;
4598 }
4599
2c084240 4600 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
322b2436 4601 {
4602 if (fmt[i] == 'e')
4603 add_label_notes (XEXP (x, i), insn);
4604 else if (fmt[i] == 'E')
4605 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4606 add_label_notes (XVECEXP (x, i, j), insn);
4607 }
4608}
b3f3796c 4609
4610/* Compute transparent outgoing information for each block.
4611
4612 An expression is transparent to an edge unless it is killed by
4613 the edge itself. This can only happen with abnormal control flow,
4614 when the edge is traversed through a call. This happens with
4615 non-local labels and exceptions.
4616
4617 This would not be necessary if we split the edge. While this is
4618 normally impossible for abnormal critical edges, with some effort
4619 it should be possible with exception handling, since we still have
4620 control over which handler should be invoked. But due to increased
4621 EH table sizes, this may not be worthwhile. */
4622
4623static void
952f0048 4624compute_transpout (void)
b3f3796c 4625{
4c26117a 4626 basic_block bb;
a08b57af 4627 unsigned int i;
2c084240 4628 struct expr *expr;
b3f3796c 4629
f20183e6 4630 sbitmap_vector_ones (transpout, last_basic_block);
b3f3796c 4631
4c26117a 4632 FOR_EACH_BB (bb)
b3f3796c 4633 {
b3f3796c 4634 /* Note that flow inserted a nop a the end of basic blocks that
4635 end in call instructions for reasons other than abnormal
4636 control flow. */
b9f02dbb 4637 if (! CALL_P (BB_END (bb)))
b3f3796c 4638 continue;
4639
27cfe3f1 4640 for (i = 0; i < expr_hash_table.size; i++)
4641 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
b9f02dbb 4642 if (MEM_P (expr->expr))
2c084240 4643 {
4644 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
4645 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
4646 continue;
3cfec666 4647
2c084240 4648 /* ??? Optimally, we would use interprocedural alias
4649 analysis to determine if this mem is actually killed
4650 by this call. */
4c26117a 4651 RESET_BIT (transpout[bb->index], expr->bitmap_index);
2c084240 4652 }
b3f3796c 4653 }
4654}
120911d5 4655
6627f3ed 4656/* Code Hoisting variables and subroutines. */
4657
4658/* Very busy expressions. */
4659static sbitmap *hoist_vbein;
4660static sbitmap *hoist_vbeout;
4661
4662/* Hoistable expressions. */
4663static sbitmap *hoist_exprs;
4664
6627f3ed 4665/* ??? We could compute post dominators and run this algorithm in
95cc2547 4666 reverse to perform tail merging, doing so would probably be
6627f3ed 4667 more effective than the tail merging code in jump.c.
4668
4669 It's unclear if tail merging could be run in parallel with
4670 code hoisting. It would be nice. */
4671
4672/* Allocate vars used for code hoisting analysis. */
4673
4674static void
952f0048 4675alloc_code_hoist_mem (int n_blocks, int n_exprs)
6627f3ed 4676{
4677 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
4678 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4679 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4680
4681 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
4682 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
4683 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
4684 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
6627f3ed 4685}
4686
4687/* Free vars used for code hoisting analysis. */
4688
4689static void
952f0048 4690free_code_hoist_mem (void)
6627f3ed 4691{
cca23eb2 4692 sbitmap_vector_free (antloc);
4693 sbitmap_vector_free (transp);
4694 sbitmap_vector_free (comp);
6627f3ed 4695
cca23eb2 4696 sbitmap_vector_free (hoist_vbein);
4697 sbitmap_vector_free (hoist_vbeout);
4698 sbitmap_vector_free (hoist_exprs);
4699 sbitmap_vector_free (transpout);
6627f3ed 4700
0051c76a 4701 free_dominance_info (CDI_DOMINATORS);
6627f3ed 4702}
4703
4704/* Compute the very busy expressions at entry/exit from each block.
4705
4706 An expression is very busy if all paths from a given point
4707 compute the expression. */
4708
4709static void
952f0048 4710compute_code_hoist_vbeinout (void)
6627f3ed 4711{
4c26117a 4712 int changed, passes;
4713 basic_block bb;
6627f3ed 4714
f20183e6 4715 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
4716 sbitmap_vector_zero (hoist_vbein, last_basic_block);
6627f3ed 4717
4718 passes = 0;
4719 changed = 1;
2c084240 4720
6627f3ed 4721 while (changed)
4722 {
4723 changed = 0;
2c084240 4724
6627f3ed 4725 /* We scan the blocks in the reverse order to speed up
4726 the convergence. */
4c26117a 4727 FOR_EACH_BB_REVERSE (bb)
6627f3ed 4728 {
4c26117a 4729 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
4730 hoist_vbeout[bb->index], transp[bb->index]);
4731 if (bb->next_bb != EXIT_BLOCK_PTR)
4732 sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
6627f3ed 4733 }
2c084240 4734
6627f3ed 4735 passes++;
4736 }
4737
3f5be5f4 4738 if (dump_file)
4739 fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes);
6627f3ed 4740}
4741
4742/* Top level routine to do the dataflow analysis needed by code hoisting. */
4743
4744static void
952f0048 4745compute_code_hoist_data (void)
6627f3ed 4746{
27cfe3f1 4747 compute_local_properties (transp, comp, antloc, &expr_hash_table);
6627f3ed 4748 compute_transpout ();
4749 compute_code_hoist_vbeinout ();
0051c76a 4750 calculate_dominance_info (CDI_DOMINATORS);
3f5be5f4 4751 if (dump_file)
4752 fprintf (dump_file, "\n");
6627f3ed 4753}
4754
4755/* Determine if the expression identified by EXPR_INDEX would
4756 reach BB unimpared if it was placed at the end of EXPR_BB.
4757
4758 It's unclear exactly what Muchnick meant by "unimpared". It seems
4759 to me that the expression must either be computed or transparent in
4760 *every* block in the path(s) from EXPR_BB to BB. Any other definition
4761 would allow the expression to be hoisted out of loops, even if
4762 the expression wasn't a loop invariant.
4763
4764 Contrast this to reachability for PRE where an expression is
4765 considered reachable if *any* path reaches instead of *all*
4766 paths. */
4767
4768static int
952f0048 4769hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited)
6627f3ed 4770{
4771 edge pred;
cd665a06 4772 edge_iterator ei;
cd55d9d6 4773 int visited_allocated_locally = 0;
3cfec666 4774
6627f3ed 4775
4776 if (visited == NULL)
4777 {
387732c1 4778 visited_allocated_locally = 1;
4c36ffe6 4779 visited = XCNEWVEC (char, last_basic_block);
6627f3ed 4780 }
4781
cd665a06 4782 FOR_EACH_EDGE (pred, ei, bb->preds)
6627f3ed 4783 {
8d4a53c7 4784 basic_block pred_bb = pred->src;
6627f3ed 4785
4786 if (pred->src == ENTRY_BLOCK_PTR)
4787 break;
2e281af0 4788 else if (pred_bb == expr_bb)
4789 continue;
b3d6de89 4790 else if (visited[pred_bb->index])
6627f3ed 4791 continue;
2c084240 4792
6627f3ed 4793 /* Does this predecessor generate this expression? */
b3d6de89 4794 else if (TEST_BIT (comp[pred_bb->index], expr_index))
6627f3ed 4795 break;
b3d6de89 4796 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
6627f3ed 4797 break;
2c084240 4798
6627f3ed 4799 /* Not killed. */
4800 else
4801 {
b3d6de89 4802 visited[pred_bb->index] = 1;
6627f3ed 4803 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
4804 pred_bb, visited))
4805 break;
4806 }
4807 }
3cfec666 4808 if (visited_allocated_locally)
cd55d9d6 4809 free (visited);
2c084240 4810
6627f3ed 4811 return (pred == NULL);
4812}
4813\f
4814/* Actually perform code hoisting. */
2c084240 4815
6627f3ed 4816static void
952f0048 4817hoist_code (void)
6627f3ed 4818{
4c26117a 4819 basic_block bb, dominated;
8c4bd339 4820 basic_block *domby;
4821 unsigned int domby_len;
4822 unsigned int i,j;
6627f3ed 4823 struct expr **index_map;
2c084240 4824 struct expr *expr;
6627f3ed 4825
f20183e6 4826 sbitmap_vector_zero (hoist_exprs, last_basic_block);
6627f3ed 4827
4828 /* Compute a mapping from expression number (`bitmap_index') to
4829 hash table entry. */
4830
4c36ffe6 4831 index_map = XCNEWVEC (struct expr *, expr_hash_table.n_elems);
27cfe3f1 4832 for (i = 0; i < expr_hash_table.size; i++)
4833 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
2c084240 4834 index_map[expr->bitmap_index] = expr;
6627f3ed 4835
4836 /* Walk over each basic block looking for potentially hoistable
4837 expressions, nothing gets hoisted from the entry block. */
4c26117a 4838 FOR_EACH_BB (bb)
6627f3ed 4839 {
4840 int found = 0;
4841 int insn_inserted_p;
4842
0051c76a 4843 domby_len = get_dominated_by (CDI_DOMINATORS, bb, &domby);
6627f3ed 4844 /* Examine each expression that is very busy at the exit of this
4845 block. These are the potentially hoistable expressions. */
4c26117a 4846 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
6627f3ed 4847 {
4848 int hoistable = 0;
2c084240 4849
8c4bd339 4850 if (TEST_BIT (hoist_vbeout[bb->index], i)
4851 && TEST_BIT (transpout[bb->index], i))
6627f3ed 4852 {
4853 /* We've found a potentially hoistable expression, now
4854 we look at every block BB dominates to see if it
4855 computes the expression. */
8c4bd339 4856 for (j = 0; j < domby_len; j++)
6627f3ed 4857 {
8c4bd339 4858 dominated = domby[j];
6627f3ed 4859 /* Ignore self dominance. */
8c4bd339 4860 if (bb == dominated)
6627f3ed 4861 continue;
6627f3ed 4862 /* We've found a dominated block, now see if it computes
4863 the busy expression and whether or not moving that
4864 expression to the "beginning" of that block is safe. */
4c26117a 4865 if (!TEST_BIT (antloc[dominated->index], i))
6627f3ed 4866 continue;
4867
4868 /* Note if the expression would reach the dominated block
3cfec666 4869 unimpared if it was placed at the end of BB.
6627f3ed 4870
4871 Keep track of how many times this expression is hoistable
4872 from a dominated block into BB. */
4c26117a 4873 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
6627f3ed 4874 hoistable++;
4875 }
4876
424da949 4877 /* If we found more than one hoistable occurrence of this
6627f3ed 4878 expression, then note it in the bitmap of expressions to
4879 hoist. It makes no sense to hoist things which are computed
4880 in only one BB, and doing so tends to pessimize register
4881 allocation. One could increase this value to try harder
4882 to avoid any possible code expansion due to register
4883 allocation issues; however experiments have shown that
4884 the vast majority of hoistable expressions are only movable
d01481af 4885 from two successors, so raising this threshold is likely
6627f3ed 4886 to nullify any benefit we get from code hoisting. */
4887 if (hoistable > 1)
4888 {
4c26117a 4889 SET_BIT (hoist_exprs[bb->index], i);
6627f3ed 4890 found = 1;
4891 }
4892 }
4893 }
6627f3ed 4894 /* If we found nothing to hoist, then quit now. */
4895 if (! found)
8c4bd339 4896 {
952f0048 4897 free (domby);
6627f3ed 4898 continue;
8c4bd339 4899 }
6627f3ed 4900
4901 /* Loop over all the hoistable expressions. */
4c26117a 4902 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
6627f3ed 4903 {
4904 /* We want to insert the expression into BB only once, so
4905 note when we've inserted it. */
4906 insn_inserted_p = 0;
4907
4908 /* These tests should be the same as the tests above. */
a195a2e0 4909 if (TEST_BIT (hoist_exprs[bb->index], i))
6627f3ed 4910 {
4911 /* We've found a potentially hoistable expression, now
4912 we look at every block BB dominates to see if it
4913 computes the expression. */
8c4bd339 4914 for (j = 0; j < domby_len; j++)
6627f3ed 4915 {
8c4bd339 4916 dominated = domby[j];
6627f3ed 4917 /* Ignore self dominance. */
8c4bd339 4918 if (bb == dominated)
6627f3ed 4919 continue;
4920
4921 /* We've found a dominated block, now see if it computes
4922 the busy expression and whether or not moving that
4923 expression to the "beginning" of that block is safe. */
4c26117a 4924 if (!TEST_BIT (antloc[dominated->index], i))
6627f3ed 4925 continue;
4926
4927 /* The expression is computed in the dominated block and
4928 it would be safe to compute it at the start of the
4929 dominated block. Now we have to determine if the
424da949 4930 expression would reach the dominated block if it was
6627f3ed 4931 placed at the end of BB. */
4c26117a 4932 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
6627f3ed 4933 {
4934 struct expr *expr = index_map[i];
4935 struct occr *occr = expr->antic_occr;
4936 rtx insn;
4937 rtx set;
4938
424da949 4939 /* Find the right occurrence of this expression. */
4c26117a 4940 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
6627f3ed 4941 occr = occr->next;
4942
0d59b19d 4943 gcc_assert (occr);
6627f3ed 4944 insn = occr->insn;
6627f3ed 4945 set = single_set (insn);
0d59b19d 4946 gcc_assert (set);
6627f3ed 4947
4948 /* Create a pseudo-reg to store the result of reaching
4949 expressions into. Get the mode for the new pseudo
4950 from the mode of the original destination pseudo. */
4951 if (expr->reaching_reg == NULL)
4952 expr->reaching_reg
4953 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
4954
51f6e244 4955 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
4956 delete_insn (insn);
4957 occr->deleted_p = 1;
4958 if (!insn_inserted_p)
6627f3ed 4959 {
51f6e244 4960 insert_insn_end_bb (index_map[i], bb, 0);
4961 insn_inserted_p = 1;
6627f3ed 4962 }
4963 }
4964 }
4965 }
4966 }
8c4bd339 4967 free (domby);
6627f3ed 4968 }
2c084240 4969
387732c1 4970 free (index_map);
6627f3ed 4971}
4972
4973/* Top level routine to perform one code hoisting (aka unification) pass
4974
6ef828f9 4975 Return nonzero if a change was made. */
6627f3ed 4976
4977static int
952f0048 4978one_code_hoisting_pass (void)
6627f3ed 4979{
4980 int changed = 0;
4981
27cfe3f1 4982 alloc_hash_table (max_cuid, &expr_hash_table, 0);
4983 compute_hash_table (&expr_hash_table);
3f5be5f4 4984 if (dump_file)
4985 dump_hash_table (dump_file, "Code Hosting Expressions", &expr_hash_table);
2c084240 4986
27cfe3f1 4987 if (expr_hash_table.n_elems > 0)
6627f3ed 4988 {
27cfe3f1 4989 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
6627f3ed 4990 compute_code_hoist_data ();
4991 hoist_code ();
4992 free_code_hoist_mem ();
4993 }
2c084240 4994
27cfe3f1 4995 free_hash_table (&expr_hash_table);
6627f3ed 4996
4997 return changed;
4998}
8e802be9 4999\f
5000/* Here we provide the things required to do store motion towards
5001 the exit. In order for this to be effective, gcse also needed to
5002 be taught how to move a load when it is kill only by a store to itself.
5003
5004 int i;
5005 float a[10];
5006
5007 void foo(float scale)
5008 {
5009 for (i=0; i<10; i++)
5010 a[i] *= scale;
5011 }
5012
5013 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
3cfec666 5014 the load out since its live around the loop, and stored at the bottom
5015 of the loop.
8e802be9 5016
3cfec666 5017 The 'Load Motion' referred to and implemented in this file is
8e802be9 5018 an enhancement to gcse which when using edge based lcm, recognizes
5019 this situation and allows gcse to move the load out of the loop.
5020
5021 Once gcse has hoisted the load, store motion can then push this
5022 load towards the exit, and we end up with no loads or stores of 'i'
5023 in the loop. */
5024
0d707271 5025static hashval_t
5026pre_ldst_expr_hash (const void *p)
5027{
5028 int do_not_record_p = 0;
5029 const struct ls_expr *x = p;
5030 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
5031}
5032
5033static int
5034pre_ldst_expr_eq (const void *p1, const void *p2)
5035{
5036 const struct ls_expr *ptr1 = p1, *ptr2 = p2;
5037 return expr_equiv_p (ptr1->pattern, ptr2->pattern);
5038}
5039
424da949 5040/* This will search the ldst list for a matching expression. If it
8e802be9 5041 doesn't find one, we create one and initialize it. */
5042
5043static struct ls_expr *
952f0048 5044ldst_entry (rtx x)
8e802be9 5045{
69333952 5046 int do_not_record_p = 0;
8e802be9 5047 struct ls_expr * ptr;
69333952 5048 unsigned int hash;
0d707271 5049 void **slot;
5050 struct ls_expr e;
8e802be9 5051
78d140c9 5052 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
5053 NULL, /*have_reg_qty=*/false);
8e802be9 5054
0d707271 5055 e.pattern = x;
5056 slot = htab_find_slot_with_hash (pre_ldst_table, &e, hash, INSERT);
5057 if (*slot)
5058 return (struct ls_expr *)*slot;
69333952 5059
4c36ffe6 5060 ptr = XNEW (struct ls_expr);
69333952 5061
5062 ptr->next = pre_ldst_mems;
5063 ptr->expr = NULL;
5064 ptr->pattern = x;
5065 ptr->pattern_regs = NULL_RTX;
5066 ptr->loads = NULL_RTX;
5067 ptr->stores = NULL_RTX;
5068 ptr->reaching_reg = NULL_RTX;
5069 ptr->invalid = 0;
5070 ptr->index = 0;
5071 ptr->hash_index = hash;
5072 pre_ldst_mems = ptr;
0d707271 5073 *slot = ptr;
3cfec666 5074
8e802be9 5075 return ptr;
5076}
5077
5078/* Free up an individual ldst entry. */
5079
3cfec666 5080static void
952f0048 5081free_ldst_entry (struct ls_expr * ptr)
8e802be9 5082{
7a676a9f 5083 free_INSN_LIST_list (& ptr->loads);
5084 free_INSN_LIST_list (& ptr->stores);
8e802be9 5085
5086 free (ptr);
5087}
5088
5089/* Free up all memory associated with the ldst list. */
5090
5091static void
952f0048 5092free_ldst_mems (void)
8e802be9 5093{
d0f6323d 5094 if (pre_ldst_table)
5095 htab_delete (pre_ldst_table);
0d707271 5096 pre_ldst_table = NULL;
5097
3cfec666 5098 while (pre_ldst_mems)
8e802be9 5099 {
5100 struct ls_expr * tmp = pre_ldst_mems;
5101
5102 pre_ldst_mems = pre_ldst_mems->next;
5103
5104 free_ldst_entry (tmp);
5105 }
5106
5107 pre_ldst_mems = NULL;
5108}
5109
5110/* Dump debugging info about the ldst list. */
5111
5112static void
952f0048 5113print_ldst_list (FILE * file)
8e802be9 5114{
5115 struct ls_expr * ptr;
5116
5117 fprintf (file, "LDST list: \n");
5118
5119 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
5120 {
5121 fprintf (file, " Pattern (%3d): ", ptr->index);
5122
5123 print_rtl (file, ptr->pattern);
5124
5125 fprintf (file, "\n Loads : ");
5126
5127 if (ptr->loads)
5128 print_rtl (file, ptr->loads);
5129 else
5130 fprintf (file, "(nil)");
5131
5132 fprintf (file, "\n Stores : ");
5133
5134 if (ptr->stores)
5135 print_rtl (file, ptr->stores);
5136 else
5137 fprintf (file, "(nil)");
5138
5139 fprintf (file, "\n\n");
5140 }
5141
5142 fprintf (file, "\n");
5143}
5144
5145/* Returns 1 if X is in the list of ldst only expressions. */
5146
5147static struct ls_expr *
952f0048 5148find_rtx_in_ldst (rtx x)
8e802be9 5149{
0d707271 5150 struct ls_expr e;
5151 void **slot;
00784725 5152 if (!pre_ldst_table)
5153 return NULL;
0d707271 5154 e.pattern = x;
5155 slot = htab_find_slot (pre_ldst_table, &e, NO_INSERT);
5156 if (!slot || ((struct ls_expr *)*slot)->invalid)
5157 return NULL;
5158 return *slot;
8e802be9 5159}
5160
5161/* Assign each element of the list of mems a monotonically increasing value. */
5162
5163static int
952f0048 5164enumerate_ldsts (void)
8e802be9 5165{
5166 struct ls_expr * ptr;
5167 int n = 0;
5168
5169 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
5170 ptr->index = n++;
5171
5172 return n;
5173}
5174
5175/* Return first item in the list. */
5176
5177static inline struct ls_expr *
952f0048 5178first_ls_expr (void)
8e802be9 5179{
5180 return pre_ldst_mems;
5181}
5182
dc92a994 5183/* Return the next item in the list after the specified one. */
8e802be9 5184
5185static inline struct ls_expr *
952f0048 5186next_ls_expr (struct ls_expr * ptr)
8e802be9 5187{
5188 return ptr->next;
5189}
5190\f
5191/* Load Motion for loads which only kill themselves. */
5192
5193/* Return true if x is a simple MEM operation, with no registers or
5194 side effects. These are the types of loads we consider for the
5195 ld_motion list, otherwise we let the usual aliasing take care of it. */
5196
3cfec666 5197static int
952f0048 5198simple_mem (rtx x)
8e802be9 5199{
b9f02dbb 5200 if (! MEM_P (x))
8e802be9 5201 return 0;
3cfec666 5202
8e802be9 5203 if (MEM_VOLATILE_P (x))
5204 return 0;
3cfec666 5205
8e802be9 5206 if (GET_MODE (x) == BLKmode)
5207 return 0;
7a676a9f 5208
64928ee5 5209 /* If we are handling exceptions, we must be careful with memory references
5210 that may trap. If we are not, the behavior is undefined, so we may just
5211 continue. */
5212 if (flag_non_call_exceptions && may_trap_p (x))
43f5be72 5213 return 0;
5214
64928ee5 5215 if (side_effects_p (x))
5216 return 0;
3cfec666 5217
64928ee5 5218 /* Do not consider function arguments passed on stack. */
5219 if (reg_mentioned_p (stack_pointer_rtx, x))
5220 return 0;
5221
5222 if (flag_float_store && FLOAT_MODE_P (GET_MODE (x)))
5223 return 0;
5224
5225 return 1;
8e802be9 5226}
5227
3cfec666 5228/* Make sure there isn't a buried reference in this pattern anywhere.
5229 If there is, invalidate the entry for it since we're not capable
5230 of fixing it up just yet.. We have to be sure we know about ALL
8e802be9 5231 loads since the aliasing code will allow all entries in the
5232 ld_motion list to not-alias itself. If we miss a load, we will get
3cfec666 5233 the wrong value since gcse might common it and we won't know to
8e802be9 5234 fix it up. */
5235
5236static void
952f0048 5237invalidate_any_buried_refs (rtx x)
8e802be9 5238{
5239 const char * fmt;
387732c1 5240 int i, j;
8e802be9 5241 struct ls_expr * ptr;
5242
5243 /* Invalidate it in the list. */
b9f02dbb 5244 if (MEM_P (x) && simple_mem (x))
8e802be9 5245 {
5246 ptr = ldst_entry (x);
5247 ptr->invalid = 1;
5248 }
5249
5250 /* Recursively process the insn. */
5251 fmt = GET_RTX_FORMAT (GET_CODE (x));
3cfec666 5252
8e802be9 5253 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5254 {
5255 if (fmt[i] == 'e')
5256 invalidate_any_buried_refs (XEXP (x, i));
5257 else if (fmt[i] == 'E')
5258 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5259 invalidate_any_buried_refs (XVECEXP (x, i, j));
5260 }
5261}
5262
c5d8ca43 5263/* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
5264 being defined as MEM loads and stores to symbols, with no side effects
5265 and no registers in the expression. For a MEM destination, we also
5266 check that the insn is still valid if we replace the destination with a
5267 REG, as is done in update_ld_motion_stores. If there are any uses/defs
5268 which don't match this criteria, they are invalidated and trimmed out
5269 later. */
8e802be9 5270
3cfec666 5271static void
952f0048 5272compute_ld_motion_mems (void)
8e802be9 5273{
5274 struct ls_expr * ptr;
4c26117a 5275 basic_block bb;
8e802be9 5276 rtx insn;
3cfec666 5277
8e802be9 5278 pre_ldst_mems = NULL;
0d707271 5279 pre_ldst_table = htab_create (13, pre_ldst_expr_hash,
5280 pre_ldst_expr_eq, NULL);
8e802be9 5281
4c26117a 5282 FOR_EACH_BB (bb)
8e802be9 5283 {
defc8016 5284 FOR_BB_INSNS (bb, insn)
8e802be9 5285 {
1c0e97a1 5286 if (INSN_P (insn))
8e802be9 5287 {
5288 if (GET_CODE (PATTERN (insn)) == SET)
5289 {
5290 rtx src = SET_SRC (PATTERN (insn));
5291 rtx dest = SET_DEST (PATTERN (insn));
5292
5293 /* Check for a simple LOAD... */
b9f02dbb 5294 if (MEM_P (src) && simple_mem (src))
8e802be9 5295 {
5296 ptr = ldst_entry (src);
b9f02dbb 5297 if (REG_P (dest))
8e802be9 5298 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
5299 else
5300 ptr->invalid = 1;
5301 }
5302 else
5303 {
5304 /* Make sure there isn't a buried load somewhere. */
5305 invalidate_any_buried_refs (src);
5306 }
3cfec666 5307
8e802be9 5308 /* Check for stores. Don't worry about aliased ones, they
5309 will block any movement we might do later. We only care
5310 about this exact pattern since those are the only
5311 circumstance that we will ignore the aliasing info. */
b9f02dbb 5312 if (MEM_P (dest) && simple_mem (dest))
8e802be9 5313 {
5314 ptr = ldst_entry (dest);
3cfec666 5315
b9f02dbb 5316 if (! MEM_P (src)
c5d8ca43 5317 && GET_CODE (src) != ASM_OPERANDS
5318 /* Check for REG manually since want_to_gcse_p
5319 returns 0 for all REGs. */
69dbb666 5320 && can_assign_to_reg_p (src))
8e802be9 5321 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
5322 else
5323 ptr->invalid = 1;
5324 }
5325 }
5326 else
5327 invalidate_any_buried_refs (PATTERN (insn));
5328 }
5329 }
5330 }
5331}
5332
3cfec666 5333/* Remove any references that have been either invalidated or are not in the
8e802be9 5334 expression list for pre gcse. */
5335
5336static void
952f0048 5337trim_ld_motion_mems (void)
8e802be9 5338{
69333952 5339 struct ls_expr * * last = & pre_ldst_mems;
5340 struct ls_expr * ptr = pre_ldst_mems;
8e802be9 5341
5342 while (ptr != NULL)
5343 {
69333952 5344 struct expr * expr;
3cfec666 5345
8e802be9 5346 /* Delete if entry has been made invalid. */
69333952 5347 if (! ptr->invalid)
8e802be9 5348 {
8e802be9 5349 /* Delete if we cannot find this mem in the expression list. */
69333952 5350 unsigned int hash = ptr->hash_index % expr_hash_table.size;
3cfec666 5351
69333952 5352 for (expr = expr_hash_table.table[hash];
5353 expr != NULL;
5354 expr = expr->next_same_hash)
5355 if (expr_equiv_p (expr->expr, ptr->pattern))
5356 break;
8e802be9 5357 }
5358 else
69333952 5359 expr = (struct expr *) 0;
5360
5361 if (expr)
8e802be9 5362 {
5363 /* Set the expression field if we are keeping it. */
8e802be9 5364 ptr->expr = expr;
69333952 5365 last = & ptr->next;
8e802be9 5366 ptr = ptr->next;
5367 }
69333952 5368 else
5369 {
5370 *last = ptr->next;
0d707271 5371 htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index);
69333952 5372 free_ldst_entry (ptr);
5373 ptr = * last;
5374 }
8e802be9 5375 }
5376
5377 /* Show the world what we've found. */
3f5be5f4 5378 if (dump_file && pre_ldst_mems != NULL)
5379 print_ldst_list (dump_file);
8e802be9 5380}
5381
5382/* This routine will take an expression which we are replacing with
5383 a reaching register, and update any stores that are needed if
5384 that expression is in the ld_motion list. Stores are updated by
91c82c20 5385 copying their SRC to the reaching register, and then storing
8e802be9 5386 the reaching register into the store location. These keeps the
5387 correct value in the reaching register for the loads. */
5388
5389static void
952f0048 5390update_ld_motion_stores (struct expr * expr)
8e802be9 5391{
5392 struct ls_expr * mem_ptr;
5393
5394 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
5395 {
3cfec666 5396 /* We can try to find just the REACHED stores, but is shouldn't
5397 matter to set the reaching reg everywhere... some might be
8e802be9 5398 dead and should be eliminated later. */
5399
c5d8ca43 5400 /* We replace (set mem expr) with (set reg expr) (set mem reg)
5401 where reg is the reaching reg used in the load. We checked in
5402 compute_ld_motion_mems that we can replace (set mem expr) with
5403 (set reg expr) in that insn. */
8e802be9 5404 rtx list = mem_ptr->stores;
3cfec666 5405
8e802be9 5406 for ( ; list != NULL_RTX; list = XEXP (list, 1))
5407 {
5408 rtx insn = XEXP (list, 0);
5409 rtx pat = PATTERN (insn);
5410 rtx src = SET_SRC (pat);
5411 rtx reg = expr->reaching_reg;
5235bcec 5412 rtx copy, new;
8e802be9 5413
5414 /* If we've already copied it, continue. */
5415 if (expr->reaching_reg == src)
5416 continue;
3cfec666 5417
3f5be5f4 5418 if (dump_file)
8e802be9 5419 {
3f5be5f4 5420 fprintf (dump_file, "PRE: store updated with reaching reg ");
5421 print_rtl (dump_file, expr->reaching_reg);
5422 fprintf (dump_file, ":\n ");
5423 print_inline_rtx (dump_file, insn, 8);
5424 fprintf (dump_file, "\n");
8e802be9 5425 }
3cfec666 5426
64928ee5 5427 copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat)));
5235bcec 5428 new = emit_insn_before (copy, insn);
5429 record_one_set (REGNO (reg), new);
8e802be9 5430 SET_SRC (pat) = reg;
5431
5432 /* un-recognize this pattern since it's probably different now. */
5433 INSN_CODE (insn) = -1;
5434 gcse_create_count++;
5435 }
5436 }
5437}
5438\f
5439/* Store motion code. */
5440
64928ee5 5441#define ANTIC_STORE_LIST(x) ((x)->loads)
5442#define AVAIL_STORE_LIST(x) ((x)->stores)
5443#define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
5444
3cfec666 5445/* This is used to communicate the target bitvector we want to use in the
7a676a9f 5446 reg_set_info routine when called via the note_stores mechanism. */
64928ee5 5447static int * regvec;
5448
5449/* And current insn, for the same routine. */
5450static rtx compute_store_table_current_insn;
7a676a9f 5451
8e802be9 5452/* Used in computing the reverse edge graph bit vectors. */
5453static sbitmap * st_antloc;
5454
5455/* Global holding the number of store expressions we are dealing with. */
5456static int num_stores;
5457
9e4a9ceb 5458/* Checks to set if we need to mark a register set. Called from
5459 note_stores. */
8e802be9 5460
7a676a9f 5461static void
952f0048 5462reg_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED,
9e4a9ceb 5463 void *data)
8e802be9 5464{
9e4a9ceb 5465 sbitmap bb_reg = data;
5466
7a676a9f 5467 if (GET_CODE (dest) == SUBREG)
5468 dest = SUBREG_REG (dest);
42334a67 5469
b9f02dbb 5470 if (REG_P (dest))
9e4a9ceb 5471 {
5472 regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn);
5473 if (bb_reg)
5474 SET_BIT (bb_reg, REGNO (dest));
5475 }
5476}
5477
5478/* Clear any mark that says that this insn sets dest. Called from
5479 note_stores. */
5480
5481static void
5482reg_clear_last_set (rtx dest, rtx setter ATTRIBUTE_UNUSED,
5483 void *data)
5484{
5485 int *dead_vec = data;
5486
5487 if (GET_CODE (dest) == SUBREG)
5488 dest = SUBREG_REG (dest);
5489
b9f02dbb 5490 if (REG_P (dest) &&
9e4a9ceb 5491 dead_vec[REGNO (dest)] == INSN_UID (compute_store_table_current_insn))
5492 dead_vec[REGNO (dest)] = 0;
8e802be9 5493}
5494
64928ee5 5495/* Return zero if some of the registers in list X are killed
5496 due to set of registers in bitmap REGS_SET. */
952f0048 5497
64928ee5 5498static bool
952f0048 5499store_ops_ok (rtx x, int *regs_set)
64928ee5 5500{
5501 rtx reg;
5502
5503 for (; x; x = XEXP (x, 1))
5504 {
5505 reg = XEXP (x, 0);
5506 if (regs_set[REGNO(reg)])
952f0048 5507 return false;
64928ee5 5508 }
8e802be9 5509
64928ee5 5510 return true;
5511}
5512
5513/* Returns a list of registers mentioned in X. */
5514static rtx
952f0048 5515extract_mentioned_regs (rtx x)
64928ee5 5516{
5517 return extract_mentioned_regs_helper (x, NULL_RTX);
5518}
5519
5520/* Helper for extract_mentioned_regs; ACCUM is used to accumulate used
5521 registers. */
5522static rtx
952f0048 5523extract_mentioned_regs_helper (rtx x, rtx accum)
8e802be9 5524{
5525 int i;
5526 enum rtx_code code;
5527 const char * fmt;
5528
5529 /* Repeat is used to turn tail-recursion into iteration. */
5530 repeat:
5531
5532 if (x == 0)
64928ee5 5533 return accum;
8e802be9 5534
5535 code = GET_CODE (x);
5536 switch (code)
5537 {
5538 case REG:
64928ee5 5539 return alloc_EXPR_LIST (0, x, accum);
8e802be9 5540
5541 case MEM:
5542 x = XEXP (x, 0);
5543 goto repeat;
5544
5545 case PRE_DEC:
5546 case PRE_INC:
5547 case POST_DEC:
5548 case POST_INC:
64928ee5 5549 /* We do not run this function with arguments having side effects. */
0d59b19d 5550 gcc_unreachable ();
8e802be9 5551
5552 case PC:
5553 case CC0: /*FIXME*/
5554 case CONST:
5555 case CONST_INT:
5556 case CONST_DOUBLE:
886cfd4f 5557 case CONST_VECTOR:
8e802be9 5558 case SYMBOL_REF:
5559 case LABEL_REF:
5560 case ADDR_VEC:
5561 case ADDR_DIFF_VEC:
64928ee5 5562 return accum;
8e802be9 5563
5564 default:
5565 break;
5566 }
5567
5568 i = GET_RTX_LENGTH (code) - 1;
5569 fmt = GET_RTX_FORMAT (code);
3cfec666 5570
8e802be9 5571 for (; i >= 0; i--)
5572 {
5573 if (fmt[i] == 'e')
5574 {
5575 rtx tem = XEXP (x, i);
5576
5577 /* If we are about to do the last recursive call
64928ee5 5578 needed at this level, change it into iteration. */
8e802be9 5579 if (i == 0)
5580 {
5581 x = tem;
5582 goto repeat;
5583 }
3cfec666 5584
64928ee5 5585 accum = extract_mentioned_regs_helper (tem, accum);
8e802be9 5586 }
5587 else if (fmt[i] == 'E')
5588 {
5589 int j;
3cfec666 5590
8e802be9 5591 for (j = 0; j < XVECLEN (x, i); j++)
64928ee5 5592 accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum);
8e802be9 5593 }
5594 }
5595
64928ee5 5596 return accum;
8e802be9 5597}
5598
64928ee5 5599/* Determine whether INSN is MEM store pattern that we will consider moving.
5600 REGS_SET_BEFORE is bitmap of registers set before (and including) the
5601 current insn, REGS_SET_AFTER is bitmap of registers set after (and
5602 including) the insn in this basic block. We must be passing through BB from
5603 head to end, as we are using this fact to speed things up.
952f0048 5604
64928ee5 5605 The results are stored this way:
5606
5607 -- the first anticipatable expression is added into ANTIC_STORE_LIST
5608 -- if the processed expression is not anticipatable, NULL_RTX is added
5609 there instead, so that we can use it as indicator that no further
5610 expression of this type may be anticipatable
5611 -- if the expression is available, it is added as head of AVAIL_STORE_LIST;
5612 consequently, all of them but this head are dead and may be deleted.
5613 -- if the expression is not available, the insn due to that it fails to be
5614 available is stored in reaching_reg.
5615
5616 The things are complicated a bit by fact that there already may be stores
5617 to the same MEM from other blocks; also caller must take care of the
d01481af 5618 necessary cleanup of the temporary markers after end of the basic block.
64928ee5 5619 */
8e802be9 5620
5621static void
952f0048 5622find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after)
8e802be9 5623{
5624 struct ls_expr * ptr;
64928ee5 5625 rtx dest, set, tmp;
5626 int check_anticipatable, check_available;
5627 basic_block bb = BLOCK_FOR_INSN (insn);
8e802be9 5628
64928ee5 5629 set = single_set (insn);
5630 if (!set)
8e802be9 5631 return;
5632
64928ee5 5633 dest = SET_DEST (set);
3cfec666 5634
b9f02dbb 5635 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
8e802be9 5636 || GET_MODE (dest) == BLKmode)
7a676a9f 5637 return;
5638
64928ee5 5639 if (side_effects_p (dest))
5640 return;
7a676a9f 5641
64928ee5 5642 /* If we are handling exceptions, we must be careful with memory references
5643 that may trap. If we are not, the behavior is undefined, so we may just
5644 continue. */
5a37abfd 5645 if (flag_non_call_exceptions && may_trap_p (dest))
64928ee5 5646 return;
952f0048 5647
c9ba4055 5648 /* Even if the destination cannot trap, the source may. In this case we'd
5649 need to handle updating the REG_EH_REGION note. */
5650 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
5651 return;
5652
03c8b2e4 5653 /* Make sure that the SET_SRC of this store insns can be assigned to
5654 a register, or we will fail later on in replace_store_insn, which
5655 assumes that we can do this. But sometimes the target machine has
5656 oddities like MEM read-modify-write instruction. See for example
5657 PR24257. */
5658 if (!can_assign_to_reg_p (SET_SRC (set)))
5659 return;
5660
8e802be9 5661 ptr = ldst_entry (dest);
64928ee5 5662 if (!ptr->pattern_regs)
5663 ptr->pattern_regs = extract_mentioned_regs (dest);
5664
5665 /* Do not check for anticipatability if we either found one anticipatable
5666 store already, or tested for one and found out that it was killed. */
5667 check_anticipatable = 0;
5668 if (!ANTIC_STORE_LIST (ptr))
5669 check_anticipatable = 1;
5670 else
5671 {
5672 tmp = XEXP (ANTIC_STORE_LIST (ptr), 0);
5673 if (tmp != NULL_RTX
5674 && BLOCK_FOR_INSN (tmp) != bb)
5675 check_anticipatable = 1;
5676 }
5677 if (check_anticipatable)
5678 {
5679 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
5680 tmp = NULL_RTX;
5681 else
5682 tmp = insn;
5683 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp,
5684 ANTIC_STORE_LIST (ptr));
5685 }
8e802be9 5686
d01481af 5687 /* It is not necessary to check whether store is available if we did
64928ee5 5688 it successfully before; if we failed before, do not bother to check
5689 until we reach the insn that caused us to fail. */
5690 check_available = 0;
5691 if (!AVAIL_STORE_LIST (ptr))
5692 check_available = 1;
5693 else
5694 {
5695 tmp = XEXP (AVAIL_STORE_LIST (ptr), 0);
5696 if (BLOCK_FOR_INSN (tmp) != bb)
5697 check_available = 1;
5698 }
5699 if (check_available)
5700 {
5701 /* Check that we have already reached the insn at that the check
5702 failed last time. */
5703 if (LAST_AVAIL_CHECK_FAILURE (ptr))
5704 {
5496dbfc 5705 for (tmp = BB_END (bb);
64928ee5 5706 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
5707 tmp = PREV_INSN (tmp))
5708 continue;
5709 if (tmp == insn)
5710 check_available = 0;
5711 }
5712 else
5713 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
5714 bb, regs_set_after,
5715 &LAST_AVAIL_CHECK_FAILURE (ptr));
5716 }
5717 if (!check_available)
5718 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr));
5719}
952f0048 5720
64928ee5 5721/* Find available and anticipatable stores. */
8e802be9 5722
5723static int
952f0048 5724compute_store_table (void)
8e802be9 5725{
4c26117a 5726 int ret;
5727 basic_block bb;
7a676a9f 5728 unsigned regno;
64928ee5 5729 rtx insn, pat, tmp;
5730 int *last_set_in, *already_set;
5731 struct ls_expr * ptr, **prev_next_ptr_ptr;
7a676a9f 5732
8e802be9 5733 max_gcse_regno = max_reg_num ();
5734
f0af5a88 5735 reg_set_in_block = sbitmap_vector_alloc (last_basic_block,
7a676a9f 5736 max_gcse_regno);
f20183e6 5737 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
8e802be9 5738 pre_ldst_mems = 0;
0d707271 5739 pre_ldst_table = htab_create (13, pre_ldst_expr_hash,
5740 pre_ldst_expr_eq, NULL);
4c36ffe6 5741 last_set_in = XCNEWVEC (int, max_gcse_regno);
5742 already_set = XNEWVEC (int, max_gcse_regno);
7a676a9f 5743
8e802be9 5744 /* Find all the stores we care about. */
4c26117a 5745 FOR_EACH_BB (bb)
8e802be9 5746 {
64928ee5 5747 /* First compute the registers set in this block. */
64928ee5 5748 regvec = last_set_in;
5749
defc8016 5750 FOR_BB_INSNS (bb, insn)
64928ee5 5751 {
5752 if (! INSN_P (insn))
5753 continue;
5754
b9f02dbb 5755 if (CALL_P (insn))
64928ee5 5756 {
64928ee5 5757 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4fec1d6c 5758 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
9e4a9ceb 5759 {
5760 last_set_in[regno] = INSN_UID (insn);
5761 SET_BIT (reg_set_in_block[bb->index], regno);
5762 }
64928ee5 5763 }
5764
5765 pat = PATTERN (insn);
5766 compute_store_table_current_insn = insn;
9e4a9ceb 5767 note_stores (pat, reg_set_info, reg_set_in_block[bb->index]);
64928ee5 5768 }
5769
64928ee5 5770 /* Now find the stores. */
5771 memset (already_set, 0, sizeof (int) * max_gcse_regno);
5772 regvec = already_set;
defc8016 5773 FOR_BB_INSNS (bb, insn)
8e802be9 5774 {
f6025ee7 5775 if (! INSN_P (insn))
8e802be9 5776 continue;
5777
b9f02dbb 5778 if (CALL_P (insn))
7a676a9f 5779 {
5780 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4fec1d6c 5781 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
64928ee5 5782 already_set[regno] = 1;
7a676a9f 5783 }
3cfec666 5784
8e802be9 5785 pat = PATTERN (insn);
7a676a9f 5786 note_stores (pat, reg_set_info, NULL);
3cfec666 5787
8e802be9 5788 /* Now that we've marked regs, look for stores. */
64928ee5 5789 find_moveable_store (insn, already_set, last_set_in);
5790
5791 /* Unmark regs that are no longer set. */
9e4a9ceb 5792 compute_store_table_current_insn = insn;
5793 note_stores (pat, reg_clear_last_set, last_set_in);
b9f02dbb 5794 if (CALL_P (insn))
9e4a9ceb 5795 {
9e4a9ceb 5796 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4fec1d6c 5797 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)
9e4a9ceb 5798 && last_set_in[regno] == INSN_UID (insn))
5799 last_set_in[regno] = 0;
5800 }
64928ee5 5801 }
5802
9e4a9ceb 5803#ifdef ENABLE_CHECKING
5804 /* last_set_in should now be all-zero. */
5805 for (regno = 0; regno < max_gcse_regno; regno++)
0d59b19d 5806 gcc_assert (!last_set_in[regno]);
9e4a9ceb 5807#endif
5808
64928ee5 5809 /* Clear temporary marks. */
5810 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
5811 {
5812 LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX;
5813 if (ANTIC_STORE_LIST (ptr)
5814 && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX)
5815 ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1);
5816 }
5817 }
5818
5819 /* Remove the stores that are not available anywhere, as there will
5820 be no opportunity to optimize them. */
5821 for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems;
5822 ptr != NULL;
5823 ptr = *prev_next_ptr_ptr)
5824 {
5825 if (!AVAIL_STORE_LIST (ptr))
5826 {
5827 *prev_next_ptr_ptr = ptr->next;
0d707271 5828 htab_remove_elt_with_hash (pre_ldst_table, ptr, ptr->hash_index);
64928ee5 5829 free_ldst_entry (ptr);
8e802be9 5830 }
64928ee5 5831 else
5832 prev_next_ptr_ptr = &ptr->next;
8e802be9 5833 }
5834
5835 ret = enumerate_ldsts ();
3cfec666 5836
3f5be5f4 5837 if (dump_file)
8e802be9 5838 {
3f5be5f4 5839 fprintf (dump_file, "ST_avail and ST_antic (shown under loads..)\n");
5840 print_ldst_list (dump_file);
8e802be9 5841 }
3cfec666 5842
64928ee5 5843 free (last_set_in);
5844 free (already_set);
8e802be9 5845 return ret;
5846}
5847
1d7429d8 5848/* Check to see if the load X is aliased with STORE_PATTERN.
5849 AFTER is true if we are checking the case when STORE_PATTERN occurs
5850 after the X. */
8e802be9 5851
64928ee5 5852static bool
1d7429d8 5853load_kills_store (rtx x, rtx store_pattern, int after)
8e802be9 5854{
1d7429d8 5855 if (after)
5856 return anti_dependence (x, store_pattern);
5857 else
5858 return true_dependence (store_pattern, GET_MODE (store_pattern), x,
5859 rtx_addr_varies_p);
8e802be9 5860}
5861
3cfec666 5862/* Go through the entire insn X, looking for any loads which might alias
1d7429d8 5863 STORE_PATTERN. Return true if found.
5864 AFTER is true if we are checking the case when STORE_PATTERN occurs
5865 after the insn X. */
8e802be9 5866
64928ee5 5867static bool
1d7429d8 5868find_loads (rtx x, rtx store_pattern, int after)
8e802be9 5869{
5870 const char * fmt;
387732c1 5871 int i, j;
64928ee5 5872 int ret = false;
8e802be9 5873
06a652d1 5874 if (!x)
64928ee5 5875 return false;
06a652d1 5876
3cfec666 5877 if (GET_CODE (x) == SET)
8e802be9 5878 x = SET_SRC (x);
5879
b9f02dbb 5880 if (MEM_P (x))
8e802be9 5881 {
1d7429d8 5882 if (load_kills_store (x, store_pattern, after))
64928ee5 5883 return true;
8e802be9 5884 }
5885
5886 /* Recursively process the insn. */
5887 fmt = GET_RTX_FORMAT (GET_CODE (x));
3cfec666 5888
8e802be9 5889 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
5890 {
5891 if (fmt[i] == 'e')
1d7429d8 5892 ret |= find_loads (XEXP (x, i), store_pattern, after);
8e802be9 5893 else if (fmt[i] == 'E')
5894 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1d7429d8 5895 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
8e802be9 5896 }
5897 return ret;
5898}
5899
3cfec666 5900/* Check if INSN kills the store pattern X (is aliased with it).
1d7429d8 5901 AFTER is true if we are checking the case when store X occurs
822e391f 5902 after the insn. Return true if it does. */
8e802be9 5903
64928ee5 5904static bool
1d7429d8 5905store_killed_in_insn (rtx x, rtx x_regs, rtx insn, int after)
8e802be9 5906{
609e463e 5907 rtx reg, base, note;
5a37abfd 5908
1c0e97a1 5909 if (!INSN_P (insn))
64928ee5 5910 return false;
3cfec666 5911
b9f02dbb 5912 if (CALL_P (insn))
8e802be9 5913 {
9dabda37 5914 /* A normal or pure call might read from pattern,
5915 but a const call will not. */
64928ee5 5916 if (! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn))
5917 return true;
5918
5a37abfd 5919 /* But even a const call reads its parameters. Check whether the
5920 base of some of registers used in mem is stack pointer. */
5921 for (reg = x_regs; reg; reg = XEXP (reg, 1))
5922 {
8c464118 5923 base = find_base_term (XEXP (reg, 0));
5a37abfd 5924 if (!base
5925 || (GET_CODE (base) == ADDRESS
5926 && GET_MODE (base) == Pmode
5927 && XEXP (base, 0) == stack_pointer_rtx))
5928 return true;
5929 }
64928ee5 5930
5931 return false;
8e802be9 5932 }
3cfec666 5933
8e802be9 5934 if (GET_CODE (PATTERN (insn)) == SET)
5935 {
5936 rtx pat = PATTERN (insn);
1d7429d8 5937 rtx dest = SET_DEST (pat);
5938
476d094d 5939 if (GET_CODE (dest) == ZERO_EXTRACT)
1d7429d8 5940 dest = XEXP (dest, 0);
5941
8e802be9 5942 /* Check for memory stores to aliased objects. */
b9f02dbb 5943 if (MEM_P (dest)
1d7429d8 5944 && !expr_equiv_p (dest, x))
5945 {
5946 if (after)
5947 {
5948 if (output_dependence (dest, x))
5949 return true;
5950 }
5951 else
5952 {
5953 if (output_dependence (x, dest))
5954 return true;
5955 }
5956 }
609e463e 5957 if (find_loads (SET_SRC (pat), x, after))
5958 return true;
8e802be9 5959 }
609e463e 5960 else if (find_loads (PATTERN (insn), x, after))
5961 return true;
5962
5963 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
5964 location aliased with X, then this insn kills X. */
5965 note = find_reg_equal_equiv_note (insn);
5966 if (! note)
5967 return false;
5968 note = XEXP (note, 0);
5969
5970 /* However, if the note represents a must alias rather than a may
5971 alias relationship, then it does not kill X. */
5972 if (expr_equiv_p (note, x))
5973 return false;
5974
5975 /* See if there are any aliased loads in the note. */
5976 return find_loads (note, x, after);
8e802be9 5977}
5978
64928ee5 5979/* Returns true if the expression X is loaded or clobbered on or after INSN
5980 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
5981 or after the insn. X_REGS is list of registers mentioned in X. If the store
5982 is killed, return the last insn in that it occurs in FAIL_INSN. */
8e802be9 5983
64928ee5 5984static bool
952f0048 5985store_killed_after (rtx x, rtx x_regs, rtx insn, basic_block bb,
5986 int *regs_set_after, rtx *fail_insn)
8e802be9 5987{
5496dbfc 5988 rtx last = BB_END (bb), act;
7a676a9f 5989
64928ee5 5990 if (!store_ops_ok (x_regs, regs_set_after))
952f0048 5991 {
64928ee5 5992 /* We do not know where it will happen. */
5993 if (fail_insn)
5994 *fail_insn = NULL_RTX;
5995 return true;
5996 }
8e802be9 5997
64928ee5 5998 /* Scan from the end, so that fail_insn is determined correctly. */
5999 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
1d7429d8 6000 if (store_killed_in_insn (x, x_regs, act, false))
64928ee5 6001 {
6002 if (fail_insn)
6003 *fail_insn = act;
6004 return true;
6005 }
3cfec666 6006
64928ee5 6007 return false;
8e802be9 6008}
952f0048 6009
64928ee5 6010/* Returns true if the expression X is loaded or clobbered on or before INSN
6011 within basic block BB. X_REGS is list of registers mentioned in X.
6012 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
6013static bool
952f0048 6014store_killed_before (rtx x, rtx x_regs, rtx insn, basic_block bb,
6015 int *regs_set_before)
8e802be9 6016{
5496dbfc 6017 rtx first = BB_HEAD (bb);
8e802be9 6018
64928ee5 6019 if (!store_ops_ok (x_regs, regs_set_before))
6020 return true;
8e802be9 6021
64928ee5 6022 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
1d7429d8 6023 if (store_killed_in_insn (x, x_regs, insn, true))
64928ee5 6024 return true;
3cfec666 6025
64928ee5 6026 return false;
8e802be9 6027}
952f0048 6028
64928ee5 6029/* Fill in available, anticipatable, transparent and kill vectors in
6030 STORE_DATA, based on lists of available and anticipatable stores. */
8e802be9 6031static void
952f0048 6032build_store_vectors (void)
8e802be9 6033{
64928ee5 6034 basic_block bb;
6035 int *regs_set_in_block;
8e802be9 6036 rtx insn, st;
6037 struct ls_expr * ptr;
64928ee5 6038 unsigned regno;
8e802be9 6039
6040 /* Build the gen_vector. This is any store in the table which is not killed
6041 by aliasing later in its block. */
f0af5a88 6042 ae_gen = sbitmap_vector_alloc (last_basic_block, num_stores);
f20183e6 6043 sbitmap_vector_zero (ae_gen, last_basic_block);
8e802be9 6044
f0af5a88 6045 st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores);
f20183e6 6046 sbitmap_vector_zero (st_antloc, last_basic_block);
7a676a9f 6047
8e802be9 6048 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
3cfec666 6049 {
64928ee5 6050 for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
8e802be9 6051 {
6052 insn = XEXP (st, 0);
8d4a53c7 6053 bb = BLOCK_FOR_INSN (insn);
3cfec666 6054
64928ee5 6055 /* If we've already seen an available expression in this block,
6056 we can delete this one (It occurs earlier in the block). We'll
6057 copy the SRC expression to an unused register in case there
6058 are any side effects. */
6059 if (TEST_BIT (ae_gen[bb->index], ptr->index))
8e802be9 6060 {
64928ee5 6061 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
3f5be5f4 6062 if (dump_file)
6063 fprintf (dump_file, "Removing redundant store:\n");
609e463e 6064 replace_store_insn (r, XEXP (st, 0), bb, ptr);
64928ee5 6065 continue;
8e802be9 6066 }
64928ee5 6067 SET_BIT (ae_gen[bb->index], ptr->index);
8e802be9 6068 }
3cfec666 6069
64928ee5 6070 for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
6071 {
6072 insn = XEXP (st, 0);
6073 bb = BLOCK_FOR_INSN (insn);
6074 SET_BIT (st_antloc[bb->index], ptr->index);
6075 }
8e802be9 6076 }
3cfec666 6077
f0af5a88 6078 ae_kill = sbitmap_vector_alloc (last_basic_block, num_stores);
f20183e6 6079 sbitmap_vector_zero (ae_kill, last_basic_block);
8e802be9 6080
f0af5a88 6081 transp = sbitmap_vector_alloc (last_basic_block, num_stores);
f20183e6 6082 sbitmap_vector_zero (transp, last_basic_block);
4c36ffe6 6083 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
8e802be9 6084
64928ee5 6085 FOR_EACH_BB (bb)
6086 {
6087 for (regno = 0; regno < max_gcse_regno; regno++)
6088 regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno);
6089
6090 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6091 {
5496dbfc 6092 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
64928ee5 6093 bb, regs_set_in_block, NULL))
6094 {
d01481af 6095 /* It should not be necessary to consider the expression
64928ee5 6096 killed if it is both anticipatable and available. */
6097 if (!TEST_BIT (st_antloc[bb->index], ptr->index)
6098 || !TEST_BIT (ae_gen[bb->index], ptr->index))
6099 SET_BIT (ae_kill[bb->index], ptr->index);
952f0048 6100 }
6101 else
6102 SET_BIT (transp[bb->index], ptr->index);
6103 }
64928ee5 6104 }
6105
6106 free (regs_set_in_block);
7a676a9f 6107
3f5be5f4 6108 if (dump_file)
7a676a9f 6109 {
3f5be5f4 6110 dump_sbitmap_vector (dump_file, "st_antloc", "", st_antloc, last_basic_block);
6111 dump_sbitmap_vector (dump_file, "st_kill", "", ae_kill, last_basic_block);
6112 dump_sbitmap_vector (dump_file, "Transpt", "", transp, last_basic_block);
6113 dump_sbitmap_vector (dump_file, "st_avloc", "", ae_gen, last_basic_block);
8e802be9 6114 }
6115}
6116
98667efb 6117/* Insert an instruction at the beginning of a basic block, and update
5496dbfc 6118 the BB_HEAD if needed. */
8e802be9 6119
3cfec666 6120static void
952f0048 6121insert_insn_start_bb (rtx insn, basic_block bb)
8e802be9 6122{
6123 /* Insert at start of successor block. */
5496dbfc 6124 rtx prev = PREV_INSN (BB_HEAD (bb));
6125 rtx before = BB_HEAD (bb);
8e802be9 6126 while (before != 0)
6127 {
b9f02dbb 6128 if (! LABEL_P (before)
6129 && (! NOTE_P (before)
8e802be9 6130 || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK))
6131 break;
6132 prev = before;
5496dbfc 6133 if (prev == BB_END (bb))
8e802be9 6134 break;
6135 before = NEXT_INSN (before);
6136 }
6137
0891f67c 6138 insn = emit_insn_after_noloc (insn, prev);
8e802be9 6139
3f5be5f4 6140 if (dump_file)
8e802be9 6141 {
3f5be5f4 6142 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
b3d6de89 6143 bb->index);
3f5be5f4 6144 print_inline_rtx (dump_file, insn, 6);
6145 fprintf (dump_file, "\n");
8e802be9 6146 }
6147}
6148
6149/* This routine will insert a store on an edge. EXPR is the ldst entry for
6ef828f9 6150 the memory reference, and E is the edge to insert it on. Returns nonzero
8e802be9 6151 if an edge insertion was performed. */
6152
6153static int
952f0048 6154insert_store (struct ls_expr * expr, edge e)
8e802be9 6155{
6156 rtx reg, insn;
8d4a53c7 6157 basic_block bb;
8e802be9 6158 edge tmp;
cd665a06 6159 edge_iterator ei;
8e802be9 6160
6161 /* We did all the deleted before this insert, so if we didn't delete a
6162 store, then we haven't set the reaching reg yet either. */
6163 if (expr->reaching_reg == NULL_RTX)
6164 return 0;
6165
6f94b017 6166 if (e->flags & EDGE_FAKE)
6167 return 0;
6168
8e802be9 6169 reg = expr->reaching_reg;
64928ee5 6170 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
3cfec666 6171
8e802be9 6172 /* If we are inserting this expression on ALL predecessor edges of a BB,
6173 insert it at the start of the BB, and reset the insert bits on the other
424da949 6174 edges so we don't try to insert it on the other edges. */
8d4a53c7 6175 bb = e->dest;
cd665a06 6176 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
e119a918 6177 if (!(tmp->flags & EDGE_FAKE))
6f94b017 6178 {
6179 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
0d59b19d 6180
6181 gcc_assert (index != EDGE_INDEX_NO_EDGE);
6f94b017 6182 if (! TEST_BIT (pre_insert_map[index], expr->index))
6183 break;
6184 }
8e802be9 6185
6186 /* If tmp is NULL, we found an insertion on every edge, blank the
6187 insertion vector for these edges, and insert at the start of the BB. */
8d4a53c7 6188 if (!tmp && bb != EXIT_BLOCK_PTR)
8e802be9 6189 {
cd665a06 6190 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
8e802be9 6191 {
6192 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6193 RESET_BIT (pre_insert_map[index], expr->index);
6194 }
6195 insert_insn_start_bb (insn, bb);
6196 return 0;
6197 }
3cfec666 6198
164aece4 6199 /* We can't put stores in the front of blocks pointed to by abnormal
6200 edges since that may put a store where one didn't used to be. */
6201 gcc_assert (!(e->flags & EDGE_ABNORMAL));
8e802be9 6202
6203 insert_insn_on_edge (insn, e);
3cfec666 6204
3f5be5f4 6205 if (dump_file)
8e802be9 6206 {
3f5be5f4 6207 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
b3d6de89 6208 e->src->index, e->dest->index);
3f5be5f4 6209 print_inline_rtx (dump_file, insn, 6);
6210 fprintf (dump_file, "\n");
8e802be9 6211 }
3cfec666 6212
8e802be9 6213 return 1;
6214}
6215
609e463e 6216/* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
6217 memory location in SMEXPR set in basic block BB.
6218
6219 This could be rather expensive. */
6220
6221static void
6222remove_reachable_equiv_notes (basic_block bb, struct ls_expr *smexpr)
6223{
cd665a06 6224 edge_iterator *stack, ei;
6225 int sp;
6226 edge act;
609e463e 6227 sbitmap visited = sbitmap_alloc (last_basic_block);
609e463e 6228 rtx last, insn, note;
6229 rtx mem = smexpr->pattern;
6230
4c36ffe6 6231 stack = XNEWVEC (edge_iterator, n_basic_blocks);
cd665a06 6232 sp = 0;
6233 ei = ei_start (bb->succs);
6234
609e463e 6235 sbitmap_zero (visited);
609e463e 6236
56ff961b 6237 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
609e463e 6238 while (1)
6239 {
6240 if (!act)
6241 {
cd665a06 6242 if (!sp)
609e463e 6243 {
6244 free (stack);
6245 sbitmap_free (visited);
6246 return;
6247 }
cd665a06 6248 act = ei_edge (stack[--sp]);
609e463e 6249 }
6250 bb = act->dest;
b9f02dbb 6251
609e463e 6252 if (bb == EXIT_BLOCK_PTR
5024a4f8 6253 || TEST_BIT (visited, bb->index))
609e463e 6254 {
cd665a06 6255 if (!ei_end_p (ei))
6256 ei_next (&ei);
6257 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
609e463e 6258 continue;
6259 }
6260 SET_BIT (visited, bb->index);
6261
6262 if (TEST_BIT (st_antloc[bb->index], smexpr->index))
6263 {
6264 for (last = ANTIC_STORE_LIST (smexpr);
6265 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
6266 last = XEXP (last, 1))
6267 continue;
6268 last = XEXP (last, 0);
6269 }
6270 else
5496dbfc 6271 last = NEXT_INSN (BB_END (bb));
b9f02dbb 6272
5496dbfc 6273 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
609e463e 6274 if (INSN_P (insn))
6275 {
6276 note = find_reg_equal_equiv_note (insn);
6277 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6278 continue;
6279
3f5be5f4 6280 if (dump_file)
6281 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
609e463e 6282 INSN_UID (insn));
6283 remove_note (insn, note);
6284 }
cd665a06 6285
6286 if (!ei_end_p (ei))
6287 ei_next (&ei);
6288 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
6289
6290 if (EDGE_COUNT (bb->succs) > 0)
609e463e 6291 {
6292 if (act)
cd665a06 6293 stack[sp++] = ei;
6294 ei = ei_start (bb->succs);
56ff961b 6295 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
609e463e 6296 }
6297 }
6298}
6299
8e802be9 6300/* This routine will replace a store with a SET to a specified register. */
6301
6302static void
609e463e 6303replace_store_insn (rtx reg, rtx del, basic_block bb, struct ls_expr *smexpr)
8e802be9 6304{
04dc1cf6 6305 rtx insn, mem, note, set, ptr, pair;
3cfec666 6306
609e463e 6307 mem = smexpr->pattern;
418d931f 6308 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
8e802be9 6309 insn = emit_insn_after (insn, del);
3cfec666 6310
3f5be5f4 6311 if (dump_file)
8e802be9 6312 {
3f5be5f4 6313 fprintf (dump_file,
b3d6de89 6314 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
3f5be5f4 6315 print_inline_rtx (dump_file, del, 6);
6316 fprintf (dump_file, "\nSTORE MOTION replaced with insn:\n ");
6317 print_inline_rtx (dump_file, insn, 6);
6318 fprintf (dump_file, "\n");
8e802be9 6319 }
3cfec666 6320
609e463e 6321 for (ptr = ANTIC_STORE_LIST (smexpr); ptr; ptr = XEXP (ptr, 1))
6322 if (XEXP (ptr, 0) == del)
6323 {
6324 XEXP (ptr, 0) = insn;
6325 break;
6326 }
04dc1cf6 6327
6328 /* Move the notes from the deleted insn to its replacement, and patch
6329 up the LIBCALL notes. */
6330 REG_NOTES (insn) = REG_NOTES (del);
6331
6332 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
6333 if (note)
6334 {
6335 pair = XEXP (note, 0);
6336 note = find_reg_note (pair, REG_LIBCALL, NULL_RTX);
6337 XEXP (note, 0) = insn;
6338 }
6339 note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
6340 if (note)
6341 {
6342 pair = XEXP (note, 0);
6343 note = find_reg_note (pair, REG_RETVAL, NULL_RTX);
6344 XEXP (note, 0) = insn;
6345 }
6346
06786d0d 6347 delete_insn (del);
609e463e 6348
6349 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
6350 they are no longer accurate provided that they are reached by this
6351 definition, so drop them. */
5496dbfc 6352 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
609e463e 6353 if (INSN_P (insn))
6354 {
6355 set = single_set (insn);
6356 if (!set)
6357 continue;
6358 if (expr_equiv_p (SET_DEST (set), mem))
6359 return;
6360 note = find_reg_equal_equiv_note (insn);
6361 if (!note || !expr_equiv_p (XEXP (note, 0), mem))
6362 continue;
6363
3f5be5f4 6364 if (dump_file)
6365 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
609e463e 6366 INSN_UID (insn));
6367 remove_note (insn, note);
6368 }
6369 remove_reachable_equiv_notes (bb, smexpr);
8e802be9 6370}
6371
6372
6373/* Delete a store, but copy the value that would have been stored into
6374 the reaching_reg for later storing. */
6375
6376static void
952f0048 6377delete_store (struct ls_expr * expr, basic_block bb)
8e802be9 6378{
6379 rtx reg, i, del;
6380
6381 if (expr->reaching_reg == NULL_RTX)
6382 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
8e802be9 6383
8e802be9 6384 reg = expr->reaching_reg;
3cfec666 6385
8e802be9 6386 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
6387 {
6388 del = XEXP (i, 0);
8d4a53c7 6389 if (BLOCK_FOR_INSN (del) == bb)
8e802be9 6390 {
3cfec666 6391 /* We know there is only one since we deleted redundant
8e802be9 6392 ones during the available computation. */
609e463e 6393 replace_store_insn (reg, del, bb, expr);
8e802be9 6394 break;
6395 }
6396 }
6397}
6398
6399/* Free memory used by store motion. */
6400
3cfec666 6401static void
952f0048 6402free_store_memory (void)
8e802be9 6403{
6404 free_ldst_mems ();
3cfec666 6405
8e802be9 6406 if (ae_gen)
cca23eb2 6407 sbitmap_vector_free (ae_gen);
8e802be9 6408 if (ae_kill)
cca23eb2 6409 sbitmap_vector_free (ae_kill);
8e802be9 6410 if (transp)
cca23eb2 6411 sbitmap_vector_free (transp);
8e802be9 6412 if (st_antloc)
cca23eb2 6413 sbitmap_vector_free (st_antloc);
8e802be9 6414 if (pre_insert_map)
cca23eb2 6415 sbitmap_vector_free (pre_insert_map);
8e802be9 6416 if (pre_delete_map)
cca23eb2 6417 sbitmap_vector_free (pre_delete_map);
7a676a9f 6418 if (reg_set_in_block)
6419 sbitmap_vector_free (reg_set_in_block);
3cfec666 6420
8e802be9 6421 ae_gen = ae_kill = transp = st_antloc = NULL;
6422 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
6423}
6424
6425/* Perform store motion. Much like gcse, except we move expressions the
6426 other way by looking at the flowgraph in reverse. */
6427
6428static void
952f0048 6429store_motion (void)
8e802be9 6430{
4c26117a 6431 basic_block bb;
b3d6de89 6432 int x;
8e802be9 6433 struct ls_expr * ptr;
42334a67 6434 int update_flow = 0;
7a676a9f 6435
3f5be5f4 6436 if (dump_file)
8e802be9 6437 {
3f5be5f4 6438 fprintf (dump_file, "before store motion\n");
6439 print_rtl (dump_file, get_insns ());
8e802be9 6440 }
6441
8e802be9 6442 init_alias_analysis ();
7a676a9f 6443
64928ee5 6444 /* Find all the available and anticipatable stores. */
8e802be9 6445 num_stores = compute_store_table ();
6446 if (num_stores == 0)
6447 {
0d707271 6448 htab_delete (pre_ldst_table);
6449 pre_ldst_table = NULL;
7a676a9f 6450 sbitmap_vector_free (reg_set_in_block);
8e802be9 6451 end_alias_analysis ();
6452 return;
6453 }
6454
64928ee5 6455 /* Now compute kill & transp vectors. */
8e802be9 6456 build_store_vectors ();
64928ee5 6457 add_noreturn_fake_exit_edges ();
d66d83e5 6458 connect_infinite_loops_to_exit ();
8e802be9 6459
3f5be5f4 6460 edge_list = pre_edge_rev_lcm (num_stores, transp, ae_gen,
3cfec666 6461 st_antloc, ae_kill, &pre_insert_map,
8e802be9 6462 &pre_delete_map);
6463
6464 /* Now we want to insert the new stores which are going to be needed. */
6465 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6466 {
164aece4 6467 /* If any of the edges we have above are abnormal, we can't move this
6468 store. */
6469 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
6470 if (TEST_BIT (pre_insert_map[x], ptr->index)
6471 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
6472 break;
6473
6474 if (x >= 0)
6475 {
3f5be5f4 6476 if (dump_file != NULL)
6477 fprintf (dump_file,
164aece4 6478 "Can't replace store %d: abnormal edge from %d to %d\n",
6479 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
6480 INDEX_EDGE (edge_list, x)->dest->index);
6481 continue;
6482 }
6483
6484 /* Now we want to insert the new stores which are going to be needed. */
6485
4c26117a 6486 FOR_EACH_BB (bb)
6487 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
6488 delete_store (ptr, bb);
8e802be9 6489
b3d6de89 6490 for (x = 0; x < NUM_EDGES (edge_list); x++)
6491 if (TEST_BIT (pre_insert_map[x], ptr->index))
6492 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
8e802be9 6493 }
6494
6495 if (update_flow)
6496 commit_edge_insertions ();
7a676a9f 6497
8e802be9 6498 free_store_memory ();
6499 free_edge_list (edge_list);
41d24834 6500 remove_fake_exit_edges ();
8e802be9 6501 end_alias_analysis ();
6502}
1f3233d1 6503
e736d585 6504\f
6505/* Entry point for jump bypassing optimization pass. */
6506
f9567f01 6507static int
3f5be5f4 6508bypass_jumps (void)
e736d585 6509{
6510 int changed;
6511
6512 /* We do not construct an accurate cfg in functions which call
6513 setjmp, so just punt to be safe. */
6514 if (current_function_calls_setjmp)
6515 return 0;
6516
e736d585 6517 /* Identify the basic block information for this function, including
6518 successors and predecessors. */
6519 max_gcse_regno = max_reg_num ();
6520
3f5be5f4 6521 if (dump_file)
6522 dump_flow_info (dump_file);
e736d585 6523
8b332087 6524 /* Return if there's nothing to do, or it is too expensive. */
4e9a0141 6525 if (n_basic_blocks <= NUM_FIXED_BLOCKS + 1
6526 || is_too_expensive (_ ("jump bypassing disabled")))
e736d585 6527 return 0;
6528
e736d585 6529 gcc_obstack_init (&gcse_obstack);
6530 bytes_used = 0;
6531
6532 /* We need alias. */
6533 init_alias_analysis ();
6534
6535 /* Record where pseudo-registers are set. This data is kept accurate
6536 during each pass. ??? We could also record hard-reg information here
6537 [since it's unchanging], however it is currently done during hash table
6538 computation.
6539
6540 It may be tempting to compute MEM set information here too, but MEM sets
6541 will be subject to code motion one day and thus we need to compute
6542 information about memory sets when we build the hash tables. */
6543
6544 alloc_reg_set_mem (max_gcse_regno);
defc8016 6545 compute_sets ();
e736d585 6546
6547 max_gcse_regno = max_reg_num ();
defc8016 6548 alloc_gcse_mem ();
6549 changed = one_cprop_pass (MAX_GCSE_PASSES + 2, true, true);
e736d585 6550 free_gcse_mem ();
6551
3f5be5f4 6552 if (dump_file)
e736d585 6553 {
3f5be5f4 6554 fprintf (dump_file, "BYPASS of %s: %d basic blocks, ",
35901471 6555 current_function_name (), n_basic_blocks);
3f5be5f4 6556 fprintf (dump_file, "%d bytes\n\n", bytes_used);
e736d585 6557 }
6558
6559 obstack_free (&gcse_obstack, NULL);
6560 free_reg_set_mem ();
6561
6562 /* We are finished with alias. */
6563 end_alias_analysis ();
6564 allocate_reg_info (max_reg_num (), FALSE, FALSE);
6565
6566 return changed;
6567}
6568
c8a8ab0f 6569/* Return true if the graph is too expensive to optimize. PASS is the
6570 optimization about to be performed. */
6571
6572static bool
6573is_too_expensive (const char *pass)
6574{
6575 /* Trying to perform global optimizations on flow graphs which have
6576 a high connectivity will take a long time and is unlikely to be
6577 particularly useful.
b9f02dbb 6578
c8a8ab0f 6579 In normal circumstances a cfg should have about twice as many
6580 edges as blocks. But we do not want to punish small functions
6581 which have a couple switch statements. Rather than simply
6582 threshold the number of blocks, uses something with a more
6583 graceful degradation. */
6584 if (n_edges > 20000 + n_basic_blocks * 4)
6585 {
8b6866af 6586 warning (OPT_Wdisabled_optimization,
6587 "%s: %d basic blocks and %d edges/basic block",
6588 pass, n_basic_blocks, n_edges / n_basic_blocks);
b9f02dbb 6589
c8a8ab0f 6590 return true;
6591 }
6592
6593 /* If allocating memory for the cprop bitmap would take up too much
6594 storage it's better just to disable the optimization. */
6595 if ((n_basic_blocks
6596 * SBITMAP_SET_SIZE (max_reg_num ())
6597 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
6598 {
8b6866af 6599 warning (OPT_Wdisabled_optimization,
6600 "%s: %d basic blocks and %d registers",
6601 pass, n_basic_blocks, max_reg_num ());
c8a8ab0f 6602
6603 return true;
6604 }
6605
6606 return false;
6607}
77fce4cd 6608\f
6609static bool
6610gate_handle_jump_bypass (void)
6611{
6612 return optimize > 0 && flag_gcse;
6613}
6614
6615/* Perform jump bypassing and control flow optimizations. */
6616static void
6617rest_of_handle_jump_bypass (void)
6618{
6619 cleanup_cfg (CLEANUP_EXPENSIVE);
6620 reg_scan (get_insns (), max_reg_num ());
6621
3f5be5f4 6622 if (bypass_jumps ())
77fce4cd 6623 {
6624 rebuild_jump_labels (get_insns ());
6625 cleanup_cfg (CLEANUP_EXPENSIVE);
6626 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6627 }
6628}
6629
6630struct tree_opt_pass pass_jump_bypass =
6631{
6632 "bypass", /* name */
6633 gate_handle_jump_bypass, /* gate */
6634 rest_of_handle_jump_bypass, /* execute */
6635 NULL, /* sub */
6636 NULL, /* next */
6637 0, /* static_pass_number */
6638 TV_BYPASS, /* tv_id */
6639 0, /* properties_required */
6640 0, /* properties_provided */
6641 0, /* properties_destroyed */
6642 0, /* todo_flags_start */
6643 TODO_dump_func |
6644 TODO_ggc_collect | TODO_verify_flow, /* todo_flags_finish */
6645 'G' /* letter */
6646};
6647
6648
6649static bool
6650gate_handle_gcse (void)
6651{
6652 return optimize > 0 && flag_gcse;
6653}
6654
6655
6656static void
6657rest_of_handle_gcse (void)
6658{
6659 int save_csb, save_cfj;
6660 int tem2 = 0, tem;
6661
3f5be5f4 6662 tem = gcse_main (get_insns ());
77fce4cd 6663 rebuild_jump_labels (get_insns ());
6664 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6665
6666 save_csb = flag_cse_skip_blocks;
6667 save_cfj = flag_cse_follow_jumps;
6668 flag_cse_skip_blocks = flag_cse_follow_jumps = 0;
6669
6670 /* If -fexpensive-optimizations, re-run CSE to clean up things done
6671 by gcse. */
6672 if (flag_expensive_optimizations)
6673 {
6674 timevar_push (TV_CSE);
6675 reg_scan (get_insns (), max_reg_num ());
3f5be5f4 6676 tem2 = cse_main (get_insns (), max_reg_num ());
77fce4cd 6677 purge_all_dead_edges ();
6678 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6679 timevar_pop (TV_CSE);
6680 cse_not_expected = !flag_rerun_cse_after_loop;
6681 }
6682
6683 /* If gcse or cse altered any jumps, rerun jump optimizations to clean
6684 things up. */
6685 if (tem || tem2)
6686 {
6687 timevar_push (TV_JUMP);
6688 rebuild_jump_labels (get_insns ());
6689 delete_dead_jumptables ();
6690 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_PRE_LOOP);
6691 timevar_pop (TV_JUMP);
6692 }
6693
6694 flag_cse_skip_blocks = save_csb;
6695 flag_cse_follow_jumps = save_cfj;
6696}
6697
6698struct tree_opt_pass pass_gcse =
6699{
6700 "gcse1", /* name */
6701 gate_handle_gcse, /* gate */
6702 rest_of_handle_gcse, /* execute */
6703 NULL, /* sub */
6704 NULL, /* next */
6705 0, /* static_pass_number */
6706 TV_GCSE, /* tv_id */
6707 0, /* properties_required */
6708 0, /* properties_provided */
6709 0, /* properties_destroyed */
6710 0, /* todo_flags_start */
6711 TODO_dump_func |
6712 TODO_verify_flow | TODO_ggc_collect, /* todo_flags_finish */
6713 'G' /* letter */
6714};
6715
c8a8ab0f 6716
1f3233d1 6717#include "gt-gcse.h"