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f4e584dc 1/* Global common subexpression elimination/Partial redundancy elimination
7506f491 2 and global constant/copy propagation for GNU compiler.
a0134312 3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003
8e42ace1 4 Free Software Foundation, Inc.
7506f491 5
1322177d 6This file is part of GCC.
7506f491 7
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8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
7506f491 12
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13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
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17
18You should have received a copy of the GNU General Public License
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19along with GCC; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2102111-1307, USA. */
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22
23/* TODO
24 - reordering of memory allocation and freeing to be more space efficient
25 - do rough calc of how many regs are needed in each block, and a rough
26 calc of how many regs are available in each class and use that to
27 throttle back the code in cases where RTX_COST is minimal.
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28 - a store to the same address as a load does not kill the load if the
29 source of the store is also the destination of the load. Handling this
30 allows more load motion, particularly out of loops.
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31 - ability to realloc sbitmap vectors would allow one initial computation
32 of reg_set_in_block with only subsequent additions, rather than
33 recomputing it for each pass
34
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35*/
36
37/* References searched while implementing this.
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38
39 Compilers Principles, Techniques and Tools
40 Aho, Sethi, Ullman
41 Addison-Wesley, 1988
42
43 Global Optimization by Suppression of Partial Redundancies
44 E. Morel, C. Renvoise
45 communications of the acm, Vol. 22, Num. 2, Feb. 1979
46
47 A Portable Machine-Independent Global Optimizer - Design and Measurements
48 Frederick Chow
49 Stanford Ph.D. thesis, Dec. 1983
50
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51 A Fast Algorithm for Code Movement Optimization
52 D.M. Dhamdhere
53 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
54
55 A Solution to a Problem with Morel and Renvoise's
56 Global Optimization by Suppression of Partial Redundancies
57 K-H Drechsler, M.P. Stadel
58 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
59
60 Practical Adaptation of the Global Optimization
61 Algorithm of Morel and Renvoise
62 D.M. Dhamdhere
63 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
64
65 Efficiently Computing Static Single Assignment Form and the Control
66 Dependence Graph
67 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
68 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
69
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70 Lazy Code Motion
71 J. Knoop, O. Ruthing, B. Steffen
72 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
73
74 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
75 Time for Reducible Flow Control
76 Thomas Ball
77 ACM Letters on Programming Languages and Systems,
78 Vol. 2, Num. 1-4, Mar-Dec 1993
79
80 An Efficient Representation for Sparse Sets
81 Preston Briggs, Linda Torczon
82 ACM Letters on Programming Languages and Systems,
83 Vol. 2, Num. 1-4, Mar-Dec 1993
84
85 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
86 K-H Drechsler, M.P. Stadel
87 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
88
89 Partial Dead Code Elimination
90 J. Knoop, O. Ruthing, B. Steffen
91 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
92
93 Effective Partial Redundancy Elimination
94 P. Briggs, K.D. Cooper
95 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
96
97 The Program Structure Tree: Computing Control Regions in Linear Time
98 R. Johnson, D. Pearson, K. Pingali
99 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
100
101 Optimal Code Motion: Theory and Practice
102 J. Knoop, O. Ruthing, B. Steffen
103 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
104
105 The power of assignment motion
106 J. Knoop, O. Ruthing, B. Steffen
107 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
108
109 Global code motion / global value numbering
110 C. Click
111 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
112
113 Value Driven Redundancy Elimination
114 L.T. Simpson
115 Rice University Ph.D. thesis, Apr. 1996
116
117 Value Numbering
118 L.T. Simpson
119 Massively Scalar Compiler Project, Rice University, Sep. 1996
120
121 High Performance Compilers for Parallel Computing
122 Michael Wolfe
123 Addison-Wesley, 1996
124
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125 Advanced Compiler Design and Implementation
126 Steven Muchnick
127 Morgan Kaufmann, 1997
128
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129 Building an Optimizing Compiler
130 Robert Morgan
131 Digital Press, 1998
132
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133 People wishing to speed up the code here should read:
134 Elimination Algorithms for Data Flow Analysis
135 B.G. Ryder, M.C. Paull
136 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
137
138 How to Analyze Large Programs Efficiently and Informatively
139 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
140 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
141
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142 People wishing to do something different can find various possibilities
143 in the above papers and elsewhere.
144*/
145
146#include "config.h"
50b2596f 147#include "system.h"
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148#include "coretypes.h"
149#include "tm.h"
01198c2f 150#include "toplev.h"
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151
152#include "rtl.h"
6baf1cc8 153#include "tm_p.h"
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154#include "regs.h"
155#include "hard-reg-set.h"
156#include "flags.h"
157#include "real.h"
158#include "insn-config.h"
159#include "recog.h"
160#include "basic-block.h"
50b2596f 161#include "output.h"
49ad7cfa 162#include "function.h"
589005ff 163#include "expr.h"
e7d482b9 164#include "except.h"
fb0c0a12 165#include "ggc.h"
f1fa37ff 166#include "params.h"
ae860ff7 167#include "cselib.h"
aaa4ca30 168
7506f491 169#include "obstack.h"
4fa31c2a 170
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171/* Propagate flow information through back edges and thus enable PRE's
172 moving loop invariant calculations out of loops.
173
174 Originally this tended to create worse overall code, but several
175 improvements during the development of PRE seem to have made following
176 back edges generally a win.
177
178 Note much of the loop invariant code motion done here would normally
179 be done by loop.c, which has more heuristics for when to move invariants
180 out of loops. At some point we might need to move some of those
181 heuristics into gcse.c. */
7506f491 182
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183/* We support GCSE via Partial Redundancy Elimination. PRE optimizations
184 are a superset of those done by GCSE.
7506f491 185
f4e584dc 186 We perform the following steps:
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187
188 1) Compute basic block information.
189
190 2) Compute table of places where registers are set.
191
192 3) Perform copy/constant propagation.
193
194 4) Perform global cse.
195
e78d9500 196 5) Perform another pass of copy/constant propagation.
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197
198 Two passes of copy/constant propagation are done because the first one
199 enables more GCSE and the second one helps to clean up the copies that
200 GCSE creates. This is needed more for PRE than for Classic because Classic
201 GCSE will try to use an existing register containing the common
202 subexpression rather than create a new one. This is harder to do for PRE
203 because of the code motion (which Classic GCSE doesn't do).
204
205 Expressions we are interested in GCSE-ing are of the form
206 (set (pseudo-reg) (expression)).
207 Function want_to_gcse_p says what these are.
208
209 PRE handles moving invariant expressions out of loops (by treating them as
f4e584dc 210 partially redundant).
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211
212 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
213 assignment) based GVN (global value numbering). L. T. Simpson's paper
214 (Rice University) on value numbering is a useful reference for this.
215
216 **********************
217
218 We used to support multiple passes but there are diminishing returns in
219 doing so. The first pass usually makes 90% of the changes that are doable.
220 A second pass can make a few more changes made possible by the first pass.
221 Experiments show any further passes don't make enough changes to justify
222 the expense.
223
224 A study of spec92 using an unlimited number of passes:
225 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
226 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
227 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
228
229 It was found doing copy propagation between each pass enables further
230 substitutions.
231
232 PRE is quite expensive in complicated functions because the DFA can take
740f35a0 233 awhile to converge. Hence we only perform one pass. The parameter max-gcse-passes can
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234 be modified if one wants to experiment.
235
236 **********************
237
238 The steps for PRE are:
239
240 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
241
242 2) Perform the data flow analysis for PRE.
243
244 3) Delete the redundant instructions
245
246 4) Insert the required copies [if any] that make the partially
247 redundant instructions fully redundant.
248
249 5) For other reaching expressions, insert an instruction to copy the value
250 to a newly created pseudo that will reach the redundant instruction.
251
252 The deletion is done first so that when we do insertions we
253 know which pseudo reg to use.
254
255 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
256 argue it is not. The number of iterations for the algorithm to converge
257 is typically 2-4 so I don't view it as that expensive (relatively speaking).
258
f4e584dc 259 PRE GCSE depends heavily on the second CSE pass to clean up the copies
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260 we create. To make an expression reach the place where it's redundant,
261 the result of the expression is copied to a new register, and the redundant
262 expression is deleted by replacing it with this new register. Classic GCSE
263 doesn't have this problem as much as it computes the reaching defs of
264 each register in each block and thus can try to use an existing register.
265
266 **********************
267
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268 A fair bit of simplicity is created by creating small functions for simple
269 tasks, even when the function is only called in one place. This may
270 measurably slow things down [or may not] by creating more function call
271 overhead than is necessary. The source is laid out so that it's trivial
272 to make the affected functions inline so that one can measure what speed
273 up, if any, can be achieved, and maybe later when things settle things can
274 be rearranged.
275
276 Help stamp out big monolithic functions! */
277\f
278/* GCSE global vars. */
279
280/* -dG dump file. */
281static FILE *gcse_file;
282
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283/* Note whether or not we should run jump optimization after gcse. We
284 want to do this for two cases.
285
286 * If we changed any jumps via cprop.
287
288 * If we added any labels via edge splitting. */
289
290static int run_jump_opt_after_gcse;
291
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292/* Bitmaps are normally not included in debugging dumps.
293 However it's useful to be able to print them from GDB.
294 We could create special functions for this, but it's simpler to
295 just allow passing stderr to the dump_foo fns. Since stderr can
296 be a macro, we store a copy here. */
297static FILE *debug_stderr;
298
299/* An obstack for our working variables. */
300static struct obstack gcse_obstack;
301
cc2902df 302/* Nonzero for each mode that supports (set (reg) (reg)).
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303 This is trivially true for integer and floating point values.
304 It may or may not be true for condition codes. */
305static char can_copy_p[(int) NUM_MACHINE_MODES];
306
cc2902df 307/* Nonzero if can_copy_p has been initialized. */
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308static int can_copy_init_p;
309
c4c81601 310struct reg_use {rtx reg_rtx; };
abd535b6 311
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312/* Hash table of expressions. */
313
314struct expr
315{
316 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
317 rtx expr;
318 /* Index in the available expression bitmaps. */
319 int bitmap_index;
320 /* Next entry with the same hash. */
321 struct expr *next_same_hash;
322 /* List of anticipatable occurrences in basic blocks in the function.
323 An "anticipatable occurrence" is one that is the first occurrence in the
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324 basic block, the operands are not modified in the basic block prior
325 to the occurrence and the output is not used between the start of
326 the block and the occurrence. */
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327 struct occr *antic_occr;
328 /* List of available occurrence in basic blocks in the function.
329 An "available occurrence" is one that is the last occurrence in the
330 basic block and the operands are not modified by following statements in
331 the basic block [including this insn]. */
332 struct occr *avail_occr;
333 /* Non-null if the computation is PRE redundant.
334 The value is the newly created pseudo-reg to record a copy of the
335 expression in all the places that reach the redundant copy. */
336 rtx reaching_reg;
337};
338
339/* Occurrence of an expression.
340 There is one per basic block. If a pattern appears more than once the
341 last appearance is used [or first for anticipatable expressions]. */
342
343struct occr
344{
345 /* Next occurrence of this expression. */
346 struct occr *next;
347 /* The insn that computes the expression. */
348 rtx insn;
cc2902df 349 /* Nonzero if this [anticipatable] occurrence has been deleted. */
7506f491 350 char deleted_p;
cc2902df 351 /* Nonzero if this [available] occurrence has been copied to
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352 reaching_reg. */
353 /* ??? This is mutually exclusive with deleted_p, so they could share
354 the same byte. */
355 char copied_p;
356};
357
358/* Expression and copy propagation hash tables.
359 Each hash table is an array of buckets.
360 ??? It is known that if it were an array of entries, structure elements
361 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
362 not clear whether in the final analysis a sufficient amount of memory would
363 be saved as the size of the available expression bitmaps would be larger
364 [one could build a mapping table without holes afterwards though].
c4c81601 365 Someday I'll perform the computation and figure it out. */
7506f491 366
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367struct hash_table
368{
369 /* The table itself.
370 This is an array of `expr_hash_table_size' elements. */
371 struct expr **table;
372
373 /* Size of the hash table, in elements. */
374 unsigned int size;
2e653e39 375
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376 /* Number of hash table elements. */
377 unsigned int n_elems;
7506f491 378
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379 /* Whether the table is expression of copy propagation one. */
380 int set_p;
381};
c4c81601 382
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383/* Expression hash table. */
384static struct hash_table expr_hash_table;
385
386/* Copy propagation hash table. */
387static struct hash_table set_hash_table;
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388
389/* Mapping of uids to cuids.
390 Only real insns get cuids. */
391static int *uid_cuid;
392
393/* Highest UID in UID_CUID. */
394static int max_uid;
395
396/* Get the cuid of an insn. */
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397#ifdef ENABLE_CHECKING
398#define INSN_CUID(INSN) (INSN_UID (INSN) > max_uid ? (abort (), 0) : uid_cuid[INSN_UID (INSN)])
399#else
7506f491 400#define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
b86db3eb 401#endif
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402
403/* Number of cuids. */
404static int max_cuid;
405
406/* Mapping of cuids to insns. */
407static rtx *cuid_insn;
408
409/* Get insn from cuid. */
410#define CUID_INSN(CUID) (cuid_insn[CUID])
411
412/* Maximum register number in function prior to doing gcse + 1.
413 Registers created during this pass have regno >= max_gcse_regno.
414 This is named with "gcse" to not collide with global of same name. */
770ae6cc 415static unsigned int max_gcse_regno;
7506f491 416
7506f491 417/* Table of registers that are modified.
c4c81601 418
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419 For each register, each element is a list of places where the pseudo-reg
420 is set.
421
422 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
423 requires knowledge of which blocks kill which regs [and thus could use
f4e584dc 424 a bitmap instead of the lists `reg_set_table' uses].
7506f491 425
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426 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
427 num-regs) [however perhaps it may be useful to keep the data as is]. One
428 advantage of recording things this way is that `reg_set_table' is fairly
429 sparse with respect to pseudo regs but for hard regs could be fairly dense
430 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
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431 up functions like compute_transp since in the case of pseudo-regs we only
432 need to iterate over the number of times a pseudo-reg is set, not over the
433 number of basic blocks [clearly there is a bit of a slow down in the cases
434 where a pseudo is set more than once in a block, however it is believed
435 that the net effect is to speed things up]. This isn't done for hard-regs
436 because recording call-clobbered hard-regs in `reg_set_table' at each
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437 function call can consume a fair bit of memory, and iterating over
438 hard-regs stored this way in compute_transp will be more expensive. */
7506f491 439
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440typedef struct reg_set
441{
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442 /* The next setting of this register. */
443 struct reg_set *next;
444 /* The insn where it was set. */
445 rtx insn;
446} reg_set;
c4c81601 447
7506f491 448static reg_set **reg_set_table;
c4c81601 449
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450/* Size of `reg_set_table'.
451 The table starts out at max_gcse_regno + slop, and is enlarged as
452 necessary. */
453static int reg_set_table_size;
c4c81601 454
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455/* Amount to grow `reg_set_table' by when it's full. */
456#define REG_SET_TABLE_SLOP 100
457
a13d4ebf 458/* This is a list of expressions which are MEMs and will be used by load
589005ff 459 or store motion.
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460 Load motion tracks MEMs which aren't killed by
461 anything except itself. (ie, loads and stores to a single location).
589005ff 462 We can then allow movement of these MEM refs with a little special
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463 allowance. (all stores copy the same value to the reaching reg used
464 for the loads). This means all values used to store into memory must have
589005ff 465 no side effects so we can re-issue the setter value.
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466 Store Motion uses this structure as an expression table to track stores
467 which look interesting, and might be moveable towards the exit block. */
468
469struct ls_expr
470{
471 struct expr * expr; /* Gcse expression reference for LM. */
472 rtx pattern; /* Pattern of this mem. */
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473 rtx loads; /* INSN list of loads seen. */
474 rtx stores; /* INSN list of stores seen. */
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475 struct ls_expr * next; /* Next in the list. */
476 int invalid; /* Invalid for some reason. */
477 int index; /* If it maps to a bitmap index. */
478 int hash_index; /* Index when in a hash table. */
479 rtx reaching_reg; /* Register to use when re-writing. */
480};
481
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482/* Array of implicit set patterns indexed by basic block index. */
483static rtx *implicit_sets;
484
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485/* Head of the list of load/store memory refs. */
486static struct ls_expr * pre_ldst_mems = NULL;
487
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488/* Bitmap containing one bit for each register in the program.
489 Used when performing GCSE to track which registers have been set since
490 the start of the basic block. */
73991d6a 491static regset reg_set_bitmap;
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492
493/* For each block, a bitmap of registers set in the block.
494 This is used by expr_killed_p and compute_transp.
495 It is computed during hash table computation and not by compute_sets
496 as it includes registers added since the last pass (or between cprop and
497 gcse) and it's currently not easy to realloc sbitmap vectors. */
498static sbitmap *reg_set_in_block;
499
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500/* Array, indexed by basic block number for a list of insns which modify
501 memory within that block. */
502static rtx * modify_mem_list;
73991d6a 503bitmap modify_mem_list_set;
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504
505/* This array parallels modify_mem_list, but is kept canonicalized. */
506static rtx * canon_modify_mem_list;
73991d6a 507bitmap canon_modify_mem_list_set;
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508/* Various variables for statistics gathering. */
509
510/* Memory used in a pass.
511 This isn't intended to be absolutely precise. Its intent is only
512 to keep an eye on memory usage. */
513static int bytes_used;
c4c81601 514
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515/* GCSE substitutions made. */
516static int gcse_subst_count;
517/* Number of copy instructions created. */
518static int gcse_create_count;
519/* Number of constants propagated. */
520static int const_prop_count;
521/* Number of copys propagated. */
522static int copy_prop_count;
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523\f
524/* These variables are used by classic GCSE.
525 Normally they'd be defined a bit later, but `rd_gen' needs to
526 be declared sooner. */
527
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528/* Each block has a bitmap of each type.
529 The length of each blocks bitmap is:
530
531 max_cuid - for reaching definitions
532 n_exprs - for available expressions
533
534 Thus we view the bitmaps as 2 dimensional arrays. i.e.
535 rd_kill[block_num][cuid_num]
c4c81601 536 ae_kill[block_num][expr_num] */
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537
538/* For reaching defs */
539static sbitmap *rd_kill, *rd_gen, *reaching_defs, *rd_out;
540
541/* for available exprs */
542static sbitmap *ae_kill, *ae_gen, *ae_in, *ae_out;
b5ce41ff 543
0511851c
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544/* Objects of this type are passed around by the null-pointer check
545 removal routines. */
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546struct null_pointer_info
547{
0511851c 548 /* The basic block being processed. */
e0082a72 549 basic_block current_block;
0511851c 550 /* The first register to be handled in this pass. */
770ae6cc 551 unsigned int min_reg;
0511851c 552 /* One greater than the last register to be handled in this pass. */
770ae6cc 553 unsigned int max_reg;
0511851c
MM
554 sbitmap *nonnull_local;
555 sbitmap *nonnull_killed;
556};
7506f491 557\f
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558static void compute_can_copy PARAMS ((void));
559static char *gmalloc PARAMS ((unsigned int));
560static char *grealloc PARAMS ((char *, unsigned int));
561static char *gcse_alloc PARAMS ((unsigned long));
562static void alloc_gcse_mem PARAMS ((rtx));
563static void free_gcse_mem PARAMS ((void));
564static void alloc_reg_set_mem PARAMS ((int));
565static void free_reg_set_mem PARAMS ((void));
566static int get_bitmap_width PARAMS ((int, int, int));
567static void record_one_set PARAMS ((int, rtx));
568static void record_set_info PARAMS ((rtx, rtx, void *));
569static void compute_sets PARAMS ((rtx));
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570static void hash_scan_insn PARAMS ((rtx, struct hash_table *, int));
571static void hash_scan_set PARAMS ((rtx, rtx, struct hash_table *));
572static void hash_scan_clobber PARAMS ((rtx, rtx, struct hash_table *));
573static void hash_scan_call PARAMS ((rtx, rtx, struct hash_table *));
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574static int want_to_gcse_p PARAMS ((rtx));
575static int oprs_unchanged_p PARAMS ((rtx, rtx, int));
576static int oprs_anticipatable_p PARAMS ((rtx, rtx));
577static int oprs_available_p PARAMS ((rtx, rtx));
578static void insert_expr_in_table PARAMS ((rtx, enum machine_mode, rtx,
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579 int, int, struct hash_table *));
580static void insert_set_in_table PARAMS ((rtx, rtx, struct hash_table *));
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581static unsigned int hash_expr PARAMS ((rtx, enum machine_mode, int *, int));
582static unsigned int hash_expr_1 PARAMS ((rtx, enum machine_mode, int *));
c0712acb 583static unsigned int hash_string_1 PARAMS ((const char *));
c4c81601
RK
584static unsigned int hash_set PARAMS ((int, int));
585static int expr_equiv_p PARAMS ((rtx, rtx));
586static void record_last_reg_set_info PARAMS ((rtx, int));
587static void record_last_mem_set_info PARAMS ((rtx));
588static void record_last_set_info PARAMS ((rtx, rtx, void *));
02280659
ZD
589static void compute_hash_table PARAMS ((struct hash_table *));
590static void alloc_hash_table PARAMS ((int, struct hash_table *, int));
591static void free_hash_table PARAMS ((struct hash_table *));
592static void compute_hash_table_work PARAMS ((struct hash_table *));
593static void dump_hash_table PARAMS ((FILE *, const char *,
594 struct hash_table *));
595static struct expr *lookup_expr PARAMS ((rtx, struct hash_table *));
ceda50e9 596static struct expr *lookup_set PARAMS ((unsigned int, struct hash_table *));
770ae6cc 597static struct expr *next_set PARAMS ((unsigned int, struct expr *));
c4c81601
RK
598static void reset_opr_set_tables PARAMS ((void));
599static int oprs_not_set_p PARAMS ((rtx, rtx));
600static void mark_call PARAMS ((rtx));
601static void mark_set PARAMS ((rtx, rtx));
602static void mark_clobber PARAMS ((rtx, rtx));
603static void mark_oprs_set PARAMS ((rtx));
604static void alloc_cprop_mem PARAMS ((int, int));
605static void free_cprop_mem PARAMS ((void));
606static void compute_transp PARAMS ((rtx, int, sbitmap *, int));
607static void compute_transpout PARAMS ((void));
608static void compute_local_properties PARAMS ((sbitmap *, sbitmap *, sbitmap *,
02280659 609 struct hash_table *));
711d877c 610static void compute_cprop_data PARAMS ((void));
9e71c818 611static void find_used_regs PARAMS ((rtx *, void *));
c4c81601
RK
612static int try_replace_reg PARAMS ((rtx, rtx, rtx));
613static struct expr *find_avail_set PARAMS ((int, rtx));
0e3f0221 614static int cprop_jump PARAMS ((basic_block, rtx, rtx, rtx, rtx));
a13d4ebf 615static void mems_conflict_for_gcse_p PARAMS ((rtx, rtx, void *));
e2d2ed72 616static int load_killed_in_block_p PARAMS ((basic_block, int, rtx, int));
a13d4ebf 617static void canon_list_insert PARAMS ((rtx, rtx, void *));
ae860ff7 618static int cprop_insn PARAMS ((rtx, int));
c4c81601 619static int cprop PARAMS ((int));
fbef91d8
RS
620static rtx fis_get_condition PARAMS ((rtx));
621static void find_implicit_sets PARAMS ((void));
a0134312 622static int one_cprop_pass PARAMS ((int, int, int));
ae860ff7 623static bool constprop_register PARAMS ((rtx, rtx, rtx, int));
0e3f0221
RS
624static struct expr *find_bypass_set PARAMS ((int, int));
625static int bypass_block PARAMS ((basic_block, rtx, rtx));
626static int bypass_conditional_jumps PARAMS ((void));
c4c81601
RK
627static void alloc_pre_mem PARAMS ((int, int));
628static void free_pre_mem PARAMS ((void));
629static void compute_pre_data PARAMS ((void));
589005ff 630static int pre_expr_reaches_here_p PARAMS ((basic_block, struct expr *,
e2d2ed72
AM
631 basic_block));
632static void insert_insn_end_bb PARAMS ((struct expr *, basic_block, int));
c4c81601
RK
633static void pre_insert_copy_insn PARAMS ((struct expr *, rtx));
634static void pre_insert_copies PARAMS ((void));
635static int pre_delete PARAMS ((void));
636static int pre_gcse PARAMS ((void));
637static int one_pre_gcse_pass PARAMS ((int));
638static void add_label_notes PARAMS ((rtx, rtx));
639static void alloc_code_hoist_mem PARAMS ((int, int));
640static void free_code_hoist_mem PARAMS ((void));
711d877c 641static void compute_code_hoist_vbeinout PARAMS ((void));
c4c81601 642static void compute_code_hoist_data PARAMS ((void));
589005ff 643static int hoist_expr_reaches_here_p PARAMS ((basic_block, int, basic_block,
e2d2ed72 644 char *));
c4c81601
RK
645static void hoist_code PARAMS ((void));
646static int one_code_hoisting_pass PARAMS ((void));
647static void alloc_rd_mem PARAMS ((int, int));
648static void free_rd_mem PARAMS ((void));
e2d2ed72 649static void handle_rd_kill_set PARAMS ((rtx, int, basic_block));
c4c81601 650static void compute_kill_rd PARAMS ((void));
711d877c 651static void compute_rd PARAMS ((void));
c4c81601
RK
652static void alloc_avail_expr_mem PARAMS ((int, int));
653static void free_avail_expr_mem PARAMS ((void));
02280659 654static void compute_ae_gen PARAMS ((struct hash_table *));
e2d2ed72 655static int expr_killed_p PARAMS ((rtx, basic_block));
02280659 656static void compute_ae_kill PARAMS ((sbitmap *, sbitmap *, struct hash_table *));
711d877c 657static int expr_reaches_here_p PARAMS ((struct occr *, struct expr *,
e2d2ed72 658 basic_block, int));
c4c81601
RK
659static rtx computing_insn PARAMS ((struct expr *, rtx));
660static int def_reaches_here_p PARAMS ((rtx, rtx));
661static int can_disregard_other_sets PARAMS ((struct reg_set **, rtx, int));
662static int handle_avail_expr PARAMS ((rtx, struct expr *));
663static int classic_gcse PARAMS ((void));
664static int one_classic_gcse_pass PARAMS ((int));
665static void invalidate_nonnull_info PARAMS ((rtx, rtx, void *));
99a15921 666static int delete_null_pointer_checks_1 PARAMS ((unsigned int *,
8e184d9c 667 sbitmap *, sbitmap *,
711d877c
KG
668 struct null_pointer_info *));
669static rtx process_insert_insn PARAMS ((struct expr *));
670static int pre_edge_insert PARAMS ((struct edge_list *, struct expr **));
c4c81601 671static int expr_reaches_here_p_work PARAMS ((struct occr *, struct expr *,
e2d2ed72
AM
672 basic_block, int, char *));
673static int pre_expr_reaches_here_p_work PARAMS ((basic_block, struct expr *,
674 basic_block, char *));
a13d4ebf
AM
675static struct ls_expr * ldst_entry PARAMS ((rtx));
676static void free_ldst_entry PARAMS ((struct ls_expr *));
677static void free_ldst_mems PARAMS ((void));
678static void print_ldst_list PARAMS ((FILE *));
679static struct ls_expr * find_rtx_in_ldst PARAMS ((rtx));
680static int enumerate_ldsts PARAMS ((void));
681static inline struct ls_expr * first_ls_expr PARAMS ((void));
682static inline struct ls_expr * next_ls_expr PARAMS ((struct ls_expr *));
683static int simple_mem PARAMS ((rtx));
684static void invalidate_any_buried_refs PARAMS ((rtx));
589005ff 685static void compute_ld_motion_mems PARAMS ((void));
a13d4ebf
AM
686static void trim_ld_motion_mems PARAMS ((void));
687static void update_ld_motion_stores PARAMS ((struct expr *));
aaa4ca30
AJ
688static void reg_set_info PARAMS ((rtx, rtx, void *));
689static int store_ops_ok PARAMS ((rtx, basic_block));
a13d4ebf
AM
690static void find_moveable_store PARAMS ((rtx));
691static int compute_store_table PARAMS ((void));
692static int load_kills_store PARAMS ((rtx, rtx));
693static int find_loads PARAMS ((rtx, rtx));
694static int store_killed_in_insn PARAMS ((rtx, rtx));
aaa4ca30 695static int store_killed_after PARAMS ((rtx, rtx, basic_block));
e2d2ed72 696static int store_killed_before PARAMS ((rtx, rtx, basic_block));
a13d4ebf 697static void build_store_vectors PARAMS ((void));
e2d2ed72 698static void insert_insn_start_bb PARAMS ((rtx, basic_block));
a13d4ebf 699static int insert_store PARAMS ((struct ls_expr *, edge));
e2d2ed72 700static void replace_store_insn PARAMS ((rtx, rtx, basic_block));
589005ff 701static void delete_store PARAMS ((struct ls_expr *,
e2d2ed72 702 basic_block));
a13d4ebf
AM
703static void free_store_memory PARAMS ((void));
704static void store_motion PARAMS ((void));
0fe854a7 705static void free_insn_expr_list_list PARAMS ((rtx *));
73991d6a
JH
706static void clear_modify_mem_tables PARAMS ((void));
707static void free_modify_mem_tables PARAMS ((void));
10d1bb36 708static rtx gcse_emit_move_after PARAMS ((rtx, rtx, rtx));
710ee3ed 709static void local_cprop_find_used_regs PARAMS ((rtx *, void *));
8ba46434
R
710static bool do_local_cprop PARAMS ((rtx, rtx, int, rtx*));
711static bool adjust_libcall_notes PARAMS ((rtx, rtx, rtx, rtx*));
ae860ff7 712static void local_cprop_pass PARAMS ((int));
7506f491
DE
713\f
714/* Entry point for global common subexpression elimination.
715 F is the first instruction in the function. */
716
e78d9500 717int
7506f491
DE
718gcse_main (f, file)
719 rtx f;
720 FILE *file;
721{
722 int changed, pass;
723 /* Bytes used at start of pass. */
724 int initial_bytes_used;
725 /* Maximum number of bytes used by a pass. */
726 int max_pass_bytes;
727 /* Point to release obstack data from for each pass. */
728 char *gcse_obstack_bottom;
729
b5ce41ff
JL
730 /* We do not construct an accurate cfg in functions which call
731 setjmp, so just punt to be safe. */
7506f491 732 if (current_function_calls_setjmp)
e78d9500 733 return 0;
589005ff 734
b5ce41ff
JL
735 /* Assume that we do not need to run jump optimizations after gcse. */
736 run_jump_opt_after_gcse = 0;
737
7506f491
DE
738 /* For calling dump_foo fns from gdb. */
739 debug_stderr = stderr;
b5ce41ff 740 gcse_file = file;
7506f491 741
b5ce41ff
JL
742 /* Identify the basic block information for this function, including
743 successors and predecessors. */
7506f491 744 max_gcse_regno = max_reg_num ();
7506f491 745
a42cd965
AM
746 if (file)
747 dump_flow_info (file);
748
7506f491 749 /* Return if there's nothing to do. */
0b17ab2f 750 if (n_basic_blocks <= 1)
a18820c6 751 return 0;
7506f491 752
55f7891b
JL
753 /* Trying to perform global optimizations on flow graphs which have
754 a high connectivity will take a long time and is unlikely to be
755 particularly useful.
756
43e72072 757 In normal circumstances a cfg should have about twice as many edges
55f7891b
JL
758 as blocks. But we do not want to punish small functions which have
759 a couple switch statements. So we require a relatively large number
760 of basic blocks and the ratio of edges to blocks to be high. */
0b17ab2f 761 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
18424ae1
BL
762 {
763 if (warn_disabled_optimization)
8e42ace1 764 warning ("GCSE disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
0b17ab2f 765 n_basic_blocks, n_edges / n_basic_blocks);
18424ae1
BL
766 return 0;
767 }
55f7891b 768
f1fa37ff
MM
769 /* If allocating memory for the cprop bitmap would take up too much
770 storage it's better just to disable the optimization. */
589005ff 771 if ((n_basic_blocks
f1fa37ff
MM
772 * SBITMAP_SET_SIZE (max_gcse_regno)
773 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
774 {
775 if (warn_disabled_optimization)
776 warning ("GCSE disabled: %d basic blocks and %d registers",
0b17ab2f 777 n_basic_blocks, max_gcse_regno);
f1fa37ff
MM
778
779 return 0;
780 }
781
7506f491
DE
782 /* See what modes support reg/reg copy operations. */
783 if (! can_copy_init_p)
784 {
785 compute_can_copy ();
786 can_copy_init_p = 1;
787 }
788
789 gcc_obstack_init (&gcse_obstack);
a42cd965 790 bytes_used = 0;
7506f491 791
a13d4ebf
AM
792 /* We need alias. */
793 init_alias_analysis ();
c4c81601
RK
794 /* Record where pseudo-registers are set. This data is kept accurate
795 during each pass. ??? We could also record hard-reg information here
796 [since it's unchanging], however it is currently done during hash table
797 computation.
b5ce41ff 798
c4c81601
RK
799 It may be tempting to compute MEM set information here too, but MEM sets
800 will be subject to code motion one day and thus we need to compute
b5ce41ff 801 information about memory sets when we build the hash tables. */
7506f491
DE
802
803 alloc_reg_set_mem (max_gcse_regno);
804 compute_sets (f);
805
806 pass = 0;
807 initial_bytes_used = bytes_used;
808 max_pass_bytes = 0;
809 gcse_obstack_bottom = gcse_alloc (1);
810 changed = 1;
740f35a0 811 while (changed && pass < MAX_GCSE_PASSES)
7506f491
DE
812 {
813 changed = 0;
814 if (file)
815 fprintf (file, "GCSE pass %d\n\n", pass + 1);
816
817 /* Initialize bytes_used to the space for the pred/succ lists,
818 and the reg_set_table data. */
819 bytes_used = initial_bytes_used;
820
821 /* Each pass may create new registers, so recalculate each time. */
822 max_gcse_regno = max_reg_num ();
823
824 alloc_gcse_mem (f);
825
b5ce41ff
JL
826 /* Don't allow constant propagation to modify jumps
827 during this pass. */
a0134312 828 changed = one_cprop_pass (pass + 1, 0, 0);
7506f491
DE
829
830 if (optimize_size)
b5ce41ff 831 changed |= one_classic_gcse_pass (pass + 1);
7506f491 832 else
589005ff 833 {
a42cd965 834 changed |= one_pre_gcse_pass (pass + 1);
a13d4ebf
AM
835 /* We may have just created new basic blocks. Release and
836 recompute various things which are sized on the number of
837 basic blocks. */
838 if (changed)
839 {
73991d6a 840 free_modify_mem_tables ();
a13d4ebf 841 modify_mem_list
d55bc081 842 = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
a13d4ebf 843 canon_modify_mem_list
d55bc081
ZD
844 = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
845 memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
846 memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
a13d4ebf 847 }
a42cd965
AM
848 free_reg_set_mem ();
849 alloc_reg_set_mem (max_reg_num ());
850 compute_sets (f);
851 run_jump_opt_after_gcse = 1;
852 }
7506f491
DE
853
854 if (max_pass_bytes < bytes_used)
855 max_pass_bytes = bytes_used;
856
bb457bd9
JL
857 /* Free up memory, then reallocate for code hoisting. We can
858 not re-use the existing allocated memory because the tables
859 will not have info for the insns or registers created by
860 partial redundancy elimination. */
7506f491
DE
861 free_gcse_mem ();
862
bb457bd9
JL
863 /* It does not make sense to run code hoisting unless we optimizing
864 for code size -- it rarely makes programs faster, and can make
865 them bigger if we did partial redundancy elimination (when optimizing
866 for space, we use a classic gcse algorithm instead of partial
867 redundancy algorithms). */
868 if (optimize_size)
589005ff 869 {
bb457bd9
JL
870 max_gcse_regno = max_reg_num ();
871 alloc_gcse_mem (f);
872 changed |= one_code_hoisting_pass ();
873 free_gcse_mem ();
874
875 if (max_pass_bytes < bytes_used)
876 max_pass_bytes = bytes_used;
589005ff 877 }
bb457bd9 878
7506f491
DE
879 if (file)
880 {
881 fprintf (file, "\n");
882 fflush (file);
883 }
c4c81601 884
7506f491
DE
885 obstack_free (&gcse_obstack, gcse_obstack_bottom);
886 pass++;
887 }
888
b5ce41ff
JL
889 /* Do one last pass of copy propagation, including cprop into
890 conditional jumps. */
891
892 max_gcse_regno = max_reg_num ();
893 alloc_gcse_mem (f);
894 /* This time, go ahead and allow cprop to alter jumps. */
a0134312 895 one_cprop_pass (pass + 1, 1, 0);
b5ce41ff 896 free_gcse_mem ();
7506f491
DE
897
898 if (file)
899 {
900 fprintf (file, "GCSE of %s: %d basic blocks, ",
0b17ab2f 901 current_function_name, n_basic_blocks);
7506f491
DE
902 fprintf (file, "%d pass%s, %d bytes\n\n",
903 pass, pass > 1 ? "es" : "", max_pass_bytes);
904 }
905
6496a589 906 obstack_free (&gcse_obstack, NULL);
7506f491 907 free_reg_set_mem ();
a13d4ebf
AM
908 /* We are finished with alias. */
909 end_alias_analysis ();
910 allocate_reg_info (max_reg_num (), FALSE, FALSE);
911
61ad9a34
JJ
912 /* Store motion disabled until it is fixed. */
913 if (0 && !optimize_size && flag_gcse_sm)
a13d4ebf
AM
914 store_motion ();
915 /* Record where pseudo-registers are set. */
e78d9500 916 return run_jump_opt_after_gcse;
7506f491
DE
917}
918\f
919/* Misc. utilities. */
920
921/* Compute which modes support reg/reg copy operations. */
922
923static void
924compute_can_copy ()
925{
926 int i;
50b2596f 927#ifndef AVOID_CCMODE_COPIES
8e42ace1 928 rtx reg, insn;
50b2596f 929#endif
961192e1 930 memset (can_copy_p, 0, NUM_MACHINE_MODES);
7506f491
DE
931
932 start_sequence ();
933 for (i = 0; i < NUM_MACHINE_MODES; i++)
c4c81601
RK
934 if (GET_MODE_CLASS (i) == MODE_CC)
935 {
7506f491 936#ifdef AVOID_CCMODE_COPIES
c4c81601 937 can_copy_p[i] = 0;
7506f491 938#else
c4c81601
RK
939 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
940 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
9714cf43 941 if (recog (PATTERN (insn), insn, NULL) >= 0)
c4c81601 942 can_copy_p[i] = 1;
7506f491 943#endif
c4c81601 944 }
141b5810
AO
945 else
946 can_copy_p[i] = 1;
c4c81601 947
7506f491 948 end_sequence ();
7506f491
DE
949}
950\f
951/* Cover function to xmalloc to record bytes allocated. */
952
953static char *
954gmalloc (size)
955 unsigned int size;
956{
957 bytes_used += size;
958 return xmalloc (size);
959}
960
961/* Cover function to xrealloc.
962 We don't record the additional size since we don't know it.
963 It won't affect memory usage stats much anyway. */
964
965static char *
966grealloc (ptr, size)
967 char *ptr;
968 unsigned int size;
969{
970 return xrealloc (ptr, size);
971}
972
77bbd421 973/* Cover function to obstack_alloc. */
7506f491
DE
974
975static char *
976gcse_alloc (size)
977 unsigned long size;
978{
77bbd421 979 bytes_used += size;
7506f491
DE
980 return (char *) obstack_alloc (&gcse_obstack, size);
981}
982
983/* Allocate memory for the cuid mapping array,
984 and reg/memory set tracking tables.
985
986 This is called at the start of each pass. */
987
988static void
989alloc_gcse_mem (f)
990 rtx f;
991{
8e42ace1 992 int i, n;
7506f491
DE
993 rtx insn;
994
995 /* Find the largest UID and create a mapping from UIDs to CUIDs.
996 CUIDs are like UIDs except they increase monotonically, have no gaps,
997 and only apply to real insns. */
998
999 max_uid = get_max_uid ();
1000 n = (max_uid + 1) * sizeof (int);
1001 uid_cuid = (int *) gmalloc (n);
961192e1 1002 memset ((char *) uid_cuid, 0, n);
7506f491
DE
1003 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
1004 {
2c3c49de 1005 if (INSN_P (insn))
b86db3eb 1006 uid_cuid[INSN_UID (insn)] = i++;
7506f491 1007 else
b86db3eb 1008 uid_cuid[INSN_UID (insn)] = i;
7506f491
DE
1009 }
1010
1011 /* Create a table mapping cuids to insns. */
1012
1013 max_cuid = i;
1014 n = (max_cuid + 1) * sizeof (rtx);
1015 cuid_insn = (rtx *) gmalloc (n);
961192e1 1016 memset ((char *) cuid_insn, 0, n);
7506f491 1017 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
2c3c49de 1018 if (INSN_P (insn))
c4c81601 1019 CUID_INSN (i++) = insn;
7506f491
DE
1020
1021 /* Allocate vars to track sets of regs. */
73991d6a 1022 reg_set_bitmap = BITMAP_XMALLOC ();
7506f491
DE
1023
1024 /* Allocate vars to track sets of regs, memory per block. */
d55bc081 1025 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
7506f491 1026 max_gcse_regno);
a13d4ebf
AM
1027 /* Allocate array to keep a list of insns which modify memory in each
1028 basic block. */
d55bc081
ZD
1029 modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
1030 canon_modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
1031 memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
1032 memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
73991d6a
JH
1033 modify_mem_list_set = BITMAP_XMALLOC ();
1034 canon_modify_mem_list_set = BITMAP_XMALLOC ();
7506f491
DE
1035}
1036
1037/* Free memory allocated by alloc_gcse_mem. */
1038
1039static void
1040free_gcse_mem ()
1041{
1042 free (uid_cuid);
1043 free (cuid_insn);
1044
73991d6a 1045 BITMAP_XFREE (reg_set_bitmap);
7506f491 1046
5a660bff 1047 sbitmap_vector_free (reg_set_in_block);
73991d6a
JH
1048 free_modify_mem_tables ();
1049 BITMAP_XFREE (modify_mem_list_set);
1050 BITMAP_XFREE (canon_modify_mem_list_set);
7506f491
DE
1051}
1052
0511851c
MM
1053/* Many of the global optimization algorithms work by solving dataflow
1054 equations for various expressions. Initially, some local value is
c4c81601
RK
1055 computed for each expression in each block. Then, the values across the
1056 various blocks are combined (by following flow graph edges) to arrive at
1057 global values. Conceptually, each set of equations is independent. We
1058 may therefore solve all the equations in parallel, solve them one at a
1059 time, or pick any intermediate approach.
1060
1061 When you're going to need N two-dimensional bitmaps, each X (say, the
1062 number of blocks) by Y (say, the number of expressions), call this
1063 function. It's not important what X and Y represent; only that Y
1064 correspond to the things that can be done in parallel. This function will
1065 return an appropriate chunking factor C; you should solve C sets of
1066 equations in parallel. By going through this function, we can easily
1067 trade space against time; by solving fewer equations in parallel we use
1068 less space. */
0511851c
MM
1069
1070static int
1071get_bitmap_width (n, x, y)
1072 int n;
1073 int x;
1074 int y;
1075{
1076 /* It's not really worth figuring out *exactly* how much memory will
1077 be used by a particular choice. The important thing is to get
1078 something approximately right. */
1079 size_t max_bitmap_memory = 10 * 1024 * 1024;
1080
1081 /* The number of bytes we'd use for a single column of minimum
1082 width. */
1083 size_t column_size = n * x * sizeof (SBITMAP_ELT_TYPE);
1084
1085 /* Often, it's reasonable just to solve all the equations in
1086 parallel. */
1087 if (column_size * SBITMAP_SET_SIZE (y) <= max_bitmap_memory)
1088 return y;
1089
1090 /* Otherwise, pick the largest width we can, without going over the
1091 limit. */
1092 return SBITMAP_ELT_BITS * ((max_bitmap_memory + column_size - 1)
1093 / column_size);
1094}
b5ce41ff
JL
1095\f
1096/* Compute the local properties of each recorded expression.
c4c81601
RK
1097
1098 Local properties are those that are defined by the block, irrespective of
1099 other blocks.
b5ce41ff
JL
1100
1101 An expression is transparent in a block if its operands are not modified
1102 in the block.
1103
1104 An expression is computed (locally available) in a block if it is computed
1105 at least once and expression would contain the same value if the
1106 computation was moved to the end of the block.
1107
1108 An expression is locally anticipatable in a block if it is computed at
1109 least once and expression would contain the same value if the computation
1110 was moved to the beginning of the block.
1111
c4c81601
RK
1112 We call this routine for cprop, pre and code hoisting. They all compute
1113 basically the same information and thus can easily share this code.
7506f491 1114
c4c81601
RK
1115 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1116 properties. If NULL, then it is not necessary to compute or record that
1117 particular property.
b5ce41ff 1118
02280659
ZD
1119 TABLE controls which hash table to look at. If it is set hash table,
1120 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
c4c81601 1121 ABSALTERED. */
589005ff 1122
b5ce41ff 1123static void
02280659 1124compute_local_properties (transp, comp, antloc, table)
b5ce41ff
JL
1125 sbitmap *transp;
1126 sbitmap *comp;
1127 sbitmap *antloc;
02280659 1128 struct hash_table *table;
b5ce41ff 1129{
02280659 1130 unsigned int i;
589005ff 1131
b5ce41ff
JL
1132 /* Initialize any bitmaps that were passed in. */
1133 if (transp)
695ab36a 1134 {
02280659 1135 if (table->set_p)
d55bc081 1136 sbitmap_vector_zero (transp, last_basic_block);
695ab36a 1137 else
d55bc081 1138 sbitmap_vector_ones (transp, last_basic_block);
695ab36a 1139 }
c4c81601 1140
b5ce41ff 1141 if (comp)
d55bc081 1142 sbitmap_vector_zero (comp, last_basic_block);
b5ce41ff 1143 if (antloc)
d55bc081 1144 sbitmap_vector_zero (antloc, last_basic_block);
b5ce41ff 1145
02280659 1146 for (i = 0; i < table->size; i++)
7506f491 1147 {
b5ce41ff
JL
1148 struct expr *expr;
1149
02280659 1150 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
b5ce41ff 1151 {
b5ce41ff 1152 int indx = expr->bitmap_index;
c4c81601 1153 struct occr *occr;
b5ce41ff
JL
1154
1155 /* The expression is transparent in this block if it is not killed.
1156 We start by assuming all are transparent [none are killed], and
1157 then reset the bits for those that are. */
b5ce41ff 1158 if (transp)
02280659 1159 compute_transp (expr->expr, indx, transp, table->set_p);
b5ce41ff
JL
1160
1161 /* The occurrences recorded in antic_occr are exactly those that
cc2902df 1162 we want to set to nonzero in ANTLOC. */
b5ce41ff 1163 if (antloc)
c4c81601
RK
1164 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1165 {
1166 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
b5ce41ff 1167
c4c81601
RK
1168 /* While we're scanning the table, this is a good place to
1169 initialize this. */
1170 occr->deleted_p = 0;
1171 }
b5ce41ff
JL
1172
1173 /* The occurrences recorded in avail_occr are exactly those that
cc2902df 1174 we want to set to nonzero in COMP. */
b5ce41ff 1175 if (comp)
c4c81601
RK
1176 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1177 {
1178 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
b5ce41ff 1179
c4c81601
RK
1180 /* While we're scanning the table, this is a good place to
1181 initialize this. */
1182 occr->copied_p = 0;
1183 }
b5ce41ff
JL
1184
1185 /* While we're scanning the table, this is a good place to
1186 initialize this. */
1187 expr->reaching_reg = 0;
1188 }
7506f491 1189 }
7506f491
DE
1190}
1191\f
1192/* Register set information.
1193
1194 `reg_set_table' records where each register is set or otherwise
1195 modified. */
1196
1197static struct obstack reg_set_obstack;
1198
1199static void
1200alloc_reg_set_mem (n_regs)
1201 int n_regs;
1202{
c4c81601 1203 unsigned int n;
7506f491
DE
1204
1205 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1206 n = reg_set_table_size * sizeof (struct reg_set *);
1207 reg_set_table = (struct reg_set **) gmalloc (n);
961192e1 1208 memset ((char *) reg_set_table, 0, n);
7506f491
DE
1209
1210 gcc_obstack_init (&reg_set_obstack);
1211}
1212
1213static void
1214free_reg_set_mem ()
1215{
1216 free (reg_set_table);
6496a589 1217 obstack_free (&reg_set_obstack, NULL);
7506f491
DE
1218}
1219
1220/* Record REGNO in the reg_set table. */
1221
1222static void
1223record_one_set (regno, insn)
1224 int regno;
1225 rtx insn;
1226{
172890a2 1227 /* Allocate a new reg_set element and link it onto the list. */
63bc1d05 1228 struct reg_set *new_reg_info;
7506f491
DE
1229
1230 /* If the table isn't big enough, enlarge it. */
1231 if (regno >= reg_set_table_size)
1232 {
1233 int new_size = regno + REG_SET_TABLE_SLOP;
c4c81601
RK
1234
1235 reg_set_table
1236 = (struct reg_set **) grealloc ((char *) reg_set_table,
1237 new_size * sizeof (struct reg_set *));
961192e1 1238 memset ((char *) (reg_set_table + reg_set_table_size), 0,
8e42ace1 1239 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
7506f491
DE
1240 reg_set_table_size = new_size;
1241 }
1242
1243 new_reg_info = (struct reg_set *) obstack_alloc (&reg_set_obstack,
1244 sizeof (struct reg_set));
1245 bytes_used += sizeof (struct reg_set);
1246 new_reg_info->insn = insn;
274969ea
MM
1247 new_reg_info->next = reg_set_table[regno];
1248 reg_set_table[regno] = new_reg_info;
7506f491
DE
1249}
1250
c4c81601
RK
1251/* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1252 an insn. The DATA is really the instruction in which the SET is
1253 occurring. */
7506f491
DE
1254
1255static void
84832317 1256record_set_info (dest, setter, data)
50b2596f 1257 rtx dest, setter ATTRIBUTE_UNUSED;
84832317 1258 void *data;
7506f491 1259{
84832317
MM
1260 rtx record_set_insn = (rtx) data;
1261
c4c81601
RK
1262 if (GET_CODE (dest) == REG && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1263 record_one_set (REGNO (dest), record_set_insn);
7506f491
DE
1264}
1265
1266/* Scan the function and record each set of each pseudo-register.
1267
c4c81601 1268 This is called once, at the start of the gcse pass. See the comments for
fbe5a4a6 1269 `reg_set_table' for further documentation. */
7506f491
DE
1270
1271static void
1272compute_sets (f)
1273 rtx f;
1274{
c4c81601 1275 rtx insn;
7506f491 1276
c4c81601 1277 for (insn = f; insn != 0; insn = NEXT_INSN (insn))
2c3c49de 1278 if (INSN_P (insn))
c4c81601 1279 note_stores (PATTERN (insn), record_set_info, insn);
7506f491
DE
1280}
1281\f
1282/* Hash table support. */
1283
80c29cc4
RZ
1284struct reg_avail_info
1285{
e0082a72 1286 basic_block last_bb;
80c29cc4
RZ
1287 int first_set;
1288 int last_set;
1289};
1290
1291static struct reg_avail_info *reg_avail_info;
e0082a72 1292static basic_block current_bb;
7506f491 1293
7506f491 1294
fb0c0a12
RK
1295/* See whether X, the source of a set, is something we want to consider for
1296 GCSE. */
7506f491 1297
e2500fed 1298static GTY(()) rtx test_insn;
7506f491
DE
1299static int
1300want_to_gcse_p (x)
1301 rtx x;
1302{
fb0c0a12
RK
1303 int num_clobbers = 0;
1304 int icode;
1305
c4c81601 1306 switch (GET_CODE (x))
7506f491
DE
1307 {
1308 case REG:
1309 case SUBREG:
1310 case CONST_INT:
1311 case CONST_DOUBLE:
69ef87e2 1312 case CONST_VECTOR:
7506f491 1313 case CALL:
34ee7f82 1314 case CONSTANT_P_RTX:
7506f491
DE
1315 return 0;
1316
1317 default:
1318 break;
1319 }
1320
fb0c0a12
RK
1321 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1322 if (general_operand (x, GET_MODE (x)))
1323 return 1;
1324 else if (GET_MODE (x) == VOIDmode)
1325 return 0;
1326
1327 /* Otherwise, check if we can make a valid insn from it. First initialize
1328 our test insn if we haven't already. */
1329 if (test_insn == 0)
1330 {
1331 test_insn
1332 = make_insn_raw (gen_rtx_SET (VOIDmode,
1333 gen_rtx_REG (word_mode,
1334 FIRST_PSEUDO_REGISTER * 2),
1335 const0_rtx));
1336 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
fb0c0a12
RK
1337 }
1338
1339 /* Now make an insn like the one we would make when GCSE'ing and see if
1340 valid. */
1341 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1342 SET_SRC (PATTERN (test_insn)) = x;
1343 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1344 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
7506f491
DE
1345}
1346
cc2902df 1347/* Return nonzero if the operands of expression X are unchanged from the
7506f491
DE
1348 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1349 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1350
1351static int
1352oprs_unchanged_p (x, insn, avail_p)
1353 rtx x, insn;
1354 int avail_p;
1355{
c4c81601 1356 int i, j;
7506f491 1357 enum rtx_code code;
6f7d635c 1358 const char *fmt;
7506f491 1359
7506f491
DE
1360 if (x == 0)
1361 return 1;
1362
1363 code = GET_CODE (x);
1364 switch (code)
1365 {
1366 case REG:
80c29cc4
RZ
1367 {
1368 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1369
1370 if (info->last_bb != current_bb)
1371 return 1;
589005ff 1372 if (avail_p)
80c29cc4
RZ
1373 return info->last_set < INSN_CUID (insn);
1374 else
1375 return info->first_set >= INSN_CUID (insn);
1376 }
7506f491
DE
1377
1378 case MEM:
e0082a72 1379 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
a13d4ebf
AM
1380 x, avail_p))
1381 return 0;
7506f491 1382 else
c4c81601 1383 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
7506f491
DE
1384
1385 case PRE_DEC:
1386 case PRE_INC:
1387 case POST_DEC:
1388 case POST_INC:
4b983fdc
RH
1389 case PRE_MODIFY:
1390 case POST_MODIFY:
7506f491
DE
1391 return 0;
1392
1393 case PC:
1394 case CC0: /*FIXME*/
1395 case CONST:
1396 case CONST_INT:
1397 case CONST_DOUBLE:
69ef87e2 1398 case CONST_VECTOR:
7506f491
DE
1399 case SYMBOL_REF:
1400 case LABEL_REF:
1401 case ADDR_VEC:
1402 case ADDR_DIFF_VEC:
1403 return 1;
1404
1405 default:
1406 break;
1407 }
1408
c4c81601 1409 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
1410 {
1411 if (fmt[i] == 'e')
1412 {
c4c81601
RK
1413 /* If we are about to do the last recursive call needed at this
1414 level, change it into iteration. This function is called enough
1415 to be worth it. */
7506f491 1416 if (i == 0)
c4c81601
RK
1417 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1418
1419 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
7506f491
DE
1420 return 0;
1421 }
1422 else if (fmt[i] == 'E')
c4c81601
RK
1423 for (j = 0; j < XVECLEN (x, i); j++)
1424 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1425 return 0;
7506f491
DE
1426 }
1427
1428 return 1;
1429}
1430
a13d4ebf
AM
1431/* Used for communication between mems_conflict_for_gcse_p and
1432 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1433 conflict between two memory references. */
1434static int gcse_mems_conflict_p;
1435
1436/* Used for communication between mems_conflict_for_gcse_p and
1437 load_killed_in_block_p. A memory reference for a load instruction,
1438 mems_conflict_for_gcse_p will see if a memory store conflicts with
1439 this memory load. */
1440static rtx gcse_mem_operand;
1441
1442/* DEST is the output of an instruction. If it is a memory reference, and
1443 possibly conflicts with the load found in gcse_mem_operand, then set
1444 gcse_mems_conflict_p to a nonzero value. */
1445
1446static void
1447mems_conflict_for_gcse_p (dest, setter, data)
1448 rtx dest, setter ATTRIBUTE_UNUSED;
1449 void *data ATTRIBUTE_UNUSED;
1450{
1451 while (GET_CODE (dest) == SUBREG
1452 || GET_CODE (dest) == ZERO_EXTRACT
1453 || GET_CODE (dest) == SIGN_EXTRACT
1454 || GET_CODE (dest) == STRICT_LOW_PART)
1455 dest = XEXP (dest, 0);
1456
1457 /* If DEST is not a MEM, then it will not conflict with the load. Note
1458 that function calls are assumed to clobber memory, but are handled
1459 elsewhere. */
1460 if (GET_CODE (dest) != MEM)
1461 return;
aaa4ca30 1462
a13d4ebf 1463 /* If we are setting a MEM in our list of specially recognized MEMs,
589005ff
KH
1464 don't mark as killed this time. */
1465
a13d4ebf
AM
1466 if (dest == gcse_mem_operand && pre_ldst_mems != NULL)
1467 {
1468 if (!find_rtx_in_ldst (dest))
1469 gcse_mems_conflict_p = 1;
1470 return;
1471 }
aaa4ca30 1472
a13d4ebf
AM
1473 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1474 rtx_addr_varies_p))
1475 gcse_mems_conflict_p = 1;
1476}
1477
1478/* Return nonzero if the expression in X (a memory reference) is killed
1479 in block BB before or after the insn with the CUID in UID_LIMIT.
1480 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1481 before UID_LIMIT.
1482
1483 To check the entire block, set UID_LIMIT to max_uid + 1 and
1484 AVAIL_P to 0. */
1485
1486static int
1487load_killed_in_block_p (bb, uid_limit, x, avail_p)
e2d2ed72 1488 basic_block bb;
a13d4ebf
AM
1489 int uid_limit;
1490 rtx x;
1491 int avail_p;
1492{
0b17ab2f 1493 rtx list_entry = modify_mem_list[bb->index];
a13d4ebf
AM
1494 while (list_entry)
1495 {
1496 rtx setter;
1497 /* Ignore entries in the list that do not apply. */
1498 if ((avail_p
1499 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1500 || (! avail_p
1501 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1502 {
1503 list_entry = XEXP (list_entry, 1);
1504 continue;
1505 }
1506
1507 setter = XEXP (list_entry, 0);
1508
1509 /* If SETTER is a call everything is clobbered. Note that calls
1510 to pure functions are never put on the list, so we need not
1511 worry about them. */
1512 if (GET_CODE (setter) == CALL_INSN)
1513 return 1;
1514
1515 /* SETTER must be an INSN of some kind that sets memory. Call
589005ff 1516 note_stores to examine each hunk of memory that is modified.
a13d4ebf
AM
1517
1518 The note_stores interface is pretty limited, so we have to
1519 communicate via global variables. Yuk. */
1520 gcse_mem_operand = x;
1521 gcse_mems_conflict_p = 0;
1522 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1523 if (gcse_mems_conflict_p)
1524 return 1;
1525 list_entry = XEXP (list_entry, 1);
1526 }
1527 return 0;
1528}
1529
cc2902df 1530/* Return nonzero if the operands of expression X are unchanged from
7506f491
DE
1531 the start of INSN's basic block up to but not including INSN. */
1532
1533static int
1534oprs_anticipatable_p (x, insn)
1535 rtx x, insn;
1536{
1537 return oprs_unchanged_p (x, insn, 0);
1538}
1539
cc2902df 1540/* Return nonzero if the operands of expression X are unchanged from
7506f491
DE
1541 INSN to the end of INSN's basic block. */
1542
1543static int
1544oprs_available_p (x, insn)
1545 rtx x, insn;
1546{
1547 return oprs_unchanged_p (x, insn, 1);
1548}
1549
1550/* Hash expression X.
c4c81601
RK
1551
1552 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1553 indicating if a volatile operand is found or if the expression contains
1554 something we don't want to insert in the table.
7506f491
DE
1555
1556 ??? One might want to merge this with canon_hash. Later. */
1557
1558static unsigned int
1559hash_expr (x, mode, do_not_record_p, hash_table_size)
1560 rtx x;
1561 enum machine_mode mode;
1562 int *do_not_record_p;
1563 int hash_table_size;
1564{
1565 unsigned int hash;
1566
1567 *do_not_record_p = 0;
1568
1569 hash = hash_expr_1 (x, mode, do_not_record_p);
1570 return hash % hash_table_size;
1571}
172890a2 1572
6462bb43 1573/* Hash a string. Just add its bytes up. */
172890a2 1574
6462bb43
AO
1575static inline unsigned
1576hash_string_1 (ps)
1577 const char *ps;
1578{
1579 unsigned hash = 0;
8e42ace1 1580 const unsigned char *p = (const unsigned char *) ps;
589005ff 1581
6462bb43
AO
1582 if (p)
1583 while (*p)
1584 hash += *p++;
1585
1586 return hash;
1587}
7506f491
DE
1588
1589/* Subroutine of hash_expr to do the actual work. */
1590
1591static unsigned int
1592hash_expr_1 (x, mode, do_not_record_p)
1593 rtx x;
1594 enum machine_mode mode;
1595 int *do_not_record_p;
1596{
1597 int i, j;
1598 unsigned hash = 0;
1599 enum rtx_code code;
6f7d635c 1600 const char *fmt;
7506f491 1601
c4c81601 1602 /* Used to turn recursion into iteration. We can't rely on GCC's
fbe5a4a6 1603 tail-recursion elimination since we need to keep accumulating values
c4c81601 1604 in HASH. */
7506f491
DE
1605
1606 if (x == 0)
1607 return hash;
1608
c4c81601 1609 repeat:
7506f491
DE
1610 code = GET_CODE (x);
1611 switch (code)
1612 {
1613 case REG:
c4c81601
RK
1614 hash += ((unsigned int) REG << 7) + REGNO (x);
1615 return hash;
7506f491
DE
1616
1617 case CONST_INT:
c4c81601
RK
1618 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
1619 + (unsigned int) INTVAL (x));
1620 return hash;
7506f491
DE
1621
1622 case CONST_DOUBLE:
1623 /* This is like the general case, except that it only counts
1624 the integers representing the constant. */
c4c81601 1625 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
7506f491
DE
1626 if (GET_MODE (x) != VOIDmode)
1627 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
c4c81601 1628 hash += (unsigned int) XWINT (x, i);
7506f491 1629 else
c4c81601
RK
1630 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
1631 + (unsigned int) CONST_DOUBLE_HIGH (x));
7506f491
DE
1632 return hash;
1633
69ef87e2
AH
1634 case CONST_VECTOR:
1635 {
1636 int units;
1637 rtx elt;
1638
1639 units = CONST_VECTOR_NUNITS (x);
1640
1641 for (i = 0; i < units; ++i)
1642 {
1643 elt = CONST_VECTOR_ELT (x, i);
1644 hash += hash_expr_1 (elt, GET_MODE (elt), do_not_record_p);
1645 }
1646
1647 return hash;
1648 }
1649
7506f491
DE
1650 /* Assume there is only one rtx object for any given label. */
1651 case LABEL_REF:
1652 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
1653 differences and differences between each stage's debugging dumps. */
c4c81601
RK
1654 hash += (((unsigned int) LABEL_REF << 7)
1655 + CODE_LABEL_NUMBER (XEXP (x, 0)));
7506f491
DE
1656 return hash;
1657
1658 case SYMBOL_REF:
1659 {
1660 /* Don't hash on the symbol's address to avoid bootstrap differences.
1661 Different hash values may cause expressions to be recorded in
1662 different orders and thus different registers to be used in the
1663 final assembler. This also avoids differences in the dump files
1664 between various stages. */
1665 unsigned int h = 0;
3cce094d 1666 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
c4c81601 1667
7506f491
DE
1668 while (*p)
1669 h += (h << 7) + *p++; /* ??? revisit */
c4c81601
RK
1670
1671 hash += ((unsigned int) SYMBOL_REF << 7) + h;
7506f491
DE
1672 return hash;
1673 }
1674
1675 case MEM:
1676 if (MEM_VOLATILE_P (x))
1677 {
1678 *do_not_record_p = 1;
1679 return 0;
1680 }
c4c81601
RK
1681
1682 hash += (unsigned int) MEM;
d51f3632
JH
1683 /* We used alias set for hashing, but this is not good, since the alias
1684 set may differ in -fprofile-arcs and -fbranch-probabilities compilation
1685 causing the profiles to fail to match. */
7506f491
DE
1686 x = XEXP (x, 0);
1687 goto repeat;
1688
1689 case PRE_DEC:
1690 case PRE_INC:
1691 case POST_DEC:
1692 case POST_INC:
1693 case PC:
1694 case CC0:
1695 case CALL:
1696 case UNSPEC_VOLATILE:
1697 *do_not_record_p = 1;
1698 return 0;
1699
1700 case ASM_OPERANDS:
1701 if (MEM_VOLATILE_P (x))
1702 {
1703 *do_not_record_p = 1;
1704 return 0;
1705 }
6462bb43
AO
1706 else
1707 {
1708 /* We don't want to take the filename and line into account. */
1709 hash += (unsigned) code + (unsigned) GET_MODE (x)
1710 + hash_string_1 (ASM_OPERANDS_TEMPLATE (x))
1711 + hash_string_1 (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
1712 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
1713
1714 if (ASM_OPERANDS_INPUT_LENGTH (x))
1715 {
1716 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
1717 {
1718 hash += (hash_expr_1 (ASM_OPERANDS_INPUT (x, i),
1719 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
1720 do_not_record_p)
1721 + hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT
1722 (x, i)));
1723 }
1724
1725 hash += hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
1726 x = ASM_OPERANDS_INPUT (x, 0);
1727 mode = GET_MODE (x);
1728 goto repeat;
1729 }
1730 return hash;
1731 }
7506f491
DE
1732
1733 default:
1734 break;
1735 }
1736
7506f491 1737 hash += (unsigned) code + (unsigned) GET_MODE (x);
c4c81601 1738 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
1739 {
1740 if (fmt[i] == 'e')
1741 {
7506f491
DE
1742 /* If we are about to do the last recursive call
1743 needed at this level, change it into iteration.
1744 This function is called enough to be worth it. */
1745 if (i == 0)
1746 {
c4c81601 1747 x = XEXP (x, i);
7506f491
DE
1748 goto repeat;
1749 }
c4c81601
RK
1750
1751 hash += hash_expr_1 (XEXP (x, i), 0, do_not_record_p);
7506f491
DE
1752 if (*do_not_record_p)
1753 return 0;
1754 }
c4c81601 1755
7506f491
DE
1756 else if (fmt[i] == 'E')
1757 for (j = 0; j < XVECLEN (x, i); j++)
1758 {
1759 hash += hash_expr_1 (XVECEXP (x, i, j), 0, do_not_record_p);
1760 if (*do_not_record_p)
1761 return 0;
1762 }
c4c81601 1763
7506f491 1764 else if (fmt[i] == 's')
6462bb43 1765 hash += hash_string_1 (XSTR (x, i));
7506f491 1766 else if (fmt[i] == 'i')
c4c81601 1767 hash += (unsigned int) XINT (x, i);
7506f491
DE
1768 else
1769 abort ();
1770 }
1771
1772 return hash;
1773}
1774
1775/* Hash a set of register REGNO.
1776
c4c81601
RK
1777 Sets are hashed on the register that is set. This simplifies the PRE copy
1778 propagation code.
7506f491
DE
1779
1780 ??? May need to make things more elaborate. Later, as necessary. */
1781
1782static unsigned int
1783hash_set (regno, hash_table_size)
1784 int regno;
1785 int hash_table_size;
1786{
1787 unsigned int hash;
1788
1789 hash = regno;
1790 return hash % hash_table_size;
1791}
1792
cc2902df 1793/* Return nonzero if exp1 is equivalent to exp2.
7506f491
DE
1794 ??? Borrowed from cse.c. Might want to remerge with cse.c. Later. */
1795
1796static int
1797expr_equiv_p (x, y)
1798 rtx x, y;
1799{
b3694847
SS
1800 int i, j;
1801 enum rtx_code code;
1802 const char *fmt;
7506f491
DE
1803
1804 if (x == y)
1805 return 1;
c4c81601 1806
7506f491
DE
1807 if (x == 0 || y == 0)
1808 return x == y;
1809
1810 code = GET_CODE (x);
1811 if (code != GET_CODE (y))
1812 return 0;
1813
1814 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1815 if (GET_MODE (x) != GET_MODE (y))
1816 return 0;
1817
1818 switch (code)
1819 {
1820 case PC:
1821 case CC0:
1822 return x == y;
1823
1824 case CONST_INT:
1825 return INTVAL (x) == INTVAL (y);
1826
1827 case LABEL_REF:
1828 return XEXP (x, 0) == XEXP (y, 0);
1829
1830 case SYMBOL_REF:
1831 return XSTR (x, 0) == XSTR (y, 0);
1832
1833 case REG:
1834 return REGNO (x) == REGNO (y);
1835
297c3335
RH
1836 case MEM:
1837 /* Can't merge two expressions in different alias sets, since we can
1838 decide that the expression is transparent in a block when it isn't,
1839 due to it being set with the different alias set. */
1840 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
1841 return 0;
1842 break;
1843
7506f491
DE
1844 /* For commutative operations, check both orders. */
1845 case PLUS:
1846 case MULT:
1847 case AND:
1848 case IOR:
1849 case XOR:
1850 case NE:
1851 case EQ:
1852 return ((expr_equiv_p (XEXP (x, 0), XEXP (y, 0))
1853 && expr_equiv_p (XEXP (x, 1), XEXP (y, 1)))
1854 || (expr_equiv_p (XEXP (x, 0), XEXP (y, 1))
1855 && expr_equiv_p (XEXP (x, 1), XEXP (y, 0))));
1856
6462bb43
AO
1857 case ASM_OPERANDS:
1858 /* We don't use the generic code below because we want to
1859 disregard filename and line numbers. */
1860
1861 /* A volatile asm isn't equivalent to any other. */
1862 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
1863 return 0;
1864
1865 if (GET_MODE (x) != GET_MODE (y)
1866 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
1867 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
1868 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
1869 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
1870 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
1871 return 0;
1872
1873 if (ASM_OPERANDS_INPUT_LENGTH (x))
1874 {
1875 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
1876 if (! expr_equiv_p (ASM_OPERANDS_INPUT (x, i),
1877 ASM_OPERANDS_INPUT (y, i))
1878 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
1879 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
1880 return 0;
1881 }
1882
1883 return 1;
1884
7506f491
DE
1885 default:
1886 break;
1887 }
1888
1889 /* Compare the elements. If any pair of corresponding elements
1890 fail to match, return 0 for the whole thing. */
1891
1892 fmt = GET_RTX_FORMAT (code);
1893 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1894 {
1895 switch (fmt[i])
1896 {
1897 case 'e':
1898 if (! expr_equiv_p (XEXP (x, i), XEXP (y, i)))
1899 return 0;
1900 break;
1901
1902 case 'E':
1903 if (XVECLEN (x, i) != XVECLEN (y, i))
1904 return 0;
1905 for (j = 0; j < XVECLEN (x, i); j++)
1906 if (! expr_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
1907 return 0;
1908 break;
1909
1910 case 's':
1911 if (strcmp (XSTR (x, i), XSTR (y, i)))
1912 return 0;
1913 break;
1914
1915 case 'i':
1916 if (XINT (x, i) != XINT (y, i))
1917 return 0;
1918 break;
1919
1920 case 'w':
1921 if (XWINT (x, i) != XWINT (y, i))
1922 return 0;
1923 break;
1924
1925 case '0':
1926 break;
aaa4ca30 1927
7506f491
DE
1928 default:
1929 abort ();
1930 }
8e42ace1 1931 }
7506f491
DE
1932
1933 return 1;
1934}
1935
02280659 1936/* Insert expression X in INSN in the hash TABLE.
7506f491
DE
1937 If it is already present, record it as the last occurrence in INSN's
1938 basic block.
1939
1940 MODE is the mode of the value X is being stored into.
1941 It is only used if X is a CONST_INT.
1942
cc2902df
KH
1943 ANTIC_P is nonzero if X is an anticipatable expression.
1944 AVAIL_P is nonzero if X is an available expression. */
7506f491
DE
1945
1946static void
02280659 1947insert_expr_in_table (x, mode, insn, antic_p, avail_p, table)
7506f491
DE
1948 rtx x;
1949 enum machine_mode mode;
1950 rtx insn;
1951 int antic_p, avail_p;
02280659 1952 struct hash_table *table;
7506f491
DE
1953{
1954 int found, do_not_record_p;
1955 unsigned int hash;
1956 struct expr *cur_expr, *last_expr = NULL;
1957 struct occr *antic_occr, *avail_occr;
1958 struct occr *last_occr = NULL;
1959
02280659 1960 hash = hash_expr (x, mode, &do_not_record_p, table->size);
7506f491
DE
1961
1962 /* Do not insert expression in table if it contains volatile operands,
1963 or if hash_expr determines the expression is something we don't want
1964 to or can't handle. */
1965 if (do_not_record_p)
1966 return;
1967
02280659 1968 cur_expr = table->table[hash];
7506f491
DE
1969 found = 0;
1970
c4c81601 1971 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
7506f491
DE
1972 {
1973 /* If the expression isn't found, save a pointer to the end of
1974 the list. */
1975 last_expr = cur_expr;
1976 cur_expr = cur_expr->next_same_hash;
1977 }
1978
1979 if (! found)
1980 {
1981 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
1982 bytes_used += sizeof (struct expr);
02280659 1983 if (table->table[hash] == NULL)
c4c81601 1984 /* This is the first pattern that hashed to this index. */
02280659 1985 table->table[hash] = cur_expr;
7506f491 1986 else
c4c81601
RK
1987 /* Add EXPR to end of this hash chain. */
1988 last_expr->next_same_hash = cur_expr;
1989
589005ff 1990 /* Set the fields of the expr element. */
7506f491 1991 cur_expr->expr = x;
02280659 1992 cur_expr->bitmap_index = table->n_elems++;
7506f491
DE
1993 cur_expr->next_same_hash = NULL;
1994 cur_expr->antic_occr = NULL;
1995 cur_expr->avail_occr = NULL;
1996 }
1997
1998 /* Now record the occurrence(s). */
7506f491
DE
1999 if (antic_p)
2000 {
2001 antic_occr = cur_expr->antic_occr;
2002
2003 /* Search for another occurrence in the same basic block. */
2004 while (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
2005 {
2006 /* If an occurrence isn't found, save a pointer to the end of
2007 the list. */
2008 last_occr = antic_occr;
2009 antic_occr = antic_occr->next;
2010 }
2011
2012 if (antic_occr)
c4c81601
RK
2013 /* Found another instance of the expression in the same basic block.
2014 Prefer the currently recorded one. We want the first one in the
2015 block and the block is scanned from start to end. */
2016 ; /* nothing to do */
7506f491
DE
2017 else
2018 {
2019 /* First occurrence of this expression in this basic block. */
2020 antic_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2021 bytes_used += sizeof (struct occr);
2022 /* First occurrence of this expression in any block? */
2023 if (cur_expr->antic_occr == NULL)
2024 cur_expr->antic_occr = antic_occr;
2025 else
2026 last_occr->next = antic_occr;
c4c81601 2027
7506f491
DE
2028 antic_occr->insn = insn;
2029 antic_occr->next = NULL;
2030 }
2031 }
2032
2033 if (avail_p)
2034 {
2035 avail_occr = cur_expr->avail_occr;
2036
2037 /* Search for another occurrence in the same basic block. */
2038 while (avail_occr && BLOCK_NUM (avail_occr->insn) != BLOCK_NUM (insn))
2039 {
2040 /* If an occurrence isn't found, save a pointer to the end of
2041 the list. */
2042 last_occr = avail_occr;
2043 avail_occr = avail_occr->next;
2044 }
2045
2046 if (avail_occr)
c4c81601
RK
2047 /* Found another instance of the expression in the same basic block.
2048 Prefer this occurrence to the currently recorded one. We want
2049 the last one in the block and the block is scanned from start
2050 to end. */
2051 avail_occr->insn = insn;
7506f491
DE
2052 else
2053 {
2054 /* First occurrence of this expression in this basic block. */
2055 avail_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2056 bytes_used += sizeof (struct occr);
c4c81601 2057
7506f491
DE
2058 /* First occurrence of this expression in any block? */
2059 if (cur_expr->avail_occr == NULL)
2060 cur_expr->avail_occr = avail_occr;
2061 else
2062 last_occr->next = avail_occr;
c4c81601 2063
7506f491
DE
2064 avail_occr->insn = insn;
2065 avail_occr->next = NULL;
2066 }
2067 }
2068}
2069
2070/* Insert pattern X in INSN in the hash table.
2071 X is a SET of a reg to either another reg or a constant.
2072 If it is already present, record it as the last occurrence in INSN's
2073 basic block. */
2074
2075static void
02280659 2076insert_set_in_table (x, insn, table)
7506f491
DE
2077 rtx x;
2078 rtx insn;
02280659 2079 struct hash_table *table;
7506f491
DE
2080{
2081 int found;
2082 unsigned int hash;
2083 struct expr *cur_expr, *last_expr = NULL;
2084 struct occr *cur_occr, *last_occr = NULL;
2085
2086 if (GET_CODE (x) != SET
2087 || GET_CODE (SET_DEST (x)) != REG)
2088 abort ();
2089
02280659 2090 hash = hash_set (REGNO (SET_DEST (x)), table->size);
7506f491 2091
02280659 2092 cur_expr = table->table[hash];
7506f491
DE
2093 found = 0;
2094
c4c81601 2095 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
7506f491
DE
2096 {
2097 /* If the expression isn't found, save a pointer to the end of
2098 the list. */
2099 last_expr = cur_expr;
2100 cur_expr = cur_expr->next_same_hash;
2101 }
2102
2103 if (! found)
2104 {
2105 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
2106 bytes_used += sizeof (struct expr);
02280659 2107 if (table->table[hash] == NULL)
c4c81601 2108 /* This is the first pattern that hashed to this index. */
02280659 2109 table->table[hash] = cur_expr;
7506f491 2110 else
c4c81601
RK
2111 /* Add EXPR to end of this hash chain. */
2112 last_expr->next_same_hash = cur_expr;
2113
7506f491
DE
2114 /* Set the fields of the expr element.
2115 We must copy X because it can be modified when copy propagation is
2116 performed on its operands. */
7506f491 2117 cur_expr->expr = copy_rtx (x);
02280659 2118 cur_expr->bitmap_index = table->n_elems++;
7506f491
DE
2119 cur_expr->next_same_hash = NULL;
2120 cur_expr->antic_occr = NULL;
2121 cur_expr->avail_occr = NULL;
2122 }
2123
2124 /* Now record the occurrence. */
7506f491
DE
2125 cur_occr = cur_expr->avail_occr;
2126
2127 /* Search for another occurrence in the same basic block. */
2128 while (cur_occr && BLOCK_NUM (cur_occr->insn) != BLOCK_NUM (insn))
2129 {
2130 /* If an occurrence isn't found, save a pointer to the end of
2131 the list. */
2132 last_occr = cur_occr;
2133 cur_occr = cur_occr->next;
2134 }
2135
2136 if (cur_occr)
c4c81601
RK
2137 /* Found another instance of the expression in the same basic block.
2138 Prefer this occurrence to the currently recorded one. We want the
2139 last one in the block and the block is scanned from start to end. */
2140 cur_occr->insn = insn;
7506f491
DE
2141 else
2142 {
2143 /* First occurrence of this expression in this basic block. */
2144 cur_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2145 bytes_used += sizeof (struct occr);
c4c81601 2146
7506f491
DE
2147 /* First occurrence of this expression in any block? */
2148 if (cur_expr->avail_occr == NULL)
2149 cur_expr->avail_occr = cur_occr;
2150 else
2151 last_occr->next = cur_occr;
c4c81601 2152
7506f491
DE
2153 cur_occr->insn = insn;
2154 cur_occr->next = NULL;
2155 }
2156}
2157
02280659
ZD
2158/* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
2159 expression one). */
7506f491
DE
2160
2161static void
02280659 2162hash_scan_set (pat, insn, table)
7506f491 2163 rtx pat, insn;
02280659 2164 struct hash_table *table;
7506f491
DE
2165{
2166 rtx src = SET_SRC (pat);
2167 rtx dest = SET_DEST (pat);
172890a2 2168 rtx note;
7506f491
DE
2169
2170 if (GET_CODE (src) == CALL)
02280659 2171 hash_scan_call (src, insn, table);
7506f491 2172
172890a2 2173 else if (GET_CODE (dest) == REG)
7506f491 2174 {
172890a2 2175 unsigned int regno = REGNO (dest);
7506f491
DE
2176 rtx tmp;
2177
172890a2
RK
2178 /* If this is a single set and we are doing constant propagation,
2179 see if a REG_NOTE shows this equivalent to a constant. */
02280659 2180 if (table->set_p && (note = find_reg_equal_equiv_note (insn)) != 0
172890a2
RK
2181 && CONSTANT_P (XEXP (note, 0)))
2182 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
2183
7506f491 2184 /* Only record sets of pseudo-regs in the hash table. */
02280659 2185 if (! table->set_p
7506f491
DE
2186 && regno >= FIRST_PSEUDO_REGISTER
2187 /* Don't GCSE something if we can't do a reg/reg copy. */
2188 && can_copy_p [GET_MODE (dest)]
068473ec
JH
2189 /* GCSE commonly inserts instruction after the insn. We can't
2190 do that easily for EH_REGION notes so disable GCSE on these
2191 for now. */
2192 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7506f491 2193 /* Is SET_SRC something we want to gcse? */
172890a2
RK
2194 && want_to_gcse_p (src)
2195 /* Don't CSE a nop. */
43e72072
JJ
2196 && ! set_noop_p (pat)
2197 /* Don't GCSE if it has attached REG_EQUIV note.
2198 At this point this only function parameters should have
2199 REG_EQUIV notes and if the argument slot is used somewhere
a1f300c0 2200 explicitly, it means address of parameter has been taken,
43e72072
JJ
2201 so we should not extend the lifetime of the pseudo. */
2202 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
2203 || GET_CODE (XEXP (note, 0)) != MEM))
7506f491
DE
2204 {
2205 /* An expression is not anticipatable if its operands are
52d76e11
RK
2206 modified before this insn or if this is not the only SET in
2207 this insn. */
2208 int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn);
7506f491 2209 /* An expression is not available if its operands are
eb296bd9
GK
2210 subsequently modified, including this insn. It's also not
2211 available if this is a branch, because we can't insert
2212 a set after the branch. */
2213 int avail_p = (oprs_available_p (src, insn)
2214 && ! JUMP_P (insn));
c4c81601 2215
02280659 2216 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
7506f491 2217 }
c4c81601 2218
7506f491 2219 /* Record sets for constant/copy propagation. */
02280659 2220 else if (table->set_p
7506f491
DE
2221 && regno >= FIRST_PSEUDO_REGISTER
2222 && ((GET_CODE (src) == REG
2223 && REGNO (src) >= FIRST_PSEUDO_REGISTER
172890a2
RK
2224 && can_copy_p [GET_MODE (dest)]
2225 && REGNO (src) != regno)
34ee7f82
RS
2226 || (CONSTANT_P (src)
2227 && GET_CODE (src) != CONSTANT_P_RTX))
7506f491
DE
2228 /* A copy is not available if its src or dest is subsequently
2229 modified. Here we want to search from INSN+1 on, but
2230 oprs_available_p searches from INSN on. */
2231 && (insn == BLOCK_END (BLOCK_NUM (insn))
2232 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
2233 && oprs_available_p (pat, tmp))))
02280659 2234 insert_set_in_table (pat, insn, table);
7506f491 2235 }
7506f491
DE
2236}
2237
2238static void
02280659 2239hash_scan_clobber (x, insn, table)
50b2596f 2240 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
02280659 2241 struct hash_table *table ATTRIBUTE_UNUSED;
7506f491
DE
2242{
2243 /* Currently nothing to do. */
2244}
2245
2246static void
02280659 2247hash_scan_call (x, insn, table)
50b2596f 2248 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
02280659 2249 struct hash_table *table ATTRIBUTE_UNUSED;
7506f491
DE
2250{
2251 /* Currently nothing to do. */
2252}
2253
2254/* Process INSN and add hash table entries as appropriate.
2255
2256 Only available expressions that set a single pseudo-reg are recorded.
2257
2258 Single sets in a PARALLEL could be handled, but it's an extra complication
2259 that isn't dealt with right now. The trick is handling the CLOBBERs that
2260 are also in the PARALLEL. Later.
2261
cc2902df 2262 If SET_P is nonzero, this is for the assignment hash table,
ed79bb3d
R
2263 otherwise it is for the expression hash table.
2264 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
2265 not record any expressions. */
7506f491
DE
2266
2267static void
02280659 2268hash_scan_insn (insn, table, in_libcall_block)
7506f491 2269 rtx insn;
02280659 2270 struct hash_table *table;
48e87cef 2271 int in_libcall_block;
7506f491
DE
2272{
2273 rtx pat = PATTERN (insn);
c4c81601 2274 int i;
7506f491 2275
172890a2
RK
2276 if (in_libcall_block)
2277 return;
2278
7506f491
DE
2279 /* Pick out the sets of INSN and for other forms of instructions record
2280 what's been modified. */
2281
172890a2 2282 if (GET_CODE (pat) == SET)
02280659 2283 hash_scan_set (pat, insn, table);
7506f491 2284 else if (GET_CODE (pat) == PARALLEL)
c4c81601
RK
2285 for (i = 0; i < XVECLEN (pat, 0); i++)
2286 {
2287 rtx x = XVECEXP (pat, 0, i);
7506f491 2288
c4c81601 2289 if (GET_CODE (x) == SET)
02280659 2290 hash_scan_set (x, insn, table);
c4c81601 2291 else if (GET_CODE (x) == CLOBBER)
02280659 2292 hash_scan_clobber (x, insn, table);
c4c81601 2293 else if (GET_CODE (x) == CALL)
02280659 2294 hash_scan_call (x, insn, table);
c4c81601 2295 }
7506f491 2296
7506f491 2297 else if (GET_CODE (pat) == CLOBBER)
02280659 2298 hash_scan_clobber (pat, insn, table);
7506f491 2299 else if (GET_CODE (pat) == CALL)
02280659 2300 hash_scan_call (pat, insn, table);
7506f491
DE
2301}
2302
2303static void
02280659 2304dump_hash_table (file, name, table)
7506f491 2305 FILE *file;
dff01034 2306 const char *name;
02280659 2307 struct hash_table *table;
7506f491
DE
2308{
2309 int i;
2310 /* Flattened out table, so it's printed in proper order. */
4da896b2
MM
2311 struct expr **flat_table;
2312 unsigned int *hash_val;
c4c81601 2313 struct expr *expr;
4da896b2 2314
589005ff 2315 flat_table
02280659
ZD
2316 = (struct expr **) xcalloc (table->n_elems, sizeof (struct expr *));
2317 hash_val = (unsigned int *) xmalloc (table->n_elems * sizeof (unsigned int));
7506f491 2318
02280659
ZD
2319 for (i = 0; i < (int) table->size; i++)
2320 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
2321 {
2322 flat_table[expr->bitmap_index] = expr;
2323 hash_val[expr->bitmap_index] = i;
2324 }
7506f491
DE
2325
2326 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
02280659 2327 name, table->size, table->n_elems);
7506f491 2328
02280659 2329 for (i = 0; i < (int) table->n_elems; i++)
21318741
RK
2330 if (flat_table[i] != 0)
2331 {
a0ac9e5a 2332 expr = flat_table[i];
21318741
RK
2333 fprintf (file, "Index %d (hash value %d)\n ",
2334 expr->bitmap_index, hash_val[i]);
a0ac9e5a 2335 print_rtl (file, expr->expr);
21318741
RK
2336 fprintf (file, "\n");
2337 }
7506f491
DE
2338
2339 fprintf (file, "\n");
4da896b2 2340
4da896b2
MM
2341 free (flat_table);
2342 free (hash_val);
7506f491
DE
2343}
2344
2345/* Record register first/last/block set information for REGNO in INSN.
c4c81601 2346
80c29cc4 2347 first_set records the first place in the block where the register
7506f491 2348 is set and is used to compute "anticipatability".
c4c81601 2349
80c29cc4 2350 last_set records the last place in the block where the register
7506f491 2351 is set and is used to compute "availability".
c4c81601 2352
80c29cc4
RZ
2353 last_bb records the block for which first_set and last_set are
2354 valid, as a quick test to invalidate them.
2355
7506f491
DE
2356 reg_set_in_block records whether the register is set in the block
2357 and is used to compute "transparency". */
2358
2359static void
2360record_last_reg_set_info (insn, regno)
2361 rtx insn;
2362 int regno;
2363{
80c29cc4
RZ
2364 struct reg_avail_info *info = &reg_avail_info[regno];
2365 int cuid = INSN_CUID (insn);
c4c81601 2366
80c29cc4
RZ
2367 info->last_set = cuid;
2368 if (info->last_bb != current_bb)
2369 {
2370 info->last_bb = current_bb;
2371 info->first_set = cuid;
e0082a72 2372 SET_BIT (reg_set_in_block[current_bb->index], regno);
80c29cc4 2373 }
7506f491
DE
2374}
2375
a13d4ebf
AM
2376
2377/* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
2378 Note we store a pair of elements in the list, so they have to be
2379 taken off pairwise. */
2380
589005ff 2381static void
a13d4ebf
AM
2382canon_list_insert (dest, unused1, v_insn)
2383 rtx dest ATTRIBUTE_UNUSED;
2384 rtx unused1 ATTRIBUTE_UNUSED;
2385 void * v_insn;
2386{
2387 rtx dest_addr, insn;
0fe854a7 2388 int bb;
a13d4ebf
AM
2389
2390 while (GET_CODE (dest) == SUBREG
2391 || GET_CODE (dest) == ZERO_EXTRACT
2392 || GET_CODE (dest) == SIGN_EXTRACT
2393 || GET_CODE (dest) == STRICT_LOW_PART)
2394 dest = XEXP (dest, 0);
2395
2396 /* If DEST is not a MEM, then it will not conflict with a load. Note
2397 that function calls are assumed to clobber memory, but are handled
2398 elsewhere. */
2399
2400 if (GET_CODE (dest) != MEM)
2401 return;
2402
2403 dest_addr = get_addr (XEXP (dest, 0));
2404 dest_addr = canon_rtx (dest_addr);
589005ff 2405 insn = (rtx) v_insn;
0fe854a7 2406 bb = BLOCK_NUM (insn);
a13d4ebf 2407
589005ff 2408 canon_modify_mem_list[bb] =
0fe854a7 2409 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
589005ff 2410 canon_modify_mem_list[bb] =
0fe854a7
RH
2411 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
2412 bitmap_set_bit (canon_modify_mem_list_set, bb);
a13d4ebf
AM
2413}
2414
a13d4ebf
AM
2415/* Record memory modification information for INSN. We do not actually care
2416 about the memory location(s) that are set, or even how they are set (consider
2417 a CALL_INSN). We merely need to record which insns modify memory. */
7506f491
DE
2418
2419static void
2420record_last_mem_set_info (insn)
2421 rtx insn;
2422{
0fe854a7
RH
2423 int bb = BLOCK_NUM (insn);
2424
ccef9ef5 2425 /* load_killed_in_block_p will handle the case of calls clobbering
dc297297 2426 everything. */
0fe854a7
RH
2427 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
2428 bitmap_set_bit (modify_mem_list_set, bb);
a13d4ebf
AM
2429
2430 if (GET_CODE (insn) == CALL_INSN)
2431 {
2432 /* Note that traversals of this loop (other than for free-ing)
2433 will break after encountering a CALL_INSN. So, there's no
dc297297 2434 need to insert a pair of items, as canon_list_insert does. */
589005ff
KH
2435 canon_modify_mem_list[bb] =
2436 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
0fe854a7 2437 bitmap_set_bit (canon_modify_mem_list_set, bb);
a13d4ebf
AM
2438 }
2439 else
0fe854a7 2440 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
7506f491
DE
2441}
2442
7506f491 2443/* Called from compute_hash_table via note_stores to handle one
84832317
MM
2444 SET or CLOBBER in an insn. DATA is really the instruction in which
2445 the SET is taking place. */
7506f491
DE
2446
2447static void
84832317 2448record_last_set_info (dest, setter, data)
50b2596f 2449 rtx dest, setter ATTRIBUTE_UNUSED;
84832317 2450 void *data;
7506f491 2451{
84832317
MM
2452 rtx last_set_insn = (rtx) data;
2453
7506f491
DE
2454 if (GET_CODE (dest) == SUBREG)
2455 dest = SUBREG_REG (dest);
2456
2457 if (GET_CODE (dest) == REG)
2458 record_last_reg_set_info (last_set_insn, REGNO (dest));
2459 else if (GET_CODE (dest) == MEM
2460 /* Ignore pushes, they clobber nothing. */
2461 && ! push_operand (dest, GET_MODE (dest)))
2462 record_last_mem_set_info (last_set_insn);
2463}
2464
2465/* Top level function to create an expression or assignment hash table.
2466
2467 Expression entries are placed in the hash table if
2468 - they are of the form (set (pseudo-reg) src),
2469 - src is something we want to perform GCSE on,
2470 - none of the operands are subsequently modified in the block
2471
2472 Assignment entries are placed in the hash table if
2473 - they are of the form (set (pseudo-reg) src),
2474 - src is something we want to perform const/copy propagation on,
2475 - none of the operands or target are subsequently modified in the block
c4c81601 2476
7506f491
DE
2477 Currently src must be a pseudo-reg or a const_int.
2478
02280659 2479 TABLE is the table computed. */
7506f491
DE
2480
2481static void
02280659
ZD
2482compute_hash_table_work (table)
2483 struct hash_table *table;
7506f491 2484{
80c29cc4 2485 unsigned int i;
7506f491
DE
2486
2487 /* While we compute the hash table we also compute a bit array of which
2488 registers are set in which blocks.
7506f491
DE
2489 ??? This isn't needed during const/copy propagation, but it's cheap to
2490 compute. Later. */
d55bc081 2491 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
7506f491 2492
a13d4ebf 2493 /* re-Cache any INSN_LIST nodes we have allocated. */
73991d6a 2494 clear_modify_mem_tables ();
7506f491 2495 /* Some working arrays used to track first and last set in each block. */
80c29cc4
RZ
2496 reg_avail_info = (struct reg_avail_info*)
2497 gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
2498
2499 for (i = 0; i < max_gcse_regno; ++i)
e0082a72 2500 reg_avail_info[i].last_bb = NULL;
7506f491 2501
e0082a72 2502 FOR_EACH_BB (current_bb)
7506f491
DE
2503 {
2504 rtx insn;
770ae6cc 2505 unsigned int regno;
ed79bb3d 2506 int in_libcall_block;
7506f491
DE
2507
2508 /* First pass over the instructions records information used to
2509 determine when registers and memory are first and last set.
ccef9ef5 2510 ??? hard-reg reg_set_in_block computation
7506f491
DE
2511 could be moved to compute_sets since they currently don't change. */
2512
e0082a72
ZD
2513 for (insn = current_bb->head;
2514 insn && insn != NEXT_INSN (current_bb->end);
7506f491
DE
2515 insn = NEXT_INSN (insn))
2516 {
2c3c49de 2517 if (! INSN_P (insn))
7506f491
DE
2518 continue;
2519
2520 if (GET_CODE (insn) == CALL_INSN)
2521 {
19652adf 2522 bool clobbers_all = false;
589005ff 2523#ifdef NON_SAVING_SETJMP
19652adf
ZW
2524 if (NON_SAVING_SETJMP
2525 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
2526 clobbers_all = true;
2527#endif
2528
7506f491 2529 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
19652adf
ZW
2530 if (clobbers_all
2531 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
7506f491 2532 record_last_reg_set_info (insn, regno);
c4c81601 2533
24a28584 2534 mark_call (insn);
7506f491
DE
2535 }
2536
84832317 2537 note_stores (PATTERN (insn), record_last_set_info, insn);
7506f491
DE
2538 }
2539
fbef91d8
RS
2540 /* Insert implicit sets in the hash table. */
2541 if (table->set_p
2542 && implicit_sets[current_bb->index] != NULL_RTX)
2543 hash_scan_set (implicit_sets[current_bb->index],
2544 current_bb->head, table);
2545
7506f491
DE
2546 /* The next pass builds the hash table. */
2547
e0082a72
ZD
2548 for (insn = current_bb->head, in_libcall_block = 0;
2549 insn && insn != NEXT_INSN (current_bb->end);
7506f491 2550 insn = NEXT_INSN (insn))
2c3c49de 2551 if (INSN_P (insn))
c4c81601
RK
2552 {
2553 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
589005ff 2554 in_libcall_block = 1;
02280659 2555 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
589005ff 2556 in_libcall_block = 0;
02280659
ZD
2557 hash_scan_insn (insn, table, in_libcall_block);
2558 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
589005ff 2559 in_libcall_block = 0;
8e42ace1 2560 }
7506f491
DE
2561 }
2562
80c29cc4
RZ
2563 free (reg_avail_info);
2564 reg_avail_info = NULL;
7506f491
DE
2565}
2566
02280659 2567/* Allocate space for the set/expr hash TABLE.
7506f491 2568 N_INSNS is the number of instructions in the function.
02280659
ZD
2569 It is used to determine the number of buckets to use.
2570 SET_P determines whether set or expression table will
2571 be created. */
7506f491
DE
2572
2573static void
02280659 2574alloc_hash_table (n_insns, table, set_p)
7506f491 2575 int n_insns;
02280659
ZD
2576 struct hash_table *table;
2577 int set_p;
7506f491
DE
2578{
2579 int n;
2580
02280659
ZD
2581 table->size = n_insns / 4;
2582 if (table->size < 11)
2583 table->size = 11;
c4c81601 2584
7506f491
DE
2585 /* Attempt to maintain efficient use of hash table.
2586 Making it an odd number is simplest for now.
2587 ??? Later take some measurements. */
02280659
ZD
2588 table->size |= 1;
2589 n = table->size * sizeof (struct expr *);
2590 table->table = (struct expr **) gmalloc (n);
2591 table->set_p = set_p;
7506f491
DE
2592}
2593
02280659 2594/* Free things allocated by alloc_hash_table. */
7506f491
DE
2595
2596static void
02280659
ZD
2597free_hash_table (table)
2598 struct hash_table *table;
7506f491 2599{
02280659 2600 free (table->table);
7506f491
DE
2601}
2602
02280659
ZD
2603/* Compute the hash TABLE for doing copy/const propagation or
2604 expression hash table. */
7506f491
DE
2605
2606static void
02280659
ZD
2607compute_hash_table (table)
2608 struct hash_table *table;
7506f491
DE
2609{
2610 /* Initialize count of number of entries in hash table. */
02280659
ZD
2611 table->n_elems = 0;
2612 memset ((char *) table->table, 0,
2613 table->size * sizeof (struct expr *));
7506f491 2614
02280659 2615 compute_hash_table_work (table);
7506f491
DE
2616}
2617\f
2618/* Expression tracking support. */
2619
02280659 2620/* Lookup pattern PAT in the expression TABLE.
7506f491
DE
2621 The result is a pointer to the table entry, or NULL if not found. */
2622
2623static struct expr *
02280659 2624lookup_expr (pat, table)
7506f491 2625 rtx pat;
02280659 2626 struct hash_table *table;
7506f491
DE
2627{
2628 int do_not_record_p;
2629 unsigned int hash = hash_expr (pat, GET_MODE (pat), &do_not_record_p,
02280659 2630 table->size);
7506f491
DE
2631 struct expr *expr;
2632
2633 if (do_not_record_p)
2634 return NULL;
2635
02280659 2636 expr = table->table[hash];
7506f491
DE
2637
2638 while (expr && ! expr_equiv_p (expr->expr, pat))
2639 expr = expr->next_same_hash;
2640
2641 return expr;
2642}
2643
ceda50e9
RH
2644/* Lookup REGNO in the set TABLE. The result is a pointer to the
2645 table entry, or NULL if not found. */
7506f491
DE
2646
2647static struct expr *
ceda50e9 2648lookup_set (regno, table)
770ae6cc 2649 unsigned int regno;
02280659 2650 struct hash_table *table;
7506f491 2651{
02280659 2652 unsigned int hash = hash_set (regno, table->size);
7506f491
DE
2653 struct expr *expr;
2654
02280659 2655 expr = table->table[hash];
7506f491 2656
ceda50e9
RH
2657 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2658 expr = expr->next_same_hash;
7506f491
DE
2659
2660 return expr;
2661}
2662
2663/* Return the next entry for REGNO in list EXPR. */
2664
2665static struct expr *
2666next_set (regno, expr)
770ae6cc 2667 unsigned int regno;
7506f491
DE
2668 struct expr *expr;
2669{
2670 do
2671 expr = expr->next_same_hash;
2672 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
c4c81601 2673
7506f491
DE
2674 return expr;
2675}
2676
0fe854a7
RH
2677/* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2678 types may be mixed. */
2679
2680static void
2681free_insn_expr_list_list (listp)
2682 rtx *listp;
2683{
2684 rtx list, next;
2685
2686 for (list = *listp; list ; list = next)
2687 {
2688 next = XEXP (list, 1);
2689 if (GET_CODE (list) == EXPR_LIST)
2690 free_EXPR_LIST_node (list);
2691 else
2692 free_INSN_LIST_node (list);
2693 }
2694
2695 *listp = NULL;
2696}
2697
73991d6a
JH
2698/* Clear canon_modify_mem_list and modify_mem_list tables. */
2699static void
2700clear_modify_mem_tables ()
2701{
2702 int i;
2703
2704 EXECUTE_IF_SET_IN_BITMAP
0fe854a7
RH
2705 (modify_mem_list_set, 0, i, free_INSN_LIST_list (modify_mem_list + i));
2706 bitmap_clear (modify_mem_list_set);
73991d6a
JH
2707
2708 EXECUTE_IF_SET_IN_BITMAP
2709 (canon_modify_mem_list_set, 0, i,
0fe854a7
RH
2710 free_insn_expr_list_list (canon_modify_mem_list + i));
2711 bitmap_clear (canon_modify_mem_list_set);
73991d6a
JH
2712}
2713
2714/* Release memory used by modify_mem_list_set and canon_modify_mem_list_set. */
2715
2716static void
2717free_modify_mem_tables ()
2718{
2719 clear_modify_mem_tables ();
2720 free (modify_mem_list);
2721 free (canon_modify_mem_list);
2722 modify_mem_list = 0;
2723 canon_modify_mem_list = 0;
2724}
2725
7506f491
DE
2726/* Reset tables used to keep track of what's still available [since the
2727 start of the block]. */
2728
2729static void
2730reset_opr_set_tables ()
2731{
2732 /* Maintain a bitmap of which regs have been set since beginning of
2733 the block. */
73991d6a 2734 CLEAR_REG_SET (reg_set_bitmap);
c4c81601 2735
7506f491
DE
2736 /* Also keep a record of the last instruction to modify memory.
2737 For now this is very trivial, we only record whether any memory
2738 location has been modified. */
73991d6a 2739 clear_modify_mem_tables ();
7506f491
DE
2740}
2741
cc2902df 2742/* Return nonzero if the operands of X are not set before INSN in
7506f491
DE
2743 INSN's basic block. */
2744
2745static int
2746oprs_not_set_p (x, insn)
2747 rtx x, insn;
2748{
c4c81601 2749 int i, j;
7506f491 2750 enum rtx_code code;
6f7d635c 2751 const char *fmt;
7506f491 2752
7506f491
DE
2753 if (x == 0)
2754 return 1;
2755
2756 code = GET_CODE (x);
2757 switch (code)
2758 {
2759 case PC:
2760 case CC0:
2761 case CONST:
2762 case CONST_INT:
2763 case CONST_DOUBLE:
69ef87e2 2764 case CONST_VECTOR:
7506f491
DE
2765 case SYMBOL_REF:
2766 case LABEL_REF:
2767 case ADDR_VEC:
2768 case ADDR_DIFF_VEC:
2769 return 1;
2770
2771 case MEM:
589005ff 2772 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
e2d2ed72 2773 INSN_CUID (insn), x, 0))
a13d4ebf 2774 return 0;
c4c81601
RK
2775 else
2776 return oprs_not_set_p (XEXP (x, 0), insn);
7506f491
DE
2777
2778 case REG:
73991d6a 2779 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
7506f491
DE
2780
2781 default:
2782 break;
2783 }
2784
c4c81601 2785 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
2786 {
2787 if (fmt[i] == 'e')
2788 {
7506f491
DE
2789 /* If we are about to do the last recursive call
2790 needed at this level, change it into iteration.
2791 This function is called enough to be worth it. */
2792 if (i == 0)
c4c81601
RK
2793 return oprs_not_set_p (XEXP (x, i), insn);
2794
2795 if (! oprs_not_set_p (XEXP (x, i), insn))
7506f491
DE
2796 return 0;
2797 }
2798 else if (fmt[i] == 'E')
c4c81601
RK
2799 for (j = 0; j < XVECLEN (x, i); j++)
2800 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2801 return 0;
7506f491
DE
2802 }
2803
2804 return 1;
2805}
2806
2807/* Mark things set by a CALL. */
2808
2809static void
b5ce41ff
JL
2810mark_call (insn)
2811 rtx insn;
7506f491 2812{
24a28584 2813 if (! CONST_OR_PURE_CALL_P (insn))
a13d4ebf 2814 record_last_mem_set_info (insn);
7506f491
DE
2815}
2816
2817/* Mark things set by a SET. */
2818
2819static void
2820mark_set (pat, insn)
2821 rtx pat, insn;
2822{
2823 rtx dest = SET_DEST (pat);
2824
2825 while (GET_CODE (dest) == SUBREG
2826 || GET_CODE (dest) == ZERO_EXTRACT
2827 || GET_CODE (dest) == SIGN_EXTRACT
2828 || GET_CODE (dest) == STRICT_LOW_PART)
2829 dest = XEXP (dest, 0);
2830
a13d4ebf 2831 if (GET_CODE (dest) == REG)
73991d6a 2832 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
a13d4ebf
AM
2833 else if (GET_CODE (dest) == MEM)
2834 record_last_mem_set_info (insn);
2835
7506f491 2836 if (GET_CODE (SET_SRC (pat)) == CALL)
b5ce41ff 2837 mark_call (insn);
7506f491
DE
2838}
2839
2840/* Record things set by a CLOBBER. */
2841
2842static void
2843mark_clobber (pat, insn)
2844 rtx pat, insn;
2845{
2846 rtx clob = XEXP (pat, 0);
2847
2848 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2849 clob = XEXP (clob, 0);
2850
a13d4ebf 2851 if (GET_CODE (clob) == REG)
73991d6a 2852 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
a13d4ebf
AM
2853 else
2854 record_last_mem_set_info (insn);
7506f491
DE
2855}
2856
2857/* Record things set by INSN.
2858 This data is used by oprs_not_set_p. */
2859
2860static void
2861mark_oprs_set (insn)
2862 rtx insn;
2863{
2864 rtx pat = PATTERN (insn);
c4c81601 2865 int i;
7506f491
DE
2866
2867 if (GET_CODE (pat) == SET)
2868 mark_set (pat, insn);
2869 else if (GET_CODE (pat) == PARALLEL)
c4c81601
RK
2870 for (i = 0; i < XVECLEN (pat, 0); i++)
2871 {
2872 rtx x = XVECEXP (pat, 0, i);
2873
2874 if (GET_CODE (x) == SET)
2875 mark_set (x, insn);
2876 else if (GET_CODE (x) == CLOBBER)
2877 mark_clobber (x, insn);
2878 else if (GET_CODE (x) == CALL)
2879 mark_call (insn);
2880 }
7506f491 2881
7506f491
DE
2882 else if (GET_CODE (pat) == CLOBBER)
2883 mark_clobber (pat, insn);
2884 else if (GET_CODE (pat) == CALL)
b5ce41ff 2885 mark_call (insn);
7506f491 2886}
b5ce41ff 2887
7506f491
DE
2888\f
2889/* Classic GCSE reaching definition support. */
2890
2891/* Allocate reaching def variables. */
2892
2893static void
2894alloc_rd_mem (n_blocks, n_insns)
2895 int n_blocks, n_insns;
2896{
2897 rd_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2898 sbitmap_vector_zero (rd_kill, n_blocks);
7506f491
DE
2899
2900 rd_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2901 sbitmap_vector_zero (rd_gen, n_blocks);
7506f491
DE
2902
2903 reaching_defs = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2904 sbitmap_vector_zero (reaching_defs, n_blocks);
7506f491
DE
2905
2906 rd_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2907 sbitmap_vector_zero (rd_out, n_blocks);
7506f491
DE
2908}
2909
2910/* Free reaching def variables. */
2911
2912static void
2913free_rd_mem ()
2914{
5a660bff
DB
2915 sbitmap_vector_free (rd_kill);
2916 sbitmap_vector_free (rd_gen);
2917 sbitmap_vector_free (reaching_defs);
2918 sbitmap_vector_free (rd_out);
7506f491
DE
2919}
2920
c4c81601 2921/* Add INSN to the kills of BB. REGNO, set in BB, is killed by INSN. */
7506f491
DE
2922
2923static void
2924handle_rd_kill_set (insn, regno, bb)
2925 rtx insn;
e2d2ed72
AM
2926 int regno;
2927 basic_block bb;
7506f491 2928{
c4c81601 2929 struct reg_set *this_reg;
7506f491 2930
c4c81601
RK
2931 for (this_reg = reg_set_table[regno]; this_reg; this_reg = this_reg ->next)
2932 if (BLOCK_NUM (this_reg->insn) != BLOCK_NUM (insn))
0b17ab2f 2933 SET_BIT (rd_kill[bb->index], INSN_CUID (this_reg->insn));
7506f491
DE
2934}
2935
7506f491
DE
2936/* Compute the set of kill's for reaching definitions. */
2937
2938static void
2939compute_kill_rd ()
2940{
e0082a72 2941 int cuid;
172890a2
RK
2942 unsigned int regno;
2943 int i;
e0082a72 2944 basic_block bb;
7506f491
DE
2945
2946 /* For each block
2947 For each set bit in `gen' of the block (i.e each insn which
ac7c5af5
JL
2948 generates a definition in the block)
2949 Call the reg set by the insn corresponding to that bit regx
2950 Look at the linked list starting at reg_set_table[regx]
2951 For each setting of regx in the linked list, which is not in
2952 this block
6d2f8887 2953 Set the bit in `kill' corresponding to that insn. */
e0082a72 2954 FOR_EACH_BB (bb)
c4c81601 2955 for (cuid = 0; cuid < max_cuid; cuid++)
e0082a72 2956 if (TEST_BIT (rd_gen[bb->index], cuid))
7506f491 2957 {
c4c81601
RK
2958 rtx insn = CUID_INSN (cuid);
2959 rtx pat = PATTERN (insn);
7506f491 2960
c4c81601
RK
2961 if (GET_CODE (insn) == CALL_INSN)
2962 {
2963 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4e2db584 2964 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
e0082a72 2965 handle_rd_kill_set (insn, regno, bb);
c4c81601 2966 }
7506f491 2967
c4c81601
RK
2968 if (GET_CODE (pat) == PARALLEL)
2969 {
2970 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7506f491 2971 {
c4c81601 2972 enum rtx_code code = GET_CODE (XVECEXP (pat, 0, i));
7506f491 2973
c4c81601
RK
2974 if ((code == SET || code == CLOBBER)
2975 && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == REG)
2976 handle_rd_kill_set (insn,
2977 REGNO (XEXP (XVECEXP (pat, 0, i), 0)),
e0082a72 2978 bb);
ac7c5af5 2979 }
ac7c5af5 2980 }
c4c81601
RK
2981 else if (GET_CODE (pat) == SET && GET_CODE (SET_DEST (pat)) == REG)
2982 /* Each setting of this register outside of this block
2983 must be marked in the set of kills in this block. */
e0082a72 2984 handle_rd_kill_set (insn, REGNO (SET_DEST (pat)), bb);
7506f491 2985 }
7506f491
DE
2986}
2987
589005ff 2988/* Compute the reaching definitions as in
7506f491
DE
2989 Compilers Principles, Techniques, and Tools. Aho, Sethi, Ullman,
2990 Chapter 10. It is the same algorithm as used for computing available
2991 expressions but applied to the gens and kills of reaching definitions. */
2992
2993static void
2994compute_rd ()
2995{
e0082a72
ZD
2996 int changed, passes;
2997 basic_block bb;
7506f491 2998
e0082a72
ZD
2999 FOR_EACH_BB (bb)
3000 sbitmap_copy (rd_out[bb->index] /*dst*/, rd_gen[bb->index] /*src*/);
7506f491
DE
3001
3002 passes = 0;
3003 changed = 1;
3004 while (changed)
3005 {
3006 changed = 0;
e0082a72 3007 FOR_EACH_BB (bb)
ac7c5af5 3008 {
e0082a72
ZD
3009 sbitmap_union_of_preds (reaching_defs[bb->index], rd_out, bb->index);
3010 changed |= sbitmap_union_of_diff_cg (rd_out[bb->index], rd_gen[bb->index],
3011 reaching_defs[bb->index], rd_kill[bb->index]);
ac7c5af5 3012 }
7506f491
DE
3013 passes++;
3014 }
3015
3016 if (gcse_file)
3017 fprintf (gcse_file, "reaching def computation: %d passes\n", passes);
3018}
3019\f
3020/* Classic GCSE available expression support. */
3021
3022/* Allocate memory for available expression computation. */
3023
3024static void
3025alloc_avail_expr_mem (n_blocks, n_exprs)
3026 int n_blocks, n_exprs;
3027{
3028 ae_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3029 sbitmap_vector_zero (ae_kill, n_blocks);
7506f491
DE
3030
3031 ae_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3032 sbitmap_vector_zero (ae_gen, n_blocks);
7506f491
DE
3033
3034 ae_in = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3035 sbitmap_vector_zero (ae_in, n_blocks);
7506f491
DE
3036
3037 ae_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3038 sbitmap_vector_zero (ae_out, n_blocks);
7506f491
DE
3039}
3040
3041static void
3042free_avail_expr_mem ()
3043{
5a660bff
DB
3044 sbitmap_vector_free (ae_kill);
3045 sbitmap_vector_free (ae_gen);
3046 sbitmap_vector_free (ae_in);
3047 sbitmap_vector_free (ae_out);
7506f491
DE
3048}
3049
3050/* Compute the set of available expressions generated in each basic block. */
3051
3052static void
02280659
ZD
3053compute_ae_gen (expr_hash_table)
3054 struct hash_table *expr_hash_table;
7506f491 3055{
2e653e39 3056 unsigned int i;
c4c81601
RK
3057 struct expr *expr;
3058 struct occr *occr;
7506f491
DE
3059
3060 /* For each recorded occurrence of each expression, set ae_gen[bb][expr].
3061 This is all we have to do because an expression is not recorded if it
3062 is not available, and the only expressions we want to work with are the
3063 ones that are recorded. */
02280659
ZD
3064 for (i = 0; i < expr_hash_table->size; i++)
3065 for (expr = expr_hash_table->table[i]; expr != 0; expr = expr->next_same_hash)
c4c81601
RK
3066 for (occr = expr->avail_occr; occr != 0; occr = occr->next)
3067 SET_BIT (ae_gen[BLOCK_NUM (occr->insn)], expr->bitmap_index);
7506f491
DE
3068}
3069
cc2902df 3070/* Return nonzero if expression X is killed in BB. */
7506f491
DE
3071
3072static int
3073expr_killed_p (x, bb)
3074 rtx x;
e2d2ed72 3075 basic_block bb;
7506f491 3076{
c4c81601 3077 int i, j;
7506f491 3078 enum rtx_code code;
6f7d635c 3079 const char *fmt;
7506f491 3080
7506f491
DE
3081 if (x == 0)
3082 return 1;
3083
3084 code = GET_CODE (x);
3085 switch (code)
3086 {
3087 case REG:
0b17ab2f 3088 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
7506f491
DE
3089
3090 case MEM:
a13d4ebf
AM
3091 if (load_killed_in_block_p (bb, get_max_uid () + 1, x, 0))
3092 return 1;
c4c81601
RK
3093 else
3094 return expr_killed_p (XEXP (x, 0), bb);
7506f491
DE
3095
3096 case PC:
3097 case CC0: /*FIXME*/
3098 case CONST:
3099 case CONST_INT:
3100 case CONST_DOUBLE:
69ef87e2 3101 case CONST_VECTOR:
7506f491
DE
3102 case SYMBOL_REF:
3103 case LABEL_REF:
3104 case ADDR_VEC:
3105 case ADDR_DIFF_VEC:
3106 return 0;
3107
3108 default:
3109 break;
3110 }
3111
c4c81601 3112 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3113 {
3114 if (fmt[i] == 'e')
3115 {
7506f491
DE
3116 /* If we are about to do the last recursive call
3117 needed at this level, change it into iteration.
3118 This function is called enough to be worth it. */
3119 if (i == 0)
c4c81601
RK
3120 return expr_killed_p (XEXP (x, i), bb);
3121 else if (expr_killed_p (XEXP (x, i), bb))
7506f491
DE
3122 return 1;
3123 }
3124 else if (fmt[i] == 'E')
c4c81601
RK
3125 for (j = 0; j < XVECLEN (x, i); j++)
3126 if (expr_killed_p (XVECEXP (x, i, j), bb))
3127 return 1;
7506f491
DE
3128 }
3129
3130 return 0;
3131}
3132
3133/* Compute the set of available expressions killed in each basic block. */
3134
3135static void
02280659 3136compute_ae_kill (ae_gen, ae_kill, expr_hash_table)
a42cd965 3137 sbitmap *ae_gen, *ae_kill;
02280659 3138 struct hash_table *expr_hash_table;
7506f491 3139{
e0082a72 3140 basic_block bb;
2e653e39 3141 unsigned int i;
c4c81601 3142 struct expr *expr;
7506f491 3143
e0082a72 3144 FOR_EACH_BB (bb)
02280659
ZD
3145 for (i = 0; i < expr_hash_table->size; i++)
3146 for (expr = expr_hash_table->table[i]; expr; expr = expr->next_same_hash)
7506f491 3147 {
c4c81601 3148 /* Skip EXPR if generated in this block. */
e0082a72 3149 if (TEST_BIT (ae_gen[bb->index], expr->bitmap_index))
c4c81601 3150 continue;
7506f491 3151
e0082a72
ZD
3152 if (expr_killed_p (expr->expr, bb))
3153 SET_BIT (ae_kill[bb->index], expr->bitmap_index);
7506f491 3154 }
7506f491 3155}
7506f491
DE
3156\f
3157/* Actually perform the Classic GCSE optimizations. */
3158
cc2902df 3159/* Return nonzero if occurrence OCCR of expression EXPR reaches block BB.
7506f491 3160
cc2902df 3161 CHECK_SELF_LOOP is nonzero if we should consider a block reaching itself
7506f491
DE
3162 as a positive reach. We want to do this when there are two computations
3163 of the expression in the block.
3164
3165 VISITED is a pointer to a working buffer for tracking which BB's have
3166 been visited. It is NULL for the top-level call.
3167
3168 We treat reaching expressions that go through blocks containing the same
3169 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3170 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3171 2 as not reaching. The intent is to improve the probability of finding
3172 only one reaching expression and to reduce register lifetimes by picking
3173 the closest such expression. */
3174
3175static int
283a2545 3176expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited)
7506f491
DE
3177 struct occr *occr;
3178 struct expr *expr;
e2d2ed72 3179 basic_block bb;
7506f491
DE
3180 int check_self_loop;
3181 char *visited;
3182{
36349f8b 3183 edge pred;
7506f491 3184
e2d2ed72 3185 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7506f491 3186 {
e2d2ed72 3187 basic_block pred_bb = pred->src;
7506f491 3188
0b17ab2f 3189 if (visited[pred_bb->index])
c4c81601 3190 /* This predecessor has already been visited. Nothing to do. */
7506f491 3191 ;
7506f491 3192 else if (pred_bb == bb)
ac7c5af5 3193 {
7506f491
DE
3194 /* BB loops on itself. */
3195 if (check_self_loop
0b17ab2f
RH
3196 && TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index)
3197 && BLOCK_NUM (occr->insn) == pred_bb->index)
7506f491 3198 return 1;
c4c81601 3199
0b17ab2f 3200 visited[pred_bb->index] = 1;
ac7c5af5 3201 }
c4c81601 3202
7506f491 3203 /* Ignore this predecessor if it kills the expression. */
0b17ab2f
RH
3204 else if (TEST_BIT (ae_kill[pred_bb->index], expr->bitmap_index))
3205 visited[pred_bb->index] = 1;
c4c81601 3206
7506f491 3207 /* Does this predecessor generate this expression? */
0b17ab2f 3208 else if (TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index))
7506f491
DE
3209 {
3210 /* Is this the occurrence we're looking for?
3211 Note that there's only one generating occurrence per block
3212 so we just need to check the block number. */
0b17ab2f 3213 if (BLOCK_NUM (occr->insn) == pred_bb->index)
7506f491 3214 return 1;
c4c81601 3215
0b17ab2f 3216 visited[pred_bb->index] = 1;
7506f491 3217 }
c4c81601 3218
7506f491
DE
3219 /* Neither gen nor kill. */
3220 else
ac7c5af5 3221 {
0b17ab2f 3222 visited[pred_bb->index] = 1;
589005ff 3223 if (expr_reaches_here_p_work (occr, expr, pred_bb, check_self_loop,
283a2545 3224 visited))
c4c81601 3225
7506f491 3226 return 1;
ac7c5af5 3227 }
7506f491
DE
3228 }
3229
3230 /* All paths have been checked. */
3231 return 0;
3232}
3233
283a2545 3234/* This wrapper for expr_reaches_here_p_work() is to ensure that any
dc297297 3235 memory allocated for that function is returned. */
283a2545
RL
3236
3237static int
3238expr_reaches_here_p (occr, expr, bb, check_self_loop)
3239 struct occr *occr;
3240 struct expr *expr;
e2d2ed72 3241 basic_block bb;
283a2545
RL
3242 int check_self_loop;
3243{
3244 int rval;
d55bc081 3245 char *visited = (char *) xcalloc (last_basic_block, 1);
283a2545 3246
c4c81601 3247 rval = expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited);
589005ff 3248
283a2545 3249 free (visited);
c4c81601 3250 return rval;
283a2545
RL
3251}
3252
7506f491
DE
3253/* Return the instruction that computes EXPR that reaches INSN's basic block.
3254 If there is more than one such instruction, return NULL.
3255
3256 Called only by handle_avail_expr. */
3257
3258static rtx
3259computing_insn (expr, insn)
3260 struct expr *expr;
3261 rtx insn;
3262{
e2d2ed72 3263 basic_block bb = BLOCK_FOR_INSN (insn);
7506f491
DE
3264
3265 if (expr->avail_occr->next == NULL)
589005ff 3266 {
e2d2ed72 3267 if (BLOCK_FOR_INSN (expr->avail_occr->insn) == bb)
c4c81601
RK
3268 /* The available expression is actually itself
3269 (i.e. a loop in the flow graph) so do nothing. */
3270 return NULL;
3271
7506f491
DE
3272 /* (FIXME) Case that we found a pattern that was created by
3273 a substitution that took place. */
3274 return expr->avail_occr->insn;
3275 }
3276 else
3277 {
3278 /* Pattern is computed more than once.
589005ff 3279 Search backwards from this insn to see how many of these
7506f491
DE
3280 computations actually reach this insn. */
3281 struct occr *occr;
3282 rtx insn_computes_expr = NULL;
3283 int can_reach = 0;
3284
3285 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
3286 {
e2d2ed72 3287 if (BLOCK_FOR_INSN (occr->insn) == bb)
7506f491
DE
3288 {
3289 /* The expression is generated in this block.
3290 The only time we care about this is when the expression
3291 is generated later in the block [and thus there's a loop].
3292 We let the normal cse pass handle the other cases. */
c4c81601
RK
3293 if (INSN_CUID (insn) < INSN_CUID (occr->insn)
3294 && expr_reaches_here_p (occr, expr, bb, 1))
7506f491
DE
3295 {
3296 can_reach++;
3297 if (can_reach > 1)
3298 return NULL;
c4c81601 3299
7506f491
DE
3300 insn_computes_expr = occr->insn;
3301 }
3302 }
c4c81601
RK
3303 else if (expr_reaches_here_p (occr, expr, bb, 0))
3304 {
3305 can_reach++;
3306 if (can_reach > 1)
3307 return NULL;
3308
3309 insn_computes_expr = occr->insn;
3310 }
7506f491
DE
3311 }
3312
3313 if (insn_computes_expr == NULL)
3314 abort ();
c4c81601 3315
7506f491
DE
3316 return insn_computes_expr;
3317 }
3318}
3319
cc2902df 3320/* Return nonzero if the definition in DEF_INSN can reach INSN.
7506f491
DE
3321 Only called by can_disregard_other_sets. */
3322
3323static int
3324def_reaches_here_p (insn, def_insn)
3325 rtx insn, def_insn;
3326{
3327 rtx reg;
3328
3329 if (TEST_BIT (reaching_defs[BLOCK_NUM (insn)], INSN_CUID (def_insn)))
3330 return 1;
3331
3332 if (BLOCK_NUM (insn) == BLOCK_NUM (def_insn))
3333 {
3334 if (INSN_CUID (def_insn) < INSN_CUID (insn))
ac7c5af5 3335 {
7506f491
DE
3336 if (GET_CODE (PATTERN (def_insn)) == PARALLEL)
3337 return 1;
c4c81601 3338 else if (GET_CODE (PATTERN (def_insn)) == CLOBBER)
7506f491
DE
3339 reg = XEXP (PATTERN (def_insn), 0);
3340 else if (GET_CODE (PATTERN (def_insn)) == SET)
3341 reg = SET_DEST (PATTERN (def_insn));
3342 else
3343 abort ();
c4c81601 3344
7506f491
DE
3345 return ! reg_set_between_p (reg, NEXT_INSN (def_insn), insn);
3346 }
3347 else
3348 return 0;
3349 }
3350
3351 return 0;
3352}
3353
cc2902df 3354/* Return nonzero if *ADDR_THIS_REG can only have one value at INSN. The
c4c81601
RK
3355 value returned is the number of definitions that reach INSN. Returning a
3356 value of zero means that [maybe] more than one definition reaches INSN and
3357 the caller can't perform whatever optimization it is trying. i.e. it is
3358 always safe to return zero. */
7506f491
DE
3359
3360static int
3361can_disregard_other_sets (addr_this_reg, insn, for_combine)
3362 struct reg_set **addr_this_reg;
3363 rtx insn;
3364 int for_combine;
3365{
3366 int number_of_reaching_defs = 0;
c4c81601 3367 struct reg_set *this_reg;
7506f491 3368
c4c81601
RK
3369 for (this_reg = *addr_this_reg; this_reg != 0; this_reg = this_reg->next)
3370 if (def_reaches_here_p (insn, this_reg->insn))
3371 {
3372 number_of_reaching_defs++;
3373 /* Ignore parallels for now. */
3374 if (GET_CODE (PATTERN (this_reg->insn)) == PARALLEL)
3375 return 0;
3376
3377 if (!for_combine
3378 && (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER
3379 || ! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3380 SET_SRC (PATTERN (insn)))))
3381 /* A setting of the reg to a different value reaches INSN. */
3382 return 0;
3383
3384 if (number_of_reaching_defs > 1)
3385 {
3386 /* If in this setting the value the register is being set to is
3387 equal to the previous value the register was set to and this
3388 setting reaches the insn we are trying to do the substitution
3389 on then we are ok. */
3390 if (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER)
7506f491 3391 return 0;
c4c81601
RK
3392 else if (! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3393 SET_SRC (PATTERN (insn))))
3394 return 0;
3395 }
7506f491 3396
589005ff 3397 *addr_this_reg = this_reg;
c4c81601 3398 }
7506f491
DE
3399
3400 return number_of_reaching_defs;
3401}
3402
3403/* Expression computed by insn is available and the substitution is legal,
3404 so try to perform the substitution.
3405
cc2902df 3406 The result is nonzero if any changes were made. */
7506f491
DE
3407
3408static int
3409handle_avail_expr (insn, expr)
3410 rtx insn;
3411 struct expr *expr;
3412{
0631e0bf 3413 rtx pat, insn_computes_expr, expr_set;
7506f491
DE
3414 rtx to;
3415 struct reg_set *this_reg;
3416 int found_setting, use_src;
3417 int changed = 0;
3418
3419 /* We only handle the case where one computation of the expression
3420 reaches this instruction. */
3421 insn_computes_expr = computing_insn (expr, insn);
3422 if (insn_computes_expr == NULL)
3423 return 0;
0631e0bf
JH
3424 expr_set = single_set (insn_computes_expr);
3425 if (!expr_set)
3426 abort ();
7506f491
DE
3427
3428 found_setting = 0;
3429 use_src = 0;
3430
3431 /* At this point we know only one computation of EXPR outside of this
3432 block reaches this insn. Now try to find a register that the
3433 expression is computed into. */
0631e0bf 3434 if (GET_CODE (SET_SRC (expr_set)) == REG)
7506f491
DE
3435 {
3436 /* This is the case when the available expression that reaches
3437 here has already been handled as an available expression. */
770ae6cc 3438 unsigned int regnum_for_replacing
0631e0bf 3439 = REGNO (SET_SRC (expr_set));
c4c81601 3440
7506f491
DE
3441 /* If the register was created by GCSE we can't use `reg_set_table',
3442 however we know it's set only once. */
3443 if (regnum_for_replacing >= max_gcse_regno
3444 /* If the register the expression is computed into is set only once,
3445 or only one set reaches this insn, we can use it. */
3446 || (((this_reg = reg_set_table[regnum_for_replacing]),
3447 this_reg->next == NULL)
3448 || can_disregard_other_sets (&this_reg, insn, 0)))
8e42ace1
KH
3449 {
3450 use_src = 1;
3451 found_setting = 1;
3452 }
7506f491
DE
3453 }
3454
3455 if (!found_setting)
3456 {
770ae6cc 3457 unsigned int regnum_for_replacing
0631e0bf 3458 = REGNO (SET_DEST (expr_set));
c4c81601 3459
7506f491
DE
3460 /* This shouldn't happen. */
3461 if (regnum_for_replacing >= max_gcse_regno)
3462 abort ();
c4c81601 3463
7506f491 3464 this_reg = reg_set_table[regnum_for_replacing];
c4c81601 3465
7506f491
DE
3466 /* If the register the expression is computed into is set only once,
3467 or only one set reaches this insn, use it. */
3468 if (this_reg->next == NULL
3469 || can_disregard_other_sets (&this_reg, insn, 0))
3470 found_setting = 1;
3471 }
3472
3473 if (found_setting)
3474 {
3475 pat = PATTERN (insn);
3476 if (use_src)
0631e0bf 3477 to = SET_SRC (expr_set);
7506f491 3478 else
0631e0bf 3479 to = SET_DEST (expr_set);
7506f491
DE
3480 changed = validate_change (insn, &SET_SRC (pat), to, 0);
3481
3482 /* We should be able to ignore the return code from validate_change but
3483 to play it safe we check. */
3484 if (changed)
3485 {
3486 gcse_subst_count++;
3487 if (gcse_file != NULL)
3488 {
c4c81601
RK
3489 fprintf (gcse_file, "GCSE: Replacing the source in insn %d with",
3490 INSN_UID (insn));
3491 fprintf (gcse_file, " reg %d %s insn %d\n",
3492 REGNO (to), use_src ? "from" : "set in",
7506f491
DE
3493 INSN_UID (insn_computes_expr));
3494 }
7506f491
DE
3495 }
3496 }
c4c81601 3497
7506f491
DE
3498 /* The register that the expr is computed into is set more than once. */
3499 else if (1 /*expensive_op(this_pattrn->op) && do_expensive_gcse)*/)
3500 {
3501 /* Insert an insn after insnx that copies the reg set in insnx
3502 into a new pseudo register call this new register REGN.
3503 From insnb until end of basic block or until REGB is set
3504 replace all uses of REGB with REGN. */
3505 rtx new_insn;
3506
0631e0bf 3507 to = gen_reg_rtx (GET_MODE (SET_DEST (expr_set)));
7506f491
DE
3508
3509 /* Generate the new insn. */
3510 /* ??? If the change fails, we return 0, even though we created
3511 an insn. I think this is ok. */
9e6a5703
JC
3512 new_insn
3513 = emit_insn_after (gen_rtx_SET (VOIDmode, to,
0631e0bf 3514 SET_DEST (expr_set)),
c4c81601
RK
3515 insn_computes_expr);
3516
7506f491
DE
3517 /* Keep register set table up to date. */
3518 record_one_set (REGNO (to), new_insn);
3519
3520 gcse_create_count++;
3521 if (gcse_file != NULL)
ac7c5af5 3522 {
c4c81601 3523 fprintf (gcse_file, "GCSE: Creating insn %d to copy value of reg %d",
7506f491 3524 INSN_UID (NEXT_INSN (insn_computes_expr)),
c4c81601
RK
3525 REGNO (SET_SRC (PATTERN (NEXT_INSN (insn_computes_expr)))));
3526 fprintf (gcse_file, ", computed in insn %d,\n",
7506f491 3527 INSN_UID (insn_computes_expr));
c4c81601
RK
3528 fprintf (gcse_file, " into newly allocated reg %d\n",
3529 REGNO (to));
ac7c5af5 3530 }
7506f491
DE
3531
3532 pat = PATTERN (insn);
3533
3534 /* Do register replacement for INSN. */
3535 changed = validate_change (insn, &SET_SRC (pat),
c4c81601
RK
3536 SET_DEST (PATTERN
3537 (NEXT_INSN (insn_computes_expr))),
7506f491
DE
3538 0);
3539
3540 /* We should be able to ignore the return code from validate_change but
3541 to play it safe we check. */
3542 if (changed)
3543 {
3544 gcse_subst_count++;
3545 if (gcse_file != NULL)
3546 {
c4c81601
RK
3547 fprintf (gcse_file,
3548 "GCSE: Replacing the source in insn %d with reg %d ",
7506f491 3549 INSN_UID (insn),
c4c81601
RK
3550 REGNO (SET_DEST (PATTERN (NEXT_INSN
3551 (insn_computes_expr)))));
3552 fprintf (gcse_file, "set in insn %d\n",
589005ff 3553 INSN_UID (insn_computes_expr));
7506f491 3554 }
7506f491
DE
3555 }
3556 }
3557
3558 return changed;
3559}
3560
c4c81601
RK
3561/* Perform classic GCSE. This is called by one_classic_gcse_pass after all
3562 the dataflow analysis has been done.
7506f491 3563
cc2902df 3564 The result is nonzero if a change was made. */
7506f491
DE
3565
3566static int
3567classic_gcse ()
3568{
e0082a72 3569 int changed;
7506f491 3570 rtx insn;
e0082a72 3571 basic_block bb;
7506f491
DE
3572
3573 /* Note we start at block 1. */
3574
e0082a72
ZD
3575 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3576 return 0;
3577
7506f491 3578 changed = 0;
e0082a72 3579 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
7506f491
DE
3580 {
3581 /* Reset tables used to keep track of what's still valid [since the
3582 start of the block]. */
3583 reset_opr_set_tables ();
3584
e0082a72
ZD
3585 for (insn = bb->head;
3586 insn != NULL && insn != NEXT_INSN (bb->end);
7506f491
DE
3587 insn = NEXT_INSN (insn))
3588 {
3589 /* Is insn of form (set (pseudo-reg) ...)? */
7506f491
DE
3590 if (GET_CODE (insn) == INSN
3591 && GET_CODE (PATTERN (insn)) == SET
3592 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
3593 && REGNO (SET_DEST (PATTERN (insn))) >= FIRST_PSEUDO_REGISTER)
3594 {
3595 rtx pat = PATTERN (insn);
3596 rtx src = SET_SRC (pat);
3597 struct expr *expr;
3598
3599 if (want_to_gcse_p (src)
3600 /* Is the expression recorded? */
02280659 3601 && ((expr = lookup_expr (src, &expr_hash_table)) != NULL)
7506f491
DE
3602 /* Is the expression available [at the start of the
3603 block]? */
e0082a72 3604 && TEST_BIT (ae_in[bb->index], expr->bitmap_index)
7506f491
DE
3605 /* Are the operands unchanged since the start of the
3606 block? */
3607 && oprs_not_set_p (src, insn))
3608 changed |= handle_avail_expr (insn, expr);
3609 }
3610
3611 /* Keep track of everything modified by this insn. */
3612 /* ??? Need to be careful w.r.t. mods done to INSN. */
2c3c49de 3613 if (INSN_P (insn))
7506f491 3614 mark_oprs_set (insn);
ac7c5af5 3615 }
7506f491
DE
3616 }
3617
3618 return changed;
3619}
3620
3621/* Top level routine to perform one classic GCSE pass.
3622
cc2902df 3623 Return nonzero if a change was made. */
7506f491
DE
3624
3625static int
b5ce41ff 3626one_classic_gcse_pass (pass)
7506f491
DE
3627 int pass;
3628{
3629 int changed = 0;
3630
3631 gcse_subst_count = 0;
3632 gcse_create_count = 0;
3633
02280659 3634 alloc_hash_table (max_cuid, &expr_hash_table, 0);
d55bc081 3635 alloc_rd_mem (last_basic_block, max_cuid);
02280659 3636 compute_hash_table (&expr_hash_table);
7506f491 3637 if (gcse_file)
02280659 3638 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
c4c81601 3639
02280659 3640 if (expr_hash_table.n_elems > 0)
7506f491
DE
3641 {
3642 compute_kill_rd ();
3643 compute_rd ();
02280659
ZD
3644 alloc_avail_expr_mem (last_basic_block, expr_hash_table.n_elems);
3645 compute_ae_gen (&expr_hash_table);
3646 compute_ae_kill (ae_gen, ae_kill, &expr_hash_table);
bd0eaec2 3647 compute_available (ae_gen, ae_kill, ae_out, ae_in);
7506f491
DE
3648 changed = classic_gcse ();
3649 free_avail_expr_mem ();
3650 }
c4c81601 3651
7506f491 3652 free_rd_mem ();
02280659 3653 free_hash_table (&expr_hash_table);
7506f491
DE
3654
3655 if (gcse_file)
3656 {
3657 fprintf (gcse_file, "\n");
c4c81601
RK
3658 fprintf (gcse_file, "GCSE of %s, pass %d: %d bytes needed, %d substs,",
3659 current_function_name, pass, bytes_used, gcse_subst_count);
3660 fprintf (gcse_file, "%d insns created\n", gcse_create_count);
7506f491
DE
3661 }
3662
3663 return changed;
3664}
3665\f
3666/* Compute copy/constant propagation working variables. */
3667
3668/* Local properties of assignments. */
7506f491
DE
3669static sbitmap *cprop_pavloc;
3670static sbitmap *cprop_absaltered;
3671
3672/* Global properties of assignments (computed from the local properties). */
7506f491
DE
3673static sbitmap *cprop_avin;
3674static sbitmap *cprop_avout;
3675
c4c81601
RK
3676/* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
3677 basic blocks. N_SETS is the number of sets. */
7506f491
DE
3678
3679static void
3680alloc_cprop_mem (n_blocks, n_sets)
3681 int n_blocks, n_sets;
3682{
3683 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
3684 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
3685
3686 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
3687 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
3688}
3689
3690/* Free vars used by copy/const propagation. */
3691
3692static void
3693free_cprop_mem ()
3694{
5a660bff
DB
3695 sbitmap_vector_free (cprop_pavloc);
3696 sbitmap_vector_free (cprop_absaltered);
3697 sbitmap_vector_free (cprop_avin);
3698 sbitmap_vector_free (cprop_avout);
7506f491
DE
3699}
3700
c4c81601
RK
3701/* For each block, compute whether X is transparent. X is either an
3702 expression or an assignment [though we don't care which, for this context
3703 an assignment is treated as an expression]. For each block where an
3704 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
3705 bit in BMAP. */
7506f491
DE
3706
3707static void
3708compute_transp (x, indx, bmap, set_p)
3709 rtx x;
3710 int indx;
3711 sbitmap *bmap;
3712 int set_p;
3713{
e0082a72
ZD
3714 int i, j;
3715 basic_block bb;
7506f491 3716 enum rtx_code code;
c4c81601 3717 reg_set *r;
6f7d635c 3718 const char *fmt;
7506f491 3719
c4c81601
RK
3720 /* repeat is used to turn tail-recursion into iteration since GCC
3721 can't do it when there's no return value. */
7506f491
DE
3722 repeat:
3723
3724 if (x == 0)
3725 return;
3726
3727 code = GET_CODE (x);
3728 switch (code)
3729 {
3730 case REG:
c4c81601
RK
3731 if (set_p)
3732 {
3733 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3734 {
e0082a72
ZD
3735 FOR_EACH_BB (bb)
3736 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
3737 SET_BIT (bmap[bb->index], indx);
c4c81601
RK
3738 }
3739 else
3740 {
3741 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3742 SET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3743 }
3744 }
3745 else
3746 {
3747 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3748 {
e0082a72
ZD
3749 FOR_EACH_BB (bb)
3750 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
3751 RESET_BIT (bmap[bb->index], indx);
c4c81601
RK
3752 }
3753 else
3754 {
3755 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3756 RESET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3757 }
3758 }
7506f491 3759
c4c81601 3760 return;
7506f491
DE
3761
3762 case MEM:
e0082a72 3763 FOR_EACH_BB (bb)
a13d4ebf 3764 {
e0082a72 3765 rtx list_entry = canon_modify_mem_list[bb->index];
a13d4ebf
AM
3766
3767 while (list_entry)
3768 {
3769 rtx dest, dest_addr;
3770
3771 if (GET_CODE (XEXP (list_entry, 0)) == CALL_INSN)
3772 {
3773 if (set_p)
e0082a72 3774 SET_BIT (bmap[bb->index], indx);
a13d4ebf 3775 else
e0082a72 3776 RESET_BIT (bmap[bb->index], indx);
a13d4ebf
AM
3777 break;
3778 }
3779 /* LIST_ENTRY must be an INSN of some kind that sets memory.
3780 Examine each hunk of memory that is modified. */
3781
3782 dest = XEXP (list_entry, 0);
3783 list_entry = XEXP (list_entry, 1);
3784 dest_addr = XEXP (list_entry, 0);
589005ff 3785
a13d4ebf
AM
3786 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
3787 x, rtx_addr_varies_p))
3788 {
3789 if (set_p)
e0082a72 3790 SET_BIT (bmap[bb->index], indx);
a13d4ebf 3791 else
e0082a72 3792 RESET_BIT (bmap[bb->index], indx);
a13d4ebf
AM
3793 break;
3794 }
3795 list_entry = XEXP (list_entry, 1);
3796 }
3797 }
c4c81601 3798
7506f491
DE
3799 x = XEXP (x, 0);
3800 goto repeat;
3801
3802 case PC:
3803 case CC0: /*FIXME*/
3804 case CONST:
3805 case CONST_INT:
3806 case CONST_DOUBLE:
69ef87e2 3807 case CONST_VECTOR:
7506f491
DE
3808 case SYMBOL_REF:
3809 case LABEL_REF:
3810 case ADDR_VEC:
3811 case ADDR_DIFF_VEC:
3812 return;
3813
3814 default:
3815 break;
3816 }
3817
c4c81601 3818 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3819 {
3820 if (fmt[i] == 'e')
3821 {
7506f491
DE
3822 /* If we are about to do the last recursive call
3823 needed at this level, change it into iteration.
3824 This function is called enough to be worth it. */
3825 if (i == 0)
3826 {
c4c81601 3827 x = XEXP (x, i);
7506f491
DE
3828 goto repeat;
3829 }
c4c81601
RK
3830
3831 compute_transp (XEXP (x, i), indx, bmap, set_p);
7506f491
DE
3832 }
3833 else if (fmt[i] == 'E')
c4c81601
RK
3834 for (j = 0; j < XVECLEN (x, i); j++)
3835 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
7506f491
DE
3836 }
3837}
3838
7506f491
DE
3839/* Top level routine to do the dataflow analysis needed by copy/const
3840 propagation. */
3841
3842static void
3843compute_cprop_data ()
3844{
02280659 3845 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
ce724250
JL
3846 compute_available (cprop_pavloc, cprop_absaltered,
3847 cprop_avout, cprop_avin);
7506f491
DE
3848}
3849\f
3850/* Copy/constant propagation. */
3851
7506f491
DE
3852/* Maximum number of register uses in an insn that we handle. */
3853#define MAX_USES 8
3854
3855/* Table of uses found in an insn.
3856 Allocated statically to avoid alloc/free complexity and overhead. */
3857static struct reg_use reg_use_table[MAX_USES];
3858
3859/* Index into `reg_use_table' while building it. */
3860static int reg_use_count;
3861
c4c81601
RK
3862/* Set up a list of register numbers used in INSN. The found uses are stored
3863 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
3864 and contains the number of uses in the table upon exit.
7506f491 3865
c4c81601
RK
3866 ??? If a register appears multiple times we will record it multiple times.
3867 This doesn't hurt anything but it will slow things down. */
7506f491
DE
3868
3869static void
9e71c818
JH
3870find_used_regs (xptr, data)
3871 rtx *xptr;
3872 void *data ATTRIBUTE_UNUSED;
7506f491 3873{
c4c81601 3874 int i, j;
7506f491 3875 enum rtx_code code;
6f7d635c 3876 const char *fmt;
9e71c818 3877 rtx x = *xptr;
7506f491 3878
c4c81601
RK
3879 /* repeat is used to turn tail-recursion into iteration since GCC
3880 can't do it when there's no return value. */
7506f491 3881 repeat:
7506f491
DE
3882 if (x == 0)
3883 return;
3884
3885 code = GET_CODE (x);
9e71c818 3886 if (REG_P (x))
7506f491 3887 {
7506f491
DE
3888 if (reg_use_count == MAX_USES)
3889 return;
c4c81601 3890
7506f491
DE
3891 reg_use_table[reg_use_count].reg_rtx = x;
3892 reg_use_count++;
7506f491
DE
3893 }
3894
3895 /* Recursively scan the operands of this expression. */
3896
c4c81601 3897 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3898 {
3899 if (fmt[i] == 'e')
3900 {
3901 /* If we are about to do the last recursive call
3902 needed at this level, change it into iteration.
3903 This function is called enough to be worth it. */
3904 if (i == 0)
3905 {
3906 x = XEXP (x, 0);
3907 goto repeat;
3908 }
c4c81601 3909
9e71c818 3910 find_used_regs (&XEXP (x, i), data);
7506f491
DE
3911 }
3912 else if (fmt[i] == 'E')
c4c81601 3913 for (j = 0; j < XVECLEN (x, i); j++)
9e71c818 3914 find_used_regs (&XVECEXP (x, i, j), data);
7506f491
DE
3915 }
3916}
3917
3918/* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
cc2902df 3919 Returns nonzero is successful. */
7506f491
DE
3920
3921static int
3922try_replace_reg (from, to, insn)
3923 rtx from, to, insn;
3924{
172890a2 3925 rtx note = find_reg_equal_equiv_note (insn);
fb0c0a12 3926 rtx src = 0;
172890a2
RK
3927 int success = 0;
3928 rtx set = single_set (insn);
833fc3ad 3929
2b773ee2
JH
3930 validate_replace_src_group (from, to, insn);
3931 if (num_changes_pending () && apply_change_group ())
3932 success = 1;
9e71c818 3933
f305679f 3934 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
833fc3ad 3935 {
f305679f
JH
3936 /* If above failed and this is a single set, try to simplify the source of
3937 the set given our substitution. We could perhaps try this for multiple
3938 SETs, but it probably won't buy us anything. */
172890a2
RK
3939 src = simplify_replace_rtx (SET_SRC (set), from, to);
3940
9e71c818
JH
3941 if (!rtx_equal_p (src, SET_SRC (set))
3942 && validate_change (insn, &SET_SRC (set), src, 0))
172890a2 3943 success = 1;
833fc3ad 3944
f305679f
JH
3945 /* If we've failed to do replacement, have a single SET, and don't already
3946 have a note, add a REG_EQUAL note to not lose information. */
3947 if (!success && note == 0 && set != 0)
3948 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
3949 }
e251e2a2 3950
172890a2
RK
3951 /* If there is already a NOTE, update the expression in it with our
3952 replacement. */
3953 else if (note != 0)
3954 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to);
833fc3ad 3955
172890a2
RK
3956 /* REG_EQUAL may get simplified into register.
3957 We don't allow that. Remove that note. This code ought
fbe5a4a6 3958 not to happen, because previous code ought to synthesize
172890a2
RK
3959 reg-reg move, but be on the safe side. */
3960 if (note && REG_P (XEXP (note, 0)))
3961 remove_note (insn, note);
833fc3ad 3962
833fc3ad
JH
3963 return success;
3964}
c4c81601
RK
3965
3966/* Find a set of REGNOs that are available on entry to INSN's block. Returns
3967 NULL no such set is found. */
7506f491
DE
3968
3969static struct expr *
3970find_avail_set (regno, insn)
3971 int regno;
3972 rtx insn;
3973{
cafba495
BS
3974 /* SET1 contains the last set found that can be returned to the caller for
3975 use in a substitution. */
3976 struct expr *set1 = 0;
589005ff 3977
cafba495
BS
3978 /* Loops are not possible here. To get a loop we would need two sets
3979 available at the start of the block containing INSN. ie we would
3980 need two sets like this available at the start of the block:
3981
3982 (set (reg X) (reg Y))
3983 (set (reg Y) (reg X))
3984
3985 This can not happen since the set of (reg Y) would have killed the
3986 set of (reg X) making it unavailable at the start of this block. */
3987 while (1)
8e42ace1 3988 {
cafba495 3989 rtx src;
ceda50e9 3990 struct expr *set = lookup_set (regno, &set_hash_table);
cafba495
BS
3991
3992 /* Find a set that is available at the start of the block
3993 which contains INSN. */
3994 while (set)
3995 {
3996 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
3997 break;
3998 set = next_set (regno, set);
3999 }
7506f491 4000
cafba495
BS
4001 /* If no available set was found we've reached the end of the
4002 (possibly empty) copy chain. */
4003 if (set == 0)
589005ff 4004 break;
cafba495
BS
4005
4006 if (GET_CODE (set->expr) != SET)
4007 abort ();
4008
4009 src = SET_SRC (set->expr);
4010
4011 /* We know the set is available.
4012 Now check that SRC is ANTLOC (i.e. none of the source operands
589005ff 4013 have changed since the start of the block).
cafba495
BS
4014
4015 If the source operand changed, we may still use it for the next
4016 iteration of this loop, but we may not use it for substitutions. */
c4c81601 4017
cafba495
BS
4018 if (CONSTANT_P (src) || oprs_not_set_p (src, insn))
4019 set1 = set;
4020
4021 /* If the source of the set is anything except a register, then
4022 we have reached the end of the copy chain. */
4023 if (GET_CODE (src) != REG)
7506f491 4024 break;
7506f491 4025
cafba495
BS
4026 /* Follow the copy chain, ie start another iteration of the loop
4027 and see if we have an available copy into SRC. */
4028 regno = REGNO (src);
8e42ace1 4029 }
cafba495
BS
4030
4031 /* SET1 holds the last set that was available and anticipatable at
4032 INSN. */
4033 return set1;
7506f491
DE
4034}
4035
abd535b6 4036/* Subroutine of cprop_insn that tries to propagate constants into
0e3f0221 4037 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
fbe5a4a6 4038 it is the instruction that immediately precedes JUMP, and must be a
818b6b7f 4039 single SET of a register. FROM is what we will try to replace,
0e3f0221 4040 SRC is the constant we will try to substitute for it. Returns nonzero
589005ff 4041 if a change was made. */
c4c81601 4042
abd535b6 4043static int
0e3f0221
RS
4044cprop_jump (bb, setcc, jump, from, src)
4045 basic_block bb;
4046 rtx setcc;
4047 rtx jump;
172890a2 4048 rtx from;
abd535b6
BS
4049 rtx src;
4050{
0e3f0221
RS
4051 rtx new, new_set;
4052 rtx set = pc_set (jump);
4053
4054 /* First substitute in the INSN condition as the SET_SRC of the JUMP,
4055 then substitute that given values in this expanded JUMP. */
48ddd46c
JH
4056 if (setcc != NULL
4057 && !modified_between_p (from, setcc, jump)
4058 && !modified_between_p (src, setcc, jump))
b2f02503
RS
4059 {
4060 rtx setcc_set = single_set (setcc);
ef906381
KH
4061 rtx note = find_reg_equal_equiv_note (setcc);
4062 /* Use REG_EQUAL note if available. */
4063 rtx setcc_set_src = (note == 0) ? SET_SRC (setcc_set) : XEXP (note, 0);
4064
b2f02503
RS
4065 new_set = simplify_replace_rtx (SET_SRC (set),
4066 SET_DEST (setcc_set),
ef906381 4067 setcc_set_src);
b2f02503 4068 }
0e3f0221
RS
4069 else
4070 new_set = set;
4071
ef906381
KH
4072 /* If NEW_SET is simplified down to either a label or a no-op, we
4073 don't have to replace FROM with SRC, but we still have to either
4074 turn JUMP to an unconditional branch or remove the no-op. This
4075 can happen if JUMP is simplified using the REG_EQUAL note in
4076 SETCC. */
4077 if (GET_CODE (new_set) == LABEL_REF || new_set == pc_rtx)
4078 new = new_set;
4079 else
4080 {
4081 new = simplify_replace_rtx (new_set, from, src);
abd535b6 4082
ef906381
KH
4083 /* If no simplification can be made, then try the next
4084 register. */
4085 if (rtx_equal_p (new, new_set) || rtx_equal_p (new, SET_SRC (set)))
4086 return 0;
4087 }
589005ff 4088
7d5ab30e 4089 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
172890a2 4090 if (new == pc_rtx)
0e3f0221 4091 delete_insn (jump);
7d5ab30e 4092 else
abd535b6 4093 {
48ddd46c
JH
4094 /* Ensure the value computed inside the jump insn to be equivalent
4095 to one computed by setcc. */
4096 if (setcc
4097 && modified_in_p (new, setcc))
4098 return 0;
0e3f0221 4099 if (! validate_change (jump, &SET_SRC (set), new, 0))
7d5ab30e 4100 return 0;
abd535b6 4101
7d5ab30e
JH
4102 /* If this has turned into an unconditional jump,
4103 then put a barrier after it so that the unreachable
4104 code will be deleted. */
4105 if (GET_CODE (SET_SRC (set)) == LABEL_REF)
0e3f0221 4106 emit_barrier_after (jump);
7d5ab30e 4107 }
abd535b6 4108
0e3f0221
RS
4109#ifdef HAVE_cc0
4110 /* Delete the cc0 setter. */
818b6b7f 4111 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
0e3f0221
RS
4112 delete_insn (setcc);
4113#endif
4114
172890a2 4115 run_jump_opt_after_gcse = 1;
c4c81601 4116
172890a2
RK
4117 const_prop_count++;
4118 if (gcse_file != NULL)
4119 {
4120 fprintf (gcse_file,
818b6b7f 4121 "CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
0e3f0221 4122 REGNO (from), INSN_UID (jump));
172890a2
RK
4123 print_rtl (gcse_file, src);
4124 fprintf (gcse_file, "\n");
abd535b6 4125 }
0005550b 4126 purge_dead_edges (bb);
172890a2
RK
4127
4128 return 1;
abd535b6
BS
4129}
4130
ae860ff7
JH
4131static bool
4132constprop_register (insn, from, to, alter_jumps)
4133 rtx insn;
4134 rtx from;
4135 rtx to;
4136 int alter_jumps;
4137{
4138 rtx sset;
4139
4140 /* Check for reg or cc0 setting instructions followed by
4141 conditional branch instructions first. */
4142 if (alter_jumps
4143 && (sset = single_set (insn)) != NULL
244d05fb 4144 && NEXT_INSN (insn)
ae860ff7
JH
4145 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
4146 {
4147 rtx dest = SET_DEST (sset);
4148 if ((REG_P (dest) || CC0_P (dest))
4149 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
4150 return 1;
4151 }
4152
4153 /* Handle normal insns next. */
4154 if (GET_CODE (insn) == INSN
4155 && try_replace_reg (from, to, insn))
4156 return 1;
4157
4158 /* Try to propagate a CONST_INT into a conditional jump.
4159 We're pretty specific about what we will handle in this
4160 code, we can extend this as necessary over time.
4161
4162 Right now the insn in question must look like
4163 (set (pc) (if_then_else ...)) */
4164 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
4165 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
4166 return 0;
4167}
4168
7506f491 4169/* Perform constant and copy propagation on INSN.
cc2902df 4170 The result is nonzero if a change was made. */
7506f491
DE
4171
4172static int
ae860ff7 4173cprop_insn (insn, alter_jumps)
7506f491 4174 rtx insn;
b5ce41ff 4175 int alter_jumps;
7506f491
DE
4176{
4177 struct reg_use *reg_used;
4178 int changed = 0;
833fc3ad 4179 rtx note;
7506f491 4180
9e71c818 4181 if (!INSN_P (insn))
7506f491
DE
4182 return 0;
4183
4184 reg_use_count = 0;
9e71c818 4185 note_uses (&PATTERN (insn), find_used_regs, NULL);
589005ff 4186
172890a2 4187 note = find_reg_equal_equiv_note (insn);
833fc3ad 4188
dc297297 4189 /* We may win even when propagating constants into notes. */
833fc3ad 4190 if (note)
9e71c818 4191 find_used_regs (&XEXP (note, 0), NULL);
7506f491 4192
c4c81601
RK
4193 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4194 reg_used++, reg_use_count--)
7506f491 4195 {
770ae6cc 4196 unsigned int regno = REGNO (reg_used->reg_rtx);
7506f491
DE
4197 rtx pat, src;
4198 struct expr *set;
7506f491
DE
4199
4200 /* Ignore registers created by GCSE.
dc297297 4201 We do this because ... */
7506f491
DE
4202 if (regno >= max_gcse_regno)
4203 continue;
4204
4205 /* If the register has already been set in this block, there's
4206 nothing we can do. */
4207 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
4208 continue;
4209
4210 /* Find an assignment that sets reg_used and is available
4211 at the start of the block. */
4212 set = find_avail_set (regno, insn);
4213 if (! set)
4214 continue;
589005ff 4215
7506f491
DE
4216 pat = set->expr;
4217 /* ??? We might be able to handle PARALLELs. Later. */
4218 if (GET_CODE (pat) != SET)
4219 abort ();
c4c81601 4220
7506f491
DE
4221 src = SET_SRC (pat);
4222
e78d9500 4223 /* Constant propagation. */
b446e5a2 4224 if (CONSTANT_P (src))
7506f491 4225 {
ae860ff7 4226 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
7506f491
DE
4227 {
4228 changed = 1;
4229 const_prop_count++;
4230 if (gcse_file != NULL)
4231 {
ae860ff7
JH
4232 fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
4233 fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn));
e78d9500 4234 print_rtl (gcse_file, src);
7506f491
DE
4235 fprintf (gcse_file, "\n");
4236 }
7506f491
DE
4237 }
4238 }
4239 else if (GET_CODE (src) == REG
4240 && REGNO (src) >= FIRST_PSEUDO_REGISTER
4241 && REGNO (src) != regno)
4242 {
cafba495 4243 if (try_replace_reg (reg_used->reg_rtx, src, insn))
7506f491 4244 {
cafba495
BS
4245 changed = 1;
4246 copy_prop_count++;
4247 if (gcse_file != NULL)
7506f491 4248 {
ae860ff7 4249 fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
c4c81601
RK
4250 regno, INSN_UID (insn));
4251 fprintf (gcse_file, " with reg %d\n", REGNO (src));
7506f491 4252 }
cafba495
BS
4253
4254 /* The original insn setting reg_used may or may not now be
4255 deletable. We leave the deletion to flow. */
4256 /* FIXME: If it turns out that the insn isn't deletable,
4257 then we may have unnecessarily extended register lifetimes
4258 and made things worse. */
7506f491
DE
4259 }
4260 }
4261 }
4262
4263 return changed;
4264}
4265
710ee3ed
RH
4266/* Like find_used_regs, but avoid recording uses that appear in
4267 input-output contexts such as zero_extract or pre_dec. This
4268 restricts the cases we consider to those for which local cprop
4269 can legitimately make replacements. */
4270
4271static void
4272local_cprop_find_used_regs (xptr, data)
4273 rtx *xptr;
4274 void *data;
4275{
4276 rtx x = *xptr;
4277
4278 if (x == 0)
4279 return;
4280
4281 switch (GET_CODE (x))
4282 {
4283 case ZERO_EXTRACT:
4284 case SIGN_EXTRACT:
4285 case STRICT_LOW_PART:
4286 return;
4287
4288 case PRE_DEC:
4289 case PRE_INC:
4290 case POST_DEC:
4291 case POST_INC:
4292 case PRE_MODIFY:
4293 case POST_MODIFY:
4294 /* Can only legitimately appear this early in the context of
4295 stack pushes for function arguments, but handle all of the
4296 codes nonetheless. */
4297 return;
4298
4299 case SUBREG:
4300 /* Setting a subreg of a register larger than word_mode leaves
4301 the non-written words unchanged. */
4302 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD)
4303 return;
4304 break;
4305
4306 default:
4307 break;
4308 }
4309
4310 find_used_regs (xptr, data);
4311}
4312
8ba46434
R
4313/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
4314 their REG_EQUAL notes need updating. */
e197b6fc 4315
ae860ff7 4316static bool
8ba46434 4317do_local_cprop (x, insn, alter_jumps, libcall_sp)
ae860ff7
JH
4318 rtx x;
4319 rtx insn;
4320 int alter_jumps;
8ba46434 4321 rtx *libcall_sp;
ae860ff7
JH
4322{
4323 rtx newreg = NULL, newcnst = NULL;
4324
e197b6fc
RH
4325 /* Rule out USE instructions and ASM statements as we don't want to
4326 change the hard registers mentioned. */
ae860ff7
JH
4327 if (GET_CODE (x) == REG
4328 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
e197b6fc
RH
4329 || (GET_CODE (PATTERN (insn)) != USE
4330 && asm_noperands (PATTERN (insn)) < 0)))
ae860ff7
JH
4331 {
4332 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
4333 struct elt_loc_list *l;
4334
4335 if (!val)
4336 return false;
4337 for (l = val->locs; l; l = l->next)
4338 {
4339 rtx this_rtx = l->loc;
46690369
JH
4340 rtx note;
4341
9635cfad
JH
4342 if (l->in_libcall)
4343 continue;
4344
34ee7f82
RS
4345 if (CONSTANT_P (this_rtx)
4346 && GET_CODE (this_rtx) != CONSTANT_P_RTX)
ae860ff7 4347 newcnst = this_rtx;
46690369
JH
4348 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
4349 /* Don't copy propagate if it has attached REG_EQUIV note.
4350 At this point this only function parameters should have
4351 REG_EQUIV notes and if the argument slot is used somewhere
4352 explicitly, it means address of parameter has been taken,
4353 so we should not extend the lifetime of the pseudo. */
4354 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
4355 || GET_CODE (XEXP (note, 0)) != MEM))
ae860ff7
JH
4356 newreg = this_rtx;
4357 }
4358 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
4359 {
8ba46434 4360 /* If we find a case where we can't fix the retval REG_EQUAL notes
fbe5a4a6 4361 match the new register, we either have to abandon this replacement
8ba46434
R
4362 or fix delete_trivially_dead_insns to preserve the setting insn,
4363 or make it delete the REG_EUAQL note, and fix up all passes that
4364 require the REG_EQUAL note there. */
4365 if (!adjust_libcall_notes (x, newcnst, insn, libcall_sp))
4366 abort ();
ae860ff7
JH
4367 if (gcse_file != NULL)
4368 {
4369 fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ",
4370 REGNO (x));
4371 fprintf (gcse_file, "insn %d with constant ",
4372 INSN_UID (insn));
4373 print_rtl (gcse_file, newcnst);
4374 fprintf (gcse_file, "\n");
4375 }
4376 const_prop_count++;
4377 return true;
4378 }
4379 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
4380 {
8ba46434 4381 adjust_libcall_notes (x, newreg, insn, libcall_sp);
ae860ff7
JH
4382 if (gcse_file != NULL)
4383 {
4384 fprintf (gcse_file,
4385 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
4386 REGNO (x), INSN_UID (insn));
4387 fprintf (gcse_file, " with reg %d\n", REGNO (newreg));
4388 }
4389 copy_prop_count++;
4390 return true;
4391 }
4392 }
4393 return false;
4394}
4395
8ba46434
R
4396/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
4397 their REG_EQUAL notes need updating to reflect that OLDREG has been
f4e3e618
RH
4398 replaced with NEWVAL in INSN. Return true if all substitutions could
4399 be made. */
8ba46434
R
4400static bool
4401adjust_libcall_notes (oldreg, newval, insn, libcall_sp)
4402 rtx oldreg, newval, insn, *libcall_sp;
4403{
f4e3e618 4404 rtx end;
8ba46434
R
4405
4406 while ((end = *libcall_sp++))
4407 {
f4e3e618 4408 rtx note = find_reg_equal_equiv_note (end);
8ba46434
R
4409
4410 if (! note)
4411 continue;
4412
4413 if (REG_P (newval))
4414 {
4415 if (reg_set_between_p (newval, PREV_INSN (insn), end))
4416 {
4417 do
4418 {
4419 note = find_reg_equal_equiv_note (end);
4420 if (! note)
4421 continue;
4422 if (reg_mentioned_p (newval, XEXP (note, 0)))
4423 return false;
4424 }
4425 while ((end = *libcall_sp++));
4426 return true;
4427 }
4428 }
4429 XEXP (note, 0) = replace_rtx (XEXP (note, 0), oldreg, newval);
4430 insn = end;
4431 }
4432 return true;
4433}
4434
4435#define MAX_NESTED_LIBCALLS 9
4436
ae860ff7
JH
4437static void
4438local_cprop_pass (alter_jumps)
4439 int alter_jumps;
4440{
4441 rtx insn;
4442 struct reg_use *reg_used;
8ba46434 4443 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
1649d92f 4444 bool changed = false;
ae860ff7
JH
4445
4446 cselib_init ();
8ba46434
R
4447 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
4448 *libcall_sp = 0;
ae860ff7
JH
4449 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4450 {
4451 if (INSN_P (insn))
4452 {
8ba46434 4453 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
ae860ff7 4454
8ba46434
R
4455 if (note)
4456 {
4457 if (libcall_sp == libcall_stack)
4458 abort ();
4459 *--libcall_sp = XEXP (note, 0);
4460 }
4461 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
4462 if (note)
4463 libcall_sp++;
4464 note = find_reg_equal_equiv_note (insn);
ae860ff7
JH
4465 do
4466 {
4467 reg_use_count = 0;
710ee3ed 4468 note_uses (&PATTERN (insn), local_cprop_find_used_regs, NULL);
ae860ff7 4469 if (note)
710ee3ed 4470 local_cprop_find_used_regs (&XEXP (note, 0), NULL);
ae860ff7
JH
4471
4472 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4473 reg_used++, reg_use_count--)
8ba46434
R
4474 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
4475 libcall_sp))
1649d92f
JH
4476 {
4477 changed = true;
4478 break;
4479 }
ae860ff7
JH
4480 }
4481 while (reg_use_count);
4482 }
4483 cselib_process_insn (insn);
4484 }
4485 cselib_finish ();
1649d92f
JH
4486 /* Global analysis may get into infinite loops for unreachable blocks. */
4487 if (changed && alter_jumps)
5f0bea72
JH
4488 {
4489 delete_unreachable_blocks ();
4490 free_reg_set_mem ();
4491 alloc_reg_set_mem (max_reg_num ());
4492 compute_sets (get_insns ());
4493 }
ae860ff7
JH
4494}
4495
c4c81601 4496/* Forward propagate copies. This includes copies and constants. Return
cc2902df 4497 nonzero if a change was made. */
7506f491
DE
4498
4499static int
b5ce41ff
JL
4500cprop (alter_jumps)
4501 int alter_jumps;
7506f491 4502{
e0082a72
ZD
4503 int changed;
4504 basic_block bb;
7506f491
DE
4505 rtx insn;
4506
4507 /* Note we start at block 1. */
e0082a72
ZD
4508 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4509 {
4510 if (gcse_file != NULL)
4511 fprintf (gcse_file, "\n");
4512 return 0;
4513 }
7506f491
DE
4514
4515 changed = 0;
e0082a72 4516 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
7506f491
DE
4517 {
4518 /* Reset tables used to keep track of what's still valid [since the
4519 start of the block]. */
4520 reset_opr_set_tables ();
4521
e0082a72
ZD
4522 for (insn = bb->head;
4523 insn != NULL && insn != NEXT_INSN (bb->end);
7506f491 4524 insn = NEXT_INSN (insn))
172890a2
RK
4525 if (INSN_P (insn))
4526 {
ae860ff7 4527 changed |= cprop_insn (insn, alter_jumps);
7506f491 4528
172890a2
RK
4529 /* Keep track of everything modified by this insn. */
4530 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
4531 call mark_oprs_set if we turned the insn into a NOTE. */
4532 if (GET_CODE (insn) != NOTE)
4533 mark_oprs_set (insn);
8e42ace1 4534 }
7506f491
DE
4535 }
4536
4537 if (gcse_file != NULL)
4538 fprintf (gcse_file, "\n");
4539
4540 return changed;
4541}
4542
fbef91d8
RS
4543/* Similar to get_condition, only the resulting condition must be
4544 valid at JUMP, instead of at EARLIEST.
4545
4546 This differs from noce_get_condition in ifcvt.c in that we prefer not to
4547 settle for the condition variable in the jump instruction being integral.
4548 We prefer to be able to record the value of a user variable, rather than
4549 the value of a temporary used in a condition. This could be solved by
4550 recording the value of *every* register scaned by canonicalize_condition,
4551 but this would require some code reorganization. */
4552
4553static rtx
4554fis_get_condition (jump)
4555 rtx jump;
4556{
4557 rtx cond, set, tmp, insn, earliest;
4558 bool reverse;
4559
4560 if (! any_condjump_p (jump))
4561 return NULL_RTX;
4562
4563 set = pc_set (jump);
4564 cond = XEXP (SET_SRC (set), 0);
4565
4566 /* If this branches to JUMP_LABEL when the condition is false,
4567 reverse the condition. */
4568 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4569 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump));
4570
4571 /* Use canonicalize_condition to do the dirty work of manipulating
4572 MODE_CC values and COMPARE rtx codes. */
4573 tmp = canonicalize_condition (jump, cond, reverse, &earliest, NULL_RTX);
4574 if (!tmp)
4575 return NULL_RTX;
4576
4577 /* Verify that the given condition is valid at JUMP by virtue of not
4578 having been modified since EARLIEST. */
4579 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
4580 if (INSN_P (insn) && modified_in_p (tmp, insn))
4581 break;
4582 if (insn == jump)
4583 return tmp;
4584
4585 /* The condition was modified. See if we can get a partial result
4586 that doesn't follow all the reversals. Perhaps combine can fold
4587 them together later. */
4588 tmp = XEXP (tmp, 0);
4589 if (!REG_P (tmp) || GET_MODE_CLASS (GET_MODE (tmp)) != MODE_INT)
4590 return NULL_RTX;
4591 tmp = canonicalize_condition (jump, cond, reverse, &earliest, tmp);
4592 if (!tmp)
4593 return NULL_RTX;
4594
4595 /* For sanity's sake, re-validate the new result. */
4596 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
4597 if (INSN_P (insn) && modified_in_p (tmp, insn))
4598 return NULL_RTX;
4599
4600 return tmp;
4601}
4602
4603/* Find the implicit sets of a function. An "implicit set" is a constraint
4604 on the value of a variable, implied by a conditional jump. For example,
4605 following "if (x == 2)", the then branch may be optimized as though the
4606 conditional performed an "explicit set", in this example, "x = 2". This
4607 function records the set patterns that are implicit at the start of each
4608 basic block. */
4609
4610static void
4611find_implicit_sets ()
4612{
4613 basic_block bb, dest;
4614 unsigned int count;
4615 rtx cond, new;
4616
4617 count = 0;
4618 FOR_EACH_BB (bb)
4619 /* Check for more than one sucessor. */
4620 if (bb->succ && bb->succ->succ_next)
4621 {
4622 cond = fis_get_condition (bb->end);
4623
4624 if (cond
4625 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
4626 && GET_CODE (XEXP (cond, 0)) == REG
4627 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
4628 && CONSTANT_P (XEXP (cond, 1)))
4629 {
4630 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
4631 : FALLTHRU_EDGE (bb)->dest;
4632
4633 if (dest && ! dest->pred->pred_next
4634 && dest != EXIT_BLOCK_PTR)
4635 {
4636 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
4637 XEXP (cond, 1));
4638 implicit_sets[dest->index] = new;
4639 if (gcse_file)
4640 {
4641 fprintf(gcse_file, "Implicit set of reg %d in ",
4642 REGNO (XEXP (cond, 0)));
4643 fprintf(gcse_file, "basic block %d\n", dest->index);
4644 }
4645 count++;
4646 }
4647 }
4648 }
4649
4650 if (gcse_file)
4651 fprintf (gcse_file, "Found %d implicit sets\n", count);
4652}
4653
7506f491 4654/* Perform one copy/constant propagation pass.
a0134312
RS
4655 PASS is the pass count. If CPROP_JUMPS is true, perform constant
4656 propagation into conditional jumps. If BYPASS_JUMPS is true,
4657 perform conditional jump bypassing optimizations. */
7506f491
DE
4658
4659static int
a0134312 4660one_cprop_pass (pass, cprop_jumps, bypass_jumps)
7506f491 4661 int pass;
a0134312
RS
4662 int cprop_jumps;
4663 int bypass_jumps;
7506f491
DE
4664{
4665 int changed = 0;
4666
4667 const_prop_count = 0;
4668 copy_prop_count = 0;
4669
a0134312 4670 local_cprop_pass (cprop_jumps);
ae860ff7 4671
fbef91d8
RS
4672 /* Determine implicit sets. */
4673 implicit_sets = (rtx *) xcalloc (last_basic_block, sizeof (rtx));
4674 find_implicit_sets ();
4675
02280659
ZD
4676 alloc_hash_table (max_cuid, &set_hash_table, 1);
4677 compute_hash_table (&set_hash_table);
fbef91d8
RS
4678
4679 /* Free implicit_sets before peak usage. */
4680 free (implicit_sets);
4681 implicit_sets = NULL;
4682
7506f491 4683 if (gcse_file)
02280659
ZD
4684 dump_hash_table (gcse_file, "SET", &set_hash_table);
4685 if (set_hash_table.n_elems > 0)
7506f491 4686 {
02280659 4687 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
7506f491 4688 compute_cprop_data ();
a0134312
RS
4689 changed = cprop (cprop_jumps);
4690 if (bypass_jumps)
0e3f0221 4691 changed |= bypass_conditional_jumps ();
7506f491
DE
4692 free_cprop_mem ();
4693 }
c4c81601 4694
02280659 4695 free_hash_table (&set_hash_table);
7506f491
DE
4696
4697 if (gcse_file)
4698 {
c4c81601
RK
4699 fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ",
4700 current_function_name, pass, bytes_used);
4701 fprintf (gcse_file, "%d const props, %d copy props\n\n",
4702 const_prop_count, copy_prop_count);
7506f491 4703 }
1649d92f
JH
4704 /* Global analysis may get into infinite loops for unreachable blocks. */
4705 if (changed && cprop_jumps)
4706 delete_unreachable_blocks ();
7506f491
DE
4707
4708 return changed;
4709}
4710\f
0e3f0221
RS
4711/* Bypass conditional jumps. */
4712
7821bfc7
RS
4713/* The value of last_basic_block at the beginning of the jump_bypass
4714 pass. The use of redirect_edge_and_branch_force may introduce new
4715 basic blocks, but the data flow analysis is only valid for basic
4716 block indices less than bypass_last_basic_block. */
4717
4718static int bypass_last_basic_block;
4719
0e3f0221
RS
4720/* Find a set of REGNO to a constant that is available at the end of basic
4721 block BB. Returns NULL if no such set is found. Based heavily upon
4722 find_avail_set. */
4723
4724static struct expr *
4725find_bypass_set (regno, bb)
4726 int regno;
4727 int bb;
4728{
4729 struct expr *result = 0;
4730
4731 for (;;)
4732 {
4733 rtx src;
ceda50e9 4734 struct expr *set = lookup_set (regno, &set_hash_table);
0e3f0221
RS
4735
4736 while (set)
4737 {
4738 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
4739 break;
4740 set = next_set (regno, set);
4741 }
4742
4743 if (set == 0)
4744 break;
4745
4746 if (GET_CODE (set->expr) != SET)
4747 abort ();
4748
4749 src = SET_SRC (set->expr);
4750 if (CONSTANT_P (src))
4751 result = set;
4752
4753 if (GET_CODE (src) != REG)
4754 break;
4755
4756 regno = REGNO (src);
4757 }
4758 return result;
4759}
4760
4761
4762/* Subroutine of bypass_conditional_jumps that attempts to bypass the given
4763 basic block BB which has more than one predecessor. If not NULL, SETCC
4764 is the first instruction of BB, which is immediately followed by JUMP_INSN
4765 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
4766 Returns nonzero if a change was made. */
4767
4768static int
4769bypass_block (bb, setcc, jump)
4770 basic_block bb;
4771 rtx setcc, jump;
4772{
4773 rtx insn, note;
4774 edge e, enext;
818b6b7f 4775 int i, change;
0e3f0221
RS
4776
4777 insn = (setcc != NULL) ? setcc : jump;
4778
4779 /* Determine set of register uses in INSN. */
4780 reg_use_count = 0;
4781 note_uses (&PATTERN (insn), find_used_regs, NULL);
4782 note = find_reg_equal_equiv_note (insn);
4783 if (note)
4784 find_used_regs (&XEXP (note, 0), NULL);
4785
4786 change = 0;
4787 for (e = bb->pred; e; e = enext)
4788 {
4789 enext = e->pred_next;
7821bfc7
RS
4790 if (e->flags & EDGE_COMPLEX)
4791 continue;
4792
4793 /* We can't redirect edges from new basic blocks. */
4794 if (e->src->index >= bypass_last_basic_block)
4795 continue;
4796
0e3f0221
RS
4797 for (i = 0; i < reg_use_count; i++)
4798 {
4799 struct reg_use *reg_used = &reg_use_table[i];
589005ff 4800 unsigned int regno = REGNO (reg_used->reg_rtx);
818b6b7f 4801 basic_block dest, old_dest;
589005ff
KH
4802 struct expr *set;
4803 rtx src, new;
0e3f0221 4804
589005ff
KH
4805 if (regno >= max_gcse_regno)
4806 continue;
0e3f0221 4807
589005ff 4808 set = find_bypass_set (regno, e->src->index);
0e3f0221
RS
4809
4810 if (! set)
4811 continue;
4812
589005ff 4813 src = SET_SRC (pc_set (jump));
0e3f0221
RS
4814
4815 if (setcc != NULL)
4816 src = simplify_replace_rtx (src,
589005ff
KH
4817 SET_DEST (PATTERN (setcc)),
4818 SET_SRC (PATTERN (setcc)));
0e3f0221
RS
4819
4820 new = simplify_replace_rtx (src, reg_used->reg_rtx,
589005ff 4821 SET_SRC (set->expr));
0e3f0221 4822
589005ff 4823 if (new == pc_rtx)
0e3f0221
RS
4824 dest = FALLTHRU_EDGE (bb)->dest;
4825 else if (GET_CODE (new) == LABEL_REF)
9a71ece1 4826 dest = BLOCK_FOR_INSN (XEXP (new, 0));
0e3f0221
RS
4827 else
4828 dest = NULL;
4829
818b6b7f 4830 old_dest = e->dest;
7821bfc7
RS
4831 if (dest != NULL
4832 && dest != old_dest
4833 && dest != EXIT_BLOCK_PTR)
4834 {
4835 redirect_edge_and_branch_force (e, dest);
4836
818b6b7f 4837 /* Copy the register setter to the redirected edge.
0e3f0221
RS
4838 Don't copy CC0 setters, as CC0 is dead after jump. */
4839 if (setcc)
4840 {
4841 rtx pat = PATTERN (setcc);
818b6b7f 4842 if (!CC0_P (SET_DEST (pat)))
0e3f0221
RS
4843 insert_insn_on_edge (copy_insn (pat), e);
4844 }
4845
4846 if (gcse_file != NULL)
4847 {
818b6b7f
RH
4848 fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d in jump_insn %d equals constant ",
4849 regno, INSN_UID (jump));
0e3f0221
RS
4850 print_rtl (gcse_file, SET_SRC (set->expr));
4851 fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n",
818b6b7f 4852 e->src->index, old_dest->index, dest->index);
0e3f0221
RS
4853 }
4854 change = 1;
4855 break;
4856 }
4857 }
4858 }
4859 return change;
4860}
4861
4862/* Find basic blocks with more than one predecessor that only contain a
4863 single conditional jump. If the result of the comparison is known at
4864 compile-time from any incoming edge, redirect that edge to the
9a71ece1
RH
4865 appropriate target. Returns nonzero if a change was made.
4866
4867 This function is now mis-named, because we also handle indirect jumps. */
0e3f0221
RS
4868
4869static int
4870bypass_conditional_jumps ()
4871{
4872 basic_block bb;
4873 int changed;
4874 rtx setcc;
4875 rtx insn;
4876 rtx dest;
4877
4878 /* Note we start at block 1. */
4879 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4880 return 0;
4881
7821bfc7
RS
4882 bypass_last_basic_block = last_basic_block;
4883
0e3f0221
RS
4884 changed = 0;
4885 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
589005ff 4886 EXIT_BLOCK_PTR, next_bb)
0e3f0221
RS
4887 {
4888 /* Check for more than one predecessor. */
4889 if (bb->pred && bb->pred->pred_next)
4890 {
4891 setcc = NULL_RTX;
4892 for (insn = bb->head;
4893 insn != NULL && insn != NEXT_INSN (bb->end);
4894 insn = NEXT_INSN (insn))
4895 if (GET_CODE (insn) == INSN)
4896 {
9543a9d2 4897 if (setcc)
0e3f0221 4898 break;
ba4f7968 4899 if (GET_CODE (PATTERN (insn)) != SET)
0e3f0221
RS
4900 break;
4901
ba4f7968 4902 dest = SET_DEST (PATTERN (insn));
818b6b7f 4903 if (REG_P (dest) || CC0_P (dest))
0e3f0221 4904 setcc = insn;
0e3f0221
RS
4905 else
4906 break;
4907 }
4908 else if (GET_CODE (insn) == JUMP_INSN)
4909 {
9a71ece1
RH
4910 if ((any_condjump_p (insn) || computed_jump_p (insn))
4911 && onlyjump_p (insn))
0e3f0221
RS
4912 changed |= bypass_block (bb, setcc, insn);
4913 break;
4914 }
4915 else if (INSN_P (insn))
4916 break;
4917 }
4918 }
4919
818b6b7f 4920 /* If we bypassed any register setting insns, we inserted a
fbe5a4a6 4921 copy on the redirected edge. These need to be committed. */
0e3f0221
RS
4922 if (changed)
4923 commit_edge_insertions();
4924
4925 return changed;
4926}
4927\f
a65f3558 4928/* Compute PRE+LCM working variables. */
7506f491
DE
4929
4930/* Local properties of expressions. */
4931/* Nonzero for expressions that are transparent in the block. */
a65f3558 4932static sbitmap *transp;
7506f491 4933
5c35539b
RH
4934/* Nonzero for expressions that are transparent at the end of the block.
4935 This is only zero for expressions killed by abnormal critical edge
4936 created by a calls. */
a65f3558 4937static sbitmap *transpout;
5c35539b 4938
a65f3558
JL
4939/* Nonzero for expressions that are computed (available) in the block. */
4940static sbitmap *comp;
7506f491 4941
a65f3558
JL
4942/* Nonzero for expressions that are locally anticipatable in the block. */
4943static sbitmap *antloc;
7506f491 4944
a65f3558
JL
4945/* Nonzero for expressions where this block is an optimal computation
4946 point. */
4947static sbitmap *pre_optimal;
5c35539b 4948
a65f3558
JL
4949/* Nonzero for expressions which are redundant in a particular block. */
4950static sbitmap *pre_redundant;
7506f491 4951
a42cd965
AM
4952/* Nonzero for expressions which should be inserted on a specific edge. */
4953static sbitmap *pre_insert_map;
4954
4955/* Nonzero for expressions which should be deleted in a specific block. */
4956static sbitmap *pre_delete_map;
4957
4958/* Contains the edge_list returned by pre_edge_lcm. */
4959static struct edge_list *edge_list;
4960
a65f3558
JL
4961/* Redundant insns. */
4962static sbitmap pre_redundant_insns;
7506f491 4963
a65f3558 4964/* Allocate vars used for PRE analysis. */
7506f491
DE
4965
4966static void
a65f3558
JL
4967alloc_pre_mem (n_blocks, n_exprs)
4968 int n_blocks, n_exprs;
7506f491 4969{
a65f3558
JL
4970 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4971 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4972 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
5faf03ae 4973
a42cd965
AM
4974 pre_optimal = NULL;
4975 pre_redundant = NULL;
4976 pre_insert_map = NULL;
4977 pre_delete_map = NULL;
4978 ae_in = NULL;
4979 ae_out = NULL;
a42cd965 4980 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
c4c81601 4981
a42cd965 4982 /* pre_insert and pre_delete are allocated later. */
7506f491
DE
4983}
4984
a65f3558 4985/* Free vars used for PRE analysis. */
7506f491
DE
4986
4987static void
a65f3558 4988free_pre_mem ()
7506f491 4989{
5a660bff
DB
4990 sbitmap_vector_free (transp);
4991 sbitmap_vector_free (comp);
bd3675fc
JL
4992
4993 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
7506f491 4994
a42cd965 4995 if (pre_optimal)
5a660bff 4996 sbitmap_vector_free (pre_optimal);
a42cd965 4997 if (pre_redundant)
5a660bff 4998 sbitmap_vector_free (pre_redundant);
a42cd965 4999 if (pre_insert_map)
5a660bff 5000 sbitmap_vector_free (pre_insert_map);
a42cd965 5001 if (pre_delete_map)
5a660bff 5002 sbitmap_vector_free (pre_delete_map);
a42cd965 5003 if (ae_in)
5a660bff 5004 sbitmap_vector_free (ae_in);
a42cd965 5005 if (ae_out)
5a660bff 5006 sbitmap_vector_free (ae_out);
a42cd965 5007
bd3675fc 5008 transp = comp = NULL;
a42cd965 5009 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
55d3f917 5010 ae_in = ae_out = NULL;
7506f491
DE
5011}
5012
5013/* Top level routine to do the dataflow analysis needed by PRE. */
5014
5015static void
5016compute_pre_data ()
5017{
b614171e 5018 sbitmap trapping_expr;
e0082a72 5019 basic_block bb;
b614171e 5020 unsigned int ui;
c66e8ae9 5021
02280659 5022 compute_local_properties (transp, comp, antloc, &expr_hash_table);
d55bc081 5023 sbitmap_vector_zero (ae_kill, last_basic_block);
c66e8ae9 5024
b614171e 5025 /* Collect expressions which might trap. */
02280659 5026 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
b614171e 5027 sbitmap_zero (trapping_expr);
02280659 5028 for (ui = 0; ui < expr_hash_table.size; ui++)
b614171e
MM
5029 {
5030 struct expr *e;
02280659 5031 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
b614171e
MM
5032 if (may_trap_p (e->expr))
5033 SET_BIT (trapping_expr, e->bitmap_index);
5034 }
5035
c66e8ae9
JL
5036 /* Compute ae_kill for each basic block using:
5037
5038 ~(TRANSP | COMP)
5039
a2e90653 5040 This is significantly faster than compute_ae_kill. */
c66e8ae9 5041
e0082a72 5042 FOR_EACH_BB (bb)
c66e8ae9 5043 {
b614171e
MM
5044 edge e;
5045
5046 /* If the current block is the destination of an abnormal edge, we
5047 kill all trapping expressions because we won't be able to properly
5048 place the instruction on the edge. So make them neither
5049 anticipatable nor transparent. This is fairly conservative. */
e0082a72 5050 for (e = bb->pred; e ; e = e->pred_next)
b614171e
MM
5051 if (e->flags & EDGE_ABNORMAL)
5052 {
e0082a72
ZD
5053 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
5054 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
b614171e
MM
5055 break;
5056 }
5057
e0082a72
ZD
5058 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
5059 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
c66e8ae9
JL
5060 }
5061
02280659 5062 edge_list = pre_edge_lcm (gcse_file, expr_hash_table.n_elems, transp, comp, antloc,
a42cd965 5063 ae_kill, &pre_insert_map, &pre_delete_map);
5a660bff 5064 sbitmap_vector_free (antloc);
bd3675fc 5065 antloc = NULL;
5a660bff 5066 sbitmap_vector_free (ae_kill);
589005ff 5067 ae_kill = NULL;
76ac938b 5068 sbitmap_free (trapping_expr);
7506f491
DE
5069}
5070\f
5071/* PRE utilities */
5072
cc2902df 5073/* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
a65f3558 5074 block BB.
7506f491
DE
5075
5076 VISITED is a pointer to a working buffer for tracking which BB's have
5077 been visited. It is NULL for the top-level call.
5078
5079 We treat reaching expressions that go through blocks containing the same
5080 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
5081 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
5082 2 as not reaching. The intent is to improve the probability of finding
5083 only one reaching expression and to reduce register lifetimes by picking
5084 the closest such expression. */
5085
5086static int
89e606c9 5087pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited)
e2d2ed72 5088 basic_block occr_bb;
7506f491 5089 struct expr *expr;
e2d2ed72 5090 basic_block bb;
7506f491
DE
5091 char *visited;
5092{
36349f8b 5093 edge pred;
7506f491 5094
e2d2ed72 5095 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7506f491 5096 {
e2d2ed72 5097 basic_block pred_bb = pred->src;
7506f491 5098
36349f8b 5099 if (pred->src == ENTRY_BLOCK_PTR
7506f491 5100 /* Has predecessor has already been visited? */
0b17ab2f 5101 || visited[pred_bb->index])
c4c81601
RK
5102 ;/* Nothing to do. */
5103
7506f491 5104 /* Does this predecessor generate this expression? */
0b17ab2f 5105 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
7506f491
DE
5106 {
5107 /* Is this the occurrence we're looking for?
5108 Note that there's only one generating occurrence per block
5109 so we just need to check the block number. */
a65f3558 5110 if (occr_bb == pred_bb)
7506f491 5111 return 1;
c4c81601 5112
0b17ab2f 5113 visited[pred_bb->index] = 1;
7506f491
DE
5114 }
5115 /* Ignore this predecessor if it kills the expression. */
0b17ab2f
RH
5116 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
5117 visited[pred_bb->index] = 1;
c4c81601 5118
7506f491
DE
5119 /* Neither gen nor kill. */
5120 else
ac7c5af5 5121 {
0b17ab2f 5122 visited[pred_bb->index] = 1;
89e606c9 5123 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
7506f491 5124 return 1;
ac7c5af5 5125 }
7506f491
DE
5126 }
5127
5128 /* All paths have been checked. */
5129 return 0;
5130}
283a2545
RL
5131
5132/* The wrapper for pre_expr_reaches_here_work that ensures that any
dc297297 5133 memory allocated for that function is returned. */
283a2545
RL
5134
5135static int
89e606c9 5136pre_expr_reaches_here_p (occr_bb, expr, bb)
e2d2ed72 5137 basic_block occr_bb;
283a2545 5138 struct expr *expr;
e2d2ed72 5139 basic_block bb;
283a2545
RL
5140{
5141 int rval;
d55bc081 5142 char *visited = (char *) xcalloc (last_basic_block, 1);
283a2545 5143
8e42ace1 5144 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
283a2545
RL
5145
5146 free (visited);
c4c81601 5147 return rval;
283a2545 5148}
7506f491 5149\f
a42cd965
AM
5150
5151/* Given an expr, generate RTL which we can insert at the end of a BB,
589005ff 5152 or on an edge. Set the block number of any insns generated to
a42cd965
AM
5153 the value of BB. */
5154
5155static rtx
5156process_insert_insn (expr)
5157 struct expr *expr;
5158{
5159 rtx reg = expr->reaching_reg;
fb0c0a12
RK
5160 rtx exp = copy_rtx (expr->expr);
5161 rtx pat;
a42cd965
AM
5162
5163 start_sequence ();
fb0c0a12
RK
5164
5165 /* If the expression is something that's an operand, like a constant,
5166 just copy it to a register. */
5167 if (general_operand (exp, GET_MODE (reg)))
5168 emit_move_insn (reg, exp);
5169
5170 /* Otherwise, make a new insn to compute this expression and make sure the
5171 insn will be recognized (this also adds any needed CLOBBERs). Copy the
5172 expression to make sure we don't have any sharing issues. */
8d444206 5173 else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
fb0c0a12 5174 abort ();
589005ff 5175
2f937369 5176 pat = get_insns ();
a42cd965
AM
5177 end_sequence ();
5178
5179 return pat;
5180}
589005ff 5181
a65f3558
JL
5182/* Add EXPR to the end of basic block BB.
5183
5184 This is used by both the PRE and code hoisting.
5185
5186 For PRE, we want to verify that the expr is either transparent
5187 or locally anticipatable in the target block. This check makes
5188 no sense for code hoisting. */
7506f491
DE
5189
5190static void
a65f3558 5191insert_insn_end_bb (expr, bb, pre)
7506f491 5192 struct expr *expr;
e2d2ed72 5193 basic_block bb;
a65f3558 5194 int pre;
7506f491 5195{
e2d2ed72 5196 rtx insn = bb->end;
7506f491
DE
5197 rtx new_insn;
5198 rtx reg = expr->reaching_reg;
5199 int regno = REGNO (reg);
2f937369 5200 rtx pat, pat_end;
7506f491 5201
a42cd965 5202 pat = process_insert_insn (expr);
2f937369
DM
5203 if (pat == NULL_RTX || ! INSN_P (pat))
5204 abort ();
5205
5206 pat_end = pat;
5207 while (NEXT_INSN (pat_end) != NULL_RTX)
5208 pat_end = NEXT_INSN (pat_end);
7506f491
DE
5209
5210 /* If the last insn is a jump, insert EXPR in front [taking care to
068473ec
JH
5211 handle cc0, etc. properly]. Similary we need to care trapping
5212 instructions in presence of non-call exceptions. */
7506f491 5213
068473ec
JH
5214 if (GET_CODE (insn) == JUMP_INSN
5215 || (GET_CODE (insn) == INSN
5216 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL))))
7506f491 5217 {
50b2596f 5218#ifdef HAVE_cc0
7506f491 5219 rtx note;
50b2596f 5220#endif
068473ec
JH
5221 /* It should always be the case that we can put these instructions
5222 anywhere in the basic block with performing PRE optimizations.
5223 Check this. */
3b25fbfe 5224 if (GET_CODE (insn) == INSN && pre
0b17ab2f 5225 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
589005ff 5226 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
068473ec 5227 abort ();
7506f491
DE
5228
5229 /* If this is a jump table, then we can't insert stuff here. Since
5230 we know the previous real insn must be the tablejump, we insert
5231 the new instruction just before the tablejump. */
5232 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
5233 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
5234 insn = prev_real_insn (insn);
5235
5236#ifdef HAVE_cc0
5237 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
5238 if cc0 isn't set. */
5239 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
5240 if (note)
5241 insn = XEXP (note, 0);
5242 else
5243 {
5244 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
5245 if (maybe_cc0_setter
2c3c49de 5246 && INSN_P (maybe_cc0_setter)
7506f491
DE
5247 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
5248 insn = maybe_cc0_setter;
5249 }
5250#endif
5251 /* FIXME: What if something in cc0/jump uses value set in new insn? */
3c030e88 5252 new_insn = emit_insn_before (pat, insn);
3947e2f9 5253 }
c4c81601 5254
3947e2f9
RH
5255 /* Likewise if the last insn is a call, as will happen in the presence
5256 of exception handling. */
068473ec
JH
5257 else if (GET_CODE (insn) == CALL_INSN
5258 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL)))
3947e2f9 5259 {
3947e2f9
RH
5260 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
5261 we search backward and place the instructions before the first
5262 parameter is loaded. Do this for everyone for consistency and a
fbe5a4a6 5263 presumption that we'll get better code elsewhere as well.
3947e2f9 5264
c4c81601 5265 It should always be the case that we can put these instructions
a65f3558
JL
5266 anywhere in the basic block with performing PRE optimizations.
5267 Check this. */
c4c81601 5268
a65f3558 5269 if (pre
0b17ab2f 5270 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
589005ff 5271 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
3947e2f9
RH
5272 abort ();
5273
5274 /* Since different machines initialize their parameter registers
5275 in different orders, assume nothing. Collect the set of all
5276 parameter registers. */
833366d6 5277 insn = find_first_parameter_load (insn, bb->head);
3947e2f9 5278
b1d26727
JL
5279 /* If we found all the parameter loads, then we want to insert
5280 before the first parameter load.
5281
5282 If we did not find all the parameter loads, then we might have
5283 stopped on the head of the block, which could be a CODE_LABEL.
5284 If we inserted before the CODE_LABEL, then we would be putting
5285 the insn in the wrong basic block. In that case, put the insn
b5229628 5286 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
0a377997 5287 while (GET_CODE (insn) == CODE_LABEL
589ca5cb 5288 || NOTE_INSN_BASIC_BLOCK_P (insn))
b5229628 5289 insn = NEXT_INSN (insn);
c4c81601 5290
3c030e88 5291 new_insn = emit_insn_before (pat, insn);
7506f491
DE
5292 }
5293 else
3c030e88 5294 new_insn = emit_insn_after (pat, insn);
7506f491 5295
2f937369 5296 while (1)
a65f3558 5297 {
2f937369 5298 if (INSN_P (pat))
a65f3558 5299 {
2f937369
DM
5300 add_label_notes (PATTERN (pat), new_insn);
5301 note_stores (PATTERN (pat), record_set_info, pat);
a65f3558 5302 }
2f937369
DM
5303 if (pat == pat_end)
5304 break;
5305 pat = NEXT_INSN (pat);
a65f3558 5306 }
3947e2f9 5307
7506f491
DE
5308 gcse_create_count++;
5309
5310 if (gcse_file)
5311 {
c4c81601 5312 fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ",
0b17ab2f 5313 bb->index, INSN_UID (new_insn));
c4c81601
RK
5314 fprintf (gcse_file, "copying expression %d to reg %d\n",
5315 expr->bitmap_index, regno);
7506f491
DE
5316 }
5317}
5318
a42cd965
AM
5319/* Insert partially redundant expressions on edges in the CFG to make
5320 the expressions fully redundant. */
7506f491 5321
a42cd965
AM
5322static int
5323pre_edge_insert (edge_list, index_map)
5324 struct edge_list *edge_list;
7506f491
DE
5325 struct expr **index_map;
5326{
c4c81601 5327 int e, i, j, num_edges, set_size, did_insert = 0;
a65f3558
JL
5328 sbitmap *inserted;
5329
a42cd965
AM
5330 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
5331 if it reaches any of the deleted expressions. */
7506f491 5332
a42cd965
AM
5333 set_size = pre_insert_map[0]->size;
5334 num_edges = NUM_EDGES (edge_list);
02280659 5335 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
a42cd965 5336 sbitmap_vector_zero (inserted, num_edges);
7506f491 5337
a42cd965 5338 for (e = 0; e < num_edges; e++)
7506f491
DE
5339 {
5340 int indx;
e2d2ed72 5341 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
a65f3558 5342
a65f3558 5343 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
7506f491 5344 {
a42cd965 5345 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
7506f491 5346
02280659 5347 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
c4c81601
RK
5348 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
5349 {
5350 struct expr *expr = index_map[j];
5351 struct occr *occr;
a65f3558 5352
ff7cc307 5353 /* Now look at each deleted occurrence of this expression. */
c4c81601
RK
5354 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5355 {
5356 if (! occr->deleted_p)
5357 continue;
5358
5359 /* Insert this expression on this edge if if it would
ff7cc307 5360 reach the deleted occurrence in BB. */
c4c81601
RK
5361 if (!TEST_BIT (inserted[e], j))
5362 {
5363 rtx insn;
5364 edge eg = INDEX_EDGE (edge_list, e);
5365
5366 /* We can't insert anything on an abnormal and
5367 critical edge, so we insert the insn at the end of
5368 the previous block. There are several alternatives
5369 detailed in Morgans book P277 (sec 10.5) for
5370 handling this situation. This one is easiest for
5371 now. */
5372
5373 if ((eg->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
5374 insert_insn_end_bb (index_map[j], bb, 0);
5375 else
5376 {
5377 insn = process_insert_insn (index_map[j]);
5378 insert_insn_on_edge (insn, eg);
5379 }
5380
5381 if (gcse_file)
5382 {
5383 fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ",
0b17ab2f
RH
5384 bb->index,
5385 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
c4c81601
RK
5386 fprintf (gcse_file, "copy expression %d\n",
5387 expr->bitmap_index);
5388 }
5389
a13d4ebf 5390 update_ld_motion_stores (expr);
c4c81601
RK
5391 SET_BIT (inserted[e], j);
5392 did_insert = 1;
5393 gcse_create_count++;
5394 }
5395 }
5396 }
7506f491
DE
5397 }
5398 }
5faf03ae 5399
5a660bff 5400 sbitmap_vector_free (inserted);
a42cd965 5401 return did_insert;
7506f491
DE
5402}
5403
c4c81601 5404/* Copy the result of INSN to REG. INDX is the expression number. */
7506f491
DE
5405
5406static void
5407pre_insert_copy_insn (expr, insn)
5408 struct expr *expr;
5409 rtx insn;
5410{
5411 rtx reg = expr->reaching_reg;
5412 int regno = REGNO (reg);
5413 int indx = expr->bitmap_index;
5414 rtx set = single_set (insn);
5415 rtx new_insn;
5416
5417 if (!set)
5418 abort ();
c4c81601 5419
cccf0ae8 5420 new_insn = emit_insn_after (gen_move_insn (reg, SET_DEST (set)), insn);
c4c81601 5421
7506f491
DE
5422 /* Keep register set table up to date. */
5423 record_one_set (regno, new_insn);
5424
5425 gcse_create_count++;
5426
5427 if (gcse_file)
a42cd965
AM
5428 fprintf (gcse_file,
5429 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
5430 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
5431 INSN_UID (insn), regno);
222f7ba9 5432 update_ld_motion_stores (expr);
7506f491
DE
5433}
5434
5435/* Copy available expressions that reach the redundant expression
5436 to `reaching_reg'. */
5437
5438static void
5439pre_insert_copies ()
5440{
2e653e39 5441 unsigned int i;
c4c81601
RK
5442 struct expr *expr;
5443 struct occr *occr;
5444 struct occr *avail;
a65f3558 5445
7506f491
DE
5446 /* For each available expression in the table, copy the result to
5447 `reaching_reg' if the expression reaches a deleted one.
5448
5449 ??? The current algorithm is rather brute force.
5450 Need to do some profiling. */
5451
02280659
ZD
5452 for (i = 0; i < expr_hash_table.size; i++)
5453 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
5454 {
5455 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
5456 we don't want to insert a copy here because the expression may not
5457 really be redundant. So only insert an insn if the expression was
5458 deleted. This test also avoids further processing if the
5459 expression wasn't deleted anywhere. */
5460 if (expr->reaching_reg == NULL)
5461 continue;
5462
5463 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5464 {
5465 if (! occr->deleted_p)
5466 continue;
7506f491 5467
c4c81601
RK
5468 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
5469 {
5470 rtx insn = avail->insn;
7506f491 5471
c4c81601
RK
5472 /* No need to handle this one if handled already. */
5473 if (avail->copied_p)
5474 continue;
7506f491 5475
c4c81601
RK
5476 /* Don't handle this one if it's a redundant one. */
5477 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
5478 continue;
7506f491 5479
c4c81601 5480 /* Or if the expression doesn't reach the deleted one. */
589005ff 5481 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
e2d2ed72
AM
5482 expr,
5483 BLOCK_FOR_INSN (occr->insn)))
c4c81601 5484 continue;
7506f491 5485
c4c81601
RK
5486 /* Copy the result of avail to reaching_reg. */
5487 pre_insert_copy_insn (expr, insn);
5488 avail->copied_p = 1;
5489 }
5490 }
5491 }
7506f491
DE
5492}
5493
10d1bb36
JH
5494/* Emit move from SRC to DEST noting the equivalence with expression computed
5495 in INSN. */
5496static rtx
5497gcse_emit_move_after (src, dest, insn)
5498 rtx src, dest, insn;
5499{
5500 rtx new;
6bdb8dd6 5501 rtx set = single_set (insn), set2;
10d1bb36
JH
5502 rtx note;
5503 rtx eqv;
5504
5505 /* This should never fail since we're creating a reg->reg copy
5506 we've verified to be valid. */
5507
6bdb8dd6 5508 new = emit_insn_after (gen_move_insn (dest, src), insn);
285464d0 5509
10d1bb36 5510 /* Note the equivalence for local CSE pass. */
6bdb8dd6
JH
5511 set2 = single_set (new);
5512 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
5513 return new;
10d1bb36
JH
5514 if ((note = find_reg_equal_equiv_note (insn)))
5515 eqv = XEXP (note, 0);
5516 else
5517 eqv = SET_SRC (set);
5518
a500466b 5519 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
10d1bb36
JH
5520
5521 return new;
5522}
5523
7506f491 5524/* Delete redundant computations.
7506f491
DE
5525 Deletion is done by changing the insn to copy the `reaching_reg' of
5526 the expression into the result of the SET. It is left to later passes
5527 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
5528
cc2902df 5529 Returns nonzero if a change is made. */
7506f491
DE
5530
5531static int
5532pre_delete ()
5533{
2e653e39 5534 unsigned int i;
63bc1d05 5535 int changed;
c4c81601
RK
5536 struct expr *expr;
5537 struct occr *occr;
a65f3558 5538
7506f491 5539 changed = 0;
02280659
ZD
5540 for (i = 0; i < expr_hash_table.size; i++)
5541 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
5542 {
5543 int indx = expr->bitmap_index;
7506f491 5544
c4c81601
RK
5545 /* We only need to search antic_occr since we require
5546 ANTLOC != 0. */
7506f491 5547
c4c81601
RK
5548 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5549 {
5550 rtx insn = occr->insn;
5551 rtx set;
e2d2ed72 5552 basic_block bb = BLOCK_FOR_INSN (insn);
7506f491 5553
0b17ab2f 5554 if (TEST_BIT (pre_delete_map[bb->index], indx))
c4c81601
RK
5555 {
5556 set = single_set (insn);
5557 if (! set)
5558 abort ();
5559
5560 /* Create a pseudo-reg to store the result of reaching
5561 expressions into. Get the mode for the new pseudo from
5562 the mode of the original destination pseudo. */
5563 if (expr->reaching_reg == NULL)
5564 expr->reaching_reg
5565 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
5566
10d1bb36
JH
5567 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
5568 delete_insn (insn);
5569 occr->deleted_p = 1;
5570 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
5571 changed = 1;
5572 gcse_subst_count++;
7506f491 5573
c4c81601
RK
5574 if (gcse_file)
5575 {
5576 fprintf (gcse_file,
5577 "PRE: redundant insn %d (expression %d) in ",
5578 INSN_UID (insn), indx);
5579 fprintf (gcse_file, "bb %d, reaching reg is %d\n",
0b17ab2f 5580 bb->index, REGNO (expr->reaching_reg));
c4c81601
RK
5581 }
5582 }
5583 }
5584 }
7506f491
DE
5585
5586 return changed;
5587}
5588
5589/* Perform GCSE optimizations using PRE.
5590 This is called by one_pre_gcse_pass after all the dataflow analysis
5591 has been done.
5592
c4c81601
RK
5593 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
5594 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
5595 Compiler Design and Implementation.
7506f491 5596
c4c81601
RK
5597 ??? A new pseudo reg is created to hold the reaching expression. The nice
5598 thing about the classical approach is that it would try to use an existing
5599 reg. If the register can't be adequately optimized [i.e. we introduce
5600 reload problems], one could add a pass here to propagate the new register
5601 through the block.
7506f491 5602
c4c81601
RK
5603 ??? We don't handle single sets in PARALLELs because we're [currently] not
5604 able to copy the rest of the parallel when we insert copies to create full
5605 redundancies from partial redundancies. However, there's no reason why we
5606 can't handle PARALLELs in the cases where there are no partial
7506f491
DE
5607 redundancies. */
5608
5609static int
5610pre_gcse ()
5611{
2e653e39
RK
5612 unsigned int i;
5613 int did_insert, changed;
7506f491 5614 struct expr **index_map;
c4c81601 5615 struct expr *expr;
7506f491
DE
5616
5617 /* Compute a mapping from expression number (`bitmap_index') to
5618 hash table entry. */
5619
02280659
ZD
5620 index_map = (struct expr **) xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
5621 for (i = 0; i < expr_hash_table.size; i++)
5622 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601 5623 index_map[expr->bitmap_index] = expr;
7506f491
DE
5624
5625 /* Reset bitmap used to track which insns are redundant. */
a65f3558
JL
5626 pre_redundant_insns = sbitmap_alloc (max_cuid);
5627 sbitmap_zero (pre_redundant_insns);
7506f491
DE
5628
5629 /* Delete the redundant insns first so that
5630 - we know what register to use for the new insns and for the other
5631 ones with reaching expressions
5632 - we know which insns are redundant when we go to create copies */
c4c81601 5633
7506f491
DE
5634 changed = pre_delete ();
5635
a42cd965 5636 did_insert = pre_edge_insert (edge_list, index_map);
c4c81601 5637
7506f491 5638 /* In other places with reaching expressions, copy the expression to the
a42cd965 5639 specially allocated pseudo-reg that reaches the redundant expr. */
7506f491 5640 pre_insert_copies ();
a42cd965
AM
5641 if (did_insert)
5642 {
5643 commit_edge_insertions ();
5644 changed = 1;
5645 }
7506f491 5646
283a2545 5647 free (index_map);
76ac938b 5648 sbitmap_free (pre_redundant_insns);
7506f491
DE
5649 return changed;
5650}
5651
5652/* Top level routine to perform one PRE GCSE pass.
5653
cc2902df 5654 Return nonzero if a change was made. */
7506f491
DE
5655
5656static int
b5ce41ff 5657one_pre_gcse_pass (pass)
7506f491
DE
5658 int pass;
5659{
5660 int changed = 0;
5661
5662 gcse_subst_count = 0;
5663 gcse_create_count = 0;
5664
02280659 5665 alloc_hash_table (max_cuid, &expr_hash_table, 0);
a42cd965 5666 add_noreturn_fake_exit_edges ();
a13d4ebf
AM
5667 if (flag_gcse_lm)
5668 compute_ld_motion_mems ();
5669
02280659 5670 compute_hash_table (&expr_hash_table);
a13d4ebf 5671 trim_ld_motion_mems ();
7506f491 5672 if (gcse_file)
02280659 5673 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
c4c81601 5674
02280659 5675 if (expr_hash_table.n_elems > 0)
7506f491 5676 {
02280659 5677 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
7506f491
DE
5678 compute_pre_data ();
5679 changed |= pre_gcse ();
a42cd965 5680 free_edge_list (edge_list);
7506f491
DE
5681 free_pre_mem ();
5682 }
c4c81601 5683
a13d4ebf 5684 free_ldst_mems ();
a42cd965 5685 remove_fake_edges ();
02280659 5686 free_hash_table (&expr_hash_table);
7506f491
DE
5687
5688 if (gcse_file)
5689 {
c4c81601
RK
5690 fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
5691 current_function_name, pass, bytes_used);
5692 fprintf (gcse_file, "%d substs, %d insns created\n",
5693 gcse_subst_count, gcse_create_count);
7506f491
DE
5694 }
5695
5696 return changed;
5697}
aeb2f500
JW
5698\f
5699/* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
5b1ef594
JDA
5700 If notes are added to an insn which references a CODE_LABEL, the
5701 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
5702 because the following loop optimization pass requires them. */
aeb2f500
JW
5703
5704/* ??? This is very similar to the loop.c add_label_notes function. We
5705 could probably share code here. */
5706
5707/* ??? If there was a jump optimization pass after gcse and before loop,
5708 then we would not need to do this here, because jump would add the
5709 necessary REG_LABEL notes. */
5710
5711static void
5712add_label_notes (x, insn)
5713 rtx x;
5714 rtx insn;
5715{
5716 enum rtx_code code = GET_CODE (x);
5717 int i, j;
6f7d635c 5718 const char *fmt;
aeb2f500
JW
5719
5720 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
5721 {
6b3603c2 5722 /* This code used to ignore labels that referred to dispatch tables to
ac7c5af5 5723 avoid flow generating (slighly) worse code.
6b3603c2 5724
ac7c5af5
JL
5725 We no longer ignore such label references (see LABEL_REF handling in
5726 mark_jump_label for additional information). */
c4c81601 5727
6b8c9327 5728 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
6b3603c2 5729 REG_NOTES (insn));
5b1ef594 5730 if (LABEL_P (XEXP (x, 0)))
589005ff 5731 LABEL_NUSES (XEXP (x, 0))++;
aeb2f500
JW
5732 return;
5733 }
5734
c4c81601 5735 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
aeb2f500
JW
5736 {
5737 if (fmt[i] == 'e')
5738 add_label_notes (XEXP (x, i), insn);
5739 else if (fmt[i] == 'E')
5740 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5741 add_label_notes (XVECEXP (x, i, j), insn);
5742 }
5743}
a65f3558
JL
5744
5745/* Compute transparent outgoing information for each block.
5746
5747 An expression is transparent to an edge unless it is killed by
5748 the edge itself. This can only happen with abnormal control flow,
5749 when the edge is traversed through a call. This happens with
5750 non-local labels and exceptions.
5751
5752 This would not be necessary if we split the edge. While this is
5753 normally impossible for abnormal critical edges, with some effort
5754 it should be possible with exception handling, since we still have
5755 control over which handler should be invoked. But due to increased
5756 EH table sizes, this may not be worthwhile. */
5757
5758static void
5759compute_transpout ()
5760{
e0082a72 5761 basic_block bb;
2e653e39 5762 unsigned int i;
c4c81601 5763 struct expr *expr;
a65f3558 5764
d55bc081 5765 sbitmap_vector_ones (transpout, last_basic_block);
a65f3558 5766
e0082a72 5767 FOR_EACH_BB (bb)
a65f3558 5768 {
a65f3558
JL
5769 /* Note that flow inserted a nop a the end of basic blocks that
5770 end in call instructions for reasons other than abnormal
5771 control flow. */
e0082a72 5772 if (GET_CODE (bb->end) != CALL_INSN)
a65f3558
JL
5773 continue;
5774
02280659
ZD
5775 for (i = 0; i < expr_hash_table.size; i++)
5776 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
c4c81601
RK
5777 if (GET_CODE (expr->expr) == MEM)
5778 {
5779 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
5780 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
5781 continue;
589005ff 5782
c4c81601
RK
5783 /* ??? Optimally, we would use interprocedural alias
5784 analysis to determine if this mem is actually killed
5785 by this call. */
e0082a72 5786 RESET_BIT (transpout[bb->index], expr->bitmap_index);
c4c81601 5787 }
a65f3558
JL
5788 }
5789}
dfdb644f
JL
5790
5791/* Removal of useless null pointer checks */
5792
dfdb644f 5793/* Called via note_stores. X is set by SETTER. If X is a register we must
0511851c
MM
5794 invalidate nonnull_local and set nonnull_killed. DATA is really a
5795 `null_pointer_info *'.
dfdb644f
JL
5796
5797 We ignore hard registers. */
c4c81601 5798
dfdb644f 5799static void
84832317 5800invalidate_nonnull_info (x, setter, data)
dfdb644f
JL
5801 rtx x;
5802 rtx setter ATTRIBUTE_UNUSED;
0511851c 5803 void *data;
dfdb644f 5804{
770ae6cc
RK
5805 unsigned int regno;
5806 struct null_pointer_info *npi = (struct null_pointer_info *) data;
c4c81601 5807
dfdb644f
JL
5808 while (GET_CODE (x) == SUBREG)
5809 x = SUBREG_REG (x);
5810
5811 /* Ignore anything that is not a register or is a hard register. */
5812 if (GET_CODE (x) != REG
0511851c
MM
5813 || REGNO (x) < npi->min_reg
5814 || REGNO (x) >= npi->max_reg)
dfdb644f
JL
5815 return;
5816
0511851c 5817 regno = REGNO (x) - npi->min_reg;
dfdb644f 5818
e0082a72
ZD
5819 RESET_BIT (npi->nonnull_local[npi->current_block->index], regno);
5820 SET_BIT (npi->nonnull_killed[npi->current_block->index], regno);
dfdb644f
JL
5821}
5822
0511851c
MM
5823/* Do null-pointer check elimination for the registers indicated in
5824 NPI. NONNULL_AVIN and NONNULL_AVOUT are pre-allocated sbitmaps;
5825 they are not our responsibility to free. */
dfdb644f 5826
99a15921 5827static int
9cd56be1 5828delete_null_pointer_checks_1 (block_reg, nonnull_avin,
8e184d9c 5829 nonnull_avout, npi)
770ae6cc 5830 unsigned int *block_reg;
0511851c
MM
5831 sbitmap *nonnull_avin;
5832 sbitmap *nonnull_avout;
5833 struct null_pointer_info *npi;
dfdb644f 5834{
e0082a72 5835 basic_block bb, current_block;
0511851c
MM
5836 sbitmap *nonnull_local = npi->nonnull_local;
5837 sbitmap *nonnull_killed = npi->nonnull_killed;
99a15921 5838 int something_changed = 0;
589005ff 5839
dfdb644f
JL
5840 /* Compute local properties, nonnull and killed. A register will have
5841 the nonnull property if at the end of the current block its value is
5842 known to be nonnull. The killed property indicates that somewhere in
5843 the block any information we had about the register is killed.
5844
5845 Note that a register can have both properties in a single block. That
5846 indicates that it's killed, then later in the block a new value is
5847 computed. */
d55bc081
ZD
5848 sbitmap_vector_zero (nonnull_local, last_basic_block);
5849 sbitmap_vector_zero (nonnull_killed, last_basic_block);
c4c81601 5850
e0082a72 5851 FOR_EACH_BB (current_block)
dfdb644f
JL
5852 {
5853 rtx insn, stop_insn;
5854
0511851c
MM
5855 /* Set the current block for invalidate_nonnull_info. */
5856 npi->current_block = current_block;
5857
dfdb644f
JL
5858 /* Scan each insn in the basic block looking for memory references and
5859 register sets. */
e0082a72
ZD
5860 stop_insn = NEXT_INSN (current_block->end);
5861 for (insn = current_block->head;
dfdb644f
JL
5862 insn != stop_insn;
5863 insn = NEXT_INSN (insn))
5864 {
5865 rtx set;
0511851c 5866 rtx reg;
dfdb644f
JL
5867
5868 /* Ignore anything that is not a normal insn. */
2c3c49de 5869 if (! INSN_P (insn))
dfdb644f
JL
5870 continue;
5871
5872 /* Basically ignore anything that is not a simple SET. We do have
5873 to make sure to invalidate nonnull_local and set nonnull_killed
5874 for such insns though. */
5875 set = single_set (insn);
5876 if (!set)
5877 {
0511851c 5878 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
dfdb644f
JL
5879 continue;
5880 }
5881
f63d1bf7 5882 /* See if we've got a usable memory load. We handle it first
dfdb644f
JL
5883 in case it uses its address register as a dest (which kills
5884 the nonnull property). */
5885 if (GET_CODE (SET_SRC (set)) == MEM
0511851c
MM
5886 && GET_CODE ((reg = XEXP (SET_SRC (set), 0))) == REG
5887 && REGNO (reg) >= npi->min_reg
5888 && REGNO (reg) < npi->max_reg)
e0082a72 5889 SET_BIT (nonnull_local[current_block->index],
0511851c 5890 REGNO (reg) - npi->min_reg);
dfdb644f
JL
5891
5892 /* Now invalidate stuff clobbered by this insn. */
0511851c 5893 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
dfdb644f
JL
5894
5895 /* And handle stores, we do these last since any sets in INSN can
5896 not kill the nonnull property if it is derived from a MEM
5897 appearing in a SET_DEST. */
5898 if (GET_CODE (SET_DEST (set)) == MEM
0511851c
MM
5899 && GET_CODE ((reg = XEXP (SET_DEST (set), 0))) == REG
5900 && REGNO (reg) >= npi->min_reg
5901 && REGNO (reg) < npi->max_reg)
e0082a72 5902 SET_BIT (nonnull_local[current_block->index],
0511851c 5903 REGNO (reg) - npi->min_reg);
dfdb644f
JL
5904 }
5905 }
5906
5907 /* Now compute global properties based on the local properties. This
fbe5a4a6 5908 is a classic global availability algorithm. */
ce724250
JL
5909 compute_available (nonnull_local, nonnull_killed,
5910 nonnull_avout, nonnull_avin);
dfdb644f
JL
5911
5912 /* Now look at each bb and see if it ends with a compare of a value
5913 against zero. */
e0082a72 5914 FOR_EACH_BB (bb)
dfdb644f 5915 {
e0082a72 5916 rtx last_insn = bb->end;
0511851c 5917 rtx condition, earliest;
dfdb644f
JL
5918 int compare_and_branch;
5919
0511851c
MM
5920 /* Since MIN_REG is always at least FIRST_PSEUDO_REGISTER, and
5921 since BLOCK_REG[BB] is zero if this block did not end with a
5922 comparison against zero, this condition works. */
e0082a72
ZD
5923 if (block_reg[bb->index] < npi->min_reg
5924 || block_reg[bb->index] >= npi->max_reg)
dfdb644f
JL
5925 continue;
5926
5927 /* LAST_INSN is a conditional jump. Get its condition. */
5928 condition = get_condition (last_insn, &earliest);
5929
40d7a3fe
NB
5930 /* If we can't determine the condition then skip. */
5931 if (! condition)
5932 continue;
5933
dfdb644f 5934 /* Is the register known to have a nonzero value? */
e0082a72 5935 if (!TEST_BIT (nonnull_avout[bb->index], block_reg[bb->index] - npi->min_reg))
dfdb644f
JL
5936 continue;
5937
5938 /* Try to compute whether the compare/branch at the loop end is one or
5939 two instructions. */
5940 if (earliest == last_insn)
5941 compare_and_branch = 1;
5942 else if (earliest == prev_nonnote_insn (last_insn))
5943 compare_and_branch = 2;
5944 else
5945 continue;
5946
5947 /* We know the register in this comparison is nonnull at exit from
5948 this block. We can optimize this comparison. */
5949 if (GET_CODE (condition) == NE)
5950 {
5951 rtx new_jump;
5952
38c1593d
JH
5953 new_jump = emit_jump_insn_after (gen_jump (JUMP_LABEL (last_insn)),
5954 last_insn);
dfdb644f
JL
5955 JUMP_LABEL (new_jump) = JUMP_LABEL (last_insn);
5956 LABEL_NUSES (JUMP_LABEL (new_jump))++;
5957 emit_barrier_after (new_jump);
5958 }
8e184d9c 5959
99a15921 5960 something_changed = 1;
9cd56be1 5961 delete_insn (last_insn);
dfdb644f 5962 if (compare_and_branch == 2)
589005ff 5963 delete_insn (earliest);
e0082a72 5964 purge_dead_edges (bb);
0511851c
MM
5965
5966 /* Don't check this block again. (Note that BLOCK_END is
589005ff 5967 invalid here; we deleted the last instruction in the
0511851c 5968 block.) */
e0082a72 5969 block_reg[bb->index] = 0;
0511851c 5970 }
99a15921
JL
5971
5972 return something_changed;
0511851c
MM
5973}
5974
5975/* Find EQ/NE comparisons against zero which can be (indirectly) evaluated
5976 at compile time.
5977
5978 This is conceptually similar to global constant/copy propagation and
5979 classic global CSE (it even uses the same dataflow equations as cprop).
5980
5981 If a register is used as memory address with the form (mem (reg)), then we
5982 know that REG can not be zero at that point in the program. Any instruction
5983 which sets REG "kills" this property.
5984
5985 So, if every path leading to a conditional branch has an available memory
5986 reference of that form, then we know the register can not have the value
589005ff 5987 zero at the conditional branch.
0511851c 5988
fbe5a4a6 5989 So we merely need to compute the local properties and propagate that data
0511851c
MM
5990 around the cfg, then optimize where possible.
5991
5992 We run this pass two times. Once before CSE, then again after CSE. This
5993 has proven to be the most profitable approach. It is rare for new
5994 optimization opportunities of this nature to appear after the first CSE
5995 pass.
5996
5997 This could probably be integrated with global cprop with a little work. */
5998
99a15921 5999int
0511851c 6000delete_null_pointer_checks (f)
2e653e39 6001 rtx f ATTRIBUTE_UNUSED;
0511851c 6002{
0511851c 6003 sbitmap *nonnull_avin, *nonnull_avout;
770ae6cc 6004 unsigned int *block_reg;
e0082a72 6005 basic_block bb;
0511851c
MM
6006 int reg;
6007 int regs_per_pass;
6008 int max_reg;
6009 struct null_pointer_info npi;
99a15921 6010 int something_changed = 0;
0511851c 6011
0511851c 6012 /* If we have only a single block, then there's nothing to do. */
0b17ab2f 6013 if (n_basic_blocks <= 1)
99a15921 6014 return 0;
0511851c
MM
6015
6016 /* Trying to perform global optimizations on flow graphs which have
6017 a high connectivity will take a long time and is unlikely to be
6018 particularly useful.
6019
43e72072 6020 In normal circumstances a cfg should have about twice as many edges
0511851c
MM
6021 as blocks. But we do not want to punish small functions which have
6022 a couple switch statements. So we require a relatively large number
6023 of basic blocks and the ratio of edges to blocks to be high. */
0b17ab2f 6024 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
99a15921 6025 return 0;
0511851c 6026
0511851c
MM
6027 /* We need four bitmaps, each with a bit for each register in each
6028 basic block. */
6029 max_reg = max_reg_num ();
d55bc081 6030 regs_per_pass = get_bitmap_width (4, last_basic_block, max_reg);
0511851c
MM
6031
6032 /* Allocate bitmaps to hold local and global properties. */
d55bc081
ZD
6033 npi.nonnull_local = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
6034 npi.nonnull_killed = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
6035 nonnull_avin = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
6036 nonnull_avout = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
0511851c
MM
6037
6038 /* Go through the basic blocks, seeing whether or not each block
6039 ends with a conditional branch whose condition is a comparison
6040 against zero. Record the register compared in BLOCK_REG. */
d55bc081 6041 block_reg = (unsigned int *) xcalloc (last_basic_block, sizeof (int));
e0082a72 6042 FOR_EACH_BB (bb)
0511851c 6043 {
e0082a72 6044 rtx last_insn = bb->end;
0511851c
MM
6045 rtx condition, earliest, reg;
6046
6047 /* We only want conditional branches. */
6048 if (GET_CODE (last_insn) != JUMP_INSN
7f1c097d
JH
6049 || !any_condjump_p (last_insn)
6050 || !onlyjump_p (last_insn))
0511851c
MM
6051 continue;
6052
6053 /* LAST_INSN is a conditional jump. Get its condition. */
6054 condition = get_condition (last_insn, &earliest);
6055
4fe9b91c 6056 /* If we were unable to get the condition, or it is not an equality
0511851c
MM
6057 comparison against zero then there's nothing we can do. */
6058 if (!condition
6059 || (GET_CODE (condition) != NE && GET_CODE (condition) != EQ)
6060 || GET_CODE (XEXP (condition, 1)) != CONST_INT
589005ff 6061 || (XEXP (condition, 1)
0511851c
MM
6062 != CONST0_RTX (GET_MODE (XEXP (condition, 0)))))
6063 continue;
6064
6065 /* We must be checking a register against zero. */
6066 reg = XEXP (condition, 0);
6067 if (GET_CODE (reg) != REG)
6068 continue;
6069
e0082a72 6070 block_reg[bb->index] = REGNO (reg);
0511851c
MM
6071 }
6072
6073 /* Go through the algorithm for each block of registers. */
6074 for (reg = FIRST_PSEUDO_REGISTER; reg < max_reg; reg += regs_per_pass)
6075 {
6076 npi.min_reg = reg;
6077 npi.max_reg = MIN (reg + regs_per_pass, max_reg);
99a15921
JL
6078 something_changed |= delete_null_pointer_checks_1 (block_reg,
6079 nonnull_avin,
6080 nonnull_avout,
6081 &npi);
dfdb644f
JL
6082 }
6083
0511851c
MM
6084 /* Free the table of registers compared at the end of every block. */
6085 free (block_reg);
6086
dfdb644f 6087 /* Free bitmaps. */
5a660bff
DB
6088 sbitmap_vector_free (npi.nonnull_local);
6089 sbitmap_vector_free (npi.nonnull_killed);
6090 sbitmap_vector_free (nonnull_avin);
6091 sbitmap_vector_free (nonnull_avout);
99a15921
JL
6092
6093 return something_changed;
dfdb644f 6094}
bb457bd9
JL
6095
6096/* Code Hoisting variables and subroutines. */
6097
6098/* Very busy expressions. */
6099static sbitmap *hoist_vbein;
6100static sbitmap *hoist_vbeout;
6101
6102/* Hoistable expressions. */
6103static sbitmap *hoist_exprs;
6104
6105/* Dominator bitmaps. */
355be0dc 6106dominance_info dominators;
bb457bd9
JL
6107
6108/* ??? We could compute post dominators and run this algorithm in
68e82b83 6109 reverse to perform tail merging, doing so would probably be
bb457bd9
JL
6110 more effective than the tail merging code in jump.c.
6111
6112 It's unclear if tail merging could be run in parallel with
6113 code hoisting. It would be nice. */
6114
6115/* Allocate vars used for code hoisting analysis. */
6116
6117static void
6118alloc_code_hoist_mem (n_blocks, n_exprs)
6119 int n_blocks, n_exprs;
6120{
6121 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
6122 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
6123 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
6124
6125 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
6126 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
6127 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
6128 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
bb457bd9
JL
6129}
6130
6131/* Free vars used for code hoisting analysis. */
6132
6133static void
6134free_code_hoist_mem ()
6135{
5a660bff
DB
6136 sbitmap_vector_free (antloc);
6137 sbitmap_vector_free (transp);
6138 sbitmap_vector_free (comp);
bb457bd9 6139
5a660bff
DB
6140 sbitmap_vector_free (hoist_vbein);
6141 sbitmap_vector_free (hoist_vbeout);
6142 sbitmap_vector_free (hoist_exprs);
6143 sbitmap_vector_free (transpout);
bb457bd9 6144
355be0dc 6145 free_dominance_info (dominators);
bb457bd9
JL
6146}
6147
6148/* Compute the very busy expressions at entry/exit from each block.
6149
6150 An expression is very busy if all paths from a given point
6151 compute the expression. */
6152
6153static void
6154compute_code_hoist_vbeinout ()
6155{
e0082a72
ZD
6156 int changed, passes;
6157 basic_block bb;
bb457bd9 6158
d55bc081
ZD
6159 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
6160 sbitmap_vector_zero (hoist_vbein, last_basic_block);
bb457bd9
JL
6161
6162 passes = 0;
6163 changed = 1;
c4c81601 6164
bb457bd9
JL
6165 while (changed)
6166 {
6167 changed = 0;
c4c81601 6168
bb457bd9
JL
6169 /* We scan the blocks in the reverse order to speed up
6170 the convergence. */
e0082a72 6171 FOR_EACH_BB_REVERSE (bb)
bb457bd9 6172 {
e0082a72
ZD
6173 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
6174 hoist_vbeout[bb->index], transp[bb->index]);
6175 if (bb->next_bb != EXIT_BLOCK_PTR)
6176 sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
bb457bd9 6177 }
c4c81601 6178
bb457bd9
JL
6179 passes++;
6180 }
6181
6182 if (gcse_file)
6183 fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes);
6184}
6185
6186/* Top level routine to do the dataflow analysis needed by code hoisting. */
6187
6188static void
6189compute_code_hoist_data ()
6190{
02280659 6191 compute_local_properties (transp, comp, antloc, &expr_hash_table);
bb457bd9
JL
6192 compute_transpout ();
6193 compute_code_hoist_vbeinout ();
355be0dc 6194 dominators = calculate_dominance_info (CDI_DOMINATORS);
bb457bd9
JL
6195 if (gcse_file)
6196 fprintf (gcse_file, "\n");
6197}
6198
6199/* Determine if the expression identified by EXPR_INDEX would
6200 reach BB unimpared if it was placed at the end of EXPR_BB.
6201
6202 It's unclear exactly what Muchnick meant by "unimpared". It seems
6203 to me that the expression must either be computed or transparent in
6204 *every* block in the path(s) from EXPR_BB to BB. Any other definition
6205 would allow the expression to be hoisted out of loops, even if
6206 the expression wasn't a loop invariant.
6207
6208 Contrast this to reachability for PRE where an expression is
6209 considered reachable if *any* path reaches instead of *all*
6210 paths. */
6211
6212static int
6213hoist_expr_reaches_here_p (expr_bb, expr_index, bb, visited)
e2d2ed72 6214 basic_block expr_bb;
bb457bd9 6215 int expr_index;
e2d2ed72 6216 basic_block bb;
bb457bd9
JL
6217 char *visited;
6218{
6219 edge pred;
283a2545 6220 int visited_allocated_locally = 0;
589005ff 6221
bb457bd9
JL
6222
6223 if (visited == NULL)
6224 {
8e42ace1 6225 visited_allocated_locally = 1;
d55bc081 6226 visited = xcalloc (last_basic_block, 1);
bb457bd9
JL
6227 }
6228
e2d2ed72 6229 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
bb457bd9 6230 {
e2d2ed72 6231 basic_block pred_bb = pred->src;
bb457bd9
JL
6232
6233 if (pred->src == ENTRY_BLOCK_PTR)
6234 break;
f305679f
JH
6235 else if (pred_bb == expr_bb)
6236 continue;
0b17ab2f 6237 else if (visited[pred_bb->index])
bb457bd9 6238 continue;
c4c81601 6239
bb457bd9 6240 /* Does this predecessor generate this expression? */
0b17ab2f 6241 else if (TEST_BIT (comp[pred_bb->index], expr_index))
bb457bd9 6242 break;
0b17ab2f 6243 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
bb457bd9 6244 break;
c4c81601 6245
bb457bd9
JL
6246 /* Not killed. */
6247 else
6248 {
0b17ab2f 6249 visited[pred_bb->index] = 1;
bb457bd9
JL
6250 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
6251 pred_bb, visited))
6252 break;
6253 }
6254 }
589005ff 6255 if (visited_allocated_locally)
283a2545 6256 free (visited);
c4c81601 6257
bb457bd9
JL
6258 return (pred == NULL);
6259}
6260\f
6261/* Actually perform code hoisting. */
c4c81601 6262
bb457bd9
JL
6263static void
6264hoist_code ()
6265{
e0082a72 6266 basic_block bb, dominated;
c635a1ec
DB
6267 basic_block *domby;
6268 unsigned int domby_len;
6269 unsigned int i,j;
bb457bd9 6270 struct expr **index_map;
c4c81601 6271 struct expr *expr;
bb457bd9 6272
d55bc081 6273 sbitmap_vector_zero (hoist_exprs, last_basic_block);
bb457bd9
JL
6274
6275 /* Compute a mapping from expression number (`bitmap_index') to
6276 hash table entry. */
6277
02280659
ZD
6278 index_map = (struct expr **) xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
6279 for (i = 0; i < expr_hash_table.size; i++)
6280 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601 6281 index_map[expr->bitmap_index] = expr;
bb457bd9
JL
6282
6283 /* Walk over each basic block looking for potentially hoistable
6284 expressions, nothing gets hoisted from the entry block. */
e0082a72 6285 FOR_EACH_BB (bb)
bb457bd9
JL
6286 {
6287 int found = 0;
6288 int insn_inserted_p;
6289
c635a1ec 6290 domby_len = get_dominated_by (dominators, bb, &domby);
bb457bd9
JL
6291 /* Examine each expression that is very busy at the exit of this
6292 block. These are the potentially hoistable expressions. */
e0082a72 6293 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
bb457bd9
JL
6294 {
6295 int hoistable = 0;
c4c81601 6296
c635a1ec
DB
6297 if (TEST_BIT (hoist_vbeout[bb->index], i)
6298 && TEST_BIT (transpout[bb->index], i))
bb457bd9
JL
6299 {
6300 /* We've found a potentially hoistable expression, now
6301 we look at every block BB dominates to see if it
6302 computes the expression. */
c635a1ec 6303 for (j = 0; j < domby_len; j++)
bb457bd9 6304 {
c635a1ec 6305 dominated = domby[j];
bb457bd9 6306 /* Ignore self dominance. */
c635a1ec 6307 if (bb == dominated)
bb457bd9 6308 continue;
bb457bd9
JL
6309 /* We've found a dominated block, now see if it computes
6310 the busy expression and whether or not moving that
6311 expression to the "beginning" of that block is safe. */
e0082a72 6312 if (!TEST_BIT (antloc[dominated->index], i))
bb457bd9
JL
6313 continue;
6314
6315 /* Note if the expression would reach the dominated block
589005ff 6316 unimpared if it was placed at the end of BB.
bb457bd9
JL
6317
6318 Keep track of how many times this expression is hoistable
6319 from a dominated block into BB. */
e0082a72 6320 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
bb457bd9
JL
6321 hoistable++;
6322 }
6323
ff7cc307 6324 /* If we found more than one hoistable occurrence of this
bb457bd9
JL
6325 expression, then note it in the bitmap of expressions to
6326 hoist. It makes no sense to hoist things which are computed
6327 in only one BB, and doing so tends to pessimize register
6328 allocation. One could increase this value to try harder
6329 to avoid any possible code expansion due to register
6330 allocation issues; however experiments have shown that
6331 the vast majority of hoistable expressions are only movable
6332 from two successors, so raising this threshhold is likely
6333 to nullify any benefit we get from code hoisting. */
6334 if (hoistable > 1)
6335 {
e0082a72 6336 SET_BIT (hoist_exprs[bb->index], i);
bb457bd9
JL
6337 found = 1;
6338 }
6339 }
6340 }
bb457bd9
JL
6341 /* If we found nothing to hoist, then quit now. */
6342 if (! found)
c635a1ec
DB
6343 {
6344 free (domby);
bb457bd9 6345 continue;
c635a1ec 6346 }
bb457bd9
JL
6347
6348 /* Loop over all the hoistable expressions. */
e0082a72 6349 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
bb457bd9
JL
6350 {
6351 /* We want to insert the expression into BB only once, so
6352 note when we've inserted it. */
6353 insn_inserted_p = 0;
6354
6355 /* These tests should be the same as the tests above. */
e0082a72 6356 if (TEST_BIT (hoist_vbeout[bb->index], i))
bb457bd9
JL
6357 {
6358 /* We've found a potentially hoistable expression, now
6359 we look at every block BB dominates to see if it
6360 computes the expression. */
c635a1ec 6361 for (j = 0; j < domby_len; j++)
bb457bd9 6362 {
c635a1ec 6363 dominated = domby[j];
bb457bd9 6364 /* Ignore self dominance. */
c635a1ec 6365 if (bb == dominated)
bb457bd9
JL
6366 continue;
6367
6368 /* We've found a dominated block, now see if it computes
6369 the busy expression and whether or not moving that
6370 expression to the "beginning" of that block is safe. */
e0082a72 6371 if (!TEST_BIT (antloc[dominated->index], i))
bb457bd9
JL
6372 continue;
6373
6374 /* The expression is computed in the dominated block and
6375 it would be safe to compute it at the start of the
6376 dominated block. Now we have to determine if the
ff7cc307 6377 expression would reach the dominated block if it was
bb457bd9 6378 placed at the end of BB. */
e0082a72 6379 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
bb457bd9
JL
6380 {
6381 struct expr *expr = index_map[i];
6382 struct occr *occr = expr->antic_occr;
6383 rtx insn;
6384 rtx set;
6385
ff7cc307 6386 /* Find the right occurrence of this expression. */
e0082a72 6387 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
bb457bd9
JL
6388 occr = occr->next;
6389
6390 /* Should never happen. */
6391 if (!occr)
6392 abort ();
6393
6394 insn = occr->insn;
589005ff 6395
bb457bd9
JL
6396 set = single_set (insn);
6397 if (! set)
6398 abort ();
6399
6400 /* Create a pseudo-reg to store the result of reaching
6401 expressions into. Get the mode for the new pseudo
6402 from the mode of the original destination pseudo. */
6403 if (expr->reaching_reg == NULL)
6404 expr->reaching_reg
6405 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
6406
10d1bb36
JH
6407 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
6408 delete_insn (insn);
6409 occr->deleted_p = 1;
6410 if (!insn_inserted_p)
bb457bd9 6411 {
10d1bb36
JH
6412 insert_insn_end_bb (index_map[i], bb, 0);
6413 insn_inserted_p = 1;
bb457bd9
JL
6414 }
6415 }
6416 }
6417 }
6418 }
c635a1ec 6419 free (domby);
bb457bd9 6420 }
c4c81601 6421
8e42ace1 6422 free (index_map);
bb457bd9
JL
6423}
6424
6425/* Top level routine to perform one code hoisting (aka unification) pass
6426
cc2902df 6427 Return nonzero if a change was made. */
bb457bd9
JL
6428
6429static int
6430one_code_hoisting_pass ()
6431{
6432 int changed = 0;
6433
02280659
ZD
6434 alloc_hash_table (max_cuid, &expr_hash_table, 0);
6435 compute_hash_table (&expr_hash_table);
bb457bd9 6436 if (gcse_file)
02280659 6437 dump_hash_table (gcse_file, "Code Hosting Expressions", &expr_hash_table);
c4c81601 6438
02280659 6439 if (expr_hash_table.n_elems > 0)
bb457bd9 6440 {
02280659 6441 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
bb457bd9
JL
6442 compute_code_hoist_data ();
6443 hoist_code ();
6444 free_code_hoist_mem ();
6445 }
c4c81601 6446
02280659 6447 free_hash_table (&expr_hash_table);
bb457bd9
JL
6448
6449 return changed;
6450}
a13d4ebf
AM
6451\f
6452/* Here we provide the things required to do store motion towards
6453 the exit. In order for this to be effective, gcse also needed to
6454 be taught how to move a load when it is kill only by a store to itself.
6455
6456 int i;
6457 float a[10];
6458
6459 void foo(float scale)
6460 {
6461 for (i=0; i<10; i++)
6462 a[i] *= scale;
6463 }
6464
6465 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
589005ff
KH
6466 the load out since its live around the loop, and stored at the bottom
6467 of the loop.
a13d4ebf 6468
589005ff 6469 The 'Load Motion' referred to and implemented in this file is
a13d4ebf
AM
6470 an enhancement to gcse which when using edge based lcm, recognizes
6471 this situation and allows gcse to move the load out of the loop.
6472
6473 Once gcse has hoisted the load, store motion can then push this
6474 load towards the exit, and we end up with no loads or stores of 'i'
6475 in the loop. */
6476
ff7cc307 6477/* This will search the ldst list for a matching expression. If it
a13d4ebf
AM
6478 doesn't find one, we create one and initialize it. */
6479
6480static struct ls_expr *
6481ldst_entry (x)
6482 rtx x;
6483{
6484 struct ls_expr * ptr;
6485
6486 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6487 if (expr_equiv_p (ptr->pattern, x))
6488 break;
6489
6490 if (!ptr)
6491 {
6492 ptr = (struct ls_expr *) xmalloc (sizeof (struct ls_expr));
6493
6494 ptr->next = pre_ldst_mems;
6495 ptr->expr = NULL;
6496 ptr->pattern = x;
6497 ptr->loads = NULL_RTX;
6498 ptr->stores = NULL_RTX;
6499 ptr->reaching_reg = NULL_RTX;
6500 ptr->invalid = 0;
6501 ptr->index = 0;
6502 ptr->hash_index = 0;
6503 pre_ldst_mems = ptr;
6504 }
589005ff 6505
a13d4ebf
AM
6506 return ptr;
6507}
6508
6509/* Free up an individual ldst entry. */
6510
589005ff 6511static void
a13d4ebf
AM
6512free_ldst_entry (ptr)
6513 struct ls_expr * ptr;
6514{
aaa4ca30
AJ
6515 free_INSN_LIST_list (& ptr->loads);
6516 free_INSN_LIST_list (& ptr->stores);
a13d4ebf
AM
6517
6518 free (ptr);
6519}
6520
6521/* Free up all memory associated with the ldst list. */
6522
6523static void
6524free_ldst_mems ()
6525{
589005ff 6526 while (pre_ldst_mems)
a13d4ebf
AM
6527 {
6528 struct ls_expr * tmp = pre_ldst_mems;
6529
6530 pre_ldst_mems = pre_ldst_mems->next;
6531
6532 free_ldst_entry (tmp);
6533 }
6534
6535 pre_ldst_mems = NULL;
6536}
6537
6538/* Dump debugging info about the ldst list. */
6539
6540static void
6541print_ldst_list (file)
6542 FILE * file;
6543{
6544 struct ls_expr * ptr;
6545
6546 fprintf (file, "LDST list: \n");
6547
6548 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6549 {
6550 fprintf (file, " Pattern (%3d): ", ptr->index);
6551
6552 print_rtl (file, ptr->pattern);
6553
6554 fprintf (file, "\n Loads : ");
6555
6556 if (ptr->loads)
6557 print_rtl (file, ptr->loads);
6558 else
6559 fprintf (file, "(nil)");
6560
6561 fprintf (file, "\n Stores : ");
6562
6563 if (ptr->stores)
6564 print_rtl (file, ptr->stores);
6565 else
6566 fprintf (file, "(nil)");
6567
6568 fprintf (file, "\n\n");
6569 }
6570
6571 fprintf (file, "\n");
6572}
6573
6574/* Returns 1 if X is in the list of ldst only expressions. */
6575
6576static struct ls_expr *
6577find_rtx_in_ldst (x)
6578 rtx x;
6579{
6580 struct ls_expr * ptr;
589005ff 6581
a13d4ebf
AM
6582 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6583 if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid)
6584 return ptr;
6585
6586 return NULL;
6587}
6588
6589/* Assign each element of the list of mems a monotonically increasing value. */
6590
6591static int
6592enumerate_ldsts ()
6593{
6594 struct ls_expr * ptr;
6595 int n = 0;
6596
6597 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6598 ptr->index = n++;
6599
6600 return n;
6601}
6602
6603/* Return first item in the list. */
6604
6605static inline struct ls_expr *
6606first_ls_expr ()
6607{
6608 return pre_ldst_mems;
6609}
6610
6611/* Return the next item in ther list after the specified one. */
6612
6613static inline struct ls_expr *
6614next_ls_expr (ptr)
6615 struct ls_expr * ptr;
6616{
6617 return ptr->next;
6618}
6619\f
6620/* Load Motion for loads which only kill themselves. */
6621
6622/* Return true if x is a simple MEM operation, with no registers or
6623 side effects. These are the types of loads we consider for the
6624 ld_motion list, otherwise we let the usual aliasing take care of it. */
6625
589005ff 6626static int
a13d4ebf
AM
6627simple_mem (x)
6628 rtx x;
6629{
6630 if (GET_CODE (x) != MEM)
6631 return 0;
589005ff 6632
a13d4ebf
AM
6633 if (MEM_VOLATILE_P (x))
6634 return 0;
589005ff 6635
a13d4ebf
AM
6636 if (GET_MODE (x) == BLKmode)
6637 return 0;
aaa4ca30
AJ
6638
6639 if (!rtx_varies_p (XEXP (x, 0), 0))
a13d4ebf 6640 return 1;
589005ff 6641
a13d4ebf
AM
6642 return 0;
6643}
6644
589005ff
KH
6645/* Make sure there isn't a buried reference in this pattern anywhere.
6646 If there is, invalidate the entry for it since we're not capable
6647 of fixing it up just yet.. We have to be sure we know about ALL
a13d4ebf
AM
6648 loads since the aliasing code will allow all entries in the
6649 ld_motion list to not-alias itself. If we miss a load, we will get
589005ff 6650 the wrong value since gcse might common it and we won't know to
a13d4ebf
AM
6651 fix it up. */
6652
6653static void
6654invalidate_any_buried_refs (x)
6655 rtx x;
6656{
6657 const char * fmt;
8e42ace1 6658 int i, j;
a13d4ebf
AM
6659 struct ls_expr * ptr;
6660
6661 /* Invalidate it in the list. */
6662 if (GET_CODE (x) == MEM && simple_mem (x))
6663 {
6664 ptr = ldst_entry (x);
6665 ptr->invalid = 1;
6666 }
6667
6668 /* Recursively process the insn. */
6669 fmt = GET_RTX_FORMAT (GET_CODE (x));
589005ff 6670
a13d4ebf
AM
6671 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6672 {
6673 if (fmt[i] == 'e')
6674 invalidate_any_buried_refs (XEXP (x, i));
6675 else if (fmt[i] == 'E')
6676 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6677 invalidate_any_buried_refs (XVECEXP (x, i, j));
6678 }
6679}
6680
6681/* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
6682 being defined as MEM loads and stores to symbols, with no
589005ff 6683 side effects and no registers in the expression. If there are any
f63d1bf7 6684 uses/defs which don't match this criteria, it is invalidated and
a13d4ebf
AM
6685 trimmed out later. */
6686
589005ff 6687static void
a13d4ebf
AM
6688compute_ld_motion_mems ()
6689{
6690 struct ls_expr * ptr;
e0082a72 6691 basic_block bb;
a13d4ebf 6692 rtx insn;
589005ff 6693
a13d4ebf
AM
6694 pre_ldst_mems = NULL;
6695
e0082a72 6696 FOR_EACH_BB (bb)
a13d4ebf 6697 {
e0082a72
ZD
6698 for (insn = bb->head;
6699 insn && insn != NEXT_INSN (bb->end);
a13d4ebf
AM
6700 insn = NEXT_INSN (insn))
6701 {
6702 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
6703 {
6704 if (GET_CODE (PATTERN (insn)) == SET)
6705 {
6706 rtx src = SET_SRC (PATTERN (insn));
6707 rtx dest = SET_DEST (PATTERN (insn));
6708
6709 /* Check for a simple LOAD... */
6710 if (GET_CODE (src) == MEM && simple_mem (src))
6711 {
6712 ptr = ldst_entry (src);
6713 if (GET_CODE (dest) == REG)
6714 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
6715 else
6716 ptr->invalid = 1;
6717 }
6718 else
6719 {
6720 /* Make sure there isn't a buried load somewhere. */
6721 invalidate_any_buried_refs (src);
6722 }
589005ff 6723
a13d4ebf
AM
6724 /* Check for stores. Don't worry about aliased ones, they
6725 will block any movement we might do later. We only care
6726 about this exact pattern since those are the only
6727 circumstance that we will ignore the aliasing info. */
6728 if (GET_CODE (dest) == MEM && simple_mem (dest))
6729 {
6730 ptr = ldst_entry (dest);
589005ff 6731
f54104df
AO
6732 if (GET_CODE (src) != MEM
6733 && GET_CODE (src) != ASM_OPERANDS)
a13d4ebf
AM
6734 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
6735 else
6736 ptr->invalid = 1;
6737 }
6738 }
6739 else
6740 invalidate_any_buried_refs (PATTERN (insn));
6741 }
6742 }
6743 }
6744}
6745
589005ff 6746/* Remove any references that have been either invalidated or are not in the
a13d4ebf
AM
6747 expression list for pre gcse. */
6748
6749static void
6750trim_ld_motion_mems ()
6751{
6752 struct ls_expr * last = NULL;
6753 struct ls_expr * ptr = first_ls_expr ();
6754
6755 while (ptr != NULL)
6756 {
6757 int del = ptr->invalid;
6758 struct expr * expr = NULL;
589005ff 6759
a13d4ebf 6760 /* Delete if entry has been made invalid. */
589005ff 6761 if (!del)
a13d4ebf
AM
6762 {
6763 unsigned int i;
589005ff 6764
a13d4ebf
AM
6765 del = 1;
6766 /* Delete if we cannot find this mem in the expression list. */
02280659 6767 for (i = 0; i < expr_hash_table.size && del; i++)
a13d4ebf 6768 {
02280659 6769 for (expr = expr_hash_table.table[i];
589005ff 6770 expr != NULL;
a13d4ebf
AM
6771 expr = expr->next_same_hash)
6772 if (expr_equiv_p (expr->expr, ptr->pattern))
6773 {
6774 del = 0;
6775 break;
6776 }
6777 }
6778 }
589005ff 6779
a13d4ebf
AM
6780 if (del)
6781 {
6782 if (last != NULL)
6783 {
6784 last->next = ptr->next;
6785 free_ldst_entry (ptr);
6786 ptr = last->next;
6787 }
6788 else
6789 {
6790 pre_ldst_mems = pre_ldst_mems->next;
6791 free_ldst_entry (ptr);
6792 ptr = pre_ldst_mems;
6793 }
6794 }
6795 else
6796 {
6797 /* Set the expression field if we are keeping it. */
6798 last = ptr;
6799 ptr->expr = expr;
6800 ptr = ptr->next;
6801 }
6802 }
6803
6804 /* Show the world what we've found. */
6805 if (gcse_file && pre_ldst_mems != NULL)
6806 print_ldst_list (gcse_file);
6807}
6808
6809/* This routine will take an expression which we are replacing with
6810 a reaching register, and update any stores that are needed if
6811 that expression is in the ld_motion list. Stores are updated by
6812 copying their SRC to the reaching register, and then storeing
6813 the reaching register into the store location. These keeps the
6814 correct value in the reaching register for the loads. */
6815
6816static void
6817update_ld_motion_stores (expr)
6818 struct expr * expr;
6819{
6820 struct ls_expr * mem_ptr;
6821
6822 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
6823 {
589005ff
KH
6824 /* We can try to find just the REACHED stores, but is shouldn't
6825 matter to set the reaching reg everywhere... some might be
a13d4ebf
AM
6826 dead and should be eliminated later. */
6827
6828 /* We replace SET mem = expr with
6829 SET reg = expr
589005ff 6830 SET mem = reg , where reg is the
a13d4ebf
AM
6831 reaching reg used in the load. */
6832 rtx list = mem_ptr->stores;
589005ff 6833
a13d4ebf
AM
6834 for ( ; list != NULL_RTX; list = XEXP (list, 1))
6835 {
6836 rtx insn = XEXP (list, 0);
6837 rtx pat = PATTERN (insn);
6838 rtx src = SET_SRC (pat);
6839 rtx reg = expr->reaching_reg;
c57718d3 6840 rtx copy, new;
a13d4ebf
AM
6841
6842 /* If we've already copied it, continue. */
6843 if (expr->reaching_reg == src)
6844 continue;
589005ff 6845
a13d4ebf
AM
6846 if (gcse_file)
6847 {
6848 fprintf (gcse_file, "PRE: store updated with reaching reg ");
6849 print_rtl (gcse_file, expr->reaching_reg);
6850 fprintf (gcse_file, ":\n ");
6851 print_inline_rtx (gcse_file, insn, 8);
6852 fprintf (gcse_file, "\n");
6853 }
589005ff 6854
a13d4ebf 6855 copy = gen_move_insn ( reg, SET_SRC (pat));
c57718d3
RK
6856 new = emit_insn_before (copy, insn);
6857 record_one_set (REGNO (reg), new);
a13d4ebf
AM
6858 SET_SRC (pat) = reg;
6859
6860 /* un-recognize this pattern since it's probably different now. */
6861 INSN_CODE (insn) = -1;
6862 gcse_create_count++;
6863 }
6864 }
6865}
6866\f
6867/* Store motion code. */
6868
589005ff 6869/* This is used to communicate the target bitvector we want to use in the
aaa4ca30
AJ
6870 reg_set_info routine when called via the note_stores mechanism. */
6871static sbitmap * regvec;
6872
a13d4ebf
AM
6873/* Used in computing the reverse edge graph bit vectors. */
6874static sbitmap * st_antloc;
6875
6876/* Global holding the number of store expressions we are dealing with. */
6877static int num_stores;
6878
aaa4ca30 6879/* Checks to set if we need to mark a register set. Called from note_stores. */
a13d4ebf 6880
aaa4ca30
AJ
6881static void
6882reg_set_info (dest, setter, data)
6883 rtx dest, setter ATTRIBUTE_UNUSED;
6884 void * data ATTRIBUTE_UNUSED;
a13d4ebf 6885{
aaa4ca30
AJ
6886 if (GET_CODE (dest) == SUBREG)
6887 dest = SUBREG_REG (dest);
adfcce61 6888
aaa4ca30
AJ
6889 if (GET_CODE (dest) == REG)
6890 SET_BIT (*regvec, REGNO (dest));
a13d4ebf
AM
6891}
6892
cc2902df 6893/* Return nonzero if the register operands of expression X are killed
aaa4ca30 6894 anywhere in basic block BB. */
a13d4ebf
AM
6895
6896static int
aaa4ca30 6897store_ops_ok (x, bb)
a13d4ebf 6898 rtx x;
e2d2ed72 6899 basic_block bb;
a13d4ebf
AM
6900{
6901 int i;
6902 enum rtx_code code;
6903 const char * fmt;
6904
6905 /* Repeat is used to turn tail-recursion into iteration. */
6906 repeat:
6907
6908 if (x == 0)
6909 return 1;
6910
6911 code = GET_CODE (x);
6912 switch (code)
6913 {
6914 case REG:
aaa4ca30
AJ
6915 /* If a reg has changed after us in this
6916 block, the operand has been killed. */
0b17ab2f 6917 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
a13d4ebf
AM
6918
6919 case MEM:
6920 x = XEXP (x, 0);
6921 goto repeat;
6922
6923 case PRE_DEC:
6924 case PRE_INC:
6925 case POST_DEC:
6926 case POST_INC:
6927 return 0;
6928
6929 case PC:
6930 case CC0: /*FIXME*/
6931 case CONST:
6932 case CONST_INT:
6933 case CONST_DOUBLE:
69ef87e2 6934 case CONST_VECTOR:
a13d4ebf
AM
6935 case SYMBOL_REF:
6936 case LABEL_REF:
6937 case ADDR_VEC:
6938 case ADDR_DIFF_VEC:
6939 return 1;
6940
6941 default:
6942 break;
6943 }
6944
6945 i = GET_RTX_LENGTH (code) - 1;
6946 fmt = GET_RTX_FORMAT (code);
589005ff 6947
a13d4ebf
AM
6948 for (; i >= 0; i--)
6949 {
6950 if (fmt[i] == 'e')
6951 {
6952 rtx tem = XEXP (x, i);
6953
6954 /* If we are about to do the last recursive call
6955 needed at this level, change it into iteration.
6956 This function is called enough to be worth it. */
6957 if (i == 0)
6958 {
6959 x = tem;
6960 goto repeat;
6961 }
589005ff 6962
aaa4ca30 6963 if (! store_ops_ok (tem, bb))
a13d4ebf
AM
6964 return 0;
6965 }
6966 else if (fmt[i] == 'E')
6967 {
6968 int j;
589005ff 6969
a13d4ebf
AM
6970 for (j = 0; j < XVECLEN (x, i); j++)
6971 {
aaa4ca30 6972 if (! store_ops_ok (XVECEXP (x, i, j), bb))
a13d4ebf
AM
6973 return 0;
6974 }
6975 }
6976 }
6977
6978 return 1;
6979}
6980
aaa4ca30 6981/* Determine whether insn is MEM store pattern that we will consider moving. */
a13d4ebf
AM
6982
6983static void
6984find_moveable_store (insn)
6985 rtx insn;
6986{
6987 struct ls_expr * ptr;
6988 rtx dest = PATTERN (insn);
6989
f54104df
AO
6990 if (GET_CODE (dest) != SET
6991 || GET_CODE (SET_SRC (dest)) == ASM_OPERANDS)
a13d4ebf
AM
6992 return;
6993
6994 dest = SET_DEST (dest);
589005ff 6995
a13d4ebf
AM
6996 if (GET_CODE (dest) != MEM || MEM_VOLATILE_P (dest)
6997 || GET_MODE (dest) == BLKmode)
aaa4ca30
AJ
6998 return;
6999
7000 if (GET_CODE (XEXP (dest, 0)) != SYMBOL_REF)
a13d4ebf 7001 return;
aaa4ca30
AJ
7002
7003 if (rtx_varies_p (XEXP (dest, 0), 0))
a13d4ebf 7004 return;
aaa4ca30 7005
a13d4ebf
AM
7006 ptr = ldst_entry (dest);
7007 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
7008}
7009
aaa4ca30
AJ
7010/* Perform store motion. Much like gcse, except we move expressions the
7011 other way by looking at the flowgraph in reverse. */
a13d4ebf
AM
7012
7013static int
7014compute_store_table ()
7015{
e0082a72
ZD
7016 int ret;
7017 basic_block bb;
aaa4ca30 7018 unsigned regno;
a13d4ebf 7019 rtx insn, pat;
aaa4ca30 7020
a13d4ebf
AM
7021 max_gcse_regno = max_reg_num ();
7022
d55bc081 7023 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
aaa4ca30 7024 max_gcse_regno);
d55bc081 7025 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
a13d4ebf 7026 pre_ldst_mems = 0;
aaa4ca30 7027
a13d4ebf 7028 /* Find all the stores we care about. */
e0082a72 7029 FOR_EACH_BB (bb)
a13d4ebf 7030 {
e0082a72
ZD
7031 regvec = & (reg_set_in_block[bb->index]);
7032 for (insn = bb->end;
7033 insn && insn != PREV_INSN (bb->end);
a13d4ebf
AM
7034 insn = PREV_INSN (insn))
7035 {
19652adf
ZW
7036 /* Ignore anything that is not a normal insn. */
7037 if (! INSN_P (insn))
a13d4ebf
AM
7038 continue;
7039
aaa4ca30
AJ
7040 if (GET_CODE (insn) == CALL_INSN)
7041 {
19652adf 7042 bool clobbers_all = false;
589005ff 7043#ifdef NON_SAVING_SETJMP
19652adf
ZW
7044 if (NON_SAVING_SETJMP
7045 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
7046 clobbers_all = true;
7047#endif
7048
aaa4ca30 7049 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
19652adf
ZW
7050 if (clobbers_all
7051 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
e0082a72 7052 SET_BIT (reg_set_in_block[bb->index], regno);
aaa4ca30 7053 }
589005ff 7054
a13d4ebf 7055 pat = PATTERN (insn);
aaa4ca30 7056 note_stores (pat, reg_set_info, NULL);
589005ff 7057
a13d4ebf
AM
7058 /* Now that we've marked regs, look for stores. */
7059 if (GET_CODE (pat) == SET)
7060 find_moveable_store (insn);
7061 }
7062 }
7063
7064 ret = enumerate_ldsts ();
589005ff 7065
a13d4ebf
AM
7066 if (gcse_file)
7067 {
7068 fprintf (gcse_file, "Store Motion Expressions.\n");
7069 print_ldst_list (gcse_file);
7070 }
589005ff 7071
a13d4ebf
AM
7072 return ret;
7073}
7074
aaa4ca30 7075/* Check to see if the load X is aliased with STORE_PATTERN. */
a13d4ebf
AM
7076
7077static int
7078load_kills_store (x, store_pattern)
7079 rtx x, store_pattern;
7080{
7081 if (true_dependence (x, GET_MODE (x), store_pattern, rtx_addr_varies_p))
7082 return 1;
7083 return 0;
7084}
7085
589005ff 7086/* Go through the entire insn X, looking for any loads which might alias
aaa4ca30 7087 STORE_PATTERN. Return 1 if found. */
a13d4ebf
AM
7088
7089static int
7090find_loads (x, store_pattern)
7091 rtx x, store_pattern;
7092{
7093 const char * fmt;
8e42ace1 7094 int i, j;
a13d4ebf
AM
7095 int ret = 0;
7096
24a28584
JH
7097 if (!x)
7098 return 0;
7099
589005ff 7100 if (GET_CODE (x) == SET)
a13d4ebf
AM
7101 x = SET_SRC (x);
7102
7103 if (GET_CODE (x) == MEM)
7104 {
7105 if (load_kills_store (x, store_pattern))
7106 return 1;
7107 }
7108
7109 /* Recursively process the insn. */
7110 fmt = GET_RTX_FORMAT (GET_CODE (x));
589005ff 7111
a13d4ebf
AM
7112 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
7113 {
7114 if (fmt[i] == 'e')
7115 ret |= find_loads (XEXP (x, i), store_pattern);
7116 else if (fmt[i] == 'E')
7117 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7118 ret |= find_loads (XVECEXP (x, i, j), store_pattern);
7119 }
7120 return ret;
7121}
7122
589005ff 7123/* Check if INSN kills the store pattern X (is aliased with it).
a13d4ebf
AM
7124 Return 1 if it it does. */
7125
589005ff 7126static int
a13d4ebf
AM
7127store_killed_in_insn (x, insn)
7128 rtx x, insn;
7129{
7130 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7131 return 0;
589005ff 7132
a13d4ebf
AM
7133 if (GET_CODE (insn) == CALL_INSN)
7134 {
1218665b
JJ
7135 /* A normal or pure call might read from pattern,
7136 but a const call will not. */
a6a063b8 7137 return ! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn);
a13d4ebf 7138 }
589005ff 7139
a13d4ebf
AM
7140 if (GET_CODE (PATTERN (insn)) == SET)
7141 {
7142 rtx pat = PATTERN (insn);
7143 /* Check for memory stores to aliased objects. */
7144 if (GET_CODE (SET_DEST (pat)) == MEM && !expr_equiv_p (SET_DEST (pat), x))
aaa4ca30 7145 /* pretend its a load and check for aliasing. */
a13d4ebf
AM
7146 if (find_loads (SET_DEST (pat), x))
7147 return 1;
7148 return find_loads (SET_SRC (pat), x);
7149 }
7150 else
7151 return find_loads (PATTERN (insn), x);
7152}
7153
7154/* Returns 1 if the expression X is loaded or clobbered on or after INSN
7155 within basic block BB. */
7156
589005ff 7157static int
aaa4ca30 7158store_killed_after (x, insn, bb)
a13d4ebf 7159 rtx x, insn;
e2d2ed72 7160 basic_block bb;
a13d4ebf 7161{
8e42ace1 7162 rtx last = bb->end;
589005ff 7163
8e42ace1
KH
7164 if (insn == last)
7165 return 0;
aaa4ca30
AJ
7166
7167 /* Check if the register operands of the store are OK in this block.
589005ff
KH
7168 Note that if registers are changed ANYWHERE in the block, we'll
7169 decide we can't move it, regardless of whether it changed above
aaa4ca30 7170 or below the store. This could be improved by checking the register
fbe5a4a6 7171 operands while looking for aliasing in each insn. */
aaa4ca30 7172 if (!store_ops_ok (XEXP (x, 0), bb))
a13d4ebf
AM
7173 return 1;
7174
8e42ace1
KH
7175 for ( ; insn && insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
7176 if (store_killed_in_insn (x, insn))
7177 return 1;
589005ff 7178
a13d4ebf
AM
7179 return 0;
7180}
7181
aaa4ca30 7182/* Returns 1 if the expression X is loaded or clobbered on or before INSN
a13d4ebf 7183 within basic block BB. */
589005ff 7184static int
a13d4ebf
AM
7185store_killed_before (x, insn, bb)
7186 rtx x, insn;
e2d2ed72 7187 basic_block bb;
a13d4ebf 7188{
8e42ace1 7189 rtx first = bb->head;
a13d4ebf 7190
8e42ace1
KH
7191 if (insn == first)
7192 return store_killed_in_insn (x, insn);
589005ff 7193
aaa4ca30 7194 /* Check if the register operands of the store are OK in this block.
589005ff
KH
7195 Note that if registers are changed ANYWHERE in the block, we'll
7196 decide we can't move it, regardless of whether it changed above
aaa4ca30 7197 or below the store. This could be improved by checking the register
fbe5a4a6 7198 operands while looking for aliasing in each insn. */
aaa4ca30 7199 if (!store_ops_ok (XEXP (x, 0), bb))
a13d4ebf
AM
7200 return 1;
7201
8e42ace1
KH
7202 for ( ; insn && insn != PREV_INSN (first); insn = PREV_INSN (insn))
7203 if (store_killed_in_insn (x, insn))
7204 return 1;
589005ff 7205
8e42ace1 7206 return 0;
a13d4ebf
AM
7207}
7208
7209#define ANTIC_STORE_LIST(x) ((x)->loads)
7210#define AVAIL_STORE_LIST(x) ((x)->stores)
7211
7212/* Given the table of available store insns at the end of blocks,
7213 determine which ones are not killed by aliasing, and generate
7214 the appropriate vectors for gen and killed. */
7215static void
589005ff 7216build_store_vectors ()
a13d4ebf 7217{
e0082a72 7218 basic_block bb, b;
a13d4ebf
AM
7219 rtx insn, st;
7220 struct ls_expr * ptr;
7221
7222 /* Build the gen_vector. This is any store in the table which is not killed
7223 by aliasing later in its block. */
d55bc081
ZD
7224 ae_gen = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7225 sbitmap_vector_zero (ae_gen, last_basic_block);
a13d4ebf 7226
d55bc081
ZD
7227 st_antloc = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7228 sbitmap_vector_zero (st_antloc, last_basic_block);
aaa4ca30 7229
a13d4ebf 7230 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
589005ff 7231 {
a13d4ebf
AM
7232 /* Put all the stores into either the antic list, or the avail list,
7233 or both. */
7234 rtx store_list = ptr->stores;
7235 ptr->stores = NULL_RTX;
7236
7237 for (st = store_list; st != NULL; st = XEXP (st, 1))
7238 {
7239 insn = XEXP (st, 0);
e2d2ed72 7240 bb = BLOCK_FOR_INSN (insn);
589005ff 7241
aaa4ca30 7242 if (!store_killed_after (ptr->pattern, insn, bb))
a13d4ebf 7243 {
fbe5a4a6 7244 /* If we've already seen an available expression in this block,
a13d4ebf
AM
7245 we can delete the one we saw already (It occurs earlier in
7246 the block), and replace it with this one). We'll copy the
7247 old SRC expression to an unused register in case there
7248 are any side effects. */
0b17ab2f 7249 if (TEST_BIT (ae_gen[bb->index], ptr->index))
a13d4ebf
AM
7250 {
7251 /* Find previous store. */
7252 rtx st;
7253 for (st = AVAIL_STORE_LIST (ptr); st ; st = XEXP (st, 1))
e2d2ed72 7254 if (BLOCK_FOR_INSN (XEXP (st, 0)) == bb)
a13d4ebf
AM
7255 break;
7256 if (st)
7257 {
7258 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
7259 if (gcse_file)
8e42ace1 7260 fprintf (gcse_file, "Removing redundant store:\n");
a13d4ebf
AM
7261 replace_store_insn (r, XEXP (st, 0), bb);
7262 XEXP (st, 0) = insn;
7263 continue;
7264 }
7265 }
0b17ab2f 7266 SET_BIT (ae_gen[bb->index], ptr->index);
a13d4ebf
AM
7267 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
7268 AVAIL_STORE_LIST (ptr));
7269 }
589005ff 7270
a13d4ebf
AM
7271 if (!store_killed_before (ptr->pattern, insn, bb))
7272 {
7273 SET_BIT (st_antloc[BLOCK_NUM (insn)], ptr->index);
7274 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
7275 ANTIC_STORE_LIST (ptr));
7276 }
7277 }
589005ff 7278
a13d4ebf
AM
7279 /* Free the original list of store insns. */
7280 free_INSN_LIST_list (&store_list);
7281 }
589005ff 7282
d55bc081
ZD
7283 ae_kill = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7284 sbitmap_vector_zero (ae_kill, last_basic_block);
a13d4ebf 7285
d55bc081
ZD
7286 transp = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7287 sbitmap_vector_zero (transp, last_basic_block);
a13d4ebf
AM
7288
7289 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
e0082a72 7290 FOR_EACH_BB (b)
a13d4ebf 7291 {
e0082a72 7292 if (store_killed_after (ptr->pattern, b->head, b))
a13d4ebf 7293 {
dc297297 7294 /* The anticipatable expression is not killed if it's gen'd. */
aaa4ca30 7295 /*
589005ff 7296 We leave this check out for now. If we have a code sequence
aaa4ca30
AJ
7297 in a block which looks like:
7298 ST MEMa = x
7299 L y = MEMa
7300 ST MEMa = z
7301 We should flag this as having an ANTIC expression, NOT
7302 transparent, NOT killed, and AVAIL.
7303 Unfortunately, since we haven't re-written all loads to
589005ff 7304 use the reaching reg, we'll end up doing an incorrect
aaa4ca30
AJ
7305 Load in the middle here if we push the store down. It happens in
7306 gcc.c-torture/execute/960311-1.c with -O3
7307 If we always kill it in this case, we'll sometimes do
fbe5a4a6 7308 unnecessary work, but it shouldn't actually hurt anything.
aaa4ca30 7309 if (!TEST_BIT (ae_gen[b], ptr->index)). */
e0082a72 7310 SET_BIT (ae_kill[b->index], ptr->index);
aaa4ca30
AJ
7311 }
7312 else
e0082a72 7313 SET_BIT (transp[b->index], ptr->index);
aaa4ca30
AJ
7314 }
7315
7316 /* Any block with no exits calls some non-returning function, so
7317 we better mark the store killed here, or we might not store to
7318 it at all. If we knew it was abort, we wouldn't have to store,
7319 but we don't know that for sure. */
589005ff 7320 if (gcse_file)
aaa4ca30
AJ
7321 {
7322 fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n");
7323 print_ldst_list (gcse_file);
d55bc081
ZD
7324 dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block);
7325 dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block);
7326 dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block);
7327 dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block);
a13d4ebf
AM
7328 }
7329}
7330
fbe5a4a6 7331/* Insert an instruction at the beginning of a basic block, and update
a13d4ebf
AM
7332 the BLOCK_HEAD if needed. */
7333
589005ff 7334static void
a13d4ebf
AM
7335insert_insn_start_bb (insn, bb)
7336 rtx insn;
e2d2ed72 7337 basic_block bb;
a13d4ebf
AM
7338{
7339 /* Insert at start of successor block. */
e2d2ed72
AM
7340 rtx prev = PREV_INSN (bb->head);
7341 rtx before = bb->head;
a13d4ebf
AM
7342 while (before != 0)
7343 {
7344 if (GET_CODE (before) != CODE_LABEL
7345 && (GET_CODE (before) != NOTE
7346 || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK))
7347 break;
7348 prev = before;
e2d2ed72 7349 if (prev == bb->end)
a13d4ebf
AM
7350 break;
7351 before = NEXT_INSN (before);
7352 }
7353
7354 insn = emit_insn_after (insn, prev);
7355
a13d4ebf
AM
7356 if (gcse_file)
7357 {
7358 fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n",
0b17ab2f 7359 bb->index);
a13d4ebf
AM
7360 print_inline_rtx (gcse_file, insn, 6);
7361 fprintf (gcse_file, "\n");
7362 }
7363}
7364
7365/* This routine will insert a store on an edge. EXPR is the ldst entry for
cc2902df 7366 the memory reference, and E is the edge to insert it on. Returns nonzero
a13d4ebf
AM
7367 if an edge insertion was performed. */
7368
7369static int
7370insert_store (expr, e)
7371 struct ls_expr * expr;
7372 edge e;
7373{
7374 rtx reg, insn;
e2d2ed72 7375 basic_block bb;
a13d4ebf
AM
7376 edge tmp;
7377
7378 /* We did all the deleted before this insert, so if we didn't delete a
7379 store, then we haven't set the reaching reg yet either. */
7380 if (expr->reaching_reg == NULL_RTX)
7381 return 0;
7382
7383 reg = expr->reaching_reg;
7384 insn = gen_move_insn (expr->pattern, reg);
589005ff 7385
a13d4ebf
AM
7386 /* If we are inserting this expression on ALL predecessor edges of a BB,
7387 insert it at the start of the BB, and reset the insert bits on the other
ff7cc307 7388 edges so we don't try to insert it on the other edges. */
e2d2ed72 7389 bb = e->dest;
a13d4ebf
AM
7390 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
7391 {
7392 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
7393 if (index == EDGE_INDEX_NO_EDGE)
7394 abort ();
7395 if (! TEST_BIT (pre_insert_map[index], expr->index))
7396 break;
7397 }
7398
7399 /* If tmp is NULL, we found an insertion on every edge, blank the
7400 insertion vector for these edges, and insert at the start of the BB. */
e2d2ed72 7401 if (!tmp && bb != EXIT_BLOCK_PTR)
a13d4ebf
AM
7402 {
7403 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
7404 {
7405 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
7406 RESET_BIT (pre_insert_map[index], expr->index);
7407 }
7408 insert_insn_start_bb (insn, bb);
7409 return 0;
7410 }
589005ff 7411
a13d4ebf
AM
7412 /* We can't insert on this edge, so we'll insert at the head of the
7413 successors block. See Morgan, sec 10.5. */
7414 if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
7415 {
7416 insert_insn_start_bb (insn, bb);
7417 return 0;
7418 }
7419
7420 insert_insn_on_edge (insn, e);
589005ff 7421
a13d4ebf
AM
7422 if (gcse_file)
7423 {
7424 fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
0b17ab2f 7425 e->src->index, e->dest->index);
a13d4ebf
AM
7426 print_inline_rtx (gcse_file, insn, 6);
7427 fprintf (gcse_file, "\n");
7428 }
589005ff 7429
a13d4ebf
AM
7430 return 1;
7431}
7432
7433/* This routine will replace a store with a SET to a specified register. */
7434
7435static void
7436replace_store_insn (reg, del, bb)
7437 rtx reg, del;
e2d2ed72 7438 basic_block bb;
a13d4ebf
AM
7439{
7440 rtx insn;
589005ff 7441
a13d4ebf
AM
7442 insn = gen_move_insn (reg, SET_SRC (PATTERN (del)));
7443 insn = emit_insn_after (insn, del);
589005ff 7444
a13d4ebf
AM
7445 if (gcse_file)
7446 {
589005ff 7447 fprintf (gcse_file,
0b17ab2f 7448 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
a13d4ebf 7449 print_inline_rtx (gcse_file, del, 6);
8e42ace1 7450 fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n ");
a13d4ebf 7451 print_inline_rtx (gcse_file, insn, 6);
8e42ace1 7452 fprintf (gcse_file, "\n");
a13d4ebf 7453 }
589005ff 7454
49ce134f 7455 delete_insn (del);
a13d4ebf
AM
7456}
7457
7458
7459/* Delete a store, but copy the value that would have been stored into
7460 the reaching_reg for later storing. */
7461
7462static void
7463delete_store (expr, bb)
7464 struct ls_expr * expr;
e2d2ed72 7465 basic_block bb;
a13d4ebf
AM
7466{
7467 rtx reg, i, del;
7468
7469 if (expr->reaching_reg == NULL_RTX)
7470 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
a13d4ebf 7471
589005ff
KH
7472
7473 /* If there is more than 1 store, the earlier ones will be dead,
7474 but it doesn't hurt to replace them here. */
a13d4ebf 7475 reg = expr->reaching_reg;
589005ff 7476
a13d4ebf
AM
7477 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
7478 {
7479 del = XEXP (i, 0);
e2d2ed72 7480 if (BLOCK_FOR_INSN (del) == bb)
a13d4ebf 7481 {
589005ff 7482 /* We know there is only one since we deleted redundant
a13d4ebf
AM
7483 ones during the available computation. */
7484 replace_store_insn (reg, del, bb);
7485 break;
7486 }
7487 }
7488}
7489
7490/* Free memory used by store motion. */
7491
589005ff 7492static void
a13d4ebf
AM
7493free_store_memory ()
7494{
7495 free_ldst_mems ();
589005ff 7496
a13d4ebf 7497 if (ae_gen)
5a660bff 7498 sbitmap_vector_free (ae_gen);
a13d4ebf 7499 if (ae_kill)
5a660bff 7500 sbitmap_vector_free (ae_kill);
a13d4ebf 7501 if (transp)
5a660bff 7502 sbitmap_vector_free (transp);
a13d4ebf 7503 if (st_antloc)
5a660bff 7504 sbitmap_vector_free (st_antloc);
a13d4ebf 7505 if (pre_insert_map)
5a660bff 7506 sbitmap_vector_free (pre_insert_map);
a13d4ebf 7507 if (pre_delete_map)
5a660bff 7508 sbitmap_vector_free (pre_delete_map);
aaa4ca30
AJ
7509 if (reg_set_in_block)
7510 sbitmap_vector_free (reg_set_in_block);
589005ff 7511
a13d4ebf
AM
7512 ae_gen = ae_kill = transp = st_antloc = NULL;
7513 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
7514}
7515
7516/* Perform store motion. Much like gcse, except we move expressions the
7517 other way by looking at the flowgraph in reverse. */
7518
7519static void
7520store_motion ()
7521{
e0082a72 7522 basic_block bb;
0b17ab2f 7523 int x;
a13d4ebf 7524 struct ls_expr * ptr;
adfcce61 7525 int update_flow = 0;
aaa4ca30 7526
a13d4ebf
AM
7527 if (gcse_file)
7528 {
7529 fprintf (gcse_file, "before store motion\n");
7530 print_rtl (gcse_file, get_insns ());
7531 }
7532
7533
7534 init_alias_analysis ();
aaa4ca30 7535
a13d4ebf
AM
7536 /* Find all the stores that are live to the end of their block. */
7537 num_stores = compute_store_table ();
7538 if (num_stores == 0)
7539 {
aaa4ca30 7540 sbitmap_vector_free (reg_set_in_block);
a13d4ebf
AM
7541 end_alias_analysis ();
7542 return;
7543 }
7544
7545 /* Now compute whats actually available to move. */
7546 add_noreturn_fake_exit_edges ();
7547 build_store_vectors ();
7548
589005ff
KH
7549 edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
7550 st_antloc, ae_kill, &pre_insert_map,
a13d4ebf
AM
7551 &pre_delete_map);
7552
7553 /* Now we want to insert the new stores which are going to be needed. */
7554 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
7555 {
e0082a72
ZD
7556 FOR_EACH_BB (bb)
7557 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
7558 delete_store (ptr, bb);
a13d4ebf 7559
0b17ab2f
RH
7560 for (x = 0; x < NUM_EDGES (edge_list); x++)
7561 if (TEST_BIT (pre_insert_map[x], ptr->index))
7562 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
a13d4ebf
AM
7563 }
7564
7565 if (update_flow)
7566 commit_edge_insertions ();
aaa4ca30 7567
a13d4ebf
AM
7568 free_store_memory ();
7569 free_edge_list (edge_list);
7570 remove_fake_edges ();
7571 end_alias_analysis ();
7572}
e2500fed 7573
a0134312
RS
7574\f
7575/* Entry point for jump bypassing optimization pass. */
7576
7577int
7578bypass_jumps (file)
7579 FILE *file;
7580{
7581 int changed;
7582
7583 /* We do not construct an accurate cfg in functions which call
7584 setjmp, so just punt to be safe. */
7585 if (current_function_calls_setjmp)
7586 return 0;
7587
7588 /* For calling dump_foo fns from gdb. */
7589 debug_stderr = stderr;
7590 gcse_file = file;
7591
7592 /* Identify the basic block information for this function, including
7593 successors and predecessors. */
7594 max_gcse_regno = max_reg_num ();
7595
7596 if (file)
7597 dump_flow_info (file);
7598
7599 /* Return if there's nothing to do. */
7600 if (n_basic_blocks <= 1)
7601 return 0;
7602
7603 /* Trying to perform global optimizations on flow graphs which have
7604 a high connectivity will take a long time and is unlikely to be
7605 particularly useful.
7606
7607 In normal circumstances a cfg should have about twice as many edges
7608 as blocks. But we do not want to punish small functions which have
7609 a couple switch statements. So we require a relatively large number
7610 of basic blocks and the ratio of edges to blocks to be high. */
7611 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
7612 {
7613 if (warn_disabled_optimization)
7614 warning ("BYPASS disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
7615 n_basic_blocks, n_edges / n_basic_blocks);
7616 return 0;
7617 }
7618
7619 /* If allocating memory for the cprop bitmap would take up too much
7620 storage it's better just to disable the optimization. */
7621 if ((n_basic_blocks
7622 * SBITMAP_SET_SIZE (max_gcse_regno)
7623 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
7624 {
7625 if (warn_disabled_optimization)
7626 warning ("GCSE disabled: %d basic blocks and %d registers",
7627 n_basic_blocks, max_gcse_regno);
7628
7629 return 0;
7630 }
7631
7632 /* See what modes support reg/reg copy operations. */
7633 if (! can_copy_init_p)
7634 {
7635 compute_can_copy ();
7636 can_copy_init_p = 1;
7637 }
7638
7639 gcc_obstack_init (&gcse_obstack);
7640 bytes_used = 0;
7641
7642 /* We need alias. */
7643 init_alias_analysis ();
7644
7645 /* Record where pseudo-registers are set. This data is kept accurate
7646 during each pass. ??? We could also record hard-reg information here
7647 [since it's unchanging], however it is currently done during hash table
7648 computation.
7649
7650 It may be tempting to compute MEM set information here too, but MEM sets
7651 will be subject to code motion one day and thus we need to compute
7652 information about memory sets when we build the hash tables. */
7653
7654 alloc_reg_set_mem (max_gcse_regno);
7655 compute_sets (get_insns ());
7656
7657 max_gcse_regno = max_reg_num ();
7658 alloc_gcse_mem (get_insns ());
7659 changed = one_cprop_pass (1, 1, 1);
7660 free_gcse_mem ();
7661
7662 if (file)
7663 {
7664 fprintf (file, "BYPASS of %s: %d basic blocks, ",
7665 current_function_name, n_basic_blocks);
7666 fprintf (file, "%d bytes\n\n", bytes_used);
7667 }
7668
7669 obstack_free (&gcse_obstack, NULL);
7670 free_reg_set_mem ();
7671
7672 /* We are finished with alias. */
7673 end_alias_analysis ();
7674 allocate_reg_info (max_reg_num (), FALSE, FALSE);
7675
7676 return changed;
7677}
7678
e2500fed 7679#include "gt-gcse.h"