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f4e584dc | 1 | /* Global common subexpression elimination/Partial redundancy elimination |
7506f491 | 2 | and global constant/copy propagation for GNU compiler. |
d9221e01 | 3 | Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
8e42ace1 | 4 | Free Software Foundation, Inc. |
7506f491 | 5 | |
1322177d | 6 | This file is part of GCC. |
7506f491 | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 2, or (at your option) any later | |
11 | version. | |
7506f491 | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
7506f491 DE |
17 | |
18 | You should have received a copy of the GNU General Public License | |
1322177d LB |
19 | along with GCC; see the file COPYING. If not, write to the Free |
20 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
21 | 02111-1307, USA. */ | |
7506f491 DE |
22 | |
23 | /* TODO | |
24 | - reordering of memory allocation and freeing to be more space efficient | |
25 | - do rough calc of how many regs are needed in each block, and a rough | |
26 | calc of how many regs are available in each class and use that to | |
27 | throttle back the code in cases where RTX_COST is minimal. | |
f4e584dc JL |
28 | - a store to the same address as a load does not kill the load if the |
29 | source of the store is also the destination of the load. Handling this | |
30 | allows more load motion, particularly out of loops. | |
7506f491 DE |
31 | - ability to realloc sbitmap vectors would allow one initial computation |
32 | of reg_set_in_block with only subsequent additions, rather than | |
33 | recomputing it for each pass | |
34 | ||
7506f491 DE |
35 | */ |
36 | ||
37 | /* References searched while implementing this. | |
7506f491 DE |
38 | |
39 | Compilers Principles, Techniques and Tools | |
40 | Aho, Sethi, Ullman | |
41 | Addison-Wesley, 1988 | |
42 | ||
43 | Global Optimization by Suppression of Partial Redundancies | |
44 | E. Morel, C. Renvoise | |
45 | communications of the acm, Vol. 22, Num. 2, Feb. 1979 | |
46 | ||
47 | A Portable Machine-Independent Global Optimizer - Design and Measurements | |
48 | Frederick Chow | |
49 | Stanford Ph.D. thesis, Dec. 1983 | |
50 | ||
7506f491 DE |
51 | A Fast Algorithm for Code Movement Optimization |
52 | D.M. Dhamdhere | |
53 | SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988 | |
54 | ||
55 | A Solution to a Problem with Morel and Renvoise's | |
56 | Global Optimization by Suppression of Partial Redundancies | |
57 | K-H Drechsler, M.P. Stadel | |
58 | ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988 | |
59 | ||
60 | Practical Adaptation of the Global Optimization | |
61 | Algorithm of Morel and Renvoise | |
62 | D.M. Dhamdhere | |
63 | ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991 | |
64 | ||
65 | Efficiently Computing Static Single Assignment Form and the Control | |
66 | Dependence Graph | |
67 | R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck | |
68 | ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991 | |
69 | ||
7506f491 DE |
70 | Lazy Code Motion |
71 | J. Knoop, O. Ruthing, B. Steffen | |
72 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
73 | ||
74 | What's In a Region? Or Computing Control Dependence Regions in Near-Linear | |
75 | Time for Reducible Flow Control | |
76 | Thomas Ball | |
77 | ACM Letters on Programming Languages and Systems, | |
78 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
79 | ||
80 | An Efficient Representation for Sparse Sets | |
81 | Preston Briggs, Linda Torczon | |
82 | ACM Letters on Programming Languages and Systems, | |
83 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
84 | ||
85 | A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion | |
86 | K-H Drechsler, M.P. Stadel | |
87 | ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993 | |
88 | ||
89 | Partial Dead Code Elimination | |
90 | J. Knoop, O. Ruthing, B. Steffen | |
91 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
92 | ||
93 | Effective Partial Redundancy Elimination | |
94 | P. Briggs, K.D. Cooper | |
95 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
96 | ||
97 | The Program Structure Tree: Computing Control Regions in Linear Time | |
98 | R. Johnson, D. Pearson, K. Pingali | |
99 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
100 | ||
101 | Optimal Code Motion: Theory and Practice | |
102 | J. Knoop, O. Ruthing, B. Steffen | |
103 | ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994 | |
104 | ||
105 | The power of assignment motion | |
106 | J. Knoop, O. Ruthing, B. Steffen | |
107 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
108 | ||
109 | Global code motion / global value numbering | |
110 | C. Click | |
111 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
112 | ||
113 | Value Driven Redundancy Elimination | |
114 | L.T. Simpson | |
115 | Rice University Ph.D. thesis, Apr. 1996 | |
116 | ||
117 | Value Numbering | |
118 | L.T. Simpson | |
119 | Massively Scalar Compiler Project, Rice University, Sep. 1996 | |
120 | ||
121 | High Performance Compilers for Parallel Computing | |
122 | Michael Wolfe | |
123 | Addison-Wesley, 1996 | |
124 | ||
f4e584dc JL |
125 | Advanced Compiler Design and Implementation |
126 | Steven Muchnick | |
127 | Morgan Kaufmann, 1997 | |
128 | ||
a42cd965 AM |
129 | Building an Optimizing Compiler |
130 | Robert Morgan | |
131 | Digital Press, 1998 | |
132 | ||
f4e584dc JL |
133 | People wishing to speed up the code here should read: |
134 | Elimination Algorithms for Data Flow Analysis | |
135 | B.G. Ryder, M.C. Paull | |
136 | ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986 | |
137 | ||
138 | How to Analyze Large Programs Efficiently and Informatively | |
139 | D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck | |
140 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
141 | ||
7506f491 DE |
142 | People wishing to do something different can find various possibilities |
143 | in the above papers and elsewhere. | |
144 | */ | |
145 | ||
146 | #include "config.h" | |
50b2596f | 147 | #include "system.h" |
4977bab6 ZW |
148 | #include "coretypes.h" |
149 | #include "tm.h" | |
01198c2f | 150 | #include "toplev.h" |
7506f491 DE |
151 | |
152 | #include "rtl.h" | |
b0656d8b | 153 | #include "tree.h" |
6baf1cc8 | 154 | #include "tm_p.h" |
7506f491 DE |
155 | #include "regs.h" |
156 | #include "hard-reg-set.h" | |
157 | #include "flags.h" | |
158 | #include "real.h" | |
159 | #include "insn-config.h" | |
160 | #include "recog.h" | |
161 | #include "basic-block.h" | |
50b2596f | 162 | #include "output.h" |
49ad7cfa | 163 | #include "function.h" |
589005ff | 164 | #include "expr.h" |
e7d482b9 | 165 | #include "except.h" |
fb0c0a12 | 166 | #include "ggc.h" |
f1fa37ff | 167 | #include "params.h" |
ae860ff7 | 168 | #include "cselib.h" |
d128effb | 169 | #include "intl.h" |
7506f491 | 170 | #include "obstack.h" |
27fb79ad | 171 | #include "timevar.h" |
4fa31c2a | 172 | |
7506f491 DE |
173 | /* Propagate flow information through back edges and thus enable PRE's |
174 | moving loop invariant calculations out of loops. | |
175 | ||
176 | Originally this tended to create worse overall code, but several | |
177 | improvements during the development of PRE seem to have made following | |
178 | back edges generally a win. | |
179 | ||
180 | Note much of the loop invariant code motion done here would normally | |
181 | be done by loop.c, which has more heuristics for when to move invariants | |
182 | out of loops. At some point we might need to move some of those | |
183 | heuristics into gcse.c. */ | |
7506f491 | 184 | |
f4e584dc JL |
185 | /* We support GCSE via Partial Redundancy Elimination. PRE optimizations |
186 | are a superset of those done by GCSE. | |
7506f491 | 187 | |
f4e584dc | 188 | We perform the following steps: |
7506f491 DE |
189 | |
190 | 1) Compute basic block information. | |
191 | ||
192 | 2) Compute table of places where registers are set. | |
193 | ||
194 | 3) Perform copy/constant propagation. | |
195 | ||
e83f4801 SB |
196 | 4) Perform global cse using lazy code motion if not optimizing |
197 | for size, or code hoisting if we are. | |
7506f491 | 198 | |
e78d9500 | 199 | 5) Perform another pass of copy/constant propagation. |
7506f491 DE |
200 | |
201 | Two passes of copy/constant propagation are done because the first one | |
202 | enables more GCSE and the second one helps to clean up the copies that | |
203 | GCSE creates. This is needed more for PRE than for Classic because Classic | |
204 | GCSE will try to use an existing register containing the common | |
205 | subexpression rather than create a new one. This is harder to do for PRE | |
206 | because of the code motion (which Classic GCSE doesn't do). | |
207 | ||
208 | Expressions we are interested in GCSE-ing are of the form | |
209 | (set (pseudo-reg) (expression)). | |
210 | Function want_to_gcse_p says what these are. | |
211 | ||
212 | PRE handles moving invariant expressions out of loops (by treating them as | |
f4e584dc | 213 | partially redundant). |
7506f491 DE |
214 | |
215 | Eventually it would be nice to replace cse.c/gcse.c with SSA (static single | |
216 | assignment) based GVN (global value numbering). L. T. Simpson's paper | |
217 | (Rice University) on value numbering is a useful reference for this. | |
218 | ||
219 | ********************** | |
220 | ||
221 | We used to support multiple passes but there are diminishing returns in | |
222 | doing so. The first pass usually makes 90% of the changes that are doable. | |
223 | A second pass can make a few more changes made possible by the first pass. | |
224 | Experiments show any further passes don't make enough changes to justify | |
225 | the expense. | |
226 | ||
227 | A study of spec92 using an unlimited number of passes: | |
228 | [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83, | |
229 | [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2, | |
230 | [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1 | |
231 | ||
232 | It was found doing copy propagation between each pass enables further | |
233 | substitutions. | |
234 | ||
235 | PRE is quite expensive in complicated functions because the DFA can take | |
7b1b4aed SB |
236 | a while to converge. Hence we only perform one pass. The parameter |
237 | max-gcse-passes can be modified if one wants to experiment. | |
7506f491 DE |
238 | |
239 | ********************** | |
240 | ||
241 | The steps for PRE are: | |
242 | ||
243 | 1) Build the hash table of expressions we wish to GCSE (expr_hash_table). | |
244 | ||
245 | 2) Perform the data flow analysis for PRE. | |
246 | ||
247 | 3) Delete the redundant instructions | |
248 | ||
249 | 4) Insert the required copies [if any] that make the partially | |
250 | redundant instructions fully redundant. | |
251 | ||
252 | 5) For other reaching expressions, insert an instruction to copy the value | |
253 | to a newly created pseudo that will reach the redundant instruction. | |
254 | ||
255 | The deletion is done first so that when we do insertions we | |
256 | know which pseudo reg to use. | |
257 | ||
258 | Various papers have argued that PRE DFA is expensive (O(n^2)) and others | |
259 | argue it is not. The number of iterations for the algorithm to converge | |
260 | is typically 2-4 so I don't view it as that expensive (relatively speaking). | |
261 | ||
f4e584dc | 262 | PRE GCSE depends heavily on the second CSE pass to clean up the copies |
7506f491 DE |
263 | we create. To make an expression reach the place where it's redundant, |
264 | the result of the expression is copied to a new register, and the redundant | |
265 | expression is deleted by replacing it with this new register. Classic GCSE | |
266 | doesn't have this problem as much as it computes the reaching defs of | |
267 | each register in each block and thus can try to use an existing register. | |
268 | ||
269 | ********************** | |
270 | ||
7506f491 DE |
271 | A fair bit of simplicity is created by creating small functions for simple |
272 | tasks, even when the function is only called in one place. This may | |
273 | measurably slow things down [or may not] by creating more function call | |
274 | overhead than is necessary. The source is laid out so that it's trivial | |
275 | to make the affected functions inline so that one can measure what speed | |
276 | up, if any, can be achieved, and maybe later when things settle things can | |
277 | be rearranged. | |
278 | ||
279 | Help stamp out big monolithic functions! */ | |
280 | \f | |
281 | /* GCSE global vars. */ | |
282 | ||
283 | /* -dG dump file. */ | |
284 | static FILE *gcse_file; | |
285 | ||
f4e584dc JL |
286 | /* Note whether or not we should run jump optimization after gcse. We |
287 | want to do this for two cases. | |
288 | ||
289 | * If we changed any jumps via cprop. | |
290 | ||
291 | * If we added any labels via edge splitting. */ | |
f4e584dc JL |
292 | static int run_jump_opt_after_gcse; |
293 | ||
7506f491 DE |
294 | /* Bitmaps are normally not included in debugging dumps. |
295 | However it's useful to be able to print them from GDB. | |
296 | We could create special functions for this, but it's simpler to | |
297 | just allow passing stderr to the dump_foo fns. Since stderr can | |
298 | be a macro, we store a copy here. */ | |
299 | static FILE *debug_stderr; | |
300 | ||
301 | /* An obstack for our working variables. */ | |
302 | static struct obstack gcse_obstack; | |
303 | ||
c4c81601 | 304 | struct reg_use {rtx reg_rtx; }; |
abd535b6 | 305 | |
7506f491 DE |
306 | /* Hash table of expressions. */ |
307 | ||
308 | struct expr | |
309 | { | |
310 | /* The expression (SET_SRC for expressions, PATTERN for assignments). */ | |
311 | rtx expr; | |
312 | /* Index in the available expression bitmaps. */ | |
313 | int bitmap_index; | |
314 | /* Next entry with the same hash. */ | |
315 | struct expr *next_same_hash; | |
316 | /* List of anticipatable occurrences in basic blocks in the function. | |
317 | An "anticipatable occurrence" is one that is the first occurrence in the | |
f4e584dc JL |
318 | basic block, the operands are not modified in the basic block prior |
319 | to the occurrence and the output is not used between the start of | |
320 | the block and the occurrence. */ | |
7506f491 DE |
321 | struct occr *antic_occr; |
322 | /* List of available occurrence in basic blocks in the function. | |
323 | An "available occurrence" is one that is the last occurrence in the | |
324 | basic block and the operands are not modified by following statements in | |
325 | the basic block [including this insn]. */ | |
326 | struct occr *avail_occr; | |
327 | /* Non-null if the computation is PRE redundant. | |
328 | The value is the newly created pseudo-reg to record a copy of the | |
329 | expression in all the places that reach the redundant copy. */ | |
330 | rtx reaching_reg; | |
331 | }; | |
332 | ||
333 | /* Occurrence of an expression. | |
334 | There is one per basic block. If a pattern appears more than once the | |
335 | last appearance is used [or first for anticipatable expressions]. */ | |
336 | ||
337 | struct occr | |
338 | { | |
339 | /* Next occurrence of this expression. */ | |
340 | struct occr *next; | |
341 | /* The insn that computes the expression. */ | |
342 | rtx insn; | |
cc2902df | 343 | /* Nonzero if this [anticipatable] occurrence has been deleted. */ |
7506f491 | 344 | char deleted_p; |
cc2902df | 345 | /* Nonzero if this [available] occurrence has been copied to |
7506f491 DE |
346 | reaching_reg. */ |
347 | /* ??? This is mutually exclusive with deleted_p, so they could share | |
348 | the same byte. */ | |
349 | char copied_p; | |
350 | }; | |
351 | ||
352 | /* Expression and copy propagation hash tables. | |
353 | Each hash table is an array of buckets. | |
354 | ??? It is known that if it were an array of entries, structure elements | |
355 | `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is | |
356 | not clear whether in the final analysis a sufficient amount of memory would | |
357 | be saved as the size of the available expression bitmaps would be larger | |
358 | [one could build a mapping table without holes afterwards though]. | |
c4c81601 | 359 | Someday I'll perform the computation and figure it out. */ |
7506f491 | 360 | |
02280659 ZD |
361 | struct hash_table |
362 | { | |
363 | /* The table itself. | |
364 | This is an array of `expr_hash_table_size' elements. */ | |
365 | struct expr **table; | |
366 | ||
367 | /* Size of the hash table, in elements. */ | |
368 | unsigned int size; | |
2e653e39 | 369 | |
02280659 ZD |
370 | /* Number of hash table elements. */ |
371 | unsigned int n_elems; | |
7506f491 | 372 | |
02280659 ZD |
373 | /* Whether the table is expression of copy propagation one. */ |
374 | int set_p; | |
375 | }; | |
c4c81601 | 376 | |
02280659 ZD |
377 | /* Expression hash table. */ |
378 | static struct hash_table expr_hash_table; | |
379 | ||
380 | /* Copy propagation hash table. */ | |
381 | static struct hash_table set_hash_table; | |
7506f491 DE |
382 | |
383 | /* Mapping of uids to cuids. | |
384 | Only real insns get cuids. */ | |
385 | static int *uid_cuid; | |
386 | ||
387 | /* Highest UID in UID_CUID. */ | |
388 | static int max_uid; | |
389 | ||
390 | /* Get the cuid of an insn. */ | |
b86db3eb | 391 | #ifdef ENABLE_CHECKING |
282899df NS |
392 | #define INSN_CUID(INSN) \ |
393 | (gcc_assert (INSN_UID (INSN) <= max_uid), uid_cuid[INSN_UID (INSN)]) | |
b86db3eb | 394 | #else |
7506f491 | 395 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) |
b86db3eb | 396 | #endif |
7506f491 DE |
397 | |
398 | /* Number of cuids. */ | |
399 | static int max_cuid; | |
400 | ||
401 | /* Mapping of cuids to insns. */ | |
402 | static rtx *cuid_insn; | |
403 | ||
404 | /* Get insn from cuid. */ | |
405 | #define CUID_INSN(CUID) (cuid_insn[CUID]) | |
406 | ||
407 | /* Maximum register number in function prior to doing gcse + 1. | |
408 | Registers created during this pass have regno >= max_gcse_regno. | |
409 | This is named with "gcse" to not collide with global of same name. */ | |
770ae6cc | 410 | static unsigned int max_gcse_regno; |
7506f491 | 411 | |
7506f491 | 412 | /* Table of registers that are modified. |
c4c81601 | 413 | |
7506f491 DE |
414 | For each register, each element is a list of places where the pseudo-reg |
415 | is set. | |
416 | ||
417 | For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only | |
418 | requires knowledge of which blocks kill which regs [and thus could use | |
f4e584dc | 419 | a bitmap instead of the lists `reg_set_table' uses]. |
7506f491 | 420 | |
c4c81601 RK |
421 | `reg_set_table' and could be turned into an array of bitmaps (num-bbs x |
422 | num-regs) [however perhaps it may be useful to keep the data as is]. One | |
423 | advantage of recording things this way is that `reg_set_table' is fairly | |
424 | sparse with respect to pseudo regs but for hard regs could be fairly dense | |
425 | [relatively speaking]. And recording sets of pseudo-regs in lists speeds | |
7506f491 DE |
426 | up functions like compute_transp since in the case of pseudo-regs we only |
427 | need to iterate over the number of times a pseudo-reg is set, not over the | |
428 | number of basic blocks [clearly there is a bit of a slow down in the cases | |
429 | where a pseudo is set more than once in a block, however it is believed | |
430 | that the net effect is to speed things up]. This isn't done for hard-regs | |
431 | because recording call-clobbered hard-regs in `reg_set_table' at each | |
c4c81601 RK |
432 | function call can consume a fair bit of memory, and iterating over |
433 | hard-regs stored this way in compute_transp will be more expensive. */ | |
7506f491 | 434 | |
c4c81601 RK |
435 | typedef struct reg_set |
436 | { | |
7506f491 DE |
437 | /* The next setting of this register. */ |
438 | struct reg_set *next; | |
439 | /* The insn where it was set. */ | |
440 | rtx insn; | |
441 | } reg_set; | |
c4c81601 | 442 | |
7506f491 | 443 | static reg_set **reg_set_table; |
c4c81601 | 444 | |
7506f491 DE |
445 | /* Size of `reg_set_table'. |
446 | The table starts out at max_gcse_regno + slop, and is enlarged as | |
447 | necessary. */ | |
448 | static int reg_set_table_size; | |
c4c81601 | 449 | |
7506f491 DE |
450 | /* Amount to grow `reg_set_table' by when it's full. */ |
451 | #define REG_SET_TABLE_SLOP 100 | |
452 | ||
a13d4ebf | 453 | /* This is a list of expressions which are MEMs and will be used by load |
589005ff | 454 | or store motion. |
a13d4ebf | 455 | Load motion tracks MEMs which aren't killed by |
454ff5cb | 456 | anything except itself. (i.e., loads and stores to a single location). |
589005ff | 457 | We can then allow movement of these MEM refs with a little special |
a13d4ebf AM |
458 | allowance. (all stores copy the same value to the reaching reg used |
459 | for the loads). This means all values used to store into memory must have | |
589005ff | 460 | no side effects so we can re-issue the setter value. |
a13d4ebf AM |
461 | Store Motion uses this structure as an expression table to track stores |
462 | which look interesting, and might be moveable towards the exit block. */ | |
463 | ||
464 | struct ls_expr | |
465 | { | |
466 | struct expr * expr; /* Gcse expression reference for LM. */ | |
467 | rtx pattern; /* Pattern of this mem. */ | |
47a3dae1 | 468 | rtx pattern_regs; /* List of registers mentioned by the mem. */ |
aaa4ca30 AJ |
469 | rtx loads; /* INSN list of loads seen. */ |
470 | rtx stores; /* INSN list of stores seen. */ | |
a13d4ebf AM |
471 | struct ls_expr * next; /* Next in the list. */ |
472 | int invalid; /* Invalid for some reason. */ | |
473 | int index; /* If it maps to a bitmap index. */ | |
b58b21d5 | 474 | unsigned int hash_index; /* Index when in a hash table. */ |
a13d4ebf AM |
475 | rtx reaching_reg; /* Register to use when re-writing. */ |
476 | }; | |
477 | ||
fbef91d8 RS |
478 | /* Array of implicit set patterns indexed by basic block index. */ |
479 | static rtx *implicit_sets; | |
480 | ||
a13d4ebf AM |
481 | /* Head of the list of load/store memory refs. */ |
482 | static struct ls_expr * pre_ldst_mems = NULL; | |
483 | ||
7506f491 DE |
484 | /* Bitmap containing one bit for each register in the program. |
485 | Used when performing GCSE to track which registers have been set since | |
486 | the start of the basic block. */ | |
73991d6a | 487 | static regset reg_set_bitmap; |
7506f491 DE |
488 | |
489 | /* For each block, a bitmap of registers set in the block. | |
e83f4801 | 490 | This is used by compute_transp. |
7506f491 DE |
491 | It is computed during hash table computation and not by compute_sets |
492 | as it includes registers added since the last pass (or between cprop and | |
493 | gcse) and it's currently not easy to realloc sbitmap vectors. */ | |
494 | static sbitmap *reg_set_in_block; | |
495 | ||
a13d4ebf AM |
496 | /* Array, indexed by basic block number for a list of insns which modify |
497 | memory within that block. */ | |
498 | static rtx * modify_mem_list; | |
0516f6fe | 499 | static bitmap modify_mem_list_set; |
a13d4ebf AM |
500 | |
501 | /* This array parallels modify_mem_list, but is kept canonicalized. */ | |
502 | static rtx * canon_modify_mem_list; | |
0516f6fe SB |
503 | static bitmap canon_modify_mem_list_set; |
504 | ||
7506f491 DE |
505 | /* Various variables for statistics gathering. */ |
506 | ||
507 | /* Memory used in a pass. | |
508 | This isn't intended to be absolutely precise. Its intent is only | |
509 | to keep an eye on memory usage. */ | |
510 | static int bytes_used; | |
c4c81601 | 511 | |
7506f491 DE |
512 | /* GCSE substitutions made. */ |
513 | static int gcse_subst_count; | |
514 | /* Number of copy instructions created. */ | |
515 | static int gcse_create_count; | |
27fb79ad SB |
516 | /* Number of local constants propagated. */ |
517 | static int local_const_prop_count; | |
518 | /* Number of local copys propagated. */ | |
519 | static int local_copy_prop_count; | |
520 | /* Number of global constants propagated. */ | |
521 | static int global_const_prop_count; | |
522 | /* Number of global copys propagated. */ | |
523 | static int global_copy_prop_count; | |
7506f491 | 524 | \f |
e83f4801 SB |
525 | /* For available exprs */ |
526 | static sbitmap *ae_kill, *ae_gen; | |
b5ce41ff | 527 | |
0511851c MM |
528 | /* Objects of this type are passed around by the null-pointer check |
529 | removal routines. */ | |
c4c81601 RK |
530 | struct null_pointer_info |
531 | { | |
0511851c | 532 | /* The basic block being processed. */ |
e0082a72 | 533 | basic_block current_block; |
0511851c | 534 | /* The first register to be handled in this pass. */ |
770ae6cc | 535 | unsigned int min_reg; |
0511851c | 536 | /* One greater than the last register to be handled in this pass. */ |
770ae6cc | 537 | unsigned int max_reg; |
0511851c MM |
538 | sbitmap *nonnull_local; |
539 | sbitmap *nonnull_killed; | |
540 | }; | |
7506f491 | 541 | \f |
1d088dee | 542 | static void compute_can_copy (void); |
9fe15a12 KG |
543 | static void *gmalloc (size_t) ATTRIBUTE_MALLOC; |
544 | static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC; | |
545 | static void *grealloc (void *, size_t); | |
703ad42b | 546 | static void *gcse_alloc (unsigned long); |
1d088dee AJ |
547 | static void alloc_gcse_mem (rtx); |
548 | static void free_gcse_mem (void); | |
549 | static void alloc_reg_set_mem (int); | |
550 | static void free_reg_set_mem (void); | |
1d088dee | 551 | static void record_one_set (int, rtx); |
b885908b | 552 | static void replace_one_set (int, rtx, rtx); |
1d088dee AJ |
553 | static void record_set_info (rtx, rtx, void *); |
554 | static void compute_sets (rtx); | |
555 | static void hash_scan_insn (rtx, struct hash_table *, int); | |
556 | static void hash_scan_set (rtx, rtx, struct hash_table *); | |
557 | static void hash_scan_clobber (rtx, rtx, struct hash_table *); | |
558 | static void hash_scan_call (rtx, rtx, struct hash_table *); | |
559 | static int want_to_gcse_p (rtx); | |
1707bafa | 560 | static bool can_assign_to_reg_p (rtx); |
1d088dee AJ |
561 | static bool gcse_constant_p (rtx); |
562 | static int oprs_unchanged_p (rtx, rtx, int); | |
563 | static int oprs_anticipatable_p (rtx, rtx); | |
564 | static int oprs_available_p (rtx, rtx); | |
565 | static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int, | |
566 | struct hash_table *); | |
567 | static void insert_set_in_table (rtx, rtx, struct hash_table *); | |
568 | static unsigned int hash_expr (rtx, enum machine_mode, int *, int); | |
1d088dee AJ |
569 | static unsigned int hash_set (int, int); |
570 | static int expr_equiv_p (rtx, rtx); | |
571 | static void record_last_reg_set_info (rtx, int); | |
572 | static void record_last_mem_set_info (rtx); | |
573 | static void record_last_set_info (rtx, rtx, void *); | |
574 | static void compute_hash_table (struct hash_table *); | |
575 | static void alloc_hash_table (int, struct hash_table *, int); | |
576 | static void free_hash_table (struct hash_table *); | |
577 | static void compute_hash_table_work (struct hash_table *); | |
578 | static void dump_hash_table (FILE *, const char *, struct hash_table *); | |
1d088dee AJ |
579 | static struct expr *lookup_set (unsigned int, struct hash_table *); |
580 | static struct expr *next_set (unsigned int, struct expr *); | |
581 | static void reset_opr_set_tables (void); | |
582 | static int oprs_not_set_p (rtx, rtx); | |
583 | static void mark_call (rtx); | |
584 | static void mark_set (rtx, rtx); | |
585 | static void mark_clobber (rtx, rtx); | |
586 | static void mark_oprs_set (rtx); | |
587 | static void alloc_cprop_mem (int, int); | |
588 | static void free_cprop_mem (void); | |
589 | static void compute_transp (rtx, int, sbitmap *, int); | |
590 | static void compute_transpout (void); | |
591 | static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *, | |
592 | struct hash_table *); | |
593 | static void compute_cprop_data (void); | |
594 | static void find_used_regs (rtx *, void *); | |
595 | static int try_replace_reg (rtx, rtx, rtx); | |
596 | static struct expr *find_avail_set (int, rtx); | |
597 | static int cprop_jump (basic_block, rtx, rtx, rtx, rtx); | |
598 | static void mems_conflict_for_gcse_p (rtx, rtx, void *); | |
599 | static int load_killed_in_block_p (basic_block, int, rtx, int); | |
600 | static void canon_list_insert (rtx, rtx, void *); | |
601 | static int cprop_insn (rtx, int); | |
602 | static int cprop (int); | |
603 | static void find_implicit_sets (void); | |
604 | static int one_cprop_pass (int, int, int); | |
605 | static bool constprop_register (rtx, rtx, rtx, int); | |
606 | static struct expr *find_bypass_set (int, int); | |
607 | static bool reg_killed_on_edge (rtx, edge); | |
608 | static int bypass_block (basic_block, rtx, rtx); | |
609 | static int bypass_conditional_jumps (void); | |
610 | static void alloc_pre_mem (int, int); | |
611 | static void free_pre_mem (void); | |
612 | static void compute_pre_data (void); | |
613 | static int pre_expr_reaches_here_p (basic_block, struct expr *, | |
614 | basic_block); | |
615 | static void insert_insn_end_bb (struct expr *, basic_block, int); | |
616 | static void pre_insert_copy_insn (struct expr *, rtx); | |
617 | static void pre_insert_copies (void); | |
618 | static int pre_delete (void); | |
619 | static int pre_gcse (void); | |
620 | static int one_pre_gcse_pass (int); | |
621 | static void add_label_notes (rtx, rtx); | |
622 | static void alloc_code_hoist_mem (int, int); | |
623 | static void free_code_hoist_mem (void); | |
624 | static void compute_code_hoist_vbeinout (void); | |
625 | static void compute_code_hoist_data (void); | |
626 | static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *); | |
627 | static void hoist_code (void); | |
628 | static int one_code_hoisting_pass (void); | |
1d088dee AJ |
629 | static rtx process_insert_insn (struct expr *); |
630 | static int pre_edge_insert (struct edge_list *, struct expr **); | |
1d088dee AJ |
631 | static int pre_expr_reaches_here_p_work (basic_block, struct expr *, |
632 | basic_block, char *); | |
633 | static struct ls_expr * ldst_entry (rtx); | |
634 | static void free_ldst_entry (struct ls_expr *); | |
635 | static void free_ldst_mems (void); | |
636 | static void print_ldst_list (FILE *); | |
637 | static struct ls_expr * find_rtx_in_ldst (rtx); | |
638 | static int enumerate_ldsts (void); | |
639 | static inline struct ls_expr * first_ls_expr (void); | |
640 | static inline struct ls_expr * next_ls_expr (struct ls_expr *); | |
641 | static int simple_mem (rtx); | |
642 | static void invalidate_any_buried_refs (rtx); | |
643 | static void compute_ld_motion_mems (void); | |
644 | static void trim_ld_motion_mems (void); | |
645 | static void update_ld_motion_stores (struct expr *); | |
646 | static void reg_set_info (rtx, rtx, void *); | |
01c43039 | 647 | static void reg_clear_last_set (rtx, rtx, void *); |
1d088dee AJ |
648 | static bool store_ops_ok (rtx, int *); |
649 | static rtx extract_mentioned_regs (rtx); | |
650 | static rtx extract_mentioned_regs_helper (rtx, rtx); | |
651 | static void find_moveable_store (rtx, int *, int *); | |
652 | static int compute_store_table (void); | |
3b14e3af ZD |
653 | static bool load_kills_store (rtx, rtx, int); |
654 | static bool find_loads (rtx, rtx, int); | |
655 | static bool store_killed_in_insn (rtx, rtx, rtx, int); | |
1d088dee AJ |
656 | static bool store_killed_after (rtx, rtx, rtx, basic_block, int *, rtx *); |
657 | static bool store_killed_before (rtx, rtx, rtx, basic_block, int *); | |
658 | static void build_store_vectors (void); | |
659 | static void insert_insn_start_bb (rtx, basic_block); | |
660 | static int insert_store (struct ls_expr *, edge); | |
d088acea ZD |
661 | static void remove_reachable_equiv_notes (basic_block, struct ls_expr *); |
662 | static void replace_store_insn (rtx, rtx, basic_block, struct ls_expr *); | |
1d088dee AJ |
663 | static void delete_store (struct ls_expr *, basic_block); |
664 | static void free_store_memory (void); | |
665 | static void store_motion (void); | |
666 | static void free_insn_expr_list_list (rtx *); | |
667 | static void clear_modify_mem_tables (void); | |
668 | static void free_modify_mem_tables (void); | |
669 | static rtx gcse_emit_move_after (rtx, rtx, rtx); | |
670 | static void local_cprop_find_used_regs (rtx *, void *); | |
671 | static bool do_local_cprop (rtx, rtx, int, rtx*); | |
672 | static bool adjust_libcall_notes (rtx, rtx, rtx, rtx*); | |
673 | static void local_cprop_pass (int); | |
d128effb | 674 | static bool is_too_expensive (const char *); |
7506f491 | 675 | \f |
d128effb | 676 | |
7506f491 DE |
677 | /* Entry point for global common subexpression elimination. |
678 | F is the first instruction in the function. */ | |
679 | ||
e78d9500 | 680 | int |
1d088dee | 681 | gcse_main (rtx f, FILE *file) |
7506f491 DE |
682 | { |
683 | int changed, pass; | |
684 | /* Bytes used at start of pass. */ | |
685 | int initial_bytes_used; | |
686 | /* Maximum number of bytes used by a pass. */ | |
687 | int max_pass_bytes; | |
688 | /* Point to release obstack data from for each pass. */ | |
689 | char *gcse_obstack_bottom; | |
690 | ||
b5ce41ff JL |
691 | /* We do not construct an accurate cfg in functions which call |
692 | setjmp, so just punt to be safe. */ | |
7506f491 | 693 | if (current_function_calls_setjmp) |
e78d9500 | 694 | return 0; |
589005ff | 695 | |
b5ce41ff JL |
696 | /* Assume that we do not need to run jump optimizations after gcse. */ |
697 | run_jump_opt_after_gcse = 0; | |
698 | ||
7506f491 DE |
699 | /* For calling dump_foo fns from gdb. */ |
700 | debug_stderr = stderr; | |
b5ce41ff | 701 | gcse_file = file; |
7506f491 | 702 | |
b5ce41ff JL |
703 | /* Identify the basic block information for this function, including |
704 | successors and predecessors. */ | |
7506f491 | 705 | max_gcse_regno = max_reg_num (); |
7506f491 | 706 | |
a42cd965 AM |
707 | if (file) |
708 | dump_flow_info (file); | |
709 | ||
d128effb NS |
710 | /* Return if there's nothing to do, or it is too expensive. */ |
711 | if (n_basic_blocks <= 1 || is_too_expensive (_("GCSE disabled"))) | |
a18820c6 | 712 | return 0; |
7b1b4aed | 713 | |
7506f491 | 714 | gcc_obstack_init (&gcse_obstack); |
a42cd965 | 715 | bytes_used = 0; |
7506f491 | 716 | |
a13d4ebf AM |
717 | /* We need alias. */ |
718 | init_alias_analysis (); | |
c4c81601 RK |
719 | /* Record where pseudo-registers are set. This data is kept accurate |
720 | during each pass. ??? We could also record hard-reg information here | |
721 | [since it's unchanging], however it is currently done during hash table | |
722 | computation. | |
b5ce41ff | 723 | |
c4c81601 RK |
724 | It may be tempting to compute MEM set information here too, but MEM sets |
725 | will be subject to code motion one day and thus we need to compute | |
b5ce41ff | 726 | information about memory sets when we build the hash tables. */ |
7506f491 DE |
727 | |
728 | alloc_reg_set_mem (max_gcse_regno); | |
729 | compute_sets (f); | |
730 | ||
731 | pass = 0; | |
732 | initial_bytes_used = bytes_used; | |
733 | max_pass_bytes = 0; | |
734 | gcse_obstack_bottom = gcse_alloc (1); | |
735 | changed = 1; | |
740f35a0 | 736 | while (changed && pass < MAX_GCSE_PASSES) |
7506f491 DE |
737 | { |
738 | changed = 0; | |
739 | if (file) | |
740 | fprintf (file, "GCSE pass %d\n\n", pass + 1); | |
741 | ||
742 | /* Initialize bytes_used to the space for the pred/succ lists, | |
743 | and the reg_set_table data. */ | |
744 | bytes_used = initial_bytes_used; | |
745 | ||
746 | /* Each pass may create new registers, so recalculate each time. */ | |
747 | max_gcse_regno = max_reg_num (); | |
748 | ||
749 | alloc_gcse_mem (f); | |
750 | ||
b5ce41ff JL |
751 | /* Don't allow constant propagation to modify jumps |
752 | during this pass. */ | |
27fb79ad | 753 | timevar_push (TV_CPROP1); |
a0134312 | 754 | changed = one_cprop_pass (pass + 1, 0, 0); |
27fb79ad | 755 | timevar_pop (TV_CPROP1); |
7506f491 DE |
756 | |
757 | if (optimize_size) | |
e83f4801 | 758 | /* Do nothing. */ ; |
7506f491 | 759 | else |
589005ff | 760 | { |
27fb79ad | 761 | timevar_push (TV_PRE); |
a42cd965 | 762 | changed |= one_pre_gcse_pass (pass + 1); |
a13d4ebf AM |
763 | /* We may have just created new basic blocks. Release and |
764 | recompute various things which are sized on the number of | |
765 | basic blocks. */ | |
766 | if (changed) | |
767 | { | |
73991d6a | 768 | free_modify_mem_tables (); |
9fe15a12 KG |
769 | modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); |
770 | canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); | |
a13d4ebf | 771 | } |
a42cd965 AM |
772 | free_reg_set_mem (); |
773 | alloc_reg_set_mem (max_reg_num ()); | |
774 | compute_sets (f); | |
775 | run_jump_opt_after_gcse = 1; | |
27fb79ad | 776 | timevar_pop (TV_PRE); |
a42cd965 | 777 | } |
7506f491 DE |
778 | |
779 | if (max_pass_bytes < bytes_used) | |
780 | max_pass_bytes = bytes_used; | |
781 | ||
bb457bd9 JL |
782 | /* Free up memory, then reallocate for code hoisting. We can |
783 | not re-use the existing allocated memory because the tables | |
784 | will not have info for the insns or registers created by | |
785 | partial redundancy elimination. */ | |
7506f491 DE |
786 | free_gcse_mem (); |
787 | ||
5d3cc252 | 788 | /* It does not make sense to run code hoisting unless we are optimizing |
bb457bd9 JL |
789 | for code size -- it rarely makes programs faster, and can make |
790 | them bigger if we did partial redundancy elimination (when optimizing | |
e83f4801 | 791 | for space, we don't run the partial redundancy algorithms). */ |
bb457bd9 | 792 | if (optimize_size) |
589005ff | 793 | { |
27fb79ad | 794 | timevar_push (TV_HOIST); |
bb457bd9 JL |
795 | max_gcse_regno = max_reg_num (); |
796 | alloc_gcse_mem (f); | |
797 | changed |= one_code_hoisting_pass (); | |
798 | free_gcse_mem (); | |
799 | ||
800 | if (max_pass_bytes < bytes_used) | |
801 | max_pass_bytes = bytes_used; | |
27fb79ad | 802 | timevar_pop (TV_HOIST); |
589005ff | 803 | } |
bb457bd9 | 804 | |
7506f491 DE |
805 | if (file) |
806 | { | |
807 | fprintf (file, "\n"); | |
808 | fflush (file); | |
809 | } | |
c4c81601 | 810 | |
7506f491 DE |
811 | obstack_free (&gcse_obstack, gcse_obstack_bottom); |
812 | pass++; | |
813 | } | |
814 | ||
b5ce41ff JL |
815 | /* Do one last pass of copy propagation, including cprop into |
816 | conditional jumps. */ | |
817 | ||
818 | max_gcse_regno = max_reg_num (); | |
819 | alloc_gcse_mem (f); | |
820 | /* This time, go ahead and allow cprop to alter jumps. */ | |
27fb79ad | 821 | timevar_push (TV_CPROP2); |
a0134312 | 822 | one_cprop_pass (pass + 1, 1, 0); |
27fb79ad | 823 | timevar_pop (TV_CPROP2); |
b5ce41ff | 824 | free_gcse_mem (); |
7506f491 DE |
825 | |
826 | if (file) | |
827 | { | |
828 | fprintf (file, "GCSE of %s: %d basic blocks, ", | |
faed5cc3 | 829 | current_function_name (), n_basic_blocks); |
7506f491 DE |
830 | fprintf (file, "%d pass%s, %d bytes\n\n", |
831 | pass, pass > 1 ? "es" : "", max_pass_bytes); | |
832 | } | |
833 | ||
6496a589 | 834 | obstack_free (&gcse_obstack, NULL); |
7506f491 | 835 | free_reg_set_mem (); |
7b1b4aed | 836 | |
a13d4ebf AM |
837 | /* We are finished with alias. */ |
838 | end_alias_analysis (); | |
839 | allocate_reg_info (max_reg_num (), FALSE, FALSE); | |
840 | ||
47a3dae1 | 841 | if (!optimize_size && flag_gcse_sm) |
27fb79ad SB |
842 | { |
843 | timevar_push (TV_LSM); | |
844 | store_motion (); | |
845 | timevar_pop (TV_LSM); | |
846 | } | |
47a3dae1 | 847 | |
a13d4ebf | 848 | /* Record where pseudo-registers are set. */ |
e78d9500 | 849 | return run_jump_opt_after_gcse; |
7506f491 DE |
850 | } |
851 | \f | |
852 | /* Misc. utilities. */ | |
853 | ||
773eae39 EB |
854 | /* Nonzero for each mode that supports (set (reg) (reg)). |
855 | This is trivially true for integer and floating point values. | |
856 | It may or may not be true for condition codes. */ | |
857 | static char can_copy[(int) NUM_MACHINE_MODES]; | |
858 | ||
7506f491 DE |
859 | /* Compute which modes support reg/reg copy operations. */ |
860 | ||
861 | static void | |
1d088dee | 862 | compute_can_copy (void) |
7506f491 DE |
863 | { |
864 | int i; | |
50b2596f | 865 | #ifndef AVOID_CCMODE_COPIES |
8e42ace1 | 866 | rtx reg, insn; |
50b2596f | 867 | #endif |
773eae39 | 868 | memset (can_copy, 0, NUM_MACHINE_MODES); |
7506f491 DE |
869 | |
870 | start_sequence (); | |
871 | for (i = 0; i < NUM_MACHINE_MODES; i++) | |
c4c81601 RK |
872 | if (GET_MODE_CLASS (i) == MODE_CC) |
873 | { | |
7506f491 | 874 | #ifdef AVOID_CCMODE_COPIES |
773eae39 | 875 | can_copy[i] = 0; |
7506f491 | 876 | #else |
c4c81601 RK |
877 | reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1); |
878 | insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg)); | |
9714cf43 | 879 | if (recog (PATTERN (insn), insn, NULL) >= 0) |
773eae39 | 880 | can_copy[i] = 1; |
7506f491 | 881 | #endif |
c4c81601 | 882 | } |
141b5810 | 883 | else |
773eae39 | 884 | can_copy[i] = 1; |
c4c81601 | 885 | |
7506f491 | 886 | end_sequence (); |
7506f491 | 887 | } |
773eae39 EB |
888 | |
889 | /* Returns whether the mode supports reg/reg copy operations. */ | |
890 | ||
891 | bool | |
1d088dee | 892 | can_copy_p (enum machine_mode mode) |
773eae39 EB |
893 | { |
894 | static bool can_copy_init_p = false; | |
895 | ||
896 | if (! can_copy_init_p) | |
897 | { | |
898 | compute_can_copy (); | |
899 | can_copy_init_p = true; | |
900 | } | |
901 | ||
902 | return can_copy[mode] != 0; | |
903 | } | |
7506f491 DE |
904 | \f |
905 | /* Cover function to xmalloc to record bytes allocated. */ | |
906 | ||
703ad42b | 907 | static void * |
4ac11022 | 908 | gmalloc (size_t size) |
7506f491 DE |
909 | { |
910 | bytes_used += size; | |
911 | return xmalloc (size); | |
912 | } | |
913 | ||
9fe15a12 KG |
914 | /* Cover function to xcalloc to record bytes allocated. */ |
915 | ||
916 | static void * | |
917 | gcalloc (size_t nelem, size_t elsize) | |
918 | { | |
919 | bytes_used += nelem * elsize; | |
920 | return xcalloc (nelem, elsize); | |
921 | } | |
922 | ||
7506f491 DE |
923 | /* Cover function to xrealloc. |
924 | We don't record the additional size since we don't know it. | |
925 | It won't affect memory usage stats much anyway. */ | |
926 | ||
703ad42b | 927 | static void * |
9fe15a12 | 928 | grealloc (void *ptr, size_t size) |
7506f491 DE |
929 | { |
930 | return xrealloc (ptr, size); | |
931 | } | |
932 | ||
77bbd421 | 933 | /* Cover function to obstack_alloc. */ |
7506f491 | 934 | |
703ad42b | 935 | static void * |
1d088dee | 936 | gcse_alloc (unsigned long size) |
7506f491 | 937 | { |
77bbd421 | 938 | bytes_used += size; |
703ad42b | 939 | return obstack_alloc (&gcse_obstack, size); |
7506f491 DE |
940 | } |
941 | ||
942 | /* Allocate memory for the cuid mapping array, | |
943 | and reg/memory set tracking tables. | |
944 | ||
945 | This is called at the start of each pass. */ | |
946 | ||
947 | static void | |
1d088dee | 948 | alloc_gcse_mem (rtx f) |
7506f491 | 949 | { |
9fe15a12 | 950 | int i; |
7506f491 DE |
951 | rtx insn; |
952 | ||
953 | /* Find the largest UID and create a mapping from UIDs to CUIDs. | |
954 | CUIDs are like UIDs except they increase monotonically, have no gaps, | |
955 | and only apply to real insns. */ | |
956 | ||
957 | max_uid = get_max_uid (); | |
9fe15a12 | 958 | uid_cuid = gcalloc (max_uid + 1, sizeof (int)); |
7506f491 DE |
959 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) |
960 | { | |
2c3c49de | 961 | if (INSN_P (insn)) |
b86db3eb | 962 | uid_cuid[INSN_UID (insn)] = i++; |
7506f491 | 963 | else |
b86db3eb | 964 | uid_cuid[INSN_UID (insn)] = i; |
7506f491 DE |
965 | } |
966 | ||
967 | /* Create a table mapping cuids to insns. */ | |
968 | ||
969 | max_cuid = i; | |
9fe15a12 | 970 | cuid_insn = gcalloc (max_cuid + 1, sizeof (rtx)); |
7506f491 | 971 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) |
2c3c49de | 972 | if (INSN_P (insn)) |
c4c81601 | 973 | CUID_INSN (i++) = insn; |
7506f491 DE |
974 | |
975 | /* Allocate vars to track sets of regs. */ | |
73991d6a | 976 | reg_set_bitmap = BITMAP_XMALLOC (); |
7506f491 DE |
977 | |
978 | /* Allocate vars to track sets of regs, memory per block. */ | |
703ad42b | 979 | reg_set_in_block = sbitmap_vector_alloc (last_basic_block, max_gcse_regno); |
a13d4ebf AM |
980 | /* Allocate array to keep a list of insns which modify memory in each |
981 | basic block. */ | |
9fe15a12 KG |
982 | modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); |
983 | canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); | |
73991d6a JH |
984 | modify_mem_list_set = BITMAP_XMALLOC (); |
985 | canon_modify_mem_list_set = BITMAP_XMALLOC (); | |
7506f491 DE |
986 | } |
987 | ||
988 | /* Free memory allocated by alloc_gcse_mem. */ | |
989 | ||
990 | static void | |
1d088dee | 991 | free_gcse_mem (void) |
7506f491 DE |
992 | { |
993 | free (uid_cuid); | |
994 | free (cuid_insn); | |
995 | ||
73991d6a | 996 | BITMAP_XFREE (reg_set_bitmap); |
7506f491 | 997 | |
5a660bff | 998 | sbitmap_vector_free (reg_set_in_block); |
73991d6a JH |
999 | free_modify_mem_tables (); |
1000 | BITMAP_XFREE (modify_mem_list_set); | |
1001 | BITMAP_XFREE (canon_modify_mem_list_set); | |
7506f491 | 1002 | } |
b5ce41ff JL |
1003 | \f |
1004 | /* Compute the local properties of each recorded expression. | |
c4c81601 RK |
1005 | |
1006 | Local properties are those that are defined by the block, irrespective of | |
1007 | other blocks. | |
b5ce41ff JL |
1008 | |
1009 | An expression is transparent in a block if its operands are not modified | |
1010 | in the block. | |
1011 | ||
1012 | An expression is computed (locally available) in a block if it is computed | |
1013 | at least once and expression would contain the same value if the | |
1014 | computation was moved to the end of the block. | |
1015 | ||
1016 | An expression is locally anticipatable in a block if it is computed at | |
1017 | least once and expression would contain the same value if the computation | |
1018 | was moved to the beginning of the block. | |
1019 | ||
c4c81601 RK |
1020 | We call this routine for cprop, pre and code hoisting. They all compute |
1021 | basically the same information and thus can easily share this code. | |
7506f491 | 1022 | |
c4c81601 RK |
1023 | TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local |
1024 | properties. If NULL, then it is not necessary to compute or record that | |
1025 | particular property. | |
b5ce41ff | 1026 | |
02280659 ZD |
1027 | TABLE controls which hash table to look at. If it is set hash table, |
1028 | additionally, TRANSP is computed as ~TRANSP, since this is really cprop's | |
c4c81601 | 1029 | ABSALTERED. */ |
589005ff | 1030 | |
b5ce41ff | 1031 | static void |
7b1b4aed SB |
1032 | compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc, |
1033 | struct hash_table *table) | |
b5ce41ff | 1034 | { |
02280659 | 1035 | unsigned int i; |
589005ff | 1036 | |
b5ce41ff JL |
1037 | /* Initialize any bitmaps that were passed in. */ |
1038 | if (transp) | |
695ab36a | 1039 | { |
02280659 | 1040 | if (table->set_p) |
d55bc081 | 1041 | sbitmap_vector_zero (transp, last_basic_block); |
695ab36a | 1042 | else |
d55bc081 | 1043 | sbitmap_vector_ones (transp, last_basic_block); |
695ab36a | 1044 | } |
c4c81601 | 1045 | |
b5ce41ff | 1046 | if (comp) |
d55bc081 | 1047 | sbitmap_vector_zero (comp, last_basic_block); |
b5ce41ff | 1048 | if (antloc) |
d55bc081 | 1049 | sbitmap_vector_zero (antloc, last_basic_block); |
b5ce41ff | 1050 | |
02280659 | 1051 | for (i = 0; i < table->size; i++) |
7506f491 | 1052 | { |
b5ce41ff JL |
1053 | struct expr *expr; |
1054 | ||
02280659 | 1055 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) |
b5ce41ff | 1056 | { |
b5ce41ff | 1057 | int indx = expr->bitmap_index; |
c4c81601 | 1058 | struct occr *occr; |
b5ce41ff JL |
1059 | |
1060 | /* The expression is transparent in this block if it is not killed. | |
1061 | We start by assuming all are transparent [none are killed], and | |
1062 | then reset the bits for those that are. */ | |
b5ce41ff | 1063 | if (transp) |
02280659 | 1064 | compute_transp (expr->expr, indx, transp, table->set_p); |
b5ce41ff JL |
1065 | |
1066 | /* The occurrences recorded in antic_occr are exactly those that | |
cc2902df | 1067 | we want to set to nonzero in ANTLOC. */ |
b5ce41ff | 1068 | if (antloc) |
c4c81601 RK |
1069 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
1070 | { | |
1071 | SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx); | |
b5ce41ff | 1072 | |
c4c81601 RK |
1073 | /* While we're scanning the table, this is a good place to |
1074 | initialize this. */ | |
1075 | occr->deleted_p = 0; | |
1076 | } | |
b5ce41ff JL |
1077 | |
1078 | /* The occurrences recorded in avail_occr are exactly those that | |
cc2902df | 1079 | we want to set to nonzero in COMP. */ |
b5ce41ff | 1080 | if (comp) |
c4c81601 RK |
1081 | for (occr = expr->avail_occr; occr != NULL; occr = occr->next) |
1082 | { | |
1083 | SET_BIT (comp[BLOCK_NUM (occr->insn)], indx); | |
b5ce41ff | 1084 | |
c4c81601 RK |
1085 | /* While we're scanning the table, this is a good place to |
1086 | initialize this. */ | |
1087 | occr->copied_p = 0; | |
1088 | } | |
b5ce41ff JL |
1089 | |
1090 | /* While we're scanning the table, this is a good place to | |
1091 | initialize this. */ | |
1092 | expr->reaching_reg = 0; | |
1093 | } | |
7506f491 | 1094 | } |
7506f491 DE |
1095 | } |
1096 | \f | |
1097 | /* Register set information. | |
1098 | ||
1099 | `reg_set_table' records where each register is set or otherwise | |
1100 | modified. */ | |
1101 | ||
1102 | static struct obstack reg_set_obstack; | |
1103 | ||
1104 | static void | |
1d088dee | 1105 | alloc_reg_set_mem (int n_regs) |
7506f491 | 1106 | { |
7506f491 | 1107 | reg_set_table_size = n_regs + REG_SET_TABLE_SLOP; |
9fe15a12 | 1108 | reg_set_table = gcalloc (reg_set_table_size, sizeof (struct reg_set *)); |
7506f491 DE |
1109 | |
1110 | gcc_obstack_init (®_set_obstack); | |
1111 | } | |
1112 | ||
1113 | static void | |
1d088dee | 1114 | free_reg_set_mem (void) |
7506f491 DE |
1115 | { |
1116 | free (reg_set_table); | |
6496a589 | 1117 | obstack_free (®_set_obstack, NULL); |
7506f491 DE |
1118 | } |
1119 | ||
b885908b MH |
1120 | /* An OLD_INSN that used to set REGNO was replaced by NEW_INSN. |
1121 | Update the corresponding `reg_set_table' entry accordingly. | |
1122 | We assume that NEW_INSN is not already recorded in reg_set_table[regno]. */ | |
1123 | ||
1124 | static void | |
1125 | replace_one_set (int regno, rtx old_insn, rtx new_insn) | |
1126 | { | |
1127 | struct reg_set *reg_info; | |
1128 | if (regno >= reg_set_table_size) | |
1129 | return; | |
1130 | for (reg_info = reg_set_table[regno]; reg_info; reg_info = reg_info->next) | |
1131 | if (reg_info->insn == old_insn) | |
1132 | { | |
1133 | reg_info->insn = new_insn; | |
1134 | break; | |
1135 | } | |
1136 | } | |
1137 | ||
7506f491 DE |
1138 | /* Record REGNO in the reg_set table. */ |
1139 | ||
1140 | static void | |
1d088dee | 1141 | record_one_set (int regno, rtx insn) |
7506f491 | 1142 | { |
172890a2 | 1143 | /* Allocate a new reg_set element and link it onto the list. */ |
63bc1d05 | 1144 | struct reg_set *new_reg_info; |
7506f491 DE |
1145 | |
1146 | /* If the table isn't big enough, enlarge it. */ | |
1147 | if (regno >= reg_set_table_size) | |
1148 | { | |
1149 | int new_size = regno + REG_SET_TABLE_SLOP; | |
c4c81601 | 1150 | |
703ad42b KG |
1151 | reg_set_table = grealloc (reg_set_table, |
1152 | new_size * sizeof (struct reg_set *)); | |
1153 | memset (reg_set_table + reg_set_table_size, 0, | |
8e42ace1 | 1154 | (new_size - reg_set_table_size) * sizeof (struct reg_set *)); |
7506f491 DE |
1155 | reg_set_table_size = new_size; |
1156 | } | |
1157 | ||
703ad42b | 1158 | new_reg_info = obstack_alloc (®_set_obstack, sizeof (struct reg_set)); |
7506f491 DE |
1159 | bytes_used += sizeof (struct reg_set); |
1160 | new_reg_info->insn = insn; | |
274969ea MM |
1161 | new_reg_info->next = reg_set_table[regno]; |
1162 | reg_set_table[regno] = new_reg_info; | |
7506f491 DE |
1163 | } |
1164 | ||
c4c81601 RK |
1165 | /* Called from compute_sets via note_stores to handle one SET or CLOBBER in |
1166 | an insn. The DATA is really the instruction in which the SET is | |
1167 | occurring. */ | |
7506f491 DE |
1168 | |
1169 | static void | |
1d088dee | 1170 | record_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data) |
7506f491 | 1171 | { |
84832317 MM |
1172 | rtx record_set_insn = (rtx) data; |
1173 | ||
7b1b4aed | 1174 | if (REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
c4c81601 | 1175 | record_one_set (REGNO (dest), record_set_insn); |
7506f491 DE |
1176 | } |
1177 | ||
1178 | /* Scan the function and record each set of each pseudo-register. | |
1179 | ||
c4c81601 | 1180 | This is called once, at the start of the gcse pass. See the comments for |
fbe5a4a6 | 1181 | `reg_set_table' for further documentation. */ |
7506f491 DE |
1182 | |
1183 | static void | |
1d088dee | 1184 | compute_sets (rtx f) |
7506f491 | 1185 | { |
c4c81601 | 1186 | rtx insn; |
7506f491 | 1187 | |
c4c81601 | 1188 | for (insn = f; insn != 0; insn = NEXT_INSN (insn)) |
2c3c49de | 1189 | if (INSN_P (insn)) |
c4c81601 | 1190 | note_stores (PATTERN (insn), record_set_info, insn); |
7506f491 DE |
1191 | } |
1192 | \f | |
1193 | /* Hash table support. */ | |
1194 | ||
80c29cc4 RZ |
1195 | struct reg_avail_info |
1196 | { | |
e0082a72 | 1197 | basic_block last_bb; |
80c29cc4 RZ |
1198 | int first_set; |
1199 | int last_set; | |
1200 | }; | |
1201 | ||
1202 | static struct reg_avail_info *reg_avail_info; | |
e0082a72 | 1203 | static basic_block current_bb; |
7506f491 | 1204 | |
7506f491 | 1205 | |
fb0c0a12 RK |
1206 | /* See whether X, the source of a set, is something we want to consider for |
1207 | GCSE. */ | |
7506f491 DE |
1208 | |
1209 | static int | |
1d088dee | 1210 | want_to_gcse_p (rtx x) |
7506f491 | 1211 | { |
c4c81601 | 1212 | switch (GET_CODE (x)) |
7506f491 DE |
1213 | { |
1214 | case REG: | |
1215 | case SUBREG: | |
1216 | case CONST_INT: | |
1217 | case CONST_DOUBLE: | |
69ef87e2 | 1218 | case CONST_VECTOR: |
7506f491 DE |
1219 | case CALL: |
1220 | return 0; | |
1221 | ||
1222 | default: | |
1707bafa | 1223 | return can_assign_to_reg_p (x); |
7506f491 | 1224 | } |
1707bafa RS |
1225 | } |
1226 | ||
1227 | /* Used internally by can_assign_to_reg_p. */ | |
1228 | ||
1229 | static GTY(()) rtx test_insn; | |
1230 | ||
1231 | /* Return true if we can assign X to a pseudo register. */ | |
1232 | ||
1233 | static bool | |
1234 | can_assign_to_reg_p (rtx x) | |
1235 | { | |
1236 | int num_clobbers = 0; | |
1237 | int icode; | |
7506f491 | 1238 | |
fb0c0a12 RK |
1239 | /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */ |
1240 | if (general_operand (x, GET_MODE (x))) | |
1241 | return 1; | |
1242 | else if (GET_MODE (x) == VOIDmode) | |
1243 | return 0; | |
1244 | ||
1245 | /* Otherwise, check if we can make a valid insn from it. First initialize | |
1246 | our test insn if we haven't already. */ | |
1247 | if (test_insn == 0) | |
1248 | { | |
1249 | test_insn | |
1250 | = make_insn_raw (gen_rtx_SET (VOIDmode, | |
1251 | gen_rtx_REG (word_mode, | |
1252 | FIRST_PSEUDO_REGISTER * 2), | |
1253 | const0_rtx)); | |
1254 | NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0; | |
fb0c0a12 RK |
1255 | } |
1256 | ||
1257 | /* Now make an insn like the one we would make when GCSE'ing and see if | |
1258 | valid. */ | |
1259 | PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x)); | |
1260 | SET_SRC (PATTERN (test_insn)) = x; | |
1261 | return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0 | |
1262 | && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode))); | |
7506f491 DE |
1263 | } |
1264 | ||
cc2902df | 1265 | /* Return nonzero if the operands of expression X are unchanged from the |
7506f491 DE |
1266 | start of INSN's basic block up to but not including INSN (if AVAIL_P == 0), |
1267 | or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */ | |
1268 | ||
1269 | static int | |
1d088dee | 1270 | oprs_unchanged_p (rtx x, rtx insn, int avail_p) |
7506f491 | 1271 | { |
c4c81601 | 1272 | int i, j; |
7506f491 | 1273 | enum rtx_code code; |
6f7d635c | 1274 | const char *fmt; |
7506f491 | 1275 | |
7506f491 DE |
1276 | if (x == 0) |
1277 | return 1; | |
1278 | ||
1279 | code = GET_CODE (x); | |
1280 | switch (code) | |
1281 | { | |
1282 | case REG: | |
80c29cc4 RZ |
1283 | { |
1284 | struct reg_avail_info *info = ®_avail_info[REGNO (x)]; | |
1285 | ||
1286 | if (info->last_bb != current_bb) | |
1287 | return 1; | |
589005ff | 1288 | if (avail_p) |
80c29cc4 RZ |
1289 | return info->last_set < INSN_CUID (insn); |
1290 | else | |
1291 | return info->first_set >= INSN_CUID (insn); | |
1292 | } | |
7506f491 DE |
1293 | |
1294 | case MEM: | |
e0082a72 | 1295 | if (load_killed_in_block_p (current_bb, INSN_CUID (insn), |
a13d4ebf AM |
1296 | x, avail_p)) |
1297 | return 0; | |
7506f491 | 1298 | else |
c4c81601 | 1299 | return oprs_unchanged_p (XEXP (x, 0), insn, avail_p); |
7506f491 DE |
1300 | |
1301 | case PRE_DEC: | |
1302 | case PRE_INC: | |
1303 | case POST_DEC: | |
1304 | case POST_INC: | |
4b983fdc RH |
1305 | case PRE_MODIFY: |
1306 | case POST_MODIFY: | |
7506f491 DE |
1307 | return 0; |
1308 | ||
1309 | case PC: | |
1310 | case CC0: /*FIXME*/ | |
1311 | case CONST: | |
1312 | case CONST_INT: | |
1313 | case CONST_DOUBLE: | |
69ef87e2 | 1314 | case CONST_VECTOR: |
7506f491 DE |
1315 | case SYMBOL_REF: |
1316 | case LABEL_REF: | |
1317 | case ADDR_VEC: | |
1318 | case ADDR_DIFF_VEC: | |
1319 | return 1; | |
1320 | ||
1321 | default: | |
1322 | break; | |
1323 | } | |
1324 | ||
c4c81601 | 1325 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
1326 | { |
1327 | if (fmt[i] == 'e') | |
1328 | { | |
c4c81601 RK |
1329 | /* If we are about to do the last recursive call needed at this |
1330 | level, change it into iteration. This function is called enough | |
1331 | to be worth it. */ | |
7506f491 | 1332 | if (i == 0) |
c4c81601 RK |
1333 | return oprs_unchanged_p (XEXP (x, i), insn, avail_p); |
1334 | ||
1335 | else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p)) | |
7506f491 DE |
1336 | return 0; |
1337 | } | |
1338 | else if (fmt[i] == 'E') | |
c4c81601 RK |
1339 | for (j = 0; j < XVECLEN (x, i); j++) |
1340 | if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p)) | |
1341 | return 0; | |
7506f491 DE |
1342 | } |
1343 | ||
1344 | return 1; | |
1345 | } | |
1346 | ||
a13d4ebf AM |
1347 | /* Used for communication between mems_conflict_for_gcse_p and |
1348 | load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a | |
1349 | conflict between two memory references. */ | |
1350 | static int gcse_mems_conflict_p; | |
1351 | ||
1352 | /* Used for communication between mems_conflict_for_gcse_p and | |
1353 | load_killed_in_block_p. A memory reference for a load instruction, | |
1354 | mems_conflict_for_gcse_p will see if a memory store conflicts with | |
1355 | this memory load. */ | |
1356 | static rtx gcse_mem_operand; | |
1357 | ||
1358 | /* DEST is the output of an instruction. If it is a memory reference, and | |
1359 | possibly conflicts with the load found in gcse_mem_operand, then set | |
1360 | gcse_mems_conflict_p to a nonzero value. */ | |
1361 | ||
1362 | static void | |
1d088dee AJ |
1363 | mems_conflict_for_gcse_p (rtx dest, rtx setter ATTRIBUTE_UNUSED, |
1364 | void *data ATTRIBUTE_UNUSED) | |
a13d4ebf AM |
1365 | { |
1366 | while (GET_CODE (dest) == SUBREG | |
1367 | || GET_CODE (dest) == ZERO_EXTRACT | |
1368 | || GET_CODE (dest) == SIGN_EXTRACT | |
1369 | || GET_CODE (dest) == STRICT_LOW_PART) | |
1370 | dest = XEXP (dest, 0); | |
1371 | ||
1372 | /* If DEST is not a MEM, then it will not conflict with the load. Note | |
1373 | that function calls are assumed to clobber memory, but are handled | |
1374 | elsewhere. */ | |
7b1b4aed | 1375 | if (! MEM_P (dest)) |
a13d4ebf | 1376 | return; |
aaa4ca30 | 1377 | |
a13d4ebf | 1378 | /* If we are setting a MEM in our list of specially recognized MEMs, |
589005ff KH |
1379 | don't mark as killed this time. */ |
1380 | ||
47a3dae1 | 1381 | if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL) |
a13d4ebf AM |
1382 | { |
1383 | if (!find_rtx_in_ldst (dest)) | |
1384 | gcse_mems_conflict_p = 1; | |
1385 | return; | |
1386 | } | |
aaa4ca30 | 1387 | |
a13d4ebf AM |
1388 | if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand, |
1389 | rtx_addr_varies_p)) | |
1390 | gcse_mems_conflict_p = 1; | |
1391 | } | |
1392 | ||
1393 | /* Return nonzero if the expression in X (a memory reference) is killed | |
1394 | in block BB before or after the insn with the CUID in UID_LIMIT. | |
1395 | AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills | |
1396 | before UID_LIMIT. | |
1397 | ||
1398 | To check the entire block, set UID_LIMIT to max_uid + 1 and | |
1399 | AVAIL_P to 0. */ | |
1400 | ||
1401 | static int | |
1d088dee | 1402 | load_killed_in_block_p (basic_block bb, int uid_limit, rtx x, int avail_p) |
a13d4ebf | 1403 | { |
0b17ab2f | 1404 | rtx list_entry = modify_mem_list[bb->index]; |
a13d4ebf AM |
1405 | while (list_entry) |
1406 | { | |
1407 | rtx setter; | |
1408 | /* Ignore entries in the list that do not apply. */ | |
1409 | if ((avail_p | |
1410 | && INSN_CUID (XEXP (list_entry, 0)) < uid_limit) | |
1411 | || (! avail_p | |
1412 | && INSN_CUID (XEXP (list_entry, 0)) > uid_limit)) | |
1413 | { | |
1414 | list_entry = XEXP (list_entry, 1); | |
1415 | continue; | |
1416 | } | |
1417 | ||
1418 | setter = XEXP (list_entry, 0); | |
1419 | ||
1420 | /* If SETTER is a call everything is clobbered. Note that calls | |
1421 | to pure functions are never put on the list, so we need not | |
1422 | worry about them. */ | |
7b1b4aed | 1423 | if (CALL_P (setter)) |
a13d4ebf AM |
1424 | return 1; |
1425 | ||
1426 | /* SETTER must be an INSN of some kind that sets memory. Call | |
589005ff | 1427 | note_stores to examine each hunk of memory that is modified. |
a13d4ebf AM |
1428 | |
1429 | The note_stores interface is pretty limited, so we have to | |
1430 | communicate via global variables. Yuk. */ | |
1431 | gcse_mem_operand = x; | |
1432 | gcse_mems_conflict_p = 0; | |
1433 | note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL); | |
1434 | if (gcse_mems_conflict_p) | |
1435 | return 1; | |
1436 | list_entry = XEXP (list_entry, 1); | |
1437 | } | |
1438 | return 0; | |
1439 | } | |
1440 | ||
cc2902df | 1441 | /* Return nonzero if the operands of expression X are unchanged from |
7506f491 DE |
1442 | the start of INSN's basic block up to but not including INSN. */ |
1443 | ||
1444 | static int | |
1d088dee | 1445 | oprs_anticipatable_p (rtx x, rtx insn) |
7506f491 DE |
1446 | { |
1447 | return oprs_unchanged_p (x, insn, 0); | |
1448 | } | |
1449 | ||
cc2902df | 1450 | /* Return nonzero if the operands of expression X are unchanged from |
7506f491 DE |
1451 | INSN to the end of INSN's basic block. */ |
1452 | ||
1453 | static int | |
1d088dee | 1454 | oprs_available_p (rtx x, rtx insn) |
7506f491 DE |
1455 | { |
1456 | return oprs_unchanged_p (x, insn, 1); | |
1457 | } | |
1458 | ||
1459 | /* Hash expression X. | |
c4c81601 RK |
1460 | |
1461 | MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean | |
1462 | indicating if a volatile operand is found or if the expression contains | |
b58b21d5 | 1463 | something we don't want to insert in the table. HASH_TABLE_SIZE is |
0516f6fe | 1464 | the current size of the hash table to be probed. */ |
7506f491 DE |
1465 | |
1466 | static unsigned int | |
b58b21d5 RS |
1467 | hash_expr (rtx x, enum machine_mode mode, int *do_not_record_p, |
1468 | int hash_table_size) | |
7506f491 DE |
1469 | { |
1470 | unsigned int hash; | |
1471 | ||
1472 | *do_not_record_p = 0; | |
1473 | ||
0516f6fe SB |
1474 | hash = hash_rtx (x, mode, do_not_record_p, |
1475 | NULL, /*have_reg_qty=*/false); | |
7506f491 DE |
1476 | return hash % hash_table_size; |
1477 | } | |
172890a2 | 1478 | |
7506f491 DE |
1479 | /* Hash a set of register REGNO. |
1480 | ||
c4c81601 RK |
1481 | Sets are hashed on the register that is set. This simplifies the PRE copy |
1482 | propagation code. | |
7506f491 DE |
1483 | |
1484 | ??? May need to make things more elaborate. Later, as necessary. */ | |
1485 | ||
1486 | static unsigned int | |
1d088dee | 1487 | hash_set (int regno, int hash_table_size) |
7506f491 DE |
1488 | { |
1489 | unsigned int hash; | |
1490 | ||
1491 | hash = regno; | |
1492 | return hash % hash_table_size; | |
1493 | } | |
1494 | ||
0516f6fe | 1495 | /* Return nonzero if exp1 is equivalent to exp2. */ |
7506f491 DE |
1496 | |
1497 | static int | |
1d088dee | 1498 | expr_equiv_p (rtx x, rtx y) |
7506f491 | 1499 | { |
0516f6fe | 1500 | return exp_equiv_p (x, y, 0, true); |
7506f491 DE |
1501 | } |
1502 | ||
02280659 | 1503 | /* Insert expression X in INSN in the hash TABLE. |
7506f491 DE |
1504 | If it is already present, record it as the last occurrence in INSN's |
1505 | basic block. | |
1506 | ||
1507 | MODE is the mode of the value X is being stored into. | |
1508 | It is only used if X is a CONST_INT. | |
1509 | ||
cc2902df KH |
1510 | ANTIC_P is nonzero if X is an anticipatable expression. |
1511 | AVAIL_P is nonzero if X is an available expression. */ | |
7506f491 DE |
1512 | |
1513 | static void | |
1d088dee AJ |
1514 | insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p, |
1515 | int avail_p, struct hash_table *table) | |
7506f491 DE |
1516 | { |
1517 | int found, do_not_record_p; | |
1518 | unsigned int hash; | |
1519 | struct expr *cur_expr, *last_expr = NULL; | |
1520 | struct occr *antic_occr, *avail_occr; | |
1521 | struct occr *last_occr = NULL; | |
1522 | ||
02280659 | 1523 | hash = hash_expr (x, mode, &do_not_record_p, table->size); |
7506f491 DE |
1524 | |
1525 | /* Do not insert expression in table if it contains volatile operands, | |
1526 | or if hash_expr determines the expression is something we don't want | |
1527 | to or can't handle. */ | |
1528 | if (do_not_record_p) | |
1529 | return; | |
1530 | ||
02280659 | 1531 | cur_expr = table->table[hash]; |
7506f491 DE |
1532 | found = 0; |
1533 | ||
c4c81601 | 1534 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
7506f491 DE |
1535 | { |
1536 | /* If the expression isn't found, save a pointer to the end of | |
1537 | the list. */ | |
1538 | last_expr = cur_expr; | |
1539 | cur_expr = cur_expr->next_same_hash; | |
1540 | } | |
1541 | ||
1542 | if (! found) | |
1543 | { | |
703ad42b | 1544 | cur_expr = gcse_alloc (sizeof (struct expr)); |
7506f491 | 1545 | bytes_used += sizeof (struct expr); |
02280659 | 1546 | if (table->table[hash] == NULL) |
c4c81601 | 1547 | /* This is the first pattern that hashed to this index. */ |
02280659 | 1548 | table->table[hash] = cur_expr; |
7506f491 | 1549 | else |
c4c81601 RK |
1550 | /* Add EXPR to end of this hash chain. */ |
1551 | last_expr->next_same_hash = cur_expr; | |
1552 | ||
589005ff | 1553 | /* Set the fields of the expr element. */ |
7506f491 | 1554 | cur_expr->expr = x; |
02280659 | 1555 | cur_expr->bitmap_index = table->n_elems++; |
7506f491 DE |
1556 | cur_expr->next_same_hash = NULL; |
1557 | cur_expr->antic_occr = NULL; | |
1558 | cur_expr->avail_occr = NULL; | |
1559 | } | |
1560 | ||
1561 | /* Now record the occurrence(s). */ | |
7506f491 DE |
1562 | if (antic_p) |
1563 | { | |
1564 | antic_occr = cur_expr->antic_occr; | |
1565 | ||
1566 | /* Search for another occurrence in the same basic block. */ | |
1567 | while (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn)) | |
1568 | { | |
1569 | /* If an occurrence isn't found, save a pointer to the end of | |
1570 | the list. */ | |
1571 | last_occr = antic_occr; | |
1572 | antic_occr = antic_occr->next; | |
1573 | } | |
1574 | ||
1575 | if (antic_occr) | |
c4c81601 RK |
1576 | /* Found another instance of the expression in the same basic block. |
1577 | Prefer the currently recorded one. We want the first one in the | |
1578 | block and the block is scanned from start to end. */ | |
1579 | ; /* nothing to do */ | |
7506f491 DE |
1580 | else |
1581 | { | |
1582 | /* First occurrence of this expression in this basic block. */ | |
703ad42b | 1583 | antic_occr = gcse_alloc (sizeof (struct occr)); |
7506f491 DE |
1584 | bytes_used += sizeof (struct occr); |
1585 | /* First occurrence of this expression in any block? */ | |
1586 | if (cur_expr->antic_occr == NULL) | |
1587 | cur_expr->antic_occr = antic_occr; | |
1588 | else | |
1589 | last_occr->next = antic_occr; | |
c4c81601 | 1590 | |
7506f491 DE |
1591 | antic_occr->insn = insn; |
1592 | antic_occr->next = NULL; | |
f9957958 | 1593 | antic_occr->deleted_p = 0; |
7506f491 DE |
1594 | } |
1595 | } | |
1596 | ||
1597 | if (avail_p) | |
1598 | { | |
1599 | avail_occr = cur_expr->avail_occr; | |
1600 | ||
1601 | /* Search for another occurrence in the same basic block. */ | |
1602 | while (avail_occr && BLOCK_NUM (avail_occr->insn) != BLOCK_NUM (insn)) | |
1603 | { | |
1604 | /* If an occurrence isn't found, save a pointer to the end of | |
1605 | the list. */ | |
1606 | last_occr = avail_occr; | |
1607 | avail_occr = avail_occr->next; | |
1608 | } | |
1609 | ||
1610 | if (avail_occr) | |
c4c81601 RK |
1611 | /* Found another instance of the expression in the same basic block. |
1612 | Prefer this occurrence to the currently recorded one. We want | |
1613 | the last one in the block and the block is scanned from start | |
1614 | to end. */ | |
1615 | avail_occr->insn = insn; | |
7506f491 DE |
1616 | else |
1617 | { | |
1618 | /* First occurrence of this expression in this basic block. */ | |
703ad42b | 1619 | avail_occr = gcse_alloc (sizeof (struct occr)); |
7506f491 | 1620 | bytes_used += sizeof (struct occr); |
c4c81601 | 1621 | |
7506f491 DE |
1622 | /* First occurrence of this expression in any block? */ |
1623 | if (cur_expr->avail_occr == NULL) | |
1624 | cur_expr->avail_occr = avail_occr; | |
1625 | else | |
1626 | last_occr->next = avail_occr; | |
c4c81601 | 1627 | |
7506f491 DE |
1628 | avail_occr->insn = insn; |
1629 | avail_occr->next = NULL; | |
f9957958 | 1630 | avail_occr->deleted_p = 0; |
7506f491 DE |
1631 | } |
1632 | } | |
1633 | } | |
1634 | ||
1635 | /* Insert pattern X in INSN in the hash table. | |
1636 | X is a SET of a reg to either another reg or a constant. | |
1637 | If it is already present, record it as the last occurrence in INSN's | |
1638 | basic block. */ | |
1639 | ||
1640 | static void | |
1d088dee | 1641 | insert_set_in_table (rtx x, rtx insn, struct hash_table *table) |
7506f491 DE |
1642 | { |
1643 | int found; | |
1644 | unsigned int hash; | |
1645 | struct expr *cur_expr, *last_expr = NULL; | |
1646 | struct occr *cur_occr, *last_occr = NULL; | |
1647 | ||
282899df | 1648 | gcc_assert (GET_CODE (x) == SET && REG_P (SET_DEST (x))); |
7506f491 | 1649 | |
02280659 | 1650 | hash = hash_set (REGNO (SET_DEST (x)), table->size); |
7506f491 | 1651 | |
02280659 | 1652 | cur_expr = table->table[hash]; |
7506f491 DE |
1653 | found = 0; |
1654 | ||
c4c81601 | 1655 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
7506f491 DE |
1656 | { |
1657 | /* If the expression isn't found, save a pointer to the end of | |
1658 | the list. */ | |
1659 | last_expr = cur_expr; | |
1660 | cur_expr = cur_expr->next_same_hash; | |
1661 | } | |
1662 | ||
1663 | if (! found) | |
1664 | { | |
703ad42b | 1665 | cur_expr = gcse_alloc (sizeof (struct expr)); |
7506f491 | 1666 | bytes_used += sizeof (struct expr); |
02280659 | 1667 | if (table->table[hash] == NULL) |
c4c81601 | 1668 | /* This is the first pattern that hashed to this index. */ |
02280659 | 1669 | table->table[hash] = cur_expr; |
7506f491 | 1670 | else |
c4c81601 RK |
1671 | /* Add EXPR to end of this hash chain. */ |
1672 | last_expr->next_same_hash = cur_expr; | |
1673 | ||
7506f491 DE |
1674 | /* Set the fields of the expr element. |
1675 | We must copy X because it can be modified when copy propagation is | |
1676 | performed on its operands. */ | |
7506f491 | 1677 | cur_expr->expr = copy_rtx (x); |
02280659 | 1678 | cur_expr->bitmap_index = table->n_elems++; |
7506f491 DE |
1679 | cur_expr->next_same_hash = NULL; |
1680 | cur_expr->antic_occr = NULL; | |
1681 | cur_expr->avail_occr = NULL; | |
1682 | } | |
1683 | ||
1684 | /* Now record the occurrence. */ | |
7506f491 DE |
1685 | cur_occr = cur_expr->avail_occr; |
1686 | ||
1687 | /* Search for another occurrence in the same basic block. */ | |
1688 | while (cur_occr && BLOCK_NUM (cur_occr->insn) != BLOCK_NUM (insn)) | |
1689 | { | |
1690 | /* If an occurrence isn't found, save a pointer to the end of | |
1691 | the list. */ | |
1692 | last_occr = cur_occr; | |
1693 | cur_occr = cur_occr->next; | |
1694 | } | |
1695 | ||
1696 | if (cur_occr) | |
c4c81601 RK |
1697 | /* Found another instance of the expression in the same basic block. |
1698 | Prefer this occurrence to the currently recorded one. We want the | |
1699 | last one in the block and the block is scanned from start to end. */ | |
1700 | cur_occr->insn = insn; | |
7506f491 DE |
1701 | else |
1702 | { | |
1703 | /* First occurrence of this expression in this basic block. */ | |
703ad42b | 1704 | cur_occr = gcse_alloc (sizeof (struct occr)); |
7506f491 | 1705 | bytes_used += sizeof (struct occr); |
c4c81601 | 1706 | |
7506f491 DE |
1707 | /* First occurrence of this expression in any block? */ |
1708 | if (cur_expr->avail_occr == NULL) | |
1709 | cur_expr->avail_occr = cur_occr; | |
1710 | else | |
1711 | last_occr->next = cur_occr; | |
c4c81601 | 1712 | |
7506f491 DE |
1713 | cur_occr->insn = insn; |
1714 | cur_occr->next = NULL; | |
f9957958 | 1715 | cur_occr->deleted_p = 0; |
7506f491 DE |
1716 | } |
1717 | } | |
1718 | ||
6b2d1c9e RS |
1719 | /* Determine whether the rtx X should be treated as a constant for |
1720 | the purposes of GCSE's constant propagation. */ | |
1721 | ||
1722 | static bool | |
1d088dee | 1723 | gcse_constant_p (rtx x) |
6b2d1c9e RS |
1724 | { |
1725 | /* Consider a COMPARE of two integers constant. */ | |
1726 | if (GET_CODE (x) == COMPARE | |
1727 | && GET_CODE (XEXP (x, 0)) == CONST_INT | |
1728 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1729 | return true; | |
1730 | ||
db2f435b | 1731 | /* Consider a COMPARE of the same registers is a constant |
7b1b4aed | 1732 | if they are not floating point registers. */ |
db2f435b | 1733 | if (GET_CODE(x) == COMPARE |
7b1b4aed | 1734 | && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)) |
db2f435b AP |
1735 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1)) |
1736 | && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0))) | |
1737 | && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1)))) | |
1738 | return true; | |
1739 | ||
6b2d1c9e RS |
1740 | return CONSTANT_P (x); |
1741 | } | |
1742 | ||
02280659 ZD |
1743 | /* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or |
1744 | expression one). */ | |
7506f491 DE |
1745 | |
1746 | static void | |
1d088dee | 1747 | hash_scan_set (rtx pat, rtx insn, struct hash_table *table) |
7506f491 DE |
1748 | { |
1749 | rtx src = SET_SRC (pat); | |
1750 | rtx dest = SET_DEST (pat); | |
172890a2 | 1751 | rtx note; |
7506f491 | 1752 | |
6e72d1e9 | 1753 | if (GET_CODE (src) == CALL) |
02280659 | 1754 | hash_scan_call (src, insn, table); |
7506f491 | 1755 | |
7b1b4aed | 1756 | else if (REG_P (dest)) |
7506f491 | 1757 | { |
172890a2 | 1758 | unsigned int regno = REGNO (dest); |
7506f491 DE |
1759 | rtx tmp; |
1760 | ||
172890a2 RK |
1761 | /* If this is a single set and we are doing constant propagation, |
1762 | see if a REG_NOTE shows this equivalent to a constant. */ | |
02280659 | 1763 | if (table->set_p && (note = find_reg_equal_equiv_note (insn)) != 0 |
6b2d1c9e | 1764 | && gcse_constant_p (XEXP (note, 0))) |
172890a2 RK |
1765 | src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src); |
1766 | ||
7506f491 | 1767 | /* Only record sets of pseudo-regs in the hash table. */ |
02280659 | 1768 | if (! table->set_p |
7506f491 DE |
1769 | && regno >= FIRST_PSEUDO_REGISTER |
1770 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
773eae39 | 1771 | && can_copy_p (GET_MODE (dest)) |
068473ec JH |
1772 | /* GCSE commonly inserts instruction after the insn. We can't |
1773 | do that easily for EH_REGION notes so disable GCSE on these | |
1774 | for now. */ | |
1775 | && !find_reg_note (insn, REG_EH_REGION, NULL_RTX) | |
7506f491 | 1776 | /* Is SET_SRC something we want to gcse? */ |
172890a2 RK |
1777 | && want_to_gcse_p (src) |
1778 | /* Don't CSE a nop. */ | |
43e72072 JJ |
1779 | && ! set_noop_p (pat) |
1780 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1781 | At this point this only function parameters should have | |
1782 | REG_EQUIV notes and if the argument slot is used somewhere | |
a1f300c0 | 1783 | explicitly, it means address of parameter has been taken, |
43e72072 JJ |
1784 | so we should not extend the lifetime of the pseudo. */ |
1785 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
7b1b4aed | 1786 | || ! MEM_P (XEXP (note, 0)))) |
7506f491 DE |
1787 | { |
1788 | /* An expression is not anticipatable if its operands are | |
52d76e11 RK |
1789 | modified before this insn or if this is not the only SET in |
1790 | this insn. */ | |
1791 | int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn); | |
7506f491 | 1792 | /* An expression is not available if its operands are |
eb296bd9 GK |
1793 | subsequently modified, including this insn. It's also not |
1794 | available if this is a branch, because we can't insert | |
1795 | a set after the branch. */ | |
1796 | int avail_p = (oprs_available_p (src, insn) | |
1797 | && ! JUMP_P (insn)); | |
c4c81601 | 1798 | |
02280659 | 1799 | insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table); |
7506f491 | 1800 | } |
c4c81601 | 1801 | |
7506f491 | 1802 | /* Record sets for constant/copy propagation. */ |
02280659 | 1803 | else if (table->set_p |
7506f491 | 1804 | && regno >= FIRST_PSEUDO_REGISTER |
7b1b4aed | 1805 | && ((REG_P (src) |
7506f491 | 1806 | && REGNO (src) >= FIRST_PSEUDO_REGISTER |
773eae39 | 1807 | && can_copy_p (GET_MODE (dest)) |
172890a2 | 1808 | && REGNO (src) != regno) |
6b2d1c9e | 1809 | || gcse_constant_p (src)) |
7506f491 DE |
1810 | /* A copy is not available if its src or dest is subsequently |
1811 | modified. Here we want to search from INSN+1 on, but | |
1812 | oprs_available_p searches from INSN on. */ | |
a813c111 | 1813 | && (insn == BB_END (BLOCK_FOR_INSN (insn)) |
7506f491 DE |
1814 | || ((tmp = next_nonnote_insn (insn)) != NULL_RTX |
1815 | && oprs_available_p (pat, tmp)))) | |
02280659 | 1816 | insert_set_in_table (pat, insn, table); |
7506f491 | 1817 | } |
d91edf86 | 1818 | /* In case of store we want to consider the memory value as available in |
f5f2e3cd MH |
1819 | the REG stored in that memory. This makes it possible to remove |
1820 | redundant loads from due to stores to the same location. */ | |
7b1b4aed | 1821 | else if (flag_gcse_las && REG_P (src) && MEM_P (dest)) |
f5f2e3cd MH |
1822 | { |
1823 | unsigned int regno = REGNO (src); | |
1824 | ||
1825 | /* Do not do this for constant/copy propagation. */ | |
1826 | if (! table->set_p | |
1827 | /* Only record sets of pseudo-regs in the hash table. */ | |
1828 | && regno >= FIRST_PSEUDO_REGISTER | |
1829 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
1830 | && can_copy_p (GET_MODE (src)) | |
1831 | /* GCSE commonly inserts instruction after the insn. We can't | |
1832 | do that easily for EH_REGION notes so disable GCSE on these | |
1833 | for now. */ | |
1834 | && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX) | |
1835 | /* Is SET_DEST something we want to gcse? */ | |
1836 | && want_to_gcse_p (dest) | |
1837 | /* Don't CSE a nop. */ | |
1838 | && ! set_noop_p (pat) | |
1839 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1840 | At this point this only function parameters should have | |
1841 | REG_EQUIV notes and if the argument slot is used somewhere | |
1842 | explicitly, it means address of parameter has been taken, | |
1843 | so we should not extend the lifetime of the pseudo. */ | |
1844 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
7b1b4aed | 1845 | || ! MEM_P (XEXP (note, 0)))) |
f5f2e3cd MH |
1846 | { |
1847 | /* Stores are never anticipatable. */ | |
1848 | int antic_p = 0; | |
1849 | /* An expression is not available if its operands are | |
1850 | subsequently modified, including this insn. It's also not | |
1851 | available if this is a branch, because we can't insert | |
1852 | a set after the branch. */ | |
1853 | int avail_p = oprs_available_p (dest, insn) | |
1854 | && ! JUMP_P (insn); | |
1855 | ||
1856 | /* Record the memory expression (DEST) in the hash table. */ | |
1857 | insert_expr_in_table (dest, GET_MODE (dest), insn, | |
1858 | antic_p, avail_p, table); | |
1859 | } | |
1860 | } | |
7506f491 DE |
1861 | } |
1862 | ||
1863 | static void | |
1d088dee AJ |
1864 | hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED, |
1865 | struct hash_table *table ATTRIBUTE_UNUSED) | |
7506f491 DE |
1866 | { |
1867 | /* Currently nothing to do. */ | |
1868 | } | |
1869 | ||
1870 | static void | |
1d088dee AJ |
1871 | hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED, |
1872 | struct hash_table *table ATTRIBUTE_UNUSED) | |
7506f491 DE |
1873 | { |
1874 | /* Currently nothing to do. */ | |
1875 | } | |
1876 | ||
1877 | /* Process INSN and add hash table entries as appropriate. | |
1878 | ||
1879 | Only available expressions that set a single pseudo-reg are recorded. | |
1880 | ||
1881 | Single sets in a PARALLEL could be handled, but it's an extra complication | |
1882 | that isn't dealt with right now. The trick is handling the CLOBBERs that | |
1883 | are also in the PARALLEL. Later. | |
1884 | ||
cc2902df | 1885 | If SET_P is nonzero, this is for the assignment hash table, |
ed79bb3d R |
1886 | otherwise it is for the expression hash table. |
1887 | If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should | |
1888 | not record any expressions. */ | |
7506f491 DE |
1889 | |
1890 | static void | |
1d088dee | 1891 | hash_scan_insn (rtx insn, struct hash_table *table, int in_libcall_block) |
7506f491 DE |
1892 | { |
1893 | rtx pat = PATTERN (insn); | |
c4c81601 | 1894 | int i; |
7506f491 | 1895 | |
172890a2 RK |
1896 | if (in_libcall_block) |
1897 | return; | |
1898 | ||
7506f491 DE |
1899 | /* Pick out the sets of INSN and for other forms of instructions record |
1900 | what's been modified. */ | |
1901 | ||
172890a2 | 1902 | if (GET_CODE (pat) == SET) |
02280659 | 1903 | hash_scan_set (pat, insn, table); |
7506f491 | 1904 | else if (GET_CODE (pat) == PARALLEL) |
c4c81601 RK |
1905 | for (i = 0; i < XVECLEN (pat, 0); i++) |
1906 | { | |
1907 | rtx x = XVECEXP (pat, 0, i); | |
7506f491 | 1908 | |
c4c81601 | 1909 | if (GET_CODE (x) == SET) |
02280659 | 1910 | hash_scan_set (x, insn, table); |
c4c81601 | 1911 | else if (GET_CODE (x) == CLOBBER) |
02280659 | 1912 | hash_scan_clobber (x, insn, table); |
6e72d1e9 | 1913 | else if (GET_CODE (x) == CALL) |
02280659 | 1914 | hash_scan_call (x, insn, table); |
c4c81601 | 1915 | } |
7506f491 | 1916 | |
7506f491 | 1917 | else if (GET_CODE (pat) == CLOBBER) |
02280659 | 1918 | hash_scan_clobber (pat, insn, table); |
6e72d1e9 | 1919 | else if (GET_CODE (pat) == CALL) |
02280659 | 1920 | hash_scan_call (pat, insn, table); |
7506f491 DE |
1921 | } |
1922 | ||
1923 | static void | |
1d088dee | 1924 | dump_hash_table (FILE *file, const char *name, struct hash_table *table) |
7506f491 DE |
1925 | { |
1926 | int i; | |
1927 | /* Flattened out table, so it's printed in proper order. */ | |
4da896b2 MM |
1928 | struct expr **flat_table; |
1929 | unsigned int *hash_val; | |
c4c81601 | 1930 | struct expr *expr; |
4da896b2 | 1931 | |
703ad42b KG |
1932 | flat_table = xcalloc (table->n_elems, sizeof (struct expr *)); |
1933 | hash_val = xmalloc (table->n_elems * sizeof (unsigned int)); | |
7506f491 | 1934 | |
02280659 ZD |
1935 | for (i = 0; i < (int) table->size; i++) |
1936 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 RK |
1937 | { |
1938 | flat_table[expr->bitmap_index] = expr; | |
1939 | hash_val[expr->bitmap_index] = i; | |
1940 | } | |
7506f491 DE |
1941 | |
1942 | fprintf (file, "%s hash table (%d buckets, %d entries)\n", | |
02280659 | 1943 | name, table->size, table->n_elems); |
7506f491 | 1944 | |
02280659 | 1945 | for (i = 0; i < (int) table->n_elems; i++) |
21318741 RK |
1946 | if (flat_table[i] != 0) |
1947 | { | |
a0ac9e5a | 1948 | expr = flat_table[i]; |
21318741 RK |
1949 | fprintf (file, "Index %d (hash value %d)\n ", |
1950 | expr->bitmap_index, hash_val[i]); | |
a0ac9e5a | 1951 | print_rtl (file, expr->expr); |
21318741 RK |
1952 | fprintf (file, "\n"); |
1953 | } | |
7506f491 DE |
1954 | |
1955 | fprintf (file, "\n"); | |
4da896b2 | 1956 | |
4da896b2 MM |
1957 | free (flat_table); |
1958 | free (hash_val); | |
7506f491 DE |
1959 | } |
1960 | ||
1961 | /* Record register first/last/block set information for REGNO in INSN. | |
c4c81601 | 1962 | |
80c29cc4 | 1963 | first_set records the first place in the block where the register |
7506f491 | 1964 | is set and is used to compute "anticipatability". |
c4c81601 | 1965 | |
80c29cc4 | 1966 | last_set records the last place in the block where the register |
7506f491 | 1967 | is set and is used to compute "availability". |
c4c81601 | 1968 | |
80c29cc4 RZ |
1969 | last_bb records the block for which first_set and last_set are |
1970 | valid, as a quick test to invalidate them. | |
1971 | ||
7506f491 DE |
1972 | reg_set_in_block records whether the register is set in the block |
1973 | and is used to compute "transparency". */ | |
1974 | ||
1975 | static void | |
1d088dee | 1976 | record_last_reg_set_info (rtx insn, int regno) |
7506f491 | 1977 | { |
80c29cc4 RZ |
1978 | struct reg_avail_info *info = ®_avail_info[regno]; |
1979 | int cuid = INSN_CUID (insn); | |
c4c81601 | 1980 | |
80c29cc4 RZ |
1981 | info->last_set = cuid; |
1982 | if (info->last_bb != current_bb) | |
1983 | { | |
1984 | info->last_bb = current_bb; | |
1985 | info->first_set = cuid; | |
e0082a72 | 1986 | SET_BIT (reg_set_in_block[current_bb->index], regno); |
80c29cc4 | 1987 | } |
7506f491 DE |
1988 | } |
1989 | ||
a13d4ebf AM |
1990 | |
1991 | /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn. | |
1992 | Note we store a pair of elements in the list, so they have to be | |
1993 | taken off pairwise. */ | |
1994 | ||
589005ff | 1995 | static void |
1d088dee AJ |
1996 | canon_list_insert (rtx dest ATTRIBUTE_UNUSED, rtx unused1 ATTRIBUTE_UNUSED, |
1997 | void * v_insn) | |
a13d4ebf AM |
1998 | { |
1999 | rtx dest_addr, insn; | |
0fe854a7 | 2000 | int bb; |
a13d4ebf AM |
2001 | |
2002 | while (GET_CODE (dest) == SUBREG | |
2003 | || GET_CODE (dest) == ZERO_EXTRACT | |
2004 | || GET_CODE (dest) == SIGN_EXTRACT | |
2005 | || GET_CODE (dest) == STRICT_LOW_PART) | |
2006 | dest = XEXP (dest, 0); | |
2007 | ||
2008 | /* If DEST is not a MEM, then it will not conflict with a load. Note | |
2009 | that function calls are assumed to clobber memory, but are handled | |
2010 | elsewhere. */ | |
2011 | ||
7b1b4aed | 2012 | if (! MEM_P (dest)) |
a13d4ebf AM |
2013 | return; |
2014 | ||
2015 | dest_addr = get_addr (XEXP (dest, 0)); | |
2016 | dest_addr = canon_rtx (dest_addr); | |
589005ff | 2017 | insn = (rtx) v_insn; |
0fe854a7 | 2018 | bb = BLOCK_NUM (insn); |
a13d4ebf | 2019 | |
589005ff | 2020 | canon_modify_mem_list[bb] = |
0fe854a7 | 2021 | alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]); |
589005ff | 2022 | canon_modify_mem_list[bb] = |
0fe854a7 RH |
2023 | alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]); |
2024 | bitmap_set_bit (canon_modify_mem_list_set, bb); | |
a13d4ebf AM |
2025 | } |
2026 | ||
a13d4ebf AM |
2027 | /* Record memory modification information for INSN. We do not actually care |
2028 | about the memory location(s) that are set, or even how they are set (consider | |
2029 | a CALL_INSN). We merely need to record which insns modify memory. */ | |
7506f491 DE |
2030 | |
2031 | static void | |
1d088dee | 2032 | record_last_mem_set_info (rtx insn) |
7506f491 | 2033 | { |
0fe854a7 RH |
2034 | int bb = BLOCK_NUM (insn); |
2035 | ||
ccef9ef5 | 2036 | /* load_killed_in_block_p will handle the case of calls clobbering |
dc297297 | 2037 | everything. */ |
0fe854a7 RH |
2038 | modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]); |
2039 | bitmap_set_bit (modify_mem_list_set, bb); | |
a13d4ebf | 2040 | |
7b1b4aed | 2041 | if (CALL_P (insn)) |
a13d4ebf AM |
2042 | { |
2043 | /* Note that traversals of this loop (other than for free-ing) | |
2044 | will break after encountering a CALL_INSN. So, there's no | |
dc297297 | 2045 | need to insert a pair of items, as canon_list_insert does. */ |
589005ff KH |
2046 | canon_modify_mem_list[bb] = |
2047 | alloc_INSN_LIST (insn, canon_modify_mem_list[bb]); | |
0fe854a7 | 2048 | bitmap_set_bit (canon_modify_mem_list_set, bb); |
a13d4ebf AM |
2049 | } |
2050 | else | |
0fe854a7 | 2051 | note_stores (PATTERN (insn), canon_list_insert, (void*) insn); |
7506f491 DE |
2052 | } |
2053 | ||
7506f491 | 2054 | /* Called from compute_hash_table via note_stores to handle one |
84832317 MM |
2055 | SET or CLOBBER in an insn. DATA is really the instruction in which |
2056 | the SET is taking place. */ | |
7506f491 DE |
2057 | |
2058 | static void | |
1d088dee | 2059 | record_last_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data) |
7506f491 | 2060 | { |
84832317 MM |
2061 | rtx last_set_insn = (rtx) data; |
2062 | ||
7506f491 DE |
2063 | if (GET_CODE (dest) == SUBREG) |
2064 | dest = SUBREG_REG (dest); | |
2065 | ||
7b1b4aed | 2066 | if (REG_P (dest)) |
7506f491 | 2067 | record_last_reg_set_info (last_set_insn, REGNO (dest)); |
7b1b4aed | 2068 | else if (MEM_P (dest) |
7506f491 DE |
2069 | /* Ignore pushes, they clobber nothing. */ |
2070 | && ! push_operand (dest, GET_MODE (dest))) | |
2071 | record_last_mem_set_info (last_set_insn); | |
2072 | } | |
2073 | ||
2074 | /* Top level function to create an expression or assignment hash table. | |
2075 | ||
2076 | Expression entries are placed in the hash table if | |
2077 | - they are of the form (set (pseudo-reg) src), | |
2078 | - src is something we want to perform GCSE on, | |
2079 | - none of the operands are subsequently modified in the block | |
2080 | ||
2081 | Assignment entries are placed in the hash table if | |
2082 | - they are of the form (set (pseudo-reg) src), | |
2083 | - src is something we want to perform const/copy propagation on, | |
2084 | - none of the operands or target are subsequently modified in the block | |
c4c81601 | 2085 | |
7506f491 DE |
2086 | Currently src must be a pseudo-reg or a const_int. |
2087 | ||
02280659 | 2088 | TABLE is the table computed. */ |
7506f491 DE |
2089 | |
2090 | static void | |
1d088dee | 2091 | compute_hash_table_work (struct hash_table *table) |
7506f491 | 2092 | { |
80c29cc4 | 2093 | unsigned int i; |
7506f491 DE |
2094 | |
2095 | /* While we compute the hash table we also compute a bit array of which | |
2096 | registers are set in which blocks. | |
7506f491 DE |
2097 | ??? This isn't needed during const/copy propagation, but it's cheap to |
2098 | compute. Later. */ | |
d55bc081 | 2099 | sbitmap_vector_zero (reg_set_in_block, last_basic_block); |
7506f491 | 2100 | |
a13d4ebf | 2101 | /* re-Cache any INSN_LIST nodes we have allocated. */ |
73991d6a | 2102 | clear_modify_mem_tables (); |
7506f491 | 2103 | /* Some working arrays used to track first and last set in each block. */ |
703ad42b | 2104 | reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info)); |
80c29cc4 RZ |
2105 | |
2106 | for (i = 0; i < max_gcse_regno; ++i) | |
e0082a72 | 2107 | reg_avail_info[i].last_bb = NULL; |
7506f491 | 2108 | |
e0082a72 | 2109 | FOR_EACH_BB (current_bb) |
7506f491 DE |
2110 | { |
2111 | rtx insn; | |
770ae6cc | 2112 | unsigned int regno; |
ed79bb3d | 2113 | int in_libcall_block; |
7506f491 DE |
2114 | |
2115 | /* First pass over the instructions records information used to | |
2116 | determine when registers and memory are first and last set. | |
ccef9ef5 | 2117 | ??? hard-reg reg_set_in_block computation |
7506f491 DE |
2118 | could be moved to compute_sets since they currently don't change. */ |
2119 | ||
a813c111 SB |
2120 | for (insn = BB_HEAD (current_bb); |
2121 | insn && insn != NEXT_INSN (BB_END (current_bb)); | |
7506f491 DE |
2122 | insn = NEXT_INSN (insn)) |
2123 | { | |
2c3c49de | 2124 | if (! INSN_P (insn)) |
7506f491 DE |
2125 | continue; |
2126 | ||
7b1b4aed | 2127 | if (CALL_P (insn)) |
7506f491 | 2128 | { |
19652adf | 2129 | bool clobbers_all = false; |
589005ff | 2130 | #ifdef NON_SAVING_SETJMP |
19652adf ZW |
2131 | if (NON_SAVING_SETJMP |
2132 | && find_reg_note (insn, REG_SETJMP, NULL_RTX)) | |
2133 | clobbers_all = true; | |
2134 | #endif | |
2135 | ||
7506f491 | 2136 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
19652adf ZW |
2137 | if (clobbers_all |
2138 | || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
7506f491 | 2139 | record_last_reg_set_info (insn, regno); |
c4c81601 | 2140 | |
24a28584 | 2141 | mark_call (insn); |
7506f491 DE |
2142 | } |
2143 | ||
84832317 | 2144 | note_stores (PATTERN (insn), record_last_set_info, insn); |
7506f491 DE |
2145 | } |
2146 | ||
fbef91d8 RS |
2147 | /* Insert implicit sets in the hash table. */ |
2148 | if (table->set_p | |
2149 | && implicit_sets[current_bb->index] != NULL_RTX) | |
2150 | hash_scan_set (implicit_sets[current_bb->index], | |
a813c111 | 2151 | BB_HEAD (current_bb), table); |
fbef91d8 | 2152 | |
7506f491 DE |
2153 | /* The next pass builds the hash table. */ |
2154 | ||
a813c111 SB |
2155 | for (insn = BB_HEAD (current_bb), in_libcall_block = 0; |
2156 | insn && insn != NEXT_INSN (BB_END (current_bb)); | |
7506f491 | 2157 | insn = NEXT_INSN (insn)) |
2c3c49de | 2158 | if (INSN_P (insn)) |
c4c81601 RK |
2159 | { |
2160 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
589005ff | 2161 | in_libcall_block = 1; |
02280659 | 2162 | else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
589005ff | 2163 | in_libcall_block = 0; |
02280659 ZD |
2164 | hash_scan_insn (insn, table, in_libcall_block); |
2165 | if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
589005ff | 2166 | in_libcall_block = 0; |
8e42ace1 | 2167 | } |
7506f491 DE |
2168 | } |
2169 | ||
80c29cc4 RZ |
2170 | free (reg_avail_info); |
2171 | reg_avail_info = NULL; | |
7506f491 DE |
2172 | } |
2173 | ||
02280659 | 2174 | /* Allocate space for the set/expr hash TABLE. |
7506f491 | 2175 | N_INSNS is the number of instructions in the function. |
02280659 ZD |
2176 | It is used to determine the number of buckets to use. |
2177 | SET_P determines whether set or expression table will | |
2178 | be created. */ | |
7506f491 DE |
2179 | |
2180 | static void | |
1d088dee | 2181 | alloc_hash_table (int n_insns, struct hash_table *table, int set_p) |
7506f491 DE |
2182 | { |
2183 | int n; | |
2184 | ||
02280659 ZD |
2185 | table->size = n_insns / 4; |
2186 | if (table->size < 11) | |
2187 | table->size = 11; | |
c4c81601 | 2188 | |
7506f491 DE |
2189 | /* Attempt to maintain efficient use of hash table. |
2190 | Making it an odd number is simplest for now. | |
2191 | ??? Later take some measurements. */ | |
02280659 ZD |
2192 | table->size |= 1; |
2193 | n = table->size * sizeof (struct expr *); | |
703ad42b | 2194 | table->table = gmalloc (n); |
02280659 | 2195 | table->set_p = set_p; |
7506f491 DE |
2196 | } |
2197 | ||
02280659 | 2198 | /* Free things allocated by alloc_hash_table. */ |
7506f491 DE |
2199 | |
2200 | static void | |
1d088dee | 2201 | free_hash_table (struct hash_table *table) |
7506f491 | 2202 | { |
02280659 | 2203 | free (table->table); |
7506f491 DE |
2204 | } |
2205 | ||
02280659 ZD |
2206 | /* Compute the hash TABLE for doing copy/const propagation or |
2207 | expression hash table. */ | |
7506f491 DE |
2208 | |
2209 | static void | |
1d088dee | 2210 | compute_hash_table (struct hash_table *table) |
7506f491 DE |
2211 | { |
2212 | /* Initialize count of number of entries in hash table. */ | |
02280659 | 2213 | table->n_elems = 0; |
703ad42b | 2214 | memset (table->table, 0, table->size * sizeof (struct expr *)); |
7506f491 | 2215 | |
02280659 | 2216 | compute_hash_table_work (table); |
7506f491 DE |
2217 | } |
2218 | \f | |
2219 | /* Expression tracking support. */ | |
2220 | ||
ceda50e9 RH |
2221 | /* Lookup REGNO in the set TABLE. The result is a pointer to the |
2222 | table entry, or NULL if not found. */ | |
7506f491 DE |
2223 | |
2224 | static struct expr * | |
1d088dee | 2225 | lookup_set (unsigned int regno, struct hash_table *table) |
7506f491 | 2226 | { |
02280659 | 2227 | unsigned int hash = hash_set (regno, table->size); |
7506f491 DE |
2228 | struct expr *expr; |
2229 | ||
02280659 | 2230 | expr = table->table[hash]; |
7506f491 | 2231 | |
ceda50e9 RH |
2232 | while (expr && REGNO (SET_DEST (expr->expr)) != regno) |
2233 | expr = expr->next_same_hash; | |
7506f491 DE |
2234 | |
2235 | return expr; | |
2236 | } | |
2237 | ||
2238 | /* Return the next entry for REGNO in list EXPR. */ | |
2239 | ||
2240 | static struct expr * | |
1d088dee | 2241 | next_set (unsigned int regno, struct expr *expr) |
7506f491 DE |
2242 | { |
2243 | do | |
2244 | expr = expr->next_same_hash; | |
2245 | while (expr && REGNO (SET_DEST (expr->expr)) != regno); | |
c4c81601 | 2246 | |
7506f491 DE |
2247 | return expr; |
2248 | } | |
2249 | ||
0fe854a7 RH |
2250 | /* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node |
2251 | types may be mixed. */ | |
2252 | ||
2253 | static void | |
1d088dee | 2254 | free_insn_expr_list_list (rtx *listp) |
0fe854a7 RH |
2255 | { |
2256 | rtx list, next; | |
2257 | ||
2258 | for (list = *listp; list ; list = next) | |
2259 | { | |
2260 | next = XEXP (list, 1); | |
2261 | if (GET_CODE (list) == EXPR_LIST) | |
2262 | free_EXPR_LIST_node (list); | |
2263 | else | |
2264 | free_INSN_LIST_node (list); | |
2265 | } | |
2266 | ||
2267 | *listp = NULL; | |
2268 | } | |
2269 | ||
73991d6a JH |
2270 | /* Clear canon_modify_mem_list and modify_mem_list tables. */ |
2271 | static void | |
1d088dee | 2272 | clear_modify_mem_tables (void) |
73991d6a JH |
2273 | { |
2274 | int i; | |
87c476a2 | 2275 | bitmap_iterator bi; |
73991d6a | 2276 | |
87c476a2 ZD |
2277 | EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi) |
2278 | { | |
2279 | free_INSN_LIST_list (modify_mem_list + i); | |
2280 | } | |
0fe854a7 | 2281 | bitmap_clear (modify_mem_list_set); |
73991d6a | 2282 | |
87c476a2 ZD |
2283 | EXECUTE_IF_SET_IN_BITMAP (canon_modify_mem_list_set, 0, i, bi) |
2284 | { | |
2285 | free_insn_expr_list_list (canon_modify_mem_list + i); | |
2286 | } | |
0fe854a7 | 2287 | bitmap_clear (canon_modify_mem_list_set); |
73991d6a JH |
2288 | } |
2289 | ||
2290 | /* Release memory used by modify_mem_list_set and canon_modify_mem_list_set. */ | |
2291 | ||
2292 | static void | |
1d088dee | 2293 | free_modify_mem_tables (void) |
73991d6a JH |
2294 | { |
2295 | clear_modify_mem_tables (); | |
2296 | free (modify_mem_list); | |
2297 | free (canon_modify_mem_list); | |
2298 | modify_mem_list = 0; | |
2299 | canon_modify_mem_list = 0; | |
2300 | } | |
2301 | ||
7506f491 DE |
2302 | /* Reset tables used to keep track of what's still available [since the |
2303 | start of the block]. */ | |
2304 | ||
2305 | static void | |
1d088dee | 2306 | reset_opr_set_tables (void) |
7506f491 DE |
2307 | { |
2308 | /* Maintain a bitmap of which regs have been set since beginning of | |
2309 | the block. */ | |
73991d6a | 2310 | CLEAR_REG_SET (reg_set_bitmap); |
c4c81601 | 2311 | |
7506f491 DE |
2312 | /* Also keep a record of the last instruction to modify memory. |
2313 | For now this is very trivial, we only record whether any memory | |
2314 | location has been modified. */ | |
73991d6a | 2315 | clear_modify_mem_tables (); |
7506f491 DE |
2316 | } |
2317 | ||
cc2902df | 2318 | /* Return nonzero if the operands of X are not set before INSN in |
7506f491 DE |
2319 | INSN's basic block. */ |
2320 | ||
2321 | static int | |
1d088dee | 2322 | oprs_not_set_p (rtx x, rtx insn) |
7506f491 | 2323 | { |
c4c81601 | 2324 | int i, j; |
7506f491 | 2325 | enum rtx_code code; |
6f7d635c | 2326 | const char *fmt; |
7506f491 | 2327 | |
7506f491 DE |
2328 | if (x == 0) |
2329 | return 1; | |
2330 | ||
2331 | code = GET_CODE (x); | |
2332 | switch (code) | |
2333 | { | |
2334 | case PC: | |
2335 | case CC0: | |
2336 | case CONST: | |
2337 | case CONST_INT: | |
2338 | case CONST_DOUBLE: | |
69ef87e2 | 2339 | case CONST_VECTOR: |
7506f491 DE |
2340 | case SYMBOL_REF: |
2341 | case LABEL_REF: | |
2342 | case ADDR_VEC: | |
2343 | case ADDR_DIFF_VEC: | |
2344 | return 1; | |
2345 | ||
2346 | case MEM: | |
589005ff | 2347 | if (load_killed_in_block_p (BLOCK_FOR_INSN (insn), |
e2d2ed72 | 2348 | INSN_CUID (insn), x, 0)) |
a13d4ebf | 2349 | return 0; |
c4c81601 RK |
2350 | else |
2351 | return oprs_not_set_p (XEXP (x, 0), insn); | |
7506f491 DE |
2352 | |
2353 | case REG: | |
73991d6a | 2354 | return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x)); |
7506f491 DE |
2355 | |
2356 | default: | |
2357 | break; | |
2358 | } | |
2359 | ||
c4c81601 | 2360 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2361 | { |
2362 | if (fmt[i] == 'e') | |
2363 | { | |
7506f491 DE |
2364 | /* If we are about to do the last recursive call |
2365 | needed at this level, change it into iteration. | |
2366 | This function is called enough to be worth it. */ | |
2367 | if (i == 0) | |
c4c81601 RK |
2368 | return oprs_not_set_p (XEXP (x, i), insn); |
2369 | ||
2370 | if (! oprs_not_set_p (XEXP (x, i), insn)) | |
7506f491 DE |
2371 | return 0; |
2372 | } | |
2373 | else if (fmt[i] == 'E') | |
c4c81601 RK |
2374 | for (j = 0; j < XVECLEN (x, i); j++) |
2375 | if (! oprs_not_set_p (XVECEXP (x, i, j), insn)) | |
2376 | return 0; | |
7506f491 DE |
2377 | } |
2378 | ||
2379 | return 1; | |
2380 | } | |
2381 | ||
2382 | /* Mark things set by a CALL. */ | |
2383 | ||
2384 | static void | |
1d088dee | 2385 | mark_call (rtx insn) |
7506f491 | 2386 | { |
24a28584 | 2387 | if (! CONST_OR_PURE_CALL_P (insn)) |
a13d4ebf | 2388 | record_last_mem_set_info (insn); |
7506f491 DE |
2389 | } |
2390 | ||
2391 | /* Mark things set by a SET. */ | |
2392 | ||
2393 | static void | |
1d088dee | 2394 | mark_set (rtx pat, rtx insn) |
7506f491 DE |
2395 | { |
2396 | rtx dest = SET_DEST (pat); | |
2397 | ||
2398 | while (GET_CODE (dest) == SUBREG | |
2399 | || GET_CODE (dest) == ZERO_EXTRACT | |
2400 | || GET_CODE (dest) == SIGN_EXTRACT | |
2401 | || GET_CODE (dest) == STRICT_LOW_PART) | |
2402 | dest = XEXP (dest, 0); | |
2403 | ||
7b1b4aed | 2404 | if (REG_P (dest)) |
73991d6a | 2405 | SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest)); |
7b1b4aed | 2406 | else if (MEM_P (dest)) |
a13d4ebf AM |
2407 | record_last_mem_set_info (insn); |
2408 | ||
6e72d1e9 | 2409 | if (GET_CODE (SET_SRC (pat)) == CALL) |
b5ce41ff | 2410 | mark_call (insn); |
7506f491 DE |
2411 | } |
2412 | ||
2413 | /* Record things set by a CLOBBER. */ | |
2414 | ||
2415 | static void | |
1d088dee | 2416 | mark_clobber (rtx pat, rtx insn) |
7506f491 DE |
2417 | { |
2418 | rtx clob = XEXP (pat, 0); | |
2419 | ||
2420 | while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART) | |
2421 | clob = XEXP (clob, 0); | |
2422 | ||
7b1b4aed | 2423 | if (REG_P (clob)) |
73991d6a | 2424 | SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob)); |
a13d4ebf AM |
2425 | else |
2426 | record_last_mem_set_info (insn); | |
7506f491 DE |
2427 | } |
2428 | ||
2429 | /* Record things set by INSN. | |
2430 | This data is used by oprs_not_set_p. */ | |
2431 | ||
2432 | static void | |
1d088dee | 2433 | mark_oprs_set (rtx insn) |
7506f491 DE |
2434 | { |
2435 | rtx pat = PATTERN (insn); | |
c4c81601 | 2436 | int i; |
7506f491 DE |
2437 | |
2438 | if (GET_CODE (pat) == SET) | |
2439 | mark_set (pat, insn); | |
2440 | else if (GET_CODE (pat) == PARALLEL) | |
c4c81601 RK |
2441 | for (i = 0; i < XVECLEN (pat, 0); i++) |
2442 | { | |
2443 | rtx x = XVECEXP (pat, 0, i); | |
2444 | ||
2445 | if (GET_CODE (x) == SET) | |
2446 | mark_set (x, insn); | |
2447 | else if (GET_CODE (x) == CLOBBER) | |
2448 | mark_clobber (x, insn); | |
6e72d1e9 | 2449 | else if (GET_CODE (x) == CALL) |
c4c81601 RK |
2450 | mark_call (insn); |
2451 | } | |
7506f491 | 2452 | |
7506f491 DE |
2453 | else if (GET_CODE (pat) == CLOBBER) |
2454 | mark_clobber (pat, insn); | |
6e72d1e9 | 2455 | else if (GET_CODE (pat) == CALL) |
b5ce41ff | 2456 | mark_call (insn); |
7506f491 | 2457 | } |
b5ce41ff | 2458 | |
7506f491 DE |
2459 | \f |
2460 | /* Compute copy/constant propagation working variables. */ | |
2461 | ||
2462 | /* Local properties of assignments. */ | |
7506f491 DE |
2463 | static sbitmap *cprop_pavloc; |
2464 | static sbitmap *cprop_absaltered; | |
2465 | ||
2466 | /* Global properties of assignments (computed from the local properties). */ | |
7506f491 DE |
2467 | static sbitmap *cprop_avin; |
2468 | static sbitmap *cprop_avout; | |
2469 | ||
c4c81601 RK |
2470 | /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of |
2471 | basic blocks. N_SETS is the number of sets. */ | |
7506f491 DE |
2472 | |
2473 | static void | |
1d088dee | 2474 | alloc_cprop_mem (int n_blocks, int n_sets) |
7506f491 DE |
2475 | { |
2476 | cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets); | |
2477 | cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets); | |
2478 | ||
2479 | cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets); | |
2480 | cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets); | |
2481 | } | |
2482 | ||
2483 | /* Free vars used by copy/const propagation. */ | |
2484 | ||
2485 | static void | |
1d088dee | 2486 | free_cprop_mem (void) |
7506f491 | 2487 | { |
5a660bff DB |
2488 | sbitmap_vector_free (cprop_pavloc); |
2489 | sbitmap_vector_free (cprop_absaltered); | |
2490 | sbitmap_vector_free (cprop_avin); | |
2491 | sbitmap_vector_free (cprop_avout); | |
7506f491 DE |
2492 | } |
2493 | ||
c4c81601 RK |
2494 | /* For each block, compute whether X is transparent. X is either an |
2495 | expression or an assignment [though we don't care which, for this context | |
2496 | an assignment is treated as an expression]. For each block where an | |
2497 | element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX | |
2498 | bit in BMAP. */ | |
7506f491 DE |
2499 | |
2500 | static void | |
1d088dee | 2501 | compute_transp (rtx x, int indx, sbitmap *bmap, int set_p) |
7506f491 | 2502 | { |
e0082a72 ZD |
2503 | int i, j; |
2504 | basic_block bb; | |
7506f491 | 2505 | enum rtx_code code; |
c4c81601 | 2506 | reg_set *r; |
6f7d635c | 2507 | const char *fmt; |
7506f491 | 2508 | |
c4c81601 RK |
2509 | /* repeat is used to turn tail-recursion into iteration since GCC |
2510 | can't do it when there's no return value. */ | |
7506f491 DE |
2511 | repeat: |
2512 | ||
2513 | if (x == 0) | |
2514 | return; | |
2515 | ||
2516 | code = GET_CODE (x); | |
2517 | switch (code) | |
2518 | { | |
2519 | case REG: | |
c4c81601 RK |
2520 | if (set_p) |
2521 | { | |
2522 | if (REGNO (x) < FIRST_PSEUDO_REGISTER) | |
2523 | { | |
e0082a72 ZD |
2524 | FOR_EACH_BB (bb) |
2525 | if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x))) | |
2526 | SET_BIT (bmap[bb->index], indx); | |
c4c81601 RK |
2527 | } |
2528 | else | |
2529 | { | |
2530 | for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next) | |
2531 | SET_BIT (bmap[BLOCK_NUM (r->insn)], indx); | |
2532 | } | |
2533 | } | |
2534 | else | |
2535 | { | |
2536 | if (REGNO (x) < FIRST_PSEUDO_REGISTER) | |
2537 | { | |
e0082a72 ZD |
2538 | FOR_EACH_BB (bb) |
2539 | if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x))) | |
2540 | RESET_BIT (bmap[bb->index], indx); | |
c4c81601 RK |
2541 | } |
2542 | else | |
2543 | { | |
2544 | for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next) | |
2545 | RESET_BIT (bmap[BLOCK_NUM (r->insn)], indx); | |
2546 | } | |
2547 | } | |
7506f491 | 2548 | |
c4c81601 | 2549 | return; |
7506f491 DE |
2550 | |
2551 | case MEM: | |
e0082a72 | 2552 | FOR_EACH_BB (bb) |
a13d4ebf | 2553 | { |
e0082a72 | 2554 | rtx list_entry = canon_modify_mem_list[bb->index]; |
a13d4ebf AM |
2555 | |
2556 | while (list_entry) | |
2557 | { | |
2558 | rtx dest, dest_addr; | |
2559 | ||
7b1b4aed | 2560 | if (CALL_P (XEXP (list_entry, 0))) |
a13d4ebf AM |
2561 | { |
2562 | if (set_p) | |
e0082a72 | 2563 | SET_BIT (bmap[bb->index], indx); |
a13d4ebf | 2564 | else |
e0082a72 | 2565 | RESET_BIT (bmap[bb->index], indx); |
a13d4ebf AM |
2566 | break; |
2567 | } | |
2568 | /* LIST_ENTRY must be an INSN of some kind that sets memory. | |
2569 | Examine each hunk of memory that is modified. */ | |
2570 | ||
2571 | dest = XEXP (list_entry, 0); | |
2572 | list_entry = XEXP (list_entry, 1); | |
2573 | dest_addr = XEXP (list_entry, 0); | |
589005ff | 2574 | |
a13d4ebf AM |
2575 | if (canon_true_dependence (dest, GET_MODE (dest), dest_addr, |
2576 | x, rtx_addr_varies_p)) | |
2577 | { | |
2578 | if (set_p) | |
e0082a72 | 2579 | SET_BIT (bmap[bb->index], indx); |
a13d4ebf | 2580 | else |
e0082a72 | 2581 | RESET_BIT (bmap[bb->index], indx); |
a13d4ebf AM |
2582 | break; |
2583 | } | |
2584 | list_entry = XEXP (list_entry, 1); | |
2585 | } | |
2586 | } | |
c4c81601 | 2587 | |
7506f491 DE |
2588 | x = XEXP (x, 0); |
2589 | goto repeat; | |
2590 | ||
2591 | case PC: | |
2592 | case CC0: /*FIXME*/ | |
2593 | case CONST: | |
2594 | case CONST_INT: | |
2595 | case CONST_DOUBLE: | |
69ef87e2 | 2596 | case CONST_VECTOR: |
7506f491 DE |
2597 | case SYMBOL_REF: |
2598 | case LABEL_REF: | |
2599 | case ADDR_VEC: | |
2600 | case ADDR_DIFF_VEC: | |
2601 | return; | |
2602 | ||
2603 | default: | |
2604 | break; | |
2605 | } | |
2606 | ||
c4c81601 | 2607 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2608 | { |
2609 | if (fmt[i] == 'e') | |
2610 | { | |
7506f491 DE |
2611 | /* If we are about to do the last recursive call |
2612 | needed at this level, change it into iteration. | |
2613 | This function is called enough to be worth it. */ | |
2614 | if (i == 0) | |
2615 | { | |
c4c81601 | 2616 | x = XEXP (x, i); |
7506f491 DE |
2617 | goto repeat; |
2618 | } | |
c4c81601 RK |
2619 | |
2620 | compute_transp (XEXP (x, i), indx, bmap, set_p); | |
7506f491 DE |
2621 | } |
2622 | else if (fmt[i] == 'E') | |
c4c81601 RK |
2623 | for (j = 0; j < XVECLEN (x, i); j++) |
2624 | compute_transp (XVECEXP (x, i, j), indx, bmap, set_p); | |
7506f491 DE |
2625 | } |
2626 | } | |
2627 | ||
7506f491 DE |
2628 | /* Top level routine to do the dataflow analysis needed by copy/const |
2629 | propagation. */ | |
2630 | ||
2631 | static void | |
1d088dee | 2632 | compute_cprop_data (void) |
7506f491 | 2633 | { |
02280659 | 2634 | compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table); |
ce724250 JL |
2635 | compute_available (cprop_pavloc, cprop_absaltered, |
2636 | cprop_avout, cprop_avin); | |
7506f491 DE |
2637 | } |
2638 | \f | |
2639 | /* Copy/constant propagation. */ | |
2640 | ||
7506f491 DE |
2641 | /* Maximum number of register uses in an insn that we handle. */ |
2642 | #define MAX_USES 8 | |
2643 | ||
2644 | /* Table of uses found in an insn. | |
2645 | Allocated statically to avoid alloc/free complexity and overhead. */ | |
2646 | static struct reg_use reg_use_table[MAX_USES]; | |
2647 | ||
2648 | /* Index into `reg_use_table' while building it. */ | |
2649 | static int reg_use_count; | |
2650 | ||
c4c81601 RK |
2651 | /* Set up a list of register numbers used in INSN. The found uses are stored |
2652 | in `reg_use_table'. `reg_use_count' is initialized to zero before entry, | |
2653 | and contains the number of uses in the table upon exit. | |
7506f491 | 2654 | |
c4c81601 RK |
2655 | ??? If a register appears multiple times we will record it multiple times. |
2656 | This doesn't hurt anything but it will slow things down. */ | |
7506f491 DE |
2657 | |
2658 | static void | |
1d088dee | 2659 | find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED) |
7506f491 | 2660 | { |
c4c81601 | 2661 | int i, j; |
7506f491 | 2662 | enum rtx_code code; |
6f7d635c | 2663 | const char *fmt; |
9e71c818 | 2664 | rtx x = *xptr; |
7506f491 | 2665 | |
c4c81601 RK |
2666 | /* repeat is used to turn tail-recursion into iteration since GCC |
2667 | can't do it when there's no return value. */ | |
7506f491 | 2668 | repeat: |
7506f491 DE |
2669 | if (x == 0) |
2670 | return; | |
2671 | ||
2672 | code = GET_CODE (x); | |
9e71c818 | 2673 | if (REG_P (x)) |
7506f491 | 2674 | { |
7506f491 DE |
2675 | if (reg_use_count == MAX_USES) |
2676 | return; | |
c4c81601 | 2677 | |
7506f491 DE |
2678 | reg_use_table[reg_use_count].reg_rtx = x; |
2679 | reg_use_count++; | |
7506f491 DE |
2680 | } |
2681 | ||
2682 | /* Recursively scan the operands of this expression. */ | |
2683 | ||
c4c81601 | 2684 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2685 | { |
2686 | if (fmt[i] == 'e') | |
2687 | { | |
2688 | /* If we are about to do the last recursive call | |
2689 | needed at this level, change it into iteration. | |
2690 | This function is called enough to be worth it. */ | |
2691 | if (i == 0) | |
2692 | { | |
2693 | x = XEXP (x, 0); | |
2694 | goto repeat; | |
2695 | } | |
c4c81601 | 2696 | |
9e71c818 | 2697 | find_used_regs (&XEXP (x, i), data); |
7506f491 DE |
2698 | } |
2699 | else if (fmt[i] == 'E') | |
c4c81601 | 2700 | for (j = 0; j < XVECLEN (x, i); j++) |
9e71c818 | 2701 | find_used_regs (&XVECEXP (x, i, j), data); |
7506f491 DE |
2702 | } |
2703 | } | |
2704 | ||
2705 | /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO. | |
cc2902df | 2706 | Returns nonzero is successful. */ |
7506f491 DE |
2707 | |
2708 | static int | |
1d088dee | 2709 | try_replace_reg (rtx from, rtx to, rtx insn) |
7506f491 | 2710 | { |
172890a2 | 2711 | rtx note = find_reg_equal_equiv_note (insn); |
fb0c0a12 | 2712 | rtx src = 0; |
172890a2 RK |
2713 | int success = 0; |
2714 | rtx set = single_set (insn); | |
833fc3ad | 2715 | |
2b773ee2 JH |
2716 | validate_replace_src_group (from, to, insn); |
2717 | if (num_changes_pending () && apply_change_group ()) | |
2718 | success = 1; | |
9e71c818 | 2719 | |
9feff114 JDA |
2720 | /* Try to simplify SET_SRC if we have substituted a constant. */ |
2721 | if (success && set && CONSTANT_P (to)) | |
2722 | { | |
2723 | src = simplify_rtx (SET_SRC (set)); | |
2724 | ||
2725 | if (src) | |
2726 | validate_change (insn, &SET_SRC (set), src, 0); | |
2727 | } | |
2728 | ||
ed8395a0 JZ |
2729 | /* If there is already a NOTE, update the expression in it with our |
2730 | replacement. */ | |
2731 | if (note != 0) | |
2732 | XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to); | |
2733 | ||
f305679f | 2734 | if (!success && set && reg_mentioned_p (from, SET_SRC (set))) |
833fc3ad | 2735 | { |
f305679f JH |
2736 | /* If above failed and this is a single set, try to simplify the source of |
2737 | the set given our substitution. We could perhaps try this for multiple | |
2738 | SETs, but it probably won't buy us anything. */ | |
172890a2 RK |
2739 | src = simplify_replace_rtx (SET_SRC (set), from, to); |
2740 | ||
9e71c818 JH |
2741 | if (!rtx_equal_p (src, SET_SRC (set)) |
2742 | && validate_change (insn, &SET_SRC (set), src, 0)) | |
172890a2 | 2743 | success = 1; |
833fc3ad | 2744 | |
bbd288a4 FS |
2745 | /* If we've failed to do replacement, have a single SET, don't already |
2746 | have a note, and have no special SET, add a REG_EQUAL note to not | |
2747 | lose information. */ | |
2748 | if (!success && note == 0 && set != 0 | |
2749 | && GET_CODE (XEXP (set, 0)) != ZERO_EXTRACT | |
2750 | && GET_CODE (XEXP (set, 0)) != SIGN_EXTRACT) | |
f305679f JH |
2751 | note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); |
2752 | } | |
e251e2a2 | 2753 | |
172890a2 RK |
2754 | /* REG_EQUAL may get simplified into register. |
2755 | We don't allow that. Remove that note. This code ought | |
fbe5a4a6 | 2756 | not to happen, because previous code ought to synthesize |
172890a2 RK |
2757 | reg-reg move, but be on the safe side. */ |
2758 | if (note && REG_P (XEXP (note, 0))) | |
2759 | remove_note (insn, note); | |
833fc3ad | 2760 | |
833fc3ad JH |
2761 | return success; |
2762 | } | |
c4c81601 RK |
2763 | |
2764 | /* Find a set of REGNOs that are available on entry to INSN's block. Returns | |
2765 | NULL no such set is found. */ | |
7506f491 DE |
2766 | |
2767 | static struct expr * | |
1d088dee | 2768 | find_avail_set (int regno, rtx insn) |
7506f491 | 2769 | { |
cafba495 BS |
2770 | /* SET1 contains the last set found that can be returned to the caller for |
2771 | use in a substitution. */ | |
2772 | struct expr *set1 = 0; | |
589005ff | 2773 | |
cafba495 | 2774 | /* Loops are not possible here. To get a loop we would need two sets |
454ff5cb | 2775 | available at the start of the block containing INSN. i.e. we would |
cafba495 BS |
2776 | need two sets like this available at the start of the block: |
2777 | ||
2778 | (set (reg X) (reg Y)) | |
2779 | (set (reg Y) (reg X)) | |
2780 | ||
2781 | This can not happen since the set of (reg Y) would have killed the | |
2782 | set of (reg X) making it unavailable at the start of this block. */ | |
2783 | while (1) | |
8e42ace1 | 2784 | { |
cafba495 | 2785 | rtx src; |
ceda50e9 | 2786 | struct expr *set = lookup_set (regno, &set_hash_table); |
cafba495 BS |
2787 | |
2788 | /* Find a set that is available at the start of the block | |
2789 | which contains INSN. */ | |
2790 | while (set) | |
2791 | { | |
2792 | if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index)) | |
2793 | break; | |
2794 | set = next_set (regno, set); | |
2795 | } | |
7506f491 | 2796 | |
cafba495 BS |
2797 | /* If no available set was found we've reached the end of the |
2798 | (possibly empty) copy chain. */ | |
2799 | if (set == 0) | |
589005ff | 2800 | break; |
cafba495 | 2801 | |
282899df | 2802 | gcc_assert (GET_CODE (set->expr) == SET); |
cafba495 BS |
2803 | |
2804 | src = SET_SRC (set->expr); | |
2805 | ||
2806 | /* We know the set is available. | |
2807 | Now check that SRC is ANTLOC (i.e. none of the source operands | |
589005ff | 2808 | have changed since the start of the block). |
cafba495 BS |
2809 | |
2810 | If the source operand changed, we may still use it for the next | |
2811 | iteration of this loop, but we may not use it for substitutions. */ | |
c4c81601 | 2812 | |
6b2d1c9e | 2813 | if (gcse_constant_p (src) || oprs_not_set_p (src, insn)) |
cafba495 BS |
2814 | set1 = set; |
2815 | ||
2816 | /* If the source of the set is anything except a register, then | |
2817 | we have reached the end of the copy chain. */ | |
7b1b4aed | 2818 | if (! REG_P (src)) |
7506f491 | 2819 | break; |
7506f491 | 2820 | |
454ff5cb | 2821 | /* Follow the copy chain, i.e. start another iteration of the loop |
cafba495 BS |
2822 | and see if we have an available copy into SRC. */ |
2823 | regno = REGNO (src); | |
8e42ace1 | 2824 | } |
cafba495 BS |
2825 | |
2826 | /* SET1 holds the last set that was available and anticipatable at | |
2827 | INSN. */ | |
2828 | return set1; | |
7506f491 DE |
2829 | } |
2830 | ||
abd535b6 | 2831 | /* Subroutine of cprop_insn that tries to propagate constants into |
0e3f0221 | 2832 | JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL |
fbe5a4a6 | 2833 | it is the instruction that immediately precedes JUMP, and must be a |
818b6b7f | 2834 | single SET of a register. FROM is what we will try to replace, |
0e3f0221 | 2835 | SRC is the constant we will try to substitute for it. Returns nonzero |
589005ff | 2836 | if a change was made. */ |
c4c81601 | 2837 | |
abd535b6 | 2838 | static int |
1d088dee | 2839 | cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src) |
abd535b6 | 2840 | { |
bc6688b4 | 2841 | rtx new, set_src, note_src; |
0e3f0221 | 2842 | rtx set = pc_set (jump); |
bc6688b4 | 2843 | rtx note = find_reg_equal_equiv_note (jump); |
0e3f0221 | 2844 | |
bc6688b4 RS |
2845 | if (note) |
2846 | { | |
2847 | note_src = XEXP (note, 0); | |
2848 | if (GET_CODE (note_src) == EXPR_LIST) | |
2849 | note_src = NULL_RTX; | |
2850 | } | |
2851 | else note_src = NULL_RTX; | |
2852 | ||
2853 | /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */ | |
2854 | set_src = note_src ? note_src : SET_SRC (set); | |
2855 | ||
2856 | /* First substitute the SETCC condition into the JUMP instruction, | |
2857 | then substitute that given values into this expanded JUMP. */ | |
2858 | if (setcc != NULL_RTX | |
48ddd46c JH |
2859 | && !modified_between_p (from, setcc, jump) |
2860 | && !modified_between_p (src, setcc, jump)) | |
b2f02503 | 2861 | { |
bc6688b4 | 2862 | rtx setcc_src; |
b2f02503 | 2863 | rtx setcc_set = single_set (setcc); |
bc6688b4 RS |
2864 | rtx setcc_note = find_reg_equal_equiv_note (setcc); |
2865 | setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST) | |
2866 | ? XEXP (setcc_note, 0) : SET_SRC (setcc_set); | |
2867 | set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set), | |
2868 | setcc_src); | |
b2f02503 | 2869 | } |
0e3f0221 | 2870 | else |
bc6688b4 | 2871 | setcc = NULL_RTX; |
0e3f0221 | 2872 | |
bc6688b4 | 2873 | new = simplify_replace_rtx (set_src, from, src); |
abd535b6 | 2874 | |
bc6688b4 RS |
2875 | /* If no simplification can be made, then try the next register. */ |
2876 | if (rtx_equal_p (new, SET_SRC (set))) | |
9e48c409 | 2877 | return 0; |
589005ff | 2878 | |
7d5ab30e | 2879 | /* If this is now a no-op delete it, otherwise this must be a valid insn. */ |
172890a2 | 2880 | if (new == pc_rtx) |
0e3f0221 | 2881 | delete_insn (jump); |
7d5ab30e | 2882 | else |
abd535b6 | 2883 | { |
48ddd46c JH |
2884 | /* Ensure the value computed inside the jump insn to be equivalent |
2885 | to one computed by setcc. */ | |
bc6688b4 | 2886 | if (setcc && modified_in_p (new, setcc)) |
48ddd46c | 2887 | return 0; |
0e3f0221 | 2888 | if (! validate_change (jump, &SET_SRC (set), new, 0)) |
bc6688b4 RS |
2889 | { |
2890 | /* When (some) constants are not valid in a comparison, and there | |
2891 | are two registers to be replaced by constants before the entire | |
2892 | comparison can be folded into a constant, we need to keep | |
2893 | intermediate information in REG_EQUAL notes. For targets with | |
2894 | separate compare insns, such notes are added by try_replace_reg. | |
2895 | When we have a combined compare-and-branch instruction, however, | |
2896 | we need to attach a note to the branch itself to make this | |
2897 | optimization work. */ | |
2898 | ||
2899 | if (!rtx_equal_p (new, note_src)) | |
2900 | set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new)); | |
2901 | return 0; | |
2902 | } | |
2903 | ||
2904 | /* Remove REG_EQUAL note after simplification. */ | |
2905 | if (note_src) | |
2906 | remove_note (jump, note); | |
abd535b6 | 2907 | |
7d5ab30e JH |
2908 | /* If this has turned into an unconditional jump, |
2909 | then put a barrier after it so that the unreachable | |
2910 | code will be deleted. */ | |
2911 | if (GET_CODE (SET_SRC (set)) == LABEL_REF) | |
0e3f0221 | 2912 | emit_barrier_after (jump); |
7d5ab30e | 2913 | } |
abd535b6 | 2914 | |
0e3f0221 RS |
2915 | #ifdef HAVE_cc0 |
2916 | /* Delete the cc0 setter. */ | |
818b6b7f | 2917 | if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc)))) |
0e3f0221 RS |
2918 | delete_insn (setcc); |
2919 | #endif | |
2920 | ||
172890a2 | 2921 | run_jump_opt_after_gcse = 1; |
c4c81601 | 2922 | |
27fb79ad | 2923 | global_const_prop_count++; |
172890a2 RK |
2924 | if (gcse_file != NULL) |
2925 | { | |
2926 | fprintf (gcse_file, | |
27fb79ad | 2927 | "GLOBAL CONST-PROP: Replacing reg %d in jump_insn %d with constant ", |
0e3f0221 | 2928 | REGNO (from), INSN_UID (jump)); |
172890a2 RK |
2929 | print_rtl (gcse_file, src); |
2930 | fprintf (gcse_file, "\n"); | |
abd535b6 | 2931 | } |
0005550b | 2932 | purge_dead_edges (bb); |
172890a2 RK |
2933 | |
2934 | return 1; | |
abd535b6 BS |
2935 | } |
2936 | ||
ae860ff7 | 2937 | static bool |
1d088dee | 2938 | constprop_register (rtx insn, rtx from, rtx to, int alter_jumps) |
ae860ff7 JH |
2939 | { |
2940 | rtx sset; | |
2941 | ||
2942 | /* Check for reg or cc0 setting instructions followed by | |
2943 | conditional branch instructions first. */ | |
2944 | if (alter_jumps | |
2945 | && (sset = single_set (insn)) != NULL | |
244d05fb | 2946 | && NEXT_INSN (insn) |
ae860ff7 JH |
2947 | && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn))) |
2948 | { | |
2949 | rtx dest = SET_DEST (sset); | |
2950 | if ((REG_P (dest) || CC0_P (dest)) | |
2951 | && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to)) | |
2952 | return 1; | |
2953 | } | |
2954 | ||
2955 | /* Handle normal insns next. */ | |
4b4bf941 | 2956 | if (NONJUMP_INSN_P (insn) |
ae860ff7 JH |
2957 | && try_replace_reg (from, to, insn)) |
2958 | return 1; | |
2959 | ||
2960 | /* Try to propagate a CONST_INT into a conditional jump. | |
2961 | We're pretty specific about what we will handle in this | |
2962 | code, we can extend this as necessary over time. | |
2963 | ||
2964 | Right now the insn in question must look like | |
2965 | (set (pc) (if_then_else ...)) */ | |
2966 | else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn)) | |
2967 | return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to); | |
2968 | return 0; | |
2969 | } | |
2970 | ||
7506f491 | 2971 | /* Perform constant and copy propagation on INSN. |
cc2902df | 2972 | The result is nonzero if a change was made. */ |
7506f491 DE |
2973 | |
2974 | static int | |
1d088dee | 2975 | cprop_insn (rtx insn, int alter_jumps) |
7506f491 DE |
2976 | { |
2977 | struct reg_use *reg_used; | |
2978 | int changed = 0; | |
833fc3ad | 2979 | rtx note; |
7506f491 | 2980 | |
9e71c818 | 2981 | if (!INSN_P (insn)) |
7506f491 DE |
2982 | return 0; |
2983 | ||
2984 | reg_use_count = 0; | |
9e71c818 | 2985 | note_uses (&PATTERN (insn), find_used_regs, NULL); |
589005ff | 2986 | |
172890a2 | 2987 | note = find_reg_equal_equiv_note (insn); |
833fc3ad | 2988 | |
dc297297 | 2989 | /* We may win even when propagating constants into notes. */ |
833fc3ad | 2990 | if (note) |
9e71c818 | 2991 | find_used_regs (&XEXP (note, 0), NULL); |
7506f491 | 2992 | |
c4c81601 RK |
2993 | for (reg_used = ®_use_table[0]; reg_use_count > 0; |
2994 | reg_used++, reg_use_count--) | |
7506f491 | 2995 | { |
770ae6cc | 2996 | unsigned int regno = REGNO (reg_used->reg_rtx); |
7506f491 DE |
2997 | rtx pat, src; |
2998 | struct expr *set; | |
7506f491 DE |
2999 | |
3000 | /* Ignore registers created by GCSE. | |
dc297297 | 3001 | We do this because ... */ |
7506f491 DE |
3002 | if (regno >= max_gcse_regno) |
3003 | continue; | |
3004 | ||
3005 | /* If the register has already been set in this block, there's | |
3006 | nothing we can do. */ | |
3007 | if (! oprs_not_set_p (reg_used->reg_rtx, insn)) | |
3008 | continue; | |
3009 | ||
3010 | /* Find an assignment that sets reg_used and is available | |
3011 | at the start of the block. */ | |
3012 | set = find_avail_set (regno, insn); | |
3013 | if (! set) | |
3014 | continue; | |
589005ff | 3015 | |
7506f491 DE |
3016 | pat = set->expr; |
3017 | /* ??? We might be able to handle PARALLELs. Later. */ | |
282899df | 3018 | gcc_assert (GET_CODE (pat) == SET); |
c4c81601 | 3019 | |
7506f491 DE |
3020 | src = SET_SRC (pat); |
3021 | ||
e78d9500 | 3022 | /* Constant propagation. */ |
6b2d1c9e | 3023 | if (gcse_constant_p (src)) |
7506f491 | 3024 | { |
ae860ff7 | 3025 | if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps)) |
7506f491 DE |
3026 | { |
3027 | changed = 1; | |
27fb79ad | 3028 | global_const_prop_count++; |
7506f491 DE |
3029 | if (gcse_file != NULL) |
3030 | { | |
ae860ff7 JH |
3031 | fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno); |
3032 | fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn)); | |
e78d9500 | 3033 | print_rtl (gcse_file, src); |
7506f491 DE |
3034 | fprintf (gcse_file, "\n"); |
3035 | } | |
bc6688b4 RS |
3036 | if (INSN_DELETED_P (insn)) |
3037 | return 1; | |
7506f491 DE |
3038 | } |
3039 | } | |
7b1b4aed | 3040 | else if (REG_P (src) |
7506f491 DE |
3041 | && REGNO (src) >= FIRST_PSEUDO_REGISTER |
3042 | && REGNO (src) != regno) | |
3043 | { | |
cafba495 | 3044 | if (try_replace_reg (reg_used->reg_rtx, src, insn)) |
7506f491 | 3045 | { |
cafba495 | 3046 | changed = 1; |
27fb79ad | 3047 | global_copy_prop_count++; |
cafba495 | 3048 | if (gcse_file != NULL) |
7506f491 | 3049 | { |
ae860ff7 | 3050 | fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d", |
c4c81601 RK |
3051 | regno, INSN_UID (insn)); |
3052 | fprintf (gcse_file, " with reg %d\n", REGNO (src)); | |
7506f491 | 3053 | } |
cafba495 BS |
3054 | |
3055 | /* The original insn setting reg_used may or may not now be | |
3056 | deletable. We leave the deletion to flow. */ | |
3057 | /* FIXME: If it turns out that the insn isn't deletable, | |
3058 | then we may have unnecessarily extended register lifetimes | |
3059 | and made things worse. */ | |
7506f491 DE |
3060 | } |
3061 | } | |
3062 | } | |
3063 | ||
3064 | return changed; | |
3065 | } | |
3066 | ||
710ee3ed RH |
3067 | /* Like find_used_regs, but avoid recording uses that appear in |
3068 | input-output contexts such as zero_extract or pre_dec. This | |
3069 | restricts the cases we consider to those for which local cprop | |
3070 | can legitimately make replacements. */ | |
3071 | ||
3072 | static void | |
1d088dee | 3073 | local_cprop_find_used_regs (rtx *xptr, void *data) |
710ee3ed RH |
3074 | { |
3075 | rtx x = *xptr; | |
3076 | ||
3077 | if (x == 0) | |
3078 | return; | |
3079 | ||
3080 | switch (GET_CODE (x)) | |
3081 | { | |
3082 | case ZERO_EXTRACT: | |
3083 | case SIGN_EXTRACT: | |
3084 | case STRICT_LOW_PART: | |
3085 | return; | |
3086 | ||
3087 | case PRE_DEC: | |
3088 | case PRE_INC: | |
3089 | case POST_DEC: | |
3090 | case POST_INC: | |
3091 | case PRE_MODIFY: | |
3092 | case POST_MODIFY: | |
3093 | /* Can only legitimately appear this early in the context of | |
3094 | stack pushes for function arguments, but handle all of the | |
3095 | codes nonetheless. */ | |
3096 | return; | |
3097 | ||
3098 | case SUBREG: | |
3099 | /* Setting a subreg of a register larger than word_mode leaves | |
3100 | the non-written words unchanged. */ | |
3101 | if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD) | |
3102 | return; | |
3103 | break; | |
3104 | ||
3105 | default: | |
3106 | break; | |
3107 | } | |
3108 | ||
3109 | find_used_regs (xptr, data); | |
3110 | } | |
1d088dee | 3111 | |
8ba46434 R |
3112 | /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall; |
3113 | their REG_EQUAL notes need updating. */ | |
e197b6fc | 3114 | |
ae860ff7 | 3115 | static bool |
1d088dee | 3116 | do_local_cprop (rtx x, rtx insn, int alter_jumps, rtx *libcall_sp) |
ae860ff7 JH |
3117 | { |
3118 | rtx newreg = NULL, newcnst = NULL; | |
3119 | ||
e197b6fc RH |
3120 | /* Rule out USE instructions and ASM statements as we don't want to |
3121 | change the hard registers mentioned. */ | |
7b1b4aed | 3122 | if (REG_P (x) |
ae860ff7 | 3123 | && (REGNO (x) >= FIRST_PSEUDO_REGISTER |
e197b6fc RH |
3124 | || (GET_CODE (PATTERN (insn)) != USE |
3125 | && asm_noperands (PATTERN (insn)) < 0))) | |
ae860ff7 JH |
3126 | { |
3127 | cselib_val *val = cselib_lookup (x, GET_MODE (x), 0); | |
3128 | struct elt_loc_list *l; | |
3129 | ||
3130 | if (!val) | |
3131 | return false; | |
3132 | for (l = val->locs; l; l = l->next) | |
3133 | { | |
3134 | rtx this_rtx = l->loc; | |
46690369 JH |
3135 | rtx note; |
3136 | ||
9635cfad JH |
3137 | if (l->in_libcall) |
3138 | continue; | |
3139 | ||
6b2d1c9e | 3140 | if (gcse_constant_p (this_rtx)) |
ae860ff7 | 3141 | newcnst = this_rtx; |
46690369 JH |
3142 | if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER |
3143 | /* Don't copy propagate if it has attached REG_EQUIV note. | |
3144 | At this point this only function parameters should have | |
3145 | REG_EQUIV notes and if the argument slot is used somewhere | |
3146 | explicitly, it means address of parameter has been taken, | |
3147 | so we should not extend the lifetime of the pseudo. */ | |
3148 | && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX)) | |
7b1b4aed | 3149 | || ! MEM_P (XEXP (note, 0)))) |
ae860ff7 JH |
3150 | newreg = this_rtx; |
3151 | } | |
3152 | if (newcnst && constprop_register (insn, x, newcnst, alter_jumps)) | |
3153 | { | |
8ba46434 | 3154 | /* If we find a case where we can't fix the retval REG_EQUAL notes |
fbe5a4a6 | 3155 | match the new register, we either have to abandon this replacement |
8ba46434 R |
3156 | or fix delete_trivially_dead_insns to preserve the setting insn, |
3157 | or make it delete the REG_EUAQL note, and fix up all passes that | |
3158 | require the REG_EQUAL note there. */ | |
282899df NS |
3159 | bool adjusted; |
3160 | ||
3161 | adjusted = adjust_libcall_notes (x, newcnst, insn, libcall_sp); | |
3162 | gcc_assert (adjusted); | |
3163 | ||
ae860ff7 JH |
3164 | if (gcse_file != NULL) |
3165 | { | |
3166 | fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ", | |
3167 | REGNO (x)); | |
3168 | fprintf (gcse_file, "insn %d with constant ", | |
3169 | INSN_UID (insn)); | |
3170 | print_rtl (gcse_file, newcnst); | |
3171 | fprintf (gcse_file, "\n"); | |
3172 | } | |
27fb79ad | 3173 | local_const_prop_count++; |
ae860ff7 JH |
3174 | return true; |
3175 | } | |
3176 | else if (newreg && newreg != x && try_replace_reg (x, newreg, insn)) | |
3177 | { | |
8ba46434 | 3178 | adjust_libcall_notes (x, newreg, insn, libcall_sp); |
ae860ff7 JH |
3179 | if (gcse_file != NULL) |
3180 | { | |
3181 | fprintf (gcse_file, | |
3182 | "LOCAL COPY-PROP: Replacing reg %d in insn %d", | |
3183 | REGNO (x), INSN_UID (insn)); | |
3184 | fprintf (gcse_file, " with reg %d\n", REGNO (newreg)); | |
3185 | } | |
27fb79ad | 3186 | local_copy_prop_count++; |
ae860ff7 JH |
3187 | return true; |
3188 | } | |
3189 | } | |
3190 | return false; | |
3191 | } | |
3192 | ||
8ba46434 R |
3193 | /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall; |
3194 | their REG_EQUAL notes need updating to reflect that OLDREG has been | |
f4e3e618 RH |
3195 | replaced with NEWVAL in INSN. Return true if all substitutions could |
3196 | be made. */ | |
8ba46434 | 3197 | static bool |
1d088dee | 3198 | adjust_libcall_notes (rtx oldreg, rtx newval, rtx insn, rtx *libcall_sp) |
8ba46434 | 3199 | { |
f4e3e618 | 3200 | rtx end; |
8ba46434 R |
3201 | |
3202 | while ((end = *libcall_sp++)) | |
3203 | { | |
f4e3e618 | 3204 | rtx note = find_reg_equal_equiv_note (end); |
8ba46434 R |
3205 | |
3206 | if (! note) | |
3207 | continue; | |
3208 | ||
3209 | if (REG_P (newval)) | |
3210 | { | |
3211 | if (reg_set_between_p (newval, PREV_INSN (insn), end)) | |
3212 | { | |
3213 | do | |
3214 | { | |
3215 | note = find_reg_equal_equiv_note (end); | |
3216 | if (! note) | |
3217 | continue; | |
3218 | if (reg_mentioned_p (newval, XEXP (note, 0))) | |
3219 | return false; | |
3220 | } | |
3221 | while ((end = *libcall_sp++)); | |
3222 | return true; | |
3223 | } | |
3224 | } | |
3225 | XEXP (note, 0) = replace_rtx (XEXP (note, 0), oldreg, newval); | |
3226 | insn = end; | |
3227 | } | |
3228 | return true; | |
3229 | } | |
3230 | ||
3231 | #define MAX_NESTED_LIBCALLS 9 | |
3232 | ||
ae860ff7 | 3233 | static void |
1d088dee | 3234 | local_cprop_pass (int alter_jumps) |
ae860ff7 JH |
3235 | { |
3236 | rtx insn; | |
3237 | struct reg_use *reg_used; | |
8ba46434 | 3238 | rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp; |
1649d92f | 3239 | bool changed = false; |
ae860ff7 | 3240 | |
463301c3 | 3241 | cselib_init (false); |
8ba46434 R |
3242 | libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS]; |
3243 | *libcall_sp = 0; | |
ae860ff7 JH |
3244 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) |
3245 | { | |
3246 | if (INSN_P (insn)) | |
3247 | { | |
8ba46434 | 3248 | rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); |
ae860ff7 | 3249 | |
8ba46434 R |
3250 | if (note) |
3251 | { | |
282899df | 3252 | gcc_assert (libcall_sp != libcall_stack); |
8ba46434 R |
3253 | *--libcall_sp = XEXP (note, 0); |
3254 | } | |
3255 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); | |
3256 | if (note) | |
3257 | libcall_sp++; | |
3258 | note = find_reg_equal_equiv_note (insn); | |
ae860ff7 JH |
3259 | do |
3260 | { | |
3261 | reg_use_count = 0; | |
710ee3ed | 3262 | note_uses (&PATTERN (insn), local_cprop_find_used_regs, NULL); |
ae860ff7 | 3263 | if (note) |
710ee3ed | 3264 | local_cprop_find_used_regs (&XEXP (note, 0), NULL); |
ae860ff7 JH |
3265 | |
3266 | for (reg_used = ®_use_table[0]; reg_use_count > 0; | |
3267 | reg_used++, reg_use_count--) | |
8ba46434 R |
3268 | if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps, |
3269 | libcall_sp)) | |
1649d92f JH |
3270 | { |
3271 | changed = true; | |
3272 | break; | |
3273 | } | |
bc6688b4 RS |
3274 | if (INSN_DELETED_P (insn)) |
3275 | break; | |
ae860ff7 JH |
3276 | } |
3277 | while (reg_use_count); | |
3278 | } | |
3279 | cselib_process_insn (insn); | |
3280 | } | |
3281 | cselib_finish (); | |
1649d92f JH |
3282 | /* Global analysis may get into infinite loops for unreachable blocks. */ |
3283 | if (changed && alter_jumps) | |
5f0bea72 JH |
3284 | { |
3285 | delete_unreachable_blocks (); | |
3286 | free_reg_set_mem (); | |
3287 | alloc_reg_set_mem (max_reg_num ()); | |
3288 | compute_sets (get_insns ()); | |
3289 | } | |
ae860ff7 JH |
3290 | } |
3291 | ||
c4c81601 | 3292 | /* Forward propagate copies. This includes copies and constants. Return |
cc2902df | 3293 | nonzero if a change was made. */ |
7506f491 DE |
3294 | |
3295 | static int | |
1d088dee | 3296 | cprop (int alter_jumps) |
7506f491 | 3297 | { |
e0082a72 ZD |
3298 | int changed; |
3299 | basic_block bb; | |
7506f491 DE |
3300 | rtx insn; |
3301 | ||
3302 | /* Note we start at block 1. */ | |
e0082a72 ZD |
3303 | if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR) |
3304 | { | |
3305 | if (gcse_file != NULL) | |
3306 | fprintf (gcse_file, "\n"); | |
3307 | return 0; | |
3308 | } | |
7506f491 DE |
3309 | |
3310 | changed = 0; | |
e0082a72 | 3311 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb) |
7506f491 DE |
3312 | { |
3313 | /* Reset tables used to keep track of what's still valid [since the | |
3314 | start of the block]. */ | |
3315 | reset_opr_set_tables (); | |
3316 | ||
a813c111 SB |
3317 | for (insn = BB_HEAD (bb); |
3318 | insn != NULL && insn != NEXT_INSN (BB_END (bb)); | |
7506f491 | 3319 | insn = NEXT_INSN (insn)) |
172890a2 RK |
3320 | if (INSN_P (insn)) |
3321 | { | |
ae860ff7 | 3322 | changed |= cprop_insn (insn, alter_jumps); |
7506f491 | 3323 | |
172890a2 RK |
3324 | /* Keep track of everything modified by this insn. */ |
3325 | /* ??? Need to be careful w.r.t. mods done to INSN. Don't | |
3326 | call mark_oprs_set if we turned the insn into a NOTE. */ | |
7b1b4aed | 3327 | if (! NOTE_P (insn)) |
172890a2 | 3328 | mark_oprs_set (insn); |
8e42ace1 | 3329 | } |
7506f491 DE |
3330 | } |
3331 | ||
3332 | if (gcse_file != NULL) | |
3333 | fprintf (gcse_file, "\n"); | |
3334 | ||
3335 | return changed; | |
3336 | } | |
3337 | ||
fbef91d8 RS |
3338 | /* Similar to get_condition, only the resulting condition must be |
3339 | valid at JUMP, instead of at EARLIEST. | |
3340 | ||
3341 | This differs from noce_get_condition in ifcvt.c in that we prefer not to | |
3342 | settle for the condition variable in the jump instruction being integral. | |
3343 | We prefer to be able to record the value of a user variable, rather than | |
3344 | the value of a temporary used in a condition. This could be solved by | |
3345 | recording the value of *every* register scaned by canonicalize_condition, | |
3346 | but this would require some code reorganization. */ | |
3347 | ||
2fa4a849 | 3348 | rtx |
1d088dee | 3349 | fis_get_condition (rtx jump) |
fbef91d8 | 3350 | { |
45d09c02 | 3351 | return get_condition (jump, NULL, false, true); |
fbef91d8 RS |
3352 | } |
3353 | ||
b0656d8b JW |
3354 | /* Check the comparison COND to see if we can safely form an implicit set from |
3355 | it. COND is either an EQ or NE comparison. */ | |
3356 | ||
3357 | static bool | |
3358 | implicit_set_cond_p (rtx cond) | |
3359 | { | |
3360 | enum machine_mode mode = GET_MODE (XEXP (cond, 0)); | |
3361 | rtx cst = XEXP (cond, 1); | |
3362 | ||
3363 | /* We can't perform this optimization if either operand might be or might | |
3364 | contain a signed zero. */ | |
3365 | if (HONOR_SIGNED_ZEROS (mode)) | |
3366 | { | |
3367 | /* It is sufficient to check if CST is or contains a zero. We must | |
3368 | handle float, complex, and vector. If any subpart is a zero, then | |
3369 | the optimization can't be performed. */ | |
3370 | /* ??? The complex and vector checks are not implemented yet. We just | |
3371 | always return zero for them. */ | |
3372 | if (GET_CODE (cst) == CONST_DOUBLE) | |
3373 | { | |
3374 | REAL_VALUE_TYPE d; | |
3375 | REAL_VALUE_FROM_CONST_DOUBLE (d, cst); | |
3376 | if (REAL_VALUES_EQUAL (d, dconst0)) | |
3377 | return 0; | |
3378 | } | |
3379 | else | |
3380 | return 0; | |
3381 | } | |
3382 | ||
3383 | return gcse_constant_p (cst); | |
3384 | } | |
3385 | ||
fbef91d8 RS |
3386 | /* Find the implicit sets of a function. An "implicit set" is a constraint |
3387 | on the value of a variable, implied by a conditional jump. For example, | |
3388 | following "if (x == 2)", the then branch may be optimized as though the | |
3389 | conditional performed an "explicit set", in this example, "x = 2". This | |
3390 | function records the set patterns that are implicit at the start of each | |
3391 | basic block. */ | |
3392 | ||
3393 | static void | |
1d088dee | 3394 | find_implicit_sets (void) |
fbef91d8 RS |
3395 | { |
3396 | basic_block bb, dest; | |
3397 | unsigned int count; | |
3398 | rtx cond, new; | |
3399 | ||
3400 | count = 0; | |
3401 | FOR_EACH_BB (bb) | |
a98ebe2e | 3402 | /* Check for more than one successor. */ |
628f6a4e | 3403 | if (EDGE_COUNT (bb->succs) > 1) |
fbef91d8 | 3404 | { |
a813c111 | 3405 | cond = fis_get_condition (BB_END (bb)); |
fbef91d8 RS |
3406 | |
3407 | if (cond | |
3408 | && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE) | |
7b1b4aed | 3409 | && REG_P (XEXP (cond, 0)) |
fbef91d8 | 3410 | && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER |
b0656d8b | 3411 | && implicit_set_cond_p (cond)) |
fbef91d8 RS |
3412 | { |
3413 | dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest | |
3414 | : FALLTHRU_EDGE (bb)->dest; | |
3415 | ||
628f6a4e | 3416 | if (dest && EDGE_COUNT (dest->preds) == 1 |
fbef91d8 RS |
3417 | && dest != EXIT_BLOCK_PTR) |
3418 | { | |
3419 | new = gen_rtx_SET (VOIDmode, XEXP (cond, 0), | |
3420 | XEXP (cond, 1)); | |
3421 | implicit_sets[dest->index] = new; | |
3422 | if (gcse_file) | |
3423 | { | |
3424 | fprintf(gcse_file, "Implicit set of reg %d in ", | |
3425 | REGNO (XEXP (cond, 0))); | |
3426 | fprintf(gcse_file, "basic block %d\n", dest->index); | |
3427 | } | |
3428 | count++; | |
3429 | } | |
3430 | } | |
3431 | } | |
3432 | ||
3433 | if (gcse_file) | |
3434 | fprintf (gcse_file, "Found %d implicit sets\n", count); | |
3435 | } | |
3436 | ||
7506f491 | 3437 | /* Perform one copy/constant propagation pass. |
a0134312 RS |
3438 | PASS is the pass count. If CPROP_JUMPS is true, perform constant |
3439 | propagation into conditional jumps. If BYPASS_JUMPS is true, | |
3440 | perform conditional jump bypassing optimizations. */ | |
7506f491 DE |
3441 | |
3442 | static int | |
1d088dee | 3443 | one_cprop_pass (int pass, int cprop_jumps, int bypass_jumps) |
7506f491 DE |
3444 | { |
3445 | int changed = 0; | |
3446 | ||
27fb79ad SB |
3447 | global_const_prop_count = local_const_prop_count = 0; |
3448 | global_copy_prop_count = local_copy_prop_count = 0; | |
7506f491 | 3449 | |
a0134312 | 3450 | local_cprop_pass (cprop_jumps); |
ae860ff7 | 3451 | |
fbef91d8 | 3452 | /* Determine implicit sets. */ |
703ad42b | 3453 | implicit_sets = xcalloc (last_basic_block, sizeof (rtx)); |
fbef91d8 RS |
3454 | find_implicit_sets (); |
3455 | ||
02280659 ZD |
3456 | alloc_hash_table (max_cuid, &set_hash_table, 1); |
3457 | compute_hash_table (&set_hash_table); | |
fbef91d8 RS |
3458 | |
3459 | /* Free implicit_sets before peak usage. */ | |
3460 | free (implicit_sets); | |
3461 | implicit_sets = NULL; | |
3462 | ||
7506f491 | 3463 | if (gcse_file) |
02280659 ZD |
3464 | dump_hash_table (gcse_file, "SET", &set_hash_table); |
3465 | if (set_hash_table.n_elems > 0) | |
7506f491 | 3466 | { |
02280659 | 3467 | alloc_cprop_mem (last_basic_block, set_hash_table.n_elems); |
7506f491 | 3468 | compute_cprop_data (); |
a0134312 RS |
3469 | changed = cprop (cprop_jumps); |
3470 | if (bypass_jumps) | |
0e3f0221 | 3471 | changed |= bypass_conditional_jumps (); |
7506f491 DE |
3472 | free_cprop_mem (); |
3473 | } | |
c4c81601 | 3474 | |
02280659 | 3475 | free_hash_table (&set_hash_table); |
7506f491 DE |
3476 | |
3477 | if (gcse_file) | |
3478 | { | |
c4c81601 | 3479 | fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ", |
faed5cc3 | 3480 | current_function_name (), pass, bytes_used); |
27fb79ad SB |
3481 | fprintf (gcse_file, "%d local const props, %d local copy props\n\n", |
3482 | local_const_prop_count, local_copy_prop_count); | |
3483 | fprintf (gcse_file, "%d global const props, %d global copy props\n\n", | |
3484 | global_const_prop_count, global_copy_prop_count); | |
7506f491 | 3485 | } |
1649d92f JH |
3486 | /* Global analysis may get into infinite loops for unreachable blocks. */ |
3487 | if (changed && cprop_jumps) | |
3488 | delete_unreachable_blocks (); | |
7506f491 DE |
3489 | |
3490 | return changed; | |
3491 | } | |
3492 | \f | |
0e3f0221 RS |
3493 | /* Bypass conditional jumps. */ |
3494 | ||
7821bfc7 RS |
3495 | /* The value of last_basic_block at the beginning of the jump_bypass |
3496 | pass. The use of redirect_edge_and_branch_force may introduce new | |
3497 | basic blocks, but the data flow analysis is only valid for basic | |
3498 | block indices less than bypass_last_basic_block. */ | |
3499 | ||
3500 | static int bypass_last_basic_block; | |
3501 | ||
0e3f0221 RS |
3502 | /* Find a set of REGNO to a constant that is available at the end of basic |
3503 | block BB. Returns NULL if no such set is found. Based heavily upon | |
3504 | find_avail_set. */ | |
3505 | ||
3506 | static struct expr * | |
1d088dee | 3507 | find_bypass_set (int regno, int bb) |
0e3f0221 RS |
3508 | { |
3509 | struct expr *result = 0; | |
3510 | ||
3511 | for (;;) | |
3512 | { | |
3513 | rtx src; | |
ceda50e9 | 3514 | struct expr *set = lookup_set (regno, &set_hash_table); |
0e3f0221 RS |
3515 | |
3516 | while (set) | |
3517 | { | |
3518 | if (TEST_BIT (cprop_avout[bb], set->bitmap_index)) | |
3519 | break; | |
3520 | set = next_set (regno, set); | |
3521 | } | |
3522 | ||
3523 | if (set == 0) | |
3524 | break; | |
3525 | ||
282899df | 3526 | gcc_assert (GET_CODE (set->expr) == SET); |
0e3f0221 RS |
3527 | |
3528 | src = SET_SRC (set->expr); | |
6b2d1c9e | 3529 | if (gcse_constant_p (src)) |
0e3f0221 RS |
3530 | result = set; |
3531 | ||
7b1b4aed | 3532 | if (! REG_P (src)) |
0e3f0221 RS |
3533 | break; |
3534 | ||
3535 | regno = REGNO (src); | |
3536 | } | |
3537 | return result; | |
3538 | } | |
3539 | ||
3540 | ||
e129b3f9 RS |
3541 | /* Subroutine of bypass_block that checks whether a pseudo is killed by |
3542 | any of the instructions inserted on an edge. Jump bypassing places | |
3543 | condition code setters on CFG edges using insert_insn_on_edge. This | |
3544 | function is required to check that our data flow analysis is still | |
3545 | valid prior to commit_edge_insertions. */ | |
3546 | ||
3547 | static bool | |
1d088dee | 3548 | reg_killed_on_edge (rtx reg, edge e) |
e129b3f9 RS |
3549 | { |
3550 | rtx insn; | |
3551 | ||
6de9cd9a | 3552 | for (insn = e->insns.r; insn; insn = NEXT_INSN (insn)) |
e129b3f9 RS |
3553 | if (INSN_P (insn) && reg_set_p (reg, insn)) |
3554 | return true; | |
3555 | ||
3556 | return false; | |
3557 | } | |
3558 | ||
0e3f0221 RS |
3559 | /* Subroutine of bypass_conditional_jumps that attempts to bypass the given |
3560 | basic block BB which has more than one predecessor. If not NULL, SETCC | |
3561 | is the first instruction of BB, which is immediately followed by JUMP_INSN | |
3562 | JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB. | |
e129b3f9 RS |
3563 | Returns nonzero if a change was made. |
3564 | ||
e0bb17a8 | 3565 | During the jump bypassing pass, we may place copies of SETCC instructions |
e129b3f9 RS |
3566 | on CFG edges. The following routine must be careful to pay attention to |
3567 | these inserted insns when performing its transformations. */ | |
0e3f0221 RS |
3568 | |
3569 | static int | |
1d088dee | 3570 | bypass_block (basic_block bb, rtx setcc, rtx jump) |
0e3f0221 RS |
3571 | { |
3572 | rtx insn, note; | |
628f6a4e | 3573 | edge e, edest; |
818b6b7f | 3574 | int i, change; |
72b8d451 | 3575 | int may_be_loop_header; |
628f6a4e BE |
3576 | unsigned removed_p; |
3577 | edge_iterator ei; | |
0e3f0221 RS |
3578 | |
3579 | insn = (setcc != NULL) ? setcc : jump; | |
3580 | ||
3581 | /* Determine set of register uses in INSN. */ | |
3582 | reg_use_count = 0; | |
3583 | note_uses (&PATTERN (insn), find_used_regs, NULL); | |
3584 | note = find_reg_equal_equiv_note (insn); | |
3585 | if (note) | |
3586 | find_used_regs (&XEXP (note, 0), NULL); | |
3587 | ||
72b8d451 | 3588 | may_be_loop_header = false; |
628f6a4e | 3589 | FOR_EACH_EDGE (e, ei, bb->preds) |
72b8d451 ZD |
3590 | if (e->flags & EDGE_DFS_BACK) |
3591 | { | |
3592 | may_be_loop_header = true; | |
3593 | break; | |
3594 | } | |
3595 | ||
0e3f0221 | 3596 | change = 0; |
628f6a4e | 3597 | for (ei = ei_start (bb->preds); (e = ei_safe_edge (ei)); ) |
0e3f0221 | 3598 | { |
628f6a4e BE |
3599 | removed_p = 0; |
3600 | ||
7821bfc7 | 3601 | if (e->flags & EDGE_COMPLEX) |
628f6a4e BE |
3602 | { |
3603 | ei_next (&ei); | |
3604 | continue; | |
3605 | } | |
7821bfc7 RS |
3606 | |
3607 | /* We can't redirect edges from new basic blocks. */ | |
3608 | if (e->src->index >= bypass_last_basic_block) | |
628f6a4e BE |
3609 | { |
3610 | ei_next (&ei); | |
3611 | continue; | |
3612 | } | |
7821bfc7 | 3613 | |
72b8d451 | 3614 | /* The irreducible loops created by redirecting of edges entering the |
e0bb17a8 KH |
3615 | loop from outside would decrease effectiveness of some of the following |
3616 | optimizations, so prevent this. */ | |
72b8d451 ZD |
3617 | if (may_be_loop_header |
3618 | && !(e->flags & EDGE_DFS_BACK)) | |
628f6a4e BE |
3619 | { |
3620 | ei_next (&ei); | |
3621 | continue; | |
3622 | } | |
72b8d451 | 3623 | |
0e3f0221 RS |
3624 | for (i = 0; i < reg_use_count; i++) |
3625 | { | |
3626 | struct reg_use *reg_used = ®_use_table[i]; | |
589005ff | 3627 | unsigned int regno = REGNO (reg_used->reg_rtx); |
818b6b7f | 3628 | basic_block dest, old_dest; |
589005ff KH |
3629 | struct expr *set; |
3630 | rtx src, new; | |
0e3f0221 | 3631 | |
589005ff KH |
3632 | if (regno >= max_gcse_regno) |
3633 | continue; | |
0e3f0221 | 3634 | |
589005ff | 3635 | set = find_bypass_set (regno, e->src->index); |
0e3f0221 RS |
3636 | |
3637 | if (! set) | |
3638 | continue; | |
3639 | ||
e129b3f9 | 3640 | /* Check the data flow is valid after edge insertions. */ |
6de9cd9a | 3641 | if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e)) |
e129b3f9 RS |
3642 | continue; |
3643 | ||
589005ff | 3644 | src = SET_SRC (pc_set (jump)); |
0e3f0221 RS |
3645 | |
3646 | if (setcc != NULL) | |
3647 | src = simplify_replace_rtx (src, | |
589005ff KH |
3648 | SET_DEST (PATTERN (setcc)), |
3649 | SET_SRC (PATTERN (setcc))); | |
0e3f0221 RS |
3650 | |
3651 | new = simplify_replace_rtx (src, reg_used->reg_rtx, | |
589005ff | 3652 | SET_SRC (set->expr)); |
0e3f0221 | 3653 | |
1d088dee | 3654 | /* Jump bypassing may have already placed instructions on |
e129b3f9 RS |
3655 | edges of the CFG. We can't bypass an outgoing edge that |
3656 | has instructions associated with it, as these insns won't | |
3657 | get executed if the incoming edge is redirected. */ | |
3658 | ||
589005ff | 3659 | if (new == pc_rtx) |
e129b3f9 RS |
3660 | { |
3661 | edest = FALLTHRU_EDGE (bb); | |
6de9cd9a | 3662 | dest = edest->insns.r ? NULL : edest->dest; |
e129b3f9 | 3663 | } |
0e3f0221 | 3664 | else if (GET_CODE (new) == LABEL_REF) |
e129b3f9 | 3665 | { |
628f6a4e BE |
3666 | edge_iterator ei2; |
3667 | ||
e129b3f9 RS |
3668 | dest = BLOCK_FOR_INSN (XEXP (new, 0)); |
3669 | /* Don't bypass edges containing instructions. */ | |
628f6a4e | 3670 | FOR_EACH_EDGE (edest, ei2, bb->succs) |
6de9cd9a | 3671 | if (edest->dest == dest && edest->insns.r) |
e129b3f9 RS |
3672 | { |
3673 | dest = NULL; | |
3674 | break; | |
3675 | } | |
3676 | } | |
0e3f0221 RS |
3677 | else |
3678 | dest = NULL; | |
3679 | ||
a544524a JH |
3680 | /* Avoid unification of the edge with other edges from original |
3681 | branch. We would end up emitting the instruction on "both" | |
3682 | edges. */ | |
7b1b4aed | 3683 | |
f0cad2d5 | 3684 | if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc)))) |
a544524a JH |
3685 | { |
3686 | edge e2; | |
628f6a4e BE |
3687 | edge_iterator ei2; |
3688 | ||
3689 | FOR_EACH_EDGE (e2, ei2, e->src->succs) | |
a544524a JH |
3690 | if (e2->dest == dest) |
3691 | { | |
3692 | dest = NULL; | |
3693 | break; | |
3694 | } | |
3695 | } | |
3696 | ||
818b6b7f | 3697 | old_dest = e->dest; |
7821bfc7 RS |
3698 | if (dest != NULL |
3699 | && dest != old_dest | |
3700 | && dest != EXIT_BLOCK_PTR) | |
3701 | { | |
3702 | redirect_edge_and_branch_force (e, dest); | |
3703 | ||
818b6b7f | 3704 | /* Copy the register setter to the redirected edge. |
0e3f0221 RS |
3705 | Don't copy CC0 setters, as CC0 is dead after jump. */ |
3706 | if (setcc) | |
3707 | { | |
3708 | rtx pat = PATTERN (setcc); | |
818b6b7f | 3709 | if (!CC0_P (SET_DEST (pat))) |
0e3f0221 RS |
3710 | insert_insn_on_edge (copy_insn (pat), e); |
3711 | } | |
3712 | ||
3713 | if (gcse_file != NULL) | |
3714 | { | |
27fb79ad SB |
3715 | fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d " |
3716 | "in jump_insn %d equals constant ", | |
818b6b7f | 3717 | regno, INSN_UID (jump)); |
0e3f0221 RS |
3718 | print_rtl (gcse_file, SET_SRC (set->expr)); |
3719 | fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n", | |
818b6b7f | 3720 | e->src->index, old_dest->index, dest->index); |
0e3f0221 RS |
3721 | } |
3722 | change = 1; | |
628f6a4e | 3723 | removed_p = 1; |
0e3f0221 RS |
3724 | break; |
3725 | } | |
3726 | } | |
628f6a4e BE |
3727 | if (!removed_p) |
3728 | ei_next (&ei); | |
0e3f0221 RS |
3729 | } |
3730 | return change; | |
3731 | } | |
3732 | ||
3733 | /* Find basic blocks with more than one predecessor that only contain a | |
3734 | single conditional jump. If the result of the comparison is known at | |
3735 | compile-time from any incoming edge, redirect that edge to the | |
9a71ece1 RH |
3736 | appropriate target. Returns nonzero if a change was made. |
3737 | ||
3738 | This function is now mis-named, because we also handle indirect jumps. */ | |
0e3f0221 RS |
3739 | |
3740 | static int | |
1d088dee | 3741 | bypass_conditional_jumps (void) |
0e3f0221 RS |
3742 | { |
3743 | basic_block bb; | |
3744 | int changed; | |
3745 | rtx setcc; | |
3746 | rtx insn; | |
3747 | rtx dest; | |
3748 | ||
3749 | /* Note we start at block 1. */ | |
3750 | if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR) | |
3751 | return 0; | |
3752 | ||
7821bfc7 | 3753 | bypass_last_basic_block = last_basic_block; |
72b8d451 | 3754 | mark_dfs_back_edges (); |
7821bfc7 | 3755 | |
0e3f0221 RS |
3756 | changed = 0; |
3757 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, | |
589005ff | 3758 | EXIT_BLOCK_PTR, next_bb) |
0e3f0221 RS |
3759 | { |
3760 | /* Check for more than one predecessor. */ | |
628f6a4e | 3761 | if (EDGE_COUNT (bb->preds) > 1) |
0e3f0221 RS |
3762 | { |
3763 | setcc = NULL_RTX; | |
a813c111 SB |
3764 | for (insn = BB_HEAD (bb); |
3765 | insn != NULL && insn != NEXT_INSN (BB_END (bb)); | |
0e3f0221 | 3766 | insn = NEXT_INSN (insn)) |
4b4bf941 | 3767 | if (NONJUMP_INSN_P (insn)) |
0e3f0221 | 3768 | { |
9543a9d2 | 3769 | if (setcc) |
0e3f0221 | 3770 | break; |
ba4f7968 | 3771 | if (GET_CODE (PATTERN (insn)) != SET) |
0e3f0221 RS |
3772 | break; |
3773 | ||
ba4f7968 | 3774 | dest = SET_DEST (PATTERN (insn)); |
818b6b7f | 3775 | if (REG_P (dest) || CC0_P (dest)) |
0e3f0221 | 3776 | setcc = insn; |
0e3f0221 RS |
3777 | else |
3778 | break; | |
3779 | } | |
7b1b4aed | 3780 | else if (JUMP_P (insn)) |
0e3f0221 | 3781 | { |
9a71ece1 RH |
3782 | if ((any_condjump_p (insn) || computed_jump_p (insn)) |
3783 | && onlyjump_p (insn)) | |
0e3f0221 RS |
3784 | changed |= bypass_block (bb, setcc, insn); |
3785 | break; | |
3786 | } | |
3787 | else if (INSN_P (insn)) | |
3788 | break; | |
3789 | } | |
3790 | } | |
3791 | ||
818b6b7f | 3792 | /* If we bypassed any register setting insns, we inserted a |
fbe5a4a6 | 3793 | copy on the redirected edge. These need to be committed. */ |
0e3f0221 RS |
3794 | if (changed) |
3795 | commit_edge_insertions(); | |
3796 | ||
3797 | return changed; | |
3798 | } | |
3799 | \f | |
a65f3558 | 3800 | /* Compute PRE+LCM working variables. */ |
7506f491 DE |
3801 | |
3802 | /* Local properties of expressions. */ | |
3803 | /* Nonzero for expressions that are transparent in the block. */ | |
a65f3558 | 3804 | static sbitmap *transp; |
7506f491 | 3805 | |
5c35539b RH |
3806 | /* Nonzero for expressions that are transparent at the end of the block. |
3807 | This is only zero for expressions killed by abnormal critical edge | |
3808 | created by a calls. */ | |
a65f3558 | 3809 | static sbitmap *transpout; |
5c35539b | 3810 | |
a65f3558 JL |
3811 | /* Nonzero for expressions that are computed (available) in the block. */ |
3812 | static sbitmap *comp; | |
7506f491 | 3813 | |
a65f3558 JL |
3814 | /* Nonzero for expressions that are locally anticipatable in the block. */ |
3815 | static sbitmap *antloc; | |
7506f491 | 3816 | |
a65f3558 JL |
3817 | /* Nonzero for expressions where this block is an optimal computation |
3818 | point. */ | |
3819 | static sbitmap *pre_optimal; | |
5c35539b | 3820 | |
a65f3558 JL |
3821 | /* Nonzero for expressions which are redundant in a particular block. */ |
3822 | static sbitmap *pre_redundant; | |
7506f491 | 3823 | |
a42cd965 AM |
3824 | /* Nonzero for expressions which should be inserted on a specific edge. */ |
3825 | static sbitmap *pre_insert_map; | |
3826 | ||
3827 | /* Nonzero for expressions which should be deleted in a specific block. */ | |
3828 | static sbitmap *pre_delete_map; | |
3829 | ||
3830 | /* Contains the edge_list returned by pre_edge_lcm. */ | |
3831 | static struct edge_list *edge_list; | |
3832 | ||
a65f3558 JL |
3833 | /* Redundant insns. */ |
3834 | static sbitmap pre_redundant_insns; | |
7506f491 | 3835 | |
a65f3558 | 3836 | /* Allocate vars used for PRE analysis. */ |
7506f491 DE |
3837 | |
3838 | static void | |
1d088dee | 3839 | alloc_pre_mem (int n_blocks, int n_exprs) |
7506f491 | 3840 | { |
a65f3558 JL |
3841 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); |
3842 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
3843 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
5faf03ae | 3844 | |
a42cd965 AM |
3845 | pre_optimal = NULL; |
3846 | pre_redundant = NULL; | |
3847 | pre_insert_map = NULL; | |
3848 | pre_delete_map = NULL; | |
a42cd965 | 3849 | ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs); |
c4c81601 | 3850 | |
a42cd965 | 3851 | /* pre_insert and pre_delete are allocated later. */ |
7506f491 DE |
3852 | } |
3853 | ||
a65f3558 | 3854 | /* Free vars used for PRE analysis. */ |
7506f491 DE |
3855 | |
3856 | static void | |
1d088dee | 3857 | free_pre_mem (void) |
7506f491 | 3858 | { |
5a660bff DB |
3859 | sbitmap_vector_free (transp); |
3860 | sbitmap_vector_free (comp); | |
bd3675fc JL |
3861 | |
3862 | /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */ | |
7506f491 | 3863 | |
a42cd965 | 3864 | if (pre_optimal) |
5a660bff | 3865 | sbitmap_vector_free (pre_optimal); |
a42cd965 | 3866 | if (pre_redundant) |
5a660bff | 3867 | sbitmap_vector_free (pre_redundant); |
a42cd965 | 3868 | if (pre_insert_map) |
5a660bff | 3869 | sbitmap_vector_free (pre_insert_map); |
a42cd965 | 3870 | if (pre_delete_map) |
5a660bff | 3871 | sbitmap_vector_free (pre_delete_map); |
a42cd965 | 3872 | |
bd3675fc | 3873 | transp = comp = NULL; |
a42cd965 | 3874 | pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL; |
7506f491 DE |
3875 | } |
3876 | ||
3877 | /* Top level routine to do the dataflow analysis needed by PRE. */ | |
3878 | ||
3879 | static void | |
1d088dee | 3880 | compute_pre_data (void) |
7506f491 | 3881 | { |
b614171e | 3882 | sbitmap trapping_expr; |
e0082a72 | 3883 | basic_block bb; |
b614171e | 3884 | unsigned int ui; |
c66e8ae9 | 3885 | |
02280659 | 3886 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
d55bc081 | 3887 | sbitmap_vector_zero (ae_kill, last_basic_block); |
c66e8ae9 | 3888 | |
b614171e | 3889 | /* Collect expressions which might trap. */ |
02280659 | 3890 | trapping_expr = sbitmap_alloc (expr_hash_table.n_elems); |
b614171e | 3891 | sbitmap_zero (trapping_expr); |
02280659 | 3892 | for (ui = 0; ui < expr_hash_table.size; ui++) |
b614171e MM |
3893 | { |
3894 | struct expr *e; | |
02280659 | 3895 | for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash) |
b614171e MM |
3896 | if (may_trap_p (e->expr)) |
3897 | SET_BIT (trapping_expr, e->bitmap_index); | |
3898 | } | |
3899 | ||
c66e8ae9 JL |
3900 | /* Compute ae_kill for each basic block using: |
3901 | ||
3902 | ~(TRANSP | COMP) | |
e83f4801 | 3903 | */ |
c66e8ae9 | 3904 | |
e0082a72 | 3905 | FOR_EACH_BB (bb) |
c66e8ae9 | 3906 | { |
b614171e | 3907 | edge e; |
628f6a4e | 3908 | edge_iterator ei; |
b614171e MM |
3909 | |
3910 | /* If the current block is the destination of an abnormal edge, we | |
3911 | kill all trapping expressions because we won't be able to properly | |
3912 | place the instruction on the edge. So make them neither | |
3913 | anticipatable nor transparent. This is fairly conservative. */ | |
628f6a4e | 3914 | FOR_EACH_EDGE (e, ei, bb->preds) |
b614171e MM |
3915 | if (e->flags & EDGE_ABNORMAL) |
3916 | { | |
e0082a72 ZD |
3917 | sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr); |
3918 | sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr); | |
b614171e MM |
3919 | break; |
3920 | } | |
3921 | ||
e0082a72 ZD |
3922 | sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]); |
3923 | sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]); | |
c66e8ae9 JL |
3924 | } |
3925 | ||
02280659 | 3926 | edge_list = pre_edge_lcm (gcse_file, expr_hash_table.n_elems, transp, comp, antloc, |
a42cd965 | 3927 | ae_kill, &pre_insert_map, &pre_delete_map); |
5a660bff | 3928 | sbitmap_vector_free (antloc); |
bd3675fc | 3929 | antloc = NULL; |
5a660bff | 3930 | sbitmap_vector_free (ae_kill); |
589005ff | 3931 | ae_kill = NULL; |
76ac938b | 3932 | sbitmap_free (trapping_expr); |
7506f491 DE |
3933 | } |
3934 | \f | |
3935 | /* PRE utilities */ | |
3936 | ||
cc2902df | 3937 | /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach |
a65f3558 | 3938 | block BB. |
7506f491 DE |
3939 | |
3940 | VISITED is a pointer to a working buffer for tracking which BB's have | |
3941 | been visited. It is NULL for the top-level call. | |
3942 | ||
3943 | We treat reaching expressions that go through blocks containing the same | |
3944 | reaching expression as "not reaching". E.g. if EXPR is generated in blocks | |
3945 | 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block | |
3946 | 2 as not reaching. The intent is to improve the probability of finding | |
3947 | only one reaching expression and to reduce register lifetimes by picking | |
3948 | the closest such expression. */ | |
3949 | ||
3950 | static int | |
1d088dee | 3951 | pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited) |
7506f491 | 3952 | { |
36349f8b | 3953 | edge pred; |
628f6a4e BE |
3954 | edge_iterator ei; |
3955 | ||
3956 | FOR_EACH_EDGE (pred, ei, bb->preds) | |
7506f491 | 3957 | { |
e2d2ed72 | 3958 | basic_block pred_bb = pred->src; |
7506f491 | 3959 | |
36349f8b | 3960 | if (pred->src == ENTRY_BLOCK_PTR |
7506f491 | 3961 | /* Has predecessor has already been visited? */ |
0b17ab2f | 3962 | || visited[pred_bb->index]) |
c4c81601 RK |
3963 | ;/* Nothing to do. */ |
3964 | ||
7506f491 | 3965 | /* Does this predecessor generate this expression? */ |
0b17ab2f | 3966 | else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index)) |
7506f491 DE |
3967 | { |
3968 | /* Is this the occurrence we're looking for? | |
3969 | Note that there's only one generating occurrence per block | |
3970 | so we just need to check the block number. */ | |
a65f3558 | 3971 | if (occr_bb == pred_bb) |
7506f491 | 3972 | return 1; |
c4c81601 | 3973 | |
0b17ab2f | 3974 | visited[pred_bb->index] = 1; |
7506f491 DE |
3975 | } |
3976 | /* Ignore this predecessor if it kills the expression. */ | |
0b17ab2f RH |
3977 | else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index)) |
3978 | visited[pred_bb->index] = 1; | |
c4c81601 | 3979 | |
7506f491 DE |
3980 | /* Neither gen nor kill. */ |
3981 | else | |
ac7c5af5 | 3982 | { |
0b17ab2f | 3983 | visited[pred_bb->index] = 1; |
89e606c9 | 3984 | if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited)) |
7506f491 | 3985 | return 1; |
ac7c5af5 | 3986 | } |
7506f491 DE |
3987 | } |
3988 | ||
3989 | /* All paths have been checked. */ | |
3990 | return 0; | |
3991 | } | |
283a2545 RL |
3992 | |
3993 | /* The wrapper for pre_expr_reaches_here_work that ensures that any | |
dc297297 | 3994 | memory allocated for that function is returned. */ |
283a2545 RL |
3995 | |
3996 | static int | |
1d088dee | 3997 | pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb) |
283a2545 RL |
3998 | { |
3999 | int rval; | |
703ad42b | 4000 | char *visited = xcalloc (last_basic_block, 1); |
283a2545 | 4001 | |
8e42ace1 | 4002 | rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited); |
283a2545 RL |
4003 | |
4004 | free (visited); | |
c4c81601 | 4005 | return rval; |
283a2545 | 4006 | } |
7506f491 | 4007 | \f |
a42cd965 AM |
4008 | |
4009 | /* Given an expr, generate RTL which we can insert at the end of a BB, | |
589005ff | 4010 | or on an edge. Set the block number of any insns generated to |
a42cd965 AM |
4011 | the value of BB. */ |
4012 | ||
4013 | static rtx | |
1d088dee | 4014 | process_insert_insn (struct expr *expr) |
a42cd965 AM |
4015 | { |
4016 | rtx reg = expr->reaching_reg; | |
fb0c0a12 RK |
4017 | rtx exp = copy_rtx (expr->expr); |
4018 | rtx pat; | |
a42cd965 AM |
4019 | |
4020 | start_sequence (); | |
fb0c0a12 RK |
4021 | |
4022 | /* If the expression is something that's an operand, like a constant, | |
4023 | just copy it to a register. */ | |
4024 | if (general_operand (exp, GET_MODE (reg))) | |
4025 | emit_move_insn (reg, exp); | |
4026 | ||
4027 | /* Otherwise, make a new insn to compute this expression and make sure the | |
4028 | insn will be recognized (this also adds any needed CLOBBERs). Copy the | |
4029 | expression to make sure we don't have any sharing issues. */ | |
282899df NS |
4030 | else |
4031 | { | |
4032 | rtx insn = emit_insn (gen_rtx_SET (VOIDmode, reg, exp)); | |
4033 | ||
2f021b67 AP |
4034 | if (insn_invalid_p (insn)) |
4035 | gcc_unreachable (); | |
282899df NS |
4036 | } |
4037 | ||
589005ff | 4038 | |
2f937369 | 4039 | pat = get_insns (); |
a42cd965 AM |
4040 | end_sequence (); |
4041 | ||
4042 | return pat; | |
4043 | } | |
589005ff | 4044 | |
a65f3558 JL |
4045 | /* Add EXPR to the end of basic block BB. |
4046 | ||
4047 | This is used by both the PRE and code hoisting. | |
4048 | ||
4049 | For PRE, we want to verify that the expr is either transparent | |
4050 | or locally anticipatable in the target block. This check makes | |
4051 | no sense for code hoisting. */ | |
7506f491 DE |
4052 | |
4053 | static void | |
1d088dee | 4054 | insert_insn_end_bb (struct expr *expr, basic_block bb, int pre) |
7506f491 | 4055 | { |
a813c111 | 4056 | rtx insn = BB_END (bb); |
7506f491 DE |
4057 | rtx new_insn; |
4058 | rtx reg = expr->reaching_reg; | |
4059 | int regno = REGNO (reg); | |
2f937369 | 4060 | rtx pat, pat_end; |
7506f491 | 4061 | |
a42cd965 | 4062 | pat = process_insert_insn (expr); |
282899df | 4063 | gcc_assert (pat && INSN_P (pat)); |
2f937369 DM |
4064 | |
4065 | pat_end = pat; | |
4066 | while (NEXT_INSN (pat_end) != NULL_RTX) | |
4067 | pat_end = NEXT_INSN (pat_end); | |
7506f491 DE |
4068 | |
4069 | /* If the last insn is a jump, insert EXPR in front [taking care to | |
4d6922ee | 4070 | handle cc0, etc. properly]. Similarly we need to care trapping |
068473ec | 4071 | instructions in presence of non-call exceptions. */ |
7506f491 | 4072 | |
7b1b4aed | 4073 | if (JUMP_P (insn) |
4b4bf941 | 4074 | || (NONJUMP_INSN_P (insn) |
628f6a4e BE |
4075 | && (EDGE_COUNT (bb->succs) > 1 |
4076 | || EDGE_SUCC (bb, 0)->flags & EDGE_ABNORMAL))) | |
7506f491 | 4077 | { |
50b2596f | 4078 | #ifdef HAVE_cc0 |
7506f491 | 4079 | rtx note; |
50b2596f | 4080 | #endif |
068473ec JH |
4081 | /* It should always be the case that we can put these instructions |
4082 | anywhere in the basic block with performing PRE optimizations. | |
4083 | Check this. */ | |
282899df NS |
4084 | gcc_assert (!NONJUMP_INSN_P (insn) || !pre |
4085 | || TEST_BIT (antloc[bb->index], expr->bitmap_index) | |
4086 | || TEST_BIT (transp[bb->index], expr->bitmap_index)); | |
7506f491 DE |
4087 | |
4088 | /* If this is a jump table, then we can't insert stuff here. Since | |
4089 | we know the previous real insn must be the tablejump, we insert | |
4090 | the new instruction just before the tablejump. */ | |
4091 | if (GET_CODE (PATTERN (insn)) == ADDR_VEC | |
4092 | || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
4093 | insn = prev_real_insn (insn); | |
4094 | ||
4095 | #ifdef HAVE_cc0 | |
4096 | /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts | |
4097 | if cc0 isn't set. */ | |
4098 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
4099 | if (note) | |
4100 | insn = XEXP (note, 0); | |
4101 | else | |
4102 | { | |
4103 | rtx maybe_cc0_setter = prev_nonnote_insn (insn); | |
4104 | if (maybe_cc0_setter | |
2c3c49de | 4105 | && INSN_P (maybe_cc0_setter) |
7506f491 DE |
4106 | && sets_cc0_p (PATTERN (maybe_cc0_setter))) |
4107 | insn = maybe_cc0_setter; | |
4108 | } | |
4109 | #endif | |
4110 | /* FIXME: What if something in cc0/jump uses value set in new insn? */ | |
3c030e88 | 4111 | new_insn = emit_insn_before (pat, insn); |
3947e2f9 | 4112 | } |
c4c81601 | 4113 | |
3947e2f9 RH |
4114 | /* Likewise if the last insn is a call, as will happen in the presence |
4115 | of exception handling. */ | |
7b1b4aed | 4116 | else if (CALL_P (insn) |
628f6a4e | 4117 | && (EDGE_COUNT (bb->succs) > 1 || EDGE_SUCC (bb, 0)->flags & EDGE_ABNORMAL)) |
3947e2f9 | 4118 | { |
3947e2f9 RH |
4119 | /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers, |
4120 | we search backward and place the instructions before the first | |
4121 | parameter is loaded. Do this for everyone for consistency and a | |
fbe5a4a6 | 4122 | presumption that we'll get better code elsewhere as well. |
3947e2f9 | 4123 | |
c4c81601 | 4124 | It should always be the case that we can put these instructions |
a65f3558 JL |
4125 | anywhere in the basic block with performing PRE optimizations. |
4126 | Check this. */ | |
c4c81601 | 4127 | |
282899df NS |
4128 | gcc_assert (!pre |
4129 | || TEST_BIT (antloc[bb->index], expr->bitmap_index) | |
4130 | || TEST_BIT (transp[bb->index], expr->bitmap_index)); | |
3947e2f9 RH |
4131 | |
4132 | /* Since different machines initialize their parameter registers | |
4133 | in different orders, assume nothing. Collect the set of all | |
4134 | parameter registers. */ | |
a813c111 | 4135 | insn = find_first_parameter_load (insn, BB_HEAD (bb)); |
3947e2f9 | 4136 | |
b1d26727 JL |
4137 | /* If we found all the parameter loads, then we want to insert |
4138 | before the first parameter load. | |
4139 | ||
4140 | If we did not find all the parameter loads, then we might have | |
4141 | stopped on the head of the block, which could be a CODE_LABEL. | |
4142 | If we inserted before the CODE_LABEL, then we would be putting | |
4143 | the insn in the wrong basic block. In that case, put the insn | |
b5229628 | 4144 | after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */ |
7b1b4aed | 4145 | while (LABEL_P (insn) |
589ca5cb | 4146 | || NOTE_INSN_BASIC_BLOCK_P (insn)) |
b5229628 | 4147 | insn = NEXT_INSN (insn); |
c4c81601 | 4148 | |
3c030e88 | 4149 | new_insn = emit_insn_before (pat, insn); |
7506f491 DE |
4150 | } |
4151 | else | |
3c030e88 | 4152 | new_insn = emit_insn_after (pat, insn); |
7506f491 | 4153 | |
2f937369 | 4154 | while (1) |
a65f3558 | 4155 | { |
2f937369 | 4156 | if (INSN_P (pat)) |
a65f3558 | 4157 | { |
2f937369 DM |
4158 | add_label_notes (PATTERN (pat), new_insn); |
4159 | note_stores (PATTERN (pat), record_set_info, pat); | |
a65f3558 | 4160 | } |
2f937369 DM |
4161 | if (pat == pat_end) |
4162 | break; | |
4163 | pat = NEXT_INSN (pat); | |
a65f3558 | 4164 | } |
3947e2f9 | 4165 | |
7506f491 DE |
4166 | gcse_create_count++; |
4167 | ||
4168 | if (gcse_file) | |
4169 | { | |
c4c81601 | 4170 | fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ", |
0b17ab2f | 4171 | bb->index, INSN_UID (new_insn)); |
c4c81601 RK |
4172 | fprintf (gcse_file, "copying expression %d to reg %d\n", |
4173 | expr->bitmap_index, regno); | |
7506f491 DE |
4174 | } |
4175 | } | |
4176 | ||
a42cd965 AM |
4177 | /* Insert partially redundant expressions on edges in the CFG to make |
4178 | the expressions fully redundant. */ | |
7506f491 | 4179 | |
a42cd965 | 4180 | static int |
1d088dee | 4181 | pre_edge_insert (struct edge_list *edge_list, struct expr **index_map) |
7506f491 | 4182 | { |
c4c81601 | 4183 | int e, i, j, num_edges, set_size, did_insert = 0; |
a65f3558 JL |
4184 | sbitmap *inserted; |
4185 | ||
a42cd965 AM |
4186 | /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge |
4187 | if it reaches any of the deleted expressions. */ | |
7506f491 | 4188 | |
a42cd965 AM |
4189 | set_size = pre_insert_map[0]->size; |
4190 | num_edges = NUM_EDGES (edge_list); | |
02280659 | 4191 | inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems); |
a42cd965 | 4192 | sbitmap_vector_zero (inserted, num_edges); |
7506f491 | 4193 | |
a42cd965 | 4194 | for (e = 0; e < num_edges; e++) |
7506f491 DE |
4195 | { |
4196 | int indx; | |
e2d2ed72 | 4197 | basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e); |
a65f3558 | 4198 | |
a65f3558 | 4199 | for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS) |
7506f491 | 4200 | { |
a42cd965 | 4201 | SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i]; |
7506f491 | 4202 | |
02280659 | 4203 | for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1) |
c4c81601 RK |
4204 | if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX) |
4205 | { | |
4206 | struct expr *expr = index_map[j]; | |
4207 | struct occr *occr; | |
a65f3558 | 4208 | |
ff7cc307 | 4209 | /* Now look at each deleted occurrence of this expression. */ |
c4c81601 RK |
4210 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
4211 | { | |
4212 | if (! occr->deleted_p) | |
4213 | continue; | |
4214 | ||
4215 | /* Insert this expression on this edge if if it would | |
ff7cc307 | 4216 | reach the deleted occurrence in BB. */ |
c4c81601 RK |
4217 | if (!TEST_BIT (inserted[e], j)) |
4218 | { | |
4219 | rtx insn; | |
4220 | edge eg = INDEX_EDGE (edge_list, e); | |
4221 | ||
4222 | /* We can't insert anything on an abnormal and | |
4223 | critical edge, so we insert the insn at the end of | |
4224 | the previous block. There are several alternatives | |
4225 | detailed in Morgans book P277 (sec 10.5) for | |
4226 | handling this situation. This one is easiest for | |
4227 | now. */ | |
4228 | ||
4229 | if ((eg->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL) | |
4230 | insert_insn_end_bb (index_map[j], bb, 0); | |
4231 | else | |
4232 | { | |
4233 | insn = process_insert_insn (index_map[j]); | |
4234 | insert_insn_on_edge (insn, eg); | |
4235 | } | |
4236 | ||
4237 | if (gcse_file) | |
4238 | { | |
4239 | fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ", | |
0b17ab2f RH |
4240 | bb->index, |
4241 | INDEX_EDGE_SUCC_BB (edge_list, e)->index); | |
c4c81601 RK |
4242 | fprintf (gcse_file, "copy expression %d\n", |
4243 | expr->bitmap_index); | |
4244 | } | |
4245 | ||
a13d4ebf | 4246 | update_ld_motion_stores (expr); |
c4c81601 RK |
4247 | SET_BIT (inserted[e], j); |
4248 | did_insert = 1; | |
4249 | gcse_create_count++; | |
4250 | } | |
4251 | } | |
4252 | } | |
7506f491 DE |
4253 | } |
4254 | } | |
5faf03ae | 4255 | |
5a660bff | 4256 | sbitmap_vector_free (inserted); |
a42cd965 | 4257 | return did_insert; |
7506f491 DE |
4258 | } |
4259 | ||
073089a7 | 4260 | /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG. |
b885908b MH |
4261 | Given "old_reg <- expr" (INSN), instead of adding after it |
4262 | reaching_reg <- old_reg | |
4263 | it's better to do the following: | |
4264 | reaching_reg <- expr | |
4265 | old_reg <- reaching_reg | |
4266 | because this way copy propagation can discover additional PRE | |
f5f2e3cd MH |
4267 | opportunities. But if this fails, we try the old way. |
4268 | When "expr" is a store, i.e. | |
4269 | given "MEM <- old_reg", instead of adding after it | |
4270 | reaching_reg <- old_reg | |
4271 | it's better to add it before as follows: | |
4272 | reaching_reg <- old_reg | |
4273 | MEM <- reaching_reg. */ | |
7506f491 DE |
4274 | |
4275 | static void | |
1d088dee | 4276 | pre_insert_copy_insn (struct expr *expr, rtx insn) |
7506f491 DE |
4277 | { |
4278 | rtx reg = expr->reaching_reg; | |
4279 | int regno = REGNO (reg); | |
4280 | int indx = expr->bitmap_index; | |
073089a7 RS |
4281 | rtx pat = PATTERN (insn); |
4282 | rtx set, new_insn; | |
b885908b | 4283 | rtx old_reg; |
073089a7 | 4284 | int i; |
7506f491 | 4285 | |
073089a7 | 4286 | /* This block matches the logic in hash_scan_insn. */ |
282899df | 4287 | switch (GET_CODE (pat)) |
073089a7 | 4288 | { |
282899df NS |
4289 | case SET: |
4290 | set = pat; | |
4291 | break; | |
4292 | ||
4293 | case PARALLEL: | |
073089a7 RS |
4294 | /* Search through the parallel looking for the set whose |
4295 | source was the expression that we're interested in. */ | |
4296 | set = NULL_RTX; | |
4297 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
4298 | { | |
4299 | rtx x = XVECEXP (pat, 0, i); | |
4300 | if (GET_CODE (x) == SET | |
4301 | && expr_equiv_p (SET_SRC (x), expr->expr)) | |
4302 | { | |
4303 | set = x; | |
4304 | break; | |
4305 | } | |
4306 | } | |
282899df NS |
4307 | break; |
4308 | ||
4309 | default: | |
4310 | gcc_unreachable (); | |
073089a7 | 4311 | } |
c4c81601 | 4312 | |
7b1b4aed | 4313 | if (REG_P (SET_DEST (set))) |
073089a7 | 4314 | { |
f5f2e3cd MH |
4315 | old_reg = SET_DEST (set); |
4316 | /* Check if we can modify the set destination in the original insn. */ | |
4317 | if (validate_change (insn, &SET_DEST (set), reg, 0)) | |
4318 | { | |
4319 | new_insn = gen_move_insn (old_reg, reg); | |
4320 | new_insn = emit_insn_after (new_insn, insn); | |
4321 | ||
4322 | /* Keep register set table up to date. */ | |
4323 | replace_one_set (REGNO (old_reg), insn, new_insn); | |
4324 | record_one_set (regno, insn); | |
4325 | } | |
4326 | else | |
4327 | { | |
4328 | new_insn = gen_move_insn (reg, old_reg); | |
4329 | new_insn = emit_insn_after (new_insn, insn); | |
073089a7 | 4330 | |
f5f2e3cd MH |
4331 | /* Keep register set table up to date. */ |
4332 | record_one_set (regno, new_insn); | |
4333 | } | |
073089a7 | 4334 | } |
f5f2e3cd | 4335 | else /* This is possible only in case of a store to memory. */ |
073089a7 | 4336 | { |
f5f2e3cd | 4337 | old_reg = SET_SRC (set); |
073089a7 | 4338 | new_insn = gen_move_insn (reg, old_reg); |
f5f2e3cd MH |
4339 | |
4340 | /* Check if we can modify the set source in the original insn. */ | |
4341 | if (validate_change (insn, &SET_SRC (set), reg, 0)) | |
4342 | new_insn = emit_insn_before (new_insn, insn); | |
4343 | else | |
4344 | new_insn = emit_insn_after (new_insn, insn); | |
c4c81601 | 4345 | |
073089a7 RS |
4346 | /* Keep register set table up to date. */ |
4347 | record_one_set (regno, new_insn); | |
4348 | } | |
7506f491 DE |
4349 | |
4350 | gcse_create_count++; | |
4351 | ||
4352 | if (gcse_file) | |
a42cd965 AM |
4353 | fprintf (gcse_file, |
4354 | "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n", | |
4355 | BLOCK_NUM (insn), INSN_UID (new_insn), indx, | |
4356 | INSN_UID (insn), regno); | |
7506f491 DE |
4357 | } |
4358 | ||
4359 | /* Copy available expressions that reach the redundant expression | |
4360 | to `reaching_reg'. */ | |
4361 | ||
4362 | static void | |
1d088dee | 4363 | pre_insert_copies (void) |
7506f491 | 4364 | { |
f5f2e3cd | 4365 | unsigned int i, added_copy; |
c4c81601 RK |
4366 | struct expr *expr; |
4367 | struct occr *occr; | |
4368 | struct occr *avail; | |
a65f3558 | 4369 | |
7506f491 DE |
4370 | /* For each available expression in the table, copy the result to |
4371 | `reaching_reg' if the expression reaches a deleted one. | |
4372 | ||
4373 | ??? The current algorithm is rather brute force. | |
4374 | Need to do some profiling. */ | |
4375 | ||
02280659 ZD |
4376 | for (i = 0; i < expr_hash_table.size; i++) |
4377 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 RK |
4378 | { |
4379 | /* If the basic block isn't reachable, PPOUT will be TRUE. However, | |
4380 | we don't want to insert a copy here because the expression may not | |
4381 | really be redundant. So only insert an insn if the expression was | |
4382 | deleted. This test also avoids further processing if the | |
4383 | expression wasn't deleted anywhere. */ | |
4384 | if (expr->reaching_reg == NULL) | |
4385 | continue; | |
7b1b4aed | 4386 | |
f5f2e3cd | 4387 | /* Set when we add a copy for that expression. */ |
7b1b4aed | 4388 | added_copy = 0; |
c4c81601 RK |
4389 | |
4390 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) | |
4391 | { | |
4392 | if (! occr->deleted_p) | |
4393 | continue; | |
7506f491 | 4394 | |
c4c81601 RK |
4395 | for (avail = expr->avail_occr; avail != NULL; avail = avail->next) |
4396 | { | |
4397 | rtx insn = avail->insn; | |
7506f491 | 4398 | |
c4c81601 RK |
4399 | /* No need to handle this one if handled already. */ |
4400 | if (avail->copied_p) | |
4401 | continue; | |
7506f491 | 4402 | |
c4c81601 RK |
4403 | /* Don't handle this one if it's a redundant one. */ |
4404 | if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn))) | |
4405 | continue; | |
7506f491 | 4406 | |
c4c81601 | 4407 | /* Or if the expression doesn't reach the deleted one. */ |
589005ff | 4408 | if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn), |
e2d2ed72 AM |
4409 | expr, |
4410 | BLOCK_FOR_INSN (occr->insn))) | |
c4c81601 | 4411 | continue; |
7506f491 | 4412 | |
f5f2e3cd MH |
4413 | added_copy = 1; |
4414 | ||
c4c81601 RK |
4415 | /* Copy the result of avail to reaching_reg. */ |
4416 | pre_insert_copy_insn (expr, insn); | |
4417 | avail->copied_p = 1; | |
4418 | } | |
4419 | } | |
f5f2e3cd | 4420 | |
7b1b4aed | 4421 | if (added_copy) |
f5f2e3cd | 4422 | update_ld_motion_stores (expr); |
c4c81601 | 4423 | } |
7506f491 DE |
4424 | } |
4425 | ||
10d1bb36 JH |
4426 | /* Emit move from SRC to DEST noting the equivalence with expression computed |
4427 | in INSN. */ | |
4428 | static rtx | |
1d088dee | 4429 | gcse_emit_move_after (rtx src, rtx dest, rtx insn) |
10d1bb36 JH |
4430 | { |
4431 | rtx new; | |
6bdb8dd6 | 4432 | rtx set = single_set (insn), set2; |
10d1bb36 JH |
4433 | rtx note; |
4434 | rtx eqv; | |
4435 | ||
4436 | /* This should never fail since we're creating a reg->reg copy | |
4437 | we've verified to be valid. */ | |
4438 | ||
6bdb8dd6 | 4439 | new = emit_insn_after (gen_move_insn (dest, src), insn); |
285464d0 | 4440 | |
10d1bb36 | 4441 | /* Note the equivalence for local CSE pass. */ |
6bdb8dd6 JH |
4442 | set2 = single_set (new); |
4443 | if (!set2 || !rtx_equal_p (SET_DEST (set2), dest)) | |
4444 | return new; | |
10d1bb36 JH |
4445 | if ((note = find_reg_equal_equiv_note (insn))) |
4446 | eqv = XEXP (note, 0); | |
4447 | else | |
4448 | eqv = SET_SRC (set); | |
4449 | ||
a500466b | 4450 | set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv)); |
10d1bb36 JH |
4451 | |
4452 | return new; | |
4453 | } | |
4454 | ||
7506f491 | 4455 | /* Delete redundant computations. |
7506f491 DE |
4456 | Deletion is done by changing the insn to copy the `reaching_reg' of |
4457 | the expression into the result of the SET. It is left to later passes | |
4458 | (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it. | |
4459 | ||
cc2902df | 4460 | Returns nonzero if a change is made. */ |
7506f491 DE |
4461 | |
4462 | static int | |
1d088dee | 4463 | pre_delete (void) |
7506f491 | 4464 | { |
2e653e39 | 4465 | unsigned int i; |
63bc1d05 | 4466 | int changed; |
c4c81601 RK |
4467 | struct expr *expr; |
4468 | struct occr *occr; | |
a65f3558 | 4469 | |
7506f491 | 4470 | changed = 0; |
02280659 | 4471 | for (i = 0; i < expr_hash_table.size; i++) |
073089a7 RS |
4472 | for (expr = expr_hash_table.table[i]; |
4473 | expr != NULL; | |
4474 | expr = expr->next_same_hash) | |
c4c81601 RK |
4475 | { |
4476 | int indx = expr->bitmap_index; | |
7506f491 | 4477 | |
c4c81601 RK |
4478 | /* We only need to search antic_occr since we require |
4479 | ANTLOC != 0. */ | |
7506f491 | 4480 | |
c4c81601 RK |
4481 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
4482 | { | |
4483 | rtx insn = occr->insn; | |
4484 | rtx set; | |
e2d2ed72 | 4485 | basic_block bb = BLOCK_FOR_INSN (insn); |
7506f491 | 4486 | |
073089a7 RS |
4487 | /* We only delete insns that have a single_set. */ |
4488 | if (TEST_BIT (pre_delete_map[bb->index], indx) | |
4489 | && (set = single_set (insn)) != 0) | |
c4c81601 | 4490 | { |
c4c81601 RK |
4491 | /* Create a pseudo-reg to store the result of reaching |
4492 | expressions into. Get the mode for the new pseudo from | |
4493 | the mode of the original destination pseudo. */ | |
4494 | if (expr->reaching_reg == NULL) | |
4495 | expr->reaching_reg | |
4496 | = gen_reg_rtx (GET_MODE (SET_DEST (set))); | |
4497 | ||
9b76aa3b | 4498 | gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn); |
10d1bb36 JH |
4499 | delete_insn (insn); |
4500 | occr->deleted_p = 1; | |
4501 | SET_BIT (pre_redundant_insns, INSN_CUID (insn)); | |
4502 | changed = 1; | |
4503 | gcse_subst_count++; | |
7506f491 | 4504 | |
c4c81601 RK |
4505 | if (gcse_file) |
4506 | { | |
4507 | fprintf (gcse_file, | |
4508 | "PRE: redundant insn %d (expression %d) in ", | |
4509 | INSN_UID (insn), indx); | |
4510 | fprintf (gcse_file, "bb %d, reaching reg is %d\n", | |
0b17ab2f | 4511 | bb->index, REGNO (expr->reaching_reg)); |
c4c81601 RK |
4512 | } |
4513 | } | |
4514 | } | |
4515 | } | |
7506f491 DE |
4516 | |
4517 | return changed; | |
4518 | } | |
4519 | ||
4520 | /* Perform GCSE optimizations using PRE. | |
4521 | This is called by one_pre_gcse_pass after all the dataflow analysis | |
4522 | has been done. | |
4523 | ||
c4c81601 RK |
4524 | This is based on the original Morel-Renvoise paper Fred Chow's thesis, and |
4525 | lazy code motion from Knoop, Ruthing and Steffen as described in Advanced | |
4526 | Compiler Design and Implementation. | |
7506f491 | 4527 | |
c4c81601 RK |
4528 | ??? A new pseudo reg is created to hold the reaching expression. The nice |
4529 | thing about the classical approach is that it would try to use an existing | |
4530 | reg. If the register can't be adequately optimized [i.e. we introduce | |
4531 | reload problems], one could add a pass here to propagate the new register | |
4532 | through the block. | |
7506f491 | 4533 | |
c4c81601 RK |
4534 | ??? We don't handle single sets in PARALLELs because we're [currently] not |
4535 | able to copy the rest of the parallel when we insert copies to create full | |
4536 | redundancies from partial redundancies. However, there's no reason why we | |
4537 | can't handle PARALLELs in the cases where there are no partial | |
7506f491 DE |
4538 | redundancies. */ |
4539 | ||
4540 | static int | |
1d088dee | 4541 | pre_gcse (void) |
7506f491 | 4542 | { |
2e653e39 RK |
4543 | unsigned int i; |
4544 | int did_insert, changed; | |
7506f491 | 4545 | struct expr **index_map; |
c4c81601 | 4546 | struct expr *expr; |
7506f491 DE |
4547 | |
4548 | /* Compute a mapping from expression number (`bitmap_index') to | |
4549 | hash table entry. */ | |
4550 | ||
703ad42b | 4551 | index_map = xcalloc (expr_hash_table.n_elems, sizeof (struct expr *)); |
02280659 ZD |
4552 | for (i = 0; i < expr_hash_table.size; i++) |
4553 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 | 4554 | index_map[expr->bitmap_index] = expr; |
7506f491 DE |
4555 | |
4556 | /* Reset bitmap used to track which insns are redundant. */ | |
a65f3558 JL |
4557 | pre_redundant_insns = sbitmap_alloc (max_cuid); |
4558 | sbitmap_zero (pre_redundant_insns); | |
7506f491 DE |
4559 | |
4560 | /* Delete the redundant insns first so that | |
4561 | - we know what register to use for the new insns and for the other | |
4562 | ones with reaching expressions | |
4563 | - we know which insns are redundant when we go to create copies */ | |
c4c81601 | 4564 | |
7506f491 DE |
4565 | changed = pre_delete (); |
4566 | ||
a42cd965 | 4567 | did_insert = pre_edge_insert (edge_list, index_map); |
c4c81601 | 4568 | |
7506f491 | 4569 | /* In other places with reaching expressions, copy the expression to the |
a42cd965 | 4570 | specially allocated pseudo-reg that reaches the redundant expr. */ |
7506f491 | 4571 | pre_insert_copies (); |
a42cd965 AM |
4572 | if (did_insert) |
4573 | { | |
4574 | commit_edge_insertions (); | |
4575 | changed = 1; | |
4576 | } | |
7506f491 | 4577 | |
283a2545 | 4578 | free (index_map); |
76ac938b | 4579 | sbitmap_free (pre_redundant_insns); |
7506f491 DE |
4580 | return changed; |
4581 | } | |
4582 | ||
4583 | /* Top level routine to perform one PRE GCSE pass. | |
4584 | ||
cc2902df | 4585 | Return nonzero if a change was made. */ |
7506f491 DE |
4586 | |
4587 | static int | |
1d088dee | 4588 | one_pre_gcse_pass (int pass) |
7506f491 DE |
4589 | { |
4590 | int changed = 0; | |
4591 | ||
4592 | gcse_subst_count = 0; | |
4593 | gcse_create_count = 0; | |
4594 | ||
02280659 | 4595 | alloc_hash_table (max_cuid, &expr_hash_table, 0); |
a42cd965 | 4596 | add_noreturn_fake_exit_edges (); |
a13d4ebf AM |
4597 | if (flag_gcse_lm) |
4598 | compute_ld_motion_mems (); | |
4599 | ||
02280659 | 4600 | compute_hash_table (&expr_hash_table); |
a13d4ebf | 4601 | trim_ld_motion_mems (); |
7506f491 | 4602 | if (gcse_file) |
02280659 | 4603 | dump_hash_table (gcse_file, "Expression", &expr_hash_table); |
c4c81601 | 4604 | |
02280659 | 4605 | if (expr_hash_table.n_elems > 0) |
7506f491 | 4606 | { |
02280659 | 4607 | alloc_pre_mem (last_basic_block, expr_hash_table.n_elems); |
7506f491 DE |
4608 | compute_pre_data (); |
4609 | changed |= pre_gcse (); | |
a42cd965 | 4610 | free_edge_list (edge_list); |
7506f491 DE |
4611 | free_pre_mem (); |
4612 | } | |
c4c81601 | 4613 | |
a13d4ebf | 4614 | free_ldst_mems (); |
6809cbf9 | 4615 | remove_fake_exit_edges (); |
02280659 | 4616 | free_hash_table (&expr_hash_table); |
7506f491 DE |
4617 | |
4618 | if (gcse_file) | |
4619 | { | |
c4c81601 | 4620 | fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ", |
faed5cc3 | 4621 | current_function_name (), pass, bytes_used); |
c4c81601 RK |
4622 | fprintf (gcse_file, "%d substs, %d insns created\n", |
4623 | gcse_subst_count, gcse_create_count); | |
7506f491 DE |
4624 | } |
4625 | ||
4626 | return changed; | |
4627 | } | |
aeb2f500 JW |
4628 | \f |
4629 | /* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN. | |
5b1ef594 JDA |
4630 | If notes are added to an insn which references a CODE_LABEL, the |
4631 | LABEL_NUSES count is incremented. We have to add REG_LABEL notes, | |
4632 | because the following loop optimization pass requires them. */ | |
aeb2f500 JW |
4633 | |
4634 | /* ??? This is very similar to the loop.c add_label_notes function. We | |
4635 | could probably share code here. */ | |
4636 | ||
4637 | /* ??? If there was a jump optimization pass after gcse and before loop, | |
4638 | then we would not need to do this here, because jump would add the | |
4639 | necessary REG_LABEL notes. */ | |
4640 | ||
4641 | static void | |
1d088dee | 4642 | add_label_notes (rtx x, rtx insn) |
aeb2f500 JW |
4643 | { |
4644 | enum rtx_code code = GET_CODE (x); | |
4645 | int i, j; | |
6f7d635c | 4646 | const char *fmt; |
aeb2f500 JW |
4647 | |
4648 | if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x)) | |
4649 | { | |
6b3603c2 | 4650 | /* This code used to ignore labels that referred to dispatch tables to |
e0bb17a8 | 4651 | avoid flow generating (slightly) worse code. |
6b3603c2 | 4652 | |
ac7c5af5 JL |
4653 | We no longer ignore such label references (see LABEL_REF handling in |
4654 | mark_jump_label for additional information). */ | |
c4c81601 | 4655 | |
6b8c9327 | 4656 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0), |
6b3603c2 | 4657 | REG_NOTES (insn)); |
5b1ef594 | 4658 | if (LABEL_P (XEXP (x, 0))) |
589005ff | 4659 | LABEL_NUSES (XEXP (x, 0))++; |
aeb2f500 JW |
4660 | return; |
4661 | } | |
4662 | ||
c4c81601 | 4663 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
aeb2f500 JW |
4664 | { |
4665 | if (fmt[i] == 'e') | |
4666 | add_label_notes (XEXP (x, i), insn); | |
4667 | else if (fmt[i] == 'E') | |
4668 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
4669 | add_label_notes (XVECEXP (x, i, j), insn); | |
4670 | } | |
4671 | } | |
a65f3558 JL |
4672 | |
4673 | /* Compute transparent outgoing information for each block. | |
4674 | ||
4675 | An expression is transparent to an edge unless it is killed by | |
4676 | the edge itself. This can only happen with abnormal control flow, | |
4677 | when the edge is traversed through a call. This happens with | |
4678 | non-local labels and exceptions. | |
4679 | ||
4680 | This would not be necessary if we split the edge. While this is | |
4681 | normally impossible for abnormal critical edges, with some effort | |
4682 | it should be possible with exception handling, since we still have | |
4683 | control over which handler should be invoked. But due to increased | |
4684 | EH table sizes, this may not be worthwhile. */ | |
4685 | ||
4686 | static void | |
1d088dee | 4687 | compute_transpout (void) |
a65f3558 | 4688 | { |
e0082a72 | 4689 | basic_block bb; |
2e653e39 | 4690 | unsigned int i; |
c4c81601 | 4691 | struct expr *expr; |
a65f3558 | 4692 | |
d55bc081 | 4693 | sbitmap_vector_ones (transpout, last_basic_block); |
a65f3558 | 4694 | |
e0082a72 | 4695 | FOR_EACH_BB (bb) |
a65f3558 | 4696 | { |
a65f3558 JL |
4697 | /* Note that flow inserted a nop a the end of basic blocks that |
4698 | end in call instructions for reasons other than abnormal | |
4699 | control flow. */ | |
7b1b4aed | 4700 | if (! CALL_P (BB_END (bb))) |
a65f3558 JL |
4701 | continue; |
4702 | ||
02280659 ZD |
4703 | for (i = 0; i < expr_hash_table.size; i++) |
4704 | for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash) | |
7b1b4aed | 4705 | if (MEM_P (expr->expr)) |
c4c81601 RK |
4706 | { |
4707 | if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF | |
4708 | && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0))) | |
4709 | continue; | |
589005ff | 4710 | |
c4c81601 RK |
4711 | /* ??? Optimally, we would use interprocedural alias |
4712 | analysis to determine if this mem is actually killed | |
4713 | by this call. */ | |
e0082a72 | 4714 | RESET_BIT (transpout[bb->index], expr->bitmap_index); |
c4c81601 | 4715 | } |
a65f3558 JL |
4716 | } |
4717 | } | |
dfdb644f | 4718 | |
bb457bd9 JL |
4719 | /* Code Hoisting variables and subroutines. */ |
4720 | ||
4721 | /* Very busy expressions. */ | |
4722 | static sbitmap *hoist_vbein; | |
4723 | static sbitmap *hoist_vbeout; | |
4724 | ||
4725 | /* Hoistable expressions. */ | |
4726 | static sbitmap *hoist_exprs; | |
4727 | ||
bb457bd9 | 4728 | /* ??? We could compute post dominators and run this algorithm in |
68e82b83 | 4729 | reverse to perform tail merging, doing so would probably be |
bb457bd9 JL |
4730 | more effective than the tail merging code in jump.c. |
4731 | ||
4732 | It's unclear if tail merging could be run in parallel with | |
4733 | code hoisting. It would be nice. */ | |
4734 | ||
4735 | /* Allocate vars used for code hoisting analysis. */ | |
4736 | ||
4737 | static void | |
1d088dee | 4738 | alloc_code_hoist_mem (int n_blocks, int n_exprs) |
bb457bd9 JL |
4739 | { |
4740 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4741 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4742 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4743 | ||
4744 | hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4745 | hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4746 | hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4747 | transpout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
bb457bd9 JL |
4748 | } |
4749 | ||
4750 | /* Free vars used for code hoisting analysis. */ | |
4751 | ||
4752 | static void | |
1d088dee | 4753 | free_code_hoist_mem (void) |
bb457bd9 | 4754 | { |
5a660bff DB |
4755 | sbitmap_vector_free (antloc); |
4756 | sbitmap_vector_free (transp); | |
4757 | sbitmap_vector_free (comp); | |
bb457bd9 | 4758 | |
5a660bff DB |
4759 | sbitmap_vector_free (hoist_vbein); |
4760 | sbitmap_vector_free (hoist_vbeout); | |
4761 | sbitmap_vector_free (hoist_exprs); | |
4762 | sbitmap_vector_free (transpout); | |
bb457bd9 | 4763 | |
d47cc544 | 4764 | free_dominance_info (CDI_DOMINATORS); |
bb457bd9 JL |
4765 | } |
4766 | ||
4767 | /* Compute the very busy expressions at entry/exit from each block. | |
4768 | ||
4769 | An expression is very busy if all paths from a given point | |
4770 | compute the expression. */ | |
4771 | ||
4772 | static void | |
1d088dee | 4773 | compute_code_hoist_vbeinout (void) |
bb457bd9 | 4774 | { |
e0082a72 ZD |
4775 | int changed, passes; |
4776 | basic_block bb; | |
bb457bd9 | 4777 | |
d55bc081 ZD |
4778 | sbitmap_vector_zero (hoist_vbeout, last_basic_block); |
4779 | sbitmap_vector_zero (hoist_vbein, last_basic_block); | |
bb457bd9 JL |
4780 | |
4781 | passes = 0; | |
4782 | changed = 1; | |
c4c81601 | 4783 | |
bb457bd9 JL |
4784 | while (changed) |
4785 | { | |
4786 | changed = 0; | |
c4c81601 | 4787 | |
bb457bd9 JL |
4788 | /* We scan the blocks in the reverse order to speed up |
4789 | the convergence. */ | |
e0082a72 | 4790 | FOR_EACH_BB_REVERSE (bb) |
bb457bd9 | 4791 | { |
e0082a72 ZD |
4792 | changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index], |
4793 | hoist_vbeout[bb->index], transp[bb->index]); | |
4794 | if (bb->next_bb != EXIT_BLOCK_PTR) | |
4795 | sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index); | |
bb457bd9 | 4796 | } |
c4c81601 | 4797 | |
bb457bd9 JL |
4798 | passes++; |
4799 | } | |
4800 | ||
4801 | if (gcse_file) | |
4802 | fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes); | |
4803 | } | |
4804 | ||
4805 | /* Top level routine to do the dataflow analysis needed by code hoisting. */ | |
4806 | ||
4807 | static void | |
1d088dee | 4808 | compute_code_hoist_data (void) |
bb457bd9 | 4809 | { |
02280659 | 4810 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
bb457bd9 JL |
4811 | compute_transpout (); |
4812 | compute_code_hoist_vbeinout (); | |
d47cc544 | 4813 | calculate_dominance_info (CDI_DOMINATORS); |
bb457bd9 JL |
4814 | if (gcse_file) |
4815 | fprintf (gcse_file, "\n"); | |
4816 | } | |
4817 | ||
4818 | /* Determine if the expression identified by EXPR_INDEX would | |
4819 | reach BB unimpared if it was placed at the end of EXPR_BB. | |
4820 | ||
4821 | It's unclear exactly what Muchnick meant by "unimpared". It seems | |
4822 | to me that the expression must either be computed or transparent in | |
4823 | *every* block in the path(s) from EXPR_BB to BB. Any other definition | |
4824 | would allow the expression to be hoisted out of loops, even if | |
4825 | the expression wasn't a loop invariant. | |
4826 | ||
4827 | Contrast this to reachability for PRE where an expression is | |
4828 | considered reachable if *any* path reaches instead of *all* | |
4829 | paths. */ | |
4830 | ||
4831 | static int | |
1d088dee | 4832 | hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited) |
bb457bd9 JL |
4833 | { |
4834 | edge pred; | |
628f6a4e | 4835 | edge_iterator ei; |
283a2545 | 4836 | int visited_allocated_locally = 0; |
589005ff | 4837 | |
bb457bd9 JL |
4838 | |
4839 | if (visited == NULL) | |
4840 | { | |
8e42ace1 | 4841 | visited_allocated_locally = 1; |
d55bc081 | 4842 | visited = xcalloc (last_basic_block, 1); |
bb457bd9 JL |
4843 | } |
4844 | ||
628f6a4e | 4845 | FOR_EACH_EDGE (pred, ei, bb->preds) |
bb457bd9 | 4846 | { |
e2d2ed72 | 4847 | basic_block pred_bb = pred->src; |
bb457bd9 JL |
4848 | |
4849 | if (pred->src == ENTRY_BLOCK_PTR) | |
4850 | break; | |
f305679f JH |
4851 | else if (pred_bb == expr_bb) |
4852 | continue; | |
0b17ab2f | 4853 | else if (visited[pred_bb->index]) |
bb457bd9 | 4854 | continue; |
c4c81601 | 4855 | |
bb457bd9 | 4856 | /* Does this predecessor generate this expression? */ |
0b17ab2f | 4857 | else if (TEST_BIT (comp[pred_bb->index], expr_index)) |
bb457bd9 | 4858 | break; |
0b17ab2f | 4859 | else if (! TEST_BIT (transp[pred_bb->index], expr_index)) |
bb457bd9 | 4860 | break; |
c4c81601 | 4861 | |
bb457bd9 JL |
4862 | /* Not killed. */ |
4863 | else | |
4864 | { | |
0b17ab2f | 4865 | visited[pred_bb->index] = 1; |
bb457bd9 JL |
4866 | if (! hoist_expr_reaches_here_p (expr_bb, expr_index, |
4867 | pred_bb, visited)) | |
4868 | break; | |
4869 | } | |
4870 | } | |
589005ff | 4871 | if (visited_allocated_locally) |
283a2545 | 4872 | free (visited); |
c4c81601 | 4873 | |
bb457bd9 JL |
4874 | return (pred == NULL); |
4875 | } | |
4876 | \f | |
4877 | /* Actually perform code hoisting. */ | |
c4c81601 | 4878 | |
bb457bd9 | 4879 | static void |
1d088dee | 4880 | hoist_code (void) |
bb457bd9 | 4881 | { |
e0082a72 | 4882 | basic_block bb, dominated; |
c635a1ec DB |
4883 | basic_block *domby; |
4884 | unsigned int domby_len; | |
4885 | unsigned int i,j; | |
bb457bd9 | 4886 | struct expr **index_map; |
c4c81601 | 4887 | struct expr *expr; |
bb457bd9 | 4888 | |
d55bc081 | 4889 | sbitmap_vector_zero (hoist_exprs, last_basic_block); |
bb457bd9 JL |
4890 | |
4891 | /* Compute a mapping from expression number (`bitmap_index') to | |
4892 | hash table entry. */ | |
4893 | ||
703ad42b | 4894 | index_map = xcalloc (expr_hash_table.n_elems, sizeof (struct expr *)); |
02280659 ZD |
4895 | for (i = 0; i < expr_hash_table.size; i++) |
4896 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 | 4897 | index_map[expr->bitmap_index] = expr; |
bb457bd9 JL |
4898 | |
4899 | /* Walk over each basic block looking for potentially hoistable | |
4900 | expressions, nothing gets hoisted from the entry block. */ | |
e0082a72 | 4901 | FOR_EACH_BB (bb) |
bb457bd9 JL |
4902 | { |
4903 | int found = 0; | |
4904 | int insn_inserted_p; | |
4905 | ||
d47cc544 | 4906 | domby_len = get_dominated_by (CDI_DOMINATORS, bb, &domby); |
bb457bd9 JL |
4907 | /* Examine each expression that is very busy at the exit of this |
4908 | block. These are the potentially hoistable expressions. */ | |
e0082a72 | 4909 | for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++) |
bb457bd9 JL |
4910 | { |
4911 | int hoistable = 0; | |
c4c81601 | 4912 | |
c635a1ec DB |
4913 | if (TEST_BIT (hoist_vbeout[bb->index], i) |
4914 | && TEST_BIT (transpout[bb->index], i)) | |
bb457bd9 JL |
4915 | { |
4916 | /* We've found a potentially hoistable expression, now | |
4917 | we look at every block BB dominates to see if it | |
4918 | computes the expression. */ | |
c635a1ec | 4919 | for (j = 0; j < domby_len; j++) |
bb457bd9 | 4920 | { |
c635a1ec | 4921 | dominated = domby[j]; |
bb457bd9 | 4922 | /* Ignore self dominance. */ |
c635a1ec | 4923 | if (bb == dominated) |
bb457bd9 | 4924 | continue; |
bb457bd9 JL |
4925 | /* We've found a dominated block, now see if it computes |
4926 | the busy expression and whether or not moving that | |
4927 | expression to the "beginning" of that block is safe. */ | |
e0082a72 | 4928 | if (!TEST_BIT (antloc[dominated->index], i)) |
bb457bd9 JL |
4929 | continue; |
4930 | ||
4931 | /* Note if the expression would reach the dominated block | |
589005ff | 4932 | unimpared if it was placed at the end of BB. |
bb457bd9 JL |
4933 | |
4934 | Keep track of how many times this expression is hoistable | |
4935 | from a dominated block into BB. */ | |
e0082a72 | 4936 | if (hoist_expr_reaches_here_p (bb, i, dominated, NULL)) |
bb457bd9 JL |
4937 | hoistable++; |
4938 | } | |
4939 | ||
ff7cc307 | 4940 | /* If we found more than one hoistable occurrence of this |
bb457bd9 JL |
4941 | expression, then note it in the bitmap of expressions to |
4942 | hoist. It makes no sense to hoist things which are computed | |
4943 | in only one BB, and doing so tends to pessimize register | |
4944 | allocation. One could increase this value to try harder | |
4945 | to avoid any possible code expansion due to register | |
4946 | allocation issues; however experiments have shown that | |
4947 | the vast majority of hoistable expressions are only movable | |
e0bb17a8 | 4948 | from two successors, so raising this threshold is likely |
bb457bd9 JL |
4949 | to nullify any benefit we get from code hoisting. */ |
4950 | if (hoistable > 1) | |
4951 | { | |
e0082a72 | 4952 | SET_BIT (hoist_exprs[bb->index], i); |
bb457bd9 JL |
4953 | found = 1; |
4954 | } | |
4955 | } | |
4956 | } | |
bb457bd9 JL |
4957 | /* If we found nothing to hoist, then quit now. */ |
4958 | if (! found) | |
c635a1ec | 4959 | { |
1d088dee | 4960 | free (domby); |
bb457bd9 | 4961 | continue; |
c635a1ec | 4962 | } |
bb457bd9 JL |
4963 | |
4964 | /* Loop over all the hoistable expressions. */ | |
e0082a72 | 4965 | for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++) |
bb457bd9 JL |
4966 | { |
4967 | /* We want to insert the expression into BB only once, so | |
4968 | note when we've inserted it. */ | |
4969 | insn_inserted_p = 0; | |
4970 | ||
4971 | /* These tests should be the same as the tests above. */ | |
e0082a72 | 4972 | if (TEST_BIT (hoist_vbeout[bb->index], i)) |
bb457bd9 JL |
4973 | { |
4974 | /* We've found a potentially hoistable expression, now | |
4975 | we look at every block BB dominates to see if it | |
4976 | computes the expression. */ | |
c635a1ec | 4977 | for (j = 0; j < domby_len; j++) |
bb457bd9 | 4978 | { |
c635a1ec | 4979 | dominated = domby[j]; |
bb457bd9 | 4980 | /* Ignore self dominance. */ |
c635a1ec | 4981 | if (bb == dominated) |
bb457bd9 JL |
4982 | continue; |
4983 | ||
4984 | /* We've found a dominated block, now see if it computes | |
4985 | the busy expression and whether or not moving that | |
4986 | expression to the "beginning" of that block is safe. */ | |
e0082a72 | 4987 | if (!TEST_BIT (antloc[dominated->index], i)) |
bb457bd9 JL |
4988 | continue; |
4989 | ||
4990 | /* The expression is computed in the dominated block and | |
4991 | it would be safe to compute it at the start of the | |
4992 | dominated block. Now we have to determine if the | |
ff7cc307 | 4993 | expression would reach the dominated block if it was |
bb457bd9 | 4994 | placed at the end of BB. */ |
e0082a72 | 4995 | if (hoist_expr_reaches_here_p (bb, i, dominated, NULL)) |
bb457bd9 JL |
4996 | { |
4997 | struct expr *expr = index_map[i]; | |
4998 | struct occr *occr = expr->antic_occr; | |
4999 | rtx insn; | |
5000 | rtx set; | |
5001 | ||
ff7cc307 | 5002 | /* Find the right occurrence of this expression. */ |
e0082a72 | 5003 | while (BLOCK_FOR_INSN (occr->insn) != dominated && occr) |
bb457bd9 JL |
5004 | occr = occr->next; |
5005 | ||
282899df | 5006 | gcc_assert (occr); |
bb457bd9 | 5007 | insn = occr->insn; |
bb457bd9 | 5008 | set = single_set (insn); |
282899df | 5009 | gcc_assert (set); |
bb457bd9 JL |
5010 | |
5011 | /* Create a pseudo-reg to store the result of reaching | |
5012 | expressions into. Get the mode for the new pseudo | |
5013 | from the mode of the original destination pseudo. */ | |
5014 | if (expr->reaching_reg == NULL) | |
5015 | expr->reaching_reg | |
5016 | = gen_reg_rtx (GET_MODE (SET_DEST (set))); | |
5017 | ||
10d1bb36 JH |
5018 | gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn); |
5019 | delete_insn (insn); | |
5020 | occr->deleted_p = 1; | |
5021 | if (!insn_inserted_p) | |
bb457bd9 | 5022 | { |
10d1bb36 JH |
5023 | insert_insn_end_bb (index_map[i], bb, 0); |
5024 | insn_inserted_p = 1; | |
bb457bd9 JL |
5025 | } |
5026 | } | |
5027 | } | |
5028 | } | |
5029 | } | |
c635a1ec | 5030 | free (domby); |
bb457bd9 | 5031 | } |
c4c81601 | 5032 | |
8e42ace1 | 5033 | free (index_map); |
bb457bd9 JL |
5034 | } |
5035 | ||
5036 | /* Top level routine to perform one code hoisting (aka unification) pass | |
5037 | ||
cc2902df | 5038 | Return nonzero if a change was made. */ |
bb457bd9 JL |
5039 | |
5040 | static int | |
1d088dee | 5041 | one_code_hoisting_pass (void) |
bb457bd9 JL |
5042 | { |
5043 | int changed = 0; | |
5044 | ||
02280659 ZD |
5045 | alloc_hash_table (max_cuid, &expr_hash_table, 0); |
5046 | compute_hash_table (&expr_hash_table); | |
bb457bd9 | 5047 | if (gcse_file) |
02280659 | 5048 | dump_hash_table (gcse_file, "Code Hosting Expressions", &expr_hash_table); |
c4c81601 | 5049 | |
02280659 | 5050 | if (expr_hash_table.n_elems > 0) |
bb457bd9 | 5051 | { |
02280659 | 5052 | alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems); |
bb457bd9 JL |
5053 | compute_code_hoist_data (); |
5054 | hoist_code (); | |
5055 | free_code_hoist_mem (); | |
5056 | } | |
c4c81601 | 5057 | |
02280659 | 5058 | free_hash_table (&expr_hash_table); |
bb457bd9 JL |
5059 | |
5060 | return changed; | |
5061 | } | |
a13d4ebf AM |
5062 | \f |
5063 | /* Here we provide the things required to do store motion towards | |
5064 | the exit. In order for this to be effective, gcse also needed to | |
5065 | be taught how to move a load when it is kill only by a store to itself. | |
5066 | ||
5067 | int i; | |
5068 | float a[10]; | |
5069 | ||
5070 | void foo(float scale) | |
5071 | { | |
5072 | for (i=0; i<10; i++) | |
5073 | a[i] *= scale; | |
5074 | } | |
5075 | ||
5076 | 'i' is both loaded and stored to in the loop. Normally, gcse cannot move | |
589005ff KH |
5077 | the load out since its live around the loop, and stored at the bottom |
5078 | of the loop. | |
a13d4ebf | 5079 | |
589005ff | 5080 | The 'Load Motion' referred to and implemented in this file is |
a13d4ebf AM |
5081 | an enhancement to gcse which when using edge based lcm, recognizes |
5082 | this situation and allows gcse to move the load out of the loop. | |
5083 | ||
5084 | Once gcse has hoisted the load, store motion can then push this | |
5085 | load towards the exit, and we end up with no loads or stores of 'i' | |
5086 | in the loop. */ | |
5087 | ||
ff7cc307 | 5088 | /* This will search the ldst list for a matching expression. If it |
a13d4ebf AM |
5089 | doesn't find one, we create one and initialize it. */ |
5090 | ||
5091 | static struct ls_expr * | |
1d088dee | 5092 | ldst_entry (rtx x) |
a13d4ebf | 5093 | { |
b58b21d5 | 5094 | int do_not_record_p = 0; |
a13d4ebf | 5095 | struct ls_expr * ptr; |
b58b21d5 | 5096 | unsigned int hash; |
a13d4ebf | 5097 | |
0516f6fe SB |
5098 | hash = hash_rtx (x, GET_MODE (x), &do_not_record_p, |
5099 | NULL, /*have_reg_qty=*/false); | |
a13d4ebf | 5100 | |
b58b21d5 RS |
5101 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) |
5102 | if (ptr->hash_index == hash && expr_equiv_p (ptr->pattern, x)) | |
5103 | return ptr; | |
5104 | ||
5105 | ptr = xmalloc (sizeof (struct ls_expr)); | |
5106 | ||
5107 | ptr->next = pre_ldst_mems; | |
5108 | ptr->expr = NULL; | |
5109 | ptr->pattern = x; | |
5110 | ptr->pattern_regs = NULL_RTX; | |
5111 | ptr->loads = NULL_RTX; | |
5112 | ptr->stores = NULL_RTX; | |
5113 | ptr->reaching_reg = NULL_RTX; | |
5114 | ptr->invalid = 0; | |
5115 | ptr->index = 0; | |
5116 | ptr->hash_index = hash; | |
5117 | pre_ldst_mems = ptr; | |
589005ff | 5118 | |
a13d4ebf AM |
5119 | return ptr; |
5120 | } | |
5121 | ||
5122 | /* Free up an individual ldst entry. */ | |
5123 | ||
589005ff | 5124 | static void |
1d088dee | 5125 | free_ldst_entry (struct ls_expr * ptr) |
a13d4ebf | 5126 | { |
aaa4ca30 AJ |
5127 | free_INSN_LIST_list (& ptr->loads); |
5128 | free_INSN_LIST_list (& ptr->stores); | |
a13d4ebf AM |
5129 | |
5130 | free (ptr); | |
5131 | } | |
5132 | ||
5133 | /* Free up all memory associated with the ldst list. */ | |
5134 | ||
5135 | static void | |
1d088dee | 5136 | free_ldst_mems (void) |
a13d4ebf | 5137 | { |
589005ff | 5138 | while (pre_ldst_mems) |
a13d4ebf AM |
5139 | { |
5140 | struct ls_expr * tmp = pre_ldst_mems; | |
5141 | ||
5142 | pre_ldst_mems = pre_ldst_mems->next; | |
5143 | ||
5144 | free_ldst_entry (tmp); | |
5145 | } | |
5146 | ||
5147 | pre_ldst_mems = NULL; | |
5148 | } | |
5149 | ||
5150 | /* Dump debugging info about the ldst list. */ | |
5151 | ||
5152 | static void | |
1d088dee | 5153 | print_ldst_list (FILE * file) |
a13d4ebf AM |
5154 | { |
5155 | struct ls_expr * ptr; | |
5156 | ||
5157 | fprintf (file, "LDST list: \n"); | |
5158 | ||
5159 | for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr)) | |
5160 | { | |
5161 | fprintf (file, " Pattern (%3d): ", ptr->index); | |
5162 | ||
5163 | print_rtl (file, ptr->pattern); | |
5164 | ||
5165 | fprintf (file, "\n Loads : "); | |
5166 | ||
5167 | if (ptr->loads) | |
5168 | print_rtl (file, ptr->loads); | |
5169 | else | |
5170 | fprintf (file, "(nil)"); | |
5171 | ||
5172 | fprintf (file, "\n Stores : "); | |
5173 | ||
5174 | if (ptr->stores) | |
5175 | print_rtl (file, ptr->stores); | |
5176 | else | |
5177 | fprintf (file, "(nil)"); | |
5178 | ||
5179 | fprintf (file, "\n\n"); | |
5180 | } | |
5181 | ||
5182 | fprintf (file, "\n"); | |
5183 | } | |
5184 | ||
5185 | /* Returns 1 if X is in the list of ldst only expressions. */ | |
5186 | ||
5187 | static struct ls_expr * | |
1d088dee | 5188 | find_rtx_in_ldst (rtx x) |
a13d4ebf AM |
5189 | { |
5190 | struct ls_expr * ptr; | |
589005ff | 5191 | |
a13d4ebf AM |
5192 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) |
5193 | if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid) | |
5194 | return ptr; | |
5195 | ||
5196 | return NULL; | |
5197 | } | |
5198 | ||
5199 | /* Assign each element of the list of mems a monotonically increasing value. */ | |
5200 | ||
5201 | static int | |
1d088dee | 5202 | enumerate_ldsts (void) |
a13d4ebf AM |
5203 | { |
5204 | struct ls_expr * ptr; | |
5205 | int n = 0; | |
5206 | ||
5207 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) | |
5208 | ptr->index = n++; | |
5209 | ||
5210 | return n; | |
5211 | } | |
5212 | ||
5213 | /* Return first item in the list. */ | |
5214 | ||
5215 | static inline struct ls_expr * | |
1d088dee | 5216 | first_ls_expr (void) |
a13d4ebf AM |
5217 | { |
5218 | return pre_ldst_mems; | |
5219 | } | |
5220 | ||
0e8a66de | 5221 | /* Return the next item in the list after the specified one. */ |
a13d4ebf AM |
5222 | |
5223 | static inline struct ls_expr * | |
1d088dee | 5224 | next_ls_expr (struct ls_expr * ptr) |
a13d4ebf AM |
5225 | { |
5226 | return ptr->next; | |
5227 | } | |
5228 | \f | |
5229 | /* Load Motion for loads which only kill themselves. */ | |
5230 | ||
5231 | /* Return true if x is a simple MEM operation, with no registers or | |
5232 | side effects. These are the types of loads we consider for the | |
5233 | ld_motion list, otherwise we let the usual aliasing take care of it. */ | |
5234 | ||
589005ff | 5235 | static int |
1d088dee | 5236 | simple_mem (rtx x) |
a13d4ebf | 5237 | { |
7b1b4aed | 5238 | if (! MEM_P (x)) |
a13d4ebf | 5239 | return 0; |
589005ff | 5240 | |
a13d4ebf AM |
5241 | if (MEM_VOLATILE_P (x)) |
5242 | return 0; | |
589005ff | 5243 | |
a13d4ebf AM |
5244 | if (GET_MODE (x) == BLKmode) |
5245 | return 0; | |
aaa4ca30 | 5246 | |
47a3dae1 ZD |
5247 | /* If we are handling exceptions, we must be careful with memory references |
5248 | that may trap. If we are not, the behavior is undefined, so we may just | |
5249 | continue. */ | |
5250 | if (flag_non_call_exceptions && may_trap_p (x)) | |
98d3d336 RS |
5251 | return 0; |
5252 | ||
47a3dae1 ZD |
5253 | if (side_effects_p (x)) |
5254 | return 0; | |
589005ff | 5255 | |
47a3dae1 ZD |
5256 | /* Do not consider function arguments passed on stack. */ |
5257 | if (reg_mentioned_p (stack_pointer_rtx, x)) | |
5258 | return 0; | |
5259 | ||
5260 | if (flag_float_store && FLOAT_MODE_P (GET_MODE (x))) | |
5261 | return 0; | |
5262 | ||
5263 | return 1; | |
a13d4ebf AM |
5264 | } |
5265 | ||
589005ff KH |
5266 | /* Make sure there isn't a buried reference in this pattern anywhere. |
5267 | If there is, invalidate the entry for it since we're not capable | |
5268 | of fixing it up just yet.. We have to be sure we know about ALL | |
a13d4ebf AM |
5269 | loads since the aliasing code will allow all entries in the |
5270 | ld_motion list to not-alias itself. If we miss a load, we will get | |
589005ff | 5271 | the wrong value since gcse might common it and we won't know to |
a13d4ebf AM |
5272 | fix it up. */ |
5273 | ||
5274 | static void | |
1d088dee | 5275 | invalidate_any_buried_refs (rtx x) |
a13d4ebf AM |
5276 | { |
5277 | const char * fmt; | |
8e42ace1 | 5278 | int i, j; |
a13d4ebf AM |
5279 | struct ls_expr * ptr; |
5280 | ||
5281 | /* Invalidate it in the list. */ | |
7b1b4aed | 5282 | if (MEM_P (x) && simple_mem (x)) |
a13d4ebf AM |
5283 | { |
5284 | ptr = ldst_entry (x); | |
5285 | ptr->invalid = 1; | |
5286 | } | |
5287 | ||
5288 | /* Recursively process the insn. */ | |
5289 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
589005ff | 5290 | |
a13d4ebf AM |
5291 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) |
5292 | { | |
5293 | if (fmt[i] == 'e') | |
5294 | invalidate_any_buried_refs (XEXP (x, i)); | |
5295 | else if (fmt[i] == 'E') | |
5296 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
5297 | invalidate_any_buried_refs (XVECEXP (x, i, j)); | |
5298 | } | |
5299 | } | |
5300 | ||
4d3eb89a HPN |
5301 | /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple |
5302 | being defined as MEM loads and stores to symbols, with no side effects | |
5303 | and no registers in the expression. For a MEM destination, we also | |
5304 | check that the insn is still valid if we replace the destination with a | |
5305 | REG, as is done in update_ld_motion_stores. If there are any uses/defs | |
5306 | which don't match this criteria, they are invalidated and trimmed out | |
5307 | later. */ | |
a13d4ebf | 5308 | |
589005ff | 5309 | static void |
1d088dee | 5310 | compute_ld_motion_mems (void) |
a13d4ebf AM |
5311 | { |
5312 | struct ls_expr * ptr; | |
e0082a72 | 5313 | basic_block bb; |
a13d4ebf | 5314 | rtx insn; |
589005ff | 5315 | |
a13d4ebf AM |
5316 | pre_ldst_mems = NULL; |
5317 | ||
e0082a72 | 5318 | FOR_EACH_BB (bb) |
a13d4ebf | 5319 | { |
a813c111 SB |
5320 | for (insn = BB_HEAD (bb); |
5321 | insn && insn != NEXT_INSN (BB_END (bb)); | |
a13d4ebf AM |
5322 | insn = NEXT_INSN (insn)) |
5323 | { | |
735e8085 | 5324 | if (INSN_P (insn)) |
a13d4ebf AM |
5325 | { |
5326 | if (GET_CODE (PATTERN (insn)) == SET) | |
5327 | { | |
5328 | rtx src = SET_SRC (PATTERN (insn)); | |
5329 | rtx dest = SET_DEST (PATTERN (insn)); | |
5330 | ||
5331 | /* Check for a simple LOAD... */ | |
7b1b4aed | 5332 | if (MEM_P (src) && simple_mem (src)) |
a13d4ebf AM |
5333 | { |
5334 | ptr = ldst_entry (src); | |
7b1b4aed | 5335 | if (REG_P (dest)) |
a13d4ebf AM |
5336 | ptr->loads = alloc_INSN_LIST (insn, ptr->loads); |
5337 | else | |
5338 | ptr->invalid = 1; | |
5339 | } | |
5340 | else | |
5341 | { | |
5342 | /* Make sure there isn't a buried load somewhere. */ | |
5343 | invalidate_any_buried_refs (src); | |
5344 | } | |
589005ff | 5345 | |
a13d4ebf AM |
5346 | /* Check for stores. Don't worry about aliased ones, they |
5347 | will block any movement we might do later. We only care | |
5348 | about this exact pattern since those are the only | |
5349 | circumstance that we will ignore the aliasing info. */ | |
7b1b4aed | 5350 | if (MEM_P (dest) && simple_mem (dest)) |
a13d4ebf AM |
5351 | { |
5352 | ptr = ldst_entry (dest); | |
589005ff | 5353 | |
7b1b4aed | 5354 | if (! MEM_P (src) |
4d3eb89a HPN |
5355 | && GET_CODE (src) != ASM_OPERANDS |
5356 | /* Check for REG manually since want_to_gcse_p | |
5357 | returns 0 for all REGs. */ | |
1707bafa | 5358 | && can_assign_to_reg_p (src)) |
a13d4ebf AM |
5359 | ptr->stores = alloc_INSN_LIST (insn, ptr->stores); |
5360 | else | |
5361 | ptr->invalid = 1; | |
5362 | } | |
5363 | } | |
5364 | else | |
5365 | invalidate_any_buried_refs (PATTERN (insn)); | |
5366 | } | |
5367 | } | |
5368 | } | |
5369 | } | |
5370 | ||
589005ff | 5371 | /* Remove any references that have been either invalidated or are not in the |
a13d4ebf AM |
5372 | expression list for pre gcse. */ |
5373 | ||
5374 | static void | |
1d088dee | 5375 | trim_ld_motion_mems (void) |
a13d4ebf | 5376 | { |
b58b21d5 RS |
5377 | struct ls_expr * * last = & pre_ldst_mems; |
5378 | struct ls_expr * ptr = pre_ldst_mems; | |
a13d4ebf AM |
5379 | |
5380 | while (ptr != NULL) | |
5381 | { | |
b58b21d5 | 5382 | struct expr * expr; |
589005ff | 5383 | |
a13d4ebf | 5384 | /* Delete if entry has been made invalid. */ |
b58b21d5 | 5385 | if (! ptr->invalid) |
a13d4ebf | 5386 | { |
a13d4ebf | 5387 | /* Delete if we cannot find this mem in the expression list. */ |
b58b21d5 | 5388 | unsigned int hash = ptr->hash_index % expr_hash_table.size; |
589005ff | 5389 | |
b58b21d5 RS |
5390 | for (expr = expr_hash_table.table[hash]; |
5391 | expr != NULL; | |
5392 | expr = expr->next_same_hash) | |
5393 | if (expr_equiv_p (expr->expr, ptr->pattern)) | |
5394 | break; | |
a13d4ebf AM |
5395 | } |
5396 | else | |
b58b21d5 RS |
5397 | expr = (struct expr *) 0; |
5398 | ||
5399 | if (expr) | |
a13d4ebf AM |
5400 | { |
5401 | /* Set the expression field if we are keeping it. */ | |
a13d4ebf | 5402 | ptr->expr = expr; |
b58b21d5 | 5403 | last = & ptr->next; |
a13d4ebf AM |
5404 | ptr = ptr->next; |
5405 | } | |
b58b21d5 RS |
5406 | else |
5407 | { | |
5408 | *last = ptr->next; | |
5409 | free_ldst_entry (ptr); | |
5410 | ptr = * last; | |
5411 | } | |
a13d4ebf AM |
5412 | } |
5413 | ||
5414 | /* Show the world what we've found. */ | |
5415 | if (gcse_file && pre_ldst_mems != NULL) | |
5416 | print_ldst_list (gcse_file); | |
5417 | } | |
5418 | ||
5419 | /* This routine will take an expression which we are replacing with | |
5420 | a reaching register, and update any stores that are needed if | |
5421 | that expression is in the ld_motion list. Stores are updated by | |
a98ebe2e | 5422 | copying their SRC to the reaching register, and then storing |
a13d4ebf AM |
5423 | the reaching register into the store location. These keeps the |
5424 | correct value in the reaching register for the loads. */ | |
5425 | ||
5426 | static void | |
1d088dee | 5427 | update_ld_motion_stores (struct expr * expr) |
a13d4ebf AM |
5428 | { |
5429 | struct ls_expr * mem_ptr; | |
5430 | ||
5431 | if ((mem_ptr = find_rtx_in_ldst (expr->expr))) | |
5432 | { | |
589005ff KH |
5433 | /* We can try to find just the REACHED stores, but is shouldn't |
5434 | matter to set the reaching reg everywhere... some might be | |
a13d4ebf AM |
5435 | dead and should be eliminated later. */ |
5436 | ||
4d3eb89a HPN |
5437 | /* We replace (set mem expr) with (set reg expr) (set mem reg) |
5438 | where reg is the reaching reg used in the load. We checked in | |
5439 | compute_ld_motion_mems that we can replace (set mem expr) with | |
5440 | (set reg expr) in that insn. */ | |
a13d4ebf | 5441 | rtx list = mem_ptr->stores; |
589005ff | 5442 | |
a13d4ebf AM |
5443 | for ( ; list != NULL_RTX; list = XEXP (list, 1)) |
5444 | { | |
5445 | rtx insn = XEXP (list, 0); | |
5446 | rtx pat = PATTERN (insn); | |
5447 | rtx src = SET_SRC (pat); | |
5448 | rtx reg = expr->reaching_reg; | |
c57718d3 | 5449 | rtx copy, new; |
a13d4ebf AM |
5450 | |
5451 | /* If we've already copied it, continue. */ | |
5452 | if (expr->reaching_reg == src) | |
5453 | continue; | |
589005ff | 5454 | |
a13d4ebf AM |
5455 | if (gcse_file) |
5456 | { | |
5457 | fprintf (gcse_file, "PRE: store updated with reaching reg "); | |
5458 | print_rtl (gcse_file, expr->reaching_reg); | |
5459 | fprintf (gcse_file, ":\n "); | |
5460 | print_inline_rtx (gcse_file, insn, 8); | |
5461 | fprintf (gcse_file, "\n"); | |
5462 | } | |
589005ff | 5463 | |
47a3dae1 | 5464 | copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat))); |
c57718d3 RK |
5465 | new = emit_insn_before (copy, insn); |
5466 | record_one_set (REGNO (reg), new); | |
a13d4ebf AM |
5467 | SET_SRC (pat) = reg; |
5468 | ||
5469 | /* un-recognize this pattern since it's probably different now. */ | |
5470 | INSN_CODE (insn) = -1; | |
5471 | gcse_create_count++; | |
5472 | } | |
5473 | } | |
5474 | } | |
5475 | \f | |
5476 | /* Store motion code. */ | |
5477 | ||
47a3dae1 ZD |
5478 | #define ANTIC_STORE_LIST(x) ((x)->loads) |
5479 | #define AVAIL_STORE_LIST(x) ((x)->stores) | |
5480 | #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg) | |
5481 | ||
589005ff | 5482 | /* This is used to communicate the target bitvector we want to use in the |
aaa4ca30 | 5483 | reg_set_info routine when called via the note_stores mechanism. */ |
47a3dae1 ZD |
5484 | static int * regvec; |
5485 | ||
5486 | /* And current insn, for the same routine. */ | |
5487 | static rtx compute_store_table_current_insn; | |
aaa4ca30 | 5488 | |
a13d4ebf AM |
5489 | /* Used in computing the reverse edge graph bit vectors. */ |
5490 | static sbitmap * st_antloc; | |
5491 | ||
5492 | /* Global holding the number of store expressions we are dealing with. */ | |
5493 | static int num_stores; | |
5494 | ||
01c43039 RE |
5495 | /* Checks to set if we need to mark a register set. Called from |
5496 | note_stores. */ | |
a13d4ebf | 5497 | |
aaa4ca30 | 5498 | static void |
1d088dee | 5499 | reg_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, |
01c43039 | 5500 | void *data) |
a13d4ebf | 5501 | { |
01c43039 RE |
5502 | sbitmap bb_reg = data; |
5503 | ||
aaa4ca30 AJ |
5504 | if (GET_CODE (dest) == SUBREG) |
5505 | dest = SUBREG_REG (dest); | |
adfcce61 | 5506 | |
7b1b4aed | 5507 | if (REG_P (dest)) |
01c43039 RE |
5508 | { |
5509 | regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn); | |
5510 | if (bb_reg) | |
5511 | SET_BIT (bb_reg, REGNO (dest)); | |
5512 | } | |
5513 | } | |
5514 | ||
5515 | /* Clear any mark that says that this insn sets dest. Called from | |
5516 | note_stores. */ | |
5517 | ||
5518 | static void | |
5519 | reg_clear_last_set (rtx dest, rtx setter ATTRIBUTE_UNUSED, | |
5520 | void *data) | |
5521 | { | |
5522 | int *dead_vec = data; | |
5523 | ||
5524 | if (GET_CODE (dest) == SUBREG) | |
5525 | dest = SUBREG_REG (dest); | |
5526 | ||
7b1b4aed | 5527 | if (REG_P (dest) && |
01c43039 RE |
5528 | dead_vec[REGNO (dest)] == INSN_UID (compute_store_table_current_insn)) |
5529 | dead_vec[REGNO (dest)] = 0; | |
a13d4ebf AM |
5530 | } |
5531 | ||
47a3dae1 ZD |
5532 | /* Return zero if some of the registers in list X are killed |
5533 | due to set of registers in bitmap REGS_SET. */ | |
1d088dee | 5534 | |
47a3dae1 | 5535 | static bool |
1d088dee | 5536 | store_ops_ok (rtx x, int *regs_set) |
47a3dae1 ZD |
5537 | { |
5538 | rtx reg; | |
5539 | ||
5540 | for (; x; x = XEXP (x, 1)) | |
5541 | { | |
5542 | reg = XEXP (x, 0); | |
5543 | if (regs_set[REGNO(reg)]) | |
1d088dee | 5544 | return false; |
47a3dae1 | 5545 | } |
a13d4ebf | 5546 | |
47a3dae1 ZD |
5547 | return true; |
5548 | } | |
5549 | ||
5550 | /* Returns a list of registers mentioned in X. */ | |
5551 | static rtx | |
1d088dee | 5552 | extract_mentioned_regs (rtx x) |
47a3dae1 ZD |
5553 | { |
5554 | return extract_mentioned_regs_helper (x, NULL_RTX); | |
5555 | } | |
5556 | ||
5557 | /* Helper for extract_mentioned_regs; ACCUM is used to accumulate used | |
5558 | registers. */ | |
5559 | static rtx | |
1d088dee | 5560 | extract_mentioned_regs_helper (rtx x, rtx accum) |
a13d4ebf AM |
5561 | { |
5562 | int i; | |
5563 | enum rtx_code code; | |
5564 | const char * fmt; | |
5565 | ||
5566 | /* Repeat is used to turn tail-recursion into iteration. */ | |
5567 | repeat: | |
5568 | ||
5569 | if (x == 0) | |
47a3dae1 | 5570 | return accum; |
a13d4ebf AM |
5571 | |
5572 | code = GET_CODE (x); | |
5573 | switch (code) | |
5574 | { | |
5575 | case REG: | |
47a3dae1 | 5576 | return alloc_EXPR_LIST (0, x, accum); |
a13d4ebf AM |
5577 | |
5578 | case MEM: | |
5579 | x = XEXP (x, 0); | |
5580 | goto repeat; | |
5581 | ||
5582 | case PRE_DEC: | |
5583 | case PRE_INC: | |
5584 | case POST_DEC: | |
5585 | case POST_INC: | |
47a3dae1 | 5586 | /* We do not run this function with arguments having side effects. */ |
282899df | 5587 | gcc_unreachable (); |
a13d4ebf AM |
5588 | |
5589 | case PC: | |
5590 | case CC0: /*FIXME*/ | |
5591 | case CONST: | |
5592 | case CONST_INT: | |
5593 | case CONST_DOUBLE: | |
69ef87e2 | 5594 | case CONST_VECTOR: |
a13d4ebf AM |
5595 | case SYMBOL_REF: |
5596 | case LABEL_REF: | |
5597 | case ADDR_VEC: | |
5598 | case ADDR_DIFF_VEC: | |
47a3dae1 | 5599 | return accum; |
a13d4ebf AM |
5600 | |
5601 | default: | |
5602 | break; | |
5603 | } | |
5604 | ||
5605 | i = GET_RTX_LENGTH (code) - 1; | |
5606 | fmt = GET_RTX_FORMAT (code); | |
589005ff | 5607 | |
a13d4ebf AM |
5608 | for (; i >= 0; i--) |
5609 | { | |
5610 | if (fmt[i] == 'e') | |
5611 | { | |
5612 | rtx tem = XEXP (x, i); | |
5613 | ||
5614 | /* If we are about to do the last recursive call | |
47a3dae1 | 5615 | needed at this level, change it into iteration. */ |
a13d4ebf AM |
5616 | if (i == 0) |
5617 | { | |
5618 | x = tem; | |
5619 | goto repeat; | |
5620 | } | |
589005ff | 5621 | |
47a3dae1 | 5622 | accum = extract_mentioned_regs_helper (tem, accum); |
a13d4ebf AM |
5623 | } |
5624 | else if (fmt[i] == 'E') | |
5625 | { | |
5626 | int j; | |
589005ff | 5627 | |
a13d4ebf | 5628 | for (j = 0; j < XVECLEN (x, i); j++) |
47a3dae1 | 5629 | accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum); |
a13d4ebf AM |
5630 | } |
5631 | } | |
5632 | ||
47a3dae1 | 5633 | return accum; |
a13d4ebf AM |
5634 | } |
5635 | ||
47a3dae1 ZD |
5636 | /* Determine whether INSN is MEM store pattern that we will consider moving. |
5637 | REGS_SET_BEFORE is bitmap of registers set before (and including) the | |
5638 | current insn, REGS_SET_AFTER is bitmap of registers set after (and | |
5639 | including) the insn in this basic block. We must be passing through BB from | |
5640 | head to end, as we are using this fact to speed things up. | |
1d088dee | 5641 | |
47a3dae1 ZD |
5642 | The results are stored this way: |
5643 | ||
5644 | -- the first anticipatable expression is added into ANTIC_STORE_LIST | |
5645 | -- if the processed expression is not anticipatable, NULL_RTX is added | |
5646 | there instead, so that we can use it as indicator that no further | |
5647 | expression of this type may be anticipatable | |
5648 | -- if the expression is available, it is added as head of AVAIL_STORE_LIST; | |
5649 | consequently, all of them but this head are dead and may be deleted. | |
5650 | -- if the expression is not available, the insn due to that it fails to be | |
5651 | available is stored in reaching_reg. | |
5652 | ||
5653 | The things are complicated a bit by fact that there already may be stores | |
5654 | to the same MEM from other blocks; also caller must take care of the | |
e0bb17a8 | 5655 | necessary cleanup of the temporary markers after end of the basic block. |
47a3dae1 | 5656 | */ |
a13d4ebf AM |
5657 | |
5658 | static void | |
1d088dee | 5659 | find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after) |
a13d4ebf AM |
5660 | { |
5661 | struct ls_expr * ptr; | |
47a3dae1 ZD |
5662 | rtx dest, set, tmp; |
5663 | int check_anticipatable, check_available; | |
5664 | basic_block bb = BLOCK_FOR_INSN (insn); | |
a13d4ebf | 5665 | |
47a3dae1 ZD |
5666 | set = single_set (insn); |
5667 | if (!set) | |
a13d4ebf AM |
5668 | return; |
5669 | ||
47a3dae1 | 5670 | dest = SET_DEST (set); |
589005ff | 5671 | |
7b1b4aed | 5672 | if (! MEM_P (dest) || MEM_VOLATILE_P (dest) |
a13d4ebf | 5673 | || GET_MODE (dest) == BLKmode) |
aaa4ca30 AJ |
5674 | return; |
5675 | ||
47a3dae1 ZD |
5676 | if (side_effects_p (dest)) |
5677 | return; | |
aaa4ca30 | 5678 | |
47a3dae1 ZD |
5679 | /* If we are handling exceptions, we must be careful with memory references |
5680 | that may trap. If we are not, the behavior is undefined, so we may just | |
5681 | continue. */ | |
94f24ddc | 5682 | if (flag_non_call_exceptions && may_trap_p (dest)) |
47a3dae1 | 5683 | return; |
1d088dee | 5684 | |
c2e2375e UW |
5685 | /* Even if the destination cannot trap, the source may. In this case we'd |
5686 | need to handle updating the REG_EH_REGION note. */ | |
5687 | if (find_reg_note (insn, REG_EH_REGION, NULL_RTX)) | |
5688 | return; | |
5689 | ||
a13d4ebf | 5690 | ptr = ldst_entry (dest); |
47a3dae1 ZD |
5691 | if (!ptr->pattern_regs) |
5692 | ptr->pattern_regs = extract_mentioned_regs (dest); | |
5693 | ||
5694 | /* Do not check for anticipatability if we either found one anticipatable | |
5695 | store already, or tested for one and found out that it was killed. */ | |
5696 | check_anticipatable = 0; | |
5697 | if (!ANTIC_STORE_LIST (ptr)) | |
5698 | check_anticipatable = 1; | |
5699 | else | |
5700 | { | |
5701 | tmp = XEXP (ANTIC_STORE_LIST (ptr), 0); | |
5702 | if (tmp != NULL_RTX | |
5703 | && BLOCK_FOR_INSN (tmp) != bb) | |
5704 | check_anticipatable = 1; | |
5705 | } | |
5706 | if (check_anticipatable) | |
5707 | { | |
5708 | if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before)) | |
5709 | tmp = NULL_RTX; | |
5710 | else | |
5711 | tmp = insn; | |
5712 | ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp, | |
5713 | ANTIC_STORE_LIST (ptr)); | |
5714 | } | |
a13d4ebf | 5715 | |
e0bb17a8 | 5716 | /* It is not necessary to check whether store is available if we did |
47a3dae1 ZD |
5717 | it successfully before; if we failed before, do not bother to check |
5718 | until we reach the insn that caused us to fail. */ | |
5719 | check_available = 0; | |
5720 | if (!AVAIL_STORE_LIST (ptr)) | |
5721 | check_available = 1; | |
5722 | else | |
5723 | { | |
5724 | tmp = XEXP (AVAIL_STORE_LIST (ptr), 0); | |
5725 | if (BLOCK_FOR_INSN (tmp) != bb) | |
5726 | check_available = 1; | |
5727 | } | |
5728 | if (check_available) | |
5729 | { | |
5730 | /* Check that we have already reached the insn at that the check | |
5731 | failed last time. */ | |
5732 | if (LAST_AVAIL_CHECK_FAILURE (ptr)) | |
5733 | { | |
a813c111 | 5734 | for (tmp = BB_END (bb); |
47a3dae1 ZD |
5735 | tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr); |
5736 | tmp = PREV_INSN (tmp)) | |
5737 | continue; | |
5738 | if (tmp == insn) | |
5739 | check_available = 0; | |
5740 | } | |
5741 | else | |
5742 | check_available = store_killed_after (dest, ptr->pattern_regs, insn, | |
5743 | bb, regs_set_after, | |
5744 | &LAST_AVAIL_CHECK_FAILURE (ptr)); | |
5745 | } | |
5746 | if (!check_available) | |
5747 | AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr)); | |
5748 | } | |
1d088dee | 5749 | |
47a3dae1 | 5750 | /* Find available and anticipatable stores. */ |
a13d4ebf AM |
5751 | |
5752 | static int | |
1d088dee | 5753 | compute_store_table (void) |
a13d4ebf | 5754 | { |
e0082a72 ZD |
5755 | int ret; |
5756 | basic_block bb; | |
aaa4ca30 | 5757 | unsigned regno; |
47a3dae1 ZD |
5758 | rtx insn, pat, tmp; |
5759 | int *last_set_in, *already_set; | |
5760 | struct ls_expr * ptr, **prev_next_ptr_ptr; | |
aaa4ca30 | 5761 | |
a13d4ebf AM |
5762 | max_gcse_regno = max_reg_num (); |
5763 | ||
703ad42b | 5764 | reg_set_in_block = sbitmap_vector_alloc (last_basic_block, |
aaa4ca30 | 5765 | max_gcse_regno); |
d55bc081 | 5766 | sbitmap_vector_zero (reg_set_in_block, last_basic_block); |
a13d4ebf | 5767 | pre_ldst_mems = 0; |
01c43039 | 5768 | last_set_in = xcalloc (max_gcse_regno, sizeof (int)); |
47a3dae1 | 5769 | already_set = xmalloc (sizeof (int) * max_gcse_regno); |
aaa4ca30 | 5770 | |
a13d4ebf | 5771 | /* Find all the stores we care about. */ |
e0082a72 | 5772 | FOR_EACH_BB (bb) |
a13d4ebf | 5773 | { |
47a3dae1 | 5774 | /* First compute the registers set in this block. */ |
47a3dae1 ZD |
5775 | regvec = last_set_in; |
5776 | ||
a813c111 SB |
5777 | for (insn = BB_HEAD (bb); |
5778 | insn != NEXT_INSN (BB_END (bb)); | |
47a3dae1 ZD |
5779 | insn = NEXT_INSN (insn)) |
5780 | { | |
5781 | if (! INSN_P (insn)) | |
5782 | continue; | |
5783 | ||
7b1b4aed | 5784 | if (CALL_P (insn)) |
47a3dae1 ZD |
5785 | { |
5786 | bool clobbers_all = false; | |
5787 | #ifdef NON_SAVING_SETJMP | |
5788 | if (NON_SAVING_SETJMP | |
5789 | && find_reg_note (insn, REG_SETJMP, NULL_RTX)) | |
5790 | clobbers_all = true; | |
5791 | #endif | |
5792 | ||
5793 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
5794 | if (clobbers_all | |
5795 | || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
01c43039 RE |
5796 | { |
5797 | last_set_in[regno] = INSN_UID (insn); | |
5798 | SET_BIT (reg_set_in_block[bb->index], regno); | |
5799 | } | |
47a3dae1 ZD |
5800 | } |
5801 | ||
5802 | pat = PATTERN (insn); | |
5803 | compute_store_table_current_insn = insn; | |
01c43039 | 5804 | note_stores (pat, reg_set_info, reg_set_in_block[bb->index]); |
47a3dae1 ZD |
5805 | } |
5806 | ||
47a3dae1 ZD |
5807 | /* Now find the stores. */ |
5808 | memset (already_set, 0, sizeof (int) * max_gcse_regno); | |
5809 | regvec = already_set; | |
a813c111 SB |
5810 | for (insn = BB_HEAD (bb); |
5811 | insn != NEXT_INSN (BB_END (bb)); | |
47a3dae1 | 5812 | insn = NEXT_INSN (insn)) |
a13d4ebf | 5813 | { |
19652adf | 5814 | if (! INSN_P (insn)) |
a13d4ebf AM |
5815 | continue; |
5816 | ||
7b1b4aed | 5817 | if (CALL_P (insn)) |
aaa4ca30 | 5818 | { |
19652adf | 5819 | bool clobbers_all = false; |
589005ff | 5820 | #ifdef NON_SAVING_SETJMP |
19652adf ZW |
5821 | if (NON_SAVING_SETJMP |
5822 | && find_reg_note (insn, REG_SETJMP, NULL_RTX)) | |
5823 | clobbers_all = true; | |
5824 | #endif | |
5825 | ||
aaa4ca30 | 5826 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
19652adf ZW |
5827 | if (clobbers_all |
5828 | || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
47a3dae1 | 5829 | already_set[regno] = 1; |
aaa4ca30 | 5830 | } |
589005ff | 5831 | |
a13d4ebf | 5832 | pat = PATTERN (insn); |
aaa4ca30 | 5833 | note_stores (pat, reg_set_info, NULL); |
589005ff | 5834 | |
a13d4ebf | 5835 | /* Now that we've marked regs, look for stores. */ |
47a3dae1 ZD |
5836 | find_moveable_store (insn, already_set, last_set_in); |
5837 | ||
5838 | /* Unmark regs that are no longer set. */ | |
01c43039 RE |
5839 | compute_store_table_current_insn = insn; |
5840 | note_stores (pat, reg_clear_last_set, last_set_in); | |
7b1b4aed | 5841 | if (CALL_P (insn)) |
01c43039 RE |
5842 | { |
5843 | bool clobbers_all = false; | |
5844 | #ifdef NON_SAVING_SETJMP | |
5845 | if (NON_SAVING_SETJMP | |
5846 | && find_reg_note (insn, REG_SETJMP, NULL_RTX)) | |
5847 | clobbers_all = true; | |
5848 | #endif | |
5849 | ||
5850 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
5851 | if ((clobbers_all | |
5852 | || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) | |
5853 | && last_set_in[regno] == INSN_UID (insn)) | |
5854 | last_set_in[regno] = 0; | |
5855 | } | |
47a3dae1 ZD |
5856 | } |
5857 | ||
01c43039 RE |
5858 | #ifdef ENABLE_CHECKING |
5859 | /* last_set_in should now be all-zero. */ | |
5860 | for (regno = 0; regno < max_gcse_regno; regno++) | |
282899df | 5861 | gcc_assert (!last_set_in[regno]); |
01c43039 RE |
5862 | #endif |
5863 | ||
47a3dae1 ZD |
5864 | /* Clear temporary marks. */ |
5865 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) | |
5866 | { | |
5867 | LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX; | |
5868 | if (ANTIC_STORE_LIST (ptr) | |
5869 | && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX) | |
5870 | ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1); | |
5871 | } | |
5872 | } | |
5873 | ||
5874 | /* Remove the stores that are not available anywhere, as there will | |
5875 | be no opportunity to optimize them. */ | |
5876 | for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems; | |
5877 | ptr != NULL; | |
5878 | ptr = *prev_next_ptr_ptr) | |
5879 | { | |
5880 | if (!AVAIL_STORE_LIST (ptr)) | |
5881 | { | |
5882 | *prev_next_ptr_ptr = ptr->next; | |
5883 | free_ldst_entry (ptr); | |
a13d4ebf | 5884 | } |
47a3dae1 ZD |
5885 | else |
5886 | prev_next_ptr_ptr = &ptr->next; | |
a13d4ebf AM |
5887 | } |
5888 | ||
5889 | ret = enumerate_ldsts (); | |
589005ff | 5890 | |
a13d4ebf AM |
5891 | if (gcse_file) |
5892 | { | |
47a3dae1 | 5893 | fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n"); |
a13d4ebf AM |
5894 | print_ldst_list (gcse_file); |
5895 | } | |
589005ff | 5896 | |
47a3dae1 ZD |
5897 | free (last_set_in); |
5898 | free (already_set); | |
a13d4ebf AM |
5899 | return ret; |
5900 | } | |
5901 | ||
3b14e3af ZD |
5902 | /* Check to see if the load X is aliased with STORE_PATTERN. |
5903 | AFTER is true if we are checking the case when STORE_PATTERN occurs | |
5904 | after the X. */ | |
a13d4ebf | 5905 | |
47a3dae1 | 5906 | static bool |
3b14e3af | 5907 | load_kills_store (rtx x, rtx store_pattern, int after) |
a13d4ebf | 5908 | { |
3b14e3af ZD |
5909 | if (after) |
5910 | return anti_dependence (x, store_pattern); | |
5911 | else | |
5912 | return true_dependence (store_pattern, GET_MODE (store_pattern), x, | |
5913 | rtx_addr_varies_p); | |
a13d4ebf AM |
5914 | } |
5915 | ||
589005ff | 5916 | /* Go through the entire insn X, looking for any loads which might alias |
3b14e3af ZD |
5917 | STORE_PATTERN. Return true if found. |
5918 | AFTER is true if we are checking the case when STORE_PATTERN occurs | |
5919 | after the insn X. */ | |
a13d4ebf | 5920 | |
47a3dae1 | 5921 | static bool |
3b14e3af | 5922 | find_loads (rtx x, rtx store_pattern, int after) |
a13d4ebf AM |
5923 | { |
5924 | const char * fmt; | |
8e42ace1 | 5925 | int i, j; |
47a3dae1 | 5926 | int ret = false; |
a13d4ebf | 5927 | |
24a28584 | 5928 | if (!x) |
47a3dae1 | 5929 | return false; |
24a28584 | 5930 | |
589005ff | 5931 | if (GET_CODE (x) == SET) |
a13d4ebf AM |
5932 | x = SET_SRC (x); |
5933 | ||
7b1b4aed | 5934 | if (MEM_P (x)) |
a13d4ebf | 5935 | { |
3b14e3af | 5936 | if (load_kills_store (x, store_pattern, after)) |
47a3dae1 | 5937 | return true; |
a13d4ebf AM |
5938 | } |
5939 | ||
5940 | /* Recursively process the insn. */ | |
5941 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
589005ff | 5942 | |
a13d4ebf AM |
5943 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--) |
5944 | { | |
5945 | if (fmt[i] == 'e') | |
3b14e3af | 5946 | ret |= find_loads (XEXP (x, i), store_pattern, after); |
a13d4ebf AM |
5947 | else if (fmt[i] == 'E') |
5948 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
3b14e3af | 5949 | ret |= find_loads (XVECEXP (x, i, j), store_pattern, after); |
a13d4ebf AM |
5950 | } |
5951 | return ret; | |
5952 | } | |
5953 | ||
589005ff | 5954 | /* Check if INSN kills the store pattern X (is aliased with it). |
3b14e3af ZD |
5955 | AFTER is true if we are checking the case when store X occurs |
5956 | after the insn. Return true if it it does. */ | |
a13d4ebf | 5957 | |
47a3dae1 | 5958 | static bool |
3b14e3af | 5959 | store_killed_in_insn (rtx x, rtx x_regs, rtx insn, int after) |
a13d4ebf | 5960 | { |
d088acea | 5961 | rtx reg, base, note; |
94f24ddc | 5962 | |
735e8085 | 5963 | if (!INSN_P (insn)) |
47a3dae1 | 5964 | return false; |
589005ff | 5965 | |
7b1b4aed | 5966 | if (CALL_P (insn)) |
a13d4ebf | 5967 | { |
1218665b JJ |
5968 | /* A normal or pure call might read from pattern, |
5969 | but a const call will not. */ | |
47a3dae1 ZD |
5970 | if (! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn)) |
5971 | return true; | |
5972 | ||
94f24ddc ZD |
5973 | /* But even a const call reads its parameters. Check whether the |
5974 | base of some of registers used in mem is stack pointer. */ | |
5975 | for (reg = x_regs; reg; reg = XEXP (reg, 1)) | |
5976 | { | |
bc083e18 | 5977 | base = find_base_term (XEXP (reg, 0)); |
94f24ddc ZD |
5978 | if (!base |
5979 | || (GET_CODE (base) == ADDRESS | |
5980 | && GET_MODE (base) == Pmode | |
5981 | && XEXP (base, 0) == stack_pointer_rtx)) | |
5982 | return true; | |
5983 | } | |
47a3dae1 ZD |
5984 | |
5985 | return false; | |
a13d4ebf | 5986 | } |
589005ff | 5987 | |
a13d4ebf AM |
5988 | if (GET_CODE (PATTERN (insn)) == SET) |
5989 | { | |
5990 | rtx pat = PATTERN (insn); | |
3b14e3af ZD |
5991 | rtx dest = SET_DEST (pat); |
5992 | ||
5993 | if (GET_CODE (dest) == SIGN_EXTRACT | |
5994 | || GET_CODE (dest) == ZERO_EXTRACT) | |
5995 | dest = XEXP (dest, 0); | |
5996 | ||
a13d4ebf | 5997 | /* Check for memory stores to aliased objects. */ |
7b1b4aed | 5998 | if (MEM_P (dest) |
3b14e3af ZD |
5999 | && !expr_equiv_p (dest, x)) |
6000 | { | |
6001 | if (after) | |
6002 | { | |
6003 | if (output_dependence (dest, x)) | |
6004 | return true; | |
6005 | } | |
6006 | else | |
6007 | { | |
6008 | if (output_dependence (x, dest)) | |
6009 | return true; | |
6010 | } | |
6011 | } | |
d088acea ZD |
6012 | if (find_loads (SET_SRC (pat), x, after)) |
6013 | return true; | |
a13d4ebf | 6014 | } |
d088acea ZD |
6015 | else if (find_loads (PATTERN (insn), x, after)) |
6016 | return true; | |
6017 | ||
6018 | /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory | |
6019 | location aliased with X, then this insn kills X. */ | |
6020 | note = find_reg_equal_equiv_note (insn); | |
6021 | if (! note) | |
6022 | return false; | |
6023 | note = XEXP (note, 0); | |
6024 | ||
6025 | /* However, if the note represents a must alias rather than a may | |
6026 | alias relationship, then it does not kill X. */ | |
6027 | if (expr_equiv_p (note, x)) | |
6028 | return false; | |
6029 | ||
6030 | /* See if there are any aliased loads in the note. */ | |
6031 | return find_loads (note, x, after); | |
a13d4ebf AM |
6032 | } |
6033 | ||
47a3dae1 ZD |
6034 | /* Returns true if the expression X is loaded or clobbered on or after INSN |
6035 | within basic block BB. REGS_SET_AFTER is bitmap of registers set in | |
6036 | or after the insn. X_REGS is list of registers mentioned in X. If the store | |
6037 | is killed, return the last insn in that it occurs in FAIL_INSN. */ | |
a13d4ebf | 6038 | |
47a3dae1 | 6039 | static bool |
1d088dee AJ |
6040 | store_killed_after (rtx x, rtx x_regs, rtx insn, basic_block bb, |
6041 | int *regs_set_after, rtx *fail_insn) | |
a13d4ebf | 6042 | { |
a813c111 | 6043 | rtx last = BB_END (bb), act; |
aaa4ca30 | 6044 | |
47a3dae1 | 6045 | if (!store_ops_ok (x_regs, regs_set_after)) |
1d088dee | 6046 | { |
47a3dae1 ZD |
6047 | /* We do not know where it will happen. */ |
6048 | if (fail_insn) | |
6049 | *fail_insn = NULL_RTX; | |
6050 | return true; | |
6051 | } | |
a13d4ebf | 6052 | |
47a3dae1 ZD |
6053 | /* Scan from the end, so that fail_insn is determined correctly. */ |
6054 | for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act)) | |
3b14e3af | 6055 | if (store_killed_in_insn (x, x_regs, act, false)) |
47a3dae1 ZD |
6056 | { |
6057 | if (fail_insn) | |
6058 | *fail_insn = act; | |
6059 | return true; | |
6060 | } | |
589005ff | 6061 | |
47a3dae1 | 6062 | return false; |
a13d4ebf | 6063 | } |
1d088dee | 6064 | |
47a3dae1 ZD |
6065 | /* Returns true if the expression X is loaded or clobbered on or before INSN |
6066 | within basic block BB. X_REGS is list of registers mentioned in X. | |
6067 | REGS_SET_BEFORE is bitmap of registers set before or in this insn. */ | |
6068 | static bool | |
1d088dee AJ |
6069 | store_killed_before (rtx x, rtx x_regs, rtx insn, basic_block bb, |
6070 | int *regs_set_before) | |
a13d4ebf | 6071 | { |
a813c111 | 6072 | rtx first = BB_HEAD (bb); |
a13d4ebf | 6073 | |
47a3dae1 ZD |
6074 | if (!store_ops_ok (x_regs, regs_set_before)) |
6075 | return true; | |
a13d4ebf | 6076 | |
47a3dae1 | 6077 | for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn)) |
3b14e3af | 6078 | if (store_killed_in_insn (x, x_regs, insn, true)) |
47a3dae1 | 6079 | return true; |
589005ff | 6080 | |
47a3dae1 | 6081 | return false; |
a13d4ebf | 6082 | } |
1d088dee | 6083 | |
47a3dae1 ZD |
6084 | /* Fill in available, anticipatable, transparent and kill vectors in |
6085 | STORE_DATA, based on lists of available and anticipatable stores. */ | |
a13d4ebf | 6086 | static void |
1d088dee | 6087 | build_store_vectors (void) |
a13d4ebf | 6088 | { |
47a3dae1 ZD |
6089 | basic_block bb; |
6090 | int *regs_set_in_block; | |
a13d4ebf AM |
6091 | rtx insn, st; |
6092 | struct ls_expr * ptr; | |
47a3dae1 | 6093 | unsigned regno; |
a13d4ebf AM |
6094 | |
6095 | /* Build the gen_vector. This is any store in the table which is not killed | |
6096 | by aliasing later in its block. */ | |
703ad42b | 6097 | ae_gen = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 6098 | sbitmap_vector_zero (ae_gen, last_basic_block); |
a13d4ebf | 6099 | |
703ad42b | 6100 | st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 6101 | sbitmap_vector_zero (st_antloc, last_basic_block); |
aaa4ca30 | 6102 | |
a13d4ebf | 6103 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) |
589005ff | 6104 | { |
47a3dae1 | 6105 | for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1)) |
a13d4ebf AM |
6106 | { |
6107 | insn = XEXP (st, 0); | |
e2d2ed72 | 6108 | bb = BLOCK_FOR_INSN (insn); |
589005ff | 6109 | |
47a3dae1 ZD |
6110 | /* If we've already seen an available expression in this block, |
6111 | we can delete this one (It occurs earlier in the block). We'll | |
6112 | copy the SRC expression to an unused register in case there | |
6113 | are any side effects. */ | |
6114 | if (TEST_BIT (ae_gen[bb->index], ptr->index)) | |
a13d4ebf | 6115 | { |
47a3dae1 ZD |
6116 | rtx r = gen_reg_rtx (GET_MODE (ptr->pattern)); |
6117 | if (gcse_file) | |
6118 | fprintf (gcse_file, "Removing redundant store:\n"); | |
d088acea | 6119 | replace_store_insn (r, XEXP (st, 0), bb, ptr); |
47a3dae1 | 6120 | continue; |
a13d4ebf | 6121 | } |
47a3dae1 | 6122 | SET_BIT (ae_gen[bb->index], ptr->index); |
a13d4ebf | 6123 | } |
589005ff | 6124 | |
47a3dae1 ZD |
6125 | for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1)) |
6126 | { | |
6127 | insn = XEXP (st, 0); | |
6128 | bb = BLOCK_FOR_INSN (insn); | |
6129 | SET_BIT (st_antloc[bb->index], ptr->index); | |
6130 | } | |
a13d4ebf | 6131 | } |
589005ff | 6132 | |
703ad42b | 6133 | ae_kill = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 6134 | sbitmap_vector_zero (ae_kill, last_basic_block); |
a13d4ebf | 6135 | |
703ad42b | 6136 | transp = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 6137 | sbitmap_vector_zero (transp, last_basic_block); |
47a3dae1 | 6138 | regs_set_in_block = xmalloc (sizeof (int) * max_gcse_regno); |
a13d4ebf | 6139 | |
47a3dae1 ZD |
6140 | FOR_EACH_BB (bb) |
6141 | { | |
6142 | for (regno = 0; regno < max_gcse_regno; regno++) | |
6143 | regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno); | |
6144 | ||
6145 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) | |
6146 | { | |
a813c111 | 6147 | if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb), |
47a3dae1 ZD |
6148 | bb, regs_set_in_block, NULL)) |
6149 | { | |
e0bb17a8 | 6150 | /* It should not be necessary to consider the expression |
47a3dae1 ZD |
6151 | killed if it is both anticipatable and available. */ |
6152 | if (!TEST_BIT (st_antloc[bb->index], ptr->index) | |
6153 | || !TEST_BIT (ae_gen[bb->index], ptr->index)) | |
6154 | SET_BIT (ae_kill[bb->index], ptr->index); | |
1d088dee AJ |
6155 | } |
6156 | else | |
6157 | SET_BIT (transp[bb->index], ptr->index); | |
6158 | } | |
47a3dae1 ZD |
6159 | } |
6160 | ||
6161 | free (regs_set_in_block); | |
aaa4ca30 | 6162 | |
589005ff | 6163 | if (gcse_file) |
aaa4ca30 | 6164 | { |
d55bc081 ZD |
6165 | dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block); |
6166 | dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block); | |
6167 | dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block); | |
6168 | dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block); | |
a13d4ebf AM |
6169 | } |
6170 | } | |
6171 | ||
fbe5a4a6 | 6172 | /* Insert an instruction at the beginning of a basic block, and update |
a813c111 | 6173 | the BB_HEAD if needed. */ |
a13d4ebf | 6174 | |
589005ff | 6175 | static void |
1d088dee | 6176 | insert_insn_start_bb (rtx insn, basic_block bb) |
a13d4ebf AM |
6177 | { |
6178 | /* Insert at start of successor block. */ | |
a813c111 SB |
6179 | rtx prev = PREV_INSN (BB_HEAD (bb)); |
6180 | rtx before = BB_HEAD (bb); | |
a13d4ebf AM |
6181 | while (before != 0) |
6182 | { | |
7b1b4aed SB |
6183 | if (! LABEL_P (before) |
6184 | && (! NOTE_P (before) | |
a13d4ebf AM |
6185 | || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK)) |
6186 | break; | |
6187 | prev = before; | |
a813c111 | 6188 | if (prev == BB_END (bb)) |
a13d4ebf AM |
6189 | break; |
6190 | before = NEXT_INSN (before); | |
6191 | } | |
6192 | ||
6193 | insn = emit_insn_after (insn, prev); | |
6194 | ||
a13d4ebf AM |
6195 | if (gcse_file) |
6196 | { | |
6197 | fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n", | |
0b17ab2f | 6198 | bb->index); |
a13d4ebf AM |
6199 | print_inline_rtx (gcse_file, insn, 6); |
6200 | fprintf (gcse_file, "\n"); | |
6201 | } | |
6202 | } | |
6203 | ||
6204 | /* This routine will insert a store on an edge. EXPR is the ldst entry for | |
cc2902df | 6205 | the memory reference, and E is the edge to insert it on. Returns nonzero |
a13d4ebf AM |
6206 | if an edge insertion was performed. */ |
6207 | ||
6208 | static int | |
1d088dee | 6209 | insert_store (struct ls_expr * expr, edge e) |
a13d4ebf AM |
6210 | { |
6211 | rtx reg, insn; | |
e2d2ed72 | 6212 | basic_block bb; |
a13d4ebf | 6213 | edge tmp; |
628f6a4e | 6214 | edge_iterator ei; |
a13d4ebf AM |
6215 | |
6216 | /* We did all the deleted before this insert, so if we didn't delete a | |
6217 | store, then we haven't set the reaching reg yet either. */ | |
6218 | if (expr->reaching_reg == NULL_RTX) | |
6219 | return 0; | |
6220 | ||
a0c8285b JH |
6221 | if (e->flags & EDGE_FAKE) |
6222 | return 0; | |
6223 | ||
a13d4ebf | 6224 | reg = expr->reaching_reg; |
47a3dae1 | 6225 | insn = gen_move_insn (copy_rtx (expr->pattern), reg); |
589005ff | 6226 | |
a13d4ebf AM |
6227 | /* If we are inserting this expression on ALL predecessor edges of a BB, |
6228 | insert it at the start of the BB, and reset the insert bits on the other | |
ff7cc307 | 6229 | edges so we don't try to insert it on the other edges. */ |
e2d2ed72 | 6230 | bb = e->dest; |
628f6a4e | 6231 | FOR_EACH_EDGE (tmp, ei, e->dest->preds) |
3f2eae23 | 6232 | if (!(tmp->flags & EDGE_FAKE)) |
a0c8285b JH |
6233 | { |
6234 | int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest); | |
282899df NS |
6235 | |
6236 | gcc_assert (index != EDGE_INDEX_NO_EDGE); | |
a0c8285b JH |
6237 | if (! TEST_BIT (pre_insert_map[index], expr->index)) |
6238 | break; | |
6239 | } | |
a13d4ebf AM |
6240 | |
6241 | /* If tmp is NULL, we found an insertion on every edge, blank the | |
6242 | insertion vector for these edges, and insert at the start of the BB. */ | |
e2d2ed72 | 6243 | if (!tmp && bb != EXIT_BLOCK_PTR) |
a13d4ebf | 6244 | { |
628f6a4e | 6245 | FOR_EACH_EDGE (tmp, ei, e->dest->preds) |
a13d4ebf AM |
6246 | { |
6247 | int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest); | |
6248 | RESET_BIT (pre_insert_map[index], expr->index); | |
6249 | } | |
6250 | insert_insn_start_bb (insn, bb); | |
6251 | return 0; | |
6252 | } | |
589005ff | 6253 | |
a13d4ebf AM |
6254 | /* We can't insert on this edge, so we'll insert at the head of the |
6255 | successors block. See Morgan, sec 10.5. */ | |
6256 | if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL) | |
6257 | { | |
6258 | insert_insn_start_bb (insn, bb); | |
6259 | return 0; | |
6260 | } | |
6261 | ||
6262 | insert_insn_on_edge (insn, e); | |
589005ff | 6263 | |
a13d4ebf AM |
6264 | if (gcse_file) |
6265 | { | |
6266 | fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n", | |
0b17ab2f | 6267 | e->src->index, e->dest->index); |
a13d4ebf AM |
6268 | print_inline_rtx (gcse_file, insn, 6); |
6269 | fprintf (gcse_file, "\n"); | |
6270 | } | |
589005ff | 6271 | |
a13d4ebf AM |
6272 | return 1; |
6273 | } | |
6274 | ||
d088acea ZD |
6275 | /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the |
6276 | memory location in SMEXPR set in basic block BB. | |
6277 | ||
6278 | This could be rather expensive. */ | |
6279 | ||
6280 | static void | |
6281 | remove_reachable_equiv_notes (basic_block bb, struct ls_expr *smexpr) | |
6282 | { | |
628f6a4e BE |
6283 | edge_iterator *stack, ei; |
6284 | int sp; | |
6285 | edge act; | |
d088acea | 6286 | sbitmap visited = sbitmap_alloc (last_basic_block); |
d088acea ZD |
6287 | rtx last, insn, note; |
6288 | rtx mem = smexpr->pattern; | |
6289 | ||
628f6a4e BE |
6290 | stack = xmalloc (sizeof (edge_iterator) * n_basic_blocks); |
6291 | sp = 0; | |
6292 | ei = ei_start (bb->succs); | |
6293 | ||
d088acea | 6294 | sbitmap_zero (visited); |
d088acea | 6295 | |
628f6a4e | 6296 | act = (EDGE_COUNT (ei.container) > 0 ? EDGE_I (ei.container, 0) : NULL); |
d088acea ZD |
6297 | while (1) |
6298 | { | |
6299 | if (!act) | |
6300 | { | |
628f6a4e | 6301 | if (!sp) |
d088acea ZD |
6302 | { |
6303 | free (stack); | |
6304 | sbitmap_free (visited); | |
6305 | return; | |
6306 | } | |
628f6a4e | 6307 | act = ei_edge (stack[--sp]); |
d088acea ZD |
6308 | } |
6309 | bb = act->dest; | |
7b1b4aed | 6310 | |
d088acea | 6311 | if (bb == EXIT_BLOCK_PTR |
d1c6a401 | 6312 | || TEST_BIT (visited, bb->index)) |
d088acea | 6313 | { |
628f6a4e BE |
6314 | if (!ei_end_p (ei)) |
6315 | ei_next (&ei); | |
6316 | act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL; | |
d088acea ZD |
6317 | continue; |
6318 | } | |
6319 | SET_BIT (visited, bb->index); | |
6320 | ||
6321 | if (TEST_BIT (st_antloc[bb->index], smexpr->index)) | |
6322 | { | |
6323 | for (last = ANTIC_STORE_LIST (smexpr); | |
6324 | BLOCK_FOR_INSN (XEXP (last, 0)) != bb; | |
6325 | last = XEXP (last, 1)) | |
6326 | continue; | |
6327 | last = XEXP (last, 0); | |
6328 | } | |
6329 | else | |
a813c111 | 6330 | last = NEXT_INSN (BB_END (bb)); |
7b1b4aed | 6331 | |
a813c111 | 6332 | for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn)) |
d088acea ZD |
6333 | if (INSN_P (insn)) |
6334 | { | |
6335 | note = find_reg_equal_equiv_note (insn); | |
6336 | if (!note || !expr_equiv_p (XEXP (note, 0), mem)) | |
6337 | continue; | |
6338 | ||
6339 | if (gcse_file) | |
6340 | fprintf (gcse_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n", | |
6341 | INSN_UID (insn)); | |
6342 | remove_note (insn, note); | |
6343 | } | |
628f6a4e BE |
6344 | |
6345 | if (!ei_end_p (ei)) | |
6346 | ei_next (&ei); | |
6347 | act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL; | |
6348 | ||
6349 | if (EDGE_COUNT (bb->succs) > 0) | |
d088acea ZD |
6350 | { |
6351 | if (act) | |
628f6a4e BE |
6352 | stack[sp++] = ei; |
6353 | ei = ei_start (bb->succs); | |
6354 | act = (EDGE_COUNT (ei.container) > 0 ? EDGE_I (ei.container, 0) : NULL); | |
d088acea ZD |
6355 | } |
6356 | } | |
6357 | } | |
6358 | ||
a13d4ebf AM |
6359 | /* This routine will replace a store with a SET to a specified register. */ |
6360 | ||
6361 | static void | |
d088acea | 6362 | replace_store_insn (rtx reg, rtx del, basic_block bb, struct ls_expr *smexpr) |
a13d4ebf | 6363 | { |
d7fe1183 | 6364 | rtx insn, mem, note, set, ptr, pair; |
589005ff | 6365 | |
d088acea | 6366 | mem = smexpr->pattern; |
9a318d30 | 6367 | insn = gen_move_insn (reg, SET_SRC (single_set (del))); |
a13d4ebf | 6368 | insn = emit_insn_after (insn, del); |
589005ff | 6369 | |
a13d4ebf AM |
6370 | if (gcse_file) |
6371 | { | |
589005ff | 6372 | fprintf (gcse_file, |
0b17ab2f | 6373 | "STORE_MOTION delete insn in BB %d:\n ", bb->index); |
a13d4ebf | 6374 | print_inline_rtx (gcse_file, del, 6); |
8e42ace1 | 6375 | fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n "); |
a13d4ebf | 6376 | print_inline_rtx (gcse_file, insn, 6); |
8e42ace1 | 6377 | fprintf (gcse_file, "\n"); |
a13d4ebf | 6378 | } |
589005ff | 6379 | |
d088acea ZD |
6380 | for (ptr = ANTIC_STORE_LIST (smexpr); ptr; ptr = XEXP (ptr, 1)) |
6381 | if (XEXP (ptr, 0) == del) | |
6382 | { | |
6383 | XEXP (ptr, 0) = insn; | |
6384 | break; | |
6385 | } | |
d7fe1183 ZD |
6386 | |
6387 | /* Move the notes from the deleted insn to its replacement, and patch | |
6388 | up the LIBCALL notes. */ | |
6389 | REG_NOTES (insn) = REG_NOTES (del); | |
6390 | ||
6391 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); | |
6392 | if (note) | |
6393 | { | |
6394 | pair = XEXP (note, 0); | |
6395 | note = find_reg_note (pair, REG_LIBCALL, NULL_RTX); | |
6396 | XEXP (note, 0) = insn; | |
6397 | } | |
6398 | note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); | |
6399 | if (note) | |
6400 | { | |
6401 | pair = XEXP (note, 0); | |
6402 | note = find_reg_note (pair, REG_RETVAL, NULL_RTX); | |
6403 | XEXP (note, 0) = insn; | |
6404 | } | |
6405 | ||
49ce134f | 6406 | delete_insn (del); |
d088acea ZD |
6407 | |
6408 | /* Now we must handle REG_EQUAL notes whose contents is equal to the mem; | |
6409 | they are no longer accurate provided that they are reached by this | |
6410 | definition, so drop them. */ | |
a813c111 | 6411 | for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn)) |
d088acea ZD |
6412 | if (INSN_P (insn)) |
6413 | { | |
6414 | set = single_set (insn); | |
6415 | if (!set) | |
6416 | continue; | |
6417 | if (expr_equiv_p (SET_DEST (set), mem)) | |
6418 | return; | |
6419 | note = find_reg_equal_equiv_note (insn); | |
6420 | if (!note || !expr_equiv_p (XEXP (note, 0), mem)) | |
6421 | continue; | |
6422 | ||
6423 | if (gcse_file) | |
6424 | fprintf (gcse_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n", | |
6425 | INSN_UID (insn)); | |
6426 | remove_note (insn, note); | |
6427 | } | |
6428 | remove_reachable_equiv_notes (bb, smexpr); | |
a13d4ebf AM |
6429 | } |
6430 | ||
6431 | ||
6432 | /* Delete a store, but copy the value that would have been stored into | |
6433 | the reaching_reg for later storing. */ | |
6434 | ||
6435 | static void | |
1d088dee | 6436 | delete_store (struct ls_expr * expr, basic_block bb) |
a13d4ebf AM |
6437 | { |
6438 | rtx reg, i, del; | |
6439 | ||
6440 | if (expr->reaching_reg == NULL_RTX) | |
6441 | expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern)); | |
a13d4ebf | 6442 | |
a13d4ebf | 6443 | reg = expr->reaching_reg; |
589005ff | 6444 | |
a13d4ebf AM |
6445 | for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1)) |
6446 | { | |
6447 | del = XEXP (i, 0); | |
e2d2ed72 | 6448 | if (BLOCK_FOR_INSN (del) == bb) |
a13d4ebf | 6449 | { |
589005ff | 6450 | /* We know there is only one since we deleted redundant |
a13d4ebf | 6451 | ones during the available computation. */ |
d088acea | 6452 | replace_store_insn (reg, del, bb, expr); |
a13d4ebf AM |
6453 | break; |
6454 | } | |
6455 | } | |
6456 | } | |
6457 | ||
6458 | /* Free memory used by store motion. */ | |
6459 | ||
589005ff | 6460 | static void |
1d088dee | 6461 | free_store_memory (void) |
a13d4ebf AM |
6462 | { |
6463 | free_ldst_mems (); | |
589005ff | 6464 | |
a13d4ebf | 6465 | if (ae_gen) |
5a660bff | 6466 | sbitmap_vector_free (ae_gen); |
a13d4ebf | 6467 | if (ae_kill) |
5a660bff | 6468 | sbitmap_vector_free (ae_kill); |
a13d4ebf | 6469 | if (transp) |
5a660bff | 6470 | sbitmap_vector_free (transp); |
a13d4ebf | 6471 | if (st_antloc) |
5a660bff | 6472 | sbitmap_vector_free (st_antloc); |
a13d4ebf | 6473 | if (pre_insert_map) |
5a660bff | 6474 | sbitmap_vector_free (pre_insert_map); |
a13d4ebf | 6475 | if (pre_delete_map) |
5a660bff | 6476 | sbitmap_vector_free (pre_delete_map); |
aaa4ca30 AJ |
6477 | if (reg_set_in_block) |
6478 | sbitmap_vector_free (reg_set_in_block); | |
589005ff | 6479 | |
a13d4ebf AM |
6480 | ae_gen = ae_kill = transp = st_antloc = NULL; |
6481 | pre_insert_map = pre_delete_map = reg_set_in_block = NULL; | |
6482 | } | |
6483 | ||
6484 | /* Perform store motion. Much like gcse, except we move expressions the | |
6485 | other way by looking at the flowgraph in reverse. */ | |
6486 | ||
6487 | static void | |
1d088dee | 6488 | store_motion (void) |
a13d4ebf | 6489 | { |
e0082a72 | 6490 | basic_block bb; |
0b17ab2f | 6491 | int x; |
a13d4ebf | 6492 | struct ls_expr * ptr; |
adfcce61 | 6493 | int update_flow = 0; |
aaa4ca30 | 6494 | |
a13d4ebf AM |
6495 | if (gcse_file) |
6496 | { | |
6497 | fprintf (gcse_file, "before store motion\n"); | |
6498 | print_rtl (gcse_file, get_insns ()); | |
6499 | } | |
6500 | ||
a13d4ebf | 6501 | init_alias_analysis (); |
aaa4ca30 | 6502 | |
47a3dae1 | 6503 | /* Find all the available and anticipatable stores. */ |
a13d4ebf AM |
6504 | num_stores = compute_store_table (); |
6505 | if (num_stores == 0) | |
6506 | { | |
aaa4ca30 | 6507 | sbitmap_vector_free (reg_set_in_block); |
a13d4ebf AM |
6508 | end_alias_analysis (); |
6509 | return; | |
6510 | } | |
6511 | ||
47a3dae1 | 6512 | /* Now compute kill & transp vectors. */ |
a13d4ebf | 6513 | build_store_vectors (); |
47a3dae1 | 6514 | add_noreturn_fake_exit_edges (); |
2a868ea4 | 6515 | connect_infinite_loops_to_exit (); |
a13d4ebf | 6516 | |
589005ff KH |
6517 | edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen, |
6518 | st_antloc, ae_kill, &pre_insert_map, | |
a13d4ebf AM |
6519 | &pre_delete_map); |
6520 | ||
6521 | /* Now we want to insert the new stores which are going to be needed. */ | |
6522 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) | |
6523 | { | |
e0082a72 ZD |
6524 | FOR_EACH_BB (bb) |
6525 | if (TEST_BIT (pre_delete_map[bb->index], ptr->index)) | |
6526 | delete_store (ptr, bb); | |
a13d4ebf | 6527 | |
0b17ab2f RH |
6528 | for (x = 0; x < NUM_EDGES (edge_list); x++) |
6529 | if (TEST_BIT (pre_insert_map[x], ptr->index)) | |
6530 | update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x)); | |
a13d4ebf AM |
6531 | } |
6532 | ||
6533 | if (update_flow) | |
6534 | commit_edge_insertions (); | |
aaa4ca30 | 6535 | |
a13d4ebf AM |
6536 | free_store_memory (); |
6537 | free_edge_list (edge_list); | |
6809cbf9 | 6538 | remove_fake_exit_edges (); |
a13d4ebf AM |
6539 | end_alias_analysis (); |
6540 | } | |
e2500fed | 6541 | |
a0134312 RS |
6542 | \f |
6543 | /* Entry point for jump bypassing optimization pass. */ | |
6544 | ||
6545 | int | |
1d088dee | 6546 | bypass_jumps (FILE *file) |
a0134312 RS |
6547 | { |
6548 | int changed; | |
6549 | ||
6550 | /* We do not construct an accurate cfg in functions which call | |
6551 | setjmp, so just punt to be safe. */ | |
6552 | if (current_function_calls_setjmp) | |
6553 | return 0; | |
6554 | ||
6555 | /* For calling dump_foo fns from gdb. */ | |
6556 | debug_stderr = stderr; | |
6557 | gcse_file = file; | |
6558 | ||
6559 | /* Identify the basic block information for this function, including | |
6560 | successors and predecessors. */ | |
6561 | max_gcse_regno = max_reg_num (); | |
6562 | ||
6563 | if (file) | |
6564 | dump_flow_info (file); | |
6565 | ||
6614fd40 | 6566 | /* Return if there's nothing to do, or it is too expensive. */ |
d128effb | 6567 | if (n_basic_blocks <= 1 || is_too_expensive (_ ("jump bypassing disabled"))) |
a0134312 RS |
6568 | return 0; |
6569 | ||
a0134312 RS |
6570 | gcc_obstack_init (&gcse_obstack); |
6571 | bytes_used = 0; | |
6572 | ||
6573 | /* We need alias. */ | |
6574 | init_alias_analysis (); | |
6575 | ||
6576 | /* Record where pseudo-registers are set. This data is kept accurate | |
6577 | during each pass. ??? We could also record hard-reg information here | |
6578 | [since it's unchanging], however it is currently done during hash table | |
6579 | computation. | |
6580 | ||
6581 | It may be tempting to compute MEM set information here too, but MEM sets | |
6582 | will be subject to code motion one day and thus we need to compute | |
6583 | information about memory sets when we build the hash tables. */ | |
6584 | ||
6585 | alloc_reg_set_mem (max_gcse_regno); | |
6586 | compute_sets (get_insns ()); | |
6587 | ||
6588 | max_gcse_regno = max_reg_num (); | |
6589 | alloc_gcse_mem (get_insns ()); | |
27fb79ad | 6590 | changed = one_cprop_pass (MAX_GCSE_PASSES + 2, 1, 1); |
a0134312 RS |
6591 | free_gcse_mem (); |
6592 | ||
6593 | if (file) | |
6594 | { | |
6595 | fprintf (file, "BYPASS of %s: %d basic blocks, ", | |
faed5cc3 | 6596 | current_function_name (), n_basic_blocks); |
a0134312 RS |
6597 | fprintf (file, "%d bytes\n\n", bytes_used); |
6598 | } | |
6599 | ||
6600 | obstack_free (&gcse_obstack, NULL); | |
6601 | free_reg_set_mem (); | |
6602 | ||
6603 | /* We are finished with alias. */ | |
6604 | end_alias_analysis (); | |
6605 | allocate_reg_info (max_reg_num (), FALSE, FALSE); | |
6606 | ||
6607 | return changed; | |
6608 | } | |
6609 | ||
d128effb NS |
6610 | /* Return true if the graph is too expensive to optimize. PASS is the |
6611 | optimization about to be performed. */ | |
6612 | ||
6613 | static bool | |
6614 | is_too_expensive (const char *pass) | |
6615 | { | |
6616 | /* Trying to perform global optimizations on flow graphs which have | |
6617 | a high connectivity will take a long time and is unlikely to be | |
6618 | particularly useful. | |
7b1b4aed | 6619 | |
d128effb NS |
6620 | In normal circumstances a cfg should have about twice as many |
6621 | edges as blocks. But we do not want to punish small functions | |
6622 | which have a couple switch statements. Rather than simply | |
6623 | threshold the number of blocks, uses something with a more | |
6624 | graceful degradation. */ | |
6625 | if (n_edges > 20000 + n_basic_blocks * 4) | |
6626 | { | |
6627 | if (warn_disabled_optimization) | |
6628 | warning ("%s: %d basic blocks and %d edges/basic block", | |
6629 | pass, n_basic_blocks, n_edges / n_basic_blocks); | |
7b1b4aed | 6630 | |
d128effb NS |
6631 | return true; |
6632 | } | |
6633 | ||
6634 | /* If allocating memory for the cprop bitmap would take up too much | |
6635 | storage it's better just to disable the optimization. */ | |
6636 | if ((n_basic_blocks | |
6637 | * SBITMAP_SET_SIZE (max_reg_num ()) | |
6638 | * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY) | |
6639 | { | |
6640 | if (warn_disabled_optimization) | |
6641 | warning ("%s: %d basic blocks and %d registers", | |
6642 | pass, n_basic_blocks, max_reg_num ()); | |
6643 | ||
6644 | return true; | |
6645 | } | |
6646 | ||
6647 | return false; | |
6648 | } | |
6649 | ||
e2500fed | 6650 | #include "gt-gcse.h" |