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f4e584dc 1/* Global common subexpression elimination/Partial redundancy elimination
7506f491 2 and global constant/copy propagation for GNU compiler.
a0134312 3 Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003
8e42ace1 4 Free Software Foundation, Inc.
7506f491 5
1322177d 6This file is part of GCC.
7506f491 7
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8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
7506f491 12
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13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
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17
18You should have received a copy of the GNU General Public License
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19along with GCC; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2102111-1307, USA. */
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22
23/* TODO
24 - reordering of memory allocation and freeing to be more space efficient
25 - do rough calc of how many regs are needed in each block, and a rough
26 calc of how many regs are available in each class and use that to
27 throttle back the code in cases where RTX_COST is minimal.
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28 - a store to the same address as a load does not kill the load if the
29 source of the store is also the destination of the load. Handling this
30 allows more load motion, particularly out of loops.
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31 - ability to realloc sbitmap vectors would allow one initial computation
32 of reg_set_in_block with only subsequent additions, rather than
33 recomputing it for each pass
34
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35*/
36
37/* References searched while implementing this.
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38
39 Compilers Principles, Techniques and Tools
40 Aho, Sethi, Ullman
41 Addison-Wesley, 1988
42
43 Global Optimization by Suppression of Partial Redundancies
44 E. Morel, C. Renvoise
45 communications of the acm, Vol. 22, Num. 2, Feb. 1979
46
47 A Portable Machine-Independent Global Optimizer - Design and Measurements
48 Frederick Chow
49 Stanford Ph.D. thesis, Dec. 1983
50
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51 A Fast Algorithm for Code Movement Optimization
52 D.M. Dhamdhere
53 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
54
55 A Solution to a Problem with Morel and Renvoise's
56 Global Optimization by Suppression of Partial Redundancies
57 K-H Drechsler, M.P. Stadel
58 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
59
60 Practical Adaptation of the Global Optimization
61 Algorithm of Morel and Renvoise
62 D.M. Dhamdhere
63 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
64
65 Efficiently Computing Static Single Assignment Form and the Control
66 Dependence Graph
67 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
68 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
69
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70 Lazy Code Motion
71 J. Knoop, O. Ruthing, B. Steffen
72 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
73
74 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
75 Time for Reducible Flow Control
76 Thomas Ball
77 ACM Letters on Programming Languages and Systems,
78 Vol. 2, Num. 1-4, Mar-Dec 1993
79
80 An Efficient Representation for Sparse Sets
81 Preston Briggs, Linda Torczon
82 ACM Letters on Programming Languages and Systems,
83 Vol. 2, Num. 1-4, Mar-Dec 1993
84
85 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
86 K-H Drechsler, M.P. Stadel
87 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
88
89 Partial Dead Code Elimination
90 J. Knoop, O. Ruthing, B. Steffen
91 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
92
93 Effective Partial Redundancy Elimination
94 P. Briggs, K.D. Cooper
95 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
96
97 The Program Structure Tree: Computing Control Regions in Linear Time
98 R. Johnson, D. Pearson, K. Pingali
99 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
100
101 Optimal Code Motion: Theory and Practice
102 J. Knoop, O. Ruthing, B. Steffen
103 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
104
105 The power of assignment motion
106 J. Knoop, O. Ruthing, B. Steffen
107 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
108
109 Global code motion / global value numbering
110 C. Click
111 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
112
113 Value Driven Redundancy Elimination
114 L.T. Simpson
115 Rice University Ph.D. thesis, Apr. 1996
116
117 Value Numbering
118 L.T. Simpson
119 Massively Scalar Compiler Project, Rice University, Sep. 1996
120
121 High Performance Compilers for Parallel Computing
122 Michael Wolfe
123 Addison-Wesley, 1996
124
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125 Advanced Compiler Design and Implementation
126 Steven Muchnick
127 Morgan Kaufmann, 1997
128
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129 Building an Optimizing Compiler
130 Robert Morgan
131 Digital Press, 1998
132
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133 People wishing to speed up the code here should read:
134 Elimination Algorithms for Data Flow Analysis
135 B.G. Ryder, M.C. Paull
136 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
137
138 How to Analyze Large Programs Efficiently and Informatively
139 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
140 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
141
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142 People wishing to do something different can find various possibilities
143 in the above papers and elsewhere.
144*/
145
146#include "config.h"
50b2596f 147#include "system.h"
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148#include "coretypes.h"
149#include "tm.h"
01198c2f 150#include "toplev.h"
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151
152#include "rtl.h"
6baf1cc8 153#include "tm_p.h"
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154#include "regs.h"
155#include "hard-reg-set.h"
156#include "flags.h"
157#include "real.h"
158#include "insn-config.h"
159#include "recog.h"
160#include "basic-block.h"
50b2596f 161#include "output.h"
49ad7cfa 162#include "function.h"
589005ff 163#include "expr.h"
e7d482b9 164#include "except.h"
fb0c0a12 165#include "ggc.h"
f1fa37ff 166#include "params.h"
ae860ff7 167#include "cselib.h"
aaa4ca30 168
7506f491 169#include "obstack.h"
4fa31c2a 170
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171/* Propagate flow information through back edges and thus enable PRE's
172 moving loop invariant calculations out of loops.
173
174 Originally this tended to create worse overall code, but several
175 improvements during the development of PRE seem to have made following
176 back edges generally a win.
177
178 Note much of the loop invariant code motion done here would normally
179 be done by loop.c, which has more heuristics for when to move invariants
180 out of loops. At some point we might need to move some of those
181 heuristics into gcse.c. */
7506f491 182
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183/* We support GCSE via Partial Redundancy Elimination. PRE optimizations
184 are a superset of those done by GCSE.
7506f491 185
f4e584dc 186 We perform the following steps:
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187
188 1) Compute basic block information.
189
190 2) Compute table of places where registers are set.
191
192 3) Perform copy/constant propagation.
193
194 4) Perform global cse.
195
e78d9500 196 5) Perform another pass of copy/constant propagation.
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197
198 Two passes of copy/constant propagation are done because the first one
199 enables more GCSE and the second one helps to clean up the copies that
200 GCSE creates. This is needed more for PRE than for Classic because Classic
201 GCSE will try to use an existing register containing the common
202 subexpression rather than create a new one. This is harder to do for PRE
203 because of the code motion (which Classic GCSE doesn't do).
204
205 Expressions we are interested in GCSE-ing are of the form
206 (set (pseudo-reg) (expression)).
207 Function want_to_gcse_p says what these are.
208
209 PRE handles moving invariant expressions out of loops (by treating them as
f4e584dc 210 partially redundant).
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211
212 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
213 assignment) based GVN (global value numbering). L. T. Simpson's paper
214 (Rice University) on value numbering is a useful reference for this.
215
216 **********************
217
218 We used to support multiple passes but there are diminishing returns in
219 doing so. The first pass usually makes 90% of the changes that are doable.
220 A second pass can make a few more changes made possible by the first pass.
221 Experiments show any further passes don't make enough changes to justify
222 the expense.
223
224 A study of spec92 using an unlimited number of passes:
225 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
226 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
227 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
228
229 It was found doing copy propagation between each pass enables further
230 substitutions.
231
232 PRE is quite expensive in complicated functions because the DFA can take
740f35a0 233 awhile to converge. Hence we only perform one pass. The parameter max-gcse-passes can
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234 be modified if one wants to experiment.
235
236 **********************
237
238 The steps for PRE are:
239
240 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
241
242 2) Perform the data flow analysis for PRE.
243
244 3) Delete the redundant instructions
245
246 4) Insert the required copies [if any] that make the partially
247 redundant instructions fully redundant.
248
249 5) For other reaching expressions, insert an instruction to copy the value
250 to a newly created pseudo that will reach the redundant instruction.
251
252 The deletion is done first so that when we do insertions we
253 know which pseudo reg to use.
254
255 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
256 argue it is not. The number of iterations for the algorithm to converge
257 is typically 2-4 so I don't view it as that expensive (relatively speaking).
258
f4e584dc 259 PRE GCSE depends heavily on the second CSE pass to clean up the copies
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260 we create. To make an expression reach the place where it's redundant,
261 the result of the expression is copied to a new register, and the redundant
262 expression is deleted by replacing it with this new register. Classic GCSE
263 doesn't have this problem as much as it computes the reaching defs of
264 each register in each block and thus can try to use an existing register.
265
266 **********************
267
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268 A fair bit of simplicity is created by creating small functions for simple
269 tasks, even when the function is only called in one place. This may
270 measurably slow things down [or may not] by creating more function call
271 overhead than is necessary. The source is laid out so that it's trivial
272 to make the affected functions inline so that one can measure what speed
273 up, if any, can be achieved, and maybe later when things settle things can
274 be rearranged.
275
276 Help stamp out big monolithic functions! */
277\f
278/* GCSE global vars. */
279
280/* -dG dump file. */
281static FILE *gcse_file;
282
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283/* Note whether or not we should run jump optimization after gcse. We
284 want to do this for two cases.
285
286 * If we changed any jumps via cprop.
287
288 * If we added any labels via edge splitting. */
289
290static int run_jump_opt_after_gcse;
291
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292/* Bitmaps are normally not included in debugging dumps.
293 However it's useful to be able to print them from GDB.
294 We could create special functions for this, but it's simpler to
295 just allow passing stderr to the dump_foo fns. Since stderr can
296 be a macro, we store a copy here. */
297static FILE *debug_stderr;
298
299/* An obstack for our working variables. */
300static struct obstack gcse_obstack;
301
cc2902df 302/* Nonzero for each mode that supports (set (reg) (reg)).
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303 This is trivially true for integer and floating point values.
304 It may or may not be true for condition codes. */
305static char can_copy_p[(int) NUM_MACHINE_MODES];
306
cc2902df 307/* Nonzero if can_copy_p has been initialized. */
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308static int can_copy_init_p;
309
c4c81601 310struct reg_use {rtx reg_rtx; };
abd535b6 311
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312/* Hash table of expressions. */
313
314struct expr
315{
316 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
317 rtx expr;
318 /* Index in the available expression bitmaps. */
319 int bitmap_index;
320 /* Next entry with the same hash. */
321 struct expr *next_same_hash;
322 /* List of anticipatable occurrences in basic blocks in the function.
323 An "anticipatable occurrence" is one that is the first occurrence in the
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324 basic block, the operands are not modified in the basic block prior
325 to the occurrence and the output is not used between the start of
326 the block and the occurrence. */
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327 struct occr *antic_occr;
328 /* List of available occurrence in basic blocks in the function.
329 An "available occurrence" is one that is the last occurrence in the
330 basic block and the operands are not modified by following statements in
331 the basic block [including this insn]. */
332 struct occr *avail_occr;
333 /* Non-null if the computation is PRE redundant.
334 The value is the newly created pseudo-reg to record a copy of the
335 expression in all the places that reach the redundant copy. */
336 rtx reaching_reg;
337};
338
339/* Occurrence of an expression.
340 There is one per basic block. If a pattern appears more than once the
341 last appearance is used [or first for anticipatable expressions]. */
342
343struct occr
344{
345 /* Next occurrence of this expression. */
346 struct occr *next;
347 /* The insn that computes the expression. */
348 rtx insn;
cc2902df 349 /* Nonzero if this [anticipatable] occurrence has been deleted. */
7506f491 350 char deleted_p;
cc2902df 351 /* Nonzero if this [available] occurrence has been copied to
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352 reaching_reg. */
353 /* ??? This is mutually exclusive with deleted_p, so they could share
354 the same byte. */
355 char copied_p;
356};
357
358/* Expression and copy propagation hash tables.
359 Each hash table is an array of buckets.
360 ??? It is known that if it were an array of entries, structure elements
361 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
362 not clear whether in the final analysis a sufficient amount of memory would
363 be saved as the size of the available expression bitmaps would be larger
364 [one could build a mapping table without holes afterwards though].
c4c81601 365 Someday I'll perform the computation and figure it out. */
7506f491 366
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367struct hash_table
368{
369 /* The table itself.
370 This is an array of `expr_hash_table_size' elements. */
371 struct expr **table;
372
373 /* Size of the hash table, in elements. */
374 unsigned int size;
2e653e39 375
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376 /* Number of hash table elements. */
377 unsigned int n_elems;
7506f491 378
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379 /* Whether the table is expression of copy propagation one. */
380 int set_p;
381};
c4c81601 382
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383/* Expression hash table. */
384static struct hash_table expr_hash_table;
385
386/* Copy propagation hash table. */
387static struct hash_table set_hash_table;
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388
389/* Mapping of uids to cuids.
390 Only real insns get cuids. */
391static int *uid_cuid;
392
393/* Highest UID in UID_CUID. */
394static int max_uid;
395
396/* Get the cuid of an insn. */
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397#ifdef ENABLE_CHECKING
398#define INSN_CUID(INSN) (INSN_UID (INSN) > max_uid ? (abort (), 0) : uid_cuid[INSN_UID (INSN)])
399#else
7506f491 400#define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
b86db3eb 401#endif
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402
403/* Number of cuids. */
404static int max_cuid;
405
406/* Mapping of cuids to insns. */
407static rtx *cuid_insn;
408
409/* Get insn from cuid. */
410#define CUID_INSN(CUID) (cuid_insn[CUID])
411
412/* Maximum register number in function prior to doing gcse + 1.
413 Registers created during this pass have regno >= max_gcse_regno.
414 This is named with "gcse" to not collide with global of same name. */
770ae6cc 415static unsigned int max_gcse_regno;
7506f491 416
7506f491 417/* Table of registers that are modified.
c4c81601 418
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419 For each register, each element is a list of places where the pseudo-reg
420 is set.
421
422 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
423 requires knowledge of which blocks kill which regs [and thus could use
f4e584dc 424 a bitmap instead of the lists `reg_set_table' uses].
7506f491 425
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426 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
427 num-regs) [however perhaps it may be useful to keep the data as is]. One
428 advantage of recording things this way is that `reg_set_table' is fairly
429 sparse with respect to pseudo regs but for hard regs could be fairly dense
430 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
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431 up functions like compute_transp since in the case of pseudo-regs we only
432 need to iterate over the number of times a pseudo-reg is set, not over the
433 number of basic blocks [clearly there is a bit of a slow down in the cases
434 where a pseudo is set more than once in a block, however it is believed
435 that the net effect is to speed things up]. This isn't done for hard-regs
436 because recording call-clobbered hard-regs in `reg_set_table' at each
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437 function call can consume a fair bit of memory, and iterating over
438 hard-regs stored this way in compute_transp will be more expensive. */
7506f491 439
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440typedef struct reg_set
441{
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442 /* The next setting of this register. */
443 struct reg_set *next;
444 /* The insn where it was set. */
445 rtx insn;
446} reg_set;
c4c81601 447
7506f491 448static reg_set **reg_set_table;
c4c81601 449
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450/* Size of `reg_set_table'.
451 The table starts out at max_gcse_regno + slop, and is enlarged as
452 necessary. */
453static int reg_set_table_size;
c4c81601 454
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455/* Amount to grow `reg_set_table' by when it's full. */
456#define REG_SET_TABLE_SLOP 100
457
a13d4ebf 458/* This is a list of expressions which are MEMs and will be used by load
589005ff 459 or store motion.
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460 Load motion tracks MEMs which aren't killed by
461 anything except itself. (ie, loads and stores to a single location).
589005ff 462 We can then allow movement of these MEM refs with a little special
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463 allowance. (all stores copy the same value to the reaching reg used
464 for the loads). This means all values used to store into memory must have
589005ff 465 no side effects so we can re-issue the setter value.
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466 Store Motion uses this structure as an expression table to track stores
467 which look interesting, and might be moveable towards the exit block. */
468
469struct ls_expr
470{
471 struct expr * expr; /* Gcse expression reference for LM. */
472 rtx pattern; /* Pattern of this mem. */
47a3dae1 473 rtx pattern_regs; /* List of registers mentioned by the mem. */
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474 rtx loads; /* INSN list of loads seen. */
475 rtx stores; /* INSN list of stores seen. */
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476 struct ls_expr * next; /* Next in the list. */
477 int invalid; /* Invalid for some reason. */
478 int index; /* If it maps to a bitmap index. */
479 int hash_index; /* Index when in a hash table. */
480 rtx reaching_reg; /* Register to use when re-writing. */
481};
482
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483/* Array of implicit set patterns indexed by basic block index. */
484static rtx *implicit_sets;
485
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486/* Head of the list of load/store memory refs. */
487static struct ls_expr * pre_ldst_mems = NULL;
488
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489/* Bitmap containing one bit for each register in the program.
490 Used when performing GCSE to track which registers have been set since
491 the start of the basic block. */
73991d6a 492static regset reg_set_bitmap;
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493
494/* For each block, a bitmap of registers set in the block.
495 This is used by expr_killed_p and compute_transp.
496 It is computed during hash table computation and not by compute_sets
497 as it includes registers added since the last pass (or between cprop and
498 gcse) and it's currently not easy to realloc sbitmap vectors. */
499static sbitmap *reg_set_in_block;
500
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501/* Array, indexed by basic block number for a list of insns which modify
502 memory within that block. */
503static rtx * modify_mem_list;
73991d6a 504bitmap modify_mem_list_set;
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505
506/* This array parallels modify_mem_list, but is kept canonicalized. */
507static rtx * canon_modify_mem_list;
73991d6a 508bitmap canon_modify_mem_list_set;
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509/* Various variables for statistics gathering. */
510
511/* Memory used in a pass.
512 This isn't intended to be absolutely precise. Its intent is only
513 to keep an eye on memory usage. */
514static int bytes_used;
c4c81601 515
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516/* GCSE substitutions made. */
517static int gcse_subst_count;
518/* Number of copy instructions created. */
519static int gcse_create_count;
520/* Number of constants propagated. */
521static int const_prop_count;
522/* Number of copys propagated. */
523static int copy_prop_count;
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524\f
525/* These variables are used by classic GCSE.
526 Normally they'd be defined a bit later, but `rd_gen' needs to
527 be declared sooner. */
528
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529/* Each block has a bitmap of each type.
530 The length of each blocks bitmap is:
531
532 max_cuid - for reaching definitions
533 n_exprs - for available expressions
534
535 Thus we view the bitmaps as 2 dimensional arrays. i.e.
536 rd_kill[block_num][cuid_num]
c4c81601 537 ae_kill[block_num][expr_num] */
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538
539/* For reaching defs */
540static sbitmap *rd_kill, *rd_gen, *reaching_defs, *rd_out;
541
542/* for available exprs */
543static sbitmap *ae_kill, *ae_gen, *ae_in, *ae_out;
b5ce41ff 544
0511851c
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545/* Objects of this type are passed around by the null-pointer check
546 removal routines. */
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547struct null_pointer_info
548{
0511851c 549 /* The basic block being processed. */
e0082a72 550 basic_block current_block;
0511851c 551 /* The first register to be handled in this pass. */
770ae6cc 552 unsigned int min_reg;
0511851c 553 /* One greater than the last register to be handled in this pass. */
770ae6cc 554 unsigned int max_reg;
0511851c
MM
555 sbitmap *nonnull_local;
556 sbitmap *nonnull_killed;
557};
7506f491 558\f
c4c81601
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559static void compute_can_copy PARAMS ((void));
560static char *gmalloc PARAMS ((unsigned int));
561static char *grealloc PARAMS ((char *, unsigned int));
562static char *gcse_alloc PARAMS ((unsigned long));
563static void alloc_gcse_mem PARAMS ((rtx));
564static void free_gcse_mem PARAMS ((void));
565static void alloc_reg_set_mem PARAMS ((int));
566static void free_reg_set_mem PARAMS ((void));
567static int get_bitmap_width PARAMS ((int, int, int));
568static void record_one_set PARAMS ((int, rtx));
569static void record_set_info PARAMS ((rtx, rtx, void *));
570static void compute_sets PARAMS ((rtx));
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571static void hash_scan_insn PARAMS ((rtx, struct hash_table *, int));
572static void hash_scan_set PARAMS ((rtx, rtx, struct hash_table *));
573static void hash_scan_clobber PARAMS ((rtx, rtx, struct hash_table *));
574static void hash_scan_call PARAMS ((rtx, rtx, struct hash_table *));
c4c81601 575static int want_to_gcse_p PARAMS ((rtx));
6b2d1c9e 576static bool gcse_constant_p PARAMS ((rtx));
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577static int oprs_unchanged_p PARAMS ((rtx, rtx, int));
578static int oprs_anticipatable_p PARAMS ((rtx, rtx));
579static int oprs_available_p PARAMS ((rtx, rtx));
580static void insert_expr_in_table PARAMS ((rtx, enum machine_mode, rtx,
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581 int, int, struct hash_table *));
582static void insert_set_in_table PARAMS ((rtx, rtx, struct hash_table *));
c4c81601
RK
583static unsigned int hash_expr PARAMS ((rtx, enum machine_mode, int *, int));
584static unsigned int hash_expr_1 PARAMS ((rtx, enum machine_mode, int *));
c0712acb 585static unsigned int hash_string_1 PARAMS ((const char *));
c4c81601
RK
586static unsigned int hash_set PARAMS ((int, int));
587static int expr_equiv_p PARAMS ((rtx, rtx));
588static void record_last_reg_set_info PARAMS ((rtx, int));
589static void record_last_mem_set_info PARAMS ((rtx));
590static void record_last_set_info PARAMS ((rtx, rtx, void *));
02280659
ZD
591static void compute_hash_table PARAMS ((struct hash_table *));
592static void alloc_hash_table PARAMS ((int, struct hash_table *, int));
593static void free_hash_table PARAMS ((struct hash_table *));
594static void compute_hash_table_work PARAMS ((struct hash_table *));
595static void dump_hash_table PARAMS ((FILE *, const char *,
596 struct hash_table *));
597static struct expr *lookup_expr PARAMS ((rtx, struct hash_table *));
ceda50e9 598static struct expr *lookup_set PARAMS ((unsigned int, struct hash_table *));
770ae6cc 599static struct expr *next_set PARAMS ((unsigned int, struct expr *));
c4c81601
RK
600static void reset_opr_set_tables PARAMS ((void));
601static int oprs_not_set_p PARAMS ((rtx, rtx));
602static void mark_call PARAMS ((rtx));
603static void mark_set PARAMS ((rtx, rtx));
604static void mark_clobber PARAMS ((rtx, rtx));
605static void mark_oprs_set PARAMS ((rtx));
606static void alloc_cprop_mem PARAMS ((int, int));
607static void free_cprop_mem PARAMS ((void));
608static void compute_transp PARAMS ((rtx, int, sbitmap *, int));
609static void compute_transpout PARAMS ((void));
610static void compute_local_properties PARAMS ((sbitmap *, sbitmap *, sbitmap *,
02280659 611 struct hash_table *));
711d877c 612static void compute_cprop_data PARAMS ((void));
9e71c818 613static void find_used_regs PARAMS ((rtx *, void *));
c4c81601
RK
614static int try_replace_reg PARAMS ((rtx, rtx, rtx));
615static struct expr *find_avail_set PARAMS ((int, rtx));
0e3f0221 616static int cprop_jump PARAMS ((basic_block, rtx, rtx, rtx, rtx));
a13d4ebf 617static void mems_conflict_for_gcse_p PARAMS ((rtx, rtx, void *));
e2d2ed72 618static int load_killed_in_block_p PARAMS ((basic_block, int, rtx, int));
a13d4ebf 619static void canon_list_insert PARAMS ((rtx, rtx, void *));
ae860ff7 620static int cprop_insn PARAMS ((rtx, int));
c4c81601 621static int cprop PARAMS ((int));
fbef91d8
RS
622static rtx fis_get_condition PARAMS ((rtx));
623static void find_implicit_sets PARAMS ((void));
a0134312 624static int one_cprop_pass PARAMS ((int, int, int));
ae860ff7 625static bool constprop_register PARAMS ((rtx, rtx, rtx, int));
0e3f0221
RS
626static struct expr *find_bypass_set PARAMS ((int, int));
627static int bypass_block PARAMS ((basic_block, rtx, rtx));
628static int bypass_conditional_jumps PARAMS ((void));
c4c81601
RK
629static void alloc_pre_mem PARAMS ((int, int));
630static void free_pre_mem PARAMS ((void));
631static void compute_pre_data PARAMS ((void));
589005ff 632static int pre_expr_reaches_here_p PARAMS ((basic_block, struct expr *,
e2d2ed72
AM
633 basic_block));
634static void insert_insn_end_bb PARAMS ((struct expr *, basic_block, int));
c4c81601
RK
635static void pre_insert_copy_insn PARAMS ((struct expr *, rtx));
636static void pre_insert_copies PARAMS ((void));
637static int pre_delete PARAMS ((void));
638static int pre_gcse PARAMS ((void));
639static int one_pre_gcse_pass PARAMS ((int));
640static void add_label_notes PARAMS ((rtx, rtx));
641static void alloc_code_hoist_mem PARAMS ((int, int));
642static void free_code_hoist_mem PARAMS ((void));
711d877c 643static void compute_code_hoist_vbeinout PARAMS ((void));
c4c81601 644static void compute_code_hoist_data PARAMS ((void));
589005ff 645static int hoist_expr_reaches_here_p PARAMS ((basic_block, int, basic_block,
e2d2ed72 646 char *));
c4c81601
RK
647static void hoist_code PARAMS ((void));
648static int one_code_hoisting_pass PARAMS ((void));
649static void alloc_rd_mem PARAMS ((int, int));
650static void free_rd_mem PARAMS ((void));
e2d2ed72 651static void handle_rd_kill_set PARAMS ((rtx, int, basic_block));
c4c81601 652static void compute_kill_rd PARAMS ((void));
711d877c 653static void compute_rd PARAMS ((void));
c4c81601
RK
654static void alloc_avail_expr_mem PARAMS ((int, int));
655static void free_avail_expr_mem PARAMS ((void));
02280659 656static void compute_ae_gen PARAMS ((struct hash_table *));
e2d2ed72 657static int expr_killed_p PARAMS ((rtx, basic_block));
02280659 658static void compute_ae_kill PARAMS ((sbitmap *, sbitmap *, struct hash_table *));
711d877c 659static int expr_reaches_here_p PARAMS ((struct occr *, struct expr *,
e2d2ed72 660 basic_block, int));
c4c81601
RK
661static rtx computing_insn PARAMS ((struct expr *, rtx));
662static int def_reaches_here_p PARAMS ((rtx, rtx));
663static int can_disregard_other_sets PARAMS ((struct reg_set **, rtx, int));
664static int handle_avail_expr PARAMS ((rtx, struct expr *));
665static int classic_gcse PARAMS ((void));
666static int one_classic_gcse_pass PARAMS ((int));
667static void invalidate_nonnull_info PARAMS ((rtx, rtx, void *));
99a15921 668static int delete_null_pointer_checks_1 PARAMS ((unsigned int *,
8e184d9c 669 sbitmap *, sbitmap *,
711d877c
KG
670 struct null_pointer_info *));
671static rtx process_insert_insn PARAMS ((struct expr *));
672static int pre_edge_insert PARAMS ((struct edge_list *, struct expr **));
c4c81601 673static int expr_reaches_here_p_work PARAMS ((struct occr *, struct expr *,
e2d2ed72
AM
674 basic_block, int, char *));
675static int pre_expr_reaches_here_p_work PARAMS ((basic_block, struct expr *,
676 basic_block, char *));
a13d4ebf
AM
677static struct ls_expr * ldst_entry PARAMS ((rtx));
678static void free_ldst_entry PARAMS ((struct ls_expr *));
679static void free_ldst_mems PARAMS ((void));
680static void print_ldst_list PARAMS ((FILE *));
681static struct ls_expr * find_rtx_in_ldst PARAMS ((rtx));
682static int enumerate_ldsts PARAMS ((void));
683static inline struct ls_expr * first_ls_expr PARAMS ((void));
684static inline struct ls_expr * next_ls_expr PARAMS ((struct ls_expr *));
685static int simple_mem PARAMS ((rtx));
686static void invalidate_any_buried_refs PARAMS ((rtx));
589005ff 687static void compute_ld_motion_mems PARAMS ((void));
a13d4ebf
AM
688static void trim_ld_motion_mems PARAMS ((void));
689static void update_ld_motion_stores PARAMS ((struct expr *));
aaa4ca30 690static void reg_set_info PARAMS ((rtx, rtx, void *));
47a3dae1
ZD
691static bool store_ops_ok PARAMS ((rtx, int *));
692static rtx extract_mentioned_regs PARAMS ((rtx));
693static rtx extract_mentioned_regs_helper PARAMS ((rtx, rtx));
694static void find_moveable_store PARAMS ((rtx, int *, int *));
a13d4ebf 695static int compute_store_table PARAMS ((void));
47a3dae1
ZD
696static bool load_kills_store PARAMS ((rtx, rtx));
697static bool find_loads PARAMS ((rtx, rtx));
698static bool store_killed_in_insn PARAMS ((rtx, rtx, rtx));
699static bool store_killed_after PARAMS ((rtx, rtx, rtx, basic_block,
700 int *, rtx *));
701static bool store_killed_before PARAMS ((rtx, rtx, rtx, basic_block,
702 int *));
a13d4ebf 703static void build_store_vectors PARAMS ((void));
e2d2ed72 704static void insert_insn_start_bb PARAMS ((rtx, basic_block));
a13d4ebf 705static int insert_store PARAMS ((struct ls_expr *, edge));
e2d2ed72 706static void replace_store_insn PARAMS ((rtx, rtx, basic_block));
589005ff 707static void delete_store PARAMS ((struct ls_expr *,
e2d2ed72 708 basic_block));
a13d4ebf
AM
709static void free_store_memory PARAMS ((void));
710static void store_motion PARAMS ((void));
0fe854a7 711static void free_insn_expr_list_list PARAMS ((rtx *));
73991d6a
JH
712static void clear_modify_mem_tables PARAMS ((void));
713static void free_modify_mem_tables PARAMS ((void));
10d1bb36 714static rtx gcse_emit_move_after PARAMS ((rtx, rtx, rtx));
710ee3ed 715static void local_cprop_find_used_regs PARAMS ((rtx *, void *));
8ba46434
R
716static bool do_local_cprop PARAMS ((rtx, rtx, int, rtx*));
717static bool adjust_libcall_notes PARAMS ((rtx, rtx, rtx, rtx*));
ae860ff7 718static void local_cprop_pass PARAMS ((int));
7506f491
DE
719\f
720/* Entry point for global common subexpression elimination.
721 F is the first instruction in the function. */
722
e78d9500 723int
7506f491
DE
724gcse_main (f, file)
725 rtx f;
726 FILE *file;
727{
728 int changed, pass;
729 /* Bytes used at start of pass. */
730 int initial_bytes_used;
731 /* Maximum number of bytes used by a pass. */
732 int max_pass_bytes;
733 /* Point to release obstack data from for each pass. */
734 char *gcse_obstack_bottom;
735
b5ce41ff
JL
736 /* We do not construct an accurate cfg in functions which call
737 setjmp, so just punt to be safe. */
7506f491 738 if (current_function_calls_setjmp)
e78d9500 739 return 0;
589005ff 740
b5ce41ff
JL
741 /* Assume that we do not need to run jump optimizations after gcse. */
742 run_jump_opt_after_gcse = 0;
743
7506f491
DE
744 /* For calling dump_foo fns from gdb. */
745 debug_stderr = stderr;
b5ce41ff 746 gcse_file = file;
7506f491 747
b5ce41ff
JL
748 /* Identify the basic block information for this function, including
749 successors and predecessors. */
7506f491 750 max_gcse_regno = max_reg_num ();
7506f491 751
a42cd965
AM
752 if (file)
753 dump_flow_info (file);
754
7506f491 755 /* Return if there's nothing to do. */
0b17ab2f 756 if (n_basic_blocks <= 1)
a18820c6 757 return 0;
7506f491 758
55f7891b
JL
759 /* Trying to perform global optimizations on flow graphs which have
760 a high connectivity will take a long time and is unlikely to be
761 particularly useful.
762
43e72072 763 In normal circumstances a cfg should have about twice as many edges
55f7891b
JL
764 as blocks. But we do not want to punish small functions which have
765 a couple switch statements. So we require a relatively large number
766 of basic blocks and the ratio of edges to blocks to be high. */
0b17ab2f 767 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
18424ae1
BL
768 {
769 if (warn_disabled_optimization)
8e42ace1 770 warning ("GCSE disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
0b17ab2f 771 n_basic_blocks, n_edges / n_basic_blocks);
18424ae1
BL
772 return 0;
773 }
55f7891b 774
f1fa37ff
MM
775 /* If allocating memory for the cprop bitmap would take up too much
776 storage it's better just to disable the optimization. */
589005ff 777 if ((n_basic_blocks
f1fa37ff
MM
778 * SBITMAP_SET_SIZE (max_gcse_regno)
779 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
780 {
781 if (warn_disabled_optimization)
782 warning ("GCSE disabled: %d basic blocks and %d registers",
0b17ab2f 783 n_basic_blocks, max_gcse_regno);
f1fa37ff
MM
784
785 return 0;
786 }
787
7506f491
DE
788 /* See what modes support reg/reg copy operations. */
789 if (! can_copy_init_p)
790 {
791 compute_can_copy ();
792 can_copy_init_p = 1;
793 }
794
795 gcc_obstack_init (&gcse_obstack);
a42cd965 796 bytes_used = 0;
7506f491 797
a13d4ebf
AM
798 /* We need alias. */
799 init_alias_analysis ();
c4c81601
RK
800 /* Record where pseudo-registers are set. This data is kept accurate
801 during each pass. ??? We could also record hard-reg information here
802 [since it's unchanging], however it is currently done during hash table
803 computation.
b5ce41ff 804
c4c81601
RK
805 It may be tempting to compute MEM set information here too, but MEM sets
806 will be subject to code motion one day and thus we need to compute
b5ce41ff 807 information about memory sets when we build the hash tables. */
7506f491
DE
808
809 alloc_reg_set_mem (max_gcse_regno);
810 compute_sets (f);
811
812 pass = 0;
813 initial_bytes_used = bytes_used;
814 max_pass_bytes = 0;
815 gcse_obstack_bottom = gcse_alloc (1);
816 changed = 1;
740f35a0 817 while (changed && pass < MAX_GCSE_PASSES)
7506f491
DE
818 {
819 changed = 0;
820 if (file)
821 fprintf (file, "GCSE pass %d\n\n", pass + 1);
822
823 /* Initialize bytes_used to the space for the pred/succ lists,
824 and the reg_set_table data. */
825 bytes_used = initial_bytes_used;
826
827 /* Each pass may create new registers, so recalculate each time. */
828 max_gcse_regno = max_reg_num ();
829
830 alloc_gcse_mem (f);
831
b5ce41ff
JL
832 /* Don't allow constant propagation to modify jumps
833 during this pass. */
a0134312 834 changed = one_cprop_pass (pass + 1, 0, 0);
7506f491
DE
835
836 if (optimize_size)
b5ce41ff 837 changed |= one_classic_gcse_pass (pass + 1);
7506f491 838 else
589005ff 839 {
a42cd965 840 changed |= one_pre_gcse_pass (pass + 1);
a13d4ebf
AM
841 /* We may have just created new basic blocks. Release and
842 recompute various things which are sized on the number of
843 basic blocks. */
844 if (changed)
845 {
73991d6a 846 free_modify_mem_tables ();
a13d4ebf 847 modify_mem_list
d55bc081 848 = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
a13d4ebf 849 canon_modify_mem_list
d55bc081
ZD
850 = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
851 memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
852 memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
a13d4ebf 853 }
a42cd965
AM
854 free_reg_set_mem ();
855 alloc_reg_set_mem (max_reg_num ());
856 compute_sets (f);
857 run_jump_opt_after_gcse = 1;
858 }
7506f491
DE
859
860 if (max_pass_bytes < bytes_used)
861 max_pass_bytes = bytes_used;
862
bb457bd9
JL
863 /* Free up memory, then reallocate for code hoisting. We can
864 not re-use the existing allocated memory because the tables
865 will not have info for the insns or registers created by
866 partial redundancy elimination. */
7506f491
DE
867 free_gcse_mem ();
868
bb457bd9
JL
869 /* It does not make sense to run code hoisting unless we optimizing
870 for code size -- it rarely makes programs faster, and can make
871 them bigger if we did partial redundancy elimination (when optimizing
872 for space, we use a classic gcse algorithm instead of partial
873 redundancy algorithms). */
874 if (optimize_size)
589005ff 875 {
bb457bd9
JL
876 max_gcse_regno = max_reg_num ();
877 alloc_gcse_mem (f);
878 changed |= one_code_hoisting_pass ();
879 free_gcse_mem ();
880
881 if (max_pass_bytes < bytes_used)
882 max_pass_bytes = bytes_used;
589005ff 883 }
bb457bd9 884
7506f491
DE
885 if (file)
886 {
887 fprintf (file, "\n");
888 fflush (file);
889 }
c4c81601 890
7506f491
DE
891 obstack_free (&gcse_obstack, gcse_obstack_bottom);
892 pass++;
893 }
894
b5ce41ff
JL
895 /* Do one last pass of copy propagation, including cprop into
896 conditional jumps. */
897
898 max_gcse_regno = max_reg_num ();
899 alloc_gcse_mem (f);
900 /* This time, go ahead and allow cprop to alter jumps. */
a0134312 901 one_cprop_pass (pass + 1, 1, 0);
b5ce41ff 902 free_gcse_mem ();
7506f491
DE
903
904 if (file)
905 {
906 fprintf (file, "GCSE of %s: %d basic blocks, ",
0b17ab2f 907 current_function_name, n_basic_blocks);
7506f491
DE
908 fprintf (file, "%d pass%s, %d bytes\n\n",
909 pass, pass > 1 ? "es" : "", max_pass_bytes);
910 }
911
6496a589 912 obstack_free (&gcse_obstack, NULL);
7506f491 913 free_reg_set_mem ();
a13d4ebf
AM
914 /* We are finished with alias. */
915 end_alias_analysis ();
916 allocate_reg_info (max_reg_num (), FALSE, FALSE);
917
47a3dae1 918 if (!optimize_size && flag_gcse_sm)
a13d4ebf 919 store_motion ();
47a3dae1 920
a13d4ebf 921 /* Record where pseudo-registers are set. */
e78d9500 922 return run_jump_opt_after_gcse;
7506f491
DE
923}
924\f
925/* Misc. utilities. */
926
927/* Compute which modes support reg/reg copy operations. */
928
929static void
930compute_can_copy ()
931{
932 int i;
50b2596f 933#ifndef AVOID_CCMODE_COPIES
8e42ace1 934 rtx reg, insn;
50b2596f 935#endif
961192e1 936 memset (can_copy_p, 0, NUM_MACHINE_MODES);
7506f491
DE
937
938 start_sequence ();
939 for (i = 0; i < NUM_MACHINE_MODES; i++)
c4c81601
RK
940 if (GET_MODE_CLASS (i) == MODE_CC)
941 {
7506f491 942#ifdef AVOID_CCMODE_COPIES
c4c81601 943 can_copy_p[i] = 0;
7506f491 944#else
c4c81601
RK
945 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
946 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
9714cf43 947 if (recog (PATTERN (insn), insn, NULL) >= 0)
c4c81601 948 can_copy_p[i] = 1;
7506f491 949#endif
c4c81601 950 }
141b5810
AO
951 else
952 can_copy_p[i] = 1;
c4c81601 953
7506f491 954 end_sequence ();
7506f491
DE
955}
956\f
957/* Cover function to xmalloc to record bytes allocated. */
958
959static char *
960gmalloc (size)
961 unsigned int size;
962{
963 bytes_used += size;
964 return xmalloc (size);
965}
966
967/* Cover function to xrealloc.
968 We don't record the additional size since we don't know it.
969 It won't affect memory usage stats much anyway. */
970
971static char *
972grealloc (ptr, size)
973 char *ptr;
974 unsigned int size;
975{
976 return xrealloc (ptr, size);
977}
978
77bbd421 979/* Cover function to obstack_alloc. */
7506f491
DE
980
981static char *
982gcse_alloc (size)
983 unsigned long size;
984{
77bbd421 985 bytes_used += size;
7506f491
DE
986 return (char *) obstack_alloc (&gcse_obstack, size);
987}
988
989/* Allocate memory for the cuid mapping array,
990 and reg/memory set tracking tables.
991
992 This is called at the start of each pass. */
993
994static void
995alloc_gcse_mem (f)
996 rtx f;
997{
8e42ace1 998 int i, n;
7506f491
DE
999 rtx insn;
1000
1001 /* Find the largest UID and create a mapping from UIDs to CUIDs.
1002 CUIDs are like UIDs except they increase monotonically, have no gaps,
1003 and only apply to real insns. */
1004
1005 max_uid = get_max_uid ();
1006 n = (max_uid + 1) * sizeof (int);
1007 uid_cuid = (int *) gmalloc (n);
961192e1 1008 memset ((char *) uid_cuid, 0, n);
7506f491
DE
1009 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
1010 {
2c3c49de 1011 if (INSN_P (insn))
b86db3eb 1012 uid_cuid[INSN_UID (insn)] = i++;
7506f491 1013 else
b86db3eb 1014 uid_cuid[INSN_UID (insn)] = i;
7506f491
DE
1015 }
1016
1017 /* Create a table mapping cuids to insns. */
1018
1019 max_cuid = i;
1020 n = (max_cuid + 1) * sizeof (rtx);
1021 cuid_insn = (rtx *) gmalloc (n);
961192e1 1022 memset ((char *) cuid_insn, 0, n);
7506f491 1023 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
2c3c49de 1024 if (INSN_P (insn))
c4c81601 1025 CUID_INSN (i++) = insn;
7506f491
DE
1026
1027 /* Allocate vars to track sets of regs. */
73991d6a 1028 reg_set_bitmap = BITMAP_XMALLOC ();
7506f491
DE
1029
1030 /* Allocate vars to track sets of regs, memory per block. */
d55bc081 1031 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
7506f491 1032 max_gcse_regno);
a13d4ebf
AM
1033 /* Allocate array to keep a list of insns which modify memory in each
1034 basic block. */
d55bc081
ZD
1035 modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
1036 canon_modify_mem_list = (rtx *) gmalloc (last_basic_block * sizeof (rtx));
1037 memset ((char *) modify_mem_list, 0, last_basic_block * sizeof (rtx));
1038 memset ((char *) canon_modify_mem_list, 0, last_basic_block * sizeof (rtx));
73991d6a
JH
1039 modify_mem_list_set = BITMAP_XMALLOC ();
1040 canon_modify_mem_list_set = BITMAP_XMALLOC ();
7506f491
DE
1041}
1042
1043/* Free memory allocated by alloc_gcse_mem. */
1044
1045static void
1046free_gcse_mem ()
1047{
1048 free (uid_cuid);
1049 free (cuid_insn);
1050
73991d6a 1051 BITMAP_XFREE (reg_set_bitmap);
7506f491 1052
5a660bff 1053 sbitmap_vector_free (reg_set_in_block);
73991d6a
JH
1054 free_modify_mem_tables ();
1055 BITMAP_XFREE (modify_mem_list_set);
1056 BITMAP_XFREE (canon_modify_mem_list_set);
7506f491
DE
1057}
1058
0511851c
MM
1059/* Many of the global optimization algorithms work by solving dataflow
1060 equations for various expressions. Initially, some local value is
c4c81601
RK
1061 computed for each expression in each block. Then, the values across the
1062 various blocks are combined (by following flow graph edges) to arrive at
1063 global values. Conceptually, each set of equations is independent. We
1064 may therefore solve all the equations in parallel, solve them one at a
1065 time, or pick any intermediate approach.
1066
1067 When you're going to need N two-dimensional bitmaps, each X (say, the
1068 number of blocks) by Y (say, the number of expressions), call this
1069 function. It's not important what X and Y represent; only that Y
1070 correspond to the things that can be done in parallel. This function will
1071 return an appropriate chunking factor C; you should solve C sets of
1072 equations in parallel. By going through this function, we can easily
1073 trade space against time; by solving fewer equations in parallel we use
1074 less space. */
0511851c
MM
1075
1076static int
1077get_bitmap_width (n, x, y)
1078 int n;
1079 int x;
1080 int y;
1081{
1082 /* It's not really worth figuring out *exactly* how much memory will
1083 be used by a particular choice. The important thing is to get
1084 something approximately right. */
1085 size_t max_bitmap_memory = 10 * 1024 * 1024;
1086
1087 /* The number of bytes we'd use for a single column of minimum
1088 width. */
1089 size_t column_size = n * x * sizeof (SBITMAP_ELT_TYPE);
1090
1091 /* Often, it's reasonable just to solve all the equations in
1092 parallel. */
1093 if (column_size * SBITMAP_SET_SIZE (y) <= max_bitmap_memory)
1094 return y;
1095
1096 /* Otherwise, pick the largest width we can, without going over the
1097 limit. */
1098 return SBITMAP_ELT_BITS * ((max_bitmap_memory + column_size - 1)
1099 / column_size);
1100}
b5ce41ff
JL
1101\f
1102/* Compute the local properties of each recorded expression.
c4c81601
RK
1103
1104 Local properties are those that are defined by the block, irrespective of
1105 other blocks.
b5ce41ff
JL
1106
1107 An expression is transparent in a block if its operands are not modified
1108 in the block.
1109
1110 An expression is computed (locally available) in a block if it is computed
1111 at least once and expression would contain the same value if the
1112 computation was moved to the end of the block.
1113
1114 An expression is locally anticipatable in a block if it is computed at
1115 least once and expression would contain the same value if the computation
1116 was moved to the beginning of the block.
1117
c4c81601
RK
1118 We call this routine for cprop, pre and code hoisting. They all compute
1119 basically the same information and thus can easily share this code.
7506f491 1120
c4c81601
RK
1121 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1122 properties. If NULL, then it is not necessary to compute or record that
1123 particular property.
b5ce41ff 1124
02280659
ZD
1125 TABLE controls which hash table to look at. If it is set hash table,
1126 additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
c4c81601 1127 ABSALTERED. */
589005ff 1128
b5ce41ff 1129static void
02280659 1130compute_local_properties (transp, comp, antloc, table)
b5ce41ff
JL
1131 sbitmap *transp;
1132 sbitmap *comp;
1133 sbitmap *antloc;
02280659 1134 struct hash_table *table;
b5ce41ff 1135{
02280659 1136 unsigned int i;
589005ff 1137
b5ce41ff
JL
1138 /* Initialize any bitmaps that were passed in. */
1139 if (transp)
695ab36a 1140 {
02280659 1141 if (table->set_p)
d55bc081 1142 sbitmap_vector_zero (transp, last_basic_block);
695ab36a 1143 else
d55bc081 1144 sbitmap_vector_ones (transp, last_basic_block);
695ab36a 1145 }
c4c81601 1146
b5ce41ff 1147 if (comp)
d55bc081 1148 sbitmap_vector_zero (comp, last_basic_block);
b5ce41ff 1149 if (antloc)
d55bc081 1150 sbitmap_vector_zero (antloc, last_basic_block);
b5ce41ff 1151
02280659 1152 for (i = 0; i < table->size; i++)
7506f491 1153 {
b5ce41ff
JL
1154 struct expr *expr;
1155
02280659 1156 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
b5ce41ff 1157 {
b5ce41ff 1158 int indx = expr->bitmap_index;
c4c81601 1159 struct occr *occr;
b5ce41ff
JL
1160
1161 /* The expression is transparent in this block if it is not killed.
1162 We start by assuming all are transparent [none are killed], and
1163 then reset the bits for those that are. */
b5ce41ff 1164 if (transp)
02280659 1165 compute_transp (expr->expr, indx, transp, table->set_p);
b5ce41ff
JL
1166
1167 /* The occurrences recorded in antic_occr are exactly those that
cc2902df 1168 we want to set to nonzero in ANTLOC. */
b5ce41ff 1169 if (antloc)
c4c81601
RK
1170 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1171 {
1172 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
b5ce41ff 1173
c4c81601
RK
1174 /* While we're scanning the table, this is a good place to
1175 initialize this. */
1176 occr->deleted_p = 0;
1177 }
b5ce41ff
JL
1178
1179 /* The occurrences recorded in avail_occr are exactly those that
cc2902df 1180 we want to set to nonzero in COMP. */
b5ce41ff 1181 if (comp)
c4c81601
RK
1182 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1183 {
1184 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
b5ce41ff 1185
c4c81601
RK
1186 /* While we're scanning the table, this is a good place to
1187 initialize this. */
1188 occr->copied_p = 0;
1189 }
b5ce41ff
JL
1190
1191 /* While we're scanning the table, this is a good place to
1192 initialize this. */
1193 expr->reaching_reg = 0;
1194 }
7506f491 1195 }
7506f491
DE
1196}
1197\f
1198/* Register set information.
1199
1200 `reg_set_table' records where each register is set or otherwise
1201 modified. */
1202
1203static struct obstack reg_set_obstack;
1204
1205static void
1206alloc_reg_set_mem (n_regs)
1207 int n_regs;
1208{
c4c81601 1209 unsigned int n;
7506f491
DE
1210
1211 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1212 n = reg_set_table_size * sizeof (struct reg_set *);
1213 reg_set_table = (struct reg_set **) gmalloc (n);
961192e1 1214 memset ((char *) reg_set_table, 0, n);
7506f491
DE
1215
1216 gcc_obstack_init (&reg_set_obstack);
1217}
1218
1219static void
1220free_reg_set_mem ()
1221{
1222 free (reg_set_table);
6496a589 1223 obstack_free (&reg_set_obstack, NULL);
7506f491
DE
1224}
1225
1226/* Record REGNO in the reg_set table. */
1227
1228static void
1229record_one_set (regno, insn)
1230 int regno;
1231 rtx insn;
1232{
172890a2 1233 /* Allocate a new reg_set element and link it onto the list. */
63bc1d05 1234 struct reg_set *new_reg_info;
7506f491
DE
1235
1236 /* If the table isn't big enough, enlarge it. */
1237 if (regno >= reg_set_table_size)
1238 {
1239 int new_size = regno + REG_SET_TABLE_SLOP;
c4c81601
RK
1240
1241 reg_set_table
1242 = (struct reg_set **) grealloc ((char *) reg_set_table,
1243 new_size * sizeof (struct reg_set *));
961192e1 1244 memset ((char *) (reg_set_table + reg_set_table_size), 0,
8e42ace1 1245 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
7506f491
DE
1246 reg_set_table_size = new_size;
1247 }
1248
1249 new_reg_info = (struct reg_set *) obstack_alloc (&reg_set_obstack,
1250 sizeof (struct reg_set));
1251 bytes_used += sizeof (struct reg_set);
1252 new_reg_info->insn = insn;
274969ea
MM
1253 new_reg_info->next = reg_set_table[regno];
1254 reg_set_table[regno] = new_reg_info;
7506f491
DE
1255}
1256
c4c81601
RK
1257/* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1258 an insn. The DATA is really the instruction in which the SET is
1259 occurring. */
7506f491
DE
1260
1261static void
84832317 1262record_set_info (dest, setter, data)
50b2596f 1263 rtx dest, setter ATTRIBUTE_UNUSED;
84832317 1264 void *data;
7506f491 1265{
84832317
MM
1266 rtx record_set_insn = (rtx) data;
1267
c4c81601
RK
1268 if (GET_CODE (dest) == REG && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1269 record_one_set (REGNO (dest), record_set_insn);
7506f491
DE
1270}
1271
1272/* Scan the function and record each set of each pseudo-register.
1273
c4c81601 1274 This is called once, at the start of the gcse pass. See the comments for
fbe5a4a6 1275 `reg_set_table' for further documentation. */
7506f491
DE
1276
1277static void
1278compute_sets (f)
1279 rtx f;
1280{
c4c81601 1281 rtx insn;
7506f491 1282
c4c81601 1283 for (insn = f; insn != 0; insn = NEXT_INSN (insn))
2c3c49de 1284 if (INSN_P (insn))
c4c81601 1285 note_stores (PATTERN (insn), record_set_info, insn);
7506f491
DE
1286}
1287\f
1288/* Hash table support. */
1289
80c29cc4
RZ
1290struct reg_avail_info
1291{
e0082a72 1292 basic_block last_bb;
80c29cc4
RZ
1293 int first_set;
1294 int last_set;
1295};
1296
1297static struct reg_avail_info *reg_avail_info;
e0082a72 1298static basic_block current_bb;
7506f491 1299
7506f491 1300
fb0c0a12
RK
1301/* See whether X, the source of a set, is something we want to consider for
1302 GCSE. */
7506f491 1303
e2500fed 1304static GTY(()) rtx test_insn;
7506f491
DE
1305static int
1306want_to_gcse_p (x)
1307 rtx x;
1308{
fb0c0a12
RK
1309 int num_clobbers = 0;
1310 int icode;
1311
c4c81601 1312 switch (GET_CODE (x))
7506f491
DE
1313 {
1314 case REG:
1315 case SUBREG:
1316 case CONST_INT:
1317 case CONST_DOUBLE:
69ef87e2 1318 case CONST_VECTOR:
7506f491 1319 case CALL:
34ee7f82 1320 case CONSTANT_P_RTX:
7506f491
DE
1321 return 0;
1322
1323 default:
1324 break;
1325 }
1326
fb0c0a12
RK
1327 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1328 if (general_operand (x, GET_MODE (x)))
1329 return 1;
1330 else if (GET_MODE (x) == VOIDmode)
1331 return 0;
1332
1333 /* Otherwise, check if we can make a valid insn from it. First initialize
1334 our test insn if we haven't already. */
1335 if (test_insn == 0)
1336 {
1337 test_insn
1338 = make_insn_raw (gen_rtx_SET (VOIDmode,
1339 gen_rtx_REG (word_mode,
1340 FIRST_PSEUDO_REGISTER * 2),
1341 const0_rtx));
1342 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
fb0c0a12
RK
1343 }
1344
1345 /* Now make an insn like the one we would make when GCSE'ing and see if
1346 valid. */
1347 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1348 SET_SRC (PATTERN (test_insn)) = x;
1349 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1350 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
7506f491
DE
1351}
1352
cc2902df 1353/* Return nonzero if the operands of expression X are unchanged from the
7506f491
DE
1354 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1355 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1356
1357static int
1358oprs_unchanged_p (x, insn, avail_p)
1359 rtx x, insn;
1360 int avail_p;
1361{
c4c81601 1362 int i, j;
7506f491 1363 enum rtx_code code;
6f7d635c 1364 const char *fmt;
7506f491 1365
7506f491
DE
1366 if (x == 0)
1367 return 1;
1368
1369 code = GET_CODE (x);
1370 switch (code)
1371 {
1372 case REG:
80c29cc4
RZ
1373 {
1374 struct reg_avail_info *info = &reg_avail_info[REGNO (x)];
1375
1376 if (info->last_bb != current_bb)
1377 return 1;
589005ff 1378 if (avail_p)
80c29cc4
RZ
1379 return info->last_set < INSN_CUID (insn);
1380 else
1381 return info->first_set >= INSN_CUID (insn);
1382 }
7506f491
DE
1383
1384 case MEM:
e0082a72 1385 if (load_killed_in_block_p (current_bb, INSN_CUID (insn),
a13d4ebf
AM
1386 x, avail_p))
1387 return 0;
7506f491 1388 else
c4c81601 1389 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
7506f491
DE
1390
1391 case PRE_DEC:
1392 case PRE_INC:
1393 case POST_DEC:
1394 case POST_INC:
4b983fdc
RH
1395 case PRE_MODIFY:
1396 case POST_MODIFY:
7506f491
DE
1397 return 0;
1398
1399 case PC:
1400 case CC0: /*FIXME*/
1401 case CONST:
1402 case CONST_INT:
1403 case CONST_DOUBLE:
69ef87e2 1404 case CONST_VECTOR:
7506f491
DE
1405 case SYMBOL_REF:
1406 case LABEL_REF:
1407 case ADDR_VEC:
1408 case ADDR_DIFF_VEC:
1409 return 1;
1410
1411 default:
1412 break;
1413 }
1414
c4c81601 1415 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
1416 {
1417 if (fmt[i] == 'e')
1418 {
c4c81601
RK
1419 /* If we are about to do the last recursive call needed at this
1420 level, change it into iteration. This function is called enough
1421 to be worth it. */
7506f491 1422 if (i == 0)
c4c81601
RK
1423 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1424
1425 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
7506f491
DE
1426 return 0;
1427 }
1428 else if (fmt[i] == 'E')
c4c81601
RK
1429 for (j = 0; j < XVECLEN (x, i); j++)
1430 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1431 return 0;
7506f491
DE
1432 }
1433
1434 return 1;
1435}
1436
a13d4ebf
AM
1437/* Used for communication between mems_conflict_for_gcse_p and
1438 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1439 conflict between two memory references. */
1440static int gcse_mems_conflict_p;
1441
1442/* Used for communication between mems_conflict_for_gcse_p and
1443 load_killed_in_block_p. A memory reference for a load instruction,
1444 mems_conflict_for_gcse_p will see if a memory store conflicts with
1445 this memory load. */
1446static rtx gcse_mem_operand;
1447
1448/* DEST is the output of an instruction. If it is a memory reference, and
1449 possibly conflicts with the load found in gcse_mem_operand, then set
1450 gcse_mems_conflict_p to a nonzero value. */
1451
1452static void
1453mems_conflict_for_gcse_p (dest, setter, data)
1454 rtx dest, setter ATTRIBUTE_UNUSED;
1455 void *data ATTRIBUTE_UNUSED;
1456{
1457 while (GET_CODE (dest) == SUBREG
1458 || GET_CODE (dest) == ZERO_EXTRACT
1459 || GET_CODE (dest) == SIGN_EXTRACT
1460 || GET_CODE (dest) == STRICT_LOW_PART)
1461 dest = XEXP (dest, 0);
1462
1463 /* If DEST is not a MEM, then it will not conflict with the load. Note
1464 that function calls are assumed to clobber memory, but are handled
1465 elsewhere. */
1466 if (GET_CODE (dest) != MEM)
1467 return;
aaa4ca30 1468
a13d4ebf 1469 /* If we are setting a MEM in our list of specially recognized MEMs,
589005ff
KH
1470 don't mark as killed this time. */
1471
47a3dae1 1472 if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL)
a13d4ebf
AM
1473 {
1474 if (!find_rtx_in_ldst (dest))
1475 gcse_mems_conflict_p = 1;
1476 return;
1477 }
aaa4ca30 1478
a13d4ebf
AM
1479 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1480 rtx_addr_varies_p))
1481 gcse_mems_conflict_p = 1;
1482}
1483
1484/* Return nonzero if the expression in X (a memory reference) is killed
1485 in block BB before or after the insn with the CUID in UID_LIMIT.
1486 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1487 before UID_LIMIT.
1488
1489 To check the entire block, set UID_LIMIT to max_uid + 1 and
1490 AVAIL_P to 0. */
1491
1492static int
1493load_killed_in_block_p (bb, uid_limit, x, avail_p)
e2d2ed72 1494 basic_block bb;
a13d4ebf
AM
1495 int uid_limit;
1496 rtx x;
1497 int avail_p;
1498{
0b17ab2f 1499 rtx list_entry = modify_mem_list[bb->index];
a13d4ebf
AM
1500 while (list_entry)
1501 {
1502 rtx setter;
1503 /* Ignore entries in the list that do not apply. */
1504 if ((avail_p
1505 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1506 || (! avail_p
1507 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1508 {
1509 list_entry = XEXP (list_entry, 1);
1510 continue;
1511 }
1512
1513 setter = XEXP (list_entry, 0);
1514
1515 /* If SETTER is a call everything is clobbered. Note that calls
1516 to pure functions are never put on the list, so we need not
1517 worry about them. */
1518 if (GET_CODE (setter) == CALL_INSN)
1519 return 1;
1520
1521 /* SETTER must be an INSN of some kind that sets memory. Call
589005ff 1522 note_stores to examine each hunk of memory that is modified.
a13d4ebf
AM
1523
1524 The note_stores interface is pretty limited, so we have to
1525 communicate via global variables. Yuk. */
1526 gcse_mem_operand = x;
1527 gcse_mems_conflict_p = 0;
1528 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1529 if (gcse_mems_conflict_p)
1530 return 1;
1531 list_entry = XEXP (list_entry, 1);
1532 }
1533 return 0;
1534}
1535
cc2902df 1536/* Return nonzero if the operands of expression X are unchanged from
7506f491
DE
1537 the start of INSN's basic block up to but not including INSN. */
1538
1539static int
1540oprs_anticipatable_p (x, insn)
1541 rtx x, insn;
1542{
1543 return oprs_unchanged_p (x, insn, 0);
1544}
1545
cc2902df 1546/* Return nonzero if the operands of expression X are unchanged from
7506f491
DE
1547 INSN to the end of INSN's basic block. */
1548
1549static int
1550oprs_available_p (x, insn)
1551 rtx x, insn;
1552{
1553 return oprs_unchanged_p (x, insn, 1);
1554}
1555
1556/* Hash expression X.
c4c81601
RK
1557
1558 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1559 indicating if a volatile operand is found or if the expression contains
1560 something we don't want to insert in the table.
7506f491
DE
1561
1562 ??? One might want to merge this with canon_hash. Later. */
1563
1564static unsigned int
1565hash_expr (x, mode, do_not_record_p, hash_table_size)
1566 rtx x;
1567 enum machine_mode mode;
1568 int *do_not_record_p;
1569 int hash_table_size;
1570{
1571 unsigned int hash;
1572
1573 *do_not_record_p = 0;
1574
1575 hash = hash_expr_1 (x, mode, do_not_record_p);
1576 return hash % hash_table_size;
1577}
172890a2 1578
6462bb43 1579/* Hash a string. Just add its bytes up. */
172890a2 1580
6462bb43
AO
1581static inline unsigned
1582hash_string_1 (ps)
1583 const char *ps;
1584{
1585 unsigned hash = 0;
8e42ace1 1586 const unsigned char *p = (const unsigned char *) ps;
589005ff 1587
6462bb43
AO
1588 if (p)
1589 while (*p)
1590 hash += *p++;
1591
1592 return hash;
1593}
7506f491
DE
1594
1595/* Subroutine of hash_expr to do the actual work. */
1596
1597static unsigned int
1598hash_expr_1 (x, mode, do_not_record_p)
1599 rtx x;
1600 enum machine_mode mode;
1601 int *do_not_record_p;
1602{
1603 int i, j;
1604 unsigned hash = 0;
1605 enum rtx_code code;
6f7d635c 1606 const char *fmt;
7506f491 1607
c4c81601 1608 /* Used to turn recursion into iteration. We can't rely on GCC's
fbe5a4a6 1609 tail-recursion elimination since we need to keep accumulating values
c4c81601 1610 in HASH. */
7506f491
DE
1611
1612 if (x == 0)
1613 return hash;
1614
c4c81601 1615 repeat:
7506f491
DE
1616 code = GET_CODE (x);
1617 switch (code)
1618 {
1619 case REG:
c4c81601
RK
1620 hash += ((unsigned int) REG << 7) + REGNO (x);
1621 return hash;
7506f491
DE
1622
1623 case CONST_INT:
c4c81601
RK
1624 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
1625 + (unsigned int) INTVAL (x));
1626 return hash;
7506f491
DE
1627
1628 case CONST_DOUBLE:
1629 /* This is like the general case, except that it only counts
1630 the integers representing the constant. */
c4c81601 1631 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
7506f491
DE
1632 if (GET_MODE (x) != VOIDmode)
1633 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
c4c81601 1634 hash += (unsigned int) XWINT (x, i);
7506f491 1635 else
c4c81601
RK
1636 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
1637 + (unsigned int) CONST_DOUBLE_HIGH (x));
7506f491
DE
1638 return hash;
1639
69ef87e2
AH
1640 case CONST_VECTOR:
1641 {
1642 int units;
1643 rtx elt;
1644
1645 units = CONST_VECTOR_NUNITS (x);
1646
1647 for (i = 0; i < units; ++i)
1648 {
1649 elt = CONST_VECTOR_ELT (x, i);
1650 hash += hash_expr_1 (elt, GET_MODE (elt), do_not_record_p);
1651 }
1652
1653 return hash;
1654 }
1655
7506f491
DE
1656 /* Assume there is only one rtx object for any given label. */
1657 case LABEL_REF:
1658 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
1659 differences and differences between each stage's debugging dumps. */
c4c81601
RK
1660 hash += (((unsigned int) LABEL_REF << 7)
1661 + CODE_LABEL_NUMBER (XEXP (x, 0)));
7506f491
DE
1662 return hash;
1663
1664 case SYMBOL_REF:
1665 {
1666 /* Don't hash on the symbol's address to avoid bootstrap differences.
1667 Different hash values may cause expressions to be recorded in
1668 different orders and thus different registers to be used in the
1669 final assembler. This also avoids differences in the dump files
1670 between various stages. */
1671 unsigned int h = 0;
3cce094d 1672 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
c4c81601 1673
7506f491
DE
1674 while (*p)
1675 h += (h << 7) + *p++; /* ??? revisit */
c4c81601
RK
1676
1677 hash += ((unsigned int) SYMBOL_REF << 7) + h;
7506f491
DE
1678 return hash;
1679 }
1680
1681 case MEM:
1682 if (MEM_VOLATILE_P (x))
1683 {
1684 *do_not_record_p = 1;
1685 return 0;
1686 }
c4c81601
RK
1687
1688 hash += (unsigned int) MEM;
d51f3632
JH
1689 /* We used alias set for hashing, but this is not good, since the alias
1690 set may differ in -fprofile-arcs and -fbranch-probabilities compilation
1691 causing the profiles to fail to match. */
7506f491
DE
1692 x = XEXP (x, 0);
1693 goto repeat;
1694
1695 case PRE_DEC:
1696 case PRE_INC:
1697 case POST_DEC:
1698 case POST_INC:
1699 case PC:
1700 case CC0:
1701 case CALL:
1702 case UNSPEC_VOLATILE:
1703 *do_not_record_p = 1;
1704 return 0;
1705
1706 case ASM_OPERANDS:
1707 if (MEM_VOLATILE_P (x))
1708 {
1709 *do_not_record_p = 1;
1710 return 0;
1711 }
6462bb43
AO
1712 else
1713 {
1714 /* We don't want to take the filename and line into account. */
1715 hash += (unsigned) code + (unsigned) GET_MODE (x)
1716 + hash_string_1 (ASM_OPERANDS_TEMPLATE (x))
1717 + hash_string_1 (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
1718 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
1719
1720 if (ASM_OPERANDS_INPUT_LENGTH (x))
1721 {
1722 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
1723 {
1724 hash += (hash_expr_1 (ASM_OPERANDS_INPUT (x, i),
1725 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
1726 do_not_record_p)
1727 + hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT
1728 (x, i)));
1729 }
1730
1731 hash += hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
1732 x = ASM_OPERANDS_INPUT (x, 0);
1733 mode = GET_MODE (x);
1734 goto repeat;
1735 }
1736 return hash;
1737 }
7506f491
DE
1738
1739 default:
1740 break;
1741 }
1742
7506f491 1743 hash += (unsigned) code + (unsigned) GET_MODE (x);
c4c81601 1744 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
1745 {
1746 if (fmt[i] == 'e')
1747 {
7506f491
DE
1748 /* If we are about to do the last recursive call
1749 needed at this level, change it into iteration.
1750 This function is called enough to be worth it. */
1751 if (i == 0)
1752 {
c4c81601 1753 x = XEXP (x, i);
7506f491
DE
1754 goto repeat;
1755 }
c4c81601
RK
1756
1757 hash += hash_expr_1 (XEXP (x, i), 0, do_not_record_p);
7506f491
DE
1758 if (*do_not_record_p)
1759 return 0;
1760 }
c4c81601 1761
7506f491
DE
1762 else if (fmt[i] == 'E')
1763 for (j = 0; j < XVECLEN (x, i); j++)
1764 {
1765 hash += hash_expr_1 (XVECEXP (x, i, j), 0, do_not_record_p);
1766 if (*do_not_record_p)
1767 return 0;
1768 }
c4c81601 1769
7506f491 1770 else if (fmt[i] == 's')
6462bb43 1771 hash += hash_string_1 (XSTR (x, i));
7506f491 1772 else if (fmt[i] == 'i')
c4c81601 1773 hash += (unsigned int) XINT (x, i);
7506f491
DE
1774 else
1775 abort ();
1776 }
1777
1778 return hash;
1779}
1780
1781/* Hash a set of register REGNO.
1782
c4c81601
RK
1783 Sets are hashed on the register that is set. This simplifies the PRE copy
1784 propagation code.
7506f491
DE
1785
1786 ??? May need to make things more elaborate. Later, as necessary. */
1787
1788static unsigned int
1789hash_set (regno, hash_table_size)
1790 int regno;
1791 int hash_table_size;
1792{
1793 unsigned int hash;
1794
1795 hash = regno;
1796 return hash % hash_table_size;
1797}
1798
cc2902df 1799/* Return nonzero if exp1 is equivalent to exp2.
7506f491
DE
1800 ??? Borrowed from cse.c. Might want to remerge with cse.c. Later. */
1801
1802static int
1803expr_equiv_p (x, y)
1804 rtx x, y;
1805{
b3694847
SS
1806 int i, j;
1807 enum rtx_code code;
1808 const char *fmt;
7506f491
DE
1809
1810 if (x == y)
1811 return 1;
c4c81601 1812
7506f491
DE
1813 if (x == 0 || y == 0)
1814 return x == y;
1815
1816 code = GET_CODE (x);
1817 if (code != GET_CODE (y))
1818 return 0;
1819
1820 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1821 if (GET_MODE (x) != GET_MODE (y))
1822 return 0;
1823
1824 switch (code)
1825 {
1826 case PC:
1827 case CC0:
1828 return x == y;
1829
1830 case CONST_INT:
1831 return INTVAL (x) == INTVAL (y);
1832
1833 case LABEL_REF:
1834 return XEXP (x, 0) == XEXP (y, 0);
1835
1836 case SYMBOL_REF:
1837 return XSTR (x, 0) == XSTR (y, 0);
1838
1839 case REG:
1840 return REGNO (x) == REGNO (y);
1841
297c3335
RH
1842 case MEM:
1843 /* Can't merge two expressions in different alias sets, since we can
1844 decide that the expression is transparent in a block when it isn't,
1845 due to it being set with the different alias set. */
1846 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
1847 return 0;
1848 break;
1849
7506f491
DE
1850 /* For commutative operations, check both orders. */
1851 case PLUS:
1852 case MULT:
1853 case AND:
1854 case IOR:
1855 case XOR:
1856 case NE:
1857 case EQ:
1858 return ((expr_equiv_p (XEXP (x, 0), XEXP (y, 0))
1859 && expr_equiv_p (XEXP (x, 1), XEXP (y, 1)))
1860 || (expr_equiv_p (XEXP (x, 0), XEXP (y, 1))
1861 && expr_equiv_p (XEXP (x, 1), XEXP (y, 0))));
1862
6462bb43
AO
1863 case ASM_OPERANDS:
1864 /* We don't use the generic code below because we want to
1865 disregard filename and line numbers. */
1866
1867 /* A volatile asm isn't equivalent to any other. */
1868 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
1869 return 0;
1870
1871 if (GET_MODE (x) != GET_MODE (y)
1872 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
1873 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
1874 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
1875 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
1876 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
1877 return 0;
1878
1879 if (ASM_OPERANDS_INPUT_LENGTH (x))
1880 {
1881 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
1882 if (! expr_equiv_p (ASM_OPERANDS_INPUT (x, i),
1883 ASM_OPERANDS_INPUT (y, i))
1884 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
1885 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
1886 return 0;
1887 }
1888
1889 return 1;
1890
7506f491
DE
1891 default:
1892 break;
1893 }
1894
1895 /* Compare the elements. If any pair of corresponding elements
1896 fail to match, return 0 for the whole thing. */
1897
1898 fmt = GET_RTX_FORMAT (code);
1899 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1900 {
1901 switch (fmt[i])
1902 {
1903 case 'e':
1904 if (! expr_equiv_p (XEXP (x, i), XEXP (y, i)))
1905 return 0;
1906 break;
1907
1908 case 'E':
1909 if (XVECLEN (x, i) != XVECLEN (y, i))
1910 return 0;
1911 for (j = 0; j < XVECLEN (x, i); j++)
1912 if (! expr_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
1913 return 0;
1914 break;
1915
1916 case 's':
1917 if (strcmp (XSTR (x, i), XSTR (y, i)))
1918 return 0;
1919 break;
1920
1921 case 'i':
1922 if (XINT (x, i) != XINT (y, i))
1923 return 0;
1924 break;
1925
1926 case 'w':
1927 if (XWINT (x, i) != XWINT (y, i))
1928 return 0;
1929 break;
1930
1931 case '0':
1932 break;
aaa4ca30 1933
7506f491
DE
1934 default:
1935 abort ();
1936 }
8e42ace1 1937 }
7506f491
DE
1938
1939 return 1;
1940}
1941
02280659 1942/* Insert expression X in INSN in the hash TABLE.
7506f491
DE
1943 If it is already present, record it as the last occurrence in INSN's
1944 basic block.
1945
1946 MODE is the mode of the value X is being stored into.
1947 It is only used if X is a CONST_INT.
1948
cc2902df
KH
1949 ANTIC_P is nonzero if X is an anticipatable expression.
1950 AVAIL_P is nonzero if X is an available expression. */
7506f491
DE
1951
1952static void
02280659 1953insert_expr_in_table (x, mode, insn, antic_p, avail_p, table)
7506f491
DE
1954 rtx x;
1955 enum machine_mode mode;
1956 rtx insn;
1957 int antic_p, avail_p;
02280659 1958 struct hash_table *table;
7506f491
DE
1959{
1960 int found, do_not_record_p;
1961 unsigned int hash;
1962 struct expr *cur_expr, *last_expr = NULL;
1963 struct occr *antic_occr, *avail_occr;
1964 struct occr *last_occr = NULL;
1965
02280659 1966 hash = hash_expr (x, mode, &do_not_record_p, table->size);
7506f491
DE
1967
1968 /* Do not insert expression in table if it contains volatile operands,
1969 or if hash_expr determines the expression is something we don't want
1970 to or can't handle. */
1971 if (do_not_record_p)
1972 return;
1973
02280659 1974 cur_expr = table->table[hash];
7506f491
DE
1975 found = 0;
1976
c4c81601 1977 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
7506f491
DE
1978 {
1979 /* If the expression isn't found, save a pointer to the end of
1980 the list. */
1981 last_expr = cur_expr;
1982 cur_expr = cur_expr->next_same_hash;
1983 }
1984
1985 if (! found)
1986 {
1987 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
1988 bytes_used += sizeof (struct expr);
02280659 1989 if (table->table[hash] == NULL)
c4c81601 1990 /* This is the first pattern that hashed to this index. */
02280659 1991 table->table[hash] = cur_expr;
7506f491 1992 else
c4c81601
RK
1993 /* Add EXPR to end of this hash chain. */
1994 last_expr->next_same_hash = cur_expr;
1995
589005ff 1996 /* Set the fields of the expr element. */
7506f491 1997 cur_expr->expr = x;
02280659 1998 cur_expr->bitmap_index = table->n_elems++;
7506f491
DE
1999 cur_expr->next_same_hash = NULL;
2000 cur_expr->antic_occr = NULL;
2001 cur_expr->avail_occr = NULL;
2002 }
2003
2004 /* Now record the occurrence(s). */
7506f491
DE
2005 if (antic_p)
2006 {
2007 antic_occr = cur_expr->antic_occr;
2008
2009 /* Search for another occurrence in the same basic block. */
2010 while (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
2011 {
2012 /* If an occurrence isn't found, save a pointer to the end of
2013 the list. */
2014 last_occr = antic_occr;
2015 antic_occr = antic_occr->next;
2016 }
2017
2018 if (antic_occr)
c4c81601
RK
2019 /* Found another instance of the expression in the same basic block.
2020 Prefer the currently recorded one. We want the first one in the
2021 block and the block is scanned from start to end. */
2022 ; /* nothing to do */
7506f491
DE
2023 else
2024 {
2025 /* First occurrence of this expression in this basic block. */
2026 antic_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2027 bytes_used += sizeof (struct occr);
2028 /* First occurrence of this expression in any block? */
2029 if (cur_expr->antic_occr == NULL)
2030 cur_expr->antic_occr = antic_occr;
2031 else
2032 last_occr->next = antic_occr;
c4c81601 2033
7506f491
DE
2034 antic_occr->insn = insn;
2035 antic_occr->next = NULL;
2036 }
2037 }
2038
2039 if (avail_p)
2040 {
2041 avail_occr = cur_expr->avail_occr;
2042
2043 /* Search for another occurrence in the same basic block. */
2044 while (avail_occr && BLOCK_NUM (avail_occr->insn) != BLOCK_NUM (insn))
2045 {
2046 /* If an occurrence isn't found, save a pointer to the end of
2047 the list. */
2048 last_occr = avail_occr;
2049 avail_occr = avail_occr->next;
2050 }
2051
2052 if (avail_occr)
c4c81601
RK
2053 /* Found another instance of the expression in the same basic block.
2054 Prefer this occurrence to the currently recorded one. We want
2055 the last one in the block and the block is scanned from start
2056 to end. */
2057 avail_occr->insn = insn;
7506f491
DE
2058 else
2059 {
2060 /* First occurrence of this expression in this basic block. */
2061 avail_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2062 bytes_used += sizeof (struct occr);
c4c81601 2063
7506f491
DE
2064 /* First occurrence of this expression in any block? */
2065 if (cur_expr->avail_occr == NULL)
2066 cur_expr->avail_occr = avail_occr;
2067 else
2068 last_occr->next = avail_occr;
c4c81601 2069
7506f491
DE
2070 avail_occr->insn = insn;
2071 avail_occr->next = NULL;
2072 }
2073 }
2074}
2075
2076/* Insert pattern X in INSN in the hash table.
2077 X is a SET of a reg to either another reg or a constant.
2078 If it is already present, record it as the last occurrence in INSN's
2079 basic block. */
2080
2081static void
02280659 2082insert_set_in_table (x, insn, table)
7506f491
DE
2083 rtx x;
2084 rtx insn;
02280659 2085 struct hash_table *table;
7506f491
DE
2086{
2087 int found;
2088 unsigned int hash;
2089 struct expr *cur_expr, *last_expr = NULL;
2090 struct occr *cur_occr, *last_occr = NULL;
2091
2092 if (GET_CODE (x) != SET
2093 || GET_CODE (SET_DEST (x)) != REG)
2094 abort ();
2095
02280659 2096 hash = hash_set (REGNO (SET_DEST (x)), table->size);
7506f491 2097
02280659 2098 cur_expr = table->table[hash];
7506f491
DE
2099 found = 0;
2100
c4c81601 2101 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
7506f491
DE
2102 {
2103 /* If the expression isn't found, save a pointer to the end of
2104 the list. */
2105 last_expr = cur_expr;
2106 cur_expr = cur_expr->next_same_hash;
2107 }
2108
2109 if (! found)
2110 {
2111 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
2112 bytes_used += sizeof (struct expr);
02280659 2113 if (table->table[hash] == NULL)
c4c81601 2114 /* This is the first pattern that hashed to this index. */
02280659 2115 table->table[hash] = cur_expr;
7506f491 2116 else
c4c81601
RK
2117 /* Add EXPR to end of this hash chain. */
2118 last_expr->next_same_hash = cur_expr;
2119
7506f491
DE
2120 /* Set the fields of the expr element.
2121 We must copy X because it can be modified when copy propagation is
2122 performed on its operands. */
7506f491 2123 cur_expr->expr = copy_rtx (x);
02280659 2124 cur_expr->bitmap_index = table->n_elems++;
7506f491
DE
2125 cur_expr->next_same_hash = NULL;
2126 cur_expr->antic_occr = NULL;
2127 cur_expr->avail_occr = NULL;
2128 }
2129
2130 /* Now record the occurrence. */
7506f491
DE
2131 cur_occr = cur_expr->avail_occr;
2132
2133 /* Search for another occurrence in the same basic block. */
2134 while (cur_occr && BLOCK_NUM (cur_occr->insn) != BLOCK_NUM (insn))
2135 {
2136 /* If an occurrence isn't found, save a pointer to the end of
2137 the list. */
2138 last_occr = cur_occr;
2139 cur_occr = cur_occr->next;
2140 }
2141
2142 if (cur_occr)
c4c81601
RK
2143 /* Found another instance of the expression in the same basic block.
2144 Prefer this occurrence to the currently recorded one. We want the
2145 last one in the block and the block is scanned from start to end. */
2146 cur_occr->insn = insn;
7506f491
DE
2147 else
2148 {
2149 /* First occurrence of this expression in this basic block. */
2150 cur_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2151 bytes_used += sizeof (struct occr);
c4c81601 2152
7506f491
DE
2153 /* First occurrence of this expression in any block? */
2154 if (cur_expr->avail_occr == NULL)
2155 cur_expr->avail_occr = cur_occr;
2156 else
2157 last_occr->next = cur_occr;
c4c81601 2158
7506f491
DE
2159 cur_occr->insn = insn;
2160 cur_occr->next = NULL;
2161 }
2162}
2163
6b2d1c9e
RS
2164/* Determine whether the rtx X should be treated as a constant for
2165 the purposes of GCSE's constant propagation. */
2166
2167static bool
2168gcse_constant_p (x)
2169 rtx x;
2170{
2171 /* Consider a COMPARE of two integers constant. */
2172 if (GET_CODE (x) == COMPARE
2173 && GET_CODE (XEXP (x, 0)) == CONST_INT
2174 && GET_CODE (XEXP (x, 1)) == CONST_INT)
2175 return true;
2176
2177 if (GET_CODE (x) == CONSTANT_P_RTX)
2178 return false;
2179
2180 return CONSTANT_P (x);
2181}
2182
02280659
ZD
2183/* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or
2184 expression one). */
7506f491
DE
2185
2186static void
02280659 2187hash_scan_set (pat, insn, table)
7506f491 2188 rtx pat, insn;
02280659 2189 struct hash_table *table;
7506f491
DE
2190{
2191 rtx src = SET_SRC (pat);
2192 rtx dest = SET_DEST (pat);
172890a2 2193 rtx note;
7506f491
DE
2194
2195 if (GET_CODE (src) == CALL)
02280659 2196 hash_scan_call (src, insn, table);
7506f491 2197
172890a2 2198 else if (GET_CODE (dest) == REG)
7506f491 2199 {
172890a2 2200 unsigned int regno = REGNO (dest);
7506f491
DE
2201 rtx tmp;
2202
172890a2
RK
2203 /* If this is a single set and we are doing constant propagation,
2204 see if a REG_NOTE shows this equivalent to a constant. */
02280659 2205 if (table->set_p && (note = find_reg_equal_equiv_note (insn)) != 0
6b2d1c9e 2206 && gcse_constant_p (XEXP (note, 0)))
172890a2
RK
2207 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
2208
7506f491 2209 /* Only record sets of pseudo-regs in the hash table. */
02280659 2210 if (! table->set_p
7506f491
DE
2211 && regno >= FIRST_PSEUDO_REGISTER
2212 /* Don't GCSE something if we can't do a reg/reg copy. */
2213 && can_copy_p [GET_MODE (dest)]
068473ec
JH
2214 /* GCSE commonly inserts instruction after the insn. We can't
2215 do that easily for EH_REGION notes so disable GCSE on these
2216 for now. */
2217 && !find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7506f491 2218 /* Is SET_SRC something we want to gcse? */
172890a2
RK
2219 && want_to_gcse_p (src)
2220 /* Don't CSE a nop. */
43e72072
JJ
2221 && ! set_noop_p (pat)
2222 /* Don't GCSE if it has attached REG_EQUIV note.
2223 At this point this only function parameters should have
2224 REG_EQUIV notes and if the argument slot is used somewhere
a1f300c0 2225 explicitly, it means address of parameter has been taken,
43e72072
JJ
2226 so we should not extend the lifetime of the pseudo. */
2227 && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0
2228 || GET_CODE (XEXP (note, 0)) != MEM))
7506f491
DE
2229 {
2230 /* An expression is not anticipatable if its operands are
52d76e11
RK
2231 modified before this insn or if this is not the only SET in
2232 this insn. */
2233 int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn);
7506f491 2234 /* An expression is not available if its operands are
eb296bd9
GK
2235 subsequently modified, including this insn. It's also not
2236 available if this is a branch, because we can't insert
2237 a set after the branch. */
2238 int avail_p = (oprs_available_p (src, insn)
2239 && ! JUMP_P (insn));
c4c81601 2240
02280659 2241 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
7506f491 2242 }
c4c81601 2243
7506f491 2244 /* Record sets for constant/copy propagation. */
02280659 2245 else if (table->set_p
7506f491
DE
2246 && regno >= FIRST_PSEUDO_REGISTER
2247 && ((GET_CODE (src) == REG
2248 && REGNO (src) >= FIRST_PSEUDO_REGISTER
172890a2
RK
2249 && can_copy_p [GET_MODE (dest)]
2250 && REGNO (src) != regno)
6b2d1c9e 2251 || gcse_constant_p (src))
7506f491
DE
2252 /* A copy is not available if its src or dest is subsequently
2253 modified. Here we want to search from INSN+1 on, but
2254 oprs_available_p searches from INSN on. */
2255 && (insn == BLOCK_END (BLOCK_NUM (insn))
2256 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
2257 && oprs_available_p (pat, tmp))))
02280659 2258 insert_set_in_table (pat, insn, table);
7506f491 2259 }
7506f491
DE
2260}
2261
2262static void
02280659 2263hash_scan_clobber (x, insn, table)
50b2596f 2264 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
02280659 2265 struct hash_table *table ATTRIBUTE_UNUSED;
7506f491
DE
2266{
2267 /* Currently nothing to do. */
2268}
2269
2270static void
02280659 2271hash_scan_call (x, insn, table)
50b2596f 2272 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
02280659 2273 struct hash_table *table ATTRIBUTE_UNUSED;
7506f491
DE
2274{
2275 /* Currently nothing to do. */
2276}
2277
2278/* Process INSN and add hash table entries as appropriate.
2279
2280 Only available expressions that set a single pseudo-reg are recorded.
2281
2282 Single sets in a PARALLEL could be handled, but it's an extra complication
2283 that isn't dealt with right now. The trick is handling the CLOBBERs that
2284 are also in the PARALLEL. Later.
2285
cc2902df 2286 If SET_P is nonzero, this is for the assignment hash table,
ed79bb3d
R
2287 otherwise it is for the expression hash table.
2288 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
2289 not record any expressions. */
7506f491
DE
2290
2291static void
02280659 2292hash_scan_insn (insn, table, in_libcall_block)
7506f491 2293 rtx insn;
02280659 2294 struct hash_table *table;
48e87cef 2295 int in_libcall_block;
7506f491
DE
2296{
2297 rtx pat = PATTERN (insn);
c4c81601 2298 int i;
7506f491 2299
172890a2
RK
2300 if (in_libcall_block)
2301 return;
2302
7506f491
DE
2303 /* Pick out the sets of INSN and for other forms of instructions record
2304 what's been modified. */
2305
172890a2 2306 if (GET_CODE (pat) == SET)
02280659 2307 hash_scan_set (pat, insn, table);
7506f491 2308 else if (GET_CODE (pat) == PARALLEL)
c4c81601
RK
2309 for (i = 0; i < XVECLEN (pat, 0); i++)
2310 {
2311 rtx x = XVECEXP (pat, 0, i);
7506f491 2312
c4c81601 2313 if (GET_CODE (x) == SET)
02280659 2314 hash_scan_set (x, insn, table);
c4c81601 2315 else if (GET_CODE (x) == CLOBBER)
02280659 2316 hash_scan_clobber (x, insn, table);
c4c81601 2317 else if (GET_CODE (x) == CALL)
02280659 2318 hash_scan_call (x, insn, table);
c4c81601 2319 }
7506f491 2320
7506f491 2321 else if (GET_CODE (pat) == CLOBBER)
02280659 2322 hash_scan_clobber (pat, insn, table);
7506f491 2323 else if (GET_CODE (pat) == CALL)
02280659 2324 hash_scan_call (pat, insn, table);
7506f491
DE
2325}
2326
2327static void
02280659 2328dump_hash_table (file, name, table)
7506f491 2329 FILE *file;
dff01034 2330 const char *name;
02280659 2331 struct hash_table *table;
7506f491
DE
2332{
2333 int i;
2334 /* Flattened out table, so it's printed in proper order. */
4da896b2
MM
2335 struct expr **flat_table;
2336 unsigned int *hash_val;
c4c81601 2337 struct expr *expr;
4da896b2 2338
589005ff 2339 flat_table
02280659
ZD
2340 = (struct expr **) xcalloc (table->n_elems, sizeof (struct expr *));
2341 hash_val = (unsigned int *) xmalloc (table->n_elems * sizeof (unsigned int));
7506f491 2342
02280659
ZD
2343 for (i = 0; i < (int) table->size; i++)
2344 for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
2345 {
2346 flat_table[expr->bitmap_index] = expr;
2347 hash_val[expr->bitmap_index] = i;
2348 }
7506f491
DE
2349
2350 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
02280659 2351 name, table->size, table->n_elems);
7506f491 2352
02280659 2353 for (i = 0; i < (int) table->n_elems; i++)
21318741
RK
2354 if (flat_table[i] != 0)
2355 {
a0ac9e5a 2356 expr = flat_table[i];
21318741
RK
2357 fprintf (file, "Index %d (hash value %d)\n ",
2358 expr->bitmap_index, hash_val[i]);
a0ac9e5a 2359 print_rtl (file, expr->expr);
21318741
RK
2360 fprintf (file, "\n");
2361 }
7506f491
DE
2362
2363 fprintf (file, "\n");
4da896b2 2364
4da896b2
MM
2365 free (flat_table);
2366 free (hash_val);
7506f491
DE
2367}
2368
2369/* Record register first/last/block set information for REGNO in INSN.
c4c81601 2370
80c29cc4 2371 first_set records the first place in the block where the register
7506f491 2372 is set and is used to compute "anticipatability".
c4c81601 2373
80c29cc4 2374 last_set records the last place in the block where the register
7506f491 2375 is set and is used to compute "availability".
c4c81601 2376
80c29cc4
RZ
2377 last_bb records the block for which first_set and last_set are
2378 valid, as a quick test to invalidate them.
2379
7506f491
DE
2380 reg_set_in_block records whether the register is set in the block
2381 and is used to compute "transparency". */
2382
2383static void
2384record_last_reg_set_info (insn, regno)
2385 rtx insn;
2386 int regno;
2387{
80c29cc4
RZ
2388 struct reg_avail_info *info = &reg_avail_info[regno];
2389 int cuid = INSN_CUID (insn);
c4c81601 2390
80c29cc4
RZ
2391 info->last_set = cuid;
2392 if (info->last_bb != current_bb)
2393 {
2394 info->last_bb = current_bb;
2395 info->first_set = cuid;
e0082a72 2396 SET_BIT (reg_set_in_block[current_bb->index], regno);
80c29cc4 2397 }
7506f491
DE
2398}
2399
a13d4ebf
AM
2400
2401/* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
2402 Note we store a pair of elements in the list, so they have to be
2403 taken off pairwise. */
2404
589005ff 2405static void
a13d4ebf
AM
2406canon_list_insert (dest, unused1, v_insn)
2407 rtx dest ATTRIBUTE_UNUSED;
2408 rtx unused1 ATTRIBUTE_UNUSED;
2409 void * v_insn;
2410{
2411 rtx dest_addr, insn;
0fe854a7 2412 int bb;
a13d4ebf
AM
2413
2414 while (GET_CODE (dest) == SUBREG
2415 || GET_CODE (dest) == ZERO_EXTRACT
2416 || GET_CODE (dest) == SIGN_EXTRACT
2417 || GET_CODE (dest) == STRICT_LOW_PART)
2418 dest = XEXP (dest, 0);
2419
2420 /* If DEST is not a MEM, then it will not conflict with a load. Note
2421 that function calls are assumed to clobber memory, but are handled
2422 elsewhere. */
2423
2424 if (GET_CODE (dest) != MEM)
2425 return;
2426
2427 dest_addr = get_addr (XEXP (dest, 0));
2428 dest_addr = canon_rtx (dest_addr);
589005ff 2429 insn = (rtx) v_insn;
0fe854a7 2430 bb = BLOCK_NUM (insn);
a13d4ebf 2431
589005ff 2432 canon_modify_mem_list[bb] =
0fe854a7 2433 alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]);
589005ff 2434 canon_modify_mem_list[bb] =
0fe854a7
RH
2435 alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]);
2436 bitmap_set_bit (canon_modify_mem_list_set, bb);
a13d4ebf
AM
2437}
2438
a13d4ebf
AM
2439/* Record memory modification information for INSN. We do not actually care
2440 about the memory location(s) that are set, or even how they are set (consider
2441 a CALL_INSN). We merely need to record which insns modify memory. */
7506f491
DE
2442
2443static void
2444record_last_mem_set_info (insn)
2445 rtx insn;
2446{
0fe854a7
RH
2447 int bb = BLOCK_NUM (insn);
2448
ccef9ef5 2449 /* load_killed_in_block_p will handle the case of calls clobbering
dc297297 2450 everything. */
0fe854a7
RH
2451 modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]);
2452 bitmap_set_bit (modify_mem_list_set, bb);
a13d4ebf
AM
2453
2454 if (GET_CODE (insn) == CALL_INSN)
2455 {
2456 /* Note that traversals of this loop (other than for free-ing)
2457 will break after encountering a CALL_INSN. So, there's no
dc297297 2458 need to insert a pair of items, as canon_list_insert does. */
589005ff
KH
2459 canon_modify_mem_list[bb] =
2460 alloc_INSN_LIST (insn, canon_modify_mem_list[bb]);
0fe854a7 2461 bitmap_set_bit (canon_modify_mem_list_set, bb);
a13d4ebf
AM
2462 }
2463 else
0fe854a7 2464 note_stores (PATTERN (insn), canon_list_insert, (void*) insn);
7506f491
DE
2465}
2466
7506f491 2467/* Called from compute_hash_table via note_stores to handle one
84832317
MM
2468 SET or CLOBBER in an insn. DATA is really the instruction in which
2469 the SET is taking place. */
7506f491
DE
2470
2471static void
84832317 2472record_last_set_info (dest, setter, data)
50b2596f 2473 rtx dest, setter ATTRIBUTE_UNUSED;
84832317 2474 void *data;
7506f491 2475{
84832317
MM
2476 rtx last_set_insn = (rtx) data;
2477
7506f491
DE
2478 if (GET_CODE (dest) == SUBREG)
2479 dest = SUBREG_REG (dest);
2480
2481 if (GET_CODE (dest) == REG)
2482 record_last_reg_set_info (last_set_insn, REGNO (dest));
2483 else if (GET_CODE (dest) == MEM
2484 /* Ignore pushes, they clobber nothing. */
2485 && ! push_operand (dest, GET_MODE (dest)))
2486 record_last_mem_set_info (last_set_insn);
2487}
2488
2489/* Top level function to create an expression or assignment hash table.
2490
2491 Expression entries are placed in the hash table if
2492 - they are of the form (set (pseudo-reg) src),
2493 - src is something we want to perform GCSE on,
2494 - none of the operands are subsequently modified in the block
2495
2496 Assignment entries are placed in the hash table if
2497 - they are of the form (set (pseudo-reg) src),
2498 - src is something we want to perform const/copy propagation on,
2499 - none of the operands or target are subsequently modified in the block
c4c81601 2500
7506f491
DE
2501 Currently src must be a pseudo-reg or a const_int.
2502
02280659 2503 TABLE is the table computed. */
7506f491
DE
2504
2505static void
02280659
ZD
2506compute_hash_table_work (table)
2507 struct hash_table *table;
7506f491 2508{
80c29cc4 2509 unsigned int i;
7506f491
DE
2510
2511 /* While we compute the hash table we also compute a bit array of which
2512 registers are set in which blocks.
7506f491
DE
2513 ??? This isn't needed during const/copy propagation, but it's cheap to
2514 compute. Later. */
d55bc081 2515 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
7506f491 2516
a13d4ebf 2517 /* re-Cache any INSN_LIST nodes we have allocated. */
73991d6a 2518 clear_modify_mem_tables ();
7506f491 2519 /* Some working arrays used to track first and last set in each block. */
80c29cc4
RZ
2520 reg_avail_info = (struct reg_avail_info*)
2521 gmalloc (max_gcse_regno * sizeof (struct reg_avail_info));
2522
2523 for (i = 0; i < max_gcse_regno; ++i)
e0082a72 2524 reg_avail_info[i].last_bb = NULL;
7506f491 2525
e0082a72 2526 FOR_EACH_BB (current_bb)
7506f491
DE
2527 {
2528 rtx insn;
770ae6cc 2529 unsigned int regno;
ed79bb3d 2530 int in_libcall_block;
7506f491
DE
2531
2532 /* First pass over the instructions records information used to
2533 determine when registers and memory are first and last set.
ccef9ef5 2534 ??? hard-reg reg_set_in_block computation
7506f491
DE
2535 could be moved to compute_sets since they currently don't change. */
2536
e0082a72
ZD
2537 for (insn = current_bb->head;
2538 insn && insn != NEXT_INSN (current_bb->end);
7506f491
DE
2539 insn = NEXT_INSN (insn))
2540 {
2c3c49de 2541 if (! INSN_P (insn))
7506f491
DE
2542 continue;
2543
2544 if (GET_CODE (insn) == CALL_INSN)
2545 {
19652adf 2546 bool clobbers_all = false;
589005ff 2547#ifdef NON_SAVING_SETJMP
19652adf
ZW
2548 if (NON_SAVING_SETJMP
2549 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
2550 clobbers_all = true;
2551#endif
2552
7506f491 2553 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
19652adf
ZW
2554 if (clobbers_all
2555 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
7506f491 2556 record_last_reg_set_info (insn, regno);
c4c81601 2557
24a28584 2558 mark_call (insn);
7506f491
DE
2559 }
2560
84832317 2561 note_stores (PATTERN (insn), record_last_set_info, insn);
7506f491
DE
2562 }
2563
fbef91d8
RS
2564 /* Insert implicit sets in the hash table. */
2565 if (table->set_p
2566 && implicit_sets[current_bb->index] != NULL_RTX)
2567 hash_scan_set (implicit_sets[current_bb->index],
2568 current_bb->head, table);
2569
7506f491
DE
2570 /* The next pass builds the hash table. */
2571
e0082a72
ZD
2572 for (insn = current_bb->head, in_libcall_block = 0;
2573 insn && insn != NEXT_INSN (current_bb->end);
7506f491 2574 insn = NEXT_INSN (insn))
2c3c49de 2575 if (INSN_P (insn))
c4c81601
RK
2576 {
2577 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
589005ff 2578 in_libcall_block = 1;
02280659 2579 else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
589005ff 2580 in_libcall_block = 0;
02280659
ZD
2581 hash_scan_insn (insn, table, in_libcall_block);
2582 if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX))
589005ff 2583 in_libcall_block = 0;
8e42ace1 2584 }
7506f491
DE
2585 }
2586
80c29cc4
RZ
2587 free (reg_avail_info);
2588 reg_avail_info = NULL;
7506f491
DE
2589}
2590
02280659 2591/* Allocate space for the set/expr hash TABLE.
7506f491 2592 N_INSNS is the number of instructions in the function.
02280659
ZD
2593 It is used to determine the number of buckets to use.
2594 SET_P determines whether set or expression table will
2595 be created. */
7506f491
DE
2596
2597static void
02280659 2598alloc_hash_table (n_insns, table, set_p)
7506f491 2599 int n_insns;
02280659
ZD
2600 struct hash_table *table;
2601 int set_p;
7506f491
DE
2602{
2603 int n;
2604
02280659
ZD
2605 table->size = n_insns / 4;
2606 if (table->size < 11)
2607 table->size = 11;
c4c81601 2608
7506f491
DE
2609 /* Attempt to maintain efficient use of hash table.
2610 Making it an odd number is simplest for now.
2611 ??? Later take some measurements. */
02280659
ZD
2612 table->size |= 1;
2613 n = table->size * sizeof (struct expr *);
2614 table->table = (struct expr **) gmalloc (n);
2615 table->set_p = set_p;
7506f491
DE
2616}
2617
02280659 2618/* Free things allocated by alloc_hash_table. */
7506f491
DE
2619
2620static void
02280659
ZD
2621free_hash_table (table)
2622 struct hash_table *table;
7506f491 2623{
02280659 2624 free (table->table);
7506f491
DE
2625}
2626
02280659
ZD
2627/* Compute the hash TABLE for doing copy/const propagation or
2628 expression hash table. */
7506f491
DE
2629
2630static void
02280659
ZD
2631compute_hash_table (table)
2632 struct hash_table *table;
7506f491
DE
2633{
2634 /* Initialize count of number of entries in hash table. */
02280659
ZD
2635 table->n_elems = 0;
2636 memset ((char *) table->table, 0,
2637 table->size * sizeof (struct expr *));
7506f491 2638
02280659 2639 compute_hash_table_work (table);
7506f491
DE
2640}
2641\f
2642/* Expression tracking support. */
2643
02280659 2644/* Lookup pattern PAT in the expression TABLE.
7506f491
DE
2645 The result is a pointer to the table entry, or NULL if not found. */
2646
2647static struct expr *
02280659 2648lookup_expr (pat, table)
7506f491 2649 rtx pat;
02280659 2650 struct hash_table *table;
7506f491
DE
2651{
2652 int do_not_record_p;
2653 unsigned int hash = hash_expr (pat, GET_MODE (pat), &do_not_record_p,
02280659 2654 table->size);
7506f491
DE
2655 struct expr *expr;
2656
2657 if (do_not_record_p)
2658 return NULL;
2659
02280659 2660 expr = table->table[hash];
7506f491
DE
2661
2662 while (expr && ! expr_equiv_p (expr->expr, pat))
2663 expr = expr->next_same_hash;
2664
2665 return expr;
2666}
2667
ceda50e9
RH
2668/* Lookup REGNO in the set TABLE. The result is a pointer to the
2669 table entry, or NULL if not found. */
7506f491
DE
2670
2671static struct expr *
ceda50e9 2672lookup_set (regno, table)
770ae6cc 2673 unsigned int regno;
02280659 2674 struct hash_table *table;
7506f491 2675{
02280659 2676 unsigned int hash = hash_set (regno, table->size);
7506f491
DE
2677 struct expr *expr;
2678
02280659 2679 expr = table->table[hash];
7506f491 2680
ceda50e9
RH
2681 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2682 expr = expr->next_same_hash;
7506f491
DE
2683
2684 return expr;
2685}
2686
2687/* Return the next entry for REGNO in list EXPR. */
2688
2689static struct expr *
2690next_set (regno, expr)
770ae6cc 2691 unsigned int regno;
7506f491
DE
2692 struct expr *expr;
2693{
2694 do
2695 expr = expr->next_same_hash;
2696 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
c4c81601 2697
7506f491
DE
2698 return expr;
2699}
2700
0fe854a7
RH
2701/* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node
2702 types may be mixed. */
2703
2704static void
2705free_insn_expr_list_list (listp)
2706 rtx *listp;
2707{
2708 rtx list, next;
2709
2710 for (list = *listp; list ; list = next)
2711 {
2712 next = XEXP (list, 1);
2713 if (GET_CODE (list) == EXPR_LIST)
2714 free_EXPR_LIST_node (list);
2715 else
2716 free_INSN_LIST_node (list);
2717 }
2718
2719 *listp = NULL;
2720}
2721
73991d6a
JH
2722/* Clear canon_modify_mem_list and modify_mem_list tables. */
2723static void
2724clear_modify_mem_tables ()
2725{
2726 int i;
2727
2728 EXECUTE_IF_SET_IN_BITMAP
0fe854a7
RH
2729 (modify_mem_list_set, 0, i, free_INSN_LIST_list (modify_mem_list + i));
2730 bitmap_clear (modify_mem_list_set);
73991d6a
JH
2731
2732 EXECUTE_IF_SET_IN_BITMAP
2733 (canon_modify_mem_list_set, 0, i,
0fe854a7
RH
2734 free_insn_expr_list_list (canon_modify_mem_list + i));
2735 bitmap_clear (canon_modify_mem_list_set);
73991d6a
JH
2736}
2737
2738/* Release memory used by modify_mem_list_set and canon_modify_mem_list_set. */
2739
2740static void
2741free_modify_mem_tables ()
2742{
2743 clear_modify_mem_tables ();
2744 free (modify_mem_list);
2745 free (canon_modify_mem_list);
2746 modify_mem_list = 0;
2747 canon_modify_mem_list = 0;
2748}
2749
7506f491
DE
2750/* Reset tables used to keep track of what's still available [since the
2751 start of the block]. */
2752
2753static void
2754reset_opr_set_tables ()
2755{
2756 /* Maintain a bitmap of which regs have been set since beginning of
2757 the block. */
73991d6a 2758 CLEAR_REG_SET (reg_set_bitmap);
c4c81601 2759
7506f491
DE
2760 /* Also keep a record of the last instruction to modify memory.
2761 For now this is very trivial, we only record whether any memory
2762 location has been modified. */
73991d6a 2763 clear_modify_mem_tables ();
7506f491
DE
2764}
2765
cc2902df 2766/* Return nonzero if the operands of X are not set before INSN in
7506f491
DE
2767 INSN's basic block. */
2768
2769static int
2770oprs_not_set_p (x, insn)
2771 rtx x, insn;
2772{
c4c81601 2773 int i, j;
7506f491 2774 enum rtx_code code;
6f7d635c 2775 const char *fmt;
7506f491 2776
7506f491
DE
2777 if (x == 0)
2778 return 1;
2779
2780 code = GET_CODE (x);
2781 switch (code)
2782 {
2783 case PC:
2784 case CC0:
2785 case CONST:
2786 case CONST_INT:
2787 case CONST_DOUBLE:
69ef87e2 2788 case CONST_VECTOR:
7506f491
DE
2789 case SYMBOL_REF:
2790 case LABEL_REF:
2791 case ADDR_VEC:
2792 case ADDR_DIFF_VEC:
2793 return 1;
2794
2795 case MEM:
589005ff 2796 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
e2d2ed72 2797 INSN_CUID (insn), x, 0))
a13d4ebf 2798 return 0;
c4c81601
RK
2799 else
2800 return oprs_not_set_p (XEXP (x, 0), insn);
7506f491
DE
2801
2802 case REG:
73991d6a 2803 return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
7506f491
DE
2804
2805 default:
2806 break;
2807 }
2808
c4c81601 2809 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
2810 {
2811 if (fmt[i] == 'e')
2812 {
7506f491
DE
2813 /* If we are about to do the last recursive call
2814 needed at this level, change it into iteration.
2815 This function is called enough to be worth it. */
2816 if (i == 0)
c4c81601
RK
2817 return oprs_not_set_p (XEXP (x, i), insn);
2818
2819 if (! oprs_not_set_p (XEXP (x, i), insn))
7506f491
DE
2820 return 0;
2821 }
2822 else if (fmt[i] == 'E')
c4c81601
RK
2823 for (j = 0; j < XVECLEN (x, i); j++)
2824 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2825 return 0;
7506f491
DE
2826 }
2827
2828 return 1;
2829}
2830
2831/* Mark things set by a CALL. */
2832
2833static void
b5ce41ff
JL
2834mark_call (insn)
2835 rtx insn;
7506f491 2836{
24a28584 2837 if (! CONST_OR_PURE_CALL_P (insn))
a13d4ebf 2838 record_last_mem_set_info (insn);
7506f491
DE
2839}
2840
2841/* Mark things set by a SET. */
2842
2843static void
2844mark_set (pat, insn)
2845 rtx pat, insn;
2846{
2847 rtx dest = SET_DEST (pat);
2848
2849 while (GET_CODE (dest) == SUBREG
2850 || GET_CODE (dest) == ZERO_EXTRACT
2851 || GET_CODE (dest) == SIGN_EXTRACT
2852 || GET_CODE (dest) == STRICT_LOW_PART)
2853 dest = XEXP (dest, 0);
2854
a13d4ebf 2855 if (GET_CODE (dest) == REG)
73991d6a 2856 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest));
a13d4ebf
AM
2857 else if (GET_CODE (dest) == MEM)
2858 record_last_mem_set_info (insn);
2859
7506f491 2860 if (GET_CODE (SET_SRC (pat)) == CALL)
b5ce41ff 2861 mark_call (insn);
7506f491
DE
2862}
2863
2864/* Record things set by a CLOBBER. */
2865
2866static void
2867mark_clobber (pat, insn)
2868 rtx pat, insn;
2869{
2870 rtx clob = XEXP (pat, 0);
2871
2872 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2873 clob = XEXP (clob, 0);
2874
a13d4ebf 2875 if (GET_CODE (clob) == REG)
73991d6a 2876 SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob));
a13d4ebf
AM
2877 else
2878 record_last_mem_set_info (insn);
7506f491
DE
2879}
2880
2881/* Record things set by INSN.
2882 This data is used by oprs_not_set_p. */
2883
2884static void
2885mark_oprs_set (insn)
2886 rtx insn;
2887{
2888 rtx pat = PATTERN (insn);
c4c81601 2889 int i;
7506f491
DE
2890
2891 if (GET_CODE (pat) == SET)
2892 mark_set (pat, insn);
2893 else if (GET_CODE (pat) == PARALLEL)
c4c81601
RK
2894 for (i = 0; i < XVECLEN (pat, 0); i++)
2895 {
2896 rtx x = XVECEXP (pat, 0, i);
2897
2898 if (GET_CODE (x) == SET)
2899 mark_set (x, insn);
2900 else if (GET_CODE (x) == CLOBBER)
2901 mark_clobber (x, insn);
2902 else if (GET_CODE (x) == CALL)
2903 mark_call (insn);
2904 }
7506f491 2905
7506f491
DE
2906 else if (GET_CODE (pat) == CLOBBER)
2907 mark_clobber (pat, insn);
2908 else if (GET_CODE (pat) == CALL)
b5ce41ff 2909 mark_call (insn);
7506f491 2910}
b5ce41ff 2911
7506f491
DE
2912\f
2913/* Classic GCSE reaching definition support. */
2914
2915/* Allocate reaching def variables. */
2916
2917static void
2918alloc_rd_mem (n_blocks, n_insns)
2919 int n_blocks, n_insns;
2920{
2921 rd_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2922 sbitmap_vector_zero (rd_kill, n_blocks);
7506f491
DE
2923
2924 rd_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2925 sbitmap_vector_zero (rd_gen, n_blocks);
7506f491
DE
2926
2927 reaching_defs = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2928 sbitmap_vector_zero (reaching_defs, n_blocks);
7506f491
DE
2929
2930 rd_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
d55bc081 2931 sbitmap_vector_zero (rd_out, n_blocks);
7506f491
DE
2932}
2933
2934/* Free reaching def variables. */
2935
2936static void
2937free_rd_mem ()
2938{
5a660bff
DB
2939 sbitmap_vector_free (rd_kill);
2940 sbitmap_vector_free (rd_gen);
2941 sbitmap_vector_free (reaching_defs);
2942 sbitmap_vector_free (rd_out);
7506f491
DE
2943}
2944
c4c81601 2945/* Add INSN to the kills of BB. REGNO, set in BB, is killed by INSN. */
7506f491
DE
2946
2947static void
2948handle_rd_kill_set (insn, regno, bb)
2949 rtx insn;
e2d2ed72
AM
2950 int regno;
2951 basic_block bb;
7506f491 2952{
c4c81601 2953 struct reg_set *this_reg;
7506f491 2954
c4c81601
RK
2955 for (this_reg = reg_set_table[regno]; this_reg; this_reg = this_reg ->next)
2956 if (BLOCK_NUM (this_reg->insn) != BLOCK_NUM (insn))
0b17ab2f 2957 SET_BIT (rd_kill[bb->index], INSN_CUID (this_reg->insn));
7506f491
DE
2958}
2959
7506f491
DE
2960/* Compute the set of kill's for reaching definitions. */
2961
2962static void
2963compute_kill_rd ()
2964{
e0082a72 2965 int cuid;
172890a2
RK
2966 unsigned int regno;
2967 int i;
e0082a72 2968 basic_block bb;
7506f491
DE
2969
2970 /* For each block
2971 For each set bit in `gen' of the block (i.e each insn which
ac7c5af5
JL
2972 generates a definition in the block)
2973 Call the reg set by the insn corresponding to that bit regx
2974 Look at the linked list starting at reg_set_table[regx]
2975 For each setting of regx in the linked list, which is not in
2976 this block
6d2f8887 2977 Set the bit in `kill' corresponding to that insn. */
e0082a72 2978 FOR_EACH_BB (bb)
c4c81601 2979 for (cuid = 0; cuid < max_cuid; cuid++)
e0082a72 2980 if (TEST_BIT (rd_gen[bb->index], cuid))
7506f491 2981 {
c4c81601
RK
2982 rtx insn = CUID_INSN (cuid);
2983 rtx pat = PATTERN (insn);
7506f491 2984
c4c81601
RK
2985 if (GET_CODE (insn) == CALL_INSN)
2986 {
2987 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
4e2db584 2988 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
e0082a72 2989 handle_rd_kill_set (insn, regno, bb);
c4c81601 2990 }
7506f491 2991
c4c81601
RK
2992 if (GET_CODE (pat) == PARALLEL)
2993 {
2994 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7506f491 2995 {
c4c81601 2996 enum rtx_code code = GET_CODE (XVECEXP (pat, 0, i));
7506f491 2997
c4c81601
RK
2998 if ((code == SET || code == CLOBBER)
2999 && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == REG)
3000 handle_rd_kill_set (insn,
3001 REGNO (XEXP (XVECEXP (pat, 0, i), 0)),
e0082a72 3002 bb);
ac7c5af5 3003 }
ac7c5af5 3004 }
c4c81601
RK
3005 else if (GET_CODE (pat) == SET && GET_CODE (SET_DEST (pat)) == REG)
3006 /* Each setting of this register outside of this block
3007 must be marked in the set of kills in this block. */
e0082a72 3008 handle_rd_kill_set (insn, REGNO (SET_DEST (pat)), bb);
7506f491 3009 }
7506f491
DE
3010}
3011
589005ff 3012/* Compute the reaching definitions as in
7506f491
DE
3013 Compilers Principles, Techniques, and Tools. Aho, Sethi, Ullman,
3014 Chapter 10. It is the same algorithm as used for computing available
3015 expressions but applied to the gens and kills of reaching definitions. */
3016
3017static void
3018compute_rd ()
3019{
e0082a72
ZD
3020 int changed, passes;
3021 basic_block bb;
7506f491 3022
e0082a72
ZD
3023 FOR_EACH_BB (bb)
3024 sbitmap_copy (rd_out[bb->index] /*dst*/, rd_gen[bb->index] /*src*/);
7506f491
DE
3025
3026 passes = 0;
3027 changed = 1;
3028 while (changed)
3029 {
3030 changed = 0;
e0082a72 3031 FOR_EACH_BB (bb)
ac7c5af5 3032 {
e0082a72
ZD
3033 sbitmap_union_of_preds (reaching_defs[bb->index], rd_out, bb->index);
3034 changed |= sbitmap_union_of_diff_cg (rd_out[bb->index], rd_gen[bb->index],
3035 reaching_defs[bb->index], rd_kill[bb->index]);
ac7c5af5 3036 }
7506f491
DE
3037 passes++;
3038 }
3039
3040 if (gcse_file)
3041 fprintf (gcse_file, "reaching def computation: %d passes\n", passes);
3042}
3043\f
3044/* Classic GCSE available expression support. */
3045
3046/* Allocate memory for available expression computation. */
3047
3048static void
3049alloc_avail_expr_mem (n_blocks, n_exprs)
3050 int n_blocks, n_exprs;
3051{
3052 ae_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3053 sbitmap_vector_zero (ae_kill, n_blocks);
7506f491
DE
3054
3055 ae_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3056 sbitmap_vector_zero (ae_gen, n_blocks);
7506f491
DE
3057
3058 ae_in = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3059 sbitmap_vector_zero (ae_in, n_blocks);
7506f491
DE
3060
3061 ae_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
d55bc081 3062 sbitmap_vector_zero (ae_out, n_blocks);
7506f491
DE
3063}
3064
3065static void
3066free_avail_expr_mem ()
3067{
5a660bff
DB
3068 sbitmap_vector_free (ae_kill);
3069 sbitmap_vector_free (ae_gen);
3070 sbitmap_vector_free (ae_in);
3071 sbitmap_vector_free (ae_out);
7506f491
DE
3072}
3073
3074/* Compute the set of available expressions generated in each basic block. */
3075
3076static void
02280659
ZD
3077compute_ae_gen (expr_hash_table)
3078 struct hash_table *expr_hash_table;
7506f491 3079{
2e653e39 3080 unsigned int i;
c4c81601
RK
3081 struct expr *expr;
3082 struct occr *occr;
7506f491
DE
3083
3084 /* For each recorded occurrence of each expression, set ae_gen[bb][expr].
3085 This is all we have to do because an expression is not recorded if it
3086 is not available, and the only expressions we want to work with are the
3087 ones that are recorded. */
02280659
ZD
3088 for (i = 0; i < expr_hash_table->size; i++)
3089 for (expr = expr_hash_table->table[i]; expr != 0; expr = expr->next_same_hash)
c4c81601
RK
3090 for (occr = expr->avail_occr; occr != 0; occr = occr->next)
3091 SET_BIT (ae_gen[BLOCK_NUM (occr->insn)], expr->bitmap_index);
7506f491
DE
3092}
3093
cc2902df 3094/* Return nonzero if expression X is killed in BB. */
7506f491
DE
3095
3096static int
3097expr_killed_p (x, bb)
3098 rtx x;
e2d2ed72 3099 basic_block bb;
7506f491 3100{
c4c81601 3101 int i, j;
7506f491 3102 enum rtx_code code;
6f7d635c 3103 const char *fmt;
7506f491 3104
7506f491
DE
3105 if (x == 0)
3106 return 1;
3107
3108 code = GET_CODE (x);
3109 switch (code)
3110 {
3111 case REG:
0b17ab2f 3112 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
7506f491
DE
3113
3114 case MEM:
a13d4ebf
AM
3115 if (load_killed_in_block_p (bb, get_max_uid () + 1, x, 0))
3116 return 1;
c4c81601
RK
3117 else
3118 return expr_killed_p (XEXP (x, 0), bb);
7506f491
DE
3119
3120 case PC:
3121 case CC0: /*FIXME*/
3122 case CONST:
3123 case CONST_INT:
3124 case CONST_DOUBLE:
69ef87e2 3125 case CONST_VECTOR:
7506f491
DE
3126 case SYMBOL_REF:
3127 case LABEL_REF:
3128 case ADDR_VEC:
3129 case ADDR_DIFF_VEC:
3130 return 0;
3131
3132 default:
3133 break;
3134 }
3135
c4c81601 3136 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3137 {
3138 if (fmt[i] == 'e')
3139 {
7506f491
DE
3140 /* If we are about to do the last recursive call
3141 needed at this level, change it into iteration.
3142 This function is called enough to be worth it. */
3143 if (i == 0)
c4c81601
RK
3144 return expr_killed_p (XEXP (x, i), bb);
3145 else if (expr_killed_p (XEXP (x, i), bb))
7506f491
DE
3146 return 1;
3147 }
3148 else if (fmt[i] == 'E')
c4c81601
RK
3149 for (j = 0; j < XVECLEN (x, i); j++)
3150 if (expr_killed_p (XVECEXP (x, i, j), bb))
3151 return 1;
7506f491
DE
3152 }
3153
3154 return 0;
3155}
3156
3157/* Compute the set of available expressions killed in each basic block. */
3158
3159static void
02280659 3160compute_ae_kill (ae_gen, ae_kill, expr_hash_table)
a42cd965 3161 sbitmap *ae_gen, *ae_kill;
02280659 3162 struct hash_table *expr_hash_table;
7506f491 3163{
e0082a72 3164 basic_block bb;
2e653e39 3165 unsigned int i;
c4c81601 3166 struct expr *expr;
7506f491 3167
e0082a72 3168 FOR_EACH_BB (bb)
02280659
ZD
3169 for (i = 0; i < expr_hash_table->size; i++)
3170 for (expr = expr_hash_table->table[i]; expr; expr = expr->next_same_hash)
7506f491 3171 {
c4c81601 3172 /* Skip EXPR if generated in this block. */
e0082a72 3173 if (TEST_BIT (ae_gen[bb->index], expr->bitmap_index))
c4c81601 3174 continue;
7506f491 3175
e0082a72
ZD
3176 if (expr_killed_p (expr->expr, bb))
3177 SET_BIT (ae_kill[bb->index], expr->bitmap_index);
7506f491 3178 }
7506f491 3179}
7506f491
DE
3180\f
3181/* Actually perform the Classic GCSE optimizations. */
3182
cc2902df 3183/* Return nonzero if occurrence OCCR of expression EXPR reaches block BB.
7506f491 3184
cc2902df 3185 CHECK_SELF_LOOP is nonzero if we should consider a block reaching itself
7506f491
DE
3186 as a positive reach. We want to do this when there are two computations
3187 of the expression in the block.
3188
3189 VISITED is a pointer to a working buffer for tracking which BB's have
3190 been visited. It is NULL for the top-level call.
3191
3192 We treat reaching expressions that go through blocks containing the same
3193 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3194 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3195 2 as not reaching. The intent is to improve the probability of finding
3196 only one reaching expression and to reduce register lifetimes by picking
3197 the closest such expression. */
3198
3199static int
283a2545 3200expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited)
7506f491
DE
3201 struct occr *occr;
3202 struct expr *expr;
e2d2ed72 3203 basic_block bb;
7506f491
DE
3204 int check_self_loop;
3205 char *visited;
3206{
36349f8b 3207 edge pred;
7506f491 3208
e2d2ed72 3209 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7506f491 3210 {
e2d2ed72 3211 basic_block pred_bb = pred->src;
7506f491 3212
0b17ab2f 3213 if (visited[pred_bb->index])
c4c81601 3214 /* This predecessor has already been visited. Nothing to do. */
7506f491 3215 ;
7506f491 3216 else if (pred_bb == bb)
ac7c5af5 3217 {
7506f491
DE
3218 /* BB loops on itself. */
3219 if (check_self_loop
0b17ab2f
RH
3220 && TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index)
3221 && BLOCK_NUM (occr->insn) == pred_bb->index)
7506f491 3222 return 1;
c4c81601 3223
0b17ab2f 3224 visited[pred_bb->index] = 1;
ac7c5af5 3225 }
c4c81601 3226
7506f491 3227 /* Ignore this predecessor if it kills the expression. */
0b17ab2f
RH
3228 else if (TEST_BIT (ae_kill[pred_bb->index], expr->bitmap_index))
3229 visited[pred_bb->index] = 1;
c4c81601 3230
7506f491 3231 /* Does this predecessor generate this expression? */
0b17ab2f 3232 else if (TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index))
7506f491
DE
3233 {
3234 /* Is this the occurrence we're looking for?
3235 Note that there's only one generating occurrence per block
3236 so we just need to check the block number. */
0b17ab2f 3237 if (BLOCK_NUM (occr->insn) == pred_bb->index)
7506f491 3238 return 1;
c4c81601 3239
0b17ab2f 3240 visited[pred_bb->index] = 1;
7506f491 3241 }
c4c81601 3242
7506f491
DE
3243 /* Neither gen nor kill. */
3244 else
ac7c5af5 3245 {
0b17ab2f 3246 visited[pred_bb->index] = 1;
589005ff 3247 if (expr_reaches_here_p_work (occr, expr, pred_bb, check_self_loop,
283a2545 3248 visited))
c4c81601 3249
7506f491 3250 return 1;
ac7c5af5 3251 }
7506f491
DE
3252 }
3253
3254 /* All paths have been checked. */
3255 return 0;
3256}
3257
283a2545 3258/* This wrapper for expr_reaches_here_p_work() is to ensure that any
dc297297 3259 memory allocated for that function is returned. */
283a2545
RL
3260
3261static int
3262expr_reaches_here_p (occr, expr, bb, check_self_loop)
3263 struct occr *occr;
3264 struct expr *expr;
e2d2ed72 3265 basic_block bb;
283a2545
RL
3266 int check_self_loop;
3267{
3268 int rval;
d55bc081 3269 char *visited = (char *) xcalloc (last_basic_block, 1);
283a2545 3270
c4c81601 3271 rval = expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited);
589005ff 3272
283a2545 3273 free (visited);
c4c81601 3274 return rval;
283a2545
RL
3275}
3276
7506f491
DE
3277/* Return the instruction that computes EXPR that reaches INSN's basic block.
3278 If there is more than one such instruction, return NULL.
3279
3280 Called only by handle_avail_expr. */
3281
3282static rtx
3283computing_insn (expr, insn)
3284 struct expr *expr;
3285 rtx insn;
3286{
e2d2ed72 3287 basic_block bb = BLOCK_FOR_INSN (insn);
7506f491
DE
3288
3289 if (expr->avail_occr->next == NULL)
589005ff 3290 {
e2d2ed72 3291 if (BLOCK_FOR_INSN (expr->avail_occr->insn) == bb)
c4c81601
RK
3292 /* The available expression is actually itself
3293 (i.e. a loop in the flow graph) so do nothing. */
3294 return NULL;
3295
7506f491
DE
3296 /* (FIXME) Case that we found a pattern that was created by
3297 a substitution that took place. */
3298 return expr->avail_occr->insn;
3299 }
3300 else
3301 {
3302 /* Pattern is computed more than once.
589005ff 3303 Search backwards from this insn to see how many of these
7506f491
DE
3304 computations actually reach this insn. */
3305 struct occr *occr;
3306 rtx insn_computes_expr = NULL;
3307 int can_reach = 0;
3308
3309 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
3310 {
e2d2ed72 3311 if (BLOCK_FOR_INSN (occr->insn) == bb)
7506f491
DE
3312 {
3313 /* The expression is generated in this block.
3314 The only time we care about this is when the expression
3315 is generated later in the block [and thus there's a loop].
3316 We let the normal cse pass handle the other cases. */
c4c81601
RK
3317 if (INSN_CUID (insn) < INSN_CUID (occr->insn)
3318 && expr_reaches_here_p (occr, expr, bb, 1))
7506f491
DE
3319 {
3320 can_reach++;
3321 if (can_reach > 1)
3322 return NULL;
c4c81601 3323
7506f491
DE
3324 insn_computes_expr = occr->insn;
3325 }
3326 }
c4c81601
RK
3327 else if (expr_reaches_here_p (occr, expr, bb, 0))
3328 {
3329 can_reach++;
3330 if (can_reach > 1)
3331 return NULL;
3332
3333 insn_computes_expr = occr->insn;
3334 }
7506f491
DE
3335 }
3336
3337 if (insn_computes_expr == NULL)
3338 abort ();
c4c81601 3339
7506f491
DE
3340 return insn_computes_expr;
3341 }
3342}
3343
cc2902df 3344/* Return nonzero if the definition in DEF_INSN can reach INSN.
7506f491
DE
3345 Only called by can_disregard_other_sets. */
3346
3347static int
3348def_reaches_here_p (insn, def_insn)
3349 rtx insn, def_insn;
3350{
3351 rtx reg;
3352
3353 if (TEST_BIT (reaching_defs[BLOCK_NUM (insn)], INSN_CUID (def_insn)))
3354 return 1;
3355
3356 if (BLOCK_NUM (insn) == BLOCK_NUM (def_insn))
3357 {
3358 if (INSN_CUID (def_insn) < INSN_CUID (insn))
ac7c5af5 3359 {
7506f491
DE
3360 if (GET_CODE (PATTERN (def_insn)) == PARALLEL)
3361 return 1;
c4c81601 3362 else if (GET_CODE (PATTERN (def_insn)) == CLOBBER)
7506f491
DE
3363 reg = XEXP (PATTERN (def_insn), 0);
3364 else if (GET_CODE (PATTERN (def_insn)) == SET)
3365 reg = SET_DEST (PATTERN (def_insn));
3366 else
3367 abort ();
c4c81601 3368
7506f491
DE
3369 return ! reg_set_between_p (reg, NEXT_INSN (def_insn), insn);
3370 }
3371 else
3372 return 0;
3373 }
3374
3375 return 0;
3376}
3377
cc2902df 3378/* Return nonzero if *ADDR_THIS_REG can only have one value at INSN. The
c4c81601
RK
3379 value returned is the number of definitions that reach INSN. Returning a
3380 value of zero means that [maybe] more than one definition reaches INSN and
3381 the caller can't perform whatever optimization it is trying. i.e. it is
3382 always safe to return zero. */
7506f491
DE
3383
3384static int
3385can_disregard_other_sets (addr_this_reg, insn, for_combine)
3386 struct reg_set **addr_this_reg;
3387 rtx insn;
3388 int for_combine;
3389{
3390 int number_of_reaching_defs = 0;
c4c81601 3391 struct reg_set *this_reg;
7506f491 3392
c4c81601
RK
3393 for (this_reg = *addr_this_reg; this_reg != 0; this_reg = this_reg->next)
3394 if (def_reaches_here_p (insn, this_reg->insn))
3395 {
3396 number_of_reaching_defs++;
3397 /* Ignore parallels for now. */
3398 if (GET_CODE (PATTERN (this_reg->insn)) == PARALLEL)
3399 return 0;
3400
3401 if (!for_combine
3402 && (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER
3403 || ! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3404 SET_SRC (PATTERN (insn)))))
3405 /* A setting of the reg to a different value reaches INSN. */
3406 return 0;
3407
3408 if (number_of_reaching_defs > 1)
3409 {
3410 /* If in this setting the value the register is being set to is
3411 equal to the previous value the register was set to and this
3412 setting reaches the insn we are trying to do the substitution
3413 on then we are ok. */
3414 if (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER)
7506f491 3415 return 0;
c4c81601
RK
3416 else if (! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3417 SET_SRC (PATTERN (insn))))
3418 return 0;
3419 }
7506f491 3420
589005ff 3421 *addr_this_reg = this_reg;
c4c81601 3422 }
7506f491
DE
3423
3424 return number_of_reaching_defs;
3425}
3426
3427/* Expression computed by insn is available and the substitution is legal,
3428 so try to perform the substitution.
3429
cc2902df 3430 The result is nonzero if any changes were made. */
7506f491
DE
3431
3432static int
3433handle_avail_expr (insn, expr)
3434 rtx insn;
3435 struct expr *expr;
3436{
0631e0bf 3437 rtx pat, insn_computes_expr, expr_set;
7506f491
DE
3438 rtx to;
3439 struct reg_set *this_reg;
3440 int found_setting, use_src;
3441 int changed = 0;
3442
3443 /* We only handle the case where one computation of the expression
3444 reaches this instruction. */
3445 insn_computes_expr = computing_insn (expr, insn);
3446 if (insn_computes_expr == NULL)
3447 return 0;
0631e0bf
JH
3448 expr_set = single_set (insn_computes_expr);
3449 if (!expr_set)
3450 abort ();
7506f491
DE
3451
3452 found_setting = 0;
3453 use_src = 0;
3454
3455 /* At this point we know only one computation of EXPR outside of this
3456 block reaches this insn. Now try to find a register that the
3457 expression is computed into. */
0631e0bf 3458 if (GET_CODE (SET_SRC (expr_set)) == REG)
7506f491
DE
3459 {
3460 /* This is the case when the available expression that reaches
3461 here has already been handled as an available expression. */
770ae6cc 3462 unsigned int regnum_for_replacing
0631e0bf 3463 = REGNO (SET_SRC (expr_set));
c4c81601 3464
7506f491
DE
3465 /* If the register was created by GCSE we can't use `reg_set_table',
3466 however we know it's set only once. */
3467 if (regnum_for_replacing >= max_gcse_regno
3468 /* If the register the expression is computed into is set only once,
3469 or only one set reaches this insn, we can use it. */
3470 || (((this_reg = reg_set_table[regnum_for_replacing]),
3471 this_reg->next == NULL)
3472 || can_disregard_other_sets (&this_reg, insn, 0)))
8e42ace1
KH
3473 {
3474 use_src = 1;
3475 found_setting = 1;
3476 }
7506f491
DE
3477 }
3478
3479 if (!found_setting)
3480 {
770ae6cc 3481 unsigned int regnum_for_replacing
0631e0bf 3482 = REGNO (SET_DEST (expr_set));
c4c81601 3483
7506f491
DE
3484 /* This shouldn't happen. */
3485 if (regnum_for_replacing >= max_gcse_regno)
3486 abort ();
c4c81601 3487
7506f491 3488 this_reg = reg_set_table[regnum_for_replacing];
c4c81601 3489
7506f491
DE
3490 /* If the register the expression is computed into is set only once,
3491 or only one set reaches this insn, use it. */
3492 if (this_reg->next == NULL
3493 || can_disregard_other_sets (&this_reg, insn, 0))
3494 found_setting = 1;
3495 }
3496
3497 if (found_setting)
3498 {
3499 pat = PATTERN (insn);
3500 if (use_src)
0631e0bf 3501 to = SET_SRC (expr_set);
7506f491 3502 else
0631e0bf 3503 to = SET_DEST (expr_set);
7506f491
DE
3504 changed = validate_change (insn, &SET_SRC (pat), to, 0);
3505
3506 /* We should be able to ignore the return code from validate_change but
3507 to play it safe we check. */
3508 if (changed)
3509 {
3510 gcse_subst_count++;
3511 if (gcse_file != NULL)
3512 {
c4c81601
RK
3513 fprintf (gcse_file, "GCSE: Replacing the source in insn %d with",
3514 INSN_UID (insn));
3515 fprintf (gcse_file, " reg %d %s insn %d\n",
3516 REGNO (to), use_src ? "from" : "set in",
7506f491
DE
3517 INSN_UID (insn_computes_expr));
3518 }
7506f491
DE
3519 }
3520 }
c4c81601 3521
7506f491
DE
3522 /* The register that the expr is computed into is set more than once. */
3523 else if (1 /*expensive_op(this_pattrn->op) && do_expensive_gcse)*/)
3524 {
3525 /* Insert an insn after insnx that copies the reg set in insnx
3526 into a new pseudo register call this new register REGN.
3527 From insnb until end of basic block or until REGB is set
3528 replace all uses of REGB with REGN. */
3529 rtx new_insn;
3530
0631e0bf 3531 to = gen_reg_rtx (GET_MODE (SET_DEST (expr_set)));
7506f491
DE
3532
3533 /* Generate the new insn. */
3534 /* ??? If the change fails, we return 0, even though we created
3535 an insn. I think this is ok. */
9e6a5703
JC
3536 new_insn
3537 = emit_insn_after (gen_rtx_SET (VOIDmode, to,
0631e0bf 3538 SET_DEST (expr_set)),
c4c81601
RK
3539 insn_computes_expr);
3540
7506f491
DE
3541 /* Keep register set table up to date. */
3542 record_one_set (REGNO (to), new_insn);
3543
3544 gcse_create_count++;
3545 if (gcse_file != NULL)
ac7c5af5 3546 {
c4c81601 3547 fprintf (gcse_file, "GCSE: Creating insn %d to copy value of reg %d",
7506f491 3548 INSN_UID (NEXT_INSN (insn_computes_expr)),
c4c81601
RK
3549 REGNO (SET_SRC (PATTERN (NEXT_INSN (insn_computes_expr)))));
3550 fprintf (gcse_file, ", computed in insn %d,\n",
7506f491 3551 INSN_UID (insn_computes_expr));
c4c81601
RK
3552 fprintf (gcse_file, " into newly allocated reg %d\n",
3553 REGNO (to));
ac7c5af5 3554 }
7506f491
DE
3555
3556 pat = PATTERN (insn);
3557
3558 /* Do register replacement for INSN. */
3559 changed = validate_change (insn, &SET_SRC (pat),
c4c81601
RK
3560 SET_DEST (PATTERN
3561 (NEXT_INSN (insn_computes_expr))),
7506f491
DE
3562 0);
3563
3564 /* We should be able to ignore the return code from validate_change but
3565 to play it safe we check. */
3566 if (changed)
3567 {
3568 gcse_subst_count++;
3569 if (gcse_file != NULL)
3570 {
c4c81601
RK
3571 fprintf (gcse_file,
3572 "GCSE: Replacing the source in insn %d with reg %d ",
7506f491 3573 INSN_UID (insn),
c4c81601
RK
3574 REGNO (SET_DEST (PATTERN (NEXT_INSN
3575 (insn_computes_expr)))));
3576 fprintf (gcse_file, "set in insn %d\n",
589005ff 3577 INSN_UID (insn_computes_expr));
7506f491 3578 }
7506f491
DE
3579 }
3580 }
3581
3582 return changed;
3583}
3584
c4c81601
RK
3585/* Perform classic GCSE. This is called by one_classic_gcse_pass after all
3586 the dataflow analysis has been done.
7506f491 3587
cc2902df 3588 The result is nonzero if a change was made. */
7506f491
DE
3589
3590static int
3591classic_gcse ()
3592{
e0082a72 3593 int changed;
7506f491 3594 rtx insn;
e0082a72 3595 basic_block bb;
7506f491
DE
3596
3597 /* Note we start at block 1. */
3598
e0082a72
ZD
3599 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
3600 return 0;
3601
7506f491 3602 changed = 0;
e0082a72 3603 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
7506f491
DE
3604 {
3605 /* Reset tables used to keep track of what's still valid [since the
3606 start of the block]. */
3607 reset_opr_set_tables ();
3608
e0082a72
ZD
3609 for (insn = bb->head;
3610 insn != NULL && insn != NEXT_INSN (bb->end);
7506f491
DE
3611 insn = NEXT_INSN (insn))
3612 {
3613 /* Is insn of form (set (pseudo-reg) ...)? */
7506f491
DE
3614 if (GET_CODE (insn) == INSN
3615 && GET_CODE (PATTERN (insn)) == SET
3616 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
3617 && REGNO (SET_DEST (PATTERN (insn))) >= FIRST_PSEUDO_REGISTER)
3618 {
3619 rtx pat = PATTERN (insn);
3620 rtx src = SET_SRC (pat);
3621 struct expr *expr;
3622
3623 if (want_to_gcse_p (src)
3624 /* Is the expression recorded? */
02280659 3625 && ((expr = lookup_expr (src, &expr_hash_table)) != NULL)
7506f491
DE
3626 /* Is the expression available [at the start of the
3627 block]? */
e0082a72 3628 && TEST_BIT (ae_in[bb->index], expr->bitmap_index)
7506f491
DE
3629 /* Are the operands unchanged since the start of the
3630 block? */
3631 && oprs_not_set_p (src, insn))
3632 changed |= handle_avail_expr (insn, expr);
3633 }
3634
3635 /* Keep track of everything modified by this insn. */
3636 /* ??? Need to be careful w.r.t. mods done to INSN. */
2c3c49de 3637 if (INSN_P (insn))
7506f491 3638 mark_oprs_set (insn);
ac7c5af5 3639 }
7506f491
DE
3640 }
3641
3642 return changed;
3643}
3644
3645/* Top level routine to perform one classic GCSE pass.
3646
cc2902df 3647 Return nonzero if a change was made. */
7506f491
DE
3648
3649static int
b5ce41ff 3650one_classic_gcse_pass (pass)
7506f491
DE
3651 int pass;
3652{
3653 int changed = 0;
3654
3655 gcse_subst_count = 0;
3656 gcse_create_count = 0;
3657
02280659 3658 alloc_hash_table (max_cuid, &expr_hash_table, 0);
d55bc081 3659 alloc_rd_mem (last_basic_block, max_cuid);
02280659 3660 compute_hash_table (&expr_hash_table);
7506f491 3661 if (gcse_file)
02280659 3662 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
c4c81601 3663
02280659 3664 if (expr_hash_table.n_elems > 0)
7506f491
DE
3665 {
3666 compute_kill_rd ();
3667 compute_rd ();
02280659
ZD
3668 alloc_avail_expr_mem (last_basic_block, expr_hash_table.n_elems);
3669 compute_ae_gen (&expr_hash_table);
3670 compute_ae_kill (ae_gen, ae_kill, &expr_hash_table);
bd0eaec2 3671 compute_available (ae_gen, ae_kill, ae_out, ae_in);
7506f491
DE
3672 changed = classic_gcse ();
3673 free_avail_expr_mem ();
3674 }
c4c81601 3675
7506f491 3676 free_rd_mem ();
02280659 3677 free_hash_table (&expr_hash_table);
7506f491
DE
3678
3679 if (gcse_file)
3680 {
3681 fprintf (gcse_file, "\n");
c4c81601
RK
3682 fprintf (gcse_file, "GCSE of %s, pass %d: %d bytes needed, %d substs,",
3683 current_function_name, pass, bytes_used, gcse_subst_count);
3684 fprintf (gcse_file, "%d insns created\n", gcse_create_count);
7506f491
DE
3685 }
3686
3687 return changed;
3688}
3689\f
3690/* Compute copy/constant propagation working variables. */
3691
3692/* Local properties of assignments. */
7506f491
DE
3693static sbitmap *cprop_pavloc;
3694static sbitmap *cprop_absaltered;
3695
3696/* Global properties of assignments (computed from the local properties). */
7506f491
DE
3697static sbitmap *cprop_avin;
3698static sbitmap *cprop_avout;
3699
c4c81601
RK
3700/* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
3701 basic blocks. N_SETS is the number of sets. */
7506f491
DE
3702
3703static void
3704alloc_cprop_mem (n_blocks, n_sets)
3705 int n_blocks, n_sets;
3706{
3707 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
3708 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
3709
3710 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
3711 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
3712}
3713
3714/* Free vars used by copy/const propagation. */
3715
3716static void
3717free_cprop_mem ()
3718{
5a660bff
DB
3719 sbitmap_vector_free (cprop_pavloc);
3720 sbitmap_vector_free (cprop_absaltered);
3721 sbitmap_vector_free (cprop_avin);
3722 sbitmap_vector_free (cprop_avout);
7506f491
DE
3723}
3724
c4c81601
RK
3725/* For each block, compute whether X is transparent. X is either an
3726 expression or an assignment [though we don't care which, for this context
3727 an assignment is treated as an expression]. For each block where an
3728 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
3729 bit in BMAP. */
7506f491
DE
3730
3731static void
3732compute_transp (x, indx, bmap, set_p)
3733 rtx x;
3734 int indx;
3735 sbitmap *bmap;
3736 int set_p;
3737{
e0082a72
ZD
3738 int i, j;
3739 basic_block bb;
7506f491 3740 enum rtx_code code;
c4c81601 3741 reg_set *r;
6f7d635c 3742 const char *fmt;
7506f491 3743
c4c81601
RK
3744 /* repeat is used to turn tail-recursion into iteration since GCC
3745 can't do it when there's no return value. */
7506f491
DE
3746 repeat:
3747
3748 if (x == 0)
3749 return;
3750
3751 code = GET_CODE (x);
3752 switch (code)
3753 {
3754 case REG:
c4c81601
RK
3755 if (set_p)
3756 {
3757 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3758 {
e0082a72
ZD
3759 FOR_EACH_BB (bb)
3760 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
3761 SET_BIT (bmap[bb->index], indx);
c4c81601
RK
3762 }
3763 else
3764 {
3765 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3766 SET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3767 }
3768 }
3769 else
3770 {
3771 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3772 {
e0082a72
ZD
3773 FOR_EACH_BB (bb)
3774 if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x)))
3775 RESET_BIT (bmap[bb->index], indx);
c4c81601
RK
3776 }
3777 else
3778 {
3779 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3780 RESET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3781 }
3782 }
7506f491 3783
c4c81601 3784 return;
7506f491
DE
3785
3786 case MEM:
e0082a72 3787 FOR_EACH_BB (bb)
a13d4ebf 3788 {
e0082a72 3789 rtx list_entry = canon_modify_mem_list[bb->index];
a13d4ebf
AM
3790
3791 while (list_entry)
3792 {
3793 rtx dest, dest_addr;
3794
3795 if (GET_CODE (XEXP (list_entry, 0)) == CALL_INSN)
3796 {
3797 if (set_p)
e0082a72 3798 SET_BIT (bmap[bb->index], indx);
a13d4ebf 3799 else
e0082a72 3800 RESET_BIT (bmap[bb->index], indx);
a13d4ebf
AM
3801 break;
3802 }
3803 /* LIST_ENTRY must be an INSN of some kind that sets memory.
3804 Examine each hunk of memory that is modified. */
3805
3806 dest = XEXP (list_entry, 0);
3807 list_entry = XEXP (list_entry, 1);
3808 dest_addr = XEXP (list_entry, 0);
589005ff 3809
a13d4ebf
AM
3810 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
3811 x, rtx_addr_varies_p))
3812 {
3813 if (set_p)
e0082a72 3814 SET_BIT (bmap[bb->index], indx);
a13d4ebf 3815 else
e0082a72 3816 RESET_BIT (bmap[bb->index], indx);
a13d4ebf
AM
3817 break;
3818 }
3819 list_entry = XEXP (list_entry, 1);
3820 }
3821 }
c4c81601 3822
7506f491
DE
3823 x = XEXP (x, 0);
3824 goto repeat;
3825
3826 case PC:
3827 case CC0: /*FIXME*/
3828 case CONST:
3829 case CONST_INT:
3830 case CONST_DOUBLE:
69ef87e2 3831 case CONST_VECTOR:
7506f491
DE
3832 case SYMBOL_REF:
3833 case LABEL_REF:
3834 case ADDR_VEC:
3835 case ADDR_DIFF_VEC:
3836 return;
3837
3838 default:
3839 break;
3840 }
3841
c4c81601 3842 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3843 {
3844 if (fmt[i] == 'e')
3845 {
7506f491
DE
3846 /* If we are about to do the last recursive call
3847 needed at this level, change it into iteration.
3848 This function is called enough to be worth it. */
3849 if (i == 0)
3850 {
c4c81601 3851 x = XEXP (x, i);
7506f491
DE
3852 goto repeat;
3853 }
c4c81601
RK
3854
3855 compute_transp (XEXP (x, i), indx, bmap, set_p);
7506f491
DE
3856 }
3857 else if (fmt[i] == 'E')
c4c81601
RK
3858 for (j = 0; j < XVECLEN (x, i); j++)
3859 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
7506f491
DE
3860 }
3861}
3862
7506f491
DE
3863/* Top level routine to do the dataflow analysis needed by copy/const
3864 propagation. */
3865
3866static void
3867compute_cprop_data ()
3868{
02280659 3869 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table);
ce724250
JL
3870 compute_available (cprop_pavloc, cprop_absaltered,
3871 cprop_avout, cprop_avin);
7506f491
DE
3872}
3873\f
3874/* Copy/constant propagation. */
3875
7506f491
DE
3876/* Maximum number of register uses in an insn that we handle. */
3877#define MAX_USES 8
3878
3879/* Table of uses found in an insn.
3880 Allocated statically to avoid alloc/free complexity and overhead. */
3881static struct reg_use reg_use_table[MAX_USES];
3882
3883/* Index into `reg_use_table' while building it. */
3884static int reg_use_count;
3885
c4c81601
RK
3886/* Set up a list of register numbers used in INSN. The found uses are stored
3887 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
3888 and contains the number of uses in the table upon exit.
7506f491 3889
c4c81601
RK
3890 ??? If a register appears multiple times we will record it multiple times.
3891 This doesn't hurt anything but it will slow things down. */
7506f491
DE
3892
3893static void
9e71c818
JH
3894find_used_regs (xptr, data)
3895 rtx *xptr;
3896 void *data ATTRIBUTE_UNUSED;
7506f491 3897{
c4c81601 3898 int i, j;
7506f491 3899 enum rtx_code code;
6f7d635c 3900 const char *fmt;
9e71c818 3901 rtx x = *xptr;
7506f491 3902
c4c81601
RK
3903 /* repeat is used to turn tail-recursion into iteration since GCC
3904 can't do it when there's no return value. */
7506f491 3905 repeat:
7506f491
DE
3906 if (x == 0)
3907 return;
3908
3909 code = GET_CODE (x);
9e71c818 3910 if (REG_P (x))
7506f491 3911 {
7506f491
DE
3912 if (reg_use_count == MAX_USES)
3913 return;
c4c81601 3914
7506f491
DE
3915 reg_use_table[reg_use_count].reg_rtx = x;
3916 reg_use_count++;
7506f491
DE
3917 }
3918
3919 /* Recursively scan the operands of this expression. */
3920
c4c81601 3921 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
7506f491
DE
3922 {
3923 if (fmt[i] == 'e')
3924 {
3925 /* If we are about to do the last recursive call
3926 needed at this level, change it into iteration.
3927 This function is called enough to be worth it. */
3928 if (i == 0)
3929 {
3930 x = XEXP (x, 0);
3931 goto repeat;
3932 }
c4c81601 3933
9e71c818 3934 find_used_regs (&XEXP (x, i), data);
7506f491
DE
3935 }
3936 else if (fmt[i] == 'E')
c4c81601 3937 for (j = 0; j < XVECLEN (x, i); j++)
9e71c818 3938 find_used_regs (&XVECEXP (x, i, j), data);
7506f491
DE
3939 }
3940}
3941
3942/* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
cc2902df 3943 Returns nonzero is successful. */
7506f491
DE
3944
3945static int
3946try_replace_reg (from, to, insn)
3947 rtx from, to, insn;
3948{
172890a2 3949 rtx note = find_reg_equal_equiv_note (insn);
fb0c0a12 3950 rtx src = 0;
172890a2
RK
3951 int success = 0;
3952 rtx set = single_set (insn);
833fc3ad 3953
2b773ee2
JH
3954 validate_replace_src_group (from, to, insn);
3955 if (num_changes_pending () && apply_change_group ())
3956 success = 1;
9e71c818 3957
f305679f 3958 if (!success && set && reg_mentioned_p (from, SET_SRC (set)))
833fc3ad 3959 {
f305679f
JH
3960 /* If above failed and this is a single set, try to simplify the source of
3961 the set given our substitution. We could perhaps try this for multiple
3962 SETs, but it probably won't buy us anything. */
172890a2
RK
3963 src = simplify_replace_rtx (SET_SRC (set), from, to);
3964
9e71c818
JH
3965 if (!rtx_equal_p (src, SET_SRC (set))
3966 && validate_change (insn, &SET_SRC (set), src, 0))
172890a2 3967 success = 1;
833fc3ad 3968
f305679f
JH
3969 /* If we've failed to do replacement, have a single SET, and don't already
3970 have a note, add a REG_EQUAL note to not lose information. */
3971 if (!success && note == 0 && set != 0)
3972 note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
3973 }
e251e2a2 3974
172890a2
RK
3975 /* If there is already a NOTE, update the expression in it with our
3976 replacement. */
3977 else if (note != 0)
3978 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to);
833fc3ad 3979
172890a2
RK
3980 /* REG_EQUAL may get simplified into register.
3981 We don't allow that. Remove that note. This code ought
fbe5a4a6 3982 not to happen, because previous code ought to synthesize
172890a2
RK
3983 reg-reg move, but be on the safe side. */
3984 if (note && REG_P (XEXP (note, 0)))
3985 remove_note (insn, note);
833fc3ad 3986
833fc3ad
JH
3987 return success;
3988}
c4c81601
RK
3989
3990/* Find a set of REGNOs that are available on entry to INSN's block. Returns
3991 NULL no such set is found. */
7506f491
DE
3992
3993static struct expr *
3994find_avail_set (regno, insn)
3995 int regno;
3996 rtx insn;
3997{
cafba495
BS
3998 /* SET1 contains the last set found that can be returned to the caller for
3999 use in a substitution. */
4000 struct expr *set1 = 0;
589005ff 4001
cafba495
BS
4002 /* Loops are not possible here. To get a loop we would need two sets
4003 available at the start of the block containing INSN. ie we would
4004 need two sets like this available at the start of the block:
4005
4006 (set (reg X) (reg Y))
4007 (set (reg Y) (reg X))
4008
4009 This can not happen since the set of (reg Y) would have killed the
4010 set of (reg X) making it unavailable at the start of this block. */
4011 while (1)
8e42ace1 4012 {
cafba495 4013 rtx src;
ceda50e9 4014 struct expr *set = lookup_set (regno, &set_hash_table);
cafba495
BS
4015
4016 /* Find a set that is available at the start of the block
4017 which contains INSN. */
4018 while (set)
4019 {
4020 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
4021 break;
4022 set = next_set (regno, set);
4023 }
7506f491 4024
cafba495
BS
4025 /* If no available set was found we've reached the end of the
4026 (possibly empty) copy chain. */
4027 if (set == 0)
589005ff 4028 break;
cafba495
BS
4029
4030 if (GET_CODE (set->expr) != SET)
4031 abort ();
4032
4033 src = SET_SRC (set->expr);
4034
4035 /* We know the set is available.
4036 Now check that SRC is ANTLOC (i.e. none of the source operands
589005ff 4037 have changed since the start of the block).
cafba495
BS
4038
4039 If the source operand changed, we may still use it for the next
4040 iteration of this loop, but we may not use it for substitutions. */
c4c81601 4041
6b2d1c9e 4042 if (gcse_constant_p (src) || oprs_not_set_p (src, insn))
cafba495
BS
4043 set1 = set;
4044
4045 /* If the source of the set is anything except a register, then
4046 we have reached the end of the copy chain. */
4047 if (GET_CODE (src) != REG)
7506f491 4048 break;
7506f491 4049
cafba495
BS
4050 /* Follow the copy chain, ie start another iteration of the loop
4051 and see if we have an available copy into SRC. */
4052 regno = REGNO (src);
8e42ace1 4053 }
cafba495
BS
4054
4055 /* SET1 holds the last set that was available and anticipatable at
4056 INSN. */
4057 return set1;
7506f491
DE
4058}
4059
abd535b6 4060/* Subroutine of cprop_insn that tries to propagate constants into
0e3f0221 4061 JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL
fbe5a4a6 4062 it is the instruction that immediately precedes JUMP, and must be a
818b6b7f 4063 single SET of a register. FROM is what we will try to replace,
0e3f0221 4064 SRC is the constant we will try to substitute for it. Returns nonzero
589005ff 4065 if a change was made. */
c4c81601 4066
abd535b6 4067static int
0e3f0221
RS
4068cprop_jump (bb, setcc, jump, from, src)
4069 basic_block bb;
4070 rtx setcc;
4071 rtx jump;
172890a2 4072 rtx from;
abd535b6
BS
4073 rtx src;
4074{
0e3f0221
RS
4075 rtx new, new_set;
4076 rtx set = pc_set (jump);
4077
4078 /* First substitute in the INSN condition as the SET_SRC of the JUMP,
4079 then substitute that given values in this expanded JUMP. */
48ddd46c
JH
4080 if (setcc != NULL
4081 && !modified_between_p (from, setcc, jump)
4082 && !modified_between_p (src, setcc, jump))
b2f02503
RS
4083 {
4084 rtx setcc_set = single_set (setcc);
4085 new_set = simplify_replace_rtx (SET_SRC (set),
4086 SET_DEST (setcc_set),
9e48c409 4087 SET_SRC (setcc_set));
b2f02503 4088 }
0e3f0221
RS
4089 else
4090 new_set = set;
4091
9e48c409 4092 new = simplify_replace_rtx (new_set, from, src);
abd535b6 4093
9e48c409
KH
4094 /* If no simplification can be made, then try the next
4095 register. */
4096 if (rtx_equal_p (new, new_set) || rtx_equal_p (new, SET_SRC (set)))
4097 return 0;
589005ff 4098
7d5ab30e 4099 /* If this is now a no-op delete it, otherwise this must be a valid insn. */
172890a2 4100 if (new == pc_rtx)
0e3f0221 4101 delete_insn (jump);
7d5ab30e 4102 else
abd535b6 4103 {
48ddd46c
JH
4104 /* Ensure the value computed inside the jump insn to be equivalent
4105 to one computed by setcc. */
4106 if (setcc
4107 && modified_in_p (new, setcc))
4108 return 0;
0e3f0221 4109 if (! validate_change (jump, &SET_SRC (set), new, 0))
7d5ab30e 4110 return 0;
abd535b6 4111
7d5ab30e
JH
4112 /* If this has turned into an unconditional jump,
4113 then put a barrier after it so that the unreachable
4114 code will be deleted. */
4115 if (GET_CODE (SET_SRC (set)) == LABEL_REF)
0e3f0221 4116 emit_barrier_after (jump);
7d5ab30e 4117 }
abd535b6 4118
0e3f0221
RS
4119#ifdef HAVE_cc0
4120 /* Delete the cc0 setter. */
818b6b7f 4121 if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc))))
0e3f0221
RS
4122 delete_insn (setcc);
4123#endif
4124
172890a2 4125 run_jump_opt_after_gcse = 1;
c4c81601 4126
172890a2
RK
4127 const_prop_count++;
4128 if (gcse_file != NULL)
4129 {
4130 fprintf (gcse_file,
818b6b7f 4131 "CONST-PROP: Replacing reg %d in jump_insn %d with constant ",
0e3f0221 4132 REGNO (from), INSN_UID (jump));
172890a2
RK
4133 print_rtl (gcse_file, src);
4134 fprintf (gcse_file, "\n");
abd535b6 4135 }
0005550b 4136 purge_dead_edges (bb);
172890a2
RK
4137
4138 return 1;
abd535b6
BS
4139}
4140
ae860ff7
JH
4141static bool
4142constprop_register (insn, from, to, alter_jumps)
4143 rtx insn;
4144 rtx from;
4145 rtx to;
4146 int alter_jumps;
4147{
4148 rtx sset;
4149
4150 /* Check for reg or cc0 setting instructions followed by
4151 conditional branch instructions first. */
4152 if (alter_jumps
4153 && (sset = single_set (insn)) != NULL
244d05fb 4154 && NEXT_INSN (insn)
ae860ff7
JH
4155 && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn)))
4156 {
4157 rtx dest = SET_DEST (sset);
4158 if ((REG_P (dest) || CC0_P (dest))
4159 && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to))
4160 return 1;
4161 }
4162
4163 /* Handle normal insns next. */
4164 if (GET_CODE (insn) == INSN
4165 && try_replace_reg (from, to, insn))
4166 return 1;
4167
4168 /* Try to propagate a CONST_INT into a conditional jump.
4169 We're pretty specific about what we will handle in this
4170 code, we can extend this as necessary over time.
4171
4172 Right now the insn in question must look like
4173 (set (pc) (if_then_else ...)) */
4174 else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn))
4175 return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to);
4176 return 0;
4177}
4178
7506f491 4179/* Perform constant and copy propagation on INSN.
cc2902df 4180 The result is nonzero if a change was made. */
7506f491
DE
4181
4182static int
ae860ff7 4183cprop_insn (insn, alter_jumps)
7506f491 4184 rtx insn;
b5ce41ff 4185 int alter_jumps;
7506f491
DE
4186{
4187 struct reg_use *reg_used;
4188 int changed = 0;
833fc3ad 4189 rtx note;
7506f491 4190
9e71c818 4191 if (!INSN_P (insn))
7506f491
DE
4192 return 0;
4193
4194 reg_use_count = 0;
9e71c818 4195 note_uses (&PATTERN (insn), find_used_regs, NULL);
589005ff 4196
172890a2 4197 note = find_reg_equal_equiv_note (insn);
833fc3ad 4198
dc297297 4199 /* We may win even when propagating constants into notes. */
833fc3ad 4200 if (note)
9e71c818 4201 find_used_regs (&XEXP (note, 0), NULL);
7506f491 4202
c4c81601
RK
4203 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4204 reg_used++, reg_use_count--)
7506f491 4205 {
770ae6cc 4206 unsigned int regno = REGNO (reg_used->reg_rtx);
7506f491
DE
4207 rtx pat, src;
4208 struct expr *set;
7506f491
DE
4209
4210 /* Ignore registers created by GCSE.
dc297297 4211 We do this because ... */
7506f491
DE
4212 if (regno >= max_gcse_regno)
4213 continue;
4214
4215 /* If the register has already been set in this block, there's
4216 nothing we can do. */
4217 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
4218 continue;
4219
4220 /* Find an assignment that sets reg_used and is available
4221 at the start of the block. */
4222 set = find_avail_set (regno, insn);
4223 if (! set)
4224 continue;
589005ff 4225
7506f491
DE
4226 pat = set->expr;
4227 /* ??? We might be able to handle PARALLELs. Later. */
4228 if (GET_CODE (pat) != SET)
4229 abort ();
c4c81601 4230
7506f491
DE
4231 src = SET_SRC (pat);
4232
e78d9500 4233 /* Constant propagation. */
6b2d1c9e 4234 if (gcse_constant_p (src))
7506f491 4235 {
ae860ff7 4236 if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps))
7506f491
DE
4237 {
4238 changed = 1;
4239 const_prop_count++;
4240 if (gcse_file != NULL)
4241 {
ae860ff7
JH
4242 fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
4243 fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn));
e78d9500 4244 print_rtl (gcse_file, src);
7506f491
DE
4245 fprintf (gcse_file, "\n");
4246 }
7506f491
DE
4247 }
4248 }
4249 else if (GET_CODE (src) == REG
4250 && REGNO (src) >= FIRST_PSEUDO_REGISTER
4251 && REGNO (src) != regno)
4252 {
cafba495 4253 if (try_replace_reg (reg_used->reg_rtx, src, insn))
7506f491 4254 {
cafba495
BS
4255 changed = 1;
4256 copy_prop_count++;
4257 if (gcse_file != NULL)
7506f491 4258 {
ae860ff7 4259 fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
c4c81601
RK
4260 regno, INSN_UID (insn));
4261 fprintf (gcse_file, " with reg %d\n", REGNO (src));
7506f491 4262 }
cafba495
BS
4263
4264 /* The original insn setting reg_used may or may not now be
4265 deletable. We leave the deletion to flow. */
4266 /* FIXME: If it turns out that the insn isn't deletable,
4267 then we may have unnecessarily extended register lifetimes
4268 and made things worse. */
7506f491
DE
4269 }
4270 }
4271 }
4272
4273 return changed;
4274}
4275
710ee3ed
RH
4276/* Like find_used_regs, but avoid recording uses that appear in
4277 input-output contexts such as zero_extract or pre_dec. This
4278 restricts the cases we consider to those for which local cprop
4279 can legitimately make replacements. */
4280
4281static void
4282local_cprop_find_used_regs (xptr, data)
4283 rtx *xptr;
4284 void *data;
4285{
4286 rtx x = *xptr;
4287
4288 if (x == 0)
4289 return;
4290
4291 switch (GET_CODE (x))
4292 {
4293 case ZERO_EXTRACT:
4294 case SIGN_EXTRACT:
4295 case STRICT_LOW_PART:
4296 return;
4297
4298 case PRE_DEC:
4299 case PRE_INC:
4300 case POST_DEC:
4301 case POST_INC:
4302 case PRE_MODIFY:
4303 case POST_MODIFY:
4304 /* Can only legitimately appear this early in the context of
4305 stack pushes for function arguments, but handle all of the
4306 codes nonetheless. */
4307 return;
4308
4309 case SUBREG:
4310 /* Setting a subreg of a register larger than word_mode leaves
4311 the non-written words unchanged. */
4312 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD)
4313 return;
4314 break;
4315
4316 default:
4317 break;
4318 }
4319
4320 find_used_regs (xptr, data);
4321}
4322
8ba46434
R
4323/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
4324 their REG_EQUAL notes need updating. */
e197b6fc 4325
ae860ff7 4326static bool
8ba46434 4327do_local_cprop (x, insn, alter_jumps, libcall_sp)
ae860ff7
JH
4328 rtx x;
4329 rtx insn;
4330 int alter_jumps;
8ba46434 4331 rtx *libcall_sp;
ae860ff7
JH
4332{
4333 rtx newreg = NULL, newcnst = NULL;
4334
e197b6fc
RH
4335 /* Rule out USE instructions and ASM statements as we don't want to
4336 change the hard registers mentioned. */
ae860ff7
JH
4337 if (GET_CODE (x) == REG
4338 && (REGNO (x) >= FIRST_PSEUDO_REGISTER
e197b6fc
RH
4339 || (GET_CODE (PATTERN (insn)) != USE
4340 && asm_noperands (PATTERN (insn)) < 0)))
ae860ff7
JH
4341 {
4342 cselib_val *val = cselib_lookup (x, GET_MODE (x), 0);
4343 struct elt_loc_list *l;
4344
4345 if (!val)
4346 return false;
4347 for (l = val->locs; l; l = l->next)
4348 {
4349 rtx this_rtx = l->loc;
46690369
JH
4350 rtx note;
4351
9635cfad
JH
4352 if (l->in_libcall)
4353 continue;
4354
6b2d1c9e 4355 if (gcse_constant_p (this_rtx))
ae860ff7 4356 newcnst = this_rtx;
46690369
JH
4357 if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
4358 /* Don't copy propagate if it has attached REG_EQUIV note.
4359 At this point this only function parameters should have
4360 REG_EQUIV notes and if the argument slot is used somewhere
4361 explicitly, it means address of parameter has been taken,
4362 so we should not extend the lifetime of the pseudo. */
4363 && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX))
4364 || GET_CODE (XEXP (note, 0)) != MEM))
ae860ff7
JH
4365 newreg = this_rtx;
4366 }
4367 if (newcnst && constprop_register (insn, x, newcnst, alter_jumps))
4368 {
8ba46434 4369 /* If we find a case where we can't fix the retval REG_EQUAL notes
fbe5a4a6 4370 match the new register, we either have to abandon this replacement
8ba46434
R
4371 or fix delete_trivially_dead_insns to preserve the setting insn,
4372 or make it delete the REG_EUAQL note, and fix up all passes that
4373 require the REG_EQUAL note there. */
4374 if (!adjust_libcall_notes (x, newcnst, insn, libcall_sp))
4375 abort ();
ae860ff7
JH
4376 if (gcse_file != NULL)
4377 {
4378 fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ",
4379 REGNO (x));
4380 fprintf (gcse_file, "insn %d with constant ",
4381 INSN_UID (insn));
4382 print_rtl (gcse_file, newcnst);
4383 fprintf (gcse_file, "\n");
4384 }
4385 const_prop_count++;
4386 return true;
4387 }
4388 else if (newreg && newreg != x && try_replace_reg (x, newreg, insn))
4389 {
8ba46434 4390 adjust_libcall_notes (x, newreg, insn, libcall_sp);
ae860ff7
JH
4391 if (gcse_file != NULL)
4392 {
4393 fprintf (gcse_file,
4394 "LOCAL COPY-PROP: Replacing reg %d in insn %d",
4395 REGNO (x), INSN_UID (insn));
4396 fprintf (gcse_file, " with reg %d\n", REGNO (newreg));
4397 }
4398 copy_prop_count++;
4399 return true;
4400 }
4401 }
4402 return false;
4403}
4404
8ba46434
R
4405/* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall;
4406 their REG_EQUAL notes need updating to reflect that OLDREG has been
f4e3e618
RH
4407 replaced with NEWVAL in INSN. Return true if all substitutions could
4408 be made. */
8ba46434
R
4409static bool
4410adjust_libcall_notes (oldreg, newval, insn, libcall_sp)
4411 rtx oldreg, newval, insn, *libcall_sp;
4412{
f4e3e618 4413 rtx end;
8ba46434
R
4414
4415 while ((end = *libcall_sp++))
4416 {
f4e3e618 4417 rtx note = find_reg_equal_equiv_note (end);
8ba46434
R
4418
4419 if (! note)
4420 continue;
4421
4422 if (REG_P (newval))
4423 {
4424 if (reg_set_between_p (newval, PREV_INSN (insn), end))
4425 {
4426 do
4427 {
4428 note = find_reg_equal_equiv_note (end);
4429 if (! note)
4430 continue;
4431 if (reg_mentioned_p (newval, XEXP (note, 0)))
4432 return false;
4433 }
4434 while ((end = *libcall_sp++));
4435 return true;
4436 }
4437 }
4438 XEXP (note, 0) = replace_rtx (XEXP (note, 0), oldreg, newval);
4439 insn = end;
4440 }
4441 return true;
4442}
4443
4444#define MAX_NESTED_LIBCALLS 9
4445
ae860ff7
JH
4446static void
4447local_cprop_pass (alter_jumps)
4448 int alter_jumps;
4449{
4450 rtx insn;
4451 struct reg_use *reg_used;
8ba46434 4452 rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp;
1649d92f 4453 bool changed = false;
ae860ff7
JH
4454
4455 cselib_init ();
8ba46434
R
4456 libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS];
4457 *libcall_sp = 0;
ae860ff7
JH
4458 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4459 {
4460 if (INSN_P (insn))
4461 {
8ba46434 4462 rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
ae860ff7 4463
8ba46434
R
4464 if (note)
4465 {
4466 if (libcall_sp == libcall_stack)
4467 abort ();
4468 *--libcall_sp = XEXP (note, 0);
4469 }
4470 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
4471 if (note)
4472 libcall_sp++;
4473 note = find_reg_equal_equiv_note (insn);
ae860ff7
JH
4474 do
4475 {
4476 reg_use_count = 0;
710ee3ed 4477 note_uses (&PATTERN (insn), local_cprop_find_used_regs, NULL);
ae860ff7 4478 if (note)
710ee3ed 4479 local_cprop_find_used_regs (&XEXP (note, 0), NULL);
ae860ff7
JH
4480
4481 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4482 reg_used++, reg_use_count--)
8ba46434
R
4483 if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps,
4484 libcall_sp))
1649d92f
JH
4485 {
4486 changed = true;
4487 break;
4488 }
ae860ff7
JH
4489 }
4490 while (reg_use_count);
4491 }
4492 cselib_process_insn (insn);
4493 }
4494 cselib_finish ();
1649d92f
JH
4495 /* Global analysis may get into infinite loops for unreachable blocks. */
4496 if (changed && alter_jumps)
5f0bea72
JH
4497 {
4498 delete_unreachable_blocks ();
4499 free_reg_set_mem ();
4500 alloc_reg_set_mem (max_reg_num ());
4501 compute_sets (get_insns ());
4502 }
ae860ff7
JH
4503}
4504
c4c81601 4505/* Forward propagate copies. This includes copies and constants. Return
cc2902df 4506 nonzero if a change was made. */
7506f491
DE
4507
4508static int
b5ce41ff
JL
4509cprop (alter_jumps)
4510 int alter_jumps;
7506f491 4511{
e0082a72
ZD
4512 int changed;
4513 basic_block bb;
7506f491
DE
4514 rtx insn;
4515
4516 /* Note we start at block 1. */
e0082a72
ZD
4517 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4518 {
4519 if (gcse_file != NULL)
4520 fprintf (gcse_file, "\n");
4521 return 0;
4522 }
7506f491
DE
4523
4524 changed = 0;
e0082a72 4525 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb)
7506f491
DE
4526 {
4527 /* Reset tables used to keep track of what's still valid [since the
4528 start of the block]. */
4529 reset_opr_set_tables ();
4530
e0082a72
ZD
4531 for (insn = bb->head;
4532 insn != NULL && insn != NEXT_INSN (bb->end);
7506f491 4533 insn = NEXT_INSN (insn))
172890a2
RK
4534 if (INSN_P (insn))
4535 {
ae860ff7 4536 changed |= cprop_insn (insn, alter_jumps);
7506f491 4537
172890a2
RK
4538 /* Keep track of everything modified by this insn. */
4539 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
4540 call mark_oprs_set if we turned the insn into a NOTE. */
4541 if (GET_CODE (insn) != NOTE)
4542 mark_oprs_set (insn);
8e42ace1 4543 }
7506f491
DE
4544 }
4545
4546 if (gcse_file != NULL)
4547 fprintf (gcse_file, "\n");
4548
4549 return changed;
4550}
4551
fbef91d8
RS
4552/* Similar to get_condition, only the resulting condition must be
4553 valid at JUMP, instead of at EARLIEST.
4554
4555 This differs from noce_get_condition in ifcvt.c in that we prefer not to
4556 settle for the condition variable in the jump instruction being integral.
4557 We prefer to be able to record the value of a user variable, rather than
4558 the value of a temporary used in a condition. This could be solved by
4559 recording the value of *every* register scaned by canonicalize_condition,
4560 but this would require some code reorganization. */
4561
4562static rtx
4563fis_get_condition (jump)
4564 rtx jump;
4565{
4566 rtx cond, set, tmp, insn, earliest;
4567 bool reverse;
4568
4569 if (! any_condjump_p (jump))
4570 return NULL_RTX;
4571
4572 set = pc_set (jump);
4573 cond = XEXP (SET_SRC (set), 0);
4574
4575 /* If this branches to JUMP_LABEL when the condition is false,
4576 reverse the condition. */
4577 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4578 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump));
4579
4580 /* Use canonicalize_condition to do the dirty work of manipulating
4581 MODE_CC values and COMPARE rtx codes. */
4582 tmp = canonicalize_condition (jump, cond, reverse, &earliest, NULL_RTX);
4583 if (!tmp)
4584 return NULL_RTX;
4585
4586 /* Verify that the given condition is valid at JUMP by virtue of not
4587 having been modified since EARLIEST. */
4588 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
4589 if (INSN_P (insn) && modified_in_p (tmp, insn))
4590 break;
4591 if (insn == jump)
4592 return tmp;
4593
4594 /* The condition was modified. See if we can get a partial result
4595 that doesn't follow all the reversals. Perhaps combine can fold
4596 them together later. */
4597 tmp = XEXP (tmp, 0);
4598 if (!REG_P (tmp) || GET_MODE_CLASS (GET_MODE (tmp)) != MODE_INT)
4599 return NULL_RTX;
4600 tmp = canonicalize_condition (jump, cond, reverse, &earliest, tmp);
4601 if (!tmp)
4602 return NULL_RTX;
4603
4604 /* For sanity's sake, re-validate the new result. */
4605 for (insn = earliest; insn != jump; insn = NEXT_INSN (insn))
4606 if (INSN_P (insn) && modified_in_p (tmp, insn))
4607 return NULL_RTX;
4608
4609 return tmp;
4610}
4611
4612/* Find the implicit sets of a function. An "implicit set" is a constraint
4613 on the value of a variable, implied by a conditional jump. For example,
4614 following "if (x == 2)", the then branch may be optimized as though the
4615 conditional performed an "explicit set", in this example, "x = 2". This
4616 function records the set patterns that are implicit at the start of each
4617 basic block. */
4618
4619static void
4620find_implicit_sets ()
4621{
4622 basic_block bb, dest;
4623 unsigned int count;
4624 rtx cond, new;
4625
4626 count = 0;
4627 FOR_EACH_BB (bb)
4628 /* Check for more than one sucessor. */
4629 if (bb->succ && bb->succ->succ_next)
4630 {
4631 cond = fis_get_condition (bb->end);
4632
4633 if (cond
4634 && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
4635 && GET_CODE (XEXP (cond, 0)) == REG
4636 && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER
6b2d1c9e 4637 && gcse_constant_p (XEXP (cond, 1)))
fbef91d8
RS
4638 {
4639 dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest
4640 : FALLTHRU_EDGE (bb)->dest;
4641
4642 if (dest && ! dest->pred->pred_next
4643 && dest != EXIT_BLOCK_PTR)
4644 {
4645 new = gen_rtx_SET (VOIDmode, XEXP (cond, 0),
4646 XEXP (cond, 1));
4647 implicit_sets[dest->index] = new;
4648 if (gcse_file)
4649 {
4650 fprintf(gcse_file, "Implicit set of reg %d in ",
4651 REGNO (XEXP (cond, 0)));
4652 fprintf(gcse_file, "basic block %d\n", dest->index);
4653 }
4654 count++;
4655 }
4656 }
4657 }
4658
4659 if (gcse_file)
4660 fprintf (gcse_file, "Found %d implicit sets\n", count);
4661}
4662
7506f491 4663/* Perform one copy/constant propagation pass.
a0134312
RS
4664 PASS is the pass count. If CPROP_JUMPS is true, perform constant
4665 propagation into conditional jumps. If BYPASS_JUMPS is true,
4666 perform conditional jump bypassing optimizations. */
7506f491
DE
4667
4668static int
a0134312 4669one_cprop_pass (pass, cprop_jumps, bypass_jumps)
7506f491 4670 int pass;
a0134312
RS
4671 int cprop_jumps;
4672 int bypass_jumps;
7506f491
DE
4673{
4674 int changed = 0;
4675
4676 const_prop_count = 0;
4677 copy_prop_count = 0;
4678
a0134312 4679 local_cprop_pass (cprop_jumps);
ae860ff7 4680
fbef91d8
RS
4681 /* Determine implicit sets. */
4682 implicit_sets = (rtx *) xcalloc (last_basic_block, sizeof (rtx));
4683 find_implicit_sets ();
4684
02280659
ZD
4685 alloc_hash_table (max_cuid, &set_hash_table, 1);
4686 compute_hash_table (&set_hash_table);
fbef91d8
RS
4687
4688 /* Free implicit_sets before peak usage. */
4689 free (implicit_sets);
4690 implicit_sets = NULL;
4691
7506f491 4692 if (gcse_file)
02280659
ZD
4693 dump_hash_table (gcse_file, "SET", &set_hash_table);
4694 if (set_hash_table.n_elems > 0)
7506f491 4695 {
02280659 4696 alloc_cprop_mem (last_basic_block, set_hash_table.n_elems);
7506f491 4697 compute_cprop_data ();
a0134312
RS
4698 changed = cprop (cprop_jumps);
4699 if (bypass_jumps)
0e3f0221 4700 changed |= bypass_conditional_jumps ();
7506f491
DE
4701 free_cprop_mem ();
4702 }
c4c81601 4703
02280659 4704 free_hash_table (&set_hash_table);
7506f491
DE
4705
4706 if (gcse_file)
4707 {
c4c81601
RK
4708 fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ",
4709 current_function_name, pass, bytes_used);
4710 fprintf (gcse_file, "%d const props, %d copy props\n\n",
4711 const_prop_count, copy_prop_count);
7506f491 4712 }
1649d92f
JH
4713 /* Global analysis may get into infinite loops for unreachable blocks. */
4714 if (changed && cprop_jumps)
4715 delete_unreachable_blocks ();
7506f491
DE
4716
4717 return changed;
4718}
4719\f
0e3f0221
RS
4720/* Bypass conditional jumps. */
4721
7821bfc7
RS
4722/* The value of last_basic_block at the beginning of the jump_bypass
4723 pass. The use of redirect_edge_and_branch_force may introduce new
4724 basic blocks, but the data flow analysis is only valid for basic
4725 block indices less than bypass_last_basic_block. */
4726
4727static int bypass_last_basic_block;
4728
0e3f0221
RS
4729/* Find a set of REGNO to a constant that is available at the end of basic
4730 block BB. Returns NULL if no such set is found. Based heavily upon
4731 find_avail_set. */
4732
4733static struct expr *
4734find_bypass_set (regno, bb)
4735 int regno;
4736 int bb;
4737{
4738 struct expr *result = 0;
4739
4740 for (;;)
4741 {
4742 rtx src;
ceda50e9 4743 struct expr *set = lookup_set (regno, &set_hash_table);
0e3f0221
RS
4744
4745 while (set)
4746 {
4747 if (TEST_BIT (cprop_avout[bb], set->bitmap_index))
4748 break;
4749 set = next_set (regno, set);
4750 }
4751
4752 if (set == 0)
4753 break;
4754
4755 if (GET_CODE (set->expr) != SET)
4756 abort ();
4757
4758 src = SET_SRC (set->expr);
6b2d1c9e 4759 if (gcse_constant_p (src))
0e3f0221
RS
4760 result = set;
4761
4762 if (GET_CODE (src) != REG)
4763 break;
4764
4765 regno = REGNO (src);
4766 }
4767 return result;
4768}
4769
4770
4771/* Subroutine of bypass_conditional_jumps that attempts to bypass the given
4772 basic block BB which has more than one predecessor. If not NULL, SETCC
4773 is the first instruction of BB, which is immediately followed by JUMP_INSN
4774 JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB.
4775 Returns nonzero if a change was made. */
4776
4777static int
4778bypass_block (bb, setcc, jump)
4779 basic_block bb;
4780 rtx setcc, jump;
4781{
4782 rtx insn, note;
4783 edge e, enext;
818b6b7f 4784 int i, change;
72b8d451 4785 int may_be_loop_header;
0e3f0221
RS
4786
4787 insn = (setcc != NULL) ? setcc : jump;
4788
4789 /* Determine set of register uses in INSN. */
4790 reg_use_count = 0;
4791 note_uses (&PATTERN (insn), find_used_regs, NULL);
4792 note = find_reg_equal_equiv_note (insn);
4793 if (note)
4794 find_used_regs (&XEXP (note, 0), NULL);
4795
72b8d451
ZD
4796 may_be_loop_header = false;
4797 for (e = bb->pred; e; e = e->pred_next)
4798 if (e->flags & EDGE_DFS_BACK)
4799 {
4800 may_be_loop_header = true;
4801 break;
4802 }
4803
0e3f0221
RS
4804 change = 0;
4805 for (e = bb->pred; e; e = enext)
4806 {
4807 enext = e->pred_next;
7821bfc7
RS
4808 if (e->flags & EDGE_COMPLEX)
4809 continue;
4810
4811 /* We can't redirect edges from new basic blocks. */
4812 if (e->src->index >= bypass_last_basic_block)
4813 continue;
4814
72b8d451
ZD
4815 /* The irreducible loops created by redirecting of edges entering the
4816 loop from outside would decrease effectivity of some of the following
4817 optimalizations, so prevent this. */
4818 if (may_be_loop_header
4819 && !(e->flags & EDGE_DFS_BACK))
4820 continue;
4821
0e3f0221
RS
4822 for (i = 0; i < reg_use_count; i++)
4823 {
4824 struct reg_use *reg_used = &reg_use_table[i];
589005ff 4825 unsigned int regno = REGNO (reg_used->reg_rtx);
818b6b7f 4826 basic_block dest, old_dest;
589005ff
KH
4827 struct expr *set;
4828 rtx src, new;
0e3f0221 4829
589005ff
KH
4830 if (regno >= max_gcse_regno)
4831 continue;
0e3f0221 4832
589005ff 4833 set = find_bypass_set (regno, e->src->index);
0e3f0221
RS
4834
4835 if (! set)
4836 continue;
4837
589005ff 4838 src = SET_SRC (pc_set (jump));
0e3f0221
RS
4839
4840 if (setcc != NULL)
4841 src = simplify_replace_rtx (src,
589005ff
KH
4842 SET_DEST (PATTERN (setcc)),
4843 SET_SRC (PATTERN (setcc)));
0e3f0221
RS
4844
4845 new = simplify_replace_rtx (src, reg_used->reg_rtx,
589005ff 4846 SET_SRC (set->expr));
0e3f0221 4847
589005ff 4848 if (new == pc_rtx)
0e3f0221
RS
4849 dest = FALLTHRU_EDGE (bb)->dest;
4850 else if (GET_CODE (new) == LABEL_REF)
9a71ece1 4851 dest = BLOCK_FOR_INSN (XEXP (new, 0));
0e3f0221
RS
4852 else
4853 dest = NULL;
4854
818b6b7f 4855 old_dest = e->dest;
7821bfc7
RS
4856 if (dest != NULL
4857 && dest != old_dest
4858 && dest != EXIT_BLOCK_PTR)
4859 {
4860 redirect_edge_and_branch_force (e, dest);
4861
818b6b7f 4862 /* Copy the register setter to the redirected edge.
0e3f0221
RS
4863 Don't copy CC0 setters, as CC0 is dead after jump. */
4864 if (setcc)
4865 {
4866 rtx pat = PATTERN (setcc);
818b6b7f 4867 if (!CC0_P (SET_DEST (pat)))
0e3f0221
RS
4868 insert_insn_on_edge (copy_insn (pat), e);
4869 }
4870
4871 if (gcse_file != NULL)
4872 {
818b6b7f
RH
4873 fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d in jump_insn %d equals constant ",
4874 regno, INSN_UID (jump));
0e3f0221
RS
4875 print_rtl (gcse_file, SET_SRC (set->expr));
4876 fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n",
818b6b7f 4877 e->src->index, old_dest->index, dest->index);
0e3f0221
RS
4878 }
4879 change = 1;
4880 break;
4881 }
4882 }
4883 }
4884 return change;
4885}
4886
4887/* Find basic blocks with more than one predecessor that only contain a
4888 single conditional jump. If the result of the comparison is known at
4889 compile-time from any incoming edge, redirect that edge to the
9a71ece1
RH
4890 appropriate target. Returns nonzero if a change was made.
4891
4892 This function is now mis-named, because we also handle indirect jumps. */
0e3f0221
RS
4893
4894static int
4895bypass_conditional_jumps ()
4896{
4897 basic_block bb;
4898 int changed;
4899 rtx setcc;
4900 rtx insn;
4901 rtx dest;
4902
4903 /* Note we start at block 1. */
4904 if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR)
4905 return 0;
4906
7821bfc7 4907 bypass_last_basic_block = last_basic_block;
72b8d451 4908 mark_dfs_back_edges ();
7821bfc7 4909
0e3f0221
RS
4910 changed = 0;
4911 FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb,
589005ff 4912 EXIT_BLOCK_PTR, next_bb)
0e3f0221
RS
4913 {
4914 /* Check for more than one predecessor. */
4915 if (bb->pred && bb->pred->pred_next)
4916 {
4917 setcc = NULL_RTX;
4918 for (insn = bb->head;
4919 insn != NULL && insn != NEXT_INSN (bb->end);
4920 insn = NEXT_INSN (insn))
4921 if (GET_CODE (insn) == INSN)
4922 {
9543a9d2 4923 if (setcc)
0e3f0221 4924 break;
ba4f7968 4925 if (GET_CODE (PATTERN (insn)) != SET)
0e3f0221
RS
4926 break;
4927
ba4f7968 4928 dest = SET_DEST (PATTERN (insn));
818b6b7f 4929 if (REG_P (dest) || CC0_P (dest))
0e3f0221 4930 setcc = insn;
0e3f0221
RS
4931 else
4932 break;
4933 }
4934 else if (GET_CODE (insn) == JUMP_INSN)
4935 {
9a71ece1
RH
4936 if ((any_condjump_p (insn) || computed_jump_p (insn))
4937 && onlyjump_p (insn))
0e3f0221
RS
4938 changed |= bypass_block (bb, setcc, insn);
4939 break;
4940 }
4941 else if (INSN_P (insn))
4942 break;
4943 }
4944 }
4945
818b6b7f 4946 /* If we bypassed any register setting insns, we inserted a
fbe5a4a6 4947 copy on the redirected edge. These need to be committed. */
0e3f0221
RS
4948 if (changed)
4949 commit_edge_insertions();
4950
4951 return changed;
4952}
4953\f
a65f3558 4954/* Compute PRE+LCM working variables. */
7506f491
DE
4955
4956/* Local properties of expressions. */
4957/* Nonzero for expressions that are transparent in the block. */
a65f3558 4958static sbitmap *transp;
7506f491 4959
5c35539b
RH
4960/* Nonzero for expressions that are transparent at the end of the block.
4961 This is only zero for expressions killed by abnormal critical edge
4962 created by a calls. */
a65f3558 4963static sbitmap *transpout;
5c35539b 4964
a65f3558
JL
4965/* Nonzero for expressions that are computed (available) in the block. */
4966static sbitmap *comp;
7506f491 4967
a65f3558
JL
4968/* Nonzero for expressions that are locally anticipatable in the block. */
4969static sbitmap *antloc;
7506f491 4970
a65f3558
JL
4971/* Nonzero for expressions where this block is an optimal computation
4972 point. */
4973static sbitmap *pre_optimal;
5c35539b 4974
a65f3558
JL
4975/* Nonzero for expressions which are redundant in a particular block. */
4976static sbitmap *pre_redundant;
7506f491 4977
a42cd965
AM
4978/* Nonzero for expressions which should be inserted on a specific edge. */
4979static sbitmap *pre_insert_map;
4980
4981/* Nonzero for expressions which should be deleted in a specific block. */
4982static sbitmap *pre_delete_map;
4983
4984/* Contains the edge_list returned by pre_edge_lcm. */
4985static struct edge_list *edge_list;
4986
a65f3558
JL
4987/* Redundant insns. */
4988static sbitmap pre_redundant_insns;
7506f491 4989
a65f3558 4990/* Allocate vars used for PRE analysis. */
7506f491
DE
4991
4992static void
a65f3558
JL
4993alloc_pre_mem (n_blocks, n_exprs)
4994 int n_blocks, n_exprs;
7506f491 4995{
a65f3558
JL
4996 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4997 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4998 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
5faf03ae 4999
a42cd965
AM
5000 pre_optimal = NULL;
5001 pre_redundant = NULL;
5002 pre_insert_map = NULL;
5003 pre_delete_map = NULL;
5004 ae_in = NULL;
5005 ae_out = NULL;
a42cd965 5006 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
c4c81601 5007
a42cd965 5008 /* pre_insert and pre_delete are allocated later. */
7506f491
DE
5009}
5010
a65f3558 5011/* Free vars used for PRE analysis. */
7506f491
DE
5012
5013static void
a65f3558 5014free_pre_mem ()
7506f491 5015{
5a660bff
DB
5016 sbitmap_vector_free (transp);
5017 sbitmap_vector_free (comp);
bd3675fc
JL
5018
5019 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
7506f491 5020
a42cd965 5021 if (pre_optimal)
5a660bff 5022 sbitmap_vector_free (pre_optimal);
a42cd965 5023 if (pre_redundant)
5a660bff 5024 sbitmap_vector_free (pre_redundant);
a42cd965 5025 if (pre_insert_map)
5a660bff 5026 sbitmap_vector_free (pre_insert_map);
a42cd965 5027 if (pre_delete_map)
5a660bff 5028 sbitmap_vector_free (pre_delete_map);
a42cd965 5029 if (ae_in)
5a660bff 5030 sbitmap_vector_free (ae_in);
a42cd965 5031 if (ae_out)
5a660bff 5032 sbitmap_vector_free (ae_out);
a42cd965 5033
bd3675fc 5034 transp = comp = NULL;
a42cd965 5035 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
55d3f917 5036 ae_in = ae_out = NULL;
7506f491
DE
5037}
5038
5039/* Top level routine to do the dataflow analysis needed by PRE. */
5040
5041static void
5042compute_pre_data ()
5043{
b614171e 5044 sbitmap trapping_expr;
e0082a72 5045 basic_block bb;
b614171e 5046 unsigned int ui;
c66e8ae9 5047
02280659 5048 compute_local_properties (transp, comp, antloc, &expr_hash_table);
d55bc081 5049 sbitmap_vector_zero (ae_kill, last_basic_block);
c66e8ae9 5050
b614171e 5051 /* Collect expressions which might trap. */
02280659 5052 trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
b614171e 5053 sbitmap_zero (trapping_expr);
02280659 5054 for (ui = 0; ui < expr_hash_table.size; ui++)
b614171e
MM
5055 {
5056 struct expr *e;
02280659 5057 for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
b614171e
MM
5058 if (may_trap_p (e->expr))
5059 SET_BIT (trapping_expr, e->bitmap_index);
5060 }
5061
c66e8ae9
JL
5062 /* Compute ae_kill for each basic block using:
5063
5064 ~(TRANSP | COMP)
5065
a2e90653 5066 This is significantly faster than compute_ae_kill. */
c66e8ae9 5067
e0082a72 5068 FOR_EACH_BB (bb)
c66e8ae9 5069 {
b614171e
MM
5070 edge e;
5071
5072 /* If the current block is the destination of an abnormal edge, we
5073 kill all trapping expressions because we won't be able to properly
5074 place the instruction on the edge. So make them neither
5075 anticipatable nor transparent. This is fairly conservative. */
e0082a72 5076 for (e = bb->pred; e ; e = e->pred_next)
b614171e
MM
5077 if (e->flags & EDGE_ABNORMAL)
5078 {
e0082a72
ZD
5079 sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
5080 sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
b614171e
MM
5081 break;
5082 }
5083
e0082a72
ZD
5084 sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
5085 sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
c66e8ae9
JL
5086 }
5087
02280659 5088 edge_list = pre_edge_lcm (gcse_file, expr_hash_table.n_elems, transp, comp, antloc,
a42cd965 5089 ae_kill, &pre_insert_map, &pre_delete_map);
5a660bff 5090 sbitmap_vector_free (antloc);
bd3675fc 5091 antloc = NULL;
5a660bff 5092 sbitmap_vector_free (ae_kill);
589005ff 5093 ae_kill = NULL;
76ac938b 5094 sbitmap_free (trapping_expr);
7506f491
DE
5095}
5096\f
5097/* PRE utilities */
5098
cc2902df 5099/* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
a65f3558 5100 block BB.
7506f491
DE
5101
5102 VISITED is a pointer to a working buffer for tracking which BB's have
5103 been visited. It is NULL for the top-level call.
5104
5105 We treat reaching expressions that go through blocks containing the same
5106 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
5107 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
5108 2 as not reaching. The intent is to improve the probability of finding
5109 only one reaching expression and to reduce register lifetimes by picking
5110 the closest such expression. */
5111
5112static int
89e606c9 5113pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited)
e2d2ed72 5114 basic_block occr_bb;
7506f491 5115 struct expr *expr;
e2d2ed72 5116 basic_block bb;
7506f491
DE
5117 char *visited;
5118{
36349f8b 5119 edge pred;
7506f491 5120
e2d2ed72 5121 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
7506f491 5122 {
e2d2ed72 5123 basic_block pred_bb = pred->src;
7506f491 5124
36349f8b 5125 if (pred->src == ENTRY_BLOCK_PTR
7506f491 5126 /* Has predecessor has already been visited? */
0b17ab2f 5127 || visited[pred_bb->index])
c4c81601
RK
5128 ;/* Nothing to do. */
5129
7506f491 5130 /* Does this predecessor generate this expression? */
0b17ab2f 5131 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
7506f491
DE
5132 {
5133 /* Is this the occurrence we're looking for?
5134 Note that there's only one generating occurrence per block
5135 so we just need to check the block number. */
a65f3558 5136 if (occr_bb == pred_bb)
7506f491 5137 return 1;
c4c81601 5138
0b17ab2f 5139 visited[pred_bb->index] = 1;
7506f491
DE
5140 }
5141 /* Ignore this predecessor if it kills the expression. */
0b17ab2f
RH
5142 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
5143 visited[pred_bb->index] = 1;
c4c81601 5144
7506f491
DE
5145 /* Neither gen nor kill. */
5146 else
ac7c5af5 5147 {
0b17ab2f 5148 visited[pred_bb->index] = 1;
89e606c9 5149 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
7506f491 5150 return 1;
ac7c5af5 5151 }
7506f491
DE
5152 }
5153
5154 /* All paths have been checked. */
5155 return 0;
5156}
283a2545
RL
5157
5158/* The wrapper for pre_expr_reaches_here_work that ensures that any
dc297297 5159 memory allocated for that function is returned. */
283a2545
RL
5160
5161static int
89e606c9 5162pre_expr_reaches_here_p (occr_bb, expr, bb)
e2d2ed72 5163 basic_block occr_bb;
283a2545 5164 struct expr *expr;
e2d2ed72 5165 basic_block bb;
283a2545
RL
5166{
5167 int rval;
d55bc081 5168 char *visited = (char *) xcalloc (last_basic_block, 1);
283a2545 5169
8e42ace1 5170 rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited);
283a2545
RL
5171
5172 free (visited);
c4c81601 5173 return rval;
283a2545 5174}
7506f491 5175\f
a42cd965
AM
5176
5177/* Given an expr, generate RTL which we can insert at the end of a BB,
589005ff 5178 or on an edge. Set the block number of any insns generated to
a42cd965
AM
5179 the value of BB. */
5180
5181static rtx
5182process_insert_insn (expr)
5183 struct expr *expr;
5184{
5185 rtx reg = expr->reaching_reg;
fb0c0a12
RK
5186 rtx exp = copy_rtx (expr->expr);
5187 rtx pat;
a42cd965
AM
5188
5189 start_sequence ();
fb0c0a12
RK
5190
5191 /* If the expression is something that's an operand, like a constant,
5192 just copy it to a register. */
5193 if (general_operand (exp, GET_MODE (reg)))
5194 emit_move_insn (reg, exp);
5195
5196 /* Otherwise, make a new insn to compute this expression and make sure the
5197 insn will be recognized (this also adds any needed CLOBBERs). Copy the
5198 expression to make sure we don't have any sharing issues. */
8d444206 5199 else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
fb0c0a12 5200 abort ();
589005ff 5201
2f937369 5202 pat = get_insns ();
a42cd965
AM
5203 end_sequence ();
5204
5205 return pat;
5206}
589005ff 5207
a65f3558
JL
5208/* Add EXPR to the end of basic block BB.
5209
5210 This is used by both the PRE and code hoisting.
5211
5212 For PRE, we want to verify that the expr is either transparent
5213 or locally anticipatable in the target block. This check makes
5214 no sense for code hoisting. */
7506f491
DE
5215
5216static void
a65f3558 5217insert_insn_end_bb (expr, bb, pre)
7506f491 5218 struct expr *expr;
e2d2ed72 5219 basic_block bb;
a65f3558 5220 int pre;
7506f491 5221{
e2d2ed72 5222 rtx insn = bb->end;
7506f491
DE
5223 rtx new_insn;
5224 rtx reg = expr->reaching_reg;
5225 int regno = REGNO (reg);
2f937369 5226 rtx pat, pat_end;
7506f491 5227
a42cd965 5228 pat = process_insert_insn (expr);
2f937369
DM
5229 if (pat == NULL_RTX || ! INSN_P (pat))
5230 abort ();
5231
5232 pat_end = pat;
5233 while (NEXT_INSN (pat_end) != NULL_RTX)
5234 pat_end = NEXT_INSN (pat_end);
7506f491
DE
5235
5236 /* If the last insn is a jump, insert EXPR in front [taking care to
068473ec
JH
5237 handle cc0, etc. properly]. Similary we need to care trapping
5238 instructions in presence of non-call exceptions. */
7506f491 5239
068473ec
JH
5240 if (GET_CODE (insn) == JUMP_INSN
5241 || (GET_CODE (insn) == INSN
5242 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL))))
7506f491 5243 {
50b2596f 5244#ifdef HAVE_cc0
7506f491 5245 rtx note;
50b2596f 5246#endif
068473ec
JH
5247 /* It should always be the case that we can put these instructions
5248 anywhere in the basic block with performing PRE optimizations.
5249 Check this. */
3b25fbfe 5250 if (GET_CODE (insn) == INSN && pre
0b17ab2f 5251 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
589005ff 5252 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
068473ec 5253 abort ();
7506f491
DE
5254
5255 /* If this is a jump table, then we can't insert stuff here. Since
5256 we know the previous real insn must be the tablejump, we insert
5257 the new instruction just before the tablejump. */
5258 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
5259 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
5260 insn = prev_real_insn (insn);
5261
5262#ifdef HAVE_cc0
5263 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
5264 if cc0 isn't set. */
5265 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
5266 if (note)
5267 insn = XEXP (note, 0);
5268 else
5269 {
5270 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
5271 if (maybe_cc0_setter
2c3c49de 5272 && INSN_P (maybe_cc0_setter)
7506f491
DE
5273 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
5274 insn = maybe_cc0_setter;
5275 }
5276#endif
5277 /* FIXME: What if something in cc0/jump uses value set in new insn? */
3c030e88 5278 new_insn = emit_insn_before (pat, insn);
3947e2f9 5279 }
c4c81601 5280
3947e2f9
RH
5281 /* Likewise if the last insn is a call, as will happen in the presence
5282 of exception handling. */
068473ec
JH
5283 else if (GET_CODE (insn) == CALL_INSN
5284 && (bb->succ->succ_next || (bb->succ->flags & EDGE_ABNORMAL)))
3947e2f9 5285 {
3947e2f9
RH
5286 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
5287 we search backward and place the instructions before the first
5288 parameter is loaded. Do this for everyone for consistency and a
fbe5a4a6 5289 presumption that we'll get better code elsewhere as well.
3947e2f9 5290
c4c81601 5291 It should always be the case that we can put these instructions
a65f3558
JL
5292 anywhere in the basic block with performing PRE optimizations.
5293 Check this. */
c4c81601 5294
a65f3558 5295 if (pre
0b17ab2f 5296 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
589005ff 5297 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
3947e2f9
RH
5298 abort ();
5299
5300 /* Since different machines initialize their parameter registers
5301 in different orders, assume nothing. Collect the set of all
5302 parameter registers. */
833366d6 5303 insn = find_first_parameter_load (insn, bb->head);
3947e2f9 5304
b1d26727
JL
5305 /* If we found all the parameter loads, then we want to insert
5306 before the first parameter load.
5307
5308 If we did not find all the parameter loads, then we might have
5309 stopped on the head of the block, which could be a CODE_LABEL.
5310 If we inserted before the CODE_LABEL, then we would be putting
5311 the insn in the wrong basic block. In that case, put the insn
b5229628 5312 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
0a377997 5313 while (GET_CODE (insn) == CODE_LABEL
589ca5cb 5314 || NOTE_INSN_BASIC_BLOCK_P (insn))
b5229628 5315 insn = NEXT_INSN (insn);
c4c81601 5316
3c030e88 5317 new_insn = emit_insn_before (pat, insn);
7506f491
DE
5318 }
5319 else
3c030e88 5320 new_insn = emit_insn_after (pat, insn);
7506f491 5321
2f937369 5322 while (1)
a65f3558 5323 {
2f937369 5324 if (INSN_P (pat))
a65f3558 5325 {
2f937369
DM
5326 add_label_notes (PATTERN (pat), new_insn);
5327 note_stores (PATTERN (pat), record_set_info, pat);
a65f3558 5328 }
2f937369
DM
5329 if (pat == pat_end)
5330 break;
5331 pat = NEXT_INSN (pat);
a65f3558 5332 }
3947e2f9 5333
7506f491
DE
5334 gcse_create_count++;
5335
5336 if (gcse_file)
5337 {
c4c81601 5338 fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ",
0b17ab2f 5339 bb->index, INSN_UID (new_insn));
c4c81601
RK
5340 fprintf (gcse_file, "copying expression %d to reg %d\n",
5341 expr->bitmap_index, regno);
7506f491
DE
5342 }
5343}
5344
a42cd965
AM
5345/* Insert partially redundant expressions on edges in the CFG to make
5346 the expressions fully redundant. */
7506f491 5347
a42cd965
AM
5348static int
5349pre_edge_insert (edge_list, index_map)
5350 struct edge_list *edge_list;
7506f491
DE
5351 struct expr **index_map;
5352{
c4c81601 5353 int e, i, j, num_edges, set_size, did_insert = 0;
a65f3558
JL
5354 sbitmap *inserted;
5355
a42cd965
AM
5356 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
5357 if it reaches any of the deleted expressions. */
7506f491 5358
a42cd965
AM
5359 set_size = pre_insert_map[0]->size;
5360 num_edges = NUM_EDGES (edge_list);
02280659 5361 inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems);
a42cd965 5362 sbitmap_vector_zero (inserted, num_edges);
7506f491 5363
a42cd965 5364 for (e = 0; e < num_edges; e++)
7506f491
DE
5365 {
5366 int indx;
e2d2ed72 5367 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
a65f3558 5368
a65f3558 5369 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
7506f491 5370 {
a42cd965 5371 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
7506f491 5372
02280659 5373 for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1)
c4c81601
RK
5374 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
5375 {
5376 struct expr *expr = index_map[j];
5377 struct occr *occr;
a65f3558 5378
ff7cc307 5379 /* Now look at each deleted occurrence of this expression. */
c4c81601
RK
5380 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5381 {
5382 if (! occr->deleted_p)
5383 continue;
5384
5385 /* Insert this expression on this edge if if it would
ff7cc307 5386 reach the deleted occurrence in BB. */
c4c81601
RK
5387 if (!TEST_BIT (inserted[e], j))
5388 {
5389 rtx insn;
5390 edge eg = INDEX_EDGE (edge_list, e);
5391
5392 /* We can't insert anything on an abnormal and
5393 critical edge, so we insert the insn at the end of
5394 the previous block. There are several alternatives
5395 detailed in Morgans book P277 (sec 10.5) for
5396 handling this situation. This one is easiest for
5397 now. */
5398
5399 if ((eg->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
5400 insert_insn_end_bb (index_map[j], bb, 0);
5401 else
5402 {
5403 insn = process_insert_insn (index_map[j]);
5404 insert_insn_on_edge (insn, eg);
5405 }
5406
5407 if (gcse_file)
5408 {
5409 fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ",
0b17ab2f
RH
5410 bb->index,
5411 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
c4c81601
RK
5412 fprintf (gcse_file, "copy expression %d\n",
5413 expr->bitmap_index);
5414 }
5415
a13d4ebf 5416 update_ld_motion_stores (expr);
c4c81601
RK
5417 SET_BIT (inserted[e], j);
5418 did_insert = 1;
5419 gcse_create_count++;
5420 }
5421 }
5422 }
7506f491
DE
5423 }
5424 }
5faf03ae 5425
5a660bff 5426 sbitmap_vector_free (inserted);
a42cd965 5427 return did_insert;
7506f491
DE
5428}
5429
c4c81601 5430/* Copy the result of INSN to REG. INDX is the expression number. */
7506f491
DE
5431
5432static void
5433pre_insert_copy_insn (expr, insn)
5434 struct expr *expr;
5435 rtx insn;
5436{
5437 rtx reg = expr->reaching_reg;
5438 int regno = REGNO (reg);
5439 int indx = expr->bitmap_index;
5440 rtx set = single_set (insn);
5441 rtx new_insn;
5442
5443 if (!set)
5444 abort ();
c4c81601 5445
47a3dae1 5446 new_insn = emit_insn_after (gen_move_insn (reg, copy_rtx (SET_DEST (set))), insn);
c4c81601 5447
7506f491
DE
5448 /* Keep register set table up to date. */
5449 record_one_set (regno, new_insn);
5450
5451 gcse_create_count++;
5452
5453 if (gcse_file)
a42cd965
AM
5454 fprintf (gcse_file,
5455 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
5456 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
5457 INSN_UID (insn), regno);
222f7ba9 5458 update_ld_motion_stores (expr);
7506f491
DE
5459}
5460
5461/* Copy available expressions that reach the redundant expression
5462 to `reaching_reg'. */
5463
5464static void
5465pre_insert_copies ()
5466{
2e653e39 5467 unsigned int i;
c4c81601
RK
5468 struct expr *expr;
5469 struct occr *occr;
5470 struct occr *avail;
a65f3558 5471
7506f491
DE
5472 /* For each available expression in the table, copy the result to
5473 `reaching_reg' if the expression reaches a deleted one.
5474
5475 ??? The current algorithm is rather brute force.
5476 Need to do some profiling. */
5477
02280659
ZD
5478 for (i = 0; i < expr_hash_table.size; i++)
5479 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
5480 {
5481 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
5482 we don't want to insert a copy here because the expression may not
5483 really be redundant. So only insert an insn if the expression was
5484 deleted. This test also avoids further processing if the
5485 expression wasn't deleted anywhere. */
5486 if (expr->reaching_reg == NULL)
5487 continue;
5488
5489 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5490 {
5491 if (! occr->deleted_p)
5492 continue;
7506f491 5493
c4c81601
RK
5494 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
5495 {
5496 rtx insn = avail->insn;
7506f491 5497
c4c81601
RK
5498 /* No need to handle this one if handled already. */
5499 if (avail->copied_p)
5500 continue;
7506f491 5501
c4c81601
RK
5502 /* Don't handle this one if it's a redundant one. */
5503 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
5504 continue;
7506f491 5505
c4c81601 5506 /* Or if the expression doesn't reach the deleted one. */
589005ff 5507 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
e2d2ed72
AM
5508 expr,
5509 BLOCK_FOR_INSN (occr->insn)))
c4c81601 5510 continue;
7506f491 5511
c4c81601
RK
5512 /* Copy the result of avail to reaching_reg. */
5513 pre_insert_copy_insn (expr, insn);
5514 avail->copied_p = 1;
5515 }
5516 }
5517 }
7506f491
DE
5518}
5519
10d1bb36
JH
5520/* Emit move from SRC to DEST noting the equivalence with expression computed
5521 in INSN. */
5522static rtx
5523gcse_emit_move_after (src, dest, insn)
5524 rtx src, dest, insn;
5525{
5526 rtx new;
6bdb8dd6 5527 rtx set = single_set (insn), set2;
10d1bb36
JH
5528 rtx note;
5529 rtx eqv;
5530
5531 /* This should never fail since we're creating a reg->reg copy
5532 we've verified to be valid. */
5533
6bdb8dd6 5534 new = emit_insn_after (gen_move_insn (dest, src), insn);
285464d0 5535
10d1bb36 5536 /* Note the equivalence for local CSE pass. */
6bdb8dd6
JH
5537 set2 = single_set (new);
5538 if (!set2 || !rtx_equal_p (SET_DEST (set2), dest))
5539 return new;
10d1bb36
JH
5540 if ((note = find_reg_equal_equiv_note (insn)))
5541 eqv = XEXP (note, 0);
5542 else
5543 eqv = SET_SRC (set);
5544
a500466b 5545 set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv));
10d1bb36
JH
5546
5547 return new;
5548}
5549
7506f491 5550/* Delete redundant computations.
7506f491
DE
5551 Deletion is done by changing the insn to copy the `reaching_reg' of
5552 the expression into the result of the SET. It is left to later passes
5553 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
5554
cc2902df 5555 Returns nonzero if a change is made. */
7506f491
DE
5556
5557static int
5558pre_delete ()
5559{
2e653e39 5560 unsigned int i;
63bc1d05 5561 int changed;
c4c81601
RK
5562 struct expr *expr;
5563 struct occr *occr;
a65f3558 5564
7506f491 5565 changed = 0;
02280659
ZD
5566 for (i = 0; i < expr_hash_table.size; i++)
5567 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601
RK
5568 {
5569 int indx = expr->bitmap_index;
7506f491 5570
c4c81601
RK
5571 /* We only need to search antic_occr since we require
5572 ANTLOC != 0. */
7506f491 5573
c4c81601
RK
5574 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5575 {
5576 rtx insn = occr->insn;
5577 rtx set;
e2d2ed72 5578 basic_block bb = BLOCK_FOR_INSN (insn);
7506f491 5579
0b17ab2f 5580 if (TEST_BIT (pre_delete_map[bb->index], indx))
c4c81601
RK
5581 {
5582 set = single_set (insn);
5583 if (! set)
5584 abort ();
5585
5586 /* Create a pseudo-reg to store the result of reaching
5587 expressions into. Get the mode for the new pseudo from
5588 the mode of the original destination pseudo. */
5589 if (expr->reaching_reg == NULL)
5590 expr->reaching_reg
5591 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
5592
10d1bb36
JH
5593 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
5594 delete_insn (insn);
5595 occr->deleted_p = 1;
5596 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
5597 changed = 1;
5598 gcse_subst_count++;
7506f491 5599
c4c81601
RK
5600 if (gcse_file)
5601 {
5602 fprintf (gcse_file,
5603 "PRE: redundant insn %d (expression %d) in ",
5604 INSN_UID (insn), indx);
5605 fprintf (gcse_file, "bb %d, reaching reg is %d\n",
0b17ab2f 5606 bb->index, REGNO (expr->reaching_reg));
c4c81601
RK
5607 }
5608 }
5609 }
5610 }
7506f491
DE
5611
5612 return changed;
5613}
5614
5615/* Perform GCSE optimizations using PRE.
5616 This is called by one_pre_gcse_pass after all the dataflow analysis
5617 has been done.
5618
c4c81601
RK
5619 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
5620 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
5621 Compiler Design and Implementation.
7506f491 5622
c4c81601
RK
5623 ??? A new pseudo reg is created to hold the reaching expression. The nice
5624 thing about the classical approach is that it would try to use an existing
5625 reg. If the register can't be adequately optimized [i.e. we introduce
5626 reload problems], one could add a pass here to propagate the new register
5627 through the block.
7506f491 5628
c4c81601
RK
5629 ??? We don't handle single sets in PARALLELs because we're [currently] not
5630 able to copy the rest of the parallel when we insert copies to create full
5631 redundancies from partial redundancies. However, there's no reason why we
5632 can't handle PARALLELs in the cases where there are no partial
7506f491
DE
5633 redundancies. */
5634
5635static int
5636pre_gcse ()
5637{
2e653e39
RK
5638 unsigned int i;
5639 int did_insert, changed;
7506f491 5640 struct expr **index_map;
c4c81601 5641 struct expr *expr;
7506f491
DE
5642
5643 /* Compute a mapping from expression number (`bitmap_index') to
5644 hash table entry. */
5645
02280659
ZD
5646 index_map = (struct expr **) xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
5647 for (i = 0; i < expr_hash_table.size; i++)
5648 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601 5649 index_map[expr->bitmap_index] = expr;
7506f491
DE
5650
5651 /* Reset bitmap used to track which insns are redundant. */
a65f3558
JL
5652 pre_redundant_insns = sbitmap_alloc (max_cuid);
5653 sbitmap_zero (pre_redundant_insns);
7506f491
DE
5654
5655 /* Delete the redundant insns first so that
5656 - we know what register to use for the new insns and for the other
5657 ones with reaching expressions
5658 - we know which insns are redundant when we go to create copies */
c4c81601 5659
7506f491
DE
5660 changed = pre_delete ();
5661
a42cd965 5662 did_insert = pre_edge_insert (edge_list, index_map);
c4c81601 5663
7506f491 5664 /* In other places with reaching expressions, copy the expression to the
a42cd965 5665 specially allocated pseudo-reg that reaches the redundant expr. */
7506f491 5666 pre_insert_copies ();
a42cd965
AM
5667 if (did_insert)
5668 {
5669 commit_edge_insertions ();
5670 changed = 1;
5671 }
7506f491 5672
283a2545 5673 free (index_map);
76ac938b 5674 sbitmap_free (pre_redundant_insns);
7506f491
DE
5675 return changed;
5676}
5677
5678/* Top level routine to perform one PRE GCSE pass.
5679
cc2902df 5680 Return nonzero if a change was made. */
7506f491
DE
5681
5682static int
b5ce41ff 5683one_pre_gcse_pass (pass)
7506f491
DE
5684 int pass;
5685{
5686 int changed = 0;
5687
5688 gcse_subst_count = 0;
5689 gcse_create_count = 0;
5690
02280659 5691 alloc_hash_table (max_cuid, &expr_hash_table, 0);
a42cd965 5692 add_noreturn_fake_exit_edges ();
a13d4ebf
AM
5693 if (flag_gcse_lm)
5694 compute_ld_motion_mems ();
5695
02280659 5696 compute_hash_table (&expr_hash_table);
a13d4ebf 5697 trim_ld_motion_mems ();
7506f491 5698 if (gcse_file)
02280659 5699 dump_hash_table (gcse_file, "Expression", &expr_hash_table);
c4c81601 5700
02280659 5701 if (expr_hash_table.n_elems > 0)
7506f491 5702 {
02280659 5703 alloc_pre_mem (last_basic_block, expr_hash_table.n_elems);
7506f491
DE
5704 compute_pre_data ();
5705 changed |= pre_gcse ();
a42cd965 5706 free_edge_list (edge_list);
7506f491
DE
5707 free_pre_mem ();
5708 }
c4c81601 5709
a13d4ebf 5710 free_ldst_mems ();
a42cd965 5711 remove_fake_edges ();
02280659 5712 free_hash_table (&expr_hash_table);
7506f491
DE
5713
5714 if (gcse_file)
5715 {
c4c81601
RK
5716 fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
5717 current_function_name, pass, bytes_used);
5718 fprintf (gcse_file, "%d substs, %d insns created\n",
5719 gcse_subst_count, gcse_create_count);
7506f491
DE
5720 }
5721
5722 return changed;
5723}
aeb2f500
JW
5724\f
5725/* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
5b1ef594
JDA
5726 If notes are added to an insn which references a CODE_LABEL, the
5727 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
5728 because the following loop optimization pass requires them. */
aeb2f500
JW
5729
5730/* ??? This is very similar to the loop.c add_label_notes function. We
5731 could probably share code here. */
5732
5733/* ??? If there was a jump optimization pass after gcse and before loop,
5734 then we would not need to do this here, because jump would add the
5735 necessary REG_LABEL notes. */
5736
5737static void
5738add_label_notes (x, insn)
5739 rtx x;
5740 rtx insn;
5741{
5742 enum rtx_code code = GET_CODE (x);
5743 int i, j;
6f7d635c 5744 const char *fmt;
aeb2f500
JW
5745
5746 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
5747 {
6b3603c2 5748 /* This code used to ignore labels that referred to dispatch tables to
ac7c5af5 5749 avoid flow generating (slighly) worse code.
6b3603c2 5750
ac7c5af5
JL
5751 We no longer ignore such label references (see LABEL_REF handling in
5752 mark_jump_label for additional information). */
c4c81601 5753
6b8c9327 5754 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0),
6b3603c2 5755 REG_NOTES (insn));
5b1ef594 5756 if (LABEL_P (XEXP (x, 0)))
589005ff 5757 LABEL_NUSES (XEXP (x, 0))++;
aeb2f500
JW
5758 return;
5759 }
5760
c4c81601 5761 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
aeb2f500
JW
5762 {
5763 if (fmt[i] == 'e')
5764 add_label_notes (XEXP (x, i), insn);
5765 else if (fmt[i] == 'E')
5766 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5767 add_label_notes (XVECEXP (x, i, j), insn);
5768 }
5769}
a65f3558
JL
5770
5771/* Compute transparent outgoing information for each block.
5772
5773 An expression is transparent to an edge unless it is killed by
5774 the edge itself. This can only happen with abnormal control flow,
5775 when the edge is traversed through a call. This happens with
5776 non-local labels and exceptions.
5777
5778 This would not be necessary if we split the edge. While this is
5779 normally impossible for abnormal critical edges, with some effort
5780 it should be possible with exception handling, since we still have
5781 control over which handler should be invoked. But due to increased
5782 EH table sizes, this may not be worthwhile. */
5783
5784static void
5785compute_transpout ()
5786{
e0082a72 5787 basic_block bb;
2e653e39 5788 unsigned int i;
c4c81601 5789 struct expr *expr;
a65f3558 5790
d55bc081 5791 sbitmap_vector_ones (transpout, last_basic_block);
a65f3558 5792
e0082a72 5793 FOR_EACH_BB (bb)
a65f3558 5794 {
a65f3558
JL
5795 /* Note that flow inserted a nop a the end of basic blocks that
5796 end in call instructions for reasons other than abnormal
5797 control flow. */
e0082a72 5798 if (GET_CODE (bb->end) != CALL_INSN)
a65f3558
JL
5799 continue;
5800
02280659
ZD
5801 for (i = 0; i < expr_hash_table.size; i++)
5802 for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
c4c81601
RK
5803 if (GET_CODE (expr->expr) == MEM)
5804 {
5805 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
5806 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
5807 continue;
589005ff 5808
c4c81601
RK
5809 /* ??? Optimally, we would use interprocedural alias
5810 analysis to determine if this mem is actually killed
5811 by this call. */
e0082a72 5812 RESET_BIT (transpout[bb->index], expr->bitmap_index);
c4c81601 5813 }
a65f3558
JL
5814 }
5815}
dfdb644f
JL
5816
5817/* Removal of useless null pointer checks */
5818
dfdb644f 5819/* Called via note_stores. X is set by SETTER. If X is a register we must
0511851c
MM
5820 invalidate nonnull_local and set nonnull_killed. DATA is really a
5821 `null_pointer_info *'.
dfdb644f
JL
5822
5823 We ignore hard registers. */
c4c81601 5824
dfdb644f 5825static void
84832317 5826invalidate_nonnull_info (x, setter, data)
dfdb644f
JL
5827 rtx x;
5828 rtx setter ATTRIBUTE_UNUSED;
0511851c 5829 void *data;
dfdb644f 5830{
770ae6cc
RK
5831 unsigned int regno;
5832 struct null_pointer_info *npi = (struct null_pointer_info *) data;
c4c81601 5833
dfdb644f
JL
5834 while (GET_CODE (x) == SUBREG)
5835 x = SUBREG_REG (x);
5836
5837 /* Ignore anything that is not a register or is a hard register. */
5838 if (GET_CODE (x) != REG
0511851c
MM
5839 || REGNO (x) < npi->min_reg
5840 || REGNO (x) >= npi->max_reg)
dfdb644f
JL
5841 return;
5842
0511851c 5843 regno = REGNO (x) - npi->min_reg;
dfdb644f 5844
e0082a72
ZD
5845 RESET_BIT (npi->nonnull_local[npi->current_block->index], regno);
5846 SET_BIT (npi->nonnull_killed[npi->current_block->index], regno);
dfdb644f
JL
5847}
5848
0511851c
MM
5849/* Do null-pointer check elimination for the registers indicated in
5850 NPI. NONNULL_AVIN and NONNULL_AVOUT are pre-allocated sbitmaps;
5851 they are not our responsibility to free. */
dfdb644f 5852
99a15921 5853static int
9cd56be1 5854delete_null_pointer_checks_1 (block_reg, nonnull_avin,
8e184d9c 5855 nonnull_avout, npi)
770ae6cc 5856 unsigned int *block_reg;
0511851c
MM
5857 sbitmap *nonnull_avin;
5858 sbitmap *nonnull_avout;
5859 struct null_pointer_info *npi;
dfdb644f 5860{
e0082a72 5861 basic_block bb, current_block;
0511851c
MM
5862 sbitmap *nonnull_local = npi->nonnull_local;
5863 sbitmap *nonnull_killed = npi->nonnull_killed;
99a15921 5864 int something_changed = 0;
589005ff 5865
dfdb644f
JL
5866 /* Compute local properties, nonnull and killed. A register will have
5867 the nonnull property if at the end of the current block its value is
5868 known to be nonnull. The killed property indicates that somewhere in
5869 the block any information we had about the register is killed.
5870
5871 Note that a register can have both properties in a single block. That
5872 indicates that it's killed, then later in the block a new value is
5873 computed. */
d55bc081
ZD
5874 sbitmap_vector_zero (nonnull_local, last_basic_block);
5875 sbitmap_vector_zero (nonnull_killed, last_basic_block);
c4c81601 5876
e0082a72 5877 FOR_EACH_BB (current_block)
dfdb644f
JL
5878 {
5879 rtx insn, stop_insn;
5880
0511851c
MM
5881 /* Set the current block for invalidate_nonnull_info. */
5882 npi->current_block = current_block;
5883
dfdb644f
JL
5884 /* Scan each insn in the basic block looking for memory references and
5885 register sets. */
e0082a72
ZD
5886 stop_insn = NEXT_INSN (current_block->end);
5887 for (insn = current_block->head;
dfdb644f
JL
5888 insn != stop_insn;
5889 insn = NEXT_INSN (insn))
5890 {
5891 rtx set;
0511851c 5892 rtx reg;
dfdb644f
JL
5893
5894 /* Ignore anything that is not a normal insn. */
2c3c49de 5895 if (! INSN_P (insn))
dfdb644f
JL
5896 continue;
5897
5898 /* Basically ignore anything that is not a simple SET. We do have
5899 to make sure to invalidate nonnull_local and set nonnull_killed
5900 for such insns though. */
5901 set = single_set (insn);
5902 if (!set)
5903 {
0511851c 5904 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
dfdb644f
JL
5905 continue;
5906 }
5907
f63d1bf7 5908 /* See if we've got a usable memory load. We handle it first
dfdb644f
JL
5909 in case it uses its address register as a dest (which kills
5910 the nonnull property). */
5911 if (GET_CODE (SET_SRC (set)) == MEM
0511851c
MM
5912 && GET_CODE ((reg = XEXP (SET_SRC (set), 0))) == REG
5913 && REGNO (reg) >= npi->min_reg
5914 && REGNO (reg) < npi->max_reg)
e0082a72 5915 SET_BIT (nonnull_local[current_block->index],
0511851c 5916 REGNO (reg) - npi->min_reg);
dfdb644f
JL
5917
5918 /* Now invalidate stuff clobbered by this insn. */
0511851c 5919 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
dfdb644f
JL
5920
5921 /* And handle stores, we do these last since any sets in INSN can
5922 not kill the nonnull property if it is derived from a MEM
5923 appearing in a SET_DEST. */
5924 if (GET_CODE (SET_DEST (set)) == MEM
0511851c
MM
5925 && GET_CODE ((reg = XEXP (SET_DEST (set), 0))) == REG
5926 && REGNO (reg) >= npi->min_reg
5927 && REGNO (reg) < npi->max_reg)
e0082a72 5928 SET_BIT (nonnull_local[current_block->index],
0511851c 5929 REGNO (reg) - npi->min_reg);
dfdb644f
JL
5930 }
5931 }
5932
5933 /* Now compute global properties based on the local properties. This
fbe5a4a6 5934 is a classic global availability algorithm. */
ce724250
JL
5935 compute_available (nonnull_local, nonnull_killed,
5936 nonnull_avout, nonnull_avin);
dfdb644f
JL
5937
5938 /* Now look at each bb and see if it ends with a compare of a value
5939 against zero. */
e0082a72 5940 FOR_EACH_BB (bb)
dfdb644f 5941 {
e0082a72 5942 rtx last_insn = bb->end;
0511851c 5943 rtx condition, earliest;
dfdb644f
JL
5944 int compare_and_branch;
5945
0511851c
MM
5946 /* Since MIN_REG is always at least FIRST_PSEUDO_REGISTER, and
5947 since BLOCK_REG[BB] is zero if this block did not end with a
5948 comparison against zero, this condition works. */
e0082a72
ZD
5949 if (block_reg[bb->index] < npi->min_reg
5950 || block_reg[bb->index] >= npi->max_reg)
dfdb644f
JL
5951 continue;
5952
5953 /* LAST_INSN is a conditional jump. Get its condition. */
5954 condition = get_condition (last_insn, &earliest);
5955
40d7a3fe
NB
5956 /* If we can't determine the condition then skip. */
5957 if (! condition)
5958 continue;
5959
dfdb644f 5960 /* Is the register known to have a nonzero value? */
e0082a72 5961 if (!TEST_BIT (nonnull_avout[bb->index], block_reg[bb->index] - npi->min_reg))
dfdb644f
JL
5962 continue;
5963
5964 /* Try to compute whether the compare/branch at the loop end is one or
5965 two instructions. */
5966 if (earliest == last_insn)
5967 compare_and_branch = 1;
5968 else if (earliest == prev_nonnote_insn (last_insn))
5969 compare_and_branch = 2;
5970 else
5971 continue;
5972
5973 /* We know the register in this comparison is nonnull at exit from
5974 this block. We can optimize this comparison. */
5975 if (GET_CODE (condition) == NE)
5976 {
5977 rtx new_jump;
5978
38c1593d
JH
5979 new_jump = emit_jump_insn_after (gen_jump (JUMP_LABEL (last_insn)),
5980 last_insn);
dfdb644f
JL
5981 JUMP_LABEL (new_jump) = JUMP_LABEL (last_insn);
5982 LABEL_NUSES (JUMP_LABEL (new_jump))++;
5983 emit_barrier_after (new_jump);
5984 }
8e184d9c 5985
99a15921 5986 something_changed = 1;
9cd56be1 5987 delete_insn (last_insn);
dfdb644f 5988 if (compare_and_branch == 2)
589005ff 5989 delete_insn (earliest);
e0082a72 5990 purge_dead_edges (bb);
0511851c
MM
5991
5992 /* Don't check this block again. (Note that BLOCK_END is
589005ff 5993 invalid here; we deleted the last instruction in the
0511851c 5994 block.) */
e0082a72 5995 block_reg[bb->index] = 0;
0511851c 5996 }
99a15921
JL
5997
5998 return something_changed;
0511851c
MM
5999}
6000
6001/* Find EQ/NE comparisons against zero which can be (indirectly) evaluated
6002 at compile time.
6003
6004 This is conceptually similar to global constant/copy propagation and
6005 classic global CSE (it even uses the same dataflow equations as cprop).
6006
6007 If a register is used as memory address with the form (mem (reg)), then we
6008 know that REG can not be zero at that point in the program. Any instruction
6009 which sets REG "kills" this property.
6010
6011 So, if every path leading to a conditional branch has an available memory
6012 reference of that form, then we know the register can not have the value
589005ff 6013 zero at the conditional branch.
0511851c 6014
fbe5a4a6 6015 So we merely need to compute the local properties and propagate that data
0511851c
MM
6016 around the cfg, then optimize where possible.
6017
6018 We run this pass two times. Once before CSE, then again after CSE. This
6019 has proven to be the most profitable approach. It is rare for new
6020 optimization opportunities of this nature to appear after the first CSE
6021 pass.
6022
6023 This could probably be integrated with global cprop with a little work. */
6024
99a15921 6025int
0511851c 6026delete_null_pointer_checks (f)
2e653e39 6027 rtx f ATTRIBUTE_UNUSED;
0511851c 6028{
0511851c 6029 sbitmap *nonnull_avin, *nonnull_avout;
770ae6cc 6030 unsigned int *block_reg;
e0082a72 6031 basic_block bb;
0511851c
MM
6032 int reg;
6033 int regs_per_pass;
6034 int max_reg;
6035 struct null_pointer_info npi;
99a15921 6036 int something_changed = 0;
0511851c 6037
0511851c 6038 /* If we have only a single block, then there's nothing to do. */
0b17ab2f 6039 if (n_basic_blocks <= 1)
99a15921 6040 return 0;
0511851c
MM
6041
6042 /* Trying to perform global optimizations on flow graphs which have
6043 a high connectivity will take a long time and is unlikely to be
6044 particularly useful.
6045
43e72072 6046 In normal circumstances a cfg should have about twice as many edges
0511851c
MM
6047 as blocks. But we do not want to punish small functions which have
6048 a couple switch statements. So we require a relatively large number
6049 of basic blocks and the ratio of edges to blocks to be high. */
0b17ab2f 6050 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
99a15921 6051 return 0;
0511851c 6052
0511851c
MM
6053 /* We need four bitmaps, each with a bit for each register in each
6054 basic block. */
6055 max_reg = max_reg_num ();
d55bc081 6056 regs_per_pass = get_bitmap_width (4, last_basic_block, max_reg);
0511851c
MM
6057
6058 /* Allocate bitmaps to hold local and global properties. */
d55bc081
ZD
6059 npi.nonnull_local = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
6060 npi.nonnull_killed = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
6061 nonnull_avin = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
6062 nonnull_avout = sbitmap_vector_alloc (last_basic_block, regs_per_pass);
0511851c
MM
6063
6064 /* Go through the basic blocks, seeing whether or not each block
6065 ends with a conditional branch whose condition is a comparison
6066 against zero. Record the register compared in BLOCK_REG. */
d55bc081 6067 block_reg = (unsigned int *) xcalloc (last_basic_block, sizeof (int));
e0082a72 6068 FOR_EACH_BB (bb)
0511851c 6069 {
e0082a72 6070 rtx last_insn = bb->end;
0511851c
MM
6071 rtx condition, earliest, reg;
6072
6073 /* We only want conditional branches. */
6074 if (GET_CODE (last_insn) != JUMP_INSN
7f1c097d
JH
6075 || !any_condjump_p (last_insn)
6076 || !onlyjump_p (last_insn))
0511851c
MM
6077 continue;
6078
6079 /* LAST_INSN is a conditional jump. Get its condition. */
6080 condition = get_condition (last_insn, &earliest);
6081
4fe9b91c 6082 /* If we were unable to get the condition, or it is not an equality
0511851c
MM
6083 comparison against zero then there's nothing we can do. */
6084 if (!condition
6085 || (GET_CODE (condition) != NE && GET_CODE (condition) != EQ)
6086 || GET_CODE (XEXP (condition, 1)) != CONST_INT
589005ff 6087 || (XEXP (condition, 1)
0511851c
MM
6088 != CONST0_RTX (GET_MODE (XEXP (condition, 0)))))
6089 continue;
6090
6091 /* We must be checking a register against zero. */
6092 reg = XEXP (condition, 0);
6093 if (GET_CODE (reg) != REG)
6094 continue;
6095
e0082a72 6096 block_reg[bb->index] = REGNO (reg);
0511851c
MM
6097 }
6098
6099 /* Go through the algorithm for each block of registers. */
6100 for (reg = FIRST_PSEUDO_REGISTER; reg < max_reg; reg += regs_per_pass)
6101 {
6102 npi.min_reg = reg;
6103 npi.max_reg = MIN (reg + regs_per_pass, max_reg);
99a15921
JL
6104 something_changed |= delete_null_pointer_checks_1 (block_reg,
6105 nonnull_avin,
6106 nonnull_avout,
6107 &npi);
dfdb644f
JL
6108 }
6109
0511851c
MM
6110 /* Free the table of registers compared at the end of every block. */
6111 free (block_reg);
6112
dfdb644f 6113 /* Free bitmaps. */
5a660bff
DB
6114 sbitmap_vector_free (npi.nonnull_local);
6115 sbitmap_vector_free (npi.nonnull_killed);
6116 sbitmap_vector_free (nonnull_avin);
6117 sbitmap_vector_free (nonnull_avout);
99a15921
JL
6118
6119 return something_changed;
dfdb644f 6120}
bb457bd9
JL
6121
6122/* Code Hoisting variables and subroutines. */
6123
6124/* Very busy expressions. */
6125static sbitmap *hoist_vbein;
6126static sbitmap *hoist_vbeout;
6127
6128/* Hoistable expressions. */
6129static sbitmap *hoist_exprs;
6130
6131/* Dominator bitmaps. */
355be0dc 6132dominance_info dominators;
bb457bd9
JL
6133
6134/* ??? We could compute post dominators and run this algorithm in
68e82b83 6135 reverse to perform tail merging, doing so would probably be
bb457bd9
JL
6136 more effective than the tail merging code in jump.c.
6137
6138 It's unclear if tail merging could be run in parallel with
6139 code hoisting. It would be nice. */
6140
6141/* Allocate vars used for code hoisting analysis. */
6142
6143static void
6144alloc_code_hoist_mem (n_blocks, n_exprs)
6145 int n_blocks, n_exprs;
6146{
6147 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
6148 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
6149 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
6150
6151 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
6152 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
6153 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
6154 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
bb457bd9
JL
6155}
6156
6157/* Free vars used for code hoisting analysis. */
6158
6159static void
6160free_code_hoist_mem ()
6161{
5a660bff
DB
6162 sbitmap_vector_free (antloc);
6163 sbitmap_vector_free (transp);
6164 sbitmap_vector_free (comp);
bb457bd9 6165
5a660bff
DB
6166 sbitmap_vector_free (hoist_vbein);
6167 sbitmap_vector_free (hoist_vbeout);
6168 sbitmap_vector_free (hoist_exprs);
6169 sbitmap_vector_free (transpout);
bb457bd9 6170
355be0dc 6171 free_dominance_info (dominators);
bb457bd9
JL
6172}
6173
6174/* Compute the very busy expressions at entry/exit from each block.
6175
6176 An expression is very busy if all paths from a given point
6177 compute the expression. */
6178
6179static void
6180compute_code_hoist_vbeinout ()
6181{
e0082a72
ZD
6182 int changed, passes;
6183 basic_block bb;
bb457bd9 6184
d55bc081
ZD
6185 sbitmap_vector_zero (hoist_vbeout, last_basic_block);
6186 sbitmap_vector_zero (hoist_vbein, last_basic_block);
bb457bd9
JL
6187
6188 passes = 0;
6189 changed = 1;
c4c81601 6190
bb457bd9
JL
6191 while (changed)
6192 {
6193 changed = 0;
c4c81601 6194
bb457bd9
JL
6195 /* We scan the blocks in the reverse order to speed up
6196 the convergence. */
e0082a72 6197 FOR_EACH_BB_REVERSE (bb)
bb457bd9 6198 {
e0082a72
ZD
6199 changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index],
6200 hoist_vbeout[bb->index], transp[bb->index]);
6201 if (bb->next_bb != EXIT_BLOCK_PTR)
6202 sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index);
bb457bd9 6203 }
c4c81601 6204
bb457bd9
JL
6205 passes++;
6206 }
6207
6208 if (gcse_file)
6209 fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes);
6210}
6211
6212/* Top level routine to do the dataflow analysis needed by code hoisting. */
6213
6214static void
6215compute_code_hoist_data ()
6216{
02280659 6217 compute_local_properties (transp, comp, antloc, &expr_hash_table);
bb457bd9
JL
6218 compute_transpout ();
6219 compute_code_hoist_vbeinout ();
355be0dc 6220 dominators = calculate_dominance_info (CDI_DOMINATORS);
bb457bd9
JL
6221 if (gcse_file)
6222 fprintf (gcse_file, "\n");
6223}
6224
6225/* Determine if the expression identified by EXPR_INDEX would
6226 reach BB unimpared if it was placed at the end of EXPR_BB.
6227
6228 It's unclear exactly what Muchnick meant by "unimpared". It seems
6229 to me that the expression must either be computed or transparent in
6230 *every* block in the path(s) from EXPR_BB to BB. Any other definition
6231 would allow the expression to be hoisted out of loops, even if
6232 the expression wasn't a loop invariant.
6233
6234 Contrast this to reachability for PRE where an expression is
6235 considered reachable if *any* path reaches instead of *all*
6236 paths. */
6237
6238static int
6239hoist_expr_reaches_here_p (expr_bb, expr_index, bb, visited)
e2d2ed72 6240 basic_block expr_bb;
bb457bd9 6241 int expr_index;
e2d2ed72 6242 basic_block bb;
bb457bd9
JL
6243 char *visited;
6244{
6245 edge pred;
283a2545 6246 int visited_allocated_locally = 0;
589005ff 6247
bb457bd9
JL
6248
6249 if (visited == NULL)
6250 {
8e42ace1 6251 visited_allocated_locally = 1;
d55bc081 6252 visited = xcalloc (last_basic_block, 1);
bb457bd9
JL
6253 }
6254
e2d2ed72 6255 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
bb457bd9 6256 {
e2d2ed72 6257 basic_block pred_bb = pred->src;
bb457bd9
JL
6258
6259 if (pred->src == ENTRY_BLOCK_PTR)
6260 break;
f305679f
JH
6261 else if (pred_bb == expr_bb)
6262 continue;
0b17ab2f 6263 else if (visited[pred_bb->index])
bb457bd9 6264 continue;
c4c81601 6265
bb457bd9 6266 /* Does this predecessor generate this expression? */
0b17ab2f 6267 else if (TEST_BIT (comp[pred_bb->index], expr_index))
bb457bd9 6268 break;
0b17ab2f 6269 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
bb457bd9 6270 break;
c4c81601 6271
bb457bd9
JL
6272 /* Not killed. */
6273 else
6274 {
0b17ab2f 6275 visited[pred_bb->index] = 1;
bb457bd9
JL
6276 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
6277 pred_bb, visited))
6278 break;
6279 }
6280 }
589005ff 6281 if (visited_allocated_locally)
283a2545 6282 free (visited);
c4c81601 6283
bb457bd9
JL
6284 return (pred == NULL);
6285}
6286\f
6287/* Actually perform code hoisting. */
c4c81601 6288
bb457bd9
JL
6289static void
6290hoist_code ()
6291{
e0082a72 6292 basic_block bb, dominated;
c635a1ec
DB
6293 basic_block *domby;
6294 unsigned int domby_len;
6295 unsigned int i,j;
bb457bd9 6296 struct expr **index_map;
c4c81601 6297 struct expr *expr;
bb457bd9 6298
d55bc081 6299 sbitmap_vector_zero (hoist_exprs, last_basic_block);
bb457bd9
JL
6300
6301 /* Compute a mapping from expression number (`bitmap_index') to
6302 hash table entry. */
6303
02280659
ZD
6304 index_map = (struct expr **) xcalloc (expr_hash_table.n_elems, sizeof (struct expr *));
6305 for (i = 0; i < expr_hash_table.size; i++)
6306 for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
c4c81601 6307 index_map[expr->bitmap_index] = expr;
bb457bd9
JL
6308
6309 /* Walk over each basic block looking for potentially hoistable
6310 expressions, nothing gets hoisted from the entry block. */
e0082a72 6311 FOR_EACH_BB (bb)
bb457bd9
JL
6312 {
6313 int found = 0;
6314 int insn_inserted_p;
6315
c635a1ec 6316 domby_len = get_dominated_by (dominators, bb, &domby);
bb457bd9
JL
6317 /* Examine each expression that is very busy at the exit of this
6318 block. These are the potentially hoistable expressions. */
e0082a72 6319 for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
bb457bd9
JL
6320 {
6321 int hoistable = 0;
c4c81601 6322
c635a1ec
DB
6323 if (TEST_BIT (hoist_vbeout[bb->index], i)
6324 && TEST_BIT (transpout[bb->index], i))
bb457bd9
JL
6325 {
6326 /* We've found a potentially hoistable expression, now
6327 we look at every block BB dominates to see if it
6328 computes the expression. */
c635a1ec 6329 for (j = 0; j < domby_len; j++)
bb457bd9 6330 {
c635a1ec 6331 dominated = domby[j];
bb457bd9 6332 /* Ignore self dominance. */
c635a1ec 6333 if (bb == dominated)
bb457bd9 6334 continue;
bb457bd9
JL
6335 /* We've found a dominated block, now see if it computes
6336 the busy expression and whether or not moving that
6337 expression to the "beginning" of that block is safe. */
e0082a72 6338 if (!TEST_BIT (antloc[dominated->index], i))
bb457bd9
JL
6339 continue;
6340
6341 /* Note if the expression would reach the dominated block
589005ff 6342 unimpared if it was placed at the end of BB.
bb457bd9
JL
6343
6344 Keep track of how many times this expression is hoistable
6345 from a dominated block into BB. */
e0082a72 6346 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
bb457bd9
JL
6347 hoistable++;
6348 }
6349
ff7cc307 6350 /* If we found more than one hoistable occurrence of this
bb457bd9
JL
6351 expression, then note it in the bitmap of expressions to
6352 hoist. It makes no sense to hoist things which are computed
6353 in only one BB, and doing so tends to pessimize register
6354 allocation. One could increase this value to try harder
6355 to avoid any possible code expansion due to register
6356 allocation issues; however experiments have shown that
6357 the vast majority of hoistable expressions are only movable
6358 from two successors, so raising this threshhold is likely
6359 to nullify any benefit we get from code hoisting. */
6360 if (hoistable > 1)
6361 {
e0082a72 6362 SET_BIT (hoist_exprs[bb->index], i);
bb457bd9
JL
6363 found = 1;
6364 }
6365 }
6366 }
bb457bd9
JL
6367 /* If we found nothing to hoist, then quit now. */
6368 if (! found)
c635a1ec
DB
6369 {
6370 free (domby);
bb457bd9 6371 continue;
c635a1ec 6372 }
bb457bd9
JL
6373
6374 /* Loop over all the hoistable expressions. */
e0082a72 6375 for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
bb457bd9
JL
6376 {
6377 /* We want to insert the expression into BB only once, so
6378 note when we've inserted it. */
6379 insn_inserted_p = 0;
6380
6381 /* These tests should be the same as the tests above. */
e0082a72 6382 if (TEST_BIT (hoist_vbeout[bb->index], i))
bb457bd9
JL
6383 {
6384 /* We've found a potentially hoistable expression, now
6385 we look at every block BB dominates to see if it
6386 computes the expression. */
c635a1ec 6387 for (j = 0; j < domby_len; j++)
bb457bd9 6388 {
c635a1ec 6389 dominated = domby[j];
bb457bd9 6390 /* Ignore self dominance. */
c635a1ec 6391 if (bb == dominated)
bb457bd9
JL
6392 continue;
6393
6394 /* We've found a dominated block, now see if it computes
6395 the busy expression and whether or not moving that
6396 expression to the "beginning" of that block is safe. */
e0082a72 6397 if (!TEST_BIT (antloc[dominated->index], i))
bb457bd9
JL
6398 continue;
6399
6400 /* The expression is computed in the dominated block and
6401 it would be safe to compute it at the start of the
6402 dominated block. Now we have to determine if the
ff7cc307 6403 expression would reach the dominated block if it was
bb457bd9 6404 placed at the end of BB. */
e0082a72 6405 if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
bb457bd9
JL
6406 {
6407 struct expr *expr = index_map[i];
6408 struct occr *occr = expr->antic_occr;
6409 rtx insn;
6410 rtx set;
6411
ff7cc307 6412 /* Find the right occurrence of this expression. */
e0082a72 6413 while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
bb457bd9
JL
6414 occr = occr->next;
6415
6416 /* Should never happen. */
6417 if (!occr)
6418 abort ();
6419
6420 insn = occr->insn;
589005ff 6421
bb457bd9
JL
6422 set = single_set (insn);
6423 if (! set)
6424 abort ();
6425
6426 /* Create a pseudo-reg to store the result of reaching
6427 expressions into. Get the mode for the new pseudo
6428 from the mode of the original destination pseudo. */
6429 if (expr->reaching_reg == NULL)
6430 expr->reaching_reg
6431 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
6432
10d1bb36
JH
6433 gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
6434 delete_insn (insn);
6435 occr->deleted_p = 1;
6436 if (!insn_inserted_p)
bb457bd9 6437 {
10d1bb36
JH
6438 insert_insn_end_bb (index_map[i], bb, 0);
6439 insn_inserted_p = 1;
bb457bd9
JL
6440 }
6441 }
6442 }
6443 }
6444 }
c635a1ec 6445 free (domby);
bb457bd9 6446 }
c4c81601 6447
8e42ace1 6448 free (index_map);
bb457bd9
JL
6449}
6450
6451/* Top level routine to perform one code hoisting (aka unification) pass
6452
cc2902df 6453 Return nonzero if a change was made. */
bb457bd9
JL
6454
6455static int
6456one_code_hoisting_pass ()
6457{
6458 int changed = 0;
6459
02280659
ZD
6460 alloc_hash_table (max_cuid, &expr_hash_table, 0);
6461 compute_hash_table (&expr_hash_table);
bb457bd9 6462 if (gcse_file)
02280659 6463 dump_hash_table (gcse_file, "Code Hosting Expressions", &expr_hash_table);
c4c81601 6464
02280659 6465 if (expr_hash_table.n_elems > 0)
bb457bd9 6466 {
02280659 6467 alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems);
bb457bd9
JL
6468 compute_code_hoist_data ();
6469 hoist_code ();
6470 free_code_hoist_mem ();
6471 }
c4c81601 6472
02280659 6473 free_hash_table (&expr_hash_table);
bb457bd9
JL
6474
6475 return changed;
6476}
a13d4ebf
AM
6477\f
6478/* Here we provide the things required to do store motion towards
6479 the exit. In order for this to be effective, gcse also needed to
6480 be taught how to move a load when it is kill only by a store to itself.
6481
6482 int i;
6483 float a[10];
6484
6485 void foo(float scale)
6486 {
6487 for (i=0; i<10; i++)
6488 a[i] *= scale;
6489 }
6490
6491 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
589005ff
KH
6492 the load out since its live around the loop, and stored at the bottom
6493 of the loop.
a13d4ebf 6494
589005ff 6495 The 'Load Motion' referred to and implemented in this file is
a13d4ebf
AM
6496 an enhancement to gcse which when using edge based lcm, recognizes
6497 this situation and allows gcse to move the load out of the loop.
6498
6499 Once gcse has hoisted the load, store motion can then push this
6500 load towards the exit, and we end up with no loads or stores of 'i'
6501 in the loop. */
6502
ff7cc307 6503/* This will search the ldst list for a matching expression. If it
a13d4ebf
AM
6504 doesn't find one, we create one and initialize it. */
6505
6506static struct ls_expr *
6507ldst_entry (x)
6508 rtx x;
6509{
6510 struct ls_expr * ptr;
6511
6512 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6513 if (expr_equiv_p (ptr->pattern, x))
6514 break;
6515
6516 if (!ptr)
6517 {
6518 ptr = (struct ls_expr *) xmalloc (sizeof (struct ls_expr));
6519
6520 ptr->next = pre_ldst_mems;
6521 ptr->expr = NULL;
6522 ptr->pattern = x;
47a3dae1 6523 ptr->pattern_regs = NULL_RTX;
a13d4ebf
AM
6524 ptr->loads = NULL_RTX;
6525 ptr->stores = NULL_RTX;
6526 ptr->reaching_reg = NULL_RTX;
6527 ptr->invalid = 0;
6528 ptr->index = 0;
6529 ptr->hash_index = 0;
6530 pre_ldst_mems = ptr;
6531 }
589005ff 6532
a13d4ebf
AM
6533 return ptr;
6534}
6535
6536/* Free up an individual ldst entry. */
6537
589005ff 6538static void
a13d4ebf
AM
6539free_ldst_entry (ptr)
6540 struct ls_expr * ptr;
6541{
aaa4ca30
AJ
6542 free_INSN_LIST_list (& ptr->loads);
6543 free_INSN_LIST_list (& ptr->stores);
a13d4ebf
AM
6544
6545 free (ptr);
6546}
6547
6548/* Free up all memory associated with the ldst list. */
6549
6550static void
6551free_ldst_mems ()
6552{
589005ff 6553 while (pre_ldst_mems)
a13d4ebf
AM
6554 {
6555 struct ls_expr * tmp = pre_ldst_mems;
6556
6557 pre_ldst_mems = pre_ldst_mems->next;
6558
6559 free_ldst_entry (tmp);
6560 }
6561
6562 pre_ldst_mems = NULL;
6563}
6564
6565/* Dump debugging info about the ldst list. */
6566
6567static void
6568print_ldst_list (file)
6569 FILE * file;
6570{
6571 struct ls_expr * ptr;
6572
6573 fprintf (file, "LDST list: \n");
6574
6575 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6576 {
6577 fprintf (file, " Pattern (%3d): ", ptr->index);
6578
6579 print_rtl (file, ptr->pattern);
6580
6581 fprintf (file, "\n Loads : ");
6582
6583 if (ptr->loads)
6584 print_rtl (file, ptr->loads);
6585 else
6586 fprintf (file, "(nil)");
6587
6588 fprintf (file, "\n Stores : ");
6589
6590 if (ptr->stores)
6591 print_rtl (file, ptr->stores);
6592 else
6593 fprintf (file, "(nil)");
6594
6595 fprintf (file, "\n\n");
6596 }
6597
6598 fprintf (file, "\n");
6599}
6600
6601/* Returns 1 if X is in the list of ldst only expressions. */
6602
6603static struct ls_expr *
6604find_rtx_in_ldst (x)
6605 rtx x;
6606{
6607 struct ls_expr * ptr;
589005ff 6608
a13d4ebf
AM
6609 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6610 if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid)
6611 return ptr;
6612
6613 return NULL;
6614}
6615
6616/* Assign each element of the list of mems a monotonically increasing value. */
6617
6618static int
6619enumerate_ldsts ()
6620{
6621 struct ls_expr * ptr;
6622 int n = 0;
6623
6624 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6625 ptr->index = n++;
6626
6627 return n;
6628}
6629
6630/* Return first item in the list. */
6631
6632static inline struct ls_expr *
6633first_ls_expr ()
6634{
6635 return pre_ldst_mems;
6636}
6637
6638/* Return the next item in ther list after the specified one. */
6639
6640static inline struct ls_expr *
6641next_ls_expr (ptr)
6642 struct ls_expr * ptr;
6643{
6644 return ptr->next;
6645}
6646\f
6647/* Load Motion for loads which only kill themselves. */
6648
6649/* Return true if x is a simple MEM operation, with no registers or
6650 side effects. These are the types of loads we consider for the
6651 ld_motion list, otherwise we let the usual aliasing take care of it. */
6652
589005ff 6653static int
a13d4ebf
AM
6654simple_mem (x)
6655 rtx x;
6656{
6657 if (GET_CODE (x) != MEM)
6658 return 0;
589005ff 6659
a13d4ebf
AM
6660 if (MEM_VOLATILE_P (x))
6661 return 0;
589005ff 6662
a13d4ebf
AM
6663 if (GET_MODE (x) == BLKmode)
6664 return 0;
aaa4ca30 6665
47a3dae1
ZD
6666 /* If we are handling exceptions, we must be careful with memory references
6667 that may trap. If we are not, the behavior is undefined, so we may just
6668 continue. */
6669 if (flag_non_call_exceptions && may_trap_p (x))
98d3d336
RS
6670 return 0;
6671
47a3dae1
ZD
6672 if (side_effects_p (x))
6673 return 0;
589005ff 6674
47a3dae1
ZD
6675 /* Do not consider function arguments passed on stack. */
6676 if (reg_mentioned_p (stack_pointer_rtx, x))
6677 return 0;
6678
6679 if (flag_float_store && FLOAT_MODE_P (GET_MODE (x)))
6680 return 0;
6681
6682 return 1;
a13d4ebf
AM
6683}
6684
589005ff
KH
6685/* Make sure there isn't a buried reference in this pattern anywhere.
6686 If there is, invalidate the entry for it since we're not capable
6687 of fixing it up just yet.. We have to be sure we know about ALL
a13d4ebf
AM
6688 loads since the aliasing code will allow all entries in the
6689 ld_motion list to not-alias itself. If we miss a load, we will get
589005ff 6690 the wrong value since gcse might common it and we won't know to
a13d4ebf
AM
6691 fix it up. */
6692
6693static void
6694invalidate_any_buried_refs (x)
6695 rtx x;
6696{
6697 const char * fmt;
8e42ace1 6698 int i, j;
a13d4ebf
AM
6699 struct ls_expr * ptr;
6700
6701 /* Invalidate it in the list. */
6702 if (GET_CODE (x) == MEM && simple_mem (x))
6703 {
6704 ptr = ldst_entry (x);
6705 ptr->invalid = 1;
6706 }
6707
6708 /* Recursively process the insn. */
6709 fmt = GET_RTX_FORMAT (GET_CODE (x));
589005ff 6710
a13d4ebf
AM
6711 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6712 {
6713 if (fmt[i] == 'e')
6714 invalidate_any_buried_refs (XEXP (x, i));
6715 else if (fmt[i] == 'E')
6716 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6717 invalidate_any_buried_refs (XVECEXP (x, i, j));
6718 }
6719}
6720
6721/* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
6722 being defined as MEM loads and stores to symbols, with no
589005ff 6723 side effects and no registers in the expression. If there are any
f63d1bf7 6724 uses/defs which don't match this criteria, it is invalidated and
a13d4ebf
AM
6725 trimmed out later. */
6726
589005ff 6727static void
a13d4ebf
AM
6728compute_ld_motion_mems ()
6729{
6730 struct ls_expr * ptr;
e0082a72 6731 basic_block bb;
a13d4ebf 6732 rtx insn;
589005ff 6733
a13d4ebf
AM
6734 pre_ldst_mems = NULL;
6735
e0082a72 6736 FOR_EACH_BB (bb)
a13d4ebf 6737 {
e0082a72
ZD
6738 for (insn = bb->head;
6739 insn && insn != NEXT_INSN (bb->end);
a13d4ebf
AM
6740 insn = NEXT_INSN (insn))
6741 {
6742 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
6743 {
6744 if (GET_CODE (PATTERN (insn)) == SET)
6745 {
6746 rtx src = SET_SRC (PATTERN (insn));
6747 rtx dest = SET_DEST (PATTERN (insn));
6748
6749 /* Check for a simple LOAD... */
6750 if (GET_CODE (src) == MEM && simple_mem (src))
6751 {
6752 ptr = ldst_entry (src);
6753 if (GET_CODE (dest) == REG)
6754 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
6755 else
6756 ptr->invalid = 1;
6757 }
6758 else
6759 {
6760 /* Make sure there isn't a buried load somewhere. */
6761 invalidate_any_buried_refs (src);
6762 }
589005ff 6763
a13d4ebf
AM
6764 /* Check for stores. Don't worry about aliased ones, they
6765 will block any movement we might do later. We only care
6766 about this exact pattern since those are the only
6767 circumstance that we will ignore the aliasing info. */
6768 if (GET_CODE (dest) == MEM && simple_mem (dest))
6769 {
6770 ptr = ldst_entry (dest);
589005ff 6771
f54104df
AO
6772 if (GET_CODE (src) != MEM
6773 && GET_CODE (src) != ASM_OPERANDS)
a13d4ebf
AM
6774 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
6775 else
6776 ptr->invalid = 1;
6777 }
6778 }
6779 else
6780 invalidate_any_buried_refs (PATTERN (insn));
6781 }
6782 }
6783 }
6784}
6785
589005ff 6786/* Remove any references that have been either invalidated or are not in the
a13d4ebf
AM
6787 expression list for pre gcse. */
6788
6789static void
6790trim_ld_motion_mems ()
6791{
6792 struct ls_expr * last = NULL;
6793 struct ls_expr * ptr = first_ls_expr ();
6794
6795 while (ptr != NULL)
6796 {
6797 int del = ptr->invalid;
6798 struct expr * expr = NULL;
589005ff 6799
a13d4ebf 6800 /* Delete if entry has been made invalid. */
589005ff 6801 if (!del)
a13d4ebf
AM
6802 {
6803 unsigned int i;
589005ff 6804
a13d4ebf
AM
6805 del = 1;
6806 /* Delete if we cannot find this mem in the expression list. */
02280659 6807 for (i = 0; i < expr_hash_table.size && del; i++)
a13d4ebf 6808 {
02280659 6809 for (expr = expr_hash_table.table[i];
589005ff 6810 expr != NULL;
a13d4ebf
AM
6811 expr = expr->next_same_hash)
6812 if (expr_equiv_p (expr->expr, ptr->pattern))
6813 {
6814 del = 0;
6815 break;
6816 }
6817 }
6818 }
589005ff 6819
a13d4ebf
AM
6820 if (del)
6821 {
6822 if (last != NULL)
6823 {
6824 last->next = ptr->next;
6825 free_ldst_entry (ptr);
6826 ptr = last->next;
6827 }
6828 else
6829 {
6830 pre_ldst_mems = pre_ldst_mems->next;
6831 free_ldst_entry (ptr);
6832 ptr = pre_ldst_mems;
6833 }
6834 }
6835 else
6836 {
6837 /* Set the expression field if we are keeping it. */
6838 last = ptr;
6839 ptr->expr = expr;
6840 ptr = ptr->next;
6841 }
6842 }
6843
6844 /* Show the world what we've found. */
6845 if (gcse_file && pre_ldst_mems != NULL)
6846 print_ldst_list (gcse_file);
6847}
6848
6849/* This routine will take an expression which we are replacing with
6850 a reaching register, and update any stores that are needed if
6851 that expression is in the ld_motion list. Stores are updated by
6852 copying their SRC to the reaching register, and then storeing
6853 the reaching register into the store location. These keeps the
6854 correct value in the reaching register for the loads. */
6855
6856static void
6857update_ld_motion_stores (expr)
6858 struct expr * expr;
6859{
6860 struct ls_expr * mem_ptr;
6861
6862 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
6863 {
589005ff
KH
6864 /* We can try to find just the REACHED stores, but is shouldn't
6865 matter to set the reaching reg everywhere... some might be
a13d4ebf
AM
6866 dead and should be eliminated later. */
6867
6868 /* We replace SET mem = expr with
6869 SET reg = expr
589005ff 6870 SET mem = reg , where reg is the
a13d4ebf
AM
6871 reaching reg used in the load. */
6872 rtx list = mem_ptr->stores;
589005ff 6873
a13d4ebf
AM
6874 for ( ; list != NULL_RTX; list = XEXP (list, 1))
6875 {
6876 rtx insn = XEXP (list, 0);
6877 rtx pat = PATTERN (insn);
6878 rtx src = SET_SRC (pat);
6879 rtx reg = expr->reaching_reg;
c57718d3 6880 rtx copy, new;
a13d4ebf
AM
6881
6882 /* If we've already copied it, continue. */
6883 if (expr->reaching_reg == src)
6884 continue;
589005ff 6885
a13d4ebf
AM
6886 if (gcse_file)
6887 {
6888 fprintf (gcse_file, "PRE: store updated with reaching reg ");
6889 print_rtl (gcse_file, expr->reaching_reg);
6890 fprintf (gcse_file, ":\n ");
6891 print_inline_rtx (gcse_file, insn, 8);
6892 fprintf (gcse_file, "\n");
6893 }
589005ff 6894
47a3dae1 6895 copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat)));
c57718d3
RK
6896 new = emit_insn_before (copy, insn);
6897 record_one_set (REGNO (reg), new);
a13d4ebf
AM
6898 SET_SRC (pat) = reg;
6899
6900 /* un-recognize this pattern since it's probably different now. */
6901 INSN_CODE (insn) = -1;
6902 gcse_create_count++;
6903 }
6904 }
6905}
6906\f
6907/* Store motion code. */
6908
47a3dae1
ZD
6909#define ANTIC_STORE_LIST(x) ((x)->loads)
6910#define AVAIL_STORE_LIST(x) ((x)->stores)
6911#define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
6912
589005ff 6913/* This is used to communicate the target bitvector we want to use in the
aaa4ca30 6914 reg_set_info routine when called via the note_stores mechanism. */
47a3dae1
ZD
6915static int * regvec;
6916
6917/* And current insn, for the same routine. */
6918static rtx compute_store_table_current_insn;
aaa4ca30 6919
a13d4ebf
AM
6920/* Used in computing the reverse edge graph bit vectors. */
6921static sbitmap * st_antloc;
6922
6923/* Global holding the number of store expressions we are dealing with. */
6924static int num_stores;
6925
aaa4ca30 6926/* Checks to set if we need to mark a register set. Called from note_stores. */
a13d4ebf 6927
aaa4ca30
AJ
6928static void
6929reg_set_info (dest, setter, data)
6930 rtx dest, setter ATTRIBUTE_UNUSED;
6931 void * data ATTRIBUTE_UNUSED;
a13d4ebf 6932{
aaa4ca30
AJ
6933 if (GET_CODE (dest) == SUBREG)
6934 dest = SUBREG_REG (dest);
adfcce61 6935
aaa4ca30 6936 if (GET_CODE (dest) == REG)
47a3dae1 6937 regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn);
a13d4ebf
AM
6938}
6939
47a3dae1
ZD
6940/* Return zero if some of the registers in list X are killed
6941 due to set of registers in bitmap REGS_SET. */
6942
6943static bool
6944store_ops_ok (x, regs_set)
6945 rtx x;
6946 int *regs_set;
6947{
6948 rtx reg;
6949
6950 for (; x; x = XEXP (x, 1))
6951 {
6952 reg = XEXP (x, 0);
6953 if (regs_set[REGNO(reg)])
6954 return false;
6955 }
a13d4ebf 6956
47a3dae1
ZD
6957 return true;
6958}
6959
6960/* Returns a list of registers mentioned in X. */
6961static rtx
6962extract_mentioned_regs (x)
a13d4ebf 6963 rtx x;
47a3dae1
ZD
6964{
6965 return extract_mentioned_regs_helper (x, NULL_RTX);
6966}
6967
6968/* Helper for extract_mentioned_regs; ACCUM is used to accumulate used
6969 registers. */
6970static rtx
6971extract_mentioned_regs_helper (x, accum)
6972 rtx x;
6973 rtx accum;
a13d4ebf
AM
6974{
6975 int i;
6976 enum rtx_code code;
6977 const char * fmt;
6978
6979 /* Repeat is used to turn tail-recursion into iteration. */
6980 repeat:
6981
6982 if (x == 0)
47a3dae1 6983 return accum;
a13d4ebf
AM
6984
6985 code = GET_CODE (x);
6986 switch (code)
6987 {
6988 case REG:
47a3dae1 6989 return alloc_EXPR_LIST (0, x, accum);
a13d4ebf
AM
6990
6991 case MEM:
6992 x = XEXP (x, 0);
6993 goto repeat;
6994
6995 case PRE_DEC:
6996 case PRE_INC:
6997 case POST_DEC:
6998 case POST_INC:
47a3dae1
ZD
6999 /* We do not run this function with arguments having side effects. */
7000 abort ();
a13d4ebf
AM
7001
7002 case PC:
7003 case CC0: /*FIXME*/
7004 case CONST:
7005 case CONST_INT:
7006 case CONST_DOUBLE:
69ef87e2 7007 case CONST_VECTOR:
a13d4ebf
AM
7008 case SYMBOL_REF:
7009 case LABEL_REF:
7010 case ADDR_VEC:
7011 case ADDR_DIFF_VEC:
47a3dae1 7012 return accum;
a13d4ebf
AM
7013
7014 default:
7015 break;
7016 }
7017
7018 i = GET_RTX_LENGTH (code) - 1;
7019 fmt = GET_RTX_FORMAT (code);
589005ff 7020
a13d4ebf
AM
7021 for (; i >= 0; i--)
7022 {
7023 if (fmt[i] == 'e')
7024 {
7025 rtx tem = XEXP (x, i);
7026
7027 /* If we are about to do the last recursive call
47a3dae1 7028 needed at this level, change it into iteration. */
a13d4ebf
AM
7029 if (i == 0)
7030 {
7031 x = tem;
7032 goto repeat;
7033 }
589005ff 7034
47a3dae1 7035 accum = extract_mentioned_regs_helper (tem, accum);
a13d4ebf
AM
7036 }
7037 else if (fmt[i] == 'E')
7038 {
7039 int j;
589005ff 7040
a13d4ebf 7041 for (j = 0; j < XVECLEN (x, i); j++)
47a3dae1 7042 accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum);
a13d4ebf
AM
7043 }
7044 }
7045
47a3dae1 7046 return accum;
a13d4ebf
AM
7047}
7048
47a3dae1
ZD
7049/* Determine whether INSN is MEM store pattern that we will consider moving.
7050 REGS_SET_BEFORE is bitmap of registers set before (and including) the
7051 current insn, REGS_SET_AFTER is bitmap of registers set after (and
7052 including) the insn in this basic block. We must be passing through BB from
7053 head to end, as we are using this fact to speed things up.
7054
7055 The results are stored this way:
7056
7057 -- the first anticipatable expression is added into ANTIC_STORE_LIST
7058 -- if the processed expression is not anticipatable, NULL_RTX is added
7059 there instead, so that we can use it as indicator that no further
7060 expression of this type may be anticipatable
7061 -- if the expression is available, it is added as head of AVAIL_STORE_LIST;
7062 consequently, all of them but this head are dead and may be deleted.
7063 -- if the expression is not available, the insn due to that it fails to be
7064 available is stored in reaching_reg.
7065
7066 The things are complicated a bit by fact that there already may be stores
7067 to the same MEM from other blocks; also caller must take care of the
7068 neccessary cleanup of the temporary markers after end of the basic block.
7069 */
a13d4ebf
AM
7070
7071static void
47a3dae1 7072find_moveable_store (insn, regs_set_before, regs_set_after)
a13d4ebf 7073 rtx insn;
47a3dae1
ZD
7074 int *regs_set_before;
7075 int *regs_set_after;
a13d4ebf
AM
7076{
7077 struct ls_expr * ptr;
47a3dae1
ZD
7078 rtx dest, set, tmp;
7079 int check_anticipatable, check_available;
7080 basic_block bb = BLOCK_FOR_INSN (insn);
a13d4ebf 7081
47a3dae1
ZD
7082 set = single_set (insn);
7083 if (!set)
a13d4ebf
AM
7084 return;
7085
47a3dae1 7086 dest = SET_DEST (set);
589005ff 7087
a13d4ebf
AM
7088 if (GET_CODE (dest) != MEM || MEM_VOLATILE_P (dest)
7089 || GET_MODE (dest) == BLKmode)
aaa4ca30
AJ
7090 return;
7091
47a3dae1
ZD
7092 if (side_effects_p (dest))
7093 return;
aaa4ca30 7094
47a3dae1
ZD
7095 /* If we are handling exceptions, we must be careful with memory references
7096 that may trap. If we are not, the behavior is undefined, so we may just
7097 continue. */
7098 if (flag_exceptions && may_trap_p (dest))
7099 return;
7100
7101 /* Do not consider MEMs that mention stack pointer; in the following
7102 we rely on that constant functions do not read memory, which of course
7103 does not include their arguments if passed on stack.
7104
7105 Note that this is not quite correct -- we may use other registers
7106 to address stack. See store_killed_in_insn for handling of this
7107 case. */
7108 if (reg_mentioned_p (stack_pointer_rtx, dest))
a13d4ebf 7109 return;
aaa4ca30 7110
a13d4ebf 7111 ptr = ldst_entry (dest);
47a3dae1
ZD
7112 if (!ptr->pattern_regs)
7113 ptr->pattern_regs = extract_mentioned_regs (dest);
7114
7115 /* Do not check for anticipatability if we either found one anticipatable
7116 store already, or tested for one and found out that it was killed. */
7117 check_anticipatable = 0;
7118 if (!ANTIC_STORE_LIST (ptr))
7119 check_anticipatable = 1;
7120 else
7121 {
7122 tmp = XEXP (ANTIC_STORE_LIST (ptr), 0);
7123 if (tmp != NULL_RTX
7124 && BLOCK_FOR_INSN (tmp) != bb)
7125 check_anticipatable = 1;
7126 }
7127 if (check_anticipatable)
7128 {
7129 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
7130 tmp = NULL_RTX;
7131 else
7132 tmp = insn;
7133 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp,
7134 ANTIC_STORE_LIST (ptr));
7135 }
a13d4ebf 7136
47a3dae1
ZD
7137 /* It is not neccessary to check whether store is available if we did
7138 it successfully before; if we failed before, do not bother to check
7139 until we reach the insn that caused us to fail. */
7140 check_available = 0;
7141 if (!AVAIL_STORE_LIST (ptr))
7142 check_available = 1;
7143 else
7144 {
7145 tmp = XEXP (AVAIL_STORE_LIST (ptr), 0);
7146 if (BLOCK_FOR_INSN (tmp) != bb)
7147 check_available = 1;
7148 }
7149 if (check_available)
7150 {
7151 /* Check that we have already reached the insn at that the check
7152 failed last time. */
7153 if (LAST_AVAIL_CHECK_FAILURE (ptr))
7154 {
7155 for (tmp = bb->end;
7156 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
7157 tmp = PREV_INSN (tmp))
7158 continue;
7159 if (tmp == insn)
7160 check_available = 0;
7161 }
7162 else
7163 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
7164 bb, regs_set_after,
7165 &LAST_AVAIL_CHECK_FAILURE (ptr));
7166 }
7167 if (!check_available)
7168 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr));
7169}
7170
7171/* Find available and anticipatable stores. */
a13d4ebf
AM
7172
7173static int
7174compute_store_table ()
7175{
e0082a72
ZD
7176 int ret;
7177 basic_block bb;
aaa4ca30 7178 unsigned regno;
47a3dae1
ZD
7179 rtx insn, pat, tmp;
7180 int *last_set_in, *already_set;
7181 struct ls_expr * ptr, **prev_next_ptr_ptr;
aaa4ca30 7182
a13d4ebf
AM
7183 max_gcse_regno = max_reg_num ();
7184
d55bc081 7185 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (last_basic_block,
aaa4ca30 7186 max_gcse_regno);
d55bc081 7187 sbitmap_vector_zero (reg_set_in_block, last_basic_block);
a13d4ebf 7188 pre_ldst_mems = 0;
47a3dae1
ZD
7189 last_set_in = xmalloc (sizeof (int) * max_gcse_regno);
7190 already_set = xmalloc (sizeof (int) * max_gcse_regno);
aaa4ca30 7191
a13d4ebf 7192 /* Find all the stores we care about. */
e0082a72 7193 FOR_EACH_BB (bb)
a13d4ebf 7194 {
47a3dae1
ZD
7195 /* First compute the registers set in this block. */
7196 memset (last_set_in, 0, sizeof (int) * max_gcse_regno);
7197 regvec = last_set_in;
7198
7199 for (insn = bb->head;
7200 insn != NEXT_INSN (bb->end);
7201 insn = NEXT_INSN (insn))
7202 {
7203 if (! INSN_P (insn))
7204 continue;
7205
7206 if (GET_CODE (insn) == CALL_INSN)
7207 {
7208 bool clobbers_all = false;
7209#ifdef NON_SAVING_SETJMP
7210 if (NON_SAVING_SETJMP
7211 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
7212 clobbers_all = true;
7213#endif
7214
7215 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
7216 if (clobbers_all
7217 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
7218 last_set_in[regno] = INSN_UID (insn);
7219 }
7220
7221 pat = PATTERN (insn);
7222 compute_store_table_current_insn = insn;
7223 note_stores (pat, reg_set_info, NULL);
7224 }
7225
7226 /* Record the set registers. */
7227 for (regno = 0; regno < max_gcse_regno; regno++)
7228 if (last_set_in[regno])
7229 SET_BIT (reg_set_in_block[bb->index], regno);
7230
7231 /* Now find the stores. */
7232 memset (already_set, 0, sizeof (int) * max_gcse_regno);
7233 regvec = already_set;
7234 for (insn = bb->head;
7235 insn != NEXT_INSN (bb->end);
7236 insn = NEXT_INSN (insn))
a13d4ebf 7237 {
19652adf 7238 if (! INSN_P (insn))
a13d4ebf
AM
7239 continue;
7240
aaa4ca30
AJ
7241 if (GET_CODE (insn) == CALL_INSN)
7242 {
19652adf 7243 bool clobbers_all = false;
589005ff 7244#ifdef NON_SAVING_SETJMP
19652adf
ZW
7245 if (NON_SAVING_SETJMP
7246 && find_reg_note (insn, REG_SETJMP, NULL_RTX))
7247 clobbers_all = true;
7248#endif
7249
aaa4ca30 7250 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
19652adf
ZW
7251 if (clobbers_all
7252 || TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
47a3dae1 7253 already_set[regno] = 1;
aaa4ca30 7254 }
589005ff 7255
a13d4ebf 7256 pat = PATTERN (insn);
aaa4ca30 7257 note_stores (pat, reg_set_info, NULL);
589005ff 7258
a13d4ebf 7259 /* Now that we've marked regs, look for stores. */
47a3dae1
ZD
7260 find_moveable_store (insn, already_set, last_set_in);
7261
7262 /* Unmark regs that are no longer set. */
7263 for (regno = 0; regno < max_gcse_regno; regno++)
7264 if (last_set_in[regno] == INSN_UID (insn))
7265 last_set_in[regno] = 0;
7266 }
7267
7268 /* Clear temporary marks. */
7269 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
7270 {
7271 LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX;
7272 if (ANTIC_STORE_LIST (ptr)
7273 && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX)
7274 ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1);
7275 }
7276 }
7277
7278 /* Remove the stores that are not available anywhere, as there will
7279 be no opportunity to optimize them. */
7280 for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems;
7281 ptr != NULL;
7282 ptr = *prev_next_ptr_ptr)
7283 {
7284 if (!AVAIL_STORE_LIST (ptr))
7285 {
7286 *prev_next_ptr_ptr = ptr->next;
7287 free_ldst_entry (ptr);
a13d4ebf 7288 }
47a3dae1
ZD
7289 else
7290 prev_next_ptr_ptr = &ptr->next;
a13d4ebf
AM
7291 }
7292
7293 ret = enumerate_ldsts ();
589005ff 7294
a13d4ebf
AM
7295 if (gcse_file)
7296 {
47a3dae1 7297 fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n");
a13d4ebf
AM
7298 print_ldst_list (gcse_file);
7299 }
589005ff 7300
47a3dae1
ZD
7301 free (last_set_in);
7302 free (already_set);
a13d4ebf
AM
7303 return ret;
7304}
7305
aaa4ca30 7306/* Check to see if the load X is aliased with STORE_PATTERN. */
a13d4ebf 7307
47a3dae1 7308static bool
a13d4ebf
AM
7309load_kills_store (x, store_pattern)
7310 rtx x, store_pattern;
7311{
7312 if (true_dependence (x, GET_MODE (x), store_pattern, rtx_addr_varies_p))
47a3dae1
ZD
7313 return true;
7314 return false;
a13d4ebf
AM
7315}
7316
589005ff 7317/* Go through the entire insn X, looking for any loads which might alias
47a3dae1 7318 STORE_PATTERN. Return true if found. */
a13d4ebf 7319
47a3dae1 7320static bool
a13d4ebf
AM
7321find_loads (x, store_pattern)
7322 rtx x, store_pattern;
7323{
7324 const char * fmt;
8e42ace1 7325 int i, j;
47a3dae1 7326 int ret = false;
a13d4ebf 7327
24a28584 7328 if (!x)
47a3dae1 7329 return false;
24a28584 7330
589005ff 7331 if (GET_CODE (x) == SET)
a13d4ebf
AM
7332 x = SET_SRC (x);
7333
7334 if (GET_CODE (x) == MEM)
7335 {
7336 if (load_kills_store (x, store_pattern))
47a3dae1 7337 return true;
a13d4ebf
AM
7338 }
7339
7340 /* Recursively process the insn. */
7341 fmt = GET_RTX_FORMAT (GET_CODE (x));
589005ff 7342
a13d4ebf
AM
7343 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
7344 {
7345 if (fmt[i] == 'e')
7346 ret |= find_loads (XEXP (x, i), store_pattern);
7347 else if (fmt[i] == 'E')
7348 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7349 ret |= find_loads (XVECEXP (x, i, j), store_pattern);
7350 }
7351 return ret;
7352}
7353
589005ff 7354/* Check if INSN kills the store pattern X (is aliased with it).
47a3dae1 7355 Return true if it it does. */
a13d4ebf 7356
47a3dae1
ZD
7357static bool
7358store_killed_in_insn (x, x_regs, insn)
7359 rtx x, x_regs, insn;
a13d4ebf
AM
7360{
7361 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
47a3dae1 7362 return false;
589005ff 7363
a13d4ebf
AM
7364 if (GET_CODE (insn) == CALL_INSN)
7365 {
1218665b
JJ
7366 /* A normal or pure call might read from pattern,
7367 but a const call will not. */
47a3dae1
ZD
7368 if (! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn))
7369 return true;
7370
7371 /* But even a const call reads its parameters. It is not trivial
7372 check that base of the mem is not related to stack pointer,
7373 so unless it contains no registers, just assume it may. */
7374 if (x_regs)
7375 return true;
7376
7377 return false;
a13d4ebf 7378 }
589005ff 7379
a13d4ebf
AM
7380 if (GET_CODE (PATTERN (insn)) == SET)
7381 {
7382 rtx pat = PATTERN (insn);
7383 /* Check for memory stores to aliased objects. */
7384 if (GET_CODE (SET_DEST (pat)) == MEM && !expr_equiv_p (SET_DEST (pat), x))
aaa4ca30 7385 /* pretend its a load and check for aliasing. */
a13d4ebf 7386 if (find_loads (SET_DEST (pat), x))
47a3dae1 7387 return true;
a13d4ebf
AM
7388 return find_loads (SET_SRC (pat), x);
7389 }
7390 else
7391 return find_loads (PATTERN (insn), x);
7392}
7393
47a3dae1
ZD
7394/* Returns true if the expression X is loaded or clobbered on or after INSN
7395 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
7396 or after the insn. X_REGS is list of registers mentioned in X. If the store
7397 is killed, return the last insn in that it occurs in FAIL_INSN. */
a13d4ebf 7398
47a3dae1
ZD
7399static bool
7400store_killed_after (x, x_regs, insn, bb, regs_set_after, fail_insn)
7401 rtx x, x_regs, insn;
e2d2ed72 7402 basic_block bb;
47a3dae1
ZD
7403 int *regs_set_after;
7404 rtx *fail_insn;
a13d4ebf 7405{
47a3dae1 7406 rtx last = bb->end, act;
aaa4ca30 7407
47a3dae1
ZD
7408 if (!store_ops_ok (x_regs, regs_set_after))
7409 {
7410 /* We do not know where it will happen. */
7411 if (fail_insn)
7412 *fail_insn = NULL_RTX;
7413 return true;
7414 }
a13d4ebf 7415
47a3dae1
ZD
7416 /* Scan from the end, so that fail_insn is determined correctly. */
7417 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
7418 if (store_killed_in_insn (x, x_regs, act))
7419 {
7420 if (fail_insn)
7421 *fail_insn = act;
7422 return true;
7423 }
589005ff 7424
47a3dae1 7425 return false;
a13d4ebf 7426}
47a3dae1
ZD
7427
7428/* Returns true if the expression X is loaded or clobbered on or before INSN
7429 within basic block BB. X_REGS is list of registers mentioned in X.
7430 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
7431static bool
7432store_killed_before (x, x_regs, insn, bb, regs_set_before)
7433 rtx x, x_regs, insn;
e2d2ed72 7434 basic_block bb;
47a3dae1 7435 int *regs_set_before;
a13d4ebf 7436{
8e42ace1 7437 rtx first = bb->head;
a13d4ebf 7438
47a3dae1
ZD
7439 if (!store_ops_ok (x_regs, regs_set_before))
7440 return true;
a13d4ebf 7441
47a3dae1
ZD
7442 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
7443 if (store_killed_in_insn (x, x_regs, insn))
7444 return true;
589005ff 7445
47a3dae1 7446 return false;
a13d4ebf 7447}
47a3dae1
ZD
7448
7449/* Fill in available, anticipatable, transparent and kill vectors in
7450 STORE_DATA, based on lists of available and anticipatable stores. */
a13d4ebf 7451static void
589005ff 7452build_store_vectors ()
a13d4ebf 7453{
47a3dae1
ZD
7454 basic_block bb;
7455 int *regs_set_in_block;
a13d4ebf
AM
7456 rtx insn, st;
7457 struct ls_expr * ptr;
47a3dae1 7458 unsigned regno;
a13d4ebf
AM
7459
7460 /* Build the gen_vector. This is any store in the table which is not killed
7461 by aliasing later in its block. */
d55bc081
ZD
7462 ae_gen = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7463 sbitmap_vector_zero (ae_gen, last_basic_block);
a13d4ebf 7464
d55bc081
ZD
7465 st_antloc = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7466 sbitmap_vector_zero (st_antloc, last_basic_block);
aaa4ca30 7467
a13d4ebf 7468 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
589005ff 7469 {
47a3dae1 7470 for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
a13d4ebf
AM
7471 {
7472 insn = XEXP (st, 0);
e2d2ed72 7473 bb = BLOCK_FOR_INSN (insn);
589005ff 7474
47a3dae1
ZD
7475 /* If we've already seen an available expression in this block,
7476 we can delete this one (It occurs earlier in the block). We'll
7477 copy the SRC expression to an unused register in case there
7478 are any side effects. */
7479 if (TEST_BIT (ae_gen[bb->index], ptr->index))
a13d4ebf 7480 {
47a3dae1
ZD
7481 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
7482 if (gcse_file)
7483 fprintf (gcse_file, "Removing redundant store:\n");
7484 replace_store_insn (r, XEXP (st, 0), bb);
7485 continue;
a13d4ebf 7486 }
47a3dae1 7487 SET_BIT (ae_gen[bb->index], ptr->index);
a13d4ebf 7488 }
589005ff 7489
47a3dae1
ZD
7490 for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1))
7491 {
7492 insn = XEXP (st, 0);
7493 bb = BLOCK_FOR_INSN (insn);
7494 SET_BIT (st_antloc[bb->index], ptr->index);
7495 }
a13d4ebf 7496 }
589005ff 7497
d55bc081
ZD
7498 ae_kill = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7499 sbitmap_vector_zero (ae_kill, last_basic_block);
a13d4ebf 7500
d55bc081
ZD
7501 transp = (sbitmap *) sbitmap_vector_alloc (last_basic_block, num_stores);
7502 sbitmap_vector_zero (transp, last_basic_block);
47a3dae1 7503 regs_set_in_block = xmalloc (sizeof (int) * max_gcse_regno);
a13d4ebf 7504
47a3dae1
ZD
7505 FOR_EACH_BB (bb)
7506 {
7507 for (regno = 0; regno < max_gcse_regno; regno++)
7508 regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno);
7509
7510 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
7511 {
7512 if (store_killed_after (ptr->pattern, ptr->pattern_regs, bb->head,
7513 bb, regs_set_in_block, NULL))
7514 {
7515 /* It should not be neccessary to consider the expression
7516 killed if it is both anticipatable and available. */
7517 if (!TEST_BIT (st_antloc[bb->index], ptr->index)
7518 || !TEST_BIT (ae_gen[bb->index], ptr->index))
7519 SET_BIT (ae_kill[bb->index], ptr->index);
7520 }
7521 else
7522 SET_BIT (transp[bb->index], ptr->index);
7523 }
7524 }
7525
7526 free (regs_set_in_block);
aaa4ca30 7527
589005ff 7528 if (gcse_file)
aaa4ca30 7529 {
d55bc081
ZD
7530 dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block);
7531 dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block);
7532 dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block);
7533 dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block);
a13d4ebf
AM
7534 }
7535}
7536
fbe5a4a6 7537/* Insert an instruction at the beginning of a basic block, and update
a13d4ebf
AM
7538 the BLOCK_HEAD if needed. */
7539
589005ff 7540static void
a13d4ebf
AM
7541insert_insn_start_bb (insn, bb)
7542 rtx insn;
e2d2ed72 7543 basic_block bb;
a13d4ebf
AM
7544{
7545 /* Insert at start of successor block. */
e2d2ed72
AM
7546 rtx prev = PREV_INSN (bb->head);
7547 rtx before = bb->head;
a13d4ebf
AM
7548 while (before != 0)
7549 {
7550 if (GET_CODE (before) != CODE_LABEL
7551 && (GET_CODE (before) != NOTE
7552 || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK))
7553 break;
7554 prev = before;
e2d2ed72 7555 if (prev == bb->end)
a13d4ebf
AM
7556 break;
7557 before = NEXT_INSN (before);
7558 }
7559
7560 insn = emit_insn_after (insn, prev);
7561
a13d4ebf
AM
7562 if (gcse_file)
7563 {
7564 fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n",
0b17ab2f 7565 bb->index);
a13d4ebf
AM
7566 print_inline_rtx (gcse_file, insn, 6);
7567 fprintf (gcse_file, "\n");
7568 }
7569}
7570
7571/* This routine will insert a store on an edge. EXPR is the ldst entry for
cc2902df 7572 the memory reference, and E is the edge to insert it on. Returns nonzero
a13d4ebf
AM
7573 if an edge insertion was performed. */
7574
7575static int
7576insert_store (expr, e)
7577 struct ls_expr * expr;
7578 edge e;
7579{
7580 rtx reg, insn;
e2d2ed72 7581 basic_block bb;
a13d4ebf
AM
7582 edge tmp;
7583
7584 /* We did all the deleted before this insert, so if we didn't delete a
7585 store, then we haven't set the reaching reg yet either. */
7586 if (expr->reaching_reg == NULL_RTX)
7587 return 0;
7588
7589 reg = expr->reaching_reg;
47a3dae1 7590 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
589005ff 7591
a13d4ebf
AM
7592 /* If we are inserting this expression on ALL predecessor edges of a BB,
7593 insert it at the start of the BB, and reset the insert bits on the other
ff7cc307 7594 edges so we don't try to insert it on the other edges. */
e2d2ed72 7595 bb = e->dest;
a13d4ebf
AM
7596 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
7597 {
7598 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
7599 if (index == EDGE_INDEX_NO_EDGE)
7600 abort ();
7601 if (! TEST_BIT (pre_insert_map[index], expr->index))
7602 break;
7603 }
7604
7605 /* If tmp is NULL, we found an insertion on every edge, blank the
7606 insertion vector for these edges, and insert at the start of the BB. */
e2d2ed72 7607 if (!tmp && bb != EXIT_BLOCK_PTR)
a13d4ebf
AM
7608 {
7609 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
7610 {
7611 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
7612 RESET_BIT (pre_insert_map[index], expr->index);
7613 }
7614 insert_insn_start_bb (insn, bb);
7615 return 0;
7616 }
589005ff 7617
a13d4ebf
AM
7618 /* We can't insert on this edge, so we'll insert at the head of the
7619 successors block. See Morgan, sec 10.5. */
7620 if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
7621 {
7622 insert_insn_start_bb (insn, bb);
7623 return 0;
7624 }
7625
7626 insert_insn_on_edge (insn, e);
589005ff 7627
a13d4ebf
AM
7628 if (gcse_file)
7629 {
7630 fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
0b17ab2f 7631 e->src->index, e->dest->index);
a13d4ebf
AM
7632 print_inline_rtx (gcse_file, insn, 6);
7633 fprintf (gcse_file, "\n");
7634 }
589005ff 7635
a13d4ebf
AM
7636 return 1;
7637}
7638
7639/* This routine will replace a store with a SET to a specified register. */
7640
7641static void
7642replace_store_insn (reg, del, bb)
7643 rtx reg, del;
e2d2ed72 7644 basic_block bb;
a13d4ebf
AM
7645{
7646 rtx insn;
589005ff 7647
a13d4ebf
AM
7648 insn = gen_move_insn (reg, SET_SRC (PATTERN (del)));
7649 insn = emit_insn_after (insn, del);
589005ff 7650
a13d4ebf
AM
7651 if (gcse_file)
7652 {
589005ff 7653 fprintf (gcse_file,
0b17ab2f 7654 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
a13d4ebf 7655 print_inline_rtx (gcse_file, del, 6);
8e42ace1 7656 fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n ");
a13d4ebf 7657 print_inline_rtx (gcse_file, insn, 6);
8e42ace1 7658 fprintf (gcse_file, "\n");
a13d4ebf 7659 }
589005ff 7660
49ce134f 7661 delete_insn (del);
a13d4ebf
AM
7662}
7663
7664
7665/* Delete a store, but copy the value that would have been stored into
7666 the reaching_reg for later storing. */
7667
7668static void
7669delete_store (expr, bb)
7670 struct ls_expr * expr;
e2d2ed72 7671 basic_block bb;
a13d4ebf
AM
7672{
7673 rtx reg, i, del;
7674
7675 if (expr->reaching_reg == NULL_RTX)
7676 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
a13d4ebf 7677
a13d4ebf 7678 reg = expr->reaching_reg;
589005ff 7679
a13d4ebf
AM
7680 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
7681 {
7682 del = XEXP (i, 0);
e2d2ed72 7683 if (BLOCK_FOR_INSN (del) == bb)
a13d4ebf 7684 {
589005ff 7685 /* We know there is only one since we deleted redundant
a13d4ebf
AM
7686 ones during the available computation. */
7687 replace_store_insn (reg, del, bb);
7688 break;
7689 }
7690 }
7691}
7692
7693/* Free memory used by store motion. */
7694
589005ff 7695static void
a13d4ebf
AM
7696free_store_memory ()
7697{
7698 free_ldst_mems ();
589005ff 7699
a13d4ebf 7700 if (ae_gen)
5a660bff 7701 sbitmap_vector_free (ae_gen);
a13d4ebf 7702 if (ae_kill)
5a660bff 7703 sbitmap_vector_free (ae_kill);
a13d4ebf 7704 if (transp)
5a660bff 7705 sbitmap_vector_free (transp);
a13d4ebf 7706 if (st_antloc)
5a660bff 7707 sbitmap_vector_free (st_antloc);
a13d4ebf 7708 if (pre_insert_map)
5a660bff 7709 sbitmap_vector_free (pre_insert_map);
a13d4ebf 7710 if (pre_delete_map)
5a660bff 7711 sbitmap_vector_free (pre_delete_map);
aaa4ca30
AJ
7712 if (reg_set_in_block)
7713 sbitmap_vector_free (reg_set_in_block);
589005ff 7714
a13d4ebf
AM
7715 ae_gen = ae_kill = transp = st_antloc = NULL;
7716 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
7717}
7718
7719/* Perform store motion. Much like gcse, except we move expressions the
7720 other way by looking at the flowgraph in reverse. */
7721
7722static void
7723store_motion ()
7724{
e0082a72 7725 basic_block bb;
0b17ab2f 7726 int x;
a13d4ebf 7727 struct ls_expr * ptr;
adfcce61 7728 int update_flow = 0;
aaa4ca30 7729
a13d4ebf
AM
7730 if (gcse_file)
7731 {
7732 fprintf (gcse_file, "before store motion\n");
7733 print_rtl (gcse_file, get_insns ());
7734 }
7735
7736
7737 init_alias_analysis ();
aaa4ca30 7738
47a3dae1 7739 /* Find all the available and anticipatable stores. */
a13d4ebf
AM
7740 num_stores = compute_store_table ();
7741 if (num_stores == 0)
7742 {
aaa4ca30 7743 sbitmap_vector_free (reg_set_in_block);
a13d4ebf
AM
7744 end_alias_analysis ();
7745 return;
7746 }
7747
47a3dae1 7748 /* Now compute kill & transp vectors. */
a13d4ebf 7749 build_store_vectors ();
47a3dae1 7750 add_noreturn_fake_exit_edges ();
a13d4ebf 7751
589005ff
KH
7752 edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
7753 st_antloc, ae_kill, &pre_insert_map,
a13d4ebf
AM
7754 &pre_delete_map);
7755
7756 /* Now we want to insert the new stores which are going to be needed. */
7757 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
7758 {
e0082a72
ZD
7759 FOR_EACH_BB (bb)
7760 if (TEST_BIT (pre_delete_map[bb->index], ptr->index))
7761 delete_store (ptr, bb);
a13d4ebf 7762
0b17ab2f
RH
7763 for (x = 0; x < NUM_EDGES (edge_list); x++)
7764 if (TEST_BIT (pre_insert_map[x], ptr->index))
7765 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
a13d4ebf
AM
7766 }
7767
7768 if (update_flow)
7769 commit_edge_insertions ();
aaa4ca30 7770
a13d4ebf
AM
7771 free_store_memory ();
7772 free_edge_list (edge_list);
7773 remove_fake_edges ();
7774 end_alias_analysis ();
7775}
e2500fed 7776
a0134312
RS
7777\f
7778/* Entry point for jump bypassing optimization pass. */
7779
7780int
7781bypass_jumps (file)
7782 FILE *file;
7783{
7784 int changed;
7785
7786 /* We do not construct an accurate cfg in functions which call
7787 setjmp, so just punt to be safe. */
7788 if (current_function_calls_setjmp)
7789 return 0;
7790
7791 /* For calling dump_foo fns from gdb. */
7792 debug_stderr = stderr;
7793 gcse_file = file;
7794
7795 /* Identify the basic block information for this function, including
7796 successors and predecessors. */
7797 max_gcse_regno = max_reg_num ();
7798
7799 if (file)
7800 dump_flow_info (file);
7801
7802 /* Return if there's nothing to do. */
7803 if (n_basic_blocks <= 1)
7804 return 0;
7805
7806 /* Trying to perform global optimizations on flow graphs which have
7807 a high connectivity will take a long time and is unlikely to be
7808 particularly useful.
7809
7810 In normal circumstances a cfg should have about twice as many edges
7811 as blocks. But we do not want to punish small functions which have
7812 a couple switch statements. So we require a relatively large number
7813 of basic blocks and the ratio of edges to blocks to be high. */
7814 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
7815 {
7816 if (warn_disabled_optimization)
7817 warning ("BYPASS disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
7818 n_basic_blocks, n_edges / n_basic_blocks);
7819 return 0;
7820 }
7821
7822 /* If allocating memory for the cprop bitmap would take up too much
7823 storage it's better just to disable the optimization. */
7824 if ((n_basic_blocks
7825 * SBITMAP_SET_SIZE (max_gcse_regno)
7826 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
7827 {
7828 if (warn_disabled_optimization)
7829 warning ("GCSE disabled: %d basic blocks and %d registers",
7830 n_basic_blocks, max_gcse_regno);
7831
7832 return 0;
7833 }
7834
7835 /* See what modes support reg/reg copy operations. */
7836 if (! can_copy_init_p)
7837 {
7838 compute_can_copy ();
7839 can_copy_init_p = 1;
7840 }
7841
7842 gcc_obstack_init (&gcse_obstack);
7843 bytes_used = 0;
7844
7845 /* We need alias. */
7846 init_alias_analysis ();
7847
7848 /* Record where pseudo-registers are set. This data is kept accurate
7849 during each pass. ??? We could also record hard-reg information here
7850 [since it's unchanging], however it is currently done during hash table
7851 computation.
7852
7853 It may be tempting to compute MEM set information here too, but MEM sets
7854 will be subject to code motion one day and thus we need to compute
7855 information about memory sets when we build the hash tables. */
7856
7857 alloc_reg_set_mem (max_gcse_regno);
7858 compute_sets (get_insns ());
7859
7860 max_gcse_regno = max_reg_num ();
7861 alloc_gcse_mem (get_insns ());
7862 changed = one_cprop_pass (1, 1, 1);
7863 free_gcse_mem ();
7864
7865 if (file)
7866 {
7867 fprintf (file, "BYPASS of %s: %d basic blocks, ",
7868 current_function_name, n_basic_blocks);
7869 fprintf (file, "%d bytes\n\n", bytes_used);
7870 }
7871
7872 obstack_free (&gcse_obstack, NULL);
7873 free_reg_set_mem ();
7874
7875 /* We are finished with alias. */
7876 end_alias_analysis ();
7877 allocate_reg_info (max_reg_num (), FALSE, FALSE);
7878
7879 return changed;
7880}
7881
e2500fed 7882#include "gt-gcse.h"