]>
Commit | Line | Data |
---|---|---|
07abdb66 | 1 | /* Partial redundancy elimination / Hoisting for RTL. |
d353bf18 | 2 | Copyright (C) 1997-2015 Free Software Foundation, Inc. |
18aa2adf | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
18aa2adf | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 8 | Software Foundation; either version 3, or (at your option) any later |
f12b58b3 | 9 | version. |
18aa2adf | 10 | |
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
18aa2adf | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
18aa2adf | 19 | |
20 | /* TODO | |
21 | - reordering of memory allocation and freeing to be more space efficient | |
1ec78e16 | 22 | - calc rough register pressure information and use the info to drive all |
23 | kinds of code motion (including code hoisting) in a unified way. | |
18aa2adf | 24 | */ |
25 | ||
26 | /* References searched while implementing this. | |
18aa2adf | 27 | |
28 | Compilers Principles, Techniques and Tools | |
29 | Aho, Sethi, Ullman | |
30 | Addison-Wesley, 1988 | |
31 | ||
32 | Global Optimization by Suppression of Partial Redundancies | |
33 | E. Morel, C. Renvoise | |
34 | communications of the acm, Vol. 22, Num. 2, Feb. 1979 | |
35 | ||
36 | A Portable Machine-Independent Global Optimizer - Design and Measurements | |
37 | Frederick Chow | |
38 | Stanford Ph.D. thesis, Dec. 1983 | |
39 | ||
18aa2adf | 40 | A Fast Algorithm for Code Movement Optimization |
41 | D.M. Dhamdhere | |
42 | SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988 | |
43 | ||
44 | A Solution to a Problem with Morel and Renvoise's | |
45 | Global Optimization by Suppression of Partial Redundancies | |
46 | K-H Drechsler, M.P. Stadel | |
47 | ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988 | |
48 | ||
49 | Practical Adaptation of the Global Optimization | |
50 | Algorithm of Morel and Renvoise | |
51 | D.M. Dhamdhere | |
52 | ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991 | |
53 | ||
54 | Efficiently Computing Static Single Assignment Form and the Control | |
55 | Dependence Graph | |
56 | R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck | |
57 | ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991 | |
58 | ||
18aa2adf | 59 | Lazy Code Motion |
60 | J. Knoop, O. Ruthing, B. Steffen | |
61 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
62 | ||
63 | What's In a Region? Or Computing Control Dependence Regions in Near-Linear | |
64 | Time for Reducible Flow Control | |
65 | Thomas Ball | |
66 | ACM Letters on Programming Languages and Systems, | |
67 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
68 | ||
69 | An Efficient Representation for Sparse Sets | |
70 | Preston Briggs, Linda Torczon | |
71 | ACM Letters on Programming Languages and Systems, | |
72 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
73 | ||
74 | A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion | |
75 | K-H Drechsler, M.P. Stadel | |
76 | ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993 | |
77 | ||
78 | Partial Dead Code Elimination | |
79 | J. Knoop, O. Ruthing, B. Steffen | |
80 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
81 | ||
82 | Effective Partial Redundancy Elimination | |
83 | P. Briggs, K.D. Cooper | |
84 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
85 | ||
86 | The Program Structure Tree: Computing Control Regions in Linear Time | |
87 | R. Johnson, D. Pearson, K. Pingali | |
88 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
89 | ||
90 | Optimal Code Motion: Theory and Practice | |
91 | J. Knoop, O. Ruthing, B. Steffen | |
92 | ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994 | |
93 | ||
94 | The power of assignment motion | |
95 | J. Knoop, O. Ruthing, B. Steffen | |
96 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
97 | ||
98 | Global code motion / global value numbering | |
99 | C. Click | |
100 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
101 | ||
102 | Value Driven Redundancy Elimination | |
103 | L.T. Simpson | |
104 | Rice University Ph.D. thesis, Apr. 1996 | |
105 | ||
106 | Value Numbering | |
107 | L.T. Simpson | |
108 | Massively Scalar Compiler Project, Rice University, Sep. 1996 | |
109 | ||
110 | High Performance Compilers for Parallel Computing | |
111 | Michael Wolfe | |
112 | Addison-Wesley, 1996 | |
113 | ||
ef0d57a0 | 114 | Advanced Compiler Design and Implementation |
115 | Steven Muchnick | |
116 | Morgan Kaufmann, 1997 | |
117 | ||
7bcd381b | 118 | Building an Optimizing Compiler |
119 | Robert Morgan | |
120 | Digital Press, 1998 | |
121 | ||
ef0d57a0 | 122 | People wishing to speed up the code here should read: |
123 | Elimination Algorithms for Data Flow Analysis | |
124 | B.G. Ryder, M.C. Paull | |
125 | ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986 | |
126 | ||
127 | How to Analyze Large Programs Efficiently and Informatively | |
128 | D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck | |
129 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
130 | ||
18aa2adf | 131 | People wishing to do something different can find various possibilities |
132 | in the above papers and elsewhere. | |
133 | */ | |
134 | ||
135 | #include "config.h" | |
ebd9163c | 136 | #include "system.h" |
805e22b2 | 137 | #include "coretypes.h" |
9ef16211 | 138 | #include "backend.h" |
139 | #include "tree.h" | |
140 | #include "rtl.h" | |
141 | #include "df.h" | |
0b205f4c | 142 | #include "diagnostic-core.h" |
d3b64f2d | 143 | #include "toplev.h" |
b20a8bb4 | 144 | #include "alias.h" |
7953c610 | 145 | #include "tm_p.h" |
18aa2adf | 146 | #include "regs.h" |
1ec78e16 | 147 | #include "ira.h" |
18aa2adf | 148 | #include "flags.h" |
18aa2adf | 149 | #include "insn-config.h" |
150 | #include "recog.h" | |
94ea8568 | 151 | #include "cfgrtl.h" |
152 | #include "cfganal.h" | |
153 | #include "lcm.h" | |
154 | #include "cfgcleanup.h" | |
d53441c8 | 155 | #include "expmed.h" |
156 | #include "dojump.h" | |
157 | #include "explow.h" | |
158 | #include "calls.h" | |
159 | #include "emit-rtl.h" | |
160 | #include "varasm.h" | |
161 | #include "stmt.h" | |
3cfec666 | 162 | #include "expr.h" |
a17466fa | 163 | #include "except.h" |
9159979b | 164 | #include "params.h" |
f7d27fdc | 165 | #include "alloc-pool.h" |
09a762be | 166 | #include "cselib.h" |
c8a8ab0f | 167 | #include "intl.h" |
18aa2adf | 168 | #include "obstack.h" |
77fce4cd | 169 | #include "tree-pass.h" |
3072d30e | 170 | #include "dbgcnt.h" |
2b86a75a | 171 | #include "target.h" |
049d15fc | 172 | #include "gcse.h" |
d2ac64b1 | 173 | #include "gcse-common.h" |
4059f3f0 | 174 | |
ef0d57a0 | 175 | /* We support GCSE via Partial Redundancy Elimination. PRE optimizations |
05476866 | 176 | are a superset of those done by classic GCSE. |
18aa2adf | 177 | |
07abdb66 | 178 | Two passes of copy/constant propagation are done around PRE or hoisting |
179 | because the first one enables more GCSE and the second one helps to clean | |
180 | up the copies that PRE and HOIST create. This is needed more for PRE than | |
181 | for HOIST because code hoisting will try to use an existing register | |
182 | containing the common subexpression rather than create a new one. This is | |
183 | harder to do for PRE because of the code motion (which HOIST doesn't do). | |
18aa2adf | 184 | |
185 | Expressions we are interested in GCSE-ing are of the form | |
186 | (set (pseudo-reg) (expression)). | |
187 | Function want_to_gcse_p says what these are. | |
188 | ||
05476866 | 189 | In addition, expressions in REG_EQUAL notes are candidates for GCSE-ing. |
d45a307d | 190 | This allows PRE to hoist expressions that are expressed in multiple insns, |
05476866 | 191 | such as complex address calculations (e.g. for PIC code, or loads with a |
192 | high part and a low part). | |
d45a307d | 193 | |
18aa2adf | 194 | PRE handles moving invariant expressions out of loops (by treating them as |
ef0d57a0 | 195 | partially redundant). |
18aa2adf | 196 | |
18aa2adf | 197 | ********************** |
198 | ||
199 | We used to support multiple passes but there are diminishing returns in | |
200 | doing so. The first pass usually makes 90% of the changes that are doable. | |
201 | A second pass can make a few more changes made possible by the first pass. | |
202 | Experiments show any further passes don't make enough changes to justify | |
203 | the expense. | |
204 | ||
205 | A study of spec92 using an unlimited number of passes: | |
206 | [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83, | |
207 | [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2, | |
208 | [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1 | |
209 | ||
210 | It was found doing copy propagation between each pass enables further | |
211 | substitutions. | |
212 | ||
d45a307d | 213 | This study was done before expressions in REG_EQUAL notes were added as |
214 | candidate expressions for optimization, and before the GIMPLE optimizers | |
215 | were added. Probably, multiple passes is even less efficient now than | |
216 | at the time when the study was conducted. | |
217 | ||
18aa2adf | 218 | PRE is quite expensive in complicated functions because the DFA can take |
d45a307d | 219 | a while to converge. Hence we only perform one pass. |
18aa2adf | 220 | |
221 | ********************** | |
222 | ||
223 | The steps for PRE are: | |
224 | ||
225 | 1) Build the hash table of expressions we wish to GCSE (expr_hash_table). | |
226 | ||
227 | 2) Perform the data flow analysis for PRE. | |
228 | ||
229 | 3) Delete the redundant instructions | |
230 | ||
231 | 4) Insert the required copies [if any] that make the partially | |
232 | redundant instructions fully redundant. | |
233 | ||
234 | 5) For other reaching expressions, insert an instruction to copy the value | |
235 | to a newly created pseudo that will reach the redundant instruction. | |
236 | ||
237 | The deletion is done first so that when we do insertions we | |
238 | know which pseudo reg to use. | |
239 | ||
240 | Various papers have argued that PRE DFA is expensive (O(n^2)) and others | |
241 | argue it is not. The number of iterations for the algorithm to converge | |
242 | is typically 2-4 so I don't view it as that expensive (relatively speaking). | |
243 | ||
05476866 | 244 | PRE GCSE depends heavily on the second CPROP pass to clean up the copies |
18aa2adf | 245 | we create. To make an expression reach the place where it's redundant, |
246 | the result of the expression is copied to a new register, and the redundant | |
247 | expression is deleted by replacing it with this new register. Classic GCSE | |
248 | doesn't have this problem as much as it computes the reaching defs of | |
04a40f24 | 249 | each register in each block and thus can try to use an existing |
250 | register. */ | |
18aa2adf | 251 | \f |
252 | /* GCSE global vars. */ | |
253 | ||
049d15fc | 254 | struct target_gcse default_target_gcse; |
255 | #if SWITCHABLE_TARGET | |
256 | struct target_gcse *this_target_gcse = &default_target_gcse; | |
257 | #endif | |
258 | ||
d743aba2 | 259 | /* Set to non-zero if CSE should run after all GCSE optimizations are done. */ |
260 | int flag_rerun_cse_after_global_opts; | |
ef0d57a0 | 261 | |
18aa2adf | 262 | /* An obstack for our working variables. */ |
263 | static struct obstack gcse_obstack; | |
264 | ||
18aa2adf | 265 | /* Hash table of expressions. */ |
266 | ||
9908fe4d | 267 | struct gcse_expr |
18aa2adf | 268 | { |
bc8197c0 | 269 | /* The expression. */ |
18aa2adf | 270 | rtx expr; |
271 | /* Index in the available expression bitmaps. */ | |
272 | int bitmap_index; | |
273 | /* Next entry with the same hash. */ | |
9908fe4d | 274 | struct gcse_expr *next_same_hash; |
18aa2adf | 275 | /* List of anticipatable occurrences in basic blocks in the function. |
276 | An "anticipatable occurrence" is one that is the first occurrence in the | |
ef0d57a0 | 277 | basic block, the operands are not modified in the basic block prior |
278 | to the occurrence and the output is not used between the start of | |
279 | the block and the occurrence. */ | |
9908fe4d | 280 | struct gcse_occr *antic_occr; |
18aa2adf | 281 | /* List of available occurrence in basic blocks in the function. |
282 | An "available occurrence" is one that is the last occurrence in the | |
283 | basic block and the operands are not modified by following statements in | |
284 | the basic block [including this insn]. */ | |
9908fe4d | 285 | struct gcse_occr *avail_occr; |
18aa2adf | 286 | /* Non-null if the computation is PRE redundant. |
287 | The value is the newly created pseudo-reg to record a copy of the | |
288 | expression in all the places that reach the redundant copy. */ | |
289 | rtx reaching_reg; | |
8b38b150 | 290 | /* Maximum distance in instructions this expression can travel. |
291 | We avoid moving simple expressions for more than a few instructions | |
292 | to keep register pressure under control. | |
293 | A value of "0" removes restrictions on how far the expression can | |
294 | travel. */ | |
295 | int max_distance; | |
18aa2adf | 296 | }; |
297 | ||
298 | /* Occurrence of an expression. | |
299 | There is one per basic block. If a pattern appears more than once the | |
300 | last appearance is used [or first for anticipatable expressions]. */ | |
301 | ||
9908fe4d | 302 | struct gcse_occr |
18aa2adf | 303 | { |
304 | /* Next occurrence of this expression. */ | |
9908fe4d | 305 | struct gcse_occr *next; |
18aa2adf | 306 | /* The insn that computes the expression. */ |
526d7387 | 307 | rtx_insn *insn; |
6ef828f9 | 308 | /* Nonzero if this [anticipatable] occurrence has been deleted. */ |
18aa2adf | 309 | char deleted_p; |
6ef828f9 | 310 | /* Nonzero if this [available] occurrence has been copied to |
18aa2adf | 311 | reaching_reg. */ |
312 | /* ??? This is mutually exclusive with deleted_p, so they could share | |
313 | the same byte. */ | |
314 | char copied_p; | |
315 | }; | |
316 | ||
9908fe4d | 317 | typedef struct gcse_occr *occr_t; |
c0939130 | 318 | |
07abdb66 | 319 | /* Expression hash tables. |
18aa2adf | 320 | Each hash table is an array of buckets. |
321 | ??? It is known that if it were an array of entries, structure elements | |
322 | `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is | |
323 | not clear whether in the final analysis a sufficient amount of memory would | |
324 | be saved as the size of the available expression bitmaps would be larger | |
325 | [one could build a mapping table without holes afterwards though]. | |
2c084240 | 326 | Someday I'll perform the computation and figure it out. */ |
18aa2adf | 327 | |
9908fe4d | 328 | struct gcse_hash_table_d |
27cfe3f1 | 329 | { |
330 | /* The table itself. | |
331 | This is an array of `expr_hash_table_size' elements. */ | |
9908fe4d | 332 | struct gcse_expr **table; |
27cfe3f1 | 333 | |
334 | /* Size of the hash table, in elements. */ | |
335 | unsigned int size; | |
a08b57af | 336 | |
27cfe3f1 | 337 | /* Number of hash table elements. */ |
338 | unsigned int n_elems; | |
27cfe3f1 | 339 | }; |
2c084240 | 340 | |
27cfe3f1 | 341 | /* Expression hash table. */ |
9908fe4d | 342 | static struct gcse_hash_table_d expr_hash_table; |
27cfe3f1 | 343 | |
8e802be9 | 344 | /* This is a list of expressions which are MEMs and will be used by load |
3cfec666 | 345 | or store motion. |
bc8197c0 | 346 | Load motion tracks MEMs which aren't killed by anything except itself, |
347 | i.e. loads and stores to a single location. | |
3cfec666 | 348 | We can then allow movement of these MEM refs with a little special |
8e802be9 | 349 | allowance. (all stores copy the same value to the reaching reg used |
350 | for the loads). This means all values used to store into memory must have | |
bc8197c0 | 351 | no side effects so we can re-issue the setter value. */ |
8e802be9 | 352 | |
353 | struct ls_expr | |
354 | { | |
9908fe4d | 355 | struct gcse_expr * expr; /* Gcse expression reference for LM. */ |
8e802be9 | 356 | rtx pattern; /* Pattern of this mem. */ |
64928ee5 | 357 | rtx pattern_regs; /* List of registers mentioned by the mem. */ |
54267fdf | 358 | rtx_insn_list *loads; /* INSN list of loads seen. */ |
359 | rtx_insn_list *stores; /* INSN list of stores seen. */ | |
8e802be9 | 360 | struct ls_expr * next; /* Next in the list. */ |
361 | int invalid; /* Invalid for some reason. */ | |
362 | int index; /* If it maps to a bitmap index. */ | |
69333952 | 363 | unsigned int hash_index; /* Index when in a hash table. */ |
8e802be9 | 364 | rtx reaching_reg; /* Register to use when re-writing. */ |
365 | }; | |
366 | ||
367 | /* Head of the list of load/store memory refs. */ | |
368 | static struct ls_expr * pre_ldst_mems = NULL; | |
369 | ||
770ff93b | 370 | struct pre_ldst_expr_hasher : nofree_ptr_hash <ls_expr> |
d9dd21a8 | 371 | { |
d9dd21a8 | 372 | typedef value_type compare_type; |
9969c043 | 373 | static inline hashval_t hash (const ls_expr *); |
374 | static inline bool equal (const ls_expr *, const ls_expr *); | |
d9dd21a8 | 375 | }; |
376 | ||
377 | /* Hashtable helpers. */ | |
378 | inline hashval_t | |
9969c043 | 379 | pre_ldst_expr_hasher::hash (const ls_expr *x) |
d9dd21a8 | 380 | { |
381 | int do_not_record_p = 0; | |
382 | return | |
383 | hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false); | |
384 | } | |
385 | ||
386 | static int expr_equiv_p (const_rtx, const_rtx); | |
387 | ||
388 | inline bool | |
9969c043 | 389 | pre_ldst_expr_hasher::equal (const ls_expr *ptr1, |
390 | const ls_expr *ptr2) | |
d9dd21a8 | 391 | { |
392 | return expr_equiv_p (ptr1->pattern, ptr2->pattern); | |
393 | } | |
394 | ||
0d707271 | 395 | /* Hashtable for the load/store memory refs. */ |
c1f445d2 | 396 | static hash_table<pre_ldst_expr_hasher> *pre_ldst_table; |
0d707271 | 397 | |
18aa2adf | 398 | /* Bitmap containing one bit for each register in the program. |
399 | Used when performing GCSE to track which registers have been set since | |
400 | the start of the basic block. */ | |
7fb47f9f | 401 | static regset reg_set_bitmap; |
18aa2adf | 402 | |
8e802be9 | 403 | /* Array, indexed by basic block number for a list of insns which modify |
404 | memory within that block. */ | |
e050de51 | 405 | static vec<rtx_insn *> *modify_mem_list; |
78d140c9 | 406 | static bitmap modify_mem_list_set; |
8e802be9 | 407 | |
57c8e46c | 408 | /* This array parallels modify_mem_list, except that it stores MEMs |
409 | being set and their canonicalized memory addresses. */ | |
f1f41a6c | 410 | static vec<modify_pair> *canon_modify_mem_list; |
78d140c9 | 411 | |
f55d2721 | 412 | /* Bitmap indexed by block numbers to record which blocks contain |
413 | function calls. */ | |
414 | static bitmap blocks_with_calls; | |
415 | ||
18aa2adf | 416 | /* Various variables for statistics gathering. */ |
417 | ||
418 | /* Memory used in a pass. | |
419 | This isn't intended to be absolutely precise. Its intent is only | |
420 | to keep an eye on memory usage. */ | |
421 | static int bytes_used; | |
2c084240 | 422 | |
18aa2adf | 423 | /* GCSE substitutions made. */ |
424 | static int gcse_subst_count; | |
425 | /* Number of copy instructions created. */ | |
426 | static int gcse_create_count; | |
18aa2adf | 427 | \f |
8b38b150 | 428 | /* Doing code hoisting. */ |
429 | static bool doing_code_hoisting_p = false; | |
430 | \f | |
0ca684f3 | 431 | /* For available exprs */ |
4b673aa1 | 432 | static sbitmap *ae_kill; |
18aa2adf | 433 | \f |
1ec78e16 | 434 | /* Data stored for each basic block. */ |
435 | struct bb_data | |
436 | { | |
437 | /* Maximal register pressure inside basic block for given register class | |
438 | (defined only for the pressure classes). */ | |
439 | int max_reg_pressure[N_REG_CLASSES]; | |
ded17066 | 440 | /* Recorded register pressure of basic block before trying to hoist |
441 | an expression. Will be used to restore the register pressure | |
442 | if the expression should not be hoisted. */ | |
443 | int old_pressure; | |
444 | /* Recorded register live_in info of basic block during code hoisting | |
445 | process. BACKUP is used to record live_in info before trying to | |
446 | hoist an expression, and will be used to restore LIVE_IN if the | |
447 | expression should not be hoisted. */ | |
448 | bitmap live_in, backup; | |
1ec78e16 | 449 | }; |
450 | ||
451 | #define BB_DATA(bb) ((struct bb_data *) (bb)->aux) | |
452 | ||
453 | static basic_block curr_bb; | |
454 | ||
455 | /* Current register pressure for each pressure class. */ | |
456 | static int curr_reg_pressure[N_REG_CLASSES]; | |
457 | \f | |
458 | ||
952f0048 | 459 | static void compute_can_copy (void); |
2f800191 | 460 | static void *gmalloc (size_t) ATTRIBUTE_MALLOC; |
461 | static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC; | |
f0af5a88 | 462 | static void *gcse_alloc (unsigned long); |
defc8016 | 463 | static void alloc_gcse_mem (void); |
952f0048 | 464 | static void free_gcse_mem (void); |
9908fe4d | 465 | static void hash_scan_insn (rtx_insn *, struct gcse_hash_table_d *); |
466 | static void hash_scan_set (rtx, rtx_insn *, struct gcse_hash_table_d *); | |
467 | static void hash_scan_clobber (rtx, rtx_insn *, struct gcse_hash_table_d *); | |
468 | static void hash_scan_call (rtx, rtx_insn *, struct gcse_hash_table_d *); | |
8b38b150 | 469 | static int want_to_gcse_p (rtx, int *); |
526d7387 | 470 | static int oprs_unchanged_p (const_rtx, const rtx_insn *, int); |
471 | static int oprs_anticipatable_p (const_rtx, const rtx_insn *); | |
472 | static int oprs_available_p (const_rtx, const rtx_insn *); | |
3754d046 | 473 | static void insert_expr_in_table (rtx, machine_mode, rtx_insn *, int, int, |
9908fe4d | 474 | int, struct gcse_hash_table_d *); |
3754d046 | 475 | static unsigned int hash_expr (const_rtx, machine_mode, int *, int); |
84b4ae13 | 476 | static void record_last_reg_set_info (rtx_insn *, int); |
e050de51 | 477 | static void record_last_mem_set_info (rtx_insn *); |
81a410b1 | 478 | static void record_last_set_info (rtx, const_rtx, void *); |
9908fe4d | 479 | static void compute_hash_table (struct gcse_hash_table_d *); |
480 | static void alloc_hash_table (struct gcse_hash_table_d *); | |
481 | static void free_hash_table (struct gcse_hash_table_d *); | |
482 | static void compute_hash_table_work (struct gcse_hash_table_d *); | |
483 | static void dump_hash_table (FILE *, const char *, struct gcse_hash_table_d *); | |
952f0048 | 484 | static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *, |
9908fe4d | 485 | struct gcse_hash_table_d *); |
81a410b1 | 486 | static void mems_conflict_for_gcse_p (rtx, const_rtx, void *); |
7ecb5bb2 | 487 | static int load_killed_in_block_p (const_basic_block, int, const_rtx, int); |
952f0048 | 488 | static void alloc_pre_mem (int, int); |
489 | static void free_pre_mem (void); | |
bc8197c0 | 490 | static struct edge_list *compute_pre_data (void); |
9908fe4d | 491 | static int pre_expr_reaches_here_p (basic_block, struct gcse_expr *, |
952f0048 | 492 | basic_block); |
9908fe4d | 493 | static void insert_insn_end_basic_block (struct gcse_expr *, basic_block); |
494 | static void pre_insert_copy_insn (struct gcse_expr *, rtx_insn *); | |
952f0048 | 495 | static void pre_insert_copies (void); |
496 | static int pre_delete (void); | |
bc8197c0 | 497 | static int pre_gcse (struct edge_list *); |
d743aba2 | 498 | static int one_pre_gcse_pass (void); |
84b4ae13 | 499 | static void add_label_notes (rtx, rtx_insn *); |
952f0048 | 500 | static void alloc_code_hoist_mem (int, int); |
501 | static void free_code_hoist_mem (void); | |
502 | static void compute_code_hoist_vbeinout (void); | |
503 | static void compute_code_hoist_data (void); | |
9908fe4d | 504 | static int should_hoist_expr_to_dom (basic_block, struct gcse_expr *, basic_block, |
1ec78e16 | 505 | sbitmap, int, int *, enum reg_class, |
526d7387 | 506 | int *, bitmap, rtx_insn *); |
d743aba2 | 507 | static int hoist_code (void); |
ded17066 | 508 | static enum reg_class get_regno_pressure_class (int regno, int *nregs); |
526d7387 | 509 | static enum reg_class get_pressure_class_and_nregs (rtx_insn *insn, int *nregs); |
952f0048 | 510 | static int one_code_hoisting_pass (void); |
9908fe4d | 511 | static rtx_insn *process_insert_insn (struct gcse_expr *); |
512 | static int pre_edge_insert (struct edge_list *, struct gcse_expr **); | |
513 | static int pre_expr_reaches_here_p_work (basic_block, struct gcse_expr *, | |
952f0048 | 514 | basic_block, char *); |
515 | static struct ls_expr * ldst_entry (rtx); | |
516 | static void free_ldst_entry (struct ls_expr *); | |
bc8197c0 | 517 | static void free_ld_motion_mems (void); |
952f0048 | 518 | static void print_ldst_list (FILE *); |
519 | static struct ls_expr * find_rtx_in_ldst (rtx); | |
7ecb5bb2 | 520 | static int simple_mem (const_rtx); |
952f0048 | 521 | static void invalidate_any_buried_refs (rtx); |
522 | static void compute_ld_motion_mems (void); | |
523 | static void trim_ld_motion_mems (void); | |
9908fe4d | 524 | static void update_ld_motion_stores (struct gcse_expr *); |
952f0048 | 525 | static void clear_modify_mem_tables (void); |
526 | static void free_modify_mem_tables (void); | |
c8a8ab0f | 527 | static bool is_too_expensive (const char *); |
2457c754 | 528 | |
529 | #define GNEW(T) ((T *) gmalloc (sizeof (T))) | |
530 | #define GCNEW(T) ((T *) gcalloc (1, sizeof (T))) | |
531 | ||
532 | #define GNEWVEC(T, N) ((T *) gmalloc (sizeof (T) * (N))) | |
533 | #define GCNEWVEC(T, N) ((T *) gcalloc ((N), sizeof (T))) | |
2457c754 | 534 | |
535 | #define GNEWVAR(T, S) ((T *) gmalloc ((S))) | |
536 | #define GCNEWVAR(T, S) ((T *) gcalloc (1, (S))) | |
2457c754 | 537 | |
538 | #define GOBNEW(T) ((T *) gcse_alloc (sizeof (T))) | |
539 | #define GOBNEWVAR(T, S) ((T *) gcse_alloc ((S))) | |
18aa2adf | 540 | \f |
18aa2adf | 541 | /* Misc. utilities. */ |
542 | ||
049d15fc | 543 | #define can_copy \ |
544 | (this_target_gcse->x_can_copy) | |
545 | #define can_copy_init_p \ | |
546 | (this_target_gcse->x_can_copy_init_p) | |
3d055936 | 547 | |
18aa2adf | 548 | /* Compute which modes support reg/reg copy operations. */ |
549 | ||
550 | static void | |
952f0048 | 551 | compute_can_copy (void) |
18aa2adf | 552 | { |
553 | int i; | |
ebd9163c | 554 | #ifndef AVOID_CCMODE_COPIES |
bf79ca12 | 555 | rtx reg; |
556 | rtx_insn *insn; | |
ebd9163c | 557 | #endif |
3d055936 | 558 | memset (can_copy, 0, NUM_MACHINE_MODES); |
18aa2adf | 559 | |
560 | start_sequence (); | |
561 | for (i = 0; i < NUM_MACHINE_MODES; i++) | |
2c084240 | 562 | if (GET_MODE_CLASS (i) == MODE_CC) |
563 | { | |
18aa2adf | 564 | #ifdef AVOID_CCMODE_COPIES |
3d055936 | 565 | can_copy[i] = 0; |
18aa2adf | 566 | #else |
3754d046 | 567 | reg = gen_rtx_REG ((machine_mode) i, LAST_VIRTUAL_REGISTER + 1); |
d1f9b275 | 568 | insn = emit_insn (gen_rtx_SET (reg, reg)); |
4679ade3 | 569 | if (recog (PATTERN (insn), insn, NULL) >= 0) |
3d055936 | 570 | can_copy[i] = 1; |
18aa2adf | 571 | #endif |
2c084240 | 572 | } |
72f3466e | 573 | else |
3d055936 | 574 | can_copy[i] = 1; |
2c084240 | 575 | |
18aa2adf | 576 | end_sequence (); |
18aa2adf | 577 | } |
3d055936 | 578 | |
579 | /* Returns whether the mode supports reg/reg copy operations. */ | |
580 | ||
581 | bool | |
3754d046 | 582 | can_copy_p (machine_mode mode) |
3d055936 | 583 | { |
3d055936 | 584 | if (! can_copy_init_p) |
585 | { | |
586 | compute_can_copy (); | |
587 | can_copy_init_p = true; | |
588 | } | |
589 | ||
590 | return can_copy[mode] != 0; | |
591 | } | |
18aa2adf | 592 | \f |
593 | /* Cover function to xmalloc to record bytes allocated. */ | |
594 | ||
f0af5a88 | 595 | static void * |
a41493eb | 596 | gmalloc (size_t size) |
18aa2adf | 597 | { |
598 | bytes_used += size; | |
599 | return xmalloc (size); | |
600 | } | |
601 | ||
2f800191 | 602 | /* Cover function to xcalloc to record bytes allocated. */ |
603 | ||
604 | static void * | |
605 | gcalloc (size_t nelem, size_t elsize) | |
606 | { | |
607 | bytes_used += nelem * elsize; | |
608 | return xcalloc (nelem, elsize); | |
609 | } | |
610 | ||
7cdd3716 | 611 | /* Cover function to obstack_alloc. */ |
18aa2adf | 612 | |
f0af5a88 | 613 | static void * |
952f0048 | 614 | gcse_alloc (unsigned long size) |
18aa2adf | 615 | { |
7cdd3716 | 616 | bytes_used += size; |
f0af5a88 | 617 | return obstack_alloc (&gcse_obstack, size); |
18aa2adf | 618 | } |
619 | ||
2e81afe5 | 620 | /* Allocate memory for the reg/memory set tracking tables. |
18aa2adf | 621 | This is called at the start of each pass. */ |
622 | ||
623 | static void | |
defc8016 | 624 | alloc_gcse_mem (void) |
18aa2adf | 625 | { |
18aa2adf | 626 | /* Allocate vars to track sets of regs. */ |
0f71a633 | 627 | reg_set_bitmap = ALLOC_REG_SET (NULL); |
18aa2adf | 628 | |
8e802be9 | 629 | /* Allocate array to keep a list of insns which modify memory in each |
f1f41a6c | 630 | basic block. The two typedefs are needed to work around the |
631 | pre-processor limitation with template types in macro arguments. */ | |
e050de51 | 632 | typedef vec<rtx_insn *> vec_rtx_heap; |
f1f41a6c | 633 | typedef vec<modify_pair> vec_modify_pair_heap; |
fe672ac0 | 634 | modify_mem_list = GCNEWVEC (vec_rtx_heap, last_basic_block_for_fn (cfun)); |
635 | canon_modify_mem_list = GCNEWVEC (vec_modify_pair_heap, | |
636 | last_basic_block_for_fn (cfun)); | |
27335ffd | 637 | modify_mem_list_set = BITMAP_ALLOC (NULL); |
638 | blocks_with_calls = BITMAP_ALLOC (NULL); | |
18aa2adf | 639 | } |
640 | ||
641 | /* Free memory allocated by alloc_gcse_mem. */ | |
642 | ||
643 | static void | |
952f0048 | 644 | free_gcse_mem (void) |
18aa2adf | 645 | { |
98076867 | 646 | FREE_REG_SET (reg_set_bitmap); |
647 | ||
7fb47f9f | 648 | free_modify_mem_tables (); |
27335ffd | 649 | BITMAP_FREE (modify_mem_list_set); |
650 | BITMAP_FREE (blocks_with_calls); | |
18aa2adf | 651 | } |
c7a3eccf | 652 | \f |
653 | /* Compute the local properties of each recorded expression. | |
2c084240 | 654 | |
655 | Local properties are those that are defined by the block, irrespective of | |
656 | other blocks. | |
c7a3eccf | 657 | |
658 | An expression is transparent in a block if its operands are not modified | |
659 | in the block. | |
660 | ||
661 | An expression is computed (locally available) in a block if it is computed | |
662 | at least once and expression would contain the same value if the | |
663 | computation was moved to the end of the block. | |
664 | ||
665 | An expression is locally anticipatable in a block if it is computed at | |
666 | least once and expression would contain the same value if the computation | |
667 | was moved to the beginning of the block. | |
668 | ||
07abdb66 | 669 | We call this routine for pre and code hoisting. They all compute |
2c084240 | 670 | basically the same information and thus can easily share this code. |
18aa2adf | 671 | |
2c084240 | 672 | TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local |
673 | properties. If NULL, then it is not necessary to compute or record that | |
674 | particular property. | |
c7a3eccf | 675 | |
07abdb66 | 676 | TABLE controls which hash table to look at. */ |
3cfec666 | 677 | |
c7a3eccf | 678 | static void |
b9f02dbb | 679 | compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc, |
9908fe4d | 680 | struct gcse_hash_table_d *table) |
c7a3eccf | 681 | { |
27cfe3f1 | 682 | unsigned int i; |
3cfec666 | 683 | |
c7a3eccf | 684 | /* Initialize any bitmaps that were passed in. */ |
685 | if (transp) | |
3d5c627e | 686 | { |
fe672ac0 | 687 | bitmap_vector_ones (transp, last_basic_block_for_fn (cfun)); |
3d5c627e | 688 | } |
2c084240 | 689 | |
c7a3eccf | 690 | if (comp) |
fe672ac0 | 691 | bitmap_vector_clear (comp, last_basic_block_for_fn (cfun)); |
c7a3eccf | 692 | if (antloc) |
fe672ac0 | 693 | bitmap_vector_clear (antloc, last_basic_block_for_fn (cfun)); |
c7a3eccf | 694 | |
27cfe3f1 | 695 | for (i = 0; i < table->size; i++) |
18aa2adf | 696 | { |
9908fe4d | 697 | struct gcse_expr *expr; |
c7a3eccf | 698 | |
27cfe3f1 | 699 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) |
c7a3eccf | 700 | { |
c7a3eccf | 701 | int indx = expr->bitmap_index; |
9908fe4d | 702 | struct gcse_occr *occr; |
c7a3eccf | 703 | |
704 | /* The expression is transparent in this block if it is not killed. | |
705 | We start by assuming all are transparent [none are killed], and | |
706 | then reset the bits for those that are. */ | |
c7a3eccf | 707 | if (transp) |
d2ac64b1 | 708 | compute_transp (expr->expr, indx, transp, |
709 | blocks_with_calls, | |
710 | modify_mem_list_set, | |
711 | canon_modify_mem_list); | |
c7a3eccf | 712 | |
713 | /* The occurrences recorded in antic_occr are exactly those that | |
6ef828f9 | 714 | we want to set to nonzero in ANTLOC. */ |
c7a3eccf | 715 | if (antloc) |
2c084240 | 716 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
717 | { | |
08b7917c | 718 | bitmap_set_bit (antloc[BLOCK_FOR_INSN (occr->insn)->index], indx); |
c7a3eccf | 719 | |
2c084240 | 720 | /* While we're scanning the table, this is a good place to |
721 | initialize this. */ | |
722 | occr->deleted_p = 0; | |
723 | } | |
c7a3eccf | 724 | |
725 | /* The occurrences recorded in avail_occr are exactly those that | |
6ef828f9 | 726 | we want to set to nonzero in COMP. */ |
c7a3eccf | 727 | if (comp) |
2c084240 | 728 | for (occr = expr->avail_occr; occr != NULL; occr = occr->next) |
729 | { | |
08b7917c | 730 | bitmap_set_bit (comp[BLOCK_FOR_INSN (occr->insn)->index], indx); |
c7a3eccf | 731 | |
2c084240 | 732 | /* While we're scanning the table, this is a good place to |
733 | initialize this. */ | |
734 | occr->copied_p = 0; | |
735 | } | |
c7a3eccf | 736 | |
737 | /* While we're scanning the table, this is a good place to | |
738 | initialize this. */ | |
739 | expr->reaching_reg = 0; | |
740 | } | |
18aa2adf | 741 | } |
18aa2adf | 742 | } |
743 | \f | |
18aa2adf | 744 | /* Hash table support. */ |
745 | ||
eac13465 | 746 | struct reg_avail_info |
747 | { | |
4c26117a | 748 | basic_block last_bb; |
eac13465 | 749 | int first_set; |
750 | int last_set; | |
751 | }; | |
752 | ||
753 | static struct reg_avail_info *reg_avail_info; | |
4c26117a | 754 | static basic_block current_bb; |
18aa2adf | 755 | |
06e2144a | 756 | /* See whether X, the source of a set, is something we want to consider for |
757 | GCSE. */ | |
18aa2adf | 758 | |
759 | static int | |
8b38b150 | 760 | want_to_gcse_p (rtx x, int *max_distance_ptr) |
18aa2adf | 761 | { |
e207fd7a | 762 | #ifdef STACK_REGS |
763 | /* On register stack architectures, don't GCSE constants from the | |
764 | constant pool, as the benefits are often swamped by the overhead | |
765 | of shuffling the register stack between basic blocks. */ | |
766 | if (IS_STACK_MODE (GET_MODE (x))) | |
767 | x = avoid_constant_pool_reference (x); | |
768 | #endif | |
769 | ||
8b38b150 | 770 | /* GCSE'ing constants: |
771 | ||
772 | We do not specifically distinguish between constant and non-constant | |
7013e87c | 773 | expressions in PRE and Hoist. We use set_src_cost below to limit |
8b38b150 | 774 | the maximum distance simple expressions can travel. |
775 | ||
776 | Nevertheless, constants are much easier to GCSE, and, hence, | |
777 | it is easy to overdo the optimizations. Usually, excessive PRE and | |
778 | Hoisting of constant leads to increased register pressure. | |
779 | ||
780 | RA can deal with this by rematerialing some of the constants. | |
781 | Therefore, it is important that the back-end generates sets of constants | |
782 | in a way that allows reload rematerialize them under high register | |
783 | pressure, i.e., a pseudo register with REG_EQUAL to constant | |
784 | is set only once. Failing to do so will result in IRA/reload | |
785 | spilling such constants under high register pressure instead of | |
786 | rematerializing them. */ | |
787 | ||
2c084240 | 788 | switch (GET_CODE (x)) |
18aa2adf | 789 | { |
790 | case REG: | |
791 | case SUBREG: | |
8b38b150 | 792 | case CALL: |
793 | return 0; | |
794 | ||
0349edce | 795 | CASE_CONST_ANY: |
8b38b150 | 796 | if (!doing_code_hoisting_p) |
797 | /* Do not PRE constants. */ | |
798 | return 0; | |
799 | ||
800 | /* FALLTHRU */ | |
18aa2adf | 801 | |
802 | default: | |
8b38b150 | 803 | if (doing_code_hoisting_p) |
804 | /* PRE doesn't implement max_distance restriction. */ | |
805 | { | |
806 | int cost; | |
807 | int max_distance; | |
808 | ||
809 | gcc_assert (!optimize_function_for_speed_p (cfun) | |
810 | && optimize_function_for_size_p (cfun)); | |
7013e87c | 811 | cost = set_src_cost (x, 0); |
8b38b150 | 812 | |
813 | if (cost < COSTS_N_INSNS (GCSE_UNRESTRICTED_COST)) | |
814 | { | |
815 | max_distance = (GCSE_COST_DISTANCE_RATIO * cost) / 10; | |
816 | if (max_distance == 0) | |
817 | return 0; | |
818 | ||
819 | gcc_assert (max_distance > 0); | |
820 | } | |
821 | else | |
822 | max_distance = 0; | |
823 | ||
824 | if (max_distance_ptr) | |
825 | *max_distance_ptr = max_distance; | |
826 | } | |
827 | ||
4b673aa1 | 828 | return can_assign_to_reg_without_clobbers_p (x); |
18aa2adf | 829 | } |
69dbb666 | 830 | } |
831 | ||
4b673aa1 | 832 | /* Used internally by can_assign_to_reg_without_clobbers_p. */ |
69dbb666 | 833 | |
526d7387 | 834 | static GTY(()) rtx_insn *test_insn; |
69dbb666 | 835 | |
4b673aa1 | 836 | /* Return true if we can assign X to a pseudo register such that the |
837 | resulting insn does not result in clobbering a hard register as a | |
838 | side-effect. | |
2b86a75a | 839 | |
840 | Additionally, if the target requires it, check that the resulting insn | |
841 | can be copied. If it cannot, this means that X is special and probably | |
842 | has hidden side-effects we don't want to mess with. | |
843 | ||
4b673aa1 | 844 | This function is typically used by code motion passes, to verify |
845 | that it is safe to insert an insn without worrying about clobbering | |
846 | maybe live hard regs. */ | |
69dbb666 | 847 | |
4b673aa1 | 848 | bool |
849 | can_assign_to_reg_without_clobbers_p (rtx x) | |
69dbb666 | 850 | { |
851 | int num_clobbers = 0; | |
852 | int icode; | |
e899b9f2 | 853 | bool can_assign = false; |
18aa2adf | 854 | |
06e2144a | 855 | /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */ |
856 | if (general_operand (x, GET_MODE (x))) | |
857 | return 1; | |
858 | else if (GET_MODE (x) == VOIDmode) | |
859 | return 0; | |
860 | ||
861 | /* Otherwise, check if we can make a valid insn from it. First initialize | |
862 | our test insn if we haven't already. */ | |
863 | if (test_insn == 0) | |
864 | { | |
865 | test_insn | |
d1f9b275 | 866 | = make_insn_raw (gen_rtx_SET (gen_rtx_REG (word_mode, |
06e2144a | 867 | FIRST_PSEUDO_REGISTER * 2), |
868 | const0_rtx)); | |
4a57a2e8 | 869 | SET_NEXT_INSN (test_insn) = SET_PREV_INSN (test_insn) = 0; |
e899b9f2 | 870 | INSN_LOCATION (test_insn) = UNKNOWN_LOCATION; |
06e2144a | 871 | } |
872 | ||
873 | /* Now make an insn like the one we would make when GCSE'ing and see if | |
874 | valid. */ | |
875 | PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x)); | |
876 | SET_SRC (PATTERN (test_insn)) = x; | |
48e1416a | 877 | |
2b86a75a | 878 | icode = recog (PATTERN (test_insn), test_insn, &num_clobbers); |
48e1416a | 879 | |
e899b9f2 | 880 | /* If the test insn is valid and doesn't need clobbers, and the target also |
881 | has no objections, we're good. */ | |
882 | if (icode >= 0 | |
883 | && (num_clobbers == 0 || !added_clobbers_hard_reg_p (icode)) | |
884 | && ! (targetm.cannot_copy_insn_p | |
885 | && targetm.cannot_copy_insn_p (test_insn))) | |
886 | can_assign = true; | |
48e1416a | 887 | |
e899b9f2 | 888 | /* Make sure test_insn doesn't have any pointers into GC space. */ |
889 | SET_SRC (PATTERN (test_insn)) = NULL_RTX; | |
48e1416a | 890 | |
e899b9f2 | 891 | return can_assign; |
18aa2adf | 892 | } |
893 | ||
6ef828f9 | 894 | /* Return nonzero if the operands of expression X are unchanged from the |
18aa2adf | 895 | start of INSN's basic block up to but not including INSN (if AVAIL_P == 0), |
896 | or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */ | |
897 | ||
898 | static int | |
526d7387 | 899 | oprs_unchanged_p (const_rtx x, const rtx_insn *insn, int avail_p) |
18aa2adf | 900 | { |
2c084240 | 901 | int i, j; |
18aa2adf | 902 | enum rtx_code code; |
d2ca078f | 903 | const char *fmt; |
18aa2adf | 904 | |
18aa2adf | 905 | if (x == 0) |
906 | return 1; | |
907 | ||
908 | code = GET_CODE (x); | |
909 | switch (code) | |
910 | { | |
911 | case REG: | |
eac13465 | 912 | { |
913 | struct reg_avail_info *info = ®_avail_info[REGNO (x)]; | |
914 | ||
915 | if (info->last_bb != current_bb) | |
916 | return 1; | |
3cfec666 | 917 | if (avail_p) |
2e81afe5 | 918 | return info->last_set < DF_INSN_LUID (insn); |
eac13465 | 919 | else |
2e81afe5 | 920 | return info->first_set >= DF_INSN_LUID (insn); |
eac13465 | 921 | } |
18aa2adf | 922 | |
923 | case MEM: | |
37495d69 | 924 | if (! flag_gcse_lm |
925 | || load_killed_in_block_p (current_bb, DF_INSN_LUID (insn), | |
926 | x, avail_p)) | |
8e802be9 | 927 | return 0; |
18aa2adf | 928 | else |
2c084240 | 929 | return oprs_unchanged_p (XEXP (x, 0), insn, avail_p); |
18aa2adf | 930 | |
931 | case PRE_DEC: | |
932 | case PRE_INC: | |
933 | case POST_DEC: | |
934 | case POST_INC: | |
40988080 | 935 | case PRE_MODIFY: |
936 | case POST_MODIFY: | |
18aa2adf | 937 | return 0; |
938 | ||
939 | case PC: | |
940 | case CC0: /*FIXME*/ | |
941 | case CONST: | |
0349edce | 942 | CASE_CONST_ANY: |
18aa2adf | 943 | case SYMBOL_REF: |
944 | case LABEL_REF: | |
945 | case ADDR_VEC: | |
946 | case ADDR_DIFF_VEC: | |
947 | return 1; | |
948 | ||
949 | default: | |
950 | break; | |
951 | } | |
952 | ||
2c084240 | 953 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
18aa2adf | 954 | { |
955 | if (fmt[i] == 'e') | |
956 | { | |
2c084240 | 957 | /* If we are about to do the last recursive call needed at this |
958 | level, change it into iteration. This function is called enough | |
959 | to be worth it. */ | |
18aa2adf | 960 | if (i == 0) |
2c084240 | 961 | return oprs_unchanged_p (XEXP (x, i), insn, avail_p); |
962 | ||
963 | else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p)) | |
18aa2adf | 964 | return 0; |
965 | } | |
966 | else if (fmt[i] == 'E') | |
2c084240 | 967 | for (j = 0; j < XVECLEN (x, i); j++) |
968 | if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p)) | |
969 | return 0; | |
18aa2adf | 970 | } |
971 | ||
972 | return 1; | |
973 | } | |
974 | ||
bc8197c0 | 975 | /* Info passed from load_killed_in_block_p to mems_conflict_for_gcse_p. */ |
8e802be9 | 976 | |
bc8197c0 | 977 | struct mem_conflict_info |
978 | { | |
979 | /* A memory reference for a load instruction, mems_conflict_for_gcse_p will | |
980 | see if a memory store conflicts with this memory load. */ | |
981 | const_rtx mem; | |
8e802be9 | 982 | |
bc8197c0 | 983 | /* True if mems_conflict_for_gcse_p finds a conflict between two memory |
984 | references. */ | |
985 | bool conflict; | |
986 | }; | |
987 | ||
988 | /* DEST is the output of an instruction. If it is a memory reference and | |
989 | possibly conflicts with the load found in DATA, then communicate this | |
990 | information back through DATA. */ | |
8e802be9 | 991 | |
992 | static void | |
81a410b1 | 993 | mems_conflict_for_gcse_p (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, |
bc8197c0 | 994 | void *data) |
8e802be9 | 995 | { |
bc8197c0 | 996 | struct mem_conflict_info *mci = (struct mem_conflict_info *) data; |
997 | ||
8e802be9 | 998 | while (GET_CODE (dest) == SUBREG |
999 | || GET_CODE (dest) == ZERO_EXTRACT | |
8e802be9 | 1000 | || GET_CODE (dest) == STRICT_LOW_PART) |
1001 | dest = XEXP (dest, 0); | |
1002 | ||
1003 | /* If DEST is not a MEM, then it will not conflict with the load. Note | |
1004 | that function calls are assumed to clobber memory, but are handled | |
1005 | elsewhere. */ | |
b9f02dbb | 1006 | if (! MEM_P (dest)) |
8e802be9 | 1007 | return; |
7a676a9f | 1008 | |
8e802be9 | 1009 | /* If we are setting a MEM in our list of specially recognized MEMs, |
3cfec666 | 1010 | don't mark as killed this time. */ |
bc8197c0 | 1011 | if (pre_ldst_mems != NULL && expr_equiv_p (dest, mci->mem)) |
8e802be9 | 1012 | { |
1013 | if (!find_rtx_in_ldst (dest)) | |
bc8197c0 | 1014 | mci->conflict = true; |
8e802be9 | 1015 | return; |
1016 | } | |
7a676a9f | 1017 | |
376a287d | 1018 | if (true_dependence (dest, GET_MODE (dest), mci->mem)) |
bc8197c0 | 1019 | mci->conflict = true; |
8e802be9 | 1020 | } |
1021 | ||
1022 | /* Return nonzero if the expression in X (a memory reference) is killed | |
2e81afe5 | 1023 | in block BB before or after the insn with the LUID in UID_LIMIT. |
8e802be9 | 1024 | AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills |
1025 | before UID_LIMIT. | |
1026 | ||
1027 | To check the entire block, set UID_LIMIT to max_uid + 1 and | |
1028 | AVAIL_P to 0. */ | |
1029 | ||
1030 | static int | |
bc8197c0 | 1031 | load_killed_in_block_p (const_basic_block bb, int uid_limit, const_rtx x, |
1032 | int avail_p) | |
8e802be9 | 1033 | { |
e050de51 | 1034 | vec<rtx_insn *> list = modify_mem_list[bb->index]; |
1035 | rtx_insn *setter; | |
577cca34 | 1036 | unsigned ix; |
a2658f4a | 1037 | |
1038 | /* If this is a readonly then we aren't going to be changing it. */ | |
1039 | if (MEM_READONLY_P (x)) | |
1040 | return 0; | |
1041 | ||
f1f41a6c | 1042 | FOR_EACH_VEC_ELT_REVERSE (list, ix, setter) |
8e802be9 | 1043 | { |
bc8197c0 | 1044 | struct mem_conflict_info mci; |
1045 | ||
8e802be9 | 1046 | /* Ignore entries in the list that do not apply. */ |
1047 | if ((avail_p | |
577cca34 | 1048 | && DF_INSN_LUID (setter) < uid_limit) |
8e802be9 | 1049 | || (! avail_p |
577cca34 | 1050 | && DF_INSN_LUID (setter) > uid_limit)) |
1051 | continue; | |
8e802be9 | 1052 | |
1053 | /* If SETTER is a call everything is clobbered. Note that calls | |
1054 | to pure functions are never put on the list, so we need not | |
1055 | worry about them. */ | |
b9f02dbb | 1056 | if (CALL_P (setter)) |
8e802be9 | 1057 | return 1; |
1058 | ||
1059 | /* SETTER must be an INSN of some kind that sets memory. Call | |
bc8197c0 | 1060 | note_stores to examine each hunk of memory that is modified. */ |
1061 | mci.mem = x; | |
1062 | mci.conflict = false; | |
1063 | note_stores (PATTERN (setter), mems_conflict_for_gcse_p, &mci); | |
1064 | if (mci.conflict) | |
8e802be9 | 1065 | return 1; |
8e802be9 | 1066 | } |
1067 | return 0; | |
1068 | } | |
1069 | ||
6ef828f9 | 1070 | /* Return nonzero if the operands of expression X are unchanged from |
18aa2adf | 1071 | the start of INSN's basic block up to but not including INSN. */ |
1072 | ||
1073 | static int | |
526d7387 | 1074 | oprs_anticipatable_p (const_rtx x, const rtx_insn *insn) |
18aa2adf | 1075 | { |
1076 | return oprs_unchanged_p (x, insn, 0); | |
1077 | } | |
1078 | ||
6ef828f9 | 1079 | /* Return nonzero if the operands of expression X are unchanged from |
18aa2adf | 1080 | INSN to the end of INSN's basic block. */ |
1081 | ||
1082 | static int | |
526d7387 | 1083 | oprs_available_p (const_rtx x, const rtx_insn *insn) |
18aa2adf | 1084 | { |
1085 | return oprs_unchanged_p (x, insn, 1); | |
1086 | } | |
1087 | ||
1088 | /* Hash expression X. | |
2c084240 | 1089 | |
1090 | MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean | |
1091 | indicating if a volatile operand is found or if the expression contains | |
69333952 | 1092 | something we don't want to insert in the table. HASH_TABLE_SIZE is |
78d140c9 | 1093 | the current size of the hash table to be probed. */ |
18aa2adf | 1094 | |
1095 | static unsigned int | |
3754d046 | 1096 | hash_expr (const_rtx x, machine_mode mode, int *do_not_record_p, |
69333952 | 1097 | int hash_table_size) |
18aa2adf | 1098 | { |
1099 | unsigned int hash; | |
1100 | ||
1101 | *do_not_record_p = 0; | |
1102 | ||
bc8197c0 | 1103 | hash = hash_rtx (x, mode, do_not_record_p, NULL, /*have_reg_qty=*/false); |
18aa2adf | 1104 | return hash % hash_table_size; |
1105 | } | |
1b80ba05 | 1106 | |
78d140c9 | 1107 | /* Return nonzero if exp1 is equivalent to exp2. */ |
18aa2adf | 1108 | |
1109 | static int | |
7ecb5bb2 | 1110 | expr_equiv_p (const_rtx x, const_rtx y) |
18aa2adf | 1111 | { |
78d140c9 | 1112 | return exp_equiv_p (x, y, 0, true); |
18aa2adf | 1113 | } |
1114 | ||
27cfe3f1 | 1115 | /* Insert expression X in INSN in the hash TABLE. |
18aa2adf | 1116 | If it is already present, record it as the last occurrence in INSN's |
1117 | basic block. | |
1118 | ||
1119 | MODE is the mode of the value X is being stored into. | |
1120 | It is only used if X is a CONST_INT. | |
1121 | ||
6ef828f9 | 1122 | ANTIC_P is nonzero if X is an anticipatable expression. |
8b38b150 | 1123 | AVAIL_P is nonzero if X is an available expression. |
1124 | ||
1125 | MAX_DISTANCE is the maximum distance in instructions this expression can | |
1126 | be moved. */ | |
18aa2adf | 1127 | |
1128 | static void | |
3754d046 | 1129 | insert_expr_in_table (rtx x, machine_mode mode, rtx_insn *insn, |
526d7387 | 1130 | int antic_p, |
9908fe4d | 1131 | int avail_p, int max_distance, struct gcse_hash_table_d *table) |
18aa2adf | 1132 | { |
1133 | int found, do_not_record_p; | |
1134 | unsigned int hash; | |
9908fe4d | 1135 | struct gcse_expr *cur_expr, *last_expr = NULL; |
1136 | struct gcse_occr *antic_occr, *avail_occr; | |
18aa2adf | 1137 | |
27cfe3f1 | 1138 | hash = hash_expr (x, mode, &do_not_record_p, table->size); |
18aa2adf | 1139 | |
1140 | /* Do not insert expression in table if it contains volatile operands, | |
1141 | or if hash_expr determines the expression is something we don't want | |
1142 | to or can't handle. */ | |
1143 | if (do_not_record_p) | |
1144 | return; | |
1145 | ||
27cfe3f1 | 1146 | cur_expr = table->table[hash]; |
18aa2adf | 1147 | found = 0; |
1148 | ||
2c084240 | 1149 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
18aa2adf | 1150 | { |
1151 | /* If the expression isn't found, save a pointer to the end of | |
1152 | the list. */ | |
1153 | last_expr = cur_expr; | |
1154 | cur_expr = cur_expr->next_same_hash; | |
1155 | } | |
1156 | ||
1157 | if (! found) | |
1158 | { | |
9908fe4d | 1159 | cur_expr = GOBNEW (struct gcse_expr); |
1160 | bytes_used += sizeof (struct gcse_expr); | |
27cfe3f1 | 1161 | if (table->table[hash] == NULL) |
2c084240 | 1162 | /* This is the first pattern that hashed to this index. */ |
27cfe3f1 | 1163 | table->table[hash] = cur_expr; |
18aa2adf | 1164 | else |
2c084240 | 1165 | /* Add EXPR to end of this hash chain. */ |
1166 | last_expr->next_same_hash = cur_expr; | |
1167 | ||
3cfec666 | 1168 | /* Set the fields of the expr element. */ |
18aa2adf | 1169 | cur_expr->expr = x; |
27cfe3f1 | 1170 | cur_expr->bitmap_index = table->n_elems++; |
18aa2adf | 1171 | cur_expr->next_same_hash = NULL; |
1172 | cur_expr->antic_occr = NULL; | |
1173 | cur_expr->avail_occr = NULL; | |
8b38b150 | 1174 | gcc_assert (max_distance >= 0); |
1175 | cur_expr->max_distance = max_distance; | |
18aa2adf | 1176 | } |
8b38b150 | 1177 | else |
1178 | gcc_assert (cur_expr->max_distance == max_distance); | |
18aa2adf | 1179 | |
1180 | /* Now record the occurrence(s). */ | |
18aa2adf | 1181 | if (antic_p) |
1182 | { | |
1183 | antic_occr = cur_expr->antic_occr; | |
1184 | ||
90bd219d | 1185 | if (antic_occr |
1186 | && BLOCK_FOR_INSN (antic_occr->insn) != BLOCK_FOR_INSN (insn)) | |
77780ba6 | 1187 | antic_occr = NULL; |
18aa2adf | 1188 | |
1189 | if (antic_occr) | |
2c084240 | 1190 | /* Found another instance of the expression in the same basic block. |
1191 | Prefer the currently recorded one. We want the first one in the | |
1192 | block and the block is scanned from start to end. */ | |
1193 | ; /* nothing to do */ | |
18aa2adf | 1194 | else |
1195 | { | |
1196 | /* First occurrence of this expression in this basic block. */ | |
9908fe4d | 1197 | antic_occr = GOBNEW (struct gcse_occr); |
1198 | bytes_used += sizeof (struct gcse_occr); | |
18aa2adf | 1199 | antic_occr->insn = insn; |
77780ba6 | 1200 | antic_occr->next = cur_expr->antic_occr; |
839f8415 | 1201 | antic_occr->deleted_p = 0; |
77780ba6 | 1202 | cur_expr->antic_occr = antic_occr; |
18aa2adf | 1203 | } |
1204 | } | |
1205 | ||
1206 | if (avail_p) | |
1207 | { | |
1208 | avail_occr = cur_expr->avail_occr; | |
1209 | ||
90bd219d | 1210 | if (avail_occr |
1211 | && BLOCK_FOR_INSN (avail_occr->insn) == BLOCK_FOR_INSN (insn)) | |
18aa2adf | 1212 | { |
77780ba6 | 1213 | /* Found another instance of the expression in the same basic block. |
1214 | Prefer this occurrence to the currently recorded one. We want | |
1215 | the last one in the block and the block is scanned from start | |
1216 | to end. */ | |
1217 | avail_occr->insn = insn; | |
18aa2adf | 1218 | } |
18aa2adf | 1219 | else |
1220 | { | |
1221 | /* First occurrence of this expression in this basic block. */ | |
9908fe4d | 1222 | avail_occr = GOBNEW (struct gcse_occr); |
1223 | bytes_used += sizeof (struct gcse_occr); | |
18aa2adf | 1224 | avail_occr->insn = insn; |
77780ba6 | 1225 | avail_occr->next = cur_expr->avail_occr; |
839f8415 | 1226 | avail_occr->deleted_p = 0; |
77780ba6 | 1227 | cur_expr->avail_occr = avail_occr; |
18aa2adf | 1228 | } |
1229 | } | |
1230 | } | |
1231 | ||
bc8197c0 | 1232 | /* Scan SET present in INSN and add an entry to the hash TABLE. */ |
18aa2adf | 1233 | |
1234 | static void | |
9908fe4d | 1235 | hash_scan_set (rtx set, rtx_insn *insn, struct gcse_hash_table_d *table) |
18aa2adf | 1236 | { |
bc8197c0 | 1237 | rtx src = SET_SRC (set); |
1238 | rtx dest = SET_DEST (set); | |
1b80ba05 | 1239 | rtx note; |
18aa2adf | 1240 | |
19595145 | 1241 | if (GET_CODE (src) == CALL) |
27cfe3f1 | 1242 | hash_scan_call (src, insn, table); |
18aa2adf | 1243 | |
b9f02dbb | 1244 | else if (REG_P (dest)) |
18aa2adf | 1245 | { |
1b80ba05 | 1246 | unsigned int regno = REGNO (dest); |
8b38b150 | 1247 | int max_distance = 0; |
18aa2adf | 1248 | |
ad6cd748 | 1249 | /* See if a REG_EQUAL note shows this equivalent to a simpler expression. |
1250 | ||
59254d98 | 1251 | This allows us to do a single GCSE pass and still eliminate |
1252 | redundant constants, addresses or other expressions that are | |
ad6cd748 | 1253 | constructed with multiple instructions. |
1254 | ||
07abdb66 | 1255 | However, keep the original SRC if INSN is a simple reg-reg move. |
ad6cd748 | 1256 | In this case, there will almost always be a REG_EQUAL note on the |
1257 | insn that sets SRC. By recording the REG_EQUAL value here as SRC | |
1258 | for INSN, we miss copy propagation opportunities and we perform the | |
1259 | same PRE GCSE operation repeatedly on the same REG_EQUAL value if we | |
1260 | do more than one PRE GCSE pass. | |
1261 | ||
f0b5f617 | 1262 | Note that this does not impede profitable constant propagations. We |
ad6cd748 | 1263 | "look through" reg-reg sets in lookup_avail_set. */ |
59254d98 | 1264 | note = find_reg_equal_equiv_note (insn); |
1265 | if (note != 0 | |
ad6cd748 | 1266 | && REG_NOTE_KIND (note) == REG_EQUAL |
1267 | && !REG_P (src) | |
07abdb66 | 1268 | && want_to_gcse_p (XEXP (note, 0), NULL)) |
d1f9b275 | 1269 | src = XEXP (note, 0), set = gen_rtx_SET (dest, src); |
1b80ba05 | 1270 | |
18aa2adf | 1271 | /* Only record sets of pseudo-regs in the hash table. */ |
07abdb66 | 1272 | if (regno >= FIRST_PSEUDO_REGISTER |
18aa2adf | 1273 | /* Don't GCSE something if we can't do a reg/reg copy. */ |
3d055936 | 1274 | && can_copy_p (GET_MODE (dest)) |
17a54dac | 1275 | /* GCSE commonly inserts instruction after the insn. We can't |
e38def9c | 1276 | do that easily for EH edges so disable GCSE on these for now. */ |
1277 | /* ??? We can now easily create new EH landing pads at the | |
1278 | gimple level, for splitting edges; there's no reason we | |
1279 | can't do the same thing at the rtl level. */ | |
1280 | && !can_throw_internal (insn) | |
18aa2adf | 1281 | /* Is SET_SRC something we want to gcse? */ |
8b38b150 | 1282 | && want_to_gcse_p (src, &max_distance) |
1b80ba05 | 1283 | /* Don't CSE a nop. */ |
bc8197c0 | 1284 | && ! set_noop_p (set) |
75f84104 | 1285 | /* Don't GCSE if it has attached REG_EQUIV note. |
1286 | At this point this only function parameters should have | |
1287 | REG_EQUIV notes and if the argument slot is used somewhere | |
3fb1e43b | 1288 | explicitly, it means address of parameter has been taken, |
75f84104 | 1289 | so we should not extend the lifetime of the pseudo. */ |
59254d98 | 1290 | && (note == NULL_RTX || ! MEM_P (XEXP (note, 0)))) |
18aa2adf | 1291 | { |
1292 | /* An expression is not anticipatable if its operands are | |
232bbfff | 1293 | modified before this insn or if this is not the only SET in |
3072d30e | 1294 | this insn. The latter condition does not have to mean that |
1295 | SRC itself is not anticipatable, but we just will not be | |
1296 | able to handle code motion of insns with multiple sets. */ | |
1297 | int antic_p = oprs_anticipatable_p (src, insn) | |
1298 | && !multiple_sets (insn); | |
18aa2adf | 1299 | /* An expression is not available if its operands are |
f441a382 | 1300 | subsequently modified, including this insn. It's also not |
1301 | available if this is a branch, because we can't insert | |
1302 | a set after the branch. */ | |
1303 | int avail_p = (oprs_available_p (src, insn) | |
1304 | && ! JUMP_P (insn)); | |
2c084240 | 1305 | |
8b38b150 | 1306 | insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, |
1307 | max_distance, table); | |
18aa2adf | 1308 | } |
18aa2adf | 1309 | } |
40e55fbb | 1310 | /* In case of store we want to consider the memory value as available in |
5c47e414 | 1311 | the REG stored in that memory. This makes it possible to remove |
1312 | redundant loads from due to stores to the same location. */ | |
b9f02dbb | 1313 | else if (flag_gcse_las && REG_P (src) && MEM_P (dest)) |
5c47e414 | 1314 | { |
1315 | unsigned int regno = REGNO (src); | |
02540644 | 1316 | int max_distance = 0; |
5c47e414 | 1317 | |
07abdb66 | 1318 | /* Only record sets of pseudo-regs in the hash table. */ |
1319 | if (regno >= FIRST_PSEUDO_REGISTER | |
5c47e414 | 1320 | /* Don't GCSE something if we can't do a reg/reg copy. */ |
1321 | && can_copy_p (GET_MODE (src)) | |
1322 | /* GCSE commonly inserts instruction after the insn. We can't | |
e38def9c | 1323 | do that easily for EH edges so disable GCSE on these for now. */ |
1324 | && !can_throw_internal (insn) | |
5c47e414 | 1325 | /* Is SET_DEST something we want to gcse? */ |
02540644 | 1326 | && want_to_gcse_p (dest, &max_distance) |
5c47e414 | 1327 | /* Don't CSE a nop. */ |
bc8197c0 | 1328 | && ! set_noop_p (set) |
5c47e414 | 1329 | /* Don't GCSE if it has attached REG_EQUIV note. |
1330 | At this point this only function parameters should have | |
1331 | REG_EQUIV notes and if the argument slot is used somewhere | |
1332 | explicitly, it means address of parameter has been taken, | |
1333 | so we should not extend the lifetime of the pseudo. */ | |
1334 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
b9f02dbb | 1335 | || ! MEM_P (XEXP (note, 0)))) |
5c47e414 | 1336 | { |
1337 | /* Stores are never anticipatable. */ | |
1338 | int antic_p = 0; | |
1339 | /* An expression is not available if its operands are | |
1340 | subsequently modified, including this insn. It's also not | |
1341 | available if this is a branch, because we can't insert | |
1342 | a set after the branch. */ | |
1343 | int avail_p = oprs_available_p (dest, insn) | |
1344 | && ! JUMP_P (insn); | |
1345 | ||
1346 | /* Record the memory expression (DEST) in the hash table. */ | |
716ad11c | 1347 | insert_expr_in_table (dest, GET_MODE (dest), insn, |
02540644 | 1348 | antic_p, avail_p, max_distance, table); |
5c47e414 | 1349 | } |
1350 | } | |
18aa2adf | 1351 | } |
1352 | ||
1353 | static void | |
526d7387 | 1354 | hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED, |
9908fe4d | 1355 | struct gcse_hash_table_d *table ATTRIBUTE_UNUSED) |
18aa2adf | 1356 | { |
1357 | /* Currently nothing to do. */ | |
1358 | } | |
1359 | ||
1360 | static void | |
526d7387 | 1361 | hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED, |
9908fe4d | 1362 | struct gcse_hash_table_d *table ATTRIBUTE_UNUSED) |
18aa2adf | 1363 | { |
1364 | /* Currently nothing to do. */ | |
1365 | } | |
1366 | ||
bc8197c0 | 1367 | /* Process INSN and add hash table entries as appropriate. */ |
18aa2adf | 1368 | |
1369 | static void | |
9908fe4d | 1370 | hash_scan_insn (rtx_insn *insn, struct gcse_hash_table_d *table) |
18aa2adf | 1371 | { |
1372 | rtx pat = PATTERN (insn); | |
2c084240 | 1373 | int i; |
18aa2adf | 1374 | |
1375 | /* Pick out the sets of INSN and for other forms of instructions record | |
1376 | what's been modified. */ | |
1377 | ||
1b80ba05 | 1378 | if (GET_CODE (pat) == SET) |
27cfe3f1 | 1379 | hash_scan_set (pat, insn, table); |
bc8197c0 | 1380 | |
1381 | else if (GET_CODE (pat) == CLOBBER) | |
1382 | hash_scan_clobber (pat, insn, table); | |
1383 | ||
1384 | else if (GET_CODE (pat) == CALL) | |
1385 | hash_scan_call (pat, insn, table); | |
1386 | ||
18aa2adf | 1387 | else if (GET_CODE (pat) == PARALLEL) |
2c084240 | 1388 | for (i = 0; i < XVECLEN (pat, 0); i++) |
1389 | { | |
1390 | rtx x = XVECEXP (pat, 0, i); | |
18aa2adf | 1391 | |
2c084240 | 1392 | if (GET_CODE (x) == SET) |
27cfe3f1 | 1393 | hash_scan_set (x, insn, table); |
2c084240 | 1394 | else if (GET_CODE (x) == CLOBBER) |
27cfe3f1 | 1395 | hash_scan_clobber (x, insn, table); |
19595145 | 1396 | else if (GET_CODE (x) == CALL) |
27cfe3f1 | 1397 | hash_scan_call (x, insn, table); |
2c084240 | 1398 | } |
18aa2adf | 1399 | } |
1400 | ||
bc8197c0 | 1401 | /* Dump the hash table TABLE to file FILE under the name NAME. */ |
1402 | ||
18aa2adf | 1403 | static void |
9908fe4d | 1404 | dump_hash_table (FILE *file, const char *name, struct gcse_hash_table_d *table) |
18aa2adf | 1405 | { |
1406 | int i; | |
1407 | /* Flattened out table, so it's printed in proper order. */ | |
9908fe4d | 1408 | struct gcse_expr **flat_table; |
b9cf3f63 | 1409 | unsigned int *hash_val; |
9908fe4d | 1410 | struct gcse_expr *expr; |
b9cf3f63 | 1411 | |
9908fe4d | 1412 | flat_table = XCNEWVEC (struct gcse_expr *, table->n_elems); |
2457c754 | 1413 | hash_val = XNEWVEC (unsigned int, table->n_elems); |
18aa2adf | 1414 | |
27cfe3f1 | 1415 | for (i = 0; i < (int) table->size; i++) |
1416 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) | |
2c084240 | 1417 | { |
1418 | flat_table[expr->bitmap_index] = expr; | |
1419 | hash_val[expr->bitmap_index] = i; | |
1420 | } | |
18aa2adf | 1421 | |
1422 | fprintf (file, "%s hash table (%d buckets, %d entries)\n", | |
27cfe3f1 | 1423 | name, table->size, table->n_elems); |
18aa2adf | 1424 | |
27cfe3f1 | 1425 | for (i = 0; i < (int) table->n_elems; i++) |
46fd7177 | 1426 | if (flat_table[i] != 0) |
1427 | { | |
b16f1e6c | 1428 | expr = flat_table[i]; |
8b38b150 | 1429 | fprintf (file, "Index %d (hash value %d; max distance %d)\n ", |
1430 | expr->bitmap_index, hash_val[i], expr->max_distance); | |
b16f1e6c | 1431 | print_rtl (file, expr->expr); |
46fd7177 | 1432 | fprintf (file, "\n"); |
1433 | } | |
18aa2adf | 1434 | |
1435 | fprintf (file, "\n"); | |
b9cf3f63 | 1436 | |
b9cf3f63 | 1437 | free (flat_table); |
1438 | free (hash_val); | |
18aa2adf | 1439 | } |
1440 | ||
1441 | /* Record register first/last/block set information for REGNO in INSN. | |
2c084240 | 1442 | |
eac13465 | 1443 | first_set records the first place in the block where the register |
18aa2adf | 1444 | is set and is used to compute "anticipatability". |
2c084240 | 1445 | |
eac13465 | 1446 | last_set records the last place in the block where the register |
18aa2adf | 1447 | is set and is used to compute "availability". |
2c084240 | 1448 | |
eac13465 | 1449 | last_bb records the block for which first_set and last_set are |
2e81afe5 | 1450 | valid, as a quick test to invalidate them. */ |
18aa2adf | 1451 | |
1452 | static void | |
84b4ae13 | 1453 | record_last_reg_set_info (rtx_insn *insn, int regno) |
18aa2adf | 1454 | { |
eac13465 | 1455 | struct reg_avail_info *info = ®_avail_info[regno]; |
2e81afe5 | 1456 | int luid = DF_INSN_LUID (insn); |
2c084240 | 1457 | |
2e81afe5 | 1458 | info->last_set = luid; |
eac13465 | 1459 | if (info->last_bb != current_bb) |
1460 | { | |
1461 | info->last_bb = current_bb; | |
2e81afe5 | 1462 | info->first_set = luid; |
eac13465 | 1463 | } |
18aa2adf | 1464 | } |
1465 | ||
8e802be9 | 1466 | /* Record memory modification information for INSN. We do not actually care |
1467 | about the memory location(s) that are set, or even how they are set (consider | |
1468 | a CALL_INSN). We merely need to record which insns modify memory. */ | |
18aa2adf | 1469 | |
1470 | static void | |
e050de51 | 1471 | record_last_mem_set_info (rtx_insn *insn) |
18aa2adf | 1472 | { |
37495d69 | 1473 | if (! flag_gcse_lm) |
1474 | return; | |
d7b592b0 | 1475 | |
d2ac64b1 | 1476 | record_last_mem_set_info_common (insn, modify_mem_list, |
1477 | canon_modify_mem_list, | |
1478 | modify_mem_list_set, | |
1479 | blocks_with_calls); | |
18aa2adf | 1480 | } |
1481 | ||
18aa2adf | 1482 | /* Called from compute_hash_table via note_stores to handle one |
ec8895d7 | 1483 | SET or CLOBBER in an insn. DATA is really the instruction in which |
1484 | the SET is taking place. */ | |
18aa2adf | 1485 | |
1486 | static void | |
81a410b1 | 1487 | record_last_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, void *data) |
18aa2adf | 1488 | { |
e050de51 | 1489 | rtx_insn *last_set_insn = (rtx_insn *) data; |
ec8895d7 | 1490 | |
18aa2adf | 1491 | if (GET_CODE (dest) == SUBREG) |
1492 | dest = SUBREG_REG (dest); | |
1493 | ||
b9f02dbb | 1494 | if (REG_P (dest)) |
18aa2adf | 1495 | record_last_reg_set_info (last_set_insn, REGNO (dest)); |
b9f02dbb | 1496 | else if (MEM_P (dest) |
18aa2adf | 1497 | /* Ignore pushes, they clobber nothing. */ |
1498 | && ! push_operand (dest, GET_MODE (dest))) | |
1499 | record_last_mem_set_info (last_set_insn); | |
1500 | } | |
1501 | ||
07abdb66 | 1502 | /* Top level function to create an expression hash table. |
18aa2adf | 1503 | |
1504 | Expression entries are placed in the hash table if | |
1505 | - they are of the form (set (pseudo-reg) src), | |
1506 | - src is something we want to perform GCSE on, | |
1507 | - none of the operands are subsequently modified in the block | |
1508 | ||
18aa2adf | 1509 | Currently src must be a pseudo-reg or a const_int. |
1510 | ||
27cfe3f1 | 1511 | TABLE is the table computed. */ |
18aa2adf | 1512 | |
1513 | static void | |
9908fe4d | 1514 | compute_hash_table_work (struct gcse_hash_table_d *table) |
18aa2adf | 1515 | { |
d743aba2 | 1516 | int i; |
18aa2adf | 1517 | |
8e802be9 | 1518 | /* re-Cache any INSN_LIST nodes we have allocated. */ |
7fb47f9f | 1519 | clear_modify_mem_tables (); |
18aa2adf | 1520 | /* Some working arrays used to track first and last set in each block. */ |
d743aba2 | 1521 | reg_avail_info = GNEWVEC (struct reg_avail_info, max_reg_num ()); |
eac13465 | 1522 | |
d743aba2 | 1523 | for (i = 0; i < max_reg_num (); ++i) |
4c26117a | 1524 | reg_avail_info[i].last_bb = NULL; |
18aa2adf | 1525 | |
fc00614f | 1526 | FOR_EACH_BB_FN (current_bb, cfun) |
18aa2adf | 1527 | { |
526d7387 | 1528 | rtx_insn *insn; |
02e7a332 | 1529 | unsigned int regno; |
18aa2adf | 1530 | |
1531 | /* First pass over the instructions records information used to | |
2e81afe5 | 1532 | determine when registers and memory are first and last set. */ |
defc8016 | 1533 | FOR_BB_INSNS (current_bb, insn) |
18aa2adf | 1534 | { |
da6f6776 | 1535 | if (!NONDEBUG_INSN_P (insn)) |
18aa2adf | 1536 | continue; |
1537 | ||
b9f02dbb | 1538 | if (CALL_P (insn)) |
18aa2adf | 1539 | { |
24ec6636 | 1540 | hard_reg_set_iterator hrsi; |
1541 | EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, | |
1542 | 0, regno, hrsi) | |
1543 | record_last_reg_set_info (insn, regno); | |
2c084240 | 1544 | |
07abdb66 | 1545 | if (! RTL_CONST_OR_PURE_CALL_P (insn)) |
1546 | record_last_mem_set_info (insn); | |
18aa2adf | 1547 | } |
1548 | ||
ec8895d7 | 1549 | note_stores (PATTERN (insn), record_last_set_info, insn); |
18aa2adf | 1550 | } |
1551 | ||
1552 | /* The next pass builds the hash table. */ | |
defc8016 | 1553 | FOR_BB_INSNS (current_bb, insn) |
da6f6776 | 1554 | if (NONDEBUG_INSN_P (insn)) |
1e5b92fa | 1555 | hash_scan_insn (insn, table); |
18aa2adf | 1556 | } |
1557 | ||
eac13465 | 1558 | free (reg_avail_info); |
1559 | reg_avail_info = NULL; | |
18aa2adf | 1560 | } |
1561 | ||
27cfe3f1 | 1562 | /* Allocate space for the set/expr hash TABLE. |
07abdb66 | 1563 | It is used to determine the number of buckets to use. */ |
18aa2adf | 1564 | |
1565 | static void | |
9908fe4d | 1566 | alloc_hash_table (struct gcse_hash_table_d *table) |
18aa2adf | 1567 | { |
1568 | int n; | |
1569 | ||
9845d120 | 1570 | n = get_max_insn_count (); |
1571 | ||
1572 | table->size = n / 4; | |
27cfe3f1 | 1573 | if (table->size < 11) |
1574 | table->size = 11; | |
2c084240 | 1575 | |
18aa2adf | 1576 | /* Attempt to maintain efficient use of hash table. |
1577 | Making it an odd number is simplest for now. | |
1578 | ??? Later take some measurements. */ | |
27cfe3f1 | 1579 | table->size |= 1; |
9908fe4d | 1580 | n = table->size * sizeof (struct gcse_expr *); |
1581 | table->table = GNEWVAR (struct gcse_expr *, n); | |
18aa2adf | 1582 | } |
1583 | ||
27cfe3f1 | 1584 | /* Free things allocated by alloc_hash_table. */ |
18aa2adf | 1585 | |
1586 | static void | |
9908fe4d | 1587 | free_hash_table (struct gcse_hash_table_d *table) |
18aa2adf | 1588 | { |
27cfe3f1 | 1589 | free (table->table); |
18aa2adf | 1590 | } |
1591 | ||
07abdb66 | 1592 | /* Compute the expression hash table TABLE. */ |
18aa2adf | 1593 | |
1594 | static void | |
9908fe4d | 1595 | compute_hash_table (struct gcse_hash_table_d *table) |
18aa2adf | 1596 | { |
1597 | /* Initialize count of number of entries in hash table. */ | |
27cfe3f1 | 1598 | table->n_elems = 0; |
9908fe4d | 1599 | memset (table->table, 0, table->size * sizeof (struct gcse_expr *)); |
18aa2adf | 1600 | |
27cfe3f1 | 1601 | compute_hash_table_work (table); |
18aa2adf | 1602 | } |
1603 | \f | |
1604 | /* Expression tracking support. */ | |
1605 | ||
07abdb66 | 1606 | /* Clear canon_modify_mem_list and modify_mem_list tables. */ |
1607 | static void | |
1608 | clear_modify_mem_tables (void) | |
23e5207c | 1609 | { |
07abdb66 | 1610 | unsigned i; |
1611 | bitmap_iterator bi; | |
23e5207c | 1612 | |
07abdb66 | 1613 | EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi) |
23e5207c | 1614 | { |
f1f41a6c | 1615 | modify_mem_list[i].release (); |
1616 | canon_modify_mem_list[i].release (); | |
23e5207c | 1617 | } |
07abdb66 | 1618 | bitmap_clear (modify_mem_list_set); |
1619 | bitmap_clear (blocks_with_calls); | |
23e5207c | 1620 | } |
1621 | ||
07abdb66 | 1622 | /* Release memory used by modify_mem_list_set. */ |
23e5207c | 1623 | |
07abdb66 | 1624 | static void |
1625 | free_modify_mem_tables (void) | |
375b98af | 1626 | { |
07abdb66 | 1627 | clear_modify_mem_tables (); |
1628 | free (modify_mem_list); | |
1629 | free (canon_modify_mem_list); | |
1630 | modify_mem_list = 0; | |
1631 | canon_modify_mem_list = 0; | |
375b98af | 1632 | } |
07abdb66 | 1633 | \f |
b3f3796c | 1634 | /* Compute PRE+LCM working variables. */ |
18aa2adf | 1635 | |
1636 | /* Local properties of expressions. */ | |
bc8197c0 | 1637 | |
18aa2adf | 1638 | /* Nonzero for expressions that are transparent in the block. */ |
b3f3796c | 1639 | static sbitmap *transp; |
18aa2adf | 1640 | |
b3f3796c | 1641 | /* Nonzero for expressions that are computed (available) in the block. */ |
1642 | static sbitmap *comp; | |
18aa2adf | 1643 | |
b3f3796c | 1644 | /* Nonzero for expressions that are locally anticipatable in the block. */ |
1645 | static sbitmap *antloc; | |
18aa2adf | 1646 | |
b3f3796c | 1647 | /* Nonzero for expressions where this block is an optimal computation |
1648 | point. */ | |
1649 | static sbitmap *pre_optimal; | |
7bdba5dd | 1650 | |
b3f3796c | 1651 | /* Nonzero for expressions which are redundant in a particular block. */ |
1652 | static sbitmap *pre_redundant; | |
18aa2adf | 1653 | |
7bcd381b | 1654 | /* Nonzero for expressions which should be inserted on a specific edge. */ |
1655 | static sbitmap *pre_insert_map; | |
1656 | ||
1657 | /* Nonzero for expressions which should be deleted in a specific block. */ | |
1658 | static sbitmap *pre_delete_map; | |
1659 | ||
b3f3796c | 1660 | /* Allocate vars used for PRE analysis. */ |
18aa2adf | 1661 | |
1662 | static void | |
952f0048 | 1663 | alloc_pre_mem (int n_blocks, int n_exprs) |
18aa2adf | 1664 | { |
b3f3796c | 1665 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); |
1666 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
1667 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
0388e90f | 1668 | |
7bcd381b | 1669 | pre_optimal = NULL; |
1670 | pre_redundant = NULL; | |
1671 | pre_insert_map = NULL; | |
1672 | pre_delete_map = NULL; | |
7bcd381b | 1673 | ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs); |
2c084240 | 1674 | |
7bcd381b | 1675 | /* pre_insert and pre_delete are allocated later. */ |
18aa2adf | 1676 | } |
1677 | ||
b3f3796c | 1678 | /* Free vars used for PRE analysis. */ |
18aa2adf | 1679 | |
1680 | static void | |
952f0048 | 1681 | free_pre_mem (void) |
18aa2adf | 1682 | { |
cca23eb2 | 1683 | sbitmap_vector_free (transp); |
1684 | sbitmap_vector_free (comp); | |
8123d49b | 1685 | |
1686 | /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */ | |
18aa2adf | 1687 | |
7bcd381b | 1688 | if (pre_optimal) |
cca23eb2 | 1689 | sbitmap_vector_free (pre_optimal); |
7bcd381b | 1690 | if (pre_redundant) |
cca23eb2 | 1691 | sbitmap_vector_free (pre_redundant); |
7bcd381b | 1692 | if (pre_insert_map) |
cca23eb2 | 1693 | sbitmap_vector_free (pre_insert_map); |
7bcd381b | 1694 | if (pre_delete_map) |
cca23eb2 | 1695 | sbitmap_vector_free (pre_delete_map); |
7bcd381b | 1696 | |
8123d49b | 1697 | transp = comp = NULL; |
7bcd381b | 1698 | pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL; |
18aa2adf | 1699 | } |
1700 | ||
f151d0c6 | 1701 | /* Remove certain expressions from anticipatable and transparent |
1702 | sets of basic blocks that have incoming abnormal edge. | |
1703 | For PRE remove potentially trapping expressions to avoid placing | |
1704 | them on abnormal edges. For hoisting remove memory references that | |
1705 | can be clobbered by calls. */ | |
18aa2adf | 1706 | |
1707 | static void | |
f151d0c6 | 1708 | prune_expressions (bool pre_p) |
18aa2adf | 1709 | { |
f151d0c6 | 1710 | sbitmap prune_exprs; |
9908fe4d | 1711 | struct gcse_expr *expr; |
e531b5f0 | 1712 | unsigned int ui; |
f151d0c6 | 1713 | basic_block bb; |
bafa5ac7 | 1714 | |
f151d0c6 | 1715 | prune_exprs = sbitmap_alloc (expr_hash_table.n_elems); |
53c5d9d4 | 1716 | bitmap_clear (prune_exprs); |
27cfe3f1 | 1717 | for (ui = 0; ui < expr_hash_table.size; ui++) |
e531b5f0 | 1718 | { |
bc8197c0 | 1719 | for (expr = expr_hash_table.table[ui]; expr; expr = expr->next_same_hash) |
f151d0c6 | 1720 | { |
1721 | /* Note potentially trapping expressions. */ | |
bc8197c0 | 1722 | if (may_trap_p (expr->expr)) |
f151d0c6 | 1723 | { |
08b7917c | 1724 | bitmap_set_bit (prune_exprs, expr->bitmap_index); |
f151d0c6 | 1725 | continue; |
1726 | } | |
e531b5f0 | 1727 | |
bc8197c0 | 1728 | if (!pre_p && MEM_P (expr->expr)) |
f151d0c6 | 1729 | /* Note memory references that can be clobbered by a call. |
1730 | We do not split abnormal edges in hoisting, so would | |
1731 | a memory reference get hoisted along an abnormal edge, | |
1732 | it would be placed /before/ the call. Therefore, only | |
1733 | constant memory references can be hoisted along abnormal | |
1734 | edges. */ | |
1735 | { | |
bc8197c0 | 1736 | if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF |
1737 | && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0))) | |
f151d0c6 | 1738 | continue; |
bafa5ac7 | 1739 | |
bc8197c0 | 1740 | if (MEM_READONLY_P (expr->expr) |
1741 | && !MEM_VOLATILE_P (expr->expr) | |
1742 | && MEM_NOTRAP_P (expr->expr)) | |
f151d0c6 | 1743 | /* Constant memory reference, e.g., a PIC address. */ |
1744 | continue; | |
1745 | ||
1746 | /* ??? Optimally, we would use interprocedural alias | |
1747 | analysis to determine if this mem is actually killed | |
1748 | by this call. */ | |
1749 | ||
08b7917c | 1750 | bitmap_set_bit (prune_exprs, expr->bitmap_index); |
f151d0c6 | 1751 | } |
1752 | } | |
1753 | } | |
bafa5ac7 | 1754 | |
fc00614f | 1755 | FOR_EACH_BB_FN (bb, cfun) |
bafa5ac7 | 1756 | { |
e531b5f0 | 1757 | edge e; |
cd665a06 | 1758 | edge_iterator ei; |
e531b5f0 | 1759 | |
1760 | /* If the current block is the destination of an abnormal edge, we | |
f151d0c6 | 1761 | kill all trapping (for PRE) and memory (for hoist) expressions |
1762 | because we won't be able to properly place the instruction on | |
1763 | the edge. So make them neither anticipatable nor transparent. | |
1764 | This is fairly conservative. | |
1765 | ||
1766 | ??? For hoisting it may be necessary to check for set-and-jump | |
1767 | instructions here, not just for abnormal edges. The general problem | |
1768 | is that when an expression cannot not be placed right at the end of | |
1769 | a basic block we should account for any side-effects of a subsequent | |
1770 | jump instructions that could clobber the expression. It would | |
1771 | be best to implement this check along the lines of | |
1ec78e16 | 1772 | should_hoist_expr_to_dom where the target block is already known |
f151d0c6 | 1773 | and, hence, there's no need to conservatively prune expressions on |
1774 | "intermediate" set-and-jump instructions. */ | |
cd665a06 | 1775 | FOR_EACH_EDGE (e, ei, bb->preds) |
f151d0c6 | 1776 | if ((e->flags & EDGE_ABNORMAL) |
1777 | && (pre_p || CALL_P (BB_END (e->src)))) | |
e531b5f0 | 1778 | { |
53c5d9d4 | 1779 | bitmap_and_compl (antloc[bb->index], |
f151d0c6 | 1780 | antloc[bb->index], prune_exprs); |
53c5d9d4 | 1781 | bitmap_and_compl (transp[bb->index], |
f151d0c6 | 1782 | transp[bb->index], prune_exprs); |
e531b5f0 | 1783 | break; |
1784 | } | |
f151d0c6 | 1785 | } |
1786 | ||
1787 | sbitmap_free (prune_exprs); | |
1788 | } | |
1789 | ||
b89c219c | 1790 | /* It may be necessary to insert a large number of insns on edges to |
1791 | make the existing occurrences of expressions fully redundant. This | |
1792 | routine examines the set of insertions and deletions and if the ratio | |
1793 | of insertions to deletions is too high for a particular expression, then | |
1794 | the expression is removed from the insertion/deletion sets. | |
1795 | ||
1796 | N_ELEMS is the number of elements in the hash table. */ | |
1797 | ||
1798 | static void | |
1799 | prune_insertions_deletions (int n_elems) | |
1800 | { | |
1801 | sbitmap_iterator sbi; | |
1802 | sbitmap prune_exprs; | |
1803 | ||
1804 | /* We always use I to iterate over blocks/edges and J to iterate over | |
1805 | expressions. */ | |
1806 | unsigned int i, j; | |
1807 | ||
1808 | /* Counts for the number of times an expression needs to be inserted and | |
1809 | number of times an expression can be removed as a result. */ | |
1810 | int *insertions = GCNEWVEC (int, n_elems); | |
1811 | int *deletions = GCNEWVEC (int, n_elems); | |
1812 | ||
1813 | /* Set of expressions which require too many insertions relative to | |
1814 | the number of deletions achieved. We will prune these out of the | |
1815 | insertion/deletion sets. */ | |
1816 | prune_exprs = sbitmap_alloc (n_elems); | |
53c5d9d4 | 1817 | bitmap_clear (prune_exprs); |
b89c219c | 1818 | |
1819 | /* Iterate over the edges counting the number of times each expression | |
1820 | needs to be inserted. */ | |
f1955b22 | 1821 | for (i = 0; i < (unsigned) n_edges_for_fn (cfun); i++) |
b89c219c | 1822 | { |
0d211963 | 1823 | EXECUTE_IF_SET_IN_BITMAP (pre_insert_map[i], 0, j, sbi) |
b89c219c | 1824 | insertions[j]++; |
1825 | } | |
1826 | ||
1827 | /* Similarly for deletions, but those occur in blocks rather than on | |
1828 | edges. */ | |
fe672ac0 | 1829 | for (i = 0; i < (unsigned) last_basic_block_for_fn (cfun); i++) |
b89c219c | 1830 | { |
0d211963 | 1831 | EXECUTE_IF_SET_IN_BITMAP (pre_delete_map[i], 0, j, sbi) |
b89c219c | 1832 | deletions[j]++; |
1833 | } | |
1834 | ||
1835 | /* Now that we have accurate counts, iterate over the elements in the | |
1836 | hash table and see if any need too many insertions relative to the | |
1837 | number of evaluations that can be removed. If so, mark them in | |
1838 | PRUNE_EXPRS. */ | |
1839 | for (j = 0; j < (unsigned) n_elems; j++) | |
1840 | if (deletions[j] | |
1841 | && ((unsigned) insertions[j] / deletions[j]) > MAX_GCSE_INSERTION_RATIO) | |
08b7917c | 1842 | bitmap_set_bit (prune_exprs, j); |
b89c219c | 1843 | |
1844 | /* Now prune PRE_INSERT_MAP and PRE_DELETE_MAP based on PRUNE_EXPRS. */ | |
0d211963 | 1845 | EXECUTE_IF_SET_IN_BITMAP (prune_exprs, 0, j, sbi) |
b89c219c | 1846 | { |
f1955b22 | 1847 | for (i = 0; i < (unsigned) n_edges_for_fn (cfun); i++) |
08b7917c | 1848 | bitmap_clear_bit (pre_insert_map[i], j); |
b89c219c | 1849 | |
fe672ac0 | 1850 | for (i = 0; i < (unsigned) last_basic_block_for_fn (cfun); i++) |
08b7917c | 1851 | bitmap_clear_bit (pre_delete_map[i], j); |
b89c219c | 1852 | } |
1853 | ||
1854 | sbitmap_free (prune_exprs); | |
1855 | free (insertions); | |
1856 | free (deletions); | |
1857 | } | |
1858 | ||
f151d0c6 | 1859 | /* Top level routine to do the dataflow analysis needed by PRE. */ |
e531b5f0 | 1860 | |
bc8197c0 | 1861 | static struct edge_list * |
f151d0c6 | 1862 | compute_pre_data (void) |
1863 | { | |
bc8197c0 | 1864 | struct edge_list *edge_list; |
f151d0c6 | 1865 | basic_block bb; |
1866 | ||
1867 | compute_local_properties (transp, comp, antloc, &expr_hash_table); | |
1868 | prune_expressions (true); | |
fe672ac0 | 1869 | bitmap_vector_clear (ae_kill, last_basic_block_for_fn (cfun)); |
f151d0c6 | 1870 | |
1871 | /* Compute ae_kill for each basic block using: | |
1872 | ||
1873 | ~(TRANSP | COMP) | |
1874 | */ | |
1875 | ||
fc00614f | 1876 | FOR_EACH_BB_FN (bb, cfun) |
f151d0c6 | 1877 | { |
53c5d9d4 | 1878 | bitmap_ior (ae_kill[bb->index], transp[bb->index], comp[bb->index]); |
1879 | bitmap_not (ae_kill[bb->index], ae_kill[bb->index]); | |
bafa5ac7 | 1880 | } |
1881 | ||
3f5be5f4 | 1882 | edge_list = pre_edge_lcm (expr_hash_table.n_elems, transp, comp, antloc, |
7bcd381b | 1883 | ae_kill, &pre_insert_map, &pre_delete_map); |
cca23eb2 | 1884 | sbitmap_vector_free (antloc); |
8123d49b | 1885 | antloc = NULL; |
cca23eb2 | 1886 | sbitmap_vector_free (ae_kill); |
3cfec666 | 1887 | ae_kill = NULL; |
b89c219c | 1888 | |
1889 | prune_insertions_deletions (expr_hash_table.n_elems); | |
bc8197c0 | 1890 | |
1891 | return edge_list; | |
18aa2adf | 1892 | } |
1893 | \f | |
1894 | /* PRE utilities */ | |
1895 | ||
6ef828f9 | 1896 | /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach |
b3f3796c | 1897 | block BB. |
18aa2adf | 1898 | |
1899 | VISITED is a pointer to a working buffer for tracking which BB's have | |
1900 | been visited. It is NULL for the top-level call. | |
1901 | ||
1902 | We treat reaching expressions that go through blocks containing the same | |
1903 | reaching expression as "not reaching". E.g. if EXPR is generated in blocks | |
1904 | 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block | |
1905 | 2 as not reaching. The intent is to improve the probability of finding | |
1906 | only one reaching expression and to reduce register lifetimes by picking | |
1907 | the closest such expression. */ | |
1908 | ||
1909 | static int | |
9908fe4d | 1910 | pre_expr_reaches_here_p_work (basic_block occr_bb, struct gcse_expr *expr, |
bc8197c0 | 1911 | basic_block bb, char *visited) |
18aa2adf | 1912 | { |
cb7e28c3 | 1913 | edge pred; |
cd665a06 | 1914 | edge_iterator ei; |
48e1416a | 1915 | |
cd665a06 | 1916 | FOR_EACH_EDGE (pred, ei, bb->preds) |
18aa2adf | 1917 | { |
8d4a53c7 | 1918 | basic_block pred_bb = pred->src; |
18aa2adf | 1919 | |
34154e27 | 1920 | if (pred->src == ENTRY_BLOCK_PTR_FOR_FN (cfun) |
18aa2adf | 1921 | /* Has predecessor has already been visited? */ |
b3d6de89 | 1922 | || visited[pred_bb->index]) |
2c084240 | 1923 | ;/* Nothing to do. */ |
1924 | ||
18aa2adf | 1925 | /* Does this predecessor generate this expression? */ |
08b7917c | 1926 | else if (bitmap_bit_p (comp[pred_bb->index], expr->bitmap_index)) |
18aa2adf | 1927 | { |
1928 | /* Is this the occurrence we're looking for? | |
1929 | Note that there's only one generating occurrence per block | |
1930 | so we just need to check the block number. */ | |
b3f3796c | 1931 | if (occr_bb == pred_bb) |
18aa2adf | 1932 | return 1; |
2c084240 | 1933 | |
b3d6de89 | 1934 | visited[pred_bb->index] = 1; |
18aa2adf | 1935 | } |
1936 | /* Ignore this predecessor if it kills the expression. */ | |
08b7917c | 1937 | else if (! bitmap_bit_p (transp[pred_bb->index], expr->bitmap_index)) |
b3d6de89 | 1938 | visited[pred_bb->index] = 1; |
2c084240 | 1939 | |
18aa2adf | 1940 | /* Neither gen nor kill. */ |
1941 | else | |
b65b4f63 | 1942 | { |
b3d6de89 | 1943 | visited[pred_bb->index] = 1; |
048599b9 | 1944 | if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited)) |
18aa2adf | 1945 | return 1; |
b65b4f63 | 1946 | } |
18aa2adf | 1947 | } |
1948 | ||
1949 | /* All paths have been checked. */ | |
1950 | return 0; | |
1951 | } | |
cd55d9d6 | 1952 | |
1953 | /* The wrapper for pre_expr_reaches_here_work that ensures that any | |
aa40f561 | 1954 | memory allocated for that function is returned. */ |
cd55d9d6 | 1955 | |
1956 | static int | |
9908fe4d | 1957 | pre_expr_reaches_here_p (basic_block occr_bb, struct gcse_expr *expr, basic_block bb) |
cd55d9d6 | 1958 | { |
1959 | int rval; | |
fe672ac0 | 1960 | char *visited = XCNEWVEC (char, last_basic_block_for_fn (cfun)); |
cd55d9d6 | 1961 | |
387732c1 | 1962 | rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited); |
cd55d9d6 | 1963 | |
1964 | free (visited); | |
2c084240 | 1965 | return rval; |
cd55d9d6 | 1966 | } |
18aa2adf | 1967 | \f |
bc8197c0 | 1968 | /* Generate RTL to copy an EXPR to its `reaching_reg' and return it. */ |
7bcd381b | 1969 | |
526d7387 | 1970 | static rtx_insn * |
9908fe4d | 1971 | process_insert_insn (struct gcse_expr *expr) |
7bcd381b | 1972 | { |
1973 | rtx reg = expr->reaching_reg; | |
bc8197c0 | 1974 | /* Copy the expression to make sure we don't have any sharing issues. */ |
06e2144a | 1975 | rtx exp = copy_rtx (expr->expr); |
526d7387 | 1976 | rtx_insn *pat; |
7bcd381b | 1977 | |
1978 | start_sequence (); | |
06e2144a | 1979 | |
1980 | /* If the expression is something that's an operand, like a constant, | |
1981 | just copy it to a register. */ | |
1982 | if (general_operand (exp, GET_MODE (reg))) | |
1983 | emit_move_insn (reg, exp); | |
1984 | ||
1985 | /* Otherwise, make a new insn to compute this expression and make sure the | |
bc8197c0 | 1986 | insn will be recognized (this also adds any needed CLOBBERs). */ |
0d59b19d | 1987 | else |
1988 | { | |
d1f9b275 | 1989 | rtx_insn *insn = emit_insn (gen_rtx_SET (reg, exp)); |
0d59b19d | 1990 | |
dae9d0e7 | 1991 | if (insn_invalid_p (insn, false)) |
0fa137b8 | 1992 | gcc_unreachable (); |
0d59b19d | 1993 | } |
48e1416a | 1994 | |
31d3e01c | 1995 | pat = get_insns (); |
7bcd381b | 1996 | end_sequence (); |
1997 | ||
1998 | return pat; | |
1999 | } | |
3cfec666 | 2000 | |
b3f3796c | 2001 | /* Add EXPR to the end of basic block BB. |
2002 | ||
36f52b0d | 2003 | This is used by both the PRE and code hoisting. */ |
18aa2adf | 2004 | |
2005 | static void | |
9908fe4d | 2006 | insert_insn_end_basic_block (struct gcse_expr *expr, basic_block bb) |
18aa2adf | 2007 | { |
4cd001d5 | 2008 | rtx_insn *insn = BB_END (bb); |
526d7387 | 2009 | rtx_insn *new_insn; |
18aa2adf | 2010 | rtx reg = expr->reaching_reg; |
2011 | int regno = REGNO (reg); | |
526d7387 | 2012 | rtx_insn *pat, *pat_end; |
18aa2adf | 2013 | |
7bcd381b | 2014 | pat = process_insert_insn (expr); |
0d59b19d | 2015 | gcc_assert (pat && INSN_P (pat)); |
31d3e01c | 2016 | |
2017 | pat_end = pat; | |
2018 | while (NEXT_INSN (pat_end) != NULL_RTX) | |
2019 | pat_end = NEXT_INSN (pat_end); | |
18aa2adf | 2020 | |
2021 | /* If the last insn is a jump, insert EXPR in front [taking care to | |
917bbcab | 2022 | handle cc0, etc. properly]. Similarly we need to care trapping |
17a54dac | 2023 | instructions in presence of non-call exceptions. */ |
18aa2adf | 2024 | |
b9f02dbb | 2025 | if (JUMP_P (insn) |
6d7dc5b9 | 2026 | || (NONJUMP_INSN_P (insn) |
ea091dfd | 2027 | && (!single_succ_p (bb) |
2028 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL))) | |
18aa2adf | 2029 | { |
18aa2adf | 2030 | /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts |
2031 | if cc0 isn't set. */ | |
693c9f42 | 2032 | if (HAVE_cc0) |
18aa2adf | 2033 | { |
693c9f42 | 2034 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2035 | if (note) | |
2036 | insn = safe_as_a <rtx_insn *> (XEXP (note, 0)); | |
2037 | else | |
2038 | { | |
2039 | rtx_insn *maybe_cc0_setter = prev_nonnote_insn (insn); | |
2040 | if (maybe_cc0_setter | |
2041 | && INSN_P (maybe_cc0_setter) | |
2042 | && sets_cc0_p (PATTERN (maybe_cc0_setter))) | |
2043 | insn = maybe_cc0_setter; | |
2044 | } | |
18aa2adf | 2045 | } |
693c9f42 | 2046 | |
18aa2adf | 2047 | /* FIXME: What if something in cc0/jump uses value set in new insn? */ |
3072d30e | 2048 | new_insn = emit_insn_before_noloc (pat, insn, bb); |
170e5c6c | 2049 | } |
2c084240 | 2050 | |
170e5c6c | 2051 | /* Likewise if the last insn is a call, as will happen in the presence |
2052 | of exception handling. */ | |
b9f02dbb | 2053 | else if (CALL_P (insn) |
ea091dfd | 2054 | && (!single_succ_p (bb) |
2055 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL)) | |
170e5c6c | 2056 | { |
ed5527ca | 2057 | /* Keeping in mind targets with small register classes and parameters |
2058 | in registers, we search backward and place the instructions before | |
2059 | the first parameter is loaded. Do this for everyone for consistency | |
36f52b0d | 2060 | and a presumption that we'll get better code elsewhere as well. */ |
170e5c6c | 2061 | |
2062 | /* Since different machines initialize their parameter registers | |
2063 | in different orders, assume nothing. Collect the set of all | |
2064 | parameter registers. */ | |
5496dbfc | 2065 | insn = find_first_parameter_load (insn, BB_HEAD (bb)); |
170e5c6c | 2066 | |
9fc37e9d | 2067 | /* If we found all the parameter loads, then we want to insert |
2068 | before the first parameter load. | |
2069 | ||
2070 | If we did not find all the parameter loads, then we might have | |
2071 | stopped on the head of the block, which could be a CODE_LABEL. | |
2072 | If we inserted before the CODE_LABEL, then we would be putting | |
2073 | the insn in the wrong basic block. In that case, put the insn | |
8b3dea0b | 2074 | after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */ |
b9f02dbb | 2075 | while (LABEL_P (insn) |
83458610 | 2076 | || NOTE_INSN_BASIC_BLOCK_P (insn)) |
8b3dea0b | 2077 | insn = NEXT_INSN (insn); |
2c084240 | 2078 | |
3072d30e | 2079 | new_insn = emit_insn_before_noloc (pat, insn, bb); |
18aa2adf | 2080 | } |
2081 | else | |
3072d30e | 2082 | new_insn = emit_insn_after_noloc (pat, insn, bb); |
18aa2adf | 2083 | |
31d3e01c | 2084 | while (1) |
b3f3796c | 2085 | { |
31d3e01c | 2086 | if (INSN_P (pat)) |
2e81afe5 | 2087 | add_label_notes (PATTERN (pat), new_insn); |
31d3e01c | 2088 | if (pat == pat_end) |
2089 | break; | |
2090 | pat = NEXT_INSN (pat); | |
b3f3796c | 2091 | } |
170e5c6c | 2092 | |
18aa2adf | 2093 | gcse_create_count++; |
2094 | ||
3f5be5f4 | 2095 | if (dump_file) |
18aa2adf | 2096 | { |
3f5be5f4 | 2097 | fprintf (dump_file, "PRE/HOIST: end of bb %d, insn %d, ", |
b3d6de89 | 2098 | bb->index, INSN_UID (new_insn)); |
3f5be5f4 | 2099 | fprintf (dump_file, "copying expression %d to reg %d\n", |
2c084240 | 2100 | expr->bitmap_index, regno); |
18aa2adf | 2101 | } |
2102 | } | |
2103 | ||
7bcd381b | 2104 | /* Insert partially redundant expressions on edges in the CFG to make |
2105 | the expressions fully redundant. */ | |
18aa2adf | 2106 | |
7bcd381b | 2107 | static int |
9908fe4d | 2108 | pre_edge_insert (struct edge_list *edge_list, struct gcse_expr **index_map) |
18aa2adf | 2109 | { |
2c084240 | 2110 | int e, i, j, num_edges, set_size, did_insert = 0; |
b3f3796c | 2111 | sbitmap *inserted; |
2112 | ||
7bcd381b | 2113 | /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge |
2114 | if it reaches any of the deleted expressions. */ | |
18aa2adf | 2115 | |
7bcd381b | 2116 | set_size = pre_insert_map[0]->size; |
2117 | num_edges = NUM_EDGES (edge_list); | |
27cfe3f1 | 2118 | inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems); |
53c5d9d4 | 2119 | bitmap_vector_clear (inserted, num_edges); |
18aa2adf | 2120 | |
7bcd381b | 2121 | for (e = 0; e < num_edges; e++) |
18aa2adf | 2122 | { |
2123 | int indx; | |
8d4a53c7 | 2124 | basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e); |
b3f3796c | 2125 | |
b3f3796c | 2126 | for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS) |
18aa2adf | 2127 | { |
7bcd381b | 2128 | SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i]; |
18aa2adf | 2129 | |
bc8197c0 | 2130 | for (j = indx; |
2131 | insert && j < (int) expr_hash_table.n_elems; | |
2132 | j++, insert >>= 1) | |
2c084240 | 2133 | if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX) |
2134 | { | |
9908fe4d | 2135 | struct gcse_expr *expr = index_map[j]; |
2136 | struct gcse_occr *occr; | |
b3f3796c | 2137 | |
424da949 | 2138 | /* Now look at each deleted occurrence of this expression. */ |
2c084240 | 2139 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
2140 | { | |
2141 | if (! occr->deleted_p) | |
2142 | continue; | |
2143 | ||
822e391f | 2144 | /* Insert this expression on this edge if it would |
424da949 | 2145 | reach the deleted occurrence in BB. */ |
08b7917c | 2146 | if (!bitmap_bit_p (inserted[e], j)) |
2c084240 | 2147 | { |
526d7387 | 2148 | rtx_insn *insn; |
2c084240 | 2149 | edge eg = INDEX_EDGE (edge_list, e); |
2150 | ||
2151 | /* We can't insert anything on an abnormal and | |
2152 | critical edge, so we insert the insn at the end of | |
2153 | the previous block. There are several alternatives | |
2154 | detailed in Morgans book P277 (sec 10.5) for | |
2155 | handling this situation. This one is easiest for | |
2156 | now. */ | |
2157 | ||
164aece4 | 2158 | if (eg->flags & EDGE_ABNORMAL) |
36f52b0d | 2159 | insert_insn_end_basic_block (index_map[j], bb); |
2c084240 | 2160 | else |
2161 | { | |
2162 | insn = process_insert_insn (index_map[j]); | |
2163 | insert_insn_on_edge (insn, eg); | |
2164 | } | |
2165 | ||
3f5be5f4 | 2166 | if (dump_file) |
2c084240 | 2167 | { |
d743aba2 | 2168 | fprintf (dump_file, "PRE: edge (%d,%d), ", |
b3d6de89 | 2169 | bb->index, |
2170 | INDEX_EDGE_SUCC_BB (edge_list, e)->index); | |
3f5be5f4 | 2171 | fprintf (dump_file, "copy expression %d\n", |
2c084240 | 2172 | expr->bitmap_index); |
2173 | } | |
2174 | ||
8e802be9 | 2175 | update_ld_motion_stores (expr); |
08b7917c | 2176 | bitmap_set_bit (inserted[e], j); |
2c084240 | 2177 | did_insert = 1; |
2178 | gcse_create_count++; | |
2179 | } | |
2180 | } | |
2181 | } | |
18aa2adf | 2182 | } |
2183 | } | |
0388e90f | 2184 | |
cca23eb2 | 2185 | sbitmap_vector_free (inserted); |
7bcd381b | 2186 | return did_insert; |
18aa2adf | 2187 | } |
2188 | ||
53ee16e4 | 2189 | /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG. |
9d344979 | 2190 | Given "old_reg <- expr" (INSN), instead of adding after it |
2191 | reaching_reg <- old_reg | |
2192 | it's better to do the following: | |
2193 | reaching_reg <- expr | |
2194 | old_reg <- reaching_reg | |
2195 | because this way copy propagation can discover additional PRE | |
5c47e414 | 2196 | opportunities. But if this fails, we try the old way. |
2197 | When "expr" is a store, i.e. | |
2198 | given "MEM <- old_reg", instead of adding after it | |
2199 | reaching_reg <- old_reg | |
2200 | it's better to add it before as follows: | |
2201 | reaching_reg <- old_reg | |
2202 | MEM <- reaching_reg. */ | |
18aa2adf | 2203 | |
2204 | static void | |
9908fe4d | 2205 | pre_insert_copy_insn (struct gcse_expr *expr, rtx_insn *insn) |
18aa2adf | 2206 | { |
2207 | rtx reg = expr->reaching_reg; | |
2208 | int regno = REGNO (reg); | |
2209 | int indx = expr->bitmap_index; | |
53ee16e4 | 2210 | rtx pat = PATTERN (insn); |
f9a00e9e | 2211 | rtx set, first_set; |
2212 | rtx_insn *new_insn; | |
9d344979 | 2213 | rtx old_reg; |
53ee16e4 | 2214 | int i; |
18aa2adf | 2215 | |
53ee16e4 | 2216 | /* This block matches the logic in hash_scan_insn. */ |
0d59b19d | 2217 | switch (GET_CODE (pat)) |
53ee16e4 | 2218 | { |
0d59b19d | 2219 | case SET: |
2220 | set = pat; | |
2221 | break; | |
2222 | ||
2223 | case PARALLEL: | |
53ee16e4 | 2224 | /* Search through the parallel looking for the set whose |
2225 | source was the expression that we're interested in. */ | |
00ce82e3 | 2226 | first_set = NULL_RTX; |
53ee16e4 | 2227 | set = NULL_RTX; |
2228 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
2229 | { | |
2230 | rtx x = XVECEXP (pat, 0, i); | |
00ce82e3 | 2231 | if (GET_CODE (x) == SET) |
53ee16e4 | 2232 | { |
00ce82e3 | 2233 | /* If the source was a REG_EQUAL or REG_EQUIV note, we |
2234 | may not find an equivalent expression, but in this | |
2235 | case the PARALLEL will have a single set. */ | |
2236 | if (first_set == NULL_RTX) | |
2237 | first_set = x; | |
2238 | if (expr_equiv_p (SET_SRC (x), expr->expr)) | |
2239 | { | |
2240 | set = x; | |
2241 | break; | |
2242 | } | |
53ee16e4 | 2243 | } |
2244 | } | |
00ce82e3 | 2245 | |
2246 | gcc_assert (first_set); | |
2247 | if (set == NULL_RTX) | |
2248 | set = first_set; | |
0d59b19d | 2249 | break; |
2250 | ||
2251 | default: | |
2252 | gcc_unreachable (); | |
53ee16e4 | 2253 | } |
2c084240 | 2254 | |
b9f02dbb | 2255 | if (REG_P (SET_DEST (set))) |
53ee16e4 | 2256 | { |
5c47e414 | 2257 | old_reg = SET_DEST (set); |
2258 | /* Check if we can modify the set destination in the original insn. */ | |
2259 | if (validate_change (insn, &SET_DEST (set), reg, 0)) | |
2260 | { | |
2261 | new_insn = gen_move_insn (old_reg, reg); | |
2262 | new_insn = emit_insn_after (new_insn, insn); | |
5c47e414 | 2263 | } |
2264 | else | |
2265 | { | |
2266 | new_insn = gen_move_insn (reg, old_reg); | |
2267 | new_insn = emit_insn_after (new_insn, insn); | |
5c47e414 | 2268 | } |
53ee16e4 | 2269 | } |
5c47e414 | 2270 | else /* This is possible only in case of a store to memory. */ |
53ee16e4 | 2271 | { |
5c47e414 | 2272 | old_reg = SET_SRC (set); |
53ee16e4 | 2273 | new_insn = gen_move_insn (reg, old_reg); |
5c47e414 | 2274 | |
2275 | /* Check if we can modify the set source in the original insn. */ | |
2276 | if (validate_change (insn, &SET_SRC (set), reg, 0)) | |
2277 | new_insn = emit_insn_before (new_insn, insn); | |
2278 | else | |
2279 | new_insn = emit_insn_after (new_insn, insn); | |
53ee16e4 | 2280 | } |
18aa2adf | 2281 | |
2282 | gcse_create_count++; | |
2283 | ||
3f5be5f4 | 2284 | if (dump_file) |
2285 | fprintf (dump_file, | |
7bcd381b | 2286 | "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n", |
90bd219d | 2287 | BLOCK_FOR_INSN (insn)->index, INSN_UID (new_insn), indx, |
7bcd381b | 2288 | INSN_UID (insn), regno); |
18aa2adf | 2289 | } |
2290 | ||
2291 | /* Copy available expressions that reach the redundant expression | |
2292 | to `reaching_reg'. */ | |
2293 | ||
2294 | static void | |
952f0048 | 2295 | pre_insert_copies (void) |
18aa2adf | 2296 | { |
5c47e414 | 2297 | unsigned int i, added_copy; |
9908fe4d | 2298 | struct gcse_expr *expr; |
2299 | struct gcse_occr *occr; | |
2300 | struct gcse_occr *avail; | |
b3f3796c | 2301 | |
18aa2adf | 2302 | /* For each available expression in the table, copy the result to |
2303 | `reaching_reg' if the expression reaches a deleted one. | |
2304 | ||
2305 | ??? The current algorithm is rather brute force. | |
2306 | Need to do some profiling. */ | |
2307 | ||
27cfe3f1 | 2308 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 2309 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 2310 | { |
2311 | /* If the basic block isn't reachable, PPOUT will be TRUE. However, | |
2312 | we don't want to insert a copy here because the expression may not | |
2313 | really be redundant. So only insert an insn if the expression was | |
2314 | deleted. This test also avoids further processing if the | |
2315 | expression wasn't deleted anywhere. */ | |
2316 | if (expr->reaching_reg == NULL) | |
2317 | continue; | |
b9f02dbb | 2318 | |
5c47e414 | 2319 | /* Set when we add a copy for that expression. */ |
b9f02dbb | 2320 | added_copy = 0; |
2c084240 | 2321 | |
2322 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) | |
2323 | { | |
2324 | if (! occr->deleted_p) | |
2325 | continue; | |
18aa2adf | 2326 | |
2c084240 | 2327 | for (avail = expr->avail_occr; avail != NULL; avail = avail->next) |
2328 | { | |
526d7387 | 2329 | rtx_insn *insn = avail->insn; |
18aa2adf | 2330 | |
2c084240 | 2331 | /* No need to handle this one if handled already. */ |
2332 | if (avail->copied_p) | |
2333 | continue; | |
18aa2adf | 2334 | |
2c084240 | 2335 | /* Don't handle this one if it's a redundant one. */ |
dd1286fb | 2336 | if (insn->deleted ()) |
2c084240 | 2337 | continue; |
18aa2adf | 2338 | |
2c084240 | 2339 | /* Or if the expression doesn't reach the deleted one. */ |
3cfec666 | 2340 | if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn), |
8d4a53c7 | 2341 | expr, |
2342 | BLOCK_FOR_INSN (occr->insn))) | |
2c084240 | 2343 | continue; |
18aa2adf | 2344 | |
5c47e414 | 2345 | added_copy = 1; |
2346 | ||
2c084240 | 2347 | /* Copy the result of avail to reaching_reg. */ |
2348 | pre_insert_copy_insn (expr, insn); | |
2349 | avail->copied_p = 1; | |
2350 | } | |
2351 | } | |
5c47e414 | 2352 | |
b9f02dbb | 2353 | if (added_copy) |
5c47e414 | 2354 | update_ld_motion_stores (expr); |
2c084240 | 2355 | } |
18aa2adf | 2356 | } |
2357 | ||
97f436b3 | 2358 | struct set_data |
2359 | { | |
526d7387 | 2360 | rtx_insn *insn; |
97f436b3 | 2361 | const_rtx set; |
2362 | int nsets; | |
2363 | }; | |
2364 | ||
2365 | /* Increment number of sets and record set in DATA. */ | |
2366 | ||
2367 | static void | |
2368 | record_set_data (rtx dest, const_rtx set, void *data) | |
2369 | { | |
2370 | struct set_data *s = (struct set_data *)data; | |
2371 | ||
2372 | if (GET_CODE (set) == SET) | |
2373 | { | |
2374 | /* We allow insns having multiple sets, where all but one are | |
2375 | dead as single set insns. In the common case only a single | |
2376 | set is present, so we want to avoid checking for REG_UNUSED | |
2377 | notes unless necessary. */ | |
2378 | if (s->nsets == 1 | |
2379 | && find_reg_note (s->insn, REG_UNUSED, SET_DEST (s->set)) | |
2380 | && !side_effects_p (s->set)) | |
2381 | s->nsets = 0; | |
2382 | ||
2383 | if (!s->nsets) | |
2384 | { | |
2385 | /* Record this set. */ | |
2386 | s->nsets += 1; | |
2387 | s->set = set; | |
2388 | } | |
2389 | else if (!find_reg_note (s->insn, REG_UNUSED, dest) | |
2390 | || side_effects_p (set)) | |
2391 | s->nsets += 1; | |
2392 | } | |
2393 | } | |
2394 | ||
2395 | static const_rtx | |
526d7387 | 2396 | single_set_gcse (rtx_insn *insn) |
97f436b3 | 2397 | { |
2398 | struct set_data s; | |
2399 | rtx pattern; | |
2400 | ||
2401 | gcc_assert (INSN_P (insn)); | |
2402 | ||
2403 | /* Optimize common case. */ | |
2404 | pattern = PATTERN (insn); | |
2405 | if (GET_CODE (pattern) == SET) | |
2406 | return pattern; | |
2407 | ||
2408 | s.insn = insn; | |
2409 | s.nsets = 0; | |
2410 | note_stores (pattern, record_set_data, &s); | |
2411 | ||
2412 | /* Considered invariant insns have exactly one set. */ | |
2413 | gcc_assert (s.nsets == 1); | |
2414 | return s.set; | |
2415 | } | |
2416 | ||
51f6e244 | 2417 | /* Emit move from SRC to DEST noting the equivalence with expression computed |
2418 | in INSN. */ | |
bc8197c0 | 2419 | |
9ed997be | 2420 | static rtx_insn * |
526d7387 | 2421 | gcse_emit_move_after (rtx dest, rtx src, rtx_insn *insn) |
51f6e244 | 2422 | { |
50fc2d35 | 2423 | rtx_insn *new_rtx; |
97f436b3 | 2424 | const_rtx set = single_set_gcse (insn); |
2425 | rtx set2; | |
51f6e244 | 2426 | rtx note; |
264adf90 | 2427 | rtx eqv = NULL_RTX; |
51f6e244 | 2428 | |
2429 | /* This should never fail since we're creating a reg->reg copy | |
2430 | we've verified to be valid. */ | |
2431 | ||
9ce37fa7 | 2432 | new_rtx = emit_insn_after (gen_move_insn (dest, src), insn); |
27442180 | 2433 | |
264adf90 | 2434 | /* Note the equivalence for local CSE pass. Take the note from the old |
2435 | set if there was one. Otherwise record the SET_SRC from the old set | |
2436 | unless DEST is also an operand of the SET_SRC. */ | |
9ce37fa7 | 2437 | set2 = single_set (new_rtx); |
65e78aeb | 2438 | if (!set2 || !rtx_equal_p (SET_DEST (set2), dest)) |
9ce37fa7 | 2439 | return new_rtx; |
51f6e244 | 2440 | if ((note = find_reg_equal_equiv_note (insn))) |
2441 | eqv = XEXP (note, 0); | |
264adf90 | 2442 | else if (! REG_P (dest) |
2443 | || ! reg_mentioned_p (dest, SET_SRC (set))) | |
51f6e244 | 2444 | eqv = SET_SRC (set); |
2445 | ||
264adf90 | 2446 | if (eqv != NULL_RTX) |
2447 | set_unique_reg_note (new_rtx, REG_EQUAL, copy_insn_1 (eqv)); | |
51f6e244 | 2448 | |
9ce37fa7 | 2449 | return new_rtx; |
51f6e244 | 2450 | } |
2451 | ||
18aa2adf | 2452 | /* Delete redundant computations. |
18aa2adf | 2453 | Deletion is done by changing the insn to copy the `reaching_reg' of |
2454 | the expression into the result of the SET. It is left to later passes | |
67d57e27 | 2455 | to propagate the copy or eliminate it. |
18aa2adf | 2456 | |
bc8197c0 | 2457 | Return nonzero if a change is made. */ |
18aa2adf | 2458 | |
2459 | static int | |
952f0048 | 2460 | pre_delete (void) |
18aa2adf | 2461 | { |
a08b57af | 2462 | unsigned int i; |
256d47d0 | 2463 | int changed; |
9908fe4d | 2464 | struct gcse_expr *expr; |
2465 | struct gcse_occr *occr; | |
b3f3796c | 2466 | |
18aa2adf | 2467 | changed = 0; |
27cfe3f1 | 2468 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 2469 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 2470 | { |
2471 | int indx = expr->bitmap_index; | |
18aa2adf | 2472 | |
bc8197c0 | 2473 | /* We only need to search antic_occr since we require ANTLOC != 0. */ |
2c084240 | 2474 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
2475 | { | |
526d7387 | 2476 | rtx_insn *insn = occr->insn; |
2c084240 | 2477 | rtx set; |
8d4a53c7 | 2478 | basic_block bb = BLOCK_FOR_INSN (insn); |
18aa2adf | 2479 | |
53ee16e4 | 2480 | /* We only delete insns that have a single_set. */ |
08b7917c | 2481 | if (bitmap_bit_p (pre_delete_map[bb->index], indx) |
3072d30e | 2482 | && (set = single_set (insn)) != 0 |
2483 | && dbg_cnt (pre_insn)) | |
2c084240 | 2484 | { |
2c084240 | 2485 | /* Create a pseudo-reg to store the result of reaching |
2486 | expressions into. Get the mode for the new pseudo from | |
2487 | the mode of the original destination pseudo. */ | |
2488 | if (expr->reaching_reg == NULL) | |
ae12ddda | 2489 | expr->reaching_reg = gen_reg_rtx_and_attrs (SET_DEST (set)); |
2c084240 | 2490 | |
bc8197c0 | 2491 | gcse_emit_move_after (SET_DEST (set), expr->reaching_reg, insn); |
51f6e244 | 2492 | delete_insn (insn); |
2493 | occr->deleted_p = 1; | |
51f6e244 | 2494 | changed = 1; |
2495 | gcse_subst_count++; | |
18aa2adf | 2496 | |
3f5be5f4 | 2497 | if (dump_file) |
2c084240 | 2498 | { |
3f5be5f4 | 2499 | fprintf (dump_file, |
2c084240 | 2500 | "PRE: redundant insn %d (expression %d) in ", |
2501 | INSN_UID (insn), indx); | |
3f5be5f4 | 2502 | fprintf (dump_file, "bb %d, reaching reg is %d\n", |
b3d6de89 | 2503 | bb->index, REGNO (expr->reaching_reg)); |
2c084240 | 2504 | } |
2505 | } | |
2506 | } | |
2507 | } | |
18aa2adf | 2508 | |
2509 | return changed; | |
2510 | } | |
2511 | ||
2512 | /* Perform GCSE optimizations using PRE. | |
2513 | This is called by one_pre_gcse_pass after all the dataflow analysis | |
2514 | has been done. | |
2515 | ||
2c084240 | 2516 | This is based on the original Morel-Renvoise paper Fred Chow's thesis, and |
2517 | lazy code motion from Knoop, Ruthing and Steffen as described in Advanced | |
2518 | Compiler Design and Implementation. | |
18aa2adf | 2519 | |
2c084240 | 2520 | ??? A new pseudo reg is created to hold the reaching expression. The nice |
2521 | thing about the classical approach is that it would try to use an existing | |
2522 | reg. If the register can't be adequately optimized [i.e. we introduce | |
2523 | reload problems], one could add a pass here to propagate the new register | |
2524 | through the block. | |
18aa2adf | 2525 | |
2c084240 | 2526 | ??? We don't handle single sets in PARALLELs because we're [currently] not |
2527 | able to copy the rest of the parallel when we insert copies to create full | |
2528 | redundancies from partial redundancies. However, there's no reason why we | |
2529 | can't handle PARALLELs in the cases where there are no partial | |
18aa2adf | 2530 | redundancies. */ |
2531 | ||
2532 | static int | |
bc8197c0 | 2533 | pre_gcse (struct edge_list *edge_list) |
18aa2adf | 2534 | { |
a08b57af | 2535 | unsigned int i; |
2536 | int did_insert, changed; | |
9908fe4d | 2537 | struct gcse_expr **index_map; |
2538 | struct gcse_expr *expr; | |
18aa2adf | 2539 | |
2540 | /* Compute a mapping from expression number (`bitmap_index') to | |
2541 | hash table entry. */ | |
2542 | ||
9908fe4d | 2543 | index_map = XCNEWVEC (struct gcse_expr *, expr_hash_table.n_elems); |
27cfe3f1 | 2544 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 2545 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 2546 | index_map[expr->bitmap_index] = expr; |
18aa2adf | 2547 | |
18aa2adf | 2548 | /* Delete the redundant insns first so that |
2549 | - we know what register to use for the new insns and for the other | |
2550 | ones with reaching expressions | |
2551 | - we know which insns are redundant when we go to create copies */ | |
2c084240 | 2552 | |
18aa2adf | 2553 | changed = pre_delete (); |
7bcd381b | 2554 | did_insert = pre_edge_insert (edge_list, index_map); |
2c084240 | 2555 | |
18aa2adf | 2556 | /* In other places with reaching expressions, copy the expression to the |
7bcd381b | 2557 | specially allocated pseudo-reg that reaches the redundant expr. */ |
18aa2adf | 2558 | pre_insert_copies (); |
7bcd381b | 2559 | if (did_insert) |
2560 | { | |
2561 | commit_edge_insertions (); | |
2562 | changed = 1; | |
2563 | } | |
18aa2adf | 2564 | |
cd55d9d6 | 2565 | free (index_map); |
18aa2adf | 2566 | return changed; |
2567 | } | |
2568 | ||
2569 | /* Top level routine to perform one PRE GCSE pass. | |
2570 | ||
6ef828f9 | 2571 | Return nonzero if a change was made. */ |
18aa2adf | 2572 | |
2573 | static int | |
d743aba2 | 2574 | one_pre_gcse_pass (void) |
18aa2adf | 2575 | { |
2576 | int changed = 0; | |
2577 | ||
2578 | gcse_subst_count = 0; | |
2579 | gcse_create_count = 0; | |
2580 | ||
d743aba2 | 2581 | /* Return if there's nothing to do, or it is too expensive. */ |
a28770e1 | 2582 | if (n_basic_blocks_for_fn (cfun) <= NUM_FIXED_BLOCKS + 1 |
d743aba2 | 2583 | || is_too_expensive (_("PRE disabled"))) |
2584 | return 0; | |
2585 | ||
2586 | /* We need alias. */ | |
2587 | init_alias_analysis (); | |
2588 | ||
2589 | bytes_used = 0; | |
2590 | gcc_obstack_init (&gcse_obstack); | |
2591 | alloc_gcse_mem (); | |
2592 | ||
07abdb66 | 2593 | alloc_hash_table (&expr_hash_table); |
7bcd381b | 2594 | add_noreturn_fake_exit_edges (); |
8e802be9 | 2595 | if (flag_gcse_lm) |
2596 | compute_ld_motion_mems (); | |
2597 | ||
27cfe3f1 | 2598 | compute_hash_table (&expr_hash_table); |
bc8197c0 | 2599 | if (flag_gcse_lm) |
2600 | trim_ld_motion_mems (); | |
3f5be5f4 | 2601 | if (dump_file) |
2602 | dump_hash_table (dump_file, "Expression", &expr_hash_table); | |
2c084240 | 2603 | |
27cfe3f1 | 2604 | if (expr_hash_table.n_elems > 0) |
18aa2adf | 2605 | { |
bc8197c0 | 2606 | struct edge_list *edge_list; |
fe672ac0 | 2607 | alloc_pre_mem (last_basic_block_for_fn (cfun), expr_hash_table.n_elems); |
bc8197c0 | 2608 | edge_list = compute_pre_data (); |
2609 | changed |= pre_gcse (edge_list); | |
7bcd381b | 2610 | free_edge_list (edge_list); |
18aa2adf | 2611 | free_pre_mem (); |
2612 | } | |
2c084240 | 2613 | |
bc8197c0 | 2614 | if (flag_gcse_lm) |
2615 | free_ld_motion_mems (); | |
41d24834 | 2616 | remove_fake_exit_edges (); |
27cfe3f1 | 2617 | free_hash_table (&expr_hash_table); |
18aa2adf | 2618 | |
d743aba2 | 2619 | free_gcse_mem (); |
2620 | obstack_free (&gcse_obstack, NULL); | |
2621 | ||
2622 | /* We are finished with alias. */ | |
2623 | end_alias_analysis (); | |
2624 | ||
3f5be5f4 | 2625 | if (dump_file) |
18aa2adf | 2626 | { |
d743aba2 | 2627 | fprintf (dump_file, "PRE GCSE of %s, %d basic blocks, %d bytes needed, ", |
a28770e1 | 2628 | current_function_name (), n_basic_blocks_for_fn (cfun), |
2629 | bytes_used); | |
3f5be5f4 | 2630 | fprintf (dump_file, "%d substs, %d insns created\n", |
2c084240 | 2631 | gcse_subst_count, gcse_create_count); |
18aa2adf | 2632 | } |
2633 | ||
2634 | return changed; | |
2635 | } | |
322b2436 | 2636 | \f |
19d2fe05 | 2637 | /* If X contains any LABEL_REF's, add REG_LABEL_OPERAND notes for them |
2638 | to INSN. If such notes are added to an insn which references a | |
2639 | CODE_LABEL, the LABEL_NUSES count is incremented. We have to add | |
2640 | that note, because the following loop optimization pass requires | |
2641 | them. */ | |
322b2436 | 2642 | |
322b2436 | 2643 | /* ??? If there was a jump optimization pass after gcse and before loop, |
2644 | then we would not need to do this here, because jump would add the | |
19d2fe05 | 2645 | necessary REG_LABEL_OPERAND and REG_LABEL_TARGET notes. */ |
322b2436 | 2646 | |
2647 | static void | |
84b4ae13 | 2648 | add_label_notes (rtx x, rtx_insn *insn) |
322b2436 | 2649 | { |
2650 | enum rtx_code code = GET_CODE (x); | |
2651 | int i, j; | |
d2ca078f | 2652 | const char *fmt; |
322b2436 | 2653 | |
2654 | if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x)) | |
2655 | { | |
e72f55f8 | 2656 | /* This code used to ignore labels that referred to dispatch tables to |
d01481af | 2657 | avoid flow generating (slightly) worse code. |
e72f55f8 | 2658 | |
b65b4f63 | 2659 | We no longer ignore such label references (see LABEL_REF handling in |
2660 | mark_jump_label for additional information). */ | |
2c084240 | 2661 | |
a8d1dae0 | 2662 | /* There's no reason for current users to emit jump-insns with |
2663 | such a LABEL_REF, so we don't have to handle REG_LABEL_TARGET | |
2664 | notes. */ | |
2665 | gcc_assert (!JUMP_P (insn)); | |
b49f2e4b | 2666 | add_reg_note (insn, REG_LABEL_OPERAND, LABEL_REF_LABEL (x)); |
a1ddb869 | 2667 | |
b49f2e4b | 2668 | if (LABEL_P (LABEL_REF_LABEL (x))) |
2669 | LABEL_NUSES (LABEL_REF_LABEL (x))++; | |
a8d1dae0 | 2670 | |
322b2436 | 2671 | return; |
2672 | } | |
2673 | ||
2c084240 | 2674 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
322b2436 | 2675 | { |
2676 | if (fmt[i] == 'e') | |
2677 | add_label_notes (XEXP (x, i), insn); | |
2678 | else if (fmt[i] == 'E') | |
2679 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2680 | add_label_notes (XVECEXP (x, i, j), insn); | |
2681 | } | |
2682 | } | |
b3f3796c | 2683 | |
6627f3ed | 2684 | /* Code Hoisting variables and subroutines. */ |
2685 | ||
2686 | /* Very busy expressions. */ | |
2687 | static sbitmap *hoist_vbein; | |
2688 | static sbitmap *hoist_vbeout; | |
2689 | ||
6627f3ed | 2690 | /* ??? We could compute post dominators and run this algorithm in |
95cc2547 | 2691 | reverse to perform tail merging, doing so would probably be |
6627f3ed | 2692 | more effective than the tail merging code in jump.c. |
2693 | ||
2694 | It's unclear if tail merging could be run in parallel with | |
2695 | code hoisting. It would be nice. */ | |
2696 | ||
2697 | /* Allocate vars used for code hoisting analysis. */ | |
2698 | ||
2699 | static void | |
952f0048 | 2700 | alloc_code_hoist_mem (int n_blocks, int n_exprs) |
6627f3ed | 2701 | { |
2702 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2703 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2704 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2705 | ||
2706 | hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs); | |
2707 | hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
6627f3ed | 2708 | } |
2709 | ||
2710 | /* Free vars used for code hoisting analysis. */ | |
2711 | ||
2712 | static void | |
952f0048 | 2713 | free_code_hoist_mem (void) |
6627f3ed | 2714 | { |
cca23eb2 | 2715 | sbitmap_vector_free (antloc); |
2716 | sbitmap_vector_free (transp); | |
2717 | sbitmap_vector_free (comp); | |
6627f3ed | 2718 | |
cca23eb2 | 2719 | sbitmap_vector_free (hoist_vbein); |
2720 | sbitmap_vector_free (hoist_vbeout); | |
6627f3ed | 2721 | |
0051c76a | 2722 | free_dominance_info (CDI_DOMINATORS); |
6627f3ed | 2723 | } |
2724 | ||
2725 | /* Compute the very busy expressions at entry/exit from each block. | |
2726 | ||
2727 | An expression is very busy if all paths from a given point | |
2728 | compute the expression. */ | |
2729 | ||
2730 | static void | |
952f0048 | 2731 | compute_code_hoist_vbeinout (void) |
6627f3ed | 2732 | { |
4c26117a | 2733 | int changed, passes; |
2734 | basic_block bb; | |
6627f3ed | 2735 | |
fe672ac0 | 2736 | bitmap_vector_clear (hoist_vbeout, last_basic_block_for_fn (cfun)); |
2737 | bitmap_vector_clear (hoist_vbein, last_basic_block_for_fn (cfun)); | |
6627f3ed | 2738 | |
2739 | passes = 0; | |
2740 | changed = 1; | |
2c084240 | 2741 | |
6627f3ed | 2742 | while (changed) |
2743 | { | |
2744 | changed = 0; | |
2c084240 | 2745 | |
6627f3ed | 2746 | /* We scan the blocks in the reverse order to speed up |
2747 | the convergence. */ | |
7a46197b | 2748 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
6627f3ed | 2749 | { |
34154e27 | 2750 | if (bb->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
33ff724a | 2751 | { |
08b7917c | 2752 | bitmap_intersection_of_succs (hoist_vbeout[bb->index], |
2753 | hoist_vbein, bb); | |
33ff724a | 2754 | |
2755 | /* Include expressions in VBEout that are calculated | |
2756 | in BB and available at its end. */ | |
53c5d9d4 | 2757 | bitmap_ior (hoist_vbeout[bb->index], |
33ff724a | 2758 | hoist_vbeout[bb->index], comp[bb->index]); |
2759 | } | |
0f11b6b5 | 2760 | |
53c5d9d4 | 2761 | changed |= bitmap_or_and (hoist_vbein[bb->index], |
0f11b6b5 | 2762 | antloc[bb->index], |
2763 | hoist_vbeout[bb->index], | |
2764 | transp[bb->index]); | |
6627f3ed | 2765 | } |
2c084240 | 2766 | |
6627f3ed | 2767 | passes++; |
2768 | } | |
2769 | ||
3f5be5f4 | 2770 | if (dump_file) |
c0939130 | 2771 | { |
2772 | fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes); | |
2773 | ||
fc00614f | 2774 | FOR_EACH_BB_FN (bb, cfun) |
c0939130 | 2775 | { |
2776 | fprintf (dump_file, "vbein (%d): ", bb->index); | |
53c5d9d4 | 2777 | dump_bitmap_file (dump_file, hoist_vbein[bb->index]); |
c0939130 | 2778 | fprintf (dump_file, "vbeout(%d): ", bb->index); |
53c5d9d4 | 2779 | dump_bitmap_file (dump_file, hoist_vbeout[bb->index]); |
c0939130 | 2780 | } |
2781 | } | |
6627f3ed | 2782 | } |
2783 | ||
2784 | /* Top level routine to do the dataflow analysis needed by code hoisting. */ | |
2785 | ||
2786 | static void | |
952f0048 | 2787 | compute_code_hoist_data (void) |
6627f3ed | 2788 | { |
27cfe3f1 | 2789 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
f151d0c6 | 2790 | prune_expressions (false); |
6627f3ed | 2791 | compute_code_hoist_vbeinout (); |
0051c76a | 2792 | calculate_dominance_info (CDI_DOMINATORS); |
3f5be5f4 | 2793 | if (dump_file) |
2794 | fprintf (dump_file, "\n"); | |
6627f3ed | 2795 | } |
2796 | ||
ded17066 | 2797 | /* Update register pressure for BB when hoisting an expression from |
2798 | instruction FROM, if live ranges of inputs are shrunk. Also | |
2799 | maintain live_in information if live range of register referred | |
2800 | in FROM is shrunk. | |
2801 | ||
2802 | Return 0 if register pressure doesn't change, otherwise return | |
2803 | the number by which register pressure is decreased. | |
2804 | ||
2805 | NOTE: Register pressure won't be increased in this function. */ | |
2806 | ||
2807 | static int | |
526d7387 | 2808 | update_bb_reg_pressure (basic_block bb, rtx_insn *from) |
ded17066 | 2809 | { |
526d7387 | 2810 | rtx dreg; |
2811 | rtx_insn *insn; | |
ded17066 | 2812 | basic_block succ_bb; |
be10bb5a | 2813 | df_ref use, op_ref; |
ded17066 | 2814 | edge succ; |
2815 | edge_iterator ei; | |
2816 | int decreased_pressure = 0; | |
2817 | int nregs; | |
2818 | enum reg_class pressure_class; | |
be10bb5a | 2819 | |
2820 | FOR_EACH_INSN_USE (use, from) | |
ded17066 | 2821 | { |
be10bb5a | 2822 | dreg = DF_REF_REAL_REG (use); |
ded17066 | 2823 | /* The live range of register is shrunk only if it isn't: |
2824 | 1. referred on any path from the end of this block to EXIT, or | |
2825 | 2. referred by insns other than FROM in this block. */ | |
2826 | FOR_EACH_EDGE (succ, ei, bb->succs) | |
2827 | { | |
2828 | succ_bb = succ->dest; | |
34154e27 | 2829 | if (succ_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
ded17066 | 2830 | continue; |
2831 | ||
2832 | if (bitmap_bit_p (BB_DATA (succ_bb)->live_in, REGNO (dreg))) | |
2833 | break; | |
2834 | } | |
2835 | if (succ != NULL) | |
2836 | continue; | |
2837 | ||
2838 | op_ref = DF_REG_USE_CHAIN (REGNO (dreg)); | |
2839 | for (; op_ref; op_ref = DF_REF_NEXT_REG (op_ref)) | |
2840 | { | |
2841 | if (!DF_REF_INSN_INFO (op_ref)) | |
2842 | continue; | |
2843 | ||
2844 | insn = DF_REF_INSN (op_ref); | |
2845 | if (BLOCK_FOR_INSN (insn) == bb | |
2846 | && NONDEBUG_INSN_P (insn) && insn != from) | |
2847 | break; | |
2848 | } | |
2849 | ||
2850 | pressure_class = get_regno_pressure_class (REGNO (dreg), &nregs); | |
2851 | /* Decrease register pressure and update live_in information for | |
2852 | this block. */ | |
2853 | if (!op_ref && pressure_class != NO_REGS) | |
2854 | { | |
2855 | decreased_pressure += nregs; | |
2856 | BB_DATA (bb)->max_reg_pressure[pressure_class] -= nregs; | |
2857 | bitmap_clear_bit (BB_DATA (bb)->live_in, REGNO (dreg)); | |
2858 | } | |
2859 | } | |
2860 | return decreased_pressure; | |
2861 | } | |
2862 | ||
1ec78e16 | 2863 | /* Determine if the expression EXPR should be hoisted to EXPR_BB up in |
2864 | flow graph, if it can reach BB unimpared. Stop the search if the | |
2865 | expression would need to be moved more than DISTANCE instructions. | |
2866 | ||
2867 | DISTANCE is the number of instructions through which EXPR can be | |
2868 | hoisted up in flow graph. | |
2869 | ||
2870 | BB_SIZE points to an array which contains the number of instructions | |
2871 | for each basic block. | |
2872 | ||
2873 | PRESSURE_CLASS and NREGS are register class and number of hard registers | |
2874 | for storing EXPR. | |
2875 | ||
2876 | HOISTED_BBS points to a bitmap indicating basic blocks through which | |
2877 | EXPR is hoisted. | |
6627f3ed | 2878 | |
ded17066 | 2879 | FROM is the instruction from which EXPR is hoisted. |
2880 | ||
6627f3ed | 2881 | It's unclear exactly what Muchnick meant by "unimpared". It seems |
2882 | to me that the expression must either be computed or transparent in | |
2883 | *every* block in the path(s) from EXPR_BB to BB. Any other definition | |
2884 | would allow the expression to be hoisted out of loops, even if | |
2885 | the expression wasn't a loop invariant. | |
2886 | ||
2887 | Contrast this to reachability for PRE where an expression is | |
2888 | considered reachable if *any* path reaches instead of *all* | |
2889 | paths. */ | |
2890 | ||
2891 | static int | |
9908fe4d | 2892 | should_hoist_expr_to_dom (basic_block expr_bb, struct gcse_expr *expr, |
1ec78e16 | 2893 | basic_block bb, sbitmap visited, int distance, |
2894 | int *bb_size, enum reg_class pressure_class, | |
526d7387 | 2895 | int *nregs, bitmap hoisted_bbs, rtx_insn *from) |
6627f3ed | 2896 | { |
1ec78e16 | 2897 | unsigned int i; |
6627f3ed | 2898 | edge pred; |
cd665a06 | 2899 | edge_iterator ei; |
1ec78e16 | 2900 | sbitmap_iterator sbi; |
cd55d9d6 | 2901 | int visited_allocated_locally = 0; |
ded17066 | 2902 | int decreased_pressure = 0; |
3cfec666 | 2903 | |
ded17066 | 2904 | if (flag_ira_hoist_pressure) |
2905 | { | |
2906 | /* Record old information of basic block BB when it is visited | |
2907 | at the first time. */ | |
2908 | if (!bitmap_bit_p (hoisted_bbs, bb->index)) | |
2909 | { | |
2910 | struct bb_data *data = BB_DATA (bb); | |
2911 | bitmap_copy (data->backup, data->live_in); | |
2912 | data->old_pressure = data->max_reg_pressure[pressure_class]; | |
2913 | } | |
2914 | decreased_pressure = update_bb_reg_pressure (bb, from); | |
2915 | } | |
8b38b150 | 2916 | /* Terminate the search if distance, for which EXPR is allowed to move, |
2917 | is exhausted. */ | |
2918 | if (distance > 0) | |
2919 | { | |
ded17066 | 2920 | if (flag_ira_hoist_pressure) |
2921 | { | |
2922 | /* Prefer to hoist EXPR if register pressure is decreased. */ | |
2923 | if (decreased_pressure > *nregs) | |
2924 | distance += bb_size[bb->index]; | |
2925 | /* Let EXPR be hoisted through basic block at no cost if one | |
2926 | of following conditions is satisfied: | |
2927 | ||
2928 | 1. The basic block has low register pressure. | |
2929 | 2. Register pressure won't be increases after hoisting EXPR. | |
2930 | ||
2931 | Constant expressions is handled conservatively, because | |
2932 | hoisting constant expression aggressively results in worse | |
2933 | code. This decision is made by the observation of CSiBE | |
2934 | on ARM target, while it has no obvious effect on other | |
2935 | targets like x86, x86_64, mips and powerpc. */ | |
2936 | else if (CONST_INT_P (expr->expr) | |
2937 | || (BB_DATA (bb)->max_reg_pressure[pressure_class] | |
2938 | >= ira_class_hard_regs_num[pressure_class] | |
2939 | && decreased_pressure < *nregs)) | |
2940 | distance -= bb_size[bb->index]; | |
2941 | } | |
2942 | else | |
1ec78e16 | 2943 | distance -= bb_size[bb->index]; |
8b38b150 | 2944 | |
2945 | if (distance <= 0) | |
2946 | return 0; | |
2947 | } | |
2948 | else | |
2949 | gcc_assert (distance == 0); | |
6627f3ed | 2950 | |
2951 | if (visited == NULL) | |
2952 | { | |
387732c1 | 2953 | visited_allocated_locally = 1; |
fe672ac0 | 2954 | visited = sbitmap_alloc (last_basic_block_for_fn (cfun)); |
53c5d9d4 | 2955 | bitmap_clear (visited); |
6627f3ed | 2956 | } |
2957 | ||
cd665a06 | 2958 | FOR_EACH_EDGE (pred, ei, bb->preds) |
6627f3ed | 2959 | { |
8d4a53c7 | 2960 | basic_block pred_bb = pred->src; |
6627f3ed | 2961 | |
34154e27 | 2962 | if (pred->src == ENTRY_BLOCK_PTR_FOR_FN (cfun)) |
6627f3ed | 2963 | break; |
2e281af0 | 2964 | else if (pred_bb == expr_bb) |
2965 | continue; | |
08b7917c | 2966 | else if (bitmap_bit_p (visited, pred_bb->index)) |
6627f3ed | 2967 | continue; |
08b7917c | 2968 | else if (! bitmap_bit_p (transp[pred_bb->index], expr->bitmap_index)) |
6627f3ed | 2969 | break; |
2970 | /* Not killed. */ | |
2971 | else | |
2972 | { | |
08b7917c | 2973 | bitmap_set_bit (visited, pred_bb->index); |
1ec78e16 | 2974 | if (! should_hoist_expr_to_dom (expr_bb, expr, pred_bb, |
2975 | visited, distance, bb_size, | |
ded17066 | 2976 | pressure_class, nregs, |
2977 | hoisted_bbs, from)) | |
6627f3ed | 2978 | break; |
2979 | } | |
2980 | } | |
3cfec666 | 2981 | if (visited_allocated_locally) |
1ec78e16 | 2982 | { |
2983 | /* If EXPR can be hoisted to expr_bb, record basic blocks through | |
ded17066 | 2984 | which EXPR is hoisted in hoisted_bbs. */ |
1ec78e16 | 2985 | if (flag_ira_hoist_pressure && !pred) |
2986 | { | |
ded17066 | 2987 | /* Record the basic block from which EXPR is hoisted. */ |
2988 | bitmap_set_bit (visited, bb->index); | |
0d211963 | 2989 | EXECUTE_IF_SET_IN_BITMAP (visited, 0, i, sbi) |
ded17066 | 2990 | bitmap_set_bit (hoisted_bbs, i); |
1ec78e16 | 2991 | } |
2992 | sbitmap_free (visited); | |
2993 | } | |
2c084240 | 2994 | |
6627f3ed | 2995 | return (pred == NULL); |
2996 | } | |
2997 | \f | |
9d75589a | 2998 | /* Find occurrence in BB. */ |
bc8197c0 | 2999 | |
9908fe4d | 3000 | static struct gcse_occr * |
3001 | find_occr_in_bb (struct gcse_occr *occr, basic_block bb) | |
8b38b150 | 3002 | { |
3003 | /* Find the right occurrence of this expression. */ | |
3004 | while (occr && BLOCK_FOR_INSN (occr->insn) != bb) | |
3005 | occr = occr->next; | |
3006 | ||
3007 | return occr; | |
3008 | } | |
3009 | ||
1ec78e16 | 3010 | /* Actually perform code hoisting. |
3011 | ||
3012 | The code hoisting pass can hoist multiple computations of the same | |
3013 | expression along dominated path to a dominating basic block, like | |
3014 | from b2/b3 to b1 as depicted below: | |
3015 | ||
3016 | b1 ------ | |
3017 | /\ | | |
3018 | / \ | | |
3019 | bx by distance | |
3020 | / \ | | |
3021 | / \ | | |
3022 | b2 b3 ------ | |
3023 | ||
3024 | Unfortunately code hoisting generally extends the live range of an | |
3025 | output pseudo register, which increases register pressure and hurts | |
3026 | register allocation. To address this issue, an attribute MAX_DISTANCE | |
3027 | is computed and attached to each expression. The attribute is computed | |
3028 | from rtx cost of the corresponding expression and it's used to control | |
3029 | how long the expression can be hoisted up in flow graph. As the | |
3030 | expression is hoisted up in flow graph, GCC decreases its DISTANCE | |
ded17066 | 3031 | and stops the hoist if DISTANCE reaches 0. Code hoisting can decrease |
3032 | register pressure if live ranges of inputs are shrunk. | |
1ec78e16 | 3033 | |
3034 | Option "-fira-hoist-pressure" implements register pressure directed | |
3035 | hoist based on upper method. The rationale is: | |
3036 | 1. Calculate register pressure for each basic block by reusing IRA | |
3037 | facility. | |
3038 | 2. When expression is hoisted through one basic block, GCC checks | |
ded17066 | 3039 | the change of live ranges for inputs/output. The basic block's |
3040 | register pressure will be increased because of extended live | |
3041 | range of output. However, register pressure will be decreased | |
3042 | if the live ranges of inputs are shrunk. | |
3043 | 3. After knowing how hoisting affects register pressure, GCC prefers | |
3044 | to hoist the expression if it can decrease register pressure, by | |
3045 | increasing DISTANCE of the corresponding expression. | |
3046 | 4. If hoisting the expression increases register pressure, GCC checks | |
3047 | register pressure of the basic block and decrease DISTANCE only if | |
3048 | the register pressure is high. In other words, expression will be | |
3049 | hoisted through at no cost if the basic block has low register | |
3050 | pressure. | |
3051 | 5. Update register pressure information for basic blocks through | |
3052 | which expression is hoisted. */ | |
2c084240 | 3053 | |
d743aba2 | 3054 | static int |
952f0048 | 3055 | hoist_code (void) |
6627f3ed | 3056 | { |
4c26117a | 3057 | basic_block bb, dominated; |
f1f41a6c | 3058 | vec<basic_block> dom_tree_walk; |
c0939130 | 3059 | unsigned int dom_tree_walk_index; |
f1f41a6c | 3060 | vec<basic_block> domby; |
1ec78e16 | 3061 | unsigned int i, j, k; |
9908fe4d | 3062 | struct gcse_expr **index_map; |
3063 | struct gcse_expr *expr; | |
8b38b150 | 3064 | int *to_bb_head; |
3065 | int *bb_size; | |
d743aba2 | 3066 | int changed = 0; |
1ec78e16 | 3067 | struct bb_data *data; |
3068 | /* Basic blocks that have occurrences reachable from BB. */ | |
3069 | bitmap from_bbs; | |
3070 | /* Basic blocks through which expr is hoisted. */ | |
3071 | bitmap hoisted_bbs = NULL; | |
3072 | bitmap_iterator bi; | |
6627f3ed | 3073 | |
6627f3ed | 3074 | /* Compute a mapping from expression number (`bitmap_index') to |
3075 | hash table entry. */ | |
3076 | ||
9908fe4d | 3077 | index_map = XCNEWVEC (struct gcse_expr *, expr_hash_table.n_elems); |
27cfe3f1 | 3078 | for (i = 0; i < expr_hash_table.size; i++) |
bc8197c0 | 3079 | for (expr = expr_hash_table.table[i]; expr; expr = expr->next_same_hash) |
2c084240 | 3080 | index_map[expr->bitmap_index] = expr; |
6627f3ed | 3081 | |
8b38b150 | 3082 | /* Calculate sizes of basic blocks and note how far |
3083 | each instruction is from the start of its block. We then use this | |
3084 | data to restrict distance an expression can travel. */ | |
3085 | ||
3086 | to_bb_head = XCNEWVEC (int, get_max_uid ()); | |
fe672ac0 | 3087 | bb_size = XCNEWVEC (int, last_basic_block_for_fn (cfun)); |
8b38b150 | 3088 | |
fc00614f | 3089 | FOR_EACH_BB_FN (bb, cfun) |
8b38b150 | 3090 | { |
526d7387 | 3091 | rtx_insn *insn; |
8b38b150 | 3092 | int to_head; |
3093 | ||
8b38b150 | 3094 | to_head = 0; |
2241e3a7 | 3095 | FOR_BB_INSNS (bb, insn) |
8b38b150 | 3096 | { |
3097 | /* Don't count debug instructions to avoid them affecting | |
3098 | decision choices. */ | |
3099 | if (NONDEBUG_INSN_P (insn)) | |
3100 | to_bb_head[INSN_UID (insn)] = to_head++; | |
8b38b150 | 3101 | } |
3102 | ||
3103 | bb_size[bb->index] = to_head; | |
3104 | } | |
3105 | ||
34154e27 | 3106 | gcc_assert (EDGE_COUNT (ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) == 1 |
3107 | && (EDGE_SUCC (ENTRY_BLOCK_PTR_FOR_FN (cfun), 0)->dest | |
3108 | == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb)); | |
c0939130 | 3109 | |
1ec78e16 | 3110 | from_bbs = BITMAP_ALLOC (NULL); |
3111 | if (flag_ira_hoist_pressure) | |
3112 | hoisted_bbs = BITMAP_ALLOC (NULL); | |
3113 | ||
c0939130 | 3114 | dom_tree_walk = get_all_dominated_blocks (CDI_DOMINATORS, |
34154e27 | 3115 | ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb); |
c0939130 | 3116 | |
6627f3ed | 3117 | /* Walk over each basic block looking for potentially hoistable |
3118 | expressions, nothing gets hoisted from the entry block. */ | |
f1f41a6c | 3119 | FOR_EACH_VEC_ELT (dom_tree_walk, dom_tree_walk_index, bb) |
6627f3ed | 3120 | { |
c0939130 | 3121 | domby = get_dominated_to_depth (CDI_DOMINATORS, bb, MAX_HOIST_DEPTH); |
3122 | ||
f1f41a6c | 3123 | if (domby.length () == 0) |
c0939130 | 3124 | continue; |
6627f3ed | 3125 | |
3126 | /* Examine each expression that is very busy at the exit of this | |
3127 | block. These are the potentially hoistable expressions. */ | |
156093aa | 3128 | for (i = 0; i < SBITMAP_SIZE (hoist_vbeout[bb->index]); i++) |
6627f3ed | 3129 | { |
08b7917c | 3130 | if (bitmap_bit_p (hoist_vbeout[bb->index], i)) |
6627f3ed | 3131 | { |
1ec78e16 | 3132 | int nregs = 0; |
3133 | enum reg_class pressure_class = NO_REGS; | |
c0939130 | 3134 | /* Current expression. */ |
9908fe4d | 3135 | struct gcse_expr *expr = index_map[i]; |
9d75589a | 3136 | /* Number of occurrences of EXPR that can be hoisted to BB. */ |
c0939130 | 3137 | int hoistable = 0; |
9d75589a | 3138 | /* Occurrences reachable from BB. */ |
1e094109 | 3139 | vec<occr_t> occrs_to_hoist = vNULL; |
c0939130 | 3140 | /* We want to insert the expression into BB only once, so |
3141 | note when we've inserted it. */ | |
3142 | int insn_inserted_p; | |
3143 | occr_t occr; | |
3144 | ||
33ff724a | 3145 | /* If an expression is computed in BB and is available at end of |
9d75589a | 3146 | BB, hoist all occurrences dominated by BB to BB. */ |
08b7917c | 3147 | if (bitmap_bit_p (comp[bb->index], i)) |
c0939130 | 3148 | { |
3149 | occr = find_occr_in_bb (expr->antic_occr, bb); | |
3150 | ||
3151 | if (occr) | |
3152 | { | |
9d75589a | 3153 | /* An occurrence might've been already deleted |
c0939130 | 3154 | while processing a dominator of BB. */ |
c96e0a0a | 3155 | if (!occr->deleted_p) |
c0939130 | 3156 | { |
3157 | gcc_assert (NONDEBUG_INSN_P (occr->insn)); | |
3158 | hoistable++; | |
3159 | } | |
3160 | } | |
3161 | else | |
3162 | hoistable++; | |
3163 | } | |
33ff724a | 3164 | |
6627f3ed | 3165 | /* We've found a potentially hoistable expression, now |
3166 | we look at every block BB dominates to see if it | |
3167 | computes the expression. */ | |
f1f41a6c | 3168 | FOR_EACH_VEC_ELT (domby, j, dominated) |
6627f3ed | 3169 | { |
8b38b150 | 3170 | int max_distance; |
3171 | ||
6627f3ed | 3172 | /* Ignore self dominance. */ |
8c4bd339 | 3173 | if (bb == dominated) |
6627f3ed | 3174 | continue; |
6627f3ed | 3175 | /* We've found a dominated block, now see if it computes |
3176 | the busy expression and whether or not moving that | |
3177 | expression to the "beginning" of that block is safe. */ | |
08b7917c | 3178 | if (!bitmap_bit_p (antloc[dominated->index], i)) |
6627f3ed | 3179 | continue; |
3180 | ||
c0939130 | 3181 | occr = find_occr_in_bb (expr->antic_occr, dominated); |
3182 | gcc_assert (occr); | |
8b38b150 | 3183 | |
9d75589a | 3184 | /* An occurrence might've been already deleted |
c0939130 | 3185 | while processing a dominator of BB. */ |
3186 | if (occr->deleted_p) | |
c96e0a0a | 3187 | continue; |
c0939130 | 3188 | gcc_assert (NONDEBUG_INSN_P (occr->insn)); |
3189 | ||
3190 | max_distance = expr->max_distance; | |
3191 | if (max_distance > 0) | |
3192 | /* Adjust MAX_DISTANCE to account for the fact that | |
3193 | OCCR won't have to travel all of DOMINATED, but | |
3194 | only part of it. */ | |
3195 | max_distance += (bb_size[dominated->index] | |
3196 | - to_bb_head[INSN_UID (occr->insn)]); | |
8b38b150 | 3197 | |
1ec78e16 | 3198 | pressure_class = get_pressure_class_and_nregs (occr->insn, |
3199 | &nregs); | |
3200 | ||
3201 | /* Note if the expression should be hoisted from the dominated | |
3202 | block to BB if it can reach DOMINATED unimpared. | |
6627f3ed | 3203 | |
3204 | Keep track of how many times this expression is hoistable | |
3205 | from a dominated block into BB. */ | |
1ec78e16 | 3206 | if (should_hoist_expr_to_dom (bb, expr, dominated, NULL, |
3207 | max_distance, bb_size, | |
3208 | pressure_class, &nregs, | |
ded17066 | 3209 | hoisted_bbs, occr->insn)) |
c0939130 | 3210 | { |
3211 | hoistable++; | |
f1f41a6c | 3212 | occrs_to_hoist.safe_push (occr); |
c0939130 | 3213 | bitmap_set_bit (from_bbs, dominated->index); |
3214 | } | |
6627f3ed | 3215 | } |
3216 | ||
424da949 | 3217 | /* If we found more than one hoistable occurrence of this |
c0939130 | 3218 | expression, then note it in the vector of expressions to |
6627f3ed | 3219 | hoist. It makes no sense to hoist things which are computed |
3220 | in only one BB, and doing so tends to pessimize register | |
3221 | allocation. One could increase this value to try harder | |
3222 | to avoid any possible code expansion due to register | |
3223 | allocation issues; however experiments have shown that | |
3224 | the vast majority of hoistable expressions are only movable | |
d01481af | 3225 | from two successors, so raising this threshold is likely |
6627f3ed | 3226 | to nullify any benefit we get from code hoisting. */ |
da54886a | 3227 | if (hoistable > 1 && dbg_cnt (hoist_insn)) |
6627f3ed | 3228 | { |
f1f41a6c | 3229 | /* If (hoistable != vec::length), then there is |
9d75589a | 3230 | an occurrence of EXPR in BB itself. Don't waste |
c0939130 | 3231 | time looking for LCA in this case. */ |
f1f41a6c | 3232 | if ((unsigned) hoistable == occrs_to_hoist.length ()) |
c0939130 | 3233 | { |
3234 | basic_block lca; | |
3235 | ||
3236 | lca = nearest_common_dominator_for_set (CDI_DOMINATORS, | |
3237 | from_bbs); | |
3238 | if (lca != bb) | |
9d75589a | 3239 | /* Punt, it's better to hoist these occurrences to |
c0939130 | 3240 | LCA. */ |
f1f41a6c | 3241 | occrs_to_hoist.release (); |
c0939130 | 3242 | } |
6627f3ed | 3243 | } |
c0939130 | 3244 | else |
a04e8d62 | 3245 | /* Punt, no point hoisting a single occurrence. */ |
f1f41a6c | 3246 | occrs_to_hoist.release (); |
6627f3ed | 3247 | |
1ec78e16 | 3248 | if (flag_ira_hoist_pressure |
f1f41a6c | 3249 | && !occrs_to_hoist.is_empty ()) |
1ec78e16 | 3250 | { |
ded17066 | 3251 | /* Increase register pressure of basic blocks to which |
3252 | expr is hoisted because of extended live range of | |
3253 | output. */ | |
1ec78e16 | 3254 | data = BB_DATA (bb); |
3255 | data->max_reg_pressure[pressure_class] += nregs; | |
ded17066 | 3256 | EXECUTE_IF_SET_IN_BITMAP (hoisted_bbs, 0, k, bi) |
3257 | { | |
f5a6b05f | 3258 | data = BB_DATA (BASIC_BLOCK_FOR_FN (cfun, k)); |
ded17066 | 3259 | data->max_reg_pressure[pressure_class] += nregs; |
3260 | } | |
1ec78e16 | 3261 | } |
3262 | else if (flag_ira_hoist_pressure) | |
3263 | { | |
ded17066 | 3264 | /* Restore register pressure and live_in info for basic |
3265 | blocks recorded in hoisted_bbs when expr will not be | |
3266 | hoisted. */ | |
1ec78e16 | 3267 | EXECUTE_IF_SET_IN_BITMAP (hoisted_bbs, 0, k, bi) |
3268 | { | |
f5a6b05f | 3269 | data = BB_DATA (BASIC_BLOCK_FOR_FN (cfun, k)); |
ded17066 | 3270 | bitmap_copy (data->live_in, data->backup); |
3271 | data->max_reg_pressure[pressure_class] | |
3272 | = data->old_pressure; | |
1ec78e16 | 3273 | } |
3274 | } | |
3275 | ||
3276 | if (flag_ira_hoist_pressure) | |
3277 | bitmap_clear (hoisted_bbs); | |
3278 | ||
c0939130 | 3279 | insn_inserted_p = 0; |
6627f3ed | 3280 | |
9d75589a | 3281 | /* Walk through occurrences of I'th expressions we want |
c0939130 | 3282 | to hoist to BB and make the transformations. */ |
f1f41a6c | 3283 | FOR_EACH_VEC_ELT (occrs_to_hoist, j, occr) |
6627f3ed | 3284 | { |
526d7387 | 3285 | rtx_insn *insn; |
97f436b3 | 3286 | const_rtx set; |
c0939130 | 3287 | |
3288 | gcc_assert (!occr->deleted_p); | |
3289 | ||
3290 | insn = occr->insn; | |
97f436b3 | 3291 | set = single_set_gcse (insn); |
c0939130 | 3292 | |
3293 | /* Create a pseudo-reg to store the result of reaching | |
3294 | expressions into. Get the mode for the new pseudo | |
3295 | from the mode of the original destination pseudo. | |
3296 | ||
3297 | It is important to use new pseudos whenever we | |
3298 | emit a set. This will allow reload to use | |
3299 | rematerialization for such registers. */ | |
3300 | if (!insn_inserted_p) | |
3301 | expr->reaching_reg | |
3302 | = gen_reg_rtx_and_attrs (SET_DEST (set)); | |
3303 | ||
bc8197c0 | 3304 | gcse_emit_move_after (SET_DEST (set), expr->reaching_reg, |
c0939130 | 3305 | insn); |
3306 | delete_insn (insn); | |
3307 | occr->deleted_p = 1; | |
3308 | changed = 1; | |
3309 | gcse_subst_count++; | |
3310 | ||
3311 | if (!insn_inserted_p) | |
6627f3ed | 3312 | { |
c0939130 | 3313 | insert_insn_end_basic_block (expr, bb); |
3314 | insn_inserted_p = 1; | |
6627f3ed | 3315 | } |
3316 | } | |
c0939130 | 3317 | |
f1f41a6c | 3318 | occrs_to_hoist.release (); |
c0939130 | 3319 | bitmap_clear (from_bbs); |
6627f3ed | 3320 | } |
3321 | } | |
f1f41a6c | 3322 | domby.release (); |
6627f3ed | 3323 | } |
2c084240 | 3324 | |
f1f41a6c | 3325 | dom_tree_walk.release (); |
1ec78e16 | 3326 | BITMAP_FREE (from_bbs); |
3327 | if (flag_ira_hoist_pressure) | |
3328 | BITMAP_FREE (hoisted_bbs); | |
3329 | ||
8b38b150 | 3330 | free (bb_size); |
3331 | free (to_bb_head); | |
387732c1 | 3332 | free (index_map); |
d743aba2 | 3333 | |
3334 | return changed; | |
6627f3ed | 3335 | } |
3336 | ||
1ec78e16 | 3337 | /* Return pressure class and number of needed hard registers (through |
3338 | *NREGS) of register REGNO. */ | |
3339 | static enum reg_class | |
3340 | get_regno_pressure_class (int regno, int *nregs) | |
3341 | { | |
3342 | if (regno >= FIRST_PSEUDO_REGISTER) | |
3343 | { | |
3344 | enum reg_class pressure_class; | |
3345 | ||
3346 | pressure_class = reg_allocno_class (regno); | |
3347 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
3348 | *nregs | |
3349 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
3350 | return pressure_class; | |
3351 | } | |
3352 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
3353 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
3354 | { | |
3355 | *nregs = 1; | |
3356 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; | |
3357 | } | |
3358 | else | |
3359 | { | |
3360 | *nregs = 0; | |
3361 | return NO_REGS; | |
3362 | } | |
3363 | } | |
3364 | ||
3365 | /* Return pressure class and number of hard registers (through *NREGS) | |
3366 | for destination of INSN. */ | |
3367 | static enum reg_class | |
526d7387 | 3368 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1ec78e16 | 3369 | { |
3370 | rtx reg; | |
3371 | enum reg_class pressure_class; | |
97f436b3 | 3372 | const_rtx set = single_set_gcse (insn); |
1ec78e16 | 3373 | |
1ec78e16 | 3374 | reg = SET_DEST (set); |
3375 | if (GET_CODE (reg) == SUBREG) | |
3376 | reg = SUBREG_REG (reg); | |
3377 | if (MEM_P (reg)) | |
3378 | { | |
3379 | *nregs = 0; | |
3380 | pressure_class = NO_REGS; | |
3381 | } | |
3382 | else | |
3383 | { | |
3384 | gcc_assert (REG_P (reg)); | |
3385 | pressure_class = reg_allocno_class (REGNO (reg)); | |
3386 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
3387 | *nregs | |
3388 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
3389 | } | |
3390 | return pressure_class; | |
3391 | } | |
3392 | ||
3393 | /* Increase (if INCR_P) or decrease current register pressure for | |
3394 | register REGNO. */ | |
3395 | static void | |
3396 | change_pressure (int regno, bool incr_p) | |
3397 | { | |
3398 | int nregs; | |
3399 | enum reg_class pressure_class; | |
3400 | ||
3401 | pressure_class = get_regno_pressure_class (regno, &nregs); | |
3402 | if (! incr_p) | |
3403 | curr_reg_pressure[pressure_class] -= nregs; | |
3404 | else | |
3405 | { | |
3406 | curr_reg_pressure[pressure_class] += nregs; | |
3407 | if (BB_DATA (curr_bb)->max_reg_pressure[pressure_class] | |
3408 | < curr_reg_pressure[pressure_class]) | |
3409 | BB_DATA (curr_bb)->max_reg_pressure[pressure_class] | |
3410 | = curr_reg_pressure[pressure_class]; | |
3411 | } | |
3412 | } | |
3413 | ||
3414 | /* Calculate register pressure for each basic block by walking insns | |
3415 | from last to first. */ | |
3416 | static void | |
3417 | calculate_bb_reg_pressure (void) | |
3418 | { | |
3419 | int i; | |
3420 | unsigned int j; | |
526d7387 | 3421 | rtx_insn *insn; |
1ec78e16 | 3422 | basic_block bb; |
3423 | bitmap curr_regs_live; | |
3424 | bitmap_iterator bi; | |
3425 | ||
3426 | ||
3b3a5e5f | 3427 | ira_setup_eliminable_regset (); |
1ec78e16 | 3428 | curr_regs_live = BITMAP_ALLOC (®_obstack); |
fc00614f | 3429 | FOR_EACH_BB_FN (bb, cfun) |
1ec78e16 | 3430 | { |
3431 | curr_bb = bb; | |
ded17066 | 3432 | BB_DATA (bb)->live_in = BITMAP_ALLOC (NULL); |
3433 | BB_DATA (bb)->backup = BITMAP_ALLOC (NULL); | |
3434 | bitmap_copy (BB_DATA (bb)->live_in, df_get_live_in (bb)); | |
3435 | bitmap_copy (curr_regs_live, df_get_live_out (bb)); | |
1ec78e16 | 3436 | for (i = 0; i < ira_pressure_classes_num; i++) |
3437 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
3438 | EXECUTE_IF_SET_IN_BITMAP (curr_regs_live, 0, j, bi) | |
3439 | change_pressure (j, true); | |
3440 | ||
3441 | FOR_BB_INSNS_REVERSE (bb, insn) | |
3442 | { | |
3443 | rtx dreg; | |
3444 | int regno; | |
be10bb5a | 3445 | df_ref def, use; |
1ec78e16 | 3446 | |
3447 | if (! NONDEBUG_INSN_P (insn)) | |
3448 | continue; | |
3449 | ||
be10bb5a | 3450 | FOR_EACH_INSN_DEF (def, insn) |
1ec78e16 | 3451 | { |
be10bb5a | 3452 | dreg = DF_REF_REAL_REG (def); |
1ec78e16 | 3453 | gcc_assert (REG_P (dreg)); |
3454 | regno = REGNO (dreg); | |
be10bb5a | 3455 | if (!(DF_REF_FLAGS (def) |
1ec78e16 | 3456 | & (DF_REF_PARTIAL | DF_REF_CONDITIONAL))) |
3457 | { | |
3458 | if (bitmap_clear_bit (curr_regs_live, regno)) | |
3459 | change_pressure (regno, false); | |
3460 | } | |
3461 | } | |
3462 | ||
be10bb5a | 3463 | FOR_EACH_INSN_USE (use, insn) |
1ec78e16 | 3464 | { |
be10bb5a | 3465 | dreg = DF_REF_REAL_REG (use); |
1ec78e16 | 3466 | gcc_assert (REG_P (dreg)); |
3467 | regno = REGNO (dreg); | |
3468 | if (bitmap_set_bit (curr_regs_live, regno)) | |
3469 | change_pressure (regno, true); | |
3470 | } | |
3471 | } | |
3472 | } | |
3473 | BITMAP_FREE (curr_regs_live); | |
3474 | ||
3475 | if (dump_file == NULL) | |
3476 | return; | |
3477 | ||
3478 | fprintf (dump_file, "\nRegister Pressure: \n"); | |
fc00614f | 3479 | FOR_EACH_BB_FN (bb, cfun) |
1ec78e16 | 3480 | { |
3481 | fprintf (dump_file, " Basic block %d: \n", bb->index); | |
3482 | for (i = 0; (int) i < ira_pressure_classes_num; i++) | |
3483 | { | |
3484 | enum reg_class pressure_class; | |
3485 | ||
3486 | pressure_class = ira_pressure_classes[i]; | |
3487 | if (BB_DATA (bb)->max_reg_pressure[pressure_class] == 0) | |
3488 | continue; | |
3489 | ||
3490 | fprintf (dump_file, " %s=%d\n", reg_class_names[pressure_class], | |
3491 | BB_DATA (bb)->max_reg_pressure[pressure_class]); | |
3492 | } | |
3493 | } | |
3494 | fprintf (dump_file, "\n"); | |
3495 | } | |
3496 | ||
6627f3ed | 3497 | /* Top level routine to perform one code hoisting (aka unification) pass |
3498 | ||
6ef828f9 | 3499 | Return nonzero if a change was made. */ |
6627f3ed | 3500 | |
3501 | static int | |
952f0048 | 3502 | one_code_hoisting_pass (void) |
6627f3ed | 3503 | { |
3504 | int changed = 0; | |
3505 | ||
d743aba2 | 3506 | gcse_subst_count = 0; |
3507 | gcse_create_count = 0; | |
3508 | ||
3509 | /* Return if there's nothing to do, or it is too expensive. */ | |
a28770e1 | 3510 | if (n_basic_blocks_for_fn (cfun) <= NUM_FIXED_BLOCKS + 1 |
d743aba2 | 3511 | || is_too_expensive (_("GCSE disabled"))) |
3512 | return 0; | |
3513 | ||
8b38b150 | 3514 | doing_code_hoisting_p = true; |
3515 | ||
1ec78e16 | 3516 | /* Calculate register pressure for each basic block. */ |
3517 | if (flag_ira_hoist_pressure) | |
3518 | { | |
3519 | regstat_init_n_sets_and_refs (); | |
3520 | ira_set_pseudo_classes (false, dump_file); | |
3521 | alloc_aux_for_blocks (sizeof (struct bb_data)); | |
3522 | calculate_bb_reg_pressure (); | |
3523 | regstat_free_n_sets_and_refs (); | |
3524 | } | |
3525 | ||
d743aba2 | 3526 | /* We need alias. */ |
3527 | init_alias_analysis (); | |
3528 | ||
3529 | bytes_used = 0; | |
3530 | gcc_obstack_init (&gcse_obstack); | |
3531 | alloc_gcse_mem (); | |
3532 | ||
07abdb66 | 3533 | alloc_hash_table (&expr_hash_table); |
27cfe3f1 | 3534 | compute_hash_table (&expr_hash_table); |
3f5be5f4 | 3535 | if (dump_file) |
3536 | dump_hash_table (dump_file, "Code Hosting Expressions", &expr_hash_table); | |
2c084240 | 3537 | |
27cfe3f1 | 3538 | if (expr_hash_table.n_elems > 0) |
6627f3ed | 3539 | { |
fe672ac0 | 3540 | alloc_code_hoist_mem (last_basic_block_for_fn (cfun), |
3541 | expr_hash_table.n_elems); | |
6627f3ed | 3542 | compute_code_hoist_data (); |
d743aba2 | 3543 | changed = hoist_code (); |
6627f3ed | 3544 | free_code_hoist_mem (); |
3545 | } | |
2c084240 | 3546 | |
1ec78e16 | 3547 | if (flag_ira_hoist_pressure) |
3548 | { | |
3549 | free_aux_for_blocks (); | |
3550 | free_reg_info (); | |
3551 | } | |
27cfe3f1 | 3552 | free_hash_table (&expr_hash_table); |
d743aba2 | 3553 | free_gcse_mem (); |
3554 | obstack_free (&gcse_obstack, NULL); | |
3555 | ||
3556 | /* We are finished with alias. */ | |
3557 | end_alias_analysis (); | |
3558 | ||
3559 | if (dump_file) | |
3560 | { | |
3561 | fprintf (dump_file, "HOIST of %s, %d basic blocks, %d bytes needed, ", | |
a28770e1 | 3562 | current_function_name (), n_basic_blocks_for_fn (cfun), |
3563 | bytes_used); | |
d743aba2 | 3564 | fprintf (dump_file, "%d substs, %d insns created\n", |
3565 | gcse_subst_count, gcse_create_count); | |
3566 | } | |
6627f3ed | 3567 | |
8b38b150 | 3568 | doing_code_hoisting_p = false; |
3569 | ||
6627f3ed | 3570 | return changed; |
3571 | } | |
8e802be9 | 3572 | \f |
bc8197c0 | 3573 | /* Here we provide the things required to do store motion towards the exit. |
3574 | In order for this to be effective, gcse also needed to be taught how to | |
3575 | move a load when it is killed only by a store to itself. | |
8e802be9 | 3576 | |
3577 | int i; | |
3578 | float a[10]; | |
3579 | ||
3580 | void foo(float scale) | |
3581 | { | |
3582 | for (i=0; i<10; i++) | |
3583 | a[i] *= scale; | |
3584 | } | |
3585 | ||
3586 | 'i' is both loaded and stored to in the loop. Normally, gcse cannot move | |
3cfec666 | 3587 | the load out since its live around the loop, and stored at the bottom |
3588 | of the loop. | |
8e802be9 | 3589 | |
3cfec666 | 3590 | The 'Load Motion' referred to and implemented in this file is |
bc8197c0 | 3591 | an enhancement to gcse which when using edge based LCM, recognizes |
8e802be9 | 3592 | this situation and allows gcse to move the load out of the loop. |
3593 | ||
3594 | Once gcse has hoisted the load, store motion can then push this | |
3595 | load towards the exit, and we end up with no loads or stores of 'i' | |
3596 | in the loop. */ | |
3597 | ||
424da949 | 3598 | /* This will search the ldst list for a matching expression. If it |
8e802be9 | 3599 | doesn't find one, we create one and initialize it. */ |
3600 | ||
3601 | static struct ls_expr * | |
952f0048 | 3602 | ldst_entry (rtx x) |
8e802be9 | 3603 | { |
69333952 | 3604 | int do_not_record_p = 0; |
8e802be9 | 3605 | struct ls_expr * ptr; |
69333952 | 3606 | unsigned int hash; |
d9dd21a8 | 3607 | ls_expr **slot; |
0d707271 | 3608 | struct ls_expr e; |
8e802be9 | 3609 | |
78d140c9 | 3610 | hash = hash_rtx (x, GET_MODE (x), &do_not_record_p, |
3611 | NULL, /*have_reg_qty=*/false); | |
8e802be9 | 3612 | |
0d707271 | 3613 | e.pattern = x; |
c1f445d2 | 3614 | slot = pre_ldst_table->find_slot_with_hash (&e, hash, INSERT); |
0d707271 | 3615 | if (*slot) |
d9dd21a8 | 3616 | return *slot; |
69333952 | 3617 | |
4c36ffe6 | 3618 | ptr = XNEW (struct ls_expr); |
69333952 | 3619 | |
3620 | ptr->next = pre_ldst_mems; | |
3621 | ptr->expr = NULL; | |
3622 | ptr->pattern = x; | |
3623 | ptr->pattern_regs = NULL_RTX; | |
54267fdf | 3624 | ptr->loads = NULL; |
3625 | ptr->stores = NULL; | |
69333952 | 3626 | ptr->reaching_reg = NULL_RTX; |
3627 | ptr->invalid = 0; | |
3628 | ptr->index = 0; | |
3629 | ptr->hash_index = hash; | |
3630 | pre_ldst_mems = ptr; | |
0d707271 | 3631 | *slot = ptr; |
3cfec666 | 3632 | |
8e802be9 | 3633 | return ptr; |
3634 | } | |
3635 | ||
3636 | /* Free up an individual ldst entry. */ | |
3637 | ||
3cfec666 | 3638 | static void |
952f0048 | 3639 | free_ldst_entry (struct ls_expr * ptr) |
8e802be9 | 3640 | { |
7a676a9f | 3641 | free_INSN_LIST_list (& ptr->loads); |
3642 | free_INSN_LIST_list (& ptr->stores); | |
8e802be9 | 3643 | |
3644 | free (ptr); | |
3645 | } | |
3646 | ||
3647 | /* Free up all memory associated with the ldst list. */ | |
3648 | ||
3649 | static void | |
bc8197c0 | 3650 | free_ld_motion_mems (void) |
8e802be9 | 3651 | { |
c1f445d2 | 3652 | delete pre_ldst_table; |
3653 | pre_ldst_table = NULL; | |
0d707271 | 3654 | |
3cfec666 | 3655 | while (pre_ldst_mems) |
8e802be9 | 3656 | { |
3657 | struct ls_expr * tmp = pre_ldst_mems; | |
3658 | ||
3659 | pre_ldst_mems = pre_ldst_mems->next; | |
3660 | ||
3661 | free_ldst_entry (tmp); | |
3662 | } | |
3663 | ||
3664 | pre_ldst_mems = NULL; | |
3665 | } | |
3666 | ||
3667 | /* Dump debugging info about the ldst list. */ | |
3668 | ||
3669 | static void | |
952f0048 | 3670 | print_ldst_list (FILE * file) |
8e802be9 | 3671 | { |
3672 | struct ls_expr * ptr; | |
3673 | ||
3674 | fprintf (file, "LDST list: \n"); | |
3675 | ||
bc8197c0 | 3676 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) |
8e802be9 | 3677 | { |
3678 | fprintf (file, " Pattern (%3d): ", ptr->index); | |
3679 | ||
3680 | print_rtl (file, ptr->pattern); | |
3681 | ||
3682 | fprintf (file, "\n Loads : "); | |
3683 | ||
3684 | if (ptr->loads) | |
3685 | print_rtl (file, ptr->loads); | |
3686 | else | |
3687 | fprintf (file, "(nil)"); | |
3688 | ||
3689 | fprintf (file, "\n Stores : "); | |
3690 | ||
3691 | if (ptr->stores) | |
3692 | print_rtl (file, ptr->stores); | |
3693 | else | |
3694 | fprintf (file, "(nil)"); | |
3695 | ||
3696 | fprintf (file, "\n\n"); | |
3697 | } | |
3698 | ||
3699 | fprintf (file, "\n"); | |
3700 | } | |
3701 | ||
3702 | /* Returns 1 if X is in the list of ldst only expressions. */ | |
3703 | ||
3704 | static struct ls_expr * | |
952f0048 | 3705 | find_rtx_in_ldst (rtx x) |
8e802be9 | 3706 | { |
0d707271 | 3707 | struct ls_expr e; |
d9dd21a8 | 3708 | ls_expr **slot; |
c1f445d2 | 3709 | if (!pre_ldst_table) |
00784725 | 3710 | return NULL; |
0d707271 | 3711 | e.pattern = x; |
c1f445d2 | 3712 | slot = pre_ldst_table->find_slot (&e, NO_INSERT); |
d9dd21a8 | 3713 | if (!slot || (*slot)->invalid) |
0d707271 | 3714 | return NULL; |
d9dd21a8 | 3715 | return *slot; |
8e802be9 | 3716 | } |
8e802be9 | 3717 | \f |
3718 | /* Load Motion for loads which only kill themselves. */ | |
3719 | ||
bc8197c0 | 3720 | /* Return true if x, a MEM, is a simple access with no side effects. |
3721 | These are the types of loads we consider for the ld_motion list, | |
3722 | otherwise we let the usual aliasing take care of it. */ | |
8e802be9 | 3723 | |
3cfec666 | 3724 | static int |
7ecb5bb2 | 3725 | simple_mem (const_rtx x) |
8e802be9 | 3726 | { |
8e802be9 | 3727 | if (MEM_VOLATILE_P (x)) |
3728 | return 0; | |
3cfec666 | 3729 | |
8e802be9 | 3730 | if (GET_MODE (x) == BLKmode) |
3731 | return 0; | |
7a676a9f | 3732 | |
64928ee5 | 3733 | /* If we are handling exceptions, we must be careful with memory references |
cbeb677e | 3734 | that may trap. If we are not, the behavior is undefined, so we may just |
64928ee5 | 3735 | continue. */ |
cbeb677e | 3736 | if (cfun->can_throw_non_call_exceptions && may_trap_p (x)) |
43f5be72 | 3737 | return 0; |
3738 | ||
64928ee5 | 3739 | if (side_effects_p (x)) |
3740 | return 0; | |
3cfec666 | 3741 | |
64928ee5 | 3742 | /* Do not consider function arguments passed on stack. */ |
3743 | if (reg_mentioned_p (stack_pointer_rtx, x)) | |
3744 | return 0; | |
3745 | ||
3746 | if (flag_float_store && FLOAT_MODE_P (GET_MODE (x))) | |
3747 | return 0; | |
3748 | ||
3749 | return 1; | |
8e802be9 | 3750 | } |
3751 | ||
3cfec666 | 3752 | /* Make sure there isn't a buried reference in this pattern anywhere. |
3753 | If there is, invalidate the entry for it since we're not capable | |
3754 | of fixing it up just yet.. We have to be sure we know about ALL | |
8e802be9 | 3755 | loads since the aliasing code will allow all entries in the |
3756 | ld_motion list to not-alias itself. If we miss a load, we will get | |
3cfec666 | 3757 | the wrong value since gcse might common it and we won't know to |
8e802be9 | 3758 | fix it up. */ |
3759 | ||
3760 | static void | |
952f0048 | 3761 | invalidate_any_buried_refs (rtx x) |
8e802be9 | 3762 | { |
3763 | const char * fmt; | |
387732c1 | 3764 | int i, j; |
8e802be9 | 3765 | struct ls_expr * ptr; |
3766 | ||
3767 | /* Invalidate it in the list. */ | |
b9f02dbb | 3768 | if (MEM_P (x) && simple_mem (x)) |
8e802be9 | 3769 | { |
3770 | ptr = ldst_entry (x); | |
3771 | ptr->invalid = 1; | |
3772 | } | |
3773 | ||
3774 | /* Recursively process the insn. */ | |
3775 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
3cfec666 | 3776 | |
8e802be9 | 3777 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) |
3778 | { | |
3779 | if (fmt[i] == 'e') | |
3780 | invalidate_any_buried_refs (XEXP (x, i)); | |
3781 | else if (fmt[i] == 'E') | |
3782 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
3783 | invalidate_any_buried_refs (XVECEXP (x, i, j)); | |
3784 | } | |
3785 | } | |
3786 | ||
c5d8ca43 | 3787 | /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple |
3788 | being defined as MEM loads and stores to symbols, with no side effects | |
3789 | and no registers in the expression. For a MEM destination, we also | |
3790 | check that the insn is still valid if we replace the destination with a | |
3791 | REG, as is done in update_ld_motion_stores. If there are any uses/defs | |
3792 | which don't match this criteria, they are invalidated and trimmed out | |
3793 | later. */ | |
8e802be9 | 3794 | |
3cfec666 | 3795 | static void |
952f0048 | 3796 | compute_ld_motion_mems (void) |
8e802be9 | 3797 | { |
3798 | struct ls_expr * ptr; | |
4c26117a | 3799 | basic_block bb; |
526d7387 | 3800 | rtx_insn *insn; |
3cfec666 | 3801 | |
8e802be9 | 3802 | pre_ldst_mems = NULL; |
c1f445d2 | 3803 | pre_ldst_table = new hash_table<pre_ldst_expr_hasher> (13); |
8e802be9 | 3804 | |
fc00614f | 3805 | FOR_EACH_BB_FN (bb, cfun) |
8e802be9 | 3806 | { |
defc8016 | 3807 | FOR_BB_INSNS (bb, insn) |
8e802be9 | 3808 | { |
9845d120 | 3809 | if (NONDEBUG_INSN_P (insn)) |
8e802be9 | 3810 | { |
3811 | if (GET_CODE (PATTERN (insn)) == SET) | |
3812 | { | |
3813 | rtx src = SET_SRC (PATTERN (insn)); | |
3814 | rtx dest = SET_DEST (PATTERN (insn)); | |
f473eb72 | 3815 | rtx note = find_reg_equal_equiv_note (insn); |
3816 | rtx src_eq; | |
8e802be9 | 3817 | |
3818 | /* Check for a simple LOAD... */ | |
b9f02dbb | 3819 | if (MEM_P (src) && simple_mem (src)) |
8e802be9 | 3820 | { |
3821 | ptr = ldst_entry (src); | |
b9f02dbb | 3822 | if (REG_P (dest)) |
8e802be9 | 3823 | ptr->loads = alloc_INSN_LIST (insn, ptr->loads); |
3824 | else | |
3825 | ptr->invalid = 1; | |
3826 | } | |
3827 | else | |
3828 | { | |
3829 | /* Make sure there isn't a buried load somewhere. */ | |
3830 | invalidate_any_buried_refs (src); | |
3831 | } | |
3cfec666 | 3832 | |
f473eb72 | 3833 | if (note != 0 && REG_NOTE_KIND (note) == REG_EQUAL) |
3834 | src_eq = XEXP (note, 0); | |
3835 | else | |
3836 | src_eq = NULL_RTX; | |
3837 | ||
3838 | if (src_eq != NULL_RTX | |
3839 | && !(MEM_P (src_eq) && simple_mem (src_eq))) | |
3840 | invalidate_any_buried_refs (src_eq); | |
3841 | ||
8e802be9 | 3842 | /* Check for stores. Don't worry about aliased ones, they |
3843 | will block any movement we might do later. We only care | |
3844 | about this exact pattern since those are the only | |
3845 | circumstance that we will ignore the aliasing info. */ | |
b9f02dbb | 3846 | if (MEM_P (dest) && simple_mem (dest)) |
8e802be9 | 3847 | { |
3848 | ptr = ldst_entry (dest); | |
3cfec666 | 3849 | |
b9f02dbb | 3850 | if (! MEM_P (src) |
c5d8ca43 | 3851 | && GET_CODE (src) != ASM_OPERANDS |
3852 | /* Check for REG manually since want_to_gcse_p | |
3853 | returns 0 for all REGs. */ | |
4b673aa1 | 3854 | && can_assign_to_reg_without_clobbers_p (src)) |
8e802be9 | 3855 | ptr->stores = alloc_INSN_LIST (insn, ptr->stores); |
3856 | else | |
3857 | ptr->invalid = 1; | |
3858 | } | |
3859 | } | |
3860 | else | |
3861 | invalidate_any_buried_refs (PATTERN (insn)); | |
3862 | } | |
3863 | } | |
3864 | } | |
3865 | } | |
3866 | ||
3cfec666 | 3867 | /* Remove any references that have been either invalidated or are not in the |
8e802be9 | 3868 | expression list for pre gcse. */ |
3869 | ||
3870 | static void | |
952f0048 | 3871 | trim_ld_motion_mems (void) |
8e802be9 | 3872 | { |
69333952 | 3873 | struct ls_expr * * last = & pre_ldst_mems; |
3874 | struct ls_expr * ptr = pre_ldst_mems; | |
8e802be9 | 3875 | |
3876 | while (ptr != NULL) | |
3877 | { | |
9908fe4d | 3878 | struct gcse_expr * expr; |
3cfec666 | 3879 | |
8e802be9 | 3880 | /* Delete if entry has been made invalid. */ |
69333952 | 3881 | if (! ptr->invalid) |
8e802be9 | 3882 | { |
8e802be9 | 3883 | /* Delete if we cannot find this mem in the expression list. */ |
69333952 | 3884 | unsigned int hash = ptr->hash_index % expr_hash_table.size; |
3cfec666 | 3885 | |
69333952 | 3886 | for (expr = expr_hash_table.table[hash]; |
3887 | expr != NULL; | |
3888 | expr = expr->next_same_hash) | |
3889 | if (expr_equiv_p (expr->expr, ptr->pattern)) | |
3890 | break; | |
8e802be9 | 3891 | } |
3892 | else | |
9908fe4d | 3893 | expr = (struct gcse_expr *) 0; |
69333952 | 3894 | |
3895 | if (expr) | |
8e802be9 | 3896 | { |
3897 | /* Set the expression field if we are keeping it. */ | |
8e802be9 | 3898 | ptr->expr = expr; |
69333952 | 3899 | last = & ptr->next; |
8e802be9 | 3900 | ptr = ptr->next; |
3901 | } | |
69333952 | 3902 | else |
3903 | { | |
3904 | *last = ptr->next; | |
c1f445d2 | 3905 | pre_ldst_table->remove_elt_with_hash (ptr, ptr->hash_index); |
69333952 | 3906 | free_ldst_entry (ptr); |
3907 | ptr = * last; | |
3908 | } | |
8e802be9 | 3909 | } |
3910 | ||
3911 | /* Show the world what we've found. */ | |
3f5be5f4 | 3912 | if (dump_file && pre_ldst_mems != NULL) |
3913 | print_ldst_list (dump_file); | |
8e802be9 | 3914 | } |
3915 | ||
3916 | /* This routine will take an expression which we are replacing with | |
3917 | a reaching register, and update any stores that are needed if | |
3918 | that expression is in the ld_motion list. Stores are updated by | |
91c82c20 | 3919 | copying their SRC to the reaching register, and then storing |
8e802be9 | 3920 | the reaching register into the store location. These keeps the |
3921 | correct value in the reaching register for the loads. */ | |
3922 | ||
3923 | static void | |
9908fe4d | 3924 | update_ld_motion_stores (struct gcse_expr * expr) |
8e802be9 | 3925 | { |
3926 | struct ls_expr * mem_ptr; | |
3927 | ||
3928 | if ((mem_ptr = find_rtx_in_ldst (expr->expr))) | |
3929 | { | |
3cfec666 | 3930 | /* We can try to find just the REACHED stores, but is shouldn't |
3931 | matter to set the reaching reg everywhere... some might be | |
8e802be9 | 3932 | dead and should be eliminated later. */ |
3933 | ||
c5d8ca43 | 3934 | /* We replace (set mem expr) with (set reg expr) (set mem reg) |
3935 | where reg is the reaching reg used in the load. We checked in | |
3936 | compute_ld_motion_mems that we can replace (set mem expr) with | |
3937 | (set reg expr) in that insn. */ | |
8e802be9 | 3938 | rtx list = mem_ptr->stores; |
3cfec666 | 3939 | |
8e802be9 | 3940 | for ( ; list != NULL_RTX; list = XEXP (list, 1)) |
3941 | { | |
e149ca56 | 3942 | rtx_insn *insn = as_a <rtx_insn *> (XEXP (list, 0)); |
8e802be9 | 3943 | rtx pat = PATTERN (insn); |
3944 | rtx src = SET_SRC (pat); | |
3945 | rtx reg = expr->reaching_reg; | |
8e802be9 | 3946 | |
3947 | /* If we've already copied it, continue. */ | |
3948 | if (expr->reaching_reg == src) | |
3949 | continue; | |
3cfec666 | 3950 | |
3f5be5f4 | 3951 | if (dump_file) |
8e802be9 | 3952 | { |
3f5be5f4 | 3953 | fprintf (dump_file, "PRE: store updated with reaching reg "); |
bc8197c0 | 3954 | print_rtl (dump_file, reg); |
3f5be5f4 | 3955 | fprintf (dump_file, ":\n "); |
3956 | print_inline_rtx (dump_file, insn, 8); | |
3957 | fprintf (dump_file, "\n"); | |
8e802be9 | 3958 | } |
3cfec666 | 3959 | |
9ed997be | 3960 | rtx_insn *copy = gen_move_insn (reg, copy_rtx (SET_SRC (pat))); |
d52d7a3a | 3961 | emit_insn_before (copy, insn); |
8e802be9 | 3962 | SET_SRC (pat) = reg; |
3072d30e | 3963 | df_insn_rescan (insn); |
8e802be9 | 3964 | |
3965 | /* un-recognize this pattern since it's probably different now. */ | |
3966 | INSN_CODE (insn) = -1; | |
3967 | gcse_create_count++; | |
3968 | } | |
3969 | } | |
3970 | } | |
3971 | \f | |
4b673aa1 | 3972 | /* Return true if the graph is too expensive to optimize. PASS is the |
3973 | optimization about to be performed. */ | |
64928ee5 | 3974 | |
4b673aa1 | 3975 | static bool |
3976 | is_too_expensive (const char *pass) | |
3977 | { | |
3978 | /* Trying to perform global optimizations on flow graphs which have | |
3979 | a high connectivity will take a long time and is unlikely to be | |
3980 | particularly useful. | |
7a676a9f | 3981 | |
4b673aa1 | 3982 | In normal circumstances a cfg should have about twice as many |
3983 | edges as blocks. But we do not want to punish small functions | |
3984 | which have a couple switch statements. Rather than simply | |
3985 | threshold the number of blocks, uses something with a more | |
3986 | graceful degradation. */ | |
f1955b22 | 3987 | if (n_edges_for_fn (cfun) > 20000 + n_basic_blocks_for_fn (cfun) * 4) |
4b673aa1 | 3988 | { |
3989 | warning (OPT_Wdisabled_optimization, | |
3990 | "%s: %d basic blocks and %d edges/basic block", | |
a28770e1 | 3991 | pass, n_basic_blocks_for_fn (cfun), |
f1955b22 | 3992 | n_edges_for_fn (cfun) / n_basic_blocks_for_fn (cfun)); |
8e802be9 | 3993 | |
4b673aa1 | 3994 | return true; |
3995 | } | |
8e802be9 | 3996 | |
07abdb66 | 3997 | /* If allocating memory for the dataflow bitmaps would take up too much |
4b673aa1 | 3998 | storage it's better just to disable the optimization. */ |
a28770e1 | 3999 | if ((n_basic_blocks_for_fn (cfun) |
4b673aa1 | 4000 | * SBITMAP_SET_SIZE (max_reg_num ()) |
4001 | * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY) | |
4002 | { | |
4003 | warning (OPT_Wdisabled_optimization, | |
4004 | "%s: %d basic blocks and %d registers", | |
a28770e1 | 4005 | pass, n_basic_blocks_for_fn (cfun), max_reg_num ()); |
8e802be9 | 4006 | |
4b673aa1 | 4007 | return true; |
4008 | } | |
42334a67 | 4009 | |
4b673aa1 | 4010 | return false; |
9e4a9ceb | 4011 | } |
4b673aa1 | 4012 | \f |
4b673aa1 | 4013 | static unsigned int |
4014 | execute_rtl_pre (void) | |
4015 | { | |
805e3e15 | 4016 | int changed; |
4b673aa1 | 4017 | delete_unreachable_blocks (); |
4b673aa1 | 4018 | df_analyze (); |
805e3e15 | 4019 | changed = one_pre_gcse_pass (); |
4020 | flag_rerun_cse_after_global_opts |= changed; | |
4021 | if (changed) | |
4022 | cleanup_cfg (0); | |
4b673aa1 | 4023 | return 0; |
4024 | } | |
7a676a9f | 4025 | |
4b673aa1 | 4026 | static unsigned int |
4027 | execute_rtl_hoist (void) | |
4028 | { | |
805e3e15 | 4029 | int changed; |
4b673aa1 | 4030 | delete_unreachable_blocks (); |
4b673aa1 | 4031 | df_analyze (); |
805e3e15 | 4032 | changed = one_code_hoisting_pass (); |
4033 | flag_rerun_cse_after_global_opts |= changed; | |
4034 | if (changed) | |
4035 | cleanup_cfg (0); | |
4b673aa1 | 4036 | return 0; |
4037 | } | |
77fce4cd | 4038 | |
cbe8bda8 | 4039 | namespace { |
4040 | ||
4041 | const pass_data pass_data_rtl_pre = | |
77fce4cd | 4042 | { |
cbe8bda8 | 4043 | RTL_PASS, /* type */ |
4044 | "rtl pre", /* name */ | |
4045 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4046 | TV_PRE, /* tv_id */ |
4047 | PROP_cfglayout, /* properties_required */ | |
4048 | 0, /* properties_provided */ | |
4049 | 0, /* properties_destroyed */ | |
4050 | 0, /* todo_flags_start */ | |
8b88439e | 4051 | TODO_df_finish, /* todo_flags_finish */ |
d743aba2 | 4052 | }; |
77fce4cd | 4053 | |
cbe8bda8 | 4054 | class pass_rtl_pre : public rtl_opt_pass |
4055 | { | |
4056 | public: | |
9af5ce0c | 4057 | pass_rtl_pre (gcc::context *ctxt) |
4058 | : rtl_opt_pass (pass_data_rtl_pre, ctxt) | |
cbe8bda8 | 4059 | {} |
4060 | ||
4061 | /* opt_pass methods: */ | |
31315c24 | 4062 | virtual bool gate (function *); |
65b0537f | 4063 | virtual unsigned int execute (function *) { return execute_rtl_pre (); } |
cbe8bda8 | 4064 | |
4065 | }; // class pass_rtl_pre | |
4066 | ||
31315c24 | 4067 | /* We do not construct an accurate cfg in functions which call |
4068 | setjmp, so none of these passes runs if the function calls | |
4069 | setjmp. | |
4070 | FIXME: Should just handle setjmp via REG_SETJMP notes. */ | |
4071 | ||
4072 | bool | |
4073 | pass_rtl_pre::gate (function *fun) | |
4074 | { | |
4075 | return optimize > 0 && flag_gcse | |
4076 | && !fun->calls_setjmp | |
4077 | && optimize_function_for_speed_p (fun) | |
4078 | && dbg_cnt (pre); | |
4079 | } | |
4080 | ||
cbe8bda8 | 4081 | } // anon namespace |
4082 | ||
4083 | rtl_opt_pass * | |
4084 | make_pass_rtl_pre (gcc::context *ctxt) | |
4085 | { | |
4086 | return new pass_rtl_pre (ctxt); | |
4087 | } | |
4088 | ||
4089 | namespace { | |
4090 | ||
4091 | const pass_data pass_data_rtl_hoist = | |
77fce4cd | 4092 | { |
cbe8bda8 | 4093 | RTL_PASS, /* type */ |
4094 | "hoist", /* name */ | |
4095 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4096 | TV_HOIST, /* tv_id */ |
4097 | PROP_cfglayout, /* properties_required */ | |
4098 | 0, /* properties_provided */ | |
4099 | 0, /* properties_destroyed */ | |
4100 | 0, /* todo_flags_start */ | |
8b88439e | 4101 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 4102 | }; |
4103 | ||
cbe8bda8 | 4104 | class pass_rtl_hoist : public rtl_opt_pass |
4105 | { | |
4106 | public: | |
9af5ce0c | 4107 | pass_rtl_hoist (gcc::context *ctxt) |
4108 | : rtl_opt_pass (pass_data_rtl_hoist, ctxt) | |
cbe8bda8 | 4109 | {} |
4110 | ||
4111 | /* opt_pass methods: */ | |
31315c24 | 4112 | virtual bool gate (function *); |
65b0537f | 4113 | virtual unsigned int execute (function *) { return execute_rtl_hoist (); } |
cbe8bda8 | 4114 | |
4115 | }; // class pass_rtl_hoist | |
4116 | ||
31315c24 | 4117 | bool |
4118 | pass_rtl_hoist::gate (function *) | |
4119 | { | |
4120 | return optimize > 0 && flag_gcse | |
4121 | && !cfun->calls_setjmp | |
4122 | /* It does not make sense to run code hoisting unless we are optimizing | |
4123 | for code size -- it rarely makes programs faster, and can make then | |
4124 | bigger if we did PRE (when optimizing for space, we don't run PRE). */ | |
4125 | && optimize_function_for_size_p (cfun) | |
4126 | && dbg_cnt (hoist); | |
4127 | } | |
4128 | ||
cbe8bda8 | 4129 | } // anon namespace |
4130 | ||
4131 | rtl_opt_pass * | |
4132 | make_pass_rtl_hoist (gcc::context *ctxt) | |
4133 | { | |
4134 | return new pass_rtl_hoist (ctxt); | |
4135 | } | |
4136 | ||
415309e2 | 4137 | /* Reset all state within gcse.c so that we can rerun the compiler |
4138 | within the same process. For use by toplev::finalize. */ | |
4139 | ||
4140 | void | |
4141 | gcse_c_finalize (void) | |
4142 | { | |
4143 | test_insn = NULL; | |
4144 | } | |
4145 | ||
1f3233d1 | 4146 | #include "gt-gcse.h" |