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65963943 1/* Generate code from machine description to emit insns as rtl.
751aa7cc 2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001
b492151d 3 Free Software Foundation, Inc.
65963943 4
1322177d 5This file is part of GCC.
65963943 6
1322177d
LB
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
65963943 11
1322177d
LB
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
65963943
RK
16
17You should have received a copy of the GNU General Public License
1322177d
LB
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
65963943
RK
21
22
0d64891c 23#include "hconfig.h"
0b93b64e 24#include "system.h"
65963943 25#include "rtl.h"
f8b6598e 26#include "errors.h"
c88c0d42 27#include "gensupport.h"
65963943 28
65963943 29
65963943
RK
30static int max_opno;
31static int max_dup_opno;
ede7cd44 32static int max_scratch_opno;
65963943
RK
33static int register_constraints;
34static int insn_code_number;
35static int insn_index_number;
36
37/* Data structure for recording the patterns of insns that have CLOBBERs.
38 We use this to output a function that adds these CLOBBERs to a
39 previously-allocated PARALLEL expression. */
40
41struct clobber_pat
42{
e5f6a288 43 struct clobber_ent *insns;
65963943
RK
44 rtx pattern;
45 int first_clobber;
46 struct clobber_pat *next;
751aa7cc 47 int has_hard_reg;
65963943
RK
48} *clobber_list;
49
e5f6a288
RK
50/* Records one insn that uses the clobber list. */
51
52struct clobber_ent
53{
54 int code_number; /* Counts only insns. */
55 struct clobber_ent *next;
56};
57
a94ae8f5
KG
58static void max_operand_1 PARAMS ((rtx));
59static int max_operand_vec PARAMS ((rtx, int));
60static void print_code PARAMS ((RTX_CODE));
ab55f58c 61static void gen_exp PARAMS ((rtx, enum rtx_code, char *));
821e35ba 62static void gen_insn PARAMS ((rtx, int));
a94ae8f5
KG
63static void gen_expand PARAMS ((rtx));
64static void gen_split PARAMS ((rtx));
65static void output_add_clobbers PARAMS ((void));
751aa7cc 66static void output_added_clobbers_hard_reg_p PARAMS ((void));
a94ae8f5
KG
67static void gen_rtx_scratch PARAMS ((rtx, enum rtx_code));
68static void output_peephole2_scratches PARAMS ((rtx));
e009aaf3
JL
69
70\f
65963943
RK
71static void
72max_operand_1 (x)
73 rtx x;
74{
b3694847
SS
75 RTX_CODE code;
76 int i;
77 int len;
78 const char *fmt;
65963943
RK
79
80 if (x == 0)
81 return;
82
83 code = GET_CODE (x);
84
85 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
86 register_constraints = 1;
87 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
88 register_constraints = 1;
89 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
90 || code == MATCH_PARALLEL)
91 max_opno = MAX (max_opno, XINT (x, 0));
8fabbfe6 92 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
65963943 93 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
ede7cd44
RH
94 if (code == MATCH_SCRATCH)
95 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
65963943
RK
96
97 fmt = GET_RTX_FORMAT (code);
98 len = GET_RTX_LENGTH (code);
99 for (i = 0; i < len; i++)
100 {
101 if (fmt[i] == 'e' || fmt[i] == 'u')
102 max_operand_1 (XEXP (x, i));
103 else if (fmt[i] == 'E')
104 {
105 int j;
106 for (j = 0; j < XVECLEN (x, i); j++)
107 max_operand_1 (XVECEXP (x, i, j));
108 }
109 }
110}
111
112static int
113max_operand_vec (insn, arg)
114 rtx insn;
115 int arg;
116{
b3694847
SS
117 int len = XVECLEN (insn, arg);
118 int i;
65963943
RK
119
120 max_opno = -1;
121 max_dup_opno = -1;
ede7cd44 122 max_scratch_opno = -1;
65963943
RK
123
124 for (i = 0; i < len; i++)
125 max_operand_1 (XVECEXP (insn, arg, i));
126
127 return max_opno + 1;
128}
129\f
130static void
131print_code (code)
132 RTX_CODE code;
133{
b3694847 134 const char *p1;
65963943 135 for (p1 = GET_RTX_NAME (code); *p1; p1++)
92a438d1 136 putchar (TOUPPER(*p1));
65963943
RK
137}
138
ede7cd44
RH
139static void
140gen_rtx_scratch (x, subroutine_type)
141 rtx x;
142 enum rtx_code subroutine_type;
143{
144 if (subroutine_type == DEFINE_PEEPHOLE2)
145 {
146 printf ("operand%d", XINT (x, 0));
147 }
148 else
149 {
150 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
151 }
152}
153
65963943
RK
154/* Print a C expression to construct an RTX just like X,
155 substituting any operand references appearing within. */
156
157static void
ab55f58c 158gen_exp (x, subroutine_type, used)
65963943 159 rtx x;
ede7cd44 160 enum rtx_code subroutine_type;
ab55f58c 161 char *used;
65963943 162{
b3694847
SS
163 RTX_CODE code;
164 int i;
165 int len;
166 const char *fmt;
65963943
RK
167
168 if (x == 0)
169 {
3d678dca 170 printf ("NULL_RTX");
65963943
RK
171 return;
172 }
173
174 code = GET_CODE (x);
175
176 switch (code)
177 {
178 case MATCH_OPERAND:
179 case MATCH_DUP:
ab55f58c
RH
180 if (used)
181 {
182 if (used[XINT (x, 0)])
183 {
184 printf ("copy_rtx (operand%d)", XINT (x, 0));
185 return;
186 }
187 used[XINT (x, 0)] = 1;
188 }
65963943
RK
189 printf ("operand%d", XINT (x, 0));
190 return;
191
192 case MATCH_OP_DUP:
4ceb7595
JC
193 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
194 if (GET_MODE (x) == VOIDmode)
195 printf ("GET_MODE (operand%d)", XINT (x, 0));
196 else
197 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
65963943
RK
198 for (i = 0; i < XVECLEN (x, 1); i++)
199 {
200 printf (",\n\t\t");
ab55f58c 201 gen_exp (XVECEXP (x, 1, i), subroutine_type, used);
65963943
RK
202 }
203 printf (")");
204 return;
205
206 case MATCH_OPERATOR:
207 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
208 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
209 for (i = 0; i < XVECLEN (x, 2); i++)
210 {
211 printf (",\n\t\t");
ab55f58c 212 gen_exp (XVECEXP (x, 2, i), subroutine_type, used);
65963943
RK
213 }
214 printf (")");
215 return;
216
217 case MATCH_PARALLEL:
8fabbfe6 218 case MATCH_PAR_DUP:
65963943
RK
219 printf ("operand%d", XINT (x, 0));
220 return;
221
222 case MATCH_SCRATCH:
ede7cd44 223 gen_rtx_scratch (x, subroutine_type);
65963943
RK
224 return;
225
226 case ADDRESS:
227 fatal ("ADDRESS expression code used in named instruction pattern");
228
229 case PC:
230 printf ("pc_rtx");
231 return;
232
233 case CC0:
234 printf ("cc0_rtx");
235 return;
236
237 case CONST_INT:
238 if (INTVAL (x) == 0)
3d678dca
RS
239 printf ("const0_rtx");
240 else if (INTVAL (x) == 1)
241 printf ("const1_rtx");
242 else if (INTVAL (x) == -1)
243 printf ("constm1_rtx");
244 else if (INTVAL (x) == STORE_FLAG_VALUE)
245 printf ("const_true_rtx");
246 else
76d31c63
JL
247 {
248 printf ("GEN_INT (");
249 printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
250 printf (")");
251 }
3d678dca
RS
252 return;
253
254 case CONST_DOUBLE:
255 /* These shouldn't be written in MD files. Instead, the appropriate
256 routines in varasm.c should be called. */
257 abort ();
1d300e19
KG
258
259 default:
260 break;
65963943
RK
261 }
262
3b80f6ca 263 printf ("gen_rtx_");
65963943 264 print_code (code);
3b80f6ca 265 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
65963943
RK
266
267 fmt = GET_RTX_FORMAT (code);
268 len = GET_RTX_LENGTH (code);
269 for (i = 0; i < len; i++)
270 {
271 if (fmt[i] == '0')
272 break;
a558d864 273 printf (",\n\t");
65963943 274 if (fmt[i] == 'e' || fmt[i] == 'u')
ab55f58c 275 gen_exp (XEXP (x, i), subroutine_type, used);
65963943 276 else if (fmt[i] == 'i')
3d678dca 277 printf ("%u", XINT (x, i));
65963943
RK
278 else if (fmt[i] == 's')
279 printf ("\"%s\"", XSTR (x, i));
280 else if (fmt[i] == 'E')
281 {
282 int j;
283 printf ("gen_rtvec (%d", XVECLEN (x, i));
284 for (j = 0; j < XVECLEN (x, i); j++)
285 {
286 printf (",\n\t\t");
ab55f58c 287 gen_exp (XVECEXP (x, i, j), subroutine_type, used);
65963943
RK
288 }
289 printf (")");
290 }
291 else
292 abort ();
293 }
294 printf (")");
295}
296\f
297/* Generate the `gen_...' function for a DEFINE_INSN. */
298
299static void
821e35ba 300gen_insn (insn, lineno)
65963943 301 rtx insn;
821e35ba 302 int lineno;
65963943
RK
303{
304 int operands;
b3694847 305 int i;
65963943
RK
306
307 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
308 registers or MATCH_SCRATCHes. If so, store away the information for
0f41302f 309 later. */
65963943
RK
310
311 if (XVEC (insn, 1))
312 {
751aa7cc
RK
313 int has_hard_reg = 0;
314
65963943 315 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
751aa7cc
RK
316 {
317 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
318 break;
319
320 if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
321 has_hard_reg = 1;
322 else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
323 break;
324 }
65963943
RK
325
326 if (i != XVECLEN (insn, 1) - 1)
327 {
b3694847
SS
328 struct clobber_pat *p;
329 struct clobber_ent *link
e5f6a288 330 = (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
b3694847 331 int j;
e5f6a288
RK
332
333 link->code_number = insn_code_number;
334
335 /* See if any previous CLOBBER_LIST entry is the same as this
336 one. */
337
338 for (p = clobber_list; p; p = p->next)
339 {
340 if (p->first_clobber != i + 1
341 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
342 continue;
343
344 for (j = i + 1; j < XVECLEN (insn, 1); j++)
345 {
346 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
347 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
348
349 /* OLD and NEW are the same if both are to be a SCRATCH
f5f178e0 350 of the same mode,
e5f6a288 351 or if both are registers of the same mode and number. */
f5f178e0
RS
352 if (! (GET_MODE (old) == GET_MODE (new)
353 && ((GET_CODE (old) == MATCH_SCRATCH
354 && GET_CODE (new) == MATCH_SCRATCH)
355 || (GET_CODE (old) == REG && GET_CODE (new) == REG
356 && REGNO (old) == REGNO (new)))))
e5f6a288
RK
357 break;
358 }
359
360 if (j == XVECLEN (insn, 1))
361 break;
362 }
363
364 if (p == 0)
365 {
366 p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
65963943 367
e5f6a288
RK
368 p->insns = 0;
369 p->pattern = insn;
370 p->first_clobber = i + 1;
371 p->next = clobber_list;
751aa7cc 372 p->has_hard_reg = has_hard_reg;
e5f6a288
RK
373 clobber_list = p;
374 }
375
376 link->next = p->insns;
377 p->insns = link;
65963943
RK
378 }
379 }
380
6b6ca844
RK
381 /* Don't mention instructions whose names are the null string
382 or begin with '*'. They are in the machine description just
383 to be recognized. */
384 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
65963943
RK
385 return;
386
821e35ba
RH
387 printf ("/* %s:%d */\n", read_rtx_filename, lineno);
388
65963943
RK
389 /* Find out how many operands this function has,
390 and also whether any of them have register constraints. */
391 register_constraints = 0;
392 operands = max_operand_vec (insn, 1);
393 if (max_dup_opno >= operands)
394 fatal ("match_dup operand number has no match_operand");
395
396 /* Output the function name and argument declarations. */
397 printf ("rtx\ngen_%s (", XSTR (insn, 0));
398 for (i = 0; i < operands; i++)
913d0833
KG
399 if (i)
400 printf (", operand%d", i);
401 else
402 printf ("operand%d", i);
65963943
RK
403 printf (")\n");
404 for (i = 0; i < operands; i++)
405 printf (" rtx operand%d;\n", i);
406 printf ("{\n");
407
408 /* Output code to construct and return the rtl for the instruction body */
409
410 if (XVECLEN (insn, 1) == 1)
411 {
412 printf (" return ");
ab55f58c 413 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN, NULL);
65963943
RK
414 printf (";\n}\n\n");
415 }
416 else
417 {
c5c76735
JL
418 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
419 XVECLEN (insn, 1));
420
65963943
RK
421 for (i = 0; i < XVECLEN (insn, 1); i++)
422 {
423 printf (",\n\t\t");
ab55f58c 424 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN, NULL);
65963943
RK
425 }
426 printf ("));\n}\n\n");
427 }
428}
429\f
430/* Generate the `gen_...' function for a DEFINE_EXPAND. */
431
432static void
433gen_expand (expand)
434 rtx expand;
435{
436 int operands;
b3694847 437 int i;
65963943
RK
438
439 if (strlen (XSTR (expand, 0)) == 0)
440 fatal ("define_expand lacks a name");
441 if (XVEC (expand, 1) == 0)
442 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
443
444 /* Find out how many operands this function has,
445 and also whether any of them have register constraints. */
446 register_constraints = 0;
447
448 operands = max_operand_vec (expand, 1);
449
450 /* Output the function name and argument declarations. */
451 printf ("rtx\ngen_%s (", XSTR (expand, 0));
452 for (i = 0; i < operands; i++)
913d0833
KG
453 if (i)
454 printf (", operand%d", i);
455 else
456 printf ("operand%d", i);
65963943
RK
457 printf (")\n");
458 for (i = 0; i < operands; i++)
459 printf (" rtx operand%d;\n", i);
460 printf ("{\n");
461
462 /* If we don't have any C code to write, only one insn is being written,
463 and no MATCH_DUPs are present, we can just return the desired insn
464 like we do for a DEFINE_INSN. This saves memory. */
465 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
466 && operands > max_dup_opno
467 && XVECLEN (expand, 1) == 1)
468 {
469 printf (" return ");
ab55f58c 470 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND, NULL);
65963943
RK
471 printf (";\n}\n\n");
472 return;
473 }
474
475 /* For each operand referred to only with MATCH_DUPs,
476 make a local variable. */
477 for (i = operands; i <= max_dup_opno; i++)
478 printf (" rtx operand%d;\n", i);
ede7cd44 479 for (; i <= max_scratch_opno; i++)
b3656137 480 printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
65963943
RK
481 printf (" rtx _val = 0;\n");
482 printf (" start_sequence ();\n");
483
484 /* The fourth operand of DEFINE_EXPAND is some code to be executed
485 before the actual construction.
486 This code expects to refer to `operands'
487 just as the output-code in a DEFINE_INSN does,
488 but here `operands' is an automatic array.
489 So copy the operand values there before executing it. */
490 if (XSTR (expand, 3) && *XSTR (expand, 3))
491 {
e2bef702
RH
492 printf (" {\n");
493 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
494 printf (" rtx operands[%d];\n",
495 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
65963943
RK
496 /* Output code to copy the arguments into `operands'. */
497 for (i = 0; i < operands; i++)
e2bef702 498 printf (" operands[%d] = operand%d;\n", i, i);
65963943
RK
499
500 /* Output the special code to be executed before the sequence
501 is generated. */
502 printf ("%s\n", XSTR (expand, 3));
503
504 /* Output code to copy the arguments back out of `operands'
505 (unless we aren't going to use them at all). */
506 if (XVEC (expand, 1) != 0)
507 {
508 for (i = 0; i < operands; i++)
e2bef702 509 printf (" operand%d = operands[%d];\n", i, i);
65963943 510 for (; i <= max_dup_opno; i++)
e2bef702 511 printf (" operand%d = operands[%d];\n", i, i);
ede7cd44 512 for (; i <= max_scratch_opno; i++)
e2bef702 513 printf (" operand%d = operands[%d];\n", i, i);
65963943 514 }
e2bef702 515 printf (" }\n");
65963943
RK
516 }
517
518 /* Output code to construct the rtl for the instruction bodies.
519 Use emit_insn to add them to the sequence being accumulated.
520 But don't do this if the user's code has set `no_more' nonzero. */
521
522 for (i = 0; i < XVECLEN (expand, 1); i++)
523 {
524 rtx next = XVECEXP (expand, 1, i);
525 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
526 || (GET_CODE (next) == PARALLEL
527 && GET_CODE (XVECEXP (next, 0, 0)) == SET
528 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
529 || GET_CODE (next) == RETURN)
530 printf (" emit_jump_insn (");
531 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
532 || GET_CODE (next) == CALL
533 || (GET_CODE (next) == PARALLEL
534 && GET_CODE (XVECEXP (next, 0, 0)) == SET
535 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
536 || (GET_CODE (next) == PARALLEL
537 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
538 printf (" emit_call_insn (");
539 else if (GET_CODE (next) == CODE_LABEL)
540 printf (" emit_label (");
541 else if (GET_CODE (next) == MATCH_OPERAND
d3ca5cdd 542 || GET_CODE (next) == MATCH_DUP
65963943 543 || GET_CODE (next) == MATCH_OPERATOR
65963943 544 || GET_CODE (next) == MATCH_OP_DUP
d3ca5cdd
JW
545 || GET_CODE (next) == MATCH_PARALLEL
546 || GET_CODE (next) == MATCH_PAR_DUP
65963943
RK
547 || GET_CODE (next) == PARALLEL)
548 printf (" emit (");
549 else
550 printf (" emit_insn (");
ab55f58c 551 gen_exp (next, DEFINE_EXPAND, NULL);
65963943
RK
552 printf (");\n");
553 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
554 && GET_CODE (SET_SRC (next)) == LABEL_REF)
555 printf (" emit_barrier ();");
556 }
557
558 /* Call `gen_sequence' to make a SEQUENCE out of all the
559 insns emitted within this gen_... function. */
560
65963943 561 printf (" _val = gen_sequence ();\n");
65963943
RK
562 printf (" end_sequence ();\n");
563 printf (" return _val;\n}\n\n");
564}
565
566/* Like gen_expand, but generates a SEQUENCE. */
0f41302f 567
65963943
RK
568static void
569gen_split (split)
570 rtx split;
571{
b3694847 572 int i;
65963943 573 int operands;
27c38fbe
KG
574 const char *const name =
575 ((GET_CODE (split) == DEFINE_PEEPHOLE2) ? "peephole2" : "split");
751aa7cc 576 const char *unused;
ab55f58c 577 char *used;
ede7cd44 578
65963943 579 if (XVEC (split, 0) == 0)
ede7cd44
RH
580 fatal ("define_%s (definition %d) lacks a pattern", name,
581 insn_index_number);
65963943 582 else if (XVEC (split, 2) == 0)
ede7cd44 583 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
3462dc45 584 insn_index_number);
65963943
RK
585
586 /* Find out how many operands this function has. */
587
588 max_operand_vec (split, 2);
ede7cd44 589 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
751aa7cc 590 unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
ab55f58c 591 used = xcalloc (1, operands);
65963943 592
ede7cd44
RH
593 /* Output the prototype, function name and argument declarations. */
594 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
595 {
a94ae8f5 596 printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
ede7cd44 597 name, insn_code_number);
751aa7cc 598 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n",
ede7cd44 599 name, insn_code_number);
751aa7cc
RK
600 printf (" rtx curr_insn ATTRIBUTE_UNUSED;\n");
601 printf (" rtx *operands%s;\n", unused);
ede7cd44
RH
602 }
603 else
604 {
a94ae8f5 605 printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number);
751aa7cc
RK
606 printf ("rtx\ngen_%s_%d (operands)\n", name, insn_code_number);
607 printf (" rtx *operands%s;\n", unused);
ede7cd44 608 }
65963943
RK
609 printf ("{\n");
610
611 /* Declare all local variables. */
612 for (i = 0; i < operands; i++)
613 printf (" rtx operand%d;\n", i);
91afd8f5 614 printf (" rtx _val = 0;\n");
ede7cd44
RH
615
616 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
617 output_peephole2_scratches (split);
618
65963943
RK
619 printf (" start_sequence ();\n");
620
621 /* The fourth operand of DEFINE_SPLIT is some code to be executed
622 before the actual construction. */
623
624 if (XSTR (split, 3))
625 printf ("%s\n", XSTR (split, 3));
626
627 /* Output code to copy the arguments back out of `operands' */
628 for (i = 0; i < operands; i++)
629 printf (" operand%d = operands[%d];\n", i, i);
630
631 /* Output code to construct the rtl for the instruction bodies.
632 Use emit_insn to add them to the sequence being accumulated.
633 But don't do this if the user's code has set `no_more' nonzero. */
634
635 for (i = 0; i < XVECLEN (split, 2); i++)
636 {
637 rtx next = XVECEXP (split, 2, i);
638 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
639 || (GET_CODE (next) == PARALLEL
640 && GET_CODE (XVECEXP (next, 0, 0)) == SET
641 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
642 || GET_CODE (next) == RETURN)
643 printf (" emit_jump_insn (");
644 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
645 || GET_CODE (next) == CALL
646 || (GET_CODE (next) == PARALLEL
647 && GET_CODE (XVECEXP (next, 0, 0)) == SET
648 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
649 || (GET_CODE (next) == PARALLEL
650 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
651 printf (" emit_call_insn (");
652 else if (GET_CODE (next) == CODE_LABEL)
653 printf (" emit_label (");
654 else if (GET_CODE (next) == MATCH_OPERAND
655 || GET_CODE (next) == MATCH_OPERATOR
656 || GET_CODE (next) == MATCH_PARALLEL
657 || GET_CODE (next) == MATCH_OP_DUP
658 || GET_CODE (next) == MATCH_DUP
659 || GET_CODE (next) == PARALLEL)
660 printf (" emit (");
661 else
662 printf (" emit_insn (");
ab55f58c 663 gen_exp (next, GET_CODE (split), used);
65963943
RK
664 printf (");\n");
665 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
666 && GET_CODE (SET_SRC (next)) == LABEL_REF)
667 printf (" emit_barrier ();");
668 }
669
670 /* Call `gen_sequence' to make a SEQUENCE out of all the
671 insns emitted within this gen_... function. */
672
65963943 673 printf (" _val = gen_sequence ();\n");
65963943
RK
674 printf (" end_sequence ();\n");
675 printf (" return _val;\n}\n\n");
ab55f58c
RH
676
677 free (used);
65963943
RK
678}
679\f
680/* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
681 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
682 the end of the vector. */
683
684static void
685output_add_clobbers ()
686{
687 struct clobber_pat *clobber;
e5f6a288 688 struct clobber_ent *ent;
65963943
RK
689 int i;
690
691 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
6894579f 692 printf (" rtx pattern ATTRIBUTE_UNUSED;\n int insn_code_number;\n");
65963943 693 printf ("{\n");
65963943
RK
694 printf (" switch (insn_code_number)\n");
695 printf (" {\n");
696
697 for (clobber = clobber_list; clobber; clobber = clobber->next)
698 {
e5f6a288
RK
699 for (ent = clobber->insns; ent; ent = ent->next)
700 printf (" case %d:\n", ent->code_number);
65963943
RK
701
702 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
703 {
704 printf (" XVECEXP (pattern, 0, %d) = ", i);
ede7cd44 705 gen_exp (XVECEXP (clobber->pattern, 1, i),
ab55f58c 706 GET_CODE (clobber->pattern), NULL);
65963943
RK
707 printf (";\n");
708 }
709
e5f6a288 710 printf (" break;\n\n");
65963943
RK
711 }
712
713 printf (" default:\n");
714 printf (" abort ();\n");
715 printf (" }\n");
716 printf ("}\n");
717}
718\f
751aa7cc
RK
719/* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
720 number that needs clobbers and returns 1 if they include a clobber of a
721 hard reg and 0 if they just clobber SCRATCH. */
722
723static void
724output_added_clobbers_hard_reg_p ()
725{
726 struct clobber_pat *clobber;
727 struct clobber_ent *ent;
a29b099d 728 int clobber_p, used;
751aa7cc
RK
729
730 printf ("\n\nint\nadded_clobbers_hard_reg_p (insn_code_number)\n");
731 printf (" int insn_code_number;\n");
732 printf ("{\n");
733 printf (" switch (insn_code_number)\n");
734 printf (" {\n");
735
736 for (clobber_p = 0; clobber_p <= 1; clobber_p++)
737 {
a29b099d 738 used = 0;
751aa7cc
RK
739 for (clobber = clobber_list; clobber; clobber = clobber->next)
740 if (clobber->has_hard_reg == clobber_p)
741 for (ent = clobber->insns; ent; ent = ent->next)
a29b099d
JJ
742 {
743 printf (" case %d:\n", ent->code_number);
744 used++;
745 }
751aa7cc 746
a29b099d
JJ
747 if (used)
748 printf (" return %d;\n\n", clobber_p);
751aa7cc
RK
749 }
750
751 printf (" default:\n");
752 printf (" abort ();\n");
753 printf (" }\n");
754 printf ("}\n");
755}
756\f
ede7cd44 757/* Generate code to invoke find_free_register () as needed for the
dc297297 758 scratch registers used by the peephole2 pattern in SPLIT. */
ede7cd44
RH
759
760static void
761output_peephole2_scratches (split)
762 rtx split;
763{
764 int i;
765 int insn_nr = 0;
766
ede7cd44 767 printf (" HARD_REG_SET _regs_allocated;\n");
ede7cd44
RH
768 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
769
770 for (i = 0; i < XVECLEN (split, 0); i++)
771 {
772 rtx elt = XVECEXP (split, 0, i);
773 if (GET_CODE (elt) == MATCH_SCRATCH)
774 {
775 int last_insn_nr = insn_nr;
776 int cur_insn_nr = insn_nr;
777 int j;
778 for (j = i + 1; j < XVECLEN (split, 0); j++)
779 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
780 {
781 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
782 last_insn_nr = cur_insn_nr;
783 }
784 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
785 cur_insn_nr++;
23280139
RH
786
787 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
ede7cd44
RH
788 return NULL;\n",
789 XINT (elt, 0),
23280139 790 insn_nr, last_insn_nr,
ede7cd44
RH
791 XSTR (elt, 1),
792 GET_MODE_NAME (GET_MODE (elt)));
793
794 }
795 else if (GET_CODE (elt) != MATCH_DUP)
796 insn_nr++;
797 }
798}
65963943 799
a94ae8f5 800extern int main PARAMS ((int, char **));
c1b59dce 801
65963943
RK
802int
803main (argc, argv)
804 int argc;
805 char **argv;
806{
807 rtx desc;
65963943 808
f8b6598e 809 progname = "genemit";
65963943
RK
810
811 if (argc <= 1)
1f978f5f 812 fatal ("no input file name");
65963943 813
04d8aa70 814 if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
c88c0d42 815 return (FATAL_EXIT_CODE);
65963943 816
65963943
RK
817 /* Assign sequential codes to all entries in the machine description
818 in parallel with the tables in insn-output.c. */
819
820 insn_code_number = 0;
821 insn_index_number = 0;
822
823 printf ("/* Generated automatically by the program `genemit'\n\
824from the machine description file `md'. */\n\n");
825
826 printf ("#include \"config.h\"\n");
729da3f5 827 printf ("#include \"system.h\"\n");
65963943 828 printf ("#include \"rtl.h\"\n");
6baf1cc8 829 printf ("#include \"tm_p.h\"\n");
49ad7cfa 830 printf ("#include \"function.h\"\n");
65963943 831 printf ("#include \"expr.h\"\n");
e78d8e51 832 printf ("#include \"optabs.h\"\n");
65963943 833 printf ("#include \"real.h\"\n");
1d300e19 834 printf ("#include \"flags.h\"\n");
65963943 835 printf ("#include \"output.h\"\n");
7f7f8214 836 printf ("#include \"insn-config.h\"\n");
ede7cd44 837 printf ("#include \"hard-reg-set.h\"\n");
23280139 838 printf ("#include \"recog.h\"\n");
ede7cd44 839 printf ("#include \"resource.h\"\n");
d80eb1e1 840 printf ("#include \"reload.h\"\n");
04f378ce 841 printf ("#include \"toplev.h\"\n");
d80eb1e1 842 printf ("#include \"ggc.h\"\n\n");
53bfe9cd 843 printf ("#define FAIL return (end_sequence (), _val)\n");
821e35ba 844 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n\n");
65963943
RK
845
846 /* Read the machine description. */
847
848 while (1)
849 {
c88c0d42 850 int line_no;
65963943 851
c88c0d42
CP
852 desc = read_md_rtx (&line_no, &insn_code_number);
853 if (desc == NULL)
854 break;
ede7cd44 855
c88c0d42 856 switch (GET_CODE (desc))
65963943 857 {
821e35ba
RH
858 case DEFINE_INSN:
859 gen_insn (desc, line_no);
860 break;
861
862 case DEFINE_EXPAND:
863 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
864 gen_expand (desc);
865 break;
866
867 case DEFINE_SPLIT:
868 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
869 gen_split (desc);
870 break;
871
872 case DEFINE_PEEPHOLE2:
873 printf ("/* %s:%d */\n", read_rtx_filename, line_no);
874 gen_split (desc);
875 break;
876
877 default:
878 break;
879 }
65963943
RK
880 ++insn_index_number;
881 }
882
751aa7cc
RK
883 /* Write out the routines to add CLOBBERs to a pattern and say whether they
884 clobber a hard reg. */
65963943 885 output_add_clobbers ();
751aa7cc 886 output_added_clobbers_hard_reg_p ();
65963943 887
65963943 888 fflush (stdout);
c1b59dce 889 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
65963943 890}
a995e389
RH
891
892/* Define this so we can link with print-rtl.o to get debug_rtx function. */
893const char *
894get_insn_name (code)
c1b59dce 895 int code ATTRIBUTE_UNUSED;
a995e389
RH
896{
897 return NULL;
898}