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1/* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987-1991 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20
21#include <stdio.h>
22#include "config.h"
23#include "rtl.h"
24#include "obstack.h"
25
26static struct obstack obstack;
27struct obstack *rtl_obstack = &obstack;
28
29#define obstack_chunk_alloc xmalloc
30#define obstack_chunk_free free
31
32extern void free ();
33
34char *xmalloc ();
35static void fatal ();
36void fancy_abort ();
37
38static int max_opno;
39static int max_dup_opno;
40static int register_constraints;
41static int insn_code_number;
42static int insn_index_number;
43
44/* Data structure for recording the patterns of insns that have CLOBBERs.
45 We use this to output a function that adds these CLOBBERs to a
46 previously-allocated PARALLEL expression. */
47
48struct clobber_pat
49{
50 int code_number; /* Counts only insns. */
51 rtx pattern;
52 int first_clobber;
53 struct clobber_pat *next;
54} *clobber_list;
55
56static void
57max_operand_1 (x)
58 rtx x;
59{
60 register RTX_CODE code;
61 register int i;
62 register int len;
63 register char *fmt;
64
65 if (x == 0)
66 return;
67
68 code = GET_CODE (x);
69
70 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
71 register_constraints = 1;
72 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
73 register_constraints = 1;
74 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
75 || code == MATCH_PARALLEL)
76 max_opno = MAX (max_opno, XINT (x, 0));
77 if (code == MATCH_DUP || code == MATCH_OP_DUP)
78 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
79
80 fmt = GET_RTX_FORMAT (code);
81 len = GET_RTX_LENGTH (code);
82 for (i = 0; i < len; i++)
83 {
84 if (fmt[i] == 'e' || fmt[i] == 'u')
85 max_operand_1 (XEXP (x, i));
86 else if (fmt[i] == 'E')
87 {
88 int j;
89 for (j = 0; j < XVECLEN (x, i); j++)
90 max_operand_1 (XVECEXP (x, i, j));
91 }
92 }
93}
94
95static int
96max_operand_vec (insn, arg)
97 rtx insn;
98 int arg;
99{
100 register int len = XVECLEN (insn, arg);
101 register int i;
102
103 max_opno = -1;
104 max_dup_opno = -1;
105
106 for (i = 0; i < len; i++)
107 max_operand_1 (XVECEXP (insn, arg, i));
108
109 return max_opno + 1;
110}
111\f
112static void
113print_code (code)
114 RTX_CODE code;
115{
116 register char *p1;
117 for (p1 = GET_RTX_NAME (code); *p1; p1++)
118 {
119 if (*p1 >= 'a' && *p1 <= 'z')
120 putchar (*p1 + 'A' - 'a');
121 else
122 putchar (*p1);
123 }
124}
125
126/* Print a C expression to construct an RTX just like X,
127 substituting any operand references appearing within. */
128
129static void
130gen_exp (x)
131 rtx x;
132{
133 register RTX_CODE code;
134 register int i;
135 register int len;
136 register char *fmt;
137
138 if (x == 0)
139 {
140 printf ("0");
141 return;
142 }
143
144 code = GET_CODE (x);
145
146 switch (code)
147 {
148 case MATCH_OPERAND:
149 case MATCH_DUP:
150 printf ("operand%d", XINT (x, 0));
151 return;
152
153 case MATCH_OP_DUP:
154 printf ("gen_rtx (GET_CODE (operand%d), GET_MODE (operand%d)",
155 XINT (x, 0), XINT (x, 0));
156 for (i = 0; i < XVECLEN (x, 1); i++)
157 {
158 printf (",\n\t\t");
159 gen_exp (XVECEXP (x, 1, i));
160 }
161 printf (")");
162 return;
163
164 case MATCH_OPERATOR:
165 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
166 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
167 for (i = 0; i < XVECLEN (x, 2); i++)
168 {
169 printf (",\n\t\t");
170 gen_exp (XVECEXP (x, 2, i));
171 }
172 printf (")");
173 return;
174
175 case MATCH_PARALLEL:
176 printf ("operand%d", XINT (x, 0));
177 return;
178
179 case MATCH_SCRATCH:
180 printf ("gen_rtx (SCRATCH, %smode, 0)", GET_MODE_NAME (GET_MODE (x)));
181 return;
182
183 case ADDRESS:
184 fatal ("ADDRESS expression code used in named instruction pattern");
185
186 case PC:
187 printf ("pc_rtx");
188 return;
189
190 case CC0:
191 printf ("cc0_rtx");
192 return;
193
194 case CONST_INT:
195 if (INTVAL (x) == 0)
196 {
197 printf ("const0_rtx");
198 return;
199 }
200 if (INTVAL (x) == 1)
201 {
202 printf ("const1_rtx");
203 return;
204 }
205 if (INTVAL (x) == -1)
206 {
207 printf ("constm1_rtx");
208 return;
209 }
210 if (INTVAL (x) == STORE_FLAG_VALUE)
211 {
212 printf ("const_true_rtx");
213 return;
214 }
215 }
216
217 printf ("gen_rtx (");
218 print_code (code);
219 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
220
221 fmt = GET_RTX_FORMAT (code);
222 len = GET_RTX_LENGTH (code);
223 for (i = 0; i < len; i++)
224 {
225 if (fmt[i] == '0')
226 break;
227 printf (", ");
228 if (fmt[i] == 'e' || fmt[i] == 'u')
229 gen_exp (XEXP (x, i));
230 else if (fmt[i] == 'i')
231 printf ("%u", (unsigned) XINT (x, i));
232 else if (fmt[i] == 's')
233 printf ("\"%s\"", XSTR (x, i));
234 else if (fmt[i] == 'E')
235 {
236 int j;
237 printf ("gen_rtvec (%d", XVECLEN (x, i));
238 for (j = 0; j < XVECLEN (x, i); j++)
239 {
240 printf (",\n\t\t");
241 gen_exp (XVECEXP (x, i, j));
242 }
243 printf (")");
244 }
245 else
246 abort ();
247 }
248 printf (")");
249}
250\f
251/* Generate the `gen_...' function for a DEFINE_INSN. */
252
253static void
254gen_insn (insn)
255 rtx insn;
256{
257 int operands;
258 register int i;
259
260 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
261 registers or MATCH_SCRATCHes. If so, store away the information for
262 later. */
263
264 if (XVEC (insn, 1))
265 {
266 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
267 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER
268 || (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != REG
269 && GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH))
270 break;
271
272 if (i != XVECLEN (insn, 1) - 1)
273 {
274 register struct clobber_pat *new
275 = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
276
277 new->code_number = insn_code_number;
278 new->pattern = insn;
279 new->first_clobber = i + 1;
280 new->next = clobber_list;
281 clobber_list = new;
282 }
283 }
284
285 /* Don't mention instructions whose names are the null string.
286 They are in the machine description just to be recognized. */
287 if (strlen (XSTR (insn, 0)) == 0)
288 return;
289
290 /* Find out how many operands this function has,
291 and also whether any of them have register constraints. */
292 register_constraints = 0;
293 operands = max_operand_vec (insn, 1);
294 if (max_dup_opno >= operands)
295 fatal ("match_dup operand number has no match_operand");
296
297 /* Output the function name and argument declarations. */
298 printf ("rtx\ngen_%s (", XSTR (insn, 0));
299 for (i = 0; i < operands; i++)
300 printf (i ? ", operand%d" : "operand%d", i);
301 printf (")\n");
302 for (i = 0; i < operands; i++)
303 printf (" rtx operand%d;\n", i);
304 printf ("{\n");
305
306 /* Output code to construct and return the rtl for the instruction body */
307
308 if (XVECLEN (insn, 1) == 1)
309 {
310 printf (" return ");
311 gen_exp (XVECEXP (insn, 1, 0));
312 printf (";\n}\n\n");
313 }
314 else
315 {
316 printf (" return gen_rtx (PARALLEL, VOIDmode, gen_rtvec (%d", XVECLEN (insn, 1));
317 for (i = 0; i < XVECLEN (insn, 1); i++)
318 {
319 printf (",\n\t\t");
320 gen_exp (XVECEXP (insn, 1, i));
321 }
322 printf ("));\n}\n\n");
323 }
324}
325\f
326/* Generate the `gen_...' function for a DEFINE_EXPAND. */
327
328static void
329gen_expand (expand)
330 rtx expand;
331{
332 int operands;
333 register int i;
334
335 if (strlen (XSTR (expand, 0)) == 0)
336 fatal ("define_expand lacks a name");
337 if (XVEC (expand, 1) == 0)
338 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
339
340 /* Find out how many operands this function has,
341 and also whether any of them have register constraints. */
342 register_constraints = 0;
343
344 operands = max_operand_vec (expand, 1);
345
346 /* Output the function name and argument declarations. */
347 printf ("rtx\ngen_%s (", XSTR (expand, 0));
348 for (i = 0; i < operands; i++)
349 printf (i ? ", operand%d" : "operand%d", i);
350 printf (")\n");
351 for (i = 0; i < operands; i++)
352 printf (" rtx operand%d;\n", i);
353 printf ("{\n");
354
355 /* If we don't have any C code to write, only one insn is being written,
356 and no MATCH_DUPs are present, we can just return the desired insn
357 like we do for a DEFINE_INSN. This saves memory. */
358 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
359 && operands > max_dup_opno
360 && XVECLEN (expand, 1) == 1)
361 {
362 printf (" return ");
363 gen_exp (XVECEXP (expand, 1, 0));
364 printf (";\n}\n\n");
365 return;
366 }
367
368 /* For each operand referred to only with MATCH_DUPs,
369 make a local variable. */
370 for (i = operands; i <= max_dup_opno; i++)
371 printf (" rtx operand%d;\n", i);
372 if (operands > 0 || max_dup_opno >= 0)
373 printf (" rtx operands[%d];\n", MAX (operands, max_dup_opno + 1));
374 printf (" rtx _val = 0;\n");
375 printf (" start_sequence ();\n");
376
377 /* The fourth operand of DEFINE_EXPAND is some code to be executed
378 before the actual construction.
379 This code expects to refer to `operands'
380 just as the output-code in a DEFINE_INSN does,
381 but here `operands' is an automatic array.
382 So copy the operand values there before executing it. */
383 if (XSTR (expand, 3) && *XSTR (expand, 3))
384 {
385 /* Output code to copy the arguments into `operands'. */
386 for (i = 0; i < operands; i++)
387 printf (" operands[%d] = operand%d;\n", i, i);
388
389 /* Output the special code to be executed before the sequence
390 is generated. */
391 printf ("%s\n", XSTR (expand, 3));
392
393 /* Output code to copy the arguments back out of `operands'
394 (unless we aren't going to use them at all). */
395 if (XVEC (expand, 1) != 0)
396 {
397 for (i = 0; i < operands; i++)
398 printf (" operand%d = operands[%d];\n", i, i);
399 for (; i <= max_dup_opno; i++)
400 printf (" operand%d = operands[%d];\n", i, i);
401 }
402 }
403
404 /* Output code to construct the rtl for the instruction bodies.
405 Use emit_insn to add them to the sequence being accumulated.
406 But don't do this if the user's code has set `no_more' nonzero. */
407
408 for (i = 0; i < XVECLEN (expand, 1); i++)
409 {
410 rtx next = XVECEXP (expand, 1, i);
411 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
412 || (GET_CODE (next) == PARALLEL
413 && GET_CODE (XVECEXP (next, 0, 0)) == SET
414 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
415 || GET_CODE (next) == RETURN)
416 printf (" emit_jump_insn (");
417 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
418 || GET_CODE (next) == CALL
419 || (GET_CODE (next) == PARALLEL
420 && GET_CODE (XVECEXP (next, 0, 0)) == SET
421 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
422 || (GET_CODE (next) == PARALLEL
423 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
424 printf (" emit_call_insn (");
425 else if (GET_CODE (next) == CODE_LABEL)
426 printf (" emit_label (");
427 else if (GET_CODE (next) == MATCH_OPERAND
428 || GET_CODE (next) == MATCH_OPERATOR
429 || GET_CODE (next) == MATCH_PARALLEL
430 || GET_CODE (next) == MATCH_OP_DUP
431 || GET_CODE (next) == MATCH_DUP
432 || GET_CODE (next) == PARALLEL)
433 printf (" emit (");
434 else
435 printf (" emit_insn (");
436 gen_exp (next);
437 printf (");\n");
438 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
439 && GET_CODE (SET_SRC (next)) == LABEL_REF)
440 printf (" emit_barrier ();");
441 }
442
443 /* Call `gen_sequence' to make a SEQUENCE out of all the
444 insns emitted within this gen_... function. */
445
446 printf (" _done:\n");
447 printf (" _val = gen_sequence ();\n");
448 printf (" _fail:\n");
449 printf (" end_sequence ();\n");
450 printf (" return _val;\n}\n\n");
451}
452
453/* Like gen_expand, but generates a SEQUENCE. */
454static void
455gen_split (split)
456 rtx split;
457{
458 register int i;
459 int operands;
460
461 if (XVEC (split, 0) == 0)
462 fatal ("define_split %d lacks a pattern", insn_index_number);
463 else if (XVEC (split, 2) == 0)
464 fatal ("define_split %d lacks a replacement pattern", insn_index_number);
465
466 /* Find out how many operands this function has. */
467
468 max_operand_vec (split, 2);
469 operands = MAX (max_opno, max_dup_opno) + 1;
470
471 /* Output the function name and argument declarations. */
472 printf ("rtx\ngen_split_%d (operands)\n rtx *operands;\n",
473 insn_code_number);
474 printf ("{\n");
475
476 /* Declare all local variables. */
477 for (i = 0; i < operands; i++)
478 printf (" rtx operand%d;\n", i);
479 printf (" rtx _val;\n");
480 printf (" start_sequence ();\n");
481
482 /* The fourth operand of DEFINE_SPLIT is some code to be executed
483 before the actual construction. */
484
485 if (XSTR (split, 3))
486 printf ("%s\n", XSTR (split, 3));
487
488 /* Output code to copy the arguments back out of `operands' */
489 for (i = 0; i < operands; i++)
490 printf (" operand%d = operands[%d];\n", i, i);
491
492 /* Output code to construct the rtl for the instruction bodies.
493 Use emit_insn to add them to the sequence being accumulated.
494 But don't do this if the user's code has set `no_more' nonzero. */
495
496 for (i = 0; i < XVECLEN (split, 2); i++)
497 {
498 rtx next = XVECEXP (split, 2, i);
499 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
500 || (GET_CODE (next) == PARALLEL
501 && GET_CODE (XVECEXP (next, 0, 0)) == SET
502 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
503 || GET_CODE (next) == RETURN)
504 printf (" emit_jump_insn (");
505 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
506 || GET_CODE (next) == CALL
507 || (GET_CODE (next) == PARALLEL
508 && GET_CODE (XVECEXP (next, 0, 0)) == SET
509 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
510 || (GET_CODE (next) == PARALLEL
511 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
512 printf (" emit_call_insn (");
513 else if (GET_CODE (next) == CODE_LABEL)
514 printf (" emit_label (");
515 else if (GET_CODE (next) == MATCH_OPERAND
516 || GET_CODE (next) == MATCH_OPERATOR
517 || GET_CODE (next) == MATCH_PARALLEL
518 || GET_CODE (next) == MATCH_OP_DUP
519 || GET_CODE (next) == MATCH_DUP
520 || GET_CODE (next) == PARALLEL)
521 printf (" emit (");
522 else
523 printf (" emit_insn (");
524 gen_exp (next);
525 printf (");\n");
526 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
527 && GET_CODE (SET_SRC (next)) == LABEL_REF)
528 printf (" emit_barrier ();");
529 }
530
531 /* Call `gen_sequence' to make a SEQUENCE out of all the
532 insns emitted within this gen_... function. */
533
534 printf (" _done:\n");
535 printf (" _val = gen_sequence ();\n");
536 printf (" _fail:\n");
537 printf (" end_sequence ();\n");
538 printf (" return _val;\n}\n\n");
539}
540\f
541/* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
542 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
543 the end of the vector. */
544
545static void
546output_add_clobbers ()
547{
548 struct clobber_pat *clobber;
549 int i;
550
551 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
552 printf (" rtx pattern;\n int insn_code_number;\n");
553 printf ("{\n");
554 printf (" int i;\n\n");
555 printf (" switch (insn_code_number)\n");
556 printf (" {\n");
557
558 for (clobber = clobber_list; clobber; clobber = clobber->next)
559 {
560 printf (" case %d:\n", clobber->code_number);
561
562 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
563 {
564 printf (" XVECEXP (pattern, 0, %d) = ", i);
565 gen_exp (XVECEXP (clobber->pattern, 1, i));
566 printf (";\n");
567 }
568
569 printf (" break;\n");
570 }
571
572 printf (" default:\n");
573 printf (" abort ();\n");
574 printf (" }\n");
575 printf ("}\n");
576}
577\f
578/* Write a function, init_mov_optab, that is called to set up entries
579 in mov_optab for EXTRA_CC_MODES. */
580
581static void
582output_init_mov_optab ()
583{
584#ifdef EXTRA_CC_NAMES
585 static char *cc_names[] = { EXTRA_CC_NAMES };
586 char *p;
587 int i;
588
589 printf ("\nvoid\ninit_mov_optab ()\n{\n");
590
591 for (i = 0; i < sizeof cc_names / sizeof cc_names[0]; i++)
592 {
593 printf ("#ifdef HAVE_mov");
594 for (p = cc_names[i]; *p; p++)
595 printf ("%c", *p >= 'A' && *p <= 'Z' ? *p - 'A' + 'a' : *p);
596 printf ("\n");
597 printf (" if (HAVE_mov");
598 for (p = cc_names[i]; *p; p++)
599 printf ("%c", *p >= 'A' && *p <= 'Z' ? *p - 'A' + 'a' : *p);
600 printf (")\n");
601 printf (" mov_optab->handlers[(int) %smode].insn_code = CODE_FOR_mov",
602 cc_names[i]);
603 for (p = cc_names[i]; *p; p++)
604 printf ("%c", *p >= 'A' && *p <= 'Z' ? *p - 'A' + 'a' : *p);
605 printf (";\n#endif\n");
606 }
607
608 printf ("}\n");
609#endif
610}
611\f
612char *
613xmalloc (size)
614 unsigned size;
615{
616 register char *val = (char *) malloc (size);
617
618 if (val == 0)
619 fatal ("virtual memory exhausted");
620
621 return val;
622}
623
624char *
625xrealloc (ptr, size)
626 char *ptr;
627 unsigned size;
628{
629 char *result = (char *) realloc (ptr, size);
630 if (!result)
631 fatal ("virtual memory exhausted");
632 return result;
633}
634
635static void
636fatal (s, a1, a2)
637 char *s;
638{
639 fprintf (stderr, "genemit: ");
640 fprintf (stderr, s, a1, a2);
641 fprintf (stderr, "\n");
642 exit (FATAL_EXIT_CODE);
643}
644
645/* More 'friendly' abort that prints the line and file.
646 config.h can #define abort fancy_abort if you like that sort of thing. */
647
648void
649fancy_abort ()
650{
651 fatal ("Internal gcc abort.");
652}
653\f
654int
655main (argc, argv)
656 int argc;
657 char **argv;
658{
659 rtx desc;
660 FILE *infile;
661 extern rtx read_rtx ();
662 register int c;
663
664 obstack_init (rtl_obstack);
665
666 if (argc <= 1)
667 fatal ("No input file name.");
668
669 infile = fopen (argv[1], "r");
670 if (infile == 0)
671 {
672 perror (argv[1]);
673 exit (FATAL_EXIT_CODE);
674 }
675
676 init_rtl ();
677
678 /* Assign sequential codes to all entries in the machine description
679 in parallel with the tables in insn-output.c. */
680
681 insn_code_number = 0;
682 insn_index_number = 0;
683
684 printf ("/* Generated automatically by the program `genemit'\n\
685from the machine description file `md'. */\n\n");
686
687 printf ("#include \"config.h\"\n");
688 printf ("#include \"rtl.h\"\n");
689 printf ("#include \"expr.h\"\n");
690 printf ("#include \"real.h\"\n");
691 printf ("#include \"output.h\"\n");
692 printf ("#include \"insn-config.h\"\n\n");
693 printf ("#include \"insn-flags.h\"\n\n");
694 printf ("#include \"insn-codes.h\"\n\n");
695 printf ("extern char *insn_operand_constraint[][MAX_RECOG_OPERANDS];\n\n");
696 printf ("extern rtx recog_operand[];\n");
697 printf ("#define operands emit_operand\n\n");
698 printf ("#define FAIL goto _fail\n\n");
699 printf ("#define DONE goto _done\n\n");
700
701 /* Read the machine description. */
702
703 while (1)
704 {
705 c = read_skip_spaces (infile);
706 if (c == EOF)
707 break;
708 ungetc (c, infile);
709
710 desc = read_rtx (infile);
711 if (GET_CODE (desc) == DEFINE_INSN)
712 {
713 gen_insn (desc);
714 ++insn_code_number;
715 }
716 if (GET_CODE (desc) == DEFINE_EXPAND)
717 {
718 gen_expand (desc);
719 ++insn_code_number;
720 }
721 if (GET_CODE (desc) == DEFINE_SPLIT)
722 {
723 gen_split (desc);
724 ++insn_code_number;
725 }
726 if (GET_CODE (desc) == DEFINE_PEEPHOLE)
727 {
728 ++insn_code_number;
729 }
730 ++insn_index_number;
731 }
732
733 /* Write out the routine to add CLOBBERs to a pattern. */
734 output_add_clobbers ();
735
736 /* Write the routine to initialize mov_optab for the EXTRA_CC_MODES. */
737 output_init_mov_optab ();
738
739 fflush (stdout);
740 exit (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
741 /* NOTREACHED */
742 return 0;
743}