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4aba7bd3 | 1 | /* GIMPLE store merging and byte swapping passes. |
fbd26352 | 2 | Copyright (C) 2009-2019 Free Software Foundation, Inc. |
3d3e04ac | 3 | Contributed by ARM Ltd. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it | |
8 | under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but | |
13 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
10f0d48d | 21 | /* The purpose of the store merging pass is to combine multiple memory stores |
22 | of constant values, values loaded from memory, bitwise operations on those, | |
23 | or bit-field values, to consecutive locations, into fewer wider stores. | |
24 | ||
3d3e04ac | 25 | For example, if we have a sequence peforming four byte stores to |
26 | consecutive memory locations: | |
27 | [p ] := imm1; | |
28 | [p + 1B] := imm2; | |
29 | [p + 2B] := imm3; | |
30 | [p + 3B] := imm4; | |
31 | we can transform this into a single 4-byte store if the target supports it: | |
10f0d48d | 32 | [p] := imm1:imm2:imm3:imm4 concatenated according to endianness. |
3d3e04ac | 33 | |
9991d1d3 | 34 | Or: |
35 | [p ] := [q ]; | |
36 | [p + 1B] := [q + 1B]; | |
37 | [p + 2B] := [q + 2B]; | |
38 | [p + 3B] := [q + 3B]; | |
39 | if there is no overlap can be transformed into a single 4-byte | |
40 | load followed by single 4-byte store. | |
41 | ||
42 | Or: | |
43 | [p ] := [q ] ^ imm1; | |
44 | [p + 1B] := [q + 1B] ^ imm2; | |
45 | [p + 2B] := [q + 2B] ^ imm3; | |
46 | [p + 3B] := [q + 3B] ^ imm4; | |
47 | if there is no overlap can be transformed into a single 4-byte | |
48 | load, xored with imm1:imm2:imm3:imm4 and stored using a single 4-byte store. | |
49 | ||
10f0d48d | 50 | Or: |
51 | [p:1 ] := imm; | |
52 | [p:31] := val & 0x7FFFFFFF; | |
53 | we can transform this into a single 4-byte store if the target supports it: | |
54 | [p] := imm:(val & 0x7FFFFFFF) concatenated according to endianness. | |
55 | ||
3d3e04ac | 56 | The algorithm is applied to each basic block in three phases: |
57 | ||
10f0d48d | 58 | 1) Scan through the basic block and record assignments to destinations |
59 | that can be expressed as a store to memory of a certain size at a certain | |
60 | bit offset from base expressions we can handle. For bit-fields we also | |
61 | record the surrounding bit region, i.e. bits that could be stored in | |
9991d1d3 | 62 | a read-modify-write operation when storing the bit-field. Record store |
63 | chains to different bases in a hash_map (m_stores) and make sure to | |
64 | terminate such chains when appropriate (for example when when the stored | |
65 | values get used subsequently). | |
3d3e04ac | 66 | These stores can be a result of structure element initializers, array stores |
67 | etc. A store_immediate_info object is recorded for every such store. | |
68 | Record as many such assignments to a single base as possible until a | |
69 | statement that interferes with the store sequence is encountered. | |
10f0d48d | 70 | Each store has up to 2 operands, which can be a either constant, a memory |
71 | load or an SSA name, from which the value to be stored can be computed. | |
9991d1d3 | 72 | At most one of the operands can be a constant. The operands are recorded |
73 | in store_operand_info struct. | |
3d3e04ac | 74 | |
10f0d48d | 75 | 2) Analyze the chains of stores recorded in phase 1) (i.e. the vector of |
3d3e04ac | 76 | store_immediate_info objects) and coalesce contiguous stores into |
10f0d48d | 77 | merged_store_group objects. For bit-field stores, we don't need to |
9991d1d3 | 78 | require the stores to be contiguous, just their surrounding bit regions |
79 | have to be contiguous. If the expression being stored is different | |
80 | between adjacent stores, such as one store storing a constant and | |
81 | following storing a value loaded from memory, or if the loaded memory | |
82 | objects are not adjacent, a new merged_store_group is created as well. | |
3d3e04ac | 83 | |
84 | For example, given the stores: | |
85 | [p ] := 0; | |
86 | [p + 1B] := 1; | |
87 | [p + 3B] := 0; | |
88 | [p + 4B] := 1; | |
89 | [p + 5B] := 0; | |
90 | [p + 6B] := 0; | |
91 | This phase would produce two merged_store_group objects, one recording the | |
92 | two bytes stored in the memory region [p : p + 1] and another | |
93 | recording the four bytes stored in the memory region [p + 3 : p + 6]. | |
94 | ||
95 | 3) The merged_store_group objects produced in phase 2) are processed | |
96 | to generate the sequence of wider stores that set the contiguous memory | |
97 | regions to the sequence of bytes that correspond to it. This may emit | |
98 | multiple stores per store group to handle contiguous stores that are not | |
99 | of a size that is a power of 2. For example it can try to emit a 40-bit | |
100 | store as a 32-bit store followed by an 8-bit store. | |
10f0d48d | 101 | We try to emit as wide stores as we can while respecting STRICT_ALIGNMENT |
102 | or TARGET_SLOW_UNALIGNED_ACCESS settings. | |
3d3e04ac | 103 | |
104 | Note on endianness and example: | |
105 | Consider 2 contiguous 16-bit stores followed by 2 contiguous 8-bit stores: | |
106 | [p ] := 0x1234; | |
107 | [p + 2B] := 0x5678; | |
108 | [p + 4B] := 0xab; | |
109 | [p + 5B] := 0xcd; | |
110 | ||
111 | The memory layout for little-endian (LE) and big-endian (BE) must be: | |
112 | p |LE|BE| | |
113 | --------- | |
114 | 0 |34|12| | |
115 | 1 |12|34| | |
116 | 2 |78|56| | |
117 | 3 |56|78| | |
118 | 4 |ab|ab| | |
119 | 5 |cd|cd| | |
120 | ||
121 | To merge these into a single 48-bit merged value 'val' in phase 2) | |
122 | on little-endian we insert stores to higher (consecutive) bitpositions | |
123 | into the most significant bits of the merged value. | |
124 | The final merged value would be: 0xcdab56781234 | |
125 | ||
126 | For big-endian we insert stores to higher bitpositions into the least | |
127 | significant bits of the merged value. | |
128 | The final merged value would be: 0x12345678abcd | |
129 | ||
130 | Then, in phase 3), we want to emit this 48-bit value as a 32-bit store | |
131 | followed by a 16-bit store. Again, we must consider endianness when | |
132 | breaking down the 48-bit value 'val' computed above. | |
133 | For little endian we emit: | |
134 | [p] (32-bit) := 0x56781234; // val & 0x0000ffffffff; | |
135 | [p + 4B] (16-bit) := 0xcdab; // (val & 0xffff00000000) >> 32; | |
136 | ||
137 | Whereas for big-endian we emit: | |
138 | [p] (32-bit) := 0x12345678; // (val & 0xffffffff0000) >> 16; | |
139 | [p + 4B] (16-bit) := 0xabcd; // val & 0x00000000ffff; */ | |
140 | ||
141 | #include "config.h" | |
142 | #include "system.h" | |
143 | #include "coretypes.h" | |
144 | #include "backend.h" | |
145 | #include "tree.h" | |
146 | #include "gimple.h" | |
147 | #include "builtins.h" | |
148 | #include "fold-const.h" | |
149 | #include "tree-pass.h" | |
150 | #include "ssa.h" | |
151 | #include "gimple-pretty-print.h" | |
152 | #include "alias.h" | |
153 | #include "fold-const.h" | |
154 | #include "params.h" | |
155 | #include "print-tree.h" | |
156 | #include "tree-hash-traits.h" | |
157 | #include "gimple-iterator.h" | |
158 | #include "gimplify.h" | |
10f0d48d | 159 | #include "gimple-fold.h" |
3d3e04ac | 160 | #include "stor-layout.h" |
161 | #include "timevar.h" | |
162 | #include "tree-cfg.h" | |
163 | #include "tree-eh.h" | |
164 | #include "target.h" | |
427223f1 | 165 | #include "gimplify-me.h" |
902cb3b7 | 166 | #include "rtl.h" |
167 | #include "expr.h" /* For get_bit_range. */ | |
4aba7bd3 | 168 | #include "optabs-tree.h" |
3d9a2fb3 | 169 | #include "selftest.h" |
3d3e04ac | 170 | |
171 | /* The maximum size (in bits) of the stores this pass should generate. */ | |
172 | #define MAX_STORE_BITSIZE (BITS_PER_WORD) | |
173 | #define MAX_STORE_BYTES (MAX_STORE_BITSIZE / BITS_PER_UNIT) | |
174 | ||
9991d1d3 | 175 | /* Limit to bound the number of aliasing checks for loads with the same |
176 | vuse as the corresponding store. */ | |
177 | #define MAX_STORE_ALIAS_CHECKS 64 | |
178 | ||
3d3e04ac | 179 | namespace { |
180 | ||
81c8113b | 181 | struct bswap_stat |
4aba7bd3 | 182 | { |
183 | /* Number of hand-written 16-bit nop / bswaps found. */ | |
184 | int found_16bit; | |
185 | ||
186 | /* Number of hand-written 32-bit nop / bswaps found. */ | |
187 | int found_32bit; | |
188 | ||
189 | /* Number of hand-written 64-bit nop / bswaps found. */ | |
190 | int found_64bit; | |
191 | } nop_stats, bswap_stats; | |
192 | ||
193 | /* A symbolic number structure is used to detect byte permutation and selection | |
194 | patterns of a source. To achieve that, its field N contains an artificial | |
195 | number consisting of BITS_PER_MARKER sized markers tracking where does each | |
196 | byte come from in the source: | |
197 | ||
198 | 0 - target byte has the value 0 | |
199 | FF - target byte has an unknown value (eg. due to sign extension) | |
200 | 1..size - marker value is the byte index in the source (0 for lsb). | |
201 | ||
202 | To detect permutations on memory sources (arrays and structures), a symbolic | |
203 | number is also associated: | |
204 | - a base address BASE_ADDR and an OFFSET giving the address of the source; | |
205 | - a range which gives the difference between the highest and lowest accessed | |
206 | memory location to make such a symbolic number; | |
207 | - the address SRC of the source element of lowest address as a convenience | |
208 | to easily get BASE_ADDR + offset + lowest bytepos; | |
209 | - number of expressions N_OPS bitwise ored together to represent | |
210 | approximate cost of the computation. | |
211 | ||
212 | Note 1: the range is different from size as size reflects the size of the | |
213 | type of the current expression. For instance, for an array char a[], | |
214 | (short) a[0] | (short) a[3] would have a size of 2 but a range of 4 while | |
215 | (short) a[0] | ((short) a[0] << 1) would still have a size of 2 but this | |
216 | time a range of 1. | |
217 | ||
218 | Note 2: for non-memory sources, range holds the same value as size. | |
219 | ||
220 | Note 3: SRC points to the SSA_NAME in case of non-memory source. */ | |
221 | ||
222 | struct symbolic_number { | |
223 | uint64_t n; | |
224 | tree type; | |
225 | tree base_addr; | |
226 | tree offset; | |
08454aa5 | 227 | poly_int64_pod bytepos; |
4aba7bd3 | 228 | tree src; |
229 | tree alias_set; | |
230 | tree vuse; | |
231 | unsigned HOST_WIDE_INT range; | |
232 | int n_ops; | |
233 | }; | |
234 | ||
235 | #define BITS_PER_MARKER 8 | |
236 | #define MARKER_MASK ((1 << BITS_PER_MARKER) - 1) | |
237 | #define MARKER_BYTE_UNKNOWN MARKER_MASK | |
238 | #define HEAD_MARKER(n, size) \ | |
239 | ((n) & ((uint64_t) MARKER_MASK << (((size) - 1) * BITS_PER_MARKER))) | |
240 | ||
241 | /* The number which the find_bswap_or_nop_1 result should match in | |
242 | order to have a nop. The number is masked according to the size of | |
243 | the symbolic number before using it. */ | |
244 | #define CMPNOP (sizeof (int64_t) < 8 ? 0 : \ | |
245 | (uint64_t)0x08070605 << 32 | 0x04030201) | |
246 | ||
247 | /* The number which the find_bswap_or_nop_1 result should match in | |
248 | order to have a byte swap. The number is masked according to the | |
249 | size of the symbolic number before using it. */ | |
250 | #define CMPXCHG (sizeof (int64_t) < 8 ? 0 : \ | |
251 | (uint64_t)0x01020304 << 32 | 0x05060708) | |
252 | ||
253 | /* Perform a SHIFT or ROTATE operation by COUNT bits on symbolic | |
254 | number N. Return false if the requested operation is not permitted | |
255 | on a symbolic number. */ | |
256 | ||
257 | inline bool | |
258 | do_shift_rotate (enum tree_code code, | |
259 | struct symbolic_number *n, | |
260 | int count) | |
261 | { | |
262 | int i, size = TYPE_PRECISION (n->type) / BITS_PER_UNIT; | |
263 | unsigned head_marker; | |
264 | ||
fdaa2822 | 265 | if (count < 0 |
266 | || count >= TYPE_PRECISION (n->type) | |
267 | || count % BITS_PER_UNIT != 0) | |
4aba7bd3 | 268 | return false; |
269 | count = (count / BITS_PER_UNIT) * BITS_PER_MARKER; | |
270 | ||
271 | /* Zero out the extra bits of N in order to avoid them being shifted | |
272 | into the significant bits. */ | |
273 | if (size < 64 / BITS_PER_MARKER) | |
274 | n->n &= ((uint64_t) 1 << (size * BITS_PER_MARKER)) - 1; | |
275 | ||
276 | switch (code) | |
277 | { | |
278 | case LSHIFT_EXPR: | |
279 | n->n <<= count; | |
280 | break; | |
281 | case RSHIFT_EXPR: | |
282 | head_marker = HEAD_MARKER (n->n, size); | |
283 | n->n >>= count; | |
284 | /* Arithmetic shift of signed type: result is dependent on the value. */ | |
285 | if (!TYPE_UNSIGNED (n->type) && head_marker) | |
286 | for (i = 0; i < count / BITS_PER_MARKER; i++) | |
287 | n->n |= (uint64_t) MARKER_BYTE_UNKNOWN | |
288 | << ((size - 1 - i) * BITS_PER_MARKER); | |
289 | break; | |
290 | case LROTATE_EXPR: | |
291 | n->n = (n->n << count) | (n->n >> ((size * BITS_PER_MARKER) - count)); | |
292 | break; | |
293 | case RROTATE_EXPR: | |
294 | n->n = (n->n >> count) | (n->n << ((size * BITS_PER_MARKER) - count)); | |
295 | break; | |
296 | default: | |
297 | return false; | |
298 | } | |
299 | /* Zero unused bits for size. */ | |
300 | if (size < 64 / BITS_PER_MARKER) | |
301 | n->n &= ((uint64_t) 1 << (size * BITS_PER_MARKER)) - 1; | |
302 | return true; | |
303 | } | |
304 | ||
305 | /* Perform sanity checking for the symbolic number N and the gimple | |
306 | statement STMT. */ | |
307 | ||
308 | inline bool | |
309 | verify_symbolic_number_p (struct symbolic_number *n, gimple *stmt) | |
310 | { | |
311 | tree lhs_type; | |
312 | ||
313 | lhs_type = gimple_expr_type (stmt); | |
314 | ||
315 | if (TREE_CODE (lhs_type) != INTEGER_TYPE) | |
316 | return false; | |
317 | ||
318 | if (TYPE_PRECISION (lhs_type) != TYPE_PRECISION (n->type)) | |
319 | return false; | |
320 | ||
321 | return true; | |
322 | } | |
323 | ||
324 | /* Initialize the symbolic number N for the bswap pass from the base element | |
325 | SRC manipulated by the bitwise OR expression. */ | |
326 | ||
327 | bool | |
328 | init_symbolic_number (struct symbolic_number *n, tree src) | |
329 | { | |
330 | int size; | |
331 | ||
332 | if (! INTEGRAL_TYPE_P (TREE_TYPE (src))) | |
333 | return false; | |
334 | ||
335 | n->base_addr = n->offset = n->alias_set = n->vuse = NULL_TREE; | |
336 | n->src = src; | |
337 | ||
338 | /* Set up the symbolic number N by setting each byte to a value between 1 and | |
339 | the byte size of rhs1. The highest order byte is set to n->size and the | |
340 | lowest order byte to 1. */ | |
341 | n->type = TREE_TYPE (src); | |
342 | size = TYPE_PRECISION (n->type); | |
343 | if (size % BITS_PER_UNIT != 0) | |
344 | return false; | |
345 | size /= BITS_PER_UNIT; | |
346 | if (size > 64 / BITS_PER_MARKER) | |
347 | return false; | |
348 | n->range = size; | |
349 | n->n = CMPNOP; | |
350 | n->n_ops = 1; | |
351 | ||
352 | if (size < 64 / BITS_PER_MARKER) | |
353 | n->n &= ((uint64_t) 1 << (size * BITS_PER_MARKER)) - 1; | |
354 | ||
355 | return true; | |
356 | } | |
357 | ||
358 | /* Check if STMT might be a byte swap or a nop from a memory source and returns | |
359 | the answer. If so, REF is that memory source and the base of the memory area | |
360 | accessed and the offset of the access from that base are recorded in N. */ | |
361 | ||
362 | bool | |
363 | find_bswap_or_nop_load (gimple *stmt, tree ref, struct symbolic_number *n) | |
364 | { | |
365 | /* Leaf node is an array or component ref. Memorize its base and | |
366 | offset from base to compare to other such leaf node. */ | |
81bc0f0f | 367 | poly_int64 bitsize, bitpos, bytepos; |
4aba7bd3 | 368 | machine_mode mode; |
369 | int unsignedp, reversep, volatilep; | |
370 | tree offset, base_addr; | |
371 | ||
372 | /* Not prepared to handle PDP endian. */ | |
373 | if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN) | |
374 | return false; | |
375 | ||
376 | if (!gimple_assign_load_p (stmt) || gimple_has_volatile_ops (stmt)) | |
377 | return false; | |
378 | ||
379 | base_addr = get_inner_reference (ref, &bitsize, &bitpos, &offset, &mode, | |
380 | &unsignedp, &reversep, &volatilep); | |
381 | ||
509ab8cd | 382 | if (TREE_CODE (base_addr) == TARGET_MEM_REF) |
383 | /* Do not rewrite TARGET_MEM_REF. */ | |
384 | return false; | |
385 | else if (TREE_CODE (base_addr) == MEM_REF) | |
4aba7bd3 | 386 | { |
9c6deaf0 | 387 | poly_offset_int bit_offset = 0; |
4aba7bd3 | 388 | tree off = TREE_OPERAND (base_addr, 1); |
389 | ||
390 | if (!integer_zerop (off)) | |
391 | { | |
9c6deaf0 | 392 | poly_offset_int boff = mem_ref_offset (base_addr); |
393 | boff <<= LOG2_BITS_PER_UNIT; | |
4aba7bd3 | 394 | bit_offset += boff; |
395 | } | |
396 | ||
397 | base_addr = TREE_OPERAND (base_addr, 0); | |
398 | ||
399 | /* Avoid returning a negative bitpos as this may wreak havoc later. */ | |
9c6deaf0 | 400 | if (maybe_lt (bit_offset, 0)) |
4aba7bd3 | 401 | { |
9c6deaf0 | 402 | tree byte_offset = wide_int_to_tree |
403 | (sizetype, bits_to_bytes_round_down (bit_offset)); | |
404 | bit_offset = num_trailing_bits (bit_offset); | |
4aba7bd3 | 405 | if (offset) |
9c6deaf0 | 406 | offset = size_binop (PLUS_EXPR, offset, byte_offset); |
4aba7bd3 | 407 | else |
9c6deaf0 | 408 | offset = byte_offset; |
4aba7bd3 | 409 | } |
410 | ||
9c6deaf0 | 411 | bitpos += bit_offset.force_shwi (); |
4aba7bd3 | 412 | } |
509ab8cd | 413 | else |
414 | base_addr = build_fold_addr_expr (base_addr); | |
4aba7bd3 | 415 | |
81bc0f0f | 416 | if (!multiple_p (bitpos, BITS_PER_UNIT, &bytepos)) |
4aba7bd3 | 417 | return false; |
81bc0f0f | 418 | if (!multiple_p (bitsize, BITS_PER_UNIT)) |
4aba7bd3 | 419 | return false; |
420 | if (reversep) | |
421 | return false; | |
422 | ||
423 | if (!init_symbolic_number (n, ref)) | |
424 | return false; | |
425 | n->base_addr = base_addr; | |
426 | n->offset = offset; | |
81bc0f0f | 427 | n->bytepos = bytepos; |
4aba7bd3 | 428 | n->alias_set = reference_alias_ptr_type (ref); |
429 | n->vuse = gimple_vuse (stmt); | |
430 | return true; | |
431 | } | |
432 | ||
433 | /* Compute the symbolic number N representing the result of a bitwise OR on 2 | |
434 | symbolic number N1 and N2 whose source statements are respectively | |
435 | SOURCE_STMT1 and SOURCE_STMT2. */ | |
436 | ||
437 | gimple * | |
438 | perform_symbolic_merge (gimple *source_stmt1, struct symbolic_number *n1, | |
439 | gimple *source_stmt2, struct symbolic_number *n2, | |
440 | struct symbolic_number *n) | |
441 | { | |
442 | int i, size; | |
443 | uint64_t mask; | |
444 | gimple *source_stmt; | |
445 | struct symbolic_number *n_start; | |
446 | ||
447 | tree rhs1 = gimple_assign_rhs1 (source_stmt1); | |
448 | if (TREE_CODE (rhs1) == BIT_FIELD_REF | |
449 | && TREE_CODE (TREE_OPERAND (rhs1, 0)) == SSA_NAME) | |
450 | rhs1 = TREE_OPERAND (rhs1, 0); | |
451 | tree rhs2 = gimple_assign_rhs1 (source_stmt2); | |
452 | if (TREE_CODE (rhs2) == BIT_FIELD_REF | |
453 | && TREE_CODE (TREE_OPERAND (rhs2, 0)) == SSA_NAME) | |
454 | rhs2 = TREE_OPERAND (rhs2, 0); | |
455 | ||
456 | /* Sources are different, cancel bswap if they are not memory location with | |
457 | the same base (array, structure, ...). */ | |
458 | if (rhs1 != rhs2) | |
459 | { | |
460 | uint64_t inc; | |
08454aa5 | 461 | HOST_WIDE_INT start1, start2, start_sub, end_sub, end1, end2, end; |
4aba7bd3 | 462 | struct symbolic_number *toinc_n_ptr, *n_end; |
463 | basic_block bb1, bb2; | |
464 | ||
465 | if (!n1->base_addr || !n2->base_addr | |
466 | || !operand_equal_p (n1->base_addr, n2->base_addr, 0)) | |
467 | return NULL; | |
468 | ||
469 | if (!n1->offset != !n2->offset | |
470 | || (n1->offset && !operand_equal_p (n1->offset, n2->offset, 0))) | |
471 | return NULL; | |
472 | ||
08454aa5 | 473 | start1 = 0; |
474 | if (!(n2->bytepos - n1->bytepos).is_constant (&start2)) | |
475 | return NULL; | |
476 | ||
477 | if (start1 < start2) | |
4aba7bd3 | 478 | { |
479 | n_start = n1; | |
08454aa5 | 480 | start_sub = start2 - start1; |
4aba7bd3 | 481 | } |
482 | else | |
483 | { | |
484 | n_start = n2; | |
08454aa5 | 485 | start_sub = start1 - start2; |
4aba7bd3 | 486 | } |
487 | ||
488 | bb1 = gimple_bb (source_stmt1); | |
489 | bb2 = gimple_bb (source_stmt2); | |
490 | if (dominated_by_p (CDI_DOMINATORS, bb1, bb2)) | |
491 | source_stmt = source_stmt1; | |
492 | else | |
493 | source_stmt = source_stmt2; | |
494 | ||
495 | /* Find the highest address at which a load is performed and | |
496 | compute related info. */ | |
08454aa5 | 497 | end1 = start1 + (n1->range - 1); |
498 | end2 = start2 + (n2->range - 1); | |
4aba7bd3 | 499 | if (end1 < end2) |
500 | { | |
501 | end = end2; | |
502 | end_sub = end2 - end1; | |
503 | } | |
504 | else | |
505 | { | |
506 | end = end1; | |
507 | end_sub = end1 - end2; | |
508 | } | |
509 | n_end = (end2 > end1) ? n2 : n1; | |
510 | ||
511 | /* Find symbolic number whose lsb is the most significant. */ | |
512 | if (BYTES_BIG_ENDIAN) | |
513 | toinc_n_ptr = (n_end == n1) ? n2 : n1; | |
514 | else | |
515 | toinc_n_ptr = (n_start == n1) ? n2 : n1; | |
516 | ||
08454aa5 | 517 | n->range = end - MIN (start1, start2) + 1; |
4aba7bd3 | 518 | |
519 | /* Check that the range of memory covered can be represented by | |
520 | a symbolic number. */ | |
521 | if (n->range > 64 / BITS_PER_MARKER) | |
522 | return NULL; | |
523 | ||
524 | /* Reinterpret byte marks in symbolic number holding the value of | |
525 | bigger weight according to target endianness. */ | |
526 | inc = BYTES_BIG_ENDIAN ? end_sub : start_sub; | |
527 | size = TYPE_PRECISION (n1->type) / BITS_PER_UNIT; | |
528 | for (i = 0; i < size; i++, inc <<= BITS_PER_MARKER) | |
529 | { | |
530 | unsigned marker | |
531 | = (toinc_n_ptr->n >> (i * BITS_PER_MARKER)) & MARKER_MASK; | |
532 | if (marker && marker != MARKER_BYTE_UNKNOWN) | |
533 | toinc_n_ptr->n += inc; | |
534 | } | |
535 | } | |
536 | else | |
537 | { | |
538 | n->range = n1->range; | |
539 | n_start = n1; | |
540 | source_stmt = source_stmt1; | |
541 | } | |
542 | ||
543 | if (!n1->alias_set | |
544 | || alias_ptr_types_compatible_p (n1->alias_set, n2->alias_set)) | |
545 | n->alias_set = n1->alias_set; | |
546 | else | |
547 | n->alias_set = ptr_type_node; | |
548 | n->vuse = n_start->vuse; | |
549 | n->base_addr = n_start->base_addr; | |
550 | n->offset = n_start->offset; | |
551 | n->src = n_start->src; | |
552 | n->bytepos = n_start->bytepos; | |
553 | n->type = n_start->type; | |
554 | size = TYPE_PRECISION (n->type) / BITS_PER_UNIT; | |
555 | ||
556 | for (i = 0, mask = MARKER_MASK; i < size; i++, mask <<= BITS_PER_MARKER) | |
557 | { | |
558 | uint64_t masked1, masked2; | |
559 | ||
560 | masked1 = n1->n & mask; | |
561 | masked2 = n2->n & mask; | |
562 | if (masked1 && masked2 && masked1 != masked2) | |
563 | return NULL; | |
564 | } | |
565 | n->n = n1->n | n2->n; | |
566 | n->n_ops = n1->n_ops + n2->n_ops; | |
567 | ||
568 | return source_stmt; | |
569 | } | |
570 | ||
571 | /* find_bswap_or_nop_1 invokes itself recursively with N and tries to perform | |
572 | the operation given by the rhs of STMT on the result. If the operation | |
573 | could successfully be executed the function returns a gimple stmt whose | |
574 | rhs's first tree is the expression of the source operand and NULL | |
575 | otherwise. */ | |
576 | ||
577 | gimple * | |
578 | find_bswap_or_nop_1 (gimple *stmt, struct symbolic_number *n, int limit) | |
579 | { | |
580 | enum tree_code code; | |
581 | tree rhs1, rhs2 = NULL; | |
582 | gimple *rhs1_stmt, *rhs2_stmt, *source_stmt1; | |
583 | enum gimple_rhs_class rhs_class; | |
584 | ||
585 | if (!limit || !is_gimple_assign (stmt)) | |
586 | return NULL; | |
587 | ||
588 | rhs1 = gimple_assign_rhs1 (stmt); | |
589 | ||
590 | if (find_bswap_or_nop_load (stmt, rhs1, n)) | |
591 | return stmt; | |
592 | ||
593 | /* Handle BIT_FIELD_REF. */ | |
594 | if (TREE_CODE (rhs1) == BIT_FIELD_REF | |
595 | && TREE_CODE (TREE_OPERAND (rhs1, 0)) == SSA_NAME) | |
596 | { | |
597 | unsigned HOST_WIDE_INT bitsize = tree_to_uhwi (TREE_OPERAND (rhs1, 1)); | |
598 | unsigned HOST_WIDE_INT bitpos = tree_to_uhwi (TREE_OPERAND (rhs1, 2)); | |
599 | if (bitpos % BITS_PER_UNIT == 0 | |
600 | && bitsize % BITS_PER_UNIT == 0 | |
601 | && init_symbolic_number (n, TREE_OPERAND (rhs1, 0))) | |
602 | { | |
603 | /* Handle big-endian bit numbering in BIT_FIELD_REF. */ | |
604 | if (BYTES_BIG_ENDIAN) | |
605 | bitpos = TYPE_PRECISION (n->type) - bitpos - bitsize; | |
606 | ||
607 | /* Shift. */ | |
608 | if (!do_shift_rotate (RSHIFT_EXPR, n, bitpos)) | |
609 | return NULL; | |
610 | ||
611 | /* Mask. */ | |
612 | uint64_t mask = 0; | |
613 | uint64_t tmp = (1 << BITS_PER_UNIT) - 1; | |
614 | for (unsigned i = 0; i < bitsize / BITS_PER_UNIT; | |
615 | i++, tmp <<= BITS_PER_UNIT) | |
616 | mask |= (uint64_t) MARKER_MASK << (i * BITS_PER_MARKER); | |
617 | n->n &= mask; | |
618 | ||
619 | /* Convert. */ | |
620 | n->type = TREE_TYPE (rhs1); | |
621 | if (!n->base_addr) | |
622 | n->range = TYPE_PRECISION (n->type) / BITS_PER_UNIT; | |
623 | ||
624 | return verify_symbolic_number_p (n, stmt) ? stmt : NULL; | |
625 | } | |
626 | ||
627 | return NULL; | |
628 | } | |
629 | ||
630 | if (TREE_CODE (rhs1) != SSA_NAME) | |
631 | return NULL; | |
632 | ||
633 | code = gimple_assign_rhs_code (stmt); | |
634 | rhs_class = gimple_assign_rhs_class (stmt); | |
635 | rhs1_stmt = SSA_NAME_DEF_STMT (rhs1); | |
636 | ||
637 | if (rhs_class == GIMPLE_BINARY_RHS) | |
638 | rhs2 = gimple_assign_rhs2 (stmt); | |
639 | ||
640 | /* Handle unary rhs and binary rhs with integer constants as second | |
641 | operand. */ | |
642 | ||
643 | if (rhs_class == GIMPLE_UNARY_RHS | |
644 | || (rhs_class == GIMPLE_BINARY_RHS | |
645 | && TREE_CODE (rhs2) == INTEGER_CST)) | |
646 | { | |
647 | if (code != BIT_AND_EXPR | |
648 | && code != LSHIFT_EXPR | |
649 | && code != RSHIFT_EXPR | |
650 | && code != LROTATE_EXPR | |
651 | && code != RROTATE_EXPR | |
652 | && !CONVERT_EXPR_CODE_P (code)) | |
653 | return NULL; | |
654 | ||
655 | source_stmt1 = find_bswap_or_nop_1 (rhs1_stmt, n, limit - 1); | |
656 | ||
657 | /* If find_bswap_or_nop_1 returned NULL, STMT is a leaf node and | |
658 | we have to initialize the symbolic number. */ | |
659 | if (!source_stmt1) | |
660 | { | |
661 | if (gimple_assign_load_p (stmt) | |
662 | || !init_symbolic_number (n, rhs1)) | |
663 | return NULL; | |
664 | source_stmt1 = stmt; | |
665 | } | |
666 | ||
667 | switch (code) | |
668 | { | |
669 | case BIT_AND_EXPR: | |
670 | { | |
671 | int i, size = TYPE_PRECISION (n->type) / BITS_PER_UNIT; | |
672 | uint64_t val = int_cst_value (rhs2), mask = 0; | |
673 | uint64_t tmp = (1 << BITS_PER_UNIT) - 1; | |
674 | ||
675 | /* Only constants masking full bytes are allowed. */ | |
676 | for (i = 0; i < size; i++, tmp <<= BITS_PER_UNIT) | |
677 | if ((val & tmp) != 0 && (val & tmp) != tmp) | |
678 | return NULL; | |
679 | else if (val & tmp) | |
680 | mask |= (uint64_t) MARKER_MASK << (i * BITS_PER_MARKER); | |
681 | ||
682 | n->n &= mask; | |
683 | } | |
684 | break; | |
685 | case LSHIFT_EXPR: | |
686 | case RSHIFT_EXPR: | |
687 | case LROTATE_EXPR: | |
688 | case RROTATE_EXPR: | |
689 | if (!do_shift_rotate (code, n, (int) TREE_INT_CST_LOW (rhs2))) | |
690 | return NULL; | |
691 | break; | |
692 | CASE_CONVERT: | |
693 | { | |
694 | int i, type_size, old_type_size; | |
695 | tree type; | |
696 | ||
697 | type = gimple_expr_type (stmt); | |
698 | type_size = TYPE_PRECISION (type); | |
699 | if (type_size % BITS_PER_UNIT != 0) | |
700 | return NULL; | |
701 | type_size /= BITS_PER_UNIT; | |
702 | if (type_size > 64 / BITS_PER_MARKER) | |
703 | return NULL; | |
704 | ||
705 | /* Sign extension: result is dependent on the value. */ | |
706 | old_type_size = TYPE_PRECISION (n->type) / BITS_PER_UNIT; | |
707 | if (!TYPE_UNSIGNED (n->type) && type_size > old_type_size | |
708 | && HEAD_MARKER (n->n, old_type_size)) | |
709 | for (i = 0; i < type_size - old_type_size; i++) | |
710 | n->n |= (uint64_t) MARKER_BYTE_UNKNOWN | |
711 | << ((type_size - 1 - i) * BITS_PER_MARKER); | |
712 | ||
713 | if (type_size < 64 / BITS_PER_MARKER) | |
714 | { | |
715 | /* If STMT casts to a smaller type mask out the bits not | |
716 | belonging to the target type. */ | |
717 | n->n &= ((uint64_t) 1 << (type_size * BITS_PER_MARKER)) - 1; | |
718 | } | |
719 | n->type = type; | |
720 | if (!n->base_addr) | |
721 | n->range = type_size; | |
722 | } | |
723 | break; | |
724 | default: | |
725 | return NULL; | |
726 | }; | |
727 | return verify_symbolic_number_p (n, stmt) ? source_stmt1 : NULL; | |
728 | } | |
729 | ||
730 | /* Handle binary rhs. */ | |
731 | ||
732 | if (rhs_class == GIMPLE_BINARY_RHS) | |
733 | { | |
734 | struct symbolic_number n1, n2; | |
735 | gimple *source_stmt, *source_stmt2; | |
736 | ||
737 | if (code != BIT_IOR_EXPR) | |
738 | return NULL; | |
739 | ||
740 | if (TREE_CODE (rhs2) != SSA_NAME) | |
741 | return NULL; | |
742 | ||
743 | rhs2_stmt = SSA_NAME_DEF_STMT (rhs2); | |
744 | ||
745 | switch (code) | |
746 | { | |
747 | case BIT_IOR_EXPR: | |
748 | source_stmt1 = find_bswap_or_nop_1 (rhs1_stmt, &n1, limit - 1); | |
749 | ||
750 | if (!source_stmt1) | |
751 | return NULL; | |
752 | ||
753 | source_stmt2 = find_bswap_or_nop_1 (rhs2_stmt, &n2, limit - 1); | |
754 | ||
755 | if (!source_stmt2) | |
756 | return NULL; | |
757 | ||
758 | if (TYPE_PRECISION (n1.type) != TYPE_PRECISION (n2.type)) | |
759 | return NULL; | |
760 | ||
509ab8cd | 761 | if (n1.vuse != n2.vuse) |
4aba7bd3 | 762 | return NULL; |
763 | ||
764 | source_stmt | |
765 | = perform_symbolic_merge (source_stmt1, &n1, source_stmt2, &n2, n); | |
766 | ||
767 | if (!source_stmt) | |
768 | return NULL; | |
769 | ||
770 | if (!verify_symbolic_number_p (n, stmt)) | |
771 | return NULL; | |
772 | ||
773 | break; | |
774 | default: | |
775 | return NULL; | |
776 | } | |
777 | return source_stmt; | |
778 | } | |
779 | return NULL; | |
780 | } | |
781 | ||
509ab8cd | 782 | /* Helper for find_bswap_or_nop and try_coalesce_bswap to compute |
783 | *CMPXCHG, *CMPNOP and adjust *N. */ | |
4aba7bd3 | 784 | |
509ab8cd | 785 | void |
786 | find_bswap_or_nop_finalize (struct symbolic_number *n, uint64_t *cmpxchg, | |
787 | uint64_t *cmpnop) | |
4aba7bd3 | 788 | { |
789 | unsigned rsize; | |
790 | uint64_t tmpn, mask; | |
4aba7bd3 | 791 | |
509ab8cd | 792 | /* The number which the find_bswap_or_nop_1 result should match in order |
793 | to have a full byte swap. The number is shifted to the right | |
794 | according to the size of the symbolic number before using it. */ | |
795 | *cmpxchg = CMPXCHG; | |
796 | *cmpnop = CMPNOP; | |
4aba7bd3 | 797 | |
798 | /* Find real size of result (highest non-zero byte). */ | |
799 | if (n->base_addr) | |
800 | for (tmpn = n->n, rsize = 0; tmpn; tmpn >>= BITS_PER_MARKER, rsize++); | |
801 | else | |
802 | rsize = n->range; | |
803 | ||
804 | /* Zero out the bits corresponding to untouched bytes in original gimple | |
805 | expression. */ | |
806 | if (n->range < (int) sizeof (int64_t)) | |
807 | { | |
808 | mask = ((uint64_t) 1 << (n->range * BITS_PER_MARKER)) - 1; | |
509ab8cd | 809 | *cmpxchg >>= (64 / BITS_PER_MARKER - n->range) * BITS_PER_MARKER; |
810 | *cmpnop &= mask; | |
4aba7bd3 | 811 | } |
812 | ||
813 | /* Zero out the bits corresponding to unused bytes in the result of the | |
814 | gimple expression. */ | |
815 | if (rsize < n->range) | |
816 | { | |
817 | if (BYTES_BIG_ENDIAN) | |
818 | { | |
819 | mask = ((uint64_t) 1 << (rsize * BITS_PER_MARKER)) - 1; | |
509ab8cd | 820 | *cmpxchg &= mask; |
821 | *cmpnop >>= (n->range - rsize) * BITS_PER_MARKER; | |
4aba7bd3 | 822 | } |
823 | else | |
824 | { | |
825 | mask = ((uint64_t) 1 << (rsize * BITS_PER_MARKER)) - 1; | |
509ab8cd | 826 | *cmpxchg >>= (n->range - rsize) * BITS_PER_MARKER; |
827 | *cmpnop &= mask; | |
4aba7bd3 | 828 | } |
829 | n->range = rsize; | |
830 | } | |
831 | ||
509ab8cd | 832 | n->range *= BITS_PER_UNIT; |
833 | } | |
834 | ||
835 | /* Check if STMT completes a bswap implementation or a read in a given | |
836 | endianness consisting of ORs, SHIFTs and ANDs and sets *BSWAP | |
837 | accordingly. It also sets N to represent the kind of operations | |
838 | performed: size of the resulting expression and whether it works on | |
839 | a memory source, and if so alias-set and vuse. At last, the | |
840 | function returns a stmt whose rhs's first tree is the source | |
841 | expression. */ | |
842 | ||
843 | gimple * | |
844 | find_bswap_or_nop (gimple *stmt, struct symbolic_number *n, bool *bswap) | |
845 | { | |
846 | /* The last parameter determines the depth search limit. It usually | |
847 | correlates directly to the number n of bytes to be touched. We | |
848 | increase that number by log2(n) + 1 here in order to also | |
849 | cover signed -> unsigned conversions of the src operand as can be seen | |
850 | in libgcc, and for initial shift/and operation of the src operand. */ | |
851 | int limit = TREE_INT_CST_LOW (TYPE_SIZE_UNIT (gimple_expr_type (stmt))); | |
852 | limit += 1 + (int) ceil_log2 ((unsigned HOST_WIDE_INT) limit); | |
853 | gimple *ins_stmt = find_bswap_or_nop_1 (stmt, n, limit); | |
854 | ||
855 | if (!ins_stmt) | |
856 | return NULL; | |
857 | ||
858 | uint64_t cmpxchg, cmpnop; | |
859 | find_bswap_or_nop_finalize (n, &cmpxchg, &cmpnop); | |
860 | ||
4aba7bd3 | 861 | /* A complete byte swap should make the symbolic number to start with |
862 | the largest digit in the highest order byte. Unchanged symbolic | |
863 | number indicates a read with same endianness as target architecture. */ | |
864 | if (n->n == cmpnop) | |
865 | *bswap = false; | |
866 | else if (n->n == cmpxchg) | |
867 | *bswap = true; | |
868 | else | |
869 | return NULL; | |
870 | ||
871 | /* Useless bit manipulation performed by code. */ | |
872 | if (!n->base_addr && n->n == cmpnop && n->n_ops == 1) | |
873 | return NULL; | |
874 | ||
4aba7bd3 | 875 | return ins_stmt; |
876 | } | |
877 | ||
878 | const pass_data pass_data_optimize_bswap = | |
879 | { | |
880 | GIMPLE_PASS, /* type */ | |
881 | "bswap", /* name */ | |
882 | OPTGROUP_NONE, /* optinfo_flags */ | |
883 | TV_NONE, /* tv_id */ | |
884 | PROP_ssa, /* properties_required */ | |
885 | 0, /* properties_provided */ | |
886 | 0, /* properties_destroyed */ | |
887 | 0, /* todo_flags_start */ | |
888 | 0, /* todo_flags_finish */ | |
889 | }; | |
890 | ||
891 | class pass_optimize_bswap : public gimple_opt_pass | |
892 | { | |
893 | public: | |
894 | pass_optimize_bswap (gcc::context *ctxt) | |
895 | : gimple_opt_pass (pass_data_optimize_bswap, ctxt) | |
896 | {} | |
897 | ||
898 | /* opt_pass methods: */ | |
899 | virtual bool gate (function *) | |
900 | { | |
901 | return flag_expensive_optimizations && optimize && BITS_PER_UNIT == 8; | |
902 | } | |
903 | ||
904 | virtual unsigned int execute (function *); | |
905 | ||
906 | }; // class pass_optimize_bswap | |
907 | ||
908 | /* Perform the bswap optimization: replace the expression computed in the rhs | |
509ab8cd | 909 | of gsi_stmt (GSI) (or if NULL add instead of replace) by an equivalent |
910 | bswap, load or load + bswap expression. | |
4aba7bd3 | 911 | Which of these alternatives replace the rhs is given by N->base_addr (non |
912 | null if a load is needed) and BSWAP. The type, VUSE and set-alias of the | |
913 | load to perform are also given in N while the builtin bswap invoke is given | |
509ab8cd | 914 | in FNDEL. Finally, if a load is involved, INS_STMT refers to one of the |
915 | load statements involved to construct the rhs in gsi_stmt (GSI) and | |
916 | N->range gives the size of the rhs expression for maintaining some | |
917 | statistics. | |
4aba7bd3 | 918 | |
509ab8cd | 919 | Note that if the replacement involve a load and if gsi_stmt (GSI) is |
920 | non-NULL, that stmt is moved just after INS_STMT to do the load with the | |
921 | same VUSE which can lead to gsi_stmt (GSI) changing of basic block. */ | |
4aba7bd3 | 922 | |
509ab8cd | 923 | tree |
924 | bswap_replace (gimple_stmt_iterator gsi, gimple *ins_stmt, tree fndecl, | |
4aba7bd3 | 925 | tree bswap_type, tree load_type, struct symbolic_number *n, |
926 | bool bswap) | |
927 | { | |
509ab8cd | 928 | tree src, tmp, tgt = NULL_TREE; |
4aba7bd3 | 929 | gimple *bswap_stmt; |
930 | ||
509ab8cd | 931 | gimple *cur_stmt = gsi_stmt (gsi); |
4aba7bd3 | 932 | src = n->src; |
509ab8cd | 933 | if (cur_stmt) |
934 | tgt = gimple_assign_lhs (cur_stmt); | |
4aba7bd3 | 935 | |
936 | /* Need to load the value from memory first. */ | |
937 | if (n->base_addr) | |
938 | { | |
509ab8cd | 939 | gimple_stmt_iterator gsi_ins = gsi; |
940 | if (ins_stmt) | |
941 | gsi_ins = gsi_for_stmt (ins_stmt); | |
4aba7bd3 | 942 | tree addr_expr, addr_tmp, val_expr, val_tmp; |
943 | tree load_offset_ptr, aligned_load_type; | |
509ab8cd | 944 | gimple *load_stmt; |
945 | unsigned align = get_object_alignment (src); | |
08454aa5 | 946 | poly_int64 load_offset = 0; |
4aba7bd3 | 947 | |
509ab8cd | 948 | if (cur_stmt) |
949 | { | |
950 | basic_block ins_bb = gimple_bb (ins_stmt); | |
951 | basic_block cur_bb = gimple_bb (cur_stmt); | |
952 | if (!dominated_by_p (CDI_DOMINATORS, cur_bb, ins_bb)) | |
953 | return NULL_TREE; | |
954 | ||
955 | /* Move cur_stmt just before one of the load of the original | |
956 | to ensure it has the same VUSE. See PR61517 for what could | |
957 | go wrong. */ | |
958 | if (gimple_bb (cur_stmt) != gimple_bb (ins_stmt)) | |
959 | reset_flow_sensitive_info (gimple_assign_lhs (cur_stmt)); | |
960 | gsi_move_before (&gsi, &gsi_ins); | |
961 | gsi = gsi_for_stmt (cur_stmt); | |
962 | } | |
963 | else | |
964 | gsi = gsi_ins; | |
4aba7bd3 | 965 | |
966 | /* Compute address to load from and cast according to the size | |
967 | of the load. */ | |
509ab8cd | 968 | addr_expr = build_fold_addr_expr (src); |
4aba7bd3 | 969 | if (is_gimple_mem_ref_addr (addr_expr)) |
509ab8cd | 970 | addr_tmp = unshare_expr (addr_expr); |
4aba7bd3 | 971 | else |
972 | { | |
509ab8cd | 973 | addr_tmp = unshare_expr (n->base_addr); |
974 | if (!is_gimple_mem_ref_addr (addr_tmp)) | |
975 | addr_tmp = force_gimple_operand_gsi_1 (&gsi, addr_tmp, | |
976 | is_gimple_mem_ref_addr, | |
977 | NULL_TREE, true, | |
978 | GSI_SAME_STMT); | |
979 | load_offset = n->bytepos; | |
980 | if (n->offset) | |
981 | { | |
982 | tree off | |
983 | = force_gimple_operand_gsi (&gsi, unshare_expr (n->offset), | |
984 | true, NULL_TREE, true, | |
985 | GSI_SAME_STMT); | |
986 | gimple *stmt | |
987 | = gimple_build_assign (make_ssa_name (TREE_TYPE (addr_tmp)), | |
988 | POINTER_PLUS_EXPR, addr_tmp, off); | |
989 | gsi_insert_before (&gsi, stmt, GSI_SAME_STMT); | |
990 | addr_tmp = gimple_assign_lhs (stmt); | |
991 | } | |
4aba7bd3 | 992 | } |
993 | ||
994 | /* Perform the load. */ | |
995 | aligned_load_type = load_type; | |
996 | if (align < TYPE_ALIGN (load_type)) | |
997 | aligned_load_type = build_aligned_type (load_type, align); | |
998 | load_offset_ptr = build_int_cst (n->alias_set, load_offset); | |
999 | val_expr = fold_build2 (MEM_REF, aligned_load_type, addr_tmp, | |
1000 | load_offset_ptr); | |
1001 | ||
1002 | if (!bswap) | |
1003 | { | |
1004 | if (n->range == 16) | |
1005 | nop_stats.found_16bit++; | |
1006 | else if (n->range == 32) | |
1007 | nop_stats.found_32bit++; | |
1008 | else | |
1009 | { | |
1010 | gcc_assert (n->range == 64); | |
1011 | nop_stats.found_64bit++; | |
1012 | } | |
1013 | ||
1014 | /* Convert the result of load if necessary. */ | |
509ab8cd | 1015 | if (tgt && !useless_type_conversion_p (TREE_TYPE (tgt), load_type)) |
4aba7bd3 | 1016 | { |
1017 | val_tmp = make_temp_ssa_name (aligned_load_type, NULL, | |
1018 | "load_dst"); | |
1019 | load_stmt = gimple_build_assign (val_tmp, val_expr); | |
1020 | gimple_set_vuse (load_stmt, n->vuse); | |
1021 | gsi_insert_before (&gsi, load_stmt, GSI_SAME_STMT); | |
1022 | gimple_assign_set_rhs_with_ops (&gsi, NOP_EXPR, val_tmp); | |
509ab8cd | 1023 | update_stmt (cur_stmt); |
4aba7bd3 | 1024 | } |
509ab8cd | 1025 | else if (cur_stmt) |
4aba7bd3 | 1026 | { |
1027 | gimple_assign_set_rhs_with_ops (&gsi, MEM_REF, val_expr); | |
1028 | gimple_set_vuse (cur_stmt, n->vuse); | |
509ab8cd | 1029 | update_stmt (cur_stmt); |
1030 | } | |
1031 | else | |
1032 | { | |
1033 | tgt = make_ssa_name (load_type); | |
1034 | cur_stmt = gimple_build_assign (tgt, MEM_REF, val_expr); | |
1035 | gimple_set_vuse (cur_stmt, n->vuse); | |
1036 | gsi_insert_before (&gsi, cur_stmt, GSI_SAME_STMT); | |
4aba7bd3 | 1037 | } |
4aba7bd3 | 1038 | |
1039 | if (dump_file) | |
1040 | { | |
1041 | fprintf (dump_file, | |
1042 | "%d bit load in target endianness found at: ", | |
1043 | (int) n->range); | |
1044 | print_gimple_stmt (dump_file, cur_stmt, 0); | |
1045 | } | |
509ab8cd | 1046 | return tgt; |
4aba7bd3 | 1047 | } |
1048 | else | |
1049 | { | |
1050 | val_tmp = make_temp_ssa_name (aligned_load_type, NULL, "load_dst"); | |
1051 | load_stmt = gimple_build_assign (val_tmp, val_expr); | |
1052 | gimple_set_vuse (load_stmt, n->vuse); | |
1053 | gsi_insert_before (&gsi, load_stmt, GSI_SAME_STMT); | |
1054 | } | |
1055 | src = val_tmp; | |
1056 | } | |
1057 | else if (!bswap) | |
1058 | { | |
509ab8cd | 1059 | gimple *g = NULL; |
1060 | if (tgt && !useless_type_conversion_p (TREE_TYPE (tgt), TREE_TYPE (src))) | |
4aba7bd3 | 1061 | { |
1062 | if (!is_gimple_val (src)) | |
509ab8cd | 1063 | return NULL_TREE; |
4aba7bd3 | 1064 | g = gimple_build_assign (tgt, NOP_EXPR, src); |
1065 | } | |
509ab8cd | 1066 | else if (cur_stmt) |
4aba7bd3 | 1067 | g = gimple_build_assign (tgt, src); |
509ab8cd | 1068 | else |
1069 | tgt = src; | |
4aba7bd3 | 1070 | if (n->range == 16) |
1071 | nop_stats.found_16bit++; | |
1072 | else if (n->range == 32) | |
1073 | nop_stats.found_32bit++; | |
1074 | else | |
1075 | { | |
1076 | gcc_assert (n->range == 64); | |
1077 | nop_stats.found_64bit++; | |
1078 | } | |
1079 | if (dump_file) | |
1080 | { | |
1081 | fprintf (dump_file, | |
1082 | "%d bit reshuffle in target endianness found at: ", | |
1083 | (int) n->range); | |
509ab8cd | 1084 | if (cur_stmt) |
1085 | print_gimple_stmt (dump_file, cur_stmt, 0); | |
1086 | else | |
1087 | { | |
54e7de93 | 1088 | print_generic_expr (dump_file, tgt, TDF_NONE); |
509ab8cd | 1089 | fprintf (dump_file, "\n"); |
1090 | } | |
4aba7bd3 | 1091 | } |
509ab8cd | 1092 | if (cur_stmt) |
1093 | gsi_replace (&gsi, g, true); | |
1094 | return tgt; | |
4aba7bd3 | 1095 | } |
1096 | else if (TREE_CODE (src) == BIT_FIELD_REF) | |
1097 | src = TREE_OPERAND (src, 0); | |
1098 | ||
1099 | if (n->range == 16) | |
1100 | bswap_stats.found_16bit++; | |
1101 | else if (n->range == 32) | |
1102 | bswap_stats.found_32bit++; | |
1103 | else | |
1104 | { | |
1105 | gcc_assert (n->range == 64); | |
1106 | bswap_stats.found_64bit++; | |
1107 | } | |
1108 | ||
1109 | tmp = src; | |
1110 | ||
1111 | /* Convert the src expression if necessary. */ | |
1112 | if (!useless_type_conversion_p (TREE_TYPE (tmp), bswap_type)) | |
1113 | { | |
1114 | gimple *convert_stmt; | |
1115 | ||
1116 | tmp = make_temp_ssa_name (bswap_type, NULL, "bswapsrc"); | |
1117 | convert_stmt = gimple_build_assign (tmp, NOP_EXPR, src); | |
1118 | gsi_insert_before (&gsi, convert_stmt, GSI_SAME_STMT); | |
1119 | } | |
1120 | ||
1121 | /* Canonical form for 16 bit bswap is a rotate expression. Only 16bit values | |
1122 | are considered as rotation of 2N bit values by N bits is generally not | |
1123 | equivalent to a bswap. Consider for instance 0x01020304 r>> 16 which | |
1124 | gives 0x03040102 while a bswap for that value is 0x04030201. */ | |
1125 | if (bswap && n->range == 16) | |
1126 | { | |
1127 | tree count = build_int_cst (NULL, BITS_PER_UNIT); | |
1128 | src = fold_build2 (LROTATE_EXPR, bswap_type, tmp, count); | |
1129 | bswap_stmt = gimple_build_assign (NULL, src); | |
1130 | } | |
1131 | else | |
1132 | bswap_stmt = gimple_build_call (fndecl, 1, tmp); | |
1133 | ||
509ab8cd | 1134 | if (tgt == NULL_TREE) |
1135 | tgt = make_ssa_name (bswap_type); | |
4aba7bd3 | 1136 | tmp = tgt; |
1137 | ||
1138 | /* Convert the result if necessary. */ | |
1139 | if (!useless_type_conversion_p (TREE_TYPE (tgt), bswap_type)) | |
1140 | { | |
1141 | gimple *convert_stmt; | |
1142 | ||
1143 | tmp = make_temp_ssa_name (bswap_type, NULL, "bswapdst"); | |
1144 | convert_stmt = gimple_build_assign (tgt, NOP_EXPR, tmp); | |
1145 | gsi_insert_after (&gsi, convert_stmt, GSI_SAME_STMT); | |
1146 | } | |
1147 | ||
1148 | gimple_set_lhs (bswap_stmt, tmp); | |
1149 | ||
1150 | if (dump_file) | |
1151 | { | |
1152 | fprintf (dump_file, "%d bit bswap implementation found at: ", | |
1153 | (int) n->range); | |
509ab8cd | 1154 | if (cur_stmt) |
1155 | print_gimple_stmt (dump_file, cur_stmt, 0); | |
1156 | else | |
1157 | { | |
54e7de93 | 1158 | print_generic_expr (dump_file, tgt, TDF_NONE); |
509ab8cd | 1159 | fprintf (dump_file, "\n"); |
1160 | } | |
4aba7bd3 | 1161 | } |
1162 | ||
509ab8cd | 1163 | if (cur_stmt) |
1164 | { | |
1165 | gsi_insert_after (&gsi, bswap_stmt, GSI_SAME_STMT); | |
1166 | gsi_remove (&gsi, true); | |
1167 | } | |
1168 | else | |
1169 | gsi_insert_before (&gsi, bswap_stmt, GSI_SAME_STMT); | |
1170 | return tgt; | |
4aba7bd3 | 1171 | } |
1172 | ||
1173 | /* Find manual byte swap implementations as well as load in a given | |
1174 | endianness. Byte swaps are turned into a bswap builtin invokation | |
1175 | while endian loads are converted to bswap builtin invokation or | |
1176 | simple load according to the target endianness. */ | |
1177 | ||
1178 | unsigned int | |
1179 | pass_optimize_bswap::execute (function *fun) | |
1180 | { | |
1181 | basic_block bb; | |
1182 | bool bswap32_p, bswap64_p; | |
1183 | bool changed = false; | |
1184 | tree bswap32_type = NULL_TREE, bswap64_type = NULL_TREE; | |
1185 | ||
1186 | bswap32_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP32) | |
1187 | && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing); | |
1188 | bswap64_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP64) | |
1189 | && (optab_handler (bswap_optab, DImode) != CODE_FOR_nothing | |
1190 | || (bswap32_p && word_mode == SImode))); | |
1191 | ||
1192 | /* Determine the argument type of the builtins. The code later on | |
1193 | assumes that the return and argument type are the same. */ | |
1194 | if (bswap32_p) | |
1195 | { | |
1196 | tree fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32); | |
1197 | bswap32_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))); | |
1198 | } | |
1199 | ||
1200 | if (bswap64_p) | |
1201 | { | |
1202 | tree fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64); | |
1203 | bswap64_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))); | |
1204 | } | |
1205 | ||
1206 | memset (&nop_stats, 0, sizeof (nop_stats)); | |
1207 | memset (&bswap_stats, 0, sizeof (bswap_stats)); | |
1208 | calculate_dominance_info (CDI_DOMINATORS); | |
1209 | ||
1210 | FOR_EACH_BB_FN (bb, fun) | |
1211 | { | |
1212 | gimple_stmt_iterator gsi; | |
1213 | ||
1214 | /* We do a reverse scan for bswap patterns to make sure we get the | |
1215 | widest match. As bswap pattern matching doesn't handle previously | |
1216 | inserted smaller bswap replacements as sub-patterns, the wider | |
1217 | variant wouldn't be detected. */ | |
1218 | for (gsi = gsi_last_bb (bb); !gsi_end_p (gsi);) | |
1219 | { | |
1220 | gimple *ins_stmt, *cur_stmt = gsi_stmt (gsi); | |
1221 | tree fndecl = NULL_TREE, bswap_type = NULL_TREE, load_type; | |
1222 | enum tree_code code; | |
1223 | struct symbolic_number n; | |
1224 | bool bswap; | |
1225 | ||
1226 | /* This gsi_prev (&gsi) is not part of the for loop because cur_stmt | |
1227 | might be moved to a different basic block by bswap_replace and gsi | |
1228 | must not points to it if that's the case. Moving the gsi_prev | |
1229 | there make sure that gsi points to the statement previous to | |
1230 | cur_stmt while still making sure that all statements are | |
1231 | considered in this basic block. */ | |
1232 | gsi_prev (&gsi); | |
1233 | ||
1234 | if (!is_gimple_assign (cur_stmt)) | |
1235 | continue; | |
1236 | ||
1237 | code = gimple_assign_rhs_code (cur_stmt); | |
1238 | switch (code) | |
1239 | { | |
1240 | case LROTATE_EXPR: | |
1241 | case RROTATE_EXPR: | |
1242 | if (!tree_fits_uhwi_p (gimple_assign_rhs2 (cur_stmt)) | |
1243 | || tree_to_uhwi (gimple_assign_rhs2 (cur_stmt)) | |
1244 | % BITS_PER_UNIT) | |
1245 | continue; | |
1246 | /* Fall through. */ | |
1247 | case BIT_IOR_EXPR: | |
1248 | break; | |
1249 | default: | |
1250 | continue; | |
1251 | } | |
1252 | ||
1253 | ins_stmt = find_bswap_or_nop (cur_stmt, &n, &bswap); | |
1254 | ||
1255 | if (!ins_stmt) | |
1256 | continue; | |
1257 | ||
1258 | switch (n.range) | |
1259 | { | |
1260 | case 16: | |
1261 | /* Already in canonical form, nothing to do. */ | |
1262 | if (code == LROTATE_EXPR || code == RROTATE_EXPR) | |
1263 | continue; | |
1264 | load_type = bswap_type = uint16_type_node; | |
1265 | break; | |
1266 | case 32: | |
1267 | load_type = uint32_type_node; | |
1268 | if (bswap32_p) | |
1269 | { | |
1270 | fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32); | |
1271 | bswap_type = bswap32_type; | |
1272 | } | |
1273 | break; | |
1274 | case 64: | |
1275 | load_type = uint64_type_node; | |
1276 | if (bswap64_p) | |
1277 | { | |
1278 | fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64); | |
1279 | bswap_type = bswap64_type; | |
1280 | } | |
1281 | break; | |
1282 | default: | |
1283 | continue; | |
1284 | } | |
1285 | ||
1286 | if (bswap && !fndecl && n.range != 16) | |
1287 | continue; | |
1288 | ||
509ab8cd | 1289 | if (bswap_replace (gsi_for_stmt (cur_stmt), ins_stmt, fndecl, |
1290 | bswap_type, load_type, &n, bswap)) | |
4aba7bd3 | 1291 | changed = true; |
1292 | } | |
1293 | } | |
1294 | ||
1295 | statistics_counter_event (fun, "16-bit nop implementations found", | |
1296 | nop_stats.found_16bit); | |
1297 | statistics_counter_event (fun, "32-bit nop implementations found", | |
1298 | nop_stats.found_32bit); | |
1299 | statistics_counter_event (fun, "64-bit nop implementations found", | |
1300 | nop_stats.found_64bit); | |
1301 | statistics_counter_event (fun, "16-bit bswap implementations found", | |
1302 | bswap_stats.found_16bit); | |
1303 | statistics_counter_event (fun, "32-bit bswap implementations found", | |
1304 | bswap_stats.found_32bit); | |
1305 | statistics_counter_event (fun, "64-bit bswap implementations found", | |
1306 | bswap_stats.found_64bit); | |
1307 | ||
1308 | return (changed ? TODO_update_ssa : 0); | |
1309 | } | |
1310 | ||
1311 | } // anon namespace | |
1312 | ||
1313 | gimple_opt_pass * | |
1314 | make_pass_optimize_bswap (gcc::context *ctxt) | |
1315 | { | |
1316 | return new pass_optimize_bswap (ctxt); | |
1317 | } | |
1318 | ||
1319 | namespace { | |
1320 | ||
9991d1d3 | 1321 | /* Struct recording one operand for the store, which is either a constant, |
10f0d48d | 1322 | then VAL represents the constant and all the other fields are zero, or |
1323 | a memory load, then VAL represents the reference, BASE_ADDR is non-NULL | |
1324 | and the other fields also reflect the memory load, or an SSA name, then | |
1325 | VAL represents the SSA name and all the other fields are zero, */ | |
9991d1d3 | 1326 | |
1327 | struct store_operand_info | |
1328 | { | |
1329 | tree val; | |
1330 | tree base_addr; | |
e61263f2 | 1331 | poly_uint64 bitsize; |
1332 | poly_uint64 bitpos; | |
1333 | poly_uint64 bitregion_start; | |
1334 | poly_uint64 bitregion_end; | |
9991d1d3 | 1335 | gimple *stmt; |
c35548ce | 1336 | bool bit_not_p; |
9991d1d3 | 1337 | store_operand_info (); |
1338 | }; | |
1339 | ||
1340 | store_operand_info::store_operand_info () | |
1341 | : val (NULL_TREE), base_addr (NULL_TREE), bitsize (0), bitpos (0), | |
c35548ce | 1342 | bitregion_start (0), bitregion_end (0), stmt (NULL), bit_not_p (false) |
9991d1d3 | 1343 | { |
1344 | } | |
1345 | ||
3d3e04ac | 1346 | /* Struct recording the information about a single store of an immediate |
1347 | to memory. These are created in the first phase and coalesced into | |
1348 | merged_store_group objects in the second phase. */ | |
1349 | ||
1350 | struct store_immediate_info | |
1351 | { | |
1352 | unsigned HOST_WIDE_INT bitsize; | |
1353 | unsigned HOST_WIDE_INT bitpos; | |
902cb3b7 | 1354 | unsigned HOST_WIDE_INT bitregion_start; |
1355 | /* This is one past the last bit of the bit region. */ | |
1356 | unsigned HOST_WIDE_INT bitregion_end; | |
3d3e04ac | 1357 | gimple *stmt; |
1358 | unsigned int order; | |
10f0d48d | 1359 | /* INTEGER_CST for constant stores, MEM_REF for memory copy, |
1360 | BIT_*_EXPR for logical bitwise operation, BIT_INSERT_EXPR | |
1361 | for bit insertion. | |
509ab8cd | 1362 | LROTATE_EXPR if it can be only bswap optimized and |
1363 | ops are not really meaningful. | |
1364 | NOP_EXPR if bswap optimization detected identity, ops | |
1365 | are not meaningful. */ | |
9991d1d3 | 1366 | enum tree_code rhs_code; |
509ab8cd | 1367 | /* Two fields for bswap optimization purposes. */ |
1368 | struct symbolic_number n; | |
1369 | gimple *ins_stmt; | |
aa0a1d29 | 1370 | /* True if BIT_{AND,IOR,XOR}_EXPR result is inverted before storing. */ |
832a73b9 | 1371 | bool bit_not_p; |
aa0a1d29 | 1372 | /* True if ops have been swapped and thus ops[1] represents |
1373 | rhs1 of BIT_{AND,IOR,XOR}_EXPR and ops[0] represents rhs2. */ | |
1374 | bool ops_swapped_p; | |
9991d1d3 | 1375 | /* Operands. For BIT_*_EXPR rhs_code both operands are used, otherwise |
1376 | just the first one. */ | |
1377 | store_operand_info ops[2]; | |
f85e7cb7 | 1378 | store_immediate_info (unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, |
902cb3b7 | 1379 | unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, |
509ab8cd | 1380 | gimple *, unsigned int, enum tree_code, |
1381 | struct symbolic_number &, gimple *, bool, | |
9991d1d3 | 1382 | const store_operand_info &, |
1383 | const store_operand_info &); | |
3d3e04ac | 1384 | }; |
1385 | ||
1386 | store_immediate_info::store_immediate_info (unsigned HOST_WIDE_INT bs, | |
f85e7cb7 | 1387 | unsigned HOST_WIDE_INT bp, |
902cb3b7 | 1388 | unsigned HOST_WIDE_INT brs, |
1389 | unsigned HOST_WIDE_INT bre, | |
f85e7cb7 | 1390 | gimple *st, |
9991d1d3 | 1391 | unsigned int ord, |
1392 | enum tree_code rhscode, | |
509ab8cd | 1393 | struct symbolic_number &nr, |
1394 | gimple *ins_stmtp, | |
832a73b9 | 1395 | bool bitnotp, |
9991d1d3 | 1396 | const store_operand_info &op0r, |
1397 | const store_operand_info &op1r) | |
902cb3b7 | 1398 | : bitsize (bs), bitpos (bp), bitregion_start (brs), bitregion_end (bre), |
509ab8cd | 1399 | stmt (st), order (ord), rhs_code (rhscode), n (nr), |
1400 | ins_stmt (ins_stmtp), bit_not_p (bitnotp), ops_swapped_p (false) | |
9991d1d3 | 1401 | #if __cplusplus >= 201103L |
1402 | , ops { op0r, op1r } | |
1403 | { | |
1404 | } | |
1405 | #else | |
3d3e04ac | 1406 | { |
9991d1d3 | 1407 | ops[0] = op0r; |
1408 | ops[1] = op1r; | |
3d3e04ac | 1409 | } |
9991d1d3 | 1410 | #endif |
3d3e04ac | 1411 | |
1412 | /* Struct representing a group of stores to contiguous memory locations. | |
1413 | These are produced by the second phase (coalescing) and consumed in the | |
1414 | third phase that outputs the widened stores. */ | |
1415 | ||
1416 | struct merged_store_group | |
1417 | { | |
1418 | unsigned HOST_WIDE_INT start; | |
1419 | unsigned HOST_WIDE_INT width; | |
902cb3b7 | 1420 | unsigned HOST_WIDE_INT bitregion_start; |
1421 | unsigned HOST_WIDE_INT bitregion_end; | |
1422 | /* The size of the allocated memory for val and mask. */ | |
3d3e04ac | 1423 | unsigned HOST_WIDE_INT buf_size; |
902cb3b7 | 1424 | unsigned HOST_WIDE_INT align_base; |
e61263f2 | 1425 | poly_uint64 load_align_base[2]; |
3d3e04ac | 1426 | |
1427 | unsigned int align; | |
9991d1d3 | 1428 | unsigned int load_align[2]; |
3d3e04ac | 1429 | unsigned int first_order; |
1430 | unsigned int last_order; | |
f9ceb302 | 1431 | bool bit_insertion; |
e580254a | 1432 | bool only_constants; |
1433 | unsigned int first_nonmergeable_order; | |
3d3e04ac | 1434 | |
902cb3b7 | 1435 | auto_vec<store_immediate_info *> stores; |
3d3e04ac | 1436 | /* We record the first and last original statements in the sequence because |
1437 | we'll need their vuse/vdef and replacement position. It's easier to keep | |
1438 | track of them separately as 'stores' is reordered by apply_stores. */ | |
1439 | gimple *last_stmt; | |
1440 | gimple *first_stmt; | |
1441 | unsigned char *val; | |
902cb3b7 | 1442 | unsigned char *mask; |
3d3e04ac | 1443 | |
1444 | merged_store_group (store_immediate_info *); | |
1445 | ~merged_store_group (); | |
f9ceb302 | 1446 | bool can_be_merged_into (store_immediate_info *); |
3d3e04ac | 1447 | void merge_into (store_immediate_info *); |
1448 | void merge_overlapping (store_immediate_info *); | |
1449 | bool apply_stores (); | |
902cb3b7 | 1450 | private: |
1451 | void do_merge (store_immediate_info *); | |
3d3e04ac | 1452 | }; |
1453 | ||
1454 | /* Debug helper. Dump LEN elements of byte array PTR to FD in hex. */ | |
1455 | ||
1456 | static void | |
1457 | dump_char_array (FILE *fd, unsigned char *ptr, unsigned int len) | |
1458 | { | |
1459 | if (!fd) | |
1460 | return; | |
1461 | ||
1462 | for (unsigned int i = 0; i < len; i++) | |
10f0d48d | 1463 | fprintf (fd, "%02x ", ptr[i]); |
3d3e04ac | 1464 | fprintf (fd, "\n"); |
1465 | } | |
1466 | ||
3d3e04ac | 1467 | /* Shift left the bytes in PTR of SZ elements by AMNT bits, carrying over the |
1468 | bits between adjacent elements. AMNT should be within | |
1469 | [0, BITS_PER_UNIT). | |
1470 | Example, AMNT = 2: | |
1471 | 00011111|11100000 << 2 = 01111111|10000000 | |
1472 | PTR[1] | PTR[0] PTR[1] | PTR[0]. */ | |
1473 | ||
1474 | static void | |
1475 | shift_bytes_in_array (unsigned char *ptr, unsigned int sz, unsigned int amnt) | |
1476 | { | |
1477 | if (amnt == 0) | |
1478 | return; | |
1479 | ||
1480 | unsigned char carry_over = 0U; | |
b1c71535 | 1481 | unsigned char carry_mask = (~0U) << (unsigned char) (BITS_PER_UNIT - amnt); |
3d3e04ac | 1482 | unsigned char clear_mask = (~0U) << amnt; |
1483 | ||
1484 | for (unsigned int i = 0; i < sz; i++) | |
1485 | { | |
1486 | unsigned prev_carry_over = carry_over; | |
b1c71535 | 1487 | carry_over = (ptr[i] & carry_mask) >> (BITS_PER_UNIT - amnt); |
3d3e04ac | 1488 | |
1489 | ptr[i] <<= amnt; | |
1490 | if (i != 0) | |
1491 | { | |
1492 | ptr[i] &= clear_mask; | |
1493 | ptr[i] |= prev_carry_over; | |
1494 | } | |
1495 | } | |
1496 | } | |
1497 | ||
1498 | /* Like shift_bytes_in_array but for big-endian. | |
1499 | Shift right the bytes in PTR of SZ elements by AMNT bits, carrying over the | |
1500 | bits between adjacent elements. AMNT should be within | |
1501 | [0, BITS_PER_UNIT). | |
1502 | Example, AMNT = 2: | |
1503 | 00011111|11100000 >> 2 = 00000111|11111000 | |
1504 | PTR[0] | PTR[1] PTR[0] | PTR[1]. */ | |
1505 | ||
1506 | static void | |
1507 | shift_bytes_in_array_right (unsigned char *ptr, unsigned int sz, | |
1508 | unsigned int amnt) | |
1509 | { | |
1510 | if (amnt == 0) | |
1511 | return; | |
1512 | ||
1513 | unsigned char carry_over = 0U; | |
1514 | unsigned char carry_mask = ~(~0U << amnt); | |
1515 | ||
1516 | for (unsigned int i = 0; i < sz; i++) | |
1517 | { | |
1518 | unsigned prev_carry_over = carry_over; | |
b1c71535 | 1519 | carry_over = ptr[i] & carry_mask; |
3d3e04ac | 1520 | |
a425d9af | 1521 | carry_over <<= (unsigned char) BITS_PER_UNIT - amnt; |
1522 | ptr[i] >>= amnt; | |
1523 | ptr[i] |= prev_carry_over; | |
3d3e04ac | 1524 | } |
1525 | } | |
1526 | ||
1527 | /* Clear out LEN bits starting from bit START in the byte array | |
1528 | PTR. This clears the bits to the *right* from START. | |
1529 | START must be within [0, BITS_PER_UNIT) and counts starting from | |
1530 | the least significant bit. */ | |
1531 | ||
1532 | static void | |
1533 | clear_bit_region_be (unsigned char *ptr, unsigned int start, | |
1534 | unsigned int len) | |
1535 | { | |
1536 | if (len == 0) | |
1537 | return; | |
1538 | /* Clear len bits to the right of start. */ | |
1539 | else if (len <= start + 1) | |
1540 | { | |
1541 | unsigned char mask = (~(~0U << len)); | |
1542 | mask = mask << (start + 1U - len); | |
1543 | ptr[0] &= ~mask; | |
1544 | } | |
1545 | else if (start != BITS_PER_UNIT - 1) | |
1546 | { | |
1547 | clear_bit_region_be (ptr, start, (start % BITS_PER_UNIT) + 1); | |
1548 | clear_bit_region_be (ptr + 1, BITS_PER_UNIT - 1, | |
1549 | len - (start % BITS_PER_UNIT) - 1); | |
1550 | } | |
1551 | else if (start == BITS_PER_UNIT - 1 | |
1552 | && len > BITS_PER_UNIT) | |
1553 | { | |
1554 | unsigned int nbytes = len / BITS_PER_UNIT; | |
902cb3b7 | 1555 | memset (ptr, 0, nbytes); |
3d3e04ac | 1556 | if (len % BITS_PER_UNIT != 0) |
1557 | clear_bit_region_be (ptr + nbytes, BITS_PER_UNIT - 1, | |
1558 | len % BITS_PER_UNIT); | |
1559 | } | |
1560 | else | |
1561 | gcc_unreachable (); | |
1562 | } | |
1563 | ||
1564 | /* In the byte array PTR clear the bit region starting at bit | |
1565 | START and is LEN bits wide. | |
1566 | For regions spanning multiple bytes do this recursively until we reach | |
1567 | zero LEN or a region contained within a single byte. */ | |
1568 | ||
1569 | static void | |
1570 | clear_bit_region (unsigned char *ptr, unsigned int start, | |
1571 | unsigned int len) | |
1572 | { | |
1573 | /* Degenerate base case. */ | |
1574 | if (len == 0) | |
1575 | return; | |
1576 | else if (start >= BITS_PER_UNIT) | |
1577 | clear_bit_region (ptr + 1, start - BITS_PER_UNIT, len); | |
1578 | /* Second base case. */ | |
1579 | else if ((start + len) <= BITS_PER_UNIT) | |
1580 | { | |
b1c71535 | 1581 | unsigned char mask = (~0U) << (unsigned char) (BITS_PER_UNIT - len); |
3d3e04ac | 1582 | mask >>= BITS_PER_UNIT - (start + len); |
1583 | ||
1584 | ptr[0] &= ~mask; | |
1585 | ||
1586 | return; | |
1587 | } | |
1588 | /* Clear most significant bits in a byte and proceed with the next byte. */ | |
1589 | else if (start != 0) | |
1590 | { | |
1591 | clear_bit_region (ptr, start, BITS_PER_UNIT - start); | |
3d6071e9 | 1592 | clear_bit_region (ptr + 1, 0, len - (BITS_PER_UNIT - start)); |
3d3e04ac | 1593 | } |
1594 | /* Whole bytes need to be cleared. */ | |
1595 | else if (start == 0 && len > BITS_PER_UNIT) | |
1596 | { | |
1597 | unsigned int nbytes = len / BITS_PER_UNIT; | |
7839cdcc | 1598 | /* We could recurse on each byte but we clear whole bytes, so a simple |
1599 | memset will do. */ | |
b1c71535 | 1600 | memset (ptr, '\0', nbytes); |
3d3e04ac | 1601 | /* Clear the remaining sub-byte region if there is one. */ |
1602 | if (len % BITS_PER_UNIT != 0) | |
1603 | clear_bit_region (ptr + nbytes, 0, len % BITS_PER_UNIT); | |
1604 | } | |
1605 | else | |
1606 | gcc_unreachable (); | |
1607 | } | |
1608 | ||
1609 | /* Write BITLEN bits of EXPR to the byte array PTR at | |
1610 | bit position BITPOS. PTR should contain TOTAL_BYTES elements. | |
1611 | Return true if the operation succeeded. */ | |
1612 | ||
1613 | static bool | |
1614 | encode_tree_to_bitpos (tree expr, unsigned char *ptr, int bitlen, int bitpos, | |
b1c71535 | 1615 | unsigned int total_bytes) |
3d3e04ac | 1616 | { |
1617 | unsigned int first_byte = bitpos / BITS_PER_UNIT; | |
8b48bcf8 | 1618 | tree tmp_int = expr; |
a425d9af | 1619 | bool sub_byte_op_p = ((bitlen % BITS_PER_UNIT) |
1620 | || (bitpos % BITS_PER_UNIT) | |
517be012 | 1621 | || !int_mode_for_size (bitlen, 0).exists ()); |
3d3e04ac | 1622 | |
1623 | if (!sub_byte_op_p) | |
8b48bcf8 | 1624 | return native_encode_expr (tmp_int, ptr + first_byte, total_bytes) != 0; |
3d3e04ac | 1625 | |
1626 | /* LITTLE-ENDIAN | |
1627 | We are writing a non byte-sized quantity or at a position that is not | |
1628 | at a byte boundary. | |
1629 | |--------|--------|--------| ptr + first_byte | |
1630 | ^ ^ | |
1631 | xxx xxxxxxxx xxx< bp> | |
1632 | |______EXPR____| | |
1633 | ||
b1c71535 | 1634 | First native_encode_expr EXPR into a temporary buffer and shift each |
3d3e04ac | 1635 | byte in the buffer by 'bp' (carrying the bits over as necessary). |
1636 | |00000000|00xxxxxx|xxxxxxxx| << bp = |000xxxxx|xxxxxxxx|xxx00000| | |
1637 | <------bitlen---->< bp> | |
1638 | Then we clear the destination bits: | |
1639 | |---00000|00000000|000-----| ptr + first_byte | |
1640 | <-------bitlen--->< bp> | |
1641 | ||
1642 | Finally we ORR the bytes of the shifted EXPR into the cleared region: | |
1643 | |---xxxxx||xxxxxxxx||xxx-----| ptr + first_byte. | |
1644 | ||
1645 | BIG-ENDIAN | |
1646 | We are writing a non byte-sized quantity or at a position that is not | |
1647 | at a byte boundary. | |
1648 | ptr + first_byte |--------|--------|--------| | |
1649 | ^ ^ | |
1650 | <bp >xxx xxxxxxxx xxx | |
1651 | |_____EXPR_____| | |
1652 | ||
b1c71535 | 1653 | First native_encode_expr EXPR into a temporary buffer and shift each |
3d3e04ac | 1654 | byte in the buffer to the right by (carrying the bits over as necessary). |
1655 | We shift by as much as needed to align the most significant bit of EXPR | |
1656 | with bitpos: | |
1657 | |00xxxxxx|xxxxxxxx| >> 3 = |00000xxx|xxxxxxxx|xxxxx000| | |
1658 | <---bitlen----> <bp ><-----bitlen-----> | |
1659 | Then we clear the destination bits: | |
1660 | ptr + first_byte |-----000||00000000||00000---| | |
1661 | <bp ><-------bitlen-----> | |
1662 | ||
1663 | Finally we ORR the bytes of the shifted EXPR into the cleared region: | |
1664 | ptr + first_byte |---xxxxx||xxxxxxxx||xxx-----|. | |
1665 | The awkwardness comes from the fact that bitpos is counted from the | |
1666 | most significant bit of a byte. */ | |
1667 | ||
d2401312 | 1668 | /* We must be dealing with fixed-size data at this point, since the |
1669 | total size is also fixed. */ | |
8b48bcf8 | 1670 | fixed_size_mode mode = as_a <fixed_size_mode> (TYPE_MODE (TREE_TYPE (expr))); |
3d3e04ac | 1671 | /* Allocate an extra byte so that we have space to shift into. */ |
8b48bcf8 | 1672 | unsigned int byte_size = GET_MODE_SIZE (mode) + 1; |
3d3e04ac | 1673 | unsigned char *tmpbuf = XALLOCAVEC (unsigned char, byte_size); |
b1c71535 | 1674 | memset (tmpbuf, '\0', byte_size); |
3d3e04ac | 1675 | /* The store detection code should only have allowed constants that are |
8b48bcf8 | 1676 | accepted by native_encode_expr. */ |
1677 | if (native_encode_expr (expr, tmpbuf, byte_size - 1) == 0) | |
3d3e04ac | 1678 | gcc_unreachable (); |
1679 | ||
1680 | /* The native_encode_expr machinery uses TYPE_MODE to determine how many | |
1681 | bytes to write. This means it can write more than | |
1682 | ROUND_UP (bitlen, BITS_PER_UNIT) / BITS_PER_UNIT bytes (for example | |
1683 | write 8 bytes for a bitlen of 40). Skip the bytes that are not within | |
1684 | bitlen and zero out the bits that are not relevant as well (that may | |
1685 | contain a sign bit due to sign-extension). */ | |
1686 | unsigned int padding | |
1687 | = byte_size - ROUND_UP (bitlen, BITS_PER_UNIT) / BITS_PER_UNIT - 1; | |
a425d9af | 1688 | /* On big-endian the padding is at the 'front' so just skip the initial |
1689 | bytes. */ | |
1690 | if (BYTES_BIG_ENDIAN) | |
1691 | tmpbuf += padding; | |
1692 | ||
1693 | byte_size -= padding; | |
1694 | ||
1695 | if (bitlen % BITS_PER_UNIT != 0) | |
3d3e04ac | 1696 | { |
5e922e43 | 1697 | if (BYTES_BIG_ENDIAN) |
a425d9af | 1698 | clear_bit_region_be (tmpbuf, BITS_PER_UNIT - 1, |
1699 | BITS_PER_UNIT - (bitlen % BITS_PER_UNIT)); | |
1700 | else | |
1701 | clear_bit_region (tmpbuf, bitlen, | |
1702 | byte_size * BITS_PER_UNIT - bitlen); | |
3d3e04ac | 1703 | } |
a425d9af | 1704 | /* Left shifting relies on the last byte being clear if bitlen is |
1705 | a multiple of BITS_PER_UNIT, which might not be clear if | |
1706 | there are padding bytes. */ | |
1707 | else if (!BYTES_BIG_ENDIAN) | |
1708 | tmpbuf[byte_size - 1] = '\0'; | |
3d3e04ac | 1709 | |
1710 | /* Clear the bit region in PTR where the bits from TMPBUF will be | |
b1c71535 | 1711 | inserted into. */ |
3d3e04ac | 1712 | if (BYTES_BIG_ENDIAN) |
1713 | clear_bit_region_be (ptr + first_byte, | |
1714 | BITS_PER_UNIT - 1 - (bitpos % BITS_PER_UNIT), bitlen); | |
1715 | else | |
1716 | clear_bit_region (ptr + first_byte, bitpos % BITS_PER_UNIT, bitlen); | |
1717 | ||
1718 | int shift_amnt; | |
1719 | int bitlen_mod = bitlen % BITS_PER_UNIT; | |
1720 | int bitpos_mod = bitpos % BITS_PER_UNIT; | |
1721 | ||
1722 | bool skip_byte = false; | |
1723 | if (BYTES_BIG_ENDIAN) | |
1724 | { | |
1725 | /* BITPOS and BITLEN are exactly aligned and no shifting | |
1726 | is necessary. */ | |
1727 | if (bitpos_mod + bitlen_mod == BITS_PER_UNIT | |
1728 | || (bitpos_mod == 0 && bitlen_mod == 0)) | |
1729 | shift_amnt = 0; | |
1730 | /* |. . . . . . . .| | |
1731 | <bp > <blen >. | |
1732 | We always shift right for BYTES_BIG_ENDIAN so shift the beginning | |
1733 | of the value until it aligns with 'bp' in the next byte over. */ | |
1734 | else if (bitpos_mod + bitlen_mod < BITS_PER_UNIT) | |
1735 | { | |
1736 | shift_amnt = bitlen_mod + bitpos_mod; | |
1737 | skip_byte = bitlen_mod != 0; | |
1738 | } | |
1739 | /* |. . . . . . . .| | |
1740 | <----bp---> | |
1741 | <---blen---->. | |
1742 | Shift the value right within the same byte so it aligns with 'bp'. */ | |
1743 | else | |
1744 | shift_amnt = bitlen_mod + bitpos_mod - BITS_PER_UNIT; | |
1745 | } | |
1746 | else | |
1747 | shift_amnt = bitpos % BITS_PER_UNIT; | |
1748 | ||
1749 | /* Create the shifted version of EXPR. */ | |
1750 | if (!BYTES_BIG_ENDIAN) | |
b1c71535 | 1751 | { |
1752 | shift_bytes_in_array (tmpbuf, byte_size, shift_amnt); | |
1753 | if (shift_amnt == 0) | |
1754 | byte_size--; | |
1755 | } | |
3d3e04ac | 1756 | else |
1757 | { | |
1758 | gcc_assert (BYTES_BIG_ENDIAN); | |
1759 | shift_bytes_in_array_right (tmpbuf, byte_size, shift_amnt); | |
1760 | /* If shifting right forced us to move into the next byte skip the now | |
1761 | empty byte. */ | |
1762 | if (skip_byte) | |
1763 | { | |
1764 | tmpbuf++; | |
1765 | byte_size--; | |
1766 | } | |
1767 | } | |
1768 | ||
1769 | /* Insert the bits from TMPBUF. */ | |
1770 | for (unsigned int i = 0; i < byte_size; i++) | |
1771 | ptr[first_byte + i] |= tmpbuf[i]; | |
1772 | ||
1773 | return true; | |
1774 | } | |
1775 | ||
1776 | /* Sorting function for store_immediate_info objects. | |
1777 | Sorts them by bitposition. */ | |
1778 | ||
1779 | static int | |
1780 | sort_by_bitpos (const void *x, const void *y) | |
1781 | { | |
1782 | store_immediate_info *const *tmp = (store_immediate_info * const *) x; | |
1783 | store_immediate_info *const *tmp2 = (store_immediate_info * const *) y; | |
1784 | ||
61d052e5 | 1785 | if ((*tmp)->bitpos < (*tmp2)->bitpos) |
3d3e04ac | 1786 | return -1; |
1787 | else if ((*tmp)->bitpos > (*tmp2)->bitpos) | |
1788 | return 1; | |
61d052e5 | 1789 | else |
ca4982c2 | 1790 | /* If they are the same let's use the order which is guaranteed to |
1791 | be different. */ | |
1792 | return (*tmp)->order - (*tmp2)->order; | |
3d3e04ac | 1793 | } |
1794 | ||
1795 | /* Sorting function for store_immediate_info objects. | |
1796 | Sorts them by the order field. */ | |
1797 | ||
1798 | static int | |
1799 | sort_by_order (const void *x, const void *y) | |
1800 | { | |
1801 | store_immediate_info *const *tmp = (store_immediate_info * const *) x; | |
1802 | store_immediate_info *const *tmp2 = (store_immediate_info * const *) y; | |
1803 | ||
1804 | if ((*tmp)->order < (*tmp2)->order) | |
1805 | return -1; | |
1806 | else if ((*tmp)->order > (*tmp2)->order) | |
1807 | return 1; | |
1808 | ||
1809 | gcc_unreachable (); | |
1810 | } | |
1811 | ||
1812 | /* Initialize a merged_store_group object from a store_immediate_info | |
1813 | object. */ | |
1814 | ||
1815 | merged_store_group::merged_store_group (store_immediate_info *info) | |
1816 | { | |
1817 | start = info->bitpos; | |
1818 | width = info->bitsize; | |
902cb3b7 | 1819 | bitregion_start = info->bitregion_start; |
1820 | bitregion_end = info->bitregion_end; | |
3d3e04ac | 1821 | /* VAL has memory allocated for it in apply_stores once the group |
1822 | width has been finalized. */ | |
1823 | val = NULL; | |
902cb3b7 | 1824 | mask = NULL; |
10f0d48d | 1825 | bit_insertion = false; |
e580254a | 1826 | only_constants = info->rhs_code == INTEGER_CST; |
1827 | first_nonmergeable_order = ~0U; | |
902cb3b7 | 1828 | unsigned HOST_WIDE_INT align_bitpos = 0; |
1829 | get_object_alignment_1 (gimple_assign_lhs (info->stmt), | |
1830 | &align, &align_bitpos); | |
1831 | align_base = start - align_bitpos; | |
9991d1d3 | 1832 | for (int i = 0; i < 2; ++i) |
1833 | { | |
1834 | store_operand_info &op = info->ops[i]; | |
1835 | if (op.base_addr == NULL_TREE) | |
1836 | { | |
1837 | load_align[i] = 0; | |
1838 | load_align_base[i] = 0; | |
1839 | } | |
1840 | else | |
1841 | { | |
1842 | get_object_alignment_1 (op.val, &load_align[i], &align_bitpos); | |
1843 | load_align_base[i] = op.bitpos - align_bitpos; | |
1844 | } | |
1845 | } | |
3d3e04ac | 1846 | stores.create (1); |
1847 | stores.safe_push (info); | |
1848 | last_stmt = info->stmt; | |
1849 | last_order = info->order; | |
1850 | first_stmt = last_stmt; | |
1851 | first_order = last_order; | |
1852 | buf_size = 0; | |
1853 | } | |
1854 | ||
1855 | merged_store_group::~merged_store_group () | |
1856 | { | |
1857 | if (val) | |
1858 | XDELETEVEC (val); | |
1859 | } | |
1860 | ||
f9ceb302 | 1861 | /* Return true if the store described by INFO can be merged into the group. */ |
1862 | ||
1863 | bool | |
1864 | merged_store_group::can_be_merged_into (store_immediate_info *info) | |
1865 | { | |
1866 | /* Do not merge bswap patterns. */ | |
1867 | if (info->rhs_code == LROTATE_EXPR) | |
1868 | return false; | |
1869 | ||
1870 | /* The canonical case. */ | |
1871 | if (info->rhs_code == stores[0]->rhs_code) | |
1872 | return true; | |
1873 | ||
1874 | /* BIT_INSERT_EXPR is compatible with INTEGER_CST. */ | |
1875 | if (info->rhs_code == BIT_INSERT_EXPR && stores[0]->rhs_code == INTEGER_CST) | |
1876 | return true; | |
1877 | ||
1878 | if (stores[0]->rhs_code == BIT_INSERT_EXPR && info->rhs_code == INTEGER_CST) | |
1879 | return true; | |
1880 | ||
1881 | /* We can turn MEM_REF into BIT_INSERT_EXPR for bit-field stores. */ | |
1882 | if (info->rhs_code == MEM_REF | |
1883 | && (stores[0]->rhs_code == INTEGER_CST | |
1884 | || stores[0]->rhs_code == BIT_INSERT_EXPR) | |
1885 | && info->bitregion_start == stores[0]->bitregion_start | |
1886 | && info->bitregion_end == stores[0]->bitregion_end) | |
1887 | return true; | |
1888 | ||
1889 | if (stores[0]->rhs_code == MEM_REF | |
1890 | && (info->rhs_code == INTEGER_CST | |
1891 | || info->rhs_code == BIT_INSERT_EXPR) | |
1892 | && info->bitregion_start == stores[0]->bitregion_start | |
1893 | && info->bitregion_end == stores[0]->bitregion_end) | |
1894 | return true; | |
1895 | ||
1896 | return false; | |
1897 | } | |
1898 | ||
902cb3b7 | 1899 | /* Helper method for merge_into and merge_overlapping to do |
1900 | the common part. */ | |
f9ceb302 | 1901 | |
3d3e04ac | 1902 | void |
902cb3b7 | 1903 | merged_store_group::do_merge (store_immediate_info *info) |
3d3e04ac | 1904 | { |
902cb3b7 | 1905 | bitregion_start = MIN (bitregion_start, info->bitregion_start); |
1906 | bitregion_end = MAX (bitregion_end, info->bitregion_end); | |
1907 | ||
1908 | unsigned int this_align; | |
1909 | unsigned HOST_WIDE_INT align_bitpos = 0; | |
1910 | get_object_alignment_1 (gimple_assign_lhs (info->stmt), | |
1911 | &this_align, &align_bitpos); | |
1912 | if (this_align > align) | |
1913 | { | |
1914 | align = this_align; | |
1915 | align_base = info->bitpos - align_bitpos; | |
1916 | } | |
9991d1d3 | 1917 | for (int i = 0; i < 2; ++i) |
1918 | { | |
1919 | store_operand_info &op = info->ops[i]; | |
1920 | if (!op.base_addr) | |
1921 | continue; | |
1922 | ||
1923 | get_object_alignment_1 (op.val, &this_align, &align_bitpos); | |
1924 | if (this_align > load_align[i]) | |
1925 | { | |
1926 | load_align[i] = this_align; | |
1927 | load_align_base[i] = op.bitpos - align_bitpos; | |
1928 | } | |
1929 | } | |
3d3e04ac | 1930 | |
3d3e04ac | 1931 | gimple *stmt = info->stmt; |
1932 | stores.safe_push (info); | |
1933 | if (info->order > last_order) | |
1934 | { | |
1935 | last_order = info->order; | |
1936 | last_stmt = stmt; | |
1937 | } | |
1938 | else if (info->order < first_order) | |
1939 | { | |
1940 | first_order = info->order; | |
1941 | first_stmt = stmt; | |
1942 | } | |
e580254a | 1943 | if (info->rhs_code != INTEGER_CST) |
1944 | only_constants = false; | |
3d3e04ac | 1945 | } |
1946 | ||
902cb3b7 | 1947 | /* Merge a store recorded by INFO into this merged store. |
1948 | The store is not overlapping with the existing recorded | |
1949 | stores. */ | |
1950 | ||
1951 | void | |
1952 | merged_store_group::merge_into (store_immediate_info *info) | |
1953 | { | |
902cb3b7 | 1954 | /* Make sure we're inserting in the position we think we're inserting. */ |
1955 | gcc_assert (info->bitpos >= start + width | |
1956 | && info->bitregion_start <= bitregion_end); | |
1957 | ||
cf5e422b | 1958 | width = info->bitpos + info->bitsize - start; |
902cb3b7 | 1959 | do_merge (info); |
1960 | } | |
1961 | ||
3d3e04ac | 1962 | /* Merge a store described by INFO into this merged store. |
1963 | INFO overlaps in some way with the current store (i.e. it's not contiguous | |
1964 | which is handled by merged_store_group::merge_into). */ | |
1965 | ||
1966 | void | |
1967 | merged_store_group::merge_overlapping (store_immediate_info *info) | |
1968 | { | |
3d3e04ac | 1969 | /* If the store extends the size of the group, extend the width. */ |
902cb3b7 | 1970 | if (info->bitpos + info->bitsize > start + width) |
cf5e422b | 1971 | width = info->bitpos + info->bitsize - start; |
3d3e04ac | 1972 | |
902cb3b7 | 1973 | do_merge (info); |
3d3e04ac | 1974 | } |
1975 | ||
1976 | /* Go through all the recorded stores in this group in program order and | |
1977 | apply their values to the VAL byte array to create the final merged | |
1978 | value. Return true if the operation succeeded. */ | |
1979 | ||
1980 | bool | |
1981 | merged_store_group::apply_stores () | |
1982 | { | |
902cb3b7 | 1983 | /* Make sure we have more than one store in the group, otherwise we cannot |
1984 | merge anything. */ | |
1985 | if (bitregion_start % BITS_PER_UNIT != 0 | |
1986 | || bitregion_end % BITS_PER_UNIT != 0 | |
3d3e04ac | 1987 | || stores.length () == 1) |
1988 | return false; | |
1989 | ||
1990 | stores.qsort (sort_by_order); | |
902cb3b7 | 1991 | store_immediate_info *info; |
3d3e04ac | 1992 | unsigned int i; |
10f0d48d | 1993 | /* Create a power-of-2-sized buffer for native_encode_expr. */ |
1994 | buf_size = 1 << ceil_log2 ((bitregion_end - bitregion_start) / BITS_PER_UNIT); | |
902cb3b7 | 1995 | val = XNEWVEC (unsigned char, 2 * buf_size); |
1996 | mask = val + buf_size; | |
1997 | memset (val, 0, buf_size); | |
1998 | memset (mask, ~0U, buf_size); | |
3d3e04ac | 1999 | |
2000 | FOR_EACH_VEC_ELT (stores, i, info) | |
2001 | { | |
902cb3b7 | 2002 | unsigned int pos_in_buffer = info->bitpos - bitregion_start; |
10f0d48d | 2003 | tree cst; |
9991d1d3 | 2004 | if (info->ops[0].val && info->ops[0].base_addr == NULL_TREE) |
2005 | cst = info->ops[0].val; | |
2006 | else if (info->ops[1].val && info->ops[1].base_addr == NULL_TREE) | |
2007 | cst = info->ops[1].val; | |
10f0d48d | 2008 | else |
2009 | cst = NULL_TREE; | |
9991d1d3 | 2010 | bool ret = true; |
2011 | if (cst) | |
10f0d48d | 2012 | { |
2013 | if (info->rhs_code == BIT_INSERT_EXPR) | |
2014 | bit_insertion = true; | |
2015 | else | |
2016 | ret = encode_tree_to_bitpos (cst, val, info->bitsize, | |
2017 | pos_in_buffer, buf_size); | |
2018 | } | |
2019 | unsigned char *m = mask + (pos_in_buffer / BITS_PER_UNIT); | |
2020 | if (BYTES_BIG_ENDIAN) | |
2021 | clear_bit_region_be (m, (BITS_PER_UNIT - 1 | |
2022 | - (pos_in_buffer % BITS_PER_UNIT)), | |
2023 | info->bitsize); | |
2024 | else | |
2025 | clear_bit_region (m, pos_in_buffer % BITS_PER_UNIT, info->bitsize); | |
9991d1d3 | 2026 | if (cst && dump_file && (dump_flags & TDF_DETAILS)) |
3d3e04ac | 2027 | { |
2028 | if (ret) | |
2029 | { | |
10f0d48d | 2030 | fputs ("After writing ", dump_file); |
54e7de93 | 2031 | print_generic_expr (dump_file, cst, TDF_NONE); |
3d3e04ac | 2032 | fprintf (dump_file, " of size " HOST_WIDE_INT_PRINT_DEC |
10f0d48d | 2033 | " at position %d\n", info->bitsize, pos_in_buffer); |
2034 | fputs (" the merged value contains ", dump_file); | |
3d3e04ac | 2035 | dump_char_array (dump_file, val, buf_size); |
10f0d48d | 2036 | fputs (" the merged mask contains ", dump_file); |
2037 | dump_char_array (dump_file, mask, buf_size); | |
2038 | if (bit_insertion) | |
2039 | fputs (" bit insertion is required\n", dump_file); | |
3d3e04ac | 2040 | } |
2041 | else | |
2042 | fprintf (dump_file, "Failed to merge stores\n"); | |
509ab8cd | 2043 | } |
3d3e04ac | 2044 | if (!ret) |
2045 | return false; | |
2046 | } | |
509ab8cd | 2047 | stores.qsort (sort_by_bitpos); |
3d3e04ac | 2048 | return true; |
2049 | } | |
2050 | ||
2051 | /* Structure describing the store chain. */ | |
2052 | ||
2053 | struct imm_store_chain_info | |
2054 | { | |
3a3ba7de | 2055 | /* Doubly-linked list that imposes an order on chain processing. |
2056 | PNXP (prev's next pointer) points to the head of a list, or to | |
2057 | the next field in the previous chain in the list. | |
2058 | See pass_store_merging::m_stores_head for more rationale. */ | |
2059 | imm_store_chain_info *next, **pnxp; | |
f85e7cb7 | 2060 | tree base_addr; |
902cb3b7 | 2061 | auto_vec<store_immediate_info *> m_store_info; |
3d3e04ac | 2062 | auto_vec<merged_store_group *> m_merged_store_groups; |
2063 | ||
3a3ba7de | 2064 | imm_store_chain_info (imm_store_chain_info *&inspt, tree b_a) |
2065 | : next (inspt), pnxp (&inspt), base_addr (b_a) | |
2066 | { | |
2067 | inspt = this; | |
2068 | if (next) | |
2069 | { | |
2070 | gcc_checking_assert (pnxp == next->pnxp); | |
2071 | next->pnxp = &next; | |
2072 | } | |
2073 | } | |
2074 | ~imm_store_chain_info () | |
2075 | { | |
2076 | *pnxp = next; | |
2077 | if (next) | |
2078 | { | |
2079 | gcc_checking_assert (&next == next->pnxp); | |
2080 | next->pnxp = pnxp; | |
2081 | } | |
2082 | } | |
f85e7cb7 | 2083 | bool terminate_and_process_chain (); |
509ab8cd | 2084 | bool try_coalesce_bswap (merged_store_group *, unsigned int, unsigned int); |
3d3e04ac | 2085 | bool coalesce_immediate_stores (); |
f85e7cb7 | 2086 | bool output_merged_store (merged_store_group *); |
2087 | bool output_merged_stores (); | |
3d3e04ac | 2088 | }; |
2089 | ||
2090 | const pass_data pass_data_tree_store_merging = { | |
2091 | GIMPLE_PASS, /* type */ | |
2092 | "store-merging", /* name */ | |
2093 | OPTGROUP_NONE, /* optinfo_flags */ | |
2094 | TV_GIMPLE_STORE_MERGING, /* tv_id */ | |
2095 | PROP_ssa, /* properties_required */ | |
2096 | 0, /* properties_provided */ | |
2097 | 0, /* properties_destroyed */ | |
2098 | 0, /* todo_flags_start */ | |
2099 | TODO_update_ssa, /* todo_flags_finish */ | |
2100 | }; | |
2101 | ||
2102 | class pass_store_merging : public gimple_opt_pass | |
2103 | { | |
2104 | public: | |
2105 | pass_store_merging (gcc::context *ctxt) | |
2d27e5c1 | 2106 | : gimple_opt_pass (pass_data_tree_store_merging, ctxt), m_stores_head () |
3d3e04ac | 2107 | { |
2108 | } | |
2109 | ||
10f0d48d | 2110 | /* Pass not supported for PDP-endian, nor for insane hosts or |
2111 | target character sizes where native_{encode,interpret}_expr | |
902cb3b7 | 2112 | doesn't work properly. */ |
3d3e04ac | 2113 | virtual bool |
2114 | gate (function *) | |
2115 | { | |
902cb3b7 | 2116 | return flag_store_merging |
10f0d48d | 2117 | && BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN |
902cb3b7 | 2118 | && CHAR_BIT == 8 |
2119 | && BITS_PER_UNIT == 8; | |
3d3e04ac | 2120 | } |
2121 | ||
2122 | virtual unsigned int execute (function *); | |
2123 | ||
2124 | private: | |
2125 | hash_map<tree_operand_hash, struct imm_store_chain_info *> m_stores; | |
2126 | ||
3a3ba7de | 2127 | /* Form a doubly-linked stack of the elements of m_stores, so that |
2128 | we can iterate over them in a predictable way. Using this order | |
2129 | avoids extraneous differences in the compiler output just because | |
2130 | of tree pointer variations (e.g. different chains end up in | |
2131 | different positions of m_stores, so they are handled in different | |
2132 | orders, so they allocate or release SSA names in different | |
2133 | orders, and when they get reused, subsequent passes end up | |
2134 | getting different SSA names, which may ultimately change | |
2135 | decisions when going out of SSA). */ | |
2136 | imm_store_chain_info *m_stores_head; | |
2137 | ||
9991d1d3 | 2138 | void process_store (gimple *); |
3d3e04ac | 2139 | bool terminate_and_process_all_chains (); |
c35548ce | 2140 | bool terminate_all_aliasing_chains (imm_store_chain_info **, gimple *); |
f85e7cb7 | 2141 | bool terminate_and_release_chain (imm_store_chain_info *); |
3d3e04ac | 2142 | }; // class pass_store_merging |
2143 | ||
2144 | /* Terminate and process all recorded chains. Return true if any changes | |
2145 | were made. */ | |
2146 | ||
2147 | bool | |
2148 | pass_store_merging::terminate_and_process_all_chains () | |
2149 | { | |
3d3e04ac | 2150 | bool ret = false; |
3a3ba7de | 2151 | while (m_stores_head) |
2152 | ret |= terminate_and_release_chain (m_stores_head); | |
2153 | gcc_assert (m_stores.elements () == 0); | |
2154 | gcc_assert (m_stores_head == NULL); | |
3d3e04ac | 2155 | |
2156 | return ret; | |
2157 | } | |
2158 | ||
c35548ce | 2159 | /* Terminate all chains that are affected by the statement STMT. |
2160 | CHAIN_INFO is the chain we should ignore from the checks if | |
2161 | non-NULL. */ | |
3d3e04ac | 2162 | |
2163 | bool | |
4de7f8df | 2164 | pass_store_merging::terminate_all_aliasing_chains (imm_store_chain_info |
f85e7cb7 | 2165 | **chain_info, |
3d3e04ac | 2166 | gimple *stmt) |
2167 | { | |
2168 | bool ret = false; | |
2169 | ||
2170 | /* If the statement doesn't touch memory it can't alias. */ | |
2171 | if (!gimple_vuse (stmt)) | |
2172 | return false; | |
2173 | ||
9fead2ab | 2174 | tree store_lhs = gimple_store_p (stmt) ? gimple_get_lhs (stmt) : NULL_TREE; |
c35548ce | 2175 | for (imm_store_chain_info *next = m_stores_head, *cur = next; cur; cur = next) |
3d3e04ac | 2176 | { |
c35548ce | 2177 | next = cur->next; |
2178 | ||
2179 | /* We already checked all the stores in chain_info and terminated the | |
2180 | chain if necessary. Skip it here. */ | |
2181 | if (chain_info && *chain_info == cur) | |
2182 | continue; | |
2183 | ||
9991d1d3 | 2184 | store_immediate_info *info; |
2185 | unsigned int i; | |
c35548ce | 2186 | FOR_EACH_VEC_ELT (cur->m_store_info, i, info) |
3d3e04ac | 2187 | { |
9fead2ab | 2188 | tree lhs = gimple_assign_lhs (info->stmt); |
2189 | if (ref_maybe_used_by_stmt_p (stmt, lhs) | |
2190 | || stmt_may_clobber_ref_p (stmt, lhs) | |
2191 | || (store_lhs && refs_output_dependent_p (store_lhs, lhs))) | |
3d3e04ac | 2192 | { |
9991d1d3 | 2193 | if (dump_file && (dump_flags & TDF_DETAILS)) |
3d3e04ac | 2194 | { |
9991d1d3 | 2195 | fprintf (dump_file, "stmt causes chain termination:\n"); |
2196 | print_gimple_stmt (dump_file, stmt, 0); | |
3d3e04ac | 2197 | } |
c35548ce | 2198 | terminate_and_release_chain (cur); |
9991d1d3 | 2199 | ret = true; |
2200 | break; | |
3d3e04ac | 2201 | } |
2202 | } | |
2203 | } | |
2204 | ||
3d3e04ac | 2205 | return ret; |
2206 | } | |
2207 | ||
2208 | /* Helper function. Terminate the recorded chain storing to base object | |
2209 | BASE. Return true if the merging and output was successful. The m_stores | |
2210 | entry is removed after the processing in any case. */ | |
2211 | ||
2212 | bool | |
f85e7cb7 | 2213 | pass_store_merging::terminate_and_release_chain (imm_store_chain_info *chain_info) |
3d3e04ac | 2214 | { |
f85e7cb7 | 2215 | bool ret = chain_info->terminate_and_process_chain (); |
2216 | m_stores.remove (chain_info->base_addr); | |
2217 | delete chain_info; | |
3d3e04ac | 2218 | return ret; |
2219 | } | |
2220 | ||
9991d1d3 | 2221 | /* Return true if stmts in between FIRST (inclusive) and LAST (exclusive) |
2222 | may clobber REF. FIRST and LAST must be in the same basic block and | |
509ab8cd | 2223 | have non-NULL vdef. We want to be able to sink load of REF across |
2224 | stores between FIRST and LAST, up to right before LAST. */ | |
9991d1d3 | 2225 | |
2226 | bool | |
2227 | stmts_may_clobber_ref_p (gimple *first, gimple *last, tree ref) | |
2228 | { | |
2229 | ao_ref r; | |
2230 | ao_ref_init (&r, ref); | |
2231 | unsigned int count = 0; | |
2232 | tree vop = gimple_vdef (last); | |
2233 | gimple *stmt; | |
2234 | ||
2235 | gcc_checking_assert (gimple_bb (first) == gimple_bb (last)); | |
2236 | do | |
2237 | { | |
2238 | stmt = SSA_NAME_DEF_STMT (vop); | |
2239 | if (stmt_may_clobber_ref_p_1 (stmt, &r)) | |
2240 | return true; | |
509ab8cd | 2241 | if (gimple_store_p (stmt) |
2242 | && refs_anti_dependent_p (ref, gimple_get_lhs (stmt))) | |
2243 | return true; | |
9991d1d3 | 2244 | /* Avoid quadratic compile time by bounding the number of checks |
2245 | we perform. */ | |
2246 | if (++count > MAX_STORE_ALIAS_CHECKS) | |
2247 | return true; | |
2248 | vop = gimple_vuse (stmt); | |
2249 | } | |
2250 | while (stmt != first); | |
2251 | return false; | |
2252 | } | |
2253 | ||
2254 | /* Return true if INFO->ops[IDX] is mergeable with the | |
2255 | corresponding loads already in MERGED_STORE group. | |
2256 | BASE_ADDR is the base address of the whole store group. */ | |
2257 | ||
2258 | bool | |
2259 | compatible_load_p (merged_store_group *merged_store, | |
2260 | store_immediate_info *info, | |
2261 | tree base_addr, int idx) | |
2262 | { | |
2263 | store_immediate_info *infof = merged_store->stores[0]; | |
2264 | if (!info->ops[idx].base_addr | |
e61263f2 | 2265 | || maybe_ne (info->ops[idx].bitpos - infof->ops[idx].bitpos, |
2266 | info->bitpos - infof->bitpos) | |
9991d1d3 | 2267 | || !operand_equal_p (info->ops[idx].base_addr, |
2268 | infof->ops[idx].base_addr, 0)) | |
2269 | return false; | |
2270 | ||
2271 | store_immediate_info *infol = merged_store->stores.last (); | |
2272 | tree load_vuse = gimple_vuse (info->ops[idx].stmt); | |
2273 | /* In this case all vuses should be the same, e.g. | |
2274 | _1 = s.a; _2 = s.b; _3 = _1 | 1; t.a = _3; _4 = _2 | 2; t.b = _4; | |
2275 | or | |
2276 | _1 = s.a; _2 = s.b; t.a = _1; t.b = _2; | |
2277 | and we can emit the coalesced load next to any of those loads. */ | |
2278 | if (gimple_vuse (infof->ops[idx].stmt) == load_vuse | |
2279 | && gimple_vuse (infol->ops[idx].stmt) == load_vuse) | |
2280 | return true; | |
2281 | ||
2282 | /* Otherwise, at least for now require that the load has the same | |
2283 | vuse as the store. See following examples. */ | |
2284 | if (gimple_vuse (info->stmt) != load_vuse) | |
2285 | return false; | |
2286 | ||
2287 | if (gimple_vuse (infof->stmt) != gimple_vuse (infof->ops[idx].stmt) | |
2288 | || (infof != infol | |
2289 | && gimple_vuse (infol->stmt) != gimple_vuse (infol->ops[idx].stmt))) | |
2290 | return false; | |
2291 | ||
2292 | /* If the load is from the same location as the store, already | |
2293 | the construction of the immediate chain info guarantees no intervening | |
2294 | stores, so no further checks are needed. Example: | |
2295 | _1 = s.a; _2 = _1 & -7; s.a = _2; _3 = s.b; _4 = _3 & -7; s.b = _4; */ | |
e61263f2 | 2296 | if (known_eq (info->ops[idx].bitpos, info->bitpos) |
9991d1d3 | 2297 | && operand_equal_p (info->ops[idx].base_addr, base_addr, 0)) |
2298 | return true; | |
2299 | ||
2300 | /* Otherwise, we need to punt if any of the loads can be clobbered by any | |
2301 | of the stores in the group, or any other stores in between those. | |
2302 | Previous calls to compatible_load_p ensured that for all the | |
2303 | merged_store->stores IDX loads, no stmts starting with | |
2304 | merged_store->first_stmt and ending right before merged_store->last_stmt | |
2305 | clobbers those loads. */ | |
2306 | gimple *first = merged_store->first_stmt; | |
2307 | gimple *last = merged_store->last_stmt; | |
2308 | unsigned int i; | |
2309 | store_immediate_info *infoc; | |
2310 | /* The stores are sorted by increasing store bitpos, so if info->stmt store | |
2311 | comes before the so far first load, we'll be changing | |
2312 | merged_store->first_stmt. In that case we need to give up if | |
2313 | any of the earlier processed loads clobber with the stmts in the new | |
2314 | range. */ | |
2315 | if (info->order < merged_store->first_order) | |
2316 | { | |
2317 | FOR_EACH_VEC_ELT (merged_store->stores, i, infoc) | |
2318 | if (stmts_may_clobber_ref_p (info->stmt, first, infoc->ops[idx].val)) | |
2319 | return false; | |
2320 | first = info->stmt; | |
2321 | } | |
2322 | /* Similarly, we could change merged_store->last_stmt, so ensure | |
2323 | in that case no stmts in the new range clobber any of the earlier | |
2324 | processed loads. */ | |
2325 | else if (info->order > merged_store->last_order) | |
2326 | { | |
2327 | FOR_EACH_VEC_ELT (merged_store->stores, i, infoc) | |
2328 | if (stmts_may_clobber_ref_p (last, info->stmt, infoc->ops[idx].val)) | |
2329 | return false; | |
2330 | last = info->stmt; | |
2331 | } | |
2332 | /* And finally, we'd be adding a new load to the set, ensure it isn't | |
2333 | clobbered in the new range. */ | |
2334 | if (stmts_may_clobber_ref_p (first, last, info->ops[idx].val)) | |
2335 | return false; | |
2336 | ||
2337 | /* Otherwise, we are looking for: | |
2338 | _1 = s.a; _2 = _1 ^ 15; t.a = _2; _3 = s.b; _4 = _3 ^ 15; t.b = _4; | |
2339 | or | |
2340 | _1 = s.a; t.a = _1; _2 = s.b; t.b = _2; */ | |
2341 | return true; | |
2342 | } | |
2343 | ||
509ab8cd | 2344 | /* Add all refs loaded to compute VAL to REFS vector. */ |
2345 | ||
2346 | void | |
2347 | gather_bswap_load_refs (vec<tree> *refs, tree val) | |
2348 | { | |
2349 | if (TREE_CODE (val) != SSA_NAME) | |
2350 | return; | |
2351 | ||
2352 | gimple *stmt = SSA_NAME_DEF_STMT (val); | |
2353 | if (!is_gimple_assign (stmt)) | |
2354 | return; | |
2355 | ||
2356 | if (gimple_assign_load_p (stmt)) | |
2357 | { | |
2358 | refs->safe_push (gimple_assign_rhs1 (stmt)); | |
2359 | return; | |
2360 | } | |
2361 | ||
2362 | switch (gimple_assign_rhs_class (stmt)) | |
2363 | { | |
2364 | case GIMPLE_BINARY_RHS: | |
2365 | gather_bswap_load_refs (refs, gimple_assign_rhs2 (stmt)); | |
2366 | /* FALLTHRU */ | |
2367 | case GIMPLE_UNARY_RHS: | |
2368 | gather_bswap_load_refs (refs, gimple_assign_rhs1 (stmt)); | |
2369 | break; | |
2370 | default: | |
2371 | gcc_unreachable (); | |
2372 | } | |
2373 | } | |
2374 | ||
cf5e422b | 2375 | /* Check if there are any stores in M_STORE_INFO after index I |
2376 | (where M_STORE_INFO must be sorted by sort_by_bitpos) that overlap | |
2377 | a potential group ending with END that have their order | |
2378 | smaller than LAST_ORDER. RHS_CODE is the kind of store in the | |
2379 | group. Return true if there are no such stores. | |
2380 | Consider: | |
2381 | MEM[(long long int *)p_28] = 0; | |
2382 | MEM[(long long int *)p_28 + 8B] = 0; | |
2383 | MEM[(long long int *)p_28 + 16B] = 0; | |
2384 | MEM[(long long int *)p_28 + 24B] = 0; | |
2385 | _129 = (int) _130; | |
2386 | MEM[(int *)p_28 + 8B] = _129; | |
2387 | MEM[(int *)p_28].a = -1; | |
2388 | We already have | |
2389 | MEM[(long long int *)p_28] = 0; | |
2390 | MEM[(int *)p_28].a = -1; | |
2391 | stmts in the current group and need to consider if it is safe to | |
2392 | add MEM[(long long int *)p_28 + 8B] = 0; store into the same group. | |
2393 | There is an overlap between that store and the MEM[(int *)p_28 + 8B] = _129; | |
2394 | store though, so if we add the MEM[(long long int *)p_28 + 8B] = 0; | |
2395 | into the group and merging of those 3 stores is successful, merged | |
2396 | stmts will be emitted at the latest store from that group, i.e. | |
2397 | LAST_ORDER, which is the MEM[(int *)p_28].a = -1; store. | |
2398 | The MEM[(int *)p_28 + 8B] = _129; store that originally follows | |
2399 | the MEM[(long long int *)p_28 + 8B] = 0; would now be before it, | |
2400 | so we need to refuse merging MEM[(long long int *)p_28 + 8B] = 0; | |
2401 | into the group. That way it will be its own store group and will | |
2402 | not be touched. If RHS_CODE is INTEGER_CST and there are overlapping | |
2403 | INTEGER_CST stores, those are mergeable using merge_overlapping, | |
2404 | so don't return false for those. */ | |
2405 | ||
2406 | static bool | |
2407 | check_no_overlap (vec<store_immediate_info *> m_store_info, unsigned int i, | |
2408 | enum tree_code rhs_code, unsigned int last_order, | |
2409 | unsigned HOST_WIDE_INT end) | |
2410 | { | |
2411 | unsigned int len = m_store_info.length (); | |
2412 | for (++i; i < len; ++i) | |
2413 | { | |
2414 | store_immediate_info *info = m_store_info[i]; | |
2415 | if (info->bitpos >= end) | |
2416 | break; | |
2417 | if (info->order < last_order | |
2418 | && (rhs_code != INTEGER_CST || info->rhs_code != INTEGER_CST)) | |
2419 | return false; | |
2420 | } | |
2421 | return true; | |
2422 | } | |
2423 | ||
509ab8cd | 2424 | /* Return true if m_store_info[first] and at least one following store |
2425 | form a group which store try_size bitsize value which is byte swapped | |
2426 | from a memory load or some value, or identity from some value. | |
2427 | This uses the bswap pass APIs. */ | |
2428 | ||
2429 | bool | |
2430 | imm_store_chain_info::try_coalesce_bswap (merged_store_group *merged_store, | |
2431 | unsigned int first, | |
2432 | unsigned int try_size) | |
2433 | { | |
2434 | unsigned int len = m_store_info.length (), last = first; | |
2435 | unsigned HOST_WIDE_INT width = m_store_info[first]->bitsize; | |
2436 | if (width >= try_size) | |
2437 | return false; | |
2438 | for (unsigned int i = first + 1; i < len; ++i) | |
2439 | { | |
2440 | if (m_store_info[i]->bitpos != m_store_info[first]->bitpos + width | |
2441 | || m_store_info[i]->ins_stmt == NULL) | |
2442 | return false; | |
2443 | width += m_store_info[i]->bitsize; | |
2444 | if (width >= try_size) | |
2445 | { | |
2446 | last = i; | |
2447 | break; | |
2448 | } | |
2449 | } | |
2450 | if (width != try_size) | |
2451 | return false; | |
2452 | ||
2453 | bool allow_unaligned | |
2454 | = !STRICT_ALIGNMENT && PARAM_VALUE (PARAM_STORE_MERGING_ALLOW_UNALIGNED); | |
2455 | /* Punt if the combined store would not be aligned and we need alignment. */ | |
2456 | if (!allow_unaligned) | |
2457 | { | |
2458 | unsigned int align = merged_store->align; | |
2459 | unsigned HOST_WIDE_INT align_base = merged_store->align_base; | |
2460 | for (unsigned int i = first + 1; i <= last; ++i) | |
2461 | { | |
2462 | unsigned int this_align; | |
2463 | unsigned HOST_WIDE_INT align_bitpos = 0; | |
2464 | get_object_alignment_1 (gimple_assign_lhs (m_store_info[i]->stmt), | |
2465 | &this_align, &align_bitpos); | |
2466 | if (this_align > align) | |
2467 | { | |
2468 | align = this_align; | |
2469 | align_base = m_store_info[i]->bitpos - align_bitpos; | |
2470 | } | |
2471 | } | |
2472 | unsigned HOST_WIDE_INT align_bitpos | |
2473 | = (m_store_info[first]->bitpos - align_base) & (align - 1); | |
2474 | if (align_bitpos) | |
2475 | align = least_bit_hwi (align_bitpos); | |
2476 | if (align < try_size) | |
2477 | return false; | |
2478 | } | |
2479 | ||
2480 | tree type; | |
2481 | switch (try_size) | |
2482 | { | |
2483 | case 16: type = uint16_type_node; break; | |
2484 | case 32: type = uint32_type_node; break; | |
2485 | case 64: type = uint64_type_node; break; | |
2486 | default: gcc_unreachable (); | |
2487 | } | |
2488 | struct symbolic_number n; | |
2489 | gimple *ins_stmt = NULL; | |
2490 | int vuse_store = -1; | |
2491 | unsigned int first_order = merged_store->first_order; | |
2492 | unsigned int last_order = merged_store->last_order; | |
2493 | gimple *first_stmt = merged_store->first_stmt; | |
2494 | gimple *last_stmt = merged_store->last_stmt; | |
cf5e422b | 2495 | unsigned HOST_WIDE_INT end = merged_store->start + merged_store->width; |
509ab8cd | 2496 | store_immediate_info *infof = m_store_info[first]; |
2497 | ||
2498 | for (unsigned int i = first; i <= last; ++i) | |
2499 | { | |
2500 | store_immediate_info *info = m_store_info[i]; | |
2501 | struct symbolic_number this_n = info->n; | |
2502 | this_n.type = type; | |
2503 | if (!this_n.base_addr) | |
2504 | this_n.range = try_size / BITS_PER_UNIT; | |
58cff6a2 | 2505 | else |
2506 | /* Update vuse in case it has changed by output_merged_stores. */ | |
2507 | this_n.vuse = gimple_vuse (info->ins_stmt); | |
509ab8cd | 2508 | unsigned int bitpos = info->bitpos - infof->bitpos; |
2509 | if (!do_shift_rotate (LSHIFT_EXPR, &this_n, | |
2510 | BYTES_BIG_ENDIAN | |
2511 | ? try_size - info->bitsize - bitpos | |
2512 | : bitpos)) | |
2513 | return false; | |
1636105f | 2514 | if (this_n.base_addr && vuse_store) |
509ab8cd | 2515 | { |
2516 | unsigned int j; | |
2517 | for (j = first; j <= last; ++j) | |
2518 | if (this_n.vuse == gimple_vuse (m_store_info[j]->stmt)) | |
2519 | break; | |
2520 | if (j > last) | |
2521 | { | |
2522 | if (vuse_store == 1) | |
2523 | return false; | |
2524 | vuse_store = 0; | |
2525 | } | |
2526 | } | |
2527 | if (i == first) | |
2528 | { | |
2529 | n = this_n; | |
2530 | ins_stmt = info->ins_stmt; | |
2531 | } | |
2532 | else | |
2533 | { | |
cf5e422b | 2534 | if (n.base_addr && n.vuse != this_n.vuse) |
509ab8cd | 2535 | { |
cf5e422b | 2536 | if (vuse_store == 0) |
2537 | return false; | |
2538 | vuse_store = 1; | |
509ab8cd | 2539 | } |
cf5e422b | 2540 | if (info->order > last_order) |
2541 | { | |
2542 | last_order = info->order; | |
2543 | last_stmt = info->stmt; | |
2544 | } | |
2545 | else if (info->order < first_order) | |
2546 | { | |
2547 | first_order = info->order; | |
2548 | first_stmt = info->stmt; | |
2549 | } | |
2550 | end = MAX (end, info->bitpos + info->bitsize); | |
509ab8cd | 2551 | |
2552 | ins_stmt = perform_symbolic_merge (ins_stmt, &n, info->ins_stmt, | |
2553 | &this_n, &n); | |
2554 | if (ins_stmt == NULL) | |
2555 | return false; | |
2556 | } | |
2557 | } | |
2558 | ||
2559 | uint64_t cmpxchg, cmpnop; | |
2560 | find_bswap_or_nop_finalize (&n, &cmpxchg, &cmpnop); | |
2561 | ||
2562 | /* A complete byte swap should make the symbolic number to start with | |
2563 | the largest digit in the highest order byte. Unchanged symbolic | |
2564 | number indicates a read with same endianness as target architecture. */ | |
2565 | if (n.n != cmpnop && n.n != cmpxchg) | |
2566 | return false; | |
2567 | ||
2568 | if (n.base_addr == NULL_TREE && !is_gimple_val (n.src)) | |
2569 | return false; | |
2570 | ||
cf5e422b | 2571 | if (!check_no_overlap (m_store_info, last, LROTATE_EXPR, last_order, end)) |
2572 | return false; | |
2573 | ||
509ab8cd | 2574 | /* Don't handle memory copy this way if normal non-bswap processing |
2575 | would handle it too. */ | |
2576 | if (n.n == cmpnop && (unsigned) n.n_ops == last - first + 1) | |
2577 | { | |
2578 | unsigned int i; | |
2579 | for (i = first; i <= last; ++i) | |
2580 | if (m_store_info[i]->rhs_code != MEM_REF) | |
2581 | break; | |
2582 | if (i == last + 1) | |
2583 | return false; | |
2584 | } | |
2585 | ||
2586 | if (n.n == cmpxchg) | |
2587 | switch (try_size) | |
2588 | { | |
2589 | case 16: | |
2590 | /* Will emit LROTATE_EXPR. */ | |
2591 | break; | |
2592 | case 32: | |
2593 | if (builtin_decl_explicit_p (BUILT_IN_BSWAP32) | |
2594 | && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing) | |
2595 | break; | |
2596 | return false; | |
2597 | case 64: | |
2598 | if (builtin_decl_explicit_p (BUILT_IN_BSWAP64) | |
2599 | && optab_handler (bswap_optab, DImode) != CODE_FOR_nothing) | |
2600 | break; | |
2601 | return false; | |
2602 | default: | |
2603 | gcc_unreachable (); | |
2604 | } | |
2605 | ||
2606 | if (!allow_unaligned && n.base_addr) | |
2607 | { | |
2608 | unsigned int align = get_object_alignment (n.src); | |
2609 | if (align < try_size) | |
2610 | return false; | |
2611 | } | |
2612 | ||
2613 | /* If each load has vuse of the corresponding store, need to verify | |
2614 | the loads can be sunk right before the last store. */ | |
2615 | if (vuse_store == 1) | |
2616 | { | |
2617 | auto_vec<tree, 64> refs; | |
2618 | for (unsigned int i = first; i <= last; ++i) | |
2619 | gather_bswap_load_refs (&refs, | |
2620 | gimple_assign_rhs1 (m_store_info[i]->stmt)); | |
2621 | ||
2622 | unsigned int i; | |
2623 | tree ref; | |
2624 | FOR_EACH_VEC_ELT (refs, i, ref) | |
2625 | if (stmts_may_clobber_ref_p (first_stmt, last_stmt, ref)) | |
2626 | return false; | |
2627 | n.vuse = NULL_TREE; | |
2628 | } | |
2629 | ||
2630 | infof->n = n; | |
2631 | infof->ins_stmt = ins_stmt; | |
2632 | for (unsigned int i = first; i <= last; ++i) | |
2633 | { | |
2634 | m_store_info[i]->rhs_code = n.n == cmpxchg ? LROTATE_EXPR : NOP_EXPR; | |
2635 | m_store_info[i]->ops[0].base_addr = NULL_TREE; | |
2636 | m_store_info[i]->ops[1].base_addr = NULL_TREE; | |
2637 | if (i != first) | |
2638 | merged_store->merge_into (m_store_info[i]); | |
2639 | } | |
2640 | ||
2641 | return true; | |
2642 | } | |
2643 | ||
3d3e04ac | 2644 | /* Go through the candidate stores recorded in m_store_info and merge them |
2645 | into merged_store_group objects recorded into m_merged_store_groups | |
2646 | representing the widened stores. Return true if coalescing was successful | |
2647 | and the number of widened stores is fewer than the original number | |
2648 | of stores. */ | |
2649 | ||
2650 | bool | |
2651 | imm_store_chain_info::coalesce_immediate_stores () | |
2652 | { | |
2653 | /* Anything less can't be processed. */ | |
2654 | if (m_store_info.length () < 2) | |
2655 | return false; | |
2656 | ||
2657 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
10f0d48d | 2658 | fprintf (dump_file, "Attempting to coalesce %u stores in chain\n", |
3d3e04ac | 2659 | m_store_info.length ()); |
2660 | ||
2661 | store_immediate_info *info; | |
509ab8cd | 2662 | unsigned int i, ignore = 0; |
3d3e04ac | 2663 | |
2664 | /* Order the stores by the bitposition they write to. */ | |
2665 | m_store_info.qsort (sort_by_bitpos); | |
2666 | ||
2667 | info = m_store_info[0]; | |
2668 | merged_store_group *merged_store = new merged_store_group (info); | |
10f0d48d | 2669 | if (dump_file && (dump_flags & TDF_DETAILS)) |
2670 | fputs ("New store group\n", dump_file); | |
3d3e04ac | 2671 | |
2672 | FOR_EACH_VEC_ELT (m_store_info, i, info) | |
2673 | { | |
509ab8cd | 2674 | if (i <= ignore) |
10f0d48d | 2675 | goto done; |
3d3e04ac | 2676 | |
509ab8cd | 2677 | /* First try to handle group of stores like: |
2678 | p[0] = data >> 24; | |
2679 | p[1] = data >> 16; | |
2680 | p[2] = data >> 8; | |
2681 | p[3] = data; | |
2682 | using the bswap framework. */ | |
2683 | if (info->bitpos == merged_store->start + merged_store->width | |
2684 | && merged_store->stores.length () == 1 | |
2685 | && merged_store->stores[0]->ins_stmt != NULL | |
2686 | && info->ins_stmt != NULL) | |
2687 | { | |
2688 | unsigned int try_size; | |
2689 | for (try_size = 64; try_size >= 16; try_size >>= 1) | |
2690 | if (try_coalesce_bswap (merged_store, i - 1, try_size)) | |
2691 | break; | |
2692 | ||
2693 | if (try_size >= 16) | |
2694 | { | |
2695 | ignore = i + merged_store->stores.length () - 1; | |
2696 | m_merged_store_groups.safe_push (merged_store); | |
2697 | if (ignore < m_store_info.length ()) | |
2698 | merged_store = new merged_store_group (m_store_info[ignore]); | |
2699 | else | |
2700 | merged_store = NULL; | |
10f0d48d | 2701 | goto done; |
509ab8cd | 2702 | } |
2703 | } | |
2704 | ||
e580254a | 2705 | if (info->order >= merged_store->first_nonmergeable_order) |
2706 | ; | |
2707 | ||
3d3e04ac | 2708 | /* |---store 1---| |
2709 | |---store 2---| | |
509ab8cd | 2710 | Overlapping stores. */ |
e580254a | 2711 | else if (IN_RANGE (info->bitpos, merged_store->start, |
2712 | merged_store->start + merged_store->width - 1)) | |
3d3e04ac | 2713 | { |
9991d1d3 | 2714 | /* Only allow overlapping stores of constants. */ |
e580254a | 2715 | if (info->rhs_code == INTEGER_CST && merged_store->only_constants) |
9991d1d3 | 2716 | { |
a1cf1dfe | 2717 | unsigned int last_order |
2718 | = MAX (merged_store->last_order, info->order); | |
2719 | unsigned HOST_WIDE_INT end | |
2720 | = MAX (merged_store->start + merged_store->width, | |
2721 | info->bitpos + info->bitsize); | |
e580254a | 2722 | if (check_no_overlap (m_store_info, i, INTEGER_CST, |
2723 | last_order, end)) | |
a1cf1dfe | 2724 | { |
2725 | /* check_no_overlap call above made sure there are no | |
2726 | overlapping stores with non-INTEGER_CST rhs_code | |
2727 | in between the first and last of the stores we've | |
2728 | just merged. If there are any INTEGER_CST rhs_code | |
2729 | stores in between, we need to merge_overlapping them | |
2730 | even if in the sort_by_bitpos order there are other | |
2731 | overlapping stores in between. Keep those stores as is. | |
2732 | Example: | |
2733 | MEM[(int *)p_28] = 0; | |
2734 | MEM[(char *)p_28 + 3B] = 1; | |
2735 | MEM[(char *)p_28 + 1B] = 2; | |
2736 | MEM[(char *)p_28 + 2B] = MEM[(char *)p_28 + 6B]; | |
2737 | We can't merge the zero store with the store of two and | |
2738 | not merge anything else, because the store of one is | |
2739 | in the original order in between those two, but in | |
2740 | store_by_bitpos order it comes after the last store that | |
2741 | we can't merge with them. We can merge the first 3 stores | |
2742 | and keep the last store as is though. */ | |
e580254a | 2743 | unsigned int len = m_store_info.length (); |
2744 | unsigned int try_order = last_order; | |
2745 | unsigned int first_nonmergeable_order; | |
2746 | unsigned int k; | |
2747 | bool last_iter = false; | |
2748 | int attempts = 0; | |
2749 | do | |
a1cf1dfe | 2750 | { |
e580254a | 2751 | unsigned int max_order = 0; |
2752 | unsigned first_nonmergeable_int_order = ~0U; | |
2753 | unsigned HOST_WIDE_INT this_end = end; | |
2754 | k = i; | |
2755 | first_nonmergeable_order = ~0U; | |
2756 | for (unsigned int j = i + 1; j < len; ++j) | |
a1cf1dfe | 2757 | { |
e580254a | 2758 | store_immediate_info *info2 = m_store_info[j]; |
2759 | if (info2->bitpos >= this_end) | |
2760 | break; | |
2761 | if (info2->order < try_order) | |
a1cf1dfe | 2762 | { |
e580254a | 2763 | if (info2->rhs_code != INTEGER_CST) |
2764 | { | |
2765 | /* Normally check_no_overlap makes sure this | |
2766 | doesn't happen, but if end grows below, | |
2767 | then we need to process more stores than | |
2768 | check_no_overlap verified. Example: | |
2769 | MEM[(int *)p_5] = 0; | |
2770 | MEM[(short *)p_5 + 3B] = 1; | |
2771 | MEM[(char *)p_5 + 4B] = _9; | |
2772 | MEM[(char *)p_5 + 2B] = 2; */ | |
2773 | k = 0; | |
2774 | break; | |
2775 | } | |
2776 | k = j; | |
2777 | this_end = MAX (this_end, | |
2778 | info2->bitpos + info2->bitsize); | |
a1cf1dfe | 2779 | } |
e580254a | 2780 | else if (info2->rhs_code == INTEGER_CST |
2781 | && !last_iter) | |
2782 | { | |
2783 | max_order = MAX (max_order, info2->order + 1); | |
2784 | first_nonmergeable_int_order | |
2785 | = MIN (first_nonmergeable_int_order, | |
2786 | info2->order); | |
2787 | } | |
2788 | else | |
2789 | first_nonmergeable_order | |
2790 | = MIN (first_nonmergeable_order, info2->order); | |
a1cf1dfe | 2791 | } |
e580254a | 2792 | if (k == 0) |
2793 | { | |
2794 | if (last_order == try_order) | |
2795 | break; | |
2796 | /* If this failed, but only because we grew | |
2797 | try_order, retry with the last working one, | |
2798 | so that we merge at least something. */ | |
2799 | try_order = last_order; | |
2800 | last_iter = true; | |
2801 | continue; | |
2802 | } | |
2803 | last_order = try_order; | |
2804 | /* Retry with a larger try_order to see if we could | |
2805 | merge some further INTEGER_CST stores. */ | |
2806 | if (max_order | |
2807 | && (first_nonmergeable_int_order | |
2808 | < first_nonmergeable_order)) | |
2809 | { | |
2810 | try_order = MIN (max_order, | |
2811 | first_nonmergeable_order); | |
2812 | try_order | |
2813 | = MIN (try_order, | |
2814 | merged_store->first_nonmergeable_order); | |
2815 | if (try_order > last_order && ++attempts < 16) | |
2816 | continue; | |
2817 | } | |
2818 | first_nonmergeable_order | |
2819 | = MIN (first_nonmergeable_order, | |
2820 | first_nonmergeable_int_order); | |
2821 | end = this_end; | |
2822 | break; | |
a1cf1dfe | 2823 | } |
e580254a | 2824 | while (1); |
a1cf1dfe | 2825 | |
2826 | if (k != 0) | |
2827 | { | |
2828 | merged_store->merge_overlapping (info); | |
2829 | ||
e580254a | 2830 | merged_store->first_nonmergeable_order |
2831 | = MIN (merged_store->first_nonmergeable_order, | |
2832 | first_nonmergeable_order); | |
2833 | ||
a1cf1dfe | 2834 | for (unsigned int j = i + 1; j <= k; j++) |
2835 | { | |
2836 | store_immediate_info *info2 = m_store_info[j]; | |
2837 | gcc_assert (info2->bitpos < end); | |
2838 | if (info2->order < last_order) | |
2839 | { | |
2840 | gcc_assert (info2->rhs_code == INTEGER_CST); | |
e580254a | 2841 | if (info != info2) |
2842 | merged_store->merge_overlapping (info2); | |
a1cf1dfe | 2843 | } |
2844 | /* Other stores are kept and not merged in any | |
2845 | way. */ | |
2846 | } | |
2847 | ignore = k; | |
2848 | goto done; | |
2849 | } | |
2850 | } | |
9991d1d3 | 2851 | } |
3d3e04ac | 2852 | } |
9991d1d3 | 2853 | /* |---store 1---||---store 2---| |
2854 | This store is consecutive to the previous one. | |
2855 | Merge it into the current store group. There can be gaps in between | |
2856 | the stores, but there can't be gaps in between bitregions. */ | |
10f0d48d | 2857 | else if (info->bitregion_start <= merged_store->bitregion_end |
f9ceb302 | 2858 | && merged_store->can_be_merged_into (info)) |
3d3e04ac | 2859 | { |
9991d1d3 | 2860 | store_immediate_info *infof = merged_store->stores[0]; |
2861 | ||
2862 | /* All the rhs_code ops that take 2 operands are commutative, | |
2863 | swap the operands if it could make the operands compatible. */ | |
2864 | if (infof->ops[0].base_addr | |
2865 | && infof->ops[1].base_addr | |
2866 | && info->ops[0].base_addr | |
2867 | && info->ops[1].base_addr | |
e61263f2 | 2868 | && known_eq (info->ops[1].bitpos - infof->ops[0].bitpos, |
2869 | info->bitpos - infof->bitpos) | |
9991d1d3 | 2870 | && operand_equal_p (info->ops[1].base_addr, |
2871 | infof->ops[0].base_addr, 0)) | |
aa0a1d29 | 2872 | { |
2873 | std::swap (info->ops[0], info->ops[1]); | |
2874 | info->ops_swapped_p = true; | |
2875 | } | |
f9ceb302 | 2876 | if (check_no_overlap (m_store_info, i, info->rhs_code, |
c7b16284 | 2877 | MAX (merged_store->last_order, info->order), |
2878 | MAX (merged_store->start + merged_store->width, | |
f9ceb302 | 2879 | info->bitpos + info->bitsize))) |
9991d1d3 | 2880 | { |
f9ceb302 | 2881 | /* Turn MEM_REF into BIT_INSERT_EXPR for bit-field stores. */ |
2882 | if (info->rhs_code == MEM_REF && infof->rhs_code != MEM_REF) | |
2883 | { | |
2884 | info->rhs_code = BIT_INSERT_EXPR; | |
2885 | info->ops[0].val = gimple_assign_rhs1 (info->stmt); | |
2886 | info->ops[0].base_addr = NULL_TREE; | |
2887 | } | |
2888 | else if (infof->rhs_code == MEM_REF && info->rhs_code != MEM_REF) | |
2889 | { | |
2890 | store_immediate_info *infoj; | |
2891 | unsigned int j; | |
2892 | FOR_EACH_VEC_ELT (merged_store->stores, j, infoj) | |
2893 | { | |
2894 | infoj->rhs_code = BIT_INSERT_EXPR; | |
2895 | infoj->ops[0].val = gimple_assign_rhs1 (infoj->stmt); | |
2896 | infoj->ops[0].base_addr = NULL_TREE; | |
2897 | } | |
2898 | } | |
2899 | if ((infof->ops[0].base_addr | |
2900 | ? compatible_load_p (merged_store, info, base_addr, 0) | |
2901 | : !info->ops[0].base_addr) | |
2902 | && (infof->ops[1].base_addr | |
2903 | ? compatible_load_p (merged_store, info, base_addr, 1) | |
2904 | : !info->ops[1].base_addr)) | |
2905 | { | |
2906 | merged_store->merge_into (info); | |
2907 | goto done; | |
2908 | } | |
9991d1d3 | 2909 | } |
2910 | } | |
3d3e04ac | 2911 | |
9991d1d3 | 2912 | /* |---store 1---| <gap> |---store 2---|. |
2913 | Gap between stores or the rhs not compatible. Start a new group. */ | |
3d3e04ac | 2914 | |
9991d1d3 | 2915 | /* Try to apply all the stores recorded for the group to determine |
2916 | the bitpattern they write and discard it if that fails. | |
2917 | This will also reject single-store groups. */ | |
10f0d48d | 2918 | if (merged_store->apply_stores ()) |
9991d1d3 | 2919 | m_merged_store_groups.safe_push (merged_store); |
10f0d48d | 2920 | else |
2921 | delete merged_store; | |
3d3e04ac | 2922 | |
9991d1d3 | 2923 | merged_store = new merged_store_group (info); |
10f0d48d | 2924 | if (dump_file && (dump_flags & TDF_DETAILS)) |
2925 | fputs ("New store group\n", dump_file); | |
2926 | ||
2927 | done: | |
2928 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
2929 | { | |
2930 | fprintf (dump_file, "Store %u:\nbitsize:" HOST_WIDE_INT_PRINT_DEC | |
2931 | " bitpos:" HOST_WIDE_INT_PRINT_DEC " val:", | |
2932 | i, info->bitsize, info->bitpos); | |
2933 | print_generic_expr (dump_file, gimple_assign_rhs1 (info->stmt)); | |
2934 | fputc ('\n', dump_file); | |
2935 | } | |
3d3e04ac | 2936 | } |
2937 | ||
902cb3b7 | 2938 | /* Record or discard the last store group. */ |
509ab8cd | 2939 | if (merged_store) |
2940 | { | |
10f0d48d | 2941 | if (merged_store->apply_stores ()) |
509ab8cd | 2942 | m_merged_store_groups.safe_push (merged_store); |
10f0d48d | 2943 | else |
2944 | delete merged_store; | |
509ab8cd | 2945 | } |
3d3e04ac | 2946 | |
2947 | gcc_assert (m_merged_store_groups.length () <= m_store_info.length ()); | |
10f0d48d | 2948 | |
3d3e04ac | 2949 | bool success |
2950 | = !m_merged_store_groups.is_empty () | |
2951 | && m_merged_store_groups.length () < m_store_info.length (); | |
2952 | ||
2953 | if (success && dump_file) | |
10f0d48d | 2954 | fprintf (dump_file, "Coalescing successful!\nMerged into %u stores\n", |
902cb3b7 | 2955 | m_merged_store_groups.length ()); |
3d3e04ac | 2956 | |
2957 | return success; | |
2958 | } | |
2959 | ||
9991d1d3 | 2960 | /* Return the type to use for the merged stores or loads described by STMTS. |
2961 | This is needed to get the alias sets right. If IS_LOAD, look for rhs, | |
2962 | otherwise lhs. Additionally set *CLIQUEP and *BASEP to MR_DEPENDENCE_* | |
2963 | of the MEM_REFs if any. */ | |
3d3e04ac | 2964 | |
2965 | static tree | |
9991d1d3 | 2966 | get_alias_type_for_stmts (vec<gimple *> &stmts, bool is_load, |
2967 | unsigned short *cliquep, unsigned short *basep) | |
3d3e04ac | 2968 | { |
2969 | gimple *stmt; | |
2970 | unsigned int i; | |
9991d1d3 | 2971 | tree type = NULL_TREE; |
2972 | tree ret = NULL_TREE; | |
2973 | *cliquep = 0; | |
2974 | *basep = 0; | |
3d3e04ac | 2975 | |
2976 | FOR_EACH_VEC_ELT (stmts, i, stmt) | |
2977 | { | |
9991d1d3 | 2978 | tree ref = is_load ? gimple_assign_rhs1 (stmt) |
2979 | : gimple_assign_lhs (stmt); | |
2980 | tree type1 = reference_alias_ptr_type (ref); | |
2981 | tree base = get_base_address (ref); | |
3d3e04ac | 2982 | |
9991d1d3 | 2983 | if (i == 0) |
2984 | { | |
2985 | if (TREE_CODE (base) == MEM_REF) | |
2986 | { | |
2987 | *cliquep = MR_DEPENDENCE_CLIQUE (base); | |
2988 | *basep = MR_DEPENDENCE_BASE (base); | |
2989 | } | |
2990 | ret = type = type1; | |
2991 | continue; | |
2992 | } | |
3d3e04ac | 2993 | if (!alias_ptr_types_compatible_p (type, type1)) |
9991d1d3 | 2994 | ret = ptr_type_node; |
2995 | if (TREE_CODE (base) != MEM_REF | |
2996 | || *cliquep != MR_DEPENDENCE_CLIQUE (base) | |
2997 | || *basep != MR_DEPENDENCE_BASE (base)) | |
2998 | { | |
2999 | *cliquep = 0; | |
3000 | *basep = 0; | |
3001 | } | |
3d3e04ac | 3002 | } |
9991d1d3 | 3003 | return ret; |
3d3e04ac | 3004 | } |
3005 | ||
3006 | /* Return the location_t information we can find among the statements | |
3007 | in STMTS. */ | |
3008 | ||
3009 | static location_t | |
9991d1d3 | 3010 | get_location_for_stmts (vec<gimple *> &stmts) |
3d3e04ac | 3011 | { |
3012 | gimple *stmt; | |
3013 | unsigned int i; | |
3014 | ||
3015 | FOR_EACH_VEC_ELT (stmts, i, stmt) | |
3016 | if (gimple_has_location (stmt)) | |
3017 | return gimple_location (stmt); | |
3018 | ||
3019 | return UNKNOWN_LOCATION; | |
3020 | } | |
3021 | ||
3022 | /* Used to decribe a store resulting from splitting a wide store in smaller | |
3023 | regularly-sized stores in split_group. */ | |
3024 | ||
3025 | struct split_store | |
3026 | { | |
3027 | unsigned HOST_WIDE_INT bytepos; | |
3028 | unsigned HOST_WIDE_INT size; | |
3029 | unsigned HOST_WIDE_INT align; | |
9991d1d3 | 3030 | auto_vec<store_immediate_info *> orig_stores; |
902cb3b7 | 3031 | /* True if there is a single orig stmt covering the whole split store. */ |
3032 | bool orig; | |
3d3e04ac | 3033 | split_store (unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, |
3034 | unsigned HOST_WIDE_INT); | |
3035 | }; | |
3036 | ||
3037 | /* Simple constructor. */ | |
3038 | ||
3039 | split_store::split_store (unsigned HOST_WIDE_INT bp, | |
3040 | unsigned HOST_WIDE_INT sz, | |
3041 | unsigned HOST_WIDE_INT al) | |
902cb3b7 | 3042 | : bytepos (bp), size (sz), align (al), orig (false) |
3d3e04ac | 3043 | { |
9991d1d3 | 3044 | orig_stores.create (0); |
3d3e04ac | 3045 | } |
3046 | ||
9991d1d3 | 3047 | /* Record all stores in GROUP that write to the region starting at BITPOS and |
3048 | is of size BITSIZE. Record infos for such statements in STORES if | |
3049 | non-NULL. The stores in GROUP must be sorted by bitposition. Return INFO | |
3050 | if there is exactly one original store in the range. */ | |
3d3e04ac | 3051 | |
902cb3b7 | 3052 | static store_immediate_info * |
9991d1d3 | 3053 | find_constituent_stores (struct merged_store_group *group, |
3054 | vec<store_immediate_info *> *stores, | |
3055 | unsigned int *first, | |
3056 | unsigned HOST_WIDE_INT bitpos, | |
3057 | unsigned HOST_WIDE_INT bitsize) | |
3d3e04ac | 3058 | { |
902cb3b7 | 3059 | store_immediate_info *info, *ret = NULL; |
3d3e04ac | 3060 | unsigned int i; |
902cb3b7 | 3061 | bool second = false; |
3062 | bool update_first = true; | |
3d3e04ac | 3063 | unsigned HOST_WIDE_INT end = bitpos + bitsize; |
902cb3b7 | 3064 | for (i = *first; group->stores.iterate (i, &info); ++i) |
3d3e04ac | 3065 | { |
3066 | unsigned HOST_WIDE_INT stmt_start = info->bitpos; | |
3067 | unsigned HOST_WIDE_INT stmt_end = stmt_start + info->bitsize; | |
902cb3b7 | 3068 | if (stmt_end <= bitpos) |
3069 | { | |
3070 | /* BITPOS passed to this function never decreases from within the | |
3071 | same split_group call, so optimize and don't scan info records | |
3072 | which are known to end before or at BITPOS next time. | |
3073 | Only do it if all stores before this one also pass this. */ | |
3074 | if (update_first) | |
3075 | *first = i + 1; | |
3076 | continue; | |
3077 | } | |
3078 | else | |
3079 | update_first = false; | |
3080 | ||
3d3e04ac | 3081 | /* The stores in GROUP are ordered by bitposition so if we're past |
902cb3b7 | 3082 | the region for this group return early. */ |
3083 | if (stmt_start >= end) | |
3084 | return ret; | |
3085 | ||
9991d1d3 | 3086 | if (stores) |
902cb3b7 | 3087 | { |
9991d1d3 | 3088 | stores->safe_push (info); |
902cb3b7 | 3089 | if (ret) |
3090 | { | |
3091 | ret = NULL; | |
3092 | second = true; | |
3093 | } | |
3094 | } | |
3095 | else if (ret) | |
3096 | return NULL; | |
3097 | if (!second) | |
3098 | ret = info; | |
3d3e04ac | 3099 | } |
902cb3b7 | 3100 | return ret; |
3d3e04ac | 3101 | } |
3102 | ||
871a91ec | 3103 | /* Return how many SSA_NAMEs used to compute value to store in the INFO |
3104 | store have multiple uses. If any SSA_NAME has multiple uses, also | |
3105 | count statements needed to compute it. */ | |
3106 | ||
3107 | static unsigned | |
3108 | count_multiple_uses (store_immediate_info *info) | |
3109 | { | |
3110 | gimple *stmt = info->stmt; | |
3111 | unsigned ret = 0; | |
3112 | switch (info->rhs_code) | |
3113 | { | |
3114 | case INTEGER_CST: | |
3115 | return 0; | |
3116 | case BIT_AND_EXPR: | |
3117 | case BIT_IOR_EXPR: | |
3118 | case BIT_XOR_EXPR: | |
832a73b9 | 3119 | if (info->bit_not_p) |
3120 | { | |
3121 | if (!has_single_use (gimple_assign_rhs1 (stmt))) | |
3122 | ret = 1; /* Fall through below to return | |
3123 | the BIT_NOT_EXPR stmt and then | |
3124 | BIT_{AND,IOR,XOR}_EXPR and anything it | |
3125 | uses. */ | |
3126 | else | |
3127 | /* stmt is after this the BIT_NOT_EXPR. */ | |
3128 | stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt)); | |
3129 | } | |
871a91ec | 3130 | if (!has_single_use (gimple_assign_rhs1 (stmt))) |
3131 | { | |
3132 | ret += 1 + info->ops[0].bit_not_p; | |
3133 | if (info->ops[1].base_addr) | |
3134 | ret += 1 + info->ops[1].bit_not_p; | |
3135 | return ret + 1; | |
3136 | } | |
3137 | stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt)); | |
3138 | /* stmt is now the BIT_*_EXPR. */ | |
3139 | if (!has_single_use (gimple_assign_rhs1 (stmt))) | |
aa0a1d29 | 3140 | ret += 1 + info->ops[info->ops_swapped_p].bit_not_p; |
3141 | else if (info->ops[info->ops_swapped_p].bit_not_p) | |
871a91ec | 3142 | { |
3143 | gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt)); | |
3144 | if (!has_single_use (gimple_assign_rhs1 (stmt2))) | |
3145 | ++ret; | |
3146 | } | |
3147 | if (info->ops[1].base_addr == NULL_TREE) | |
aa0a1d29 | 3148 | { |
3149 | gcc_checking_assert (!info->ops_swapped_p); | |
3150 | return ret; | |
3151 | } | |
871a91ec | 3152 | if (!has_single_use (gimple_assign_rhs2 (stmt))) |
aa0a1d29 | 3153 | ret += 1 + info->ops[1 - info->ops_swapped_p].bit_not_p; |
3154 | else if (info->ops[1 - info->ops_swapped_p].bit_not_p) | |
871a91ec | 3155 | { |
3156 | gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs2 (stmt)); | |
3157 | if (!has_single_use (gimple_assign_rhs1 (stmt2))) | |
3158 | ++ret; | |
3159 | } | |
3160 | return ret; | |
3161 | case MEM_REF: | |
3162 | if (!has_single_use (gimple_assign_rhs1 (stmt))) | |
3163 | return 1 + info->ops[0].bit_not_p; | |
3164 | else if (info->ops[0].bit_not_p) | |
3165 | { | |
3166 | stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt)); | |
3167 | if (!has_single_use (gimple_assign_rhs1 (stmt))) | |
3168 | return 1; | |
3169 | } | |
3170 | return 0; | |
10f0d48d | 3171 | case BIT_INSERT_EXPR: |
3172 | return has_single_use (gimple_assign_rhs1 (stmt)) ? 0 : 1; | |
871a91ec | 3173 | default: |
3174 | gcc_unreachable (); | |
3175 | } | |
3176 | } | |
3177 | ||
3d3e04ac | 3178 | /* Split a merged store described by GROUP by populating the SPLIT_STORES |
902cb3b7 | 3179 | vector (if non-NULL) with split_store structs describing the byte offset |
3180 | (from the base), the bit size and alignment of each store as well as the | |
3181 | original statements involved in each such split group. | |
3d3e04ac | 3182 | This is to separate the splitting strategy from the statement |
3183 | building/emission/linking done in output_merged_store. | |
902cb3b7 | 3184 | Return number of new stores. |
9991d1d3 | 3185 | If ALLOW_UNALIGNED_STORE is false, then all stores must be aligned. |
3186 | If ALLOW_UNALIGNED_LOAD is false, then all loads must be aligned. | |
902cb3b7 | 3187 | If SPLIT_STORES is NULL, it is just a dry run to count number of |
3188 | new stores. */ | |
3d3e04ac | 3189 | |
902cb3b7 | 3190 | static unsigned int |
9991d1d3 | 3191 | split_group (merged_store_group *group, bool allow_unaligned_store, |
3192 | bool allow_unaligned_load, | |
871a91ec | 3193 | vec<struct split_store *> *split_stores, |
3194 | unsigned *total_orig, | |
3195 | unsigned *total_new) | |
3d3e04ac | 3196 | { |
902cb3b7 | 3197 | unsigned HOST_WIDE_INT pos = group->bitregion_start; |
3198 | unsigned HOST_WIDE_INT size = group->bitregion_end - pos; | |
3d3e04ac | 3199 | unsigned HOST_WIDE_INT bytepos = pos / BITS_PER_UNIT; |
902cb3b7 | 3200 | unsigned HOST_WIDE_INT group_align = group->align; |
3201 | unsigned HOST_WIDE_INT align_base = group->align_base; | |
9991d1d3 | 3202 | unsigned HOST_WIDE_INT group_load_align = group_align; |
871a91ec | 3203 | bool any_orig = false; |
3d3e04ac | 3204 | |
3d3e04ac | 3205 | gcc_assert ((size % BITS_PER_UNIT == 0) && (pos % BITS_PER_UNIT == 0)); |
3206 | ||
509ab8cd | 3207 | if (group->stores[0]->rhs_code == LROTATE_EXPR |
3208 | || group->stores[0]->rhs_code == NOP_EXPR) | |
3209 | { | |
3210 | /* For bswap framework using sets of stores, all the checking | |
3211 | has been done earlier in try_coalesce_bswap and needs to be | |
3212 | emitted as a single store. */ | |
3213 | if (total_orig) | |
3214 | { | |
3215 | /* Avoid the old/new stmt count heuristics. It should be | |
3216 | always beneficial. */ | |
3217 | total_new[0] = 1; | |
3218 | total_orig[0] = 2; | |
3219 | } | |
3220 | ||
3221 | if (split_stores) | |
3222 | { | |
3223 | unsigned HOST_WIDE_INT align_bitpos | |
3224 | = (group->start - align_base) & (group_align - 1); | |
3225 | unsigned HOST_WIDE_INT align = group_align; | |
3226 | if (align_bitpos) | |
3227 | align = least_bit_hwi (align_bitpos); | |
3228 | bytepos = group->start / BITS_PER_UNIT; | |
3229 | struct split_store *store | |
3230 | = new split_store (bytepos, group->width, align); | |
3231 | unsigned int first = 0; | |
3232 | find_constituent_stores (group, &store->orig_stores, | |
3233 | &first, group->start, group->width); | |
3234 | split_stores->safe_push (store); | |
3235 | } | |
3236 | ||
3237 | return 1; | |
3238 | } | |
3239 | ||
902cb3b7 | 3240 | unsigned int ret = 0, first = 0; |
3d3e04ac | 3241 | unsigned HOST_WIDE_INT try_pos = bytepos; |
3d3e04ac | 3242 | |
871a91ec | 3243 | if (total_orig) |
3244 | { | |
3245 | unsigned int i; | |
3246 | store_immediate_info *info = group->stores[0]; | |
3247 | ||
3248 | total_new[0] = 0; | |
3249 | total_orig[0] = 1; /* The orig store. */ | |
3250 | info = group->stores[0]; | |
3251 | if (info->ops[0].base_addr) | |
9deedf62 | 3252 | total_orig[0]++; |
871a91ec | 3253 | if (info->ops[1].base_addr) |
9deedf62 | 3254 | total_orig[0]++; |
871a91ec | 3255 | switch (info->rhs_code) |
3256 | { | |
3257 | case BIT_AND_EXPR: | |
3258 | case BIT_IOR_EXPR: | |
3259 | case BIT_XOR_EXPR: | |
3260 | total_orig[0]++; /* The orig BIT_*_EXPR stmt. */ | |
3261 | break; | |
3262 | default: | |
3263 | break; | |
3264 | } | |
3265 | total_orig[0] *= group->stores.length (); | |
3266 | ||
3267 | FOR_EACH_VEC_ELT (group->stores, i, info) | |
9deedf62 | 3268 | { |
3269 | total_new[0] += count_multiple_uses (info); | |
3270 | total_orig[0] += (info->bit_not_p | |
3271 | + info->ops[0].bit_not_p | |
3272 | + info->ops[1].bit_not_p); | |
3273 | } | |
871a91ec | 3274 | } |
3275 | ||
9991d1d3 | 3276 | if (!allow_unaligned_load) |
3277 | for (int i = 0; i < 2; ++i) | |
3278 | if (group->load_align[i]) | |
3279 | group_load_align = MIN (group_load_align, group->load_align[i]); | |
3280 | ||
3d3e04ac | 3281 | while (size > 0) |
3282 | { | |
9991d1d3 | 3283 | if ((allow_unaligned_store || group_align <= BITS_PER_UNIT) |
902cb3b7 | 3284 | && group->mask[try_pos - bytepos] == (unsigned char) ~0U) |
3285 | { | |
3286 | /* Skip padding bytes. */ | |
3287 | ++try_pos; | |
3288 | size -= BITS_PER_UNIT; | |
3289 | continue; | |
3290 | } | |
3291 | ||
3d3e04ac | 3292 | unsigned HOST_WIDE_INT try_bitpos = try_pos * BITS_PER_UNIT; |
902cb3b7 | 3293 | unsigned int try_size = MAX_STORE_BITSIZE, nonmasked; |
3294 | unsigned HOST_WIDE_INT align_bitpos | |
3295 | = (try_bitpos - align_base) & (group_align - 1); | |
3296 | unsigned HOST_WIDE_INT align = group_align; | |
3297 | if (align_bitpos) | |
3298 | align = least_bit_hwi (align_bitpos); | |
9991d1d3 | 3299 | if (!allow_unaligned_store) |
902cb3b7 | 3300 | try_size = MIN (try_size, align); |
9991d1d3 | 3301 | if (!allow_unaligned_load) |
3302 | { | |
3303 | /* If we can't do or don't want to do unaligned stores | |
3304 | as well as loads, we need to take the loads into account | |
3305 | as well. */ | |
3306 | unsigned HOST_WIDE_INT load_align = group_load_align; | |
3307 | align_bitpos = (try_bitpos - align_base) & (load_align - 1); | |
3308 | if (align_bitpos) | |
3309 | load_align = least_bit_hwi (align_bitpos); | |
3310 | for (int i = 0; i < 2; ++i) | |
3311 | if (group->load_align[i]) | |
3312 | { | |
e61263f2 | 3313 | align_bitpos |
3314 | = known_alignment (try_bitpos | |
3315 | - group->stores[0]->bitpos | |
3316 | + group->stores[0]->ops[i].bitpos | |
3317 | - group->load_align_base[i]); | |
3318 | if (align_bitpos & (group_load_align - 1)) | |
9991d1d3 | 3319 | { |
3320 | unsigned HOST_WIDE_INT a = least_bit_hwi (align_bitpos); | |
3321 | load_align = MIN (load_align, a); | |
3322 | } | |
3323 | } | |
3324 | try_size = MIN (try_size, load_align); | |
3325 | } | |
902cb3b7 | 3326 | store_immediate_info *info |
9991d1d3 | 3327 | = find_constituent_stores (group, NULL, &first, try_bitpos, try_size); |
902cb3b7 | 3328 | if (info) |
3329 | { | |
3330 | /* If there is just one original statement for the range, see if | |
3331 | we can just reuse the original store which could be even larger | |
3332 | than try_size. */ | |
3333 | unsigned HOST_WIDE_INT stmt_end | |
3334 | = ROUND_UP (info->bitpos + info->bitsize, BITS_PER_UNIT); | |
9991d1d3 | 3335 | info = find_constituent_stores (group, NULL, &first, try_bitpos, |
3336 | stmt_end - try_bitpos); | |
902cb3b7 | 3337 | if (info && info->bitpos >= try_bitpos) |
3338 | { | |
3339 | try_size = stmt_end - try_bitpos; | |
3340 | goto found; | |
3341 | } | |
3342 | } | |
3d3e04ac | 3343 | |
902cb3b7 | 3344 | /* Approximate store bitsize for the case when there are no padding |
3345 | bits. */ | |
3346 | while (try_size > size) | |
3347 | try_size /= 2; | |
3348 | /* Now look for whole padding bytes at the end of that bitsize. */ | |
3349 | for (nonmasked = try_size / BITS_PER_UNIT; nonmasked > 0; --nonmasked) | |
3350 | if (group->mask[try_pos - bytepos + nonmasked - 1] | |
3351 | != (unsigned char) ~0U) | |
3352 | break; | |
3353 | if (nonmasked == 0) | |
3354 | { | |
3355 | /* If entire try_size range is padding, skip it. */ | |
3356 | try_pos += try_size / BITS_PER_UNIT; | |
3357 | size -= try_size; | |
3358 | continue; | |
3359 | } | |
3360 | /* Otherwise try to decrease try_size if second half, last 3 quarters | |
3361 | etc. are padding. */ | |
3362 | nonmasked *= BITS_PER_UNIT; | |
3363 | while (nonmasked <= try_size / 2) | |
3364 | try_size /= 2; | |
9991d1d3 | 3365 | if (!allow_unaligned_store && group_align > BITS_PER_UNIT) |
902cb3b7 | 3366 | { |
3367 | /* Now look for whole padding bytes at the start of that bitsize. */ | |
3368 | unsigned int try_bytesize = try_size / BITS_PER_UNIT, masked; | |
3369 | for (masked = 0; masked < try_bytesize; ++masked) | |
3370 | if (group->mask[try_pos - bytepos + masked] != (unsigned char) ~0U) | |
3371 | break; | |
3372 | masked *= BITS_PER_UNIT; | |
3373 | gcc_assert (masked < try_size); | |
3374 | if (masked >= try_size / 2) | |
3375 | { | |
3376 | while (masked >= try_size / 2) | |
3377 | { | |
3378 | try_size /= 2; | |
3379 | try_pos += try_size / BITS_PER_UNIT; | |
3380 | size -= try_size; | |
3381 | masked -= try_size; | |
3382 | } | |
3383 | /* Need to recompute the alignment, so just retry at the new | |
3384 | position. */ | |
3385 | continue; | |
3386 | } | |
3387 | } | |
3388 | ||
3389 | found: | |
3390 | ++ret; | |
3d3e04ac | 3391 | |
902cb3b7 | 3392 | if (split_stores) |
3393 | { | |
3394 | struct split_store *store | |
3395 | = new split_store (try_pos, try_size, align); | |
9991d1d3 | 3396 | info = find_constituent_stores (group, &store->orig_stores, |
3397 | &first, try_bitpos, try_size); | |
902cb3b7 | 3398 | if (info |
3399 | && info->bitpos >= try_bitpos | |
3400 | && info->bitpos + info->bitsize <= try_bitpos + try_size) | |
871a91ec | 3401 | { |
3402 | store->orig = true; | |
3403 | any_orig = true; | |
3404 | } | |
902cb3b7 | 3405 | split_stores->safe_push (store); |
3406 | } | |
3407 | ||
3408 | try_pos += try_size / BITS_PER_UNIT; | |
3d3e04ac | 3409 | size -= try_size; |
3d3e04ac | 3410 | } |
902cb3b7 | 3411 | |
871a91ec | 3412 | if (total_orig) |
3413 | { | |
9deedf62 | 3414 | unsigned int i; |
3415 | struct split_store *store; | |
871a91ec | 3416 | /* If we are reusing some original stores and any of the |
3417 | original SSA_NAMEs had multiple uses, we need to subtract | |
3418 | those now before we add the new ones. */ | |
3419 | if (total_new[0] && any_orig) | |
3420 | { | |
871a91ec | 3421 | FOR_EACH_VEC_ELT (*split_stores, i, store) |
3422 | if (store->orig) | |
3423 | total_new[0] -= count_multiple_uses (store->orig_stores[0]); | |
3424 | } | |
3425 | total_new[0] += ret; /* The new store. */ | |
3426 | store_immediate_info *info = group->stores[0]; | |
3427 | if (info->ops[0].base_addr) | |
9deedf62 | 3428 | total_new[0] += ret; |
871a91ec | 3429 | if (info->ops[1].base_addr) |
9deedf62 | 3430 | total_new[0] += ret; |
871a91ec | 3431 | switch (info->rhs_code) |
3432 | { | |
3433 | case BIT_AND_EXPR: | |
3434 | case BIT_IOR_EXPR: | |
3435 | case BIT_XOR_EXPR: | |
3436 | total_new[0] += ret; /* The new BIT_*_EXPR stmt. */ | |
3437 | break; | |
3438 | default: | |
3439 | break; | |
3440 | } | |
9deedf62 | 3441 | FOR_EACH_VEC_ELT (*split_stores, i, store) |
3442 | { | |
3443 | unsigned int j; | |
3444 | bool bit_not_p[3] = { false, false, false }; | |
3445 | /* If all orig_stores have certain bit_not_p set, then | |
3446 | we'd use a BIT_NOT_EXPR stmt and need to account for it. | |
3447 | If some orig_stores have certain bit_not_p set, then | |
3448 | we'd use a BIT_XOR_EXPR with a mask and need to account for | |
3449 | it. */ | |
3450 | FOR_EACH_VEC_ELT (store->orig_stores, j, info) | |
3451 | { | |
3452 | if (info->ops[0].bit_not_p) | |
3453 | bit_not_p[0] = true; | |
3454 | if (info->ops[1].bit_not_p) | |
3455 | bit_not_p[1] = true; | |
3456 | if (info->bit_not_p) | |
3457 | bit_not_p[2] = true; | |
3458 | } | |
3459 | total_new[0] += bit_not_p[0] + bit_not_p[1] + bit_not_p[2]; | |
3460 | } | |
3461 | ||
871a91ec | 3462 | } |
3463 | ||
902cb3b7 | 3464 | return ret; |
3d3e04ac | 3465 | } |
3466 | ||
9deedf62 | 3467 | /* Return the operation through which the operand IDX (if < 2) or |
3468 | result (IDX == 2) should be inverted. If NOP_EXPR, no inversion | |
3469 | is done, if BIT_NOT_EXPR, all bits are inverted, if BIT_XOR_EXPR, | |
3470 | the bits should be xored with mask. */ | |
3471 | ||
3472 | static enum tree_code | |
3473 | invert_op (split_store *split_store, int idx, tree int_type, tree &mask) | |
3474 | { | |
3475 | unsigned int i; | |
3476 | store_immediate_info *info; | |
3477 | unsigned int cnt = 0; | |
6187b750 | 3478 | bool any_paddings = false; |
9deedf62 | 3479 | FOR_EACH_VEC_ELT (split_store->orig_stores, i, info) |
3480 | { | |
3481 | bool bit_not_p = idx < 2 ? info->ops[idx].bit_not_p : info->bit_not_p; | |
3482 | if (bit_not_p) | |
6187b750 | 3483 | { |
3484 | ++cnt; | |
3485 | tree lhs = gimple_assign_lhs (info->stmt); | |
3486 | if (INTEGRAL_TYPE_P (TREE_TYPE (lhs)) | |
3487 | && TYPE_PRECISION (TREE_TYPE (lhs)) < info->bitsize) | |
3488 | any_paddings = true; | |
3489 | } | |
9deedf62 | 3490 | } |
3491 | mask = NULL_TREE; | |
3492 | if (cnt == 0) | |
3493 | return NOP_EXPR; | |
6187b750 | 3494 | if (cnt == split_store->orig_stores.length () && !any_paddings) |
9deedf62 | 3495 | return BIT_NOT_EXPR; |
3496 | ||
3497 | unsigned HOST_WIDE_INT try_bitpos = split_store->bytepos * BITS_PER_UNIT; | |
3498 | unsigned buf_size = split_store->size / BITS_PER_UNIT; | |
3499 | unsigned char *buf | |
3500 | = XALLOCAVEC (unsigned char, buf_size); | |
3501 | memset (buf, ~0U, buf_size); | |
3502 | FOR_EACH_VEC_ELT (split_store->orig_stores, i, info) | |
3503 | { | |
3504 | bool bit_not_p = idx < 2 ? info->ops[idx].bit_not_p : info->bit_not_p; | |
3505 | if (!bit_not_p) | |
3506 | continue; | |
3507 | /* Clear regions with bit_not_p and invert afterwards, rather than | |
3508 | clear regions with !bit_not_p, so that gaps in between stores aren't | |
3509 | set in the mask. */ | |
3510 | unsigned HOST_WIDE_INT bitsize = info->bitsize; | |
6187b750 | 3511 | unsigned HOST_WIDE_INT prec = bitsize; |
9deedf62 | 3512 | unsigned int pos_in_buffer = 0; |
6187b750 | 3513 | if (any_paddings) |
3514 | { | |
3515 | tree lhs = gimple_assign_lhs (info->stmt); | |
3516 | if (INTEGRAL_TYPE_P (TREE_TYPE (lhs)) | |
3517 | && TYPE_PRECISION (TREE_TYPE (lhs)) < bitsize) | |
3518 | prec = TYPE_PRECISION (TREE_TYPE (lhs)); | |
3519 | } | |
9deedf62 | 3520 | if (info->bitpos < try_bitpos) |
3521 | { | |
3522 | gcc_assert (info->bitpos + bitsize > try_bitpos); | |
6187b750 | 3523 | if (!BYTES_BIG_ENDIAN) |
3524 | { | |
3525 | if (prec <= try_bitpos - info->bitpos) | |
3526 | continue; | |
3527 | prec -= try_bitpos - info->bitpos; | |
3528 | } | |
3529 | bitsize -= try_bitpos - info->bitpos; | |
3530 | if (BYTES_BIG_ENDIAN && prec > bitsize) | |
3531 | prec = bitsize; | |
9deedf62 | 3532 | } |
3533 | else | |
3534 | pos_in_buffer = info->bitpos - try_bitpos; | |
6187b750 | 3535 | if (prec < bitsize) |
3536 | { | |
3537 | /* If this is a bool inversion, invert just the least significant | |
3538 | prec bits rather than all bits of it. */ | |
3539 | if (BYTES_BIG_ENDIAN) | |
3540 | { | |
3541 | pos_in_buffer += bitsize - prec; | |
3542 | if (pos_in_buffer >= split_store->size) | |
3543 | continue; | |
3544 | } | |
3545 | bitsize = prec; | |
3546 | } | |
9deedf62 | 3547 | if (pos_in_buffer + bitsize > split_store->size) |
3548 | bitsize = split_store->size - pos_in_buffer; | |
3549 | unsigned char *p = buf + (pos_in_buffer / BITS_PER_UNIT); | |
3550 | if (BYTES_BIG_ENDIAN) | |
3551 | clear_bit_region_be (p, (BITS_PER_UNIT - 1 | |
3552 | - (pos_in_buffer % BITS_PER_UNIT)), bitsize); | |
3553 | else | |
3554 | clear_bit_region (p, pos_in_buffer % BITS_PER_UNIT, bitsize); | |
3555 | } | |
3556 | for (unsigned int i = 0; i < buf_size; ++i) | |
3557 | buf[i] = ~buf[i]; | |
3558 | mask = native_interpret_expr (int_type, buf, buf_size); | |
3559 | return BIT_XOR_EXPR; | |
3560 | } | |
3561 | ||
3d3e04ac | 3562 | /* Given a merged store group GROUP output the widened version of it. |
3563 | The store chain is against the base object BASE. | |
3564 | Try store sizes of at most MAX_STORE_BITSIZE bits wide and don't output | |
3565 | unaligned stores for STRICT_ALIGNMENT targets or if it's too expensive. | |
3566 | Make sure that the number of statements output is less than the number of | |
3567 | original statements. If a better sequence is possible emit it and | |
3568 | return true. */ | |
3569 | ||
3570 | bool | |
f85e7cb7 | 3571 | imm_store_chain_info::output_merged_store (merged_store_group *group) |
3d3e04ac | 3572 | { |
79b9cc46 | 3573 | split_store *split_store; |
3574 | unsigned int i; | |
902cb3b7 | 3575 | unsigned HOST_WIDE_INT start_byte_pos |
3576 | = group->bitregion_start / BITS_PER_UNIT; | |
3d3e04ac | 3577 | |
3578 | unsigned int orig_num_stmts = group->stores.length (); | |
3579 | if (orig_num_stmts < 2) | |
3580 | return false; | |
3581 | ||
902cb3b7 | 3582 | auto_vec<struct split_store *, 32> split_stores; |
9991d1d3 | 3583 | bool allow_unaligned_store |
902cb3b7 | 3584 | = !STRICT_ALIGNMENT && PARAM_VALUE (PARAM_STORE_MERGING_ALLOW_UNALIGNED); |
9991d1d3 | 3585 | bool allow_unaligned_load = allow_unaligned_store; |
3586 | if (allow_unaligned_store) | |
902cb3b7 | 3587 | { |
3588 | /* If unaligned stores are allowed, see how many stores we'd emit | |
3589 | for unaligned and how many stores we'd emit for aligned stores. | |
3590 | Only use unaligned stores if it allows fewer stores than aligned. */ | |
9991d1d3 | 3591 | unsigned aligned_cnt |
871a91ec | 3592 | = split_group (group, false, allow_unaligned_load, NULL, NULL, NULL); |
9991d1d3 | 3593 | unsigned unaligned_cnt |
871a91ec | 3594 | = split_group (group, true, allow_unaligned_load, NULL, NULL, NULL); |
902cb3b7 | 3595 | if (aligned_cnt <= unaligned_cnt) |
9991d1d3 | 3596 | allow_unaligned_store = false; |
902cb3b7 | 3597 | } |
871a91ec | 3598 | unsigned total_orig, total_new; |
9991d1d3 | 3599 | split_group (group, allow_unaligned_store, allow_unaligned_load, |
871a91ec | 3600 | &split_stores, &total_orig, &total_new); |
902cb3b7 | 3601 | |
3602 | if (split_stores.length () >= orig_num_stmts) | |
3603 | { | |
3604 | /* We didn't manage to reduce the number of statements. Bail out. */ | |
3605 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
871a91ec | 3606 | fprintf (dump_file, "Exceeded original number of stmts (%u)." |
3607 | " Not profitable to emit new sequence.\n", | |
3608 | orig_num_stmts); | |
79b9cc46 | 3609 | FOR_EACH_VEC_ELT (split_stores, i, split_store) |
3610 | delete split_store; | |
902cb3b7 | 3611 | return false; |
3612 | } | |
871a91ec | 3613 | if (total_orig <= total_new) |
3614 | { | |
3615 | /* If number of estimated new statements is above estimated original | |
3616 | statements, bail out too. */ | |
3617 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
3618 | fprintf (dump_file, "Estimated number of original stmts (%u)" | |
3619 | " not larger than estimated number of new" | |
3620 | " stmts (%u).\n", | |
3621 | total_orig, total_new); | |
79b9cc46 | 3622 | FOR_EACH_VEC_ELT (split_stores, i, split_store) |
3623 | delete split_store; | |
509ab8cd | 3624 | return false; |
871a91ec | 3625 | } |
3d3e04ac | 3626 | |
3627 | gimple_stmt_iterator last_gsi = gsi_for_stmt (group->last_stmt); | |
3628 | gimple_seq seq = NULL; | |
3d3e04ac | 3629 | tree last_vdef, new_vuse; |
3630 | last_vdef = gimple_vdef (group->last_stmt); | |
3631 | new_vuse = gimple_vuse (group->last_stmt); | |
509ab8cd | 3632 | tree bswap_res = NULL_TREE; |
3633 | ||
3634 | if (group->stores[0]->rhs_code == LROTATE_EXPR | |
3635 | || group->stores[0]->rhs_code == NOP_EXPR) | |
3636 | { | |
3637 | tree fndecl = NULL_TREE, bswap_type = NULL_TREE, load_type; | |
3638 | gimple *ins_stmt = group->stores[0]->ins_stmt; | |
3639 | struct symbolic_number *n = &group->stores[0]->n; | |
3640 | bool bswap = group->stores[0]->rhs_code == LROTATE_EXPR; | |
3641 | ||
3642 | switch (n->range) | |
3643 | { | |
3644 | case 16: | |
3645 | load_type = bswap_type = uint16_type_node; | |
3646 | break; | |
3647 | case 32: | |
3648 | load_type = uint32_type_node; | |
3649 | if (bswap) | |
3650 | { | |
3651 | fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32); | |
3652 | bswap_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))); | |
3653 | } | |
3654 | break; | |
3655 | case 64: | |
3656 | load_type = uint64_type_node; | |
3657 | if (bswap) | |
3658 | { | |
3659 | fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64); | |
3660 | bswap_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))); | |
3661 | } | |
3662 | break; | |
3663 | default: | |
3664 | gcc_unreachable (); | |
3665 | } | |
3666 | ||
3667 | /* If the loads have each vuse of the corresponding store, | |
3668 | we've checked the aliasing already in try_coalesce_bswap and | |
3669 | we want to sink the need load into seq. So need to use new_vuse | |
3670 | on the load. */ | |
58cff6a2 | 3671 | if (n->base_addr) |
509ab8cd | 3672 | { |
58cff6a2 | 3673 | if (n->vuse == NULL) |
3674 | { | |
3675 | n->vuse = new_vuse; | |
3676 | ins_stmt = NULL; | |
3677 | } | |
3678 | else | |
3679 | /* Update vuse in case it has changed by output_merged_stores. */ | |
3680 | n->vuse = gimple_vuse (ins_stmt); | |
509ab8cd | 3681 | } |
3682 | bswap_res = bswap_replace (gsi_start (seq), ins_stmt, fndecl, | |
3683 | bswap_type, load_type, n, bswap); | |
3684 | gcc_assert (bswap_res); | |
3685 | } | |
3d3e04ac | 3686 | |
3687 | gimple *stmt = NULL; | |
9991d1d3 | 3688 | auto_vec<gimple *, 32> orig_stmts; |
509ab8cd | 3689 | gimple_seq this_seq; |
3690 | tree addr = force_gimple_operand_1 (unshare_expr (base_addr), &this_seq, | |
427223f1 | 3691 | is_gimple_mem_ref_addr, NULL_TREE); |
509ab8cd | 3692 | gimple_seq_add_seq_without_update (&seq, this_seq); |
9991d1d3 | 3693 | |
3694 | tree load_addr[2] = { NULL_TREE, NULL_TREE }; | |
3695 | gimple_seq load_seq[2] = { NULL, NULL }; | |
3696 | gimple_stmt_iterator load_gsi[2] = { gsi_none (), gsi_none () }; | |
3697 | for (int j = 0; j < 2; ++j) | |
3698 | { | |
3699 | store_operand_info &op = group->stores[0]->ops[j]; | |
3700 | if (op.base_addr == NULL_TREE) | |
3701 | continue; | |
3702 | ||
3703 | store_immediate_info *infol = group->stores.last (); | |
3704 | if (gimple_vuse (op.stmt) == gimple_vuse (infol->ops[j].stmt)) | |
3705 | { | |
e0099abc | 3706 | /* We can't pick the location randomly; while we've verified |
3707 | all the loads have the same vuse, they can be still in different | |
3708 | basic blocks and we need to pick the one from the last bb: | |
3709 | int x = q[0]; | |
3710 | if (x == N) return; | |
3711 | int y = q[1]; | |
3712 | p[0] = x; | |
3713 | p[1] = y; | |
3714 | otherwise if we put the wider load at the q[0] load, we might | |
3715 | segfault if q[1] is not mapped. */ | |
3716 | basic_block bb = gimple_bb (op.stmt); | |
3717 | gimple *ostmt = op.stmt; | |
3718 | store_immediate_info *info; | |
3719 | FOR_EACH_VEC_ELT (group->stores, i, info) | |
3720 | { | |
3721 | gimple *tstmt = info->ops[j].stmt; | |
3722 | basic_block tbb = gimple_bb (tstmt); | |
3723 | if (dominated_by_p (CDI_DOMINATORS, tbb, bb)) | |
3724 | { | |
3725 | ostmt = tstmt; | |
3726 | bb = tbb; | |
3727 | } | |
3728 | } | |
3729 | load_gsi[j] = gsi_for_stmt (ostmt); | |
9991d1d3 | 3730 | load_addr[j] |
3731 | = force_gimple_operand_1 (unshare_expr (op.base_addr), | |
3732 | &load_seq[j], is_gimple_mem_ref_addr, | |
3733 | NULL_TREE); | |
3734 | } | |
3735 | else if (operand_equal_p (base_addr, op.base_addr, 0)) | |
3736 | load_addr[j] = addr; | |
3737 | else | |
ad3e5b2f | 3738 | { |
ad3e5b2f | 3739 | load_addr[j] |
3740 | = force_gimple_operand_1 (unshare_expr (op.base_addr), | |
3741 | &this_seq, is_gimple_mem_ref_addr, | |
3742 | NULL_TREE); | |
3743 | gimple_seq_add_seq_without_update (&seq, this_seq); | |
3744 | } | |
9991d1d3 | 3745 | } |
3746 | ||
3d3e04ac | 3747 | FOR_EACH_VEC_ELT (split_stores, i, split_store) |
3748 | { | |
3749 | unsigned HOST_WIDE_INT try_size = split_store->size; | |
3750 | unsigned HOST_WIDE_INT try_pos = split_store->bytepos; | |
10f0d48d | 3751 | unsigned HOST_WIDE_INT try_bitpos = try_pos * BITS_PER_UNIT; |
3d3e04ac | 3752 | unsigned HOST_WIDE_INT align = split_store->align; |
902cb3b7 | 3753 | tree dest, src; |
3754 | location_t loc; | |
3755 | if (split_store->orig) | |
3756 | { | |
3757 | /* If there is just a single constituent store which covers | |
3758 | the whole area, just reuse the lhs and rhs. */ | |
9991d1d3 | 3759 | gimple *orig_stmt = split_store->orig_stores[0]->stmt; |
3760 | dest = gimple_assign_lhs (orig_stmt); | |
3761 | src = gimple_assign_rhs1 (orig_stmt); | |
3762 | loc = gimple_location (orig_stmt); | |
902cb3b7 | 3763 | } |
3764 | else | |
3765 | { | |
9991d1d3 | 3766 | store_immediate_info *info; |
3767 | unsigned short clique, base; | |
3768 | unsigned int k; | |
3769 | FOR_EACH_VEC_ELT (split_store->orig_stores, k, info) | |
3770 | orig_stmts.safe_push (info->stmt); | |
902cb3b7 | 3771 | tree offset_type |
9991d1d3 | 3772 | = get_alias_type_for_stmts (orig_stmts, false, &clique, &base); |
3773 | loc = get_location_for_stmts (orig_stmts); | |
3774 | orig_stmts.truncate (0); | |
902cb3b7 | 3775 | |
3776 | tree int_type = build_nonstandard_integer_type (try_size, UNSIGNED); | |
3777 | int_type = build_aligned_type (int_type, align); | |
3778 | dest = fold_build2 (MEM_REF, int_type, addr, | |
3779 | build_int_cst (offset_type, try_pos)); | |
9991d1d3 | 3780 | if (TREE_CODE (dest) == MEM_REF) |
3781 | { | |
3782 | MR_DEPENDENCE_CLIQUE (dest) = clique; | |
3783 | MR_DEPENDENCE_BASE (dest) = base; | |
3784 | } | |
3785 | ||
10f0d48d | 3786 | tree mask; |
3787 | if (bswap_res) | |
3788 | mask = integer_zero_node; | |
3789 | else | |
509ab8cd | 3790 | mask = native_interpret_expr (int_type, |
3791 | group->mask + try_pos | |
3792 | - start_byte_pos, | |
3793 | group->buf_size); | |
9991d1d3 | 3794 | |
3795 | tree ops[2]; | |
3796 | for (int j = 0; | |
3797 | j < 1 + (split_store->orig_stores[0]->ops[1].val != NULL_TREE); | |
3798 | ++j) | |
3799 | { | |
3800 | store_operand_info &op = split_store->orig_stores[0]->ops[j]; | |
509ab8cd | 3801 | if (bswap_res) |
3802 | ops[j] = bswap_res; | |
3803 | else if (op.base_addr) | |
9991d1d3 | 3804 | { |
3805 | FOR_EACH_VEC_ELT (split_store->orig_stores, k, info) | |
3806 | orig_stmts.safe_push (info->ops[j].stmt); | |
3807 | ||
3808 | offset_type = get_alias_type_for_stmts (orig_stmts, true, | |
3809 | &clique, &base); | |
3810 | location_t load_loc = get_location_for_stmts (orig_stmts); | |
3811 | orig_stmts.truncate (0); | |
3812 | ||
3813 | unsigned HOST_WIDE_INT load_align = group->load_align[j]; | |
3814 | unsigned HOST_WIDE_INT align_bitpos | |
10f0d48d | 3815 | = known_alignment (try_bitpos |
e61263f2 | 3816 | - split_store->orig_stores[0]->bitpos |
3817 | + op.bitpos); | |
3818 | if (align_bitpos & (load_align - 1)) | |
9991d1d3 | 3819 | load_align = least_bit_hwi (align_bitpos); |
3820 | ||
3821 | tree load_int_type | |
3822 | = build_nonstandard_integer_type (try_size, UNSIGNED); | |
3823 | load_int_type | |
3824 | = build_aligned_type (load_int_type, load_align); | |
3825 | ||
e61263f2 | 3826 | poly_uint64 load_pos |
10f0d48d | 3827 | = exact_div (try_bitpos |
e61263f2 | 3828 | - split_store->orig_stores[0]->bitpos |
3829 | + op.bitpos, | |
3830 | BITS_PER_UNIT); | |
9991d1d3 | 3831 | ops[j] = fold_build2 (MEM_REF, load_int_type, load_addr[j], |
3832 | build_int_cst (offset_type, load_pos)); | |
3833 | if (TREE_CODE (ops[j]) == MEM_REF) | |
3834 | { | |
3835 | MR_DEPENDENCE_CLIQUE (ops[j]) = clique; | |
3836 | MR_DEPENDENCE_BASE (ops[j]) = base; | |
3837 | } | |
3838 | if (!integer_zerop (mask)) | |
3839 | /* The load might load some bits (that will be masked off | |
3840 | later on) uninitialized, avoid -W*uninitialized | |
3841 | warnings in that case. */ | |
3842 | TREE_NO_WARNING (ops[j]) = 1; | |
3843 | ||
3844 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
3845 | ops[j]); | |
3846 | gimple_set_location (stmt, load_loc); | |
3847 | if (gsi_bb (load_gsi[j])) | |
3848 | { | |
3849 | gimple_set_vuse (stmt, gimple_vuse (op.stmt)); | |
3850 | gimple_seq_add_stmt_without_update (&load_seq[j], stmt); | |
3851 | } | |
3852 | else | |
3853 | { | |
3854 | gimple_set_vuse (stmt, new_vuse); | |
3855 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3856 | } | |
3857 | ops[j] = gimple_assign_lhs (stmt); | |
9deedf62 | 3858 | tree xor_mask; |
3859 | enum tree_code inv_op | |
3860 | = invert_op (split_store, j, int_type, xor_mask); | |
3861 | if (inv_op != NOP_EXPR) | |
c35548ce | 3862 | { |
3863 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
9deedf62 | 3864 | inv_op, ops[j], xor_mask); |
c35548ce | 3865 | gimple_set_location (stmt, load_loc); |
3866 | ops[j] = gimple_assign_lhs (stmt); | |
3867 | ||
3868 | if (gsi_bb (load_gsi[j])) | |
3869 | gimple_seq_add_stmt_without_update (&load_seq[j], | |
3870 | stmt); | |
3871 | else | |
3872 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3873 | } | |
9991d1d3 | 3874 | } |
3875 | else | |
3876 | ops[j] = native_interpret_expr (int_type, | |
3877 | group->val + try_pos | |
3878 | - start_byte_pos, | |
3879 | group->buf_size); | |
3880 | } | |
3881 | ||
3882 | switch (split_store->orig_stores[0]->rhs_code) | |
3883 | { | |
3884 | case BIT_AND_EXPR: | |
3885 | case BIT_IOR_EXPR: | |
3886 | case BIT_XOR_EXPR: | |
3887 | FOR_EACH_VEC_ELT (split_store->orig_stores, k, info) | |
3888 | { | |
3889 | tree rhs1 = gimple_assign_rhs1 (info->stmt); | |
3890 | orig_stmts.safe_push (SSA_NAME_DEF_STMT (rhs1)); | |
3891 | } | |
3892 | location_t bit_loc; | |
3893 | bit_loc = get_location_for_stmts (orig_stmts); | |
3894 | orig_stmts.truncate (0); | |
3895 | ||
3896 | stmt | |
3897 | = gimple_build_assign (make_ssa_name (int_type), | |
3898 | split_store->orig_stores[0]->rhs_code, | |
3899 | ops[0], ops[1]); | |
3900 | gimple_set_location (stmt, bit_loc); | |
3901 | /* If there is just one load and there is a separate | |
3902 | load_seq[0], emit the bitwise op right after it. */ | |
3903 | if (load_addr[1] == NULL_TREE && gsi_bb (load_gsi[0])) | |
3904 | gimple_seq_add_stmt_without_update (&load_seq[0], stmt); | |
3905 | /* Otherwise, if at least one load is in seq, we need to | |
3906 | emit the bitwise op right before the store. If there | |
3907 | are two loads and are emitted somewhere else, it would | |
3908 | be better to emit the bitwise op as early as possible; | |
3909 | we don't track where that would be possible right now | |
3910 | though. */ | |
3911 | else | |
3912 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3913 | src = gimple_assign_lhs (stmt); | |
9deedf62 | 3914 | tree xor_mask; |
3915 | enum tree_code inv_op; | |
3916 | inv_op = invert_op (split_store, 2, int_type, xor_mask); | |
3917 | if (inv_op != NOP_EXPR) | |
832a73b9 | 3918 | { |
3919 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
9deedf62 | 3920 | inv_op, src, xor_mask); |
832a73b9 | 3921 | gimple_set_location (stmt, bit_loc); |
3922 | if (load_addr[1] == NULL_TREE && gsi_bb (load_gsi[0])) | |
3923 | gimple_seq_add_stmt_without_update (&load_seq[0], stmt); | |
3924 | else | |
3925 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3926 | src = gimple_assign_lhs (stmt); | |
3927 | } | |
9991d1d3 | 3928 | break; |
509ab8cd | 3929 | case LROTATE_EXPR: |
3930 | case NOP_EXPR: | |
3931 | src = ops[0]; | |
3932 | if (!is_gimple_val (src)) | |
3933 | { | |
3934 | stmt = gimple_build_assign (make_ssa_name (TREE_TYPE (src)), | |
3935 | src); | |
3936 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3937 | src = gimple_assign_lhs (stmt); | |
3938 | } | |
3939 | if (!useless_type_conversion_p (int_type, TREE_TYPE (src))) | |
3940 | { | |
3941 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
3942 | NOP_EXPR, src); | |
3943 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3944 | src = gimple_assign_lhs (stmt); | |
3945 | } | |
665dafda | 3946 | inv_op = invert_op (split_store, 2, int_type, xor_mask); |
3947 | if (inv_op != NOP_EXPR) | |
3948 | { | |
3949 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
3950 | inv_op, src, xor_mask); | |
3951 | gimple_set_location (stmt, loc); | |
3952 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
3953 | src = gimple_assign_lhs (stmt); | |
3954 | } | |
509ab8cd | 3955 | break; |
9991d1d3 | 3956 | default: |
3957 | src = ops[0]; | |
3958 | break; | |
3959 | } | |
3960 | ||
10f0d48d | 3961 | /* If bit insertion is required, we use the source as an accumulator |
3962 | into which the successive bit-field values are manually inserted. | |
3963 | FIXME: perhaps use BIT_INSERT_EXPR instead in some cases? */ | |
3964 | if (group->bit_insertion) | |
3965 | FOR_EACH_VEC_ELT (split_store->orig_stores, k, info) | |
3966 | if (info->rhs_code == BIT_INSERT_EXPR | |
3967 | && info->bitpos < try_bitpos + try_size | |
3968 | && info->bitpos + info->bitsize > try_bitpos) | |
3969 | { | |
3970 | /* Mask, truncate, convert to final type, shift and ior into | |
3971 | the accumulator. Note that every step can be a no-op. */ | |
3972 | const HOST_WIDE_INT start_gap = info->bitpos - try_bitpos; | |
3973 | const HOST_WIDE_INT end_gap | |
3974 | = (try_bitpos + try_size) - (info->bitpos + info->bitsize); | |
3975 | tree tem = info->ops[0].val; | |
1bcb04d5 | 3976 | if (TYPE_PRECISION (TREE_TYPE (tem)) <= info->bitsize) |
3977 | { | |
3978 | tree bitfield_type | |
3979 | = build_nonstandard_integer_type (info->bitsize, | |
3980 | UNSIGNED); | |
3981 | tem = gimple_convert (&seq, loc, bitfield_type, tem); | |
3982 | } | |
3983 | else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0) | |
10f0d48d | 3984 | { |
3985 | const unsigned HOST_WIDE_INT imask | |
3986 | = (HOST_WIDE_INT_1U << info->bitsize) - 1; | |
3987 | tem = gimple_build (&seq, loc, | |
3988 | BIT_AND_EXPR, TREE_TYPE (tem), tem, | |
3989 | build_int_cst (TREE_TYPE (tem), | |
3990 | imask)); | |
3991 | } | |
3992 | const HOST_WIDE_INT shift | |
3993 | = (BYTES_BIG_ENDIAN ? end_gap : start_gap); | |
3994 | if (shift < 0) | |
3995 | tem = gimple_build (&seq, loc, | |
3996 | RSHIFT_EXPR, TREE_TYPE (tem), tem, | |
3997 | build_int_cst (NULL_TREE, -shift)); | |
3998 | tem = gimple_convert (&seq, loc, int_type, tem); | |
3999 | if (shift > 0) | |
4000 | tem = gimple_build (&seq, loc, | |
4001 | LSHIFT_EXPR, int_type, tem, | |
4002 | build_int_cst (NULL_TREE, shift)); | |
4003 | src = gimple_build (&seq, loc, | |
4004 | BIT_IOR_EXPR, int_type, tem, src); | |
4005 | } | |
4006 | ||
902cb3b7 | 4007 | if (!integer_zerop (mask)) |
4008 | { | |
4009 | tree tem = make_ssa_name (int_type); | |
4010 | tree load_src = unshare_expr (dest); | |
4011 | /* The load might load some or all bits uninitialized, | |
4012 | avoid -W*uninitialized warnings in that case. | |
4013 | As optimization, it would be nice if all the bits are | |
4014 | provably uninitialized (no stores at all yet or previous | |
4015 | store a CLOBBER) we'd optimize away the load and replace | |
4016 | it e.g. with 0. */ | |
4017 | TREE_NO_WARNING (load_src) = 1; | |
4018 | stmt = gimple_build_assign (tem, load_src); | |
4019 | gimple_set_location (stmt, loc); | |
4020 | gimple_set_vuse (stmt, new_vuse); | |
4021 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
4022 | ||
4023 | /* FIXME: If there is a single chunk of zero bits in mask, | |
4024 | perhaps use BIT_INSERT_EXPR instead? */ | |
4025 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
4026 | BIT_AND_EXPR, tem, mask); | |
4027 | gimple_set_location (stmt, loc); | |
4028 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
4029 | tem = gimple_assign_lhs (stmt); | |
4030 | ||
9991d1d3 | 4031 | if (TREE_CODE (src) == INTEGER_CST) |
4032 | src = wide_int_to_tree (int_type, | |
4033 | wi::bit_and_not (wi::to_wide (src), | |
4034 | wi::to_wide (mask))); | |
4035 | else | |
4036 | { | |
4037 | tree nmask | |
4038 | = wide_int_to_tree (int_type, | |
4039 | wi::bit_not (wi::to_wide (mask))); | |
4040 | stmt = gimple_build_assign (make_ssa_name (int_type), | |
4041 | BIT_AND_EXPR, src, nmask); | |
4042 | gimple_set_location (stmt, loc); | |
4043 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
4044 | src = gimple_assign_lhs (stmt); | |
4045 | } | |
902cb3b7 | 4046 | stmt = gimple_build_assign (make_ssa_name (int_type), |
4047 | BIT_IOR_EXPR, tem, src); | |
4048 | gimple_set_location (stmt, loc); | |
4049 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
4050 | src = gimple_assign_lhs (stmt); | |
4051 | } | |
4052 | } | |
3d3e04ac | 4053 | |
4054 | stmt = gimple_build_assign (dest, src); | |
4055 | gimple_set_location (stmt, loc); | |
4056 | gimple_set_vuse (stmt, new_vuse); | |
4057 | gimple_seq_add_stmt_without_update (&seq, stmt); | |
4058 | ||
3d3e04ac | 4059 | tree new_vdef; |
4060 | if (i < split_stores.length () - 1) | |
902cb3b7 | 4061 | new_vdef = make_ssa_name (gimple_vop (cfun), stmt); |
3d3e04ac | 4062 | else |
4063 | new_vdef = last_vdef; | |
4064 | ||
4065 | gimple_set_vdef (stmt, new_vdef); | |
4066 | SSA_NAME_DEF_STMT (new_vdef) = stmt; | |
4067 | new_vuse = new_vdef; | |
4068 | } | |
4069 | ||
4070 | FOR_EACH_VEC_ELT (split_stores, i, split_store) | |
4071 | delete split_store; | |
4072 | ||
3d3e04ac | 4073 | gcc_assert (seq); |
4074 | if (dump_file) | |
4075 | { | |
4076 | fprintf (dump_file, | |
10f0d48d | 4077 | "New sequence of %u stores to replace old one of %u stores\n", |
902cb3b7 | 4078 | split_stores.length (), orig_num_stmts); |
3d3e04ac | 4079 | if (dump_flags & TDF_DETAILS) |
4080 | print_gimple_seq (dump_file, seq, 0, TDF_VOPS | TDF_MEMSYMS); | |
4081 | } | |
4082 | gsi_insert_seq_after (&last_gsi, seq, GSI_SAME_STMT); | |
9991d1d3 | 4083 | for (int j = 0; j < 2; ++j) |
4084 | if (load_seq[j]) | |
4085 | gsi_insert_seq_after (&load_gsi[j], load_seq[j], GSI_SAME_STMT); | |
3d3e04ac | 4086 | |
4087 | return true; | |
4088 | } | |
4089 | ||
4090 | /* Process the merged_store_group objects created in the coalescing phase. | |
4091 | The stores are all against the base object BASE. | |
4092 | Try to output the widened stores and delete the original statements if | |
4093 | successful. Return true iff any changes were made. */ | |
4094 | ||
4095 | bool | |
f85e7cb7 | 4096 | imm_store_chain_info::output_merged_stores () |
3d3e04ac | 4097 | { |
4098 | unsigned int i; | |
4099 | merged_store_group *merged_store; | |
4100 | bool ret = false; | |
4101 | FOR_EACH_VEC_ELT (m_merged_store_groups, i, merged_store) | |
4102 | { | |
f85e7cb7 | 4103 | if (output_merged_store (merged_store)) |
3d3e04ac | 4104 | { |
4105 | unsigned int j; | |
4106 | store_immediate_info *store; | |
4107 | FOR_EACH_VEC_ELT (merged_store->stores, j, store) | |
4108 | { | |
4109 | gimple *stmt = store->stmt; | |
4110 | gimple_stmt_iterator gsi = gsi_for_stmt (stmt); | |
4111 | gsi_remove (&gsi, true); | |
4112 | if (stmt != merged_store->last_stmt) | |
4113 | { | |
4114 | unlink_stmt_vdef (stmt); | |
4115 | release_defs (stmt); | |
4116 | } | |
4117 | } | |
4118 | ret = true; | |
4119 | } | |
4120 | } | |
4121 | if (ret && dump_file) | |
4122 | fprintf (dump_file, "Merging successful!\n"); | |
4123 | ||
4124 | return ret; | |
4125 | } | |
4126 | ||
4127 | /* Coalesce the store_immediate_info objects recorded against the base object | |
4128 | BASE in the first phase and output them. | |
4129 | Delete the allocated structures. | |
4130 | Return true if any changes were made. */ | |
4131 | ||
4132 | bool | |
f85e7cb7 | 4133 | imm_store_chain_info::terminate_and_process_chain () |
3d3e04ac | 4134 | { |
4135 | /* Process store chain. */ | |
4136 | bool ret = false; | |
4137 | if (m_store_info.length () > 1) | |
4138 | { | |
4139 | ret = coalesce_immediate_stores (); | |
4140 | if (ret) | |
f85e7cb7 | 4141 | ret = output_merged_stores (); |
3d3e04ac | 4142 | } |
4143 | ||
4144 | /* Delete all the entries we allocated ourselves. */ | |
4145 | store_immediate_info *info; | |
4146 | unsigned int i; | |
4147 | FOR_EACH_VEC_ELT (m_store_info, i, info) | |
4148 | delete info; | |
4149 | ||
4150 | merged_store_group *merged_info; | |
4151 | FOR_EACH_VEC_ELT (m_merged_store_groups, i, merged_info) | |
4152 | delete merged_info; | |
4153 | ||
4154 | return ret; | |
4155 | } | |
4156 | ||
4157 | /* Return true iff LHS is a destination potentially interesting for | |
4158 | store merging. In practice these are the codes that get_inner_reference | |
4159 | can process. */ | |
4160 | ||
4161 | static bool | |
4162 | lhs_valid_for_store_merging_p (tree lhs) | |
4163 | { | |
4164 | tree_code code = TREE_CODE (lhs); | |
4165 | ||
4166 | if (code == ARRAY_REF || code == ARRAY_RANGE_REF || code == MEM_REF | |
8b48bcf8 | 4167 | || code == COMPONENT_REF || code == BIT_FIELD_REF) |
3d3e04ac | 4168 | return true; |
4169 | ||
4170 | return false; | |
4171 | } | |
4172 | ||
4173 | /* Return true if the tree RHS is a constant we want to consider | |
4174 | during store merging. In practice accept all codes that | |
4175 | native_encode_expr accepts. */ | |
4176 | ||
4177 | static bool | |
4178 | rhs_valid_for_store_merging_p (tree rhs) | |
4179 | { | |
52acb7ae | 4180 | unsigned HOST_WIDE_INT size; |
4181 | return (GET_MODE_SIZE (TYPE_MODE (TREE_TYPE (rhs))).is_constant (&size) | |
4182 | && native_encode_expr (rhs, NULL, size) != 0); | |
3d3e04ac | 4183 | } |
4184 | ||
9991d1d3 | 4185 | /* If MEM is a memory reference usable for store merging (either as |
4186 | store destination or for loads), return the non-NULL base_addr | |
4187 | and set *PBITSIZE, *PBITPOS, *PBITREGION_START and *PBITREGION_END. | |
4188 | Otherwise return NULL, *PBITPOS should be still valid even for that | |
4189 | case. */ | |
4190 | ||
4191 | static tree | |
e61263f2 | 4192 | mem_valid_for_store_merging (tree mem, poly_uint64 *pbitsize, |
4193 | poly_uint64 *pbitpos, | |
4194 | poly_uint64 *pbitregion_start, | |
4195 | poly_uint64 *pbitregion_end) | |
9991d1d3 | 4196 | { |
e61263f2 | 4197 | poly_int64 bitsize, bitpos; |
4198 | poly_uint64 bitregion_start = 0, bitregion_end = 0; | |
9991d1d3 | 4199 | machine_mode mode; |
4200 | int unsignedp = 0, reversep = 0, volatilep = 0; | |
4201 | tree offset; | |
4202 | tree base_addr = get_inner_reference (mem, &bitsize, &bitpos, &offset, &mode, | |
4203 | &unsignedp, &reversep, &volatilep); | |
4204 | *pbitsize = bitsize; | |
e61263f2 | 4205 | if (known_eq (bitsize, 0)) |
9991d1d3 | 4206 | return NULL_TREE; |
4207 | ||
4208 | if (TREE_CODE (mem) == COMPONENT_REF | |
4209 | && DECL_BIT_FIELD_TYPE (TREE_OPERAND (mem, 1))) | |
4210 | { | |
4211 | get_bit_range (&bitregion_start, &bitregion_end, mem, &bitpos, &offset); | |
e61263f2 | 4212 | if (maybe_ne (bitregion_end, 0U)) |
4213 | bitregion_end += 1; | |
9991d1d3 | 4214 | } |
4215 | ||
4216 | if (reversep) | |
4217 | return NULL_TREE; | |
4218 | ||
4219 | /* We do not want to rewrite TARGET_MEM_REFs. */ | |
4220 | if (TREE_CODE (base_addr) == TARGET_MEM_REF) | |
4221 | return NULL_TREE; | |
4222 | /* In some cases get_inner_reference may return a | |
4223 | MEM_REF [ptr + byteoffset]. For the purposes of this pass | |
4224 | canonicalize the base_addr to MEM_REF [ptr] and take | |
4225 | byteoffset into account in the bitpos. This occurs in | |
4226 | PR 23684 and this way we can catch more chains. */ | |
4227 | else if (TREE_CODE (base_addr) == MEM_REF) | |
4228 | { | |
e61263f2 | 4229 | poly_offset_int byte_off = mem_ref_offset (base_addr); |
4230 | poly_offset_int bit_off = byte_off << LOG2_BITS_PER_UNIT; | |
9991d1d3 | 4231 | bit_off += bitpos; |
e61263f2 | 4232 | if (known_ge (bit_off, 0) && bit_off.to_shwi (&bitpos)) |
9991d1d3 | 4233 | { |
e61263f2 | 4234 | if (maybe_ne (bitregion_end, 0U)) |
9991d1d3 | 4235 | { |
4236 | bit_off = byte_off << LOG2_BITS_PER_UNIT; | |
4237 | bit_off += bitregion_start; | |
e61263f2 | 4238 | if (bit_off.to_uhwi (&bitregion_start)) |
9991d1d3 | 4239 | { |
9991d1d3 | 4240 | bit_off = byte_off << LOG2_BITS_PER_UNIT; |
4241 | bit_off += bitregion_end; | |
e61263f2 | 4242 | if (!bit_off.to_uhwi (&bitregion_end)) |
9991d1d3 | 4243 | bitregion_end = 0; |
4244 | } | |
4245 | else | |
4246 | bitregion_end = 0; | |
4247 | } | |
4248 | } | |
4249 | else | |
4250 | return NULL_TREE; | |
4251 | base_addr = TREE_OPERAND (base_addr, 0); | |
4252 | } | |
4253 | /* get_inner_reference returns the base object, get at its | |
4254 | address now. */ | |
4255 | else | |
4256 | { | |
e61263f2 | 4257 | if (maybe_lt (bitpos, 0)) |
9991d1d3 | 4258 | return NULL_TREE; |
4259 | base_addr = build_fold_addr_expr (base_addr); | |
4260 | } | |
4261 | ||
e61263f2 | 4262 | if (known_eq (bitregion_end, 0U)) |
9991d1d3 | 4263 | { |
e61263f2 | 4264 | bitregion_start = round_down_to_byte_boundary (bitpos); |
b870fc0c | 4265 | bitregion_end = bitpos; |
4266 | bitregion_end = round_up_to_byte_boundary (bitregion_end + bitsize); | |
9991d1d3 | 4267 | } |
4268 | ||
4269 | if (offset != NULL_TREE) | |
4270 | { | |
4271 | /* If the access is variable offset then a base decl has to be | |
4272 | address-taken to be able to emit pointer-based stores to it. | |
4273 | ??? We might be able to get away with re-using the original | |
4274 | base up to the first variable part and then wrapping that inside | |
4275 | a BIT_FIELD_REF. */ | |
4276 | tree base = get_base_address (base_addr); | |
4277 | if (! base | |
4278 | || (DECL_P (base) && ! TREE_ADDRESSABLE (base))) | |
4279 | return NULL_TREE; | |
4280 | ||
4281 | base_addr = build2 (POINTER_PLUS_EXPR, TREE_TYPE (base_addr), | |
4282 | base_addr, offset); | |
4283 | } | |
4284 | ||
4285 | *pbitsize = bitsize; | |
4286 | *pbitpos = bitpos; | |
4287 | *pbitregion_start = bitregion_start; | |
4288 | *pbitregion_end = bitregion_end; | |
4289 | return base_addr; | |
4290 | } | |
4291 | ||
4292 | /* Return true if STMT is a load that can be used for store merging. | |
4293 | In that case fill in *OP. BITSIZE, BITPOS, BITREGION_START and | |
4294 | BITREGION_END are properties of the corresponding store. */ | |
4295 | ||
4296 | static bool | |
4297 | handled_load (gimple *stmt, store_operand_info *op, | |
e61263f2 | 4298 | poly_uint64 bitsize, poly_uint64 bitpos, |
4299 | poly_uint64 bitregion_start, poly_uint64 bitregion_end) | |
9991d1d3 | 4300 | { |
c35548ce | 4301 | if (!is_gimple_assign (stmt)) |
9991d1d3 | 4302 | return false; |
c35548ce | 4303 | if (gimple_assign_rhs_code (stmt) == BIT_NOT_EXPR) |
4304 | { | |
4305 | tree rhs1 = gimple_assign_rhs1 (stmt); | |
4306 | if (TREE_CODE (rhs1) == SSA_NAME | |
c35548ce | 4307 | && handled_load (SSA_NAME_DEF_STMT (rhs1), op, bitsize, bitpos, |
4308 | bitregion_start, bitregion_end)) | |
4309 | { | |
832a73b9 | 4310 | /* Don't allow _1 = load; _2 = ~1; _3 = ~_2; which should have |
4311 | been optimized earlier, but if allowed here, would confuse the | |
4312 | multiple uses counting. */ | |
4313 | if (op->bit_not_p) | |
4314 | return false; | |
c35548ce | 4315 | op->bit_not_p = !op->bit_not_p; |
4316 | return true; | |
4317 | } | |
4318 | return false; | |
4319 | } | |
4320 | if (gimple_vuse (stmt) | |
4321 | && gimple_assign_load_p (stmt) | |
aac19106 | 4322 | && !stmt_can_throw_internal (cfun, stmt) |
9991d1d3 | 4323 | && !gimple_has_volatile_ops (stmt)) |
4324 | { | |
4325 | tree mem = gimple_assign_rhs1 (stmt); | |
4326 | op->base_addr | |
4327 | = mem_valid_for_store_merging (mem, &op->bitsize, &op->bitpos, | |
4328 | &op->bitregion_start, | |
4329 | &op->bitregion_end); | |
4330 | if (op->base_addr != NULL_TREE | |
e61263f2 | 4331 | && known_eq (op->bitsize, bitsize) |
4332 | && multiple_p (op->bitpos - bitpos, BITS_PER_UNIT) | |
4333 | && known_ge (op->bitpos - op->bitregion_start, | |
4334 | bitpos - bitregion_start) | |
4335 | && known_ge (op->bitregion_end - op->bitpos, | |
4336 | bitregion_end - bitpos)) | |
9991d1d3 | 4337 | { |
4338 | op->stmt = stmt; | |
4339 | op->val = mem; | |
c35548ce | 4340 | op->bit_not_p = false; |
9991d1d3 | 4341 | return true; |
4342 | } | |
4343 | } | |
4344 | return false; | |
4345 | } | |
4346 | ||
4347 | /* Record the store STMT for store merging optimization if it can be | |
4348 | optimized. */ | |
4349 | ||
4350 | void | |
4351 | pass_store_merging::process_store (gimple *stmt) | |
4352 | { | |
4353 | tree lhs = gimple_assign_lhs (stmt); | |
4354 | tree rhs = gimple_assign_rhs1 (stmt); | |
e61263f2 | 4355 | poly_uint64 bitsize, bitpos; |
4356 | poly_uint64 bitregion_start, bitregion_end; | |
9991d1d3 | 4357 | tree base_addr |
4358 | = mem_valid_for_store_merging (lhs, &bitsize, &bitpos, | |
4359 | &bitregion_start, &bitregion_end); | |
e61263f2 | 4360 | if (known_eq (bitsize, 0U)) |
9991d1d3 | 4361 | return; |
4362 | ||
4363 | bool invalid = (base_addr == NULL_TREE | |
e61263f2 | 4364 | || (maybe_gt (bitsize, |
4365 | (unsigned int) MAX_BITSIZE_MODE_ANY_INT) | |
4366 | && (TREE_CODE (rhs) != INTEGER_CST))); | |
9991d1d3 | 4367 | enum tree_code rhs_code = ERROR_MARK; |
832a73b9 | 4368 | bool bit_not_p = false; |
509ab8cd | 4369 | struct symbolic_number n; |
4370 | gimple *ins_stmt = NULL; | |
9991d1d3 | 4371 | store_operand_info ops[2]; |
4372 | if (invalid) | |
4373 | ; | |
4374 | else if (rhs_valid_for_store_merging_p (rhs)) | |
4375 | { | |
4376 | rhs_code = INTEGER_CST; | |
4377 | ops[0].val = rhs; | |
4378 | } | |
871a91ec | 4379 | else if (TREE_CODE (rhs) != SSA_NAME) |
9991d1d3 | 4380 | invalid = true; |
4381 | else | |
4382 | { | |
4383 | gimple *def_stmt = SSA_NAME_DEF_STMT (rhs), *def_stmt1, *def_stmt2; | |
4384 | if (!is_gimple_assign (def_stmt)) | |
4385 | invalid = true; | |
4386 | else if (handled_load (def_stmt, &ops[0], bitsize, bitpos, | |
4387 | bitregion_start, bitregion_end)) | |
4388 | rhs_code = MEM_REF; | |
832a73b9 | 4389 | else if (gimple_assign_rhs_code (def_stmt) == BIT_NOT_EXPR) |
4390 | { | |
4391 | tree rhs1 = gimple_assign_rhs1 (def_stmt); | |
4392 | if (TREE_CODE (rhs1) == SSA_NAME | |
4393 | && is_gimple_assign (SSA_NAME_DEF_STMT (rhs1))) | |
4394 | { | |
4395 | bit_not_p = true; | |
4396 | def_stmt = SSA_NAME_DEF_STMT (rhs1); | |
4397 | } | |
4398 | } | |
10f0d48d | 4399 | |
832a73b9 | 4400 | if (rhs_code == ERROR_MARK && !invalid) |
9991d1d3 | 4401 | switch ((rhs_code = gimple_assign_rhs_code (def_stmt))) |
4402 | { | |
4403 | case BIT_AND_EXPR: | |
4404 | case BIT_IOR_EXPR: | |
4405 | case BIT_XOR_EXPR: | |
4406 | tree rhs1, rhs2; | |
4407 | rhs1 = gimple_assign_rhs1 (def_stmt); | |
4408 | rhs2 = gimple_assign_rhs2 (def_stmt); | |
4409 | invalid = true; | |
871a91ec | 4410 | if (TREE_CODE (rhs1) != SSA_NAME) |
9991d1d3 | 4411 | break; |
4412 | def_stmt1 = SSA_NAME_DEF_STMT (rhs1); | |
4413 | if (!is_gimple_assign (def_stmt1) | |
4414 | || !handled_load (def_stmt1, &ops[0], bitsize, bitpos, | |
4415 | bitregion_start, bitregion_end)) | |
4416 | break; | |
4417 | if (rhs_valid_for_store_merging_p (rhs2)) | |
4418 | ops[1].val = rhs2; | |
871a91ec | 4419 | else if (TREE_CODE (rhs2) != SSA_NAME) |
9991d1d3 | 4420 | break; |
4421 | else | |
4422 | { | |
4423 | def_stmt2 = SSA_NAME_DEF_STMT (rhs2); | |
4424 | if (!is_gimple_assign (def_stmt2)) | |
4425 | break; | |
4426 | else if (!handled_load (def_stmt2, &ops[1], bitsize, bitpos, | |
4427 | bitregion_start, bitregion_end)) | |
4428 | break; | |
4429 | } | |
4430 | invalid = false; | |
4431 | break; | |
4432 | default: | |
4433 | invalid = true; | |
4434 | break; | |
4435 | } | |
10f0d48d | 4436 | |
e61263f2 | 4437 | unsigned HOST_WIDE_INT const_bitsize; |
4438 | if (bitsize.is_constant (&const_bitsize) | |
10f0d48d | 4439 | && (const_bitsize % BITS_PER_UNIT) == 0 |
e61263f2 | 4440 | && const_bitsize <= 64 |
10f0d48d | 4441 | && multiple_p (bitpos, BITS_PER_UNIT)) |
509ab8cd | 4442 | { |
4443 | ins_stmt = find_bswap_or_nop_1 (def_stmt, &n, 12); | |
4444 | if (ins_stmt) | |
4445 | { | |
4446 | uint64_t nn = n.n; | |
4447 | for (unsigned HOST_WIDE_INT i = 0; | |
e61263f2 | 4448 | i < const_bitsize; |
4449 | i += BITS_PER_UNIT, nn >>= BITS_PER_MARKER) | |
509ab8cd | 4450 | if ((nn & MARKER_MASK) == 0 |
4451 | || (nn & MARKER_MASK) == MARKER_BYTE_UNKNOWN) | |
4452 | { | |
4453 | ins_stmt = NULL; | |
4454 | break; | |
4455 | } | |
4456 | if (ins_stmt) | |
4457 | { | |
4458 | if (invalid) | |
4459 | { | |
4460 | rhs_code = LROTATE_EXPR; | |
4461 | ops[0].base_addr = NULL_TREE; | |
4462 | ops[1].base_addr = NULL_TREE; | |
4463 | } | |
4464 | invalid = false; | |
4465 | } | |
4466 | } | |
4467 | } | |
10f0d48d | 4468 | |
4469 | if (invalid | |
4470 | && bitsize.is_constant (&const_bitsize) | |
4471 | && ((const_bitsize % BITS_PER_UNIT) != 0 | |
4472 | || !multiple_p (bitpos, BITS_PER_UNIT)) | |
4473 | && const_bitsize <= 64) | |
4474 | { | |
1bcb04d5 | 4475 | /* Bypass a conversion to the bit-field type. */ |
4d885f78 | 4476 | if (!bit_not_p |
4477 | && is_gimple_assign (def_stmt) | |
4478 | && CONVERT_EXPR_CODE_P (rhs_code)) | |
10f0d48d | 4479 | { |
4480 | tree rhs1 = gimple_assign_rhs1 (def_stmt); | |
4481 | if (TREE_CODE (rhs1) == SSA_NAME | |
1bcb04d5 | 4482 | && INTEGRAL_TYPE_P (TREE_TYPE (rhs1))) |
10f0d48d | 4483 | rhs = rhs1; |
4484 | } | |
4485 | rhs_code = BIT_INSERT_EXPR; | |
4d885f78 | 4486 | bit_not_p = false; |
10f0d48d | 4487 | ops[0].val = rhs; |
4488 | ops[0].base_addr = NULL_TREE; | |
4489 | ops[1].base_addr = NULL_TREE; | |
4490 | invalid = false; | |
4491 | } | |
9991d1d3 | 4492 | } |
4493 | ||
e61263f2 | 4494 | unsigned HOST_WIDE_INT const_bitsize, const_bitpos; |
4495 | unsigned HOST_WIDE_INT const_bitregion_start, const_bitregion_end; | |
4496 | if (invalid | |
4497 | || !bitsize.is_constant (&const_bitsize) | |
4498 | || !bitpos.is_constant (&const_bitpos) | |
4499 | || !bitregion_start.is_constant (&const_bitregion_start) | |
4500 | || !bitregion_end.is_constant (&const_bitregion_end)) | |
9991d1d3 | 4501 | { |
c35548ce | 4502 | terminate_all_aliasing_chains (NULL, stmt); |
9991d1d3 | 4503 | return; |
4504 | } | |
4505 | ||
509ab8cd | 4506 | if (!ins_stmt) |
4507 | memset (&n, 0, sizeof (n)); | |
4508 | ||
c35548ce | 4509 | struct imm_store_chain_info **chain_info = NULL; |
4510 | if (base_addr) | |
4511 | chain_info = m_stores.get (base_addr); | |
4512 | ||
9991d1d3 | 4513 | store_immediate_info *info; |
4514 | if (chain_info) | |
4515 | { | |
4516 | unsigned int ord = (*chain_info)->m_store_info.length (); | |
e61263f2 | 4517 | info = new store_immediate_info (const_bitsize, const_bitpos, |
4518 | const_bitregion_start, | |
4519 | const_bitregion_end, | |
4520 | stmt, ord, rhs_code, n, ins_stmt, | |
832a73b9 | 4521 | bit_not_p, ops[0], ops[1]); |
9991d1d3 | 4522 | if (dump_file && (dump_flags & TDF_DETAILS)) |
4523 | { | |
4524 | fprintf (dump_file, "Recording immediate store from stmt:\n"); | |
4525 | print_gimple_stmt (dump_file, stmt, 0); | |
4526 | } | |
4527 | (*chain_info)->m_store_info.safe_push (info); | |
c35548ce | 4528 | terminate_all_aliasing_chains (chain_info, stmt); |
9991d1d3 | 4529 | /* If we reach the limit of stores to merge in a chain terminate and |
4530 | process the chain now. */ | |
4531 | if ((*chain_info)->m_store_info.length () | |
4532 | == (unsigned int) PARAM_VALUE (PARAM_MAX_STORES_TO_MERGE)) | |
4533 | { | |
4534 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
4535 | fprintf (dump_file, | |
4536 | "Reached maximum number of statements to merge:\n"); | |
4537 | terminate_and_release_chain (*chain_info); | |
4538 | } | |
4539 | return; | |
4540 | } | |
4541 | ||
4542 | /* Store aliases any existing chain? */ | |
c35548ce | 4543 | terminate_all_aliasing_chains (NULL, stmt); |
9991d1d3 | 4544 | /* Start a new chain. */ |
4545 | struct imm_store_chain_info *new_chain | |
4546 | = new imm_store_chain_info (m_stores_head, base_addr); | |
e61263f2 | 4547 | info = new store_immediate_info (const_bitsize, const_bitpos, |
4548 | const_bitregion_start, | |
4549 | const_bitregion_end, | |
4550 | stmt, 0, rhs_code, n, ins_stmt, | |
832a73b9 | 4551 | bit_not_p, ops[0], ops[1]); |
9991d1d3 | 4552 | new_chain->m_store_info.safe_push (info); |
4553 | m_stores.put (base_addr, new_chain); | |
4554 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
4555 | { | |
4556 | fprintf (dump_file, "Starting new chain with statement:\n"); | |
4557 | print_gimple_stmt (dump_file, stmt, 0); | |
4558 | fprintf (dump_file, "The base object is:\n"); | |
4559 | print_generic_expr (dump_file, base_addr); | |
4560 | fprintf (dump_file, "\n"); | |
4561 | } | |
4562 | } | |
4563 | ||
3d3e04ac | 4564 | /* Entry point for the pass. Go over each basic block recording chains of |
9991d1d3 | 4565 | immediate stores. Upon encountering a terminating statement (as defined |
4566 | by stmt_terminates_chain_p) process the recorded stores and emit the widened | |
4567 | variants. */ | |
3d3e04ac | 4568 | |
4569 | unsigned int | |
4570 | pass_store_merging::execute (function *fun) | |
4571 | { | |
4572 | basic_block bb; | |
4573 | hash_set<gimple *> orig_stmts; | |
4574 | ||
509ab8cd | 4575 | calculate_dominance_info (CDI_DOMINATORS); |
4576 | ||
3d3e04ac | 4577 | FOR_EACH_BB_FN (bb, fun) |
4578 | { | |
4579 | gimple_stmt_iterator gsi; | |
4580 | unsigned HOST_WIDE_INT num_statements = 0; | |
4581 | /* Record the original statements so that we can keep track of | |
4582 | statements emitted in this pass and not re-process new | |
4583 | statements. */ | |
4584 | for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi)) | |
4585 | { | |
4586 | if (is_gimple_debug (gsi_stmt (gsi))) | |
4587 | continue; | |
4588 | ||
63eabc9b | 4589 | if (++num_statements >= 2) |
3d3e04ac | 4590 | break; |
4591 | } | |
4592 | ||
4593 | if (num_statements < 2) | |
4594 | continue; | |
4595 | ||
4596 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
4597 | fprintf (dump_file, "Processing basic block <%d>:\n", bb->index); | |
4598 | ||
4599 | for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi)) | |
4600 | { | |
4601 | gimple *stmt = gsi_stmt (gsi); | |
4602 | ||
3a3ba7de | 4603 | if (is_gimple_debug (stmt)) |
4604 | continue; | |
4605 | ||
3d3e04ac | 4606 | if (gimple_has_volatile_ops (stmt)) |
4607 | { | |
4608 | /* Terminate all chains. */ | |
4609 | if (dump_file && (dump_flags & TDF_DETAILS)) | |
4610 | fprintf (dump_file, "Volatile access terminates " | |
4611 | "all chains\n"); | |
4612 | terminate_and_process_all_chains (); | |
4613 | continue; | |
4614 | } | |
4615 | ||
3d3e04ac | 4616 | if (gimple_assign_single_p (stmt) && gimple_vdef (stmt) |
aac19106 | 4617 | && !stmt_can_throw_internal (cfun, stmt) |
3d3e04ac | 4618 | && lhs_valid_for_store_merging_p (gimple_assign_lhs (stmt))) |
9991d1d3 | 4619 | process_store (stmt); |
4620 | else | |
4621 | terminate_all_aliasing_chains (NULL, stmt); | |
3d3e04ac | 4622 | } |
4623 | terminate_and_process_all_chains (); | |
4624 | } | |
4625 | return 0; | |
4626 | } | |
4627 | ||
4628 | } // anon namespace | |
4629 | ||
4630 | /* Construct and return a store merging pass object. */ | |
4631 | ||
4632 | gimple_opt_pass * | |
4633 | make_pass_store_merging (gcc::context *ctxt) | |
4634 | { | |
4635 | return new pass_store_merging (ctxt); | |
4636 | } | |
3d9a2fb3 | 4637 | |
4638 | #if CHECKING_P | |
4639 | ||
4640 | namespace selftest { | |
4641 | ||
4642 | /* Selftests for store merging helpers. */ | |
4643 | ||
4644 | /* Assert that all elements of the byte arrays X and Y, both of length N | |
4645 | are equal. */ | |
4646 | ||
4647 | static void | |
4648 | verify_array_eq (unsigned char *x, unsigned char *y, unsigned int n) | |
4649 | { | |
4650 | for (unsigned int i = 0; i < n; i++) | |
4651 | { | |
4652 | if (x[i] != y[i]) | |
4653 | { | |
4654 | fprintf (stderr, "Arrays do not match. X:\n"); | |
4655 | dump_char_array (stderr, x, n); | |
4656 | fprintf (stderr, "Y:\n"); | |
4657 | dump_char_array (stderr, y, n); | |
4658 | } | |
4659 | ASSERT_EQ (x[i], y[i]); | |
4660 | } | |
4661 | } | |
4662 | ||
4663 | /* Test shift_bytes_in_array and that it carries bits across between | |
4664 | bytes correctly. */ | |
4665 | ||
4666 | static void | |
4667 | verify_shift_bytes_in_array (void) | |
4668 | { | |
4669 | /* byte 1 | byte 0 | |
4670 | 00011111 | 11100000. */ | |
4671 | unsigned char orig[2] = { 0xe0, 0x1f }; | |
4672 | unsigned char in[2]; | |
4673 | memcpy (in, orig, sizeof orig); | |
4674 | ||
4675 | unsigned char expected[2] = { 0x80, 0x7f }; | |
4676 | shift_bytes_in_array (in, sizeof (in), 2); | |
4677 | verify_array_eq (in, expected, sizeof (in)); | |
4678 | ||
4679 | memcpy (in, orig, sizeof orig); | |
4680 | memcpy (expected, orig, sizeof orig); | |
4681 | /* Check that shifting by zero doesn't change anything. */ | |
4682 | shift_bytes_in_array (in, sizeof (in), 0); | |
4683 | verify_array_eq (in, expected, sizeof (in)); | |
4684 | ||
4685 | } | |
4686 | ||
4687 | /* Test shift_bytes_in_array_right and that it carries bits across between | |
4688 | bytes correctly. */ | |
4689 | ||
4690 | static void | |
4691 | verify_shift_bytes_in_array_right (void) | |
4692 | { | |
4693 | /* byte 1 | byte 0 | |
4694 | 00011111 | 11100000. */ | |
4695 | unsigned char orig[2] = { 0x1f, 0xe0}; | |
4696 | unsigned char in[2]; | |
4697 | memcpy (in, orig, sizeof orig); | |
4698 | unsigned char expected[2] = { 0x07, 0xf8}; | |
4699 | shift_bytes_in_array_right (in, sizeof (in), 2); | |
4700 | verify_array_eq (in, expected, sizeof (in)); | |
4701 | ||
4702 | memcpy (in, orig, sizeof orig); | |
4703 | memcpy (expected, orig, sizeof orig); | |
4704 | /* Check that shifting by zero doesn't change anything. */ | |
4705 | shift_bytes_in_array_right (in, sizeof (in), 0); | |
4706 | verify_array_eq (in, expected, sizeof (in)); | |
4707 | } | |
4708 | ||
4709 | /* Test clear_bit_region that it clears exactly the bits asked and | |
4710 | nothing more. */ | |
4711 | ||
4712 | static void | |
4713 | verify_clear_bit_region (void) | |
4714 | { | |
4715 | /* Start with all bits set and test clearing various patterns in them. */ | |
4716 | unsigned char orig[3] = { 0xff, 0xff, 0xff}; | |
4717 | unsigned char in[3]; | |
4718 | unsigned char expected[3]; | |
4719 | memcpy (in, orig, sizeof in); | |
4720 | ||
4721 | /* Check zeroing out all the bits. */ | |
4722 | clear_bit_region (in, 0, 3 * BITS_PER_UNIT); | |
4723 | expected[0] = expected[1] = expected[2] = 0; | |
4724 | verify_array_eq (in, expected, sizeof in); | |
4725 | ||
4726 | memcpy (in, orig, sizeof in); | |
4727 | /* Leave the first and last bits intact. */ | |
4728 | clear_bit_region (in, 1, 3 * BITS_PER_UNIT - 2); | |
4729 | expected[0] = 0x1; | |
4730 | expected[1] = 0; | |
4731 | expected[2] = 0x80; | |
4732 | verify_array_eq (in, expected, sizeof in); | |
4733 | } | |
4734 | ||
4735 | /* Test verify_clear_bit_region_be that it clears exactly the bits asked and | |
4736 | nothing more. */ | |
4737 | ||
4738 | static void | |
4739 | verify_clear_bit_region_be (void) | |
4740 | { | |
4741 | /* Start with all bits set and test clearing various patterns in them. */ | |
4742 | unsigned char orig[3] = { 0xff, 0xff, 0xff}; | |
4743 | unsigned char in[3]; | |
4744 | unsigned char expected[3]; | |
4745 | memcpy (in, orig, sizeof in); | |
4746 | ||
4747 | /* Check zeroing out all the bits. */ | |
4748 | clear_bit_region_be (in, BITS_PER_UNIT - 1, 3 * BITS_PER_UNIT); | |
4749 | expected[0] = expected[1] = expected[2] = 0; | |
4750 | verify_array_eq (in, expected, sizeof in); | |
4751 | ||
4752 | memcpy (in, orig, sizeof in); | |
4753 | /* Leave the first and last bits intact. */ | |
4754 | clear_bit_region_be (in, BITS_PER_UNIT - 2, 3 * BITS_PER_UNIT - 2); | |
4755 | expected[0] = 0x80; | |
4756 | expected[1] = 0; | |
4757 | expected[2] = 0x1; | |
4758 | verify_array_eq (in, expected, sizeof in); | |
4759 | } | |
4760 | ||
4761 | ||
4762 | /* Run all of the selftests within this file. */ | |
4763 | ||
4764 | void | |
4765 | store_merging_c_tests (void) | |
4766 | { | |
4767 | verify_shift_bytes_in_array (); | |
4768 | verify_shift_bytes_in_array_right (); | |
4769 | verify_clear_bit_region (); | |
4770 | verify_clear_bit_region_be (); | |
4771 | } | |
4772 | ||
4773 | } // namespace selftest | |
4774 | #endif /* CHECKING_P. */ |