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dffec8eb 1/* GIMPLE store merging and byte swapping passes.
a945c346 2 Copyright (C) 2009-2024 Free Software Foundation, Inc.
f663d9ad
KT
3 Contributed by ARM Ltd.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
c94c3532
EB
21/* The purpose of the store merging pass is to combine multiple memory stores
22 of constant values, values loaded from memory, bitwise operations on those,
23 or bit-field values, to consecutive locations, into fewer wider stores.
24
f663d9ad
KT
25 For example, if we have a sequence peforming four byte stores to
26 consecutive memory locations:
27 [p ] := imm1;
28 [p + 1B] := imm2;
29 [p + 2B] := imm3;
30 [p + 3B] := imm4;
31 we can transform this into a single 4-byte store if the target supports it:
c94c3532 32 [p] := imm1:imm2:imm3:imm4 concatenated according to endianness.
f663d9ad 33
245f6de1
JJ
34 Or:
35 [p ] := [q ];
36 [p + 1B] := [q + 1B];
37 [p + 2B] := [q + 2B];
38 [p + 3B] := [q + 3B];
39 if there is no overlap can be transformed into a single 4-byte
40 load followed by single 4-byte store.
41
42 Or:
43 [p ] := [q ] ^ imm1;
44 [p + 1B] := [q + 1B] ^ imm2;
45 [p + 2B] := [q + 2B] ^ imm3;
46 [p + 3B] := [q + 3B] ^ imm4;
47 if there is no overlap can be transformed into a single 4-byte
48 load, xored with imm1:imm2:imm3:imm4 and stored using a single 4-byte store.
49
c94c3532
EB
50 Or:
51 [p:1 ] := imm;
52 [p:31] := val & 0x7FFFFFFF;
53 we can transform this into a single 4-byte store if the target supports it:
54 [p] := imm:(val & 0x7FFFFFFF) concatenated according to endianness.
55
f663d9ad
KT
56 The algorithm is applied to each basic block in three phases:
57
c94c3532
EB
58 1) Scan through the basic block and record assignments to destinations
59 that can be expressed as a store to memory of a certain size at a certain
60 bit offset from base expressions we can handle. For bit-fields we also
61 record the surrounding bit region, i.e. bits that could be stored in
245f6de1
JJ
62 a read-modify-write operation when storing the bit-field. Record store
63 chains to different bases in a hash_map (m_stores) and make sure to
700d4cb0 64 terminate such chains when appropriate (for example when the stored
245f6de1 65 values get used subsequently).
f663d9ad
KT
66 These stores can be a result of structure element initializers, array stores
67 etc. A store_immediate_info object is recorded for every such store.
68 Record as many such assignments to a single base as possible until a
69 statement that interferes with the store sequence is encountered.
c94c3532
EB
70 Each store has up to 2 operands, which can be a either constant, a memory
71 load or an SSA name, from which the value to be stored can be computed.
245f6de1
JJ
72 At most one of the operands can be a constant. The operands are recorded
73 in store_operand_info struct.
f663d9ad 74
c94c3532 75 2) Analyze the chains of stores recorded in phase 1) (i.e. the vector of
f663d9ad 76 store_immediate_info objects) and coalesce contiguous stores into
c94c3532 77 merged_store_group objects. For bit-field stores, we don't need to
245f6de1
JJ
78 require the stores to be contiguous, just their surrounding bit regions
79 have to be contiguous. If the expression being stored is different
80 between adjacent stores, such as one store storing a constant and
81 following storing a value loaded from memory, or if the loaded memory
82 objects are not adjacent, a new merged_store_group is created as well.
f663d9ad
KT
83
84 For example, given the stores:
85 [p ] := 0;
86 [p + 1B] := 1;
87 [p + 3B] := 0;
88 [p + 4B] := 1;
89 [p + 5B] := 0;
90 [p + 6B] := 0;
91 This phase would produce two merged_store_group objects, one recording the
92 two bytes stored in the memory region [p : p + 1] and another
93 recording the four bytes stored in the memory region [p + 3 : p + 6].
94
95 3) The merged_store_group objects produced in phase 2) are processed
96 to generate the sequence of wider stores that set the contiguous memory
97 regions to the sequence of bytes that correspond to it. This may emit
98 multiple stores per store group to handle contiguous stores that are not
99 of a size that is a power of 2. For example it can try to emit a 40-bit
100 store as a 32-bit store followed by an 8-bit store.
c94c3532
EB
101 We try to emit as wide stores as we can while respecting STRICT_ALIGNMENT
102 or TARGET_SLOW_UNALIGNED_ACCESS settings.
f663d9ad
KT
103
104 Note on endianness and example:
105 Consider 2 contiguous 16-bit stores followed by 2 contiguous 8-bit stores:
106 [p ] := 0x1234;
107 [p + 2B] := 0x5678;
108 [p + 4B] := 0xab;
109 [p + 5B] := 0xcd;
110
111 The memory layout for little-endian (LE) and big-endian (BE) must be:
112 p |LE|BE|
113 ---------
114 0 |34|12|
115 1 |12|34|
116 2 |78|56|
117 3 |56|78|
118 4 |ab|ab|
119 5 |cd|cd|
120
121 To merge these into a single 48-bit merged value 'val' in phase 2)
122 on little-endian we insert stores to higher (consecutive) bitpositions
123 into the most significant bits of the merged value.
124 The final merged value would be: 0xcdab56781234
125
126 For big-endian we insert stores to higher bitpositions into the least
127 significant bits of the merged value.
128 The final merged value would be: 0x12345678abcd
129
130 Then, in phase 3), we want to emit this 48-bit value as a 32-bit store
131 followed by a 16-bit store. Again, we must consider endianness when
132 breaking down the 48-bit value 'val' computed above.
133 For little endian we emit:
134 [p] (32-bit) := 0x56781234; // val & 0x0000ffffffff;
135 [p + 4B] (16-bit) := 0xcdab; // (val & 0xffff00000000) >> 32;
136
137 Whereas for big-endian we emit:
138 [p] (32-bit) := 0x12345678; // (val & 0xffffffff0000) >> 16;
139 [p + 4B] (16-bit) := 0xabcd; // val & 0x00000000ffff; */
140
141#include "config.h"
142#include "system.h"
143#include "coretypes.h"
144#include "backend.h"
145#include "tree.h"
146#include "gimple.h"
147#include "builtins.h"
148#include "fold-const.h"
149#include "tree-pass.h"
150#include "ssa.h"
151#include "gimple-pretty-print.h"
152#include "alias.h"
153#include "fold-const.h"
f663d9ad
KT
154#include "print-tree.h"
155#include "tree-hash-traits.h"
156#include "gimple-iterator.h"
157#include "gimplify.h"
c94c3532 158#include "gimple-fold.h"
f663d9ad
KT
159#include "stor-layout.h"
160#include "timevar.h"
629387a6
EB
161#include "cfganal.h"
162#include "cfgcleanup.h"
f663d9ad 163#include "tree-cfg.h"
629387a6 164#include "except.h"
f663d9ad
KT
165#include "tree-eh.h"
166#include "target.h"
aa55dc0c 167#include "gimplify-me.h"
a62b3dc5
JJ
168#include "rtl.h"
169#include "expr.h" /* For get_bit_range. */
dffec8eb 170#include "optabs-tree.h"
a95b474a 171#include "dbgcnt.h"
c22d8787 172#include "selftest.h"
f663d9ad
KT
173
174/* The maximum size (in bits) of the stores this pass should generate. */
175#define MAX_STORE_BITSIZE (BITS_PER_WORD)
176#define MAX_STORE_BYTES (MAX_STORE_BITSIZE / BITS_PER_UNIT)
177
245f6de1
JJ
178/* Limit to bound the number of aliasing checks for loads with the same
179 vuse as the corresponding store. */
180#define MAX_STORE_ALIAS_CHECKS 64
181
f663d9ad
KT
182namespace {
183
bebadeca 184struct bswap_stat
dffec8eb
JJ
185{
186 /* Number of hand-written 16-bit nop / bswaps found. */
187 int found_16bit;
188
189 /* Number of hand-written 32-bit nop / bswaps found. */
190 int found_32bit;
191
192 /* Number of hand-written 64-bit nop / bswaps found. */
193 int found_64bit;
194} nop_stats, bswap_stats;
195
196/* A symbolic number structure is used to detect byte permutation and selection
197 patterns of a source. To achieve that, its field N contains an artificial
198 number consisting of BITS_PER_MARKER sized markers tracking where does each
199 byte come from in the source:
200
201 0 - target byte has the value 0
202 FF - target byte has an unknown value (eg. due to sign extension)
203 1..size - marker value is the byte index in the source (0 for lsb).
204
205 To detect permutations on memory sources (arrays and structures), a symbolic
206 number is also associated:
207 - a base address BASE_ADDR and an OFFSET giving the address of the source;
208 - a range which gives the difference between the highest and lowest accessed
209 memory location to make such a symbolic number;
210 - the address SRC of the source element of lowest address as a convenience
211 to easily get BASE_ADDR + offset + lowest bytepos;
212 - number of expressions N_OPS bitwise ored together to represent
213 approximate cost of the computation.
214
215 Note 1: the range is different from size as size reflects the size of the
216 type of the current expression. For instance, for an array char a[],
217 (short) a[0] | (short) a[3] would have a size of 2 but a range of 4 while
218 (short) a[0] | ((short) a[0] << 1) would still have a size of 2 but this
219 time a range of 1.
220
221 Note 2: for non-memory sources, range holds the same value as size.
222
223 Note 3: SRC points to the SSA_NAME in case of non-memory source. */
224
225struct symbolic_number {
226 uint64_t n;
227 tree type;
228 tree base_addr;
229 tree offset;
eaa41a6d 230 poly_int64 bytepos;
dffec8eb
JJ
231 tree src;
232 tree alias_set;
233 tree vuse;
234 unsigned HOST_WIDE_INT range;
235 int n_ops;
236};
237
238#define BITS_PER_MARKER 8
239#define MARKER_MASK ((1 << BITS_PER_MARKER) - 1)
240#define MARKER_BYTE_UNKNOWN MARKER_MASK
241#define HEAD_MARKER(n, size) \
242 ((n) & ((uint64_t) MARKER_MASK << (((size) - 1) * BITS_PER_MARKER)))
243
244/* The number which the find_bswap_or_nop_1 result should match in
245 order to have a nop. The number is masked according to the size of
246 the symbolic number before using it. */
247#define CMPNOP (sizeof (int64_t) < 8 ? 0 : \
248 (uint64_t)0x08070605 << 32 | 0x04030201)
249
250/* The number which the find_bswap_or_nop_1 result should match in
251 order to have a byte swap. The number is masked according to the
252 size of the symbolic number before using it. */
253#define CMPXCHG (sizeof (int64_t) < 8 ? 0 : \
254 (uint64_t)0x01020304 << 32 | 0x05060708)
255
256/* Perform a SHIFT or ROTATE operation by COUNT bits on symbolic
257 number N. Return false if the requested operation is not permitted
258 on a symbolic number. */
259
260inline bool
261do_shift_rotate (enum tree_code code,
262 struct symbolic_number *n,
263 int count)
264{
265 int i, size = TYPE_PRECISION (n->type) / BITS_PER_UNIT;
f675afa4 266 uint64_t head_marker;
dffec8eb 267
444cda74
JJ
268 if (count < 0
269 || count >= TYPE_PRECISION (n->type)
270 || count % BITS_PER_UNIT != 0)
dffec8eb
JJ
271 return false;
272 count = (count / BITS_PER_UNIT) * BITS_PER_MARKER;
273
274 /* Zero out the extra bits of N in order to avoid them being shifted
275 into the significant bits. */
276 if (size < 64 / BITS_PER_MARKER)
277 n->n &= ((uint64_t) 1 << (size * BITS_PER_MARKER)) - 1;
278
279 switch (code)
280 {
281 case LSHIFT_EXPR:
282 n->n <<= count;
283 break;
284 case RSHIFT_EXPR:
285 head_marker = HEAD_MARKER (n->n, size);
286 n->n >>= count;
287 /* Arithmetic shift of signed type: result is dependent on the value. */
288 if (!TYPE_UNSIGNED (n->type) && head_marker)
289 for (i = 0; i < count / BITS_PER_MARKER; i++)
290 n->n |= (uint64_t) MARKER_BYTE_UNKNOWN
291 << ((size - 1 - i) * BITS_PER_MARKER);
292 break;
293 case LROTATE_EXPR:
294 n->n = (n->n << count) | (n->n >> ((size * BITS_PER_MARKER) - count));
295 break;
296 case RROTATE_EXPR:
297 n->n = (n->n >> count) | (n->n << ((size * BITS_PER_MARKER) - count));
298 break;
299 default:
300 return false;
301 }
302 /* Zero unused bits for size. */
303 if (size < 64 / BITS_PER_MARKER)
304 n->n &= ((uint64_t) 1 << (size * BITS_PER_MARKER)) - 1;
305 return true;
306}
307
308/* Perform sanity checking for the symbolic number N and the gimple
309 statement STMT. */
310
311inline bool
312verify_symbolic_number_p (struct symbolic_number *n, gimple *stmt)
313{
314 tree lhs_type;
315
650c70a9 316 lhs_type = TREE_TYPE (gimple_get_lhs (stmt));
dffec8eb 317
5ea39b24
JJ
318 if (TREE_CODE (lhs_type) != INTEGER_TYPE
319 && TREE_CODE (lhs_type) != ENUMERAL_TYPE)
dffec8eb
JJ
320 return false;
321
322 if (TYPE_PRECISION (lhs_type) != TYPE_PRECISION (n->type))
323 return false;
324
325 return true;
326}
327
328/* Initialize the symbolic number N for the bswap pass from the base element
329 SRC manipulated by the bitwise OR expression. */
330
331bool
332init_symbolic_number (struct symbolic_number *n, tree src)
333{
334 int size;
335
5b9a65ec 336 if (!INTEGRAL_TYPE_P (TREE_TYPE (src)) && !POINTER_TYPE_P (TREE_TYPE (src)))
dffec8eb
JJ
337 return false;
338
339 n->base_addr = n->offset = n->alias_set = n->vuse = NULL_TREE;
340 n->src = src;
341
342 /* Set up the symbolic number N by setting each byte to a value between 1 and
343 the byte size of rhs1. The highest order byte is set to n->size and the
344 lowest order byte to 1. */
345 n->type = TREE_TYPE (src);
346 size = TYPE_PRECISION (n->type);
347 if (size % BITS_PER_UNIT != 0)
348 return false;
349 size /= BITS_PER_UNIT;
350 if (size > 64 / BITS_PER_MARKER)
351 return false;
352 n->range = size;
353 n->n = CMPNOP;
354 n->n_ops = 1;
355
356 if (size < 64 / BITS_PER_MARKER)
357 n->n &= ((uint64_t) 1 << (size * BITS_PER_MARKER)) - 1;
358
359 return true;
360}
361
362/* Check if STMT might be a byte swap or a nop from a memory source and returns
363 the answer. If so, REF is that memory source and the base of the memory area
364 accessed and the offset of the access from that base are recorded in N. */
365
366bool
367find_bswap_or_nop_load (gimple *stmt, tree ref, struct symbolic_number *n)
368{
369 /* Leaf node is an array or component ref. Memorize its base and
370 offset from base to compare to other such leaf node. */
f37fac2b 371 poly_int64 bitsize, bitpos, bytepos;
dffec8eb
JJ
372 machine_mode mode;
373 int unsignedp, reversep, volatilep;
374 tree offset, base_addr;
375
376 /* Not prepared to handle PDP endian. */
377 if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
378 return false;
379
380 if (!gimple_assign_load_p (stmt) || gimple_has_volatile_ops (stmt))
381 return false;
382
383 base_addr = get_inner_reference (ref, &bitsize, &bitpos, &offset, &mode,
384 &unsignedp, &reversep, &volatilep);
385
4b84d9b8
JJ
386 if (TREE_CODE (base_addr) == TARGET_MEM_REF)
387 /* Do not rewrite TARGET_MEM_REF. */
388 return false;
389 else if (TREE_CODE (base_addr) == MEM_REF)
dffec8eb 390 {
3fed2ce9 391 poly_offset_int bit_offset = 0;
dffec8eb
JJ
392 tree off = TREE_OPERAND (base_addr, 1);
393
394 if (!integer_zerop (off))
395 {
3fed2ce9
RS
396 poly_offset_int boff = mem_ref_offset (base_addr);
397 boff <<= LOG2_BITS_PER_UNIT;
dffec8eb
JJ
398 bit_offset += boff;
399 }
400
401 base_addr = TREE_OPERAND (base_addr, 0);
402
403 /* Avoid returning a negative bitpos as this may wreak havoc later. */
3fed2ce9 404 if (maybe_lt (bit_offset, 0))
dffec8eb 405 {
3fed2ce9
RS
406 tree byte_offset = wide_int_to_tree
407 (sizetype, bits_to_bytes_round_down (bit_offset));
408 bit_offset = num_trailing_bits (bit_offset);
dffec8eb 409 if (offset)
3fed2ce9 410 offset = size_binop (PLUS_EXPR, offset, byte_offset);
dffec8eb 411 else
3fed2ce9 412 offset = byte_offset;
dffec8eb
JJ
413 }
414
3fed2ce9 415 bitpos += bit_offset.force_shwi ();
dffec8eb 416 }
4b84d9b8
JJ
417 else
418 base_addr = build_fold_addr_expr (base_addr);
dffec8eb 419
f37fac2b 420 if (!multiple_p (bitpos, BITS_PER_UNIT, &bytepos))
dffec8eb 421 return false;
f37fac2b 422 if (!multiple_p (bitsize, BITS_PER_UNIT))
dffec8eb
JJ
423 return false;
424 if (reversep)
425 return false;
426
427 if (!init_symbolic_number (n, ref))
428 return false;
429 n->base_addr = base_addr;
430 n->offset = offset;
f37fac2b 431 n->bytepos = bytepos;
dffec8eb
JJ
432 n->alias_set = reference_alias_ptr_type (ref);
433 n->vuse = gimple_vuse (stmt);
434 return true;
435}
436
04eccbbe
JJ
437/* Compute the symbolic number N representing the result of a bitwise OR,
438 bitwise XOR or plus on 2 symbolic number N1 and N2 whose source statements
439 are respectively SOURCE_STMT1 and SOURCE_STMT2. CODE is the operation. */
dffec8eb
JJ
440
441gimple *
442perform_symbolic_merge (gimple *source_stmt1, struct symbolic_number *n1,
443 gimple *source_stmt2, struct symbolic_number *n2,
04eccbbe 444 struct symbolic_number *n, enum tree_code code)
dffec8eb
JJ
445{
446 int i, size;
447 uint64_t mask;
448 gimple *source_stmt;
449 struct symbolic_number *n_start;
450
451 tree rhs1 = gimple_assign_rhs1 (source_stmt1);
452 if (TREE_CODE (rhs1) == BIT_FIELD_REF
453 && TREE_CODE (TREE_OPERAND (rhs1, 0)) == SSA_NAME)
454 rhs1 = TREE_OPERAND (rhs1, 0);
455 tree rhs2 = gimple_assign_rhs1 (source_stmt2);
456 if (TREE_CODE (rhs2) == BIT_FIELD_REF
457 && TREE_CODE (TREE_OPERAND (rhs2, 0)) == SSA_NAME)
458 rhs2 = TREE_OPERAND (rhs2, 0);
459
460 /* Sources are different, cancel bswap if they are not memory location with
461 the same base (array, structure, ...). */
462 if (rhs1 != rhs2)
463 {
464 uint64_t inc;
4a022c70 465 HOST_WIDE_INT start1, start2, start_sub, end_sub, end1, end2, end;
dffec8eb
JJ
466 struct symbolic_number *toinc_n_ptr, *n_end;
467 basic_block bb1, bb2;
468
469 if (!n1->base_addr || !n2->base_addr
470 || !operand_equal_p (n1->base_addr, n2->base_addr, 0))
471 return NULL;
472
473 if (!n1->offset != !n2->offset
474 || (n1->offset && !operand_equal_p (n1->offset, n2->offset, 0)))
475 return NULL;
476
4a022c70
RS
477 start1 = 0;
478 if (!(n2->bytepos - n1->bytepos).is_constant (&start2))
479 return NULL;
480
481 if (start1 < start2)
dffec8eb
JJ
482 {
483 n_start = n1;
4a022c70 484 start_sub = start2 - start1;
dffec8eb
JJ
485 }
486 else
487 {
488 n_start = n2;
4a022c70 489 start_sub = start1 - start2;
dffec8eb
JJ
490 }
491
492 bb1 = gimple_bb (source_stmt1);
493 bb2 = gimple_bb (source_stmt2);
494 if (dominated_by_p (CDI_DOMINATORS, bb1, bb2))
495 source_stmt = source_stmt1;
496 else
497 source_stmt = source_stmt2;
498
499 /* Find the highest address at which a load is performed and
500 compute related info. */
4a022c70
RS
501 end1 = start1 + (n1->range - 1);
502 end2 = start2 + (n2->range - 1);
dffec8eb
JJ
503 if (end1 < end2)
504 {
505 end = end2;
506 end_sub = end2 - end1;
507 }
508 else
509 {
510 end = end1;
511 end_sub = end1 - end2;
512 }
513 n_end = (end2 > end1) ? n2 : n1;
514
515 /* Find symbolic number whose lsb is the most significant. */
516 if (BYTES_BIG_ENDIAN)
517 toinc_n_ptr = (n_end == n1) ? n2 : n1;
518 else
519 toinc_n_ptr = (n_start == n1) ? n2 : n1;
520
4a022c70 521 n->range = end - MIN (start1, start2) + 1;
dffec8eb
JJ
522
523 /* Check that the range of memory covered can be represented by
524 a symbolic number. */
525 if (n->range > 64 / BITS_PER_MARKER)
526 return NULL;
527
528 /* Reinterpret byte marks in symbolic number holding the value of
529 bigger weight according to target endianness. */
530 inc = BYTES_BIG_ENDIAN ? end_sub : start_sub;
531 size = TYPE_PRECISION (n1->type) / BITS_PER_UNIT;
532 for (i = 0; i < size; i++, inc <<= BITS_PER_MARKER)
533 {
534 unsigned marker
535 = (toinc_n_ptr->n >> (i * BITS_PER_MARKER)) & MARKER_MASK;
536 if (marker && marker != MARKER_BYTE_UNKNOWN)
537 toinc_n_ptr->n += inc;
538 }
539 }
540 else
541 {
542 n->range = n1->range;
543 n_start = n1;
544 source_stmt = source_stmt1;
545 }
546
547 if (!n1->alias_set
548 || alias_ptr_types_compatible_p (n1->alias_set, n2->alias_set))
549 n->alias_set = n1->alias_set;
550 else
551 n->alias_set = ptr_type_node;
552 n->vuse = n_start->vuse;
553 n->base_addr = n_start->base_addr;
554 n->offset = n_start->offset;
555 n->src = n_start->src;
556 n->bytepos = n_start->bytepos;
557 n->type = n_start->type;
558 size = TYPE_PRECISION (n->type) / BITS_PER_UNIT;
531dae29 559 uint64_t res_n = n1->n | n2->n;
dffec8eb
JJ
560
561 for (i = 0, mask = MARKER_MASK; i < size; i++, mask <<= BITS_PER_MARKER)
562 {
563 uint64_t masked1, masked2;
564
565 masked1 = n1->n & mask;
566 masked2 = n2->n & mask;
531dae29
JJ
567 /* If at least one byte is 0, all of 0 | x == 0 ^ x == 0 + x == x. */
568 if (masked1 && masked2)
569 {
570 /* + can carry into upper bits, just punt. */
571 if (code == PLUS_EXPR)
572 return NULL;
573 /* x | x is still x. */
574 if (code == BIT_IOR_EXPR && masked1 == masked2)
575 continue;
576 if (code == BIT_XOR_EXPR)
577 {
578 /* x ^ x is 0, but MARKER_BYTE_UNKNOWN stands for
579 unknown values and unknown ^ unknown is unknown. */
580 if (masked1 == masked2
581 && masked1 != ((uint64_t) MARKER_BYTE_UNKNOWN
582 << i * BITS_PER_MARKER))
583 {
584 res_n &= ~mask;
585 continue;
586 }
587 }
588 /* Otherwise set the byte to unknown, it might still be
589 later masked off. */
590 res_n |= mask;
591 }
dffec8eb 592 }
531dae29 593 n->n = res_n;
dffec8eb
JJ
594 n->n_ops = n1->n_ops + n2->n_ops;
595
596 return source_stmt;
597}
598
599/* find_bswap_or_nop_1 invokes itself recursively with N and tries to perform
600 the operation given by the rhs of STMT on the result. If the operation
601 could successfully be executed the function returns a gimple stmt whose
602 rhs's first tree is the expression of the source operand and NULL
603 otherwise. */
604
605gimple *
606find_bswap_or_nop_1 (gimple *stmt, struct symbolic_number *n, int limit)
607{
608 enum tree_code code;
609 tree rhs1, rhs2 = NULL;
610 gimple *rhs1_stmt, *rhs2_stmt, *source_stmt1;
611 enum gimple_rhs_class rhs_class;
612
613 if (!limit || !is_gimple_assign (stmt))
614 return NULL;
615
616 rhs1 = gimple_assign_rhs1 (stmt);
617
618 if (find_bswap_or_nop_load (stmt, rhs1, n))
619 return stmt;
620
621 /* Handle BIT_FIELD_REF. */
622 if (TREE_CODE (rhs1) == BIT_FIELD_REF
623 && TREE_CODE (TREE_OPERAND (rhs1, 0)) == SSA_NAME)
624 {
35cf3c55
KZ
625 if (!tree_fits_uhwi_p (TREE_OPERAND (rhs1, 1))
626 || !tree_fits_uhwi_p (TREE_OPERAND (rhs1, 2)))
627 return NULL;
628
dffec8eb
JJ
629 unsigned HOST_WIDE_INT bitsize = tree_to_uhwi (TREE_OPERAND (rhs1, 1));
630 unsigned HOST_WIDE_INT bitpos = tree_to_uhwi (TREE_OPERAND (rhs1, 2));
631 if (bitpos % BITS_PER_UNIT == 0
632 && bitsize % BITS_PER_UNIT == 0
633 && init_symbolic_number (n, TREE_OPERAND (rhs1, 0)))
634 {
635 /* Handle big-endian bit numbering in BIT_FIELD_REF. */
636 if (BYTES_BIG_ENDIAN)
637 bitpos = TYPE_PRECISION (n->type) - bitpos - bitsize;
638
639 /* Shift. */
640 if (!do_shift_rotate (RSHIFT_EXPR, n, bitpos))
641 return NULL;
642
643 /* Mask. */
644 uint64_t mask = 0;
645 uint64_t tmp = (1 << BITS_PER_UNIT) - 1;
646 for (unsigned i = 0; i < bitsize / BITS_PER_UNIT;
647 i++, tmp <<= BITS_PER_UNIT)
648 mask |= (uint64_t) MARKER_MASK << (i * BITS_PER_MARKER);
649 n->n &= mask;
650
651 /* Convert. */
652 n->type = TREE_TYPE (rhs1);
4f8e31e0
RB
653 if (!verify_symbolic_number_p (n, stmt))
654 return NULL;
655
dffec8eb
JJ
656 if (!n->base_addr)
657 n->range = TYPE_PRECISION (n->type) / BITS_PER_UNIT;
658
4f8e31e0 659 return stmt;
dffec8eb
JJ
660 }
661
662 return NULL;
663 }
664
665 if (TREE_CODE (rhs1) != SSA_NAME)
666 return NULL;
667
668 code = gimple_assign_rhs_code (stmt);
669 rhs_class = gimple_assign_rhs_class (stmt);
670 rhs1_stmt = SSA_NAME_DEF_STMT (rhs1);
671
672 if (rhs_class == GIMPLE_BINARY_RHS)
673 rhs2 = gimple_assign_rhs2 (stmt);
674
675 /* Handle unary rhs and binary rhs with integer constants as second
676 operand. */
677
678 if (rhs_class == GIMPLE_UNARY_RHS
679 || (rhs_class == GIMPLE_BINARY_RHS
680 && TREE_CODE (rhs2) == INTEGER_CST))
681 {
682 if (code != BIT_AND_EXPR
683 && code != LSHIFT_EXPR
684 && code != RSHIFT_EXPR
685 && code != LROTATE_EXPR
686 && code != RROTATE_EXPR
687 && !CONVERT_EXPR_CODE_P (code))
688 return NULL;
689
690 source_stmt1 = find_bswap_or_nop_1 (rhs1_stmt, n, limit - 1);
691
692 /* If find_bswap_or_nop_1 returned NULL, STMT is a leaf node and
693 we have to initialize the symbolic number. */
694 if (!source_stmt1)
695 {
696 if (gimple_assign_load_p (stmt)
697 || !init_symbolic_number (n, rhs1))
698 return NULL;
699 source_stmt1 = stmt;
700 }
701
702 switch (code)
703 {
704 case BIT_AND_EXPR:
705 {
706 int i, size = TYPE_PRECISION (n->type) / BITS_PER_UNIT;
707 uint64_t val = int_cst_value (rhs2), mask = 0;
708 uint64_t tmp = (1 << BITS_PER_UNIT) - 1;
709
710 /* Only constants masking full bytes are allowed. */
711 for (i = 0; i < size; i++, tmp <<= BITS_PER_UNIT)
712 if ((val & tmp) != 0 && (val & tmp) != tmp)
713 return NULL;
714 else if (val & tmp)
715 mask |= (uint64_t) MARKER_MASK << (i * BITS_PER_MARKER);
716
717 n->n &= mask;
718 }
719 break;
720 case LSHIFT_EXPR:
721 case RSHIFT_EXPR:
722 case LROTATE_EXPR:
723 case RROTATE_EXPR:
724 if (!do_shift_rotate (code, n, (int) TREE_INT_CST_LOW (rhs2)))
725 return NULL;
726 break;
727 CASE_CONVERT:
728 {
729 int i, type_size, old_type_size;
730 tree type;
731
650c70a9 732 type = TREE_TYPE (gimple_assign_lhs (stmt));
dffec8eb
JJ
733 type_size = TYPE_PRECISION (type);
734 if (type_size % BITS_PER_UNIT != 0)
735 return NULL;
736 type_size /= BITS_PER_UNIT;
737 if (type_size > 64 / BITS_PER_MARKER)
738 return NULL;
739
740 /* Sign extension: result is dependent on the value. */
741 old_type_size = TYPE_PRECISION (n->type) / BITS_PER_UNIT;
742 if (!TYPE_UNSIGNED (n->type) && type_size > old_type_size
743 && HEAD_MARKER (n->n, old_type_size))
744 for (i = 0; i < type_size - old_type_size; i++)
745 n->n |= (uint64_t) MARKER_BYTE_UNKNOWN
746 << ((type_size - 1 - i) * BITS_PER_MARKER);
747
748 if (type_size < 64 / BITS_PER_MARKER)
749 {
750 /* If STMT casts to a smaller type mask out the bits not
751 belonging to the target type. */
752 n->n &= ((uint64_t) 1 << (type_size * BITS_PER_MARKER)) - 1;
753 }
754 n->type = type;
755 if (!n->base_addr)
756 n->range = type_size;
757 }
758 break;
759 default:
760 return NULL;
761 };
762 return verify_symbolic_number_p (n, stmt) ? source_stmt1 : NULL;
763 }
764
765 /* Handle binary rhs. */
766
767 if (rhs_class == GIMPLE_BINARY_RHS)
768 {
769 struct symbolic_number n1, n2;
770 gimple *source_stmt, *source_stmt2;
771
a944b5de 772 if (!rhs2 || TREE_CODE (rhs2) != SSA_NAME)
dffec8eb
JJ
773 return NULL;
774
775 rhs2_stmt = SSA_NAME_DEF_STMT (rhs2);
776
777 switch (code)
778 {
779 case BIT_IOR_EXPR:
a944b5de
RS
780 case BIT_XOR_EXPR:
781 case PLUS_EXPR:
dffec8eb
JJ
782 source_stmt1 = find_bswap_or_nop_1 (rhs1_stmt, &n1, limit - 1);
783
784 if (!source_stmt1)
785 return NULL;
786
787 source_stmt2 = find_bswap_or_nop_1 (rhs2_stmt, &n2, limit - 1);
788
789 if (!source_stmt2)
790 return NULL;
791
792 if (TYPE_PRECISION (n1.type) != TYPE_PRECISION (n2.type))
793 return NULL;
794
4b84d9b8 795 if (n1.vuse != n2.vuse)
dffec8eb
JJ
796 return NULL;
797
798 source_stmt
04eccbbe
JJ
799 = perform_symbolic_merge (source_stmt1, &n1, source_stmt2, &n2, n,
800 code);
dffec8eb
JJ
801
802 if (!source_stmt)
803 return NULL;
804
805 if (!verify_symbolic_number_p (n, stmt))
806 return NULL;
807
808 break;
809 default:
810 return NULL;
811 }
812 return source_stmt;
813 }
814 return NULL;
815}
816
4b84d9b8
JJ
817/* Helper for find_bswap_or_nop and try_coalesce_bswap to compute
818 *CMPXCHG, *CMPNOP and adjust *N. */
dffec8eb 819
4b84d9b8
JJ
820void
821find_bswap_or_nop_finalize (struct symbolic_number *n, uint64_t *cmpxchg,
b320edc0 822 uint64_t *cmpnop, bool *cast64_to_32)
dffec8eb
JJ
823{
824 unsigned rsize;
825 uint64_t tmpn, mask;
dffec8eb 826
4b84d9b8
JJ
827 /* The number which the find_bswap_or_nop_1 result should match in order
828 to have a full byte swap. The number is shifted to the right
829 according to the size of the symbolic number before using it. */
830 *cmpxchg = CMPXCHG;
831 *cmpnop = CMPNOP;
b320edc0 832 *cast64_to_32 = false;
dffec8eb
JJ
833
834 /* Find real size of result (highest non-zero byte). */
835 if (n->base_addr)
836 for (tmpn = n->n, rsize = 0; tmpn; tmpn >>= BITS_PER_MARKER, rsize++);
837 else
838 rsize = n->range;
839
840 /* Zero out the bits corresponding to untouched bytes in original gimple
841 expression. */
842 if (n->range < (int) sizeof (int64_t))
843 {
844 mask = ((uint64_t) 1 << (n->range * BITS_PER_MARKER)) - 1;
b320edc0
JJ
845 if (n->base_addr == NULL
846 && n->range == 4
847 && int_size_in_bytes (TREE_TYPE (n->src)) == 8)
848 {
849 /* If all bytes in n->n are either 0 or in [5..8] range, this
850 might be a candidate for (unsigned) __builtin_bswap64 (src).
851 It is not worth it for (unsigned short) __builtin_bswap64 (src)
852 or (unsigned short) __builtin_bswap32 (src). */
853 *cast64_to_32 = true;
854 for (tmpn = n->n; tmpn; tmpn >>= BITS_PER_MARKER)
855 if ((tmpn & MARKER_MASK)
856 && ((tmpn & MARKER_MASK) <= 4 || (tmpn & MARKER_MASK) > 8))
857 {
858 *cast64_to_32 = false;
859 break;
860 }
861 }
862 if (*cast64_to_32)
863 *cmpxchg &= mask;
864 else
865 *cmpxchg >>= (64 / BITS_PER_MARKER - n->range) * BITS_PER_MARKER;
4b84d9b8 866 *cmpnop &= mask;
dffec8eb
JJ
867 }
868
869 /* Zero out the bits corresponding to unused bytes in the result of the
870 gimple expression. */
871 if (rsize < n->range)
872 {
873 if (BYTES_BIG_ENDIAN)
874 {
875 mask = ((uint64_t) 1 << (rsize * BITS_PER_MARKER)) - 1;
4b84d9b8 876 *cmpxchg &= mask;
567d5f3d
JJ
877 if (n->range - rsize == sizeof (int64_t))
878 *cmpnop = 0;
879 else
880 *cmpnop >>= (n->range - rsize) * BITS_PER_MARKER;
dffec8eb
JJ
881 }
882 else
883 {
884 mask = ((uint64_t) 1 << (rsize * BITS_PER_MARKER)) - 1;
567d5f3d
JJ
885 if (n->range - rsize == sizeof (int64_t))
886 *cmpxchg = 0;
887 else
888 *cmpxchg >>= (n->range - rsize) * BITS_PER_MARKER;
4b84d9b8 889 *cmpnop &= mask;
dffec8eb
JJ
890 }
891 n->range = rsize;
892 }
893
b320edc0
JJ
894 if (*cast64_to_32)
895 n->range = 8;
4b84d9b8
JJ
896 n->range *= BITS_PER_UNIT;
897}
898
d8545fb2 899/* Helper function for find_bswap_or_nop,
900 Return true if N is a swap or nop with MASK. */
901static bool
902is_bswap_or_nop_p (uint64_t n, uint64_t cmpxchg,
903 uint64_t cmpnop, uint64_t* mask,
904 bool* bswap)
905{
906 *mask = ~(uint64_t) 0;
907 if (n == cmpnop)
908 *bswap = false;
909 else if (n == cmpxchg)
910 *bswap = true;
911 else
912 {
913 int set = 0;
914 for (uint64_t msk = MARKER_MASK; msk; msk <<= BITS_PER_MARKER)
915 if ((n & msk) == 0)
916 *mask &= ~msk;
917 else if ((n & msk) == (cmpxchg & msk))
918 set++;
919 else
920 return false;
921
922 if (set < 2)
923 return false;
924 *bswap = true;
925 }
926 return true;
927}
928
929
4b84d9b8
JJ
930/* Check if STMT completes a bswap implementation or a read in a given
931 endianness consisting of ORs, SHIFTs and ANDs and sets *BSWAP
932 accordingly. It also sets N to represent the kind of operations
933 performed: size of the resulting expression and whether it works on
934 a memory source, and if so alias-set and vuse. At last, the
935 function returns a stmt whose rhs's first tree is the source
936 expression. */
937
938gimple *
b320edc0 939find_bswap_or_nop (gimple *stmt, struct symbolic_number *n, bool *bswap,
d8545fb2 940 bool *cast64_to_32, uint64_t *mask, uint64_t* l_rotate)
4b84d9b8 941{
650c70a9 942 tree type_size = TYPE_SIZE_UNIT (TREE_TYPE (gimple_get_lhs (stmt)));
7f0ce82a
KT
943 if (!tree_fits_uhwi_p (type_size))
944 return NULL;
945
4b84d9b8
JJ
946 /* The last parameter determines the depth search limit. It usually
947 correlates directly to the number n of bytes to be touched. We
0f507a36 948 increase that number by 2 * (log2(n) + 1) here in order to also
4b84d9b8
JJ
949 cover signed -> unsigned conversions of the src operand as can be seen
950 in libgcc, and for initial shift/and operation of the src operand. */
7f0ce82a 951 int limit = tree_to_uhwi (type_size);
0f507a36 952 limit += 2 * (1 + (int) ceil_log2 ((unsigned HOST_WIDE_INT) limit));
4b84d9b8
JJ
953 gimple *ins_stmt = find_bswap_or_nop_1 (stmt, n, limit);
954
955 if (!ins_stmt)
cd676dfa
JJ
956 {
957 if (gimple_assign_rhs_code (stmt) != CONSTRUCTOR
958 || BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
959 return NULL;
960 unsigned HOST_WIDE_INT sz = tree_to_uhwi (type_size) * BITS_PER_UNIT;
961 if (sz != 16 && sz != 32 && sz != 64)
962 return NULL;
963 tree rhs = gimple_assign_rhs1 (stmt);
9032d2b2
JJ
964 if (CONSTRUCTOR_NELTS (rhs) == 0)
965 return NULL;
cd676dfa
JJ
966 tree eltype = TREE_TYPE (TREE_TYPE (rhs));
967 unsigned HOST_WIDE_INT eltsz
968 = int_size_in_bytes (eltype) * BITS_PER_UNIT;
969 if (TYPE_PRECISION (eltype) != eltsz)
970 return NULL;
971 constructor_elt *elt;
972 unsigned int i;
973 tree type = build_nonstandard_integer_type (sz, 1);
974 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (rhs), i, elt)
975 {
976 if (TREE_CODE (elt->value) != SSA_NAME
977 || !INTEGRAL_TYPE_P (TREE_TYPE (elt->value)))
978 return NULL;
979 struct symbolic_number n1;
980 gimple *source_stmt
981 = find_bswap_or_nop_1 (SSA_NAME_DEF_STMT (elt->value), &n1,
982 limit - 1);
983
984 if (!source_stmt)
985 return NULL;
986
987 n1.type = type;
988 if (!n1.base_addr)
989 n1.range = sz / BITS_PER_UNIT;
990
991 if (i == 0)
992 {
993 ins_stmt = source_stmt;
994 *n = n1;
995 }
996 else
997 {
998 if (n->vuse != n1.vuse)
999 return NULL;
1000
1001 struct symbolic_number n0 = *n;
1002
1003 if (!BYTES_BIG_ENDIAN)
1004 {
1005 if (!do_shift_rotate (LSHIFT_EXPR, &n1, i * eltsz))
1006 return NULL;
1007 }
1008 else if (!do_shift_rotate (LSHIFT_EXPR, &n0, eltsz))
1009 return NULL;
1010 ins_stmt
04eccbbe
JJ
1011 = perform_symbolic_merge (ins_stmt, &n0, source_stmt, &n1, n,
1012 BIT_IOR_EXPR);
cd676dfa
JJ
1013
1014 if (!ins_stmt)
1015 return NULL;
1016 }
1017 }
1018 }
4b84d9b8
JJ
1019
1020 uint64_t cmpxchg, cmpnop;
d8545fb2 1021 uint64_t orig_range = n->range * BITS_PER_UNIT;
b320edc0 1022 find_bswap_or_nop_finalize (n, &cmpxchg, &cmpnop, cast64_to_32);
4b84d9b8 1023
dffec8eb
JJ
1024 /* A complete byte swap should make the symbolic number to start with
1025 the largest digit in the highest order byte. Unchanged symbolic
1026 number indicates a read with same endianness as target architecture. */
d8545fb2 1027 *l_rotate = 0;
1028 uint64_t tmp_n = n->n;
1029 if (!is_bswap_or_nop_p (tmp_n, cmpxchg, cmpnop, mask, bswap))
b320edc0 1030 {
d8545fb2 1031 /* Try bswap + lrotate. */
1032 /* TODO, handle cast64_to_32 and big/litte_endian memory
1033 source when rsize < range. */
1034 if (n->range == orig_range
57b30f01 1035 /* There're case like 0x300000200 for uint32->uint64 cast,
1036 Don't hanlde this. */
1037 && n->range == TYPE_PRECISION (n->type)
d8545fb2 1038 && ((orig_range == 32
1039 && optab_handler (rotl_optab, SImode) != CODE_FOR_nothing)
1040 || (orig_range == 64
1041 && optab_handler (rotl_optab, DImode) != CODE_FOR_nothing))
1042 && (tmp_n & MARKER_MASK) < orig_range / BITS_PER_UNIT)
1043 {
1044 uint64_t range = (orig_range / BITS_PER_UNIT) * BITS_PER_MARKER;
1045 uint64_t count = (tmp_n & MARKER_MASK) * BITS_PER_MARKER;
1046 /* .i.e. hanlde 0x203040506070800 when lower byte is zero. */
1047 if (!count)
1048 {
1049 for (uint64_t i = 1; i != range / BITS_PER_MARKER; i++)
1050 {
1051 count = (tmp_n >> i * BITS_PER_MARKER) & MARKER_MASK;
1052 if (count)
1053 {
1054 /* Count should be meaningful not 0xff. */
1055 if (count <= range / BITS_PER_MARKER)
1056 {
1057 count = (count + i) * BITS_PER_MARKER % range;
1058 break;
1059 }
1060 else
1061 return NULL;
1062 }
1063 }
1064 }
1065 tmp_n = tmp_n >> count | tmp_n << (range - count);
1066 if (orig_range == 32)
1067 tmp_n &= (1ULL << 32) - 1;
1068 if (!is_bswap_or_nop_p (tmp_n, cmpxchg, cmpnop, mask, bswap))
1069 return NULL;
1070 *l_rotate = count / BITS_PER_MARKER * BITS_PER_UNIT;
1071 gcc_assert (*bswap);
1072 }
1073 else
b320edc0 1074 return NULL;
b320edc0 1075 }
dffec8eb
JJ
1076
1077 /* Useless bit manipulation performed by code. */
1078 if (!n->base_addr && n->n == cmpnop && n->n_ops == 1)
1079 return NULL;
1080
dffec8eb
JJ
1081 return ins_stmt;
1082}
1083
1084const pass_data pass_data_optimize_bswap =
1085{
1086 GIMPLE_PASS, /* type */
1087 "bswap", /* name */
1088 OPTGROUP_NONE, /* optinfo_flags */
1089 TV_NONE, /* tv_id */
1090 PROP_ssa, /* properties_required */
1091 0, /* properties_provided */
1092 0, /* properties_destroyed */
1093 0, /* todo_flags_start */
1094 0, /* todo_flags_finish */
1095};
1096
1097class pass_optimize_bswap : public gimple_opt_pass
1098{
1099public:
1100 pass_optimize_bswap (gcc::context *ctxt)
1101 : gimple_opt_pass (pass_data_optimize_bswap, ctxt)
1102 {}
1103
1104 /* opt_pass methods: */
725793af 1105 bool gate (function *) final override
dffec8eb
JJ
1106 {
1107 return flag_expensive_optimizations && optimize && BITS_PER_UNIT == 8;
1108 }
1109
725793af 1110 unsigned int execute (function *) final override;
dffec8eb
JJ
1111
1112}; // class pass_optimize_bswap
1113
d02a8b63
JJ
1114/* Helper function for bswap_replace. Build VIEW_CONVERT_EXPR from
1115 VAL to TYPE. If VAL has different type size, emit a NOP_EXPR cast
1116 first. */
1117
1118static tree
45ff1251
JJ
1119bswap_view_convert (gimple_stmt_iterator *gsi, tree type, tree val,
1120 bool before)
d02a8b63 1121{
a4001578
JJ
1122 gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (val))
1123 || POINTER_TYPE_P (TREE_TYPE (val)));
d02a8b63
JJ
1124 if (TYPE_SIZE (type) != TYPE_SIZE (TREE_TYPE (val)))
1125 {
1126 HOST_WIDE_INT prec = TREE_INT_CST_LOW (TYPE_SIZE (type));
a4001578
JJ
1127 if (POINTER_TYPE_P (TREE_TYPE (val)))
1128 {
1129 gimple *g
1130 = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
1131 NOP_EXPR, val);
45ff1251
JJ
1132 if (before)
1133 gsi_insert_before (gsi, g, GSI_SAME_STMT);
1134 else
1135 gsi_insert_after (gsi, g, GSI_NEW_STMT);
a4001578
JJ
1136 val = gimple_assign_lhs (g);
1137 }
d02a8b63
JJ
1138 tree itype = build_nonstandard_integer_type (prec, 1);
1139 gimple *g = gimple_build_assign (make_ssa_name (itype), NOP_EXPR, val);
45ff1251
JJ
1140 if (before)
1141 gsi_insert_before (gsi, g, GSI_SAME_STMT);
1142 else
1143 gsi_insert_after (gsi, g, GSI_NEW_STMT);
d02a8b63
JJ
1144 val = gimple_assign_lhs (g);
1145 }
1146 return build1 (VIEW_CONVERT_EXPR, type, val);
1147}
1148
dffec8eb 1149/* Perform the bswap optimization: replace the expression computed in the rhs
4b84d9b8
JJ
1150 of gsi_stmt (GSI) (or if NULL add instead of replace) by an equivalent
1151 bswap, load or load + bswap expression.
dffec8eb
JJ
1152 Which of these alternatives replace the rhs is given by N->base_addr (non
1153 null if a load is needed) and BSWAP. The type, VUSE and set-alias of the
1154 load to perform are also given in N while the builtin bswap invoke is given
4b84d9b8
JJ
1155 in FNDEL. Finally, if a load is involved, INS_STMT refers to one of the
1156 load statements involved to construct the rhs in gsi_stmt (GSI) and
1157 N->range gives the size of the rhs expression for maintaining some
1158 statistics.
dffec8eb 1159
4b84d9b8
JJ
1160 Note that if the replacement involve a load and if gsi_stmt (GSI) is
1161 non-NULL, that stmt is moved just after INS_STMT to do the load with the
1162 same VUSE which can lead to gsi_stmt (GSI) changing of basic block. */
dffec8eb 1163
4b84d9b8
JJ
1164tree
1165bswap_replace (gimple_stmt_iterator gsi, gimple *ins_stmt, tree fndecl,
dffec8eb 1166 tree bswap_type, tree load_type, struct symbolic_number *n,
d8545fb2 1167 bool bswap, uint64_t mask, uint64_t l_rotate)
dffec8eb 1168{
4b84d9b8 1169 tree src, tmp, tgt = NULL_TREE;
d8545fb2 1170 gimple *bswap_stmt, *mask_stmt = NULL, *rotl_stmt = NULL;
cd676dfa 1171 tree_code conv_code = NOP_EXPR;
dffec8eb 1172
4b84d9b8 1173 gimple *cur_stmt = gsi_stmt (gsi);
dffec8eb 1174 src = n->src;
4b84d9b8 1175 if (cur_stmt)
cd676dfa
JJ
1176 {
1177 tgt = gimple_assign_lhs (cur_stmt);
1178 if (gimple_assign_rhs_code (cur_stmt) == CONSTRUCTOR
1179 && tgt
1180 && VECTOR_TYPE_P (TREE_TYPE (tgt)))
1181 conv_code = VIEW_CONVERT_EXPR;
1182 }
dffec8eb
JJ
1183
1184 /* Need to load the value from memory first. */
1185 if (n->base_addr)
1186 {
4b84d9b8
JJ
1187 gimple_stmt_iterator gsi_ins = gsi;
1188 if (ins_stmt)
1189 gsi_ins = gsi_for_stmt (ins_stmt);
dffec8eb
JJ
1190 tree addr_expr, addr_tmp, val_expr, val_tmp;
1191 tree load_offset_ptr, aligned_load_type;
4b84d9b8
JJ
1192 gimple *load_stmt;
1193 unsigned align = get_object_alignment (src);
4a022c70 1194 poly_int64 load_offset = 0;
dffec8eb 1195
4b84d9b8
JJ
1196 if (cur_stmt)
1197 {
1198 basic_block ins_bb = gimple_bb (ins_stmt);
1199 basic_block cur_bb = gimple_bb (cur_stmt);
1200 if (!dominated_by_p (CDI_DOMINATORS, cur_bb, ins_bb))
1201 return NULL_TREE;
1202
1203 /* Move cur_stmt just before one of the load of the original
1204 to ensure it has the same VUSE. See PR61517 for what could
1205 go wrong. */
1206 if (gimple_bb (cur_stmt) != gimple_bb (ins_stmt))
1207 reset_flow_sensitive_info (gimple_assign_lhs (cur_stmt));
1208 gsi_move_before (&gsi, &gsi_ins);
1209 gsi = gsi_for_stmt (cur_stmt);
1210 }
1211 else
1212 gsi = gsi_ins;
dffec8eb
JJ
1213
1214 /* Compute address to load from and cast according to the size
1215 of the load. */
4b84d9b8 1216 addr_expr = build_fold_addr_expr (src);
dffec8eb 1217 if (is_gimple_mem_ref_addr (addr_expr))
4b84d9b8 1218 addr_tmp = unshare_expr (addr_expr);
dffec8eb
JJ
1219 else
1220 {
4b84d9b8
JJ
1221 addr_tmp = unshare_expr (n->base_addr);
1222 if (!is_gimple_mem_ref_addr (addr_tmp))
1223 addr_tmp = force_gimple_operand_gsi_1 (&gsi, addr_tmp,
1224 is_gimple_mem_ref_addr,
1225 NULL_TREE, true,
1226 GSI_SAME_STMT);
1227 load_offset = n->bytepos;
1228 if (n->offset)
1229 {
1230 tree off
1231 = force_gimple_operand_gsi (&gsi, unshare_expr (n->offset),
1232 true, NULL_TREE, true,
1233 GSI_SAME_STMT);
1234 gimple *stmt
1235 = gimple_build_assign (make_ssa_name (TREE_TYPE (addr_tmp)),
1236 POINTER_PLUS_EXPR, addr_tmp, off);
1237 gsi_insert_before (&gsi, stmt, GSI_SAME_STMT);
1238 addr_tmp = gimple_assign_lhs (stmt);
1239 }
dffec8eb
JJ
1240 }
1241
1242 /* Perform the load. */
1243 aligned_load_type = load_type;
1244 if (align < TYPE_ALIGN (load_type))
1245 aligned_load_type = build_aligned_type (load_type, align);
1246 load_offset_ptr = build_int_cst (n->alias_set, load_offset);
1247 val_expr = fold_build2 (MEM_REF, aligned_load_type, addr_tmp,
1248 load_offset_ptr);
1249
1250 if (!bswap)
1251 {
1252 if (n->range == 16)
1253 nop_stats.found_16bit++;
1254 else if (n->range == 32)
1255 nop_stats.found_32bit++;
1256 else
1257 {
1258 gcc_assert (n->range == 64);
1259 nop_stats.found_64bit++;
1260 }
1261
1262 /* Convert the result of load if necessary. */
4b84d9b8 1263 if (tgt && !useless_type_conversion_p (TREE_TYPE (tgt), load_type))
dffec8eb
JJ
1264 {
1265 val_tmp = make_temp_ssa_name (aligned_load_type, NULL,
1266 "load_dst");
1267 load_stmt = gimple_build_assign (val_tmp, val_expr);
1268 gimple_set_vuse (load_stmt, n->vuse);
1269 gsi_insert_before (&gsi, load_stmt, GSI_SAME_STMT);
cd676dfa 1270 if (conv_code == VIEW_CONVERT_EXPR)
45ff1251
JJ
1271 val_tmp = bswap_view_convert (&gsi, TREE_TYPE (tgt), val_tmp,
1272 true);
cd676dfa 1273 gimple_assign_set_rhs_with_ops (&gsi, conv_code, val_tmp);
4b84d9b8 1274 update_stmt (cur_stmt);
dffec8eb 1275 }
4b84d9b8 1276 else if (cur_stmt)
dffec8eb
JJ
1277 {
1278 gimple_assign_set_rhs_with_ops (&gsi, MEM_REF, val_expr);
1279 gimple_set_vuse (cur_stmt, n->vuse);
4b84d9b8
JJ
1280 update_stmt (cur_stmt);
1281 }
1282 else
1283 {
1284 tgt = make_ssa_name (load_type);
1285 cur_stmt = gimple_build_assign (tgt, MEM_REF, val_expr);
1286 gimple_set_vuse (cur_stmt, n->vuse);
1287 gsi_insert_before (&gsi, cur_stmt, GSI_SAME_STMT);
dffec8eb 1288 }
dffec8eb
JJ
1289
1290 if (dump_file)
1291 {
1292 fprintf (dump_file,
1293 "%d bit load in target endianness found at: ",
1294 (int) n->range);
1295 print_gimple_stmt (dump_file, cur_stmt, 0);
1296 }
4b84d9b8 1297 return tgt;
dffec8eb
JJ
1298 }
1299 else
1300 {
1301 val_tmp = make_temp_ssa_name (aligned_load_type, NULL, "load_dst");
1302 load_stmt = gimple_build_assign (val_tmp, val_expr);
1303 gimple_set_vuse (load_stmt, n->vuse);
1304 gsi_insert_before (&gsi, load_stmt, GSI_SAME_STMT);
1305 }
1306 src = val_tmp;
1307 }
1308 else if (!bswap)
1309 {
4b84d9b8
JJ
1310 gimple *g = NULL;
1311 if (tgt && !useless_type_conversion_p (TREE_TYPE (tgt), TREE_TYPE (src)))
dffec8eb
JJ
1312 {
1313 if (!is_gimple_val (src))
4b84d9b8 1314 return NULL_TREE;
cd676dfa 1315 if (conv_code == VIEW_CONVERT_EXPR)
45ff1251 1316 src = bswap_view_convert (&gsi, TREE_TYPE (tgt), src, true);
cd676dfa 1317 g = gimple_build_assign (tgt, conv_code, src);
dffec8eb 1318 }
4b84d9b8 1319 else if (cur_stmt)
dffec8eb 1320 g = gimple_build_assign (tgt, src);
4b84d9b8
JJ
1321 else
1322 tgt = src;
dffec8eb
JJ
1323 if (n->range == 16)
1324 nop_stats.found_16bit++;
1325 else if (n->range == 32)
1326 nop_stats.found_32bit++;
1327 else
1328 {
1329 gcc_assert (n->range == 64);
1330 nop_stats.found_64bit++;
1331 }
1332 if (dump_file)
1333 {
1334 fprintf (dump_file,
1335 "%d bit reshuffle in target endianness found at: ",
1336 (int) n->range);
4b84d9b8
JJ
1337 if (cur_stmt)
1338 print_gimple_stmt (dump_file, cur_stmt, 0);
1339 else
1340 {
4af78ef8 1341 print_generic_expr (dump_file, tgt, TDF_NONE);
4b84d9b8
JJ
1342 fprintf (dump_file, "\n");
1343 }
dffec8eb 1344 }
4b84d9b8
JJ
1345 if (cur_stmt)
1346 gsi_replace (&gsi, g, true);
1347 return tgt;
dffec8eb
JJ
1348 }
1349 else if (TREE_CODE (src) == BIT_FIELD_REF)
1350 src = TREE_OPERAND (src, 0);
1351
1352 if (n->range == 16)
1353 bswap_stats.found_16bit++;
1354 else if (n->range == 32)
1355 bswap_stats.found_32bit++;
1356 else
1357 {
1358 gcc_assert (n->range == 64);
1359 bswap_stats.found_64bit++;
1360 }
1361
1362 tmp = src;
1363
1364 /* Convert the src expression if necessary. */
1365 if (!useless_type_conversion_p (TREE_TYPE (tmp), bswap_type))
1366 {
1367 gimple *convert_stmt;
1368
1369 tmp = make_temp_ssa_name (bswap_type, NULL, "bswapsrc");
1370 convert_stmt = gimple_build_assign (tmp, NOP_EXPR, src);
1371 gsi_insert_before (&gsi, convert_stmt, GSI_SAME_STMT);
1372 }
1373
1374 /* Canonical form for 16 bit bswap is a rotate expression. Only 16bit values
1375 are considered as rotation of 2N bit values by N bits is generally not
1376 equivalent to a bswap. Consider for instance 0x01020304 r>> 16 which
1377 gives 0x03040102 while a bswap for that value is 0x04030201. */
1378 if (bswap && n->range == 16)
1379 {
1380 tree count = build_int_cst (NULL, BITS_PER_UNIT);
1381 src = fold_build2 (LROTATE_EXPR, bswap_type, tmp, count);
1382 bswap_stmt = gimple_build_assign (NULL, src);
1383 }
1384 else
1385 bswap_stmt = gimple_build_call (fndecl, 1, tmp);
1386
4b84d9b8
JJ
1387 if (tgt == NULL_TREE)
1388 tgt = make_ssa_name (bswap_type);
dffec8eb
JJ
1389 tmp = tgt;
1390
b320edc0
JJ
1391 if (mask != ~(uint64_t) 0)
1392 {
1393 tree m = build_int_cst (bswap_type, mask);
1394 tmp = make_temp_ssa_name (bswap_type, NULL, "bswapdst");
1395 gimple_set_lhs (bswap_stmt, tmp);
1396 mask_stmt = gimple_build_assign (tgt, BIT_AND_EXPR, tmp, m);
1397 tmp = tgt;
1398 }
1399
d8545fb2 1400 if (l_rotate)
1401 {
1402 tree m = build_int_cst (bswap_type, l_rotate);
1403 tmp = make_temp_ssa_name (bswap_type, NULL,
1404 mask_stmt ? "bswapmaskdst" : "bswapdst");
1405 gimple_set_lhs (mask_stmt ? mask_stmt : bswap_stmt, tmp);
1406 rotl_stmt = gimple_build_assign (tgt, LROTATE_EXPR, tmp, m);
1407 tmp = tgt;
1408 }
1409
dffec8eb
JJ
1410 /* Convert the result if necessary. */
1411 if (!useless_type_conversion_p (TREE_TYPE (tgt), bswap_type))
1412 {
dffec8eb 1413 tmp = make_temp_ssa_name (bswap_type, NULL, "bswapdst");
cd676dfa 1414 tree atmp = tmp;
45ff1251 1415 gimple_stmt_iterator gsi2 = gsi;
cd676dfa 1416 if (conv_code == VIEW_CONVERT_EXPR)
45ff1251
JJ
1417 atmp = bswap_view_convert (&gsi2, TREE_TYPE (tgt), tmp, false);
1418 gimple *convert_stmt = gimple_build_assign (tgt, conv_code, atmp);
1419 gsi_insert_after (&gsi2, convert_stmt, GSI_SAME_STMT);
dffec8eb
JJ
1420 }
1421
d8545fb2 1422 gimple_set_lhs (rotl_stmt ? rotl_stmt
1423 : mask_stmt ? mask_stmt : bswap_stmt, tmp);
dffec8eb
JJ
1424
1425 if (dump_file)
1426 {
1427 fprintf (dump_file, "%d bit bswap implementation found at: ",
1428 (int) n->range);
4b84d9b8
JJ
1429 if (cur_stmt)
1430 print_gimple_stmt (dump_file, cur_stmt, 0);
1431 else
1432 {
4af78ef8 1433 print_generic_expr (dump_file, tgt, TDF_NONE);
4b84d9b8
JJ
1434 fprintf (dump_file, "\n");
1435 }
dffec8eb
JJ
1436 }
1437
4b84d9b8
JJ
1438 if (cur_stmt)
1439 {
d8545fb2 1440 if (rotl_stmt)
1441 gsi_insert_after (&gsi, rotl_stmt, GSI_SAME_STMT);
b320edc0
JJ
1442 if (mask_stmt)
1443 gsi_insert_after (&gsi, mask_stmt, GSI_SAME_STMT);
4b84d9b8
JJ
1444 gsi_insert_after (&gsi, bswap_stmt, GSI_SAME_STMT);
1445 gsi_remove (&gsi, true);
1446 }
1447 else
b320edc0
JJ
1448 {
1449 gsi_insert_before (&gsi, bswap_stmt, GSI_SAME_STMT);
1450 if (mask_stmt)
1451 gsi_insert_before (&gsi, mask_stmt, GSI_SAME_STMT);
d8545fb2 1452 if (rotl_stmt)
1453 gsi_insert_after (&gsi, rotl_stmt, GSI_SAME_STMT);
b320edc0 1454 }
4b84d9b8 1455 return tgt;
dffec8eb
JJ
1456}
1457
a7553ad6
JJ
1458/* Try to optimize an assignment CUR_STMT with CONSTRUCTOR on the rhs
1459 using bswap optimizations. CDI_DOMINATORS need to be
1460 computed on entry. Return true if it has been optimized and
1461 TODO_update_ssa is needed. */
1462
1463static bool
1464maybe_optimize_vector_constructor (gimple *cur_stmt)
1465{
1466 tree fndecl = NULL_TREE, bswap_type = NULL_TREE, load_type;
1467 struct symbolic_number n;
1468 bool bswap;
1469
1470 gcc_assert (is_gimple_assign (cur_stmt)
1471 && gimple_assign_rhs_code (cur_stmt) == CONSTRUCTOR);
1472
1473 tree rhs = gimple_assign_rhs1 (cur_stmt);
1474 if (!VECTOR_TYPE_P (TREE_TYPE (rhs))
1475 || !INTEGRAL_TYPE_P (TREE_TYPE (TREE_TYPE (rhs)))
1476 || gimple_assign_lhs (cur_stmt) == NULL_TREE)
1477 return false;
1478
1479 HOST_WIDE_INT sz = int_size_in_bytes (TREE_TYPE (rhs)) * BITS_PER_UNIT;
1480 switch (sz)
1481 {
1482 case 16:
1483 load_type = bswap_type = uint16_type_node;
1484 break;
1485 case 32:
1486 if (builtin_decl_explicit_p (BUILT_IN_BSWAP32)
1487 && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing)
1488 {
1489 load_type = uint32_type_node;
1490 fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32);
1491 bswap_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1492 }
1493 else
1494 return false;
1495 break;
1496 case 64:
1497 if (builtin_decl_explicit_p (BUILT_IN_BSWAP64)
1498 && (optab_handler (bswap_optab, DImode) != CODE_FOR_nothing
1499 || (word_mode == SImode
1500 && builtin_decl_explicit_p (BUILT_IN_BSWAP32)
1501 && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing)))
1502 {
1503 load_type = uint64_type_node;
1504 fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64);
1505 bswap_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1506 }
1507 else
1508 return false;
1509 break;
1510 default:
1511 return false;
1512 }
1513
b320edc0 1514 bool cast64_to_32;
d8545fb2 1515 uint64_t mask, l_rotate;
b320edc0 1516 gimple *ins_stmt = find_bswap_or_nop (cur_stmt, &n, &bswap,
d8545fb2 1517 &cast64_to_32, &mask, &l_rotate);
b320edc0
JJ
1518 if (!ins_stmt
1519 || n.range != (unsigned HOST_WIDE_INT) sz
1520 || cast64_to_32
1521 || mask != ~(uint64_t) 0)
a7553ad6
JJ
1522 return false;
1523
1524 if (bswap && !fndecl && n.range != 16)
1525 return false;
1526
1527 memset (&nop_stats, 0, sizeof (nop_stats));
1528 memset (&bswap_stats, 0, sizeof (bswap_stats));
1529 return bswap_replace (gsi_for_stmt (cur_stmt), ins_stmt, fndecl,
d8545fb2 1530 bswap_type, load_type, &n, bswap, mask,
1531 l_rotate) != NULL_TREE;
a7553ad6
JJ
1532}
1533
dffec8eb
JJ
1534/* Find manual byte swap implementations as well as load in a given
1535 endianness. Byte swaps are turned into a bswap builtin invokation
1536 while endian loads are converted to bswap builtin invokation or
1537 simple load according to the target endianness. */
1538
1539unsigned int
1540pass_optimize_bswap::execute (function *fun)
1541{
1542 basic_block bb;
1543 bool bswap32_p, bswap64_p;
1544 bool changed = false;
1545 tree bswap32_type = NULL_TREE, bswap64_type = NULL_TREE;
1546
1547 bswap32_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP32)
1548 && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing);
1549 bswap64_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP64)
1550 && (optab_handler (bswap_optab, DImode) != CODE_FOR_nothing
1551 || (bswap32_p && word_mode == SImode)));
1552
1553 /* Determine the argument type of the builtins. The code later on
1554 assumes that the return and argument type are the same. */
1555 if (bswap32_p)
1556 {
1557 tree fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32);
1558 bswap32_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1559 }
1560
1561 if (bswap64_p)
1562 {
1563 tree fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64);
1564 bswap64_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1565 }
1566
1567 memset (&nop_stats, 0, sizeof (nop_stats));
1568 memset (&bswap_stats, 0, sizeof (bswap_stats));
1569 calculate_dominance_info (CDI_DOMINATORS);
1570
1571 FOR_EACH_BB_FN (bb, fun)
1572 {
1573 gimple_stmt_iterator gsi;
1574
1575 /* We do a reverse scan for bswap patterns to make sure we get the
1576 widest match. As bswap pattern matching doesn't handle previously
1577 inserted smaller bswap replacements as sub-patterns, the wider
1578 variant wouldn't be detected. */
1579 for (gsi = gsi_last_bb (bb); !gsi_end_p (gsi);)
1580 {
1581 gimple *ins_stmt, *cur_stmt = gsi_stmt (gsi);
1582 tree fndecl = NULL_TREE, bswap_type = NULL_TREE, load_type;
1583 enum tree_code code;
1584 struct symbolic_number n;
b320edc0 1585 bool bswap, cast64_to_32;
d8545fb2 1586 uint64_t mask, l_rotate;
dffec8eb
JJ
1587
1588 /* This gsi_prev (&gsi) is not part of the for loop because cur_stmt
1589 might be moved to a different basic block by bswap_replace and gsi
1590 must not points to it if that's the case. Moving the gsi_prev
1591 there make sure that gsi points to the statement previous to
1592 cur_stmt while still making sure that all statements are
1593 considered in this basic block. */
1594 gsi_prev (&gsi);
1595
1596 if (!is_gimple_assign (cur_stmt))
1597 continue;
1598
1599 code = gimple_assign_rhs_code (cur_stmt);
1600 switch (code)
1601 {
1602 case LROTATE_EXPR:
1603 case RROTATE_EXPR:
1604 if (!tree_fits_uhwi_p (gimple_assign_rhs2 (cur_stmt))
1605 || tree_to_uhwi (gimple_assign_rhs2 (cur_stmt))
1606 % BITS_PER_UNIT)
1607 continue;
1608 /* Fall through. */
1609 case BIT_IOR_EXPR:
a944b5de
RS
1610 case BIT_XOR_EXPR:
1611 case PLUS_EXPR:
dffec8eb 1612 break;
cd676dfa
JJ
1613 case CONSTRUCTOR:
1614 {
1615 tree rhs = gimple_assign_rhs1 (cur_stmt);
1616 if (VECTOR_TYPE_P (TREE_TYPE (rhs))
1617 && INTEGRAL_TYPE_P (TREE_TYPE (TREE_TYPE (rhs))))
1618 break;
1619 }
1620 continue;
dffec8eb
JJ
1621 default:
1622 continue;
1623 }
1624
b320edc0 1625 ins_stmt = find_bswap_or_nop (cur_stmt, &n, &bswap,
d8545fb2 1626 &cast64_to_32, &mask, &l_rotate);
dffec8eb
JJ
1627
1628 if (!ins_stmt)
1629 continue;
1630
1631 switch (n.range)
1632 {
1633 case 16:
1634 /* Already in canonical form, nothing to do. */
1635 if (code == LROTATE_EXPR || code == RROTATE_EXPR)
1636 continue;
1637 load_type = bswap_type = uint16_type_node;
1638 break;
1639 case 32:
1640 load_type = uint32_type_node;
1641 if (bswap32_p)
1642 {
1643 fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32);
1644 bswap_type = bswap32_type;
1645 }
1646 break;
1647 case 64:
1648 load_type = uint64_type_node;
1649 if (bswap64_p)
1650 {
1651 fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64);
1652 bswap_type = bswap64_type;
1653 }
1654 break;
1655 default:
1656 continue;
1657 }
1658
1659 if (bswap && !fndecl && n.range != 16)
1660 continue;
1661
4b84d9b8 1662 if (bswap_replace (gsi_for_stmt (cur_stmt), ins_stmt, fndecl,
d8545fb2 1663 bswap_type, load_type, &n, bswap, mask,
1664 l_rotate))
dffec8eb
JJ
1665 changed = true;
1666 }
1667 }
1668
1669 statistics_counter_event (fun, "16-bit nop implementations found",
1670 nop_stats.found_16bit);
1671 statistics_counter_event (fun, "32-bit nop implementations found",
1672 nop_stats.found_32bit);
1673 statistics_counter_event (fun, "64-bit nop implementations found",
1674 nop_stats.found_64bit);
1675 statistics_counter_event (fun, "16-bit bswap implementations found",
1676 bswap_stats.found_16bit);
1677 statistics_counter_event (fun, "32-bit bswap implementations found",
1678 bswap_stats.found_32bit);
1679 statistics_counter_event (fun, "64-bit bswap implementations found",
1680 bswap_stats.found_64bit);
1681
1682 return (changed ? TODO_update_ssa : 0);
1683}
1684
1685} // anon namespace
1686
1687gimple_opt_pass *
1688make_pass_optimize_bswap (gcc::context *ctxt)
1689{
1690 return new pass_optimize_bswap (ctxt);
1691}
1692
1693namespace {
1694
245f6de1 1695/* Struct recording one operand for the store, which is either a constant,
c94c3532
EB
1696 then VAL represents the constant and all the other fields are zero, or
1697 a memory load, then VAL represents the reference, BASE_ADDR is non-NULL
1698 and the other fields also reflect the memory load, or an SSA name, then
617be7ba 1699 VAL represents the SSA name and all the other fields are zero. */
245f6de1 1700
6c1dae73 1701class store_operand_info
245f6de1 1702{
6c1dae73 1703public:
245f6de1
JJ
1704 tree val;
1705 tree base_addr;
8a91d545
RS
1706 poly_uint64 bitsize;
1707 poly_uint64 bitpos;
1708 poly_uint64 bitregion_start;
1709 poly_uint64 bitregion_end;
245f6de1 1710 gimple *stmt;
383ac8dc 1711 bool bit_not_p;
245f6de1
JJ
1712 store_operand_info ();
1713};
1714
1715store_operand_info::store_operand_info ()
1716 : val (NULL_TREE), base_addr (NULL_TREE), bitsize (0), bitpos (0),
383ac8dc 1717 bitregion_start (0), bitregion_end (0), stmt (NULL), bit_not_p (false)
245f6de1
JJ
1718{
1719}
1720
f663d9ad
KT
1721/* Struct recording the information about a single store of an immediate
1722 to memory. These are created in the first phase and coalesced into
1723 merged_store_group objects in the second phase. */
1724
6c1dae73 1725class store_immediate_info
f663d9ad 1726{
6c1dae73 1727public:
f663d9ad
KT
1728 unsigned HOST_WIDE_INT bitsize;
1729 unsigned HOST_WIDE_INT bitpos;
a62b3dc5
JJ
1730 unsigned HOST_WIDE_INT bitregion_start;
1731 /* This is one past the last bit of the bit region. */
1732 unsigned HOST_WIDE_INT bitregion_end;
f663d9ad
KT
1733 gimple *stmt;
1734 unsigned int order;
e362a897
EB
1735 /* INTEGER_CST for constant store, STRING_CST for string store,
1736 MEM_REF for memory copy, BIT_*_EXPR for logical bitwise operation,
1737 BIT_INSERT_EXPR for bit insertion.
4b84d9b8
JJ
1738 LROTATE_EXPR if it can be only bswap optimized and
1739 ops are not really meaningful.
1740 NOP_EXPR if bswap optimization detected identity, ops
1741 are not meaningful. */
245f6de1 1742 enum tree_code rhs_code;
4b84d9b8
JJ
1743 /* Two fields for bswap optimization purposes. */
1744 struct symbolic_number n;
1745 gimple *ins_stmt;
127ef369 1746 /* True if BIT_{AND,IOR,XOR}_EXPR result is inverted before storing. */
d60edaba 1747 bool bit_not_p;
127ef369
JJ
1748 /* True if ops have been swapped and thus ops[1] represents
1749 rhs1 of BIT_{AND,IOR,XOR}_EXPR and ops[0] represents rhs2. */
1750 bool ops_swapped_p;
629387a6
EB
1751 /* The index number of the landing pad, or 0 if there is none. */
1752 int lp_nr;
245f6de1
JJ
1753 /* Operands. For BIT_*_EXPR rhs_code both operands are used, otherwise
1754 just the first one. */
1755 store_operand_info ops[2];
b5926e23 1756 store_immediate_info (unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
a62b3dc5 1757 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
4b84d9b8 1758 gimple *, unsigned int, enum tree_code,
629387a6 1759 struct symbolic_number &, gimple *, bool, int,
245f6de1
JJ
1760 const store_operand_info &,
1761 const store_operand_info &);
f663d9ad
KT
1762};
1763
1764store_immediate_info::store_immediate_info (unsigned HOST_WIDE_INT bs,
b5926e23 1765 unsigned HOST_WIDE_INT bp,
a62b3dc5
JJ
1766 unsigned HOST_WIDE_INT brs,
1767 unsigned HOST_WIDE_INT bre,
b5926e23 1768 gimple *st,
245f6de1
JJ
1769 unsigned int ord,
1770 enum tree_code rhscode,
4b84d9b8
JJ
1771 struct symbolic_number &nr,
1772 gimple *ins_stmtp,
d60edaba 1773 bool bitnotp,
629387a6 1774 int nr2,
245f6de1
JJ
1775 const store_operand_info &op0r,
1776 const store_operand_info &op1r)
a62b3dc5 1777 : bitsize (bs), bitpos (bp), bitregion_start (brs), bitregion_end (bre),
4b84d9b8 1778 stmt (st), order (ord), rhs_code (rhscode), n (nr),
629387a6 1779 ins_stmt (ins_stmtp), bit_not_p (bitnotp), ops_swapped_p (false),
4bc6fb21 1780 lp_nr (nr2), ops { op0r, op1r }
245f6de1
JJ
1781{
1782}
f663d9ad
KT
1783
1784/* Struct representing a group of stores to contiguous memory locations.
1785 These are produced by the second phase (coalescing) and consumed in the
1786 third phase that outputs the widened stores. */
1787
6c1dae73 1788class merged_store_group
f663d9ad 1789{
6c1dae73 1790public:
f663d9ad
KT
1791 unsigned HOST_WIDE_INT start;
1792 unsigned HOST_WIDE_INT width;
a62b3dc5
JJ
1793 unsigned HOST_WIDE_INT bitregion_start;
1794 unsigned HOST_WIDE_INT bitregion_end;
1795 /* The size of the allocated memory for val and mask. */
f663d9ad 1796 unsigned HOST_WIDE_INT buf_size;
a62b3dc5 1797 unsigned HOST_WIDE_INT align_base;
8a91d545 1798 poly_uint64 load_align_base[2];
f663d9ad
KT
1799
1800 unsigned int align;
245f6de1 1801 unsigned int load_align[2];
f663d9ad
KT
1802 unsigned int first_order;
1803 unsigned int last_order;
7f5a3982 1804 bool bit_insertion;
e362a897 1805 bool string_concatenation;
18e0c3d1 1806 bool only_constants;
1b3c9813 1807 bool consecutive;
18e0c3d1 1808 unsigned int first_nonmergeable_order;
629387a6 1809 int lp_nr;
f663d9ad 1810
a62b3dc5 1811 auto_vec<store_immediate_info *> stores;
f663d9ad
KT
1812 /* We record the first and last original statements in the sequence because
1813 we'll need their vuse/vdef and replacement position. It's easier to keep
1814 track of them separately as 'stores' is reordered by apply_stores. */
1815 gimple *last_stmt;
1816 gimple *first_stmt;
1817 unsigned char *val;
a62b3dc5 1818 unsigned char *mask;
f663d9ad
KT
1819
1820 merged_store_group (store_immediate_info *);
1821 ~merged_store_group ();
7f5a3982 1822 bool can_be_merged_into (store_immediate_info *);
f663d9ad
KT
1823 void merge_into (store_immediate_info *);
1824 void merge_overlapping (store_immediate_info *);
1825 bool apply_stores ();
a62b3dc5
JJ
1826private:
1827 void do_merge (store_immediate_info *);
f663d9ad
KT
1828};
1829
1830/* Debug helper. Dump LEN elements of byte array PTR to FD in hex. */
1831
1832static void
1833dump_char_array (FILE *fd, unsigned char *ptr, unsigned int len)
1834{
1835 if (!fd)
1836 return;
1837
1838 for (unsigned int i = 0; i < len; i++)
c94c3532 1839 fprintf (fd, "%02x ", ptr[i]);
f663d9ad
KT
1840 fprintf (fd, "\n");
1841}
1842
f663d9ad
KT
1843/* Clear out LEN bits starting from bit START in the byte array
1844 PTR. This clears the bits to the *right* from START.
1845 START must be within [0, BITS_PER_UNIT) and counts starting from
1846 the least significant bit. */
1847
1848static void
1849clear_bit_region_be (unsigned char *ptr, unsigned int start,
1850 unsigned int len)
1851{
1852 if (len == 0)
1853 return;
1854 /* Clear len bits to the right of start. */
1855 else if (len <= start + 1)
1856 {
1857 unsigned char mask = (~(~0U << len));
1858 mask = mask << (start + 1U - len);
1859 ptr[0] &= ~mask;
1860 }
1861 else if (start != BITS_PER_UNIT - 1)
1862 {
1863 clear_bit_region_be (ptr, start, (start % BITS_PER_UNIT) + 1);
1864 clear_bit_region_be (ptr + 1, BITS_PER_UNIT - 1,
1865 len - (start % BITS_PER_UNIT) - 1);
1866 }
1867 else if (start == BITS_PER_UNIT - 1
1868 && len > BITS_PER_UNIT)
1869 {
1870 unsigned int nbytes = len / BITS_PER_UNIT;
a62b3dc5 1871 memset (ptr, 0, nbytes);
f663d9ad
KT
1872 if (len % BITS_PER_UNIT != 0)
1873 clear_bit_region_be (ptr + nbytes, BITS_PER_UNIT - 1,
1874 len % BITS_PER_UNIT);
1875 }
1876 else
1877 gcc_unreachable ();
1878}
1879
1880/* In the byte array PTR clear the bit region starting at bit
1881 START and is LEN bits wide.
1882 For regions spanning multiple bytes do this recursively until we reach
1883 zero LEN or a region contained within a single byte. */
1884
1885static void
1886clear_bit_region (unsigned char *ptr, unsigned int start,
1887 unsigned int len)
1888{
1889 /* Degenerate base case. */
1890 if (len == 0)
1891 return;
1892 else if (start >= BITS_PER_UNIT)
1893 clear_bit_region (ptr + 1, start - BITS_PER_UNIT, len);
1894 /* Second base case. */
1895 else if ((start + len) <= BITS_PER_UNIT)
1896 {
46a61395 1897 unsigned char mask = (~0U) << (unsigned char) (BITS_PER_UNIT - len);
f663d9ad
KT
1898 mask >>= BITS_PER_UNIT - (start + len);
1899
1900 ptr[0] &= ~mask;
1901
1902 return;
1903 }
1904 /* Clear most significant bits in a byte and proceed with the next byte. */
1905 else if (start != 0)
1906 {
1907 clear_bit_region (ptr, start, BITS_PER_UNIT - start);
1f069ef5 1908 clear_bit_region (ptr + 1, 0, len - (BITS_PER_UNIT - start));
f663d9ad
KT
1909 }
1910 /* Whole bytes need to be cleared. */
1911 else if (start == 0 && len > BITS_PER_UNIT)
1912 {
1913 unsigned int nbytes = len / BITS_PER_UNIT;
a848c710
KT
1914 /* We could recurse on each byte but we clear whole bytes, so a simple
1915 memset will do. */
46a61395 1916 memset (ptr, '\0', nbytes);
f663d9ad
KT
1917 /* Clear the remaining sub-byte region if there is one. */
1918 if (len % BITS_PER_UNIT != 0)
1919 clear_bit_region (ptr + nbytes, 0, len % BITS_PER_UNIT);
1920 }
1921 else
1922 gcc_unreachable ();
1923}
1924
1925/* Write BITLEN bits of EXPR to the byte array PTR at
1926 bit position BITPOS. PTR should contain TOTAL_BYTES elements.
1927 Return true if the operation succeeded. */
1928
1929static bool
1930encode_tree_to_bitpos (tree expr, unsigned char *ptr, int bitlen, int bitpos,
46a61395 1931 unsigned int total_bytes)
f663d9ad
KT
1932{
1933 unsigned int first_byte = bitpos / BITS_PER_UNIT;
ad1de652
JJ
1934 bool sub_byte_op_p = ((bitlen % BITS_PER_UNIT)
1935 || (bitpos % BITS_PER_UNIT)
f4b31647 1936 || !int_mode_for_size (bitlen, 0).exists ());
3afd514b
JJ
1937 bool empty_ctor_p
1938 = (TREE_CODE (expr) == CONSTRUCTOR
1939 && CONSTRUCTOR_NELTS (expr) == 0
1940 && TYPE_SIZE_UNIT (TREE_TYPE (expr))
1941 && tree_fits_uhwi_p (TYPE_SIZE_UNIT (TREE_TYPE (expr))));
f663d9ad
KT
1942
1943 if (!sub_byte_op_p)
3afd514b
JJ
1944 {
1945 if (first_byte >= total_bytes)
1946 return false;
1947 total_bytes -= first_byte;
1948 if (empty_ctor_p)
1949 {
1950 unsigned HOST_WIDE_INT rhs_bytes
1951 = tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (expr)));
1952 if (rhs_bytes > total_bytes)
1953 return false;
1954 memset (ptr + first_byte, '\0', rhs_bytes);
1955 return true;
1956 }
1957 return native_encode_expr (expr, ptr + first_byte, total_bytes) != 0;
1958 }
f663d9ad
KT
1959
1960 /* LITTLE-ENDIAN
1961 We are writing a non byte-sized quantity or at a position that is not
1962 at a byte boundary.
1963 |--------|--------|--------| ptr + first_byte
1964 ^ ^
1965 xxx xxxxxxxx xxx< bp>
1966 |______EXPR____|
1967
46a61395 1968 First native_encode_expr EXPR into a temporary buffer and shift each
f663d9ad
KT
1969 byte in the buffer by 'bp' (carrying the bits over as necessary).
1970 |00000000|00xxxxxx|xxxxxxxx| << bp = |000xxxxx|xxxxxxxx|xxx00000|
1971 <------bitlen---->< bp>
1972 Then we clear the destination bits:
1973 |---00000|00000000|000-----| ptr + first_byte
1974 <-------bitlen--->< bp>
1975
1976 Finally we ORR the bytes of the shifted EXPR into the cleared region:
1977 |---xxxxx||xxxxxxxx||xxx-----| ptr + first_byte.
1978
1979 BIG-ENDIAN
1980 We are writing a non byte-sized quantity or at a position that is not
1981 at a byte boundary.
1982 ptr + first_byte |--------|--------|--------|
1983 ^ ^
1984 <bp >xxx xxxxxxxx xxx
1985 |_____EXPR_____|
1986
46a61395 1987 First native_encode_expr EXPR into a temporary buffer and shift each
f663d9ad
KT
1988 byte in the buffer to the right by (carrying the bits over as necessary).
1989 We shift by as much as needed to align the most significant bit of EXPR
1990 with bitpos:
1991 |00xxxxxx|xxxxxxxx| >> 3 = |00000xxx|xxxxxxxx|xxxxx000|
1992 <---bitlen----> <bp ><-----bitlen----->
1993 Then we clear the destination bits:
1994 ptr + first_byte |-----000||00000000||00000---|
1995 <bp ><-------bitlen----->
1996
1997 Finally we ORR the bytes of the shifted EXPR into the cleared region:
1998 ptr + first_byte |---xxxxx||xxxxxxxx||xxx-----|.
1999 The awkwardness comes from the fact that bitpos is counted from the
2000 most significant bit of a byte. */
2001
ef1d3b57
RS
2002 /* We must be dealing with fixed-size data at this point, since the
2003 total size is also fixed. */
3afd514b
JJ
2004 unsigned int byte_size;
2005 if (empty_ctor_p)
2006 {
2007 unsigned HOST_WIDE_INT rhs_bytes
2008 = tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (expr)));
2009 if (rhs_bytes > total_bytes)
2010 return false;
2011 byte_size = rhs_bytes;
2012 }
2013 else
2014 {
2015 fixed_size_mode mode
2016 = as_a <fixed_size_mode> (TYPE_MODE (TREE_TYPE (expr)));
e362a897
EB
2017 byte_size
2018 = mode == BLKmode
2019 ? tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (expr)))
2020 : GET_MODE_SIZE (mode);
3afd514b 2021 }
f663d9ad 2022 /* Allocate an extra byte so that we have space to shift into. */
3afd514b 2023 byte_size++;
f663d9ad 2024 unsigned char *tmpbuf = XALLOCAVEC (unsigned char, byte_size);
46a61395 2025 memset (tmpbuf, '\0', byte_size);
f663d9ad 2026 /* The store detection code should only have allowed constants that are
3afd514b
JJ
2027 accepted by native_encode_expr or empty ctors. */
2028 if (!empty_ctor_p
2029 && native_encode_expr (expr, tmpbuf, byte_size - 1) == 0)
f663d9ad
KT
2030 gcc_unreachable ();
2031
2032 /* The native_encode_expr machinery uses TYPE_MODE to determine how many
2033 bytes to write. This means it can write more than
2034 ROUND_UP (bitlen, BITS_PER_UNIT) / BITS_PER_UNIT bytes (for example
2035 write 8 bytes for a bitlen of 40). Skip the bytes that are not within
2036 bitlen and zero out the bits that are not relevant as well (that may
2037 contain a sign bit due to sign-extension). */
2038 unsigned int padding
2039 = byte_size - ROUND_UP (bitlen, BITS_PER_UNIT) / BITS_PER_UNIT - 1;
ad1de652
JJ
2040 /* On big-endian the padding is at the 'front' so just skip the initial
2041 bytes. */
2042 if (BYTES_BIG_ENDIAN)
2043 tmpbuf += padding;
2044
2045 byte_size -= padding;
2046
2047 if (bitlen % BITS_PER_UNIT != 0)
f663d9ad 2048 {
4b2c06f4 2049 if (BYTES_BIG_ENDIAN)
ad1de652
JJ
2050 clear_bit_region_be (tmpbuf, BITS_PER_UNIT - 1,
2051 BITS_PER_UNIT - (bitlen % BITS_PER_UNIT));
2052 else
2053 clear_bit_region (tmpbuf, bitlen,
2054 byte_size * BITS_PER_UNIT - bitlen);
f663d9ad 2055 }
ad1de652
JJ
2056 /* Left shifting relies on the last byte being clear if bitlen is
2057 a multiple of BITS_PER_UNIT, which might not be clear if
2058 there are padding bytes. */
2059 else if (!BYTES_BIG_ENDIAN)
2060 tmpbuf[byte_size - 1] = '\0';
f663d9ad
KT
2061
2062 /* Clear the bit region in PTR where the bits from TMPBUF will be
46a61395 2063 inserted into. */
f663d9ad
KT
2064 if (BYTES_BIG_ENDIAN)
2065 clear_bit_region_be (ptr + first_byte,
2066 BITS_PER_UNIT - 1 - (bitpos % BITS_PER_UNIT), bitlen);
2067 else
2068 clear_bit_region (ptr + first_byte, bitpos % BITS_PER_UNIT, bitlen);
2069
2070 int shift_amnt;
2071 int bitlen_mod = bitlen % BITS_PER_UNIT;
2072 int bitpos_mod = bitpos % BITS_PER_UNIT;
2073
2074 bool skip_byte = false;
2075 if (BYTES_BIG_ENDIAN)
2076 {
2077 /* BITPOS and BITLEN are exactly aligned and no shifting
2078 is necessary. */
2079 if (bitpos_mod + bitlen_mod == BITS_PER_UNIT
2080 || (bitpos_mod == 0 && bitlen_mod == 0))
2081 shift_amnt = 0;
2082 /* |. . . . . . . .|
2083 <bp > <blen >.
2084 We always shift right for BYTES_BIG_ENDIAN so shift the beginning
2085 of the value until it aligns with 'bp' in the next byte over. */
2086 else if (bitpos_mod + bitlen_mod < BITS_PER_UNIT)
2087 {
2088 shift_amnt = bitlen_mod + bitpos_mod;
2089 skip_byte = bitlen_mod != 0;
2090 }
2091 /* |. . . . . . . .|
2092 <----bp--->
2093 <---blen---->.
2094 Shift the value right within the same byte so it aligns with 'bp'. */
2095 else
2096 shift_amnt = bitlen_mod + bitpos_mod - BITS_PER_UNIT;
2097 }
2098 else
2099 shift_amnt = bitpos % BITS_PER_UNIT;
2100
2101 /* Create the shifted version of EXPR. */
2102 if (!BYTES_BIG_ENDIAN)
46a61395 2103 {
8aba425f 2104 shift_bytes_in_array_left (tmpbuf, byte_size, shift_amnt);
46a61395
JJ
2105 if (shift_amnt == 0)
2106 byte_size--;
2107 }
f663d9ad
KT
2108 else
2109 {
2110 gcc_assert (BYTES_BIG_ENDIAN);
2111 shift_bytes_in_array_right (tmpbuf, byte_size, shift_amnt);
2112 /* If shifting right forced us to move into the next byte skip the now
2113 empty byte. */
2114 if (skip_byte)
2115 {
2116 tmpbuf++;
2117 byte_size--;
2118 }
2119 }
2120
2121 /* Insert the bits from TMPBUF. */
2122 for (unsigned int i = 0; i < byte_size; i++)
2123 ptr[first_byte + i] |= tmpbuf[i];
2124
2125 return true;
2126}
2127
2128/* Sorting function for store_immediate_info objects.
2129 Sorts them by bitposition. */
2130
2131static int
2132sort_by_bitpos (const void *x, const void *y)
2133{
2134 store_immediate_info *const *tmp = (store_immediate_info * const *) x;
2135 store_immediate_info *const *tmp2 = (store_immediate_info * const *) y;
2136
109cca3b 2137 if ((*tmp)->bitpos < (*tmp2)->bitpos)
f663d9ad
KT
2138 return -1;
2139 else if ((*tmp)->bitpos > (*tmp2)->bitpos)
2140 return 1;
109cca3b 2141 else
0f0027d1
KT
2142 /* If they are the same let's use the order which is guaranteed to
2143 be different. */
2144 return (*tmp)->order - (*tmp2)->order;
f663d9ad
KT
2145}
2146
2147/* Sorting function for store_immediate_info objects.
2148 Sorts them by the order field. */
2149
2150static int
2151sort_by_order (const void *x, const void *y)
2152{
2153 store_immediate_info *const *tmp = (store_immediate_info * const *) x;
2154 store_immediate_info *const *tmp2 = (store_immediate_info * const *) y;
2155
2156 if ((*tmp)->order < (*tmp2)->order)
2157 return -1;
2158 else if ((*tmp)->order > (*tmp2)->order)
2159 return 1;
2160
2161 gcc_unreachable ();
2162}
2163
2164/* Initialize a merged_store_group object from a store_immediate_info
2165 object. */
2166
2167merged_store_group::merged_store_group (store_immediate_info *info)
2168{
2169 start = info->bitpos;
2170 width = info->bitsize;
a62b3dc5
JJ
2171 bitregion_start = info->bitregion_start;
2172 bitregion_end = info->bitregion_end;
f663d9ad
KT
2173 /* VAL has memory allocated for it in apply_stores once the group
2174 width has been finalized. */
2175 val = NULL;
a62b3dc5 2176 mask = NULL;
e362a897
EB
2177 bit_insertion = info->rhs_code == BIT_INSERT_EXPR;
2178 string_concatenation = info->rhs_code == STRING_CST;
18e0c3d1 2179 only_constants = info->rhs_code == INTEGER_CST;
1b3c9813 2180 consecutive = true;
18e0c3d1 2181 first_nonmergeable_order = ~0U;
629387a6 2182 lp_nr = info->lp_nr;
a62b3dc5
JJ
2183 unsigned HOST_WIDE_INT align_bitpos = 0;
2184 get_object_alignment_1 (gimple_assign_lhs (info->stmt),
2185 &align, &align_bitpos);
2186 align_base = start - align_bitpos;
245f6de1
JJ
2187 for (int i = 0; i < 2; ++i)
2188 {
2189 store_operand_info &op = info->ops[i];
2190 if (op.base_addr == NULL_TREE)
2191 {
2192 load_align[i] = 0;
2193 load_align_base[i] = 0;
2194 }
2195 else
2196 {
2197 get_object_alignment_1 (op.val, &load_align[i], &align_bitpos);
2198 load_align_base[i] = op.bitpos - align_bitpos;
2199 }
2200 }
f663d9ad
KT
2201 stores.create (1);
2202 stores.safe_push (info);
2203 last_stmt = info->stmt;
2204 last_order = info->order;
2205 first_stmt = last_stmt;
2206 first_order = last_order;
2207 buf_size = 0;
2208}
2209
2210merged_store_group::~merged_store_group ()
2211{
2212 if (val)
2213 XDELETEVEC (val);
2214}
2215
7f5a3982
EB
2216/* Return true if the store described by INFO can be merged into the group. */
2217
2218bool
2219merged_store_group::can_be_merged_into (store_immediate_info *info)
2220{
2221 /* Do not merge bswap patterns. */
2222 if (info->rhs_code == LROTATE_EXPR)
2223 return false;
2224
629387a6
EB
2225 if (info->lp_nr != lp_nr)
2226 return false;
2227
7f5a3982
EB
2228 /* The canonical case. */
2229 if (info->rhs_code == stores[0]->rhs_code)
2230 return true;
2231
e362a897 2232 /* BIT_INSERT_EXPR is compatible with INTEGER_CST if no STRING_CST. */
7f5a3982 2233 if (info->rhs_code == BIT_INSERT_EXPR && stores[0]->rhs_code == INTEGER_CST)
e362a897 2234 return !string_concatenation;
7f5a3982
EB
2235
2236 if (stores[0]->rhs_code == BIT_INSERT_EXPR && info->rhs_code == INTEGER_CST)
e362a897 2237 return !string_concatenation;
7f5a3982 2238
ed01d707
EB
2239 /* We can turn MEM_REF into BIT_INSERT_EXPR for bit-field stores, but do it
2240 only for small regions since this can generate a lot of instructions. */
7f5a3982
EB
2241 if (info->rhs_code == MEM_REF
2242 && (stores[0]->rhs_code == INTEGER_CST
2243 || stores[0]->rhs_code == BIT_INSERT_EXPR)
2244 && info->bitregion_start == stores[0]->bitregion_start
ed01d707 2245 && info->bitregion_end == stores[0]->bitregion_end
2815558a 2246 && info->bitregion_end - info->bitregion_start <= MAX_FIXED_MODE_SIZE)
e362a897 2247 return !string_concatenation;
7f5a3982
EB
2248
2249 if (stores[0]->rhs_code == MEM_REF
2250 && (info->rhs_code == INTEGER_CST
2251 || info->rhs_code == BIT_INSERT_EXPR)
2252 && info->bitregion_start == stores[0]->bitregion_start
ed01d707 2253 && info->bitregion_end == stores[0]->bitregion_end
2815558a 2254 && info->bitregion_end - info->bitregion_start <= MAX_FIXED_MODE_SIZE)
e362a897
EB
2255 return !string_concatenation;
2256
2257 /* STRING_CST is compatible with INTEGER_CST if no BIT_INSERT_EXPR. */
2258 if (info->rhs_code == STRING_CST
2259 && stores[0]->rhs_code == INTEGER_CST
2260 && stores[0]->bitsize == CHAR_BIT)
2261 return !bit_insertion;
2262
2263 if (stores[0]->rhs_code == STRING_CST
2264 && info->rhs_code == INTEGER_CST
2265 && info->bitsize == CHAR_BIT)
2266 return !bit_insertion;
7f5a3982
EB
2267
2268 return false;
2269}
2270
a62b3dc5
JJ
2271/* Helper method for merge_into and merge_overlapping to do
2272 the common part. */
7f5a3982 2273
f663d9ad 2274void
a62b3dc5 2275merged_store_group::do_merge (store_immediate_info *info)
f663d9ad 2276{
a62b3dc5
JJ
2277 bitregion_start = MIN (bitregion_start, info->bitregion_start);
2278 bitregion_end = MAX (bitregion_end, info->bitregion_end);
2279
2280 unsigned int this_align;
2281 unsigned HOST_WIDE_INT align_bitpos = 0;
2282 get_object_alignment_1 (gimple_assign_lhs (info->stmt),
2283 &this_align, &align_bitpos);
2284 if (this_align > align)
2285 {
2286 align = this_align;
2287 align_base = info->bitpos - align_bitpos;
2288 }
245f6de1
JJ
2289 for (int i = 0; i < 2; ++i)
2290 {
2291 store_operand_info &op = info->ops[i];
2292 if (!op.base_addr)
2293 continue;
2294
2295 get_object_alignment_1 (op.val, &this_align, &align_bitpos);
2296 if (this_align > load_align[i])
2297 {
2298 load_align[i] = this_align;
2299 load_align_base[i] = op.bitpos - align_bitpos;
2300 }
2301 }
f663d9ad 2302
f663d9ad
KT
2303 gimple *stmt = info->stmt;
2304 stores.safe_push (info);
2305 if (info->order > last_order)
2306 {
2307 last_order = info->order;
2308 last_stmt = stmt;
2309 }
2310 else if (info->order < first_order)
2311 {
2312 first_order = info->order;
2313 first_stmt = stmt;
2314 }
e362a897 2315
1b3c9813
EB
2316 if (info->bitpos != start + width)
2317 consecutive = false;
2318
e362a897
EB
2319 /* We need to use extraction if there is any bit-field. */
2320 if (info->rhs_code == BIT_INSERT_EXPR)
2321 {
2322 bit_insertion = true;
2323 gcc_assert (!string_concatenation);
2324 }
2325
1b3c9813 2326 /* We want to use concatenation if there is any string. */
e362a897
EB
2327 if (info->rhs_code == STRING_CST)
2328 {
2329 string_concatenation = true;
2330 gcc_assert (!bit_insertion);
2331 }
2332
1b3c9813
EB
2333 /* But we cannot use it if we don't have consecutive stores. */
2334 if (!consecutive)
2335 string_concatenation = false;
2336
18e0c3d1
JJ
2337 if (info->rhs_code != INTEGER_CST)
2338 only_constants = false;
f663d9ad
KT
2339}
2340
a62b3dc5
JJ
2341/* Merge a store recorded by INFO into this merged store.
2342 The store is not overlapping with the existing recorded
2343 stores. */
2344
2345void
2346merged_store_group::merge_into (store_immediate_info *info)
2347{
1b3c9813
EB
2348 do_merge (info);
2349
a62b3dc5
JJ
2350 /* Make sure we're inserting in the position we think we're inserting. */
2351 gcc_assert (info->bitpos >= start + width
2352 && info->bitregion_start <= bitregion_end);
2353
c5679c37 2354 width = info->bitpos + info->bitsize - start;
a62b3dc5
JJ
2355}
2356
f663d9ad
KT
2357/* Merge a store described by INFO into this merged store.
2358 INFO overlaps in some way with the current store (i.e. it's not contiguous
2359 which is handled by merged_store_group::merge_into). */
2360
2361void
2362merged_store_group::merge_overlapping (store_immediate_info *info)
2363{
1b3c9813
EB
2364 do_merge (info);
2365
f663d9ad 2366 /* If the store extends the size of the group, extend the width. */
a62b3dc5 2367 if (info->bitpos + info->bitsize > start + width)
c5679c37 2368 width = info->bitpos + info->bitsize - start;
f663d9ad
KT
2369}
2370
2371/* Go through all the recorded stores in this group in program order and
2372 apply their values to the VAL byte array to create the final merged
2373 value. Return true if the operation succeeded. */
2374
2375bool
2376merged_store_group::apply_stores ()
2377{
e362a897
EB
2378 store_immediate_info *info;
2379 unsigned int i;
2380
a62b3dc5
JJ
2381 /* Make sure we have more than one store in the group, otherwise we cannot
2382 merge anything. */
2383 if (bitregion_start % BITS_PER_UNIT != 0
2384 || bitregion_end % BITS_PER_UNIT != 0
f663d9ad
KT
2385 || stores.length () == 1)
2386 return false;
2387
e362a897
EB
2388 buf_size = (bitregion_end - bitregion_start) / BITS_PER_UNIT;
2389
2390 /* Really do string concatenation for large strings only. */
2391 if (buf_size <= MOVE_MAX)
2392 string_concatenation = false;
2393
617be7ba
JJ
2394 /* String concatenation only works for byte aligned start and end. */
2395 if (start % BITS_PER_UNIT != 0 || width % BITS_PER_UNIT != 0)
2396 string_concatenation = false;
2397
c94c3532 2398 /* Create a power-of-2-sized buffer for native_encode_expr. */
e362a897
EB
2399 if (!string_concatenation)
2400 buf_size = 1 << ceil_log2 (buf_size);
2401
a62b3dc5
JJ
2402 val = XNEWVEC (unsigned char, 2 * buf_size);
2403 mask = val + buf_size;
2404 memset (val, 0, buf_size);
2405 memset (mask, ~0U, buf_size);
f663d9ad 2406
e362a897
EB
2407 stores.qsort (sort_by_order);
2408
f663d9ad
KT
2409 FOR_EACH_VEC_ELT (stores, i, info)
2410 {
a62b3dc5 2411 unsigned int pos_in_buffer = info->bitpos - bitregion_start;
c94c3532 2412 tree cst;
245f6de1
JJ
2413 if (info->ops[0].val && info->ops[0].base_addr == NULL_TREE)
2414 cst = info->ops[0].val;
2415 else if (info->ops[1].val && info->ops[1].base_addr == NULL_TREE)
2416 cst = info->ops[1].val;
c94c3532
EB
2417 else
2418 cst = NULL_TREE;
245f6de1 2419 bool ret = true;
e362a897
EB
2420 if (cst && info->rhs_code != BIT_INSERT_EXPR)
2421 ret = encode_tree_to_bitpos (cst, val, info->bitsize, pos_in_buffer,
2422 buf_size);
c94c3532
EB
2423 unsigned char *m = mask + (pos_in_buffer / BITS_PER_UNIT);
2424 if (BYTES_BIG_ENDIAN)
2425 clear_bit_region_be (m, (BITS_PER_UNIT - 1
2426 - (pos_in_buffer % BITS_PER_UNIT)),
2427 info->bitsize);
2428 else
2429 clear_bit_region (m, pos_in_buffer % BITS_PER_UNIT, info->bitsize);
245f6de1 2430 if (cst && dump_file && (dump_flags & TDF_DETAILS))
f663d9ad
KT
2431 {
2432 if (ret)
2433 {
c94c3532 2434 fputs ("After writing ", dump_file);
4af78ef8 2435 print_generic_expr (dump_file, cst, TDF_NONE);
f663d9ad 2436 fprintf (dump_file, " of size " HOST_WIDE_INT_PRINT_DEC
c94c3532
EB
2437 " at position %d\n", info->bitsize, pos_in_buffer);
2438 fputs (" the merged value contains ", dump_file);
f663d9ad 2439 dump_char_array (dump_file, val, buf_size);
c94c3532
EB
2440 fputs (" the merged mask contains ", dump_file);
2441 dump_char_array (dump_file, mask, buf_size);
2442 if (bit_insertion)
2443 fputs (" bit insertion is required\n", dump_file);
e362a897
EB
2444 if (string_concatenation)
2445 fputs (" string concatenation is required\n", dump_file);
f663d9ad
KT
2446 }
2447 else
2448 fprintf (dump_file, "Failed to merge stores\n");
4b84d9b8 2449 }
f663d9ad
KT
2450 if (!ret)
2451 return false;
2452 }
4b84d9b8 2453 stores.qsort (sort_by_bitpos);
f663d9ad
KT
2454 return true;
2455}
2456
2457/* Structure describing the store chain. */
2458
6c1dae73 2459class imm_store_chain_info
f663d9ad 2460{
6c1dae73 2461public:
50b6d676
AO
2462 /* Doubly-linked list that imposes an order on chain processing.
2463 PNXP (prev's next pointer) points to the head of a list, or to
2464 the next field in the previous chain in the list.
2465 See pass_store_merging::m_stores_head for more rationale. */
2466 imm_store_chain_info *next, **pnxp;
b5926e23 2467 tree base_addr;
a62b3dc5 2468 auto_vec<store_immediate_info *> m_store_info;
f663d9ad
KT
2469 auto_vec<merged_store_group *> m_merged_store_groups;
2470
50b6d676
AO
2471 imm_store_chain_info (imm_store_chain_info *&inspt, tree b_a)
2472 : next (inspt), pnxp (&inspt), base_addr (b_a)
2473 {
2474 inspt = this;
2475 if (next)
2476 {
2477 gcc_checking_assert (pnxp == next->pnxp);
2478 next->pnxp = &next;
2479 }
2480 }
2481 ~imm_store_chain_info ()
2482 {
2483 *pnxp = next;
2484 if (next)
2485 {
2486 gcc_checking_assert (&next == next->pnxp);
2487 next->pnxp = pnxp;
2488 }
2489 }
b5926e23 2490 bool terminate_and_process_chain ();
bd909071
JJ
2491 bool try_coalesce_bswap (merged_store_group *, unsigned int, unsigned int,
2492 unsigned int);
f663d9ad 2493 bool coalesce_immediate_stores ();
b5926e23
RB
2494 bool output_merged_store (merged_store_group *);
2495 bool output_merged_stores ();
f663d9ad
KT
2496};
2497
2498const pass_data pass_data_tree_store_merging = {
2499 GIMPLE_PASS, /* type */
2500 "store-merging", /* name */
2501 OPTGROUP_NONE, /* optinfo_flags */
2502 TV_GIMPLE_STORE_MERGING, /* tv_id */
2503 PROP_ssa, /* properties_required */
2504 0, /* properties_provided */
2505 0, /* properties_destroyed */
2506 0, /* todo_flags_start */
2507 TODO_update_ssa, /* todo_flags_finish */
2508};
2509
2510class pass_store_merging : public gimple_opt_pass
2511{
2512public:
2513 pass_store_merging (gcc::context *ctxt)
95d94b52
RB
2514 : gimple_opt_pass (pass_data_tree_store_merging, ctxt), m_stores_head (),
2515 m_n_chains (0), m_n_stores (0)
f663d9ad
KT
2516 {
2517 }
2518
c94c3532
EB
2519 /* Pass not supported for PDP-endian, nor for insane hosts or
2520 target character sizes where native_{encode,interpret}_expr
a62b3dc5 2521 doesn't work properly. */
725793af
DM
2522 bool
2523 gate (function *) final override
f663d9ad 2524 {
a62b3dc5 2525 return flag_store_merging
c94c3532 2526 && BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN
a62b3dc5
JJ
2527 && CHAR_BIT == 8
2528 && BITS_PER_UNIT == 8;
f663d9ad
KT
2529 }
2530
725793af 2531 unsigned int execute (function *) final override;
f663d9ad
KT
2532
2533private:
99b1c316 2534 hash_map<tree_operand_hash, class imm_store_chain_info *> m_stores;
f663d9ad 2535
50b6d676
AO
2536 /* Form a doubly-linked stack of the elements of m_stores, so that
2537 we can iterate over them in a predictable way. Using this order
2538 avoids extraneous differences in the compiler output just because
2539 of tree pointer variations (e.g. different chains end up in
2540 different positions of m_stores, so they are handled in different
2541 orders, so they allocate or release SSA names in different
2542 orders, and when they get reused, subsequent passes end up
2543 getting different SSA names, which may ultimately change
2544 decisions when going out of SSA). */
2545 imm_store_chain_info *m_stores_head;
2546
95d94b52
RB
2547 /* The number of store chains currently tracked. */
2548 unsigned m_n_chains;
2549 /* The number of stores currently tracked. */
2550 unsigned m_n_stores;
2551
629387a6
EB
2552 bool process_store (gimple *);
2553 bool terminate_and_process_chain (imm_store_chain_info *);
383ac8dc 2554 bool terminate_all_aliasing_chains (imm_store_chain_info **, gimple *);
629387a6 2555 bool terminate_and_process_all_chains ();
f663d9ad
KT
2556}; // class pass_store_merging
2557
2558/* Terminate and process all recorded chains. Return true if any changes
2559 were made. */
2560
2561bool
2562pass_store_merging::terminate_and_process_all_chains ()
2563{
f663d9ad 2564 bool ret = false;
50b6d676 2565 while (m_stores_head)
629387a6 2566 ret |= terminate_and_process_chain (m_stores_head);
b119c055 2567 gcc_assert (m_stores.is_empty ());
f663d9ad
KT
2568 return ret;
2569}
2570
383ac8dc
JJ
2571/* Terminate all chains that are affected by the statement STMT.
2572 CHAIN_INFO is the chain we should ignore from the checks if
629387a6 2573 non-NULL. Return true if any changes were made. */
f663d9ad
KT
2574
2575bool
20770eb8 2576pass_store_merging::terminate_all_aliasing_chains (imm_store_chain_info
b5926e23 2577 **chain_info,
f663d9ad
KT
2578 gimple *stmt)
2579{
2580 bool ret = false;
2581
2582 /* If the statement doesn't touch memory it can't alias. */
2583 if (!gimple_vuse (stmt))
2584 return false;
2585
9e875fd8 2586 tree store_lhs = gimple_store_p (stmt) ? gimple_get_lhs (stmt) : NULL_TREE;
6b412bf6
RB
2587 ao_ref store_lhs_ref;
2588 ao_ref_init (&store_lhs_ref, store_lhs);
383ac8dc 2589 for (imm_store_chain_info *next = m_stores_head, *cur = next; cur; cur = next)
f663d9ad 2590 {
383ac8dc
JJ
2591 next = cur->next;
2592
2593 /* We already checked all the stores in chain_info and terminated the
2594 chain if necessary. Skip it here. */
2595 if (chain_info && *chain_info == cur)
2596 continue;
2597
245f6de1
JJ
2598 store_immediate_info *info;
2599 unsigned int i;
383ac8dc 2600 FOR_EACH_VEC_ELT (cur->m_store_info, i, info)
f663d9ad 2601 {
9e875fd8 2602 tree lhs = gimple_assign_lhs (info->stmt);
6b412bf6
RB
2603 ao_ref lhs_ref;
2604 ao_ref_init (&lhs_ref, lhs);
2605 if (ref_maybe_used_by_stmt_p (stmt, &lhs_ref)
2606 || stmt_may_clobber_ref_p_1 (stmt, &lhs_ref)
2607 || (store_lhs && refs_may_alias_p_1 (&store_lhs_ref,
2608 &lhs_ref, false)))
f663d9ad 2609 {
245f6de1 2610 if (dump_file && (dump_flags & TDF_DETAILS))
f663d9ad 2611 {
245f6de1
JJ
2612 fprintf (dump_file, "stmt causes chain termination:\n");
2613 print_gimple_stmt (dump_file, stmt, 0);
f663d9ad 2614 }
629387a6 2615 ret |= terminate_and_process_chain (cur);
245f6de1 2616 break;
f663d9ad
KT
2617 }
2618 }
2619 }
2620
f663d9ad
KT
2621 return ret;
2622}
2623
2624/* Helper function. Terminate the recorded chain storing to base object
2625 BASE. Return true if the merging and output was successful. The m_stores
2626 entry is removed after the processing in any case. */
2627
2628bool
629387a6 2629pass_store_merging::terminate_and_process_chain (imm_store_chain_info *chain_info)
f663d9ad 2630{
95d94b52
RB
2631 m_n_stores -= chain_info->m_store_info.length ();
2632 m_n_chains--;
b5926e23
RB
2633 bool ret = chain_info->terminate_and_process_chain ();
2634 m_stores.remove (chain_info->base_addr);
2635 delete chain_info;
f663d9ad
KT
2636 return ret;
2637}
2638
245f6de1 2639/* Return true if stmts in between FIRST (inclusive) and LAST (exclusive)
629387a6
EB
2640 may clobber REF. FIRST and LAST must have non-NULL vdef. We want to
2641 be able to sink load of REF across stores between FIRST and LAST, up
2642 to right before LAST. */
245f6de1
JJ
2643
2644bool
2645stmts_may_clobber_ref_p (gimple *first, gimple *last, tree ref)
2646{
2647 ao_ref r;
2648 ao_ref_init (&r, ref);
2649 unsigned int count = 0;
2650 tree vop = gimple_vdef (last);
2651 gimple *stmt;
2652
629387a6
EB
2653 /* Return true conservatively if the basic blocks are different. */
2654 if (gimple_bb (first) != gimple_bb (last))
2655 return true;
2656
245f6de1
JJ
2657 do
2658 {
2659 stmt = SSA_NAME_DEF_STMT (vop);
2660 if (stmt_may_clobber_ref_p_1 (stmt, &r))
2661 return true;
4b84d9b8
JJ
2662 if (gimple_store_p (stmt)
2663 && refs_anti_dependent_p (ref, gimple_get_lhs (stmt)))
2664 return true;
245f6de1
JJ
2665 /* Avoid quadratic compile time by bounding the number of checks
2666 we perform. */
2667 if (++count > MAX_STORE_ALIAS_CHECKS)
2668 return true;
2669 vop = gimple_vuse (stmt);
2670 }
2671 while (stmt != first);
629387a6 2672
245f6de1
JJ
2673 return false;
2674}
2675
2676/* Return true if INFO->ops[IDX] is mergeable with the
2677 corresponding loads already in MERGED_STORE group.
2678 BASE_ADDR is the base address of the whole store group. */
2679
2680bool
2681compatible_load_p (merged_store_group *merged_store,
2682 store_immediate_info *info,
2683 tree base_addr, int idx)
2684{
2685 store_immediate_info *infof = merged_store->stores[0];
2686 if (!info->ops[idx].base_addr
8a91d545
RS
2687 || maybe_ne (info->ops[idx].bitpos - infof->ops[idx].bitpos,
2688 info->bitpos - infof->bitpos)
245f6de1
JJ
2689 || !operand_equal_p (info->ops[idx].base_addr,
2690 infof->ops[idx].base_addr, 0))
2691 return false;
2692
2693 store_immediate_info *infol = merged_store->stores.last ();
2694 tree load_vuse = gimple_vuse (info->ops[idx].stmt);
2695 /* In this case all vuses should be the same, e.g.
2696 _1 = s.a; _2 = s.b; _3 = _1 | 1; t.a = _3; _4 = _2 | 2; t.b = _4;
2697 or
2698 _1 = s.a; _2 = s.b; t.a = _1; t.b = _2;
2699 and we can emit the coalesced load next to any of those loads. */
2700 if (gimple_vuse (infof->ops[idx].stmt) == load_vuse
2701 && gimple_vuse (infol->ops[idx].stmt) == load_vuse)
2702 return true;
2703
2704 /* Otherwise, at least for now require that the load has the same
2705 vuse as the store. See following examples. */
2706 if (gimple_vuse (info->stmt) != load_vuse)
2707 return false;
2708
2709 if (gimple_vuse (infof->stmt) != gimple_vuse (infof->ops[idx].stmt)
2710 || (infof != infol
2711 && gimple_vuse (infol->stmt) != gimple_vuse (infol->ops[idx].stmt)))
2712 return false;
2713
2714 /* If the load is from the same location as the store, already
2715 the construction of the immediate chain info guarantees no intervening
2716 stores, so no further checks are needed. Example:
2717 _1 = s.a; _2 = _1 & -7; s.a = _2; _3 = s.b; _4 = _3 & -7; s.b = _4; */
8a91d545 2718 if (known_eq (info->ops[idx].bitpos, info->bitpos)
245f6de1
JJ
2719 && operand_equal_p (info->ops[idx].base_addr, base_addr, 0))
2720 return true;
2721
2722 /* Otherwise, we need to punt if any of the loads can be clobbered by any
2723 of the stores in the group, or any other stores in between those.
2724 Previous calls to compatible_load_p ensured that for all the
2725 merged_store->stores IDX loads, no stmts starting with
2726 merged_store->first_stmt and ending right before merged_store->last_stmt
2727 clobbers those loads. */
2728 gimple *first = merged_store->first_stmt;
2729 gimple *last = merged_store->last_stmt;
245f6de1
JJ
2730 /* The stores are sorted by increasing store bitpos, so if info->stmt store
2731 comes before the so far first load, we'll be changing
2732 merged_store->first_stmt. In that case we need to give up if
2733 any of the earlier processed loads clobber with the stmts in the new
2734 range. */
2735 if (info->order < merged_store->first_order)
2736 {
3f207ab3 2737 for (store_immediate_info *infoc : merged_store->stores)
245f6de1
JJ
2738 if (stmts_may_clobber_ref_p (info->stmt, first, infoc->ops[idx].val))
2739 return false;
2740 first = info->stmt;
2741 }
2742 /* Similarly, we could change merged_store->last_stmt, so ensure
2743 in that case no stmts in the new range clobber any of the earlier
2744 processed loads. */
2745 else if (info->order > merged_store->last_order)
2746 {
3f207ab3 2747 for (store_immediate_info *infoc : merged_store->stores)
245f6de1
JJ
2748 if (stmts_may_clobber_ref_p (last, info->stmt, infoc->ops[idx].val))
2749 return false;
2750 last = info->stmt;
2751 }
2752 /* And finally, we'd be adding a new load to the set, ensure it isn't
2753 clobbered in the new range. */
2754 if (stmts_may_clobber_ref_p (first, last, info->ops[idx].val))
2755 return false;
2756
2757 /* Otherwise, we are looking for:
2758 _1 = s.a; _2 = _1 ^ 15; t.a = _2; _3 = s.b; _4 = _3 ^ 15; t.b = _4;
2759 or
2760 _1 = s.a; t.a = _1; _2 = s.b; t.b = _2; */
2761 return true;
2762}
2763
4b84d9b8
JJ
2764/* Add all refs loaded to compute VAL to REFS vector. */
2765
2766void
2767gather_bswap_load_refs (vec<tree> *refs, tree val)
2768{
2769 if (TREE_CODE (val) != SSA_NAME)
2770 return;
2771
2772 gimple *stmt = SSA_NAME_DEF_STMT (val);
2773 if (!is_gimple_assign (stmt))
2774 return;
2775
2776 if (gimple_assign_load_p (stmt))
2777 {
2778 refs->safe_push (gimple_assign_rhs1 (stmt));
2779 return;
2780 }
2781
2782 switch (gimple_assign_rhs_class (stmt))
2783 {
2784 case GIMPLE_BINARY_RHS:
2785 gather_bswap_load_refs (refs, gimple_assign_rhs2 (stmt));
2786 /* FALLTHRU */
2787 case GIMPLE_UNARY_RHS:
2788 gather_bswap_load_refs (refs, gimple_assign_rhs1 (stmt));
2789 break;
2790 default:
2791 gcc_unreachable ();
2792 }
2793}
2794
c5679c37
JJ
2795/* Check if there are any stores in M_STORE_INFO after index I
2796 (where M_STORE_INFO must be sorted by sort_by_bitpos) that overlap
2797 a potential group ending with END that have their order
4d213bf6
JJ
2798 smaller than LAST_ORDER. ALL_INTEGER_CST_P is true if
2799 all the stores already merged and the one under consideration
2800 have rhs_code of INTEGER_CST. Return true if there are no such stores.
c5679c37
JJ
2801 Consider:
2802 MEM[(long long int *)p_28] = 0;
2803 MEM[(long long int *)p_28 + 8B] = 0;
2804 MEM[(long long int *)p_28 + 16B] = 0;
2805 MEM[(long long int *)p_28 + 24B] = 0;
2806 _129 = (int) _130;
2807 MEM[(int *)p_28 + 8B] = _129;
2808 MEM[(int *)p_28].a = -1;
2809 We already have
2810 MEM[(long long int *)p_28] = 0;
2811 MEM[(int *)p_28].a = -1;
2812 stmts in the current group and need to consider if it is safe to
2813 add MEM[(long long int *)p_28 + 8B] = 0; store into the same group.
2814 There is an overlap between that store and the MEM[(int *)p_28 + 8B] = _129;
2815 store though, so if we add the MEM[(long long int *)p_28 + 8B] = 0;
2816 into the group and merging of those 3 stores is successful, merged
2817 stmts will be emitted at the latest store from that group, i.e.
2818 LAST_ORDER, which is the MEM[(int *)p_28].a = -1; store.
2819 The MEM[(int *)p_28 + 8B] = _129; store that originally follows
2820 the MEM[(long long int *)p_28 + 8B] = 0; would now be before it,
2821 so we need to refuse merging MEM[(long long int *)p_28 + 8B] = 0;
2822 into the group. That way it will be its own store group and will
4d213bf6 2823 not be touched. If ALL_INTEGER_CST_P and there are overlapping
c5679c37 2824 INTEGER_CST stores, those are mergeable using merge_overlapping,
bd909071
JJ
2825 so don't return false for those.
2826
2827 Similarly, check stores from FIRST_EARLIER (inclusive) to END_EARLIER
2828 (exclusive), whether they don't overlap the bitrange START to END
2829 and have order in between FIRST_ORDER and LAST_ORDER. This is to
2830 prevent merging in cases like:
2831 MEM <char[12]> [&b + 8B] = {};
2832 MEM[(short *) &b] = 5;
2833 _5 = *x_4(D);
2834 MEM <long long unsigned int> [&b + 2B] = _5;
2835 MEM[(char *)&b + 16B] = 88;
2836 MEM[(int *)&b + 20B] = 1;
2837 The = {} store comes in sort_by_bitpos before the = 88 store, and can't
2838 be merged with it, because the = _5 store overlaps these and is in between
2839 them in sort_by_order ordering. If it was merged, the merged store would
2840 go after the = _5 store and thus change behavior. */
c5679c37
JJ
2841
2842static bool
00dcc88a
MS
2843check_no_overlap (const vec<store_immediate_info *> &m_store_info,
2844 unsigned int i,
bd909071
JJ
2845 bool all_integer_cst_p, unsigned int first_order,
2846 unsigned int last_order, unsigned HOST_WIDE_INT start,
2847 unsigned HOST_WIDE_INT end, unsigned int first_earlier,
2848 unsigned end_earlier)
c5679c37
JJ
2849{
2850 unsigned int len = m_store_info.length ();
bd909071
JJ
2851 for (unsigned int j = first_earlier; j < end_earlier; j++)
2852 {
2853 store_immediate_info *info = m_store_info[j];
2854 if (info->order > first_order
2855 && info->order < last_order
2856 && info->bitpos + info->bitsize > start)
2857 return false;
2858 }
c5679c37
JJ
2859 for (++i; i < len; ++i)
2860 {
2861 store_immediate_info *info = m_store_info[i];
2862 if (info->bitpos >= end)
2863 break;
2864 if (info->order < last_order
4d213bf6 2865 && (!all_integer_cst_p || info->rhs_code != INTEGER_CST))
c5679c37
JJ
2866 return false;
2867 }
2868 return true;
2869}
2870
4b84d9b8
JJ
2871/* Return true if m_store_info[first] and at least one following store
2872 form a group which store try_size bitsize value which is byte swapped
2873 from a memory load or some value, or identity from some value.
2874 This uses the bswap pass APIs. */
2875
2876bool
2877imm_store_chain_info::try_coalesce_bswap (merged_store_group *merged_store,
2878 unsigned int first,
bd909071
JJ
2879 unsigned int try_size,
2880 unsigned int first_earlier)
4b84d9b8
JJ
2881{
2882 unsigned int len = m_store_info.length (), last = first;
2883 unsigned HOST_WIDE_INT width = m_store_info[first]->bitsize;
2884 if (width >= try_size)
2885 return false;
2886 for (unsigned int i = first + 1; i < len; ++i)
2887 {
2888 if (m_store_info[i]->bitpos != m_store_info[first]->bitpos + width
cb76fcd7 2889 || m_store_info[i]->lp_nr != merged_store->lp_nr
4b84d9b8
JJ
2890 || m_store_info[i]->ins_stmt == NULL)
2891 return false;
2892 width += m_store_info[i]->bitsize;
2893 if (width >= try_size)
2894 {
2895 last = i;
2896 break;
2897 }
2898 }
2899 if (width != try_size)
2900 return false;
2901
2902 bool allow_unaligned
028d4092 2903 = !STRICT_ALIGNMENT && param_store_merging_allow_unaligned;
4b84d9b8
JJ
2904 /* Punt if the combined store would not be aligned and we need alignment. */
2905 if (!allow_unaligned)
2906 {
2907 unsigned int align = merged_store->align;
2908 unsigned HOST_WIDE_INT align_base = merged_store->align_base;
2909 for (unsigned int i = first + 1; i <= last; ++i)
2910 {
2911 unsigned int this_align;
2912 unsigned HOST_WIDE_INT align_bitpos = 0;
2913 get_object_alignment_1 (gimple_assign_lhs (m_store_info[i]->stmt),
2914 &this_align, &align_bitpos);
2915 if (this_align > align)
2916 {
2917 align = this_align;
2918 align_base = m_store_info[i]->bitpos - align_bitpos;
2919 }
2920 }
2921 unsigned HOST_WIDE_INT align_bitpos
2922 = (m_store_info[first]->bitpos - align_base) & (align - 1);
2923 if (align_bitpos)
2924 align = least_bit_hwi (align_bitpos);
2925 if (align < try_size)
2926 return false;
2927 }
2928
2929 tree type;
2930 switch (try_size)
2931 {
2932 case 16: type = uint16_type_node; break;
2933 case 32: type = uint32_type_node; break;
2934 case 64: type = uint64_type_node; break;
2935 default: gcc_unreachable ();
2936 }
2937 struct symbolic_number n;
2938 gimple *ins_stmt = NULL;
2939 int vuse_store = -1;
2940 unsigned int first_order = merged_store->first_order;
2941 unsigned int last_order = merged_store->last_order;
2942 gimple *first_stmt = merged_store->first_stmt;
2943 gimple *last_stmt = merged_store->last_stmt;
c5679c37 2944 unsigned HOST_WIDE_INT end = merged_store->start + merged_store->width;
4b84d9b8
JJ
2945 store_immediate_info *infof = m_store_info[first];
2946
2947 for (unsigned int i = first; i <= last; ++i)
2948 {
2949 store_immediate_info *info = m_store_info[i];
2950 struct symbolic_number this_n = info->n;
2951 this_n.type = type;
2952 if (!this_n.base_addr)
2953 this_n.range = try_size / BITS_PER_UNIT;
30fa8e9c
JJ
2954 else
2955 /* Update vuse in case it has changed by output_merged_stores. */
2956 this_n.vuse = gimple_vuse (info->ins_stmt);
4b84d9b8
JJ
2957 unsigned int bitpos = info->bitpos - infof->bitpos;
2958 if (!do_shift_rotate (LSHIFT_EXPR, &this_n,
2959 BYTES_BIG_ENDIAN
2960 ? try_size - info->bitsize - bitpos
2961 : bitpos))
2962 return false;
aa11164a 2963 if (this_n.base_addr && vuse_store)
4b84d9b8
JJ
2964 {
2965 unsigned int j;
2966 for (j = first; j <= last; ++j)
2967 if (this_n.vuse == gimple_vuse (m_store_info[j]->stmt))
2968 break;
2969 if (j > last)
2970 {
2971 if (vuse_store == 1)
2972 return false;
2973 vuse_store = 0;
2974 }
2975 }
2976 if (i == first)
2977 {
2978 n = this_n;
2979 ins_stmt = info->ins_stmt;
2980 }
2981 else
2982 {
c5679c37 2983 if (n.base_addr && n.vuse != this_n.vuse)
4b84d9b8 2984 {
c5679c37
JJ
2985 if (vuse_store == 0)
2986 return false;
2987 vuse_store = 1;
4b84d9b8 2988 }
c5679c37
JJ
2989 if (info->order > last_order)
2990 {
2991 last_order = info->order;
2992 last_stmt = info->stmt;
2993 }
2994 else if (info->order < first_order)
2995 {
2996 first_order = info->order;
2997 first_stmt = info->stmt;
2998 }
2999 end = MAX (end, info->bitpos + info->bitsize);
4b84d9b8
JJ
3000
3001 ins_stmt = perform_symbolic_merge (ins_stmt, &n, info->ins_stmt,
04eccbbe 3002 &this_n, &n, BIT_IOR_EXPR);
4b84d9b8
JJ
3003 if (ins_stmt == NULL)
3004 return false;
3005 }
3006 }
3007
3008 uint64_t cmpxchg, cmpnop;
b320edc0
JJ
3009 bool cast64_to_32;
3010 find_bswap_or_nop_finalize (&n, &cmpxchg, &cmpnop, &cast64_to_32);
4b84d9b8
JJ
3011
3012 /* A complete byte swap should make the symbolic number to start with
3013 the largest digit in the highest order byte. Unchanged symbolic
3014 number indicates a read with same endianness as target architecture. */
3015 if (n.n != cmpnop && n.n != cmpxchg)
3016 return false;
3017
b320edc0
JJ
3018 /* For now. */
3019 if (cast64_to_32)
3020 return false;
3021
4b84d9b8
JJ
3022 if (n.base_addr == NULL_TREE && !is_gimple_val (n.src))
3023 return false;
3024
bd909071
JJ
3025 if (!check_no_overlap (m_store_info, last, false, first_order, last_order,
3026 merged_store->start, end, first_earlier, first))
c5679c37
JJ
3027 return false;
3028
4b84d9b8
JJ
3029 /* Don't handle memory copy this way if normal non-bswap processing
3030 would handle it too. */
3031 if (n.n == cmpnop && (unsigned) n.n_ops == last - first + 1)
3032 {
3033 unsigned int i;
3034 for (i = first; i <= last; ++i)
3035 if (m_store_info[i]->rhs_code != MEM_REF)
3036 break;
3037 if (i == last + 1)
3038 return false;
3039 }
3040
3041 if (n.n == cmpxchg)
3042 switch (try_size)
3043 {
3044 case 16:
3045 /* Will emit LROTATE_EXPR. */
3046 break;
3047 case 32:
3048 if (builtin_decl_explicit_p (BUILT_IN_BSWAP32)
3049 && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing)
3050 break;
3051 return false;
3052 case 64:
3053 if (builtin_decl_explicit_p (BUILT_IN_BSWAP64)
74bca21d
JJ
3054 && (optab_handler (bswap_optab, DImode) != CODE_FOR_nothing
3055 || (word_mode == SImode
3056 && builtin_decl_explicit_p (BUILT_IN_BSWAP32)
3057 && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing)))
4b84d9b8
JJ
3058 break;
3059 return false;
3060 default:
3061 gcc_unreachable ();
3062 }
3063
3064 if (!allow_unaligned && n.base_addr)
3065 {
3066 unsigned int align = get_object_alignment (n.src);
3067 if (align < try_size)
3068 return false;
3069 }
3070
3071 /* If each load has vuse of the corresponding store, need to verify
3072 the loads can be sunk right before the last store. */
3073 if (vuse_store == 1)
3074 {
3075 auto_vec<tree, 64> refs;
3076 for (unsigned int i = first; i <= last; ++i)
3077 gather_bswap_load_refs (&refs,
3078 gimple_assign_rhs1 (m_store_info[i]->stmt));
3079
3f207ab3 3080 for (tree ref : refs)
4b84d9b8
JJ
3081 if (stmts_may_clobber_ref_p (first_stmt, last_stmt, ref))
3082 return false;
3083 n.vuse = NULL_TREE;
3084 }
3085
3086 infof->n = n;
3087 infof->ins_stmt = ins_stmt;
3088 for (unsigned int i = first; i <= last; ++i)
3089 {
3090 m_store_info[i]->rhs_code = n.n == cmpxchg ? LROTATE_EXPR : NOP_EXPR;
3091 m_store_info[i]->ops[0].base_addr = NULL_TREE;
3092 m_store_info[i]->ops[1].base_addr = NULL_TREE;
3093 if (i != first)
3094 merged_store->merge_into (m_store_info[i]);
3095 }
3096
3097 return true;
3098}
3099
f663d9ad
KT
3100/* Go through the candidate stores recorded in m_store_info and merge them
3101 into merged_store_group objects recorded into m_merged_store_groups
3102 representing the widened stores. Return true if coalescing was successful
3103 and the number of widened stores is fewer than the original number
3104 of stores. */
3105
3106bool
3107imm_store_chain_info::coalesce_immediate_stores ()
3108{
3109 /* Anything less can't be processed. */
3110 if (m_store_info.length () < 2)
3111 return false;
3112
3113 if (dump_file && (dump_flags & TDF_DETAILS))
c94c3532 3114 fprintf (dump_file, "Attempting to coalesce %u stores in chain\n",
f663d9ad
KT
3115 m_store_info.length ());
3116
3117 store_immediate_info *info;
4b84d9b8 3118 unsigned int i, ignore = 0;
bd909071
JJ
3119 unsigned int first_earlier = 0;
3120 unsigned int end_earlier = 0;
f663d9ad
KT
3121
3122 /* Order the stores by the bitposition they write to. */
3123 m_store_info.qsort (sort_by_bitpos);
3124
3125 info = m_store_info[0];
3126 merged_store_group *merged_store = new merged_store_group (info);
c94c3532
EB
3127 if (dump_file && (dump_flags & TDF_DETAILS))
3128 fputs ("New store group\n", dump_file);
f663d9ad
KT
3129
3130 FOR_EACH_VEC_ELT (m_store_info, i, info)
3131 {
3afd514b
JJ
3132 unsigned HOST_WIDE_INT new_bitregion_start, new_bitregion_end;
3133
4b84d9b8 3134 if (i <= ignore)
c94c3532 3135 goto done;
f663d9ad 3136
bd909071
JJ
3137 while (first_earlier < end_earlier
3138 && (m_store_info[first_earlier]->bitpos
3139 + m_store_info[first_earlier]->bitsize
3140 <= merged_store->start))
3141 first_earlier++;
3142
4b84d9b8
JJ
3143 /* First try to handle group of stores like:
3144 p[0] = data >> 24;
3145 p[1] = data >> 16;
3146 p[2] = data >> 8;
3147 p[3] = data;
3148 using the bswap framework. */
3149 if (info->bitpos == merged_store->start + merged_store->width
3150 && merged_store->stores.length () == 1
3151 && merged_store->stores[0]->ins_stmt != NULL
cb76fcd7 3152 && info->lp_nr == merged_store->lp_nr
4b84d9b8
JJ
3153 && info->ins_stmt != NULL)
3154 {
3155 unsigned int try_size;
3156 for (try_size = 64; try_size >= 16; try_size >>= 1)
bd909071
JJ
3157 if (try_coalesce_bswap (merged_store, i - 1, try_size,
3158 first_earlier))
4b84d9b8
JJ
3159 break;
3160
3161 if (try_size >= 16)
3162 {
3163 ignore = i + merged_store->stores.length () - 1;
3164 m_merged_store_groups.safe_push (merged_store);
3165 if (ignore < m_store_info.length ())
bd909071
JJ
3166 {
3167 merged_store = new merged_store_group (m_store_info[ignore]);
3168 end_earlier = ignore;
3169 }
4b84d9b8
JJ
3170 else
3171 merged_store = NULL;
c94c3532 3172 goto done;
4b84d9b8
JJ
3173 }
3174 }
3175
3afd514b
JJ
3176 new_bitregion_start
3177 = MIN (merged_store->bitregion_start, info->bitregion_start);
3178 new_bitregion_end
3179 = MAX (merged_store->bitregion_end, info->bitregion_end);
3180
3181 if (info->order >= merged_store->first_nonmergeable_order
3182 || (((new_bitregion_end - new_bitregion_start + 1) / BITS_PER_UNIT)
028d4092 3183 > (unsigned) param_store_merging_max_size))
18e0c3d1
JJ
3184 ;
3185
f663d9ad
KT
3186 /* |---store 1---|
3187 |---store 2---|
4b84d9b8 3188 Overlapping stores. */
18e0c3d1 3189 else if (IN_RANGE (info->bitpos, merged_store->start,
4d213bf6
JJ
3190 merged_store->start + merged_store->width - 1)
3191 /* |---store 1---||---store 2---|
3192 Handle also the consecutive INTEGER_CST stores case here,
3193 as we have here the code to deal with overlaps. */
3194 || (info->bitregion_start <= merged_store->bitregion_end
3195 && info->rhs_code == INTEGER_CST
3196 && merged_store->only_constants
3197 && merged_store->can_be_merged_into (info)))
f663d9ad 3198 {
245f6de1 3199 /* Only allow overlapping stores of constants. */
629387a6
EB
3200 if (info->rhs_code == INTEGER_CST
3201 && merged_store->only_constants
3202 && info->lp_nr == merged_store->lp_nr)
245f6de1 3203 {
bd909071
JJ
3204 unsigned int first_order
3205 = MIN (merged_store->first_order, info->order);
6cd4c66e
JJ
3206 unsigned int last_order
3207 = MAX (merged_store->last_order, info->order);
3208 unsigned HOST_WIDE_INT end
3209 = MAX (merged_store->start + merged_store->width,
3210 info->bitpos + info->bitsize);
bd909071
JJ
3211 if (check_no_overlap (m_store_info, i, true, first_order,
3212 last_order, merged_store->start, end,
3213 first_earlier, end_earlier))
6cd4c66e
JJ
3214 {
3215 /* check_no_overlap call above made sure there are no
3216 overlapping stores with non-INTEGER_CST rhs_code
3217 in between the first and last of the stores we've
3218 just merged. If there are any INTEGER_CST rhs_code
3219 stores in between, we need to merge_overlapping them
3220 even if in the sort_by_bitpos order there are other
3221 overlapping stores in between. Keep those stores as is.
3222 Example:
3223 MEM[(int *)p_28] = 0;
3224 MEM[(char *)p_28 + 3B] = 1;
3225 MEM[(char *)p_28 + 1B] = 2;
3226 MEM[(char *)p_28 + 2B] = MEM[(char *)p_28 + 6B];
3227 We can't merge the zero store with the store of two and
3228 not merge anything else, because the store of one is
3229 in the original order in between those two, but in
3230 store_by_bitpos order it comes after the last store that
3231 we can't merge with them. We can merge the first 3 stores
3232 and keep the last store as is though. */
18e0c3d1
JJ
3233 unsigned int len = m_store_info.length ();
3234 unsigned int try_order = last_order;
3235 unsigned int first_nonmergeable_order;
3236 unsigned int k;
3237 bool last_iter = false;
3238 int attempts = 0;
3239 do
6cd4c66e 3240 {
18e0c3d1 3241 unsigned int max_order = 0;
bd909071 3242 unsigned int min_order = first_order;
18e0c3d1
JJ
3243 unsigned first_nonmergeable_int_order = ~0U;
3244 unsigned HOST_WIDE_INT this_end = end;
3245 k = i;
3246 first_nonmergeable_order = ~0U;
3247 for (unsigned int j = i + 1; j < len; ++j)
6cd4c66e 3248 {
18e0c3d1
JJ
3249 store_immediate_info *info2 = m_store_info[j];
3250 if (info2->bitpos >= this_end)
3251 break;
3252 if (info2->order < try_order)
6cd4c66e 3253 {
4119cd69
JJ
3254 if (info2->rhs_code != INTEGER_CST
3255 || info2->lp_nr != merged_store->lp_nr)
18e0c3d1
JJ
3256 {
3257 /* Normally check_no_overlap makes sure this
3258 doesn't happen, but if end grows below,
3259 then we need to process more stores than
3260 check_no_overlap verified. Example:
3261 MEM[(int *)p_5] = 0;
3262 MEM[(short *)p_5 + 3B] = 1;
3263 MEM[(char *)p_5 + 4B] = _9;
3264 MEM[(char *)p_5 + 2B] = 2; */
3265 k = 0;
3266 break;
3267 }
3268 k = j;
bd909071 3269 min_order = MIN (min_order, info2->order);
18e0c3d1
JJ
3270 this_end = MAX (this_end,
3271 info2->bitpos + info2->bitsize);
6cd4c66e 3272 }
18e0c3d1 3273 else if (info2->rhs_code == INTEGER_CST
4119cd69 3274 && info2->lp_nr == merged_store->lp_nr
18e0c3d1
JJ
3275 && !last_iter)
3276 {
3277 max_order = MAX (max_order, info2->order + 1);
3278 first_nonmergeable_int_order
3279 = MIN (first_nonmergeable_int_order,
3280 info2->order);
3281 }
3282 else
3283 first_nonmergeable_order
3284 = MIN (first_nonmergeable_order, info2->order);
6cd4c66e 3285 }
bd909071
JJ
3286 if (k > i
3287 && !check_no_overlap (m_store_info, len - 1, true,
3288 min_order, try_order,
3289 merged_store->start, this_end,
3290 first_earlier, end_earlier))
3291 k = 0;
18e0c3d1
JJ
3292 if (k == 0)
3293 {
3294 if (last_order == try_order)
3295 break;
3296 /* If this failed, but only because we grew
3297 try_order, retry with the last working one,
3298 so that we merge at least something. */
3299 try_order = last_order;
3300 last_iter = true;
3301 continue;
3302 }
3303 last_order = try_order;
3304 /* Retry with a larger try_order to see if we could
3305 merge some further INTEGER_CST stores. */
3306 if (max_order
3307 && (first_nonmergeable_int_order
3308 < first_nonmergeable_order))
3309 {
3310 try_order = MIN (max_order,
3311 first_nonmergeable_order);
3312 try_order
3313 = MIN (try_order,
3314 merged_store->first_nonmergeable_order);
3315 if (try_order > last_order && ++attempts < 16)
3316 continue;
3317 }
3318 first_nonmergeable_order
3319 = MIN (first_nonmergeable_order,
3320 first_nonmergeable_int_order);
3321 end = this_end;
3322 break;
6cd4c66e 3323 }
18e0c3d1 3324 while (1);
6cd4c66e
JJ
3325
3326 if (k != 0)
3327 {
3328 merged_store->merge_overlapping (info);
3329
18e0c3d1
JJ
3330 merged_store->first_nonmergeable_order
3331 = MIN (merged_store->first_nonmergeable_order,
3332 first_nonmergeable_order);
3333
6cd4c66e
JJ
3334 for (unsigned int j = i + 1; j <= k; j++)
3335 {
3336 store_immediate_info *info2 = m_store_info[j];
3337 gcc_assert (info2->bitpos < end);
3338 if (info2->order < last_order)
3339 {
3340 gcc_assert (info2->rhs_code == INTEGER_CST);
18e0c3d1
JJ
3341 if (info != info2)
3342 merged_store->merge_overlapping (info2);
6cd4c66e
JJ
3343 }
3344 /* Other stores are kept and not merged in any
3345 way. */
3346 }
3347 ignore = k;
3348 goto done;
3349 }
3350 }
245f6de1 3351 }
f663d9ad 3352 }
245f6de1
JJ
3353 /* |---store 1---||---store 2---|
3354 This store is consecutive to the previous one.
3355 Merge it into the current store group. There can be gaps in between
3356 the stores, but there can't be gaps in between bitregions. */
c94c3532 3357 else if (info->bitregion_start <= merged_store->bitregion_end
7f5a3982 3358 && merged_store->can_be_merged_into (info))
f663d9ad 3359 {
245f6de1
JJ
3360 store_immediate_info *infof = merged_store->stores[0];
3361
3362 /* All the rhs_code ops that take 2 operands are commutative,
3363 swap the operands if it could make the operands compatible. */
3364 if (infof->ops[0].base_addr
3365 && infof->ops[1].base_addr
3366 && info->ops[0].base_addr
3367 && info->ops[1].base_addr
8a91d545
RS
3368 && known_eq (info->ops[1].bitpos - infof->ops[0].bitpos,
3369 info->bitpos - infof->bitpos)
245f6de1
JJ
3370 && operand_equal_p (info->ops[1].base_addr,
3371 infof->ops[0].base_addr, 0))
127ef369
JJ
3372 {
3373 std::swap (info->ops[0], info->ops[1]);
3374 info->ops_swapped_p = true;
3375 }
4d213bf6 3376 if (check_no_overlap (m_store_info, i, false,
bd909071 3377 MIN (merged_store->first_order, info->order),
a7fe6482 3378 MAX (merged_store->last_order, info->order),
bd909071 3379 merged_store->start,
a7fe6482 3380 MAX (merged_store->start + merged_store->width,
bd909071
JJ
3381 info->bitpos + info->bitsize),
3382 first_earlier, end_earlier))
245f6de1 3383 {
7f5a3982
EB
3384 /* Turn MEM_REF into BIT_INSERT_EXPR for bit-field stores. */
3385 if (info->rhs_code == MEM_REF && infof->rhs_code != MEM_REF)
3386 {
3387 info->rhs_code = BIT_INSERT_EXPR;
3388 info->ops[0].val = gimple_assign_rhs1 (info->stmt);
3389 info->ops[0].base_addr = NULL_TREE;
3390 }
3391 else if (infof->rhs_code == MEM_REF && info->rhs_code != MEM_REF)
3392 {
3f207ab3 3393 for (store_immediate_info *infoj : merged_store->stores)
7f5a3982
EB
3394 {
3395 infoj->rhs_code = BIT_INSERT_EXPR;
3396 infoj->ops[0].val = gimple_assign_rhs1 (infoj->stmt);
3397 infoj->ops[0].base_addr = NULL_TREE;
3398 }
e362a897 3399 merged_store->bit_insertion = true;
7f5a3982
EB
3400 }
3401 if ((infof->ops[0].base_addr
3402 ? compatible_load_p (merged_store, info, base_addr, 0)
3403 : !info->ops[0].base_addr)
3404 && (infof->ops[1].base_addr
3405 ? compatible_load_p (merged_store, info, base_addr, 1)
3406 : !info->ops[1].base_addr))
3407 {
3408 merged_store->merge_into (info);
3409 goto done;
3410 }
245f6de1
JJ
3411 }
3412 }
f663d9ad 3413
245f6de1
JJ
3414 /* |---store 1---| <gap> |---store 2---|.
3415 Gap between stores or the rhs not compatible. Start a new group. */
f663d9ad 3416
245f6de1
JJ
3417 /* Try to apply all the stores recorded for the group to determine
3418 the bitpattern they write and discard it if that fails.
3419 This will also reject single-store groups. */
c94c3532 3420 if (merged_store->apply_stores ())
245f6de1 3421 m_merged_store_groups.safe_push (merged_store);
c94c3532
EB
3422 else
3423 delete merged_store;
f663d9ad 3424
245f6de1 3425 merged_store = new merged_store_group (info);
bd909071 3426 end_earlier = i;
c94c3532
EB
3427 if (dump_file && (dump_flags & TDF_DETAILS))
3428 fputs ("New store group\n", dump_file);
3429
3430 done:
3431 if (dump_file && (dump_flags & TDF_DETAILS))
3432 {
3433 fprintf (dump_file, "Store %u:\nbitsize:" HOST_WIDE_INT_PRINT_DEC
3434 " bitpos:" HOST_WIDE_INT_PRINT_DEC " val:",
3435 i, info->bitsize, info->bitpos);
3436 print_generic_expr (dump_file, gimple_assign_rhs1 (info->stmt));
3437 fputc ('\n', dump_file);
3438 }
f663d9ad
KT
3439 }
3440
a62b3dc5 3441 /* Record or discard the last store group. */
4b84d9b8
JJ
3442 if (merged_store)
3443 {
c94c3532 3444 if (merged_store->apply_stores ())
4b84d9b8 3445 m_merged_store_groups.safe_push (merged_store);
c94c3532
EB
3446 else
3447 delete merged_store;
4b84d9b8 3448 }
f663d9ad
KT
3449
3450 gcc_assert (m_merged_store_groups.length () <= m_store_info.length ());
c94c3532 3451
f663d9ad
KT
3452 bool success
3453 = !m_merged_store_groups.is_empty ()
3454 && m_merged_store_groups.length () < m_store_info.length ();
3455
3456 if (success && dump_file)
c94c3532 3457 fprintf (dump_file, "Coalescing successful!\nMerged into %u stores\n",
a62b3dc5 3458 m_merged_store_groups.length ());
f663d9ad
KT
3459
3460 return success;
3461}
3462
245f6de1
JJ
3463/* Return the type to use for the merged stores or loads described by STMTS.
3464 This is needed to get the alias sets right. If IS_LOAD, look for rhs,
3465 otherwise lhs. Additionally set *CLIQUEP and *BASEP to MR_DEPENDENCE_*
3466 of the MEM_REFs if any. */
f663d9ad
KT
3467
3468static tree
245f6de1
JJ
3469get_alias_type_for_stmts (vec<gimple *> &stmts, bool is_load,
3470 unsigned short *cliquep, unsigned short *basep)
f663d9ad
KT
3471{
3472 gimple *stmt;
3473 unsigned int i;
245f6de1
JJ
3474 tree type = NULL_TREE;
3475 tree ret = NULL_TREE;
3476 *cliquep = 0;
3477 *basep = 0;
f663d9ad
KT
3478
3479 FOR_EACH_VEC_ELT (stmts, i, stmt)
3480 {
245f6de1
JJ
3481 tree ref = is_load ? gimple_assign_rhs1 (stmt)
3482 : gimple_assign_lhs (stmt);
3483 tree type1 = reference_alias_ptr_type (ref);
3484 tree base = get_base_address (ref);
f663d9ad 3485
245f6de1
JJ
3486 if (i == 0)
3487 {
3488 if (TREE_CODE (base) == MEM_REF)
3489 {
3490 *cliquep = MR_DEPENDENCE_CLIQUE (base);
3491 *basep = MR_DEPENDENCE_BASE (base);
3492 }
3493 ret = type = type1;
3494 continue;
3495 }
f663d9ad 3496 if (!alias_ptr_types_compatible_p (type, type1))
245f6de1
JJ
3497 ret = ptr_type_node;
3498 if (TREE_CODE (base) != MEM_REF
3499 || *cliquep != MR_DEPENDENCE_CLIQUE (base)
3500 || *basep != MR_DEPENDENCE_BASE (base))
3501 {
3502 *cliquep = 0;
3503 *basep = 0;
3504 }
f663d9ad 3505 }
245f6de1 3506 return ret;
f663d9ad
KT
3507}
3508
3509/* Return the location_t information we can find among the statements
3510 in STMTS. */
3511
3512static location_t
245f6de1 3513get_location_for_stmts (vec<gimple *> &stmts)
f663d9ad 3514{
3f207ab3 3515 for (gimple *stmt : stmts)
f663d9ad
KT
3516 if (gimple_has_location (stmt))
3517 return gimple_location (stmt);
3518
3519 return UNKNOWN_LOCATION;
3520}
3521
3522/* Used to decribe a store resulting from splitting a wide store in smaller
3523 regularly-sized stores in split_group. */
3524
6c1dae73 3525class split_store
f663d9ad 3526{
6c1dae73 3527public:
f663d9ad
KT
3528 unsigned HOST_WIDE_INT bytepos;
3529 unsigned HOST_WIDE_INT size;
3530 unsigned HOST_WIDE_INT align;
245f6de1 3531 auto_vec<store_immediate_info *> orig_stores;
a62b3dc5
JJ
3532 /* True if there is a single orig stmt covering the whole split store. */
3533 bool orig;
f663d9ad
KT
3534 split_store (unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
3535 unsigned HOST_WIDE_INT);
3536};
3537
3538/* Simple constructor. */
3539
3540split_store::split_store (unsigned HOST_WIDE_INT bp,
3541 unsigned HOST_WIDE_INT sz,
3542 unsigned HOST_WIDE_INT al)
a62b3dc5 3543 : bytepos (bp), size (sz), align (al), orig (false)
f663d9ad 3544{
245f6de1 3545 orig_stores.create (0);
f663d9ad
KT
3546}
3547
245f6de1
JJ
3548/* Record all stores in GROUP that write to the region starting at BITPOS and
3549 is of size BITSIZE. Record infos for such statements in STORES if
3550 non-NULL. The stores in GROUP must be sorted by bitposition. Return INFO
5384a802
JJ
3551 if there is exactly one original store in the range (in that case ignore
3552 clobber stmts, unless there are only clobber stmts). */
f663d9ad 3553
a62b3dc5 3554static store_immediate_info *
99b1c316 3555find_constituent_stores (class merged_store_group *group,
245f6de1
JJ
3556 vec<store_immediate_info *> *stores,
3557 unsigned int *first,
3558 unsigned HOST_WIDE_INT bitpos,
3559 unsigned HOST_WIDE_INT bitsize)
f663d9ad 3560{
a62b3dc5 3561 store_immediate_info *info, *ret = NULL;
f663d9ad 3562 unsigned int i;
a62b3dc5
JJ
3563 bool second = false;
3564 bool update_first = true;
f663d9ad 3565 unsigned HOST_WIDE_INT end = bitpos + bitsize;
a62b3dc5 3566 for (i = *first; group->stores.iterate (i, &info); ++i)
f663d9ad
KT
3567 {
3568 unsigned HOST_WIDE_INT stmt_start = info->bitpos;
3569 unsigned HOST_WIDE_INT stmt_end = stmt_start + info->bitsize;
a62b3dc5
JJ
3570 if (stmt_end <= bitpos)
3571 {
3572 /* BITPOS passed to this function never decreases from within the
3573 same split_group call, so optimize and don't scan info records
3574 which are known to end before or at BITPOS next time.
3575 Only do it if all stores before this one also pass this. */
3576 if (update_first)
3577 *first = i + 1;
3578 continue;
3579 }
3580 else
3581 update_first = false;
3582
f663d9ad 3583 /* The stores in GROUP are ordered by bitposition so if we're past
a62b3dc5
JJ
3584 the region for this group return early. */
3585 if (stmt_start >= end)
3586 return ret;
3587
5384a802
JJ
3588 if (gimple_clobber_p (info->stmt))
3589 {
3590 if (stores)
3591 stores->safe_push (info);
3592 if (ret == NULL)
3593 ret = info;
3594 continue;
3595 }
245f6de1 3596 if (stores)
a62b3dc5 3597 {
245f6de1 3598 stores->safe_push (info);
5384a802 3599 if (ret && !gimple_clobber_p (ret->stmt))
a62b3dc5
JJ
3600 {
3601 ret = NULL;
3602 second = true;
3603 }
3604 }
5384a802 3605 else if (ret && !gimple_clobber_p (ret->stmt))
a62b3dc5
JJ
3606 return NULL;
3607 if (!second)
3608 ret = info;
f663d9ad 3609 }
a62b3dc5 3610 return ret;
f663d9ad
KT
3611}
3612
d7a9512e
JJ
3613/* Return how many SSA_NAMEs used to compute value to store in the INFO
3614 store have multiple uses. If any SSA_NAME has multiple uses, also
3615 count statements needed to compute it. */
3616
3617static unsigned
3618count_multiple_uses (store_immediate_info *info)
3619{
3620 gimple *stmt = info->stmt;
3621 unsigned ret = 0;
3622 switch (info->rhs_code)
3623 {
3624 case INTEGER_CST:
e362a897 3625 case STRING_CST:
d7a9512e
JJ
3626 return 0;
3627 case BIT_AND_EXPR:
3628 case BIT_IOR_EXPR:
3629 case BIT_XOR_EXPR:
d60edaba
JJ
3630 if (info->bit_not_p)
3631 {
3632 if (!has_single_use (gimple_assign_rhs1 (stmt)))
3633 ret = 1; /* Fall through below to return
3634 the BIT_NOT_EXPR stmt and then
3635 BIT_{AND,IOR,XOR}_EXPR and anything it
3636 uses. */
3637 else
3638 /* stmt is after this the BIT_NOT_EXPR. */
3639 stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
3640 }
d7a9512e
JJ
3641 if (!has_single_use (gimple_assign_rhs1 (stmt)))
3642 {
3643 ret += 1 + info->ops[0].bit_not_p;
3644 if (info->ops[1].base_addr)
3645 ret += 1 + info->ops[1].bit_not_p;
3646 return ret + 1;
3647 }
3648 stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
3649 /* stmt is now the BIT_*_EXPR. */
3650 if (!has_single_use (gimple_assign_rhs1 (stmt)))
127ef369
JJ
3651 ret += 1 + info->ops[info->ops_swapped_p].bit_not_p;
3652 else if (info->ops[info->ops_swapped_p].bit_not_p)
d7a9512e
JJ
3653 {
3654 gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
3655 if (!has_single_use (gimple_assign_rhs1 (stmt2)))
3656 ++ret;
3657 }
3658 if (info->ops[1].base_addr == NULL_TREE)
127ef369
JJ
3659 {
3660 gcc_checking_assert (!info->ops_swapped_p);
3661 return ret;
3662 }
d7a9512e 3663 if (!has_single_use (gimple_assign_rhs2 (stmt)))
127ef369
JJ
3664 ret += 1 + info->ops[1 - info->ops_swapped_p].bit_not_p;
3665 else if (info->ops[1 - info->ops_swapped_p].bit_not_p)
d7a9512e
JJ
3666 {
3667 gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs2 (stmt));
3668 if (!has_single_use (gimple_assign_rhs1 (stmt2)))
3669 ++ret;
3670 }
3671 return ret;
3672 case MEM_REF:
3673 if (!has_single_use (gimple_assign_rhs1 (stmt)))
3674 return 1 + info->ops[0].bit_not_p;
3675 else if (info->ops[0].bit_not_p)
3676 {
3677 stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
3678 if (!has_single_use (gimple_assign_rhs1 (stmt)))
3679 return 1;
3680 }
3681 return 0;
c94c3532
EB
3682 case BIT_INSERT_EXPR:
3683 return has_single_use (gimple_assign_rhs1 (stmt)) ? 0 : 1;
d7a9512e
JJ
3684 default:
3685 gcc_unreachable ();
3686 }
3687}
3688
f663d9ad 3689/* Split a merged store described by GROUP by populating the SPLIT_STORES
a62b3dc5
JJ
3690 vector (if non-NULL) with split_store structs describing the byte offset
3691 (from the base), the bit size and alignment of each store as well as the
3692 original statements involved in each such split group.
f663d9ad
KT
3693 This is to separate the splitting strategy from the statement
3694 building/emission/linking done in output_merged_store.
a62b3dc5 3695 Return number of new stores.
245f6de1
JJ
3696 If ALLOW_UNALIGNED_STORE is false, then all stores must be aligned.
3697 If ALLOW_UNALIGNED_LOAD is false, then all loads must be aligned.
3afd514b
JJ
3698 BZERO_FIRST may be true only when the first store covers the whole group
3699 and clears it; if BZERO_FIRST is true, keep that first store in the set
3700 unmodified and emit further stores for the overrides only.
a62b3dc5
JJ
3701 If SPLIT_STORES is NULL, it is just a dry run to count number of
3702 new stores. */
f663d9ad 3703
a62b3dc5 3704static unsigned int
245f6de1 3705split_group (merged_store_group *group, bool allow_unaligned_store,
3afd514b 3706 bool allow_unaligned_load, bool bzero_first,
99b1c316 3707 vec<split_store *> *split_stores,
d7a9512e
JJ
3708 unsigned *total_orig,
3709 unsigned *total_new)
f663d9ad 3710{
a62b3dc5
JJ
3711 unsigned HOST_WIDE_INT pos = group->bitregion_start;
3712 unsigned HOST_WIDE_INT size = group->bitregion_end - pos;
f663d9ad 3713 unsigned HOST_WIDE_INT bytepos = pos / BITS_PER_UNIT;
a62b3dc5
JJ
3714 unsigned HOST_WIDE_INT group_align = group->align;
3715 unsigned HOST_WIDE_INT align_base = group->align_base;
245f6de1 3716 unsigned HOST_WIDE_INT group_load_align = group_align;
d7a9512e 3717 bool any_orig = false;
f663d9ad 3718
f663d9ad
KT
3719 gcc_assert ((size % BITS_PER_UNIT == 0) && (pos % BITS_PER_UNIT == 0));
3720
e362a897
EB
3721 /* For bswap framework using sets of stores, all the checking has been done
3722 earlier in try_coalesce_bswap and the result always needs to be emitted
617be7ba 3723 as a single store. Likewise for string concatenation. */
4b84d9b8 3724 if (group->stores[0]->rhs_code == LROTATE_EXPR
e362a897
EB
3725 || group->stores[0]->rhs_code == NOP_EXPR
3726 || group->string_concatenation)
4b84d9b8 3727 {
3afd514b 3728 gcc_assert (!bzero_first);
4b84d9b8
JJ
3729 if (total_orig)
3730 {
3731 /* Avoid the old/new stmt count heuristics. It should be
3732 always beneficial. */
3733 total_new[0] = 1;
3734 total_orig[0] = 2;
3735 }
3736
3737 if (split_stores)
3738 {
3739 unsigned HOST_WIDE_INT align_bitpos
3740 = (group->start - align_base) & (group_align - 1);
3741 unsigned HOST_WIDE_INT align = group_align;
3742 if (align_bitpos)
3743 align = least_bit_hwi (align_bitpos);
3744 bytepos = group->start / BITS_PER_UNIT;
99b1c316 3745 split_store *store
4b84d9b8
JJ
3746 = new split_store (bytepos, group->width, align);
3747 unsigned int first = 0;
3748 find_constituent_stores (group, &store->orig_stores,
3749 &first, group->start, group->width);
3750 split_stores->safe_push (store);
3751 }
3752
3753 return 1;
3754 }
3755
a62b3dc5 3756 unsigned int ret = 0, first = 0;
f663d9ad 3757 unsigned HOST_WIDE_INT try_pos = bytepos;
f663d9ad 3758
d7a9512e
JJ
3759 if (total_orig)
3760 {
3761 unsigned int i;
3762 store_immediate_info *info = group->stores[0];
3763
3764 total_new[0] = 0;
3765 total_orig[0] = 1; /* The orig store. */
3766 info = group->stores[0];
3767 if (info->ops[0].base_addr)
a6fbd154 3768 total_orig[0]++;
d7a9512e 3769 if (info->ops[1].base_addr)
a6fbd154 3770 total_orig[0]++;
d7a9512e
JJ
3771 switch (info->rhs_code)
3772 {
3773 case BIT_AND_EXPR:
3774 case BIT_IOR_EXPR:
3775 case BIT_XOR_EXPR:
3776 total_orig[0]++; /* The orig BIT_*_EXPR stmt. */
3777 break;
3778 default:
3779 break;
3780 }
3781 total_orig[0] *= group->stores.length ();
3782
3783 FOR_EACH_VEC_ELT (group->stores, i, info)
a6fbd154
JJ
3784 {
3785 total_new[0] += count_multiple_uses (info);
3786 total_orig[0] += (info->bit_not_p
3787 + info->ops[0].bit_not_p
3788 + info->ops[1].bit_not_p);
3789 }
d7a9512e
JJ
3790 }
3791
245f6de1
JJ
3792 if (!allow_unaligned_load)
3793 for (int i = 0; i < 2; ++i)
3794 if (group->load_align[i])
3795 group_load_align = MIN (group_load_align, group->load_align[i]);
3796
3afd514b
JJ
3797 if (bzero_first)
3798 {
5384a802
JJ
3799 store_immediate_info *gstore;
3800 FOR_EACH_VEC_ELT (group->stores, first, gstore)
3801 if (!gimple_clobber_p (gstore->stmt))
3802 break;
3803 ++first;
3afd514b
JJ
3804 ret = 1;
3805 if (split_stores)
3806 {
99b1c316 3807 split_store *store
5384a802
JJ
3808 = new split_store (bytepos, gstore->bitsize, align_base);
3809 store->orig_stores.safe_push (gstore);
3afd514b
JJ
3810 store->orig = true;
3811 any_orig = true;
3812 split_stores->safe_push (store);
3813 }
3814 }
3815
f663d9ad
KT
3816 while (size > 0)
3817 {
245f6de1 3818 if ((allow_unaligned_store || group_align <= BITS_PER_UNIT)
3afd514b
JJ
3819 && (group->mask[try_pos - bytepos] == (unsigned char) ~0U
3820 || (bzero_first && group->val[try_pos - bytepos] == 0)))
a62b3dc5
JJ
3821 {
3822 /* Skip padding bytes. */
3823 ++try_pos;
3824 size -= BITS_PER_UNIT;
3825 continue;
3826 }
3827
f663d9ad 3828 unsigned HOST_WIDE_INT try_bitpos = try_pos * BITS_PER_UNIT;
a62b3dc5
JJ
3829 unsigned int try_size = MAX_STORE_BITSIZE, nonmasked;
3830 unsigned HOST_WIDE_INT align_bitpos
3831 = (try_bitpos - align_base) & (group_align - 1);
3832 unsigned HOST_WIDE_INT align = group_align;
5384a802 3833 bool found_orig = false;
a62b3dc5
JJ
3834 if (align_bitpos)
3835 align = least_bit_hwi (align_bitpos);
245f6de1 3836 if (!allow_unaligned_store)
a62b3dc5 3837 try_size = MIN (try_size, align);
245f6de1
JJ
3838 if (!allow_unaligned_load)
3839 {
3840 /* If we can't do or don't want to do unaligned stores
3841 as well as loads, we need to take the loads into account
3842 as well. */
3843 unsigned HOST_WIDE_INT load_align = group_load_align;
3844 align_bitpos = (try_bitpos - align_base) & (load_align - 1);
3845 if (align_bitpos)
3846 load_align = least_bit_hwi (align_bitpos);
3847 for (int i = 0; i < 2; ++i)
3848 if (group->load_align[i])
3849 {
8a91d545
RS
3850 align_bitpos
3851 = known_alignment (try_bitpos
3852 - group->stores[0]->bitpos
3853 + group->stores[0]->ops[i].bitpos
3854 - group->load_align_base[i]);
3855 if (align_bitpos & (group_load_align - 1))
245f6de1
JJ
3856 {
3857 unsigned HOST_WIDE_INT a = least_bit_hwi (align_bitpos);
3858 load_align = MIN (load_align, a);
3859 }
3860 }
3861 try_size = MIN (try_size, load_align);
3862 }
a62b3dc5 3863 store_immediate_info *info
245f6de1 3864 = find_constituent_stores (group, NULL, &first, try_bitpos, try_size);
5384a802 3865 if (info && !gimple_clobber_p (info->stmt))
a62b3dc5
JJ
3866 {
3867 /* If there is just one original statement for the range, see if
3868 we can just reuse the original store which could be even larger
3869 than try_size. */
3870 unsigned HOST_WIDE_INT stmt_end
3871 = ROUND_UP (info->bitpos + info->bitsize, BITS_PER_UNIT);
245f6de1
JJ
3872 info = find_constituent_stores (group, NULL, &first, try_bitpos,
3873 stmt_end - try_bitpos);
a62b3dc5
JJ
3874 if (info && info->bitpos >= try_bitpos)
3875 {
5384a802
JJ
3876 store_immediate_info *info2 = NULL;
3877 unsigned int first_copy = first;
3878 if (info->bitpos > try_bitpos
3879 && stmt_end - try_bitpos <= try_size)
3880 {
3881 info2 = find_constituent_stores (group, NULL, &first_copy,
3882 try_bitpos,
3883 info->bitpos - try_bitpos);
3884 gcc_assert (info2 == NULL || gimple_clobber_p (info2->stmt));
3885 }
3886 if (info2 == NULL && stmt_end - try_bitpos < try_size)
3887 {
3888 info2 = find_constituent_stores (group, NULL, &first_copy,
3889 stmt_end,
3890 (try_bitpos + try_size)
3891 - stmt_end);
3892 gcc_assert (info2 == NULL || gimple_clobber_p (info2->stmt));
3893 }
3894 if (info2 == NULL)
3895 {
3896 try_size = stmt_end - try_bitpos;
3897 found_orig = true;
3898 goto found;
3899 }
a62b3dc5
JJ
3900 }
3901 }
f663d9ad 3902
a62b3dc5
JJ
3903 /* Approximate store bitsize for the case when there are no padding
3904 bits. */
3905 while (try_size > size)
3906 try_size /= 2;
3907 /* Now look for whole padding bytes at the end of that bitsize. */
3908 for (nonmasked = try_size / BITS_PER_UNIT; nonmasked > 0; --nonmasked)
3909 if (group->mask[try_pos - bytepos + nonmasked - 1]
3afd514b
JJ
3910 != (unsigned char) ~0U
3911 && (!bzero_first
3912 || group->val[try_pos - bytepos + nonmasked - 1] != 0))
a62b3dc5 3913 break;
5384a802 3914 if (nonmasked == 0 || (info && gimple_clobber_p (info->stmt)))
a62b3dc5
JJ
3915 {
3916 /* If entire try_size range is padding, skip it. */
3917 try_pos += try_size / BITS_PER_UNIT;
3918 size -= try_size;
3919 continue;
3920 }
3921 /* Otherwise try to decrease try_size if second half, last 3 quarters
3922 etc. are padding. */
3923 nonmasked *= BITS_PER_UNIT;
3924 while (nonmasked <= try_size / 2)
3925 try_size /= 2;
245f6de1 3926 if (!allow_unaligned_store && group_align > BITS_PER_UNIT)
a62b3dc5
JJ
3927 {
3928 /* Now look for whole padding bytes at the start of that bitsize. */
3929 unsigned int try_bytesize = try_size / BITS_PER_UNIT, masked;
3930 for (masked = 0; masked < try_bytesize; ++masked)
3afd514b
JJ
3931 if (group->mask[try_pos - bytepos + masked] != (unsigned char) ~0U
3932 && (!bzero_first
3933 || group->val[try_pos - bytepos + masked] != 0))
a62b3dc5
JJ
3934 break;
3935 masked *= BITS_PER_UNIT;
3936 gcc_assert (masked < try_size);
3937 if (masked >= try_size / 2)
3938 {
3939 while (masked >= try_size / 2)
3940 {
3941 try_size /= 2;
3942 try_pos += try_size / BITS_PER_UNIT;
3943 size -= try_size;
3944 masked -= try_size;
3945 }
3946 /* Need to recompute the alignment, so just retry at the new
3947 position. */
3948 continue;
3949 }
3950 }
3951
3952 found:
3953 ++ret;
f663d9ad 3954
a62b3dc5
JJ
3955 if (split_stores)
3956 {
99b1c316 3957 split_store *store
a62b3dc5 3958 = new split_store (try_pos, try_size, align);
245f6de1
JJ
3959 info = find_constituent_stores (group, &store->orig_stores,
3960 &first, try_bitpos, try_size);
a62b3dc5 3961 if (info
5384a802 3962 && !gimple_clobber_p (info->stmt)
a62b3dc5 3963 && info->bitpos >= try_bitpos
5384a802
JJ
3964 && info->bitpos + info->bitsize <= try_bitpos + try_size
3965 && (store->orig_stores.length () == 1
3966 || found_orig
3967 || (info->bitpos == try_bitpos
3968 && (info->bitpos + info->bitsize
3969 == try_bitpos + try_size))))
d7a9512e
JJ
3970 {
3971 store->orig = true;
3972 any_orig = true;
3973 }
a62b3dc5
JJ
3974 split_stores->safe_push (store);
3975 }
3976
3977 try_pos += try_size / BITS_PER_UNIT;
f663d9ad 3978 size -= try_size;
f663d9ad 3979 }
a62b3dc5 3980
d7a9512e
JJ
3981 if (total_orig)
3982 {
a6fbd154 3983 unsigned int i;
99b1c316 3984 split_store *store;
d7a9512e
JJ
3985 /* If we are reusing some original stores and any of the
3986 original SSA_NAMEs had multiple uses, we need to subtract
3987 those now before we add the new ones. */
3988 if (total_new[0] && any_orig)
3989 {
d7a9512e
JJ
3990 FOR_EACH_VEC_ELT (*split_stores, i, store)
3991 if (store->orig)
3992 total_new[0] -= count_multiple_uses (store->orig_stores[0]);
3993 }
3994 total_new[0] += ret; /* The new store. */
3995 store_immediate_info *info = group->stores[0];
3996 if (info->ops[0].base_addr)
a6fbd154 3997 total_new[0] += ret;
d7a9512e 3998 if (info->ops[1].base_addr)
a6fbd154 3999 total_new[0] += ret;
d7a9512e
JJ
4000 switch (info->rhs_code)
4001 {
4002 case BIT_AND_EXPR:
4003 case BIT_IOR_EXPR:
4004 case BIT_XOR_EXPR:
4005 total_new[0] += ret; /* The new BIT_*_EXPR stmt. */
4006 break;
4007 default:
4008 break;
4009 }
a6fbd154
JJ
4010 FOR_EACH_VEC_ELT (*split_stores, i, store)
4011 {
4012 unsigned int j;
4013 bool bit_not_p[3] = { false, false, false };
4014 /* If all orig_stores have certain bit_not_p set, then
4015 we'd use a BIT_NOT_EXPR stmt and need to account for it.
4016 If some orig_stores have certain bit_not_p set, then
4017 we'd use a BIT_XOR_EXPR with a mask and need to account for
4018 it. */
4019 FOR_EACH_VEC_ELT (store->orig_stores, j, info)
4020 {
4021 if (info->ops[0].bit_not_p)
4022 bit_not_p[0] = true;
4023 if (info->ops[1].bit_not_p)
4024 bit_not_p[1] = true;
4025 if (info->bit_not_p)
4026 bit_not_p[2] = true;
4027 }
4028 total_new[0] += bit_not_p[0] + bit_not_p[1] + bit_not_p[2];
4029 }
4030
d7a9512e
JJ
4031 }
4032
a62b3dc5 4033 return ret;
f663d9ad
KT
4034}
4035
a6fbd154
JJ
4036/* Return the operation through which the operand IDX (if < 2) or
4037 result (IDX == 2) should be inverted. If NOP_EXPR, no inversion
4038 is done, if BIT_NOT_EXPR, all bits are inverted, if BIT_XOR_EXPR,
4039 the bits should be xored with mask. */
4040
4041static enum tree_code
4042invert_op (split_store *split_store, int idx, tree int_type, tree &mask)
4043{
4044 unsigned int i;
4045 store_immediate_info *info;
4046 unsigned int cnt = 0;
e215422f 4047 bool any_paddings = false;
a6fbd154
JJ
4048 FOR_EACH_VEC_ELT (split_store->orig_stores, i, info)
4049 {
4050 bool bit_not_p = idx < 2 ? info->ops[idx].bit_not_p : info->bit_not_p;
4051 if (bit_not_p)
e215422f
JJ
4052 {
4053 ++cnt;
4054 tree lhs = gimple_assign_lhs (info->stmt);
4055 if (INTEGRAL_TYPE_P (TREE_TYPE (lhs))
4056 && TYPE_PRECISION (TREE_TYPE (lhs)) < info->bitsize)
4057 any_paddings = true;
4058 }
a6fbd154
JJ
4059 }
4060 mask = NULL_TREE;
4061 if (cnt == 0)
4062 return NOP_EXPR;
e215422f 4063 if (cnt == split_store->orig_stores.length () && !any_paddings)
a6fbd154
JJ
4064 return BIT_NOT_EXPR;
4065
4066 unsigned HOST_WIDE_INT try_bitpos = split_store->bytepos * BITS_PER_UNIT;
4067 unsigned buf_size = split_store->size / BITS_PER_UNIT;
4068 unsigned char *buf
4069 = XALLOCAVEC (unsigned char, buf_size);
4070 memset (buf, ~0U, buf_size);
4071 FOR_EACH_VEC_ELT (split_store->orig_stores, i, info)
4072 {
4073 bool bit_not_p = idx < 2 ? info->ops[idx].bit_not_p : info->bit_not_p;
4074 if (!bit_not_p)
4075 continue;
4076 /* Clear regions with bit_not_p and invert afterwards, rather than
4077 clear regions with !bit_not_p, so that gaps in between stores aren't
4078 set in the mask. */
4079 unsigned HOST_WIDE_INT bitsize = info->bitsize;
e215422f 4080 unsigned HOST_WIDE_INT prec = bitsize;
a6fbd154 4081 unsigned int pos_in_buffer = 0;
e215422f
JJ
4082 if (any_paddings)
4083 {
4084 tree lhs = gimple_assign_lhs (info->stmt);
4085 if (INTEGRAL_TYPE_P (TREE_TYPE (lhs))
4086 && TYPE_PRECISION (TREE_TYPE (lhs)) < bitsize)
4087 prec = TYPE_PRECISION (TREE_TYPE (lhs));
4088 }
a6fbd154
JJ
4089 if (info->bitpos < try_bitpos)
4090 {
4091 gcc_assert (info->bitpos + bitsize > try_bitpos);
e215422f
JJ
4092 if (!BYTES_BIG_ENDIAN)
4093 {
4094 if (prec <= try_bitpos - info->bitpos)
4095 continue;
4096 prec -= try_bitpos - info->bitpos;
4097 }
4098 bitsize -= try_bitpos - info->bitpos;
4099 if (BYTES_BIG_ENDIAN && prec > bitsize)
4100 prec = bitsize;
a6fbd154
JJ
4101 }
4102 else
4103 pos_in_buffer = info->bitpos - try_bitpos;
e215422f
JJ
4104 if (prec < bitsize)
4105 {
4106 /* If this is a bool inversion, invert just the least significant
4107 prec bits rather than all bits of it. */
4108 if (BYTES_BIG_ENDIAN)
4109 {
4110 pos_in_buffer += bitsize - prec;
4111 if (pos_in_buffer >= split_store->size)
4112 continue;
4113 }
4114 bitsize = prec;
4115 }
a6fbd154
JJ
4116 if (pos_in_buffer + bitsize > split_store->size)
4117 bitsize = split_store->size - pos_in_buffer;
4118 unsigned char *p = buf + (pos_in_buffer / BITS_PER_UNIT);
4119 if (BYTES_BIG_ENDIAN)
4120 clear_bit_region_be (p, (BITS_PER_UNIT - 1
4121 - (pos_in_buffer % BITS_PER_UNIT)), bitsize);
4122 else
4123 clear_bit_region (p, pos_in_buffer % BITS_PER_UNIT, bitsize);
4124 }
4125 for (unsigned int i = 0; i < buf_size; ++i)
4126 buf[i] = ~buf[i];
4127 mask = native_interpret_expr (int_type, buf, buf_size);
4128 return BIT_XOR_EXPR;
4129}
4130
f663d9ad
KT
4131/* Given a merged store group GROUP output the widened version of it.
4132 The store chain is against the base object BASE.
4133 Try store sizes of at most MAX_STORE_BITSIZE bits wide and don't output
4134 unaligned stores for STRICT_ALIGNMENT targets or if it's too expensive.
4135 Make sure that the number of statements output is less than the number of
4136 original statements. If a better sequence is possible emit it and
4137 return true. */
4138
4139bool
b5926e23 4140imm_store_chain_info::output_merged_store (merged_store_group *group)
f663d9ad 4141{
e362a897 4142 const unsigned HOST_WIDE_INT start_byte_pos
a62b3dc5 4143 = group->bitregion_start / BITS_PER_UNIT;
f663d9ad
KT
4144 unsigned int orig_num_stmts = group->stores.length ();
4145 if (orig_num_stmts < 2)
4146 return false;
4147
245f6de1 4148 bool allow_unaligned_store
028d4092 4149 = !STRICT_ALIGNMENT && param_store_merging_allow_unaligned;
245f6de1 4150 bool allow_unaligned_load = allow_unaligned_store;
3afd514b 4151 bool bzero_first = false;
5384a802
JJ
4152 store_immediate_info *store;
4153 unsigned int num_clobber_stmts = 0;
4154 if (group->stores[0]->rhs_code == INTEGER_CST)
4155 {
e362a897 4156 unsigned int i;
5384a802
JJ
4157 FOR_EACH_VEC_ELT (group->stores, i, store)
4158 if (gimple_clobber_p (store->stmt))
4159 num_clobber_stmts++;
4160 else if (TREE_CODE (gimple_assign_rhs1 (store->stmt)) == CONSTRUCTOR
4161 && CONSTRUCTOR_NELTS (gimple_assign_rhs1 (store->stmt)) == 0
4162 && group->start == store->bitpos
4163 && group->width == store->bitsize
4164 && (group->start % BITS_PER_UNIT) == 0
4165 && (group->width % BITS_PER_UNIT) == 0)
4166 {
4167 bzero_first = true;
4168 break;
4169 }
4170 else
4171 break;
4172 FOR_EACH_VEC_ELT_FROM (group->stores, i, store, i)
4173 if (gimple_clobber_p (store->stmt))
4174 num_clobber_stmts++;
4175 if (num_clobber_stmts == orig_num_stmts)
4176 return false;
4177 orig_num_stmts -= num_clobber_stmts;
4178 }
3afd514b 4179 if (allow_unaligned_store || bzero_first)
a62b3dc5
JJ
4180 {
4181 /* If unaligned stores are allowed, see how many stores we'd emit
4182 for unaligned and how many stores we'd emit for aligned stores.
3afd514b
JJ
4183 Only use unaligned stores if it allows fewer stores than aligned.
4184 Similarly, if there is a whole region clear first, prefer expanding
4185 it together compared to expanding clear first followed by merged
4186 further stores. */
21f65995 4187 unsigned cnt[4] = { ~0U, ~0U, ~0U, ~0U };
3afd514b
JJ
4188 int pass_min = 0;
4189 for (int pass = 0; pass < 4; ++pass)
4190 {
4191 if (!allow_unaligned_store && (pass & 1) != 0)
4192 continue;
4193 if (!bzero_first && (pass & 2) != 0)
4194 continue;
4195 cnt[pass] = split_group (group, (pass & 1) != 0,
4196 allow_unaligned_load, (pass & 2) != 0,
4197 NULL, NULL, NULL);
4198 if (cnt[pass] < cnt[pass_min])
4199 pass_min = pass;
4200 }
4201 if ((pass_min & 1) == 0)
245f6de1 4202 allow_unaligned_store = false;
3afd514b
JJ
4203 if ((pass_min & 2) == 0)
4204 bzero_first = false;
a62b3dc5 4205 }
e362a897
EB
4206
4207 auto_vec<class split_store *, 32> split_stores;
4208 split_store *split_store;
4209 unsigned total_orig, total_new, i;
3afd514b 4210 split_group (group, allow_unaligned_store, allow_unaligned_load, bzero_first,
d7a9512e 4211 &split_stores, &total_orig, &total_new);
a62b3dc5 4212
5384a802
JJ
4213 /* Determine if there is a clobber covering the whole group at the start,
4214 followed by proposed split stores that cover the whole group. In that
4215 case, prefer the transformation even if
4216 split_stores.length () == orig_num_stmts. */
4217 bool clobber_first = false;
4218 if (num_clobber_stmts
4219 && gimple_clobber_p (group->stores[0]->stmt)
4220 && group->start == group->stores[0]->bitpos
4221 && group->width == group->stores[0]->bitsize
4222 && (group->start % BITS_PER_UNIT) == 0
4223 && (group->width % BITS_PER_UNIT) == 0)
4224 {
4225 clobber_first = true;
4226 unsigned HOST_WIDE_INT pos = group->start / BITS_PER_UNIT;
4227 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4228 if (split_store->bytepos != pos)
4229 {
4230 clobber_first = false;
4231 break;
4232 }
4233 else
4234 pos += split_store->size / BITS_PER_UNIT;
4235 if (pos != (group->start + group->width) / BITS_PER_UNIT)
4236 clobber_first = false;
4237 }
4238
4239 if (split_stores.length () >= orig_num_stmts + clobber_first)
a62b3dc5 4240 {
5384a802 4241
a62b3dc5
JJ
4242 /* We didn't manage to reduce the number of statements. Bail out. */
4243 if (dump_file && (dump_flags & TDF_DETAILS))
d7a9512e
JJ
4244 fprintf (dump_file, "Exceeded original number of stmts (%u)."
4245 " Not profitable to emit new sequence.\n",
4246 orig_num_stmts);
dd172744
RB
4247 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4248 delete split_store;
a62b3dc5
JJ
4249 return false;
4250 }
d7a9512e
JJ
4251 if (total_orig <= total_new)
4252 {
4253 /* If number of estimated new statements is above estimated original
4254 statements, bail out too. */
4255 if (dump_file && (dump_flags & TDF_DETAILS))
4256 fprintf (dump_file, "Estimated number of original stmts (%u)"
4257 " not larger than estimated number of new"
4258 " stmts (%u).\n",
4259 total_orig, total_new);
dd172744
RB
4260 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4261 delete split_store;
4b84d9b8 4262 return false;
d7a9512e 4263 }
5384a802
JJ
4264 if (group->stores[0]->rhs_code == INTEGER_CST)
4265 {
4266 bool all_orig = true;
4267 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4268 if (!split_store->orig)
4269 {
4270 all_orig = false;
4271 break;
4272 }
4273 if (all_orig)
4274 {
4275 unsigned int cnt = split_stores.length ();
4276 store_immediate_info *store;
4277 FOR_EACH_VEC_ELT (group->stores, i, store)
4278 if (gimple_clobber_p (store->stmt))
4279 ++cnt;
4280 /* Punt if we wouldn't make any real changes, i.e. keep all
4281 orig stmts + all clobbers. */
4282 if (cnt == group->stores.length ())
4283 {
4284 if (dump_file && (dump_flags & TDF_DETAILS))
4285 fprintf (dump_file, "Exceeded original number of stmts (%u)."
4286 " Not profitable to emit new sequence.\n",
4287 orig_num_stmts);
4288 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4289 delete split_store;
4290 return false;
4291 }
4292 }
4293 }
f663d9ad
KT
4294
4295 gimple_stmt_iterator last_gsi = gsi_for_stmt (group->last_stmt);
4296 gimple_seq seq = NULL;
f663d9ad
KT
4297 tree last_vdef, new_vuse;
4298 last_vdef = gimple_vdef (group->last_stmt);
4299 new_vuse = gimple_vuse (group->last_stmt);
4b84d9b8
JJ
4300 tree bswap_res = NULL_TREE;
4301
5384a802
JJ
4302 /* Clobbers are not removed. */
4303 if (gimple_clobber_p (group->last_stmt))
4304 {
4305 new_vuse = make_ssa_name (gimple_vop (cfun), group->last_stmt);
4306 gimple_set_vdef (group->last_stmt, new_vuse);
4307 }
4308
4b84d9b8
JJ
4309 if (group->stores[0]->rhs_code == LROTATE_EXPR
4310 || group->stores[0]->rhs_code == NOP_EXPR)
4311 {
4312 tree fndecl = NULL_TREE, bswap_type = NULL_TREE, load_type;
4313 gimple *ins_stmt = group->stores[0]->ins_stmt;
4314 struct symbolic_number *n = &group->stores[0]->n;
4315 bool bswap = group->stores[0]->rhs_code == LROTATE_EXPR;
4316
4317 switch (n->range)
4318 {
4319 case 16:
4320 load_type = bswap_type = uint16_type_node;
4321 break;
4322 case 32:
4323 load_type = uint32_type_node;
4324 if (bswap)
4325 {
4326 fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32);
4327 bswap_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
4328 }
4329 break;
4330 case 64:
4331 load_type = uint64_type_node;
4332 if (bswap)
4333 {
4334 fndecl = builtin_decl_explicit (BUILT_IN_BSWAP64);
4335 bswap_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
4336 }
4337 break;
4338 default:
4339 gcc_unreachable ();
4340 }
4341
4342 /* If the loads have each vuse of the corresponding store,
4343 we've checked the aliasing already in try_coalesce_bswap and
4344 we want to sink the need load into seq. So need to use new_vuse
4345 on the load. */
30fa8e9c 4346 if (n->base_addr)
4b84d9b8 4347 {
30fa8e9c
JJ
4348 if (n->vuse == NULL)
4349 {
4350 n->vuse = new_vuse;
4351 ins_stmt = NULL;
4352 }
4353 else
4354 /* Update vuse in case it has changed by output_merged_stores. */
4355 n->vuse = gimple_vuse (ins_stmt);
4b84d9b8
JJ
4356 }
4357 bswap_res = bswap_replace (gsi_start (seq), ins_stmt, fndecl,
b320edc0 4358 bswap_type, load_type, n, bswap,
d8545fb2 4359 ~(uint64_t) 0, 0);
4b84d9b8
JJ
4360 gcc_assert (bswap_res);
4361 }
f663d9ad
KT
4362
4363 gimple *stmt = NULL;
245f6de1 4364 auto_vec<gimple *, 32> orig_stmts;
4b84d9b8
JJ
4365 gimple_seq this_seq;
4366 tree addr = force_gimple_operand_1 (unshare_expr (base_addr), &this_seq,
aa55dc0c 4367 is_gimple_mem_ref_addr, NULL_TREE);
4b84d9b8 4368 gimple_seq_add_seq_without_update (&seq, this_seq);
245f6de1
JJ
4369
4370 tree load_addr[2] = { NULL_TREE, NULL_TREE };
4371 gimple_seq load_seq[2] = { NULL, NULL };
4372 gimple_stmt_iterator load_gsi[2] = { gsi_none (), gsi_none () };
4373 for (int j = 0; j < 2; ++j)
4374 {
4375 store_operand_info &op = group->stores[0]->ops[j];
4376 if (op.base_addr == NULL_TREE)
4377 continue;
4378
4379 store_immediate_info *infol = group->stores.last ();
4380 if (gimple_vuse (op.stmt) == gimple_vuse (infol->ops[j].stmt))
4381 {
97031af7
JJ
4382 /* We can't pick the location randomly; while we've verified
4383 all the loads have the same vuse, they can be still in different
4384 basic blocks and we need to pick the one from the last bb:
4385 int x = q[0];
4386 if (x == N) return;
4387 int y = q[1];
4388 p[0] = x;
4389 p[1] = y;
4390 otherwise if we put the wider load at the q[0] load, we might
4391 segfault if q[1] is not mapped. */
4392 basic_block bb = gimple_bb (op.stmt);
4393 gimple *ostmt = op.stmt;
4394 store_immediate_info *info;
4395 FOR_EACH_VEC_ELT (group->stores, i, info)
4396 {
4397 gimple *tstmt = info->ops[j].stmt;
4398 basic_block tbb = gimple_bb (tstmt);
4399 if (dominated_by_p (CDI_DOMINATORS, tbb, bb))
4400 {
4401 ostmt = tstmt;
4402 bb = tbb;
4403 }
4404 }
4405 load_gsi[j] = gsi_for_stmt (ostmt);
245f6de1
JJ
4406 load_addr[j]
4407 = force_gimple_operand_1 (unshare_expr (op.base_addr),
4408 &load_seq[j], is_gimple_mem_ref_addr,
4409 NULL_TREE);
4410 }
4411 else if (operand_equal_p (base_addr, op.base_addr, 0))
4412 load_addr[j] = addr;
4413 else
3e2927a1 4414 {
3e2927a1
JJ
4415 load_addr[j]
4416 = force_gimple_operand_1 (unshare_expr (op.base_addr),
4417 &this_seq, is_gimple_mem_ref_addr,
4418 NULL_TREE);
4419 gimple_seq_add_seq_without_update (&seq, this_seq);
4420 }
245f6de1
JJ
4421 }
4422
f663d9ad
KT
4423 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4424 {
e362a897
EB
4425 const unsigned HOST_WIDE_INT try_size = split_store->size;
4426 const unsigned HOST_WIDE_INT try_pos = split_store->bytepos;
4427 const unsigned HOST_WIDE_INT try_bitpos = try_pos * BITS_PER_UNIT;
4428 const unsigned HOST_WIDE_INT try_align = split_store->align;
4429 const unsigned HOST_WIDE_INT try_offset = try_pos - start_byte_pos;
a62b3dc5
JJ
4430 tree dest, src;
4431 location_t loc;
e362a897 4432
a62b3dc5
JJ
4433 if (split_store->orig)
4434 {
5384a802
JJ
4435 /* If there is just a single non-clobber constituent store
4436 which covers the whole area, just reuse the lhs and rhs. */
4437 gimple *orig_stmt = NULL;
4438 store_immediate_info *store;
4439 unsigned int j;
4440 FOR_EACH_VEC_ELT (split_store->orig_stores, j, store)
4441 if (!gimple_clobber_p (store->stmt))
4442 {
4443 orig_stmt = store->stmt;
4444 break;
4445 }
245f6de1
JJ
4446 dest = gimple_assign_lhs (orig_stmt);
4447 src = gimple_assign_rhs1 (orig_stmt);
4448 loc = gimple_location (orig_stmt);
a62b3dc5
JJ
4449 }
4450 else
4451 {
245f6de1
JJ
4452 store_immediate_info *info;
4453 unsigned short clique, base;
4454 unsigned int k;
4455 FOR_EACH_VEC_ELT (split_store->orig_stores, k, info)
4456 orig_stmts.safe_push (info->stmt);
a62b3dc5 4457 tree offset_type
245f6de1 4458 = get_alias_type_for_stmts (orig_stmts, false, &clique, &base);
e362a897 4459 tree dest_type;
245f6de1
JJ
4460 loc = get_location_for_stmts (orig_stmts);
4461 orig_stmts.truncate (0);
a62b3dc5 4462
e362a897
EB
4463 if (group->string_concatenation)
4464 dest_type
4465 = build_array_type_nelts (char_type_node,
4466 try_size / BITS_PER_UNIT);
4467 else
4468 {
4469 dest_type = build_nonstandard_integer_type (try_size, UNSIGNED);
4470 dest_type = build_aligned_type (dest_type, try_align);
4471 }
4472 dest = fold_build2 (MEM_REF, dest_type, addr,
a62b3dc5 4473 build_int_cst (offset_type, try_pos));
245f6de1
JJ
4474 if (TREE_CODE (dest) == MEM_REF)
4475 {
4476 MR_DEPENDENCE_CLIQUE (dest) = clique;
4477 MR_DEPENDENCE_BASE (dest) = base;
4478 }
4479
c94c3532 4480 tree mask;
e362a897 4481 if (bswap_res || group->string_concatenation)
c94c3532
EB
4482 mask = integer_zero_node;
4483 else
e362a897
EB
4484 mask = native_interpret_expr (dest_type,
4485 group->mask + try_offset,
4b84d9b8 4486 group->buf_size);
245f6de1
JJ
4487
4488 tree ops[2];
4489 for (int j = 0;
4490 j < 1 + (split_store->orig_stores[0]->ops[1].val != NULL_TREE);
4491 ++j)
4492 {
4493 store_operand_info &op = split_store->orig_stores[0]->ops[j];
4b84d9b8
JJ
4494 if (bswap_res)
4495 ops[j] = bswap_res;
e362a897
EB
4496 else if (group->string_concatenation)
4497 {
4498 ops[j] = build_string (try_size / BITS_PER_UNIT,
4499 (const char *) group->val + try_offset);
4500 TREE_TYPE (ops[j]) = dest_type;
4501 }
4b84d9b8 4502 else if (op.base_addr)
245f6de1
JJ
4503 {
4504 FOR_EACH_VEC_ELT (split_store->orig_stores, k, info)
4505 orig_stmts.safe_push (info->ops[j].stmt);
4506
4507 offset_type = get_alias_type_for_stmts (orig_stmts, true,
4508 &clique, &base);
4509 location_t load_loc = get_location_for_stmts (orig_stmts);
4510 orig_stmts.truncate (0);
4511
4512 unsigned HOST_WIDE_INT load_align = group->load_align[j];
4513 unsigned HOST_WIDE_INT align_bitpos
c94c3532 4514 = known_alignment (try_bitpos
8a91d545
RS
4515 - split_store->orig_stores[0]->bitpos
4516 + op.bitpos);
4517 if (align_bitpos & (load_align - 1))
245f6de1
JJ
4518 load_align = least_bit_hwi (align_bitpos);
4519
4520 tree load_int_type
4521 = build_nonstandard_integer_type (try_size, UNSIGNED);
4522 load_int_type
4523 = build_aligned_type (load_int_type, load_align);
4524
8a91d545 4525 poly_uint64 load_pos
c94c3532 4526 = exact_div (try_bitpos
8a91d545
RS
4527 - split_store->orig_stores[0]->bitpos
4528 + op.bitpos,
4529 BITS_PER_UNIT);
245f6de1
JJ
4530 ops[j] = fold_build2 (MEM_REF, load_int_type, load_addr[j],
4531 build_int_cst (offset_type, load_pos));
4532 if (TREE_CODE (ops[j]) == MEM_REF)
4533 {
4534 MR_DEPENDENCE_CLIQUE (ops[j]) = clique;
4535 MR_DEPENDENCE_BASE (ops[j]) = base;
4536 }
4537 if (!integer_zerop (mask))
e9e2bad7
MS
4538 {
4539 /* The load might load some bits (that will be masked
4540 off later on) uninitialized, avoid -W*uninitialized
4541 warnings in that case. */
4542 suppress_warning (ops[j], OPT_Wuninitialized);
4543 }
245f6de1 4544
e362a897 4545 stmt = gimple_build_assign (make_ssa_name (dest_type), ops[j]);
245f6de1
JJ
4546 gimple_set_location (stmt, load_loc);
4547 if (gsi_bb (load_gsi[j]))
4548 {
4549 gimple_set_vuse (stmt, gimple_vuse (op.stmt));
4550 gimple_seq_add_stmt_without_update (&load_seq[j], stmt);
4551 }
4552 else
4553 {
4554 gimple_set_vuse (stmt, new_vuse);
4555 gimple_seq_add_stmt_without_update (&seq, stmt);
4556 }
4557 ops[j] = gimple_assign_lhs (stmt);
a6fbd154
JJ
4558 tree xor_mask;
4559 enum tree_code inv_op
e362a897 4560 = invert_op (split_store, j, dest_type, xor_mask);
a6fbd154 4561 if (inv_op != NOP_EXPR)
383ac8dc 4562 {
e362a897 4563 stmt = gimple_build_assign (make_ssa_name (dest_type),
a6fbd154 4564 inv_op, ops[j], xor_mask);
383ac8dc
JJ
4565 gimple_set_location (stmt, load_loc);
4566 ops[j] = gimple_assign_lhs (stmt);
4567
4568 if (gsi_bb (load_gsi[j]))
4569 gimple_seq_add_stmt_without_update (&load_seq[j],
4570 stmt);
4571 else
4572 gimple_seq_add_stmt_without_update (&seq, stmt);
4573 }
245f6de1
JJ
4574 }
4575 else
e362a897
EB
4576 ops[j] = native_interpret_expr (dest_type,
4577 group->val + try_offset,
245f6de1
JJ
4578 group->buf_size);
4579 }
4580
4581 switch (split_store->orig_stores[0]->rhs_code)
4582 {
4583 case BIT_AND_EXPR:
4584 case BIT_IOR_EXPR:
4585 case BIT_XOR_EXPR:
4586 FOR_EACH_VEC_ELT (split_store->orig_stores, k, info)
4587 {
4588 tree rhs1 = gimple_assign_rhs1 (info->stmt);
4589 orig_stmts.safe_push (SSA_NAME_DEF_STMT (rhs1));
4590 }
4591 location_t bit_loc;
4592 bit_loc = get_location_for_stmts (orig_stmts);
4593 orig_stmts.truncate (0);
4594
4595 stmt
e362a897 4596 = gimple_build_assign (make_ssa_name (dest_type),
245f6de1
JJ
4597 split_store->orig_stores[0]->rhs_code,
4598 ops[0], ops[1]);
4599 gimple_set_location (stmt, bit_loc);
4600 /* If there is just one load and there is a separate
4601 load_seq[0], emit the bitwise op right after it. */
4602 if (load_addr[1] == NULL_TREE && gsi_bb (load_gsi[0]))
4603 gimple_seq_add_stmt_without_update (&load_seq[0], stmt);
4604 /* Otherwise, if at least one load is in seq, we need to
4605 emit the bitwise op right before the store. If there
4606 are two loads and are emitted somewhere else, it would
4607 be better to emit the bitwise op as early as possible;
4608 we don't track where that would be possible right now
4609 though. */
4610 else
4611 gimple_seq_add_stmt_without_update (&seq, stmt);
4612 src = gimple_assign_lhs (stmt);
a6fbd154
JJ
4613 tree xor_mask;
4614 enum tree_code inv_op;
e362a897 4615 inv_op = invert_op (split_store, 2, dest_type, xor_mask);
a6fbd154 4616 if (inv_op != NOP_EXPR)
d60edaba 4617 {
e362a897 4618 stmt = gimple_build_assign (make_ssa_name (dest_type),
a6fbd154 4619 inv_op, src, xor_mask);
d60edaba
JJ
4620 gimple_set_location (stmt, bit_loc);
4621 if (load_addr[1] == NULL_TREE && gsi_bb (load_gsi[0]))
4622 gimple_seq_add_stmt_without_update (&load_seq[0], stmt);
4623 else
4624 gimple_seq_add_stmt_without_update (&seq, stmt);
4625 src = gimple_assign_lhs (stmt);
4626 }
245f6de1 4627 break;
4b84d9b8
JJ
4628 case LROTATE_EXPR:
4629 case NOP_EXPR:
4630 src = ops[0];
4631 if (!is_gimple_val (src))
4632 {
4633 stmt = gimple_build_assign (make_ssa_name (TREE_TYPE (src)),
4634 src);
4635 gimple_seq_add_stmt_without_update (&seq, stmt);
4636 src = gimple_assign_lhs (stmt);
4637 }
e362a897 4638 if (!useless_type_conversion_p (dest_type, TREE_TYPE (src)))
4b84d9b8 4639 {
e362a897 4640 stmt = gimple_build_assign (make_ssa_name (dest_type),
4b84d9b8
JJ
4641 NOP_EXPR, src);
4642 gimple_seq_add_stmt_without_update (&seq, stmt);
4643 src = gimple_assign_lhs (stmt);
4644 }
e362a897 4645 inv_op = invert_op (split_store, 2, dest_type, xor_mask);
be52ac73
JJ
4646 if (inv_op != NOP_EXPR)
4647 {
e362a897 4648 stmt = gimple_build_assign (make_ssa_name (dest_type),
be52ac73
JJ
4649 inv_op, src, xor_mask);
4650 gimple_set_location (stmt, loc);
4651 gimple_seq_add_stmt_without_update (&seq, stmt);
4652 src = gimple_assign_lhs (stmt);
4653 }
4b84d9b8 4654 break;
245f6de1
JJ
4655 default:
4656 src = ops[0];
4657 break;
4658 }
4659
c94c3532
EB
4660 /* If bit insertion is required, we use the source as an accumulator
4661 into which the successive bit-field values are manually inserted.
4662 FIXME: perhaps use BIT_INSERT_EXPR instead in some cases? */
4663 if (group->bit_insertion)
4664 FOR_EACH_VEC_ELT (split_store->orig_stores, k, info)
4665 if (info->rhs_code == BIT_INSERT_EXPR
4666 && info->bitpos < try_bitpos + try_size
4667 && info->bitpos + info->bitsize > try_bitpos)
4668 {
4669 /* Mask, truncate, convert to final type, shift and ior into
4670 the accumulator. Note that every step can be a no-op. */
4671 const HOST_WIDE_INT start_gap = info->bitpos - try_bitpos;
4672 const HOST_WIDE_INT end_gap
4673 = (try_bitpos + try_size) - (info->bitpos + info->bitsize);
4674 tree tem = info->ops[0].val;
ed01d707
EB
4675 if (!INTEGRAL_TYPE_P (TREE_TYPE (tem)))
4676 {
4677 const unsigned HOST_WIDE_INT size
4678 = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (tem)));
4679 tree integer_type
4680 = build_nonstandard_integer_type (size, UNSIGNED);
4681 tem = gimple_build (&seq, loc, VIEW_CONVERT_EXPR,
4682 integer_type, tem);
4683 }
c14add82
EB
4684 if (TYPE_PRECISION (TREE_TYPE (tem)) <= info->bitsize)
4685 {
4686 tree bitfield_type
4687 = build_nonstandard_integer_type (info->bitsize,
4688 UNSIGNED);
4689 tem = gimple_convert (&seq, loc, bitfield_type, tem);
4690 }
4691 else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0)
c94c3532 4692 {
49a3b35c
JJ
4693 wide_int imask
4694 = wi::mask (info->bitsize, false,
4695 TYPE_PRECISION (TREE_TYPE (tem)));
c94c3532
EB
4696 tem = gimple_build (&seq, loc,
4697 BIT_AND_EXPR, TREE_TYPE (tem), tem,
49a3b35c
JJ
4698 wide_int_to_tree (TREE_TYPE (tem),
4699 imask));
c94c3532
EB
4700 }
4701 const HOST_WIDE_INT shift
4702 = (BYTES_BIG_ENDIAN ? end_gap : start_gap);
4703 if (shift < 0)
4704 tem = gimple_build (&seq, loc,
4705 RSHIFT_EXPR, TREE_TYPE (tem), tem,
4706 build_int_cst (NULL_TREE, -shift));
e362a897 4707 tem = gimple_convert (&seq, loc, dest_type, tem);
c94c3532
EB
4708 if (shift > 0)
4709 tem = gimple_build (&seq, loc,
e362a897 4710 LSHIFT_EXPR, dest_type, tem,
c94c3532
EB
4711 build_int_cst (NULL_TREE, shift));
4712 src = gimple_build (&seq, loc,
e362a897 4713 BIT_IOR_EXPR, dest_type, tem, src);
c94c3532
EB
4714 }
4715
a62b3dc5
JJ
4716 if (!integer_zerop (mask))
4717 {
e362a897 4718 tree tem = make_ssa_name (dest_type);
a62b3dc5
JJ
4719 tree load_src = unshare_expr (dest);
4720 /* The load might load some or all bits uninitialized,
4721 avoid -W*uninitialized warnings in that case.
4722 As optimization, it would be nice if all the bits are
4723 provably uninitialized (no stores at all yet or previous
4724 store a CLOBBER) we'd optimize away the load and replace
4725 it e.g. with 0. */
e9e2bad7 4726 suppress_warning (load_src, OPT_Wuninitialized);
a62b3dc5
JJ
4727 stmt = gimple_build_assign (tem, load_src);
4728 gimple_set_location (stmt, loc);
4729 gimple_set_vuse (stmt, new_vuse);
4730 gimple_seq_add_stmt_without_update (&seq, stmt);
4731
4732 /* FIXME: If there is a single chunk of zero bits in mask,
4733 perhaps use BIT_INSERT_EXPR instead? */
e362a897 4734 stmt = gimple_build_assign (make_ssa_name (dest_type),
a62b3dc5
JJ
4735 BIT_AND_EXPR, tem, mask);
4736 gimple_set_location (stmt, loc);
4737 gimple_seq_add_stmt_without_update (&seq, stmt);
4738 tem = gimple_assign_lhs (stmt);
4739
245f6de1 4740 if (TREE_CODE (src) == INTEGER_CST)
e362a897 4741 src = wide_int_to_tree (dest_type,
245f6de1
JJ
4742 wi::bit_and_not (wi::to_wide (src),
4743 wi::to_wide (mask)));
4744 else
4745 {
4746 tree nmask
e362a897 4747 = wide_int_to_tree (dest_type,
245f6de1 4748 wi::bit_not (wi::to_wide (mask)));
e362a897 4749 stmt = gimple_build_assign (make_ssa_name (dest_type),
245f6de1
JJ
4750 BIT_AND_EXPR, src, nmask);
4751 gimple_set_location (stmt, loc);
4752 gimple_seq_add_stmt_without_update (&seq, stmt);
4753 src = gimple_assign_lhs (stmt);
4754 }
e362a897 4755 stmt = gimple_build_assign (make_ssa_name (dest_type),
a62b3dc5
JJ
4756 BIT_IOR_EXPR, tem, src);
4757 gimple_set_location (stmt, loc);
4758 gimple_seq_add_stmt_without_update (&seq, stmt);
4759 src = gimple_assign_lhs (stmt);
4760 }
4761 }
f663d9ad
KT
4762
4763 stmt = gimple_build_assign (dest, src);
4764 gimple_set_location (stmt, loc);
4765 gimple_set_vuse (stmt, new_vuse);
4766 gimple_seq_add_stmt_without_update (&seq, stmt);
4767
629387a6
EB
4768 if (group->lp_nr && stmt_could_throw_p (cfun, stmt))
4769 add_stmt_to_eh_lp (stmt, group->lp_nr);
4770
f663d9ad
KT
4771 tree new_vdef;
4772 if (i < split_stores.length () - 1)
a62b3dc5 4773 new_vdef = make_ssa_name (gimple_vop (cfun), stmt);
f663d9ad
KT
4774 else
4775 new_vdef = last_vdef;
4776
4777 gimple_set_vdef (stmt, new_vdef);
4778 SSA_NAME_DEF_STMT (new_vdef) = stmt;
4779 new_vuse = new_vdef;
4780 }
4781
4782 FOR_EACH_VEC_ELT (split_stores, i, split_store)
4783 delete split_store;
4784
f663d9ad
KT
4785 gcc_assert (seq);
4786 if (dump_file)
4787 {
4788 fprintf (dump_file,
c94c3532 4789 "New sequence of %u stores to replace old one of %u stores\n",
a62b3dc5 4790 split_stores.length (), orig_num_stmts);
f663d9ad
KT
4791 if (dump_flags & TDF_DETAILS)
4792 print_gimple_seq (dump_file, seq, 0, TDF_VOPS | TDF_MEMSYMS);
4793 }
629387a6 4794
5384a802
JJ
4795 if (gimple_clobber_p (group->last_stmt))
4796 update_stmt (group->last_stmt);
4797
629387a6
EB
4798 if (group->lp_nr > 0)
4799 {
4800 /* We're going to insert a sequence of (potentially) throwing stores
4801 into an active EH region. This means that we're going to create
4802 new basic blocks with EH edges pointing to the post landing pad
4803 and, therefore, to have to update its PHI nodes, if any. For the
4804 virtual PHI node, we're going to use the VDEFs created above, but
4805 for the other nodes, we need to record the original reaching defs. */
4806 eh_landing_pad lp = get_eh_landing_pad_from_number (group->lp_nr);
4807 basic_block lp_bb = label_to_block (cfun, lp->post_landing_pad);
4808 basic_block last_bb = gimple_bb (group->last_stmt);
4809 edge last_edge = find_edge (last_bb, lp_bb);
4810 auto_vec<tree, 16> last_defs;
4811 gphi_iterator gpi;
4812 for (gpi = gsi_start_phis (lp_bb); !gsi_end_p (gpi); gsi_next (&gpi))
4813 {
4814 gphi *phi = gpi.phi ();
4815 tree last_def;
4816 if (virtual_operand_p (gimple_phi_result (phi)))
4817 last_def = NULL_TREE;
4818 else
4819 last_def = gimple_phi_arg_def (phi, last_edge->dest_idx);
4820 last_defs.safe_push (last_def);
4821 }
4822
4823 /* Do the insertion. Then, if new basic blocks have been created in the
4824 process, rewind the chain of VDEFs create above to walk the new basic
4825 blocks and update the corresponding arguments of the PHI nodes. */
4826 update_modified_stmts (seq);
4827 if (gimple_find_sub_bbs (seq, &last_gsi))
4828 while (last_vdef != gimple_vuse (group->last_stmt))
4829 {
4830 gimple *stmt = SSA_NAME_DEF_STMT (last_vdef);
4831 if (stmt_could_throw_p (cfun, stmt))
4832 {
4833 edge new_edge = find_edge (gimple_bb (stmt), lp_bb);
4834 unsigned int i;
4835 for (gpi = gsi_start_phis (lp_bb), i = 0;
4836 !gsi_end_p (gpi);
4837 gsi_next (&gpi), i++)
4838 {
4839 gphi *phi = gpi.phi ();
4840 tree new_def;
4841 if (virtual_operand_p (gimple_phi_result (phi)))
4842 new_def = last_vdef;
4843 else
4844 new_def = last_defs[i];
4845 add_phi_arg (phi, new_def, new_edge, UNKNOWN_LOCATION);
4846 }
4847 }
4848 last_vdef = gimple_vuse (stmt);
4849 }
4850 }
4851 else
4852 gsi_insert_seq_after (&last_gsi, seq, GSI_SAME_STMT);
4853
245f6de1
JJ
4854 for (int j = 0; j < 2; ++j)
4855 if (load_seq[j])
4856 gsi_insert_seq_after (&load_gsi[j], load_seq[j], GSI_SAME_STMT);
f663d9ad
KT
4857
4858 return true;
4859}
4860
4861/* Process the merged_store_group objects created in the coalescing phase.
4862 The stores are all against the base object BASE.
4863 Try to output the widened stores and delete the original statements if
4864 successful. Return true iff any changes were made. */
4865
4866bool
b5926e23 4867imm_store_chain_info::output_merged_stores ()
f663d9ad
KT
4868{
4869 unsigned int i;
4870 merged_store_group *merged_store;
4871 bool ret = false;
4872 FOR_EACH_VEC_ELT (m_merged_store_groups, i, merged_store)
4873 {
a95b474a
ML
4874 if (dbg_cnt (store_merging)
4875 && output_merged_store (merged_store))
f663d9ad
KT
4876 {
4877 unsigned int j;
4878 store_immediate_info *store;
4879 FOR_EACH_VEC_ELT (merged_store->stores, j, store)
4880 {
4881 gimple *stmt = store->stmt;
4882 gimple_stmt_iterator gsi = gsi_for_stmt (stmt);
5384a802
JJ
4883 /* Don't remove clobbers, they are still useful even if
4884 everything is overwritten afterwards. */
4885 if (gimple_clobber_p (stmt))
4886 continue;
f663d9ad 4887 gsi_remove (&gsi, true);
629387a6
EB
4888 if (store->lp_nr)
4889 remove_stmt_from_eh_lp (stmt);
f663d9ad
KT
4890 if (stmt != merged_store->last_stmt)
4891 {
4892 unlink_stmt_vdef (stmt);
4893 release_defs (stmt);
4894 }
4895 }
4896 ret = true;
4897 }
4898 }
4899 if (ret && dump_file)
4900 fprintf (dump_file, "Merging successful!\n");
4901
4902 return ret;
4903}
4904
4905/* Coalesce the store_immediate_info objects recorded against the base object
4906 BASE in the first phase and output them.
4907 Delete the allocated structures.
4908 Return true if any changes were made. */
4909
4910bool
b5926e23 4911imm_store_chain_info::terminate_and_process_chain ()
f663d9ad 4912{
95d94b52
RB
4913 if (dump_file && (dump_flags & TDF_DETAILS))
4914 fprintf (dump_file, "Terminating chain with %u stores\n",
4915 m_store_info.length ());
f663d9ad
KT
4916 /* Process store chain. */
4917 bool ret = false;
4918 if (m_store_info.length () > 1)
4919 {
4920 ret = coalesce_immediate_stores ();
4921 if (ret)
b5926e23 4922 ret = output_merged_stores ();
f663d9ad
KT
4923 }
4924
4925 /* Delete all the entries we allocated ourselves. */
4926 store_immediate_info *info;
4927 unsigned int i;
4928 FOR_EACH_VEC_ELT (m_store_info, i, info)
4929 delete info;
4930
4931 merged_store_group *merged_info;
4932 FOR_EACH_VEC_ELT (m_merged_store_groups, i, merged_info)
4933 delete merged_info;
4934
4935 return ret;
4936}
4937
4938/* Return true iff LHS is a destination potentially interesting for
4939 store merging. In practice these are the codes that get_inner_reference
4940 can process. */
4941
4942static bool
4943lhs_valid_for_store_merging_p (tree lhs)
4944{
629387a6 4945 if (DECL_P (lhs))
f663d9ad
KT
4946 return true;
4947
629387a6
EB
4948 switch (TREE_CODE (lhs))
4949 {
4950 case ARRAY_REF:
4951 case ARRAY_RANGE_REF:
4952 case BIT_FIELD_REF:
4953 case COMPONENT_REF:
4954 case MEM_REF:
e362a897 4955 case VIEW_CONVERT_EXPR:
629387a6
EB
4956 return true;
4957 default:
4958 return false;
4959 }
f663d9ad
KT
4960}
4961
4962/* Return true if the tree RHS is a constant we want to consider
4963 during store merging. In practice accept all codes that
4964 native_encode_expr accepts. */
4965
4966static bool
4967rhs_valid_for_store_merging_p (tree rhs)
4968{
cf098191 4969 unsigned HOST_WIDE_INT size;
3afd514b 4970 if (TREE_CODE (rhs) == CONSTRUCTOR
3afd514b
JJ
4971 && CONSTRUCTOR_NELTS (rhs) == 0
4972 && TYPE_SIZE_UNIT (TREE_TYPE (rhs))
4973 && tree_fits_uhwi_p (TYPE_SIZE_UNIT (TREE_TYPE (rhs))))
4974 return true;
cf098191
RS
4975 return (GET_MODE_SIZE (TYPE_MODE (TREE_TYPE (rhs))).is_constant (&size)
4976 && native_encode_expr (rhs, NULL, size) != 0);
f663d9ad
KT
4977}
4978
629387a6
EB
4979/* Adjust *PBITPOS, *PBITREGION_START and *PBITREGION_END by BYTE_OFF bytes
4980 and return true on success or false on failure. */
4981
4982static bool
4983adjust_bit_pos (poly_offset_int byte_off,
4984 poly_int64 *pbitpos,
4985 poly_uint64 *pbitregion_start,
4986 poly_uint64 *pbitregion_end)
4987{
4988 poly_offset_int bit_off = byte_off << LOG2_BITS_PER_UNIT;
4989 bit_off += *pbitpos;
4990
4991 if (known_ge (bit_off, 0) && bit_off.to_shwi (pbitpos))
4992 {
4993 if (maybe_ne (*pbitregion_end, 0U))
4994 {
4995 bit_off = byte_off << LOG2_BITS_PER_UNIT;
4996 bit_off += *pbitregion_start;
4997 if (bit_off.to_uhwi (pbitregion_start))
4998 {
4999 bit_off = byte_off << LOG2_BITS_PER_UNIT;
5000 bit_off += *pbitregion_end;
5001 if (!bit_off.to_uhwi (pbitregion_end))
5002 *pbitregion_end = 0;
5003 }
5004 else
5005 *pbitregion_end = 0;
5006 }
5007 return true;
5008 }
5009 else
5010 return false;
5011}
5012
245f6de1
JJ
5013/* If MEM is a memory reference usable for store merging (either as
5014 store destination or for loads), return the non-NULL base_addr
5015 and set *PBITSIZE, *PBITPOS, *PBITREGION_START and *PBITREGION_END.
5016 Otherwise return NULL, *PBITPOS should be still valid even for that
5017 case. */
5018
5019static tree
8a91d545
RS
5020mem_valid_for_store_merging (tree mem, poly_uint64 *pbitsize,
5021 poly_uint64 *pbitpos,
5022 poly_uint64 *pbitregion_start,
5023 poly_uint64 *pbitregion_end)
245f6de1 5024{
8a91d545
RS
5025 poly_int64 bitsize, bitpos;
5026 poly_uint64 bitregion_start = 0, bitregion_end = 0;
245f6de1
JJ
5027 machine_mode mode;
5028 int unsignedp = 0, reversep = 0, volatilep = 0;
5029 tree offset;
5030 tree base_addr = get_inner_reference (mem, &bitsize, &bitpos, &offset, &mode,
5031 &unsignedp, &reversep, &volatilep);
5032 *pbitsize = bitsize;
387e818c 5033 if (known_le (bitsize, 0))
245f6de1
JJ
5034 return NULL_TREE;
5035
5036 if (TREE_CODE (mem) == COMPONENT_REF
5037 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (mem, 1)))
5038 {
5039 get_bit_range (&bitregion_start, &bitregion_end, mem, &bitpos, &offset);
8a91d545
RS
5040 if (maybe_ne (bitregion_end, 0U))
5041 bitregion_end += 1;
245f6de1
JJ
5042 }
5043
5044 if (reversep)
5045 return NULL_TREE;
5046
5047 /* We do not want to rewrite TARGET_MEM_REFs. */
5048 if (TREE_CODE (base_addr) == TARGET_MEM_REF)
5049 return NULL_TREE;
5050 /* In some cases get_inner_reference may return a
5051 MEM_REF [ptr + byteoffset]. For the purposes of this pass
5052 canonicalize the base_addr to MEM_REF [ptr] and take
5053 byteoffset into account in the bitpos. This occurs in
5054 PR 23684 and this way we can catch more chains. */
5055 else if (TREE_CODE (base_addr) == MEM_REF)
5056 {
629387a6
EB
5057 if (!adjust_bit_pos (mem_ref_offset (base_addr), &bitpos,
5058 &bitregion_start, &bitregion_end))
245f6de1
JJ
5059 return NULL_TREE;
5060 base_addr = TREE_OPERAND (base_addr, 0);
5061 }
5062 /* get_inner_reference returns the base object, get at its
5063 address now. */
5064 else
5065 {
8a91d545 5066 if (maybe_lt (bitpos, 0))
245f6de1
JJ
5067 return NULL_TREE;
5068 base_addr = build_fold_addr_expr (base_addr);
5069 }
5070
629387a6 5071 if (offset)
245f6de1
JJ
5072 {
5073 /* If the access is variable offset then a base decl has to be
5074 address-taken to be able to emit pointer-based stores to it.
5075 ??? We might be able to get away with re-using the original
5076 base up to the first variable part and then wrapping that inside
5077 a BIT_FIELD_REF. */
5078 tree base = get_base_address (base_addr);
629387a6 5079 if (!base || (DECL_P (base) && !TREE_ADDRESSABLE (base)))
245f6de1
JJ
5080 return NULL_TREE;
5081
629387a6
EB
5082 /* Similarly to above for the base, remove constant from the offset. */
5083 if (TREE_CODE (offset) == PLUS_EXPR
5084 && TREE_CODE (TREE_OPERAND (offset, 1)) == INTEGER_CST
5085 && adjust_bit_pos (wi::to_poly_offset (TREE_OPERAND (offset, 1)),
5086 &bitpos, &bitregion_start, &bitregion_end))
5087 offset = TREE_OPERAND (offset, 0);
5088
245f6de1
JJ
5089 base_addr = build2 (POINTER_PLUS_EXPR, TREE_TYPE (base_addr),
5090 base_addr, offset);
5091 }
5092
629387a6
EB
5093 if (known_eq (bitregion_end, 0U))
5094 {
5095 bitregion_start = round_down_to_byte_boundary (bitpos);
5096 bitregion_end = round_up_to_byte_boundary (bitpos + bitsize);
5097 }
5098
245f6de1
JJ
5099 *pbitsize = bitsize;
5100 *pbitpos = bitpos;
5101 *pbitregion_start = bitregion_start;
5102 *pbitregion_end = bitregion_end;
5103 return base_addr;
5104}
5105
5106/* Return true if STMT is a load that can be used for store merging.
5107 In that case fill in *OP. BITSIZE, BITPOS, BITREGION_START and
5108 BITREGION_END are properties of the corresponding store. */
5109
5110static bool
5111handled_load (gimple *stmt, store_operand_info *op,
8a91d545
RS
5112 poly_uint64 bitsize, poly_uint64 bitpos,
5113 poly_uint64 bitregion_start, poly_uint64 bitregion_end)
245f6de1 5114{
383ac8dc 5115 if (!is_gimple_assign (stmt))
245f6de1 5116 return false;
383ac8dc
JJ
5117 if (gimple_assign_rhs_code (stmt) == BIT_NOT_EXPR)
5118 {
5119 tree rhs1 = gimple_assign_rhs1 (stmt);
5120 if (TREE_CODE (rhs1) == SSA_NAME
383ac8dc
JJ
5121 && handled_load (SSA_NAME_DEF_STMT (rhs1), op, bitsize, bitpos,
5122 bitregion_start, bitregion_end))
5123 {
d60edaba
JJ
5124 /* Don't allow _1 = load; _2 = ~1; _3 = ~_2; which should have
5125 been optimized earlier, but if allowed here, would confuse the
5126 multiple uses counting. */
5127 if (op->bit_not_p)
5128 return false;
383ac8dc
JJ
5129 op->bit_not_p = !op->bit_not_p;
5130 return true;
5131 }
5132 return false;
5133 }
5134 if (gimple_vuse (stmt)
5135 && gimple_assign_load_p (stmt)
36bbc05d 5136 && !stmt_can_throw_internal (cfun, stmt)
245f6de1
JJ
5137 && !gimple_has_volatile_ops (stmt))
5138 {
5139 tree mem = gimple_assign_rhs1 (stmt);
5140 op->base_addr
5141 = mem_valid_for_store_merging (mem, &op->bitsize, &op->bitpos,
5142 &op->bitregion_start,
5143 &op->bitregion_end);
5144 if (op->base_addr != NULL_TREE
8a91d545
RS
5145 && known_eq (op->bitsize, bitsize)
5146 && multiple_p (op->bitpos - bitpos, BITS_PER_UNIT)
5147 && known_ge (op->bitpos - op->bitregion_start,
5148 bitpos - bitregion_start)
5149 && known_ge (op->bitregion_end - op->bitpos,
5150 bitregion_end - bitpos))
245f6de1
JJ
5151 {
5152 op->stmt = stmt;
5153 op->val = mem;
383ac8dc 5154 op->bit_not_p = false;
245f6de1
JJ
5155 return true;
5156 }
5157 }
5158 return false;
5159}
5160
629387a6
EB
5161/* Return the index number of the landing pad for STMT, if any. */
5162
5163static int
5164lp_nr_for_store (gimple *stmt)
5165{
5166 if (!cfun->can_throw_non_call_exceptions || !cfun->eh)
5167 return 0;
5168
5169 if (!stmt_could_throw_p (cfun, stmt))
5170 return 0;
5171
5172 return lookup_stmt_eh_lp (stmt);
5173}
5174
245f6de1 5175/* Record the store STMT for store merging optimization if it can be
629387a6 5176 optimized. Return true if any changes were made. */
245f6de1 5177
629387a6 5178bool
245f6de1
JJ
5179pass_store_merging::process_store (gimple *stmt)
5180{
5181 tree lhs = gimple_assign_lhs (stmt);
5182 tree rhs = gimple_assign_rhs1 (stmt);
2c832ffe
SSF
5183 poly_uint64 bitsize, bitpos = 0;
5184 poly_uint64 bitregion_start = 0, bitregion_end = 0;
245f6de1
JJ
5185 tree base_addr
5186 = mem_valid_for_store_merging (lhs, &bitsize, &bitpos,
5187 &bitregion_start, &bitregion_end);
8a91d545 5188 if (known_eq (bitsize, 0U))
629387a6 5189 return false;
245f6de1
JJ
5190
5191 bool invalid = (base_addr == NULL_TREE
8a91d545
RS
5192 || (maybe_gt (bitsize,
5193 (unsigned int) MAX_BITSIZE_MODE_ANY_INT)
3afd514b
JJ
5194 && TREE_CODE (rhs) != INTEGER_CST
5195 && (TREE_CODE (rhs) != CONSTRUCTOR
5196 || CONSTRUCTOR_NELTS (rhs) != 0)));
245f6de1 5197 enum tree_code rhs_code = ERROR_MARK;
d60edaba 5198 bool bit_not_p = false;
4b84d9b8
JJ
5199 struct symbolic_number n;
5200 gimple *ins_stmt = NULL;
245f6de1
JJ
5201 store_operand_info ops[2];
5202 if (invalid)
5203 ;
e362a897
EB
5204 else if (TREE_CODE (rhs) == STRING_CST)
5205 {
5206 rhs_code = STRING_CST;
5207 ops[0].val = rhs;
5208 }
245f6de1
JJ
5209 else if (rhs_valid_for_store_merging_p (rhs))
5210 {
5211 rhs_code = INTEGER_CST;
5212 ops[0].val = rhs;
5213 }
e362a897 5214 else if (TREE_CODE (rhs) == SSA_NAME)
245f6de1
JJ
5215 {
5216 gimple *def_stmt = SSA_NAME_DEF_STMT (rhs), *def_stmt1, *def_stmt2;
5217 if (!is_gimple_assign (def_stmt))
5218 invalid = true;
5219 else if (handled_load (def_stmt, &ops[0], bitsize, bitpos,
5220 bitregion_start, bitregion_end))
5221 rhs_code = MEM_REF;
d60edaba
JJ
5222 else if (gimple_assign_rhs_code (def_stmt) == BIT_NOT_EXPR)
5223 {
5224 tree rhs1 = gimple_assign_rhs1 (def_stmt);
5225 if (TREE_CODE (rhs1) == SSA_NAME
5226 && is_gimple_assign (SSA_NAME_DEF_STMT (rhs1)))
5227 {
5228 bit_not_p = true;
5229 def_stmt = SSA_NAME_DEF_STMT (rhs1);
5230 }
5231 }
c94c3532 5232
d60edaba 5233 if (rhs_code == ERROR_MARK && !invalid)
245f6de1
JJ
5234 switch ((rhs_code = gimple_assign_rhs_code (def_stmt)))
5235 {
5236 case BIT_AND_EXPR:
5237 case BIT_IOR_EXPR:
5238 case BIT_XOR_EXPR:
5239 tree rhs1, rhs2;
5240 rhs1 = gimple_assign_rhs1 (def_stmt);
5241 rhs2 = gimple_assign_rhs2 (def_stmt);
5242 invalid = true;
d7a9512e 5243 if (TREE_CODE (rhs1) != SSA_NAME)
245f6de1
JJ
5244 break;
5245 def_stmt1 = SSA_NAME_DEF_STMT (rhs1);
5246 if (!is_gimple_assign (def_stmt1)
5247 || !handled_load (def_stmt1, &ops[0], bitsize, bitpos,
5248 bitregion_start, bitregion_end))
5249 break;
5250 if (rhs_valid_for_store_merging_p (rhs2))
5251 ops[1].val = rhs2;
d7a9512e 5252 else if (TREE_CODE (rhs2) != SSA_NAME)
245f6de1
JJ
5253 break;
5254 else
5255 {
5256 def_stmt2 = SSA_NAME_DEF_STMT (rhs2);
5257 if (!is_gimple_assign (def_stmt2))
5258 break;
5259 else if (!handled_load (def_stmt2, &ops[1], bitsize, bitpos,
5260 bitregion_start, bitregion_end))
5261 break;
5262 }
5263 invalid = false;
5264 break;
5265 default:
5266 invalid = true;
5267 break;
5268 }
c94c3532 5269
8a91d545
RS
5270 unsigned HOST_WIDE_INT const_bitsize;
5271 if (bitsize.is_constant (&const_bitsize)
c94c3532 5272 && (const_bitsize % BITS_PER_UNIT) == 0
8a91d545 5273 && const_bitsize <= 64
c94c3532 5274 && multiple_p (bitpos, BITS_PER_UNIT))
4b84d9b8
JJ
5275 {
5276 ins_stmt = find_bswap_or_nop_1 (def_stmt, &n, 12);
5277 if (ins_stmt)
5278 {
5279 uint64_t nn = n.n;
5280 for (unsigned HOST_WIDE_INT i = 0;
8a91d545
RS
5281 i < const_bitsize;
5282 i += BITS_PER_UNIT, nn >>= BITS_PER_MARKER)
4b84d9b8
JJ
5283 if ((nn & MARKER_MASK) == 0
5284 || (nn & MARKER_MASK) == MARKER_BYTE_UNKNOWN)
5285 {
5286 ins_stmt = NULL;
5287 break;
5288 }
5289 if (ins_stmt)
5290 {
5291 if (invalid)
5292 {
5293 rhs_code = LROTATE_EXPR;
5294 ops[0].base_addr = NULL_TREE;
5295 ops[1].base_addr = NULL_TREE;
5296 }
5297 invalid = false;
5298 }
5299 }
5300 }
c94c3532
EB
5301
5302 if (invalid
5303 && bitsize.is_constant (&const_bitsize)
5304 && ((const_bitsize % BITS_PER_UNIT) != 0
5305 || !multiple_p (bitpos, BITS_PER_UNIT))
ed01d707 5306 && const_bitsize <= MAX_FIXED_MODE_SIZE)
c94c3532 5307 {
c14add82 5308 /* Bypass a conversion to the bit-field type. */
31a5d8c5
EB
5309 if (!bit_not_p
5310 && is_gimple_assign (def_stmt)
5311 && CONVERT_EXPR_CODE_P (rhs_code))
c94c3532
EB
5312 {
5313 tree rhs1 = gimple_assign_rhs1 (def_stmt);
5314 if (TREE_CODE (rhs1) == SSA_NAME
c14add82 5315 && INTEGRAL_TYPE_P (TREE_TYPE (rhs1)))
c94c3532
EB
5316 rhs = rhs1;
5317 }
5318 rhs_code = BIT_INSERT_EXPR;
31a5d8c5 5319 bit_not_p = false;
c94c3532
EB
5320 ops[0].val = rhs;
5321 ops[0].base_addr = NULL_TREE;
5322 ops[1].base_addr = NULL_TREE;
5323 invalid = false;
5324 }
245f6de1 5325 }
e362a897
EB
5326 else
5327 invalid = true;
245f6de1 5328
8a91d545
RS
5329 unsigned HOST_WIDE_INT const_bitsize, const_bitpos;
5330 unsigned HOST_WIDE_INT const_bitregion_start, const_bitregion_end;
5331 if (invalid
5332 || !bitsize.is_constant (&const_bitsize)
5333 || !bitpos.is_constant (&const_bitpos)
5334 || !bitregion_start.is_constant (&const_bitregion_start)
5335 || !bitregion_end.is_constant (&const_bitregion_end))
629387a6 5336 return terminate_all_aliasing_chains (NULL, stmt);
245f6de1 5337
4b84d9b8
JJ
5338 if (!ins_stmt)
5339 memset (&n, 0, sizeof (n));
5340
99b1c316 5341 class imm_store_chain_info **chain_info = NULL;
629387a6 5342 bool ret = false;
383ac8dc
JJ
5343 if (base_addr)
5344 chain_info = m_stores.get (base_addr);
5345
245f6de1
JJ
5346 store_immediate_info *info;
5347 if (chain_info)
5348 {
5349 unsigned int ord = (*chain_info)->m_store_info.length ();
8a91d545
RS
5350 info = new store_immediate_info (const_bitsize, const_bitpos,
5351 const_bitregion_start,
5352 const_bitregion_end,
5353 stmt, ord, rhs_code, n, ins_stmt,
629387a6
EB
5354 bit_not_p, lp_nr_for_store (stmt),
5355 ops[0], ops[1]);
245f6de1
JJ
5356 if (dump_file && (dump_flags & TDF_DETAILS))
5357 {
5358 fprintf (dump_file, "Recording immediate store from stmt:\n");
5359 print_gimple_stmt (dump_file, stmt, 0);
5360 }
5361 (*chain_info)->m_store_info.safe_push (info);
95d94b52 5362 m_n_stores++;
629387a6 5363 ret |= terminate_all_aliasing_chains (chain_info, stmt);
245f6de1
JJ
5364 /* If we reach the limit of stores to merge in a chain terminate and
5365 process the chain now. */
5366 if ((*chain_info)->m_store_info.length ()
028d4092 5367 == (unsigned int) param_max_stores_to_merge)
245f6de1
JJ
5368 {
5369 if (dump_file && (dump_flags & TDF_DETAILS))
5370 fprintf (dump_file,
5371 "Reached maximum number of statements to merge:\n");
629387a6 5372 ret |= terminate_and_process_chain (*chain_info);
245f6de1 5373 }
245f6de1 5374 }
95d94b52
RB
5375 else
5376 {
5377 /* Store aliases any existing chain? */
5378 ret |= terminate_all_aliasing_chains (NULL, stmt);
245f6de1 5379
95d94b52
RB
5380 /* Start a new chain. */
5381 class imm_store_chain_info *new_chain
5382 = new imm_store_chain_info (m_stores_head, base_addr);
5383 info = new store_immediate_info (const_bitsize, const_bitpos,
5384 const_bitregion_start,
5385 const_bitregion_end,
5386 stmt, 0, rhs_code, n, ins_stmt,
5387 bit_not_p, lp_nr_for_store (stmt),
5388 ops[0], ops[1]);
5389 new_chain->m_store_info.safe_push (info);
5390 m_n_stores++;
5391 m_stores.put (base_addr, new_chain);
5392 m_n_chains++;
5393 if (dump_file && (dump_flags & TDF_DETAILS))
5394 {
5395 fprintf (dump_file, "Starting active chain number %u with statement:\n",
5396 m_n_chains);
5397 print_gimple_stmt (dump_file, stmt, 0);
5398 fprintf (dump_file, "The base object is:\n");
5399 print_generic_expr (dump_file, base_addr);
5400 fprintf (dump_file, "\n");
5401 }
5402 }
5403
5404 /* Prune oldest chains so that after adding the chain or store above
5405 we're again within the limits set by the params. */
5406 if (m_n_chains > (unsigned)param_max_store_chains_to_track
5407 || m_n_stores > (unsigned)param_max_stores_to_track)
245f6de1 5408 {
95d94b52
RB
5409 if (dump_file && (dump_flags & TDF_DETAILS))
5410 fprintf (dump_file, "Too many chains (%u > %d) or stores (%u > %d), "
5411 "terminating oldest chain(s).\n", m_n_chains,
5412 param_max_store_chains_to_track, m_n_stores,
5413 param_max_stores_to_track);
5414 imm_store_chain_info **e = &m_stores_head;
5415 unsigned idx = 0;
5416 unsigned n_stores = 0;
5417 while (*e)
5418 {
5419 if (idx >= (unsigned)param_max_store_chains_to_track
5420 || (n_stores + (*e)->m_store_info.length ()
5421 > (unsigned)param_max_stores_to_track))
8a8eee6b 5422 ret |= terminate_and_process_chain (*e);
95d94b52
RB
5423 else
5424 {
5425 n_stores += (*e)->m_store_info.length ();
5426 e = &(*e)->next;
5427 ++idx;
5428 }
5429 }
245f6de1 5430 }
95d94b52 5431
629387a6
EB
5432 return ret;
5433}
5434
5435/* Return true if STMT is a store valid for store merging. */
5436
5437static bool
5438store_valid_for_store_merging_p (gimple *stmt)
5439{
5440 return gimple_assign_single_p (stmt)
5441 && gimple_vdef (stmt)
5442 && lhs_valid_for_store_merging_p (gimple_assign_lhs (stmt))
5384a802 5443 && (!gimple_has_volatile_ops (stmt) || gimple_clobber_p (stmt));
629387a6
EB
5444}
5445
5446enum basic_block_status { BB_INVALID, BB_VALID, BB_EXTENDED_VALID };
5447
5448/* Return the status of basic block BB wrt store merging. */
5449
5450static enum basic_block_status
5451get_status_for_store_merging (basic_block bb)
5452{
5453 unsigned int num_statements = 0;
a7553ad6 5454 unsigned int num_constructors = 0;
629387a6
EB
5455 gimple_stmt_iterator gsi;
5456 edge e;
a591c71b 5457 gimple *last_stmt = NULL;
629387a6
EB
5458
5459 for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi))
5460 {
5461 gimple *stmt = gsi_stmt (gsi);
5462
5463 if (is_gimple_debug (stmt))
5464 continue;
5465
a591c71b
JJ
5466 last_stmt = stmt;
5467
629387a6
EB
5468 if (store_valid_for_store_merging_p (stmt) && ++num_statements >= 2)
5469 break;
a7553ad6
JJ
5470
5471 if (is_gimple_assign (stmt)
5472 && gimple_assign_rhs_code (stmt) == CONSTRUCTOR)
5473 {
5474 tree rhs = gimple_assign_rhs1 (stmt);
5475 if (VECTOR_TYPE_P (TREE_TYPE (rhs))
5476 && INTEGRAL_TYPE_P (TREE_TYPE (TREE_TYPE (rhs)))
5477 && gimple_assign_lhs (stmt) != NULL_TREE)
5478 {
5479 HOST_WIDE_INT sz
5480 = int_size_in_bytes (TREE_TYPE (rhs)) * BITS_PER_UNIT;
5481 if (sz == 16 || sz == 32 || sz == 64)
5482 {
5483 num_constructors = 1;
5484 break;
5485 }
5486 }
5487 }
629387a6
EB
5488 }
5489
a7553ad6 5490 if (num_statements == 0 && num_constructors == 0)
629387a6
EB
5491 return BB_INVALID;
5492
5493 if (cfun->can_throw_non_call_exceptions && cfun->eh
a591c71b 5494 && store_valid_for_store_merging_p (last_stmt)
629387a6
EB
5495 && (e = find_fallthru_edge (bb->succs))
5496 && e->dest == bb->next_bb)
5497 return BB_EXTENDED_VALID;
5498
a7553ad6 5499 return (num_statements >= 2 || num_constructors) ? BB_VALID : BB_INVALID;
245f6de1
JJ
5500}
5501
f663d9ad 5502/* Entry point for the pass. Go over each basic block recording chains of
245f6de1
JJ
5503 immediate stores. Upon encountering a terminating statement (as defined
5504 by stmt_terminates_chain_p) process the recorded stores and emit the widened
5505 variants. */
f663d9ad
KT
5506
5507unsigned int
5508pass_store_merging::execute (function *fun)
5509{
5510 basic_block bb;
5511 hash_set<gimple *> orig_stmts;
629387a6
EB
5512 bool changed = false, open_chains = false;
5513
5514 /* If the function can throw and catch non-call exceptions, we'll be trying
5515 to merge stores across different basic blocks so we need to first unsplit
5516 the EH edges in order to streamline the CFG of the function. */
5517 if (cfun->can_throw_non_call_exceptions && cfun->eh)
5518 unsplit_eh_edges ();
f663d9ad 5519
4b84d9b8
JJ
5520 calculate_dominance_info (CDI_DOMINATORS);
5521
f663d9ad
KT
5522 FOR_EACH_BB_FN (bb, fun)
5523 {
629387a6 5524 const basic_block_status bb_status = get_status_for_store_merging (bb);
f663d9ad 5525 gimple_stmt_iterator gsi;
f663d9ad 5526
629387a6
EB
5527 if (open_chains && (bb_status == BB_INVALID || !single_pred_p (bb)))
5528 {
5529 changed |= terminate_and_process_all_chains ();
5530 open_chains = false;
f663d9ad
KT
5531 }
5532
629387a6 5533 if (bb_status == BB_INVALID)
f663d9ad
KT
5534 continue;
5535
5536 if (dump_file && (dump_flags & TDF_DETAILS))
5537 fprintf (dump_file, "Processing basic block <%d>:\n", bb->index);
5538
a7553ad6 5539 for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); )
f663d9ad
KT
5540 {
5541 gimple *stmt = gsi_stmt (gsi);
a7553ad6 5542 gsi_next (&gsi);
f663d9ad 5543
50b6d676
AO
5544 if (is_gimple_debug (stmt))
5545 continue;
5546
5384a802 5547 if (gimple_has_volatile_ops (stmt) && !gimple_clobber_p (stmt))
f663d9ad
KT
5548 {
5549 /* Terminate all chains. */
5550 if (dump_file && (dump_flags & TDF_DETAILS))
5551 fprintf (dump_file, "Volatile access terminates "
5552 "all chains\n");
629387a6
EB
5553 changed |= terminate_and_process_all_chains ();
5554 open_chains = false;
f663d9ad
KT
5555 continue;
5556 }
5557
a7553ad6
JJ
5558 if (is_gimple_assign (stmt)
5559 && gimple_assign_rhs_code (stmt) == CONSTRUCTOR
5560 && maybe_optimize_vector_constructor (stmt))
5561 continue;
5562
629387a6
EB
5563 if (store_valid_for_store_merging_p (stmt))
5564 changed |= process_store (stmt);
245f6de1 5565 else
629387a6
EB
5566 changed |= terminate_all_aliasing_chains (NULL, stmt);
5567 }
5568
5569 if (bb_status == BB_EXTENDED_VALID)
5570 open_chains = true;
5571 else
5572 {
5573 changed |= terminate_and_process_all_chains ();
5574 open_chains = false;
f663d9ad 5575 }
f663d9ad 5576 }
629387a6
EB
5577
5578 if (open_chains)
5579 changed |= terminate_and_process_all_chains ();
5580
5581 /* If the function can throw and catch non-call exceptions and something
5582 changed during the pass, then the CFG has (very likely) changed too. */
5583 if (cfun->can_throw_non_call_exceptions && cfun->eh && changed)
5584 {
5585 free_dominance_info (CDI_DOMINATORS);
5586 return TODO_cleanup_cfg;
5587 }
5588
f663d9ad
KT
5589 return 0;
5590}
5591
5592} // anon namespace
5593
5594/* Construct and return a store merging pass object. */
5595
5596gimple_opt_pass *
5597make_pass_store_merging (gcc::context *ctxt)
5598{
5599 return new pass_store_merging (ctxt);
5600}
c22d8787
KT
5601
5602#if CHECKING_P
5603
5604namespace selftest {
5605
5606/* Selftests for store merging helpers. */
5607
5608/* Assert that all elements of the byte arrays X and Y, both of length N
5609 are equal. */
5610
5611static void
5612verify_array_eq (unsigned char *x, unsigned char *y, unsigned int n)
5613{
5614 for (unsigned int i = 0; i < n; i++)
5615 {
5616 if (x[i] != y[i])
5617 {
5618 fprintf (stderr, "Arrays do not match. X:\n");
5619 dump_char_array (stderr, x, n);
5620 fprintf (stderr, "Y:\n");
5621 dump_char_array (stderr, y, n);
5622 }
5623 ASSERT_EQ (x[i], y[i]);
5624 }
5625}
5626
8aba425f 5627/* Test shift_bytes_in_array_left and that it carries bits across between
c22d8787
KT
5628 bytes correctly. */
5629
5630static void
8aba425f 5631verify_shift_bytes_in_array_left (void)
c22d8787
KT
5632{
5633 /* byte 1 | byte 0
5634 00011111 | 11100000. */
5635 unsigned char orig[2] = { 0xe0, 0x1f };
5636 unsigned char in[2];
5637 memcpy (in, orig, sizeof orig);
5638
5639 unsigned char expected[2] = { 0x80, 0x7f };
8aba425f 5640 shift_bytes_in_array_left (in, sizeof (in), 2);
c22d8787
KT
5641 verify_array_eq (in, expected, sizeof (in));
5642
5643 memcpy (in, orig, sizeof orig);
5644 memcpy (expected, orig, sizeof orig);
5645 /* Check that shifting by zero doesn't change anything. */
8aba425f 5646 shift_bytes_in_array_left (in, sizeof (in), 0);
c22d8787
KT
5647 verify_array_eq (in, expected, sizeof (in));
5648
5649}
5650
5651/* Test shift_bytes_in_array_right and that it carries bits across between
5652 bytes correctly. */
5653
5654static void
5655verify_shift_bytes_in_array_right (void)
5656{
5657 /* byte 1 | byte 0
5658 00011111 | 11100000. */
5659 unsigned char orig[2] = { 0x1f, 0xe0};
5660 unsigned char in[2];
5661 memcpy (in, orig, sizeof orig);
5662 unsigned char expected[2] = { 0x07, 0xf8};
5663 shift_bytes_in_array_right (in, sizeof (in), 2);
5664 verify_array_eq (in, expected, sizeof (in));
5665
5666 memcpy (in, orig, sizeof orig);
5667 memcpy (expected, orig, sizeof orig);
5668 /* Check that shifting by zero doesn't change anything. */
5669 shift_bytes_in_array_right (in, sizeof (in), 0);
5670 verify_array_eq (in, expected, sizeof (in));
5671}
5672
5673/* Test clear_bit_region that it clears exactly the bits asked and
5674 nothing more. */
5675
5676static void
5677verify_clear_bit_region (void)
5678{
5679 /* Start with all bits set and test clearing various patterns in them. */
5680 unsigned char orig[3] = { 0xff, 0xff, 0xff};
5681 unsigned char in[3];
5682 unsigned char expected[3];
5683 memcpy (in, orig, sizeof in);
5684
5685 /* Check zeroing out all the bits. */
5686 clear_bit_region (in, 0, 3 * BITS_PER_UNIT);
5687 expected[0] = expected[1] = expected[2] = 0;
5688 verify_array_eq (in, expected, sizeof in);
5689
5690 memcpy (in, orig, sizeof in);
5691 /* Leave the first and last bits intact. */
5692 clear_bit_region (in, 1, 3 * BITS_PER_UNIT - 2);
5693 expected[0] = 0x1;
5694 expected[1] = 0;
5695 expected[2] = 0x80;
5696 verify_array_eq (in, expected, sizeof in);
5697}
5698
5384a802 5699/* Test clear_bit_region_be that it clears exactly the bits asked and
c22d8787
KT
5700 nothing more. */
5701
5702static void
5703verify_clear_bit_region_be (void)
5704{
5705 /* Start with all bits set and test clearing various patterns in them. */
5706 unsigned char orig[3] = { 0xff, 0xff, 0xff};
5707 unsigned char in[3];
5708 unsigned char expected[3];
5709 memcpy (in, orig, sizeof in);
5710
5711 /* Check zeroing out all the bits. */
5712 clear_bit_region_be (in, BITS_PER_UNIT - 1, 3 * BITS_PER_UNIT);
5713 expected[0] = expected[1] = expected[2] = 0;
5714 verify_array_eq (in, expected, sizeof in);
5715
5716 memcpy (in, orig, sizeof in);
5717 /* Leave the first and last bits intact. */
5718 clear_bit_region_be (in, BITS_PER_UNIT - 2, 3 * BITS_PER_UNIT - 2);
5719 expected[0] = 0x80;
5720 expected[1] = 0;
5721 expected[2] = 0x1;
5722 verify_array_eq (in, expected, sizeof in);
5723}
5724
5725
5726/* Run all of the selftests within this file. */
5727
5728void
d5148d4f 5729store_merging_cc_tests (void)
c22d8787 5730{
8aba425f 5731 verify_shift_bytes_in_array_left ();
c22d8787
KT
5732 verify_shift_bytes_in_array_right ();
5733 verify_clear_bit_region ();
5734 verify_clear_bit_region_be ();
5735}
5736
5737} // namespace selftest
5738#endif /* CHECKING_P. */