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3245eea0 1/* Sets (bit vectors) of hard registers, and operations on them.
9dcd6f09 2 Copyright (C) 1987, 1992, 1994, 2000, 2003, 2004, 2005, 2007
f30278e8 3 Free Software Foundation, Inc.
3245eea0 4
1322177d 5This file is part of GCC
3245eea0 6
1322177d
LB
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9dcd6f09 9Software Foundation; either version 3, or (at your option) any later
1322177d 10version.
3245eea0 11
1322177d
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12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
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16
17You should have received a copy of the GNU General Public License
9dcd6f09
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18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
3245eea0 20
88657302
RH
21#ifndef GCC_HARD_REG_SET_H
22#define GCC_HARD_REG_SET_H
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23
24/* Define the type of a set of hard registers. */
25
328d0797
RS
26/* HARD_REG_ELT_TYPE is a typedef of the unsigned integral type which
27 will be used for hard reg sets, either alone or in an array.
28
29 If HARD_REG_SET is a macro, its definition is HARD_REG_ELT_TYPE,
30 and it has enough bits to represent all the target machine's hard
31 registers. Otherwise, it is a typedef for a suitably sized array
32 of HARD_REG_ELT_TYPEs. HARD_REG_SET_LONGS is defined as how many.
3245eea0
CH
33
34 Note that lots of code assumes that the first part of a regset is
35 the same format as a HARD_REG_SET. To help make sure this is true,
99fa8911
AP
36 we only try the widest fast integer mode (HOST_WIDEST_FAST_INT)
37 instead of all the smaller types. This approach loses only if
2a7e31df 38 there are very few registers and then only in the few cases where
99fa8911
AP
39 we have an array of HARD_REG_SETs, so it needn't be as complex as
40 it used to be. */
328d0797 41
99fa8911 42typedef unsigned HOST_WIDEST_FAST_INT HARD_REG_ELT_TYPE;
3245eea0 43
99fa8911 44#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
328d0797
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45
46#define HARD_REG_SET HARD_REG_ELT_TYPE
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47
48#else
49
50#define HARD_REG_SET_LONGS \
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51 ((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDEST_FAST_INT - 1) \
52 / HOST_BITS_PER_WIDEST_FAST_INT)
328d0797 53typedef HARD_REG_ELT_TYPE HARD_REG_SET[HARD_REG_SET_LONGS];
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54
55#endif
56
328d0797
RS
57/* HARD_CONST is used to cast a constant to the appropriate type
58 for use with a HARD_REG_SET. */
3245eea0 59
328d0797 60#define HARD_CONST(X) ((HARD_REG_ELT_TYPE) (X))
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CH
61
62/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
63 to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
64 All three take two arguments: the set and the register number.
65
66 In the case where sets are arrays of longs, the first argument
67 is actually a pointer to a long.
68
69 Define two macros for initializing a set:
70 CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
71 These take just one argument.
72
73 Also define macros for copying hard reg sets:
74 COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
75 These take two arguments TO and FROM; they read from FROM
76 and store into TO. COMPL_HARD_REG_SET complements each bit.
77
78 Also define macros for combining hard reg sets:
79 IOR_HARD_REG_SET and AND_HARD_REG_SET.
80 These take two arguments TO and FROM; they read from FROM
81 and combine bitwise into TO. Define also two variants
82 IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
83 which use the complement of the set FROM.
84
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85 Also define:
86
87 hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y.
88 hard_reg_set_equal_p (X, Y), which returns true if X and Y are equal.
89 hard_reg_set_intersect_p (X, Y), which returns true if X and Y intersect.
90 hard_reg_set_empty_p (X), which returns true if X is empty. */
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91
92#ifdef HARD_REG_SET
93
94#define SET_HARD_REG_BIT(SET, BIT) \
95 ((SET) |= HARD_CONST (1) << (BIT))
96#define CLEAR_HARD_REG_BIT(SET, BIT) \
97 ((SET) &= ~(HARD_CONST (1) << (BIT)))
98#define TEST_HARD_REG_BIT(SET, BIT) \
ae32926b 99 (!!((SET) & (HARD_CONST (1) << (BIT))))
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100
101#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
328d0797 102#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
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103
104#define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
105#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
106
107#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
108#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
109#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
110#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
111
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112static inline bool
113hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
114{
115 return (x & ~y) == HARD_CONST (0);
116}
117
118static inline bool
119hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
120{
121 return x == y;
122}
123
124static inline bool
125hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
126{
127 return (x & y) != HARD_CONST (0);
128}
129
130static inline bool
131hard_reg_set_empty_p (const HARD_REG_SET x)
132{
133 return x == HARD_CONST (0);
134}
328d0797 135
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136#else
137
99fa8911 138#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT)
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139
140#define SET_HARD_REG_BIT(SET, BIT) \
141 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
328d0797 142 |= HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))
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CH
143
144#define CLEAR_HARD_REG_BIT(SET, BIT) \
145 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
328d0797 146 &= ~(HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
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147
148#define TEST_HARD_REG_BIT(SET, BIT) \
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149 (!!((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
150 & (HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))))
3245eea0 151
99fa8911 152#if FIRST_PSEUDO_REGISTER <= 2*HOST_BITS_PER_WIDEST_FAST_INT
ea78578f 153#define CLEAR_HARD_REG_SET(TO) \
b3694847 154do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
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155 scan_tp_[0] = 0; \
156 scan_tp_[1] = 0; } while (0)
157
158#define SET_HARD_REG_SET(TO) \
b3694847 159do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
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160 scan_tp_[0] = -1; \
161 scan_tp_[1] = -1; } while (0)
162
163#define COPY_HARD_REG_SET(TO, FROM) \
b3694847 164do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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165 scan_tp_[0] = scan_fp_[0]; \
166 scan_tp_[1] = scan_fp_[1]; } while (0)
167
168#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847 169do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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170 scan_tp_[0] = ~ scan_fp_[0]; \
171 scan_tp_[1] = ~ scan_fp_[1]; } while (0)
172
173#define AND_HARD_REG_SET(TO, FROM) \
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174do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
175 scan_tp_[0] &= scan_fp_[0]; \
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176 scan_tp_[1] &= scan_fp_[1]; } while (0)
177
178#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 179do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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180 scan_tp_[0] &= ~ scan_fp_[0]; \
181 scan_tp_[1] &= ~ scan_fp_[1]; } while (0)
182
183#define IOR_HARD_REG_SET(TO, FROM) \
b3694847 184do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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185 scan_tp_[0] |= scan_fp_[0]; \
186 scan_tp_[1] |= scan_fp_[1]; } while (0)
187
188#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 189do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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190 scan_tp_[0] |= ~ scan_fp_[0]; \
191 scan_tp_[1] |= ~ scan_fp_[1]; } while (0)
192
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193static inline bool
194hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
195{
196 return (x[0] & ~y[0]) == 0 && (x[1] & ~y[1]) == 0;
197}
198
199static inline bool
200hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
201{
202 return x[0] == y[0] && x[1] == y[1];
203}
204
205static inline bool
206hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
207{
208 return (x[0] & y[0]) != 0 || (x[1] & y[1]) != 0;
209}
210
211static inline bool
212hard_reg_set_empty_p (const HARD_REG_SET x)
213{
214 return x[0] == 0 && x[1] == 0;
215}
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216
217#else
992c944c 218#if FIRST_PSEUDO_REGISTER <= 3*HOST_BITS_PER_WIDEST_FAST_INT
ea78578f 219#define CLEAR_HARD_REG_SET(TO) \
b3694847 220do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
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221 scan_tp_[0] = 0; \
222 scan_tp_[1] = 0; \
223 scan_tp_[2] = 0; } while (0)
224
225#define SET_HARD_REG_SET(TO) \
b3694847 226do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
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227 scan_tp_[0] = -1; \
228 scan_tp_[1] = -1; \
229 scan_tp_[2] = -1; } while (0)
230
231#define COPY_HARD_REG_SET(TO, FROM) \
b3694847 232do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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233 scan_tp_[0] = scan_fp_[0]; \
234 scan_tp_[1] = scan_fp_[1]; \
235 scan_tp_[2] = scan_fp_[2]; } while (0)
236
237#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847 238do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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239 scan_tp_[0] = ~ scan_fp_[0]; \
240 scan_tp_[1] = ~ scan_fp_[1]; \
241 scan_tp_[2] = ~ scan_fp_[2]; } while (0)
242
243#define AND_HARD_REG_SET(TO, FROM) \
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244do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
245 scan_tp_[0] &= scan_fp_[0]; \
246 scan_tp_[1] &= scan_fp_[1]; \
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247 scan_tp_[2] &= scan_fp_[2]; } while (0)
248
249#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 250do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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251 scan_tp_[0] &= ~ scan_fp_[0]; \
252 scan_tp_[1] &= ~ scan_fp_[1]; \
253 scan_tp_[2] &= ~ scan_fp_[2]; } while (0)
254
255#define IOR_HARD_REG_SET(TO, FROM) \
b3694847 256do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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257 scan_tp_[0] |= scan_fp_[0]; \
258 scan_tp_[1] |= scan_fp_[1]; \
259 scan_tp_[2] |= scan_fp_[2]; } while (0)
260
261#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 262do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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263 scan_tp_[0] |= ~ scan_fp_[0]; \
264 scan_tp_[1] |= ~ scan_fp_[1]; \
265 scan_tp_[2] |= ~ scan_fp_[2]; } while (0)
266
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267static inline bool
268hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
269{
270 return ((x[0] & ~y[0]) == 0
271 && (x[1] & ~y[1]) == 0
272 && (x[2] & ~y[2]) == 0);
273}
274
275static inline bool
276hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
277{
278 return x[0] == y[0] && x[1] == y[1] && x[2] == y[2];
279}
280
281static inline bool
282hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
283{
284 return ((x[0] & y[0]) != 0
285 || (x[1] & y[1]) != 0
286 || (x[2] & y[2]) != 0);
287}
288
289static inline bool
290hard_reg_set_empty_p (const HARD_REG_SET x)
291{
292 return x[0] == 0 && x[1] == 0 && x[2] == 0;
293}
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294
295#else
99fa8911 296#if FIRST_PSEUDO_REGISTER <= 4*HOST_BITS_PER_WIDEST_FAST_INT
ea78578f 297#define CLEAR_HARD_REG_SET(TO) \
b3694847 298do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
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299 scan_tp_[0] = 0; \
300 scan_tp_[1] = 0; \
301 scan_tp_[2] = 0; \
302 scan_tp_[3] = 0; } while (0)
303
304#define SET_HARD_REG_SET(TO) \
b3694847 305do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
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306 scan_tp_[0] = -1; \
307 scan_tp_[1] = -1; \
308 scan_tp_[2] = -1; \
309 scan_tp_[3] = -1; } while (0)
310
311#define COPY_HARD_REG_SET(TO, FROM) \
b3694847 312do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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313 scan_tp_[0] = scan_fp_[0]; \
314 scan_tp_[1] = scan_fp_[1]; \
315 scan_tp_[2] = scan_fp_[2]; \
316 scan_tp_[3] = scan_fp_[3]; } while (0)
317
318#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847 319do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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320 scan_tp_[0] = ~ scan_fp_[0]; \
321 scan_tp_[1] = ~ scan_fp_[1]; \
322 scan_tp_[2] = ~ scan_fp_[2]; \
323 scan_tp_[3] = ~ scan_fp_[3]; } while (0)
324
325#define AND_HARD_REG_SET(TO, FROM) \
b3694847
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326do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
327 scan_tp_[0] &= scan_fp_[0]; \
328 scan_tp_[1] &= scan_fp_[1]; \
329 scan_tp_[2] &= scan_fp_[2]; \
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330 scan_tp_[3] &= scan_fp_[3]; } while (0)
331
332#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 333do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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334 scan_tp_[0] &= ~ scan_fp_[0]; \
335 scan_tp_[1] &= ~ scan_fp_[1]; \
336 scan_tp_[2] &= ~ scan_fp_[2]; \
337 scan_tp_[3] &= ~ scan_fp_[3]; } while (0)
338
339#define IOR_HARD_REG_SET(TO, FROM) \
b3694847 340do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
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341 scan_tp_[0] |= scan_fp_[0]; \
342 scan_tp_[1] |= scan_fp_[1]; \
343 scan_tp_[2] |= scan_fp_[2]; \
344 scan_tp_[3] |= scan_fp_[3]; } while (0)
345
346#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 347do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
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348 scan_tp_[0] |= ~ scan_fp_[0]; \
349 scan_tp_[1] |= ~ scan_fp_[1]; \
350 scan_tp_[2] |= ~ scan_fp_[2]; \
351 scan_tp_[3] |= ~ scan_fp_[3]; } while (0)
352
56b138ae
RS
353static inline bool
354hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
355{
356 return ((x[0] & ~y[0]) == 0
357 && (x[1] & ~y[1]) == 0
358 && (x[2] & ~y[2]) == 0
359 && (x[3] & ~y[3]) == 0);
360}
361
362static inline bool
363hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
364{
365 return x[0] == y[0] && x[1] == y[1] && x[2] == y[2] && x[3] == y[3];
366}
367
368static inline bool
369hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
370{
371 return ((x[0] & y[0]) != 0
372 || (x[1] & y[1]) != 0
373 || (x[2] & y[2]) != 0
374 || (x[3] & y[3]) != 0);
375}
376
377static inline bool
378hard_reg_set_empty_p (const HARD_REG_SET x)
379{
380 return x[0] == 0 && x[1] == 0 && x[2] == 0 && x[3] == 0;
381}
ea78578f 382
ba49cb7b 383#else /* FIRST_PSEUDO_REGISTER > 4*HOST_BITS_PER_WIDEST_FAST_INT */
ea78578f 384
3245eea0 385#define CLEAR_HARD_REG_SET(TO) \
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386do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
387 int i; \
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388 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
389 *scan_tp_++ = 0; } while (0)
390
391#define SET_HARD_REG_SET(TO) \
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392do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
393 int i; \
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394 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
395 *scan_tp_++ = -1; } while (0)
396
397#define COPY_HARD_REG_SET(TO, FROM) \
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398do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
399 int i; \
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400 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
401 *scan_tp_++ = *scan_fp_++; } while (0)
402
403#define COMPL_HARD_REG_SET(TO, FROM) \
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SS
404do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
405 int i; \
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CH
406 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
407 *scan_tp_++ = ~ *scan_fp_++; } while (0)
408
409#define AND_HARD_REG_SET(TO, FROM) \
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SS
410do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
411 int i; \
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412 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
413 *scan_tp_++ &= *scan_fp_++; } while (0)
414
415#define AND_COMPL_HARD_REG_SET(TO, FROM) \
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416do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
417 int i; \
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418 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
419 *scan_tp_++ &= ~ *scan_fp_++; } while (0)
420
421#define IOR_HARD_REG_SET(TO, FROM) \
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422do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
423 int i; \
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CH
424 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
425 *scan_tp_++ |= *scan_fp_++; } while (0)
426
427#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847
SS
428do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
429 int i; \
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CH
430 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
431 *scan_tp_++ |= ~ *scan_fp_++; } while (0)
432
56b138ae
RS
433static inline bool
434hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
435{
436 int i;
437
438 for (i = 0; i < HARD_REG_SET_LONGS; i++)
439 if ((x[i] & ~y[i]) != 0)
440 return false;
441 return true;
442}
443
444static inline bool
445hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
446{
447 int i;
448
449 for (i = 0; i < HARD_REG_SET_LONGS; i++)
450 if (x[i] != y[i])
451 return false;
452 return true;
453}
454
455static inline bool
456hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
457{
458 int i;
459
460 for (i = 0; i < HARD_REG_SET_LONGS; i++)
461 if ((x[i] & y[i]) != 0)
462 return true;
463 return false;
464}
465
466static inline bool
467hard_reg_set_empty_p (const HARD_REG_SET x)
468{
469 int i;
470
471 for (i = 0; i < HARD_REG_SET_LONGS; i++)
472 if (x[i] != 0)
473 return false;
474 return true;
475}
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476
477#endif
ea78578f
MM
478#endif
479#endif
480#endif
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481
482/* Define some standard sets of registers. */
483
484/* Indexed by hard register number, contains 1 for registers
485 that are fixed use (stack pointer, pc, frame pointer, etc.).
486 These are the registers that cannot be used to allocate
487 a pseudo reg whose life does not cross calls. */
488
489extern char fixed_regs[FIRST_PSEUDO_REGISTER];
490
491/* The same info as a HARD_REG_SET. */
492
493extern HARD_REG_SET fixed_reg_set;
494
495/* Indexed by hard register number, contains 1 for registers
496 that are fixed use or are clobbered by function calls.
497 These are the registers that cannot be used to allocate
498 a pseudo reg whose life crosses calls. */
499
500extern char call_used_regs[FIRST_PSEUDO_REGISTER];
501
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502#ifdef CALL_REALLY_USED_REGISTERS
503extern char call_really_used_regs[];
504#endif
505
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506/* The same info as a HARD_REG_SET. */
507
508extern HARD_REG_SET call_used_reg_set;
509
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510/* Registers that we don't want to caller save. */
511extern HARD_REG_SET losing_caller_save_reg_set;
512
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513/* Indexed by hard register number, contains 1 for registers that are
514 fixed use -- i.e. in fixed_regs -- or a function value return register
61f71b34 515 or TARGET_STRUCT_VALUE_RTX or STATIC_CHAIN_REGNUM. These are the
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516 registers that cannot hold quantities across calls even if we are
517 willing to save and restore them. */
518
519extern char call_fixed_regs[FIRST_PSEUDO_REGISTER];
520
521/* The same info as a HARD_REG_SET. */
522
523extern HARD_REG_SET call_fixed_reg_set;
524
525/* Indexed by hard register number, contains 1 for registers
526 that are being used for global register decls.
527 These must be exempt from ordinary flow analysis
528 and are also considered fixed. */
529
530extern char global_regs[FIRST_PSEUDO_REGISTER];
531
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532/* Contains 1 for registers that are set or clobbered by calls. */
533/* ??? Ideally, this would be just call_used_regs plus global_regs, but
534 for someone's bright idea to have call_used_regs strictly include
535 fixed_regs. Which leaves us guessing as to the set of fixed_regs
536 that are actually preserved. We know for sure that those associated
537 with the local stack frame are safe, but scant others. */
538
539extern HARD_REG_SET regs_invalidated_by_call;
540
f5d8c9f4 541#ifdef REG_ALLOC_ORDER
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542/* Table of register numbers in the order in which to try to use them. */
543
3245eea0 544extern int reg_alloc_order[FIRST_PSEUDO_REGISTER];
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545
546/* The inverse of reg_alloc_order. */
547
548extern int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
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549#endif
550
551/* For each reg class, a HARD_REG_SET saying which registers are in it. */
552
f540a7d3 553extern HARD_REG_SET reg_class_contents[N_REG_CLASSES];
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554
555/* For each reg class, number of regs it contains. */
556
770ae6cc 557extern unsigned int reg_class_size[N_REG_CLASSES];
3245eea0 558
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559/* For each pair of reg classes,
560 a largest reg class contained in their union. */
561
562extern enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
563
564/* For each pair of reg classes,
565 the smallest reg class that contains their union. */
566
567extern enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
568
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569/* Vector indexed by hardware reg giving its name. */
570
e087aeb2 571extern const char * reg_names[FIRST_PSEUDO_REGISTER];
96a45535 572
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573/* Vector indexed by reg class giving its name. */
574
575extern const char * reg_class_names[];
576
476c5eb6 577/* Given a hard REGN a FROM mode and a TO mode, return nonzero if
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578 REGN cannot change modes between the specified modes. */
579#define REG_CANNOT_CHANGE_MODE_P(REGN, FROM, TO) \
b0c42aed 580 CANNOT_CHANGE_MODE_CLASS (FROM, TO, REGNO_REG_CLASS (REGN))
cff9f8d5 581
88657302 582#endif /* ! GCC_HARD_REG_SET_H */