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0bb604ca | 1 | /* If-conversion support. |
3aea1f79 | 2 | Copyright (C) 2000-2014 Free Software Foundation, Inc. |
0bb604ca | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
0bb604ca | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by | |
8c4c00c1 | 8 | the Free Software Foundation; either version 3, or (at your option) |
0bb604ca | 9 | any later version. |
10 | ||
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
0bb604ca | 15 | |
16 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
0bb604ca | 19 | |
20 | #include "config.h" | |
21 | #include "system.h" | |
805e22b2 | 22 | #include "coretypes.h" |
23 | #include "tm.h" | |
0bb604ca | 24 | |
25 | #include "rtl.h" | |
26 | #include "regs.h" | |
27 | #include "function.h" | |
28 | #include "flags.h" | |
29 | #include "insn-config.h" | |
30 | #include "recog.h" | |
fe70d0e3 | 31 | #include "except.h" |
d6cb6164 | 32 | #include "hard-reg-set.h" |
0bb604ca | 33 | #include "basic-block.h" |
34 | #include "expr.h" | |
35 | #include "output.h" | |
8ed073f5 | 36 | #include "optabs.h" |
0b205f4c | 37 | #include "diagnostic-core.h" |
0bb604ca | 38 | #include "tm_p.h" |
7f42fe24 | 39 | #include "cfgloop.h" |
a844986a | 40 | #include "target.h" |
77fce4cd | 41 | #include "tree-pass.h" |
3072d30e | 42 | #include "df.h" |
e592f6ea | 43 | #include "vec.h" |
7d75ffa3 | 44 | #include "pointer-set.h" |
4ff06051 | 45 | #include "dbgcnt.h" |
0bb604ca | 46 | |
0bb604ca | 47 | #ifndef HAVE_conditional_move |
48 | #define HAVE_conditional_move 0 | |
49 | #endif | |
50 | #ifndef HAVE_incscc | |
51 | #define HAVE_incscc 0 | |
52 | #endif | |
53 | #ifndef HAVE_decscc | |
54 | #define HAVE_decscc 0 | |
55 | #endif | |
10a2674d | 56 | #ifndef HAVE_trap |
57 | #define HAVE_trap 0 | |
58 | #endif | |
0bb604ca | 59 | |
60 | #ifndef MAX_CONDITIONAL_EXECUTE | |
4a9d7ef7 | 61 | #define MAX_CONDITIONAL_EXECUTE \ |
62 | (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \ | |
63 | + 1) | |
0bb604ca | 64 | #endif |
65 | ||
3072d30e | 66 | #define IFCVT_MULTIPLE_DUMPS 1 |
67 | ||
cd665a06 | 68 | #define NULL_BLOCK ((basic_block) NULL) |
0bb604ca | 69 | |
abd03efe | 70 | /* True if after combine pass. */ |
71 | static bool ifcvt_after_combine; | |
72 | ||
0bb604ca | 73 | /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */ |
74 | static int num_possible_if_blocks; | |
75 | ||
76 | /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional | |
77 | execution. */ | |
78 | static int num_updated_if_blocks; | |
79 | ||
3072d30e | 80 | /* # of changes made. */ |
bdce7739 | 81 | static int num_true_changes; |
0bb604ca | 82 | |
1d855d4c | 83 | /* Whether conditional execution changes were made. */ |
84 | static int cond_exec_changed_p; | |
85 | ||
0bb604ca | 86 | /* Forward references. */ |
7ecb5bb2 | 87 | static int count_bb_insns (const_basic_block); |
0217cfff | 88 | static bool cheap_bb_rtx_cost_p (const_basic_block, int, int); |
952f0048 | 89 | static rtx first_active_insn (basic_block); |
90 | static rtx last_active_insn (basic_block, int); | |
7f91ac8e | 91 | static rtx find_active_insn_before (basic_block, rtx); |
92 | static rtx find_active_insn_after (basic_block, rtx); | |
952f0048 | 93 | static basic_block block_fallthru (basic_block); |
b3e7c666 | 94 | static int cond_exec_process_insns (ce_if_block *, rtx, rtx, rtx, int, int); |
952f0048 | 95 | static rtx cond_exec_get_condition (rtx); |
03dbd7cc | 96 | static rtx noce_get_condition (rtx, rtx *, bool); |
7ecb5bb2 | 97 | static int noce_operand_ok (const_rtx); |
b3e7c666 | 98 | static void merge_if_block (ce_if_block *); |
952f0048 | 99 | static int find_cond_trap (basic_block, edge, edge); |
100 | static basic_block find_if_header (basic_block, int); | |
101 | static int block_jumps_and_fallthru_p (basic_block, basic_block); | |
03dbd7cc | 102 | static int noce_find_if_block (basic_block, edge, edge, int); |
b3e7c666 | 103 | static int cond_exec_find_if_block (ce_if_block *); |
952f0048 | 104 | static int find_if_case_1 (basic_block, edge, edge); |
105 | static int find_if_case_2 (basic_block, edge, edge); | |
952f0048 | 106 | static int dead_or_predicable (basic_block, basic_block, basic_block, |
4115ac36 | 107 | edge, int); |
952f0048 | 108 | static void noce_emit_move_insn (rtx, rtx); |
109 | static rtx block_has_only_trap (basic_block); | |
0bb604ca | 110 | \f |
111 | /* Count the number of non-jump active insns in BB. */ | |
112 | ||
113 | static int | |
7ecb5bb2 | 114 | count_bb_insns (const_basic_block bb) |
0bb604ca | 115 | { |
116 | int count = 0; | |
5496dbfc | 117 | rtx insn = BB_HEAD (bb); |
0bb604ca | 118 | |
119 | while (1) | |
120 | { | |
177a616b | 121 | if (active_insn_p (insn) && !JUMP_P (insn)) |
0bb604ca | 122 | count++; |
123 | ||
5496dbfc | 124 | if (insn == BB_END (bb)) |
0bb604ca | 125 | break; |
126 | insn = NEXT_INSN (insn); | |
127 | } | |
128 | ||
129 | return count; | |
130 | } | |
131 | ||
6c4193b5 | 132 | /* Determine whether the total insn_rtx_cost on non-jump insns in |
133 | basic block BB is less than MAX_COST. This function returns | |
0217cfff | 134 | false if the cost of any instruction could not be estimated. |
135 | ||
136 | The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE | |
137 | as those insns are being speculated. MAX_COST is scaled with SCALE | |
138 | plus a small fudge factor. */ | |
6c01453c | 139 | |
6c4193b5 | 140 | static bool |
0217cfff | 141 | cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost) |
6c01453c | 142 | { |
143 | int count = 0; | |
144 | rtx insn = BB_HEAD (bb); | |
f529eb25 | 145 | bool speed = optimize_bb_for_speed_p (bb); |
6c01453c | 146 | |
abd03efe | 147 | /* Set scale to REG_BR_PROB_BASE to void the identical scaling |
148 | applied to insn_rtx_cost when optimizing for size. Only do | |
149 | this after combine because if-conversion might interfere with | |
150 | passes before combine. | |
151 | ||
152 | Use optimize_function_for_speed_p instead of the pre-defined | |
153 | variable speed to make sure it is set to same value for all | |
154 | basic blocks in one if-conversion transformation. */ | |
155 | if (!optimize_function_for_speed_p (cfun) && ifcvt_after_combine) | |
156 | scale = REG_BR_PROB_BASE; | |
0217cfff | 157 | /* Our branch probability/scaling factors are just estimates and don't |
158 | account for cases where we can get speculation for free and other | |
159 | secondary benefits. So we fudge the scale factor to make speculating | |
abd03efe | 160 | appear a little more profitable when optimizing for performance. */ |
161 | else | |
162 | scale += REG_BR_PROB_BASE / 8; | |
163 | ||
164 | ||
0217cfff | 165 | max_cost *= scale; |
166 | ||
6c01453c | 167 | while (1) |
168 | { | |
0a8a047c | 169 | if (NONJUMP_INSN_P (insn)) |
170 | { | |
0217cfff | 171 | int cost = insn_rtx_cost (PATTERN (insn), speed) * REG_BR_PROB_BASE; |
0a8a047c | 172 | if (cost == 0) |
6c4193b5 | 173 | return false; |
174 | ||
175 | /* If this instruction is the load or set of a "stack" register, | |
176 | such as a floating point register on x87, then the cost of | |
8b5eeb90 | 177 | speculatively executing this insn may need to include |
178 | the additional cost of popping its result off of the | |
179 | register stack. Unfortunately, correctly recognizing and | |
180 | accounting for this additional overhead is tricky, so for | |
181 | now we simply prohibit such speculative execution. */ | |
6c4193b5 | 182 | #ifdef STACK_REGS |
183 | { | |
184 | rtx set = single_set (insn); | |
185 | if (set && STACK_REG_P (SET_DEST (set))) | |
8b5eeb90 | 186 | return false; |
6c4193b5 | 187 | } |
188 | #endif | |
189 | ||
0a8a047c | 190 | count += cost; |
6c4193b5 | 191 | if (count >= max_cost) |
192 | return false; | |
0a8a047c | 193 | } |
194 | else if (CALL_P (insn)) | |
6c4193b5 | 195 | return false; |
e592f6ea | 196 | |
6c01453c | 197 | if (insn == BB_END (bb)) |
198 | break; | |
199 | insn = NEXT_INSN (insn); | |
200 | } | |
201 | ||
6c4193b5 | 202 | return true; |
6c01453c | 203 | } |
204 | ||
0bb604ca | 205 | /* Return the first non-jump active insn in the basic block. */ |
206 | ||
207 | static rtx | |
952f0048 | 208 | first_active_insn (basic_block bb) |
0bb604ca | 209 | { |
5496dbfc | 210 | rtx insn = BB_HEAD (bb); |
0bb604ca | 211 | |
6d7dc5b9 | 212 | if (LABEL_P (insn)) |
0bb604ca | 213 | { |
5496dbfc | 214 | if (insn == BB_END (bb)) |
0bb604ca | 215 | return NULL_RTX; |
216 | insn = NEXT_INSN (insn); | |
217 | } | |
218 | ||
9845d120 | 219 | while (NOTE_P (insn) || DEBUG_INSN_P (insn)) |
0bb604ca | 220 | { |
5496dbfc | 221 | if (insn == BB_END (bb)) |
0bb604ca | 222 | return NULL_RTX; |
223 | insn = NEXT_INSN (insn); | |
224 | } | |
225 | ||
6d7dc5b9 | 226 | if (JUMP_P (insn)) |
0bb604ca | 227 | return NULL_RTX; |
228 | ||
229 | return insn; | |
230 | } | |
231 | ||
1d855d4c | 232 | /* Return the last non-jump active (non-jump) insn in the basic block. */ |
0bb604ca | 233 | |
1d855d4c | 234 | static rtx |
952f0048 | 235 | last_active_insn (basic_block bb, int skip_use_p) |
0bb604ca | 236 | { |
5496dbfc | 237 | rtx insn = BB_END (bb); |
238 | rtx head = BB_HEAD (bb); | |
1d855d4c | 239 | |
6d7dc5b9 | 240 | while (NOTE_P (insn) |
241 | || JUMP_P (insn) | |
9845d120 | 242 | || DEBUG_INSN_P (insn) |
1d855d4c | 243 | || (skip_use_p |
6d7dc5b9 | 244 | && NONJUMP_INSN_P (insn) |
1d855d4c | 245 | && GET_CODE (PATTERN (insn)) == USE)) |
0bb604ca | 246 | { |
1d855d4c | 247 | if (insn == head) |
248 | return NULL_RTX; | |
249 | insn = PREV_INSN (insn); | |
0bb604ca | 250 | } |
0bb604ca | 251 | |
6d7dc5b9 | 252 | if (LABEL_P (insn)) |
1d855d4c | 253 | return NULL_RTX; |
254 | ||
255 | return insn; | |
0bb604ca | 256 | } |
a9a81f26 | 257 | |
7f91ac8e | 258 | /* Return the active insn before INSN inside basic block CURR_BB. */ |
259 | ||
260 | static rtx | |
261 | find_active_insn_before (basic_block curr_bb, rtx insn) | |
262 | { | |
263 | if (!insn || insn == BB_HEAD (curr_bb)) | |
264 | return NULL_RTX; | |
265 | ||
266 | while ((insn = PREV_INSN (insn)) != NULL_RTX) | |
267 | { | |
268 | if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn)) | |
269 | break; | |
270 | ||
271 | /* No other active insn all the way to the start of the basic block. */ | |
272 | if (insn == BB_HEAD (curr_bb)) | |
273 | return NULL_RTX; | |
274 | } | |
275 | ||
276 | return insn; | |
277 | } | |
278 | ||
279 | /* Return the active insn after INSN inside basic block CURR_BB. */ | |
280 | ||
281 | static rtx | |
282 | find_active_insn_after (basic_block curr_bb, rtx insn) | |
283 | { | |
284 | if (!insn || insn == BB_END (curr_bb)) | |
285 | return NULL_RTX; | |
286 | ||
287 | while ((insn = NEXT_INSN (insn)) != NULL_RTX) | |
288 | { | |
289 | if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn)) | |
290 | break; | |
291 | ||
292 | /* No other active insn all the way to the end of the basic block. */ | |
293 | if (insn == BB_END (curr_bb)) | |
294 | return NULL_RTX; | |
295 | } | |
296 | ||
297 | return insn; | |
298 | } | |
299 | ||
672b9f24 | 300 | /* Return the basic block reached by falling though the basic block BB. */ |
1d855d4c | 301 | |
302 | static basic_block | |
952f0048 | 303 | block_fallthru (basic_block bb) |
1d855d4c | 304 | { |
7f58c05e | 305 | edge e = find_fallthru_edge (bb->succs); |
1d855d4c | 306 | |
307 | return (e) ? e->dest : NULL_BLOCK; | |
308 | } | |
0bb604ca | 309 | \f |
310 | /* Go through a bunch of insns, converting them to conditional | |
311 | execution format if possible. Return TRUE if all of the non-note | |
312 | insns were processed. */ | |
313 | ||
314 | static int | |
b3e7c666 | 315 | cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED, |
952f0048 | 316 | /* if block information */rtx start, |
317 | /* first insn to look at */rtx end, | |
318 | /* last insn to look at */rtx test, | |
9eb946de | 319 | /* conditional execution test */int prob_val, |
952f0048 | 320 | /* probability of branch taken. */int mod_ok) |
0bb604ca | 321 | { |
322 | int must_be_last = FALSE; | |
323 | rtx insn; | |
1d855d4c | 324 | rtx xtest; |
7efd6cf1 | 325 | rtx pattern; |
0bb604ca | 326 | |
1d855d4c | 327 | if (!start || !end) |
328 | return FALSE; | |
329 | ||
0bb604ca | 330 | for (insn = start; ; insn = NEXT_INSN (insn)) |
331 | { | |
79d8d931 | 332 | /* dwarf2out can't cope with conditional prologues. */ |
333 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_PROLOGUE_END) | |
334 | return FALSE; | |
335 | ||
9845d120 | 336 | if (NOTE_P (insn) || DEBUG_INSN_P (insn)) |
0bb604ca | 337 | goto insn_done; |
338 | ||
9af5ce0c | 339 | gcc_assert (NONJUMP_INSN_P (insn) || CALL_P (insn)); |
0bb604ca | 340 | |
c1afeae3 | 341 | /* dwarf2out can't cope with conditional unwind info. */ |
97e155b1 | 342 | if (RTX_FRAME_RELATED_P (insn)) |
343 | return FALSE; | |
344 | ||
6e71ac22 | 345 | /* Remove USE insns that get in the way. */ |
346 | if (reload_completed && GET_CODE (PATTERN (insn)) == USE) | |
c56d0c14 | 347 | { |
952f0048 | 348 | /* ??? Ug. Actually unlinking the thing is problematic, |
c56d0c14 | 349 | given what we'd have to coordinate with our callers. */ |
7bd3dcc4 | 350 | SET_INSN_DELETED (insn); |
c56d0c14 | 351 | goto insn_done; |
352 | } | |
353 | ||
0bb604ca | 354 | /* Last insn wasn't last? */ |
355 | if (must_be_last) | |
356 | return FALSE; | |
357 | ||
358 | if (modified_in_p (test, insn)) | |
359 | { | |
360 | if (!mod_ok) | |
361 | return FALSE; | |
362 | must_be_last = TRUE; | |
363 | } | |
364 | ||
365 | /* Now build the conditional form of the instruction. */ | |
7efd6cf1 | 366 | pattern = PATTERN (insn); |
1d855d4c | 367 | xtest = copy_rtx (test); |
368 | ||
369 | /* If this is already a COND_EXEC, rewrite the test to be an AND of the | |
370 | two conditions. */ | |
371 | if (GET_CODE (pattern) == COND_EXEC) | |
372 | { | |
373 | if (GET_MODE (xtest) != GET_MODE (COND_EXEC_TEST (pattern))) | |
374 | return FALSE; | |
375 | ||
376 | xtest = gen_rtx_AND (GET_MODE (xtest), xtest, | |
377 | COND_EXEC_TEST (pattern)); | |
378 | pattern = COND_EXEC_CODE (pattern); | |
379 | } | |
380 | ||
381 | pattern = gen_rtx_COND_EXEC (VOIDmode, xtest, pattern); | |
7efd6cf1 | 382 | |
383 | /* If the machine needs to modify the insn being conditionally executed, | |
384 | say for example to force a constant integer operand into a temp | |
385 | register, do so here. */ | |
386 | #ifdef IFCVT_MODIFY_INSN | |
1d855d4c | 387 | IFCVT_MODIFY_INSN (ce_info, pattern, insn); |
7efd6cf1 | 388 | if (! pattern) |
389 | return FALSE; | |
390 | #endif | |
391 | ||
1d855d4c | 392 | validate_change (insn, &PATTERN (insn), pattern, 1); |
0bb604ca | 393 | |
9eb946de | 394 | if (CALL_P (insn) && prob_val >= 0) |
f7785736 | 395 | validate_change (insn, ®_NOTES (insn), |
9eb946de | 396 | gen_rtx_INT_LIST ((enum machine_mode) REG_BR_PROB, |
397 | prob_val, REG_NOTES (insn)), 1); | |
f7785736 | 398 | |
0bb604ca | 399 | insn_done: |
400 | if (insn == end) | |
401 | break; | |
402 | } | |
403 | ||
404 | return TRUE; | |
405 | } | |
406 | ||
407 | /* Return the condition for a jump. Do not do any special processing. */ | |
408 | ||
409 | static rtx | |
952f0048 | 410 | cond_exec_get_condition (rtx jump) |
0bb604ca | 411 | { |
412 | rtx test_if, cond; | |
413 | ||
b2816317 | 414 | if (any_condjump_p (jump)) |
b9988262 | 415 | test_if = SET_SRC (pc_set (jump)); |
0bb604ca | 416 | else |
417 | return NULL_RTX; | |
418 | cond = XEXP (test_if, 0); | |
419 | ||
420 | /* If this branches to JUMP_LABEL when the condition is false, | |
421 | reverse the condition. */ | |
422 | if (GET_CODE (XEXP (test_if, 2)) == LABEL_REF | |
423 | && XEXP (XEXP (test_if, 2), 0) == JUMP_LABEL (jump)) | |
4bf64bbb | 424 | { |
425 | enum rtx_code rev = reversed_comparison_code (cond, jump); | |
426 | if (rev == UNKNOWN) | |
427 | return NULL_RTX; | |
428 | ||
429 | cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0), | |
430 | XEXP (cond, 1)); | |
431 | } | |
0bb604ca | 432 | |
433 | return cond; | |
434 | } | |
435 | ||
436 | /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it | |
437 | to conditional execution. Return TRUE if we were successful at | |
d30e015b | 438 | converting the block. */ |
0bb604ca | 439 | |
440 | static int | |
b3e7c666 | 441 | cond_exec_process_if_block (ce_if_block * ce_info, |
952f0048 | 442 | /* if block information */int do_multiple_p) |
0bb604ca | 443 | { |
1d855d4c | 444 | basic_block test_bb = ce_info->test_bb; /* last test block */ |
445 | basic_block then_bb = ce_info->then_bb; /* THEN */ | |
446 | basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */ | |
0bb604ca | 447 | rtx test_expr; /* expression in IF_THEN_ELSE that is tested */ |
448 | rtx then_start; /* first insn in THEN block */ | |
449 | rtx then_end; /* last insn + 1 in THEN block */ | |
9a5bbcc2 | 450 | rtx else_start = NULL_RTX; /* first insn in ELSE block or NULL */ |
451 | rtx else_end = NULL_RTX; /* last insn + 1 in ELSE block */ | |
7299020b | 452 | int max; /* max # of insns to convert. */ |
0bb604ca | 453 | int then_mod_ok; /* whether conditional mods are ok in THEN */ |
454 | rtx true_expr; /* test for else block insns */ | |
455 | rtx false_expr; /* test for then block insns */ | |
9eb946de | 456 | int true_prob_val; /* probability of else block */ |
457 | int false_prob_val; /* probability of then block */ | |
84c471f5 | 458 | rtx then_last_head = NULL_RTX; /* Last match at the head of THEN */ |
459 | rtx else_last_head = NULL_RTX; /* Last match at the head of ELSE */ | |
460 | rtx then_first_tail = NULL_RTX; /* First match at the tail of THEN */ | |
461 | rtx else_first_tail = NULL_RTX; /* First match at the tail of ELSE */ | |
462 | int then_n_insns, else_n_insns, n_insns; | |
4bf64bbb | 463 | enum rtx_code false_code; |
9eb946de | 464 | rtx note; |
0bb604ca | 465 | |
1d855d4c | 466 | /* If test is comprised of && or || elements, and we've failed at handling |
467 | all of them together, just use the last test if it is the special case of | |
468 | && elements without an ELSE block. */ | |
469 | if (!do_multiple_p && ce_info->num_multiple_test_blocks) | |
470 | { | |
471 | if (else_bb || ! ce_info->and_and_p) | |
472 | return FALSE; | |
473 | ||
474 | ce_info->test_bb = test_bb = ce_info->last_test_bb; | |
475 | ce_info->num_multiple_test_blocks = 0; | |
476 | ce_info->num_and_and_blocks = 0; | |
477 | ce_info->num_or_or_blocks = 0; | |
478 | } | |
479 | ||
0bb604ca | 480 | /* Find the conditional jump to the ELSE or JOIN part, and isolate |
481 | the test. */ | |
5496dbfc | 482 | test_expr = cond_exec_get_condition (BB_END (test_bb)); |
0bb604ca | 483 | if (! test_expr) |
484 | return FALSE; | |
485 | ||
2580b9b6 | 486 | /* If the conditional jump is more than just a conditional jump, |
487 | then we can not do conditional execution conversion on this block. */ | |
5496dbfc | 488 | if (! onlyjump_p (BB_END (test_bb))) |
2580b9b6 | 489 | return FALSE; |
490 | ||
1d855d4c | 491 | /* Collect the bounds of where we're to search, skipping any labels, jumps |
492 | and notes at the beginning and end of the block. Then count the total | |
493 | number of insns and see if it is small enough to convert. */ | |
494 | then_start = first_active_insn (then_bb); | |
495 | then_end = last_active_insn (then_bb, TRUE); | |
84c471f5 | 496 | then_n_insns = ce_info->num_then_insns = count_bb_insns (then_bb); |
497 | n_insns = then_n_insns; | |
1d855d4c | 498 | max = MAX_CONDITIONAL_EXECUTE; |
0bb604ca | 499 | |
500 | if (else_bb) | |
501 | { | |
84c471f5 | 502 | int n_matching; |
503 | ||
1d855d4c | 504 | max *= 2; |
505 | else_start = first_active_insn (else_bb); | |
506 | else_end = last_active_insn (else_bb, TRUE); | |
84c471f5 | 507 | else_n_insns = ce_info->num_else_insns = count_bb_insns (else_bb); |
508 | n_insns += else_n_insns; | |
509 | ||
510 | /* Look for matching sequences at the head and tail of the two blocks, | |
511 | and limit the range of insns to be converted if possible. */ | |
512 | n_matching = flow_find_cross_jump (then_bb, else_bb, | |
764aef11 | 513 | &then_first_tail, &else_first_tail, |
514 | NULL); | |
84c471f5 | 515 | if (then_first_tail == BB_HEAD (then_bb)) |
516 | then_start = then_end = NULL_RTX; | |
517 | if (else_first_tail == BB_HEAD (else_bb)) | |
518 | else_start = else_end = NULL_RTX; | |
519 | ||
520 | if (n_matching > 0) | |
521 | { | |
522 | if (then_end) | |
7f91ac8e | 523 | then_end = find_active_insn_before (then_bb, then_first_tail); |
84c471f5 | 524 | if (else_end) |
7f91ac8e | 525 | else_end = find_active_insn_before (else_bb, else_first_tail); |
84c471f5 | 526 | n_insns -= 2 * n_matching; |
527 | } | |
528 | ||
964c7827 | 529 | if (then_start |
530 | && else_start | |
531 | && then_n_insns > n_matching | |
532 | && else_n_insns > n_matching) | |
84c471f5 | 533 | { |
534 | int longest_match = MIN (then_n_insns - n_matching, | |
535 | else_n_insns - n_matching); | |
536 | n_matching | |
537 | = flow_find_head_matching_sequence (then_bb, else_bb, | |
538 | &then_last_head, | |
539 | &else_last_head, | |
540 | longest_match); | |
541 | ||
542 | if (n_matching > 0) | |
543 | { | |
544 | rtx insn; | |
545 | ||
546 | /* We won't pass the insns in the head sequence to | |
547 | cond_exec_process_insns, so we need to test them here | |
548 | to make sure that they don't clobber the condition. */ | |
549 | for (insn = BB_HEAD (then_bb); | |
550 | insn != NEXT_INSN (then_last_head); | |
551 | insn = NEXT_INSN (insn)) | |
552 | if (!LABEL_P (insn) && !NOTE_P (insn) | |
553 | && !DEBUG_INSN_P (insn) | |
554 | && modified_in_p (test_expr, insn)) | |
555 | return FALSE; | |
556 | } | |
557 | ||
558 | if (then_last_head == then_end) | |
559 | then_start = then_end = NULL_RTX; | |
560 | if (else_last_head == else_end) | |
561 | else_start = else_end = NULL_RTX; | |
562 | ||
563 | if (n_matching > 0) | |
564 | { | |
565 | if (then_start) | |
7f91ac8e | 566 | then_start = find_active_insn_after (then_bb, then_last_head); |
84c471f5 | 567 | if (else_start) |
7f91ac8e | 568 | else_start = find_active_insn_after (else_bb, else_last_head); |
84c471f5 | 569 | n_insns -= 2 * n_matching; |
570 | } | |
571 | } | |
0bb604ca | 572 | } |
573 | ||
0bb604ca | 574 | if (n_insns > max) |
575 | return FALSE; | |
576 | ||
577 | /* Map test_expr/test_jump into the appropriate MD tests to use on | |
578 | the conditionally executed code. */ | |
952f0048 | 579 | |
0bb604ca | 580 | true_expr = test_expr; |
4bf64bbb | 581 | |
5496dbfc | 582 | false_code = reversed_comparison_code (true_expr, BB_END (test_bb)); |
4bf64bbb | 583 | if (false_code != UNKNOWN) |
584 | false_expr = gen_rtx_fmt_ee (false_code, GET_MODE (true_expr), | |
585 | XEXP (true_expr, 0), XEXP (true_expr, 1)); | |
586 | else | |
587 | false_expr = NULL_RTX; | |
0bb604ca | 588 | |
1d855d4c | 589 | #ifdef IFCVT_MODIFY_TESTS |
590 | /* If the machine description needs to modify the tests, such as setting a | |
591 | conditional execution register from a comparison, it can do so here. */ | |
592 | IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr); | |
593 | ||
8b332087 | 594 | /* See if the conversion failed. */ |
1d855d4c | 595 | if (!true_expr || !false_expr) |
596 | goto fail; | |
597 | #endif | |
598 | ||
9eb946de | 599 | note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX); |
600 | if (note) | |
f7785736 | 601 | { |
9eb946de | 602 | true_prob_val = XINT (note, 0); |
603 | false_prob_val = REG_BR_PROB_BASE - true_prob_val; | |
f7785736 | 604 | } |
605 | else | |
9eb946de | 606 | { |
607 | true_prob_val = -1; | |
608 | false_prob_val = -1; | |
609 | } | |
f7785736 | 610 | |
1d855d4c | 611 | /* If we have && or || tests, do them here. These tests are in the adjacent |
612 | blocks after the first block containing the test. */ | |
613 | if (ce_info->num_multiple_test_blocks > 0) | |
614 | { | |
615 | basic_block bb = test_bb; | |
616 | basic_block last_test_bb = ce_info->last_test_bb; | |
617 | ||
b2976eba | 618 | if (! false_expr) |
619 | goto fail; | |
620 | ||
1d855d4c | 621 | do |
622 | { | |
623 | rtx start, end; | |
624 | rtx t, f; | |
367dc0cd | 625 | enum rtx_code f_code; |
1d855d4c | 626 | |
627 | bb = block_fallthru (bb); | |
628 | start = first_active_insn (bb); | |
629 | end = last_active_insn (bb, TRUE); | |
630 | if (start | |
631 | && ! cond_exec_process_insns (ce_info, start, end, false_expr, | |
632 | false_prob_val, FALSE)) | |
633 | goto fail; | |
634 | ||
635 | /* If the conditional jump is more than just a conditional jump, then | |
636 | we can not do conditional execution conversion on this block. */ | |
5496dbfc | 637 | if (! onlyjump_p (BB_END (bb))) |
1d855d4c | 638 | goto fail; |
639 | ||
640 | /* Find the conditional jump and isolate the test. */ | |
5496dbfc | 641 | t = cond_exec_get_condition (BB_END (bb)); |
1d855d4c | 642 | if (! t) |
643 | goto fail; | |
644 | ||
367dc0cd | 645 | f_code = reversed_comparison_code (t, BB_END (bb)); |
646 | if (f_code == UNKNOWN) | |
647 | goto fail; | |
1d855d4c | 648 | |
367dc0cd | 649 | f = gen_rtx_fmt_ee (f_code, GET_MODE (t), XEXP (t, 0), XEXP (t, 1)); |
1d855d4c | 650 | if (ce_info->and_and_p) |
651 | { | |
652 | t = gen_rtx_AND (GET_MODE (t), true_expr, t); | |
653 | f = gen_rtx_IOR (GET_MODE (t), false_expr, f); | |
654 | } | |
655 | else | |
656 | { | |
657 | t = gen_rtx_IOR (GET_MODE (t), true_expr, t); | |
658 | f = gen_rtx_AND (GET_MODE (t), false_expr, f); | |
659 | } | |
660 | ||
661 | /* If the machine description needs to modify the tests, such as | |
662 | setting a conditional execution register from a comparison, it can | |
663 | do so here. */ | |
664 | #ifdef IFCVT_MODIFY_MULTIPLE_TESTS | |
665 | IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f); | |
666 | ||
8b332087 | 667 | /* See if the conversion failed. */ |
1d855d4c | 668 | if (!t || !f) |
669 | goto fail; | |
670 | #endif | |
671 | ||
672 | true_expr = t; | |
673 | false_expr = f; | |
674 | } | |
675 | while (bb != last_test_bb); | |
676 | } | |
677 | ||
0bb604ca | 678 | /* For IF-THEN-ELSE blocks, we don't allow modifications of the test |
679 | on then THEN block. */ | |
680 | then_mod_ok = (else_bb == NULL_BLOCK); | |
681 | ||
682 | /* Go through the THEN and ELSE blocks converting the insns if possible | |
683 | to conditional execution. */ | |
684 | ||
685 | if (then_end | |
4bf64bbb | 686 | && (! false_expr |
1d855d4c | 687 | || ! cond_exec_process_insns (ce_info, then_start, then_end, |
688 | false_expr, false_prob_val, | |
689 | then_mod_ok))) | |
0bb604ca | 690 | goto fail; |
691 | ||
1d855d4c | 692 | if (else_bb && else_end |
693 | && ! cond_exec_process_insns (ce_info, else_start, else_end, | |
f7785736 | 694 | true_expr, true_prob_val, TRUE)) |
0bb604ca | 695 | goto fail; |
696 | ||
1d855d4c | 697 | /* If we cannot apply the changes, fail. Do not go through the normal fail |
698 | processing, since apply_change_group will call cancel_changes. */ | |
0bb604ca | 699 | if (! apply_change_group ()) |
1d855d4c | 700 | { |
701 | #ifdef IFCVT_MODIFY_CANCEL | |
702 | /* Cancel any machine dependent changes. */ | |
703 | IFCVT_MODIFY_CANCEL (ce_info); | |
704 | #endif | |
705 | return FALSE; | |
706 | } | |
0bb604ca | 707 | |
7efd6cf1 | 708 | #ifdef IFCVT_MODIFY_FINAL |
8b332087 | 709 | /* Do any machine dependent final modifications. */ |
1d855d4c | 710 | IFCVT_MODIFY_FINAL (ce_info); |
7efd6cf1 | 711 | #endif |
712 | ||
0bb604ca | 713 | /* Conversion succeeded. */ |
450d042a | 714 | if (dump_file) |
715 | fprintf (dump_file, "%d insn%s converted to conditional execution.\n", | |
0bb604ca | 716 | n_insns, (n_insns == 1) ? " was" : "s were"); |
717 | ||
84c471f5 | 718 | /* Merge the blocks! If we had matching sequences, make sure to delete one |
719 | copy at the appropriate location first: delete the copy in the THEN branch | |
720 | for a tail sequence so that the remaining one is executed last for both | |
721 | branches, and delete the copy in the ELSE branch for a head sequence so | |
722 | that the remaining one is executed first for both branches. */ | |
723 | if (then_first_tail) | |
724 | { | |
725 | rtx from = then_first_tail; | |
726 | if (!INSN_P (from)) | |
7f91ac8e | 727 | from = find_active_insn_after (then_bb, from); |
84c471f5 | 728 | delete_insn_chain (from, BB_END (then_bb), false); |
729 | } | |
730 | if (else_last_head) | |
731 | delete_insn_chain (first_active_insn (else_bb), else_last_head, false); | |
732 | ||
1d855d4c | 733 | merge_if_block (ce_info); |
734 | cond_exec_changed_p = TRUE; | |
0bb604ca | 735 | return TRUE; |
736 | ||
737 | fail: | |
7efd6cf1 | 738 | #ifdef IFCVT_MODIFY_CANCEL |
739 | /* Cancel any machine dependent changes. */ | |
1d855d4c | 740 | IFCVT_MODIFY_CANCEL (ce_info); |
7efd6cf1 | 741 | #endif |
742 | ||
0bb604ca | 743 | cancel_changes (0); |
744 | return FALSE; | |
745 | } | |
746 | \f | |
952f0048 | 747 | /* Used by noce_process_if_block to communicate with its subroutines. |
0bb604ca | 748 | |
749 | The subroutines know that A and B may be evaluated freely. They | |
952f0048 | 750 | know that X is a register. They should insert new instructions |
0bb604ca | 751 | before cond_earliest. */ |
752 | ||
753 | struct noce_if_info | |
754 | { | |
03dbd7cc | 755 | /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */ |
756 | basic_block test_bb, then_bb, else_bb, join_bb; | |
5b410d6a | 757 | |
758 | /* The jump that ends TEST_BB. */ | |
759 | rtx jump; | |
e592f6ea | 760 | |
5b410d6a | 761 | /* The jump condition. */ |
762 | rtx cond; | |
763 | ||
764 | /* New insns should be inserted before this one. */ | |
765 | rtx cond_earliest; | |
766 | ||
767 | /* Insns in the THEN and ELSE block. There is always just this | |
768 | one insns in those blocks. The insns are single_set insns. | |
769 | If there was no ELSE block, INSN_B is the last insn before | |
770 | COND_EARLIEST, or NULL_RTX. In the former case, the insn | |
771 | operands are still valid, as if INSN_B was moved down below | |
772 | the jump. */ | |
0bb604ca | 773 | rtx insn_a, insn_b; |
5b410d6a | 774 | |
775 | /* The SET_SRC of INSN_A and INSN_B. */ | |
776 | rtx a, b; | |
777 | ||
778 | /* The SET_DEST of INSN_A. */ | |
779 | rtx x; | |
ba45c933 | 780 | |
781 | /* True if this if block is not canonical. In the canonical form of | |
782 | if blocks, the THEN_BB is the block reached via the fallthru edge | |
783 | from TEST_BB. For the noce transformations, we allow the symmetric | |
784 | form as well. */ | |
785 | bool then_else_reversed; | |
4a9d7ef7 | 786 | |
787 | /* Estimated cost of the particular branch instruction. */ | |
788 | int branch_cost; | |
0bb604ca | 789 | }; |
790 | ||
952f0048 | 791 | static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int); |
357b5a1f | 792 | static int noce_try_move (struct noce_if_info *); |
952f0048 | 793 | static int noce_try_store_flag (struct noce_if_info *); |
794 | static int noce_try_addcc (struct noce_if_info *); | |
795 | static int noce_try_store_flag_constants (struct noce_if_info *); | |
796 | static int noce_try_store_flag_mask (struct noce_if_info *); | |
797 | static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx, | |
798 | rtx, rtx, rtx); | |
799 | static int noce_try_cmove (struct noce_if_info *); | |
800 | static int noce_try_cmove_arith (struct noce_if_info *); | |
801 | static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx *); | |
802 | static int noce_try_minmax (struct noce_if_info *); | |
803 | static int noce_try_abs (struct noce_if_info *); | |
1c98eaaa | 804 | static int noce_try_sign_mask (struct noce_if_info *); |
0bb604ca | 805 | |
806 | /* Helper function for noce_try_store_flag*. */ | |
807 | ||
808 | static rtx | |
952f0048 | 809 | noce_emit_store_flag (struct noce_if_info *if_info, rtx x, int reversep, |
810 | int normalize) | |
0bb604ca | 811 | { |
812 | rtx cond = if_info->cond; | |
813 | int cond_complex; | |
814 | enum rtx_code code; | |
815 | ||
816 | cond_complex = (! general_operand (XEXP (cond, 0), VOIDmode) | |
817 | || ! general_operand (XEXP (cond, 1), VOIDmode)); | |
818 | ||
819 | /* If earliest == jump, or when the condition is complex, try to | |
820 | build the store_flag insn directly. */ | |
821 | ||
822 | if (cond_complex) | |
a2d70772 | 823 | { |
824 | rtx set = pc_set (if_info->jump); | |
825 | cond = XEXP (SET_SRC (set), 0); | |
826 | if (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF | |
827 | && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (if_info->jump)) | |
828 | reversep = !reversep; | |
829 | if (if_info->then_else_reversed) | |
830 | reversep = !reversep; | |
831 | } | |
0bb604ca | 832 | |
a3dbed00 | 833 | if (reversep) |
834 | code = reversed_comparison_code (cond, if_info->jump); | |
835 | else | |
836 | code = GET_CODE (cond); | |
837 | ||
0bb604ca | 838 | if ((if_info->cond_earliest == if_info->jump || cond_complex) |
839 | && (normalize == 0 || STORE_FLAG_VALUE == normalize)) | |
840 | { | |
841 | rtx tmp; | |
842 | ||
0bb604ca | 843 | tmp = gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (cond, 0), |
844 | XEXP (cond, 1)); | |
845 | tmp = gen_rtx_SET (VOIDmode, x, tmp); | |
846 | ||
847 | start_sequence (); | |
848 | tmp = emit_insn (tmp); | |
849 | ||
850 | if (recog_memoized (tmp) >= 0) | |
851 | { | |
852 | tmp = get_insns (); | |
853 | end_sequence (); | |
31d3e01c | 854 | emit_insn (tmp); |
0bb604ca | 855 | |
856 | if_info->cond_earliest = if_info->jump; | |
857 | ||
858 | return x; | |
859 | } | |
860 | ||
861 | end_sequence (); | |
862 | } | |
863 | ||
d7f916d2 | 864 | /* Don't even try if the comparison operands or the mode of X are weird. */ |
865 | if (cond_complex || !SCALAR_INT_MODE_P (GET_MODE (x))) | |
0bb604ca | 866 | return NULL_RTX; |
867 | ||
0bb604ca | 868 | return emit_store_flag (x, code, XEXP (cond, 0), |
869 | XEXP (cond, 1), VOIDmode, | |
870 | (code == LTU || code == LEU | |
871 | || code == GEU || code == GTU), normalize); | |
872 | } | |
873 | ||
357b5a1f | 874 | /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART. |
875 | X is the destination/target and Y is the value to copy. */ | |
876 | ||
8b8f1119 | 877 | static void |
952f0048 | 878 | noce_emit_move_insn (rtx x, rtx y) |
8b8f1119 | 879 | { |
cbace8ea | 880 | enum machine_mode outmode; |
8b8f1119 | 881 | rtx outer, inner; |
882 | int bitpos; | |
883 | ||
884 | if (GET_CODE (x) != STRICT_LOW_PART) | |
885 | { | |
9d666332 | 886 | rtx seq, insn, target; |
887 | optab ot; | |
888 | ||
889 | start_sequence (); | |
2b9a6d99 | 890 | /* Check that the SET_SRC is reasonable before calling emit_move_insn, |
891 | otherwise construct a suitable SET pattern ourselves. */ | |
892 | insn = (OBJECT_P (y) || CONSTANT_P (y) || GET_CODE (y) == SUBREG) | |
893 | ? emit_move_insn (x, y) | |
894 | : emit_insn (gen_rtx_SET (VOIDmode, x, y)); | |
9d666332 | 895 | seq = get_insns (); |
d4473c84 | 896 | end_sequence (); |
9d666332 | 897 | |
898 | if (recog_memoized (insn) <= 0) | |
6746fc82 | 899 | { |
900 | if (GET_CODE (x) == ZERO_EXTRACT) | |
901 | { | |
902 | rtx op = XEXP (x, 0); | |
903 | unsigned HOST_WIDE_INT size = INTVAL (XEXP (x, 1)); | |
904 | unsigned HOST_WIDE_INT start = INTVAL (XEXP (x, 2)); | |
905 | ||
e592f6ea | 906 | /* store_bit_field expects START to be relative to |
907 | BYTES_BIG_ENDIAN and adjusts this value for machines with | |
908 | BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to | |
6746fc82 | 909 | invoke store_bit_field again it is necessary to have the START |
910 | value from the first call. */ | |
911 | if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN) | |
912 | { | |
913 | if (MEM_P (op)) | |
914 | start = BITS_PER_UNIT - start - size; | |
915 | else | |
916 | { | |
917 | gcc_assert (REG_P (op)); | |
918 | start = BITS_PER_WORD - start - size; | |
919 | } | |
920 | } | |
9d666332 | 921 | |
6746fc82 | 922 | gcc_assert (start < (MEM_P (op) ? BITS_PER_UNIT : BITS_PER_WORD)); |
4bb60ec7 | 923 | store_bit_field (op, size, start, 0, 0, GET_MODE (x), y); |
6746fc82 | 924 | return; |
925 | } | |
926 | ||
927 | switch (GET_RTX_CLASS (GET_CODE (y))) | |
928 | { | |
929 | case RTX_UNARY: | |
ebb6e3c1 | 930 | ot = code_to_optab (GET_CODE (y)); |
6746fc82 | 931 | if (ot) |
932 | { | |
933 | start_sequence (); | |
934 | target = expand_unop (GET_MODE (y), ot, XEXP (y, 0), x, 0); | |
935 | if (target != NULL_RTX) | |
936 | { | |
937 | if (target != x) | |
938 | emit_move_insn (x, target); | |
939 | seq = get_insns (); | |
940 | } | |
941 | end_sequence (); | |
942 | } | |
943 | break; | |
e592f6ea | 944 | |
6746fc82 | 945 | case RTX_BIN_ARITH: |
946 | case RTX_COMM_ARITH: | |
ebb6e3c1 | 947 | ot = code_to_optab (GET_CODE (y)); |
6746fc82 | 948 | if (ot) |
949 | { | |
950 | start_sequence (); | |
951 | target = expand_binop (GET_MODE (y), ot, | |
952 | XEXP (y, 0), XEXP (y, 1), | |
953 | x, 0, OPTAB_DIRECT); | |
954 | if (target != NULL_RTX) | |
955 | { | |
956 | if (target != x) | |
957 | emit_move_insn (x, target); | |
958 | seq = get_insns (); | |
959 | } | |
960 | end_sequence (); | |
961 | } | |
962 | break; | |
e592f6ea | 963 | |
6746fc82 | 964 | default: |
965 | break; | |
966 | } | |
967 | } | |
e592f6ea | 968 | |
9d666332 | 969 | emit_insn (seq); |
8b8f1119 | 970 | return; |
971 | } | |
972 | ||
973 | outer = XEXP (x, 0); | |
974 | inner = XEXP (outer, 0); | |
975 | outmode = GET_MODE (outer); | |
701e46d0 | 976 | bitpos = SUBREG_BYTE (outer) * BITS_PER_UNIT; |
4bb60ec7 | 977 | store_bit_field (inner, GET_MODE_BITSIZE (outmode), bitpos, |
978 | 0, 0, outmode, y); | |
8b8f1119 | 979 | } |
980 | ||
1a81ce76 | 981 | /* Return sequence of instructions generated by if conversion. This |
982 | function calls end_sequence() to end the current stream, ensures | |
983 | that are instructions are unshared, recognizable non-jump insns. | |
984 | On failure, this function returns a NULL_RTX. */ | |
985 | ||
986 | static rtx | |
987 | end_ifcvt_sequence (struct noce_if_info *if_info) | |
1cd4cfea | 988 | { |
672b9f24 | 989 | rtx insn; |
1a81ce76 | 990 | rtx seq = get_insns (); |
991 | ||
1cd4cfea | 992 | set_used_flags (if_info->x); |
993 | set_used_flags (if_info->cond); | |
79f85ed5 | 994 | set_used_flags (if_info->a); |
995 | set_used_flags (if_info->b); | |
1cd4cfea | 996 | unshare_all_rtl_in_chain (seq); |
1a81ce76 | 997 | end_sequence (); |
998 | ||
672b9f24 | 999 | /* Make sure that all of the instructions emitted are recognizable, |
1000 | and that we haven't introduced a new jump instruction. | |
0870fd6e | 1001 | As an exercise for the reader, build a general mechanism that |
1a81ce76 | 1002 | allows proper placement of required clobbers. */ |
672b9f24 | 1003 | for (insn = seq; insn; insn = NEXT_INSN (insn)) |
6d7dc5b9 | 1004 | if (JUMP_P (insn) |
672b9f24 | 1005 | || recog_memoized (insn) == -1) |
1a81ce76 | 1006 | return NULL_RTX; |
672b9f24 | 1007 | |
1a81ce76 | 1008 | return seq; |
1cd4cfea | 1009 | } |
1010 | ||
357b5a1f | 1011 | /* Convert "if (a != b) x = a; else x = b" into "x = a" and |
1012 | "if (a == b) x = a; else x = b" into "x = b". */ | |
1013 | ||
1014 | static int | |
1015 | noce_try_move (struct noce_if_info *if_info) | |
1016 | { | |
1017 | rtx cond = if_info->cond; | |
1018 | enum rtx_code code = GET_CODE (cond); | |
1019 | rtx y, seq; | |
1020 | ||
1021 | if (code != NE && code != EQ) | |
1022 | return FALSE; | |
1023 | ||
1024 | /* This optimization isn't valid if either A or B could be a NaN | |
1025 | or a signed zero. */ | |
1026 | if (HONOR_NANS (GET_MODE (if_info->x)) | |
1027 | || HONOR_SIGNED_ZEROS (GET_MODE (if_info->x))) | |
1028 | return FALSE; | |
1029 | ||
1030 | /* Check whether the operands of the comparison are A and in | |
1031 | either order. */ | |
1032 | if ((rtx_equal_p (if_info->a, XEXP (cond, 0)) | |
1033 | && rtx_equal_p (if_info->b, XEXP (cond, 1))) | |
1034 | || (rtx_equal_p (if_info->a, XEXP (cond, 1)) | |
1035 | && rtx_equal_p (if_info->b, XEXP (cond, 0)))) | |
1036 | { | |
1037 | y = (code == EQ) ? if_info->a : if_info->b; | |
1038 | ||
1039 | /* Avoid generating the move if the source is the destination. */ | |
1040 | if (! rtx_equal_p (if_info->x, y)) | |
1041 | { | |
1042 | start_sequence (); | |
1043 | noce_emit_move_insn (if_info->x, y); | |
1a81ce76 | 1044 | seq = end_ifcvt_sequence (if_info); |
1045 | if (!seq) | |
1046 | return FALSE; | |
8308e745 | 1047 | |
357b5a1f | 1048 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1049 | INSN_LOCATION (if_info->insn_a)); |
357b5a1f | 1050 | } |
1051 | return TRUE; | |
1052 | } | |
1053 | return FALSE; | |
1054 | } | |
1055 | ||
0bb604ca | 1056 | /* Convert "if (test) x = 1; else x = 0". |
1057 | ||
1058 | Only try 0 and STORE_FLAG_VALUE here. Other combinations will be | |
1059 | tried in noce_try_store_flag_constants after noce_try_cmove has had | |
1060 | a go at the conversion. */ | |
1061 | ||
1062 | static int | |
952f0048 | 1063 | noce_try_store_flag (struct noce_if_info *if_info) |
0bb604ca | 1064 | { |
1065 | int reversep; | |
1066 | rtx target, seq; | |
1067 | ||
971ba038 | 1068 | if (CONST_INT_P (if_info->b) |
0bb604ca | 1069 | && INTVAL (if_info->b) == STORE_FLAG_VALUE |
1070 | && if_info->a == const0_rtx) | |
1071 | reversep = 0; | |
1072 | else if (if_info->b == const0_rtx | |
971ba038 | 1073 | && CONST_INT_P (if_info->a) |
0bb604ca | 1074 | && INTVAL (if_info->a) == STORE_FLAG_VALUE |
a3dbed00 | 1075 | && (reversed_comparison_code (if_info->cond, if_info->jump) |
1076 | != UNKNOWN)) | |
0bb604ca | 1077 | reversep = 1; |
1078 | else | |
1079 | return FALSE; | |
1080 | ||
1081 | start_sequence (); | |
1082 | ||
1083 | target = noce_emit_store_flag (if_info, if_info->x, reversep, 0); | |
1084 | if (target) | |
1085 | { | |
1086 | if (target != if_info->x) | |
8b8f1119 | 1087 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1088 | |
1a81ce76 | 1089 | seq = end_ifcvt_sequence (if_info); |
1090 | if (! seq) | |
1091 | return FALSE; | |
0bb604ca | 1092 | |
1a81ce76 | 1093 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1094 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1095 | return TRUE; |
1096 | } | |
1097 | else | |
1098 | { | |
1099 | end_sequence (); | |
1100 | return FALSE; | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | /* Convert "if (test) x = a; else x = b", for A and B constant. */ | |
1105 | ||
1106 | static int | |
952f0048 | 1107 | noce_try_store_flag_constants (struct noce_if_info *if_info) |
0bb604ca | 1108 | { |
1109 | rtx target, seq; | |
1110 | int reversep; | |
1111 | HOST_WIDE_INT itrue, ifalse, diff, tmp; | |
1112 | int normalize, can_reverse; | |
9dbc42f3 | 1113 | enum machine_mode mode; |
0bb604ca | 1114 | |
971ba038 | 1115 | if (CONST_INT_P (if_info->a) |
1116 | && CONST_INT_P (if_info->b)) | |
0bb604ca | 1117 | { |
9dbc42f3 | 1118 | mode = GET_MODE (if_info->x); |
0bb604ca | 1119 | ifalse = INTVAL (if_info->a); |
1120 | itrue = INTVAL (if_info->b); | |
7f9adb18 | 1121 | |
60141df0 | 1122 | diff = (unsigned HOST_WIDE_INT) itrue - ifalse; |
7f9adb18 | 1123 | /* Make sure we can represent the difference between the two values. */ |
60141df0 | 1124 | if ((diff > 0) |
7f9adb18 | 1125 | != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue)) |
1126 | return FALSE; | |
1127 | ||
60141df0 | 1128 | diff = trunc_int_for_mode (diff, mode); |
0bb604ca | 1129 | |
a3dbed00 | 1130 | can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump) |
1131 | != UNKNOWN); | |
0bb604ca | 1132 | |
1133 | reversep = 0; | |
1134 | if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE) | |
1135 | normalize = 0; | |
1136 | else if (ifalse == 0 && exact_log2 (itrue) >= 0 | |
1137 | && (STORE_FLAG_VALUE == 1 | |
4a9d7ef7 | 1138 | || if_info->branch_cost >= 2)) |
0bb604ca | 1139 | normalize = 1; |
1140 | else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse | |
4a9d7ef7 | 1141 | && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2)) |
0bb604ca | 1142 | normalize = 1, reversep = 1; |
1143 | else if (itrue == -1 | |
1144 | && (STORE_FLAG_VALUE == -1 | |
4a9d7ef7 | 1145 | || if_info->branch_cost >= 2)) |
0bb604ca | 1146 | normalize = -1; |
1147 | else if (ifalse == -1 && can_reverse | |
4a9d7ef7 | 1148 | && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2)) |
0bb604ca | 1149 | normalize = -1, reversep = 1; |
4a9d7ef7 | 1150 | else if ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1) |
1151 | || if_info->branch_cost >= 3) | |
0bb604ca | 1152 | normalize = -1; |
1153 | else | |
1154 | return FALSE; | |
1155 | ||
1156 | if (reversep) | |
952f0048 | 1157 | { |
0bb604ca | 1158 | tmp = itrue; itrue = ifalse; ifalse = tmp; |
60141df0 | 1159 | diff = trunc_int_for_mode (-(unsigned HOST_WIDE_INT) diff, mode); |
0bb604ca | 1160 | } |
1161 | ||
1162 | start_sequence (); | |
1163 | target = noce_emit_store_flag (if_info, if_info->x, reversep, normalize); | |
1164 | if (! target) | |
1165 | { | |
1166 | end_sequence (); | |
1167 | return FALSE; | |
1168 | } | |
1169 | ||
1170 | /* if (test) x = 3; else x = 4; | |
1171 | => x = 3 + (test == 0); */ | |
1172 | if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE) | |
1173 | { | |
ad99e708 | 1174 | target = expand_simple_binop (mode, |
1175 | (diff == STORE_FLAG_VALUE | |
1176 | ? PLUS : MINUS), | |
0359f9f5 | 1177 | gen_int_mode (ifalse, mode), target, |
1178 | if_info->x, 0, OPTAB_WIDEN); | |
0bb604ca | 1179 | } |
1180 | ||
1181 | /* if (test) x = 8; else x = 0; | |
1182 | => x = (test != 0) << 3; */ | |
1183 | else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0) | |
1184 | { | |
ad99e708 | 1185 | target = expand_simple_binop (mode, ASHIFT, |
1186 | target, GEN_INT (tmp), if_info->x, 0, | |
1187 | OPTAB_WIDEN); | |
0bb604ca | 1188 | } |
1189 | ||
1190 | /* if (test) x = -1; else x = b; | |
1191 | => x = -(test != 0) | b; */ | |
1192 | else if (itrue == -1) | |
1193 | { | |
ad99e708 | 1194 | target = expand_simple_binop (mode, IOR, |
0359f9f5 | 1195 | target, gen_int_mode (ifalse, mode), |
1196 | if_info->x, 0, OPTAB_WIDEN); | |
0bb604ca | 1197 | } |
1198 | ||
1199 | /* if (test) x = a; else x = b; | |
1200 | => x = (-(test != 0) & (b - a)) + a; */ | |
1201 | else | |
1202 | { | |
ad99e708 | 1203 | target = expand_simple_binop (mode, AND, |
0359f9f5 | 1204 | target, gen_int_mode (diff, mode), |
1205 | if_info->x, 0, OPTAB_WIDEN); | |
0bb604ca | 1206 | if (target) |
ad99e708 | 1207 | target = expand_simple_binop (mode, PLUS, |
0359f9f5 | 1208 | target, gen_int_mode (ifalse, mode), |
ad99e708 | 1209 | if_info->x, 0, OPTAB_WIDEN); |
0bb604ca | 1210 | } |
1211 | ||
1212 | if (! target) | |
1213 | { | |
1214 | end_sequence (); | |
1215 | return FALSE; | |
1216 | } | |
1217 | ||
1218 | if (target != if_info->x) | |
8b8f1119 | 1219 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1220 | |
1a81ce76 | 1221 | seq = end_ifcvt_sequence (if_info); |
1222 | if (!seq) | |
a9a81f26 | 1223 | return FALSE; |
1224 | ||
1a81ce76 | 1225 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1226 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1227 | return TRUE; |
1228 | } | |
1229 | ||
1230 | return FALSE; | |
1231 | } | |
1232 | ||
952f0048 | 1233 | /* Convert "if (test) foo++" into "foo += (test != 0)", and |
0bb604ca | 1234 | similarly for "foo--". */ |
1235 | ||
1236 | static int | |
952f0048 | 1237 | noce_try_addcc (struct noce_if_info *if_info) |
0bb604ca | 1238 | { |
1239 | rtx target, seq; | |
1240 | int subtract, normalize; | |
1241 | ||
03dbd7cc | 1242 | if (GET_CODE (if_info->a) == PLUS |
9b9797f8 | 1243 | && rtx_equal_p (XEXP (if_info->a, 0), if_info->b) |
a3dbed00 | 1244 | && (reversed_comparison_code (if_info->cond, if_info->jump) |
1245 | != UNKNOWN)) | |
0bb604ca | 1246 | { |
d3da2ad8 | 1247 | rtx cond = if_info->cond; |
1248 | enum rtx_code code = reversed_comparison_code (cond, if_info->jump); | |
0bb604ca | 1249 | |
d3da2ad8 | 1250 | /* First try to use addcc pattern. */ |
4b5189c1 | 1251 | if (general_operand (XEXP (cond, 0), VOIDmode) |
1252 | && general_operand (XEXP (cond, 1), VOIDmode)) | |
0bb604ca | 1253 | { |
4b5189c1 | 1254 | start_sequence (); |
1255 | target = emit_conditional_add (if_info->x, code, | |
1cd4cfea | 1256 | XEXP (cond, 0), |
1257 | XEXP (cond, 1), | |
4b5189c1 | 1258 | VOIDmode, |
1cd4cfea | 1259 | if_info->b, |
1260 | XEXP (if_info->a, 1), | |
4b5189c1 | 1261 | GET_MODE (if_info->x), |
1262 | (code == LTU || code == GEU | |
1263 | || code == LEU || code == GTU)); | |
1264 | if (target) | |
1265 | { | |
1266 | if (target != if_info->x) | |
1267 | noce_emit_move_insn (if_info->x, target); | |
1268 | ||
1a81ce76 | 1269 | seq = end_ifcvt_sequence (if_info); |
1270 | if (!seq) | |
1271 | return FALSE; | |
1272 | ||
13751393 | 1273 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1274 | INSN_LOCATION (if_info->insn_a)); |
4b5189c1 | 1275 | return TRUE; |
1276 | } | |
0bb604ca | 1277 | end_sequence (); |
0bb604ca | 1278 | } |
952f0048 | 1279 | |
d3da2ad8 | 1280 | /* If that fails, construct conditional increment or decrement using |
1281 | setcc. */ | |
4a9d7ef7 | 1282 | if (if_info->branch_cost >= 2 |
d3da2ad8 | 1283 | && (XEXP (if_info->a, 1) == const1_rtx |
1284 | || XEXP (if_info->a, 1) == constm1_rtx)) | |
1285 | { | |
1286 | start_sequence (); | |
1287 | if (STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1))) | |
1288 | subtract = 0, normalize = 0; | |
1289 | else if (-STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1))) | |
1290 | subtract = 1, normalize = 0; | |
1291 | else | |
1292 | subtract = 0, normalize = INTVAL (XEXP (if_info->a, 1)); | |
1293 | ||
1294 | ||
1295 | target = noce_emit_store_flag (if_info, | |
1296 | gen_reg_rtx (GET_MODE (if_info->x)), | |
1297 | 1, normalize); | |
1298 | ||
1299 | if (target) | |
1300 | target = expand_simple_binop (GET_MODE (if_info->x), | |
1301 | subtract ? MINUS : PLUS, | |
9b9797f8 | 1302 | if_info->b, target, if_info->x, |
d3da2ad8 | 1303 | 0, OPTAB_WIDEN); |
1304 | if (target) | |
1305 | { | |
1306 | if (target != if_info->x) | |
1307 | noce_emit_move_insn (if_info->x, target); | |
1308 | ||
1a81ce76 | 1309 | seq = end_ifcvt_sequence (if_info); |
1310 | if (!seq) | |
d3da2ad8 | 1311 | return FALSE; |
1312 | ||
13751393 | 1313 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1314 | INSN_LOCATION (if_info->insn_a)); |
d3da2ad8 | 1315 | return TRUE; |
1316 | } | |
1317 | end_sequence (); | |
1318 | } | |
0bb604ca | 1319 | } |
1320 | ||
1321 | return FALSE; | |
1322 | } | |
1323 | ||
1324 | /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */ | |
1325 | ||
1326 | static int | |
952f0048 | 1327 | noce_try_store_flag_mask (struct noce_if_info *if_info) |
0bb604ca | 1328 | { |
1329 | rtx target, seq; | |
1330 | int reversep; | |
1331 | ||
1332 | reversep = 0; | |
4a9d7ef7 | 1333 | if ((if_info->branch_cost >= 2 |
03dbd7cc | 1334 | || STORE_FLAG_VALUE == -1) |
0bb604ca | 1335 | && ((if_info->a == const0_rtx |
1336 | && rtx_equal_p (if_info->b, if_info->x)) | |
a3dbed00 | 1337 | || ((reversep = (reversed_comparison_code (if_info->cond, |
1338 | if_info->jump) | |
1339 | != UNKNOWN)) | |
0bb604ca | 1340 | && if_info->b == const0_rtx |
1341 | && rtx_equal_p (if_info->a, if_info->x)))) | |
1342 | { | |
1343 | start_sequence (); | |
1344 | target = noce_emit_store_flag (if_info, | |
1345 | gen_reg_rtx (GET_MODE (if_info->x)), | |
1346 | reversep, -1); | |
1347 | if (target) | |
ad99e708 | 1348 | target = expand_simple_binop (GET_MODE (if_info->x), AND, |
1cd4cfea | 1349 | if_info->x, |
1350 | target, if_info->x, 0, | |
ad99e708 | 1351 | OPTAB_WIDEN); |
0bb604ca | 1352 | |
1353 | if (target) | |
1354 | { | |
1355 | if (target != if_info->x) | |
8b8f1119 | 1356 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1357 | |
1a81ce76 | 1358 | seq = end_ifcvt_sequence (if_info); |
1359 | if (!seq) | |
a9a81f26 | 1360 | return FALSE; |
1361 | ||
13751393 | 1362 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1363 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1364 | return TRUE; |
1365 | } | |
1366 | ||
1367 | end_sequence (); | |
1368 | } | |
1369 | ||
1370 | return FALSE; | |
1371 | } | |
1372 | ||
1373 | /* Helper function for noce_try_cmove and noce_try_cmove_arith. */ | |
1374 | ||
1375 | static rtx | |
952f0048 | 1376 | noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code, |
1377 | rtx cmp_a, rtx cmp_b, rtx vfalse, rtx vtrue) | |
0bb604ca | 1378 | { |
cfc70cec | 1379 | rtx target ATTRIBUTE_UNUSED; |
1380 | int unsignedp ATTRIBUTE_UNUSED; | |
caff53db | 1381 | |
0bb604ca | 1382 | /* If earliest == jump, try to build the cmove insn directly. |
1383 | This is helpful when combine has created some complex condition | |
1384 | (like for alpha's cmovlbs) that we can't hope to regenerate | |
1385 | through the normal interface. */ | |
1386 | ||
1387 | if (if_info->cond_earliest == if_info->jump) | |
1388 | { | |
1389 | rtx tmp; | |
1390 | ||
1391 | tmp = gen_rtx_fmt_ee (code, GET_MODE (if_info->cond), cmp_a, cmp_b); | |
1392 | tmp = gen_rtx_IF_THEN_ELSE (GET_MODE (x), tmp, vtrue, vfalse); | |
1393 | tmp = gen_rtx_SET (VOIDmode, x, tmp); | |
1394 | ||
1395 | start_sequence (); | |
1396 | tmp = emit_insn (tmp); | |
1397 | ||
1398 | if (recog_memoized (tmp) >= 0) | |
1399 | { | |
1400 | tmp = get_insns (); | |
1401 | end_sequence (); | |
31d3e01c | 1402 | emit_insn (tmp); |
0bb604ca | 1403 | |
1404 | return x; | |
1405 | } | |
1406 | ||
1407 | end_sequence (); | |
1408 | } | |
1409 | ||
1410 | /* Don't even try if the comparison operands are weird. */ | |
1411 | if (! general_operand (cmp_a, GET_MODE (cmp_a)) | |
1412 | || ! general_operand (cmp_b, GET_MODE (cmp_b))) | |
1413 | return NULL_RTX; | |
1414 | ||
09b53ef8 | 1415 | #if HAVE_conditional_move |
caff53db | 1416 | unsignedp = (code == LTU || code == GEU |
1417 | || code == LEU || code == GTU); | |
1418 | ||
1419 | target = emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode, | |
1420 | vtrue, vfalse, GET_MODE (x), | |
1421 | unsignedp); | |
1422 | if (target) | |
1423 | return target; | |
1424 | ||
1425 | /* We might be faced with a situation like: | |
1426 | ||
1427 | x = (reg:M TARGET) | |
1428 | vtrue = (subreg:M (reg:N VTRUE) BYTE) | |
1429 | vfalse = (subreg:M (reg:N VFALSE) BYTE) | |
1430 | ||
1431 | We can't do a conditional move in mode M, but it's possible that we | |
1432 | could do a conditional move in mode N instead and take a subreg of | |
1433 | the result. | |
1434 | ||
1435 | If we can't create new pseudos, though, don't bother. */ | |
1436 | if (reload_completed) | |
1437 | return NULL_RTX; | |
1438 | ||
1439 | if (GET_CODE (vtrue) == SUBREG && GET_CODE (vfalse) == SUBREG) | |
1440 | { | |
1441 | rtx reg_vtrue = SUBREG_REG (vtrue); | |
1442 | rtx reg_vfalse = SUBREG_REG (vfalse); | |
1443 | unsigned int byte_vtrue = SUBREG_BYTE (vtrue); | |
1444 | unsigned int byte_vfalse = SUBREG_BYTE (vfalse); | |
1445 | rtx promoted_target; | |
1446 | ||
1447 | if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse) | |
1448 | || byte_vtrue != byte_vfalse | |
1449 | || (SUBREG_PROMOTED_VAR_P (vtrue) | |
1450 | != SUBREG_PROMOTED_VAR_P (vfalse)) | |
1451 | || (SUBREG_PROMOTED_UNSIGNED_P (vtrue) | |
1452 | != SUBREG_PROMOTED_UNSIGNED_P (vfalse))) | |
1453 | return NULL_RTX; | |
1454 | ||
1455 | promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue)); | |
1456 | ||
1457 | target = emit_conditional_move (promoted_target, code, cmp_a, cmp_b, | |
1458 | VOIDmode, reg_vtrue, reg_vfalse, | |
1459 | GET_MODE (reg_vtrue), unsignedp); | |
1460 | /* Nope, couldn't do it in that mode either. */ | |
1461 | if (!target) | |
1462 | return NULL_RTX; | |
1463 | ||
1464 | target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue); | |
1465 | SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue); | |
1466 | SUBREG_PROMOTED_UNSIGNED_SET (target, SUBREG_PROMOTED_UNSIGNED_P (vtrue)); | |
1467 | emit_move_insn (x, target); | |
1468 | return x; | |
1469 | } | |
1470 | else | |
1471 | return NULL_RTX; | |
09b53ef8 | 1472 | #else |
1473 | /* We'll never get here, as noce_process_if_block doesn't call the | |
1474 | functions involved. Ifdef code, however, should be discouraged | |
952f0048 | 1475 | because it leads to typos in the code not selected. However, |
09b53ef8 | 1476 | emit_conditional_move won't exist either. */ |
1477 | return NULL_RTX; | |
1478 | #endif | |
0bb604ca | 1479 | } |
1480 | ||
1481 | /* Try only simple constants and registers here. More complex cases | |
1482 | are handled in noce_try_cmove_arith after noce_try_store_flag_arith | |
1483 | has had a go at it. */ | |
1484 | ||
1485 | static int | |
952f0048 | 1486 | noce_try_cmove (struct noce_if_info *if_info) |
0bb604ca | 1487 | { |
1488 | enum rtx_code code; | |
1489 | rtx target, seq; | |
1490 | ||
1491 | if ((CONSTANT_P (if_info->a) || register_operand (if_info->a, VOIDmode)) | |
1492 | && (CONSTANT_P (if_info->b) || register_operand (if_info->b, VOIDmode))) | |
1493 | { | |
1494 | start_sequence (); | |
1495 | ||
1496 | code = GET_CODE (if_info->cond); | |
1497 | target = noce_emit_cmove (if_info, if_info->x, code, | |
1498 | XEXP (if_info->cond, 0), | |
1499 | XEXP (if_info->cond, 1), | |
1500 | if_info->a, if_info->b); | |
1501 | ||
1502 | if (target) | |
1503 | { | |
1504 | if (target != if_info->x) | |
8b8f1119 | 1505 | noce_emit_move_insn (if_info->x, target); |
0bb604ca | 1506 | |
1a81ce76 | 1507 | seq = end_ifcvt_sequence (if_info); |
1508 | if (!seq) | |
1509 | return FALSE; | |
1510 | ||
13751393 | 1511 | emit_insn_before_setloc (seq, if_info->jump, |
5169661d | 1512 | INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1513 | return TRUE; |
1514 | } | |
1515 | else | |
1516 | { | |
1517 | end_sequence (); | |
1518 | return FALSE; | |
1519 | } | |
1520 | } | |
1521 | ||
1522 | return FALSE; | |
1523 | } | |
1524 | ||
1525 | /* Try more complex cases involving conditional_move. */ | |
1526 | ||
1527 | static int | |
952f0048 | 1528 | noce_try_cmove_arith (struct noce_if_info *if_info) |
0bb604ca | 1529 | { |
1530 | rtx a = if_info->a; | |
1531 | rtx b = if_info->b; | |
1532 | rtx x = if_info->x; | |
e1abb347 | 1533 | rtx orig_a, orig_b; |
0bb604ca | 1534 | rtx insn_a, insn_b; |
1535 | rtx tmp, target; | |
1536 | int is_mem = 0; | |
57ee590e | 1537 | int insn_cost; |
0bb604ca | 1538 | enum rtx_code code; |
1539 | ||
1540 | /* A conditional move from two memory sources is equivalent to a | |
1541 | conditional on their addresses followed by a load. Don't do this | |
1542 | early because it'll screw alias analysis. Note that we've | |
1543 | already checked for no side effects. */ | |
03dbd7cc | 1544 | /* ??? FIXME: Magic number 5. */ |
1545 | if (cse_not_expected | |
e16ceb8e | 1546 | && MEM_P (a) && MEM_P (b) |
bd1a81f7 | 1547 | && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b) |
4a9d7ef7 | 1548 | && if_info->branch_cost >= 5) |
0bb604ca | 1549 | { |
87cf5753 | 1550 | enum machine_mode address_mode = get_address_mode (a); |
98155838 | 1551 | |
0bb604ca | 1552 | a = XEXP (a, 0); |
1553 | b = XEXP (b, 0); | |
98155838 | 1554 | x = gen_reg_rtx (address_mode); |
0bb604ca | 1555 | is_mem = 1; |
1556 | } | |
1557 | ||
1558 | /* ??? We could handle this if we knew that a load from A or B could | |
1c448b92 | 1559 | not trap or fault. This is also true if we've already loaded |
0bb604ca | 1560 | from the address along the path from ENTRY. */ |
1c448b92 | 1561 | else if (may_trap_or_fault_p (a) || may_trap_or_fault_p (b)) |
0bb604ca | 1562 | return FALSE; |
1563 | ||
1564 | /* if (test) x = a + b; else x = c - d; | |
1565 | => y = a + b; | |
1566 | x = c - d; | |
1567 | if (test) | |
1568 | x = y; | |
1569 | */ | |
952f0048 | 1570 | |
0bb604ca | 1571 | code = GET_CODE (if_info->cond); |
1572 | insn_a = if_info->insn_a; | |
1573 | insn_b = if_info->insn_b; | |
1574 | ||
57ee590e | 1575 | /* Total insn_rtx_cost should be smaller than branch cost. Exit |
1576 | if insn_rtx_cost can't be estimated. */ | |
1577 | if (insn_a) | |
1578 | { | |
76b61550 | 1579 | insn_cost |
1580 | = insn_rtx_cost (PATTERN (insn_a), | |
1581 | optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a))); | |
4a9d7ef7 | 1582 | if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost)) |
57ee590e | 1583 | return FALSE; |
1584 | } | |
1585 | else | |
7d4c98bc | 1586 | insn_cost = 0; |
1587 | ||
1588 | if (insn_b) | |
57ee590e | 1589 | { |
76b61550 | 1590 | insn_cost |
1591 | += insn_rtx_cost (PATTERN (insn_b), | |
1592 | optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b))); | |
4a9d7ef7 | 1593 | if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost)) |
7d4c98bc | 1594 | return FALSE; |
57ee590e | 1595 | } |
1596 | ||
0bb604ca | 1597 | /* Possibly rearrange operands to make things come out more natural. */ |
a3dbed00 | 1598 | if (reversed_comparison_code (if_info->cond, if_info->jump) != UNKNOWN) |
0bb604ca | 1599 | { |
1600 | int reversep = 0; | |
1601 | if (rtx_equal_p (b, x)) | |
1602 | reversep = 1; | |
1603 | else if (general_operand (b, GET_MODE (b))) | |
1604 | reversep = 1; | |
1605 | ||
1606 | if (reversep) | |
1607 | { | |
a3dbed00 | 1608 | code = reversed_comparison_code (if_info->cond, if_info->jump); |
0bb604ca | 1609 | tmp = a, a = b, b = tmp; |
1610 | tmp = insn_a, insn_a = insn_b, insn_b = tmp; | |
1611 | } | |
1612 | } | |
1613 | ||
1614 | start_sequence (); | |
1615 | ||
e1abb347 | 1616 | orig_a = a; |
1617 | orig_b = b; | |
1618 | ||
0bb604ca | 1619 | /* If either operand is complex, load it into a register first. |
1620 | The best way to do this is to copy the original insn. In this | |
952f0048 | 1621 | way we preserve any clobbers etc that the insn may have had. |
0bb604ca | 1622 | This is of course not possible in the IS_MEM case. */ |
1623 | if (! general_operand (a, GET_MODE (a))) | |
1624 | { | |
1625 | rtx set; | |
1626 | ||
0bb604ca | 1627 | if (is_mem) |
1628 | { | |
1629 | tmp = gen_reg_rtx (GET_MODE (a)); | |
1630 | tmp = emit_insn (gen_rtx_SET (VOIDmode, tmp, a)); | |
1631 | } | |
1632 | else if (! insn_a) | |
1633 | goto end_seq_and_fail; | |
1634 | else | |
1635 | { | |
1636 | a = gen_reg_rtx (GET_MODE (a)); | |
1637 | tmp = copy_rtx (insn_a); | |
1638 | set = single_set (tmp); | |
1639 | SET_DEST (set) = a; | |
1640 | tmp = emit_insn (PATTERN (tmp)); | |
1641 | } | |
1642 | if (recog_memoized (tmp) < 0) | |
1643 | goto end_seq_and_fail; | |
1644 | } | |
1645 | if (! general_operand (b, GET_MODE (b))) | |
1646 | { | |
e1abb347 | 1647 | rtx set, last; |
0bb604ca | 1648 | |
0bb604ca | 1649 | if (is_mem) |
1650 | { | |
1651 | tmp = gen_reg_rtx (GET_MODE (b)); | |
e1abb347 | 1652 | tmp = gen_rtx_SET (VOIDmode, tmp, b); |
0bb604ca | 1653 | } |
1654 | else if (! insn_b) | |
1655 | goto end_seq_and_fail; | |
1656 | else | |
1657 | { | |
1658 | b = gen_reg_rtx (GET_MODE (b)); | |
1659 | tmp = copy_rtx (insn_b); | |
1660 | set = single_set (tmp); | |
1661 | SET_DEST (set) = b; | |
e1abb347 | 1662 | tmp = PATTERN (tmp); |
1663 | } | |
1664 | ||
1665 | /* If insn to set up A clobbers any registers B depends on, try to | |
1666 | swap insn that sets up A with the one that sets up B. If even | |
1667 | that doesn't help, punt. */ | |
1668 | last = get_last_insn (); | |
1669 | if (last && modified_in_p (orig_b, last)) | |
1670 | { | |
1671 | tmp = emit_insn_before (tmp, get_insns ()); | |
1672 | if (modified_in_p (orig_a, tmp)) | |
1673 | goto end_seq_and_fail; | |
0bb604ca | 1674 | } |
e1abb347 | 1675 | else |
1676 | tmp = emit_insn (tmp); | |
1677 | ||
0bb604ca | 1678 | if (recog_memoized (tmp) < 0) |
1679 | goto end_seq_and_fail; | |
1680 | } | |
1681 | ||
1682 | target = noce_emit_cmove (if_info, x, code, XEXP (if_info->cond, 0), | |
1683 | XEXP (if_info->cond, 1), a, b); | |
1684 | ||
1685 | if (! target) | |
1686 | goto end_seq_and_fail; | |
1687 | ||
1688 | /* If we're handling a memory for above, emit the load now. */ | |
1689 | if (is_mem) | |
1690 | { | |
1691 | tmp = gen_rtx_MEM (GET_MODE (if_info->x), target); | |
1692 | ||
1693 | /* Copy over flags as appropriate. */ | |
1694 | if (MEM_VOLATILE_P (if_info->a) || MEM_VOLATILE_P (if_info->b)) | |
1695 | MEM_VOLATILE_P (tmp) = 1; | |
0bb604ca | 1696 | if (MEM_ALIAS_SET (if_info->a) == MEM_ALIAS_SET (if_info->b)) |
ab6ab77e | 1697 | set_mem_alias_set (tmp, MEM_ALIAS_SET (if_info->a)); |
2a631e19 | 1698 | set_mem_align (tmp, |
1699 | MIN (MEM_ALIGN (if_info->a), MEM_ALIGN (if_info->b))); | |
0bb604ca | 1700 | |
bd1a81f7 | 1701 | gcc_assert (MEM_ADDR_SPACE (if_info->a) == MEM_ADDR_SPACE (if_info->b)); |
1702 | set_mem_addr_space (tmp, MEM_ADDR_SPACE (if_info->a)); | |
1703 | ||
8b8f1119 | 1704 | noce_emit_move_insn (if_info->x, tmp); |
0bb604ca | 1705 | } |
1706 | else if (target != x) | |
8b8f1119 | 1707 | noce_emit_move_insn (x, target); |
0bb604ca | 1708 | |
1a81ce76 | 1709 | tmp = end_ifcvt_sequence (if_info); |
1710 | if (!tmp) | |
1711 | return FALSE; | |
1712 | ||
5169661d | 1713 | emit_insn_before_setloc (tmp, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
0bb604ca | 1714 | return TRUE; |
1715 | ||
1716 | end_seq_and_fail: | |
1717 | end_sequence (); | |
1718 | return FALSE; | |
1719 | } | |
1720 | ||
4f63c6d1 | 1721 | /* For most cases, the simplified condition we found is the best |
1722 | choice, but this is not the case for the min/max/abs transforms. | |
1723 | For these we wish to know that it is A or B in the condition. */ | |
1724 | ||
1725 | static rtx | |
952f0048 | 1726 | noce_get_alt_condition (struct noce_if_info *if_info, rtx target, |
1727 | rtx *earliest) | |
4f63c6d1 | 1728 | { |
1729 | rtx cond, set, insn; | |
1730 | int reverse; | |
1731 | ||
1732 | /* If target is already mentioned in the known condition, return it. */ | |
1733 | if (reg_mentioned_p (target, if_info->cond)) | |
1734 | { | |
1735 | *earliest = if_info->cond_earliest; | |
1736 | return if_info->cond; | |
1737 | } | |
1738 | ||
1739 | set = pc_set (if_info->jump); | |
1740 | cond = XEXP (SET_SRC (set), 0); | |
1741 | reverse | |
1742 | = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF | |
1743 | && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (if_info->jump); | |
ba45c933 | 1744 | if (if_info->then_else_reversed) |
1745 | reverse = !reverse; | |
4f63c6d1 | 1746 | |
e5198b6c | 1747 | /* If we're looking for a constant, try to make the conditional |
1748 | have that constant in it. There are two reasons why it may | |
1749 | not have the constant we want: | |
1750 | ||
1751 | 1. GCC may have needed to put the constant in a register, because | |
1752 | the target can't compare directly against that constant. For | |
1753 | this case, we look for a SET immediately before the comparison | |
1754 | that puts a constant in that register. | |
1755 | ||
1756 | 2. GCC may have canonicalized the conditional, for example | |
1757 | replacing "if x < 4" with "if x <= 3". We can undo that (or | |
1758 | make equivalent types of changes) to get the constants we need | |
1759 | if they're off by one in the right direction. */ | |
1760 | ||
971ba038 | 1761 | if (CONST_INT_P (target)) |
e5198b6c | 1762 | { |
1763 | enum rtx_code code = GET_CODE (if_info->cond); | |
1764 | rtx op_a = XEXP (if_info->cond, 0); | |
1765 | rtx op_b = XEXP (if_info->cond, 1); | |
1766 | rtx prev_insn; | |
1767 | ||
1768 | /* First, look to see if we put a constant in a register. */ | |
76d4a3e1 | 1769 | prev_insn = prev_nonnote_insn (if_info->cond_earliest); |
e5198b6c | 1770 | if (prev_insn |
90bd219d | 1771 | && BLOCK_FOR_INSN (prev_insn) |
1772 | == BLOCK_FOR_INSN (if_info->cond_earliest) | |
e5198b6c | 1773 | && INSN_P (prev_insn) |
1774 | && GET_CODE (PATTERN (prev_insn)) == SET) | |
1775 | { | |
1776 | rtx src = find_reg_equal_equiv_note (prev_insn); | |
1777 | if (!src) | |
1778 | src = SET_SRC (PATTERN (prev_insn)); | |
971ba038 | 1779 | if (CONST_INT_P (src)) |
e5198b6c | 1780 | { |
1781 | if (rtx_equal_p (op_a, SET_DEST (PATTERN (prev_insn)))) | |
97e1cc10 | 1782 | op_a = src; |
e5198b6c | 1783 | else if (rtx_equal_p (op_b, SET_DEST (PATTERN (prev_insn)))) |
97e1cc10 | 1784 | op_b = src; |
e5198b6c | 1785 | |
971ba038 | 1786 | if (CONST_INT_P (op_a)) |
e5198b6c | 1787 | { |
1788 | rtx tmp = op_a; | |
1789 | op_a = op_b; | |
1790 | op_b = tmp; | |
1791 | code = swap_condition (code); | |
1792 | } | |
1793 | } | |
1794 | } | |
1795 | ||
1796 | /* Now, look to see if we can get the right constant by | |
1797 | adjusting the conditional. */ | |
971ba038 | 1798 | if (CONST_INT_P (op_b)) |
e5198b6c | 1799 | { |
1800 | HOST_WIDE_INT desired_val = INTVAL (target); | |
1801 | HOST_WIDE_INT actual_val = INTVAL (op_b); | |
1802 | ||
1803 | switch (code) | |
1804 | { | |
1805 | case LT: | |
1806 | if (actual_val == desired_val + 1) | |
1807 | { | |
1808 | code = LE; | |
1809 | op_b = GEN_INT (desired_val); | |
1810 | } | |
1811 | break; | |
1812 | case LE: | |
1813 | if (actual_val == desired_val - 1) | |
1814 | { | |
1815 | code = LT; | |
1816 | op_b = GEN_INT (desired_val); | |
1817 | } | |
1818 | break; | |
1819 | case GT: | |
1820 | if (actual_val == desired_val - 1) | |
1821 | { | |
1822 | code = GE; | |
1823 | op_b = GEN_INT (desired_val); | |
1824 | } | |
1825 | break; | |
1826 | case GE: | |
1827 | if (actual_val == desired_val + 1) | |
1828 | { | |
1829 | code = GT; | |
1830 | op_b = GEN_INT (desired_val); | |
1831 | } | |
1832 | break; | |
1833 | default: | |
1834 | break; | |
1835 | } | |
1836 | } | |
1837 | ||
1838 | /* If we made any changes, generate a new conditional that is | |
1839 | equivalent to what we started with, but has the right | |
1840 | constants in it. */ | |
1841 | if (code != GET_CODE (if_info->cond) | |
1842 | || op_a != XEXP (if_info->cond, 0) | |
1843 | || op_b != XEXP (if_info->cond, 1)) | |
1844 | { | |
1845 | cond = gen_rtx_fmt_ee (code, GET_MODE (cond), op_a, op_b); | |
1846 | *earliest = if_info->cond_earliest; | |
1847 | return cond; | |
1848 | } | |
1849 | } | |
1850 | ||
4f63c6d1 | 1851 | cond = canonicalize_condition (if_info->jump, cond, reverse, |
a255f65a | 1852 | earliest, target, false, true); |
4f63c6d1 | 1853 | if (! cond || ! reg_mentioned_p (target, cond)) |
1854 | return NULL; | |
1855 | ||
1856 | /* We almost certainly searched back to a different place. | |
1857 | Need to re-verify correct lifetimes. */ | |
1858 | ||
1859 | /* X may not be mentioned in the range (cond_earliest, jump]. */ | |
1860 | for (insn = if_info->jump; insn != *earliest; insn = PREV_INSN (insn)) | |
95c02608 | 1861 | if (INSN_P (insn) && reg_overlap_mentioned_p (if_info->x, PATTERN (insn))) |
4f63c6d1 | 1862 | return NULL; |
1863 | ||
1864 | /* A and B may not be modified in the range [cond_earliest, jump). */ | |
1865 | for (insn = *earliest; insn != if_info->jump; insn = NEXT_INSN (insn)) | |
1866 | if (INSN_P (insn) | |
1867 | && (modified_in_p (if_info->a, insn) | |
1868 | || modified_in_p (if_info->b, insn))) | |
1869 | return NULL; | |
1870 | ||
1871 | return cond; | |
1872 | } | |
1873 | ||
1874 | /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */ | |
1875 | ||
1876 | static int | |
952f0048 | 1877 | noce_try_minmax (struct noce_if_info *if_info) |
1878 | { | |
4f63c6d1 | 1879 | rtx cond, earliest, target, seq; |
ad99e708 | 1880 | enum rtx_code code, op; |
4f63c6d1 | 1881 | int unsignedp; |
4f63c6d1 | 1882 | |
920d0fb5 | 1883 | /* ??? Reject modes with NaNs or signed zeros since we don't know how |
1884 | they will be resolved with an SMIN/SMAX. It wouldn't be too hard | |
4f63c6d1 | 1885 | to get the target to tell us... */ |
920d0fb5 | 1886 | if (HONOR_SIGNED_ZEROS (GET_MODE (if_info->x)) |
1887 | || HONOR_NANS (GET_MODE (if_info->x))) | |
4f63c6d1 | 1888 | return FALSE; |
1889 | ||
1890 | cond = noce_get_alt_condition (if_info, if_info->a, &earliest); | |
1891 | if (!cond) | |
1892 | return FALSE; | |
1893 | ||
1894 | /* Verify the condition is of the form we expect, and canonicalize | |
1895 | the comparison code. */ | |
1896 | code = GET_CODE (cond); | |
1897 | if (rtx_equal_p (XEXP (cond, 0), if_info->a)) | |
1898 | { | |
1899 | if (! rtx_equal_p (XEXP (cond, 1), if_info->b)) | |
1900 | return FALSE; | |
1901 | } | |
1902 | else if (rtx_equal_p (XEXP (cond, 1), if_info->a)) | |
1903 | { | |
1904 | if (! rtx_equal_p (XEXP (cond, 0), if_info->b)) | |
1905 | return FALSE; | |
1906 | code = swap_condition (code); | |
1907 | } | |
1908 | else | |
1909 | return FALSE; | |
1910 | ||
1911 | /* Determine what sort of operation this is. Note that the code is for | |
1912 | a taken branch, so the code->operation mapping appears backwards. */ | |
1913 | switch (code) | |
1914 | { | |
1915 | case LT: | |
1916 | case LE: | |
1917 | case UNLT: | |
1918 | case UNLE: | |
ad99e708 | 1919 | op = SMAX; |
4f63c6d1 | 1920 | unsignedp = 0; |
1921 | break; | |
1922 | case GT: | |
1923 | case GE: | |
1924 | case UNGT: | |
1925 | case UNGE: | |
ad99e708 | 1926 | op = SMIN; |
4f63c6d1 | 1927 | unsignedp = 0; |
1928 | break; | |
1929 | case LTU: | |
1930 | case LEU: | |
ad99e708 | 1931 | op = UMAX; |
4f63c6d1 | 1932 | unsignedp = 1; |
1933 | break; | |
1934 | case GTU: | |
1935 | case GEU: | |
ad99e708 | 1936 | op = UMIN; |
4f63c6d1 | 1937 | unsignedp = 1; |
1938 | break; | |
1939 | default: | |
1940 | return FALSE; | |
1941 | } | |
1942 | ||
1943 | start_sequence (); | |
1944 | ||
ad99e708 | 1945 | target = expand_simple_binop (GET_MODE (if_info->x), op, |
1946 | if_info->a, if_info->b, | |
1947 | if_info->x, unsignedp, OPTAB_WIDEN); | |
4f63c6d1 | 1948 | if (! target) |
1949 | { | |
1950 | end_sequence (); | |
1951 | return FALSE; | |
1952 | } | |
1953 | if (target != if_info->x) | |
8b8f1119 | 1954 | noce_emit_move_insn (if_info->x, target); |
4f63c6d1 | 1955 | |
1a81ce76 | 1956 | seq = end_ifcvt_sequence (if_info); |
1957 | if (!seq) | |
4f63c6d1 | 1958 | return FALSE; |
1959 | ||
5169661d | 1960 | emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
4f63c6d1 | 1961 | if_info->cond = cond; |
1962 | if_info->cond_earliest = earliest; | |
1963 | ||
1964 | return TRUE; | |
1965 | } | |
1966 | ||
94e08e50 | 1967 | /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);", |
1968 | "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);", | |
1969 | etc. */ | |
4f63c6d1 | 1970 | |
1971 | static int | |
952f0048 | 1972 | noce_try_abs (struct noce_if_info *if_info) |
1973 | { | |
4f63c6d1 | 1974 | rtx cond, earliest, target, seq, a, b, c; |
1975 | int negate; | |
94e08e50 | 1976 | bool one_cmpl = false; |
4f63c6d1 | 1977 | |
01e93ec4 | 1978 | /* Reject modes with signed zeros. */ |
1979 | if (HONOR_SIGNED_ZEROS (GET_MODE (if_info->x))) | |
1980 | return FALSE; | |
1981 | ||
76d4a3e1 | 1982 | /* Recognize A and B as constituting an ABS or NABS. The canonical |
1983 | form is a branch around the negation, taken when the object is the | |
1984 | first operand of a comparison against 0 that evaluates to true. */ | |
4f63c6d1 | 1985 | a = if_info->a; |
1986 | b = if_info->b; | |
1987 | if (GET_CODE (a) == NEG && rtx_equal_p (XEXP (a, 0), b)) | |
1988 | negate = 0; | |
1989 | else if (GET_CODE (b) == NEG && rtx_equal_p (XEXP (b, 0), a)) | |
1990 | { | |
1991 | c = a; a = b; b = c; | |
1992 | negate = 1; | |
1993 | } | |
94e08e50 | 1994 | else if (GET_CODE (a) == NOT && rtx_equal_p (XEXP (a, 0), b)) |
1995 | { | |
1996 | negate = 0; | |
1997 | one_cmpl = true; | |
1998 | } | |
1999 | else if (GET_CODE (b) == NOT && rtx_equal_p (XEXP (b, 0), a)) | |
2000 | { | |
2001 | c = a; a = b; b = c; | |
2002 | negate = 1; | |
2003 | one_cmpl = true; | |
2004 | } | |
4f63c6d1 | 2005 | else |
2006 | return FALSE; | |
952f0048 | 2007 | |
4f63c6d1 | 2008 | cond = noce_get_alt_condition (if_info, b, &earliest); |
2009 | if (!cond) | |
2010 | return FALSE; | |
2011 | ||
2012 | /* Verify the condition is of the form we expect. */ | |
2013 | if (rtx_equal_p (XEXP (cond, 0), b)) | |
2014 | c = XEXP (cond, 1); | |
2015 | else if (rtx_equal_p (XEXP (cond, 1), b)) | |
76d4a3e1 | 2016 | { |
2017 | c = XEXP (cond, 0); | |
2018 | negate = !negate; | |
2019 | } | |
4f63c6d1 | 2020 | else |
2021 | return FALSE; | |
2022 | ||
76d4a3e1 | 2023 | /* Verify that C is zero. Search one step backward for a |
2024 | REG_EQUAL note or a simple source if necessary. */ | |
4f63c6d1 | 2025 | if (REG_P (c)) |
2026 | { | |
76d4a3e1 | 2027 | rtx set, insn = prev_nonnote_insn (earliest); |
2028 | if (insn | |
90bd219d | 2029 | && BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (earliest) |
76d4a3e1 | 2030 | && (set = single_set (insn)) |
2031 | && rtx_equal_p (SET_DEST (set), c)) | |
2032 | { | |
2033 | rtx note = find_reg_equal_equiv_note (insn); | |
2034 | if (note) | |
2035 | c = XEXP (note, 0); | |
2036 | else | |
2037 | c = SET_SRC (set); | |
2038 | } | |
2039 | else | |
4f63c6d1 | 2040 | return FALSE; |
4f63c6d1 | 2041 | } |
e16ceb8e | 2042 | if (MEM_P (c) |
4f63c6d1 | 2043 | && GET_CODE (XEXP (c, 0)) == SYMBOL_REF |
2044 | && CONSTANT_POOL_ADDRESS_P (XEXP (c, 0))) | |
2045 | c = get_pool_constant (XEXP (c, 0)); | |
2046 | ||
2047 | /* Work around funny ideas get_condition has wrt canonicalization. | |
952f0048 | 2048 | Note that these rtx constants are known to be CONST_INT, and |
4f63c6d1 | 2049 | therefore imply integer comparisons. */ |
2050 | if (c == constm1_rtx && GET_CODE (cond) == GT) | |
2051 | ; | |
2052 | else if (c == const1_rtx && GET_CODE (cond) == LT) | |
2053 | ; | |
2054 | else if (c != CONST0_RTX (GET_MODE (b))) | |
2055 | return FALSE; | |
2056 | ||
2057 | /* Determine what sort of operation this is. */ | |
2058 | switch (GET_CODE (cond)) | |
2059 | { | |
2060 | case LT: | |
2061 | case LE: | |
2062 | case UNLT: | |
2063 | case UNLE: | |
2064 | negate = !negate; | |
2065 | break; | |
2066 | case GT: | |
2067 | case GE: | |
2068 | case UNGT: | |
2069 | case UNGE: | |
2070 | break; | |
2071 | default: | |
2072 | return FALSE; | |
2073 | } | |
2074 | ||
2075 | start_sequence (); | |
94e08e50 | 2076 | if (one_cmpl) |
2077 | target = expand_one_cmpl_abs_nojump (GET_MODE (if_info->x), b, | |
2078 | if_info->x); | |
2079 | else | |
2080 | target = expand_abs_nojump (GET_MODE (if_info->x), b, if_info->x, 1); | |
4f63c6d1 | 2081 | |
40e55fbb | 2082 | /* ??? It's a quandary whether cmove would be better here, especially |
4f63c6d1 | 2083 | for integers. Perhaps combine will clean things up. */ |
2084 | if (target && negate) | |
94e08e50 | 2085 | { |
2086 | if (one_cmpl) | |
2087 | target = expand_simple_unop (GET_MODE (target), NOT, target, | |
2088 | if_info->x, 0); | |
2089 | else | |
2090 | target = expand_simple_unop (GET_MODE (target), NEG, target, | |
2091 | if_info->x, 0); | |
2092 | } | |
4f63c6d1 | 2093 | |
2094 | if (! target) | |
2095 | { | |
2096 | end_sequence (); | |
2097 | return FALSE; | |
2098 | } | |
2099 | ||
2100 | if (target != if_info->x) | |
8b8f1119 | 2101 | noce_emit_move_insn (if_info->x, target); |
4f63c6d1 | 2102 | |
1a81ce76 | 2103 | seq = end_ifcvt_sequence (if_info); |
2104 | if (!seq) | |
4f63c6d1 | 2105 | return FALSE; |
2106 | ||
5169661d | 2107 | emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
4f63c6d1 | 2108 | if_info->cond = cond; |
2109 | if_info->cond_earliest = earliest; | |
2110 | ||
2111 | return TRUE; | |
2112 | } | |
2113 | ||
1c98eaaa | 2114 | /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */ |
2115 | ||
2116 | static int | |
2117 | noce_try_sign_mask (struct noce_if_info *if_info) | |
2118 | { | |
2119 | rtx cond, t, m, c, seq; | |
2120 | enum machine_mode mode; | |
2121 | enum rtx_code code; | |
5a14b2b4 | 2122 | bool t_unconditional; |
1c98eaaa | 2123 | |
1c98eaaa | 2124 | cond = if_info->cond; |
2125 | code = GET_CODE (cond); | |
2126 | m = XEXP (cond, 0); | |
2127 | c = XEXP (cond, 1); | |
2128 | ||
2129 | t = NULL_RTX; | |
2130 | if (if_info->a == const0_rtx) | |
2131 | { | |
2132 | if ((code == LT && c == const0_rtx) | |
2133 | || (code == LE && c == constm1_rtx)) | |
2134 | t = if_info->b; | |
2135 | } | |
2136 | else if (if_info->b == const0_rtx) | |
2137 | { | |
2138 | if ((code == GE && c == const0_rtx) | |
2139 | || (code == GT && c == constm1_rtx)) | |
2140 | t = if_info->a; | |
2141 | } | |
2142 | ||
2143 | if (! t || side_effects_p (t)) | |
2144 | return FALSE; | |
2145 | ||
2146 | /* We currently don't handle different modes. */ | |
2147 | mode = GET_MODE (t); | |
2148 | if (GET_MODE (m) != mode) | |
2149 | return FALSE; | |
2150 | ||
5a14b2b4 | 2151 | /* This is only profitable if T is unconditionally executed/evaluated in the |
2152 | original insn sequence or T is cheap. The former happens if B is the | |
2153 | non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no | |
2154 | INSN_B which can happen for e.g. conditional stores to memory. For the | |
2155 | cost computation use the block TEST_BB where the evaluation will end up | |
2156 | after the transformation. */ | |
2157 | t_unconditional = | |
2158 | (t == if_info->b | |
2159 | && (if_info->insn_b == NULL_RTX | |
2160 | || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb)); | |
2161 | if (!(t_unconditional | |
7013e87c | 2162 | || (set_src_cost (t, optimize_bb_for_speed_p (if_info->test_bb)) |
5a14b2b4 | 2163 | < COSTS_N_INSNS (2)))) |
1c98eaaa | 2164 | return FALSE; |
2165 | ||
2166 | start_sequence (); | |
29852f1d | 2167 | /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding |
2168 | "(signed) m >> 31" directly. This benefits targets with specialized | |
2169 | insns to obtain the signmask, but still uses ashr_optab otherwise. */ | |
2170 | m = emit_store_flag (gen_reg_rtx (mode), LT, m, const0_rtx, mode, 0, -1); | |
1c98eaaa | 2171 | t = m ? expand_binop (mode, and_optab, m, t, NULL_RTX, 0, OPTAB_DIRECT) |
2172 | : NULL_RTX; | |
2173 | ||
2174 | if (!t) | |
2175 | { | |
2176 | end_sequence (); | |
2177 | return FALSE; | |
2178 | } | |
2179 | ||
2180 | noce_emit_move_insn (if_info->x, t); | |
1a81ce76 | 2181 | |
2182 | seq = end_ifcvt_sequence (if_info); | |
2183 | if (!seq) | |
2184 | return FALSE; | |
2185 | ||
5169661d | 2186 | emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); |
1c98eaaa | 2187 | return TRUE; |
2188 | } | |
2189 | ||
2190 | ||
9d666332 | 2191 | /* Optimize away "if (x & C) x |= C" and similar bit manipulation |
2192 | transformations. */ | |
2193 | ||
2194 | static int | |
2195 | noce_try_bitop (struct noce_if_info *if_info) | |
2196 | { | |
2197 | rtx cond, x, a, result, seq; | |
2198 | enum machine_mode mode; | |
2199 | enum rtx_code code; | |
2200 | int bitnum; | |
2201 | ||
2202 | x = if_info->x; | |
2203 | cond = if_info->cond; | |
2204 | code = GET_CODE (cond); | |
2205 | ||
2206 | /* Check for no else condition. */ | |
2207 | if (! rtx_equal_p (x, if_info->b)) | |
2208 | return FALSE; | |
2209 | ||
2210 | /* Check for a suitable condition. */ | |
2211 | if (code != NE && code != EQ) | |
2212 | return FALSE; | |
2213 | if (XEXP (cond, 1) != const0_rtx) | |
2214 | return FALSE; | |
2215 | cond = XEXP (cond, 0); | |
2216 | ||
2217 | /* ??? We could also handle AND here. */ | |
2218 | if (GET_CODE (cond) == ZERO_EXTRACT) | |
2219 | { | |
2220 | if (XEXP (cond, 1) != const1_rtx | |
971ba038 | 2221 | || !CONST_INT_P (XEXP (cond, 2)) |
9d666332 | 2222 | || ! rtx_equal_p (x, XEXP (cond, 0))) |
2223 | return FALSE; | |
2224 | bitnum = INTVAL (XEXP (cond, 2)); | |
2225 | mode = GET_MODE (x); | |
1d75ed51 | 2226 | if (BITS_BIG_ENDIAN) |
2227 | bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum; | |
2228 | if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT) | |
9d666332 | 2229 | return FALSE; |
2230 | } | |
2231 | else | |
2232 | return FALSE; | |
2233 | ||
2234 | a = if_info->a; | |
2235 | if (GET_CODE (a) == IOR || GET_CODE (a) == XOR) | |
2236 | { | |
2237 | /* Check for "if (X & C) x = x op C". */ | |
2238 | if (! rtx_equal_p (x, XEXP (a, 0)) | |
971ba038 | 2239 | || !CONST_INT_P (XEXP (a, 1)) |
9d666332 | 2240 | || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode)) |
2241 | != (unsigned HOST_WIDE_INT) 1 << bitnum) | |
2242 | return FALSE; | |
2243 | ||
2244 | /* if ((x & C) == 0) x |= C; is transformed to x |= C. */ | |
2245 | /* if ((x & C) != 0) x |= C; is transformed to nothing. */ | |
2246 | if (GET_CODE (a) == IOR) | |
2247 | result = (code == NE) ? a : NULL_RTX; | |
2248 | else if (code == NE) | |
2249 | { | |
2250 | /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */ | |
2251 | result = gen_int_mode ((HOST_WIDE_INT) 1 << bitnum, mode); | |
2252 | result = simplify_gen_binary (IOR, mode, x, result); | |
2253 | } | |
2254 | else | |
2255 | { | |
2256 | /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */ | |
2257 | result = gen_int_mode (~((HOST_WIDE_INT) 1 << bitnum), mode); | |
2258 | result = simplify_gen_binary (AND, mode, x, result); | |
2259 | } | |
2260 | } | |
2261 | else if (GET_CODE (a) == AND) | |
2262 | { | |
2263 | /* Check for "if (X & C) x &= ~C". */ | |
2264 | if (! rtx_equal_p (x, XEXP (a, 0)) | |
971ba038 | 2265 | || !CONST_INT_P (XEXP (a, 1)) |
9d666332 | 2266 | || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode)) |
2267 | != (~((HOST_WIDE_INT) 1 << bitnum) & GET_MODE_MASK (mode))) | |
2268 | return FALSE; | |
2269 | ||
2270 | /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */ | |
2271 | /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */ | |
2272 | result = (code == EQ) ? a : NULL_RTX; | |
2273 | } | |
2274 | else | |
2275 | return FALSE; | |
2276 | ||
2277 | if (result) | |
2278 | { | |
2279 | start_sequence (); | |
2280 | noce_emit_move_insn (x, result); | |
2281 | seq = end_ifcvt_sequence (if_info); | |
2282 | if (!seq) | |
2283 | return FALSE; | |
2284 | ||
2285 | emit_insn_before_setloc (seq, if_info->jump, | |
5169661d | 2286 | INSN_LOCATION (if_info->insn_a)); |
9d666332 | 2287 | } |
2288 | return TRUE; | |
2289 | } | |
2290 | ||
2291 | ||
a95cabb9 | 2292 | /* Similar to get_condition, only the resulting condition must be |
03dbd7cc | 2293 | valid at JUMP, instead of at EARLIEST. |
2294 | ||
ba45c933 | 2295 | If THEN_ELSE_REVERSED is true, the fallthrough does not go to the |
2296 | THEN block of the caller, and we have to reverse the condition. */ | |
0bb604ca | 2297 | |
2298 | static rtx | |
03dbd7cc | 2299 | noce_get_condition (rtx jump, rtx *earliest, bool then_else_reversed) |
0bb604ca | 2300 | { |
a255f65a | 2301 | rtx cond, set, tmp; |
a95cabb9 | 2302 | bool reverse; |
0bb604ca | 2303 | |
b2816317 | 2304 | if (! any_condjump_p (jump)) |
0bb604ca | 2305 | return NULL_RTX; |
2306 | ||
b2816317 | 2307 | set = pc_set (jump); |
2308 | ||
a95cabb9 | 2309 | /* If this branches to JUMP_LABEL when the condition is false, |
2310 | reverse the condition. */ | |
2311 | reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF | |
2312 | && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump)); | |
2313 | ||
ba45c933 | 2314 | /* We may have to reverse because the caller's if block is not canonical, |
2315 | i.e. the THEN block isn't the fallthrough block for the TEST block | |
2316 | (see find_if_header). */ | |
03dbd7cc | 2317 | if (then_else_reversed) |
2318 | reverse = !reverse; | |
2319 | ||
a95cabb9 | 2320 | /* If the condition variable is a register and is MODE_INT, accept it. */ |
2321 | ||
b2816317 | 2322 | cond = XEXP (SET_SRC (set), 0); |
a95cabb9 | 2323 | tmp = XEXP (cond, 0); |
68b509aa | 2324 | if (REG_P (tmp) && GET_MODE_CLASS (GET_MODE (tmp)) == MODE_INT |
2325 | && (GET_MODE (tmp) != BImode | |
2326 | || !targetm.small_register_classes_for_mode_p (BImode))) | |
0bb604ca | 2327 | { |
2328 | *earliest = jump; | |
2329 | ||
a95cabb9 | 2330 | if (reverse) |
0bb604ca | 2331 | cond = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond)), |
a95cabb9 | 2332 | GET_MODE (cond), tmp, XEXP (cond, 1)); |
2333 | return cond; | |
0bb604ca | 2334 | } |
0bb604ca | 2335 | |
a95cabb9 | 2336 | /* Otherwise, fall back on canonicalize_condition to do the dirty |
2337 | work of manipulating MODE_CC values and COMPARE rtx codes. */ | |
3fdc20c8 | 2338 | tmp = canonicalize_condition (jump, cond, reverse, earliest, |
2339 | NULL_RTX, false, true); | |
2340 | ||
2341 | /* We don't handle side-effects in the condition, like handling | |
2342 | REG_INC notes and making sure no duplicate conditions are emitted. */ | |
2343 | if (tmp != NULL_RTX && side_effects_p (tmp)) | |
2344 | return NULL_RTX; | |
2345 | ||
2346 | return tmp; | |
0bb604ca | 2347 | } |
2348 | ||
4f63c6d1 | 2349 | /* Return true if OP is ok for if-then-else processing. */ |
2350 | ||
2351 | static int | |
7ecb5bb2 | 2352 | noce_operand_ok (const_rtx op) |
4f63c6d1 | 2353 | { |
4f63c6d1 | 2354 | if (side_effects_p (op)) |
2355 | return FALSE; | |
2356 | ||
4074c133 | 2357 | /* We special-case memories, so handle any of them with |
2358 | no address side effects. */ | |
c616bb5c | 2359 | if (MEM_P (op)) |
2360 | return ! side_effects_p (XEXP (op, 0)); | |
2361 | ||
4f63c6d1 | 2362 | return ! may_trap_p (op); |
2363 | } | |
2364 | ||
c049cb4d | 2365 | /* Return true if a write into MEM may trap or fault. */ |
2366 | ||
2367 | static bool | |
7ecb5bb2 | 2368 | noce_mem_write_may_trap_or_fault_p (const_rtx mem) |
c049cb4d | 2369 | { |
2370 | rtx addr; | |
2371 | ||
2372 | if (MEM_READONLY_P (mem)) | |
2373 | return true; | |
2374 | ||
2375 | if (may_trap_or_fault_p (mem)) | |
2376 | return true; | |
2377 | ||
2378 | addr = XEXP (mem, 0); | |
2379 | ||
2380 | /* Call target hook to avoid the effects of -fpic etc.... */ | |
2381 | addr = targetm.delegitimize_address (addr); | |
2382 | ||
2383 | while (addr) | |
2384 | switch (GET_CODE (addr)) | |
2385 | { | |
2386 | case CONST: | |
2387 | case PRE_DEC: | |
2388 | case PRE_INC: | |
2389 | case POST_DEC: | |
2390 | case POST_INC: | |
2391 | case POST_MODIFY: | |
2392 | addr = XEXP (addr, 0); | |
2393 | break; | |
2394 | case LO_SUM: | |
2395 | case PRE_MODIFY: | |
2396 | addr = XEXP (addr, 1); | |
2397 | break; | |
2398 | case PLUS: | |
971ba038 | 2399 | if (CONST_INT_P (XEXP (addr, 1))) |
c049cb4d | 2400 | addr = XEXP (addr, 0); |
2401 | else | |
2402 | return false; | |
2403 | break; | |
2404 | case LABEL_REF: | |
2405 | return true; | |
2406 | case SYMBOL_REF: | |
2407 | if (SYMBOL_REF_DECL (addr) | |
2408 | && decl_readonly_section (SYMBOL_REF_DECL (addr), 0)) | |
2409 | return true; | |
2410 | return false; | |
2411 | default: | |
2412 | return false; | |
2413 | } | |
2414 | ||
2415 | return false; | |
2416 | } | |
2417 | ||
e92e4c4f | 2418 | /* Return whether we can use store speculation for MEM. TOP_BB is the |
2419 | basic block above the conditional block where we are considering | |
2420 | doing the speculative store. We look for whether MEM is set | |
2421 | unconditionally later in the function. */ | |
2422 | ||
2423 | static bool | |
2424 | noce_can_store_speculate_p (basic_block top_bb, const_rtx mem) | |
2425 | { | |
2426 | basic_block dominator; | |
2427 | ||
2428 | for (dominator = get_immediate_dominator (CDI_POST_DOMINATORS, top_bb); | |
2429 | dominator != NULL; | |
2430 | dominator = get_immediate_dominator (CDI_POST_DOMINATORS, dominator)) | |
2431 | { | |
2432 | rtx insn; | |
2433 | ||
2434 | FOR_BB_INSNS (dominator, insn) | |
2435 | { | |
2436 | /* If we see something that might be a memory barrier, we | |
2437 | have to stop looking. Even if the MEM is set later in | |
2438 | the function, we still don't want to set it | |
2439 | unconditionally before the barrier. */ | |
2440 | if (INSN_P (insn) | |
2441 | && (volatile_insn_p (PATTERN (insn)) | |
9c2a0c05 | 2442 | || (CALL_P (insn) && (!RTL_CONST_CALL_P (insn))))) |
e92e4c4f | 2443 | return false; |
2444 | ||
43b6ba45 | 2445 | if (memory_must_be_modified_in_insn_p (mem, insn)) |
e92e4c4f | 2446 | return true; |
2447 | if (modified_in_p (XEXP (mem, 0), insn)) | |
2448 | return false; | |
2449 | ||
2450 | } | |
2451 | } | |
2452 | ||
2453 | return false; | |
2454 | } | |
2455 | ||
03dbd7cc | 2456 | /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert |
2457 | it without using conditional execution. Return TRUE if we were successful | |
2458 | at converting the block. */ | |
0bb604ca | 2459 | |
2460 | static int | |
03dbd7cc | 2461 | noce_process_if_block (struct noce_if_info *if_info) |
0bb604ca | 2462 | { |
03dbd7cc | 2463 | basic_block test_bb = if_info->test_bb; /* test block */ |
2464 | basic_block then_bb = if_info->then_bb; /* THEN */ | |
2465 | basic_block else_bb = if_info->else_bb; /* ELSE or NULL */ | |
2466 | basic_block join_bb = if_info->join_bb; /* JOIN */ | |
2467 | rtx jump = if_info->jump; | |
2468 | rtx cond = if_info->cond; | |
1d855d4c | 2469 | rtx insn_a, insn_b; |
2470 | rtx set_a, set_b; | |
2471 | rtx orig_x, x, a, b; | |
1d855d4c | 2472 | |
0bb604ca | 2473 | /* We're looking for patterns of the form |
2474 | ||
2475 | (1) if (...) x = a; else x = b; | |
2476 | (2) x = b; if (...) x = a; | |
2477 | (3) if (...) x = a; // as if with an initial x = x. | |
2478 | ||
2479 | The later patterns require jumps to be more expensive. | |
2480 | ||
2481 | ??? For future expansion, look for multiple X in such patterns. */ | |
2482 | ||
0bb604ca | 2483 | /* Look for one of the potential sets. */ |
2484 | insn_a = first_active_insn (then_bb); | |
2485 | if (! insn_a | |
1d855d4c | 2486 | || insn_a != last_active_insn (then_bb, FALSE) |
0bb604ca | 2487 | || (set_a = single_set (insn_a)) == NULL_RTX) |
2488 | return FALSE; | |
2489 | ||
2490 | x = SET_DEST (set_a); | |
2491 | a = SET_SRC (set_a); | |
2492 | ||
2493 | /* Look for the other potential set. Make sure we've got equivalent | |
2494 | destinations. */ | |
2495 | /* ??? This is overconservative. Storing to two different mems is | |
2496 | as easy as conditionally computing the address. Storing to a | |
2497 | single mem merely requires a scratch memory to use as one of the | |
2498 | destination addresses; often the memory immediately below the | |
2499 | stack pointer is available for this. */ | |
2500 | set_b = NULL_RTX; | |
2501 | if (else_bb) | |
2502 | { | |
2503 | insn_b = first_active_insn (else_bb); | |
2504 | if (! insn_b | |
1d855d4c | 2505 | || insn_b != last_active_insn (else_bb, FALSE) |
0bb604ca | 2506 | || (set_b = single_set (insn_b)) == NULL_RTX |
2507 | || ! rtx_equal_p (x, SET_DEST (set_b))) | |
2508 | return FALSE; | |
2509 | } | |
2510 | else | |
2511 | { | |
5b8537a8 | 2512 | insn_b = prev_nonnote_nondebug_insn (if_info->cond_earliest); |
704a64ba | 2513 | /* We're going to be moving the evaluation of B down from above |
2514 | COND_EARLIEST to JUMP. Make sure the relevant data is still | |
2515 | intact. */ | |
0bb604ca | 2516 | if (! insn_b |
90bd219d | 2517 | || BLOCK_FOR_INSN (insn_b) != BLOCK_FOR_INSN (if_info->cond_earliest) |
6d7dc5b9 | 2518 | || !NONJUMP_INSN_P (insn_b) |
0bb604ca | 2519 | || (set_b = single_set (insn_b)) == NULL_RTX |
2520 | || ! rtx_equal_p (x, SET_DEST (set_b)) | |
ba0b5cfc | 2521 | || ! noce_operand_ok (SET_SRC (set_b)) |
068fc551 | 2522 | || reg_overlap_mentioned_p (x, SET_SRC (set_b)) |
9845d120 | 2523 | || modified_between_p (SET_SRC (set_b), insn_b, jump) |
d2592cd7 | 2524 | /* Avoid extending the lifetime of hard registers on small |
2525 | register class machines. */ | |
2526 | || (REG_P (SET_SRC (set_b)) | |
2527 | && HARD_REGISTER_P (SET_SRC (set_b)) | |
2528 | && targetm.small_register_classes_for_mode_p | |
2529 | (GET_MODE (SET_SRC (set_b)))) | |
704a64ba | 2530 | /* Likewise with X. In particular this can happen when |
2531 | noce_get_condition looks farther back in the instruction | |
2532 | stream than one might expect. */ | |
2533 | || reg_overlap_mentioned_p (x, cond) | |
2534 | || reg_overlap_mentioned_p (x, a) | |
9845d120 | 2535 | || modified_between_p (x, insn_b, jump)) |
0bb604ca | 2536 | insn_b = set_b = NULL_RTX; |
2537 | } | |
1040c303 | 2538 | |
2539 | /* If x has side effects then only the if-then-else form is safe to | |
2540 | convert. But even in that case we would need to restore any notes | |
952f0048 | 2541 | (such as REG_INC) at then end. That can be tricky if |
1040c303 | 2542 | noce_emit_move_insn expands to more than one insn, so disable the |
2543 | optimization entirely for now if there are side effects. */ | |
2544 | if (side_effects_p (x)) | |
2545 | return FALSE; | |
2546 | ||
0bb604ca | 2547 | b = (set_b ? SET_SRC (set_b) : x); |
2548 | ||
2549 | /* Only operate on register destinations, and even then avoid extending | |
2550 | the lifetime of hard registers on small register class machines. */ | |
2551 | orig_x = x; | |
8ad4c111 | 2552 | if (!REG_P (x) |
ed5527ca | 2553 | || (HARD_REGISTER_P (x) |
2554 | && targetm.small_register_classes_for_mode_p (GET_MODE (x)))) | |
0bb604ca | 2555 | { |
03dbd7cc | 2556 | if (GET_MODE (x) == BLKmode) |
0bb604ca | 2557 | return FALSE; |
6746fc82 | 2558 | |
590c3166 | 2559 | if (GET_CODE (x) == ZERO_EXTRACT |
971ba038 | 2560 | && (!CONST_INT_P (XEXP (x, 1)) |
2561 | || !CONST_INT_P (XEXP (x, 2)))) | |
6746fc82 | 2562 | return FALSE; |
e592f6ea | 2563 | |
8b8f1119 | 2564 | x = gen_reg_rtx (GET_MODE (GET_CODE (x) == STRICT_LOW_PART |
2565 | ? XEXP (x, 0) : x)); | |
0bb604ca | 2566 | } |
2567 | ||
2568 | /* Don't operate on sources that may trap or are volatile. */ | |
4f63c6d1 | 2569 | if (! noce_operand_ok (a) || ! noce_operand_ok (b)) |
0bb604ca | 2570 | return FALSE; |
2571 | ||
ba0b5cfc | 2572 | retry: |
0bb604ca | 2573 | /* Set up the info block for our subroutines. */ |
03dbd7cc | 2574 | if_info->insn_a = insn_a; |
2575 | if_info->insn_b = insn_b; | |
2576 | if_info->x = x; | |
2577 | if_info->a = a; | |
2578 | if_info->b = b; | |
0bb604ca | 2579 | |
2580 | /* Try optimizations in some approximation of a useful order. */ | |
2581 | /* ??? Should first look to see if X is live incoming at all. If it | |
2582 | isn't, we don't need anything but an unconditional set. */ | |
2583 | ||
2584 | /* Look and see if A and B are really the same. Avoid creating silly | |
2585 | cmove constructs that no one will fix up later. */ | |
2586 | if (rtx_equal_p (a, b)) | |
2587 | { | |
2588 | /* If we have an INSN_B, we don't have to create any new rtl. Just | |
2589 | move the instruction that we already have. If we don't have an | |
2590 | INSN_B, that means that A == X, and we've got a noop move. In | |
2591 | that case don't do anything and let the code below delete INSN_A. */ | |
2592 | if (insn_b && else_bb) | |
2593 | { | |
6a8939cc | 2594 | rtx note; |
2595 | ||
5496dbfc | 2596 | if (else_bb && insn_b == BB_END (else_bb)) |
2597 | BB_END (else_bb) = PREV_INSN (insn_b); | |
068fc551 | 2598 | reorder_insns (insn_b, insn_b, PREV_INSN (jump)); |
6a8939cc | 2599 | |
2600 | /* If there was a REG_EQUAL note, delete it since it may have been | |
2601 | true due to this insn being after a jump. */ | |
2602 | if ((note = find_reg_note (insn_b, REG_EQUAL, NULL_RTX)) != 0) | |
2603 | remove_note (insn_b, note); | |
2604 | ||
0bb604ca | 2605 | insn_b = NULL_RTX; |
0bb604ca | 2606 | } |
8403001e | 2607 | /* If we have "x = b; if (...) x = a;", and x has side-effects, then |
2608 | x must be executed twice. */ | |
2609 | else if (insn_b && side_effects_p (orig_x)) | |
2610 | return FALSE; | |
952f0048 | 2611 | |
86e44551 | 2612 | x = orig_x; |
0bb604ca | 2613 | goto success; |
2614 | } | |
2615 | ||
e92e4c4f | 2616 | if (!set_b && MEM_P (orig_x)) |
2617 | { | |
2618 | /* Disallow the "if (...) x = a;" form (implicit "else x = x;") | |
2619 | for optimizations if writing to x may trap or fault, | |
2620 | i.e. it's a memory other than a static var or a stack slot, | |
2621 | is misaligned on strict aligned machines or is read-only. If | |
2622 | x is a read-only memory, then the program is valid only if we | |
2623 | avoid the store into it. If there are stores on both the | |
2624 | THEN and ELSE arms, then we can go ahead with the conversion; | |
2625 | either the program is broken, or the condition is always | |
2626 | false such that the other memory is selected. */ | |
2627 | if (noce_mem_write_may_trap_or_fault_p (orig_x)) | |
2628 | return FALSE; | |
2629 | ||
2630 | /* Avoid store speculation: given "if (...) x = a" where x is a | |
2631 | MEM, we only want to do the store if x is always set | |
2632 | somewhere in the function. This avoids cases like | |
2633 | if (pthread_mutex_trylock(mutex)) | |
2634 | ++global_variable; | |
2635 | where we only want global_variable to be changed if the mutex | |
2636 | is held. FIXME: This should ideally be expressed directly in | |
2637 | RTL somehow. */ | |
2638 | if (!noce_can_store_speculate_p (test_bb, orig_x)) | |
2639 | return FALSE; | |
2640 | } | |
5c8ef8c3 | 2641 | |
03dbd7cc | 2642 | if (noce_try_move (if_info)) |
357b5a1f | 2643 | goto success; |
03dbd7cc | 2644 | if (noce_try_store_flag (if_info)) |
0bb604ca | 2645 | goto success; |
03dbd7cc | 2646 | if (noce_try_bitop (if_info)) |
9d666332 | 2647 | goto success; |
03dbd7cc | 2648 | if (noce_try_minmax (if_info)) |
4f63c6d1 | 2649 | goto success; |
03dbd7cc | 2650 | if (noce_try_abs (if_info)) |
4f63c6d1 | 2651 | goto success; |
0bb604ca | 2652 | if (HAVE_conditional_move |
03dbd7cc | 2653 | && noce_try_cmove (if_info)) |
0bb604ca | 2654 | goto success; |
751d3ba7 | 2655 | if (! targetm.have_conditional_execution ()) |
0bb604ca | 2656 | { |
03dbd7cc | 2657 | if (noce_try_store_flag_constants (if_info)) |
0bb604ca | 2658 | goto success; |
03dbd7cc | 2659 | if (noce_try_addcc (if_info)) |
0bb604ca | 2660 | goto success; |
03dbd7cc | 2661 | if (noce_try_store_flag_mask (if_info)) |
0bb604ca | 2662 | goto success; |
2663 | if (HAVE_conditional_move | |
03dbd7cc | 2664 | && noce_try_cmove_arith (if_info)) |
0bb604ca | 2665 | goto success; |
03dbd7cc | 2666 | if (noce_try_sign_mask (if_info)) |
1c98eaaa | 2667 | goto success; |
0bb604ca | 2668 | } |
2669 | ||
ba0b5cfc | 2670 | if (!else_bb && set_b) |
2671 | { | |
2672 | insn_b = set_b = NULL_RTX; | |
2673 | b = orig_x; | |
2674 | goto retry; | |
2675 | } | |
2676 | ||
0bb604ca | 2677 | return FALSE; |
2678 | ||
2679 | success: | |
0bb604ca | 2680 | |
2681 | /* If we used a temporary, fix it up now. */ | |
2682 | if (orig_x != x) | |
2683 | { | |
5b410d6a | 2684 | rtx seq; |
2685 | ||
0bb604ca | 2686 | start_sequence (); |
1cd4cfea | 2687 | noce_emit_move_insn (orig_x, x); |
5b410d6a | 2688 | seq = get_insns (); |
1cd4cfea | 2689 | set_used_flags (orig_x); |
5b410d6a | 2690 | unshare_all_rtl_in_chain (seq); |
0bb604ca | 2691 | end_sequence (); |
2692 | ||
5169661d | 2693 | emit_insn_before_setloc (seq, BB_END (test_bb), INSN_LOCATION (insn_a)); |
0bb604ca | 2694 | } |
2695 | ||
5b410d6a | 2696 | /* The original THEN and ELSE blocks may now be removed. The test block |
2697 | must now jump to the join block. If the test block and the join block | |
2698 | can be merged, do so. */ | |
5b410d6a | 2699 | if (else_bb) |
2700 | { | |
2701 | delete_basic_block (else_bb); | |
2702 | num_true_changes++; | |
2703 | } | |
2704 | else | |
2705 | remove_edge (find_edge (test_bb, join_bb)); | |
0bb604ca | 2706 | |
5b410d6a | 2707 | remove_edge (find_edge (then_bb, join_bb)); |
2708 | redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb); | |
2709 | delete_basic_block (then_bb); | |
2710 | num_true_changes++; | |
e592f6ea | 2711 | |
5b410d6a | 2712 | if (can_merge_blocks_p (test_bb, join_bb)) |
2713 | { | |
2714 | merge_blocks (test_bb, join_bb); | |
2715 | num_true_changes++; | |
2716 | } | |
2717 | ||
2718 | num_updated_if_blocks++; | |
0bb604ca | 2719 | return TRUE; |
2720 | } | |
268de9b9 | 2721 | |
2722 | /* Check whether a block is suitable for conditional move conversion. | |
2723 | Every insn must be a simple set of a register to a constant or a | |
7d75ffa3 | 2724 | register. For each assignment, store the value in the pointer map |
2725 | VALS, keyed indexed by register pointer, then store the register | |
2726 | pointer in REGS. COND is the condition we will test. */ | |
268de9b9 | 2727 | |
2728 | static int | |
7d75ffa3 | 2729 | check_cond_move_block (basic_block bb, |
2730 | struct pointer_map_t *vals, | |
f1f41a6c | 2731 | vec<rtx> *regs, |
76b61550 | 2732 | rtx cond) |
268de9b9 | 2733 | { |
2734 | rtx insn; | |
2735 | ||
e592f6ea | 2736 | /* We can only handle simple jumps at the end of the basic block. |
2737 | It is almost impossible to update the CFG otherwise. */ | |
2738 | insn = BB_END (bb); | |
2739 | if (JUMP_P (insn) && !onlyjump_p (insn)) | |
2740 | return FALSE; | |
2741 | ||
268de9b9 | 2742 | FOR_BB_INSNS (bb, insn) |
2743 | { | |
2744 | rtx set, dest, src; | |
7d75ffa3 | 2745 | void **slot; |
268de9b9 | 2746 | |
9845d120 | 2747 | if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn)) |
268de9b9 | 2748 | continue; |
2749 | set = single_set (insn); | |
2750 | if (!set) | |
2751 | return FALSE; | |
2752 | ||
2753 | dest = SET_DEST (set); | |
2754 | src = SET_SRC (set); | |
2755 | if (!REG_P (dest) | |
ed5527ca | 2756 | || (HARD_REGISTER_P (dest) |
2757 | && targetm.small_register_classes_for_mode_p (GET_MODE (dest)))) | |
0264b815 | 2758 | return FALSE; |
268de9b9 | 2759 | |
2760 | if (!CONSTANT_P (src) && !register_operand (src, VOIDmode)) | |
2761 | return FALSE; | |
2762 | ||
2763 | if (side_effects_p (src) || side_effects_p (dest)) | |
2764 | return FALSE; | |
2765 | ||
2766 | if (may_trap_p (src) || may_trap_p (dest)) | |
2767 | return FALSE; | |
2768 | ||
0264b815 | 2769 | /* Don't try to handle this if the source register was |
2770 | modified earlier in the block. */ | |
2771 | if ((REG_P (src) | |
7d75ffa3 | 2772 | && pointer_map_contains (vals, src)) |
0264b815 | 2773 | || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) |
7d75ffa3 | 2774 | && pointer_map_contains (vals, SUBREG_REG (src)))) |
0264b815 | 2775 | return FALSE; |
2776 | ||
268de9b9 | 2777 | /* Don't try to handle this if the destination register was |
2778 | modified earlier in the block. */ | |
7d75ffa3 | 2779 | if (pointer_map_contains (vals, dest)) |
268de9b9 | 2780 | return FALSE; |
2781 | ||
2782 | /* Don't try to handle this if the condition uses the | |
2783 | destination register. */ | |
2784 | if (reg_overlap_mentioned_p (dest, cond)) | |
2785 | return FALSE; | |
2786 | ||
268de9b9 | 2787 | /* Don't try to handle this if the source register is modified |
2788 | later in the block. */ | |
2789 | if (!CONSTANT_P (src) | |
2790 | && modified_between_p (src, insn, NEXT_INSN (BB_END (bb)))) | |
2791 | return FALSE; | |
e592f6ea | 2792 | |
7d75ffa3 | 2793 | slot = pointer_map_insert (vals, (void *) dest); |
2794 | *slot = (void *) src; | |
e592f6ea | 2795 | |
f1f41a6c | 2796 | regs->safe_push (dest); |
268de9b9 | 2797 | } |
2798 | ||
2799 | return TRUE; | |
2800 | } | |
2801 | ||
5b52bd91 | 2802 | /* Given a basic block BB suitable for conditional move conversion, |
7d75ffa3 | 2803 | a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing |
2804 | the register values depending on COND, emit the insns in the block as | |
5b52bd91 | 2805 | conditional moves. If ELSE_BLOCK is true, THEN_BB was already |
2806 | processed. The caller has started a sequence for the conversion. | |
2807 | Return true if successful, false if something goes wrong. */ | |
2808 | ||
2809 | static bool | |
2810 | cond_move_convert_if_block (struct noce_if_info *if_infop, | |
2811 | basic_block bb, rtx cond, | |
7d75ffa3 | 2812 | struct pointer_map_t *then_vals, |
2813 | struct pointer_map_t *else_vals, | |
5b52bd91 | 2814 | bool else_block_p) |
2815 | { | |
2816 | enum rtx_code code; | |
2817 | rtx insn, cond_arg0, cond_arg1; | |
2818 | ||
2819 | code = GET_CODE (cond); | |
2820 | cond_arg0 = XEXP (cond, 0); | |
2821 | cond_arg1 = XEXP (cond, 1); | |
2822 | ||
2823 | FOR_BB_INSNS (bb, insn) | |
2824 | { | |
2825 | rtx set, target, dest, t, e; | |
7d75ffa3 | 2826 | void **then_slot, **else_slot; |
5b52bd91 | 2827 | |
9845d120 | 2828 | /* ??? Maybe emit conditional debug insn? */ |
2829 | if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn)) | |
5b52bd91 | 2830 | continue; |
2831 | set = single_set (insn); | |
2832 | gcc_assert (set && REG_P (SET_DEST (set))); | |
2833 | ||
2834 | dest = SET_DEST (set); | |
5b52bd91 | 2835 | |
7d75ffa3 | 2836 | then_slot = pointer_map_contains (then_vals, dest); |
2837 | else_slot = pointer_map_contains (else_vals, dest); | |
2838 | t = then_slot ? (rtx) *then_slot : NULL_RTX; | |
2839 | e = else_slot ? (rtx) *else_slot : NULL_RTX; | |
5b52bd91 | 2840 | |
2841 | if (else_block_p) | |
2842 | { | |
2843 | /* If this register was set in the then block, we already | |
2844 | handled this case there. */ | |
2845 | if (t) | |
2846 | continue; | |
2847 | t = dest; | |
2848 | gcc_assert (e); | |
2849 | } | |
2850 | else | |
2851 | { | |
2852 | gcc_assert (t); | |
2853 | if (!e) | |
2854 | e = dest; | |
2855 | } | |
2856 | ||
2857 | target = noce_emit_cmove (if_infop, dest, code, cond_arg0, cond_arg1, | |
2858 | t, e); | |
2859 | if (!target) | |
2860 | return false; | |
2861 | ||
2862 | if (target != dest) | |
2863 | noce_emit_move_insn (dest, target); | |
2864 | } | |
2865 | ||
2866 | return true; | |
2867 | } | |
2868 | ||
03dbd7cc | 2869 | /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert |
2870 | it using only conditional moves. Return TRUE if we were successful at | |
268de9b9 | 2871 | converting the block. */ |
2872 | ||
2873 | static int | |
03dbd7cc | 2874 | cond_move_process_if_block (struct noce_if_info *if_info) |
268de9b9 | 2875 | { |
03dbd7cc | 2876 | basic_block test_bb = if_info->test_bb; |
2877 | basic_block then_bb = if_info->then_bb; | |
2878 | basic_block else_bb = if_info->else_bb; | |
2879 | basic_block join_bb = if_info->join_bb; | |
2880 | rtx jump = if_info->jump; | |
2881 | rtx cond = if_info->cond; | |
2882 | rtx seq, loc_insn; | |
7d75ffa3 | 2883 | rtx reg; |
2884 | int c; | |
2885 | struct pointer_map_t *then_vals; | |
2886 | struct pointer_map_t *else_vals; | |
1e094109 | 2887 | vec<rtx> then_regs = vNULL; |
2888 | vec<rtx> else_regs = vNULL; | |
e592f6ea | 2889 | unsigned int i; |
7d75ffa3 | 2890 | int success_p = FALSE; |
268de9b9 | 2891 | |
268de9b9 | 2892 | /* Build a mapping for each block to the value used for each |
2893 | register. */ | |
7d75ffa3 | 2894 | then_vals = pointer_map_create (); |
2895 | else_vals = pointer_map_create (); | |
268de9b9 | 2896 | |
2897 | /* Make sure the blocks are suitable. */ | |
1046ee05 | 2898 | if (!check_cond_move_block (then_bb, then_vals, &then_regs, cond) |
76b61550 | 2899 | || (else_bb |
2900 | && !check_cond_move_block (else_bb, else_vals, &else_regs, cond))) | |
7d75ffa3 | 2901 | goto done; |
268de9b9 | 2902 | |
2903 | /* Make sure the blocks can be used together. If the same register | |
2904 | is set in both blocks, and is not set to a constant in both | |
2905 | cases, then both blocks must set it to the same register. We | |
2906 | have already verified that if it is set to a register, that the | |
2907 | source register does not change after the assignment. Also count | |
2908 | the number of registers set in only one of the blocks. */ | |
2909 | c = 0; | |
f1f41a6c | 2910 | FOR_EACH_VEC_ELT (then_regs, i, reg) |
268de9b9 | 2911 | { |
7d75ffa3 | 2912 | void **then_slot = pointer_map_contains (then_vals, reg); |
2913 | void **else_slot = pointer_map_contains (else_vals, reg); | |
268de9b9 | 2914 | |
7d75ffa3 | 2915 | gcc_checking_assert (then_slot); |
2916 | if (!else_slot) | |
268de9b9 | 2917 | ++c; |
2918 | else | |
2919 | { | |
7d75ffa3 | 2920 | rtx then_val = (rtx) *then_slot; |
2921 | rtx else_val = (rtx) *else_slot; | |
2922 | if (!CONSTANT_P (then_val) && !CONSTANT_P (else_val) | |
2923 | && !rtx_equal_p (then_val, else_val)) | |
2924 | goto done; | |
268de9b9 | 2925 | } |
2926 | } | |
2927 | ||
e592f6ea | 2928 | /* Finish off c for MAX_CONDITIONAL_EXECUTE. */ |
f1f41a6c | 2929 | FOR_EACH_VEC_ELT (else_regs, i, reg) |
7d75ffa3 | 2930 | { |
2931 | gcc_checking_assert (pointer_map_contains (else_vals, reg)); | |
2932 | if (!pointer_map_contains (then_vals, reg)) | |
2933 | ++c; | |
2934 | } | |
e592f6ea | 2935 | |
268de9b9 | 2936 | /* Make sure it is reasonable to convert this block. What matters |
2937 | is the number of assignments currently made in only one of the | |
2938 | branches, since if we convert we are going to always execute | |
2939 | them. */ | |
2940 | if (c > MAX_CONDITIONAL_EXECUTE) | |
7d75ffa3 | 2941 | goto done; |
268de9b9 | 2942 | |
5b52bd91 | 2943 | /* Try to emit the conditional moves. First do the then block, |
2944 | then do anything left in the else blocks. */ | |
268de9b9 | 2945 | start_sequence (); |
03dbd7cc | 2946 | if (!cond_move_convert_if_block (if_info, then_bb, cond, |
5b52bd91 | 2947 | then_vals, else_vals, false) |
2948 | || (else_bb | |
03dbd7cc | 2949 | && !cond_move_convert_if_block (if_info, else_bb, cond, |
5b52bd91 | 2950 | then_vals, else_vals, true))) |
268de9b9 | 2951 | { |
5b52bd91 | 2952 | end_sequence (); |
7d75ffa3 | 2953 | goto done; |
268de9b9 | 2954 | } |
03dbd7cc | 2955 | seq = end_ifcvt_sequence (if_info); |
268de9b9 | 2956 | if (!seq) |
7d75ffa3 | 2957 | goto done; |
268de9b9 | 2958 | |
2959 | loc_insn = first_active_insn (then_bb); | |
2960 | if (!loc_insn) | |
2961 | { | |
2962 | loc_insn = first_active_insn (else_bb); | |
2963 | gcc_assert (loc_insn); | |
2964 | } | |
5169661d | 2965 | emit_insn_before_setloc (seq, jump, INSN_LOCATION (loc_insn)); |
268de9b9 | 2966 | |
268de9b9 | 2967 | if (else_bb) |
2968 | { | |
5b410d6a | 2969 | delete_basic_block (else_bb); |
2970 | num_true_changes++; | |
268de9b9 | 2971 | } |
5b410d6a | 2972 | else |
2973 | remove_edge (find_edge (test_bb, join_bb)); | |
268de9b9 | 2974 | |
5b410d6a | 2975 | remove_edge (find_edge (then_bb, join_bb)); |
2976 | redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb); | |
2977 | delete_basic_block (then_bb); | |
2978 | num_true_changes++; | |
e592f6ea | 2979 | |
5b410d6a | 2980 | if (can_merge_blocks_p (test_bb, join_bb)) |
2981 | { | |
2982 | merge_blocks (test_bb, join_bb); | |
2983 | num_true_changes++; | |
2984 | } | |
268de9b9 | 2985 | |
5b410d6a | 2986 | num_updated_if_blocks++; |
e592f6ea | 2987 | |
7d75ffa3 | 2988 | success_p = TRUE; |
2989 | ||
2990 | done: | |
2991 | pointer_map_destroy (then_vals); | |
2992 | pointer_map_destroy (else_vals); | |
f1f41a6c | 2993 | then_regs.release (); |
2994 | else_regs.release (); | |
7d75ffa3 | 2995 | return success_p; |
268de9b9 | 2996 | } |
5b410d6a | 2997 | |
0bb604ca | 2998 | \f |
03dbd7cc | 2999 | /* Determine if a given basic block heads a simple IF-THEN-JOIN or an |
3000 | IF-THEN-ELSE-JOIN block. | |
3001 | ||
3002 | If so, we'll try to convert the insns to not require the branch, | |
3003 | using only transformations that do not require conditional execution. | |
3004 | ||
3005 | Return TRUE if we were successful at converting the block. */ | |
0bb604ca | 3006 | |
3007 | static int | |
76b61550 | 3008 | noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge, |
03dbd7cc | 3009 | int pass) |
0bb604ca | 3010 | { |
03dbd7cc | 3011 | basic_block then_bb, else_bb, join_bb; |
3012 | bool then_else_reversed = false; | |
3013 | rtx jump, cond; | |
30e5822c | 3014 | rtx cond_earliest; |
03dbd7cc | 3015 | struct noce_if_info if_info; |
0bb604ca | 3016 | |
03dbd7cc | 3017 | /* We only ever should get here before reload. */ |
3018 | gcc_assert (!reload_completed); | |
268de9b9 | 3019 | |
03dbd7cc | 3020 | /* Recognize an IF-THEN-ELSE-JOIN block. */ |
3021 | if (single_pred_p (then_edge->dest) | |
3022 | && single_succ_p (then_edge->dest) | |
3023 | && single_pred_p (else_edge->dest) | |
3024 | && single_succ_p (else_edge->dest) | |
3025 | && single_succ (then_edge->dest) == single_succ (else_edge->dest)) | |
1d855d4c | 3026 | { |
03dbd7cc | 3027 | then_bb = then_edge->dest; |
3028 | else_bb = else_edge->dest; | |
3029 | join_bb = single_succ (then_bb); | |
3030 | } | |
3031 | /* Recognize an IF-THEN-JOIN block. */ | |
3032 | else if (single_pred_p (then_edge->dest) | |
3033 | && single_succ_p (then_edge->dest) | |
3034 | && single_succ (then_edge->dest) == else_edge->dest) | |
3035 | { | |
3036 | then_bb = then_edge->dest; | |
3037 | else_bb = NULL_BLOCK; | |
3038 | join_bb = else_edge->dest; | |
3039 | } | |
3040 | /* Recognize an IF-ELSE-JOIN block. We can have those because the order | |
3041 | of basic blocks in cfglayout mode does not matter, so the fallthrough | |
3042 | edge can go to any basic block (and not just to bb->next_bb, like in | |
ba45c933 | 3043 | cfgrtl mode). */ |
03dbd7cc | 3044 | else if (single_pred_p (else_edge->dest) |
3045 | && single_succ_p (else_edge->dest) | |
3046 | && single_succ (else_edge->dest) == then_edge->dest) | |
3047 | { | |
3048 | /* The noce transformations do not apply to IF-ELSE-JOIN blocks. | |
3049 | To make this work, we have to invert the THEN and ELSE blocks | |
3050 | and reverse the jump condition. */ | |
3051 | then_bb = else_edge->dest; | |
3052 | else_bb = NULL_BLOCK; | |
3053 | join_bb = single_succ (then_bb); | |
3054 | then_else_reversed = true; | |
3055 | } | |
3056 | else | |
3057 | /* Not a form we can handle. */ | |
3058 | return FALSE; | |
ba45c933 | 3059 | |
03dbd7cc | 3060 | /* The edges of the THEN and ELSE blocks cannot have complex edges. */ |
3061 | if (single_succ_edge (then_bb)->flags & EDGE_COMPLEX) | |
3062 | return FALSE; | |
3063 | if (else_bb | |
3064 | && single_succ_edge (else_bb)->flags & EDGE_COMPLEX) | |
3065 | return FALSE; | |
1d855d4c | 3066 | |
03dbd7cc | 3067 | num_possible_if_blocks++; |
1d855d4c | 3068 | |
03dbd7cc | 3069 | if (dump_file) |
3070 | { | |
3071 | fprintf (dump_file, | |
3072 | "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d", | |
3073 | (else_bb) ? "-ELSE" : "", | |
3074 | pass, test_bb->index, then_bb->index); | |
3075 | ||
3076 | if (else_bb) | |
3077 | fprintf (dump_file, ", else %d", else_bb->index); | |
3078 | ||
3079 | fprintf (dump_file, ", join %d\n", join_bb->index); | |
1d855d4c | 3080 | } |
0bb604ca | 3081 | |
03dbd7cc | 3082 | /* If the conditional jump is more than just a conditional |
3083 | jump, then we can not do if-conversion on this block. */ | |
3084 | jump = BB_END (test_bb); | |
3085 | if (! onlyjump_p (jump)) | |
3086 | return FALSE; | |
3087 | ||
3088 | /* If this is not a standard conditional jump, we can't parse it. */ | |
76b61550 | 3089 | cond = noce_get_condition (jump, &cond_earliest, then_else_reversed); |
03dbd7cc | 3090 | if (!cond) |
3091 | return FALSE; | |
3092 | ||
3093 | /* We must be comparing objects whose modes imply the size. */ | |
3094 | if (GET_MODE (XEXP (cond, 0)) == BLKmode) | |
3095 | return FALSE; | |
3096 | ||
3097 | /* Initialize an IF_INFO struct to pass around. */ | |
3098 | memset (&if_info, 0, sizeof if_info); | |
3099 | if_info.test_bb = test_bb; | |
3100 | if_info.then_bb = then_bb; | |
3101 | if_info.else_bb = else_bb; | |
3102 | if_info.join_bb = join_bb; | |
3103 | if_info.cond = cond; | |
30e5822c | 3104 | if_info.cond_earliest = cond_earliest; |
03dbd7cc | 3105 | if_info.jump = jump; |
ba45c933 | 3106 | if_info.then_else_reversed = then_else_reversed; |
4a9d7ef7 | 3107 | if_info.branch_cost = BRANCH_COST (optimize_bb_for_speed_p (test_bb), |
3108 | predictable_edge_p (then_edge)); | |
03dbd7cc | 3109 | |
3110 | /* Do the real work. */ | |
3111 | ||
3112 | if (noce_process_if_block (&if_info)) | |
3113 | return TRUE; | |
3114 | ||
3115 | if (HAVE_conditional_move | |
3116 | && cond_move_process_if_block (&if_info)) | |
3117 | return TRUE; | |
3118 | ||
0bb604ca | 3119 | return FALSE; |
3120 | } | |
03dbd7cc | 3121 | \f |
0bb604ca | 3122 | |
3123 | /* Merge the blocks and mark for local life update. */ | |
3124 | ||
3125 | static void | |
952f0048 | 3126 | merge_if_block (struct ce_if_block * ce_info) |
0bb604ca | 3127 | { |
1d855d4c | 3128 | basic_block test_bb = ce_info->test_bb; /* last test block */ |
3129 | basic_block then_bb = ce_info->then_bb; /* THEN */ | |
3130 | basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */ | |
3131 | basic_block join_bb = ce_info->join_bb; /* join block */ | |
0bb604ca | 3132 | basic_block combo_bb; |
3133 | ||
3134 | /* All block merging is done into the lower block numbers. */ | |
3135 | ||
3136 | combo_bb = test_bb; | |
3072d30e | 3137 | df_set_bb_dirty (test_bb); |
0bb604ca | 3138 | |
1d855d4c | 3139 | /* Merge any basic blocks to handle && and || subtests. Each of |
3140 | the blocks are on the fallthru path from the predecessor block. */ | |
3141 | if (ce_info->num_multiple_test_blocks > 0) | |
3142 | { | |
3143 | basic_block bb = test_bb; | |
3144 | basic_block last_test_bb = ce_info->last_test_bb; | |
3145 | basic_block fallthru = block_fallthru (bb); | |
952f0048 | 3146 | |
1d855d4c | 3147 | do |
3148 | { | |
3149 | bb = fallthru; | |
3150 | fallthru = block_fallthru (bb); | |
c60fa3a7 | 3151 | merge_blocks (combo_bb, bb); |
bdce7739 | 3152 | num_true_changes++; |
1d855d4c | 3153 | } |
3154 | while (bb != last_test_bb); | |
3155 | } | |
3156 | ||
3157 | /* Merge TEST block into THEN block. Normally the THEN block won't have a | |
3158 | label, but it might if there were || tests. That label's count should be | |
3159 | zero, and it normally should be removed. */ | |
3160 | ||
fe70d0e3 | 3161 | if (then_bb) |
3162 | { | |
30eead8d | 3163 | /* If THEN_BB has no successors, then there's a BARRIER after it. |
3164 | If COMBO_BB has more than one successor (THEN_BB), then that BARRIER | |
3165 | is no longer needed, and in fact it is incorrect to leave it in | |
3166 | the insn stream. */ | |
3167 | if (EDGE_COUNT (then_bb->succs) == 0 | |
3168 | && EDGE_COUNT (combo_bb->succs) > 1) | |
3169 | { | |
3170 | rtx end = NEXT_INSN (BB_END (then_bb)); | |
3171 | while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end)) | |
3172 | end = NEXT_INSN (end); | |
3173 | ||
3174 | if (end && BARRIER_P (end)) | |
3175 | delete_insn (end); | |
3176 | } | |
c60fa3a7 | 3177 | merge_blocks (combo_bb, then_bb); |
bdce7739 | 3178 | num_true_changes++; |
fe70d0e3 | 3179 | } |
0bb604ca | 3180 | |
3181 | /* The ELSE block, if it existed, had a label. That label count | |
3182 | will almost always be zero, but odd things can happen when labels | |
3183 | get their addresses taken. */ | |
3184 | if (else_bb) | |
3185 | { | |
30eead8d | 3186 | /* If ELSE_BB has no successors, then there's a BARRIER after it. |
3187 | If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER | |
3188 | is no longer needed, and in fact it is incorrect to leave it in | |
3189 | the insn stream. */ | |
3190 | if (EDGE_COUNT (else_bb->succs) == 0 | |
3191 | && EDGE_COUNT (combo_bb->succs) > 1) | |
3192 | { | |
3193 | rtx end = NEXT_INSN (BB_END (else_bb)); | |
3194 | while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end)) | |
3195 | end = NEXT_INSN (end); | |
3196 | ||
3197 | if (end && BARRIER_P (end)) | |
3198 | delete_insn (end); | |
3199 | } | |
c60fa3a7 | 3200 | merge_blocks (combo_bb, else_bb); |
bdce7739 | 3201 | num_true_changes++; |
0bb604ca | 3202 | } |
3203 | ||
3204 | /* If there was no join block reported, that means it was not adjacent | |
3205 | to the others, and so we cannot merge them. */ | |
3206 | ||
3207 | if (! join_bb) | |
3208 | { | |
5496dbfc | 3209 | rtx last = BB_END (combo_bb); |
fe70d0e3 | 3210 | |
0bb604ca | 3211 | /* The outgoing edge for the current COMBO block should already |
3212 | be correct. Verify this. */ | |
cd665a06 | 3213 | if (EDGE_COUNT (combo_bb->succs) == 0) |
a53ff4c1 | 3214 | gcc_assert (find_reg_note (last, REG_NORETURN, NULL) |
3215 | || (NONJUMP_INSN_P (last) | |
3216 | && GET_CODE (PATTERN (last)) == TRAP_IF | |
3217 | && (TRAP_CONDITION (PATTERN (last)) | |
3218 | == const_true_rtx))); | |
0bb604ca | 3219 | |
a53ff4c1 | 3220 | else |
fe70d0e3 | 3221 | /* There should still be something at the end of the THEN or ELSE |
0bb604ca | 3222 | blocks taking us to our final destination. */ |
a53ff4c1 | 3223 | gcc_assert (JUMP_P (last) |
34154e27 | 3224 | || (EDGE_SUCC (combo_bb, 0)->dest |
3225 | == EXIT_BLOCK_PTR_FOR_FN (cfun) | |
a53ff4c1 | 3226 | && CALL_P (last) |
3227 | && SIBLING_CALL_P (last)) | |
3228 | || ((EDGE_SUCC (combo_bb, 0)->flags & EDGE_EH) | |
3229 | && can_throw_internal (last))); | |
0bb604ca | 3230 | } |
3231 | ||
74b0991d | 3232 | /* The JOIN block may have had quite a number of other predecessors too. |
3233 | Since we've already merged the TEST, THEN and ELSE blocks, we should | |
3234 | have only one remaining edge from our if-then-else diamond. If there | |
cbd505b2 | 3235 | is more than one remaining edge, it must come from elsewhere. There |
952f0048 | 3236 | may be zero incoming edges if the THEN block didn't actually join |
a53ff4c1 | 3237 | back up (as with a call to a non-return function). */ |
cd665a06 | 3238 | else if (EDGE_COUNT (join_bb->preds) < 2 |
34154e27 | 3239 | && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
0bb604ca | 3240 | { |
3072d30e | 3241 | /* We can merge the JOIN cleanly and update the dataflow try |
3242 | again on this pass.*/ | |
c60fa3a7 | 3243 | merge_blocks (combo_bb, join_bb); |
bdce7739 | 3244 | num_true_changes++; |
0bb604ca | 3245 | } |
3246 | else | |
3247 | { | |
3248 | /* We cannot merge the JOIN. */ | |
3249 | ||
3250 | /* The outgoing edge for the current COMBO block should already | |
3251 | be correct. Verify this. */ | |
ea091dfd | 3252 | gcc_assert (single_succ_p (combo_bb) |
3253 | && single_succ (combo_bb) == join_bb); | |
0bb604ca | 3254 | |
3255 | /* Remove the jump and cruft from the end of the COMBO block. */ | |
34154e27 | 3256 | if (join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
ea091dfd | 3257 | tidy_fallthru_edge (single_succ_edge (combo_bb)); |
0bb604ca | 3258 | } |
3259 | ||
0bb604ca | 3260 | num_updated_if_blocks++; |
3261 | } | |
3262 | \f | |
1d855d4c | 3263 | /* Find a block ending in a simple IF condition and try to transform it |
3264 | in some way. When converting a multi-block condition, put the new code | |
3265 | in the first such block and delete the rest. Return a pointer to this | |
3266 | first block if some transformation was done. Return NULL otherwise. */ | |
0bb604ca | 3267 | |
1d855d4c | 3268 | static basic_block |
952f0048 | 3269 | find_if_header (basic_block test_bb, int pass) |
0bb604ca | 3270 | { |
b3e7c666 | 3271 | ce_if_block ce_info; |
0bb604ca | 3272 | edge then_edge; |
3273 | edge else_edge; | |
3274 | ||
3275 | /* The kind of block we're looking for has exactly two successors. */ | |
cd665a06 | 3276 | if (EDGE_COUNT (test_bb->succs) != 2) |
1d855d4c | 3277 | return NULL; |
0bb604ca | 3278 | |
cd665a06 | 3279 | then_edge = EDGE_SUCC (test_bb, 0); |
3280 | else_edge = EDGE_SUCC (test_bb, 1); | |
3281 | ||
3072d30e | 3282 | if (df_get_bb_dirty (then_edge->dest)) |
3283 | return NULL; | |
3284 | if (df_get_bb_dirty (else_edge->dest)) | |
3285 | return NULL; | |
3286 | ||
0bb604ca | 3287 | /* Neither edge should be abnormal. */ |
3288 | if ((then_edge->flags & EDGE_COMPLEX) | |
3289 | || (else_edge->flags & EDGE_COMPLEX)) | |
1d855d4c | 3290 | return NULL; |
0bb604ca | 3291 | |
7f42fe24 | 3292 | /* Nor exit the loop. */ |
3293 | if ((then_edge->flags & EDGE_LOOP_EXIT) | |
3294 | || (else_edge->flags & EDGE_LOOP_EXIT)) | |
3295 | return NULL; | |
3296 | ||
0bb604ca | 3297 | /* The THEN edge is canonically the one that falls through. */ |
3298 | if (then_edge->flags & EDGE_FALLTHRU) | |
3299 | ; | |
3300 | else if (else_edge->flags & EDGE_FALLTHRU) | |
3301 | { | |
3302 | edge e = else_edge; | |
3303 | else_edge = then_edge; | |
3304 | then_edge = e; | |
3305 | } | |
3306 | else | |
3307 | /* Otherwise this must be a multiway branch of some sort. */ | |
1d855d4c | 3308 | return NULL; |
3309 | ||
76b61550 | 3310 | memset (&ce_info, 0, sizeof (ce_info)); |
1d855d4c | 3311 | ce_info.test_bb = test_bb; |
3312 | ce_info.then_bb = then_edge->dest; | |
3313 | ce_info.else_bb = else_edge->dest; | |
3314 | ce_info.pass = pass; | |
0bb604ca | 3315 | |
e2ca32a4 | 3316 | #ifdef IFCVT_MACHDEP_INIT |
3317 | IFCVT_MACHDEP_INIT (&ce_info); | |
1d855d4c | 3318 | #endif |
3319 | ||
76b61550 | 3320 | if (!reload_completed |
03dbd7cc | 3321 | && noce_find_if_block (test_bb, then_edge, else_edge, pass)) |
3322 | goto success; | |
3323 | ||
76b61550 | 3324 | if (reload_completed |
3325 | && targetm.have_conditional_execution () | |
03dbd7cc | 3326 | && cond_exec_find_if_block (&ce_info)) |
0bb604ca | 3327 | goto success; |
1d855d4c | 3328 | |
74f4459c | 3329 | if (HAVE_trap |
d6bf3b14 | 3330 | && optab_handler (ctrap_optab, word_mode) != CODE_FOR_nothing |
10a2674d | 3331 | && find_cond_trap (test_bb, then_edge, else_edge)) |
3332 | goto success; | |
1d855d4c | 3333 | |
50b08d37 | 3334 | if (dom_info_state (CDI_POST_DOMINATORS) >= DOM_NO_FAST_QUERY |
76b61550 | 3335 | && (reload_completed || !targetm.have_conditional_execution ())) |
0bb604ca | 3336 | { |
3337 | if (find_if_case_1 (test_bb, then_edge, else_edge)) | |
3338 | goto success; | |
3339 | if (find_if_case_2 (test_bb, then_edge, else_edge)) | |
3340 | goto success; | |
3341 | } | |
3342 | ||
1d855d4c | 3343 | return NULL; |
0bb604ca | 3344 | |
3345 | success: | |
450d042a | 3346 | if (dump_file) |
3347 | fprintf (dump_file, "Conversion succeeded on pass %d.\n", pass); | |
3072d30e | 3348 | /* Set this so we continue looking. */ |
3349 | cond_exec_changed_p = TRUE; | |
1d855d4c | 3350 | return ce_info.test_bb; |
3351 | } | |
3352 | ||
3353 | /* Return true if a block has two edges, one of which falls through to the next | |
3354 | block, and the other jumps to a specific block, so that we can tell if the | |
3355 | block is part of an && test or an || test. Returns either -1 or the number | |
3356 | of non-note, non-jump, non-USE/CLOBBER insns in the block. */ | |
3357 | ||
3358 | static int | |
952f0048 | 3359 | block_jumps_and_fallthru_p (basic_block cur_bb, basic_block target_bb) |
1d855d4c | 3360 | { |
3361 | edge cur_edge; | |
3362 | int fallthru_p = FALSE; | |
3363 | int jump_p = FALSE; | |
3364 | rtx insn; | |
3365 | rtx end; | |
3366 | int n_insns = 0; | |
cd665a06 | 3367 | edge_iterator ei; |
1d855d4c | 3368 | |
3369 | if (!cur_bb || !target_bb) | |
3370 | return -1; | |
3371 | ||
3372 | /* If no edges, obviously it doesn't jump or fallthru. */ | |
cd665a06 | 3373 | if (EDGE_COUNT (cur_bb->succs) == 0) |
1d855d4c | 3374 | return FALSE; |
3375 | ||
cd665a06 | 3376 | FOR_EACH_EDGE (cur_edge, ei, cur_bb->succs) |
1d855d4c | 3377 | { |
3378 | if (cur_edge->flags & EDGE_COMPLEX) | |
3379 | /* Anything complex isn't what we want. */ | |
3380 | return -1; | |
3381 | ||
3382 | else if (cur_edge->flags & EDGE_FALLTHRU) | |
3383 | fallthru_p = TRUE; | |
3384 | ||
3385 | else if (cur_edge->dest == target_bb) | |
3386 | jump_p = TRUE; | |
3387 | ||
3388 | else | |
3389 | return -1; | |
3390 | } | |
3391 | ||
3392 | if ((jump_p & fallthru_p) == 0) | |
3393 | return -1; | |
3394 | ||
3395 | /* Don't allow calls in the block, since this is used to group && and || | |
3396 | together for conditional execution support. ??? we should support | |
3397 | conditional execution support across calls for IA-64 some day, but | |
3398 | for now it makes the code simpler. */ | |
5496dbfc | 3399 | end = BB_END (cur_bb); |
3400 | insn = BB_HEAD (cur_bb); | |
1d855d4c | 3401 | |
3402 | while (insn != NULL_RTX) | |
3403 | { | |
6d7dc5b9 | 3404 | if (CALL_P (insn)) |
1d855d4c | 3405 | return -1; |
3406 | ||
3407 | if (INSN_P (insn) | |
6d7dc5b9 | 3408 | && !JUMP_P (insn) |
9845d120 | 3409 | && !DEBUG_INSN_P (insn) |
1d855d4c | 3410 | && GET_CODE (PATTERN (insn)) != USE |
3411 | && GET_CODE (PATTERN (insn)) != CLOBBER) | |
3412 | n_insns++; | |
3413 | ||
3414 | if (insn == end) | |
3415 | break; | |
3416 | ||
3417 | insn = NEXT_INSN (insn); | |
3418 | } | |
3419 | ||
3420 | return n_insns; | |
0bb604ca | 3421 | } |
3422 | ||
3423 | /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE | |
3424 | block. If so, we'll try to convert the insns to not require the branch. | |
d30e015b | 3425 | Return TRUE if we were successful at converting the block. */ |
0bb604ca | 3426 | |
3427 | static int | |
03dbd7cc | 3428 | cond_exec_find_if_block (struct ce_if_block * ce_info) |
0bb604ca | 3429 | { |
1d855d4c | 3430 | basic_block test_bb = ce_info->test_bb; |
3431 | basic_block then_bb = ce_info->then_bb; | |
3432 | basic_block else_bb = ce_info->else_bb; | |
0bb604ca | 3433 | basic_block join_bb = NULL_BLOCK; |
1d855d4c | 3434 | edge cur_edge; |
345ac34a | 3435 | basic_block next; |
cd665a06 | 3436 | edge_iterator ei; |
0bb604ca | 3437 | |
1d855d4c | 3438 | ce_info->last_test_bb = test_bb; |
3439 | ||
03dbd7cc | 3440 | /* We only ever should get here after reload, |
76b61550 | 3441 | and if we have conditional execution. */ |
3442 | gcc_assert (reload_completed && targetm.have_conditional_execution ()); | |
03dbd7cc | 3443 | |
1d855d4c | 3444 | /* Discover if any fall through predecessors of the current test basic block |
3445 | were && tests (which jump to the else block) or || tests (which jump to | |
3446 | the then block). */ | |
03dbd7cc | 3447 | if (single_pred_p (test_bb) |
ea091dfd | 3448 | && single_pred_edge (test_bb)->flags == EDGE_FALLTHRU) |
1d855d4c | 3449 | { |
ea091dfd | 3450 | basic_block bb = single_pred (test_bb); |
1d855d4c | 3451 | basic_block target_bb; |
3452 | int max_insns = MAX_CONDITIONAL_EXECUTE; | |
3453 | int n_insns; | |
3454 | ||
b903337a | 3455 | /* Determine if the preceding block is an && or || block. */ |
1d855d4c | 3456 | if ((n_insns = block_jumps_and_fallthru_p (bb, else_bb)) >= 0) |
3457 | { | |
3458 | ce_info->and_and_p = TRUE; | |
3459 | target_bb = else_bb; | |
3460 | } | |
3461 | else if ((n_insns = block_jumps_and_fallthru_p (bb, then_bb)) >= 0) | |
3462 | { | |
952f0048 | 3463 | ce_info->and_and_p = FALSE; |
1d855d4c | 3464 | target_bb = then_bb; |
3465 | } | |
3466 | else | |
3467 | target_bb = NULL_BLOCK; | |
3468 | ||
3469 | if (target_bb && n_insns <= max_insns) | |
3470 | { | |
3471 | int total_insns = 0; | |
3472 | int blocks = 0; | |
3473 | ||
3474 | ce_info->last_test_bb = test_bb; | |
3475 | ||
3476 | /* Found at least one && or || block, look for more. */ | |
3477 | do | |
3478 | { | |
3479 | ce_info->test_bb = test_bb = bb; | |
3480 | total_insns += n_insns; | |
3481 | blocks++; | |
3482 | ||
ea091dfd | 3483 | if (!single_pred_p (bb)) |
1d855d4c | 3484 | break; |
3485 | ||
ea091dfd | 3486 | bb = single_pred (bb); |
1d855d4c | 3487 | n_insns = block_jumps_and_fallthru_p (bb, target_bb); |
3488 | } | |
3489 | while (n_insns >= 0 && (total_insns + n_insns) <= max_insns); | |
3490 | ||
3491 | ce_info->num_multiple_test_blocks = blocks; | |
3492 | ce_info->num_multiple_test_insns = total_insns; | |
3493 | ||
3494 | if (ce_info->and_and_p) | |
3495 | ce_info->num_and_and_blocks = blocks; | |
3496 | else | |
3497 | ce_info->num_or_or_blocks = blocks; | |
3498 | } | |
3499 | } | |
3500 | ||
6047d32f | 3501 | /* The THEN block of an IF-THEN combo must have exactly one predecessor, |
3502 | other than any || blocks which jump to the THEN block. */ | |
3503 | if ((EDGE_COUNT (then_bb->preds) - ce_info->num_or_or_blocks) != 1) | |
3504 | return FALSE; | |
e592f6ea | 3505 | |
6047d32f | 3506 | /* The edges of the THEN and ELSE blocks cannot have complex edges. */ |
cd665a06 | 3507 | FOR_EACH_EDGE (cur_edge, ei, then_bb->preds) |
1d855d4c | 3508 | { |
1d855d4c | 3509 | if (cur_edge->flags & EDGE_COMPLEX) |
3510 | return FALSE; | |
3511 | } | |
3512 | ||
cd665a06 | 3513 | FOR_EACH_EDGE (cur_edge, ei, else_bb->preds) |
1d855d4c | 3514 | { |
1d855d4c | 3515 | if (cur_edge->flags & EDGE_COMPLEX) |
3516 | return FALSE; | |
3517 | } | |
3518 | ||
cbd505b2 | 3519 | /* The THEN block of an IF-THEN combo must have zero or one successors. */ |
cd665a06 | 3520 | if (EDGE_COUNT (then_bb->succs) > 0 |
ea091dfd | 3521 | && (!single_succ_p (then_bb) |
3522 | || (single_succ_edge (then_bb)->flags & EDGE_COMPLEX) | |
76b61550 | 3523 | || (epilogue_completed |
3524 | && tablejump_p (BB_END (then_bb), NULL, NULL)))) | |
0bb604ca | 3525 | return FALSE; |
3526 | ||
cbd505b2 | 3527 | /* If the THEN block has no successors, conditional execution can still |
3528 | make a conditional call. Don't do this unless the ELSE block has | |
d86c820b | 3529 | only one incoming edge -- the CFG manipulation is too ugly otherwise. |
3530 | Check for the last insn of the THEN block being an indirect jump, which | |
3531 | is listed as not having any successors, but confuses the rest of the CE | |
1d855d4c | 3532 | code processing. ??? we should fix this in the future. */ |
cd665a06 | 3533 | if (EDGE_COUNT (then_bb->succs) == 0) |
cbd505b2 | 3534 | { |
34154e27 | 3535 | if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
cbd505b2 | 3536 | { |
5496dbfc | 3537 | rtx last_insn = BB_END (then_bb); |
d86c820b | 3538 | |
bf159d0b | 3539 | while (last_insn |
6d7dc5b9 | 3540 | && NOTE_P (last_insn) |
5496dbfc | 3541 | && last_insn != BB_HEAD (then_bb)) |
bf159d0b | 3542 | last_insn = PREV_INSN (last_insn); |
d86c820b | 3543 | |
bf159d0b | 3544 | if (last_insn |
6d7dc5b9 | 3545 | && JUMP_P (last_insn) |
d86c820b | 3546 | && ! simplejump_p (last_insn)) |
3547 | return FALSE; | |
3548 | ||
cbd505b2 | 3549 | join_bb = else_bb; |
3550 | else_bb = NULL_BLOCK; | |
3551 | } | |
3552 | else | |
3553 | return FALSE; | |
3554 | } | |
3555 | ||
0bb604ca | 3556 | /* If the THEN block's successor is the other edge out of the TEST block, |
3557 | then we have an IF-THEN combo without an ELSE. */ | |
ea091dfd | 3558 | else if (single_succ (then_bb) == else_bb) |
0bb604ca | 3559 | { |
3560 | join_bb = else_bb; | |
3561 | else_bb = NULL_BLOCK; | |
3562 | } | |
3563 | ||
3564 | /* If the THEN and ELSE block meet in a subsequent block, and the ELSE | |
3565 | has exactly one predecessor and one successor, and the outgoing edge | |
3566 | is not complex, then we have an IF-THEN-ELSE combo. */ | |
ea091dfd | 3567 | else if (single_succ_p (else_bb) |
3568 | && single_succ (then_bb) == single_succ (else_bb) | |
3569 | && single_pred_p (else_bb) | |
76b61550 | 3570 | && !(single_succ_edge (else_bb)->flags & EDGE_COMPLEX) |
3571 | && !(epilogue_completed | |
3572 | && tablejump_p (BB_END (else_bb), NULL, NULL))) | |
ea091dfd | 3573 | join_bb = single_succ (else_bb); |
0bb604ca | 3574 | |
3575 | /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */ | |
3576 | else | |
952f0048 | 3577 | return FALSE; |
0bb604ca | 3578 | |
3579 | num_possible_if_blocks++; | |
3580 | ||
450d042a | 3581 | if (dump_file) |
0bb604ca | 3582 | { |
450d042a | 3583 | fprintf (dump_file, |
3584 | "\nIF-THEN%s block found, pass %d, start block %d " | |
3585 | "[insn %d], then %d [%d]", | |
1d855d4c | 3586 | (else_bb) ? "-ELSE" : "", |
3587 | ce_info->pass, | |
450d042a | 3588 | test_bb->index, |
3589 | BB_HEAD (test_bb) ? (int)INSN_UID (BB_HEAD (test_bb)) : -1, | |
3590 | then_bb->index, | |
3591 | BB_HEAD (then_bb) ? (int)INSN_UID (BB_HEAD (then_bb)) : -1); | |
0bb604ca | 3592 | |
1d855d4c | 3593 | if (else_bb) |
450d042a | 3594 | fprintf (dump_file, ", else %d [%d]", |
3595 | else_bb->index, | |
3596 | BB_HEAD (else_bb) ? (int)INSN_UID (BB_HEAD (else_bb)) : -1); | |
1d855d4c | 3597 | |
450d042a | 3598 | fprintf (dump_file, ", join %d [%d]", |
3599 | join_bb->index, | |
3600 | BB_HEAD (join_bb) ? (int)INSN_UID (BB_HEAD (join_bb)) : -1); | |
1d855d4c | 3601 | |
3602 | if (ce_info->num_multiple_test_blocks > 0) | |
450d042a | 3603 | fprintf (dump_file, ", %d %s block%s last test %d [%d]", |
1d855d4c | 3604 | ce_info->num_multiple_test_blocks, |
3605 | (ce_info->and_and_p) ? "&&" : "||", | |
3606 | (ce_info->num_multiple_test_blocks == 1) ? "" : "s", | |
3607 | ce_info->last_test_bb->index, | |
5496dbfc | 3608 | ((BB_HEAD (ce_info->last_test_bb)) |
3609 | ? (int)INSN_UID (BB_HEAD (ce_info->last_test_bb)) | |
1d855d4c | 3610 | : -1)); |
3611 | ||
450d042a | 3612 | fputc ('\n', dump_file); |
1d855d4c | 3613 | } |
3614 | ||
3615 | /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the | |
3616 | first condition for free, since we've already asserted that there's a | |
3617 | fallthru edge from IF to THEN. Likewise for the && and || blocks, since | |
3618 | we checked the FALLTHRU flag, those are already adjacent to the last IF | |
3619 | block. */ | |
df4b504c | 3620 | /* ??? As an enhancement, move the ELSE block. Have to deal with |
a53ff4c1 | 3621 | BLOCK notes, if by no other means than backing out the merge if they |
0bb604ca | 3622 | exist. Sticky enough I don't want to think about it now. */ |
345ac34a | 3623 | next = then_bb; |
3624 | if (else_bb && (next = next->next_bb) != else_bb) | |
0bb604ca | 3625 | return FALSE; |
34154e27 | 3626 | if ((next = next->next_bb) != join_bb |
3627 | && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
0bb604ca | 3628 | { |
3629 | if (else_bb) | |
3630 | join_bb = NULL; | |
3631 | else | |
3632 | return FALSE; | |
3633 | } | |
3634 | ||
3635 | /* Do the real work. */ | |
03dbd7cc | 3636 | |
1d855d4c | 3637 | ce_info->else_bb = else_bb; |
3638 | ce_info->join_bb = join_bb; | |
3639 | ||
03dbd7cc | 3640 | /* If we have && and || tests, try to first handle combining the && and || |
3641 | tests into the conditional code, and if that fails, go back and handle | |
3642 | it without the && and ||, which at present handles the && case if there | |
3643 | was no ELSE block. */ | |
3644 | if (cond_exec_process_if_block (ce_info, TRUE)) | |
3645 | return TRUE; | |
3646 | ||
3647 | if (ce_info->num_multiple_test_blocks) | |
3648 | { | |
3649 | cancel_changes (0); | |
3650 | ||
3651 | if (cond_exec_process_if_block (ce_info, FALSE)) | |
3652 | return TRUE; | |
3653 | } | |
0fffdebc | 3654 | |
3655 | return FALSE; | |
0bb604ca | 3656 | } |
3657 | ||
1d855d4c | 3658 | /* Convert a branch over a trap, or a branch |
3659 | to a trap, into a conditional trap. */ | |
10a2674d | 3660 | |
3661 | static int | |
952f0048 | 3662 | find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge) |
10a2674d | 3663 | { |
1d855d4c | 3664 | basic_block then_bb = then_edge->dest; |
3665 | basic_block else_bb = else_edge->dest; | |
3666 | basic_block other_bb, trap_bb; | |
10a2674d | 3667 | rtx trap, jump, cond, cond_earliest, seq; |
3668 | enum rtx_code code; | |
3669 | ||
10a2674d | 3670 | /* Locate the block with the trap instruction. */ |
3671 | /* ??? While we look for no successors, we really ought to allow | |
3672 | EH successors. Need to fix merge_if_block for that to work. */ | |
fe70d0e3 | 3673 | if ((trap = block_has_only_trap (then_bb)) != NULL) |
5410141b | 3674 | trap_bb = then_bb, other_bb = else_bb; |
fe70d0e3 | 3675 | else if ((trap = block_has_only_trap (else_bb)) != NULL) |
5410141b | 3676 | trap_bb = else_bb, other_bb = then_bb; |
10a2674d | 3677 | else |
3678 | return FALSE; | |
3679 | ||
450d042a | 3680 | if (dump_file) |
10a2674d | 3681 | { |
450d042a | 3682 | fprintf (dump_file, "\nTRAP-IF block found, start %d, trap %d\n", |
b3d6de89 | 3683 | test_bb->index, trap_bb->index); |
10a2674d | 3684 | } |
3685 | ||
3686 | /* If this is not a standard conditional jump, we can't parse it. */ | |
5496dbfc | 3687 | jump = BB_END (test_bb); |
03dbd7cc | 3688 | cond = noce_get_condition (jump, &cond_earliest, false); |
10a2674d | 3689 | if (! cond) |
3690 | return FALSE; | |
3691 | ||
1d855d4c | 3692 | /* If the conditional jump is more than just a conditional jump, then |
3693 | we can not do if-conversion on this block. */ | |
10a2674d | 3694 | if (! onlyjump_p (jump)) |
3695 | return FALSE; | |
3696 | ||
3697 | /* We must be comparing objects whose modes imply the size. */ | |
3698 | if (GET_MODE (XEXP (cond, 0)) == BLKmode) | |
3699 | return FALSE; | |
3700 | ||
3701 | /* Reverse the comparison code, if necessary. */ | |
3702 | code = GET_CODE (cond); | |
3703 | if (then_bb == trap_bb) | |
3704 | { | |
3705 | code = reversed_comparison_code (cond, jump); | |
3706 | if (code == UNKNOWN) | |
3707 | return FALSE; | |
3708 | } | |
3709 | ||
3710 | /* Attempt to generate the conditional trap. */ | |
990be1d5 | 3711 | seq = gen_cond_trap (code, copy_rtx (XEXP (cond, 0)), |
3712 | copy_rtx (XEXP (cond, 1)), | |
10a2674d | 3713 | TRAP_CODE (PATTERN (trap))); |
3714 | if (seq == NULL) | |
3715 | return FALSE; | |
3716 | ||
5410141b | 3717 | /* Emit the new insns before cond_earliest. */ |
5169661d | 3718 | emit_insn_before_setloc (seq, cond_earliest, INSN_LOCATION (trap)); |
10a2674d | 3719 | |
5410141b | 3720 | /* Delete the trap block if possible. */ |
3721 | remove_edge (trap_bb == then_bb ? then_edge : else_edge); | |
3072d30e | 3722 | df_set_bb_dirty (test_bb); |
3723 | df_set_bb_dirty (then_bb); | |
3724 | df_set_bb_dirty (else_bb); | |
3725 | ||
cd665a06 | 3726 | if (EDGE_COUNT (trap_bb->preds) == 0) |
5410141b | 3727 | { |
5b410d6a | 3728 | delete_basic_block (trap_bb); |
3729 | num_true_changes++; | |
5410141b | 3730 | } |
5b410d6a | 3731 | |
3732 | /* Wire together the blocks again. */ | |
3733 | if (current_ir_type () == IR_RTL_CFGLAYOUT) | |
3734 | single_succ_edge (test_bb)->flags |= EDGE_FALLTHRU; | |
7cc3154d | 3735 | else if (trap_bb == then_bb) |
5410141b | 3736 | { |
3737 | rtx lab, newjump; | |
10a2674d | 3738 | |
5410141b | 3739 | lab = JUMP_LABEL (jump); |
3740 | newjump = emit_jump_insn_after (gen_jump (lab), jump); | |
3741 | LABEL_NUSES (lab) += 1; | |
3742 | JUMP_LABEL (newjump) = lab; | |
3743 | emit_barrier_after (newjump); | |
5b410d6a | 3744 | } |
3745 | delete_insn (jump); | |
5410141b | 3746 | |
5b410d6a | 3747 | if (can_merge_blocks_p (test_bb, other_bb)) |
3748 | { | |
3749 | merge_blocks (test_bb, other_bb); | |
3750 | num_true_changes++; | |
5410141b | 3751 | } |
10a2674d | 3752 | |
5b410d6a | 3753 | num_updated_if_blocks++; |
10a2674d | 3754 | return TRUE; |
3755 | } | |
3756 | ||
952f0048 | 3757 | /* Subroutine of find_cond_trap: if BB contains only a trap insn, |
fe70d0e3 | 3758 | return it. */ |
3759 | ||
3760 | static rtx | |
952f0048 | 3761 | block_has_only_trap (basic_block bb) |
fe70d0e3 | 3762 | { |
3763 | rtx trap; | |
3764 | ||
3765 | /* We're not the exit block. */ | |
34154e27 | 3766 | if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
fe70d0e3 | 3767 | return NULL_RTX; |
3768 | ||
3769 | /* The block must have no successors. */ | |
cd665a06 | 3770 | if (EDGE_COUNT (bb->succs) > 0) |
fe70d0e3 | 3771 | return NULL_RTX; |
3772 | ||
3773 | /* The only instruction in the THEN block must be the trap. */ | |
3774 | trap = first_active_insn (bb); | |
5496dbfc | 3775 | if (! (trap == BB_END (bb) |
fe70d0e3 | 3776 | && GET_CODE (PATTERN (trap)) == TRAP_IF |
3777 | && TRAP_CONDITION (PATTERN (trap)) == const_true_rtx)) | |
3778 | return NULL_RTX; | |
3779 | ||
3780 | return trap; | |
3781 | } | |
3782 | ||
0bb604ca | 3783 | /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is |
3784 | transformable, but not necessarily the other. There need be no | |
3785 | JOIN block. | |
3786 | ||
d30e015b | 3787 | Return TRUE if we were successful at converting the block. |
0bb604ca | 3788 | |
3789 | Cases we'd like to look at: | |
3790 | ||
3791 | (1) | |
3792 | if (test) goto over; // x not live | |
3793 | x = a; | |
3794 | goto label; | |
3795 | over: | |
3796 | ||
3797 | becomes | |
3798 | ||
3799 | x = a; | |
3800 | if (! test) goto label; | |
3801 | ||
3802 | (2) | |
3803 | if (test) goto E; // x not live | |
3804 | x = big(); | |
3805 | goto L; | |
3806 | E: | |
3807 | x = b; | |
3808 | goto M; | |
3809 | ||
3810 | becomes | |
3811 | ||
3812 | x = b; | |
3813 | if (test) goto M; | |
3814 | x = big(); | |
3815 | goto L; | |
3816 | ||
3817 | (3) // This one's really only interesting for targets that can do | |
3818 | // multiway branching, e.g. IA-64 BBB bundles. For other targets | |
3819 | // it results in multiple branches on a cache line, which often | |
3820 | // does not sit well with predictors. | |
3821 | ||
3822 | if (test1) goto E; // predicted not taken | |
3823 | x = a; | |
3824 | if (test2) goto F; | |
3825 | ... | |
3826 | E: | |
3827 | x = b; | |
3828 | J: | |
3829 | ||
3830 | becomes | |
3831 | ||
3832 | x = a; | |
3833 | if (test1) goto E; | |
3834 | if (test2) goto F; | |
3835 | ||
3836 | Notes: | |
3837 | ||
3838 | (A) Don't do (2) if the branch is predicted against the block we're | |
3839 | eliminating. Do it anyway if we can eliminate a branch; this requires | |
3840 | that the sole successor of the eliminated block postdominate the other | |
3841 | side of the if. | |
3842 | ||
3843 | (B) With CE, on (3) we can steal from both sides of the if, creating | |
3844 | ||
3845 | if (test1) x = a; | |
3846 | if (!test1) x = b; | |
3847 | if (test1) goto J; | |
3848 | if (test2) goto F; | |
3849 | ... | |
3850 | J: | |
3851 | ||
3852 | Again, this is most useful if J postdominates. | |
3853 | ||
3854 | (C) CE substitutes for helpful life information. | |
3855 | ||
3856 | (D) These heuristics need a lot of work. */ | |
3857 | ||
3858 | /* Tests for case 1 above. */ | |
3859 | ||
3860 | static int | |
952f0048 | 3861 | find_if_case_1 (basic_block test_bb, edge then_edge, edge else_edge) |
0bb604ca | 3862 | { |
3863 | basic_block then_bb = then_edge->dest; | |
3072d30e | 3864 | basic_block else_bb = else_edge->dest; |
3865 | basic_block new_bb; | |
0217cfff | 3866 | int then_bb_index, then_prob; |
9cb2517e | 3867 | rtx else_target = NULL_RTX; |
0bb604ca | 3868 | |
4f18499c | 3869 | /* If we are partitioning hot/cold basic blocks, we don't want to |
3870 | mess up unconditional or indirect jumps that cross between hot | |
1118aef7 | 3871 | and cold sections. |
e592f6ea | 3872 | |
1118aef7 | 3873 | Basic block partitioning may result in some jumps that appear to |
e592f6ea | 3874 | be optimizable (or blocks that appear to be mergeable), but which really |
3875 | must be left untouched (they are required to make it safely across | |
3876 | partition boundaries). See the comments at the top of | |
1118aef7 | 3877 | bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */ |
3878 | ||
e592f6ea | 3879 | if ((BB_END (then_bb) |
1897b881 | 3880 | && find_reg_note (BB_END (then_bb), REG_CROSSING_JUMP, NULL_RTX)) |
3881 | || (BB_END (test_bb) | |
3882 | && find_reg_note (BB_END (test_bb), REG_CROSSING_JUMP, NULL_RTX)) | |
3883 | || (BB_END (else_bb) | |
e592f6ea | 3884 | && find_reg_note (BB_END (else_bb), REG_CROSSING_JUMP, |
1897b881 | 3885 | NULL_RTX))) |
4f18499c | 3886 | return FALSE; |
3887 | ||
0bb604ca | 3888 | /* THEN has one successor. */ |
ea091dfd | 3889 | if (!single_succ_p (then_bb)) |
0bb604ca | 3890 | return FALSE; |
3891 | ||
3892 | /* THEN does not fall through, but is not strange either. */ | |
ea091dfd | 3893 | if (single_succ_edge (then_bb)->flags & (EDGE_COMPLEX | EDGE_FALLTHRU)) |
0bb604ca | 3894 | return FALSE; |
3895 | ||
3896 | /* THEN has one predecessor. */ | |
ea091dfd | 3897 | if (!single_pred_p (then_bb)) |
0bb604ca | 3898 | return FALSE; |
3899 | ||
3cd757b1 | 3900 | /* THEN must do something. */ |
3901 | if (forwarder_block_p (then_bb)) | |
0bb604ca | 3902 | return FALSE; |
3903 | ||
3904 | num_possible_if_blocks++; | |
450d042a | 3905 | if (dump_file) |
3906 | fprintf (dump_file, | |
0bb604ca | 3907 | "\nIF-CASE-1 found, start %d, then %d\n", |
b3d6de89 | 3908 | test_bb->index, then_bb->index); |
0bb604ca | 3909 | |
0217cfff | 3910 | if (then_edge->probability) |
3911 | then_prob = REG_BR_PROB_BASE - then_edge->probability; | |
3912 | else | |
3913 | then_prob = REG_BR_PROB_BASE / 2; | |
3914 | ||
3915 | /* We're speculating from the THEN path, we want to make sure the cost | |
3916 | of speculation is within reason. */ | |
3917 | if (! cheap_bb_rtx_cost_p (then_bb, then_prob, | |
4a9d7ef7 | 3918 | COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge->src), |
3919 | predictable_edge_p (then_edge))))) | |
0bb604ca | 3920 | return FALSE; |
3921 | ||
34154e27 | 3922 | if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
9cb2517e | 3923 | { |
3924 | rtx jump = BB_END (else_edge->src); | |
3925 | gcc_assert (JUMP_P (jump)); | |
3926 | else_target = JUMP_LABEL (jump); | |
3927 | } | |
3928 | ||
0bb604ca | 3929 | /* Registers set are dead, or are predicable. */ |
952f0048 | 3930 | if (! dead_or_predicable (test_bb, then_bb, else_bb, |
4115ac36 | 3931 | single_succ_edge (then_bb), 1)) |
0bb604ca | 3932 | return FALSE; |
3933 | ||
3934 | /* Conversion went ok, including moving the insns and fixing up the | |
3935 | jump. Adjust the CFG to match. */ | |
3936 | ||
1ebefdcd | 3937 | /* We can avoid creating a new basic block if then_bb is immediately |
3938 | followed by else_bb, i.e. deleting then_bb allows test_bb to fall | |
9d75589a | 3939 | through to else_bb. */ |
1ebefdcd | 3940 | |
3941 | if (then_bb->next_bb == else_bb | |
3942 | && then_bb->prev_bb == test_bb | |
34154e27 | 3943 | && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun)) |
1ebefdcd | 3944 | { |
3945 | redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb); | |
3946 | new_bb = 0; | |
3947 | } | |
34154e27 | 3948 | else if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
9cb2517e | 3949 | new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb), |
3950 | else_bb, else_target); | |
1ebefdcd | 3951 | else |
3952 | new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb), | |
3072d30e | 3953 | else_bb); |
3954 | ||
3955 | df_set_bb_dirty (test_bb); | |
3956 | df_set_bb_dirty (else_bb); | |
1ebefdcd | 3957 | |
3c0a32c9 | 3958 | then_bb_index = then_bb->index; |
5f5d4cd1 | 3959 | delete_basic_block (then_bb); |
1d855d4c | 3960 | |
3cd757b1 | 3961 | /* Make rest of code believe that the newly created block is the THEN_BB |
3c0a32c9 | 3962 | block we removed. */ |
b3d6de89 | 3963 | if (new_bb) |
3c0a32c9 | 3964 | { |
3072d30e | 3965 | df_bb_replace (then_bb_index, new_bb); |
aa78dca5 | 3966 | /* This should have been done above via force_nonfallthru_and_redirect |
3967 | (possibly called from redirect_edge_and_branch_force). */ | |
3968 | gcc_checking_assert (BB_PARTITION (new_bb) == BB_PARTITION (test_bb)); | |
3c0a32c9 | 3969 | } |
0bb604ca | 3970 | |
bdce7739 | 3971 | num_true_changes++; |
0bb604ca | 3972 | num_updated_if_blocks++; |
3973 | ||
3974 | return TRUE; | |
3975 | } | |
3976 | ||
3977 | /* Test for case 2 above. */ | |
3978 | ||
3979 | static int | |
952f0048 | 3980 | find_if_case_2 (basic_block test_bb, edge then_edge, edge else_edge) |
0bb604ca | 3981 | { |
3982 | basic_block then_bb = then_edge->dest; | |
3983 | basic_block else_bb = else_edge->dest; | |
cd665a06 | 3984 | edge else_succ; |
0217cfff | 3985 | int then_prob, else_prob; |
0bb604ca | 3986 | |
980af7e0 | 3987 | /* We do not want to speculate (empty) loop latches. */ |
3988 | if (current_loops | |
3989 | && else_bb->loop_father->latch == else_bb) | |
3990 | return FALSE; | |
3991 | ||
4f18499c | 3992 | /* If we are partitioning hot/cold basic blocks, we don't want to |
3993 | mess up unconditional or indirect jumps that cross between hot | |
1118aef7 | 3994 | and cold sections. |
e592f6ea | 3995 | |
1118aef7 | 3996 | Basic block partitioning may result in some jumps that appear to |
e592f6ea | 3997 | be optimizable (or blocks that appear to be mergeable), but which really |
3998 | must be left untouched (they are required to make it safely across | |
3999 | partition boundaries). See the comments at the top of | |
1118aef7 | 4000 | bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */ |
4001 | ||
1897b881 | 4002 | if ((BB_END (then_bb) |
4003 | && find_reg_note (BB_END (then_bb), REG_CROSSING_JUMP, NULL_RTX)) | |
4004 | || (BB_END (test_bb) | |
4005 | && find_reg_note (BB_END (test_bb), REG_CROSSING_JUMP, NULL_RTX)) | |
e592f6ea | 4006 | || (BB_END (else_bb) |
4007 | && find_reg_note (BB_END (else_bb), REG_CROSSING_JUMP, | |
1897b881 | 4008 | NULL_RTX))) |
4f18499c | 4009 | return FALSE; |
4010 | ||
0bb604ca | 4011 | /* ELSE has one successor. */ |
ea091dfd | 4012 | if (!single_succ_p (else_bb)) |
0bb604ca | 4013 | return FALSE; |
cd665a06 | 4014 | else |
ea091dfd | 4015 | else_succ = single_succ_edge (else_bb); |
0bb604ca | 4016 | |
4017 | /* ELSE outgoing edge is not complex. */ | |
4018 | if (else_succ->flags & EDGE_COMPLEX) | |
4019 | return FALSE; | |
4020 | ||
4021 | /* ELSE has one predecessor. */ | |
ea091dfd | 4022 | if (!single_pred_p (else_bb)) |
0bb604ca | 4023 | return FALSE; |
4024 | ||
447095c0 | 4025 | /* THEN is not EXIT. */ |
4d2e5d52 | 4026 | if (then_bb->index < NUM_FIXED_BLOCKS) |
447095c0 | 4027 | return FALSE; |
4028 | ||
0217cfff | 4029 | if (else_edge->probability) |
4030 | { | |
4031 | else_prob = else_edge->probability; | |
4032 | then_prob = REG_BR_PROB_BASE - else_prob; | |
4033 | } | |
4034 | else | |
4035 | { | |
4036 | else_prob = REG_BR_PROB_BASE / 2; | |
4037 | then_prob = REG_BR_PROB_BASE / 2; | |
4038 | } | |
4039 | ||
0bb604ca | 4040 | /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */ |
0217cfff | 4041 | if (else_prob > then_prob) |
0bb604ca | 4042 | ; |
4d2e5d52 | 4043 | else if (else_succ->dest->index < NUM_FIXED_BLOCKS |
0051c76a | 4044 | || dominated_by_p (CDI_POST_DOMINATORS, then_bb, |
89d75d78 | 4045 | else_succ->dest)) |
0bb604ca | 4046 | ; |
4047 | else | |
4048 | return FALSE; | |
4049 | ||
4050 | num_possible_if_blocks++; | |
450d042a | 4051 | if (dump_file) |
4052 | fprintf (dump_file, | |
0bb604ca | 4053 | "\nIF-CASE-2 found, start %d, else %d\n", |
b3d6de89 | 4054 | test_bb->index, else_bb->index); |
0bb604ca | 4055 | |
0217cfff | 4056 | /* We're speculating from the ELSE path, we want to make sure the cost |
4057 | of speculation is within reason. */ | |
4058 | if (! cheap_bb_rtx_cost_p (else_bb, else_prob, | |
4a9d7ef7 | 4059 | COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge->src), |
4060 | predictable_edge_p (else_edge))))) | |
0bb604ca | 4061 | return FALSE; |
4062 | ||
0bb604ca | 4063 | /* Registers set are dead, or are predicable. */ |
4115ac36 | 4064 | if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0)) |
0bb604ca | 4065 | return FALSE; |
4066 | ||
4067 | /* Conversion went ok, including moving the insns and fixing up the | |
4068 | jump. Adjust the CFG to match. */ | |
4069 | ||
3072d30e | 4070 | df_set_bb_dirty (test_bb); |
4071 | df_set_bb_dirty (then_bb); | |
5f5d4cd1 | 4072 | delete_basic_block (else_bb); |
0bb604ca | 4073 | |
bdce7739 | 4074 | num_true_changes++; |
0bb604ca | 4075 | num_updated_if_blocks++; |
4076 | ||
4077 | /* ??? We may now fallthru from one of THEN's successors into a join | |
4078 | block. Rerun cleanup_cfg? Examine things manually? Wait? */ | |
4079 | ||
4080 | return TRUE; | |
4081 | } | |
4082 | ||
0bb604ca | 4083 | /* Used by the code above to perform the actual rtl transformations. |
4084 | Return TRUE if successful. | |
4085 | ||
4086 | TEST_BB is the block containing the conditional branch. MERGE_BB | |
4115ac36 | 4087 | is the block containing the code to manipulate. DEST_EDGE is an |
4088 | edge representing a jump to the join block; after the conversion, | |
4089 | TEST_BB should be branching to its destination. | |
0bb604ca | 4090 | REVERSEP is true if the sense of the branch should be reversed. */ |
4091 | ||
4092 | static int | |
952f0048 | 4093 | dead_or_predicable (basic_block test_bb, basic_block merge_bb, |
4115ac36 | 4094 | basic_block other_bb, edge dest_edge, int reversep) |
0bb604ca | 4095 | { |
4115ac36 | 4096 | basic_block new_dest = dest_edge->dest; |
4097 | rtx head, end, jump, earliest = NULL_RTX, old_dest; | |
bc6adae4 | 4098 | bitmap merge_set = NULL; |
a27f5985 | 4099 | /* Number of pending changes. */ |
4100 | int n_validated_changes = 0; | |
4115ac36 | 4101 | rtx new_dest_label = NULL_RTX; |
0bb604ca | 4102 | |
5496dbfc | 4103 | jump = BB_END (test_bb); |
0bb604ca | 4104 | |
4105 | /* Find the extent of the real code in the merge block. */ | |
5496dbfc | 4106 | head = BB_HEAD (merge_bb); |
4107 | end = BB_END (merge_bb); | |
0bb604ca | 4108 | |
9845d120 | 4109 | while (DEBUG_INSN_P (end) && end != head) |
4110 | end = PREV_INSN (end); | |
4111 | ||
fa4578c6 | 4112 | /* If merge_bb ends with a tablejump, predicating/moving insn's |
4113 | into test_bb and then deleting merge_bb will result in the jumptable | |
4114 | that follows merge_bb being removed along with merge_bb and then we | |
4115 | get an unresolved reference to the jumptable. */ | |
4116 | if (tablejump_p (end, NULL, NULL)) | |
4117 | return FALSE; | |
4118 | ||
6d7dc5b9 | 4119 | if (LABEL_P (head)) |
0bb604ca | 4120 | head = NEXT_INSN (head); |
9845d120 | 4121 | while (DEBUG_INSN_P (head) && head != end) |
4122 | head = NEXT_INSN (head); | |
6d7dc5b9 | 4123 | if (NOTE_P (head)) |
0bb604ca | 4124 | { |
4125 | if (head == end) | |
4126 | { | |
4127 | head = end = NULL_RTX; | |
4128 | goto no_body; | |
4129 | } | |
4130 | head = NEXT_INSN (head); | |
9845d120 | 4131 | while (DEBUG_INSN_P (head) && head != end) |
4132 | head = NEXT_INSN (head); | |
0bb604ca | 4133 | } |
4134 | ||
6d7dc5b9 | 4135 | if (JUMP_P (end)) |
0bb604ca | 4136 | { |
4137 | if (head == end) | |
4138 | { | |
4139 | head = end = NULL_RTX; | |
4140 | goto no_body; | |
4141 | } | |
4142 | end = PREV_INSN (end); | |
9845d120 | 4143 | while (DEBUG_INSN_P (end) && end != head) |
4144 | end = PREV_INSN (end); | |
0bb604ca | 4145 | } |
4146 | ||
4f997567 | 4147 | /* Don't move frame-related insn across the conditional branch. This |
4148 | can lead to one of the paths of the branch having wrong unwind info. */ | |
4149 | if (epilogue_completed) | |
4150 | { | |
4151 | rtx insn = head; | |
4152 | while (1) | |
4153 | { | |
4154 | if (INSN_P (insn) && RTX_FRAME_RELATED_P (insn)) | |
4155 | return FALSE; | |
4156 | if (insn == end) | |
4157 | break; | |
4158 | insn = NEXT_INSN (insn); | |
4159 | } | |
4160 | } | |
4161 | ||
c71dadd2 | 4162 | /* Disable handling dead code by conditional execution if the machine needs |
4163 | to do anything funny with the tests, etc. */ | |
4164 | #ifndef IFCVT_MODIFY_TESTS | |
751d3ba7 | 4165 | if (targetm.have_conditional_execution ()) |
0bb604ca | 4166 | { |
4167 | /* In the conditional execution case, we have things easy. We know | |
c7bf1374 | 4168 | the condition is reversible. We don't have to check life info |
4169 | because we're going to conditionally execute the code anyway. | |
0bb604ca | 4170 | All that's left is making sure the insns involved can actually |
4171 | be predicated. */ | |
4172 | ||
9eb946de | 4173 | rtx cond; |
0bb604ca | 4174 | |
4175 | cond = cond_exec_get_condition (jump); | |
4bf64bbb | 4176 | if (! cond) |
4177 | return FALSE; | |
f7785736 | 4178 | |
9eb946de | 4179 | rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX); |
4180 | int prob_val = (note ? XINT (note, 0) : -1); | |
f7785736 | 4181 | |
0bb604ca | 4182 | if (reversep) |
f7785736 | 4183 | { |
4bf64bbb | 4184 | enum rtx_code rev = reversed_comparison_code (cond, jump); |
4185 | if (rev == UNKNOWN) | |
050fd340 | 4186 | return FALSE; |
4bf64bbb | 4187 | cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0), |
f7785736 | 4188 | XEXP (cond, 1)); |
9eb946de | 4189 | if (prob_val >= 0) |
4190 | prob_val = REG_BR_PROB_BASE - prob_val; | |
f7785736 | 4191 | } |
0bb604ca | 4192 | |
a27f5985 | 4193 | if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0) |
4194 | && verify_changes (0)) | |
4195 | n_validated_changes = num_validated_changes (); | |
4196 | else | |
4197 | cancel_changes (0); | |
0bb604ca | 4198 | |
4199 | earliest = jump; | |
4200 | } | |
c71dadd2 | 4201 | #endif |
09669349 | 4202 | |
bc6adae4 | 4203 | /* If we allocated new pseudos (e.g. in the conditional move |
4204 | expander called from noce_emit_cmove), we must resize the | |
4205 | array first. */ | |
4206 | if (max_regno < max_reg_num ()) | |
4207 | max_regno = max_reg_num (); | |
4208 | ||
a27f5985 | 4209 | /* Try the NCE path if the CE path did not result in any changes. */ |
4210 | if (n_validated_changes == 0) | |
0bb604ca | 4211 | { |
bc6adae4 | 4212 | rtx cond, insn; |
4213 | regset live; | |
4214 | bool success; | |
4215 | ||
0bb604ca | 4216 | /* In the non-conditional execution case, we have to verify that there |
4217 | are no trapping operations, no calls, no references to memory, and | |
4218 | that any registers modified are dead at the branch site. */ | |
4219 | ||
bc6adae4 | 4220 | if (!any_condjump_p (jump)) |
0bb604ca | 4221 | return FALSE; |
4222 | ||
4223 | /* Find the extent of the conditional. */ | |
03dbd7cc | 4224 | cond = noce_get_condition (jump, &earliest, false); |
bc6adae4 | 4225 | if (!cond) |
0bb604ca | 4226 | return FALSE; |
4227 | ||
bc6adae4 | 4228 | live = BITMAP_ALLOC (®_obstack); |
4229 | simulate_backwards_to_point (merge_bb, live, end); | |
4230 | success = can_move_insns_across (head, end, earliest, jump, | |
4231 | merge_bb, live, | |
4232 | df_get_live_in (other_bb), NULL); | |
4233 | BITMAP_FREE (live); | |
4234 | if (!success) | |
4235 | return FALSE; | |
a81d7200 | 4236 | |
bc6adae4 | 4237 | /* Collect the set of registers set in MERGE_BB. */ |
a81d7200 | 4238 | merge_set = BITMAP_ALLOC (®_obstack); |
a81d7200 | 4239 | |
4240 | FOR_BB_INSNS (merge_bb, insn) | |
bc6adae4 | 4241 | if (NONDEBUG_INSN_P (insn)) |
4242 | df_simulate_find_defs (insn, merge_set); | |
97ad7dab | 4243 | |
0a55d497 | 4244 | #ifdef HAVE_simple_return |
97ad7dab | 4245 | /* If shrink-wrapping, disable this optimization when test_bb is |
4246 | the first basic block and merge_bb exits. The idea is to not | |
4247 | move code setting up a return register as that may clobber a | |
4248 | register used to pass function parameters, which then must be | |
4249 | saved in caller-saved regs. A caller-saved reg requires the | |
4250 | prologue, killing a shrink-wrap opportunity. */ | |
0a55d497 | 4251 | if ((flag_shrink_wrap && HAVE_simple_return && !epilogue_completed) |
34154e27 | 4252 | && ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb == test_bb |
97ad7dab | 4253 | && single_succ_p (new_dest) |
34154e27 | 4254 | && single_succ (new_dest) == EXIT_BLOCK_PTR_FOR_FN (cfun) |
97ad7dab | 4255 | && bitmap_intersect_p (df_get_live_in (new_dest), merge_set)) |
4256 | { | |
4257 | regset return_regs; | |
4258 | unsigned int i; | |
4259 | ||
4260 | return_regs = BITMAP_ALLOC (®_obstack); | |
4261 | ||
4262 | /* Start off with the intersection of regs used to pass | |
4263 | params and regs used to return values. */ | |
4264 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
4265 | if (FUNCTION_ARG_REGNO_P (i) | |
4266 | && targetm.calls.function_value_regno_p (i)) | |
4267 | bitmap_set_bit (return_regs, INCOMING_REGNO (i)); | |
4268 | ||
34154e27 | 4269 | bitmap_and_into (return_regs, |
4270 | df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun))); | |
4271 | bitmap_and_into (return_regs, | |
4272 | df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun))); | |
97ad7dab | 4273 | if (!bitmap_empty_p (return_regs)) |
4274 | { | |
4275 | FOR_BB_INSNS_REVERSE (new_dest, insn) | |
4276 | if (NONDEBUG_INSN_P (insn)) | |
4277 | { | |
4278 | df_ref *def_rec; | |
4279 | unsigned int uid = INSN_UID (insn); | |
4280 | ||
4281 | /* If this insn sets any reg in return_regs.. */ | |
4282 | for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++) | |
4283 | { | |
4284 | df_ref def = *def_rec; | |
4285 | unsigned r = DF_REF_REGNO (def); | |
4286 | ||
4287 | if (bitmap_bit_p (return_regs, r)) | |
4288 | break; | |
4289 | } | |
4290 | /* ..then add all reg uses to the set of regs | |
4291 | we're interested in. */ | |
4292 | if (*def_rec) | |
4293 | df_simulate_uses (insn, return_regs); | |
4294 | } | |
4295 | if (bitmap_intersect_p (merge_set, return_regs)) | |
4296 | { | |
4297 | BITMAP_FREE (return_regs); | |
4298 | BITMAP_FREE (merge_set); | |
4299 | return FALSE; | |
4300 | } | |
4301 | } | |
4302 | BITMAP_FREE (return_regs); | |
4303 | } | |
0a55d497 | 4304 | #endif |
0bb604ca | 4305 | } |
4306 | ||
4307 | no_body: | |
4308 | /* We don't want to use normal invert_jump or redirect_jump because | |
4309 | we don't want to delete_insn called. Also, we want to do our own | |
4310 | change group management. */ | |
4311 | ||
4312 | old_dest = JUMP_LABEL (jump); | |
13b07dab | 4313 | if (other_bb != new_dest) |
4314 | { | |
4115ac36 | 4315 | if (JUMP_P (BB_END (dest_edge->src))) |
4316 | new_dest_label = JUMP_LABEL (BB_END (dest_edge->src)); | |
34154e27 | 4317 | else if (new_dest == EXIT_BLOCK_PTR_FOR_FN (cfun)) |
4115ac36 | 4318 | new_dest_label = ret_rtx; |
4319 | else | |
4320 | new_dest_label = block_label (new_dest); | |
4321 | ||
13b07dab | 4322 | if (reversep |
4115ac36 | 4323 | ? ! invert_jump_1 (jump, new_dest_label) |
4324 | : ! redirect_jump_1 (jump, new_dest_label)) | |
13b07dab | 4325 | goto cancel; |
4326 | } | |
0bb604ca | 4327 | |
a27f5985 | 4328 | if (verify_changes (n_validated_changes)) |
4329 | confirm_change_group (); | |
4330 | else | |
4331 | goto cancel; | |
0bb604ca | 4332 | |
13b07dab | 4333 | if (other_bb != new_dest) |
3cd757b1 | 4334 | { |
4115ac36 | 4335 | redirect_jump_2 (jump, old_dest, new_dest_label, 0, reversep); |
13b07dab | 4336 | |
4337 | redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest); | |
4338 | if (reversep) | |
4339 | { | |
4340 | gcov_type count, probability; | |
4341 | count = BRANCH_EDGE (test_bb)->count; | |
4342 | BRANCH_EDGE (test_bb)->count = FALLTHRU_EDGE (test_bb)->count; | |
4343 | FALLTHRU_EDGE (test_bb)->count = count; | |
4344 | probability = BRANCH_EDGE (test_bb)->probability; | |
4345 | BRANCH_EDGE (test_bb)->probability | |
4346 | = FALLTHRU_EDGE (test_bb)->probability; | |
4347 | FALLTHRU_EDGE (test_bb)->probability = probability; | |
4348 | update_br_prob_note (test_bb); | |
4349 | } | |
3cd757b1 | 4350 | } |
4351 | ||
0bb604ca | 4352 | /* Move the insns out of MERGE_BB to before the branch. */ |
0bb604ca | 4353 | if (head != NULL) |
4354 | { | |
dfc4de0a | 4355 | rtx insn; |
4356 | ||
5496dbfc | 4357 | if (end == BB_END (merge_bb)) |
4358 | BB_END (merge_bb) = PREV_INSN (head); | |
a6171d02 | 4359 | |
09669349 | 4360 | /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL |
4361 | notes being moved might become invalid. */ | |
dfc4de0a | 4362 | insn = head; |
4363 | do | |
4364 | { | |
4365 | rtx note, set; | |
4366 | ||
4367 | if (! INSN_P (insn)) | |
4368 | continue; | |
4369 | note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
4370 | if (! note) | |
4371 | continue; | |
4372 | set = single_set (insn); | |
eaf4321b | 4373 | if (!set || !function_invariant_p (SET_SRC (set)) |
4374 | || !function_invariant_p (XEXP (note, 0))) | |
dfc4de0a | 4375 | remove_note (insn, note); |
4376 | } while (insn != end && (insn = NEXT_INSN (insn))); | |
4377 | ||
09669349 | 4378 | /* PR46315: when moving insns above a conditional branch, the REG_EQUAL |
4379 | notes referring to the registers being set might become invalid. */ | |
4380 | if (merge_set) | |
4381 | { | |
4382 | unsigned i; | |
4383 | bitmap_iterator bi; | |
4384 | ||
ff3672d9 | 4385 | EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi) |
09669349 | 4386 | remove_reg_equal_equiv_notes_for_regno (i); |
4387 | ||
4388 | BITMAP_FREE (merge_set); | |
09669349 | 4389 | } |
4390 | ||
0bb604ca | 4391 | reorder_insns (head, end, PREV_INSN (earliest)); |
4392 | } | |
13b07dab | 4393 | |
4394 | /* Remove the jump and edge if we can. */ | |
4395 | if (other_bb == new_dest) | |
4396 | { | |
4397 | delete_insn (jump); | |
4398 | remove_edge (BRANCH_EDGE (test_bb)); | |
4399 | /* ??? Can't merge blocks here, as then_bb is still in use. | |
4400 | At minimum, the merge will get done just before bb-reorder. */ | |
4401 | } | |
4402 | ||
0bb604ca | 4403 | return TRUE; |
4404 | ||
4405 | cancel: | |
4406 | cancel_changes (0); | |
bc6adae4 | 4407 | |
09669349 | 4408 | if (merge_set) |
bc6adae4 | 4409 | BITMAP_FREE (merge_set); |
4410 | ||
0bb604ca | 4411 | return FALSE; |
4412 | } | |
4413 | \f | |
abd03efe | 4414 | /* Main entry point for all if-conversion. AFTER_COMBINE is true if |
4415 | we are after combine pass. */ | |
0bb604ca | 4416 | |
cd5220af | 4417 | static void |
abd03efe | 4418 | if_convert (bool after_combine) |
0bb604ca | 4419 | { |
4c26117a | 4420 | basic_block bb; |
1d855d4c | 4421 | int pass; |
0bb604ca | 4422 | |
deb2741b | 4423 | if (optimize == 1) |
4424 | { | |
4425 | df_live_add_problem (); | |
4426 | df_live_set_all_dirty (); | |
4427 | } | |
4428 | ||
abd03efe | 4429 | /* Record whether we are after combine pass. */ |
4430 | ifcvt_after_combine = after_combine; | |
0bb604ca | 4431 | num_possible_if_blocks = 0; |
4432 | num_updated_if_blocks = 0; | |
bdce7739 | 4433 | num_true_changes = 0; |
0bb604ca | 4434 | |
4a6f9e19 | 4435 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
7a3bf727 | 4436 | mark_loop_exit_edges (); |
4437 | loop_optimizer_finalize (); | |
4a6f9e19 | 4438 | free_dominance_info (CDI_DOMINATORS); |
7f42fe24 | 4439 | |
e92e4c4f | 4440 | /* Compute postdominators. */ |
4441 | calculate_dominance_info (CDI_POST_DOMINATORS); | |
0051c76a | 4442 | |
3072d30e | 4443 | df_set_flags (DF_LR_RUN_DCE); |
0bb604ca | 4444 | |
1d855d4c | 4445 | /* Go through each of the basic blocks looking for things to convert. If we |
4446 | have conditional execution, we make multiple passes to allow us to handle | |
4447 | IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */ | |
4448 | pass = 0; | |
4449 | do | |
4450 | { | |
3072d30e | 4451 | df_analyze (); |
4452 | /* Only need to do dce on the first pass. */ | |
4453 | df_clear_flags (DF_LR_RUN_DCE); | |
1d855d4c | 4454 | cond_exec_changed_p = FALSE; |
4455 | pass++; | |
4456 | ||
4457 | #ifdef IFCVT_MULTIPLE_DUMPS | |
450d042a | 4458 | if (dump_file && pass > 1) |
4459 | fprintf (dump_file, "\n\n========== Pass %d ==========\n", pass); | |
1d855d4c | 4460 | #endif |
4461 | ||
fc00614f | 4462 | FOR_EACH_BB_FN (bb, cfun) |
1d855d4c | 4463 | { |
3072d30e | 4464 | basic_block new_bb; |
48e1416a | 4465 | while (!df_get_bb_dirty (bb) |
3072d30e | 4466 | && (new_bb = find_if_header (bb, pass)) != NULL) |
4467 | bb = new_bb; | |
1d855d4c | 4468 | } |
4469 | ||
4470 | #ifdef IFCVT_MULTIPLE_DUMPS | |
450d042a | 4471 | if (dump_file && cond_exec_changed_p) |
5147ec07 | 4472 | print_rtl_with_bb (dump_file, get_insns (), dump_flags); |
1d855d4c | 4473 | #endif |
4474 | } | |
4475 | while (cond_exec_changed_p); | |
4476 | ||
4477 | #ifdef IFCVT_MULTIPLE_DUMPS | |
450d042a | 4478 | if (dump_file) |
4479 | fprintf (dump_file, "\n\n========== no more changes\n"); | |
1d855d4c | 4480 | #endif |
0bb604ca | 4481 | |
0051c76a | 4482 | free_dominance_info (CDI_POST_DOMINATORS); |
0bb604ca | 4483 | |
450d042a | 4484 | if (dump_file) |
4485 | fflush (dump_file); | |
0bb604ca | 4486 | |
099a9fb1 | 4487 | clear_aux_for_blocks (); |
4488 | ||
3072d30e | 4489 | /* If we allocated new pseudos, we must resize the array for sched1. */ |
4490 | if (max_regno < max_reg_num ()) | |
4491 | max_regno = max_reg_num (); | |
0bb604ca | 4492 | |
4493 | /* Write the final stats. */ | |
450d042a | 4494 | if (dump_file && num_possible_if_blocks > 0) |
0bb604ca | 4495 | { |
450d042a | 4496 | fprintf (dump_file, |
0bb604ca | 4497 | "\n%d possible IF blocks searched.\n", |
4498 | num_possible_if_blocks); | |
450d042a | 4499 | fprintf (dump_file, |
0bb604ca | 4500 | "%d IF blocks converted.\n", |
4501 | num_updated_if_blocks); | |
450d042a | 4502 | fprintf (dump_file, |
bdce7739 | 4503 | "%d true changes made.\n\n\n", |
4504 | num_true_changes); | |
0bb604ca | 4505 | } |
4506 | ||
deb2741b | 4507 | if (optimize == 1) |
4508 | df_remove_problem (df_live); | |
4509 | ||
922b8fd9 | 4510 | #ifdef ENABLE_CHECKING |
21724bde | 4511 | verify_flow_info (); |
922b8fd9 | 4512 | #endif |
0bb604ca | 4513 | } |
77fce4cd | 4514 | \f |
77fce4cd | 4515 | /* If-conversion and CFG cleanup. */ |
2a1990e9 | 4516 | static unsigned int |
77fce4cd | 4517 | rest_of_handle_if_conversion (void) |
4518 | { | |
4519 | if (flag_if_conversion) | |
4520 | { | |
4521 | if (dump_file) | |
4a020a8c | 4522 | { |
4523 | dump_reg_info (dump_file); | |
4524 | dump_flow_info (dump_file, dump_flags); | |
4525 | } | |
77fce4cd | 4526 | cleanup_cfg (CLEANUP_EXPENSIVE); |
abd03efe | 4527 | if_convert (false); |
77fce4cd | 4528 | } |
4529 | ||
3072d30e | 4530 | cleanup_cfg (0); |
2a1990e9 | 4531 | return 0; |
77fce4cd | 4532 | } |
4533 | ||
cbe8bda8 | 4534 | namespace { |
4535 | ||
4536 | const pass_data pass_data_rtl_ifcvt = | |
77fce4cd | 4537 | { |
cbe8bda8 | 4538 | RTL_PASS, /* type */ |
4539 | "ce1", /* name */ | |
4540 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4541 | true, /* has_execute */ |
4542 | TV_IFCVT, /* tv_id */ | |
4543 | 0, /* properties_required */ | |
4544 | 0, /* properties_provided */ | |
4545 | 0, /* properties_destroyed */ | |
4546 | 0, /* todo_flags_start */ | |
4547 | ( TODO_df_finish | TODO_verify_rtl_sharing | 0 ), /* todo_flags_finish */ | |
77fce4cd | 4548 | }; |
4549 | ||
cbe8bda8 | 4550 | class pass_rtl_ifcvt : public rtl_opt_pass |
4551 | { | |
4552 | public: | |
9af5ce0c | 4553 | pass_rtl_ifcvt (gcc::context *ctxt) |
4554 | : rtl_opt_pass (pass_data_rtl_ifcvt, ctxt) | |
cbe8bda8 | 4555 | {} |
4556 | ||
4557 | /* opt_pass methods: */ | |
31315c24 | 4558 | virtual bool gate (function *) |
4559 | { | |
4560 | return (optimize > 0) && dbg_cnt (if_conversion); | |
4561 | } | |
4562 | ||
65b0537f | 4563 | virtual unsigned int execute (function *) |
4564 | { | |
4565 | return rest_of_handle_if_conversion (); | |
4566 | } | |
cbe8bda8 | 4567 | |
4568 | }; // class pass_rtl_ifcvt | |
4569 | ||
4570 | } // anon namespace | |
4571 | ||
4572 | rtl_opt_pass * | |
4573 | make_pass_rtl_ifcvt (gcc::context *ctxt) | |
4574 | { | |
4575 | return new pass_rtl_ifcvt (ctxt); | |
4576 | } | |
4577 | ||
77fce4cd | 4578 | |
4579 | /* Rerun if-conversion, as combine may have simplified things enough | |
4580 | to now meet sequence length restrictions. */ | |
77fce4cd | 4581 | |
cbe8bda8 | 4582 | namespace { |
4583 | ||
4584 | const pass_data pass_data_if_after_combine = | |
77fce4cd | 4585 | { |
cbe8bda8 | 4586 | RTL_PASS, /* type */ |
4587 | "ce2", /* name */ | |
4588 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4589 | true, /* has_execute */ |
4590 | TV_IFCVT, /* tv_id */ | |
4591 | 0, /* properties_required */ | |
4592 | 0, /* properties_provided */ | |
4593 | 0, /* properties_destroyed */ | |
4594 | 0, /* todo_flags_start */ | |
4595 | ( TODO_df_finish | TODO_verify_rtl_sharing ), /* todo_flags_finish */ | |
77fce4cd | 4596 | }; |
4597 | ||
cbe8bda8 | 4598 | class pass_if_after_combine : public rtl_opt_pass |
4599 | { | |
4600 | public: | |
9af5ce0c | 4601 | pass_if_after_combine (gcc::context *ctxt) |
4602 | : rtl_opt_pass (pass_data_if_after_combine, ctxt) | |
cbe8bda8 | 4603 | {} |
4604 | ||
4605 | /* opt_pass methods: */ | |
31315c24 | 4606 | virtual bool gate (function *) |
4607 | { | |
4608 | return optimize > 0 && flag_if_conversion | |
4609 | && dbg_cnt (if_after_combine); | |
4610 | } | |
4611 | ||
65b0537f | 4612 | virtual unsigned int execute (function *) |
4613 | { | |
4614 | if_convert (true); | |
4615 | return 0; | |
4616 | } | |
cbe8bda8 | 4617 | |
4618 | }; // class pass_if_after_combine | |
4619 | ||
4620 | } // anon namespace | |
4621 | ||
4622 | rtl_opt_pass * | |
4623 | make_pass_if_after_combine (gcc::context *ctxt) | |
4624 | { | |
4625 | return new pass_if_after_combine (ctxt); | |
4626 | } | |
4627 | ||
77fce4cd | 4628 | |
cbe8bda8 | 4629 | namespace { |
4630 | ||
4631 | const pass_data pass_data_if_after_reload = | |
77fce4cd | 4632 | { |
cbe8bda8 | 4633 | RTL_PASS, /* type */ |
4634 | "ce3", /* name */ | |
4635 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 4636 | true, /* has_execute */ |
4637 | TV_IFCVT2, /* tv_id */ | |
4638 | 0, /* properties_required */ | |
4639 | 0, /* properties_provided */ | |
4640 | 0, /* properties_destroyed */ | |
4641 | 0, /* todo_flags_start */ | |
4642 | ( TODO_df_finish | TODO_verify_rtl_sharing ), /* todo_flags_finish */ | |
77fce4cd | 4643 | }; |
cbe8bda8 | 4644 | |
4645 | class pass_if_after_reload : public rtl_opt_pass | |
4646 | { | |
4647 | public: | |
9af5ce0c | 4648 | pass_if_after_reload (gcc::context *ctxt) |
4649 | : rtl_opt_pass (pass_data_if_after_reload, ctxt) | |
cbe8bda8 | 4650 | {} |
4651 | ||
4652 | /* opt_pass methods: */ | |
31315c24 | 4653 | virtual bool gate (function *) |
4654 | { | |
4655 | return optimize > 0 && flag_if_conversion2 | |
4656 | && dbg_cnt (if_after_reload); | |
4657 | } | |
4658 | ||
65b0537f | 4659 | virtual unsigned int execute (function *) |
4660 | { | |
4661 | if_convert (true); | |
4662 | return 0; | |
4663 | } | |
cbe8bda8 | 4664 | |
4665 | }; // class pass_if_after_reload | |
4666 | ||
4667 | } // anon namespace | |
4668 | ||
4669 | rtl_opt_pass * | |
4670 | make_pass_if_after_reload (gcc::context *ctxt) | |
4671 | { | |
4672 | return new pass_if_after_reload (ctxt); | |
4673 | } |