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1322177d 1/* Procedure integration for GCC.
3c71940f 2 Copyright (C) 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
c28abdf0 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
175160e7
MT
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
5
1322177d 6This file is part of GCC.
175160e7 7
1322177d
LB
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
175160e7 12
1322177d
LB
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
175160e7
MT
17
18You should have received a copy of the GNU General Public License
1322177d
LB
19along with GCC; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2102111-1307, USA. */
175160e7 22
175160e7 23#include "config.h"
670ee920 24#include "system.h"
4977bab6
ZW
25#include "coretypes.h"
26#include "tm.h"
ccd043a9 27
175160e7
MT
28#include "rtl.h"
29#include "tree.h"
6baf1cc8 30#include "tm_p.h"
12307ca2 31#include "regs.h"
175160e7 32#include "flags.h"
135d50f1 33#include "debug.h"
175160e7 34#include "insn-config.h"
175160e7
MT
35#include "expr.h"
36#include "output.h"
e9a25f70 37#include "recog.h"
175160e7
MT
38#include "integrate.h"
39#include "real.h"
6adb4e3a 40#include "except.h"
175160e7 41#include "function.h"
d6f4ec51 42#include "toplev.h"
ab87f8c8 43#include "intl.h"
e6fd097e 44#include "loop.h"
c6d9a88c 45#include "params.h"
c0e7830f 46#include "ggc.h"
91d231cb 47#include "target.h"
63e1b1c4 48#include "langhooks.h"
175160e7 49
175160e7
MT
50/* Similar, but round to the next highest integer that meets the
51 alignment. */
52#define CEIL_ROUND(VALUE,ALIGN) (((VALUE) + (ALIGN) - 1) & ~((ALIGN)- 1))
53
54/* Default max number of insns a function can have and still be inline.
55 This is overridden on RISC machines. */
56#ifndef INTEGRATE_THRESHOLD
aec98e42
ML
57/* Inlining small functions might save more space then not inlining at
58 all. Assume 1 instruction for the call and 1.5 insns per argument. */
175160e7 59#define INTEGRATE_THRESHOLD(DECL) \
aec98e42 60 (optimize_size \
c51262cf 61 ? (1 + (3 * list_length (DECL_ARGUMENTS (DECL))) / 2) \
aec98e42 62 : (8 * (8 + list_length (DECL_ARGUMENTS (DECL)))))
175160e7
MT
63#endif
64\f
c0e7830f 65
dc297297 66/* Private type used by {get/has}_func_hard_reg_initial_val. */
e2500fed 67typedef struct initial_value_pair GTY(()) {
c0e7830f
DD
68 rtx hard_reg;
69 rtx pseudo;
70} initial_value_pair;
e2500fed 71typedef struct initial_value_struct GTY(()) {
c0e7830f
DD
72 int num_entries;
73 int max_entries;
e2500fed 74 initial_value_pair * GTY ((length ("%h.num_entries"))) entries;
c0e7830f
DD
75} initial_value_struct;
76
77static void setup_initial_hard_reg_value_integration PARAMS ((struct function *, struct inline_remap *));
78
3fe41456
KG
79static rtvec initialize_for_inline PARAMS ((tree));
80static void note_modified_parmregs PARAMS ((rtx, rtx, void *));
81static void integrate_parm_decls PARAMS ((tree, struct inline_remap *,
0a1c58a2 82 rtvec));
3fe41456 83static tree integrate_decl_tree PARAMS ((tree,
0a1c58a2 84 struct inline_remap *));
3fe41456 85static void subst_constants PARAMS ((rtx *, rtx,
0a1c58a2 86 struct inline_remap *, int));
3fe41456 87static void set_block_origin_self PARAMS ((tree));
3fe41456
KG
88static void set_block_abstract_flags PARAMS ((tree, int));
89static void process_reg_param PARAMS ((struct inline_remap *, rtx,
0a1c58a2 90 rtx));
3fe41456 91void set_decl_abstract_flags PARAMS ((tree, int));
3fe41456 92static void mark_stores PARAMS ((rtx, rtx, void *));
0a1c58a2
JL
93static void save_parm_insns PARAMS ((rtx, rtx));
94static void copy_insn_list PARAMS ((rtx, struct inline_remap *,
95 rtx));
52a11cbf
RH
96static void copy_insn_notes PARAMS ((rtx, struct inline_remap *,
97 int));
3fe41456
KG
98static int compare_blocks PARAMS ((const PTR, const PTR));
99static int find_block PARAMS ((const PTR, const PTR));
f9e814f1 100
36edd3cc
BS
101/* Used by copy_rtx_and_substitute; this indicates whether the function is
102 called for the purpose of inlining or some other purpose (i.e. loop
103 unrolling). This affects how constant pool references are handled.
104 This variable contains the FUNCTION_DECL for the inlined function. */
105static struct function *inlining = 0;
175160e7 106\f
1f3d3a31 107/* Returns the Ith entry in the label_map contained in MAP. If the
e5e809f4
JL
108 Ith entry has not yet been set, return a fresh label. This function
109 performs a lazy initialization of label_map, thereby avoiding huge memory
110 explosions when the label_map gets very large. */
111
1f3d3a31
JL
112rtx
113get_label_from_map (map, i)
e5e809f4 114 struct inline_remap *map;
1f3d3a31
JL
115 int i;
116{
117 rtx x = map->label_map[i];
118
119 if (x == NULL_RTX)
00174bdf 120 x = map->label_map[i] = gen_label_rtx ();
1f3d3a31
JL
121
122 return x;
123}
124
91d231cb
JM
125/* Return false if the function FNDECL cannot be inlined on account of its
126 attributes, true otherwise. */
588d3ade 127bool
91d231cb
JM
128function_attribute_inlinable_p (fndecl)
129 tree fndecl;
130{
b9a26d09 131 if (targetm.attribute_table)
91d231cb 132 {
b9a26d09 133 tree a;
91d231cb 134
b9a26d09 135 for (a = DECL_ATTRIBUTES (fndecl); a; a = TREE_CHAIN (a))
91d231cb 136 {
b9a26d09
NB
137 tree name = TREE_PURPOSE (a);
138 int i;
139
140 for (i = 0; targetm.attribute_table[i].name != NULL; i++)
141 if (is_attribute_p (targetm.attribute_table[i].name, name))
142 return (*targetm.function_attribute_inlinable_p) (fndecl);
91d231cb 143 }
91d231cb
JM
144 }
145
b9a26d09 146 return true;
91d231cb
JM
147}
148
175160e7
MT
149/* Zero if the current function (whose FUNCTION_DECL is FNDECL)
150 is safe and reasonable to integrate into other functions.
ab87f8c8 151 Nonzero means value is a warning msgid with a single %s
175160e7
MT
152 for the function's name. */
153
dff01034 154const char *
175160e7 155function_cannot_inline_p (fndecl)
b3694847 156 tree fndecl;
175160e7 157{
b3694847 158 rtx insn;
175160e7 159 tree last = tree_last (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
f9e814f1
TP
160
161 /* For functions marked as inline increase the maximum size to
c6d9a88c 162 MAX_INLINE_INSNS (-finline-limit-<n>). For regular functions
f9e814f1
TP
163 use the limit given by INTEGRATE_THRESHOLD. */
164
165 int max_insns = (DECL_INLINE (fndecl))
c6d9a88c 166 ? (MAX_INLINE_INSNS
f9e814f1
TP
167 + 8 * list_length (DECL_ARGUMENTS (fndecl)))
168 : INTEGRATE_THRESHOLD (fndecl);
169
b3694847
SS
170 int ninsns = 0;
171 tree parms;
175160e7 172
5daf7c0a
JM
173 if (DECL_UNINLINABLE (fndecl))
174 return N_("function cannot be inline");
175
e5e809f4 176 /* No inlines with varargs. */
6c535c69 177 if (last && TREE_VALUE (last) != void_type_node)
ab87f8c8 178 return N_("varargs function cannot be inline");
175160e7
MT
179
180 if (current_function_calls_alloca)
ab87f8c8 181 return N_("function using alloca cannot be inline");
175160e7 182
cd8cee7b
RH
183 if (current_function_calls_setjmp)
184 return N_("function using setjmp cannot be inline");
185
52a11cbf
RH
186 if (current_function_calls_eh_return)
187 return N_("function uses __builtin_eh_return");
188
175160e7 189 if (current_function_contains_functions)
ab87f8c8 190 return N_("function with nested functions cannot be inline");
175160e7 191
b9096844 192 if (forced_labels)
14a774a9
RK
193 return
194 N_("function with label addresses used in initializers cannot inline");
b9096844 195
aeb302bb
JM
196 if (current_function_cannot_inline)
197 return current_function_cannot_inline;
198
175160e7 199 /* If its not even close, don't even look. */
f9e814f1 200 if (get_max_uid () > 3 * max_insns)
ab87f8c8 201 return N_("function too large to be inline");
175160e7 202
175160e7
MT
203#if 0
204 /* Don't inline functions which do not specify a function prototype and
205 have BLKmode argument or take the address of a parameter. */
206 for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
207 {
208 if (TYPE_MODE (TREE_TYPE (parms)) == BLKmode)
209 TREE_ADDRESSABLE (parms) = 1;
210 if (last == NULL_TREE && TREE_ADDRESSABLE (parms))
ab87f8c8 211 return N_("no prototype, and parameter address used; cannot be inline");
175160e7
MT
212 }
213#endif
214
215 /* We can't inline functions that return structures
216 the old-fashioned PCC way, copying into a static block. */
217 if (current_function_returns_pcc_struct)
ab87f8c8 218 return N_("inline functions not supported for this return value type");
175160e7
MT
219
220 /* We can't inline functions that return structures of varying size. */
f8013343
MM
221 if (TREE_CODE (TREE_TYPE (TREE_TYPE (fndecl))) != VOID_TYPE
222 && int_size_in_bytes (TREE_TYPE (TREE_TYPE (fndecl))) < 0)
ab87f8c8 223 return N_("function with varying-size return value cannot be inline");
175160e7 224
c8ad69c1
RK
225 /* Cannot inline a function with a varying size argument or one that
226 receives a transparent union. */
175160e7 227 for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
c8ad69c1
RK
228 {
229 if (int_size_in_bytes (TREE_TYPE (parms)) < 0)
ab87f8c8 230 return N_("function with varying-size parameter cannot be inline");
2bf105ab
RK
231 else if (TREE_CODE (TREE_TYPE (parms)) == UNION_TYPE
232 && TYPE_TRANSPARENT_UNION (TREE_TYPE (parms)))
ab87f8c8 233 return N_("function with transparent unit parameter cannot be inline");
c8ad69c1 234 }
175160e7 235
f9e814f1 236 if (get_max_uid () > max_insns)
175160e7 237 {
12307ca2
RK
238 for (ninsns = 0, insn = get_first_nonparm_insn ();
239 insn && ninsns < max_insns;
175160e7 240 insn = NEXT_INSN (insn))
2c3c49de 241 if (INSN_P (insn))
12307ca2 242 ninsns++;
175160e7
MT
243
244 if (ninsns >= max_insns)
ab87f8c8 245 return N_("function too large to be inline");
175160e7
MT
246 }
247
acd693d1
RH
248 /* We will not inline a function which uses computed goto. The addresses of
249 its local labels, which may be tucked into global storage, are of course
8d9afc4e 250 not constant across instantiations, which causes unexpected behavior. */
acd693d1
RH
251 if (current_function_has_computed_jump)
252 return N_("function with computed jump cannot inline");
ead02915 253
2edc3b33
JW
254 /* We cannot inline a nested function that jumps to a nonlocal label. */
255 if (current_function_has_nonlocal_goto)
ab87f8c8 256 return N_("function with nonlocal goto cannot be inline");
2edc3b33 257
64ed0f40 258 /* We can't inline functions that return a PARALLEL rtx. */
19e7881c
MM
259 if (DECL_RTL_SET_P (DECL_RESULT (fndecl)))
260 {
261 rtx result = DECL_RTL (DECL_RESULT (fndecl));
262 if (GET_CODE (result) == PARALLEL)
263 return N_("inline functions not supported for this return value type");
264 }
64ed0f40 265
b36f4ed3
NC
266 /* If the function has a target specific attribute attached to it,
267 then we assume that we should not inline it. This can be overriden
91d231cb
JM
268 by the target if it defines TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P. */
269 if (!function_attribute_inlinable_p (fndecl))
b36f4ed3
NC
270 return N_("function with target specific attribute(s) cannot be inlined");
271
272 return NULL;
175160e7
MT
273}
274\f
175160e7
MT
275/* Map pseudo reg number into the PARM_DECL for the parm living in the reg.
276 Zero for a reg that isn't a parm's home.
277 Only reg numbers less than max_parm_reg are mapped here. */
278static tree *parmdecl_map;
279
175160e7
MT
280/* In save_for_inline, nonzero if past the parm-initialization insns. */
281static int in_nonparm_insns;
282\f
f93dacbd 283/* Subroutine for `save_for_inline'. Performs initialization
175160e7 284 needed to save FNDECL's insns and info for future inline expansion. */
36edd3cc 285
49ad7cfa 286static rtvec
36edd3cc 287initialize_for_inline (fndecl)
175160e7 288 tree fndecl;
175160e7 289{
49ad7cfa 290 int i;
175160e7
MT
291 rtvec arg_vector;
292 tree parms;
293
175160e7 294 /* Clear out PARMDECL_MAP. It was allocated in the caller's frame. */
961192e1 295 memset ((char *) parmdecl_map, 0, max_parm_reg * sizeof (tree));
175160e7
MT
296 arg_vector = rtvec_alloc (list_length (DECL_ARGUMENTS (fndecl)));
297
298 for (parms = DECL_ARGUMENTS (fndecl), i = 0;
299 parms;
300 parms = TREE_CHAIN (parms), i++)
301 {
302 rtx p = DECL_RTL (parms);
303
8a173c73
RK
304 /* If we have (mem (addressof (mem ...))), use the inner MEM since
305 otherwise the copy_rtx call below will not unshare the MEM since
306 it shares ADDRESSOF. */
307 if (GET_CODE (p) == MEM && GET_CODE (XEXP (p, 0)) == ADDRESSOF
308 && GET_CODE (XEXP (XEXP (p, 0), 0)) == MEM)
309 p = XEXP (XEXP (p, 0), 0);
310
175160e7
MT
311 RTVEC_ELT (arg_vector, i) = p;
312
313 if (GET_CODE (p) == REG)
314 parmdecl_map[REGNO (p)] = parms;
f231e307
RK
315 else if (GET_CODE (p) == CONCAT)
316 {
317 rtx preal = gen_realpart (GET_MODE (XEXP (p, 0)), p);
318 rtx pimag = gen_imagpart (GET_MODE (preal), p);
319
320 if (GET_CODE (preal) == REG)
321 parmdecl_map[REGNO (preal)] = parms;
322 if (GET_CODE (pimag) == REG)
323 parmdecl_map[REGNO (pimag)] = parms;
324 }
325
048dfa64
RS
326 /* This flag is cleared later
327 if the function ever modifies the value of the parm. */
175160e7
MT
328 TREE_READONLY (parms) = 1;
329 }
330
49ad7cfa 331 return arg_vector;
175160e7
MT
332}
333
94755d92 334/* Copy NODE (which must be a DECL, but not a PARM_DECL). The DECL
00174bdf 335 originally was in the FROM_FN, but now it will be in the
94755d92 336 TO_FN. */
02e24c7a 337
94755d92
MM
338tree
339copy_decl_for_inlining (decl, from_fn, to_fn)
340 tree decl;
341 tree from_fn;
342 tree to_fn;
02e24c7a 343{
94755d92
MM
344 tree copy;
345
346 /* Copy the declaration. */
347 if (TREE_CODE (decl) == PARM_DECL || TREE_CODE (decl) == RESULT_DECL)
a8f8d1cc 348 {
c246c65d
JM
349 tree type;
350 int invisiref = 0;
351
352 /* See if the frontend wants to pass this by invisible reference. */
353 if (TREE_CODE (decl) == PARM_DECL
354 && DECL_ARG_TYPE (decl) != TREE_TYPE (decl)
355 && POINTER_TYPE_P (DECL_ARG_TYPE (decl))
356 && TREE_TYPE (DECL_ARG_TYPE (decl)) == TREE_TYPE (decl))
357 {
358 invisiref = 1;
359 type = DECL_ARG_TYPE (decl);
360 }
361 else
362 type = TREE_TYPE (decl);
363
a8f8d1cc
MM
364 /* For a parameter, we must make an equivalent VAR_DECL, not a
365 new PARM_DECL. */
c246c65d
JM
366 copy = build_decl (VAR_DECL, DECL_NAME (decl), type);
367 if (!invisiref)
368 {
369 TREE_ADDRESSABLE (copy) = TREE_ADDRESSABLE (decl);
370 TREE_READONLY (copy) = TREE_READONLY (decl);
371 TREE_THIS_VOLATILE (copy) = TREE_THIS_VOLATILE (decl);
372 }
373 else
374 {
375 TREE_ADDRESSABLE (copy) = 0;
376 TREE_READONLY (copy) = 1;
377 TREE_THIS_VOLATILE (copy) = 0;
378 }
a8f8d1cc 379 }
94755d92
MM
380 else
381 {
382 copy = copy_node (decl);
63e1b1c4 383 (*lang_hooks.dup_lang_specific_decl) (copy);
a71811fe
MM
384
385 /* TREE_ADDRESSABLE isn't used to indicate that a label's
386 address has been taken; it's for internal bookkeeping in
387 expand_goto_internal. */
388 if (TREE_CODE (copy) == LABEL_DECL)
389 TREE_ADDRESSABLE (copy) = 0;
94755d92
MM
390 }
391
392 /* Set the DECL_ABSTRACT_ORIGIN so the debugging routines know what
393 declaration inspired this copy. */
394 DECL_ABSTRACT_ORIGIN (copy) = DECL_ORIGIN (decl);
395
396 /* The new variable/label has no RTL, yet. */
19e7881c 397 SET_DECL_RTL (copy, NULL_RTX);
94755d92
MM
398
399 /* These args would always appear unused, if not for this. */
400 TREE_USED (copy) = 1;
401
402 /* Set the context for the new declaration. */
403 if (!DECL_CONTEXT (decl))
404 /* Globals stay global. */
00174bdf 405 ;
94755d92
MM
406 else if (DECL_CONTEXT (decl) != from_fn)
407 /* Things that weren't in the scope of the function we're inlining
408 from aren't in the scope we're inlining too, either. */
409 ;
410 else if (TREE_STATIC (decl))
411 /* Function-scoped static variables should say in the original
412 function. */
02e24c7a
MM
413 ;
414 else
94755d92
MM
415 /* Ordinary automatic local variables are now in the scope of the
416 new function. */
417 DECL_CONTEXT (copy) = to_fn;
02e24c7a
MM
418
419 return copy;
420}
421
175160e7
MT
422/* Make the insns and PARM_DECLs of the current function permanent
423 and record other information in DECL_SAVED_INSNS to allow inlining
424 of this function in subsequent calls.
425
426 This routine need not copy any insns because we are not going
427 to immediately compile the insns in the insn chain. There
428 are two cases when we would compile the insns for FNDECL:
429 (1) when FNDECL is expanded inline, and (2) when FNDECL needs to
430 be output at the end of other compilation, because somebody took
431 its address. In the first case, the insns of FNDECL are copied
432 as it is expanded inline, so FNDECL's saved insns are not
433 modified. In the second case, FNDECL is used for the last time,
434 so modifying the rtl is not a problem.
435
09578c27
RK
436 We don't have to worry about FNDECL being inline expanded by
437 other functions which are written at the end of compilation
438 because flag_no_inline is turned on when we begin writing
439 functions at the end of compilation. */
175160e7
MT
440
441void
f93dacbd 442save_for_inline (fndecl)
175160e7
MT
443 tree fndecl;
444{
445 rtx insn;
49ad7cfa 446 rtvec argvec;
175160e7 447 rtx first_nonparm_insn;
175160e7
MT
448
449 /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
450 Later we set TREE_READONLY to 0 if the parm is modified inside the fn.
451 Also set up ARG_VECTOR, which holds the unmodified DECL_RTX values
452 for the parms, prior to elimination of virtual registers.
453 These values are needed for substituting parms properly. */
4838c5ee
AO
454 if (! flag_no_inline)
455 parmdecl_map = (tree *) xmalloc (max_parm_reg * sizeof (tree));
175160e7
MT
456
457 /* Make and emit a return-label if we have not already done so. */
458
459 if (return_label == 0)
460 {
461 return_label = gen_label_rtx ();
462 emit_label (return_label);
463 }
464
4838c5ee
AO
465 if (! flag_no_inline)
466 argvec = initialize_for_inline (fndecl);
467 else
468 argvec = NULL;
175160e7 469
4793dca1
JH
470 /* Delete basic block notes created by early run of find_basic_block.
471 The notes would be later used by find_basic_blocks to reuse the memory
472 for basic_block structures on already freed obstack. */
473 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
474 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK)
53c17031 475 delete_related_insns (insn);
4793dca1 476
175160e7
MT
477 /* If there are insns that copy parms from the stack into pseudo registers,
478 those insns are not copied. `expand_inline_function' must
479 emit the correct code to handle such things. */
480
481 insn = get_insns ();
482 if (GET_CODE (insn) != NOTE)
483 abort ();
484
4838c5ee
AO
485 if (! flag_no_inline)
486 {
487 /* Get the insn which signals the end of parameter setup code. */
488 first_nonparm_insn = get_first_nonparm_insn ();
489
490 /* Now just scan the chain of insns to see what happens to our
491 PARM_DECLs. If a PARM_DECL is used but never modified, we
492 can substitute its rtl directly when expanding inline (and
493 perform constant folding when its incoming value is
494 constant). Otherwise, we have to copy its value into a new
495 register and track the new register's life. */
496 in_nonparm_insns = 0;
497 save_parm_insns (insn, first_nonparm_insn);
498
499 cfun->inl_max_label_num = max_label_num ();
500 cfun->inl_last_parm_insn = cfun->x_last_parm_insn;
501 cfun->original_arg_vector = argvec;
502 }
01d939e8 503 cfun->original_decl_initial = DECL_INITIAL (fndecl);
f93dacbd 504 cfun->no_debugging_symbols = (write_symbols == NO_DEBUG);
01d939e8 505 DECL_SAVED_INSNS (fndecl) = cfun;
67289ea6
MM
506
507 /* Clean up. */
4838c5ee
AO
508 if (! flag_no_inline)
509 free (parmdecl_map);
175160e7 510}
0a1c58a2
JL
511
512/* Scan the chain of insns to see what happens to our PARM_DECLs. If a
513 PARM_DECL is used but never modified, we can substitute its rtl directly
514 when expanding inline (and perform constant folding when its incoming
515 value is constant). Otherwise, we have to copy its value into a new
516 register and track the new register's life. */
517
518static void
519save_parm_insns (insn, first_nonparm_insn)
00174bdf
KH
520 rtx insn;
521 rtx first_nonparm_insn;
0a1c58a2 522{
0a1c58a2
JL
523 if (insn == NULL_RTX)
524 return;
525
526 for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
527 {
528 if (insn == first_nonparm_insn)
529 in_nonparm_insns = 1;
530
2c3c49de 531 if (INSN_P (insn))
0a1c58a2
JL
532 {
533 /* Record what interesting things happen to our parameters. */
534 note_stores (PATTERN (insn), note_modified_parmregs, NULL);
535
536 /* If this is a CALL_PLACEHOLDER insn then we need to look into the
537 three attached sequences: normal call, sibling call and tail
00174bdf 538 recursion. */
0a1c58a2
JL
539 if (GET_CODE (insn) == CALL_INSN
540 && GET_CODE (PATTERN (insn)) == CALL_PLACEHOLDER)
541 {
542 int i;
543
544 for (i = 0; i < 3; i++)
545 save_parm_insns (XEXP (PATTERN (insn), i),
546 first_nonparm_insn);
547 }
548 }
549 }
550}
175160e7 551\f
175160e7
MT
552/* Note whether a parameter is modified or not. */
553
554static void
84832317 555note_modified_parmregs (reg, x, data)
175160e7 556 rtx reg;
487a6e06 557 rtx x ATTRIBUTE_UNUSED;
84832317 558 void *data ATTRIBUTE_UNUSED;
175160e7
MT
559{
560 if (GET_CODE (reg) == REG && in_nonparm_insns
561 && REGNO (reg) < max_parm_reg
562 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
563 && parmdecl_map[REGNO (reg)] != 0)
564 TREE_READONLY (parmdecl_map[REGNO (reg)]) = 0;
565}
566
175160e7
MT
567/* Unfortunately, we need a global copy of const_equiv map for communication
568 with a function called from note_stores. Be *very* careful that this
569 is used properly in the presence of recursion. */
570
c68da89c 571varray_type global_const_equiv_varray;
175160e7
MT
572\f
573#define FIXED_BASE_PLUS_P(X) \
574 (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
575 && GET_CODE (XEXP (X, 0)) == REG \
576 && REGNO (XEXP (X, 0)) >= FIRST_VIRTUAL_REGISTER \
f9b06ea4 577 && REGNO (XEXP (X, 0)) <= LAST_VIRTUAL_REGISTER)
175160e7 578
a4c3ddd8
BS
579/* Called to set up a mapping for the case where a parameter is in a
580 register. If it is read-only and our argument is a constant, set up the
581 constant equivalence.
582
583 If LOC is REG_USERVAR_P, the usual case, COPY must also have that flag set
584 if it is a register.
585
586 Also, don't allow hard registers here; they might not be valid when
587 substituted into insns. */
588static void
589process_reg_param (map, loc, copy)
590 struct inline_remap *map;
591 rtx loc, copy;
592{
593 if ((GET_CODE (copy) != REG && GET_CODE (copy) != SUBREG)
594 || (GET_CODE (copy) == REG && REG_USERVAR_P (loc)
595 && ! REG_USERVAR_P (copy))
596 || (GET_CODE (copy) == REG
597 && REGNO (copy) < FIRST_PSEUDO_REGISTER))
598 {
599 rtx temp = copy_to_mode_reg (GET_MODE (loc), copy);
600 REG_USERVAR_P (temp) = REG_USERVAR_P (loc);
c68da89c
KR
601 if (CONSTANT_P (copy) || FIXED_BASE_PLUS_P (copy))
602 SET_CONST_EQUIV_DATA (map, temp, copy, CONST_AGE_PARM);
a4c3ddd8
BS
603 copy = temp;
604 }
605 map->reg_map[REGNO (loc)] = copy;
606}
e6cfb550 607
a97901e6 608/* Compare two BLOCKs for qsort. The key we sort on is the
0339d239
DD
609 BLOCK_ABSTRACT_ORIGIN of the blocks. We cannot just subtract the
610 two pointers, because it may overflow sizeof(int). */
a97901e6
MM
611
612static int
613compare_blocks (v1, v2)
614 const PTR v1;
615 const PTR v2;
616{
47ee9bcb
KG
617 tree b1 = *((const tree *) v1);
618 tree b2 = *((const tree *) v2);
0339d239
DD
619 char *p1 = (char *) BLOCK_ABSTRACT_ORIGIN (b1);
620 char *p2 = (char *) BLOCK_ABSTRACT_ORIGIN (b2);
a97901e6 621
0339d239
DD
622 if (p1 == p2)
623 return 0;
624 return p1 < p2 ? -1 : 1;
a97901e6
MM
625}
626
627/* Compare two BLOCKs for bsearch. The first pointer corresponds to
628 an original block; the second to a remapped equivalent. */
629
630static int
631find_block (v1, v2)
632 const PTR v1;
633 const PTR v2;
634{
47ee9bcb
KG
635 const union tree_node *b1 = (const union tree_node *) v1;
636 tree b2 = *((const tree *) v2);
0339d239
DD
637 char *p1 = (char *) b1;
638 char *p2 = (char *) BLOCK_ABSTRACT_ORIGIN (b2);
a97901e6 639
0339d239
DD
640 if (p1 == p2)
641 return 0;
642 return p1 < p2 ? -1 : 1;
a97901e6
MM
643}
644
175160e7
MT
645/* Integrate the procedure defined by FNDECL. Note that this function
646 may wind up calling itself. Since the static variables are not
647 reentrant, we do not assign them until after the possibility
bfa30b22 648 of recursion is eliminated.
175160e7
MT
649
650 If IGNORE is nonzero, do not produce a value.
651 Otherwise store the value in TARGET if it is nonzero and that is convenient.
652
653 Value is:
654 (rtx)-1 if we could not substitute the function
655 0 if we substituted it and it does not produce a value
656 else an rtx for where the value is stored. */
657
658rtx
12307ca2
RK
659expand_inline_function (fndecl, parms, target, ignore, type,
660 structure_value_addr)
175160e7
MT
661 tree fndecl, parms;
662 rtx target;
663 int ignore;
664 tree type;
665 rtx structure_value_addr;
666{
36edd3cc 667 struct function *inlining_previous;
49ad7cfa 668 struct function *inl_f = DECL_SAVED_INSNS (fndecl);
81578142 669 tree formal, actual, block;
36edd3cc 670 rtx parm_insns = inl_f->emit->x_first_insn;
49ad7cfa
BS
671 rtx insns = (inl_f->inl_last_parm_insn
672 ? NEXT_INSN (inl_f->inl_last_parm_insn)
673 : parm_insns);
175160e7
MT
674 tree *arg_trees;
675 rtx *arg_vals;
175160e7 676 int max_regno;
b3694847 677 int i;
36edd3cc 678 int min_labelno = inl_f->emit->x_first_label_num;
49ad7cfa 679 int max_labelno = inl_f->inl_max_label_num;
175160e7 680 int nargs;
175160e7 681 rtx loc;
2132517d 682 rtx stack_save = 0;
175160e7 683 rtx temp;
c68da89c 684 struct inline_remap *map = 0;
e2500fed 685 rtvec arg_vector = inl_f->original_arg_vector;
a6dd1cb6 686 rtx static_chain_value = 0;
49ad7cfa 687 int inl_max_uid;
52a11cbf 688 int eh_region_offset;
175160e7 689
253a01b4
JL
690 /* The pointer used to track the true location of the memory used
691 for MAP->LABEL_MAP. */
692 rtx *real_label_map = 0;
693
175160e7 694 /* Allow for equivalences of the pseudos we make for virtual fp and ap. */
36edd3cc 695 max_regno = inl_f->emit->x_reg_rtx_no + 3;
175160e7
MT
696 if (max_regno < FIRST_PSEUDO_REGISTER)
697 abort ();
698
ecff20d4
JM
699 /* Pull out the decl for the function definition; fndecl may be a
700 local declaration, which would break DECL_ABSTRACT_ORIGIN. */
701 fndecl = inl_f->decl;
702
175160e7
MT
703 nargs = list_length (DECL_ARGUMENTS (fndecl));
704
c2f8b491
JH
705 if (cfun->preferred_stack_boundary < inl_f->preferred_stack_boundary)
706 cfun->preferred_stack_boundary = inl_f->preferred_stack_boundary;
707
2d8d0db8
RK
708 /* Check that the parms type match and that sufficient arguments were
709 passed. Since the appropriate conversions or default promotions have
710 already been applied, the machine modes should match exactly. */
711
12307ca2 712 for (formal = DECL_ARGUMENTS (fndecl), actual = parms;
175160e7 713 formal;
12307ca2 714 formal = TREE_CHAIN (formal), actual = TREE_CHAIN (actual))
175160e7 715 {
2d8d0db8
RK
716 tree arg;
717 enum machine_mode mode;
718
719 if (actual == 0)
60e8b9f0 720 return (rtx) (size_t) -1;
2d8d0db8
RK
721
722 arg = TREE_VALUE (actual);
12307ca2 723 mode = TYPE_MODE (DECL_ARG_TYPE (formal));
2d8d0db8 724
3b07c79b
JJ
725 if (arg == error_mark_node
726 || mode != TYPE_MODE (TREE_TYPE (arg))
2d8d0db8
RK
727 /* If they are block mode, the types should match exactly.
728 They don't match exactly if TREE_TYPE (FORMAL) == ERROR_MARK_NODE,
729 which could happen if the parameter has incomplete type. */
d80db03d
RK
730 || (mode == BLKmode
731 && (TYPE_MAIN_VARIANT (TREE_TYPE (arg))
732 != TYPE_MAIN_VARIANT (TREE_TYPE (formal)))))
60e8b9f0 733 return (rtx) (size_t) -1;
175160e7
MT
734 }
735
2d8d0db8
RK
736 /* Extra arguments are valid, but will be ignored below, so we must
737 evaluate them here for side-effects. */
738 for (; actual; actual = TREE_CHAIN (actual))
739 expand_expr (TREE_VALUE (actual), const0_rtx,
740 TYPE_MODE (TREE_TYPE (TREE_VALUE (actual))), 0);
741
175160e7
MT
742 /* Expand the function arguments. Do this first so that any
743 new registers get created before we allocate the maps. */
744
67289ea6
MM
745 arg_vals = (rtx *) xmalloc (nargs * sizeof (rtx));
746 arg_trees = (tree *) xmalloc (nargs * sizeof (tree));
175160e7
MT
747
748 for (formal = DECL_ARGUMENTS (fndecl), actual = parms, i = 0;
749 formal;
750 formal = TREE_CHAIN (formal), actual = TREE_CHAIN (actual), i++)
751 {
752 /* Actual parameter, converted to the type of the argument within the
753 function. */
754 tree arg = convert (TREE_TYPE (formal), TREE_VALUE (actual));
755 /* Mode of the variable used within the function. */
756 enum machine_mode mode = TYPE_MODE (TREE_TYPE (formal));
9175051c 757 int invisiref = 0;
175160e7 758
175160e7
MT
759 arg_trees[i] = arg;
760 loc = RTVEC_ELT (arg_vector, i);
761
762 /* If this is an object passed by invisible reference, we copy the
763 object into a stack slot and save its address. If this will go
764 into memory, we do nothing now. Otherwise, we just expand the
765 argument. */
766 if (GET_CODE (loc) == MEM && GET_CODE (XEXP (loc, 0)) == REG
767 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER)
768 {
1da68f56 769 rtx stack_slot = assign_temp (TREE_TYPE (arg), 1, 1, 1);
175160e7
MT
770
771 store_expr (arg, stack_slot, 0);
175160e7 772 arg_vals[i] = XEXP (stack_slot, 0);
9175051c 773 invisiref = 1;
175160e7
MT
774 }
775 else if (GET_CODE (loc) != MEM)
36aa0bf5
RK
776 {
777 if (GET_MODE (loc) != TYPE_MODE (TREE_TYPE (arg)))
69107307
AO
778 {
779 int unsignedp = TREE_UNSIGNED (TREE_TYPE (formal));
780 enum machine_mode pmode = TYPE_MODE (TREE_TYPE (formal));
781
782 pmode = promote_mode (TREE_TYPE (formal), pmode,
783 &unsignedp, 0);
784
785 if (GET_MODE (loc) != pmode)
786 abort ();
787
788 /* The mode if LOC and ARG can differ if LOC was a variable
789 that had its mode promoted via PROMOTED_MODE. */
790 arg_vals[i] = convert_modes (pmode,
791 TYPE_MODE (TREE_TYPE (arg)),
792 expand_expr (arg, NULL_RTX, mode,
793 EXPAND_SUM),
794 unsignedp);
795 }
36aa0bf5
RK
796 else
797 arg_vals[i] = expand_expr (arg, NULL_RTX, mode, EXPAND_SUM);
798 }
175160e7
MT
799 else
800 arg_vals[i] = 0;
801
802 if (arg_vals[i] != 0
803 && (! TREE_READONLY (formal)
804 /* If the parameter is not read-only, copy our argument through
805 a register. Also, we cannot use ARG_VALS[I] if it overlaps
806 TARGET in any way. In the inline function, they will likely
807 be two different pseudos, and `safe_from_p' will make all
808 sorts of smart assumptions about their not conflicting.
809 But if ARG_VALS[I] overlaps TARGET, these assumptions are
9175051c
JM
810 wrong, so put ARG_VALS[I] into a fresh register.
811 Don't worry about invisible references, since their stack
812 temps will never overlap the target. */
175160e7 813 || (target != 0
9175051c 814 && ! invisiref
3eda169f
RK
815 && (GET_CODE (arg_vals[i]) == REG
816 || GET_CODE (arg_vals[i]) == SUBREG
817 || GET_CODE (arg_vals[i]) == MEM)
30caed6d
RS
818 && reg_overlap_mentioned_p (arg_vals[i], target))
819 /* ??? We must always copy a SUBREG into a REG, because it might
820 get substituted into an address, and not all ports correctly
821 handle SUBREGs in addresses. */
822 || (GET_CODE (arg_vals[i]) == SUBREG)))
4b7cb39e 823 arg_vals[i] = copy_to_mode_reg (GET_MODE (loc), arg_vals[i]);
12307ca2
RK
824
825 if (arg_vals[i] != 0 && GET_CODE (arg_vals[i]) == REG
e5e809f4 826 && POINTER_TYPE_P (TREE_TYPE (formal)))
12307ca2 827 mark_reg_pointer (arg_vals[i],
bdb429a5 828 TYPE_ALIGN (TREE_TYPE (TREE_TYPE (formal))));
175160e7 829 }
00174bdf 830
175160e7
MT
831 /* Allocate the structures we use to remap things. */
832
c826ae21 833 map = (struct inline_remap *) xcalloc (1, sizeof (struct inline_remap));
175160e7
MT
834 map->fndecl = fndecl;
835
a97901e6 836 VARRAY_TREE_INIT (map->block_map, 10, "block_map");
67289ea6 837 map->reg_map = (rtx *) xcalloc (max_regno, sizeof (rtx));
175160e7 838
3bb1329e
BK
839 /* We used to use alloca here, but the size of what it would try to
840 allocate would occasionally cause it to exceed the stack limit and
841 cause unpredictable core dumps. */
253a01b4
JL
842 real_label_map
843 = (rtx *) xmalloc ((max_labelno) * sizeof (rtx));
844 map->label_map = real_label_map;
464186fb 845 map->local_return_label = NULL_RTX;
175160e7 846
36edd3cc 847 inl_max_uid = (inl_f->emit->x_cur_insn_uid + 1);
67289ea6 848 map->insn_map = (rtx *) xcalloc (inl_max_uid, sizeof (rtx));
175160e7 849 map->min_insnno = 0;
49ad7cfa 850 map->max_insnno = inl_max_uid;
175160e7 851
a70f7bb2 852 map->integrating = 1;
96e60f0c
JJ
853 map->compare_src = NULL_RTX;
854 map->compare_mode = VOIDmode;
a70f7bb2 855
c68da89c
KR
856 /* const_equiv_varray maps pseudos in our routine to constants, so
857 it needs to be large enough for all our pseudos. This is the
858 number we are currently using plus the number in the called
859 routine, plus 15 for each arg, five to compute the virtual frame
860 pointer, and five for the return value. This should be enough
861 for most cases. We do not reference entries outside the range of
862 the map.
c66e0741
RK
863
864 ??? These numbers are quite arbitrary and were obtained by
865 experimentation. At some point, we should try to allocate the
09da1532 866 table after all the parameters are set up so we can more accurately
c66e0741
RK
867 estimate the number of pseudos we will need. */
868
c68da89c
KR
869 VARRAY_CONST_EQUIV_INIT (map->const_equiv_varray,
870 (max_reg_num ()
871 + (max_regno - FIRST_PSEUDO_REGISTER)
872 + 15 * nargs
873 + 10),
874 "expand_inline_function");
175160e7
MT
875 map->const_age = 0;
876
877 /* Record the current insn in case we have to set up pointers to frame
3ba10494
AS
878 and argument memory blocks. If there are no insns yet, add a dummy
879 insn that can be used as an insertion point. */
175160e7 880 map->insns_at_start = get_last_insn ();
e9a25f70 881 if (map->insns_at_start == 0)
6496a589 882 map->insns_at_start = emit_note (NULL, NOTE_INSN_DELETED);
175160e7 883
36edd3cc 884 map->regno_pointer_align = inl_f->emit->regno_pointer_align;
3502dc9c 885 map->x_regno_reg_rtx = inl_f->emit->x_regno_reg_rtx;
12307ca2 886
175160e7
MT
887 /* Update the outgoing argument size to allow for those in the inlined
888 function. */
49ad7cfa
BS
889 if (inl_f->outgoing_args_size > current_function_outgoing_args_size)
890 current_function_outgoing_args_size = inl_f->outgoing_args_size;
175160e7
MT
891
892 /* If the inline function needs to make PIC references, that means
893 that this function's PIC offset table must be used. */
49ad7cfa 894 if (inl_f->uses_pic_offset_table)
175160e7
MT
895 current_function_uses_pic_offset_table = 1;
896
a6dd1cb6 897 /* If this function needs a context, set it up. */
49ad7cfa 898 if (inl_f->needs_context)
a6dd1cb6
RK
899 static_chain_value = lookup_static_chain (fndecl);
900
1c1f2d29
JM
901 if (GET_CODE (parm_insns) == NOTE
902 && NOTE_LINE_NUMBER (parm_insns) > 0)
903 {
904 rtx note = emit_note (NOTE_SOURCE_FILE (parm_insns),
905 NOTE_LINE_NUMBER (parm_insns));
906 if (note)
907 RTX_INTEGRATED_P (note) = 1;
908 }
909
175160e7
MT
910 /* Process each argument. For each, set up things so that the function's
911 reference to the argument will refer to the argument being passed.
912 We only replace REG with REG here. Any simplifications are done
913 via const_equiv_map.
914
915 We make two passes: In the first, we deal with parameters that will
916 be placed into registers, since we need to ensure that the allocated
917 register number fits in const_equiv_map. Then we store all non-register
918 parameters into their memory location. */
919
fd28789a
RS
920 /* Don't try to free temp stack slots here, because we may put one of the
921 parameters into a temp stack slot. */
922
175160e7
MT
923 for (i = 0; i < nargs; i++)
924 {
925 rtx copy = arg_vals[i];
926
927 loc = RTVEC_ELT (arg_vector, i);
928
929 /* There are three cases, each handled separately. */
930 if (GET_CODE (loc) == MEM && GET_CODE (XEXP (loc, 0)) == REG
931 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER)
932 {
933 /* This must be an object passed by invisible reference (it could
934 also be a variable-sized object, but we forbid inlining functions
935 with variable-sized arguments). COPY is the address of the
936 actual value (this computation will cause it to be copied). We
937 map that address for the register, noting the actual address as
938 an equivalent in case it can be substituted into the insns. */
939
940 if (GET_CODE (copy) != REG)
941 {
942 temp = copy_addr_to_reg (copy);
c68da89c
KR
943 if (CONSTANT_P (copy) || FIXED_BASE_PLUS_P (copy))
944 SET_CONST_EQUIV_DATA (map, temp, copy, CONST_AGE_PARM);
175160e7
MT
945 copy = temp;
946 }
947 map->reg_map[REGNO (XEXP (loc, 0))] = copy;
948 }
949 else if (GET_CODE (loc) == MEM)
950 {
14a774a9
RK
951 /* This is the case of a parameter that lives in memory. It
952 will live in the block we allocate in the called routine's
175160e7 953 frame that simulates the incoming argument area. Do nothing
14a774a9
RK
954 with the parameter now; we will call store_expr later. In
955 this case, however, we must ensure that the virtual stack and
956 incoming arg rtx values are expanded now so that we can be
957 sure we have enough slots in the const equiv map since the
958 store_expr call can easily blow the size estimate. */
14a774a9
RK
959 if (DECL_SAVED_INSNS (fndecl)->args_size != 0)
960 copy_rtx_and_substitute (virtual_incoming_args_rtx, map, 0);
175160e7
MT
961 }
962 else if (GET_CODE (loc) == REG)
a4c3ddd8 963 process_reg_param (map, loc, copy);
bc2eeab2
RS
964 else if (GET_CODE (loc) == CONCAT)
965 {
bc2eeab2
RS
966 rtx locreal = gen_realpart (GET_MODE (XEXP (loc, 0)), loc);
967 rtx locimag = gen_imagpart (GET_MODE (XEXP (loc, 0)), loc);
968 rtx copyreal = gen_realpart (GET_MODE (locreal), copy);
969 rtx copyimag = gen_imagpart (GET_MODE (locimag), copy);
970
a4c3ddd8
BS
971 process_reg_param (map, locreal, copyreal);
972 process_reg_param (map, locimag, copyimag);
bc2eeab2 973 }
175160e7
MT
974 else
975 abort ();
175160e7
MT
976 }
977
36edd3cc
BS
978 /* Tell copy_rtx_and_substitute to handle constant pool SYMBOL_REFs
979 specially. This function can be called recursively, so we need to
980 save the previous value. */
981 inlining_previous = inlining;
982 inlining = inl_f;
983
175160e7
MT
984 /* Now do the parameters that will be placed in memory. */
985
986 for (formal = DECL_ARGUMENTS (fndecl), i = 0;
987 formal; formal = TREE_CHAIN (formal), i++)
988 {
175160e7
MT
989 loc = RTVEC_ELT (arg_vector, i);
990
991 if (GET_CODE (loc) == MEM
992 /* Exclude case handled above. */
993 && ! (GET_CODE (XEXP (loc, 0)) == REG
994 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER))
995 {
cdd6e2db
TW
996 rtx note = emit_note (DECL_SOURCE_FILE (formal),
997 DECL_SOURCE_LINE (formal));
998 if (note)
999 RTX_INTEGRATED_P (note) = 1;
175160e7
MT
1000
1001 /* Compute the address in the area we reserved and store the
1002 value there. */
14a774a9
RK
1003 temp = copy_rtx_and_substitute (loc, map, 1);
1004 subst_constants (&temp, NULL_RTX, map, 1);
175160e7
MT
1005 apply_change_group ();
1006 if (! memory_address_p (GET_MODE (temp), XEXP (temp, 0)))
1007 temp = change_address (temp, VOIDmode, XEXP (temp, 0));
1008 store_expr (arg_trees[i], temp, 0);
175160e7
MT
1009 }
1010 }
1011
1012 /* Deal with the places that the function puts its result.
1013 We are driven by what is placed into DECL_RESULT.
1014
1015 Initially, we assume that we don't have anything special handling for
1016 REG_FUNCTION_RETURN_VALUE_P. */
1017
1018 map->inline_target = 0;
19e7881c
MM
1019 loc = (DECL_RTL_SET_P (DECL_RESULT (fndecl))
1020 ? DECL_RTL (DECL_RESULT (fndecl)) : NULL_RTX);
58a2f534 1021
175160e7
MT
1022 if (TYPE_MODE (type) == VOIDmode)
1023 /* There is no return value to worry about. */
1024 ;
1025 else if (GET_CODE (loc) == MEM)
1026 {
58a2f534
RH
1027 if (GET_CODE (XEXP (loc, 0)) == ADDRESSOF)
1028 {
14a774a9
RK
1029 temp = copy_rtx_and_substitute (loc, map, 1);
1030 subst_constants (&temp, NULL_RTX, map, 1);
58a2f534
RH
1031 apply_change_group ();
1032 target = temp;
1033 }
1034 else
1035 {
1036 if (! structure_value_addr
1037 || ! aggregate_value_p (DECL_RESULT (fndecl)))
1038 abort ();
00174bdf 1039
58a2f534
RH
1040 /* Pass the function the address in which to return a structure
1041 value. Note that a constructor can cause someone to call us
1042 with STRUCTURE_VALUE_ADDR, but the initialization takes place
1043 via the first parameter, rather than the struct return address.
175160e7 1044
58a2f534
RH
1045 We have two cases: If the address is a simple register
1046 indirect, use the mapping mechanism to point that register to
1047 our structure return address. Otherwise, store the structure
1048 return value into the place that it will be referenced from. */
175160e7 1049
58a2f534 1050 if (GET_CODE (XEXP (loc, 0)) == REG)
175160e7 1051 {
58a2f534
RH
1052 temp = force_operand (structure_value_addr, NULL_RTX);
1053 temp = force_reg (Pmode, temp);
e2a5f96b
R
1054 /* A virtual register might be invalid in an insn, because
1055 it can cause trouble in reload. Since we don't have access
1056 to the expanders at map translation time, make sure we have
1057 a proper register now.
1058 If a virtual register is actually valid, cse or combine
1059 can put it into the mapped insns. */
1060 if (REGNO (temp) >= FIRST_VIRTUAL_REGISTER
1061 && REGNO (temp) <= LAST_VIRTUAL_REGISTER)
1062 temp = copy_to_mode_reg (Pmode, temp);
58a2f534
RH
1063 map->reg_map[REGNO (XEXP (loc, 0))] = temp;
1064
c68da89c
KR
1065 if (CONSTANT_P (structure_value_addr)
1066 || GET_CODE (structure_value_addr) == ADDRESSOF
1067 || (GET_CODE (structure_value_addr) == PLUS
1068 && (XEXP (structure_value_addr, 0)
1069 == virtual_stack_vars_rtx)
1070 && (GET_CODE (XEXP (structure_value_addr, 1))
1071 == CONST_INT)))
58a2f534 1072 {
c68da89c
KR
1073 SET_CONST_EQUIV_DATA (map, temp, structure_value_addr,
1074 CONST_AGE_PARM);
58a2f534
RH
1075 }
1076 }
1077 else
1078 {
14a774a9
RK
1079 temp = copy_rtx_and_substitute (loc, map, 1);
1080 subst_constants (&temp, NULL_RTX, map, 0);
58a2f534
RH
1081 apply_change_group ();
1082 emit_move_insn (temp, structure_value_addr);
175160e7 1083 }
175160e7
MT
1084 }
1085 }
1086 else if (ignore)
1087 /* We will ignore the result value, so don't look at its structure.
1088 Note that preparations for an aggregate return value
1089 do need to be made (above) even if it will be ignored. */
1090 ;
1091 else if (GET_CODE (loc) == REG)
1092 {
1093 /* The function returns an object in a register and we use the return
1094 value. Set up our target for remapping. */
1095
6d2f8887 1096 /* Machine mode function was declared to return. */
175160e7
MT
1097 enum machine_mode departing_mode = TYPE_MODE (type);
1098 /* (Possibly wider) machine mode it actually computes
3ff2293f
BK
1099 (for the sake of callers that fail to declare it right).
1100 We have to use the mode of the result's RTL, rather than
1101 its type, since expand_function_start may have promoted it. */
60da674b
RH
1102 enum machine_mode arriving_mode
1103 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
175160e7
MT
1104 rtx reg_to_map;
1105
1106 /* Don't use MEMs as direct targets because on some machines
1107 substituting a MEM for a REG makes invalid insns.
1108 Let the combiner substitute the MEM if that is valid. */
1109 if (target == 0 || GET_CODE (target) != REG
1110 || GET_MODE (target) != departing_mode)
c36fce9a
GRK
1111 {
1112 /* Don't make BLKmode registers. If this looks like
1113 a BLKmode object being returned in a register, get
00174bdf 1114 the mode from that, otherwise abort. */
c36fce9a
GRK
1115 if (departing_mode == BLKmode)
1116 {
60da674b
RH
1117 if (REG == GET_CODE (DECL_RTL (DECL_RESULT (fndecl))))
1118 {
1119 departing_mode = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
1120 arriving_mode = departing_mode;
1121 }
1122 else
00174bdf 1123 abort ();
c36fce9a 1124 }
00174bdf
KH
1125
1126 target = gen_reg_rtx (departing_mode);
c36fce9a 1127 }
175160e7
MT
1128
1129 /* If function's value was promoted before return,
1130 avoid machine mode mismatch when we substitute INLINE_TARGET.
1131 But TARGET is what we will return to the caller. */
1132 if (arriving_mode != departing_mode)
2d0bd5fd
RK
1133 {
1134 /* Avoid creating a paradoxical subreg wider than
1135 BITS_PER_WORD, since that is illegal. */
1136 if (GET_MODE_BITSIZE (arriving_mode) > BITS_PER_WORD)
1137 {
1138 if (!TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (departing_mode),
1139 GET_MODE_BITSIZE (arriving_mode)))
1140 /* Maybe could be handled by using convert_move () ? */
1141 abort ();
1142 reg_to_map = gen_reg_rtx (arriving_mode);
1143 target = gen_lowpart (departing_mode, reg_to_map);
1144 }
1145 else
38a448ca 1146 reg_to_map = gen_rtx_SUBREG (arriving_mode, target, 0);
2d0bd5fd 1147 }
175160e7
MT
1148 else
1149 reg_to_map = target;
1150
1151 /* Usually, the result value is the machine's return register.
1152 Sometimes it may be a pseudo. Handle both cases. */
1153 if (REG_FUNCTION_VALUE_P (loc))
1154 map->inline_target = reg_to_map;
1155 else
1156 map->reg_map[REGNO (loc)] = reg_to_map;
1157 }
9688f9ad
RH
1158 else if (GET_CODE (loc) == CONCAT)
1159 {
1160 enum machine_mode departing_mode = TYPE_MODE (type);
1161 enum machine_mode arriving_mode
1162 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
1163
1164 if (departing_mode != arriving_mode)
1165 abort ();
1166 if (GET_CODE (XEXP (loc, 0)) != REG
1167 || GET_CODE (XEXP (loc, 1)) != REG)
1168 abort ();
1169
1170 /* Don't use MEMs as direct targets because on some machines
1171 substituting a MEM for a REG makes invalid insns.
1172 Let the combiner substitute the MEM if that is valid. */
1173 if (target == 0 || GET_CODE (target) != REG
1174 || GET_MODE (target) != departing_mode)
1175 target = gen_reg_rtx (departing_mode);
1176
1177 if (GET_CODE (target) != CONCAT)
1178 abort ();
1179
1180 map->reg_map[REGNO (XEXP (loc, 0))] = XEXP (target, 0);
1181 map->reg_map[REGNO (XEXP (loc, 1))] = XEXP (target, 1);
1182 }
64ed0f40
JW
1183 else
1184 abort ();
175160e7 1185
86c99549
RH
1186 /* Remap the exception handler data pointer from one to the other. */
1187 temp = get_exception_pointer (inl_f);
1188 if (temp)
1189 map->reg_map[REGNO (temp)] = get_exception_pointer (cfun);
1190
e5e809f4
JL
1191 /* Initialize label_map. get_label_from_map will actually make
1192 the labels. */
961192e1 1193 memset ((char *) &map->label_map[min_labelno], 0,
e5e809f4 1194 (max_labelno - min_labelno) * sizeof (rtx));
175160e7 1195
a97901e6
MM
1196 /* Make copies of the decls of the symbols in the inline function, so that
1197 the copies of the variables get declared in the current function. Set
1198 up things so that lookup_static_chain knows that to interpret registers
1199 in SAVE_EXPRs for TYPE_SIZEs as local. */
1200 inline_function_decl = fndecl;
1201 integrate_parm_decls (DECL_ARGUMENTS (fndecl), map, arg_vector);
1202 block = integrate_decl_tree (inl_f->original_decl_initial, map);
1203 BLOCK_ABSTRACT_ORIGIN (block) = DECL_ORIGIN (fndecl);
1204 inline_function_decl = 0;
1205
1206 /* Make a fresh binding contour that we can easily remove. Do this after
1207 expanding our arguments so cleanups are properly scoped. */
1208 expand_start_bindings_and_block (0, block);
1209
1210 /* Sort the block-map so that it will be easy to find remapped
1211 blocks later. */
00174bdf 1212 qsort (&VARRAY_TREE (map->block_map, 0),
a97901e6
MM
1213 map->block_map->elements_used,
1214 sizeof (tree),
1215 compare_blocks);
1216
175160e7
MT
1217 /* Perform postincrements before actually calling the function. */
1218 emit_queue ();
1219
1220 /* Clean up stack so that variables might have smaller offsets. */
1221 do_pending_stack_adjust ();
1222
c68da89c
KR
1223 /* Save a copy of the location of const_equiv_varray for
1224 mark_stores, called via note_stores. */
1225 global_const_equiv_varray = map->const_equiv_varray;
175160e7 1226
136cf361
RK
1227 /* If the called function does an alloca, save and restore the
1228 stack pointer around the call. This saves stack space, but
2132517d
RK
1229 also is required if this inline is being done between two
1230 pushes. */
49ad7cfa 1231 if (inl_f->calls_alloca)
2132517d
RK
1232 emit_stack_save (SAVE_BLOCK, &stack_save, NULL_RTX);
1233
c0e7830f
DD
1234 /* Map pseudos used for initial hard reg values. */
1235 setup_initial_hard_reg_value_integration (inl_f, map);
1236
0a1c58a2
JL
1237 /* Now copy the insns one by one. */
1238 copy_insn_list (insns, map, static_chain_value);
1239
52a11cbf
RH
1240 /* Duplicate the EH regions. This will create an offset from the
1241 region numbers in the function we're inlining to the region
1242 numbers in the calling function. This must wait until after
1243 copy_insn_list, as we need the insn map to be complete. */
1244 eh_region_offset = duplicate_eh_regions (inl_f, map);
1245
464186fb 1246 /* Now copy the REG_NOTES for those insns. */
52a11cbf 1247 copy_insn_notes (insns, map, eh_region_offset);
464186fb
RH
1248
1249 /* If the insn sequence required one, emit the return label. */
1250 if (map->local_return_label)
1251 emit_label (map->local_return_label);
1252
0a1c58a2
JL
1253 /* Restore the stack pointer if we saved it above. */
1254 if (inl_f->calls_alloca)
1255 emit_stack_restore (SAVE_BLOCK, stack_save, NULL_RTX);
1256
1257 if (! cfun->x_whole_function_mode_p)
1258 /* In statement-at-a-time mode, we just tell the front-end to add
1259 this block to the list of blocks at this binding level. We
1260 can't do it the way it's done for function-at-a-time mode the
1261 superblocks have not been created yet. */
43577e6b 1262 (*lang_hooks.decls.insert_block) (block);
0a1c58a2
JL
1263 else
1264 {
00174bdf 1265 BLOCK_CHAIN (block)
0a1c58a2
JL
1266 = BLOCK_CHAIN (DECL_INITIAL (current_function_decl));
1267 BLOCK_CHAIN (DECL_INITIAL (current_function_decl)) = block;
1268 }
1269
1270 /* End the scope containing the copied formal parameter variables
1271 and copied LABEL_DECLs. We pass NULL_TREE for the variables list
1272 here so that expand_end_bindings will not check for unused
1273 variables. That's already been checked for when the inlined
1274 function was defined. */
1275 expand_end_bindings (NULL_TREE, 1, 1);
1276
1277 /* Must mark the line number note after inlined functions as a repeat, so
1278 that the test coverage code can avoid counting the call twice. This
1279 just tells the code to ignore the immediately following line note, since
1280 there already exists a copy of this note before the expanded inline call.
1281 This line number note is still needed for debugging though, so we can't
1282 delete it. */
1283 if (flag_test_coverage)
b3b42a4d 1284 emit_note (0, NOTE_INSN_REPEATED_LINE_NUMBER);
0a1c58a2
JL
1285
1286 emit_line_note (input_filename, lineno);
1287
1288 /* If the function returns a BLKmode object in a register, copy it
00174bdf
KH
1289 out of the temp register into a BLKmode memory object. */
1290 if (target
0a1c58a2
JL
1291 && TYPE_MODE (TREE_TYPE (TREE_TYPE (fndecl))) == BLKmode
1292 && ! aggregate_value_p (TREE_TYPE (TREE_TYPE (fndecl))))
1293 target = copy_blkmode_from_reg (0, target, TREE_TYPE (TREE_TYPE (fndecl)));
00174bdf 1294
0a1c58a2
JL
1295 if (structure_value_addr)
1296 {
1297 target = gen_rtx_MEM (TYPE_MODE (type),
1298 memory_address (TYPE_MODE (type),
1299 structure_value_addr));
289c5b45 1300 set_mem_attributes (target, type, 1);
0a1c58a2
JL
1301 }
1302
1303 /* Make sure we free the things we explicitly allocated with xmalloc. */
1304 if (real_label_map)
1305 free (real_label_map);
1306 VARRAY_FREE (map->const_equiv_varray);
1307 free (map->reg_map);
0a1c58a2
JL
1308 free (map->insn_map);
1309 free (map);
1310 free (arg_vals);
1311 free (arg_trees);
1312
1313 inlining = inlining_previous;
1314
1315 return target;
1316}
1317
1318/* Make copies of each insn in the given list using the mapping
1319 computed in expand_inline_function. This function may call itself for
1320 insns containing sequences.
00174bdf 1321
f93dacbd 1322 Copying is done in two passes, first the insns and then their REG_NOTES.
0a1c58a2 1323
cc2902df 1324 If static_chain_value is nonzero, it represents the context-pointer
00174bdf 1325 register for the function. */
0a1c58a2
JL
1326
1327static void
1328copy_insn_list (insns, map, static_chain_value)
00174bdf
KH
1329 rtx insns;
1330 struct inline_remap *map;
1331 rtx static_chain_value;
0a1c58a2 1332{
b3694847 1333 int i;
0a1c58a2
JL
1334 rtx insn;
1335 rtx temp;
0a1c58a2
JL
1336#ifdef HAVE_cc0
1337 rtx cc0_insn = 0;
1338#endif
03984308 1339 rtx static_chain_mem = 0;
0a1c58a2
JL
1340
1341 /* Copy the insns one by one. Do this in two passes, first the insns and
f93dacbd 1342 then their REG_NOTES. */
175160e7
MT
1343
1344 /* This loop is very similar to the loop in copy_loop_body in unroll.c. */
1345
1346 for (insn = insns; insn; insn = NEXT_INSN (insn))
1347 {
c9734bb9 1348 rtx copy, pattern, set;
175160e7
MT
1349
1350 map->orig_asm_operands_vector = 0;
1351
1352 switch (GET_CODE (insn))
1353 {
1354 case INSN:
1355 pattern = PATTERN (insn);
c9734bb9 1356 set = single_set (insn);
175160e7 1357 copy = 0;
c13fde05
RH
1358 if (GET_CODE (pattern) == USE
1359 && GET_CODE (XEXP (pattern, 0)) == REG
1360 && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1361 /* The (USE (REG n)) at return from the function should
1362 be ignored since we are changing (REG n) into
1363 inline_target. */
1364 break;
175160e7
MT
1365
1366 /* Ignore setting a function value that we don't want to use. */
1367 if (map->inline_target == 0
c9734bb9
RK
1368 && set != 0
1369 && GET_CODE (SET_DEST (set)) == REG
1370 && REG_FUNCTION_VALUE_P (SET_DEST (set)))
5cd76fcd 1371 {
c9734bb9 1372 if (volatile_refs_p (SET_SRC (set)))
5cd76fcd 1373 {
c9734bb9
RK
1374 rtx new_set;
1375
5cd76fcd
RS
1376 /* If we must not delete the source,
1377 load it into a new temporary. */
14a774a9 1378 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
c9734bb9
RK
1379
1380 new_set = single_set (copy);
1381 if (new_set == 0)
1382 abort ();
1383
1384 SET_DEST (new_set)
1385 = gen_reg_rtx (GET_MODE (SET_DEST (new_set)));
5cd76fcd 1386 }
d8090d46
RK
1387 /* If the source and destination are the same and it
1388 has a note on it, keep the insn. */
1389 else if (rtx_equal_p (SET_DEST (set), SET_SRC (set))
1390 && REG_NOTES (insn) != 0)
14a774a9 1391 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
5cd76fcd
RS
1392 else
1393 break;
1394 }
c9734bb9 1395
e93eff94
DL
1396 /* Similarly if an ignored return value is clobbered. */
1397 else if (map->inline_target == 0
1398 && GET_CODE (pattern) == CLOBBER
1399 && GET_CODE (XEXP (pattern, 0)) == REG
1400 && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1401 break;
1402
03984308
BW
1403 /* Look for the address of the static chain slot. The
1404 rtx_equal_p comparisons against the
1405 static_chain_incoming_rtx below may fail if the static
1406 chain is in memory and the address specified is not
1407 "legitimate". This happens on Xtensa where the static
1408 chain is at a negative offset from argp and where only
1409 positive offsets are legitimate. When the RTL is
1410 generated, the address is "legitimized" by copying it
1411 into a register, causing the rtx_equal_p comparisons to
1412 fail. This workaround looks for code that sets a
1413 register to the address of the static chain. Subsequent
1414 memory references via that register can then be
1415 identified as static chain references. We assume that
1416 the register is only assigned once, and that the static
1eeeb6a4 1417 chain address is only live in one register at a time. */
03984308 1418
c9734bb9
RK
1419 else if (static_chain_value != 0
1420 && set != 0
03984308 1421 && GET_CODE (static_chain_incoming_rtx) == MEM
c9734bb9 1422 && GET_CODE (SET_DEST (set)) == REG
03984308
BW
1423 && rtx_equal_p (SET_SRC (set),
1424 XEXP (static_chain_incoming_rtx, 0)))
1425 {
1426 static_chain_mem =
1427 gen_rtx_MEM (GET_MODE (static_chain_incoming_rtx),
1428 SET_DEST (set));
1429
1430 /* emit the instruction in case it is used for something
1431 other than setting the static chain; if it's not used,
1432 it can always be removed as dead code */
1433 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
1434 }
1435
1436 /* If this is setting the static chain rtx, omit it. */
1437 else if (static_chain_value != 0
1438 && set != 0
1439 && (rtx_equal_p (SET_DEST (set),
1440 static_chain_incoming_rtx)
1441 || (static_chain_mem
1442 && rtx_equal_p (SET_DEST (set), static_chain_mem))))
c9734bb9
RK
1443 break;
1444
a6dd1cb6
RK
1445 /* If this is setting the static chain pseudo, set it from
1446 the value we want to give it instead. */
1447 else if (static_chain_value != 0
c9734bb9 1448 && set != 0
03984308
BW
1449 && (rtx_equal_p (SET_SRC (set),
1450 static_chain_incoming_rtx)
1451 || (static_chain_mem
1452 && rtx_equal_p (SET_SRC (set), static_chain_mem))))
a6dd1cb6 1453 {
14a774a9 1454 rtx newdest = copy_rtx_and_substitute (SET_DEST (set), map, 1);
a6dd1cb6 1455
c9734bb9 1456 copy = emit_move_insn (newdest, static_chain_value);
03984308
BW
1457 if (GET_CODE (static_chain_incoming_rtx) != MEM)
1458 static_chain_value = 0;
a6dd1cb6 1459 }
14a774a9
RK
1460
1461 /* If this is setting the virtual stack vars register, this must
1462 be the code at the handler for a builtin longjmp. The value
1463 saved in the setjmp buffer will be the address of the frame
1464 we've made for this inlined instance within our frame. But we
1465 know the offset of that value so we can use it to reconstruct
1466 our virtual stack vars register from that value. If we are
1467 copying it from the stack pointer, leave it unchanged. */
1468 else if (set != 0
1469 && rtx_equal_p (SET_DEST (set), virtual_stack_vars_rtx))
1470 {
36a1fa96 1471 HOST_WIDE_INT offset;
14a774a9
RK
1472 temp = map->reg_map[REGNO (SET_DEST (set))];
1473 temp = VARRAY_CONST_EQUIV (map->const_equiv_varray,
1474 REGNO (temp)).rtx;
1475
36a1fa96
JL
1476 if (rtx_equal_p (temp, virtual_stack_vars_rtx))
1477 offset = 0;
1478 else if (GET_CODE (temp) == PLUS
1479 && rtx_equal_p (XEXP (temp, 0), virtual_stack_vars_rtx)
1480 && GET_CODE (XEXP (temp, 1)) == CONST_INT)
1481 offset = INTVAL (XEXP (temp, 1));
1482 else
14a774a9
RK
1483 abort ();
1484
1485 if (rtx_equal_p (SET_SRC (set), stack_pointer_rtx))
1486 temp = SET_SRC (set);
1487 else
36a1fa96
JL
1488 temp = force_operand (plus_constant (SET_SRC (set),
1489 - offset),
1490 NULL_RTX);
14a774a9 1491
36a1fa96 1492 copy = emit_move_insn (virtual_stack_vars_rtx, temp);
14a774a9
RK
1493 }
1494
5cd76fcd 1495 else
14a774a9 1496 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
175160e7
MT
1497 /* REG_NOTES will be copied later. */
1498
1499#ifdef HAVE_cc0
1500 /* If this insn is setting CC0, it may need to look at
1501 the insn that uses CC0 to see what type of insn it is.
1502 In that case, the call to recog via validate_change will
1503 fail. So don't substitute constants here. Instead,
1504 do it when we emit the following insn.
1505
1506 For example, see the pyr.md file. That machine has signed and
1507 unsigned compares. The compare patterns must check the
1508 following branch insn to see which what kind of compare to
1509 emit.
1510
1511 If the previous insn set CC0, substitute constants on it as
1512 well. */
1513 if (sets_cc0_p (PATTERN (copy)) != 0)
1514 cc0_insn = copy;
1515 else
1516 {
1517 if (cc0_insn)
1518 try_constants (cc0_insn, map);
1519 cc0_insn = 0;
1520 try_constants (copy, map);
1521 }
1522#else
1523 try_constants (copy, map);
1524#endif
0478a14c 1525 INSN_SCOPE (copy) = INSN_SCOPE (insn);
175160e7
MT
1526 break;
1527
1528 case JUMP_INSN:
8cd44271 1529 if (map->integrating && returnjump_p (insn))
175160e7 1530 {
464186fb
RH
1531 if (map->local_return_label == 0)
1532 map->local_return_label = gen_label_rtx ();
1533 pattern = gen_jump (map->local_return_label);
175160e7
MT
1534 }
1535 else
14a774a9 1536 pattern = copy_rtx_and_substitute (PATTERN (insn), map, 0);
175160e7
MT
1537
1538 copy = emit_jump_insn (pattern);
1539
1540#ifdef HAVE_cc0
1541 if (cc0_insn)
1542 try_constants (cc0_insn, map);
1543 cc0_insn = 0;
1544#endif
1545 try_constants (copy, map);
0478a14c 1546 INSN_SCOPE (copy) = INSN_SCOPE (insn);
175160e7
MT
1547
1548 /* If this used to be a conditional jump insn but whose branch
1549 direction is now know, we must do something special. */
7f1c097d 1550 if (any_condjump_p (insn) && onlyjump_p (insn) && map->last_pc_value)
175160e7
MT
1551 {
1552#ifdef HAVE_cc0
b30f05db 1553 /* If the previous insn set cc0 for us, delete it. */
44ce0063 1554 if (only_sets_cc0_p (PREV_INSN (copy)))
53c17031 1555 delete_related_insns (PREV_INSN (copy));
175160e7
MT
1556#endif
1557
1558 /* If this is now a no-op, delete it. */
1559 if (map->last_pc_value == pc_rtx)
1560 {
53c17031 1561 delete_related_insns (copy);
175160e7
MT
1562 copy = 0;
1563 }
1564 else
1565 /* Otherwise, this is unconditional jump so we must put a
1566 BARRIER after it. We could do some dead code elimination
1567 here, but jump.c will do it just as well. */
1568 emit_barrier ();
1569 }
1570 break;
1571
1572 case CALL_INSN:
0a1c58a2
JL
1573 /* If this is a CALL_PLACEHOLDER insn then we need to copy the
1574 three attached sequences: normal call, sibling call and tail
00174bdf 1575 recursion. */
0a1c58a2
JL
1576 if (GET_CODE (PATTERN (insn)) == CALL_PLACEHOLDER)
1577 {
1578 rtx sequence[3];
1579 rtx tail_label;
1580
1581 for (i = 0; i < 3; i++)
1582 {
1583 rtx seq;
00174bdf 1584
0a1c58a2
JL
1585 sequence[i] = NULL_RTX;
1586 seq = XEXP (PATTERN (insn), i);
1587 if (seq)
1588 {
1589 start_sequence ();
1590 copy_insn_list (seq, map, static_chain_value);
1591 sequence[i] = get_insns ();
1592 end_sequence ();
1593 }
1594 }
1595
00174bdf 1596 /* Find the new tail recursion label.
0a1c58a2
JL
1597 It will already be substituted into sequence[2]. */
1598 tail_label = copy_rtx_and_substitute (XEXP (PATTERN (insn), 3),
1599 map, 0);
1600
00174bdf
KH
1601 copy = emit_call_insn (gen_rtx_CALL_PLACEHOLDER (VOIDmode,
1602 sequence[0],
1603 sequence[1],
1604 sequence[2],
1605 tail_label));
0a1c58a2
JL
1606 break;
1607 }
1608
14a774a9 1609 pattern = copy_rtx_and_substitute (PATTERN (insn), map, 0);
175160e7
MT
1610 copy = emit_call_insn (pattern);
1611
0a1c58a2 1612 SIBLING_CALL_P (copy) = SIBLING_CALL_P (insn);
24a28584 1613 CONST_OR_PURE_CALL_P (copy) = CONST_OR_PURE_CALL_P (insn);
0478a14c 1614 INSN_SCOPE (copy) = INSN_SCOPE (insn);
0a1c58a2 1615
d7e09326
RK
1616 /* Because the USAGE information potentially contains objects other
1617 than hard registers, we need to copy it. */
0a1c58a2 1618
db3cf6fb 1619 CALL_INSN_FUNCTION_USAGE (copy)
14a774a9
RK
1620 = copy_rtx_and_substitute (CALL_INSN_FUNCTION_USAGE (insn),
1621 map, 0);
d7e09326 1622
175160e7
MT
1623#ifdef HAVE_cc0
1624 if (cc0_insn)
1625 try_constants (cc0_insn, map);
1626 cc0_insn = 0;
1627#endif
1628 try_constants (copy, map);
1629
00174bdf 1630 /* Be lazy and assume CALL_INSNs clobber all hard registers. */
175160e7 1631 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
c68da89c 1632 VARRAY_CONST_EQUIV (map->const_equiv_varray, i).rtx = 0;
175160e7
MT
1633 break;
1634
1635 case CODE_LABEL:
e5e809f4
JL
1636 copy = emit_label (get_label_from_map (map,
1637 CODE_LABEL_NUMBER (insn)));
bfa30b22 1638 LABEL_NAME (copy) = LABEL_NAME (insn);
175160e7
MT
1639 map->const_age++;
1640 break;
1641
1642 case BARRIER:
1643 copy = emit_barrier ();
1644 break;
1645
1646 case NOTE:
bc8d3f91
JH
1647 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED_LABEL)
1648 {
1649 copy = emit_label (get_label_from_map (map,
1650 CODE_LABEL_NUMBER (insn)));
3bab2571 1651 LABEL_NAME (copy) = NOTE_SOURCE_FILE (insn);
bc8d3f91
JH
1652 map->const_age++;
1653 break;
1654 }
1655
00174bdf
KH
1656 /* NOTE_INSN_FUNCTION_END and NOTE_INSN_FUNCTION_BEG are
1657 discarded because it is important to have only one of
0a1c58a2
JL
1658 each in the current function.
1659
4793dca1 1660 NOTE_INSN_DELETED notes aren't useful. */
0a1c58a2 1661
175160e7
MT
1662 if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END
1663 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_BEG
4793dca1 1664 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED)
6adb4e3a 1665 {
e5e809f4
JL
1666 copy = emit_note (NOTE_SOURCE_FILE (insn),
1667 NOTE_LINE_NUMBER (insn));
1668 if (copy
52a11cbf
RH
1669 && (NOTE_LINE_NUMBER (copy) == NOTE_INSN_BLOCK_BEG
1670 || NOTE_LINE_NUMBER (copy) == NOTE_INSN_BLOCK_END)
1671 && NOTE_BLOCK (insn))
a97901e6
MM
1672 {
1673 tree *mapped_block_p;
1674
1675 mapped_block_p
00174bdf 1676 = (tree *) bsearch (NOTE_BLOCK (insn),
a97901e6
MM
1677 &VARRAY_TREE (map->block_map, 0),
1678 map->block_map->elements_used,
1679 sizeof (tree),
1680 find_block);
00174bdf 1681
a97901e6
MM
1682 if (!mapped_block_p)
1683 abort ();
1684 else
1685 NOTE_BLOCK (copy) = *mapped_block_p;
1686 }
e00c1338
RH
1687 else if (copy
1688 && NOTE_LINE_NUMBER (copy) == NOTE_INSN_EXPECTED_VALUE)
1689 NOTE_EXPECTED_VALUE (copy)
1690 = copy_rtx_and_substitute (NOTE_EXPECTED_VALUE (insn),
1691 map, 0);
6adb4e3a 1692 }
175160e7
MT
1693 else
1694 copy = 0;
1695 break;
1696
1697 default:
1698 abort ();
175160e7
MT
1699 }
1700
1701 if (copy)
1702 RTX_INTEGRATED_P (copy) = 1;
1703
1704 map->insn_map[INSN_UID (insn)] = copy;
1705 }
464186fb
RH
1706}
1707
1708/* Copy the REG_NOTES. Increment const_age, so that only constants
1709 from parameters can be substituted in. These are the only ones
1710 that are valid across the entire function. */
1711
1712static void
52a11cbf 1713copy_insn_notes (insns, map, eh_region_offset)
464186fb
RH
1714 rtx insns;
1715 struct inline_remap *map;
52a11cbf 1716 int eh_region_offset;
464186fb 1717{
8cd44271 1718 rtx insn, new_insn;
175160e7 1719
e62d14be 1720 map->const_age++;
175160e7 1721 for (insn = insns; insn; insn = NEXT_INSN (insn))
8cd44271
RH
1722 {
1723 if (! INSN_P (insn))
1724 continue;
1725
1726 new_insn = map->insn_map[INSN_UID (insn)];
1727 if (! new_insn)
1728 continue;
1729
1730 if (REG_NOTES (insn))
1731 {
1732 rtx next, note = copy_rtx_and_substitute (REG_NOTES (insn), map, 0);
1733
1734 /* We must also do subst_constants, in case one of our parameters
1735 has const type and constant value. */
1736 subst_constants (&note, NULL_RTX, map, 0);
1737 apply_change_group ();
1738 REG_NOTES (new_insn) = note;
1739
1740 /* Delete any REG_LABEL notes from the chain. Remap any
1741 REG_EH_REGION notes. */
1742 for (; note; note = next)
1743 {
1744 next = XEXP (note, 1);
1745 if (REG_NOTE_KIND (note) == REG_LABEL)
1746 remove_note (new_insn, note);
de5b49f2
RK
1747 else if (REG_NOTE_KIND (note) == REG_EH_REGION
1748 && INTVAL (XEXP (note, 0)) > 0)
52a11cbf
RH
1749 XEXP (note, 0) = GEN_INT (INTVAL (XEXP (note, 0))
1750 + eh_region_offset);
8cd44271
RH
1751 }
1752 }
1753
1754 if (GET_CODE (insn) == CALL_INSN
1755 && GET_CODE (PATTERN (insn)) == CALL_PLACEHOLDER)
1756 {
1757 int i;
1758 for (i = 0; i < 3; i++)
52a11cbf 1759 copy_insn_notes (XEXP (PATTERN (insn), i), map, eh_region_offset);
8cd44271 1760 }
52a11cbf
RH
1761
1762 if (GET_CODE (insn) == JUMP_INSN
1763 && GET_CODE (PATTERN (insn)) == RESX)
1764 XINT (PATTERN (new_insn), 0) += eh_region_offset;
8cd44271 1765 }
175160e7
MT
1766}
1767\f
1768/* Given a chain of PARM_DECLs, ARGS, copy each decl into a VAR_DECL,
1769 push all of those decls and give each one the corresponding home. */
1770
1771static void
1772integrate_parm_decls (args, map, arg_vector)
1773 tree args;
1774 struct inline_remap *map;
1775 rtvec arg_vector;
1776{
b3694847
SS
1777 tree tail;
1778 int i;
175160e7
MT
1779
1780 for (tail = args, i = 0; tail; tail = TREE_CHAIN (tail), i++)
1781 {
94755d92
MM
1782 tree decl = copy_decl_for_inlining (tail, map->fndecl,
1783 current_function_decl);
175160e7 1784 rtx new_decl_rtl
14a774a9 1785 = copy_rtx_and_substitute (RTVEC_ELT (arg_vector, i), map, 1);
175160e7 1786
a76386d8
RK
1787 /* We really should be setting DECL_INCOMING_RTL to something reasonable
1788 here, but that's going to require some more work. */
1789 /* DECL_INCOMING_RTL (decl) = ?; */
175160e7
MT
1790 /* Fully instantiate the address with the equivalent form so that the
1791 debugging information contains the actual register, instead of the
1792 virtual register. Do this by not passing an insn to
1793 subst_constants. */
14a774a9 1794 subst_constants (&new_decl_rtl, NULL_RTX, map, 1);
175160e7 1795 apply_change_group ();
19e7881c 1796 SET_DECL_RTL (decl, new_decl_rtl);
175160e7
MT
1797 }
1798}
1799
1800/* Given a BLOCK node LET, push decls and levels so as to construct in the
1801 current function a tree of contexts isomorphic to the one that is given.
1802
858a47b1 1803 MAP, if nonzero, is a pointer to an inline_remap map which indicates how
175160e7 1804 registers used in the DECL_RTL field should be remapped. If it is zero,
8ef63e62 1805 no mapping is necessary. */
175160e7 1806
21204d34
MM
1807static tree
1808integrate_decl_tree (let, map)
175160e7 1809 tree let;
175160e7 1810 struct inline_remap *map;
175160e7 1811{
21204d34
MM
1812 tree t;
1813 tree new_block;
1814 tree *next;
1815
1816 new_block = make_node (BLOCK);
a97901e6 1817 VARRAY_PUSH_TREE (map->block_map, new_block);
21204d34 1818 next = &BLOCK_VARS (new_block);
175160e7 1819
175160e7
MT
1820 for (t = BLOCK_VARS (let); t; t = TREE_CHAIN (t))
1821 {
f6bad6ff
JM
1822 tree d;
1823
94755d92 1824 d = copy_decl_for_inlining (t, map->fndecl, current_function_decl);
f6bad6ff 1825
19e7881c 1826 if (DECL_RTL_SET_P (t))
175160e7 1827 {
19e7881c
MM
1828 rtx r;
1829
1830 SET_DECL_RTL (d, copy_rtx_and_substitute (DECL_RTL (t), map, 1));
14a774a9 1831
175160e7
MT
1832 /* Fully instantiate the address with the equivalent form so that the
1833 debugging information contains the actual register, instead of the
1834 virtual register. Do this by not passing an insn to
1835 subst_constants. */
19e7881c
MM
1836 r = DECL_RTL (d);
1837 subst_constants (&r, NULL_RTX, map, 1);
1838 SET_DECL_RTL (d, r);
0d4903b8
RK
1839
1840 if (GET_CODE (r) == REG)
1841 REGNO_DECL (REGNO (r)) = d;
1842 else if (GET_CODE (r) == CONCAT)
1843 {
1844 REGNO_DECL (REGNO (XEXP (r, 0))) = d;
616051ac 1845 REGNO_DECL (REGNO (XEXP (r, 1))) = d;
0d4903b8
RK
1846 }
1847
175160e7
MT
1848 apply_change_group ();
1849 }
175160e7 1850
21204d34
MM
1851 /* Add this declaration to the list of variables in the new
1852 block. */
1853 *next = d;
1854 next = &TREE_CHAIN (d);
1855 }
175160e7 1856
21204d34
MM
1857 next = &BLOCK_SUBBLOCKS (new_block);
1858 for (t = BLOCK_SUBBLOCKS (let); t; t = BLOCK_CHAIN (t))
a84efb51
JO
1859 {
1860 *next = integrate_decl_tree (t, map);
1861 BLOCK_SUPERCONTEXT (*next) = new_block;
1862 next = &BLOCK_CHAIN (*next);
1863 }
21204d34
MM
1864
1865 TREE_USED (new_block) = TREE_USED (let);
1866 BLOCK_ABSTRACT_ORIGIN (new_block) = let;
00174bdf 1867
21204d34 1868 return new_block;
175160e7
MT
1869}
1870\f
14a774a9 1871/* Create a new copy of an rtx. Recursively copies the operands of the rtx,
175160e7
MT
1872 except for those few rtx codes that are sharable.
1873
1874 We always return an rtx that is similar to that incoming rtx, with the
1875 exception of possibly changing a REG to a SUBREG or vice versa. No
1876 rtl is ever emitted.
1877
14a774a9
RK
1878 If FOR_LHS is nonzero, if means we are processing something that will
1879 be the LHS of a SET. In that case, we copy RTX_UNCHANGING_P even if
1880 inlining since we need to be conservative in how it is set for
1881 such cases.
1882
175160e7
MT
1883 Handle constants that need to be placed in the constant pool by
1884 calling `force_const_mem'. */
1885
1886rtx
14a774a9 1887copy_rtx_and_substitute (orig, map, for_lhs)
b3694847 1888 rtx orig;
175160e7 1889 struct inline_remap *map;
14a774a9 1890 int for_lhs;
175160e7 1891{
b3694847
SS
1892 rtx copy, temp;
1893 int i, j;
1894 RTX_CODE code;
1895 enum machine_mode mode;
1896 const char *format_ptr;
175160e7
MT
1897 int regno;
1898
1899 if (orig == 0)
1900 return 0;
1901
1902 code = GET_CODE (orig);
1903 mode = GET_MODE (orig);
1904
1905 switch (code)
1906 {
1907 case REG:
1908 /* If the stack pointer register shows up, it must be part of
1909 stack-adjustments (*not* because we eliminated the frame pointer!).
1910 Small hard registers are returned as-is. Pseudo-registers
1911 go through their `reg_map'. */
1912 regno = REGNO (orig);
f83a0992
JL
1913 if (regno <= LAST_VIRTUAL_REGISTER
1914 || (map->integrating
1915 && DECL_SAVED_INSNS (map->fndecl)->internal_arg_pointer == orig))
175160e7
MT
1916 {
1917 /* Some hard registers are also mapped,
1918 but others are not translated. */
c826ae21 1919 if (map->reg_map[regno] != 0)
175160e7
MT
1920 return map->reg_map[regno];
1921
1922 /* If this is the virtual frame pointer, make space in current
1923 function's stack frame for the stack frame of the inline function.
1924
1925 Copy the address of this area into a pseudo. Map
1926 virtual_stack_vars_rtx to this pseudo and set up a constant
1927 equivalence for it to be the address. This will substitute the
1928 address into insns where it can be substituted and use the new
1929 pseudo where it can't. */
b5d7770c 1930 else if (regno == VIRTUAL_STACK_VARS_REGNUM)
175160e7
MT
1931 {
1932 rtx loc, seq;
49ad7cfa 1933 int size = get_func_frame_size (DECL_SAVED_INSNS (map->fndecl));
d219c7f1 1934#ifdef FRAME_GROWS_DOWNWARD
c2f8b491
JH
1935 int alignment
1936 = (DECL_SAVED_INSNS (map->fndecl)->stack_alignment_needed
1937 / BITS_PER_UNIT);
175160e7 1938
3e42d56b
DE
1939 /* In this case, virtual_stack_vars_rtx points to one byte
1940 higher than the top of the frame area. So make sure we
1941 allocate a big enough chunk to keep the frame pointer
1942 aligned like a real one. */
c2f8b491
JH
1943 if (alignment)
1944 size = CEIL_ROUND (size, alignment);
3e42d56b 1945#endif
175160e7
MT
1946 start_sequence ();
1947 loc = assign_stack_temp (BLKmode, size, 1);
1948 loc = XEXP (loc, 0);
1949#ifdef FRAME_GROWS_DOWNWARD
1950 /* In this case, virtual_stack_vars_rtx points to one byte
1951 higher than the top of the frame area. So compute the offset
3e42d56b
DE
1952 to one byte higher than our substitute frame. */
1953 loc = plus_constant (loc, size);
175160e7 1954#endif
59b2d722
RK
1955 map->reg_map[regno] = temp
1956 = force_reg (Pmode, force_operand (loc, NULL_RTX));
2b145ea8 1957
12307ca2 1958#ifdef STACK_BOUNDARY
bdb429a5 1959 mark_reg_pointer (map->reg_map[regno], STACK_BOUNDARY);
12307ca2
RK
1960#endif
1961
c68da89c 1962 SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
175160e7 1963
2f937369 1964 seq = get_insns ();
175160e7
MT
1965 end_sequence ();
1966 emit_insn_after (seq, map->insns_at_start);
5c23c401 1967 return temp;
175160e7 1968 }
f83a0992
JL
1969 else if (regno == VIRTUAL_INCOMING_ARGS_REGNUM
1970 || (map->integrating
1971 && (DECL_SAVED_INSNS (map->fndecl)->internal_arg_pointer
1972 == orig)))
175160e7
MT
1973 {
1974 /* Do the same for a block to contain any arguments referenced
0f41302f 1975 in memory. */
175160e7 1976 rtx loc, seq;
49ad7cfa 1977 int size = DECL_SAVED_INSNS (map->fndecl)->args_size;
175160e7
MT
1978
1979 start_sequence ();
1980 loc = assign_stack_temp (BLKmode, size, 1);
1981 loc = XEXP (loc, 0);
00174bdf 1982 /* When arguments grow downward, the virtual incoming
931553d8 1983 args pointer points to the top of the argument block,
0f41302f 1984 so the remapped location better do the same. */
931553d8
RS
1985#ifdef ARGS_GROW_DOWNWARD
1986 loc = plus_constant (loc, size);
1987#endif
59b2d722
RK
1988 map->reg_map[regno] = temp
1989 = force_reg (Pmode, force_operand (loc, NULL_RTX));
2b145ea8 1990
12307ca2 1991#ifdef STACK_BOUNDARY
bdb429a5 1992 mark_reg_pointer (map->reg_map[regno], STACK_BOUNDARY);
12307ca2
RK
1993#endif
1994
c68da89c 1995 SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
175160e7 1996
2f937369 1997 seq = get_insns ();
175160e7
MT
1998 end_sequence ();
1999 emit_insn_after (seq, map->insns_at_start);
5c23c401 2000 return temp;
175160e7
MT
2001 }
2002 else if (REG_FUNCTION_VALUE_P (orig))
2003 {
2004 /* This is a reference to the function return value. If
2005 the function doesn't have a return value, error. If the
c36fce9a 2006 mode doesn't agree, and it ain't BLKmode, make a SUBREG. */
175160e7 2007 if (map->inline_target == 0)
ea55fa7a
R
2008 {
2009 if (rtx_equal_function_value_matters)
2010 /* This is an ignored return value. We must not
2011 leave it in with REG_FUNCTION_VALUE_P set, since
2012 that would confuse subsequent inlining of the
2013 current function into a later function. */
2014 return gen_rtx_REG (GET_MODE (orig), regno);
2015 else
2016 /* Must be unrolling loops or replicating code if we
2017 reach here, so return the register unchanged. */
2018 return orig;
2019 }
60da674b
RH
2020 else if (GET_MODE (map->inline_target) != BLKmode
2021 && mode != GET_MODE (map->inline_target))
293e1467 2022 return gen_lowpart (mode, map->inline_target);
175160e7
MT
2023 else
2024 return map->inline_target;
2025 }
b5d7770c
AO
2026#if defined (LEAF_REGISTERS) && defined (LEAF_REG_REMAP)
2027 /* If leaf_renumber_regs_insn() might remap this register to
2028 some other number, make sure we don't share it with the
2029 inlined function, otherwise delayed optimization of the
2030 inlined function may change it in place, breaking our
2031 reference to it. We may still shared it within the
2032 function, so create an entry for this register in the
2033 reg_map. */
2034 if (map->integrating && regno < FIRST_PSEUDO_REGISTER
2035 && LEAF_REGISTERS[regno] && LEAF_REG_REMAP (regno) != regno)
2036 {
c826ae21
MM
2037 if (!map->leaf_reg_map[regno][mode])
2038 map->leaf_reg_map[regno][mode] = gen_rtx_REG (mode, regno);
2039 return map->leaf_reg_map[regno][mode];
b5d7770c
AO
2040 }
2041#endif
2042 else
2043 return orig;
2044
2045 abort ();
175160e7
MT
2046 }
2047 if (map->reg_map[regno] == NULL)
2048 {
2049 map->reg_map[regno] = gen_reg_rtx (mode);
2050 REG_USERVAR_P (map->reg_map[regno]) = REG_USERVAR_P (orig);
2051 REG_LOOP_TEST_P (map->reg_map[regno]) = REG_LOOP_TEST_P (orig);
2052 RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (orig);
2053 /* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
12307ca2 2054
3502dc9c 2055 if (REG_POINTER (map->x_regno_reg_rtx[regno]))
12307ca2
RK
2056 mark_reg_pointer (map->reg_map[regno],
2057 map->regno_pointer_align[regno]);
175160e7
MT
2058 }
2059 return map->reg_map[regno];
2060
2061 case SUBREG:
14a774a9 2062 copy = copy_rtx_and_substitute (SUBREG_REG (orig), map, for_lhs);
e5c56fd9
JH
2063 return simplify_gen_subreg (GET_MODE (orig), copy,
2064 GET_MODE (SUBREG_REG (orig)),
2065 SUBREG_BYTE (orig));
175160e7 2066
e9a25f70 2067 case ADDRESSOF:
38a448ca 2068 copy = gen_rtx_ADDRESSOF (mode,
14a774a9
RK
2069 copy_rtx_and_substitute (XEXP (orig, 0),
2070 map, for_lhs),
00174bdf 2071 0, ADDRESSOF_DECL (orig));
e9a25f70
JL
2072 regno = ADDRESSOF_REGNO (orig);
2073 if (map->reg_map[regno])
2074 regno = REGNO (map->reg_map[regno]);
2075 else if (regno > LAST_VIRTUAL_REGISTER)
2076 {
2077 temp = XEXP (orig, 0);
2078 map->reg_map[regno] = gen_reg_rtx (GET_MODE (temp));
2079 REG_USERVAR_P (map->reg_map[regno]) = REG_USERVAR_P (temp);
2080 REG_LOOP_TEST_P (map->reg_map[regno]) = REG_LOOP_TEST_P (temp);
2081 RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (temp);
2082 /* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
2083
f81a79ef
JH
2084 /* Objects may initially be represented as registers, but
2085 but turned into a MEM if their address is taken by
2086 put_var_into_stack. Therefore, the register table may have
2087 entries which are MEMs.
2088
2089 We briefly tried to clear such entries, but that ended up
2090 cascading into many changes due to the optimizers not being
2091 prepared for empty entries in the register table. So we've
2092 decided to allow the MEMs in the register table for now. */
2093 if (REG_P (map->x_regno_reg_rtx[regno])
2094 && REG_POINTER (map->x_regno_reg_rtx[regno]))
e9a25f70
JL
2095 mark_reg_pointer (map->reg_map[regno],
2096 map->regno_pointer_align[regno]);
2097 regno = REGNO (map->reg_map[regno]);
2098 }
2099 ADDRESSOF_REGNO (copy) = regno;
2100 return copy;
2101
175160e7
MT
2102 case USE:
2103 case CLOBBER:
2104 /* USE and CLOBBER are ordinary, but we convert (use (subreg foo))
d632e927
RS
2105 to (use foo) if the original insn didn't have a subreg.
2106 Removing the subreg distorts the VAX movstrhi pattern
2107 by changing the mode of an operand. */
14a774a9 2108 copy = copy_rtx_and_substitute (XEXP (orig, 0), map, code == CLOBBER);
d632e927 2109 if (GET_CODE (copy) == SUBREG && GET_CODE (XEXP (orig, 0)) != SUBREG)
175160e7 2110 copy = SUBREG_REG (copy);
38a448ca 2111 return gen_rtx_fmt_e (code, VOIDmode, copy);
175160e7 2112
bc8d3f91
JH
2113 /* We need to handle "deleted" labels that appear in the DECL_RTL
2114 of a LABEL_DECL. */
2115 case NOTE:
2116 if (NOTE_LINE_NUMBER (orig) != NOTE_INSN_DELETED_LABEL)
2117 break;
2118
dc297297 2119 /* ... FALLTHRU ... */
175160e7 2120 case CODE_LABEL:
1f3d3a31 2121 LABEL_PRESERVE_P (get_label_from_map (map, CODE_LABEL_NUMBER (orig)))
175160e7 2122 = LABEL_PRESERVE_P (orig);
1f3d3a31 2123 return get_label_from_map (map, CODE_LABEL_NUMBER (orig));
175160e7
MT
2124
2125 case LABEL_REF:
c5c76735
JL
2126 copy
2127 = gen_rtx_LABEL_REF
2128 (mode,
2129 LABEL_REF_NONLOCAL_P (orig) ? XEXP (orig, 0)
2130 : get_label_from_map (map, CODE_LABEL_NUMBER (XEXP (orig, 0))));
2131
175160e7 2132 LABEL_OUTSIDE_LOOP_P (copy) = LABEL_OUTSIDE_LOOP_P (orig);
c1ceaaa6
RK
2133
2134 /* The fact that this label was previously nonlocal does not mean
2135 it still is, so we must check if it is within the range of
2136 this function's labels. */
2137 LABEL_REF_NONLOCAL_P (copy)
2138 = (LABEL_REF_NONLOCAL_P (orig)
2139 && ! (CODE_LABEL_NUMBER (XEXP (copy, 0)) >= get_first_label_num ()
2140 && CODE_LABEL_NUMBER (XEXP (copy, 0)) < max_label_num ()));
81d57b8e
RK
2141
2142 /* If we have made a nonlocal label local, it means that this
9faa82d8 2143 inlined call will be referring to our nonlocal goto handler.
81d57b8e
RK
2144 So make sure we create one for this block; we normally would
2145 not since this is not otherwise considered a "call". */
2146 if (LABEL_REF_NONLOCAL_P (orig) && ! LABEL_REF_NONLOCAL_P (copy))
2147 function_call_count++;
2148
175160e7
MT
2149 return copy;
2150
2151 case PC:
2152 case CC0:
2153 case CONST_INT:
69ef87e2 2154 case CONST_VECTOR:
f543676f
JW
2155 return orig;
2156
175160e7 2157 case SYMBOL_REF:
f543676f
JW
2158 /* Symbols which represent the address of a label stored in the constant
2159 pool must be modified to point to a constant pool entry for the
2160 remapped label. Otherwise, symbols are returned unchanged. */
2161 if (CONSTANT_POOL_ADDRESS_P (orig))
2162 {
01d939e8 2163 struct function *f = inlining ? inlining : cfun;
36edd3cc
BS
2164 rtx constant = get_pool_constant_for_function (f, orig);
2165 enum machine_mode const_mode = get_pool_mode_for_function (f, orig);
2166 if (inlining)
2167 {
2168 rtx temp = force_const_mem (const_mode,
14a774a9
RK
2169 copy_rtx_and_substitute (constant,
2170 map, 0));
2171
36edd3cc
BS
2172#if 0
2173 /* Legitimizing the address here is incorrect.
2174
2175 Since we had a SYMBOL_REF before, we can assume it is valid
2176 to have one in this position in the insn.
2177
2178 Also, change_address may create new registers. These
2179 registers will not have valid reg_map entries. This can
2180 cause try_constants() to fail because assumes that all
2181 registers in the rtx have valid reg_map entries, and it may
2182 end up replacing one of these new registers with junk. */
2183
2184 if (! memory_address_p (GET_MODE (temp), XEXP (temp, 0)))
2185 temp = change_address (temp, GET_MODE (temp), XEXP (temp, 0));
2186#endif
2187
2188 temp = XEXP (temp, 0);
2189
2190#ifdef POINTERS_EXTEND_UNSIGNED
2191 if (GET_MODE (temp) != GET_MODE (orig))
2192 temp = convert_memory_address (GET_MODE (orig), temp);
2193#endif
2194 return temp;
2195 }
2196 else if (GET_CODE (constant) == LABEL_REF)
14a774a9
RK
2197 return XEXP (force_const_mem
2198 (GET_MODE (orig),
2199 copy_rtx_and_substitute (constant, map, for_lhs)),
c1ceaaa6 2200 0);
f543676f 2201 }
c1ceaaa6 2202
175160e7
MT
2203 return orig;
2204
2205 case CONST_DOUBLE:
2206 /* We have to make a new copy of this CONST_DOUBLE because don't want
2207 to use the old value of CONST_DOUBLE_MEM. Also, this may be a
2208 duplicate of a CONST_DOUBLE we have already seen. */
2209 if (GET_MODE_CLASS (GET_MODE (orig)) == MODE_FLOAT)
2210 {
2211 REAL_VALUE_TYPE d;
2212
2213 REAL_VALUE_FROM_CONST_DOUBLE (d, orig);
81fbaa41 2214 return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (orig));
175160e7
MT
2215 }
2216 else
2217 return immed_double_const (CONST_DOUBLE_LOW (orig),
2218 CONST_DOUBLE_HIGH (orig), VOIDmode);
2219
2220 case CONST:
2221 /* Make new constant pool entry for a constant
2222 that was in the pool of the inline function. */
2223 if (RTX_INTEGRATED_P (orig))
175160e7 2224 abort ();
36edd3cc 2225 break;
175160e7
MT
2226
2227 case ASM_OPERANDS:
6462bb43
AO
2228 /* If a single asm insn contains multiple output operands then
2229 it contains multiple ASM_OPERANDS rtx's that share the input
2230 and constraint vecs. We must make sure that the copied insn
2231 continues to share it. */
2232 if (map->orig_asm_operands_vector == ASM_OPERANDS_INPUT_VEC (orig))
175160e7
MT
2233 {
2234 copy = rtx_alloc (ASM_OPERANDS);
2adc7f12 2235 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
dde068d9 2236 PUT_MODE (copy, GET_MODE (orig));
6462bb43
AO
2237 ASM_OPERANDS_TEMPLATE (copy) = ASM_OPERANDS_TEMPLATE (orig);
2238 ASM_OPERANDS_OUTPUT_CONSTRAINT (copy)
2239 = ASM_OPERANDS_OUTPUT_CONSTRAINT (orig);
2240 ASM_OPERANDS_OUTPUT_IDX (copy) = ASM_OPERANDS_OUTPUT_IDX (orig);
2241 ASM_OPERANDS_INPUT_VEC (copy) = map->copy_asm_operands_vector;
2242 ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy)
2243 = map->copy_asm_constraints_vector;
2244 ASM_OPERANDS_SOURCE_FILE (copy) = ASM_OPERANDS_SOURCE_FILE (orig);
2245 ASM_OPERANDS_SOURCE_LINE (copy) = ASM_OPERANDS_SOURCE_LINE (orig);
175160e7
MT
2246 return copy;
2247 }
2248 break;
2249
2250 case CALL:
2251 /* This is given special treatment because the first
2252 operand of a CALL is a (MEM ...) which may get
2253 forced into a register for cse. This is undesirable
2254 if function-address cse isn't wanted or if we won't do cse. */
2255#ifndef NO_FUNCTION_CSE
2256 if (! (optimize && ! flag_no_function_cse))
2257#endif
8ac61af7
RK
2258 {
2259 rtx copy
2260 = gen_rtx_MEM (GET_MODE (XEXP (orig, 0)),
2261 copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0),
2262 map, 0));
2263
72403582 2264 MEM_COPY_ATTRIBUTES (copy, XEXP (orig, 0));
8ac61af7
RK
2265
2266 return
2267 gen_rtx_CALL (GET_MODE (orig), copy,
2268 copy_rtx_and_substitute (XEXP (orig, 1), map, 0));
2269 }
175160e7
MT
2270 break;
2271
2272#if 0
2273 /* Must be ifdefed out for loop unrolling to work. */
2274 case RETURN:
2275 abort ();
2276#endif
2277
2278 case SET:
2279 /* If this is setting fp or ap, it means that we have a nonlocal goto.
e9a25f70 2280 Adjust the setting by the offset of the area we made.
175160e7
MT
2281 If the nonlocal goto is into the current function,
2282 this will result in unnecessarily bad code, but should work. */
2283 if (SET_DEST (orig) == virtual_stack_vars_rtx
2284 || SET_DEST (orig) == virtual_incoming_args_rtx)
e9a25f70 2285 {
00174bdf 2286 /* In case a translation hasn't occurred already, make one now. */
d6e6c585
JL
2287 rtx equiv_reg;
2288 rtx equiv_loc;
2289 HOST_WIDE_INT loc_offset;
2290
14a774a9 2291 copy_rtx_and_substitute (SET_DEST (orig), map, for_lhs);
d6e6c585 2292 equiv_reg = map->reg_map[REGNO (SET_DEST (orig))];
14a774a9
RK
2293 equiv_loc = VARRAY_CONST_EQUIV (map->const_equiv_varray,
2294 REGNO (equiv_reg)).rtx;
d6e6c585 2295 loc_offset
e9a25f70 2296 = GET_CODE (equiv_loc) == REG ? 0 : INTVAL (XEXP (equiv_loc, 1));
00174bdf 2297
38a448ca
RH
2298 return gen_rtx_SET (VOIDmode, SET_DEST (orig),
2299 force_operand
2300 (plus_constant
14a774a9
RK
2301 (copy_rtx_and_substitute (SET_SRC (orig),
2302 map, 0),
38a448ca
RH
2303 - loc_offset),
2304 NULL_RTX));
e9a25f70 2305 }
14a774a9
RK
2306 else
2307 return gen_rtx_SET (VOIDmode,
2308 copy_rtx_and_substitute (SET_DEST (orig), map, 1),
2309 copy_rtx_and_substitute (SET_SRC (orig), map, 0));
175160e7
MT
2310 break;
2311
2312 case MEM:
36edd3cc
BS
2313 if (inlining
2314 && GET_CODE (XEXP (orig, 0)) == SYMBOL_REF
2315 && CONSTANT_POOL_ADDRESS_P (XEXP (orig, 0)))
2316 {
14a774a9
RK
2317 enum machine_mode const_mode
2318 = get_pool_mode_for_function (inlining, XEXP (orig, 0));
2319 rtx constant
2320 = get_pool_constant_for_function (inlining, XEXP (orig, 0));
2321
2322 constant = copy_rtx_and_substitute (constant, map, 0);
2323
36edd3cc
BS
2324 /* If this was an address of a constant pool entry that itself
2325 had to be placed in the constant pool, it might not be a
2326 valid address. So the recursive call might have turned it
2327 into a register. In that case, it isn't a constant any
2328 more, so return it. This has the potential of changing a
2329 MEM into a REG, but we'll assume that it safe. */
2330 if (! CONSTANT_P (constant))
2331 return constant;
14a774a9 2332
36edd3cc
BS
2333 return validize_mem (force_const_mem (const_mode, constant));
2334 }
14a774a9 2335
c81f560b
RH
2336 copy = gen_rtx_MEM (mode, copy_rtx_and_substitute (XEXP (orig, 0),
2337 map, 0));
2338 MEM_COPY_ATTRIBUTES (copy, orig);
9674c842
RK
2339
2340 /* If inlining and this is not for the LHS, turn off RTX_UNCHANGING_P
2341 since this may be an indirect reference to a parameter and the
2342 actual may not be readonly. */
2343 if (inlining && !for_lhs)
2344 RTX_UNCHANGING_P (copy) = 0;
2345
32e9b960
RH
2346 /* If inlining, squish aliasing data that references the subroutine's
2347 parameter list, since that's no longer applicable. */
2348 if (inlining && MEM_EXPR (copy)
2349 && TREE_CODE (MEM_EXPR (copy)) == INDIRECT_REF
2350 && TREE_CODE (TREE_OPERAND (MEM_EXPR (copy), 0)) == PARM_DECL)
2351 set_mem_expr (copy, NULL_TREE);
2352
175160e7 2353 return copy;
00174bdf 2354
e9a25f70
JL
2355 default:
2356 break;
175160e7
MT
2357 }
2358
2359 copy = rtx_alloc (code);
2360 PUT_MODE (copy, mode);
2adc7f12
JJ
2361 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2362 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2363 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
175160e7
MT
2364
2365 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2366
2367 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2368 {
2369 switch (*format_ptr++)
2370 {
2371 case '0':
ef178af3
ZW
2372 /* Copy this through the wide int field; that's safest. */
2373 X0WINT (copy, i) = X0WINT (orig, i);
175160e7
MT
2374 break;
2375
2376 case 'e':
14a774a9
RK
2377 XEXP (copy, i)
2378 = copy_rtx_and_substitute (XEXP (orig, i), map, for_lhs);
175160e7
MT
2379 break;
2380
2381 case 'u':
2382 /* Change any references to old-insns to point to the
2383 corresponding copied insns. */
2384 XEXP (copy, i) = map->insn_map[INSN_UID (XEXP (orig, i))];
2385 break;
2386
2387 case 'E':
2388 XVEC (copy, i) = XVEC (orig, i);
2389 if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
2390 {
2391 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2392 for (j = 0; j < XVECLEN (copy, i); j++)
2393 XVECEXP (copy, i, j)
14a774a9
RK
2394 = copy_rtx_and_substitute (XVECEXP (orig, i, j),
2395 map, for_lhs);
175160e7
MT
2396 }
2397 break;
2398
02bea8a8
RK
2399 case 'w':
2400 XWINT (copy, i) = XWINT (orig, i);
2401 break;
2402
175160e7
MT
2403 case 'i':
2404 XINT (copy, i) = XINT (orig, i);
2405 break;
2406
2407 case 's':
2408 XSTR (copy, i) = XSTR (orig, i);
2409 break;
2410
8f985ec4
ZW
2411 case 't':
2412 XTREE (copy, i) = XTREE (orig, i);
2413 break;
2414
175160e7
MT
2415 default:
2416 abort ();
2417 }
2418 }
2419
2420 if (code == ASM_OPERANDS && map->orig_asm_operands_vector == 0)
2421 {
6462bb43
AO
2422 map->orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
2423 map->copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
2424 map->copy_asm_constraints_vector
2425 = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
175160e7
MT
2426 }
2427
2428 return copy;
2429}
2430\f
2431/* Substitute known constant values into INSN, if that is valid. */
2432
2433void
2434try_constants (insn, map)
2435 rtx insn;
2436 struct inline_remap *map;
2437{
2438 int i;
2439
2440 map->num_sets = 0;
175160e7 2441
14a774a9
RK
2442 /* First try just updating addresses, then other things. This is
2443 important when we have something like the store of a constant
2444 into memory and we can update the memory address but the machine
2445 does not support a constant source. */
2446 subst_constants (&PATTERN (insn), insn, map, 1);
2447 apply_change_group ();
2448 subst_constants (&PATTERN (insn), insn, map, 0);
175160e7
MT
2449 apply_change_group ();
2450
2451 /* Show we don't know the value of anything stored or clobbered. */
84832317 2452 note_stores (PATTERN (insn), mark_stores, NULL);
175160e7
MT
2453 map->last_pc_value = 0;
2454#ifdef HAVE_cc0
2455 map->last_cc0_value = 0;
2456#endif
2457
2458 /* Set up any constant equivalences made in this insn. */
2459 for (i = 0; i < map->num_sets; i++)
2460 {
2461 if (GET_CODE (map->equiv_sets[i].dest) == REG)
2462 {
2463 int regno = REGNO (map->equiv_sets[i].dest);
2464
c68da89c
KR
2465 MAYBE_EXTEND_CONST_EQUIV_VARRAY (map, regno);
2466 if (VARRAY_CONST_EQUIV (map->const_equiv_varray, regno).rtx == 0
2467 /* Following clause is a hack to make case work where GNU C++
2468 reassigns a variable to make cse work right. */
2469 || ! rtx_equal_p (VARRAY_CONST_EQUIV (map->const_equiv_varray,
2470 regno).rtx,
2471 map->equiv_sets[i].equiv))
2472 SET_CONST_EQUIV_DATA (map, map->equiv_sets[i].dest,
2473 map->equiv_sets[i].equiv, map->const_age);
175160e7
MT
2474 }
2475 else if (map->equiv_sets[i].dest == pc_rtx)
2476 map->last_pc_value = map->equiv_sets[i].equiv;
2477#ifdef HAVE_cc0
2478 else if (map->equiv_sets[i].dest == cc0_rtx)
2479 map->last_cc0_value = map->equiv_sets[i].equiv;
2480#endif
2481 }
2482}
2483\f
2484/* Substitute known constants for pseudo regs in the contents of LOC,
2485 which are part of INSN.
d45cf215 2486 If INSN is zero, the substitution should always be done (this is used to
175160e7
MT
2487 update DECL_RTL).
2488 These changes are taken out by try_constants if the result is not valid.
2489
2490 Note that we are more concerned with determining when the result of a SET
2491 is a constant, for further propagation, than actually inserting constants
2492 into insns; cse will do the latter task better.
2493
2494 This function is also used to adjust address of items previously addressed
00174bdf 2495 via the virtual stack variable or virtual incoming arguments registers.
14a774a9
RK
2496
2497 If MEMONLY is nonzero, only make changes inside a MEM. */
175160e7
MT
2498
2499static void
14a774a9 2500subst_constants (loc, insn, map, memonly)
175160e7
MT
2501 rtx *loc;
2502 rtx insn;
2503 struct inline_remap *map;
14a774a9 2504 int memonly;
175160e7
MT
2505{
2506 rtx x = *loc;
b3694847
SS
2507 int i, j;
2508 enum rtx_code code;
2509 const char *format_ptr;
175160e7
MT
2510 int num_changes = num_validated_changes ();
2511 rtx new = 0;
a30d557c 2512 enum machine_mode op0_mode = MAX_MACHINE_MODE;
175160e7
MT
2513
2514 code = GET_CODE (x);
2515
2516 switch (code)
2517 {
2518 case PC:
2519 case CONST_INT:
2520 case CONST_DOUBLE:
69ef87e2 2521 case CONST_VECTOR:
175160e7
MT
2522 case SYMBOL_REF:
2523 case CONST:
2524 case LABEL_REF:
2525 case ADDRESS:
2526 return;
2527
2528#ifdef HAVE_cc0
2529 case CC0:
14a774a9
RK
2530 if (! memonly)
2531 validate_change (insn, loc, map->last_cc0_value, 1);
175160e7
MT
2532 return;
2533#endif
2534
2535 case USE:
2536 case CLOBBER:
2537 /* The only thing we can do with a USE or CLOBBER is possibly do
2538 some substitutions in a MEM within it. */
2539 if (GET_CODE (XEXP (x, 0)) == MEM)
14a774a9 2540 subst_constants (&XEXP (XEXP (x, 0), 0), insn, map, 0);
175160e7
MT
2541 return;
2542
2543 case REG:
2544 /* Substitute for parms and known constants. Don't replace
2545 hard regs used as user variables with constants. */
14a774a9
RK
2546 if (! memonly)
2547 {
2548 int regno = REGNO (x);
2549 struct const_equiv_data *p;
2550
2551 if (! (regno < FIRST_PSEUDO_REGISTER && REG_USERVAR_P (x))
2552 && (size_t) regno < VARRAY_SIZE (map->const_equiv_varray)
2553 && (p = &VARRAY_CONST_EQUIV (map->const_equiv_varray, regno),
2554 p->rtx != 0)
2555 && p->age >= map->const_age)
2556 validate_change (insn, loc, p->rtx, 1);
2557 }
2558 return;
175160e7
MT
2559
2560 case SUBREG:
637c5064
RS
2561 /* SUBREG applied to something other than a reg
2562 should be treated as ordinary, since that must
2563 be a special hack and we don't know how to treat it specially.
2564 Consider for example mulsidi3 in m68k.md.
2565 Ordinary SUBREG of a REG needs this special treatment. */
14a774a9 2566 if (! memonly && GET_CODE (SUBREG_REG (x)) == REG)
637c5064
RS
2567 {
2568 rtx inner = SUBREG_REG (x);
2569 rtx new = 0;
175160e7 2570
637c5064
RS
2571 /* We can't call subst_constants on &SUBREG_REG (x) because any
2572 constant or SUBREG wouldn't be valid inside our SUBEG. Instead,
2573 see what is inside, try to form the new SUBREG and see if that is
00174bdf 2574 valid. We handle two cases: extracting a full word in an
637c5064 2575 integral mode and extracting the low part. */
14a774a9 2576 subst_constants (&inner, NULL_RTX, map, 0);
0631e0bf
JH
2577 new = simplify_gen_subreg (GET_MODE (x), inner,
2578 GET_MODE (SUBREG_REG (x)),
2579 SUBREG_BYTE (x));
175160e7 2580
637c5064
RS
2581 if (new)
2582 validate_change (insn, loc, new, 1);
0631e0bf
JH
2583 else
2584 cancel_changes (num_changes);
175160e7 2585
637c5064
RS
2586 return;
2587 }
2588 break;
175160e7
MT
2589
2590 case MEM:
14a774a9 2591 subst_constants (&XEXP (x, 0), insn, map, 0);
175160e7
MT
2592
2593 /* If a memory address got spoiled, change it back. */
14a774a9
RK
2594 if (! memonly && insn != 0 && num_validated_changes () != num_changes
2595 && ! memory_address_p (GET_MODE (x), XEXP (x, 0)))
175160e7
MT
2596 cancel_changes (num_changes);
2597 return;
2598
2599 case SET:
2600 {
2601 /* Substitute constants in our source, and in any arguments to a
2602 complex (e..g, ZERO_EXTRACT) destination, but not in the destination
2603 itself. */
2604 rtx *dest_loc = &SET_DEST (x);
2605 rtx dest = *dest_loc;
2606 rtx src, tem;
96e60f0c
JJ
2607 enum machine_mode compare_mode = VOIDmode;
2608
2609 /* If SET_SRC is a COMPARE which subst_constants would turn into
2610 COMPARE of 2 VOIDmode constants, note the mode in which comparison
2611 is to be done. */
2612 if (GET_CODE (SET_SRC (x)) == COMPARE)
2613 {
2614 src = SET_SRC (x);
2615 if (GET_MODE_CLASS (GET_MODE (src)) == MODE_CC
2616#ifdef HAVE_cc0
2617 || dest == cc0_rtx
2618#endif
2619 )
2620 {
2621 compare_mode = GET_MODE (XEXP (src, 0));
2622 if (compare_mode == VOIDmode)
2623 compare_mode = GET_MODE (XEXP (src, 1));
2624 }
2625 }
175160e7 2626
14a774a9 2627 subst_constants (&SET_SRC (x), insn, map, memonly);
175160e7
MT
2628 src = SET_SRC (x);
2629
2630 while (GET_CODE (*dest_loc) == ZERO_EXTRACT
175160e7
MT
2631 || GET_CODE (*dest_loc) == SUBREG
2632 || GET_CODE (*dest_loc) == STRICT_LOW_PART)
2633 {
2634 if (GET_CODE (*dest_loc) == ZERO_EXTRACT)
2635 {
14a774a9
RK
2636 subst_constants (&XEXP (*dest_loc, 1), insn, map, memonly);
2637 subst_constants (&XEXP (*dest_loc, 2), insn, map, memonly);
175160e7
MT
2638 }
2639 dest_loc = &XEXP (*dest_loc, 0);
2640 }
2641
91594e43
RS
2642 /* Do substitute in the address of a destination in memory. */
2643 if (GET_CODE (*dest_loc) == MEM)
14a774a9 2644 subst_constants (&XEXP (*dest_loc, 0), insn, map, 0);
91594e43 2645
175160e7
MT
2646 /* Check for the case of DEST a SUBREG, both it and the underlying
2647 register are less than one word, and the SUBREG has the wider mode.
2648 In the case, we are really setting the underlying register to the
2649 source converted to the mode of DEST. So indicate that. */
2650 if (GET_CODE (dest) == SUBREG
2651 && GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD
2652 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) <= UNITS_PER_WORD
2653 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
2654 <= GET_MODE_SIZE (GET_MODE (dest)))
e2eb57b7
RK
2655 && (tem = gen_lowpart_if_possible (GET_MODE (SUBREG_REG (dest)),
2656 src)))
175160e7
MT
2657 src = tem, dest = SUBREG_REG (dest);
2658
2659 /* If storing a recognizable value save it for later recording. */
2660 if ((map->num_sets < MAX_RECOG_OPERANDS)
2661 && (CONSTANT_P (src)
c9734bb9 2662 || (GET_CODE (src) == REG
83b93f40
RK
2663 && (REGNO (src) == VIRTUAL_INCOMING_ARGS_REGNUM
2664 || REGNO (src) == VIRTUAL_STACK_VARS_REGNUM))
175160e7
MT
2665 || (GET_CODE (src) == PLUS
2666 && GET_CODE (XEXP (src, 0)) == REG
83b93f40
RK
2667 && (REGNO (XEXP (src, 0)) == VIRTUAL_INCOMING_ARGS_REGNUM
2668 || REGNO (XEXP (src, 0)) == VIRTUAL_STACK_VARS_REGNUM)
175160e7
MT
2669 && CONSTANT_P (XEXP (src, 1)))
2670 || GET_CODE (src) == COMPARE
2671#ifdef HAVE_cc0
2672 || dest == cc0_rtx
2673#endif
2674 || (dest == pc_rtx
2675 && (src == pc_rtx || GET_CODE (src) == RETURN
2676 || GET_CODE (src) == LABEL_REF))))
2677 {
2678 /* Normally, this copy won't do anything. But, if SRC is a COMPARE
2679 it will cause us to save the COMPARE with any constants
2680 substituted, which is what we want for later. */
96e60f0c
JJ
2681 rtx src_copy = copy_rtx (src);
2682 map->equiv_sets[map->num_sets].equiv = src_copy;
175160e7 2683 map->equiv_sets[map->num_sets++].dest = dest;
96e60f0c
JJ
2684 if (compare_mode != VOIDmode
2685 && GET_CODE (src) == COMPARE
2686 && (GET_MODE_CLASS (GET_MODE (src)) == MODE_CC
2687#ifdef HAVE_cc0
2688 || dest == cc0_rtx
2689#endif
2690 )
2691 && GET_MODE (XEXP (src, 0)) == VOIDmode
2692 && GET_MODE (XEXP (src, 1)) == VOIDmode)
2693 {
2694 map->compare_src = src_copy;
2695 map->compare_mode = compare_mode;
2696 }
175160e7 2697 }
175160e7 2698 }
e9a25f70
JL
2699 return;
2700
2701 default:
2702 break;
175160e7
MT
2703 }
2704
2705 format_ptr = GET_RTX_FORMAT (code);
00174bdf 2706
175160e7
MT
2707 /* If the first operand is an expression, save its mode for later. */
2708 if (*format_ptr == 'e')
2709 op0_mode = GET_MODE (XEXP (x, 0));
2710
2711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2712 {
2713 switch (*format_ptr++)
2714 {
2715 case '0':
2716 break;
2717
2718 case 'e':
2719 if (XEXP (x, i))
14a774a9 2720 subst_constants (&XEXP (x, i), insn, map, memonly);
175160e7
MT
2721 break;
2722
2723 case 'u':
2724 case 'i':
2725 case 's':
02bea8a8 2726 case 'w':
00174bdf 2727 case 'n':
8f985ec4 2728 case 't':
2ff581c3 2729 case 'B':
175160e7
MT
2730 break;
2731
2732 case 'E':
2733 if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
14a774a9
RK
2734 for (j = 0; j < XVECLEN (x, i); j++)
2735 subst_constants (&XVECEXP (x, i, j), insn, map, memonly);
2736
175160e7
MT
2737 break;
2738
2739 default:
2740 abort ();
2741 }
2742 }
2743
2744 /* If this is a commutative operation, move a constant to the second
2745 operand unless the second operand is already a CONST_INT. */
14a774a9
RK
2746 if (! memonly
2747 && (GET_RTX_CLASS (code) == 'c' || code == NE || code == EQ)
175160e7
MT
2748 && CONSTANT_P (XEXP (x, 0)) && GET_CODE (XEXP (x, 1)) != CONST_INT)
2749 {
2750 rtx tem = XEXP (x, 0);
2751 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
2752 validate_change (insn, &XEXP (x, 1), tem, 1);
2753 }
2754
2755 /* Simplify the expression in case we put in some constants. */
14a774a9
RK
2756 if (! memonly)
2757 switch (GET_RTX_CLASS (code))
175160e7 2758 {
14a774a9
RK
2759 case '1':
2760 if (op0_mode == MAX_MACHINE_MODE)
2761 abort ();
2762 new = simplify_unary_operation (code, GET_MODE (x),
2763 XEXP (x, 0), op0_mode);
2764 break;
2765
2766 case '<':
2767 {
2768 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
2769
2770 if (op_mode == VOIDmode)
2771 op_mode = GET_MODE (XEXP (x, 1));
2772 new = simplify_relational_operation (code, op_mode,
2773 XEXP (x, 0), XEXP (x, 1));
b565a316 2774#ifdef FLOAT_STORE_FLAG_VALUE
14a774a9 2775 if (new != 0 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
12530dbe
RH
2776 {
2777 enum machine_mode mode = GET_MODE (x);
2778 if (new == const0_rtx)
2779 new = CONST0_RTX (mode);
2780 else
2781 {
950a3816
KG
2782 REAL_VALUE_TYPE val;
2783
2784 /* Avoid automatic aggregate initialization. */
2785 val = FLOAT_STORE_FLAG_VALUE (mode);
12530dbe
RH
2786 new = CONST_DOUBLE_FROM_REAL_VALUE (val, mode);
2787 }
2788 }
b565a316 2789#endif
14a774a9 2790 break;
00174bdf 2791 }
175160e7 2792
14a774a9
RK
2793 case '2':
2794 case 'c':
2795 new = simplify_binary_operation (code, GET_MODE (x),
2796 XEXP (x, 0), XEXP (x, 1));
2797 break;
175160e7 2798
14a774a9
RK
2799 case 'b':
2800 case '3':
2801 if (op0_mode == MAX_MACHINE_MODE)
2802 abort ();
2803
96e60f0c
JJ
2804 if (code == IF_THEN_ELSE)
2805 {
2806 rtx op0 = XEXP (x, 0);
2807
2808 if (GET_RTX_CLASS (GET_CODE (op0)) == '<'
2809 && GET_MODE (op0) == VOIDmode
2810 && ! side_effects_p (op0)
2811 && XEXP (op0, 0) == map->compare_src
2812 && GET_MODE (XEXP (op0, 1)) == VOIDmode)
2813 {
2814 /* We have compare of two VOIDmode constants for which
2815 we recorded the comparison mode. */
2816 rtx temp =
2817 simplify_relational_operation (GET_CODE (op0),
2818 map->compare_mode,
2819 XEXP (op0, 0),
2820 XEXP (op0, 1));
2821
2822 if (temp == const0_rtx)
2823 new = XEXP (x, 2);
2824 else if (temp == const1_rtx)
2825 new = XEXP (x, 1);
2826 }
2827 }
2828 if (!new)
2829 new = simplify_ternary_operation (code, GET_MODE (x), op0_mode,
2830 XEXP (x, 0), XEXP (x, 1),
2831 XEXP (x, 2));
14a774a9
RK
2832 break;
2833 }
175160e7
MT
2834
2835 if (new)
2836 validate_change (insn, loc, new, 1);
2837}
2838
2839/* Show that register modified no longer contain known constants. We are
2840 called from note_stores with parts of the new insn. */
2841
915b80ed 2842static void
84832317 2843mark_stores (dest, x, data)
175160e7 2844 rtx dest;
487a6e06 2845 rtx x ATTRIBUTE_UNUSED;
84832317 2846 void *data ATTRIBUTE_UNUSED;
175160e7 2847{
e2eb57b7 2848 int regno = -1;
6a651371 2849 enum machine_mode mode = VOIDmode;
e2eb57b7
RK
2850
2851 /* DEST is always the innermost thing set, except in the case of
2852 SUBREGs of hard registers. */
175160e7
MT
2853
2854 if (GET_CODE (dest) == REG)
e2eb57b7
RK
2855 regno = REGNO (dest), mode = GET_MODE (dest);
2856 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
2857 {
ddef6bc7
JJ
2858 regno = REGNO (SUBREG_REG (dest));
2859 if (regno < FIRST_PSEUDO_REGISTER)
2860 regno += subreg_regno_offset (REGNO (SUBREG_REG (dest)),
2861 GET_MODE (SUBREG_REG (dest)),
2862 SUBREG_BYTE (dest),
2863 GET_MODE (dest));
e2eb57b7
RK
2864 mode = GET_MODE (SUBREG_REG (dest));
2865 }
2866
2867 if (regno >= 0)
2868 {
770ae6cc
RK
2869 unsigned int uregno = regno;
2870 unsigned int last_reg = (uregno >= FIRST_PSEUDO_REGISTER ? uregno
00174bdf 2871 : uregno + HARD_REGNO_NREGS (uregno, mode) - 1);
770ae6cc 2872 unsigned int i;
e2eb57b7 2873
e9a25f70
JL
2874 /* Ignore virtual stack var or virtual arg register since those
2875 are handled separately. */
770ae6cc
RK
2876 if (uregno != VIRTUAL_INCOMING_ARGS_REGNUM
2877 && uregno != VIRTUAL_STACK_VARS_REGNUM)
2878 for (i = uregno; i <= last_reg; i++)
6a651371 2879 if ((size_t) i < VARRAY_SIZE (global_const_equiv_varray))
c68da89c 2880 VARRAY_CONST_EQUIV (global_const_equiv_varray, i).rtx = 0;
e2eb57b7 2881 }
175160e7
MT
2882}
2883\f
81578142
RS
2884/* Given a pointer to some BLOCK node, if the BLOCK_ABSTRACT_ORIGIN for the
2885 given BLOCK node is NULL, set the BLOCK_ABSTRACT_ORIGIN for the node so
2886 that it points to the node itself, thus indicating that the node is its
2887 own (abstract) origin. Additionally, if the BLOCK_ABSTRACT_ORIGIN for
2888 the given node is NULL, recursively descend the decl/block tree which
2889 it is the root of, and for each other ..._DECL or BLOCK node contained
2890 therein whose DECL_ABSTRACT_ORIGINs or BLOCK_ABSTRACT_ORIGINs are also
2891 still NULL, set *their* DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN
2892 values to point to themselves. */
2893
81578142
RS
2894static void
2895set_block_origin_self (stmt)
b3694847 2896 tree stmt;
81578142
RS
2897{
2898 if (BLOCK_ABSTRACT_ORIGIN (stmt) == NULL_TREE)
2899 {
2900 BLOCK_ABSTRACT_ORIGIN (stmt) = stmt;
2901
2902 {
b3694847 2903 tree local_decl;
81578142 2904
00174bdf 2905 for (local_decl = BLOCK_VARS (stmt);
81578142
RS
2906 local_decl != NULL_TREE;
2907 local_decl = TREE_CHAIN (local_decl))
00174bdf 2908 set_decl_origin_self (local_decl); /* Potential recursion. */
81578142
RS
2909 }
2910
2911 {
b3694847 2912 tree subblock;
81578142 2913
00174bdf 2914 for (subblock = BLOCK_SUBBLOCKS (stmt);
81578142
RS
2915 subblock != NULL_TREE;
2916 subblock = BLOCK_CHAIN (subblock))
00174bdf 2917 set_block_origin_self (subblock); /* Recurse. */
81578142
RS
2918 }
2919 }
2920}
2921
2922/* Given a pointer to some ..._DECL node, if the DECL_ABSTRACT_ORIGIN for
2923 the given ..._DECL node is NULL, set the DECL_ABSTRACT_ORIGIN for the
2924 node to so that it points to the node itself, thus indicating that the
2925 node represents its own (abstract) origin. Additionally, if the
2926 DECL_ABSTRACT_ORIGIN for the given node is NULL, recursively descend
2927 the decl/block tree of which the given node is the root of, and for
2928 each other ..._DECL or BLOCK node contained therein whose
2929 DECL_ABSTRACT_ORIGINs or BLOCK_ABSTRACT_ORIGINs are also still NULL,
2930 set *their* DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN values to
2931 point to themselves. */
2932
1cfdcc15 2933void
81578142 2934set_decl_origin_self (decl)
b3694847 2935 tree decl;
81578142
RS
2936{
2937 if (DECL_ABSTRACT_ORIGIN (decl) == NULL_TREE)
2938 {
2939 DECL_ABSTRACT_ORIGIN (decl) = decl;
2940 if (TREE_CODE (decl) == FUNCTION_DECL)
2941 {
b3694847 2942 tree arg;
81578142
RS
2943
2944 for (arg = DECL_ARGUMENTS (decl); arg; arg = TREE_CHAIN (arg))
2945 DECL_ABSTRACT_ORIGIN (arg) = arg;
29d356fb
RK
2946 if (DECL_INITIAL (decl) != NULL_TREE
2947 && DECL_INITIAL (decl) != error_mark_node)
81578142
RS
2948 set_block_origin_self (DECL_INITIAL (decl));
2949 }
2950 }
2951}
2952\f
2953/* Given a pointer to some BLOCK node, and a boolean value to set the
2954 "abstract" flags to, set that value into the BLOCK_ABSTRACT flag for
2955 the given block, and for all local decls and all local sub-blocks
2956 (recursively) which are contained therein. */
2957
81578142
RS
2958static void
2959set_block_abstract_flags (stmt, setting)
b3694847
SS
2960 tree stmt;
2961 int setting;
81578142 2962{
b3694847
SS
2963 tree local_decl;
2964 tree subblock;
81578142 2965
12307ca2 2966 BLOCK_ABSTRACT (stmt) = setting;
81578142 2967
12307ca2
RK
2968 for (local_decl = BLOCK_VARS (stmt);
2969 local_decl != NULL_TREE;
2970 local_decl = TREE_CHAIN (local_decl))
2971 set_decl_abstract_flags (local_decl, setting);
81578142 2972
12307ca2
RK
2973 for (subblock = BLOCK_SUBBLOCKS (stmt);
2974 subblock != NULL_TREE;
2975 subblock = BLOCK_CHAIN (subblock))
2976 set_block_abstract_flags (subblock, setting);
81578142
RS
2977}
2978
2979/* Given a pointer to some ..._DECL node, and a boolean value to set the
2980 "abstract" flags to, set that value into the DECL_ABSTRACT flag for the
2981 given decl, and (in the case where the decl is a FUNCTION_DECL) also
2982 set the abstract flags for all of the parameters, local vars, local
2983 blocks and sub-blocks (recursively) to the same setting. */
2984
2985void
2986set_decl_abstract_flags (decl, setting)
b3694847
SS
2987 tree decl;
2988 int setting;
81578142
RS
2989{
2990 DECL_ABSTRACT (decl) = setting;
2991 if (TREE_CODE (decl) == FUNCTION_DECL)
2992 {
b3694847 2993 tree arg;
81578142
RS
2994
2995 for (arg = DECL_ARGUMENTS (decl); arg; arg = TREE_CHAIN (arg))
2996 DECL_ABSTRACT (arg) = setting;
29d356fb
RK
2997 if (DECL_INITIAL (decl) != NULL_TREE
2998 && DECL_INITIAL (decl) != error_mark_node)
81578142
RS
2999 set_block_abstract_flags (DECL_INITIAL (decl), setting);
3000 }
3001}
3002\f
175160e7
MT
3003/* Output the assembly language code for the function FNDECL
3004 from its DECL_SAVED_INSNS. Used for inline functions that are output
3005 at end of compilation instead of where they came in the source. */
3006
3007void
3008output_inline_function (fndecl)
3009 tree fndecl;
3010{
01d939e8 3011 struct function *old_cfun = cfun;
f93dacbd 3012 enum debug_info_type old_write_symbols = write_symbols;
54b6670a 3013 const struct gcc_debug_hooks *const old_debug_hooks = debug_hooks;
49ad7cfa 3014 struct function *f = DECL_SAVED_INSNS (fndecl);
175160e7 3015
01d939e8 3016 cfun = f;
175160e7 3017 current_function_decl = fndecl;
175160e7 3018
49ad7cfa 3019 set_new_last_label_num (f->inl_max_label_num);
175160e7 3020
51783c14
JM
3021 /* We're not deferring this any longer. */
3022 DECL_DEFER_OUTPUT (fndecl) = 0;
3023
f93dacbd
RK
3024 /* If requested, suppress debugging information. */
3025 if (f->no_debugging_symbols)
135d50f1
RK
3026 {
3027 write_symbols = NO_DEBUG;
3028 debug_hooks = &do_nothing_debug_hooks;
3029 }
f93dacbd 3030
ae6f2a1c
ZW
3031 /* Compile this function all the way down to assembly code. As a
3032 side effect this destroys the saved RTL representation, but
3033 that's okay, because we don't need to inline this anymore. */
7d2e8eff 3034 rest_of_compilation (fndecl);
f4744807 3035 DECL_INLINE (fndecl) = 0;
09578c27 3036
01d939e8
BS
3037 cfun = old_cfun;
3038 current_function_decl = old_cfun ? old_cfun->decl : 0;
f93dacbd 3039 write_symbols = old_write_symbols;
135d50f1 3040 debug_hooks = old_debug_hooks;
175160e7 3041}
c0e7830f
DD
3042
3043\f
3044/* Functions to keep track of the values hard regs had at the start of
3045 the function. */
3046
902197eb
DD
3047rtx
3048get_hard_reg_initial_reg (fun, reg)
3049 struct function *fun;
3050 rtx reg;
3051{
3052 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3053 int i;
3054
3055 if (ivs == 0)
3056 return NULL_RTX;
3057
3058 for (i = 0; i < ivs->num_entries; i++)
3059 if (rtx_equal_p (ivs->entries[i].pseudo, reg))
3060 return ivs->entries[i].hard_reg;
3061
3062 return NULL_RTX;
3063}
3064
c0e7830f
DD
3065rtx
3066has_func_hard_reg_initial_val (fun, reg)
3067 struct function *fun;
3068 rtx reg;
3069{
3070 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3071 int i;
3072
3073 if (ivs == 0)
3074 return NULL_RTX;
3075
3076 for (i = 0; i < ivs->num_entries; i++)
3077 if (rtx_equal_p (ivs->entries[i].hard_reg, reg))
3078 return ivs->entries[i].pseudo;
3079
3080 return NULL_RTX;
3081}
3082
3083rtx
3084get_func_hard_reg_initial_val (fun, reg)
3085 struct function *fun;
3086 rtx reg;
3087{
3088 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3089 rtx rv = has_func_hard_reg_initial_val (fun, reg);
3090
3091 if (rv)
3092 return rv;
3093
3094 if (ivs == 0)
3095 {
e2500fed 3096 fun->hard_reg_initial_vals = (void *) ggc_alloc (sizeof (initial_value_struct));
c0e7830f
DD
3097 ivs = fun->hard_reg_initial_vals;
3098 ivs->num_entries = 0;
3099 ivs->max_entries = 5;
e2500fed 3100 ivs->entries = (initial_value_pair *) ggc_alloc (5 * sizeof (initial_value_pair));
c0e7830f
DD
3101 }
3102
3103 if (ivs->num_entries >= ivs->max_entries)
3104 {
3105 ivs->max_entries += 5;
3106 ivs->entries =
e2500fed
GK
3107 (initial_value_pair *) ggc_realloc (ivs->entries,
3108 ivs->max_entries
3109 * sizeof (initial_value_pair));
c0e7830f
DD
3110 }
3111
3112 ivs->entries[ivs->num_entries].hard_reg = reg;
3113 ivs->entries[ivs->num_entries].pseudo = gen_reg_rtx (GET_MODE (reg));
3114
3115 return ivs->entries[ivs->num_entries++].pseudo;
3116}
3117
3118rtx
3119get_hard_reg_initial_val (mode, regno)
3120 enum machine_mode mode;
3121 int regno;
3122{
3123 return get_func_hard_reg_initial_val (cfun, gen_rtx_REG (mode, regno));
3124}
3125
3126rtx
3127has_hard_reg_initial_val (mode, regno)
3128 enum machine_mode mode;
3129 int regno;
3130{
3131 return has_func_hard_reg_initial_val (cfun, gen_rtx_REG (mode, regno));
3132}
3133
c0e7830f
DD
3134static void
3135setup_initial_hard_reg_value_integration (inl_f, remap)
3136 struct function *inl_f;
3137 struct inline_remap *remap;
3138{
3139 struct initial_value_struct *ivs = inl_f->hard_reg_initial_vals;
3140 int i;
3141
3142 if (ivs == 0)
3143 return;
3144
3145 for (i = 0; i < ivs->num_entries; i ++)
3146 remap->reg_map[REGNO (ivs->entries[i].pseudo)]
3147 = get_func_hard_reg_initial_val (cfun, ivs->entries[i].hard_reg);
3148}
3149
3150
3151void
3152emit_initial_value_sets ()
3153{
3154 struct initial_value_struct *ivs = cfun->hard_reg_initial_vals;
3155 int i;
3156 rtx seq;
3157
3158 if (ivs == 0)
3159 return;
3160
3161 start_sequence ();
3162 for (i = 0; i < ivs->num_entries; i++)
3163 emit_move_insn (ivs->entries[i].pseudo, ivs->entries[i].hard_reg);
3164 seq = get_insns ();
3165 end_sequence ();
3166
2f937369 3167 emit_insn_after (seq, get_insns ());
c0e7830f 3168}
385b6e2d
R
3169
3170/* If the backend knows where to allocate pseudos for hard
3171 register initial values, register these allocations now. */
3172void
3173allocate_initial_values (reg_equiv_memory_loc)
97a4f671 3174 rtx *reg_equiv_memory_loc ATTRIBUTE_UNUSED;
385b6e2d
R
3175{
3176#ifdef ALLOCATE_INITIAL_VALUE
3177 struct initial_value_struct *ivs = cfun->hard_reg_initial_vals;
3178 int i;
3179
3180 if (ivs == 0)
3181 return;
3182
3183 for (i = 0; i < ivs->num_entries; i++)
3184 {
3185 int regno = REGNO (ivs->entries[i].pseudo);
3186 rtx x = ALLOCATE_INITIAL_VALUE (ivs->entries[i].hard_reg);
3187
3188 if (x == NULL_RTX || REG_N_SETS (REGNO (ivs->entries[i].pseudo)) > 1)
3189 ; /* Do nothing. */
3190 else if (GET_CODE (x) == MEM)
3191 reg_equiv_memory_loc[regno] = x;
3192 else if (GET_CODE (x) == REG)
3193 {
3194 reg_renumber[regno] = REGNO (x);
3195 /* Poke the regno right into regno_reg_rtx
3196 so that even fixed regs are accepted. */
3197 REGNO (ivs->entries[i].pseudo) = REGNO (x);
3198 }
3199 else abort ();
3200 }
3201#endif
3202}
e2500fed
GK
3203
3204#include "gt-integrate.h"