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1322177d 1/* Procedure integration for GCC.
3c71940f 2 Copyright (C) 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
c28abdf0 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
175160e7
MT
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
5
1322177d 6This file is part of GCC.
175160e7 7
1322177d
LB
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
175160e7 12
1322177d
LB
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
175160e7
MT
17
18You should have received a copy of the GNU General Public License
1322177d
LB
19along with GCC; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2102111-1307, USA. */
175160e7 22
175160e7 23#include "config.h"
670ee920 24#include "system.h"
ccd043a9 25
175160e7
MT
26#include "rtl.h"
27#include "tree.h"
6baf1cc8 28#include "tm_p.h"
12307ca2 29#include "regs.h"
175160e7 30#include "flags.h"
135d50f1 31#include "debug.h"
175160e7 32#include "insn-config.h"
175160e7
MT
33#include "expr.h"
34#include "output.h"
e9a25f70 35#include "recog.h"
175160e7
MT
36#include "integrate.h"
37#include "real.h"
6adb4e3a 38#include "except.h"
175160e7 39#include "function.h"
d6f4ec51 40#include "toplev.h"
ab87f8c8 41#include "intl.h"
e6fd097e 42#include "loop.h"
c6d9a88c 43#include "params.h"
c0e7830f 44#include "ggc.h"
91d231cb 45#include "target.h"
63e1b1c4 46#include "langhooks.h"
175160e7
MT
47
48#include "obstack.h"
49#define obstack_chunk_alloc xmalloc
50#define obstack_chunk_free free
175160e7
MT
51
52extern struct obstack *function_maybepermanent_obstack;
53
175160e7
MT
54/* Similar, but round to the next highest integer that meets the
55 alignment. */
56#define CEIL_ROUND(VALUE,ALIGN) (((VALUE) + (ALIGN) - 1) & ~((ALIGN)- 1))
57
58/* Default max number of insns a function can have and still be inline.
59 This is overridden on RISC machines. */
60#ifndef INTEGRATE_THRESHOLD
aec98e42
ML
61/* Inlining small functions might save more space then not inlining at
62 all. Assume 1 instruction for the call and 1.5 insns per argument. */
175160e7 63#define INTEGRATE_THRESHOLD(DECL) \
aec98e42 64 (optimize_size \
c51262cf 65 ? (1 + (3 * list_length (DECL_ARGUMENTS (DECL))) / 2) \
aec98e42 66 : (8 * (8 + list_length (DECL_ARGUMENTS (DECL)))))
175160e7
MT
67#endif
68\f
c0e7830f 69
dc297297 70/* Private type used by {get/has}_func_hard_reg_initial_val. */
c0e7830f
DD
71typedef struct initial_value_pair {
72 rtx hard_reg;
73 rtx pseudo;
74} initial_value_pair;
75typedef struct initial_value_struct {
76 int num_entries;
77 int max_entries;
78 initial_value_pair *entries;
79} initial_value_struct;
80
81static void setup_initial_hard_reg_value_integration PARAMS ((struct function *, struct inline_remap *));
82
3fe41456
KG
83static rtvec initialize_for_inline PARAMS ((tree));
84static void note_modified_parmregs PARAMS ((rtx, rtx, void *));
85static void integrate_parm_decls PARAMS ((tree, struct inline_remap *,
0a1c58a2 86 rtvec));
3fe41456 87static tree integrate_decl_tree PARAMS ((tree,
0a1c58a2 88 struct inline_remap *));
3fe41456 89static void subst_constants PARAMS ((rtx *, rtx,
0a1c58a2 90 struct inline_remap *, int));
3fe41456 91static void set_block_origin_self PARAMS ((tree));
3fe41456
KG
92static void set_block_abstract_flags PARAMS ((tree, int));
93static void process_reg_param PARAMS ((struct inline_remap *, rtx,
0a1c58a2 94 rtx));
3fe41456 95void set_decl_abstract_flags PARAMS ((tree, int));
3fe41456 96static void mark_stores PARAMS ((rtx, rtx, void *));
0a1c58a2
JL
97static void save_parm_insns PARAMS ((rtx, rtx));
98static void copy_insn_list PARAMS ((rtx, struct inline_remap *,
99 rtx));
52a11cbf
RH
100static void copy_insn_notes PARAMS ((rtx, struct inline_remap *,
101 int));
3fe41456
KG
102static int compare_blocks PARAMS ((const PTR, const PTR));
103static int find_block PARAMS ((const PTR, const PTR));
f9e814f1 104
36edd3cc
BS
105/* Used by copy_rtx_and_substitute; this indicates whether the function is
106 called for the purpose of inlining or some other purpose (i.e. loop
107 unrolling). This affects how constant pool references are handled.
108 This variable contains the FUNCTION_DECL for the inlined function. */
109static struct function *inlining = 0;
175160e7 110\f
1f3d3a31 111/* Returns the Ith entry in the label_map contained in MAP. If the
e5e809f4
JL
112 Ith entry has not yet been set, return a fresh label. This function
113 performs a lazy initialization of label_map, thereby avoiding huge memory
114 explosions when the label_map gets very large. */
115
1f3d3a31
JL
116rtx
117get_label_from_map (map, i)
e5e809f4 118 struct inline_remap *map;
1f3d3a31
JL
119 int i;
120{
121 rtx x = map->label_map[i];
122
123 if (x == NULL_RTX)
00174bdf 124 x = map->label_map[i] = gen_label_rtx ();
1f3d3a31
JL
125
126 return x;
127}
128
91d231cb
JM
129/* Return false if the function FNDECL cannot be inlined on account of its
130 attributes, true otherwise. */
588d3ade 131bool
91d231cb
JM
132function_attribute_inlinable_p (fndecl)
133 tree fndecl;
134{
135 bool has_machine_attr = false;
136 tree a;
137
138 for (a = DECL_ATTRIBUTES (fndecl); a; a = TREE_CHAIN (a))
139 {
140 tree name = TREE_PURPOSE (a);
141 int i;
142
143 for (i = 0; targetm.attribute_table[i].name != NULL; i++)
144 {
145 if (is_attribute_p (targetm.attribute_table[i].name, name))
146 {
147 has_machine_attr = true;
148 break;
149 }
150 }
151 if (has_machine_attr)
152 break;
153 }
154
155 if (has_machine_attr)
156 return (*targetm.function_attribute_inlinable_p) (fndecl);
157 else
158 return true;
159}
160
175160e7
MT
161/* Zero if the current function (whose FUNCTION_DECL is FNDECL)
162 is safe and reasonable to integrate into other functions.
ab87f8c8 163 Nonzero means value is a warning msgid with a single %s
175160e7
MT
164 for the function's name. */
165
dff01034 166const char *
175160e7 167function_cannot_inline_p (fndecl)
b3694847 168 tree fndecl;
175160e7 169{
b3694847 170 rtx insn;
175160e7 171 tree last = tree_last (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
f9e814f1
TP
172
173 /* For functions marked as inline increase the maximum size to
c6d9a88c 174 MAX_INLINE_INSNS (-finline-limit-<n>). For regular functions
f9e814f1
TP
175 use the limit given by INTEGRATE_THRESHOLD. */
176
177 int max_insns = (DECL_INLINE (fndecl))
c6d9a88c 178 ? (MAX_INLINE_INSNS
f9e814f1
TP
179 + 8 * list_length (DECL_ARGUMENTS (fndecl)))
180 : INTEGRATE_THRESHOLD (fndecl);
181
b3694847
SS
182 int ninsns = 0;
183 tree parms;
175160e7 184
5daf7c0a
JM
185 if (DECL_UNINLINABLE (fndecl))
186 return N_("function cannot be inline");
187
e5e809f4 188 /* No inlines with varargs. */
175160e7 189 if ((last && TREE_VALUE (last) != void_type_node)
5d3fe1fe 190 || current_function_varargs)
ab87f8c8 191 return N_("varargs function cannot be inline");
175160e7
MT
192
193 if (current_function_calls_alloca)
ab87f8c8 194 return N_("function using alloca cannot be inline");
175160e7 195
cd8cee7b
RH
196 if (current_function_calls_setjmp)
197 return N_("function using setjmp cannot be inline");
198
52a11cbf
RH
199 if (current_function_calls_eh_return)
200 return N_("function uses __builtin_eh_return");
201
175160e7 202 if (current_function_contains_functions)
ab87f8c8 203 return N_("function with nested functions cannot be inline");
175160e7 204
b9096844 205 if (forced_labels)
14a774a9
RK
206 return
207 N_("function with label addresses used in initializers cannot inline");
b9096844 208
aeb302bb
JM
209 if (current_function_cannot_inline)
210 return current_function_cannot_inline;
211
175160e7 212 /* If its not even close, don't even look. */
f9e814f1 213 if (get_max_uid () > 3 * max_insns)
ab87f8c8 214 return N_("function too large to be inline");
175160e7 215
175160e7
MT
216#if 0
217 /* Don't inline functions which do not specify a function prototype and
218 have BLKmode argument or take the address of a parameter. */
219 for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
220 {
221 if (TYPE_MODE (TREE_TYPE (parms)) == BLKmode)
222 TREE_ADDRESSABLE (parms) = 1;
223 if (last == NULL_TREE && TREE_ADDRESSABLE (parms))
ab87f8c8 224 return N_("no prototype, and parameter address used; cannot be inline");
175160e7
MT
225 }
226#endif
227
228 /* We can't inline functions that return structures
229 the old-fashioned PCC way, copying into a static block. */
230 if (current_function_returns_pcc_struct)
ab87f8c8 231 return N_("inline functions not supported for this return value type");
175160e7
MT
232
233 /* We can't inline functions that return structures of varying size. */
f8013343
MM
234 if (TREE_CODE (TREE_TYPE (TREE_TYPE (fndecl))) != VOID_TYPE
235 && int_size_in_bytes (TREE_TYPE (TREE_TYPE (fndecl))) < 0)
ab87f8c8 236 return N_("function with varying-size return value cannot be inline");
175160e7 237
c8ad69c1
RK
238 /* Cannot inline a function with a varying size argument or one that
239 receives a transparent union. */
175160e7 240 for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
c8ad69c1
RK
241 {
242 if (int_size_in_bytes (TREE_TYPE (parms)) < 0)
ab87f8c8 243 return N_("function with varying-size parameter cannot be inline");
2bf105ab
RK
244 else if (TREE_CODE (TREE_TYPE (parms)) == UNION_TYPE
245 && TYPE_TRANSPARENT_UNION (TREE_TYPE (parms)))
ab87f8c8 246 return N_("function with transparent unit parameter cannot be inline");
c8ad69c1 247 }
175160e7 248
f9e814f1 249 if (get_max_uid () > max_insns)
175160e7 250 {
12307ca2
RK
251 for (ninsns = 0, insn = get_first_nonparm_insn ();
252 insn && ninsns < max_insns;
175160e7 253 insn = NEXT_INSN (insn))
2c3c49de 254 if (INSN_P (insn))
12307ca2 255 ninsns++;
175160e7
MT
256
257 if (ninsns >= max_insns)
ab87f8c8 258 return N_("function too large to be inline");
175160e7
MT
259 }
260
acd693d1
RH
261 /* We will not inline a function which uses computed goto. The addresses of
262 its local labels, which may be tucked into global storage, are of course
263 not constant across instantiations, which causes unexpected behaviour. */
264 if (current_function_has_computed_jump)
265 return N_("function with computed jump cannot inline");
ead02915 266
2edc3b33
JW
267 /* We cannot inline a nested function that jumps to a nonlocal label. */
268 if (current_function_has_nonlocal_goto)
ab87f8c8 269 return N_("function with nonlocal goto cannot be inline");
2edc3b33 270
64ed0f40 271 /* We can't inline functions that return a PARALLEL rtx. */
19e7881c
MM
272 if (DECL_RTL_SET_P (DECL_RESULT (fndecl)))
273 {
274 rtx result = DECL_RTL (DECL_RESULT (fndecl));
275 if (GET_CODE (result) == PARALLEL)
276 return N_("inline functions not supported for this return value type");
277 }
64ed0f40 278
b36f4ed3
NC
279 /* If the function has a target specific attribute attached to it,
280 then we assume that we should not inline it. This can be overriden
91d231cb
JM
281 by the target if it defines TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P. */
282 if (!function_attribute_inlinable_p (fndecl))
b36f4ed3
NC
283 return N_("function with target specific attribute(s) cannot be inlined");
284
285 return NULL;
175160e7
MT
286}
287\f
175160e7
MT
288/* Map pseudo reg number into the PARM_DECL for the parm living in the reg.
289 Zero for a reg that isn't a parm's home.
290 Only reg numbers less than max_parm_reg are mapped here. */
291static tree *parmdecl_map;
292
175160e7
MT
293/* In save_for_inline, nonzero if past the parm-initialization insns. */
294static int in_nonparm_insns;
295\f
f93dacbd 296/* Subroutine for `save_for_inline'. Performs initialization
175160e7 297 needed to save FNDECL's insns and info for future inline expansion. */
36edd3cc 298
49ad7cfa 299static rtvec
36edd3cc 300initialize_for_inline (fndecl)
175160e7 301 tree fndecl;
175160e7 302{
49ad7cfa 303 int i;
175160e7
MT
304 rtvec arg_vector;
305 tree parms;
306
175160e7 307 /* Clear out PARMDECL_MAP. It was allocated in the caller's frame. */
961192e1 308 memset ((char *) parmdecl_map, 0, max_parm_reg * sizeof (tree));
175160e7
MT
309 arg_vector = rtvec_alloc (list_length (DECL_ARGUMENTS (fndecl)));
310
311 for (parms = DECL_ARGUMENTS (fndecl), i = 0;
312 parms;
313 parms = TREE_CHAIN (parms), i++)
314 {
315 rtx p = DECL_RTL (parms);
316
8a173c73
RK
317 /* If we have (mem (addressof (mem ...))), use the inner MEM since
318 otherwise the copy_rtx call below will not unshare the MEM since
319 it shares ADDRESSOF. */
320 if (GET_CODE (p) == MEM && GET_CODE (XEXP (p, 0)) == ADDRESSOF
321 && GET_CODE (XEXP (XEXP (p, 0), 0)) == MEM)
322 p = XEXP (XEXP (p, 0), 0);
323
175160e7
MT
324 RTVEC_ELT (arg_vector, i) = p;
325
326 if (GET_CODE (p) == REG)
327 parmdecl_map[REGNO (p)] = parms;
f231e307
RK
328 else if (GET_CODE (p) == CONCAT)
329 {
330 rtx preal = gen_realpart (GET_MODE (XEXP (p, 0)), p);
331 rtx pimag = gen_imagpart (GET_MODE (preal), p);
332
333 if (GET_CODE (preal) == REG)
334 parmdecl_map[REGNO (preal)] = parms;
335 if (GET_CODE (pimag) == REG)
336 parmdecl_map[REGNO (pimag)] = parms;
337 }
338
048dfa64
RS
339 /* This flag is cleared later
340 if the function ever modifies the value of the parm. */
175160e7
MT
341 TREE_READONLY (parms) = 1;
342 }
343
49ad7cfa 344 return arg_vector;
175160e7
MT
345}
346
94755d92 347/* Copy NODE (which must be a DECL, but not a PARM_DECL). The DECL
00174bdf 348 originally was in the FROM_FN, but now it will be in the
94755d92 349 TO_FN. */
02e24c7a 350
94755d92
MM
351tree
352copy_decl_for_inlining (decl, from_fn, to_fn)
353 tree decl;
354 tree from_fn;
355 tree to_fn;
02e24c7a 356{
94755d92
MM
357 tree copy;
358
359 /* Copy the declaration. */
360 if (TREE_CODE (decl) == PARM_DECL || TREE_CODE (decl) == RESULT_DECL)
a8f8d1cc
MM
361 {
362 /* For a parameter, we must make an equivalent VAR_DECL, not a
363 new PARM_DECL. */
364 copy = build_decl (VAR_DECL, DECL_NAME (decl), TREE_TYPE (decl));
365 TREE_ADDRESSABLE (copy) = TREE_ADDRESSABLE (decl);
8eec72ec
JM
366 TREE_READONLY (copy) = TREE_READONLY (decl);
367 TREE_THIS_VOLATILE (copy) = TREE_THIS_VOLATILE (decl);
a8f8d1cc 368 }
94755d92
MM
369 else
370 {
371 copy = copy_node (decl);
63e1b1c4 372 (*lang_hooks.dup_lang_specific_decl) (copy);
a71811fe
MM
373
374 /* TREE_ADDRESSABLE isn't used to indicate that a label's
375 address has been taken; it's for internal bookkeeping in
376 expand_goto_internal. */
377 if (TREE_CODE (copy) == LABEL_DECL)
378 TREE_ADDRESSABLE (copy) = 0;
94755d92
MM
379 }
380
381 /* Set the DECL_ABSTRACT_ORIGIN so the debugging routines know what
382 declaration inspired this copy. */
383 DECL_ABSTRACT_ORIGIN (copy) = DECL_ORIGIN (decl);
384
385 /* The new variable/label has no RTL, yet. */
19e7881c 386 SET_DECL_RTL (copy, NULL_RTX);
94755d92
MM
387
388 /* These args would always appear unused, if not for this. */
389 TREE_USED (copy) = 1;
390
391 /* Set the context for the new declaration. */
392 if (!DECL_CONTEXT (decl))
393 /* Globals stay global. */
00174bdf 394 ;
94755d92
MM
395 else if (DECL_CONTEXT (decl) != from_fn)
396 /* Things that weren't in the scope of the function we're inlining
397 from aren't in the scope we're inlining too, either. */
398 ;
399 else if (TREE_STATIC (decl))
400 /* Function-scoped static variables should say in the original
401 function. */
02e24c7a
MM
402 ;
403 else
94755d92
MM
404 /* Ordinary automatic local variables are now in the scope of the
405 new function. */
406 DECL_CONTEXT (copy) = to_fn;
02e24c7a
MM
407
408 return copy;
409}
410
175160e7
MT
411/* Make the insns and PARM_DECLs of the current function permanent
412 and record other information in DECL_SAVED_INSNS to allow inlining
413 of this function in subsequent calls.
414
415 This routine need not copy any insns because we are not going
416 to immediately compile the insns in the insn chain. There
417 are two cases when we would compile the insns for FNDECL:
418 (1) when FNDECL is expanded inline, and (2) when FNDECL needs to
419 be output at the end of other compilation, because somebody took
420 its address. In the first case, the insns of FNDECL are copied
421 as it is expanded inline, so FNDECL's saved insns are not
422 modified. In the second case, FNDECL is used for the last time,
423 so modifying the rtl is not a problem.
424
09578c27
RK
425 We don't have to worry about FNDECL being inline expanded by
426 other functions which are written at the end of compilation
427 because flag_no_inline is turned on when we begin writing
428 functions at the end of compilation. */
175160e7
MT
429
430void
f93dacbd 431save_for_inline (fndecl)
175160e7
MT
432 tree fndecl;
433{
434 rtx insn;
49ad7cfa 435 rtvec argvec;
175160e7 436 rtx first_nonparm_insn;
175160e7
MT
437
438 /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
439 Later we set TREE_READONLY to 0 if the parm is modified inside the fn.
440 Also set up ARG_VECTOR, which holds the unmodified DECL_RTX values
441 for the parms, prior to elimination of virtual registers.
442 These values are needed for substituting parms properly. */
4838c5ee
AO
443 if (! flag_no_inline)
444 parmdecl_map = (tree *) xmalloc (max_parm_reg * sizeof (tree));
175160e7
MT
445
446 /* Make and emit a return-label if we have not already done so. */
447
448 if (return_label == 0)
449 {
450 return_label = gen_label_rtx ();
451 emit_label (return_label);
452 }
453
4838c5ee
AO
454 if (! flag_no_inline)
455 argvec = initialize_for_inline (fndecl);
456 else
457 argvec = NULL;
175160e7 458
4793dca1
JH
459 /* Delete basic block notes created by early run of find_basic_block.
460 The notes would be later used by find_basic_blocks to reuse the memory
461 for basic_block structures on already freed obstack. */
462 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
463 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK)
53c17031 464 delete_related_insns (insn);
4793dca1 465
175160e7
MT
466 /* If there are insns that copy parms from the stack into pseudo registers,
467 those insns are not copied. `expand_inline_function' must
468 emit the correct code to handle such things. */
469
470 insn = get_insns ();
471 if (GET_CODE (insn) != NOTE)
472 abort ();
473
4838c5ee
AO
474 if (! flag_no_inline)
475 {
476 /* Get the insn which signals the end of parameter setup code. */
477 first_nonparm_insn = get_first_nonparm_insn ();
478
479 /* Now just scan the chain of insns to see what happens to our
480 PARM_DECLs. If a PARM_DECL is used but never modified, we
481 can substitute its rtl directly when expanding inline (and
482 perform constant folding when its incoming value is
483 constant). Otherwise, we have to copy its value into a new
484 register and track the new register's life. */
485 in_nonparm_insns = 0;
486 save_parm_insns (insn, first_nonparm_insn);
487
488 cfun->inl_max_label_num = max_label_num ();
489 cfun->inl_last_parm_insn = cfun->x_last_parm_insn;
490 cfun->original_arg_vector = argvec;
491 }
01d939e8 492 cfun->original_decl_initial = DECL_INITIAL (fndecl);
f93dacbd 493 cfun->no_debugging_symbols = (write_symbols == NO_DEBUG);
01d939e8 494 DECL_SAVED_INSNS (fndecl) = cfun;
67289ea6
MM
495
496 /* Clean up. */
4838c5ee
AO
497 if (! flag_no_inline)
498 free (parmdecl_map);
175160e7 499}
0a1c58a2
JL
500
501/* Scan the chain of insns to see what happens to our PARM_DECLs. If a
502 PARM_DECL is used but never modified, we can substitute its rtl directly
503 when expanding inline (and perform constant folding when its incoming
504 value is constant). Otherwise, we have to copy its value into a new
505 register and track the new register's life. */
506
507static void
508save_parm_insns (insn, first_nonparm_insn)
00174bdf
KH
509 rtx insn;
510 rtx first_nonparm_insn;
0a1c58a2 511{
0a1c58a2
JL
512 if (insn == NULL_RTX)
513 return;
514
515 for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
516 {
517 if (insn == first_nonparm_insn)
518 in_nonparm_insns = 1;
519
2c3c49de 520 if (INSN_P (insn))
0a1c58a2
JL
521 {
522 /* Record what interesting things happen to our parameters. */
523 note_stores (PATTERN (insn), note_modified_parmregs, NULL);
524
525 /* If this is a CALL_PLACEHOLDER insn then we need to look into the
526 three attached sequences: normal call, sibling call and tail
00174bdf 527 recursion. */
0a1c58a2
JL
528 if (GET_CODE (insn) == CALL_INSN
529 && GET_CODE (PATTERN (insn)) == CALL_PLACEHOLDER)
530 {
531 int i;
532
533 for (i = 0; i < 3; i++)
534 save_parm_insns (XEXP (PATTERN (insn), i),
535 first_nonparm_insn);
536 }
537 }
538 }
539}
175160e7 540\f
175160e7
MT
541/* Note whether a parameter is modified or not. */
542
543static void
84832317 544note_modified_parmregs (reg, x, data)
175160e7 545 rtx reg;
487a6e06 546 rtx x ATTRIBUTE_UNUSED;
84832317 547 void *data ATTRIBUTE_UNUSED;
175160e7
MT
548{
549 if (GET_CODE (reg) == REG && in_nonparm_insns
550 && REGNO (reg) < max_parm_reg
551 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
552 && parmdecl_map[REGNO (reg)] != 0)
553 TREE_READONLY (parmdecl_map[REGNO (reg)]) = 0;
554}
555
175160e7
MT
556/* Unfortunately, we need a global copy of const_equiv map for communication
557 with a function called from note_stores. Be *very* careful that this
558 is used properly in the presence of recursion. */
559
c68da89c 560varray_type global_const_equiv_varray;
175160e7
MT
561\f
562#define FIXED_BASE_PLUS_P(X) \
563 (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
564 && GET_CODE (XEXP (X, 0)) == REG \
565 && REGNO (XEXP (X, 0)) >= FIRST_VIRTUAL_REGISTER \
f9b06ea4 566 && REGNO (XEXP (X, 0)) <= LAST_VIRTUAL_REGISTER)
175160e7 567
a4c3ddd8
BS
568/* Called to set up a mapping for the case where a parameter is in a
569 register. If it is read-only and our argument is a constant, set up the
570 constant equivalence.
571
572 If LOC is REG_USERVAR_P, the usual case, COPY must also have that flag set
573 if it is a register.
574
575 Also, don't allow hard registers here; they might not be valid when
576 substituted into insns. */
577static void
578process_reg_param (map, loc, copy)
579 struct inline_remap *map;
580 rtx loc, copy;
581{
582 if ((GET_CODE (copy) != REG && GET_CODE (copy) != SUBREG)
583 || (GET_CODE (copy) == REG && REG_USERVAR_P (loc)
584 && ! REG_USERVAR_P (copy))
585 || (GET_CODE (copy) == REG
586 && REGNO (copy) < FIRST_PSEUDO_REGISTER))
587 {
588 rtx temp = copy_to_mode_reg (GET_MODE (loc), copy);
589 REG_USERVAR_P (temp) = REG_USERVAR_P (loc);
c68da89c
KR
590 if (CONSTANT_P (copy) || FIXED_BASE_PLUS_P (copy))
591 SET_CONST_EQUIV_DATA (map, temp, copy, CONST_AGE_PARM);
a4c3ddd8
BS
592 copy = temp;
593 }
594 map->reg_map[REGNO (loc)] = copy;
595}
e6cfb550 596
a97901e6
MM
597/* Compare two BLOCKs for qsort. The key we sort on is the
598 BLOCK_ABSTRACT_ORIGIN of the blocks. */
599
600static int
601compare_blocks (v1, v2)
602 const PTR v1;
603 const PTR v2;
604{
47ee9bcb
KG
605 tree b1 = *((const tree *) v1);
606 tree b2 = *((const tree *) v2);
a97901e6 607
00174bdf 608 return ((char *) BLOCK_ABSTRACT_ORIGIN (b1)
a97901e6
MM
609 - (char *) BLOCK_ABSTRACT_ORIGIN (b2));
610}
611
612/* Compare two BLOCKs for bsearch. The first pointer corresponds to
613 an original block; the second to a remapped equivalent. */
614
615static int
616find_block (v1, v2)
617 const PTR v1;
618 const PTR v2;
619{
47ee9bcb
KG
620 const union tree_node *b1 = (const union tree_node *) v1;
621 tree b2 = *((const tree *) v2);
a97901e6 622
47ee9bcb 623 return ((const char *) b1 - (char *) BLOCK_ABSTRACT_ORIGIN (b2));
a97901e6
MM
624}
625
175160e7
MT
626/* Integrate the procedure defined by FNDECL. Note that this function
627 may wind up calling itself. Since the static variables are not
628 reentrant, we do not assign them until after the possibility
bfa30b22 629 of recursion is eliminated.
175160e7
MT
630
631 If IGNORE is nonzero, do not produce a value.
632 Otherwise store the value in TARGET if it is nonzero and that is convenient.
633
634 Value is:
635 (rtx)-1 if we could not substitute the function
636 0 if we substituted it and it does not produce a value
637 else an rtx for where the value is stored. */
638
639rtx
12307ca2
RK
640expand_inline_function (fndecl, parms, target, ignore, type,
641 structure_value_addr)
175160e7
MT
642 tree fndecl, parms;
643 rtx target;
644 int ignore;
645 tree type;
646 rtx structure_value_addr;
647{
36edd3cc 648 struct function *inlining_previous;
49ad7cfa 649 struct function *inl_f = DECL_SAVED_INSNS (fndecl);
81578142 650 tree formal, actual, block;
36edd3cc 651 rtx parm_insns = inl_f->emit->x_first_insn;
49ad7cfa
BS
652 rtx insns = (inl_f->inl_last_parm_insn
653 ? NEXT_INSN (inl_f->inl_last_parm_insn)
654 : parm_insns);
175160e7
MT
655 tree *arg_trees;
656 rtx *arg_vals;
175160e7 657 int max_regno;
b3694847 658 int i;
36edd3cc 659 int min_labelno = inl_f->emit->x_first_label_num;
49ad7cfa 660 int max_labelno = inl_f->inl_max_label_num;
175160e7 661 int nargs;
175160e7 662 rtx loc;
2132517d 663 rtx stack_save = 0;
175160e7 664 rtx temp;
c68da89c 665 struct inline_remap *map = 0;
49ad7cfa 666 rtvec arg_vector = (rtvec) inl_f->original_arg_vector;
a6dd1cb6 667 rtx static_chain_value = 0;
49ad7cfa 668 int inl_max_uid;
52a11cbf 669 int eh_region_offset;
175160e7 670
253a01b4
JL
671 /* The pointer used to track the true location of the memory used
672 for MAP->LABEL_MAP. */
673 rtx *real_label_map = 0;
674
175160e7 675 /* Allow for equivalences of the pseudos we make for virtual fp and ap. */
36edd3cc 676 max_regno = inl_f->emit->x_reg_rtx_no + 3;
175160e7
MT
677 if (max_regno < FIRST_PSEUDO_REGISTER)
678 abort ();
679
ecff20d4
JM
680 /* Pull out the decl for the function definition; fndecl may be a
681 local declaration, which would break DECL_ABSTRACT_ORIGIN. */
682 fndecl = inl_f->decl;
683
175160e7
MT
684 nargs = list_length (DECL_ARGUMENTS (fndecl));
685
c2f8b491
JH
686 if (cfun->preferred_stack_boundary < inl_f->preferred_stack_boundary)
687 cfun->preferred_stack_boundary = inl_f->preferred_stack_boundary;
688
2d8d0db8
RK
689 /* Check that the parms type match and that sufficient arguments were
690 passed. Since the appropriate conversions or default promotions have
691 already been applied, the machine modes should match exactly. */
692
12307ca2 693 for (formal = DECL_ARGUMENTS (fndecl), actual = parms;
175160e7 694 formal;
12307ca2 695 formal = TREE_CHAIN (formal), actual = TREE_CHAIN (actual))
175160e7 696 {
2d8d0db8
RK
697 tree arg;
698 enum machine_mode mode;
699
700 if (actual == 0)
60e8b9f0 701 return (rtx) (size_t) -1;
2d8d0db8
RK
702
703 arg = TREE_VALUE (actual);
12307ca2 704 mode = TYPE_MODE (DECL_ARG_TYPE (formal));
2d8d0db8 705
3b07c79b
JJ
706 if (arg == error_mark_node
707 || mode != TYPE_MODE (TREE_TYPE (arg))
2d8d0db8
RK
708 /* If they are block mode, the types should match exactly.
709 They don't match exactly if TREE_TYPE (FORMAL) == ERROR_MARK_NODE,
710 which could happen if the parameter has incomplete type. */
d80db03d
RK
711 || (mode == BLKmode
712 && (TYPE_MAIN_VARIANT (TREE_TYPE (arg))
713 != TYPE_MAIN_VARIANT (TREE_TYPE (formal)))))
60e8b9f0 714 return (rtx) (size_t) -1;
175160e7
MT
715 }
716
2d8d0db8
RK
717 /* Extra arguments are valid, but will be ignored below, so we must
718 evaluate them here for side-effects. */
719 for (; actual; actual = TREE_CHAIN (actual))
720 expand_expr (TREE_VALUE (actual), const0_rtx,
721 TYPE_MODE (TREE_TYPE (TREE_VALUE (actual))), 0);
722
175160e7
MT
723 /* Expand the function arguments. Do this first so that any
724 new registers get created before we allocate the maps. */
725
67289ea6
MM
726 arg_vals = (rtx *) xmalloc (nargs * sizeof (rtx));
727 arg_trees = (tree *) xmalloc (nargs * sizeof (tree));
175160e7
MT
728
729 for (formal = DECL_ARGUMENTS (fndecl), actual = parms, i = 0;
730 formal;
731 formal = TREE_CHAIN (formal), actual = TREE_CHAIN (actual), i++)
732 {
733 /* Actual parameter, converted to the type of the argument within the
734 function. */
735 tree arg = convert (TREE_TYPE (formal), TREE_VALUE (actual));
736 /* Mode of the variable used within the function. */
737 enum machine_mode mode = TYPE_MODE (TREE_TYPE (formal));
9175051c 738 int invisiref = 0;
175160e7 739
175160e7
MT
740 arg_trees[i] = arg;
741 loc = RTVEC_ELT (arg_vector, i);
742
743 /* If this is an object passed by invisible reference, we copy the
744 object into a stack slot and save its address. If this will go
745 into memory, we do nothing now. Otherwise, we just expand the
746 argument. */
747 if (GET_CODE (loc) == MEM && GET_CODE (XEXP (loc, 0)) == REG
748 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER)
749 {
1da68f56 750 rtx stack_slot = assign_temp (TREE_TYPE (arg), 1, 1, 1);
175160e7
MT
751
752 store_expr (arg, stack_slot, 0);
175160e7 753 arg_vals[i] = XEXP (stack_slot, 0);
9175051c 754 invisiref = 1;
175160e7
MT
755 }
756 else if (GET_CODE (loc) != MEM)
36aa0bf5
RK
757 {
758 if (GET_MODE (loc) != TYPE_MODE (TREE_TYPE (arg)))
69107307
AO
759 {
760 int unsignedp = TREE_UNSIGNED (TREE_TYPE (formal));
761 enum machine_mode pmode = TYPE_MODE (TREE_TYPE (formal));
762
763 pmode = promote_mode (TREE_TYPE (formal), pmode,
764 &unsignedp, 0);
765
766 if (GET_MODE (loc) != pmode)
767 abort ();
768
769 /* The mode if LOC and ARG can differ if LOC was a variable
770 that had its mode promoted via PROMOTED_MODE. */
771 arg_vals[i] = convert_modes (pmode,
772 TYPE_MODE (TREE_TYPE (arg)),
773 expand_expr (arg, NULL_RTX, mode,
774 EXPAND_SUM),
775 unsignedp);
776 }
36aa0bf5
RK
777 else
778 arg_vals[i] = expand_expr (arg, NULL_RTX, mode, EXPAND_SUM);
779 }
175160e7
MT
780 else
781 arg_vals[i] = 0;
782
783 if (arg_vals[i] != 0
784 && (! TREE_READONLY (formal)
785 /* If the parameter is not read-only, copy our argument through
786 a register. Also, we cannot use ARG_VALS[I] if it overlaps
787 TARGET in any way. In the inline function, they will likely
788 be two different pseudos, and `safe_from_p' will make all
789 sorts of smart assumptions about their not conflicting.
790 But if ARG_VALS[I] overlaps TARGET, these assumptions are
9175051c
JM
791 wrong, so put ARG_VALS[I] into a fresh register.
792 Don't worry about invisible references, since their stack
793 temps will never overlap the target. */
175160e7 794 || (target != 0
9175051c 795 && ! invisiref
3eda169f
RK
796 && (GET_CODE (arg_vals[i]) == REG
797 || GET_CODE (arg_vals[i]) == SUBREG
798 || GET_CODE (arg_vals[i]) == MEM)
30caed6d
RS
799 && reg_overlap_mentioned_p (arg_vals[i], target))
800 /* ??? We must always copy a SUBREG into a REG, because it might
801 get substituted into an address, and not all ports correctly
802 handle SUBREGs in addresses. */
803 || (GET_CODE (arg_vals[i]) == SUBREG)))
4b7cb39e 804 arg_vals[i] = copy_to_mode_reg (GET_MODE (loc), arg_vals[i]);
12307ca2
RK
805
806 if (arg_vals[i] != 0 && GET_CODE (arg_vals[i]) == REG
e5e809f4 807 && POINTER_TYPE_P (TREE_TYPE (formal)))
12307ca2 808 mark_reg_pointer (arg_vals[i],
bdb429a5 809 TYPE_ALIGN (TREE_TYPE (TREE_TYPE (formal))));
175160e7 810 }
00174bdf 811
175160e7
MT
812 /* Allocate the structures we use to remap things. */
813
c826ae21 814 map = (struct inline_remap *) xcalloc (1, sizeof (struct inline_remap));
175160e7
MT
815 map->fndecl = fndecl;
816
a97901e6 817 VARRAY_TREE_INIT (map->block_map, 10, "block_map");
67289ea6 818 map->reg_map = (rtx *) xcalloc (max_regno, sizeof (rtx));
175160e7 819
3bb1329e
BK
820 /* We used to use alloca here, but the size of what it would try to
821 allocate would occasionally cause it to exceed the stack limit and
822 cause unpredictable core dumps. */
253a01b4
JL
823 real_label_map
824 = (rtx *) xmalloc ((max_labelno) * sizeof (rtx));
825 map->label_map = real_label_map;
464186fb 826 map->local_return_label = NULL_RTX;
175160e7 827
36edd3cc 828 inl_max_uid = (inl_f->emit->x_cur_insn_uid + 1);
67289ea6 829 map->insn_map = (rtx *) xcalloc (inl_max_uid, sizeof (rtx));
175160e7 830 map->min_insnno = 0;
49ad7cfa 831 map->max_insnno = inl_max_uid;
175160e7 832
a70f7bb2 833 map->integrating = 1;
96e60f0c
JJ
834 map->compare_src = NULL_RTX;
835 map->compare_mode = VOIDmode;
a70f7bb2 836
c68da89c
KR
837 /* const_equiv_varray maps pseudos in our routine to constants, so
838 it needs to be large enough for all our pseudos. This is the
839 number we are currently using plus the number in the called
840 routine, plus 15 for each arg, five to compute the virtual frame
841 pointer, and five for the return value. This should be enough
842 for most cases. We do not reference entries outside the range of
843 the map.
c66e0741
RK
844
845 ??? These numbers are quite arbitrary and were obtained by
846 experimentation. At some point, we should try to allocate the
847 table after all the parameters are set up so we an more accurately
848 estimate the number of pseudos we will need. */
849
c68da89c
KR
850 VARRAY_CONST_EQUIV_INIT (map->const_equiv_varray,
851 (max_reg_num ()
852 + (max_regno - FIRST_PSEUDO_REGISTER)
853 + 15 * nargs
854 + 10),
855 "expand_inline_function");
175160e7
MT
856 map->const_age = 0;
857
858 /* Record the current insn in case we have to set up pointers to frame
3ba10494
AS
859 and argument memory blocks. If there are no insns yet, add a dummy
860 insn that can be used as an insertion point. */
175160e7 861 map->insns_at_start = get_last_insn ();
e9a25f70 862 if (map->insns_at_start == 0)
6496a589 863 map->insns_at_start = emit_note (NULL, NOTE_INSN_DELETED);
175160e7 864
36edd3cc 865 map->regno_pointer_align = inl_f->emit->regno_pointer_align;
3502dc9c 866 map->x_regno_reg_rtx = inl_f->emit->x_regno_reg_rtx;
12307ca2 867
175160e7
MT
868 /* Update the outgoing argument size to allow for those in the inlined
869 function. */
49ad7cfa
BS
870 if (inl_f->outgoing_args_size > current_function_outgoing_args_size)
871 current_function_outgoing_args_size = inl_f->outgoing_args_size;
175160e7
MT
872
873 /* If the inline function needs to make PIC references, that means
874 that this function's PIC offset table must be used. */
49ad7cfa 875 if (inl_f->uses_pic_offset_table)
175160e7
MT
876 current_function_uses_pic_offset_table = 1;
877
a6dd1cb6 878 /* If this function needs a context, set it up. */
49ad7cfa 879 if (inl_f->needs_context)
a6dd1cb6
RK
880 static_chain_value = lookup_static_chain (fndecl);
881
1c1f2d29
JM
882 if (GET_CODE (parm_insns) == NOTE
883 && NOTE_LINE_NUMBER (parm_insns) > 0)
884 {
885 rtx note = emit_note (NOTE_SOURCE_FILE (parm_insns),
886 NOTE_LINE_NUMBER (parm_insns));
887 if (note)
888 RTX_INTEGRATED_P (note) = 1;
889 }
890
175160e7
MT
891 /* Process each argument. For each, set up things so that the function's
892 reference to the argument will refer to the argument being passed.
893 We only replace REG with REG here. Any simplifications are done
894 via const_equiv_map.
895
896 We make two passes: In the first, we deal with parameters that will
897 be placed into registers, since we need to ensure that the allocated
898 register number fits in const_equiv_map. Then we store all non-register
899 parameters into their memory location. */
900
fd28789a
RS
901 /* Don't try to free temp stack slots here, because we may put one of the
902 parameters into a temp stack slot. */
903
175160e7
MT
904 for (i = 0; i < nargs; i++)
905 {
906 rtx copy = arg_vals[i];
907
908 loc = RTVEC_ELT (arg_vector, i);
909
910 /* There are three cases, each handled separately. */
911 if (GET_CODE (loc) == MEM && GET_CODE (XEXP (loc, 0)) == REG
912 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER)
913 {
914 /* This must be an object passed by invisible reference (it could
915 also be a variable-sized object, but we forbid inlining functions
916 with variable-sized arguments). COPY is the address of the
917 actual value (this computation will cause it to be copied). We
918 map that address for the register, noting the actual address as
919 an equivalent in case it can be substituted into the insns. */
920
921 if (GET_CODE (copy) != REG)
922 {
923 temp = copy_addr_to_reg (copy);
c68da89c
KR
924 if (CONSTANT_P (copy) || FIXED_BASE_PLUS_P (copy))
925 SET_CONST_EQUIV_DATA (map, temp, copy, CONST_AGE_PARM);
175160e7
MT
926 copy = temp;
927 }
928 map->reg_map[REGNO (XEXP (loc, 0))] = copy;
929 }
930 else if (GET_CODE (loc) == MEM)
931 {
14a774a9
RK
932 /* This is the case of a parameter that lives in memory. It
933 will live in the block we allocate in the called routine's
175160e7 934 frame that simulates the incoming argument area. Do nothing
14a774a9
RK
935 with the parameter now; we will call store_expr later. In
936 this case, however, we must ensure that the virtual stack and
937 incoming arg rtx values are expanded now so that we can be
938 sure we have enough slots in the const equiv map since the
939 store_expr call can easily blow the size estimate. */
14a774a9
RK
940 if (DECL_SAVED_INSNS (fndecl)->args_size != 0)
941 copy_rtx_and_substitute (virtual_incoming_args_rtx, map, 0);
175160e7
MT
942 }
943 else if (GET_CODE (loc) == REG)
a4c3ddd8 944 process_reg_param (map, loc, copy);
bc2eeab2
RS
945 else if (GET_CODE (loc) == CONCAT)
946 {
bc2eeab2
RS
947 rtx locreal = gen_realpart (GET_MODE (XEXP (loc, 0)), loc);
948 rtx locimag = gen_imagpart (GET_MODE (XEXP (loc, 0)), loc);
949 rtx copyreal = gen_realpart (GET_MODE (locreal), copy);
950 rtx copyimag = gen_imagpart (GET_MODE (locimag), copy);
951
a4c3ddd8
BS
952 process_reg_param (map, locreal, copyreal);
953 process_reg_param (map, locimag, copyimag);
bc2eeab2 954 }
175160e7
MT
955 else
956 abort ();
175160e7
MT
957 }
958
36edd3cc
BS
959 /* Tell copy_rtx_and_substitute to handle constant pool SYMBOL_REFs
960 specially. This function can be called recursively, so we need to
961 save the previous value. */
962 inlining_previous = inlining;
963 inlining = inl_f;
964
175160e7
MT
965 /* Now do the parameters that will be placed in memory. */
966
967 for (formal = DECL_ARGUMENTS (fndecl), i = 0;
968 formal; formal = TREE_CHAIN (formal), i++)
969 {
175160e7
MT
970 loc = RTVEC_ELT (arg_vector, i);
971
972 if (GET_CODE (loc) == MEM
973 /* Exclude case handled above. */
974 && ! (GET_CODE (XEXP (loc, 0)) == REG
975 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER))
976 {
cdd6e2db
TW
977 rtx note = emit_note (DECL_SOURCE_FILE (formal),
978 DECL_SOURCE_LINE (formal));
979 if (note)
980 RTX_INTEGRATED_P (note) = 1;
175160e7
MT
981
982 /* Compute the address in the area we reserved and store the
983 value there. */
14a774a9
RK
984 temp = copy_rtx_and_substitute (loc, map, 1);
985 subst_constants (&temp, NULL_RTX, map, 1);
175160e7
MT
986 apply_change_group ();
987 if (! memory_address_p (GET_MODE (temp), XEXP (temp, 0)))
988 temp = change_address (temp, VOIDmode, XEXP (temp, 0));
989 store_expr (arg_trees[i], temp, 0);
175160e7
MT
990 }
991 }
992
993 /* Deal with the places that the function puts its result.
994 We are driven by what is placed into DECL_RESULT.
995
996 Initially, we assume that we don't have anything special handling for
997 REG_FUNCTION_RETURN_VALUE_P. */
998
999 map->inline_target = 0;
19e7881c
MM
1000 loc = (DECL_RTL_SET_P (DECL_RESULT (fndecl))
1001 ? DECL_RTL (DECL_RESULT (fndecl)) : NULL_RTX);
58a2f534 1002
175160e7
MT
1003 if (TYPE_MODE (type) == VOIDmode)
1004 /* There is no return value to worry about. */
1005 ;
1006 else if (GET_CODE (loc) == MEM)
1007 {
58a2f534
RH
1008 if (GET_CODE (XEXP (loc, 0)) == ADDRESSOF)
1009 {
14a774a9
RK
1010 temp = copy_rtx_and_substitute (loc, map, 1);
1011 subst_constants (&temp, NULL_RTX, map, 1);
58a2f534
RH
1012 apply_change_group ();
1013 target = temp;
1014 }
1015 else
1016 {
1017 if (! structure_value_addr
1018 || ! aggregate_value_p (DECL_RESULT (fndecl)))
1019 abort ();
00174bdf 1020
58a2f534
RH
1021 /* Pass the function the address in which to return a structure
1022 value. Note that a constructor can cause someone to call us
1023 with STRUCTURE_VALUE_ADDR, but the initialization takes place
1024 via the first parameter, rather than the struct return address.
175160e7 1025
58a2f534
RH
1026 We have two cases: If the address is a simple register
1027 indirect, use the mapping mechanism to point that register to
1028 our structure return address. Otherwise, store the structure
1029 return value into the place that it will be referenced from. */
175160e7 1030
58a2f534 1031 if (GET_CODE (XEXP (loc, 0)) == REG)
175160e7 1032 {
58a2f534
RH
1033 temp = force_operand (structure_value_addr, NULL_RTX);
1034 temp = force_reg (Pmode, temp);
e2a5f96b
R
1035 /* A virtual register might be invalid in an insn, because
1036 it can cause trouble in reload. Since we don't have access
1037 to the expanders at map translation time, make sure we have
1038 a proper register now.
1039 If a virtual register is actually valid, cse or combine
1040 can put it into the mapped insns. */
1041 if (REGNO (temp) >= FIRST_VIRTUAL_REGISTER
1042 && REGNO (temp) <= LAST_VIRTUAL_REGISTER)
1043 temp = copy_to_mode_reg (Pmode, temp);
58a2f534
RH
1044 map->reg_map[REGNO (XEXP (loc, 0))] = temp;
1045
c68da89c
KR
1046 if (CONSTANT_P (structure_value_addr)
1047 || GET_CODE (structure_value_addr) == ADDRESSOF
1048 || (GET_CODE (structure_value_addr) == PLUS
1049 && (XEXP (structure_value_addr, 0)
1050 == virtual_stack_vars_rtx)
1051 && (GET_CODE (XEXP (structure_value_addr, 1))
1052 == CONST_INT)))
58a2f534 1053 {
c68da89c
KR
1054 SET_CONST_EQUIV_DATA (map, temp, structure_value_addr,
1055 CONST_AGE_PARM);
58a2f534
RH
1056 }
1057 }
1058 else
1059 {
14a774a9
RK
1060 temp = copy_rtx_and_substitute (loc, map, 1);
1061 subst_constants (&temp, NULL_RTX, map, 0);
58a2f534
RH
1062 apply_change_group ();
1063 emit_move_insn (temp, structure_value_addr);
175160e7 1064 }
175160e7
MT
1065 }
1066 }
1067 else if (ignore)
1068 /* We will ignore the result value, so don't look at its structure.
1069 Note that preparations for an aggregate return value
1070 do need to be made (above) even if it will be ignored. */
1071 ;
1072 else if (GET_CODE (loc) == REG)
1073 {
1074 /* The function returns an object in a register and we use the return
1075 value. Set up our target for remapping. */
1076
6d2f8887 1077 /* Machine mode function was declared to return. */
175160e7
MT
1078 enum machine_mode departing_mode = TYPE_MODE (type);
1079 /* (Possibly wider) machine mode it actually computes
3ff2293f
BK
1080 (for the sake of callers that fail to declare it right).
1081 We have to use the mode of the result's RTL, rather than
1082 its type, since expand_function_start may have promoted it. */
60da674b
RH
1083 enum machine_mode arriving_mode
1084 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
175160e7
MT
1085 rtx reg_to_map;
1086
1087 /* Don't use MEMs as direct targets because on some machines
1088 substituting a MEM for a REG makes invalid insns.
1089 Let the combiner substitute the MEM if that is valid. */
1090 if (target == 0 || GET_CODE (target) != REG
1091 || GET_MODE (target) != departing_mode)
c36fce9a
GRK
1092 {
1093 /* Don't make BLKmode registers. If this looks like
1094 a BLKmode object being returned in a register, get
00174bdf 1095 the mode from that, otherwise abort. */
c36fce9a
GRK
1096 if (departing_mode == BLKmode)
1097 {
60da674b
RH
1098 if (REG == GET_CODE (DECL_RTL (DECL_RESULT (fndecl))))
1099 {
1100 departing_mode = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
1101 arriving_mode = departing_mode;
1102 }
1103 else
00174bdf 1104 abort ();
c36fce9a 1105 }
00174bdf
KH
1106
1107 target = gen_reg_rtx (departing_mode);
c36fce9a 1108 }
175160e7
MT
1109
1110 /* If function's value was promoted before return,
1111 avoid machine mode mismatch when we substitute INLINE_TARGET.
1112 But TARGET is what we will return to the caller. */
1113 if (arriving_mode != departing_mode)
2d0bd5fd
RK
1114 {
1115 /* Avoid creating a paradoxical subreg wider than
1116 BITS_PER_WORD, since that is illegal. */
1117 if (GET_MODE_BITSIZE (arriving_mode) > BITS_PER_WORD)
1118 {
1119 if (!TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (departing_mode),
1120 GET_MODE_BITSIZE (arriving_mode)))
1121 /* Maybe could be handled by using convert_move () ? */
1122 abort ();
1123 reg_to_map = gen_reg_rtx (arriving_mode);
1124 target = gen_lowpart (departing_mode, reg_to_map);
1125 }
1126 else
38a448ca 1127 reg_to_map = gen_rtx_SUBREG (arriving_mode, target, 0);
2d0bd5fd 1128 }
175160e7
MT
1129 else
1130 reg_to_map = target;
1131
1132 /* Usually, the result value is the machine's return register.
1133 Sometimes it may be a pseudo. Handle both cases. */
1134 if (REG_FUNCTION_VALUE_P (loc))
1135 map->inline_target = reg_to_map;
1136 else
1137 map->reg_map[REGNO (loc)] = reg_to_map;
1138 }
9688f9ad
RH
1139 else if (GET_CODE (loc) == CONCAT)
1140 {
1141 enum machine_mode departing_mode = TYPE_MODE (type);
1142 enum machine_mode arriving_mode
1143 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
1144
1145 if (departing_mode != arriving_mode)
1146 abort ();
1147 if (GET_CODE (XEXP (loc, 0)) != REG
1148 || GET_CODE (XEXP (loc, 1)) != REG)
1149 abort ();
1150
1151 /* Don't use MEMs as direct targets because on some machines
1152 substituting a MEM for a REG makes invalid insns.
1153 Let the combiner substitute the MEM if that is valid. */
1154 if (target == 0 || GET_CODE (target) != REG
1155 || GET_MODE (target) != departing_mode)
1156 target = gen_reg_rtx (departing_mode);
1157
1158 if (GET_CODE (target) != CONCAT)
1159 abort ();
1160
1161 map->reg_map[REGNO (XEXP (loc, 0))] = XEXP (target, 0);
1162 map->reg_map[REGNO (XEXP (loc, 1))] = XEXP (target, 1);
1163 }
64ed0f40
JW
1164 else
1165 abort ();
175160e7 1166
86c99549
RH
1167 /* Remap the exception handler data pointer from one to the other. */
1168 temp = get_exception_pointer (inl_f);
1169 if (temp)
1170 map->reg_map[REGNO (temp)] = get_exception_pointer (cfun);
1171
e5e809f4
JL
1172 /* Initialize label_map. get_label_from_map will actually make
1173 the labels. */
961192e1 1174 memset ((char *) &map->label_map[min_labelno], 0,
e5e809f4 1175 (max_labelno - min_labelno) * sizeof (rtx));
175160e7 1176
a97901e6
MM
1177 /* Make copies of the decls of the symbols in the inline function, so that
1178 the copies of the variables get declared in the current function. Set
1179 up things so that lookup_static_chain knows that to interpret registers
1180 in SAVE_EXPRs for TYPE_SIZEs as local. */
1181 inline_function_decl = fndecl;
1182 integrate_parm_decls (DECL_ARGUMENTS (fndecl), map, arg_vector);
1183 block = integrate_decl_tree (inl_f->original_decl_initial, map);
1184 BLOCK_ABSTRACT_ORIGIN (block) = DECL_ORIGIN (fndecl);
1185 inline_function_decl = 0;
1186
1187 /* Make a fresh binding contour that we can easily remove. Do this after
1188 expanding our arguments so cleanups are properly scoped. */
1189 expand_start_bindings_and_block (0, block);
1190
1191 /* Sort the block-map so that it will be easy to find remapped
1192 blocks later. */
00174bdf 1193 qsort (&VARRAY_TREE (map->block_map, 0),
a97901e6
MM
1194 map->block_map->elements_used,
1195 sizeof (tree),
1196 compare_blocks);
1197
175160e7
MT
1198 /* Perform postincrements before actually calling the function. */
1199 emit_queue ();
1200
1201 /* Clean up stack so that variables might have smaller offsets. */
1202 do_pending_stack_adjust ();
1203
c68da89c
KR
1204 /* Save a copy of the location of const_equiv_varray for
1205 mark_stores, called via note_stores. */
1206 global_const_equiv_varray = map->const_equiv_varray;
175160e7 1207
136cf361
RK
1208 /* If the called function does an alloca, save and restore the
1209 stack pointer around the call. This saves stack space, but
2132517d
RK
1210 also is required if this inline is being done between two
1211 pushes. */
49ad7cfa 1212 if (inl_f->calls_alloca)
2132517d
RK
1213 emit_stack_save (SAVE_BLOCK, &stack_save, NULL_RTX);
1214
c0e7830f
DD
1215 /* Map pseudos used for initial hard reg values. */
1216 setup_initial_hard_reg_value_integration (inl_f, map);
1217
0a1c58a2
JL
1218 /* Now copy the insns one by one. */
1219 copy_insn_list (insns, map, static_chain_value);
1220
52a11cbf
RH
1221 /* Duplicate the EH regions. This will create an offset from the
1222 region numbers in the function we're inlining to the region
1223 numbers in the calling function. This must wait until after
1224 copy_insn_list, as we need the insn map to be complete. */
1225 eh_region_offset = duplicate_eh_regions (inl_f, map);
1226
464186fb 1227 /* Now copy the REG_NOTES for those insns. */
52a11cbf 1228 copy_insn_notes (insns, map, eh_region_offset);
464186fb
RH
1229
1230 /* If the insn sequence required one, emit the return label. */
1231 if (map->local_return_label)
1232 emit_label (map->local_return_label);
1233
0a1c58a2
JL
1234 /* Restore the stack pointer if we saved it above. */
1235 if (inl_f->calls_alloca)
1236 emit_stack_restore (SAVE_BLOCK, stack_save, NULL_RTX);
1237
1238 if (! cfun->x_whole_function_mode_p)
1239 /* In statement-at-a-time mode, we just tell the front-end to add
1240 this block to the list of blocks at this binding level. We
1241 can't do it the way it's done for function-at-a-time mode the
1242 superblocks have not been created yet. */
1243 insert_block (block);
1244 else
1245 {
00174bdf 1246 BLOCK_CHAIN (block)
0a1c58a2
JL
1247 = BLOCK_CHAIN (DECL_INITIAL (current_function_decl));
1248 BLOCK_CHAIN (DECL_INITIAL (current_function_decl)) = block;
1249 }
1250
1251 /* End the scope containing the copied formal parameter variables
1252 and copied LABEL_DECLs. We pass NULL_TREE for the variables list
1253 here so that expand_end_bindings will not check for unused
1254 variables. That's already been checked for when the inlined
1255 function was defined. */
1256 expand_end_bindings (NULL_TREE, 1, 1);
1257
1258 /* Must mark the line number note after inlined functions as a repeat, so
1259 that the test coverage code can avoid counting the call twice. This
1260 just tells the code to ignore the immediately following line note, since
1261 there already exists a copy of this note before the expanded inline call.
1262 This line number note is still needed for debugging though, so we can't
1263 delete it. */
1264 if (flag_test_coverage)
b3b42a4d 1265 emit_note (0, NOTE_INSN_REPEATED_LINE_NUMBER);
0a1c58a2
JL
1266
1267 emit_line_note (input_filename, lineno);
1268
1269 /* If the function returns a BLKmode object in a register, copy it
00174bdf
KH
1270 out of the temp register into a BLKmode memory object. */
1271 if (target
0a1c58a2
JL
1272 && TYPE_MODE (TREE_TYPE (TREE_TYPE (fndecl))) == BLKmode
1273 && ! aggregate_value_p (TREE_TYPE (TREE_TYPE (fndecl))))
1274 target = copy_blkmode_from_reg (0, target, TREE_TYPE (TREE_TYPE (fndecl)));
00174bdf 1275
0a1c58a2
JL
1276 if (structure_value_addr)
1277 {
1278 target = gen_rtx_MEM (TYPE_MODE (type),
1279 memory_address (TYPE_MODE (type),
1280 structure_value_addr));
289c5b45 1281 set_mem_attributes (target, type, 1);
0a1c58a2
JL
1282 }
1283
1284 /* Make sure we free the things we explicitly allocated with xmalloc. */
1285 if (real_label_map)
1286 free (real_label_map);
1287 VARRAY_FREE (map->const_equiv_varray);
1288 free (map->reg_map);
1289 VARRAY_FREE (map->block_map);
1290 free (map->insn_map);
1291 free (map);
1292 free (arg_vals);
1293 free (arg_trees);
1294
1295 inlining = inlining_previous;
1296
1297 return target;
1298}
1299
1300/* Make copies of each insn in the given list using the mapping
1301 computed in expand_inline_function. This function may call itself for
1302 insns containing sequences.
00174bdf 1303
f93dacbd 1304 Copying is done in two passes, first the insns and then their REG_NOTES.
0a1c58a2
JL
1305
1306 If static_chain_value is non-zero, it represents the context-pointer
00174bdf 1307 register for the function. */
0a1c58a2
JL
1308
1309static void
1310copy_insn_list (insns, map, static_chain_value)
00174bdf
KH
1311 rtx insns;
1312 struct inline_remap *map;
1313 rtx static_chain_value;
0a1c58a2 1314{
b3694847 1315 int i;
0a1c58a2
JL
1316 rtx insn;
1317 rtx temp;
0a1c58a2
JL
1318#ifdef HAVE_cc0
1319 rtx cc0_insn = 0;
1320#endif
03984308 1321 rtx static_chain_mem = 0;
0a1c58a2
JL
1322
1323 /* Copy the insns one by one. Do this in two passes, first the insns and
f93dacbd 1324 then their REG_NOTES. */
175160e7
MT
1325
1326 /* This loop is very similar to the loop in copy_loop_body in unroll.c. */
1327
1328 for (insn = insns; insn; insn = NEXT_INSN (insn))
1329 {
c9734bb9 1330 rtx copy, pattern, set;
175160e7
MT
1331
1332 map->orig_asm_operands_vector = 0;
1333
1334 switch (GET_CODE (insn))
1335 {
1336 case INSN:
1337 pattern = PATTERN (insn);
c9734bb9 1338 set = single_set (insn);
175160e7 1339 copy = 0;
c13fde05
RH
1340 if (GET_CODE (pattern) == USE
1341 && GET_CODE (XEXP (pattern, 0)) == REG
1342 && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1343 /* The (USE (REG n)) at return from the function should
1344 be ignored since we are changing (REG n) into
1345 inline_target. */
1346 break;
175160e7
MT
1347
1348 /* Ignore setting a function value that we don't want to use. */
1349 if (map->inline_target == 0
c9734bb9
RK
1350 && set != 0
1351 && GET_CODE (SET_DEST (set)) == REG
1352 && REG_FUNCTION_VALUE_P (SET_DEST (set)))
5cd76fcd 1353 {
c9734bb9 1354 if (volatile_refs_p (SET_SRC (set)))
5cd76fcd 1355 {
c9734bb9
RK
1356 rtx new_set;
1357
5cd76fcd
RS
1358 /* If we must not delete the source,
1359 load it into a new temporary. */
14a774a9 1360 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
c9734bb9
RK
1361
1362 new_set = single_set (copy);
1363 if (new_set == 0)
1364 abort ();
1365
1366 SET_DEST (new_set)
1367 = gen_reg_rtx (GET_MODE (SET_DEST (new_set)));
5cd76fcd 1368 }
d8090d46
RK
1369 /* If the source and destination are the same and it
1370 has a note on it, keep the insn. */
1371 else if (rtx_equal_p (SET_DEST (set), SET_SRC (set))
1372 && REG_NOTES (insn) != 0)
14a774a9 1373 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
5cd76fcd
RS
1374 else
1375 break;
1376 }
c9734bb9 1377
e93eff94
DL
1378 /* Similarly if an ignored return value is clobbered. */
1379 else if (map->inline_target == 0
1380 && GET_CODE (pattern) == CLOBBER
1381 && GET_CODE (XEXP (pattern, 0)) == REG
1382 && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1383 break;
1384
03984308
BW
1385 /* Look for the address of the static chain slot. The
1386 rtx_equal_p comparisons against the
1387 static_chain_incoming_rtx below may fail if the static
1388 chain is in memory and the address specified is not
1389 "legitimate". This happens on Xtensa where the static
1390 chain is at a negative offset from argp and where only
1391 positive offsets are legitimate. When the RTL is
1392 generated, the address is "legitimized" by copying it
1393 into a register, causing the rtx_equal_p comparisons to
1394 fail. This workaround looks for code that sets a
1395 register to the address of the static chain. Subsequent
1396 memory references via that register can then be
1397 identified as static chain references. We assume that
1398 the register is only assigned once, and that the static
1399 chain address is only live in one register at a time. */
1400
c9734bb9
RK
1401 else if (static_chain_value != 0
1402 && set != 0
03984308 1403 && GET_CODE (static_chain_incoming_rtx) == MEM
c9734bb9 1404 && GET_CODE (SET_DEST (set)) == REG
03984308
BW
1405 && rtx_equal_p (SET_SRC (set),
1406 XEXP (static_chain_incoming_rtx, 0)))
1407 {
1408 static_chain_mem =
1409 gen_rtx_MEM (GET_MODE (static_chain_incoming_rtx),
1410 SET_DEST (set));
1411
1412 /* emit the instruction in case it is used for something
1413 other than setting the static chain; if it's not used,
1414 it can always be removed as dead code */
1415 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
1416 }
1417
1418 /* If this is setting the static chain rtx, omit it. */
1419 else if (static_chain_value != 0
1420 && set != 0
1421 && (rtx_equal_p (SET_DEST (set),
1422 static_chain_incoming_rtx)
1423 || (static_chain_mem
1424 && rtx_equal_p (SET_DEST (set), static_chain_mem))))
c9734bb9
RK
1425 break;
1426
a6dd1cb6
RK
1427 /* If this is setting the static chain pseudo, set it from
1428 the value we want to give it instead. */
1429 else if (static_chain_value != 0
c9734bb9 1430 && set != 0
03984308
BW
1431 && (rtx_equal_p (SET_SRC (set),
1432 static_chain_incoming_rtx)
1433 || (static_chain_mem
1434 && rtx_equal_p (SET_SRC (set), static_chain_mem))))
a6dd1cb6 1435 {
14a774a9 1436 rtx newdest = copy_rtx_and_substitute (SET_DEST (set), map, 1);
a6dd1cb6 1437
c9734bb9 1438 copy = emit_move_insn (newdest, static_chain_value);
03984308
BW
1439 if (GET_CODE (static_chain_incoming_rtx) != MEM)
1440 static_chain_value = 0;
a6dd1cb6 1441 }
14a774a9
RK
1442
1443 /* If this is setting the virtual stack vars register, this must
1444 be the code at the handler for a builtin longjmp. The value
1445 saved in the setjmp buffer will be the address of the frame
1446 we've made for this inlined instance within our frame. But we
1447 know the offset of that value so we can use it to reconstruct
1448 our virtual stack vars register from that value. If we are
1449 copying it from the stack pointer, leave it unchanged. */
1450 else if (set != 0
1451 && rtx_equal_p (SET_DEST (set), virtual_stack_vars_rtx))
1452 {
36a1fa96 1453 HOST_WIDE_INT offset;
14a774a9
RK
1454 temp = map->reg_map[REGNO (SET_DEST (set))];
1455 temp = VARRAY_CONST_EQUIV (map->const_equiv_varray,
1456 REGNO (temp)).rtx;
1457
36a1fa96
JL
1458 if (rtx_equal_p (temp, virtual_stack_vars_rtx))
1459 offset = 0;
1460 else if (GET_CODE (temp) == PLUS
1461 && rtx_equal_p (XEXP (temp, 0), virtual_stack_vars_rtx)
1462 && GET_CODE (XEXP (temp, 1)) == CONST_INT)
1463 offset = INTVAL (XEXP (temp, 1));
1464 else
14a774a9
RK
1465 abort ();
1466
1467 if (rtx_equal_p (SET_SRC (set), stack_pointer_rtx))
1468 temp = SET_SRC (set);
1469 else
36a1fa96
JL
1470 temp = force_operand (plus_constant (SET_SRC (set),
1471 - offset),
1472 NULL_RTX);
14a774a9 1473
36a1fa96 1474 copy = emit_move_insn (virtual_stack_vars_rtx, temp);
14a774a9
RK
1475 }
1476
5cd76fcd 1477 else
14a774a9 1478 copy = emit_insn (copy_rtx_and_substitute (pattern, map, 0));
175160e7
MT
1479 /* REG_NOTES will be copied later. */
1480
1481#ifdef HAVE_cc0
1482 /* If this insn is setting CC0, it may need to look at
1483 the insn that uses CC0 to see what type of insn it is.
1484 In that case, the call to recog via validate_change will
1485 fail. So don't substitute constants here. Instead,
1486 do it when we emit the following insn.
1487
1488 For example, see the pyr.md file. That machine has signed and
1489 unsigned compares. The compare patterns must check the
1490 following branch insn to see which what kind of compare to
1491 emit.
1492
1493 If the previous insn set CC0, substitute constants on it as
1494 well. */
1495 if (sets_cc0_p (PATTERN (copy)) != 0)
1496 cc0_insn = copy;
1497 else
1498 {
1499 if (cc0_insn)
1500 try_constants (cc0_insn, map);
1501 cc0_insn = 0;
1502 try_constants (copy, map);
1503 }
1504#else
1505 try_constants (copy, map);
1506#endif
1507 break;
1508
1509 case JUMP_INSN:
8cd44271 1510 if (map->integrating && returnjump_p (insn))
175160e7 1511 {
464186fb
RH
1512 if (map->local_return_label == 0)
1513 map->local_return_label = gen_label_rtx ();
1514 pattern = gen_jump (map->local_return_label);
175160e7
MT
1515 }
1516 else
14a774a9 1517 pattern = copy_rtx_and_substitute (PATTERN (insn), map, 0);
175160e7
MT
1518
1519 copy = emit_jump_insn (pattern);
1520
1521#ifdef HAVE_cc0
1522 if (cc0_insn)
1523 try_constants (cc0_insn, map);
1524 cc0_insn = 0;
1525#endif
1526 try_constants (copy, map);
1527
1528 /* If this used to be a conditional jump insn but whose branch
1529 direction is now know, we must do something special. */
7f1c097d 1530 if (any_condjump_p (insn) && onlyjump_p (insn) && map->last_pc_value)
175160e7
MT
1531 {
1532#ifdef HAVE_cc0
b30f05db 1533 /* If the previous insn set cc0 for us, delete it. */
44ce0063 1534 if (only_sets_cc0_p (PREV_INSN (copy)))
53c17031 1535 delete_related_insns (PREV_INSN (copy));
175160e7
MT
1536#endif
1537
1538 /* If this is now a no-op, delete it. */
1539 if (map->last_pc_value == pc_rtx)
1540 {
53c17031 1541 delete_related_insns (copy);
175160e7
MT
1542 copy = 0;
1543 }
1544 else
1545 /* Otherwise, this is unconditional jump so we must put a
1546 BARRIER after it. We could do some dead code elimination
1547 here, but jump.c will do it just as well. */
1548 emit_barrier ();
1549 }
1550 break;
1551
1552 case CALL_INSN:
0a1c58a2
JL
1553 /* If this is a CALL_PLACEHOLDER insn then we need to copy the
1554 three attached sequences: normal call, sibling call and tail
00174bdf 1555 recursion. */
0a1c58a2
JL
1556 if (GET_CODE (PATTERN (insn)) == CALL_PLACEHOLDER)
1557 {
1558 rtx sequence[3];
1559 rtx tail_label;
1560
1561 for (i = 0; i < 3; i++)
1562 {
1563 rtx seq;
00174bdf 1564
0a1c58a2
JL
1565 sequence[i] = NULL_RTX;
1566 seq = XEXP (PATTERN (insn), i);
1567 if (seq)
1568 {
1569 start_sequence ();
1570 copy_insn_list (seq, map, static_chain_value);
1571 sequence[i] = get_insns ();
1572 end_sequence ();
1573 }
1574 }
1575
00174bdf 1576 /* Find the new tail recursion label.
0a1c58a2
JL
1577 It will already be substituted into sequence[2]. */
1578 tail_label = copy_rtx_and_substitute (XEXP (PATTERN (insn), 3),
1579 map, 0);
1580
00174bdf
KH
1581 copy = emit_call_insn (gen_rtx_CALL_PLACEHOLDER (VOIDmode,
1582 sequence[0],
1583 sequence[1],
1584 sequence[2],
1585 tail_label));
0a1c58a2
JL
1586 break;
1587 }
1588
14a774a9 1589 pattern = copy_rtx_and_substitute (PATTERN (insn), map, 0);
175160e7
MT
1590 copy = emit_call_insn (pattern);
1591
0a1c58a2 1592 SIBLING_CALL_P (copy) = SIBLING_CALL_P (insn);
24a28584 1593 CONST_OR_PURE_CALL_P (copy) = CONST_OR_PURE_CALL_P (insn);
0a1c58a2 1594
d7e09326
RK
1595 /* Because the USAGE information potentially contains objects other
1596 than hard registers, we need to copy it. */
0a1c58a2 1597
db3cf6fb 1598 CALL_INSN_FUNCTION_USAGE (copy)
14a774a9
RK
1599 = copy_rtx_and_substitute (CALL_INSN_FUNCTION_USAGE (insn),
1600 map, 0);
d7e09326 1601
175160e7
MT
1602#ifdef HAVE_cc0
1603 if (cc0_insn)
1604 try_constants (cc0_insn, map);
1605 cc0_insn = 0;
1606#endif
1607 try_constants (copy, map);
1608
00174bdf 1609 /* Be lazy and assume CALL_INSNs clobber all hard registers. */
175160e7 1610 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
c68da89c 1611 VARRAY_CONST_EQUIV (map->const_equiv_varray, i).rtx = 0;
175160e7
MT
1612 break;
1613
1614 case CODE_LABEL:
e5e809f4
JL
1615 copy = emit_label (get_label_from_map (map,
1616 CODE_LABEL_NUMBER (insn)));
bfa30b22 1617 LABEL_NAME (copy) = LABEL_NAME (insn);
175160e7
MT
1618 map->const_age++;
1619 break;
1620
1621 case BARRIER:
1622 copy = emit_barrier ();
1623 break;
1624
1625 case NOTE:
bc8d3f91
JH
1626 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED_LABEL)
1627 {
1628 copy = emit_label (get_label_from_map (map,
1629 CODE_LABEL_NUMBER (insn)));
3bab2571 1630 LABEL_NAME (copy) = NOTE_SOURCE_FILE (insn);
bc8d3f91
JH
1631 map->const_age++;
1632 break;
1633 }
1634
00174bdf
KH
1635 /* NOTE_INSN_FUNCTION_END and NOTE_INSN_FUNCTION_BEG are
1636 discarded because it is important to have only one of
0a1c58a2
JL
1637 each in the current function.
1638
4793dca1 1639 NOTE_INSN_DELETED notes aren't useful. */
0a1c58a2 1640
175160e7
MT
1641 if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END
1642 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_BEG
4793dca1 1643 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED)
6adb4e3a 1644 {
e5e809f4
JL
1645 copy = emit_note (NOTE_SOURCE_FILE (insn),
1646 NOTE_LINE_NUMBER (insn));
1647 if (copy
52a11cbf
RH
1648 && (NOTE_LINE_NUMBER (copy) == NOTE_INSN_BLOCK_BEG
1649 || NOTE_LINE_NUMBER (copy) == NOTE_INSN_BLOCK_END)
1650 && NOTE_BLOCK (insn))
a97901e6
MM
1651 {
1652 tree *mapped_block_p;
1653
1654 mapped_block_p
00174bdf 1655 = (tree *) bsearch (NOTE_BLOCK (insn),
a97901e6
MM
1656 &VARRAY_TREE (map->block_map, 0),
1657 map->block_map->elements_used,
1658 sizeof (tree),
1659 find_block);
00174bdf 1660
a97901e6
MM
1661 if (!mapped_block_p)
1662 abort ();
1663 else
1664 NOTE_BLOCK (copy) = *mapped_block_p;
1665 }
e00c1338
RH
1666 else if (copy
1667 && NOTE_LINE_NUMBER (copy) == NOTE_INSN_EXPECTED_VALUE)
1668 NOTE_EXPECTED_VALUE (copy)
1669 = copy_rtx_and_substitute (NOTE_EXPECTED_VALUE (insn),
1670 map, 0);
6adb4e3a 1671 }
175160e7
MT
1672 else
1673 copy = 0;
1674 break;
1675
1676 default:
1677 abort ();
175160e7
MT
1678 }
1679
1680 if (copy)
1681 RTX_INTEGRATED_P (copy) = 1;
1682
1683 map->insn_map[INSN_UID (insn)] = copy;
1684 }
464186fb
RH
1685}
1686
1687/* Copy the REG_NOTES. Increment const_age, so that only constants
1688 from parameters can be substituted in. These are the only ones
1689 that are valid across the entire function. */
1690
1691static void
52a11cbf 1692copy_insn_notes (insns, map, eh_region_offset)
464186fb
RH
1693 rtx insns;
1694 struct inline_remap *map;
52a11cbf 1695 int eh_region_offset;
464186fb 1696{
8cd44271 1697 rtx insn, new_insn;
175160e7 1698
e62d14be 1699 map->const_age++;
175160e7 1700 for (insn = insns; insn; insn = NEXT_INSN (insn))
8cd44271
RH
1701 {
1702 if (! INSN_P (insn))
1703 continue;
1704
1705 new_insn = map->insn_map[INSN_UID (insn)];
1706 if (! new_insn)
1707 continue;
1708
1709 if (REG_NOTES (insn))
1710 {
1711 rtx next, note = copy_rtx_and_substitute (REG_NOTES (insn), map, 0);
1712
1713 /* We must also do subst_constants, in case one of our parameters
1714 has const type and constant value. */
1715 subst_constants (&note, NULL_RTX, map, 0);
1716 apply_change_group ();
1717 REG_NOTES (new_insn) = note;
1718
1719 /* Delete any REG_LABEL notes from the chain. Remap any
1720 REG_EH_REGION notes. */
1721 for (; note; note = next)
1722 {
1723 next = XEXP (note, 1);
1724 if (REG_NOTE_KIND (note) == REG_LABEL)
1725 remove_note (new_insn, note);
de5b49f2
RK
1726 else if (REG_NOTE_KIND (note) == REG_EH_REGION
1727 && INTVAL (XEXP (note, 0)) > 0)
52a11cbf
RH
1728 XEXP (note, 0) = GEN_INT (INTVAL (XEXP (note, 0))
1729 + eh_region_offset);
8cd44271
RH
1730 }
1731 }
1732
1733 if (GET_CODE (insn) == CALL_INSN
1734 && GET_CODE (PATTERN (insn)) == CALL_PLACEHOLDER)
1735 {
1736 int i;
1737 for (i = 0; i < 3; i++)
52a11cbf 1738 copy_insn_notes (XEXP (PATTERN (insn), i), map, eh_region_offset);
8cd44271 1739 }
52a11cbf
RH
1740
1741 if (GET_CODE (insn) == JUMP_INSN
1742 && GET_CODE (PATTERN (insn)) == RESX)
1743 XINT (PATTERN (new_insn), 0) += eh_region_offset;
8cd44271 1744 }
175160e7
MT
1745}
1746\f
1747/* Given a chain of PARM_DECLs, ARGS, copy each decl into a VAR_DECL,
1748 push all of those decls and give each one the corresponding home. */
1749
1750static void
1751integrate_parm_decls (args, map, arg_vector)
1752 tree args;
1753 struct inline_remap *map;
1754 rtvec arg_vector;
1755{
b3694847
SS
1756 tree tail;
1757 int i;
175160e7
MT
1758
1759 for (tail = args, i = 0; tail; tail = TREE_CHAIN (tail), i++)
1760 {
94755d92
MM
1761 tree decl = copy_decl_for_inlining (tail, map->fndecl,
1762 current_function_decl);
175160e7 1763 rtx new_decl_rtl
14a774a9 1764 = copy_rtx_and_substitute (RTVEC_ELT (arg_vector, i), map, 1);
175160e7 1765
a76386d8
RK
1766 /* We really should be setting DECL_INCOMING_RTL to something reasonable
1767 here, but that's going to require some more work. */
1768 /* DECL_INCOMING_RTL (decl) = ?; */
175160e7
MT
1769 /* Fully instantiate the address with the equivalent form so that the
1770 debugging information contains the actual register, instead of the
1771 virtual register. Do this by not passing an insn to
1772 subst_constants. */
14a774a9 1773 subst_constants (&new_decl_rtl, NULL_RTX, map, 1);
175160e7 1774 apply_change_group ();
19e7881c 1775 SET_DECL_RTL (decl, new_decl_rtl);
175160e7
MT
1776 }
1777}
1778
1779/* Given a BLOCK node LET, push decls and levels so as to construct in the
1780 current function a tree of contexts isomorphic to the one that is given.
1781
858a47b1 1782 MAP, if nonzero, is a pointer to an inline_remap map which indicates how
175160e7 1783 registers used in the DECL_RTL field should be remapped. If it is zero,
8ef63e62 1784 no mapping is necessary. */
175160e7 1785
21204d34
MM
1786static tree
1787integrate_decl_tree (let, map)
175160e7 1788 tree let;
175160e7 1789 struct inline_remap *map;
175160e7 1790{
21204d34
MM
1791 tree t;
1792 tree new_block;
1793 tree *next;
1794
1795 new_block = make_node (BLOCK);
a97901e6 1796 VARRAY_PUSH_TREE (map->block_map, new_block);
21204d34 1797 next = &BLOCK_VARS (new_block);
175160e7 1798
175160e7
MT
1799 for (t = BLOCK_VARS (let); t; t = TREE_CHAIN (t))
1800 {
f6bad6ff
JM
1801 tree d;
1802
94755d92 1803 d = copy_decl_for_inlining (t, map->fndecl, current_function_decl);
f6bad6ff 1804
19e7881c 1805 if (DECL_RTL_SET_P (t))
175160e7 1806 {
19e7881c
MM
1807 rtx r;
1808
1809 SET_DECL_RTL (d, copy_rtx_and_substitute (DECL_RTL (t), map, 1));
14a774a9 1810
175160e7
MT
1811 /* Fully instantiate the address with the equivalent form so that the
1812 debugging information contains the actual register, instead of the
1813 virtual register. Do this by not passing an insn to
1814 subst_constants. */
19e7881c
MM
1815 r = DECL_RTL (d);
1816 subst_constants (&r, NULL_RTX, map, 1);
1817 SET_DECL_RTL (d, r);
0d4903b8
RK
1818
1819 if (GET_CODE (r) == REG)
1820 REGNO_DECL (REGNO (r)) = d;
1821 else if (GET_CODE (r) == CONCAT)
1822 {
1823 REGNO_DECL (REGNO (XEXP (r, 0))) = d;
616051ac 1824 REGNO_DECL (REGNO (XEXP (r, 1))) = d;
0d4903b8
RK
1825 }
1826
175160e7
MT
1827 apply_change_group ();
1828 }
175160e7 1829
21204d34
MM
1830 /* Add this declaration to the list of variables in the new
1831 block. */
1832 *next = d;
1833 next = &TREE_CHAIN (d);
1834 }
175160e7 1835
21204d34
MM
1836 next = &BLOCK_SUBBLOCKS (new_block);
1837 for (t = BLOCK_SUBBLOCKS (let); t; t = BLOCK_CHAIN (t))
a84efb51
JO
1838 {
1839 *next = integrate_decl_tree (t, map);
1840 BLOCK_SUPERCONTEXT (*next) = new_block;
1841 next = &BLOCK_CHAIN (*next);
1842 }
21204d34
MM
1843
1844 TREE_USED (new_block) = TREE_USED (let);
1845 BLOCK_ABSTRACT_ORIGIN (new_block) = let;
00174bdf 1846
21204d34 1847 return new_block;
175160e7
MT
1848}
1849\f
14a774a9 1850/* Create a new copy of an rtx. Recursively copies the operands of the rtx,
175160e7
MT
1851 except for those few rtx codes that are sharable.
1852
1853 We always return an rtx that is similar to that incoming rtx, with the
1854 exception of possibly changing a REG to a SUBREG or vice versa. No
1855 rtl is ever emitted.
1856
14a774a9
RK
1857 If FOR_LHS is nonzero, if means we are processing something that will
1858 be the LHS of a SET. In that case, we copy RTX_UNCHANGING_P even if
1859 inlining since we need to be conservative in how it is set for
1860 such cases.
1861
175160e7
MT
1862 Handle constants that need to be placed in the constant pool by
1863 calling `force_const_mem'. */
1864
1865rtx
14a774a9 1866copy_rtx_and_substitute (orig, map, for_lhs)
b3694847 1867 rtx orig;
175160e7 1868 struct inline_remap *map;
14a774a9 1869 int for_lhs;
175160e7 1870{
b3694847
SS
1871 rtx copy, temp;
1872 int i, j;
1873 RTX_CODE code;
1874 enum machine_mode mode;
1875 const char *format_ptr;
175160e7
MT
1876 int regno;
1877
1878 if (orig == 0)
1879 return 0;
1880
1881 code = GET_CODE (orig);
1882 mode = GET_MODE (orig);
1883
1884 switch (code)
1885 {
1886 case REG:
1887 /* If the stack pointer register shows up, it must be part of
1888 stack-adjustments (*not* because we eliminated the frame pointer!).
1889 Small hard registers are returned as-is. Pseudo-registers
1890 go through their `reg_map'. */
1891 regno = REGNO (orig);
f83a0992
JL
1892 if (regno <= LAST_VIRTUAL_REGISTER
1893 || (map->integrating
1894 && DECL_SAVED_INSNS (map->fndecl)->internal_arg_pointer == orig))
175160e7
MT
1895 {
1896 /* Some hard registers are also mapped,
1897 but others are not translated. */
c826ae21 1898 if (map->reg_map[regno] != 0)
175160e7
MT
1899 return map->reg_map[regno];
1900
1901 /* If this is the virtual frame pointer, make space in current
1902 function's stack frame for the stack frame of the inline function.
1903
1904 Copy the address of this area into a pseudo. Map
1905 virtual_stack_vars_rtx to this pseudo and set up a constant
1906 equivalence for it to be the address. This will substitute the
1907 address into insns where it can be substituted and use the new
1908 pseudo where it can't. */
b5d7770c 1909 else if (regno == VIRTUAL_STACK_VARS_REGNUM)
175160e7
MT
1910 {
1911 rtx loc, seq;
49ad7cfa 1912 int size = get_func_frame_size (DECL_SAVED_INSNS (map->fndecl));
d219c7f1 1913#ifdef FRAME_GROWS_DOWNWARD
c2f8b491
JH
1914 int alignment
1915 = (DECL_SAVED_INSNS (map->fndecl)->stack_alignment_needed
1916 / BITS_PER_UNIT);
175160e7 1917
3e42d56b
DE
1918 /* In this case, virtual_stack_vars_rtx points to one byte
1919 higher than the top of the frame area. So make sure we
1920 allocate a big enough chunk to keep the frame pointer
1921 aligned like a real one. */
c2f8b491
JH
1922 if (alignment)
1923 size = CEIL_ROUND (size, alignment);
3e42d56b 1924#endif
175160e7
MT
1925 start_sequence ();
1926 loc = assign_stack_temp (BLKmode, size, 1);
1927 loc = XEXP (loc, 0);
1928#ifdef FRAME_GROWS_DOWNWARD
1929 /* In this case, virtual_stack_vars_rtx points to one byte
1930 higher than the top of the frame area. So compute the offset
3e42d56b
DE
1931 to one byte higher than our substitute frame. */
1932 loc = plus_constant (loc, size);
175160e7 1933#endif
59b2d722
RK
1934 map->reg_map[regno] = temp
1935 = force_reg (Pmode, force_operand (loc, NULL_RTX));
2b145ea8 1936
12307ca2 1937#ifdef STACK_BOUNDARY
bdb429a5 1938 mark_reg_pointer (map->reg_map[regno], STACK_BOUNDARY);
12307ca2
RK
1939#endif
1940
c68da89c 1941 SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
175160e7
MT
1942
1943 seq = gen_sequence ();
1944 end_sequence ();
1945 emit_insn_after (seq, map->insns_at_start);
5c23c401 1946 return temp;
175160e7 1947 }
f83a0992
JL
1948 else if (regno == VIRTUAL_INCOMING_ARGS_REGNUM
1949 || (map->integrating
1950 && (DECL_SAVED_INSNS (map->fndecl)->internal_arg_pointer
1951 == orig)))
175160e7
MT
1952 {
1953 /* Do the same for a block to contain any arguments referenced
0f41302f 1954 in memory. */
175160e7 1955 rtx loc, seq;
49ad7cfa 1956 int size = DECL_SAVED_INSNS (map->fndecl)->args_size;
175160e7
MT
1957
1958 start_sequence ();
1959 loc = assign_stack_temp (BLKmode, size, 1);
1960 loc = XEXP (loc, 0);
00174bdf 1961 /* When arguments grow downward, the virtual incoming
931553d8 1962 args pointer points to the top of the argument block,
0f41302f 1963 so the remapped location better do the same. */
931553d8
RS
1964#ifdef ARGS_GROW_DOWNWARD
1965 loc = plus_constant (loc, size);
1966#endif
59b2d722
RK
1967 map->reg_map[regno] = temp
1968 = force_reg (Pmode, force_operand (loc, NULL_RTX));
2b145ea8 1969
12307ca2 1970#ifdef STACK_BOUNDARY
bdb429a5 1971 mark_reg_pointer (map->reg_map[regno], STACK_BOUNDARY);
12307ca2
RK
1972#endif
1973
c68da89c 1974 SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
175160e7
MT
1975
1976 seq = gen_sequence ();
1977 end_sequence ();
1978 emit_insn_after (seq, map->insns_at_start);
5c23c401 1979 return temp;
175160e7
MT
1980 }
1981 else if (REG_FUNCTION_VALUE_P (orig))
1982 {
1983 /* This is a reference to the function return value. If
1984 the function doesn't have a return value, error. If the
c36fce9a 1985 mode doesn't agree, and it ain't BLKmode, make a SUBREG. */
175160e7 1986 if (map->inline_target == 0)
ea55fa7a
R
1987 {
1988 if (rtx_equal_function_value_matters)
1989 /* This is an ignored return value. We must not
1990 leave it in with REG_FUNCTION_VALUE_P set, since
1991 that would confuse subsequent inlining of the
1992 current function into a later function. */
1993 return gen_rtx_REG (GET_MODE (orig), regno);
1994 else
1995 /* Must be unrolling loops or replicating code if we
1996 reach here, so return the register unchanged. */
1997 return orig;
1998 }
60da674b
RH
1999 else if (GET_MODE (map->inline_target) != BLKmode
2000 && mode != GET_MODE (map->inline_target))
293e1467 2001 return gen_lowpart (mode, map->inline_target);
175160e7
MT
2002 else
2003 return map->inline_target;
2004 }
b5d7770c
AO
2005#if defined (LEAF_REGISTERS) && defined (LEAF_REG_REMAP)
2006 /* If leaf_renumber_regs_insn() might remap this register to
2007 some other number, make sure we don't share it with the
2008 inlined function, otherwise delayed optimization of the
2009 inlined function may change it in place, breaking our
2010 reference to it. We may still shared it within the
2011 function, so create an entry for this register in the
2012 reg_map. */
2013 if (map->integrating && regno < FIRST_PSEUDO_REGISTER
2014 && LEAF_REGISTERS[regno] && LEAF_REG_REMAP (regno) != regno)
2015 {
c826ae21
MM
2016 if (!map->leaf_reg_map[regno][mode])
2017 map->leaf_reg_map[regno][mode] = gen_rtx_REG (mode, regno);
2018 return map->leaf_reg_map[regno][mode];
b5d7770c
AO
2019 }
2020#endif
2021 else
2022 return orig;
2023
2024 abort ();
175160e7
MT
2025 }
2026 if (map->reg_map[regno] == NULL)
2027 {
2028 map->reg_map[regno] = gen_reg_rtx (mode);
2029 REG_USERVAR_P (map->reg_map[regno]) = REG_USERVAR_P (orig);
2030 REG_LOOP_TEST_P (map->reg_map[regno]) = REG_LOOP_TEST_P (orig);
2031 RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (orig);
2032 /* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
12307ca2 2033
3502dc9c 2034 if (REG_POINTER (map->x_regno_reg_rtx[regno]))
12307ca2
RK
2035 mark_reg_pointer (map->reg_map[regno],
2036 map->regno_pointer_align[regno]);
175160e7
MT
2037 }
2038 return map->reg_map[regno];
2039
2040 case SUBREG:
14a774a9 2041 copy = copy_rtx_and_substitute (SUBREG_REG (orig), map, for_lhs);
e5c56fd9
JH
2042 return simplify_gen_subreg (GET_MODE (orig), copy,
2043 GET_MODE (SUBREG_REG (orig)),
2044 SUBREG_BYTE (orig));
175160e7 2045
e9a25f70 2046 case ADDRESSOF:
38a448ca 2047 copy = gen_rtx_ADDRESSOF (mode,
14a774a9
RK
2048 copy_rtx_and_substitute (XEXP (orig, 0),
2049 map, for_lhs),
00174bdf 2050 0, ADDRESSOF_DECL (orig));
e9a25f70
JL
2051 regno = ADDRESSOF_REGNO (orig);
2052 if (map->reg_map[regno])
2053 regno = REGNO (map->reg_map[regno]);
2054 else if (regno > LAST_VIRTUAL_REGISTER)
2055 {
2056 temp = XEXP (orig, 0);
2057 map->reg_map[regno] = gen_reg_rtx (GET_MODE (temp));
2058 REG_USERVAR_P (map->reg_map[regno]) = REG_USERVAR_P (temp);
2059 REG_LOOP_TEST_P (map->reg_map[regno]) = REG_LOOP_TEST_P (temp);
2060 RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (temp);
2061 /* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
2062
3502dc9c 2063 if (REG_POINTER (map->x_regno_reg_rtx[regno]))
e9a25f70
JL
2064 mark_reg_pointer (map->reg_map[regno],
2065 map->regno_pointer_align[regno]);
2066 regno = REGNO (map->reg_map[regno]);
2067 }
2068 ADDRESSOF_REGNO (copy) = regno;
2069 return copy;
2070
175160e7
MT
2071 case USE:
2072 case CLOBBER:
2073 /* USE and CLOBBER are ordinary, but we convert (use (subreg foo))
d632e927
RS
2074 to (use foo) if the original insn didn't have a subreg.
2075 Removing the subreg distorts the VAX movstrhi pattern
2076 by changing the mode of an operand. */
14a774a9 2077 copy = copy_rtx_and_substitute (XEXP (orig, 0), map, code == CLOBBER);
d632e927 2078 if (GET_CODE (copy) == SUBREG && GET_CODE (XEXP (orig, 0)) != SUBREG)
175160e7 2079 copy = SUBREG_REG (copy);
38a448ca 2080 return gen_rtx_fmt_e (code, VOIDmode, copy);
175160e7 2081
bc8d3f91
JH
2082 /* We need to handle "deleted" labels that appear in the DECL_RTL
2083 of a LABEL_DECL. */
2084 case NOTE:
2085 if (NOTE_LINE_NUMBER (orig) != NOTE_INSN_DELETED_LABEL)
2086 break;
2087
dc297297 2088 /* ... FALLTHRU ... */
175160e7 2089 case CODE_LABEL:
1f3d3a31 2090 LABEL_PRESERVE_P (get_label_from_map (map, CODE_LABEL_NUMBER (orig)))
175160e7 2091 = LABEL_PRESERVE_P (orig);
1f3d3a31 2092 return get_label_from_map (map, CODE_LABEL_NUMBER (orig));
175160e7
MT
2093
2094 case LABEL_REF:
c5c76735
JL
2095 copy
2096 = gen_rtx_LABEL_REF
2097 (mode,
2098 LABEL_REF_NONLOCAL_P (orig) ? XEXP (orig, 0)
2099 : get_label_from_map (map, CODE_LABEL_NUMBER (XEXP (orig, 0))));
2100
175160e7 2101 LABEL_OUTSIDE_LOOP_P (copy) = LABEL_OUTSIDE_LOOP_P (orig);
c1ceaaa6
RK
2102
2103 /* The fact that this label was previously nonlocal does not mean
2104 it still is, so we must check if it is within the range of
2105 this function's labels. */
2106 LABEL_REF_NONLOCAL_P (copy)
2107 = (LABEL_REF_NONLOCAL_P (orig)
2108 && ! (CODE_LABEL_NUMBER (XEXP (copy, 0)) >= get_first_label_num ()
2109 && CODE_LABEL_NUMBER (XEXP (copy, 0)) < max_label_num ()));
81d57b8e
RK
2110
2111 /* If we have made a nonlocal label local, it means that this
9faa82d8 2112 inlined call will be referring to our nonlocal goto handler.
81d57b8e
RK
2113 So make sure we create one for this block; we normally would
2114 not since this is not otherwise considered a "call". */
2115 if (LABEL_REF_NONLOCAL_P (orig) && ! LABEL_REF_NONLOCAL_P (copy))
2116 function_call_count++;
2117
175160e7
MT
2118 return copy;
2119
2120 case PC:
2121 case CC0:
2122 case CONST_INT:
69ef87e2 2123 case CONST_VECTOR:
f543676f
JW
2124 return orig;
2125
175160e7 2126 case SYMBOL_REF:
f543676f
JW
2127 /* Symbols which represent the address of a label stored in the constant
2128 pool must be modified to point to a constant pool entry for the
2129 remapped label. Otherwise, symbols are returned unchanged. */
2130 if (CONSTANT_POOL_ADDRESS_P (orig))
2131 {
01d939e8 2132 struct function *f = inlining ? inlining : cfun;
36edd3cc
BS
2133 rtx constant = get_pool_constant_for_function (f, orig);
2134 enum machine_mode const_mode = get_pool_mode_for_function (f, orig);
2135 if (inlining)
2136 {
2137 rtx temp = force_const_mem (const_mode,
14a774a9
RK
2138 copy_rtx_and_substitute (constant,
2139 map, 0));
2140
36edd3cc
BS
2141#if 0
2142 /* Legitimizing the address here is incorrect.
2143
2144 Since we had a SYMBOL_REF before, we can assume it is valid
2145 to have one in this position in the insn.
2146
2147 Also, change_address may create new registers. These
2148 registers will not have valid reg_map entries. This can
2149 cause try_constants() to fail because assumes that all
2150 registers in the rtx have valid reg_map entries, and it may
2151 end up replacing one of these new registers with junk. */
2152
2153 if (! memory_address_p (GET_MODE (temp), XEXP (temp, 0)))
2154 temp = change_address (temp, GET_MODE (temp), XEXP (temp, 0));
2155#endif
2156
2157 temp = XEXP (temp, 0);
2158
2159#ifdef POINTERS_EXTEND_UNSIGNED
2160 if (GET_MODE (temp) != GET_MODE (orig))
2161 temp = convert_memory_address (GET_MODE (orig), temp);
2162#endif
2163 return temp;
2164 }
2165 else if (GET_CODE (constant) == LABEL_REF)
14a774a9
RK
2166 return XEXP (force_const_mem
2167 (GET_MODE (orig),
2168 copy_rtx_and_substitute (constant, map, for_lhs)),
c1ceaaa6 2169 0);
f543676f 2170 }
c1ceaaa6 2171
175160e7
MT
2172 return orig;
2173
2174 case CONST_DOUBLE:
2175 /* We have to make a new copy of this CONST_DOUBLE because don't want
2176 to use the old value of CONST_DOUBLE_MEM. Also, this may be a
2177 duplicate of a CONST_DOUBLE we have already seen. */
2178 if (GET_MODE_CLASS (GET_MODE (orig)) == MODE_FLOAT)
2179 {
2180 REAL_VALUE_TYPE d;
2181
2182 REAL_VALUE_FROM_CONST_DOUBLE (d, orig);
81fbaa41 2183 return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (orig));
175160e7
MT
2184 }
2185 else
2186 return immed_double_const (CONST_DOUBLE_LOW (orig),
2187 CONST_DOUBLE_HIGH (orig), VOIDmode);
2188
2189 case CONST:
2190 /* Make new constant pool entry for a constant
2191 that was in the pool of the inline function. */
2192 if (RTX_INTEGRATED_P (orig))
175160e7 2193 abort ();
36edd3cc 2194 break;
175160e7
MT
2195
2196 case ASM_OPERANDS:
6462bb43
AO
2197 /* If a single asm insn contains multiple output operands then
2198 it contains multiple ASM_OPERANDS rtx's that share the input
2199 and constraint vecs. We must make sure that the copied insn
2200 continues to share it. */
2201 if (map->orig_asm_operands_vector == ASM_OPERANDS_INPUT_VEC (orig))
175160e7
MT
2202 {
2203 copy = rtx_alloc (ASM_OPERANDS);
81d82304 2204 copy->volatil = orig->volatil;
dde068d9 2205 PUT_MODE (copy, GET_MODE (orig));
6462bb43
AO
2206 ASM_OPERANDS_TEMPLATE (copy) = ASM_OPERANDS_TEMPLATE (orig);
2207 ASM_OPERANDS_OUTPUT_CONSTRAINT (copy)
2208 = ASM_OPERANDS_OUTPUT_CONSTRAINT (orig);
2209 ASM_OPERANDS_OUTPUT_IDX (copy) = ASM_OPERANDS_OUTPUT_IDX (orig);
2210 ASM_OPERANDS_INPUT_VEC (copy) = map->copy_asm_operands_vector;
2211 ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy)
2212 = map->copy_asm_constraints_vector;
2213 ASM_OPERANDS_SOURCE_FILE (copy) = ASM_OPERANDS_SOURCE_FILE (orig);
2214 ASM_OPERANDS_SOURCE_LINE (copy) = ASM_OPERANDS_SOURCE_LINE (orig);
175160e7
MT
2215 return copy;
2216 }
2217 break;
2218
2219 case CALL:
2220 /* This is given special treatment because the first
2221 operand of a CALL is a (MEM ...) which may get
2222 forced into a register for cse. This is undesirable
2223 if function-address cse isn't wanted or if we won't do cse. */
2224#ifndef NO_FUNCTION_CSE
2225 if (! (optimize && ! flag_no_function_cse))
2226#endif
8ac61af7
RK
2227 {
2228 rtx copy
2229 = gen_rtx_MEM (GET_MODE (XEXP (orig, 0)),
2230 copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0),
2231 map, 0));
2232
72403582 2233 MEM_COPY_ATTRIBUTES (copy, XEXP (orig, 0));
8ac61af7
RK
2234
2235 return
2236 gen_rtx_CALL (GET_MODE (orig), copy,
2237 copy_rtx_and_substitute (XEXP (orig, 1), map, 0));
2238 }
175160e7
MT
2239 break;
2240
2241#if 0
2242 /* Must be ifdefed out for loop unrolling to work. */
2243 case RETURN:
2244 abort ();
2245#endif
2246
2247 case SET:
2248 /* If this is setting fp or ap, it means that we have a nonlocal goto.
e9a25f70 2249 Adjust the setting by the offset of the area we made.
175160e7
MT
2250 If the nonlocal goto is into the current function,
2251 this will result in unnecessarily bad code, but should work. */
2252 if (SET_DEST (orig) == virtual_stack_vars_rtx
2253 || SET_DEST (orig) == virtual_incoming_args_rtx)
e9a25f70 2254 {
00174bdf 2255 /* In case a translation hasn't occurred already, make one now. */
d6e6c585
JL
2256 rtx equiv_reg;
2257 rtx equiv_loc;
2258 HOST_WIDE_INT loc_offset;
2259
14a774a9 2260 copy_rtx_and_substitute (SET_DEST (orig), map, for_lhs);
d6e6c585 2261 equiv_reg = map->reg_map[REGNO (SET_DEST (orig))];
14a774a9
RK
2262 equiv_loc = VARRAY_CONST_EQUIV (map->const_equiv_varray,
2263 REGNO (equiv_reg)).rtx;
d6e6c585 2264 loc_offset
e9a25f70 2265 = GET_CODE (equiv_loc) == REG ? 0 : INTVAL (XEXP (equiv_loc, 1));
00174bdf 2266
38a448ca
RH
2267 return gen_rtx_SET (VOIDmode, SET_DEST (orig),
2268 force_operand
2269 (plus_constant
14a774a9
RK
2270 (copy_rtx_and_substitute (SET_SRC (orig),
2271 map, 0),
38a448ca
RH
2272 - loc_offset),
2273 NULL_RTX));
e9a25f70 2274 }
14a774a9
RK
2275 else
2276 return gen_rtx_SET (VOIDmode,
2277 copy_rtx_and_substitute (SET_DEST (orig), map, 1),
2278 copy_rtx_and_substitute (SET_SRC (orig), map, 0));
175160e7
MT
2279 break;
2280
2281 case MEM:
36edd3cc
BS
2282 if (inlining
2283 && GET_CODE (XEXP (orig, 0)) == SYMBOL_REF
2284 && CONSTANT_POOL_ADDRESS_P (XEXP (orig, 0)))
2285 {
14a774a9
RK
2286 enum machine_mode const_mode
2287 = get_pool_mode_for_function (inlining, XEXP (orig, 0));
2288 rtx constant
2289 = get_pool_constant_for_function (inlining, XEXP (orig, 0));
2290
2291 constant = copy_rtx_and_substitute (constant, map, 0);
2292
36edd3cc
BS
2293 /* If this was an address of a constant pool entry that itself
2294 had to be placed in the constant pool, it might not be a
2295 valid address. So the recursive call might have turned it
2296 into a register. In that case, it isn't a constant any
2297 more, so return it. This has the potential of changing a
2298 MEM into a REG, but we'll assume that it safe. */
2299 if (! CONSTANT_P (constant))
2300 return constant;
14a774a9 2301
36edd3cc
BS
2302 return validize_mem (force_const_mem (const_mode, constant));
2303 }
14a774a9 2304
c81f560b
RH
2305 copy = gen_rtx_MEM (mode, copy_rtx_and_substitute (XEXP (orig, 0),
2306 map, 0));
2307 MEM_COPY_ATTRIBUTES (copy, orig);
9674c842
RK
2308
2309 /* If inlining and this is not for the LHS, turn off RTX_UNCHANGING_P
2310 since this may be an indirect reference to a parameter and the
2311 actual may not be readonly. */
2312 if (inlining && !for_lhs)
2313 RTX_UNCHANGING_P (copy) = 0;
2314
175160e7 2315 return copy;
00174bdf 2316
e9a25f70
JL
2317 default:
2318 break;
175160e7
MT
2319 }
2320
2321 copy = rtx_alloc (code);
2322 PUT_MODE (copy, mode);
2323 copy->in_struct = orig->in_struct;
2324 copy->volatil = orig->volatil;
2325 copy->unchanging = orig->unchanging;
2326
2327 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2328
2329 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2330 {
2331 switch (*format_ptr++)
2332 {
2333 case '0':
ef178af3
ZW
2334 /* Copy this through the wide int field; that's safest. */
2335 X0WINT (copy, i) = X0WINT (orig, i);
175160e7
MT
2336 break;
2337
2338 case 'e':
14a774a9
RK
2339 XEXP (copy, i)
2340 = copy_rtx_and_substitute (XEXP (orig, i), map, for_lhs);
175160e7
MT
2341 break;
2342
2343 case 'u':
2344 /* Change any references to old-insns to point to the
2345 corresponding copied insns. */
2346 XEXP (copy, i) = map->insn_map[INSN_UID (XEXP (orig, i))];
2347 break;
2348
2349 case 'E':
2350 XVEC (copy, i) = XVEC (orig, i);
2351 if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
2352 {
2353 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2354 for (j = 0; j < XVECLEN (copy, i); j++)
2355 XVECEXP (copy, i, j)
14a774a9
RK
2356 = copy_rtx_and_substitute (XVECEXP (orig, i, j),
2357 map, for_lhs);
175160e7
MT
2358 }
2359 break;
2360
02bea8a8
RK
2361 case 'w':
2362 XWINT (copy, i) = XWINT (orig, i);
2363 break;
2364
175160e7
MT
2365 case 'i':
2366 XINT (copy, i) = XINT (orig, i);
2367 break;
2368
2369 case 's':
2370 XSTR (copy, i) = XSTR (orig, i);
2371 break;
2372
8f985ec4
ZW
2373 case 't':
2374 XTREE (copy, i) = XTREE (orig, i);
2375 break;
2376
175160e7
MT
2377 default:
2378 abort ();
2379 }
2380 }
2381
2382 if (code == ASM_OPERANDS && map->orig_asm_operands_vector == 0)
2383 {
6462bb43
AO
2384 map->orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
2385 map->copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
2386 map->copy_asm_constraints_vector
2387 = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
175160e7
MT
2388 }
2389
2390 return copy;
2391}
2392\f
2393/* Substitute known constant values into INSN, if that is valid. */
2394
2395void
2396try_constants (insn, map)
2397 rtx insn;
2398 struct inline_remap *map;
2399{
2400 int i;
2401
2402 map->num_sets = 0;
175160e7 2403
14a774a9
RK
2404 /* First try just updating addresses, then other things. This is
2405 important when we have something like the store of a constant
2406 into memory and we can update the memory address but the machine
2407 does not support a constant source. */
2408 subst_constants (&PATTERN (insn), insn, map, 1);
2409 apply_change_group ();
2410 subst_constants (&PATTERN (insn), insn, map, 0);
175160e7
MT
2411 apply_change_group ();
2412
2413 /* Show we don't know the value of anything stored or clobbered. */
84832317 2414 note_stores (PATTERN (insn), mark_stores, NULL);
175160e7
MT
2415 map->last_pc_value = 0;
2416#ifdef HAVE_cc0
2417 map->last_cc0_value = 0;
2418#endif
2419
2420 /* Set up any constant equivalences made in this insn. */
2421 for (i = 0; i < map->num_sets; i++)
2422 {
2423 if (GET_CODE (map->equiv_sets[i].dest) == REG)
2424 {
2425 int regno = REGNO (map->equiv_sets[i].dest);
2426
c68da89c
KR
2427 MAYBE_EXTEND_CONST_EQUIV_VARRAY (map, regno);
2428 if (VARRAY_CONST_EQUIV (map->const_equiv_varray, regno).rtx == 0
2429 /* Following clause is a hack to make case work where GNU C++
2430 reassigns a variable to make cse work right. */
2431 || ! rtx_equal_p (VARRAY_CONST_EQUIV (map->const_equiv_varray,
2432 regno).rtx,
2433 map->equiv_sets[i].equiv))
2434 SET_CONST_EQUIV_DATA (map, map->equiv_sets[i].dest,
2435 map->equiv_sets[i].equiv, map->const_age);
175160e7
MT
2436 }
2437 else if (map->equiv_sets[i].dest == pc_rtx)
2438 map->last_pc_value = map->equiv_sets[i].equiv;
2439#ifdef HAVE_cc0
2440 else if (map->equiv_sets[i].dest == cc0_rtx)
2441 map->last_cc0_value = map->equiv_sets[i].equiv;
2442#endif
2443 }
2444}
2445\f
2446/* Substitute known constants for pseudo regs in the contents of LOC,
2447 which are part of INSN.
d45cf215 2448 If INSN is zero, the substitution should always be done (this is used to
175160e7
MT
2449 update DECL_RTL).
2450 These changes are taken out by try_constants if the result is not valid.
2451
2452 Note that we are more concerned with determining when the result of a SET
2453 is a constant, for further propagation, than actually inserting constants
2454 into insns; cse will do the latter task better.
2455
2456 This function is also used to adjust address of items previously addressed
00174bdf 2457 via the virtual stack variable or virtual incoming arguments registers.
14a774a9
RK
2458
2459 If MEMONLY is nonzero, only make changes inside a MEM. */
175160e7
MT
2460
2461static void
14a774a9 2462subst_constants (loc, insn, map, memonly)
175160e7
MT
2463 rtx *loc;
2464 rtx insn;
2465 struct inline_remap *map;
14a774a9 2466 int memonly;
175160e7
MT
2467{
2468 rtx x = *loc;
b3694847
SS
2469 int i, j;
2470 enum rtx_code code;
2471 const char *format_ptr;
175160e7
MT
2472 int num_changes = num_validated_changes ();
2473 rtx new = 0;
a30d557c 2474 enum machine_mode op0_mode = MAX_MACHINE_MODE;
175160e7
MT
2475
2476 code = GET_CODE (x);
2477
2478 switch (code)
2479 {
2480 case PC:
2481 case CONST_INT:
2482 case CONST_DOUBLE:
69ef87e2 2483 case CONST_VECTOR:
175160e7
MT
2484 case SYMBOL_REF:
2485 case CONST:
2486 case LABEL_REF:
2487 case ADDRESS:
2488 return;
2489
2490#ifdef HAVE_cc0
2491 case CC0:
14a774a9
RK
2492 if (! memonly)
2493 validate_change (insn, loc, map->last_cc0_value, 1);
175160e7
MT
2494 return;
2495#endif
2496
2497 case USE:
2498 case CLOBBER:
2499 /* The only thing we can do with a USE or CLOBBER is possibly do
2500 some substitutions in a MEM within it. */
2501 if (GET_CODE (XEXP (x, 0)) == MEM)
14a774a9 2502 subst_constants (&XEXP (XEXP (x, 0), 0), insn, map, 0);
175160e7
MT
2503 return;
2504
2505 case REG:
2506 /* Substitute for parms and known constants. Don't replace
2507 hard regs used as user variables with constants. */
14a774a9
RK
2508 if (! memonly)
2509 {
2510 int regno = REGNO (x);
2511 struct const_equiv_data *p;
2512
2513 if (! (regno < FIRST_PSEUDO_REGISTER && REG_USERVAR_P (x))
2514 && (size_t) regno < VARRAY_SIZE (map->const_equiv_varray)
2515 && (p = &VARRAY_CONST_EQUIV (map->const_equiv_varray, regno),
2516 p->rtx != 0)
2517 && p->age >= map->const_age)
2518 validate_change (insn, loc, p->rtx, 1);
2519 }
2520 return;
175160e7
MT
2521
2522 case SUBREG:
637c5064
RS
2523 /* SUBREG applied to something other than a reg
2524 should be treated as ordinary, since that must
2525 be a special hack and we don't know how to treat it specially.
2526 Consider for example mulsidi3 in m68k.md.
2527 Ordinary SUBREG of a REG needs this special treatment. */
14a774a9 2528 if (! memonly && GET_CODE (SUBREG_REG (x)) == REG)
637c5064
RS
2529 {
2530 rtx inner = SUBREG_REG (x);
2531 rtx new = 0;
175160e7 2532
637c5064
RS
2533 /* We can't call subst_constants on &SUBREG_REG (x) because any
2534 constant or SUBREG wouldn't be valid inside our SUBEG. Instead,
2535 see what is inside, try to form the new SUBREG and see if that is
00174bdf 2536 valid. We handle two cases: extracting a full word in an
637c5064 2537 integral mode and extracting the low part. */
14a774a9 2538 subst_constants (&inner, NULL_RTX, map, 0);
0631e0bf
JH
2539 new = simplify_gen_subreg (GET_MODE (x), inner,
2540 GET_MODE (SUBREG_REG (x)),
2541 SUBREG_BYTE (x));
175160e7 2542
637c5064
RS
2543 if (new)
2544 validate_change (insn, loc, new, 1);
0631e0bf
JH
2545 else
2546 cancel_changes (num_changes);
175160e7 2547
637c5064
RS
2548 return;
2549 }
2550 break;
175160e7
MT
2551
2552 case MEM:
14a774a9 2553 subst_constants (&XEXP (x, 0), insn, map, 0);
175160e7
MT
2554
2555 /* If a memory address got spoiled, change it back. */
14a774a9
RK
2556 if (! memonly && insn != 0 && num_validated_changes () != num_changes
2557 && ! memory_address_p (GET_MODE (x), XEXP (x, 0)))
175160e7
MT
2558 cancel_changes (num_changes);
2559 return;
2560
2561 case SET:
2562 {
2563 /* Substitute constants in our source, and in any arguments to a
2564 complex (e..g, ZERO_EXTRACT) destination, but not in the destination
2565 itself. */
2566 rtx *dest_loc = &SET_DEST (x);
2567 rtx dest = *dest_loc;
2568 rtx src, tem;
96e60f0c
JJ
2569 enum machine_mode compare_mode = VOIDmode;
2570
2571 /* If SET_SRC is a COMPARE which subst_constants would turn into
2572 COMPARE of 2 VOIDmode constants, note the mode in which comparison
2573 is to be done. */
2574 if (GET_CODE (SET_SRC (x)) == COMPARE)
2575 {
2576 src = SET_SRC (x);
2577 if (GET_MODE_CLASS (GET_MODE (src)) == MODE_CC
2578#ifdef HAVE_cc0
2579 || dest == cc0_rtx
2580#endif
2581 )
2582 {
2583 compare_mode = GET_MODE (XEXP (src, 0));
2584 if (compare_mode == VOIDmode)
2585 compare_mode = GET_MODE (XEXP (src, 1));
2586 }
2587 }
175160e7 2588
14a774a9 2589 subst_constants (&SET_SRC (x), insn, map, memonly);
175160e7
MT
2590 src = SET_SRC (x);
2591
2592 while (GET_CODE (*dest_loc) == ZERO_EXTRACT
175160e7
MT
2593 || GET_CODE (*dest_loc) == SUBREG
2594 || GET_CODE (*dest_loc) == STRICT_LOW_PART)
2595 {
2596 if (GET_CODE (*dest_loc) == ZERO_EXTRACT)
2597 {
14a774a9
RK
2598 subst_constants (&XEXP (*dest_loc, 1), insn, map, memonly);
2599 subst_constants (&XEXP (*dest_loc, 2), insn, map, memonly);
175160e7
MT
2600 }
2601 dest_loc = &XEXP (*dest_loc, 0);
2602 }
2603
91594e43
RS
2604 /* Do substitute in the address of a destination in memory. */
2605 if (GET_CODE (*dest_loc) == MEM)
14a774a9 2606 subst_constants (&XEXP (*dest_loc, 0), insn, map, 0);
91594e43 2607
175160e7
MT
2608 /* Check for the case of DEST a SUBREG, both it and the underlying
2609 register are less than one word, and the SUBREG has the wider mode.
2610 In the case, we are really setting the underlying register to the
2611 source converted to the mode of DEST. So indicate that. */
2612 if (GET_CODE (dest) == SUBREG
2613 && GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD
2614 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) <= UNITS_PER_WORD
2615 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
2616 <= GET_MODE_SIZE (GET_MODE (dest)))
e2eb57b7
RK
2617 && (tem = gen_lowpart_if_possible (GET_MODE (SUBREG_REG (dest)),
2618 src)))
175160e7
MT
2619 src = tem, dest = SUBREG_REG (dest);
2620
2621 /* If storing a recognizable value save it for later recording. */
2622 if ((map->num_sets < MAX_RECOG_OPERANDS)
2623 && (CONSTANT_P (src)
c9734bb9 2624 || (GET_CODE (src) == REG
83b93f40
RK
2625 && (REGNO (src) == VIRTUAL_INCOMING_ARGS_REGNUM
2626 || REGNO (src) == VIRTUAL_STACK_VARS_REGNUM))
175160e7
MT
2627 || (GET_CODE (src) == PLUS
2628 && GET_CODE (XEXP (src, 0)) == REG
83b93f40
RK
2629 && (REGNO (XEXP (src, 0)) == VIRTUAL_INCOMING_ARGS_REGNUM
2630 || REGNO (XEXP (src, 0)) == VIRTUAL_STACK_VARS_REGNUM)
175160e7
MT
2631 && CONSTANT_P (XEXP (src, 1)))
2632 || GET_CODE (src) == COMPARE
2633#ifdef HAVE_cc0
2634 || dest == cc0_rtx
2635#endif
2636 || (dest == pc_rtx
2637 && (src == pc_rtx || GET_CODE (src) == RETURN
2638 || GET_CODE (src) == LABEL_REF))))
2639 {
2640 /* Normally, this copy won't do anything. But, if SRC is a COMPARE
2641 it will cause us to save the COMPARE with any constants
2642 substituted, which is what we want for later. */
96e60f0c
JJ
2643 rtx src_copy = copy_rtx (src);
2644 map->equiv_sets[map->num_sets].equiv = src_copy;
175160e7 2645 map->equiv_sets[map->num_sets++].dest = dest;
96e60f0c
JJ
2646 if (compare_mode != VOIDmode
2647 && GET_CODE (src) == COMPARE
2648 && (GET_MODE_CLASS (GET_MODE (src)) == MODE_CC
2649#ifdef HAVE_cc0
2650 || dest == cc0_rtx
2651#endif
2652 )
2653 && GET_MODE (XEXP (src, 0)) == VOIDmode
2654 && GET_MODE (XEXP (src, 1)) == VOIDmode)
2655 {
2656 map->compare_src = src_copy;
2657 map->compare_mode = compare_mode;
2658 }
175160e7 2659 }
175160e7 2660 }
e9a25f70
JL
2661 return;
2662
2663 default:
2664 break;
175160e7
MT
2665 }
2666
2667 format_ptr = GET_RTX_FORMAT (code);
00174bdf 2668
175160e7
MT
2669 /* If the first operand is an expression, save its mode for later. */
2670 if (*format_ptr == 'e')
2671 op0_mode = GET_MODE (XEXP (x, 0));
2672
2673 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2674 {
2675 switch (*format_ptr++)
2676 {
2677 case '0':
2678 break;
2679
2680 case 'e':
2681 if (XEXP (x, i))
14a774a9 2682 subst_constants (&XEXP (x, i), insn, map, memonly);
175160e7
MT
2683 break;
2684
2685 case 'u':
2686 case 'i':
2687 case 's':
02bea8a8 2688 case 'w':
00174bdf 2689 case 'n':
8f985ec4 2690 case 't':
175160e7
MT
2691 break;
2692
2693 case 'E':
2694 if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
14a774a9
RK
2695 for (j = 0; j < XVECLEN (x, i); j++)
2696 subst_constants (&XVECEXP (x, i, j), insn, map, memonly);
2697
175160e7
MT
2698 break;
2699
2700 default:
2701 abort ();
2702 }
2703 }
2704
2705 /* If this is a commutative operation, move a constant to the second
2706 operand unless the second operand is already a CONST_INT. */
14a774a9
RK
2707 if (! memonly
2708 && (GET_RTX_CLASS (code) == 'c' || code == NE || code == EQ)
175160e7
MT
2709 && CONSTANT_P (XEXP (x, 0)) && GET_CODE (XEXP (x, 1)) != CONST_INT)
2710 {
2711 rtx tem = XEXP (x, 0);
2712 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
2713 validate_change (insn, &XEXP (x, 1), tem, 1);
2714 }
2715
2716 /* Simplify the expression in case we put in some constants. */
14a774a9
RK
2717 if (! memonly)
2718 switch (GET_RTX_CLASS (code))
175160e7 2719 {
14a774a9
RK
2720 case '1':
2721 if (op0_mode == MAX_MACHINE_MODE)
2722 abort ();
2723 new = simplify_unary_operation (code, GET_MODE (x),
2724 XEXP (x, 0), op0_mode);
2725 break;
2726
2727 case '<':
2728 {
2729 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
2730
2731 if (op_mode == VOIDmode)
2732 op_mode = GET_MODE (XEXP (x, 1));
2733 new = simplify_relational_operation (code, op_mode,
2734 XEXP (x, 0), XEXP (x, 1));
b565a316 2735#ifdef FLOAT_STORE_FLAG_VALUE
14a774a9 2736 if (new != 0 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
12530dbe
RH
2737 {
2738 enum machine_mode mode = GET_MODE (x);
2739 if (new == const0_rtx)
2740 new = CONST0_RTX (mode);
2741 else
2742 {
950a3816
KG
2743 REAL_VALUE_TYPE val;
2744
2745 /* Avoid automatic aggregate initialization. */
2746 val = FLOAT_STORE_FLAG_VALUE (mode);
12530dbe
RH
2747 new = CONST_DOUBLE_FROM_REAL_VALUE (val, mode);
2748 }
2749 }
b565a316 2750#endif
14a774a9 2751 break;
00174bdf 2752 }
175160e7 2753
14a774a9
RK
2754 case '2':
2755 case 'c':
2756 new = simplify_binary_operation (code, GET_MODE (x),
2757 XEXP (x, 0), XEXP (x, 1));
2758 break;
175160e7 2759
14a774a9
RK
2760 case 'b':
2761 case '3':
2762 if (op0_mode == MAX_MACHINE_MODE)
2763 abort ();
2764
96e60f0c
JJ
2765 if (code == IF_THEN_ELSE)
2766 {
2767 rtx op0 = XEXP (x, 0);
2768
2769 if (GET_RTX_CLASS (GET_CODE (op0)) == '<'
2770 && GET_MODE (op0) == VOIDmode
2771 && ! side_effects_p (op0)
2772 && XEXP (op0, 0) == map->compare_src
2773 && GET_MODE (XEXP (op0, 1)) == VOIDmode)
2774 {
2775 /* We have compare of two VOIDmode constants for which
2776 we recorded the comparison mode. */
2777 rtx temp =
2778 simplify_relational_operation (GET_CODE (op0),
2779 map->compare_mode,
2780 XEXP (op0, 0),
2781 XEXP (op0, 1));
2782
2783 if (temp == const0_rtx)
2784 new = XEXP (x, 2);
2785 else if (temp == const1_rtx)
2786 new = XEXP (x, 1);
2787 }
2788 }
2789 if (!new)
2790 new = simplify_ternary_operation (code, GET_MODE (x), op0_mode,
2791 XEXP (x, 0), XEXP (x, 1),
2792 XEXP (x, 2));
14a774a9
RK
2793 break;
2794 }
175160e7
MT
2795
2796 if (new)
2797 validate_change (insn, loc, new, 1);
2798}
2799
2800/* Show that register modified no longer contain known constants. We are
2801 called from note_stores with parts of the new insn. */
2802
915b80ed 2803static void
84832317 2804mark_stores (dest, x, data)
175160e7 2805 rtx dest;
487a6e06 2806 rtx x ATTRIBUTE_UNUSED;
84832317 2807 void *data ATTRIBUTE_UNUSED;
175160e7 2808{
e2eb57b7 2809 int regno = -1;
6a651371 2810 enum machine_mode mode = VOIDmode;
e2eb57b7
RK
2811
2812 /* DEST is always the innermost thing set, except in the case of
2813 SUBREGs of hard registers. */
175160e7
MT
2814
2815 if (GET_CODE (dest) == REG)
e2eb57b7
RK
2816 regno = REGNO (dest), mode = GET_MODE (dest);
2817 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
2818 {
ddef6bc7
JJ
2819 regno = REGNO (SUBREG_REG (dest));
2820 if (regno < FIRST_PSEUDO_REGISTER)
2821 regno += subreg_regno_offset (REGNO (SUBREG_REG (dest)),
2822 GET_MODE (SUBREG_REG (dest)),
2823 SUBREG_BYTE (dest),
2824 GET_MODE (dest));
e2eb57b7
RK
2825 mode = GET_MODE (SUBREG_REG (dest));
2826 }
2827
2828 if (regno >= 0)
2829 {
770ae6cc
RK
2830 unsigned int uregno = regno;
2831 unsigned int last_reg = (uregno >= FIRST_PSEUDO_REGISTER ? uregno
00174bdf 2832 : uregno + HARD_REGNO_NREGS (uregno, mode) - 1);
770ae6cc 2833 unsigned int i;
e2eb57b7 2834
e9a25f70
JL
2835 /* Ignore virtual stack var or virtual arg register since those
2836 are handled separately. */
770ae6cc
RK
2837 if (uregno != VIRTUAL_INCOMING_ARGS_REGNUM
2838 && uregno != VIRTUAL_STACK_VARS_REGNUM)
2839 for (i = uregno; i <= last_reg; i++)
6a651371 2840 if ((size_t) i < VARRAY_SIZE (global_const_equiv_varray))
c68da89c 2841 VARRAY_CONST_EQUIV (global_const_equiv_varray, i).rtx = 0;
e2eb57b7 2842 }
175160e7
MT
2843}
2844\f
81578142
RS
2845/* Given a pointer to some BLOCK node, if the BLOCK_ABSTRACT_ORIGIN for the
2846 given BLOCK node is NULL, set the BLOCK_ABSTRACT_ORIGIN for the node so
2847 that it points to the node itself, thus indicating that the node is its
2848 own (abstract) origin. Additionally, if the BLOCK_ABSTRACT_ORIGIN for
2849 the given node is NULL, recursively descend the decl/block tree which
2850 it is the root of, and for each other ..._DECL or BLOCK node contained
2851 therein whose DECL_ABSTRACT_ORIGINs or BLOCK_ABSTRACT_ORIGINs are also
2852 still NULL, set *their* DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN
2853 values to point to themselves. */
2854
81578142
RS
2855static void
2856set_block_origin_self (stmt)
b3694847 2857 tree stmt;
81578142
RS
2858{
2859 if (BLOCK_ABSTRACT_ORIGIN (stmt) == NULL_TREE)
2860 {
2861 BLOCK_ABSTRACT_ORIGIN (stmt) = stmt;
2862
2863 {
b3694847 2864 tree local_decl;
81578142 2865
00174bdf 2866 for (local_decl = BLOCK_VARS (stmt);
81578142
RS
2867 local_decl != NULL_TREE;
2868 local_decl = TREE_CHAIN (local_decl))
00174bdf 2869 set_decl_origin_self (local_decl); /* Potential recursion. */
81578142
RS
2870 }
2871
2872 {
b3694847 2873 tree subblock;
81578142 2874
00174bdf 2875 for (subblock = BLOCK_SUBBLOCKS (stmt);
81578142
RS
2876 subblock != NULL_TREE;
2877 subblock = BLOCK_CHAIN (subblock))
00174bdf 2878 set_block_origin_self (subblock); /* Recurse. */
81578142
RS
2879 }
2880 }
2881}
2882
2883/* Given a pointer to some ..._DECL node, if the DECL_ABSTRACT_ORIGIN for
2884 the given ..._DECL node is NULL, set the DECL_ABSTRACT_ORIGIN for the
2885 node to so that it points to the node itself, thus indicating that the
2886 node represents its own (abstract) origin. Additionally, if the
2887 DECL_ABSTRACT_ORIGIN for the given node is NULL, recursively descend
2888 the decl/block tree of which the given node is the root of, and for
2889 each other ..._DECL or BLOCK node contained therein whose
2890 DECL_ABSTRACT_ORIGINs or BLOCK_ABSTRACT_ORIGINs are also still NULL,
2891 set *their* DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN values to
2892 point to themselves. */
2893
1cfdcc15 2894void
81578142 2895set_decl_origin_self (decl)
b3694847 2896 tree decl;
81578142
RS
2897{
2898 if (DECL_ABSTRACT_ORIGIN (decl) == NULL_TREE)
2899 {
2900 DECL_ABSTRACT_ORIGIN (decl) = decl;
2901 if (TREE_CODE (decl) == FUNCTION_DECL)
2902 {
b3694847 2903 tree arg;
81578142
RS
2904
2905 for (arg = DECL_ARGUMENTS (decl); arg; arg = TREE_CHAIN (arg))
2906 DECL_ABSTRACT_ORIGIN (arg) = arg;
29d356fb
RK
2907 if (DECL_INITIAL (decl) != NULL_TREE
2908 && DECL_INITIAL (decl) != error_mark_node)
81578142
RS
2909 set_block_origin_self (DECL_INITIAL (decl));
2910 }
2911 }
2912}
2913\f
2914/* Given a pointer to some BLOCK node, and a boolean value to set the
2915 "abstract" flags to, set that value into the BLOCK_ABSTRACT flag for
2916 the given block, and for all local decls and all local sub-blocks
2917 (recursively) which are contained therein. */
2918
81578142
RS
2919static void
2920set_block_abstract_flags (stmt, setting)
b3694847
SS
2921 tree stmt;
2922 int setting;
81578142 2923{
b3694847
SS
2924 tree local_decl;
2925 tree subblock;
81578142 2926
12307ca2 2927 BLOCK_ABSTRACT (stmt) = setting;
81578142 2928
12307ca2
RK
2929 for (local_decl = BLOCK_VARS (stmt);
2930 local_decl != NULL_TREE;
2931 local_decl = TREE_CHAIN (local_decl))
2932 set_decl_abstract_flags (local_decl, setting);
81578142 2933
12307ca2
RK
2934 for (subblock = BLOCK_SUBBLOCKS (stmt);
2935 subblock != NULL_TREE;
2936 subblock = BLOCK_CHAIN (subblock))
2937 set_block_abstract_flags (subblock, setting);
81578142
RS
2938}
2939
2940/* Given a pointer to some ..._DECL node, and a boolean value to set the
2941 "abstract" flags to, set that value into the DECL_ABSTRACT flag for the
2942 given decl, and (in the case where the decl is a FUNCTION_DECL) also
2943 set the abstract flags for all of the parameters, local vars, local
2944 blocks and sub-blocks (recursively) to the same setting. */
2945
2946void
2947set_decl_abstract_flags (decl, setting)
b3694847
SS
2948 tree decl;
2949 int setting;
81578142
RS
2950{
2951 DECL_ABSTRACT (decl) = setting;
2952 if (TREE_CODE (decl) == FUNCTION_DECL)
2953 {
b3694847 2954 tree arg;
81578142
RS
2955
2956 for (arg = DECL_ARGUMENTS (decl); arg; arg = TREE_CHAIN (arg))
2957 DECL_ABSTRACT (arg) = setting;
29d356fb
RK
2958 if (DECL_INITIAL (decl) != NULL_TREE
2959 && DECL_INITIAL (decl) != error_mark_node)
81578142
RS
2960 set_block_abstract_flags (DECL_INITIAL (decl), setting);
2961 }
2962}
2963\f
175160e7
MT
2964/* Output the assembly language code for the function FNDECL
2965 from its DECL_SAVED_INSNS. Used for inline functions that are output
2966 at end of compilation instead of where they came in the source. */
2967
2968void
2969output_inline_function (fndecl)
2970 tree fndecl;
2971{
01d939e8 2972 struct function *old_cfun = cfun;
f93dacbd 2973 enum debug_info_type old_write_symbols = write_symbols;
895b2cfe 2974 struct gcc_debug_hooks *old_debug_hooks = debug_hooks;
49ad7cfa 2975 struct function *f = DECL_SAVED_INSNS (fndecl);
175160e7 2976
01d939e8 2977 cfun = f;
175160e7 2978 current_function_decl = fndecl;
49ad7cfa 2979 clear_emit_caches ();
175160e7 2980
49ad7cfa 2981 set_new_last_label_num (f->inl_max_label_num);
175160e7 2982
51783c14
JM
2983 /* We're not deferring this any longer. */
2984 DECL_DEFER_OUTPUT (fndecl) = 0;
2985
f93dacbd
RK
2986 /* If requested, suppress debugging information. */
2987 if (f->no_debugging_symbols)
135d50f1
RK
2988 {
2989 write_symbols = NO_DEBUG;
2990 debug_hooks = &do_nothing_debug_hooks;
2991 }
f93dacbd 2992
ae6f2a1c
ZW
2993 /* Compile this function all the way down to assembly code. As a
2994 side effect this destroys the saved RTL representation, but
2995 that's okay, because we don't need to inline this anymore. */
7d2e8eff 2996 rest_of_compilation (fndecl);
f4744807 2997 DECL_INLINE (fndecl) = 0;
09578c27 2998
01d939e8
BS
2999 cfun = old_cfun;
3000 current_function_decl = old_cfun ? old_cfun->decl : 0;
f93dacbd 3001 write_symbols = old_write_symbols;
135d50f1 3002 debug_hooks = old_debug_hooks;
175160e7 3003}
c0e7830f
DD
3004
3005\f
3006/* Functions to keep track of the values hard regs had at the start of
3007 the function. */
3008
902197eb
DD
3009rtx
3010get_hard_reg_initial_reg (fun, reg)
3011 struct function *fun;
3012 rtx reg;
3013{
3014 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3015 int i;
3016
3017 if (ivs == 0)
3018 return NULL_RTX;
3019
3020 for (i = 0; i < ivs->num_entries; i++)
3021 if (rtx_equal_p (ivs->entries[i].pseudo, reg))
3022 return ivs->entries[i].hard_reg;
3023
3024 return NULL_RTX;
3025}
3026
c0e7830f
DD
3027rtx
3028has_func_hard_reg_initial_val (fun, reg)
3029 struct function *fun;
3030 rtx reg;
3031{
3032 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3033 int i;
3034
3035 if (ivs == 0)
3036 return NULL_RTX;
3037
3038 for (i = 0; i < ivs->num_entries; i++)
3039 if (rtx_equal_p (ivs->entries[i].hard_reg, reg))
3040 return ivs->entries[i].pseudo;
3041
3042 return NULL_RTX;
3043}
3044
3045rtx
3046get_func_hard_reg_initial_val (fun, reg)
3047 struct function *fun;
3048 rtx reg;
3049{
3050 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3051 rtx rv = has_func_hard_reg_initial_val (fun, reg);
3052
3053 if (rv)
3054 return rv;
3055
3056 if (ivs == 0)
3057 {
3058 fun->hard_reg_initial_vals = (void *) xmalloc (sizeof (initial_value_struct));
3059 ivs = fun->hard_reg_initial_vals;
3060 ivs->num_entries = 0;
3061 ivs->max_entries = 5;
3062 ivs->entries = (initial_value_pair *) xmalloc (5 * sizeof (initial_value_pair));
3063 }
3064
3065 if (ivs->num_entries >= ivs->max_entries)
3066 {
3067 ivs->max_entries += 5;
3068 ivs->entries =
3069 (initial_value_pair *) xrealloc (ivs->entries,
3070 ivs->max_entries
3071 * sizeof (initial_value_pair));
3072 }
3073
3074 ivs->entries[ivs->num_entries].hard_reg = reg;
3075 ivs->entries[ivs->num_entries].pseudo = gen_reg_rtx (GET_MODE (reg));
3076
3077 return ivs->entries[ivs->num_entries++].pseudo;
3078}
3079
3080rtx
3081get_hard_reg_initial_val (mode, regno)
3082 enum machine_mode mode;
3083 int regno;
3084{
3085 return get_func_hard_reg_initial_val (cfun, gen_rtx_REG (mode, regno));
3086}
3087
3088rtx
3089has_hard_reg_initial_val (mode, regno)
3090 enum machine_mode mode;
3091 int regno;
3092{
3093 return has_func_hard_reg_initial_val (cfun, gen_rtx_REG (mode, regno));
3094}
3095
3096void
3097mark_hard_reg_initial_vals (fun)
3098 struct function *fun;
3099{
3100 struct initial_value_struct *ivs = fun->hard_reg_initial_vals;
3101 int i;
3102
024070cb
DD
3103 if (ivs == 0)
3104 return;
3105
c0e7830f
DD
3106 for (i = 0; i < ivs->num_entries; i ++)
3107 {
3108 ggc_mark_rtx (ivs->entries[i].hard_reg);
3109 ggc_mark_rtx (ivs->entries[i].pseudo);
3110 }
3111}
3112
3113static void
3114setup_initial_hard_reg_value_integration (inl_f, remap)
3115 struct function *inl_f;
3116 struct inline_remap *remap;
3117{
3118 struct initial_value_struct *ivs = inl_f->hard_reg_initial_vals;
3119 int i;
3120
3121 if (ivs == 0)
3122 return;
3123
3124 for (i = 0; i < ivs->num_entries; i ++)
3125 remap->reg_map[REGNO (ivs->entries[i].pseudo)]
3126 = get_func_hard_reg_initial_val (cfun, ivs->entries[i].hard_reg);
3127}
3128
3129
3130void
3131emit_initial_value_sets ()
3132{
3133 struct initial_value_struct *ivs = cfun->hard_reg_initial_vals;
3134 int i;
3135 rtx seq;
3136
3137 if (ivs == 0)
3138 return;
3139
3140 start_sequence ();
3141 for (i = 0; i < ivs->num_entries; i++)
3142 emit_move_insn (ivs->entries[i].pseudo, ivs->entries[i].hard_reg);
3143 seq = get_insns ();
3144 end_sequence ();
3145
3146 emit_insns_after (seq, get_insns ());
3147}
385b6e2d
R
3148
3149/* If the backend knows where to allocate pseudos for hard
3150 register initial values, register these allocations now. */
3151void
3152allocate_initial_values (reg_equiv_memory_loc)
97a4f671 3153 rtx *reg_equiv_memory_loc ATTRIBUTE_UNUSED;
385b6e2d
R
3154{
3155#ifdef ALLOCATE_INITIAL_VALUE
3156 struct initial_value_struct *ivs = cfun->hard_reg_initial_vals;
3157 int i;
3158
3159 if (ivs == 0)
3160 return;
3161
3162 for (i = 0; i < ivs->num_entries; i++)
3163 {
3164 int regno = REGNO (ivs->entries[i].pseudo);
3165 rtx x = ALLOCATE_INITIAL_VALUE (ivs->entries[i].hard_reg);
3166
3167 if (x == NULL_RTX || REG_N_SETS (REGNO (ivs->entries[i].pseudo)) > 1)
3168 ; /* Do nothing. */
3169 else if (GET_CODE (x) == MEM)
3170 reg_equiv_memory_loc[regno] = x;
3171 else if (GET_CODE (x) == REG)
3172 {
3173 reg_renumber[regno] = REGNO (x);
3174 /* Poke the regno right into regno_reg_rtx
3175 so that even fixed regs are accepted. */
3176 REGNO (ivs->entries[i].pseudo) = REGNO (x);
3177 }
3178 else abort ();
3179 }
3180#endif
3181}