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058e97ec | 1 | /* IRA allocation based on graph coloring. |
cbe34bb5 | 2 | Copyright (C) 2006-2017 Free Software Foundation, Inc. |
058e97ec VM |
3 | Contributed by Vladimir Makarov <vmakarov@redhat.com>. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 3, or (at your option) any later | |
10 | version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "config.h" | |
22 | #include "system.h" | |
23 | #include "coretypes.h" | |
c7131fb2 | 24 | #include "backend.h" |
957060b5 | 25 | #include "target.h" |
058e97ec | 26 | #include "rtl.h" |
957060b5 AM |
27 | #include "tree.h" |
28 | #include "predict.h" | |
c7131fb2 | 29 | #include "df.h" |
4d0cdd0c | 30 | #include "memmodel.h" |
058e97ec | 31 | #include "tm_p.h" |
957060b5 | 32 | #include "insn-config.h" |
058e97ec | 33 | #include "regs.h" |
957060b5 AM |
34 | #include "ira.h" |
35 | #include "ira-int.h" | |
058e97ec | 36 | #include "reload.h" |
c7131fb2 | 37 | #include "cfgloop.h" |
058e97ec | 38 | |
27508f5f | 39 | typedef struct allocno_hard_regs *allocno_hard_regs_t; |
1756cb66 VM |
40 | |
41 | /* The structure contains information about hard registers can be | |
27508f5f | 42 | assigned to allocnos. Usually it is allocno profitable hard |
1756cb66 VM |
43 | registers but in some cases this set can be a bit different. Major |
44 | reason of the difference is a requirement to use hard register sets | |
45 | that form a tree or a forest (set of trees), i.e. hard register set | |
46 | of a node should contain hard register sets of its subnodes. */ | |
27508f5f | 47 | struct allocno_hard_regs |
1756cb66 VM |
48 | { |
49 | /* Hard registers can be assigned to an allocno. */ | |
50 | HARD_REG_SET set; | |
51 | /* Overall (spilling) cost of all allocnos with given register | |
52 | set. */ | |
a9243bfc | 53 | int64_t cost; |
1756cb66 VM |
54 | }; |
55 | ||
27508f5f | 56 | typedef struct allocno_hard_regs_node *allocno_hard_regs_node_t; |
1756cb66 | 57 | |
27508f5f | 58 | /* A node representing allocno hard registers. Such nodes form a |
1756cb66 | 59 | forest (set of trees). Each subnode of given node in the forest |
27508f5f | 60 | refers for hard register set (usually allocno profitable hard |
1756cb66 VM |
61 | register set) which is a subset of one referred from given |
62 | node. */ | |
27508f5f | 63 | struct allocno_hard_regs_node |
1756cb66 VM |
64 | { |
65 | /* Set up number of the node in preorder traversing of the forest. */ | |
66 | int preorder_num; | |
67 | /* Used for different calculation like finding conflict size of an | |
68 | allocno. */ | |
69 | int check; | |
70 | /* Used for calculation of conflict size of an allocno. The | |
27508f5f | 71 | conflict size of the allocno is maximal number of given allocno |
1756cb66 VM |
72 | hard registers needed for allocation of the conflicting allocnos. |
73 | Given allocno is trivially colored if this number plus the number | |
74 | of hard registers needed for given allocno is not greater than | |
75 | the number of given allocno hard register set. */ | |
76 | int conflict_size; | |
77 | /* The number of hard registers given by member hard_regs. */ | |
78 | int hard_regs_num; | |
79 | /* The following member is used to form the final forest. */ | |
80 | bool used_p; | |
81 | /* Pointer to the corresponding profitable hard registers. */ | |
27508f5f | 82 | allocno_hard_regs_t hard_regs; |
1756cb66 VM |
83 | /* Parent, first subnode, previous and next node with the same |
84 | parent in the forest. */ | |
27508f5f | 85 | allocno_hard_regs_node_t parent, first, prev, next; |
1756cb66 VM |
86 | }; |
87 | ||
3b6d1699 VM |
88 | /* Info about changing hard reg costs of an allocno. */ |
89 | struct update_cost_record | |
90 | { | |
91 | /* Hard regno for which we changed the cost. */ | |
92 | int hard_regno; | |
93 | /* Divisor used when we changed the cost of HARD_REGNO. */ | |
94 | int divisor; | |
95 | /* Next record for given allocno. */ | |
96 | struct update_cost_record *next; | |
97 | }; | |
98 | ||
1756cb66 VM |
99 | /* To decrease footprint of ira_allocno structure we store all data |
100 | needed only for coloring in the following structure. */ | |
101 | struct allocno_color_data | |
102 | { | |
103 | /* TRUE value means that the allocno was not removed yet from the | |
df3e3493 | 104 | conflicting graph during coloring. */ |
1756cb66 VM |
105 | unsigned int in_graph_p : 1; |
106 | /* TRUE if it is put on the stack to make other allocnos | |
107 | colorable. */ | |
108 | unsigned int may_be_spilled_p : 1; | |
27508f5f | 109 | /* TRUE if the allocno is trivially colorable. */ |
1756cb66 VM |
110 | unsigned int colorable_p : 1; |
111 | /* Number of hard registers of the allocno class really | |
112 | available for the allocno allocation. It is number of the | |
113 | profitable hard regs. */ | |
114 | int available_regs_num; | |
115 | /* Allocnos in a bucket (used in coloring) chained by the following | |
116 | two members. */ | |
117 | ira_allocno_t next_bucket_allocno; | |
118 | ira_allocno_t prev_bucket_allocno; | |
119 | /* Used for temporary purposes. */ | |
120 | int temp; | |
27508f5f VM |
121 | /* Used to exclude repeated processing. */ |
122 | int last_process; | |
1756cb66 VM |
123 | /* Profitable hard regs available for this pseudo allocation. It |
124 | means that the set excludes unavailable hard regs and hard regs | |
125 | conflicting with given pseudo. They should be of the allocno | |
126 | class. */ | |
127 | HARD_REG_SET profitable_hard_regs; | |
27508f5f VM |
128 | /* The allocno hard registers node. */ |
129 | allocno_hard_regs_node_t hard_regs_node; | |
130 | /* Array of structures allocno_hard_regs_subnode representing | |
131 | given allocno hard registers node (the 1st element in the array) | |
132 | and all its subnodes in the tree (forest) of allocno hard | |
1756cb66 VM |
133 | register nodes (see comments above). */ |
134 | int hard_regs_subnodes_start; | |
2b9c63a2 | 135 | /* The length of the previous array. */ |
1756cb66 | 136 | int hard_regs_subnodes_num; |
3b6d1699 VM |
137 | /* Records about updating allocno hard reg costs from copies. If |
138 | the allocno did not get expected hard register, these records are | |
139 | used to restore original hard reg costs of allocnos connected to | |
140 | this allocno by copies. */ | |
141 | struct update_cost_record *update_cost_records; | |
bf08fb16 VM |
142 | /* Threads. We collect allocnos connected by copies into threads |
143 | and try to assign hard regs to allocnos by threads. */ | |
144 | /* Allocno representing all thread. */ | |
145 | ira_allocno_t first_thread_allocno; | |
146 | /* Allocnos in thread forms a cycle list through the following | |
147 | member. */ | |
148 | ira_allocno_t next_thread_allocno; | |
149 | /* All thread frequency. Defined only for first thread allocno. */ | |
150 | int thread_freq; | |
1756cb66 VM |
151 | }; |
152 | ||
153 | /* See above. */ | |
27508f5f | 154 | typedef struct allocno_color_data *allocno_color_data_t; |
1756cb66 | 155 | |
27508f5f VM |
156 | /* Container for storing allocno data concerning coloring. */ |
157 | static allocno_color_data_t allocno_color_data; | |
1756cb66 VM |
158 | |
159 | /* Macro to access the data concerning coloring. */ | |
27508f5f VM |
160 | #define ALLOCNO_COLOR_DATA(a) ((allocno_color_data_t) ALLOCNO_ADD_DATA (a)) |
161 | ||
162 | /* Used for finding allocno colorability to exclude repeated allocno | |
163 | processing and for updating preferencing to exclude repeated | |
164 | allocno processing during assignment. */ | |
165 | static int curr_allocno_process; | |
1756cb66 | 166 | |
058e97ec VM |
167 | /* This file contains code for regional graph coloring, spill/restore |
168 | code placement optimization, and code helping the reload pass to do | |
169 | a better job. */ | |
170 | ||
171 | /* Bitmap of allocnos which should be colored. */ | |
172 | static bitmap coloring_allocno_bitmap; | |
173 | ||
174 | /* Bitmap of allocnos which should be taken into account during | |
175 | coloring. In general case it contains allocnos from | |
176 | coloring_allocno_bitmap plus other already colored conflicting | |
177 | allocnos. */ | |
178 | static bitmap consideration_allocno_bitmap; | |
179 | ||
058e97ec VM |
180 | /* All allocnos sorted according their priorities. */ |
181 | static ira_allocno_t *sorted_allocnos; | |
182 | ||
183 | /* Vec representing the stack of allocnos used during coloring. */ | |
9771b263 | 184 | static vec<ira_allocno_t> allocno_stack_vec; |
058e97ec | 185 | |
71af27d2 OH |
186 | /* Helper for qsort comparison callbacks - return a positive integer if |
187 | X > Y, or a negative value otherwise. Use a conditional expression | |
188 | instead of a difference computation to insulate from possible overflow | |
189 | issues, e.g. X - Y < 0 for some X > 0 and Y < 0. */ | |
190 | #define SORTGT(x,y) (((x) > (y)) ? 1 : -1) | |
191 | ||
058e97ec VM |
192 | \f |
193 | ||
27508f5f | 194 | /* Definition of vector of allocno hard registers. */ |
fe82cdfb | 195 | |
27508f5f | 196 | /* Vector of unique allocno hard registers. */ |
9771b263 | 197 | static vec<allocno_hard_regs_t> allocno_hard_regs_vec; |
1756cb66 | 198 | |
8d67ee55 | 199 | struct allocno_hard_regs_hasher : nofree_ptr_hash <allocno_hard_regs> |
1756cb66 | 200 | { |
67f58944 TS |
201 | static inline hashval_t hash (const allocno_hard_regs *); |
202 | static inline bool equal (const allocno_hard_regs *, | |
203 | const allocno_hard_regs *); | |
4a8fb1a1 | 204 | }; |
1756cb66 | 205 | |
4a8fb1a1 LC |
206 | /* Returns hash value for allocno hard registers V. */ |
207 | inline hashval_t | |
67f58944 | 208 | allocno_hard_regs_hasher::hash (const allocno_hard_regs *hv) |
4a8fb1a1 | 209 | { |
1756cb66 VM |
210 | return iterative_hash (&hv->set, sizeof (HARD_REG_SET), 0); |
211 | } | |
212 | ||
27508f5f | 213 | /* Compares allocno hard registers V1 and V2. */ |
4a8fb1a1 | 214 | inline bool |
67f58944 TS |
215 | allocno_hard_regs_hasher::equal (const allocno_hard_regs *hv1, |
216 | const allocno_hard_regs *hv2) | |
1756cb66 | 217 | { |
1756cb66 VM |
218 | return hard_reg_set_equal_p (hv1->set, hv2->set); |
219 | } | |
220 | ||
27508f5f | 221 | /* Hash table of unique allocno hard registers. */ |
c203e8a7 | 222 | static hash_table<allocno_hard_regs_hasher> *allocno_hard_regs_htab; |
1756cb66 | 223 | |
27508f5f VM |
224 | /* Return allocno hard registers in the hash table equal to HV. */ |
225 | static allocno_hard_regs_t | |
226 | find_hard_regs (allocno_hard_regs_t hv) | |
1756cb66 | 227 | { |
c203e8a7 | 228 | return allocno_hard_regs_htab->find (hv); |
1756cb66 VM |
229 | } |
230 | ||
231 | /* Insert allocno hard registers HV in the hash table (if it is not | |
232 | there yet) and return the value which in the table. */ | |
27508f5f VM |
233 | static allocno_hard_regs_t |
234 | insert_hard_regs (allocno_hard_regs_t hv) | |
1756cb66 | 235 | { |
c203e8a7 | 236 | allocno_hard_regs **slot = allocno_hard_regs_htab->find_slot (hv, INSERT); |
1756cb66 VM |
237 | |
238 | if (*slot == NULL) | |
239 | *slot = hv; | |
4a8fb1a1 | 240 | return *slot; |
1756cb66 VM |
241 | } |
242 | ||
27508f5f | 243 | /* Initialize data concerning allocno hard registers. */ |
1756cb66 | 244 | static void |
27508f5f | 245 | init_allocno_hard_regs (void) |
1756cb66 | 246 | { |
9771b263 | 247 | allocno_hard_regs_vec.create (200); |
c203e8a7 TS |
248 | allocno_hard_regs_htab |
249 | = new hash_table<allocno_hard_regs_hasher> (200); | |
1756cb66 VM |
250 | } |
251 | ||
27508f5f | 252 | /* Add (or update info about) allocno hard registers with SET and |
1756cb66 | 253 | COST. */ |
27508f5f | 254 | static allocno_hard_regs_t |
a9243bfc | 255 | add_allocno_hard_regs (HARD_REG_SET set, int64_t cost) |
1756cb66 | 256 | { |
27508f5f VM |
257 | struct allocno_hard_regs temp; |
258 | allocno_hard_regs_t hv; | |
1756cb66 VM |
259 | |
260 | gcc_assert (! hard_reg_set_empty_p (set)); | |
261 | COPY_HARD_REG_SET (temp.set, set); | |
262 | if ((hv = find_hard_regs (&temp)) != NULL) | |
263 | hv->cost += cost; | |
264 | else | |
265 | { | |
27508f5f VM |
266 | hv = ((struct allocno_hard_regs *) |
267 | ira_allocate (sizeof (struct allocno_hard_regs))); | |
1756cb66 VM |
268 | COPY_HARD_REG_SET (hv->set, set); |
269 | hv->cost = cost; | |
9771b263 | 270 | allocno_hard_regs_vec.safe_push (hv); |
1756cb66 VM |
271 | insert_hard_regs (hv); |
272 | } | |
273 | return hv; | |
274 | } | |
275 | ||
276 | /* Finalize data concerning allocno hard registers. */ | |
277 | static void | |
27508f5f | 278 | finish_allocno_hard_regs (void) |
1756cb66 VM |
279 | { |
280 | int i; | |
27508f5f | 281 | allocno_hard_regs_t hv; |
1756cb66 VM |
282 | |
283 | for (i = 0; | |
9771b263 | 284 | allocno_hard_regs_vec.iterate (i, &hv); |
1756cb66 VM |
285 | i++) |
286 | ira_free (hv); | |
c203e8a7 TS |
287 | delete allocno_hard_regs_htab; |
288 | allocno_hard_regs_htab = NULL; | |
9771b263 | 289 | allocno_hard_regs_vec.release (); |
1756cb66 VM |
290 | } |
291 | ||
292 | /* Sort hard regs according to their frequency of usage. */ | |
293 | static int | |
27508f5f | 294 | allocno_hard_regs_compare (const void *v1p, const void *v2p) |
1756cb66 | 295 | { |
27508f5f VM |
296 | allocno_hard_regs_t hv1 = *(const allocno_hard_regs_t *) v1p; |
297 | allocno_hard_regs_t hv2 = *(const allocno_hard_regs_t *) v2p; | |
1756cb66 VM |
298 | |
299 | if (hv2->cost > hv1->cost) | |
300 | return 1; | |
301 | else if (hv2->cost < hv1->cost) | |
302 | return -1; | |
303 | else | |
304 | return 0; | |
305 | } | |
306 | ||
307 | \f | |
308 | ||
309 | /* Used for finding a common ancestor of two allocno hard registers | |
310 | nodes in the forest. We use the current value of | |
311 | 'node_check_tick' to mark all nodes from one node to the top and | |
312 | then walking up from another node until we find a marked node. | |
313 | ||
314 | It is also used to figure out allocno colorability as a mark that | |
315 | we already reset value of member 'conflict_size' for the forest | |
316 | node corresponding to the processed allocno. */ | |
317 | static int node_check_tick; | |
318 | ||
319 | /* Roots of the forest containing hard register sets can be assigned | |
27508f5f VM |
320 | to allocnos. */ |
321 | static allocno_hard_regs_node_t hard_regs_roots; | |
1756cb66 | 322 | |
27508f5f | 323 | /* Definition of vector of allocno hard register nodes. */ |
1756cb66 VM |
324 | |
325 | /* Vector used to create the forest. */ | |
9771b263 | 326 | static vec<allocno_hard_regs_node_t> hard_regs_node_vec; |
1756cb66 | 327 | |
27508f5f | 328 | /* Create and return allocno hard registers node containing allocno |
1756cb66 | 329 | hard registers HV. */ |
27508f5f VM |
330 | static allocno_hard_regs_node_t |
331 | create_new_allocno_hard_regs_node (allocno_hard_regs_t hv) | |
1756cb66 | 332 | { |
27508f5f | 333 | allocno_hard_regs_node_t new_node; |
1756cb66 | 334 | |
27508f5f VM |
335 | new_node = ((struct allocno_hard_regs_node *) |
336 | ira_allocate (sizeof (struct allocno_hard_regs_node))); | |
1756cb66 VM |
337 | new_node->check = 0; |
338 | new_node->hard_regs = hv; | |
339 | new_node->hard_regs_num = hard_reg_set_size (hv->set); | |
340 | new_node->first = NULL; | |
341 | new_node->used_p = false; | |
342 | return new_node; | |
343 | } | |
344 | ||
27508f5f | 345 | /* Add allocno hard registers node NEW_NODE to the forest on its level |
1756cb66 VM |
346 | given by ROOTS. */ |
347 | static void | |
27508f5f VM |
348 | add_new_allocno_hard_regs_node_to_forest (allocno_hard_regs_node_t *roots, |
349 | allocno_hard_regs_node_t new_node) | |
1756cb66 VM |
350 | { |
351 | new_node->next = *roots; | |
352 | if (new_node->next != NULL) | |
353 | new_node->next->prev = new_node; | |
354 | new_node->prev = NULL; | |
355 | *roots = new_node; | |
356 | } | |
357 | ||
27508f5f | 358 | /* Add allocno hard registers HV (or its best approximation if it is |
1756cb66 VM |
359 | not possible) to the forest on its level given by ROOTS. */ |
360 | static void | |
27508f5f VM |
361 | add_allocno_hard_regs_to_forest (allocno_hard_regs_node_t *roots, |
362 | allocno_hard_regs_t hv) | |
1756cb66 VM |
363 | { |
364 | unsigned int i, start; | |
27508f5f | 365 | allocno_hard_regs_node_t node, prev, new_node; |
1756cb66 | 366 | HARD_REG_SET temp_set; |
27508f5f | 367 | allocno_hard_regs_t hv2; |
1756cb66 | 368 | |
9771b263 | 369 | start = hard_regs_node_vec.length (); |
1756cb66 VM |
370 | for (node = *roots; node != NULL; node = node->next) |
371 | { | |
372 | if (hard_reg_set_equal_p (hv->set, node->hard_regs->set)) | |
373 | return; | |
374 | if (hard_reg_set_subset_p (hv->set, node->hard_regs->set)) | |
375 | { | |
27508f5f | 376 | add_allocno_hard_regs_to_forest (&node->first, hv); |
1756cb66 VM |
377 | return; |
378 | } | |
379 | if (hard_reg_set_subset_p (node->hard_regs->set, hv->set)) | |
9771b263 | 380 | hard_regs_node_vec.safe_push (node); |
1756cb66 VM |
381 | else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set)) |
382 | { | |
383 | COPY_HARD_REG_SET (temp_set, hv->set); | |
384 | AND_HARD_REG_SET (temp_set, node->hard_regs->set); | |
27508f5f VM |
385 | hv2 = add_allocno_hard_regs (temp_set, hv->cost); |
386 | add_allocno_hard_regs_to_forest (&node->first, hv2); | |
1756cb66 VM |
387 | } |
388 | } | |
9771b263 | 389 | if (hard_regs_node_vec.length () |
1756cb66 VM |
390 | > start + 1) |
391 | { | |
392 | /* Create a new node which contains nodes in hard_regs_node_vec. */ | |
393 | CLEAR_HARD_REG_SET (temp_set); | |
394 | for (i = start; | |
9771b263 | 395 | i < hard_regs_node_vec.length (); |
1756cb66 VM |
396 | i++) |
397 | { | |
9771b263 | 398 | node = hard_regs_node_vec[i]; |
1756cb66 VM |
399 | IOR_HARD_REG_SET (temp_set, node->hard_regs->set); |
400 | } | |
27508f5f VM |
401 | hv = add_allocno_hard_regs (temp_set, hv->cost); |
402 | new_node = create_new_allocno_hard_regs_node (hv); | |
1756cb66 VM |
403 | prev = NULL; |
404 | for (i = start; | |
9771b263 | 405 | i < hard_regs_node_vec.length (); |
1756cb66 VM |
406 | i++) |
407 | { | |
9771b263 | 408 | node = hard_regs_node_vec[i]; |
1756cb66 VM |
409 | if (node->prev == NULL) |
410 | *roots = node->next; | |
411 | else | |
412 | node->prev->next = node->next; | |
413 | if (node->next != NULL) | |
414 | node->next->prev = node->prev; | |
415 | if (prev == NULL) | |
416 | new_node->first = node; | |
417 | else | |
418 | prev->next = node; | |
419 | node->prev = prev; | |
420 | node->next = NULL; | |
421 | prev = node; | |
422 | } | |
27508f5f | 423 | add_new_allocno_hard_regs_node_to_forest (roots, new_node); |
1756cb66 | 424 | } |
9771b263 | 425 | hard_regs_node_vec.truncate (start); |
1756cb66 VM |
426 | } |
427 | ||
27508f5f | 428 | /* Add allocno hard registers nodes starting with the forest level |
1756cb66 VM |
429 | given by FIRST which contains biggest set inside SET. */ |
430 | static void | |
27508f5f | 431 | collect_allocno_hard_regs_cover (allocno_hard_regs_node_t first, |
1756cb66 VM |
432 | HARD_REG_SET set) |
433 | { | |
27508f5f | 434 | allocno_hard_regs_node_t node; |
1756cb66 VM |
435 | |
436 | ira_assert (first != NULL); | |
437 | for (node = first; node != NULL; node = node->next) | |
438 | if (hard_reg_set_subset_p (node->hard_regs->set, set)) | |
9771b263 | 439 | hard_regs_node_vec.safe_push (node); |
1756cb66 | 440 | else if (hard_reg_set_intersect_p (set, node->hard_regs->set)) |
27508f5f | 441 | collect_allocno_hard_regs_cover (node->first, set); |
1756cb66 VM |
442 | } |
443 | ||
27508f5f | 444 | /* Set up field parent as PARENT in all allocno hard registers nodes |
1756cb66 VM |
445 | in forest given by FIRST. */ |
446 | static void | |
27508f5f VM |
447 | setup_allocno_hard_regs_nodes_parent (allocno_hard_regs_node_t first, |
448 | allocno_hard_regs_node_t parent) | |
1756cb66 | 449 | { |
27508f5f | 450 | allocno_hard_regs_node_t node; |
1756cb66 VM |
451 | |
452 | for (node = first; node != NULL; node = node->next) | |
453 | { | |
454 | node->parent = parent; | |
27508f5f | 455 | setup_allocno_hard_regs_nodes_parent (node->first, node); |
1756cb66 VM |
456 | } |
457 | } | |
458 | ||
27508f5f | 459 | /* Return allocno hard registers node which is a first common ancestor |
1756cb66 | 460 | node of FIRST and SECOND in the forest. */ |
27508f5f VM |
461 | static allocno_hard_regs_node_t |
462 | first_common_ancestor_node (allocno_hard_regs_node_t first, | |
463 | allocno_hard_regs_node_t second) | |
1756cb66 | 464 | { |
27508f5f | 465 | allocno_hard_regs_node_t node; |
1756cb66 VM |
466 | |
467 | node_check_tick++; | |
468 | for (node = first; node != NULL; node = node->parent) | |
469 | node->check = node_check_tick; | |
470 | for (node = second; node != NULL; node = node->parent) | |
471 | if (node->check == node_check_tick) | |
472 | return node; | |
473 | return first_common_ancestor_node (second, first); | |
474 | } | |
475 | ||
476 | /* Print hard reg set SET to F. */ | |
477 | static void | |
478 | print_hard_reg_set (FILE *f, HARD_REG_SET set, bool new_line_p) | |
479 | { | |
480 | int i, start; | |
481 | ||
482 | for (start = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
483 | { | |
484 | if (TEST_HARD_REG_BIT (set, i)) | |
485 | { | |
486 | if (i == 0 || ! TEST_HARD_REG_BIT (set, i - 1)) | |
487 | start = i; | |
488 | } | |
489 | if (start >= 0 | |
490 | && (i == FIRST_PSEUDO_REGISTER - 1 || ! TEST_HARD_REG_BIT (set, i))) | |
491 | { | |
492 | if (start == i - 1) | |
493 | fprintf (f, " %d", start); | |
494 | else if (start == i - 2) | |
495 | fprintf (f, " %d %d", start, start + 1); | |
496 | else | |
497 | fprintf (f, " %d-%d", start, i - 1); | |
498 | start = -1; | |
499 | } | |
500 | } | |
501 | if (new_line_p) | |
502 | fprintf (f, "\n"); | |
503 | } | |
504 | ||
27508f5f | 505 | /* Print allocno hard register subforest given by ROOTS and its LEVEL |
1756cb66 VM |
506 | to F. */ |
507 | static void | |
27508f5f | 508 | print_hard_regs_subforest (FILE *f, allocno_hard_regs_node_t roots, |
1756cb66 VM |
509 | int level) |
510 | { | |
511 | int i; | |
27508f5f | 512 | allocno_hard_regs_node_t node; |
1756cb66 VM |
513 | |
514 | for (node = roots; node != NULL; node = node->next) | |
515 | { | |
516 | fprintf (f, " "); | |
517 | for (i = 0; i < level * 2; i++) | |
518 | fprintf (f, " "); | |
519 | fprintf (f, "%d:(", node->preorder_num); | |
520 | print_hard_reg_set (f, node->hard_regs->set, false); | |
16998094 | 521 | fprintf (f, ")@%" PRId64"\n", node->hard_regs->cost); |
1756cb66 VM |
522 | print_hard_regs_subforest (f, node->first, level + 1); |
523 | } | |
524 | } | |
525 | ||
27508f5f | 526 | /* Print the allocno hard register forest to F. */ |
1756cb66 VM |
527 | static void |
528 | print_hard_regs_forest (FILE *f) | |
529 | { | |
530 | fprintf (f, " Hard reg set forest:\n"); | |
531 | print_hard_regs_subforest (f, hard_regs_roots, 1); | |
532 | } | |
533 | ||
27508f5f | 534 | /* Print the allocno hard register forest to stderr. */ |
1756cb66 VM |
535 | void |
536 | ira_debug_hard_regs_forest (void) | |
537 | { | |
538 | print_hard_regs_forest (stderr); | |
539 | } | |
540 | ||
27508f5f | 541 | /* Remove unused allocno hard registers nodes from forest given by its |
1756cb66 VM |
542 | *ROOTS. */ |
543 | static void | |
27508f5f | 544 | remove_unused_allocno_hard_regs_nodes (allocno_hard_regs_node_t *roots) |
1756cb66 | 545 | { |
27508f5f | 546 | allocno_hard_regs_node_t node, prev, next, last; |
1756cb66 VM |
547 | |
548 | for (prev = NULL, node = *roots; node != NULL; node = next) | |
549 | { | |
550 | next = node->next; | |
551 | if (node->used_p) | |
552 | { | |
27508f5f | 553 | remove_unused_allocno_hard_regs_nodes (&node->first); |
1756cb66 VM |
554 | prev = node; |
555 | } | |
556 | else | |
557 | { | |
558 | for (last = node->first; | |
559 | last != NULL && last->next != NULL; | |
560 | last = last->next) | |
561 | ; | |
562 | if (last != NULL) | |
563 | { | |
564 | if (prev == NULL) | |
565 | *roots = node->first; | |
566 | else | |
567 | prev->next = node->first; | |
568 | if (next != NULL) | |
569 | next->prev = last; | |
570 | last->next = next; | |
571 | next = node->first; | |
572 | } | |
573 | else | |
574 | { | |
575 | if (prev == NULL) | |
576 | *roots = next; | |
577 | else | |
578 | prev->next = next; | |
579 | if (next != NULL) | |
580 | next->prev = prev; | |
581 | } | |
582 | ira_free (node); | |
583 | } | |
584 | } | |
585 | } | |
586 | ||
27508f5f | 587 | /* Set up fields preorder_num starting with START_NUM in all allocno |
1756cb66 VM |
588 | hard registers nodes in forest given by FIRST. Return biggest set |
589 | PREORDER_NUM increased by 1. */ | |
590 | static int | |
27508f5f VM |
591 | enumerate_allocno_hard_regs_nodes (allocno_hard_regs_node_t first, |
592 | allocno_hard_regs_node_t parent, | |
593 | int start_num) | |
1756cb66 | 594 | { |
27508f5f | 595 | allocno_hard_regs_node_t node; |
1756cb66 VM |
596 | |
597 | for (node = first; node != NULL; node = node->next) | |
598 | { | |
599 | node->preorder_num = start_num++; | |
600 | node->parent = parent; | |
27508f5f VM |
601 | start_num = enumerate_allocno_hard_regs_nodes (node->first, node, |
602 | start_num); | |
1756cb66 VM |
603 | } |
604 | return start_num; | |
605 | } | |
606 | ||
27508f5f VM |
607 | /* Number of allocno hard registers nodes in the forest. */ |
608 | static int allocno_hard_regs_nodes_num; | |
1756cb66 | 609 | |
27508f5f VM |
610 | /* Table preorder number of allocno hard registers node in the forest |
611 | -> the allocno hard registers node. */ | |
612 | static allocno_hard_regs_node_t *allocno_hard_regs_nodes; | |
1756cb66 VM |
613 | |
614 | /* See below. */ | |
27508f5f | 615 | typedef struct allocno_hard_regs_subnode *allocno_hard_regs_subnode_t; |
1756cb66 VM |
616 | |
617 | /* The structure is used to describes all subnodes (not only immediate | |
27508f5f | 618 | ones) in the mentioned above tree for given allocno hard register |
1756cb66 VM |
619 | node. The usage of such data accelerates calculation of |
620 | colorability of given allocno. */ | |
27508f5f | 621 | struct allocno_hard_regs_subnode |
1756cb66 VM |
622 | { |
623 | /* The conflict size of conflicting allocnos whose hard register | |
624 | sets are equal sets (plus supersets if given node is given | |
27508f5f | 625 | allocno hard registers node) of one in the given node. */ |
1756cb66 VM |
626 | int left_conflict_size; |
627 | /* The summary conflict size of conflicting allocnos whose hard | |
628 | register sets are strict subsets of one in the given node. | |
629 | Overall conflict size is | |
630 | left_conflict_subnodes_size | |
631 | + MIN (max_node_impact - left_conflict_subnodes_size, | |
632 | left_conflict_size) | |
633 | */ | |
634 | short left_conflict_subnodes_size; | |
635 | short max_node_impact; | |
636 | }; | |
637 | ||
27508f5f VM |
638 | /* Container for hard regs subnodes of all allocnos. */ |
639 | static allocno_hard_regs_subnode_t allocno_hard_regs_subnodes; | |
1756cb66 | 640 | |
27508f5f VM |
641 | /* Table (preorder number of allocno hard registers node in the |
642 | forest, preorder number of allocno hard registers subnode) -> index | |
1756cb66 VM |
643 | of the subnode relative to the node. -1 if it is not a |
644 | subnode. */ | |
27508f5f | 645 | static int *allocno_hard_regs_subnode_index; |
1756cb66 | 646 | |
27508f5f VM |
647 | /* Setup arrays ALLOCNO_HARD_REGS_NODES and |
648 | ALLOCNO_HARD_REGS_SUBNODE_INDEX. */ | |
1756cb66 | 649 | static void |
27508f5f | 650 | setup_allocno_hard_regs_subnode_index (allocno_hard_regs_node_t first) |
1756cb66 | 651 | { |
27508f5f | 652 | allocno_hard_regs_node_t node, parent; |
1756cb66 VM |
653 | int index; |
654 | ||
655 | for (node = first; node != NULL; node = node->next) | |
656 | { | |
27508f5f | 657 | allocno_hard_regs_nodes[node->preorder_num] = node; |
1756cb66 VM |
658 | for (parent = node; parent != NULL; parent = parent->parent) |
659 | { | |
27508f5f VM |
660 | index = parent->preorder_num * allocno_hard_regs_nodes_num; |
661 | allocno_hard_regs_subnode_index[index + node->preorder_num] | |
1756cb66 VM |
662 | = node->preorder_num - parent->preorder_num; |
663 | } | |
27508f5f | 664 | setup_allocno_hard_regs_subnode_index (node->first); |
1756cb66 VM |
665 | } |
666 | } | |
667 | ||
27508f5f | 668 | /* Count all allocno hard registers nodes in tree ROOT. */ |
1756cb66 | 669 | static int |
27508f5f | 670 | get_allocno_hard_regs_subnodes_num (allocno_hard_regs_node_t root) |
1756cb66 VM |
671 | { |
672 | int len = 1; | |
673 | ||
674 | for (root = root->first; root != NULL; root = root->next) | |
27508f5f | 675 | len += get_allocno_hard_regs_subnodes_num (root); |
1756cb66 VM |
676 | return len; |
677 | } | |
678 | ||
27508f5f | 679 | /* Build the forest of allocno hard registers nodes and assign each |
1756cb66 VM |
680 | allocno a node from the forest. */ |
681 | static void | |
27508f5f | 682 | form_allocno_hard_regs_nodes_forest (void) |
1756cb66 VM |
683 | { |
684 | unsigned int i, j, size, len; | |
27508f5f | 685 | int start; |
1756cb66 | 686 | ira_allocno_t a; |
27508f5f | 687 | allocno_hard_regs_t hv; |
1756cb66 VM |
688 | bitmap_iterator bi; |
689 | HARD_REG_SET temp; | |
27508f5f VM |
690 | allocno_hard_regs_node_t node, allocno_hard_regs_node; |
691 | allocno_color_data_t allocno_data; | |
1756cb66 VM |
692 | |
693 | node_check_tick = 0; | |
27508f5f | 694 | init_allocno_hard_regs (); |
1756cb66 | 695 | hard_regs_roots = NULL; |
9771b263 | 696 | hard_regs_node_vec.create (100); |
1756cb66 VM |
697 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
698 | if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i)) | |
699 | { | |
700 | CLEAR_HARD_REG_SET (temp); | |
701 | SET_HARD_REG_BIT (temp, i); | |
27508f5f VM |
702 | hv = add_allocno_hard_regs (temp, 0); |
703 | node = create_new_allocno_hard_regs_node (hv); | |
704 | add_new_allocno_hard_regs_node_to_forest (&hard_regs_roots, node); | |
1756cb66 | 705 | } |
9771b263 | 706 | start = allocno_hard_regs_vec.length (); |
1756cb66 VM |
707 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) |
708 | { | |
709 | a = ira_allocnos[i]; | |
27508f5f VM |
710 | allocno_data = ALLOCNO_COLOR_DATA (a); |
711 | ||
712 | if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs)) | |
713 | continue; | |
714 | hv = (add_allocno_hard_regs | |
715 | (allocno_data->profitable_hard_regs, | |
716 | ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a))); | |
1756cb66 VM |
717 | } |
718 | SET_HARD_REG_SET (temp); | |
719 | AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); | |
27508f5f | 720 | add_allocno_hard_regs (temp, 0); |
9771b263 DN |
721 | qsort (allocno_hard_regs_vec.address () + start, |
722 | allocno_hard_regs_vec.length () - start, | |
27508f5f | 723 | sizeof (allocno_hard_regs_t), allocno_hard_regs_compare); |
1756cb66 | 724 | for (i = start; |
9771b263 | 725 | allocno_hard_regs_vec.iterate (i, &hv); |
1756cb66 VM |
726 | i++) |
727 | { | |
27508f5f | 728 | add_allocno_hard_regs_to_forest (&hard_regs_roots, hv); |
9771b263 | 729 | ira_assert (hard_regs_node_vec.length () == 0); |
1756cb66 VM |
730 | } |
731 | /* We need to set up parent fields for right work of | |
732 | first_common_ancestor_node. */ | |
27508f5f | 733 | setup_allocno_hard_regs_nodes_parent (hard_regs_roots, NULL); |
1756cb66 VM |
734 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) |
735 | { | |
736 | a = ira_allocnos[i]; | |
27508f5f VM |
737 | allocno_data = ALLOCNO_COLOR_DATA (a); |
738 | if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs)) | |
739 | continue; | |
9771b263 | 740 | hard_regs_node_vec.truncate (0); |
27508f5f VM |
741 | collect_allocno_hard_regs_cover (hard_regs_roots, |
742 | allocno_data->profitable_hard_regs); | |
743 | allocno_hard_regs_node = NULL; | |
9771b263 | 744 | for (j = 0; hard_regs_node_vec.iterate (j, &node); j++) |
27508f5f VM |
745 | allocno_hard_regs_node |
746 | = (j == 0 | |
747 | ? node | |
748 | : first_common_ancestor_node (node, allocno_hard_regs_node)); | |
749 | /* That is a temporary storage. */ | |
750 | allocno_hard_regs_node->used_p = true; | |
751 | allocno_data->hard_regs_node = allocno_hard_regs_node; | |
1756cb66 VM |
752 | } |
753 | ira_assert (hard_regs_roots->next == NULL); | |
754 | hard_regs_roots->used_p = true; | |
27508f5f VM |
755 | remove_unused_allocno_hard_regs_nodes (&hard_regs_roots); |
756 | allocno_hard_regs_nodes_num | |
757 | = enumerate_allocno_hard_regs_nodes (hard_regs_roots, NULL, 0); | |
758 | allocno_hard_regs_nodes | |
759 | = ((allocno_hard_regs_node_t *) | |
760 | ira_allocate (allocno_hard_regs_nodes_num | |
761 | * sizeof (allocno_hard_regs_node_t))); | |
762 | size = allocno_hard_regs_nodes_num * allocno_hard_regs_nodes_num; | |
763 | allocno_hard_regs_subnode_index | |
1756cb66 VM |
764 | = (int *) ira_allocate (size * sizeof (int)); |
765 | for (i = 0; i < size; i++) | |
27508f5f VM |
766 | allocno_hard_regs_subnode_index[i] = -1; |
767 | setup_allocno_hard_regs_subnode_index (hard_regs_roots); | |
1756cb66 VM |
768 | start = 0; |
769 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) | |
770 | { | |
771 | a = ira_allocnos[i]; | |
27508f5f VM |
772 | allocno_data = ALLOCNO_COLOR_DATA (a); |
773 | if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs)) | |
774 | continue; | |
775 | len = get_allocno_hard_regs_subnodes_num (allocno_data->hard_regs_node); | |
776 | allocno_data->hard_regs_subnodes_start = start; | |
777 | allocno_data->hard_regs_subnodes_num = len; | |
778 | start += len; | |
1756cb66 | 779 | } |
27508f5f VM |
780 | allocno_hard_regs_subnodes |
781 | = ((allocno_hard_regs_subnode_t) | |
782 | ira_allocate (sizeof (struct allocno_hard_regs_subnode) * start)); | |
9771b263 | 783 | hard_regs_node_vec.release (); |
1756cb66 VM |
784 | } |
785 | ||
27508f5f | 786 | /* Free tree of allocno hard registers nodes given by its ROOT. */ |
1756cb66 | 787 | static void |
27508f5f | 788 | finish_allocno_hard_regs_nodes_tree (allocno_hard_regs_node_t root) |
1756cb66 | 789 | { |
27508f5f | 790 | allocno_hard_regs_node_t child, next; |
1756cb66 VM |
791 | |
792 | for (child = root->first; child != NULL; child = next) | |
793 | { | |
794 | next = child->next; | |
27508f5f | 795 | finish_allocno_hard_regs_nodes_tree (child); |
1756cb66 VM |
796 | } |
797 | ira_free (root); | |
798 | } | |
799 | ||
27508f5f | 800 | /* Finish work with the forest of allocno hard registers nodes. */ |
1756cb66 | 801 | static void |
27508f5f | 802 | finish_allocno_hard_regs_nodes_forest (void) |
1756cb66 | 803 | { |
27508f5f | 804 | allocno_hard_regs_node_t node, next; |
1756cb66 | 805 | |
27508f5f | 806 | ira_free (allocno_hard_regs_subnodes); |
1756cb66 VM |
807 | for (node = hard_regs_roots; node != NULL; node = next) |
808 | { | |
809 | next = node->next; | |
27508f5f | 810 | finish_allocno_hard_regs_nodes_tree (node); |
1756cb66 | 811 | } |
27508f5f VM |
812 | ira_free (allocno_hard_regs_nodes); |
813 | ira_free (allocno_hard_regs_subnode_index); | |
814 | finish_allocno_hard_regs (); | |
1756cb66 VM |
815 | } |
816 | ||
817 | /* Set up left conflict sizes and left conflict subnodes sizes of hard | |
818 | registers subnodes of allocno A. Return TRUE if allocno A is | |
819 | trivially colorable. */ | |
3553f0bb | 820 | static bool |
1756cb66 | 821 | setup_left_conflict_sizes_p (ira_allocno_t a) |
3553f0bb | 822 | { |
27508f5f VM |
823 | int i, k, nobj, start; |
824 | int conflict_size, left_conflict_subnodes_size, node_preorder_num; | |
1756cb66 | 825 | allocno_color_data_t data; |
27508f5f VM |
826 | HARD_REG_SET profitable_hard_regs; |
827 | allocno_hard_regs_subnode_t subnodes; | |
828 | allocno_hard_regs_node_t node; | |
829 | HARD_REG_SET node_set; | |
ac0ab4f7 | 830 | |
1756cb66 | 831 | nobj = ALLOCNO_NUM_OBJECTS (a); |
1756cb66 | 832 | data = ALLOCNO_COLOR_DATA (a); |
27508f5f VM |
833 | subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start; |
834 | COPY_HARD_REG_SET (profitable_hard_regs, data->profitable_hard_regs); | |
835 | node = data->hard_regs_node; | |
836 | node_preorder_num = node->preorder_num; | |
837 | COPY_HARD_REG_SET (node_set, node->hard_regs->set); | |
838 | node_check_tick++; | |
1756cb66 VM |
839 | for (k = 0; k < nobj; k++) |
840 | { | |
1756cb66 VM |
841 | ira_object_t obj = ALLOCNO_OBJECT (a, k); |
842 | ira_object_t conflict_obj; | |
843 | ira_object_conflict_iterator oci; | |
1756cb66 | 844 | |
1756cb66 VM |
845 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) |
846 | { | |
847 | int size; | |
848 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); | |
27508f5f | 849 | allocno_hard_regs_node_t conflict_node, temp_node; |
1756cb66 | 850 | HARD_REG_SET conflict_node_set; |
27508f5f | 851 | allocno_color_data_t conflict_data; |
1756cb66 | 852 | |
27508f5f | 853 | conflict_data = ALLOCNO_COLOR_DATA (conflict_a); |
1756cb66 VM |
854 | if (! ALLOCNO_COLOR_DATA (conflict_a)->in_graph_p |
855 | || ! hard_reg_set_intersect_p (profitable_hard_regs, | |
27508f5f | 856 | conflict_data |
1756cb66 VM |
857 | ->profitable_hard_regs)) |
858 | continue; | |
27508f5f | 859 | conflict_node = conflict_data->hard_regs_node; |
1756cb66 VM |
860 | COPY_HARD_REG_SET (conflict_node_set, conflict_node->hard_regs->set); |
861 | if (hard_reg_set_subset_p (node_set, conflict_node_set)) | |
862 | temp_node = node; | |
863 | else | |
864 | { | |
865 | ira_assert (hard_reg_set_subset_p (conflict_node_set, node_set)); | |
866 | temp_node = conflict_node; | |
867 | } | |
868 | if (temp_node->check != node_check_tick) | |
869 | { | |
870 | temp_node->check = node_check_tick; | |
871 | temp_node->conflict_size = 0; | |
872 | } | |
873 | size = (ira_reg_class_max_nregs | |
874 | [ALLOCNO_CLASS (conflict_a)][ALLOCNO_MODE (conflict_a)]); | |
875 | if (ALLOCNO_NUM_OBJECTS (conflict_a) > 1) | |
876 | /* We will deal with the subwords individually. */ | |
877 | size = 1; | |
878 | temp_node->conflict_size += size; | |
879 | } | |
27508f5f VM |
880 | } |
881 | for (i = 0; i < data->hard_regs_subnodes_num; i++) | |
882 | { | |
883 | allocno_hard_regs_node_t temp_node; | |
884 | ||
885 | temp_node = allocno_hard_regs_nodes[i + node_preorder_num]; | |
886 | ira_assert (temp_node->preorder_num == i + node_preorder_num); | |
887 | subnodes[i].left_conflict_size = (temp_node->check != node_check_tick | |
888 | ? 0 : temp_node->conflict_size); | |
889 | if (hard_reg_set_subset_p (temp_node->hard_regs->set, | |
890 | profitable_hard_regs)) | |
891 | subnodes[i].max_node_impact = temp_node->hard_regs_num; | |
892 | else | |
1756cb66 | 893 | { |
27508f5f VM |
894 | HARD_REG_SET temp_set; |
895 | int j, n, hard_regno; | |
896 | enum reg_class aclass; | |
897 | ||
898 | COPY_HARD_REG_SET (temp_set, temp_node->hard_regs->set); | |
899 | AND_HARD_REG_SET (temp_set, profitable_hard_regs); | |
900 | aclass = ALLOCNO_CLASS (a); | |
901 | for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--) | |
1756cb66 | 902 | { |
27508f5f VM |
903 | hard_regno = ira_class_hard_regs[aclass][j]; |
904 | if (TEST_HARD_REG_BIT (temp_set, hard_regno)) | |
905 | n++; | |
1756cb66 | 906 | } |
27508f5f | 907 | subnodes[i].max_node_impact = n; |
1756cb66 | 908 | } |
27508f5f VM |
909 | subnodes[i].left_conflict_subnodes_size = 0; |
910 | } | |
911 | start = node_preorder_num * allocno_hard_regs_nodes_num; | |
6e3957da | 912 | for (i = data->hard_regs_subnodes_num - 1; i > 0; i--) |
27508f5f VM |
913 | { |
914 | int size, parent_i; | |
915 | allocno_hard_regs_node_t parent; | |
916 | ||
917 | size = (subnodes[i].left_conflict_subnodes_size | |
918 | + MIN (subnodes[i].max_node_impact | |
919 | - subnodes[i].left_conflict_subnodes_size, | |
920 | subnodes[i].left_conflict_size)); | |
921 | parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent; | |
6e3957da | 922 | gcc_checking_assert(parent); |
27508f5f VM |
923 | parent_i |
924 | = allocno_hard_regs_subnode_index[start + parent->preorder_num]; | |
6e3957da | 925 | gcc_checking_assert(parent_i >= 0); |
27508f5f | 926 | subnodes[parent_i].left_conflict_subnodes_size += size; |
1756cb66 | 927 | } |
27508f5f VM |
928 | left_conflict_subnodes_size = subnodes[0].left_conflict_subnodes_size; |
929 | conflict_size | |
32721b2c ZZ |
930 | = (left_conflict_subnodes_size |
931 | + MIN (subnodes[0].max_node_impact - left_conflict_subnodes_size, | |
932 | subnodes[0].left_conflict_size)); | |
1756cb66 VM |
933 | conflict_size += ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]; |
934 | data->colorable_p = conflict_size <= data->available_regs_num; | |
935 | return data->colorable_p; | |
936 | } | |
ac0ab4f7 | 937 | |
1756cb66 | 938 | /* Update left conflict sizes of hard registers subnodes of allocno A |
27508f5f VM |
939 | after removing allocno REMOVED_A with SIZE from the conflict graph. |
940 | Return TRUE if A is trivially colorable. */ | |
1756cb66 VM |
941 | static bool |
942 | update_left_conflict_sizes_p (ira_allocno_t a, | |
27508f5f | 943 | ira_allocno_t removed_a, int size) |
1756cb66 | 944 | { |
27508f5f | 945 | int i, conflict_size, before_conflict_size, diff, start; |
1756cb66 | 946 | int node_preorder_num, parent_i; |
27508f5f VM |
947 | allocno_hard_regs_node_t node, removed_node, parent; |
948 | allocno_hard_regs_subnode_t subnodes; | |
1756cb66 | 949 | allocno_color_data_t data = ALLOCNO_COLOR_DATA (a); |
1756cb66 VM |
950 | |
951 | ira_assert (! data->colorable_p); | |
27508f5f VM |
952 | node = data->hard_regs_node; |
953 | node_preorder_num = node->preorder_num; | |
954 | removed_node = ALLOCNO_COLOR_DATA (removed_a)->hard_regs_node; | |
955 | ira_assert (hard_reg_set_subset_p (removed_node->hard_regs->set, | |
956 | node->hard_regs->set) | |
957 | || hard_reg_set_subset_p (node->hard_regs->set, | |
958 | removed_node->hard_regs->set)); | |
959 | start = node_preorder_num * allocno_hard_regs_nodes_num; | |
960 | i = allocno_hard_regs_subnode_index[start + removed_node->preorder_num]; | |
961 | if (i < 0) | |
962 | i = 0; | |
963 | subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start; | |
964 | before_conflict_size | |
965 | = (subnodes[i].left_conflict_subnodes_size | |
966 | + MIN (subnodes[i].max_node_impact | |
967 | - subnodes[i].left_conflict_subnodes_size, | |
968 | subnodes[i].left_conflict_size)); | |
969 | subnodes[i].left_conflict_size -= size; | |
970 | for (;;) | |
ac0ab4f7 | 971 | { |
27508f5f VM |
972 | conflict_size |
973 | = (subnodes[i].left_conflict_subnodes_size | |
974 | + MIN (subnodes[i].max_node_impact | |
975 | - subnodes[i].left_conflict_subnodes_size, | |
976 | subnodes[i].left_conflict_size)); | |
977 | if ((diff = before_conflict_size - conflict_size) == 0) | |
978 | break; | |
979 | ira_assert (conflict_size < before_conflict_size); | |
980 | parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent; | |
981 | if (parent == NULL) | |
982 | break; | |
983 | parent_i | |
984 | = allocno_hard_regs_subnode_index[start + parent->preorder_num]; | |
985 | if (parent_i < 0) | |
986 | break; | |
987 | i = parent_i; | |
1756cb66 VM |
988 | before_conflict_size |
989 | = (subnodes[i].left_conflict_subnodes_size | |
990 | + MIN (subnodes[i].max_node_impact | |
991 | - subnodes[i].left_conflict_subnodes_size, | |
992 | subnodes[i].left_conflict_size)); | |
27508f5f | 993 | subnodes[i].left_conflict_subnodes_size -= diff; |
ac0ab4f7 | 994 | } |
27508f5f VM |
995 | if (i != 0 |
996 | || (conflict_size | |
997 | + ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)] | |
998 | > data->available_regs_num)) | |
999 | return false; | |
1000 | data->colorable_p = true; | |
1001 | return true; | |
3553f0bb VM |
1002 | } |
1003 | ||
27508f5f | 1004 | /* Return true if allocno A has empty profitable hard regs. */ |
3553f0bb | 1005 | static bool |
1756cb66 | 1006 | empty_profitable_hard_regs (ira_allocno_t a) |
3553f0bb | 1007 | { |
27508f5f | 1008 | allocno_color_data_t data = ALLOCNO_COLOR_DATA (a); |
1756cb66 | 1009 | |
27508f5f | 1010 | return hard_reg_set_empty_p (data->profitable_hard_regs); |
3553f0bb VM |
1011 | } |
1012 | ||
1756cb66 VM |
1013 | /* Set up profitable hard registers for each allocno being |
1014 | colored. */ | |
1015 | static void | |
1016 | setup_profitable_hard_regs (void) | |
1017 | { | |
1018 | unsigned int i; | |
1019 | int j, k, nobj, hard_regno, nregs, class_size; | |
1020 | ira_allocno_t a; | |
1021 | bitmap_iterator bi; | |
1022 | enum reg_class aclass; | |
ef4bddc2 | 1023 | machine_mode mode; |
27508f5f | 1024 | allocno_color_data_t data; |
1756cb66 | 1025 | |
8d189b3f VM |
1026 | /* Initial set up from allocno classes and explicitly conflicting |
1027 | hard regs. */ | |
1756cb66 VM |
1028 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) |
1029 | { | |
1030 | a = ira_allocnos[i]; | |
1031 | if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS) | |
1032 | continue; | |
27508f5f VM |
1033 | data = ALLOCNO_COLOR_DATA (a); |
1034 | if (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL | |
b81a2f0d VM |
1035 | && ALLOCNO_CLASS_COST (a) > ALLOCNO_MEMORY_COST (a) |
1036 | /* Do not empty profitable regs for static chain pointer | |
1037 | pseudo when non-local goto is used. */ | |
1038 | && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a))) | |
27508f5f VM |
1039 | CLEAR_HARD_REG_SET (data->profitable_hard_regs); |
1040 | else | |
1756cb66 | 1041 | { |
a2c19e93 | 1042 | mode = ALLOCNO_MODE (a); |
27508f5f | 1043 | COPY_HARD_REG_SET (data->profitable_hard_regs, |
a2c19e93 | 1044 | ira_useful_class_mode_regs[aclass][mode]); |
27508f5f VM |
1045 | nobj = ALLOCNO_NUM_OBJECTS (a); |
1046 | for (k = 0; k < nobj; k++) | |
1756cb66 | 1047 | { |
27508f5f VM |
1048 | ira_object_t obj = ALLOCNO_OBJECT (a, k); |
1049 | ||
1050 | AND_COMPL_HARD_REG_SET (data->profitable_hard_regs, | |
1756cb66 VM |
1051 | OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)); |
1052 | } | |
1053 | } | |
1054 | } | |
8d189b3f | 1055 | /* Exclude hard regs already assigned for conflicting objects. */ |
1756cb66 VM |
1056 | EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, i, bi) |
1057 | { | |
1058 | a = ira_allocnos[i]; | |
1059 | if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS | |
1060 | || ! ALLOCNO_ASSIGNED_P (a) | |
1061 | || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0) | |
1062 | continue; | |
1063 | mode = ALLOCNO_MODE (a); | |
1064 | nregs = hard_regno_nregs[hard_regno][mode]; | |
1065 | nobj = ALLOCNO_NUM_OBJECTS (a); | |
1066 | for (k = 0; k < nobj; k++) | |
1067 | { | |
1068 | ira_object_t obj = ALLOCNO_OBJECT (a, k); | |
1069 | ira_object_t conflict_obj; | |
1070 | ira_object_conflict_iterator oci; | |
1071 | ||
1072 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) | |
1073 | { | |
27508f5f VM |
1074 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); |
1075 | ||
1076 | /* We can process the conflict allocno repeatedly with | |
1077 | the same result. */ | |
1756cb66 VM |
1078 | if (nregs == nobj && nregs > 1) |
1079 | { | |
1080 | int num = OBJECT_SUBWORD (conflict_obj); | |
1081 | ||
2805e6c0 | 1082 | if (REG_WORDS_BIG_ENDIAN) |
1756cb66 | 1083 | CLEAR_HARD_REG_BIT |
27508f5f | 1084 | (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs, |
1756cb66 VM |
1085 | hard_regno + nobj - num - 1); |
1086 | else | |
1087 | CLEAR_HARD_REG_BIT | |
27508f5f | 1088 | (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs, |
1756cb66 VM |
1089 | hard_regno + num); |
1090 | } | |
1091 | else | |
1092 | AND_COMPL_HARD_REG_SET | |
27508f5f | 1093 | (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs, |
1756cb66 VM |
1094 | ira_reg_mode_hard_regset[hard_regno][mode]); |
1095 | } | |
1096 | } | |
1097 | } | |
8d189b3f | 1098 | /* Exclude too costly hard regs. */ |
1756cb66 VM |
1099 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) |
1100 | { | |
1101 | int min_cost = INT_MAX; | |
1102 | int *costs; | |
1103 | ||
1104 | a = ira_allocnos[i]; | |
1105 | if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS | |
1106 | || empty_profitable_hard_regs (a)) | |
1107 | continue; | |
27508f5f | 1108 | data = ALLOCNO_COLOR_DATA (a); |
1756cb66 | 1109 | mode = ALLOCNO_MODE (a); |
27508f5f VM |
1110 | if ((costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a)) != NULL |
1111 | || (costs = ALLOCNO_HARD_REG_COSTS (a)) != NULL) | |
1756cb66 | 1112 | { |
27508f5f VM |
1113 | class_size = ira_class_hard_regs_num[aclass]; |
1114 | for (j = 0; j < class_size; j++) | |
1756cb66 | 1115 | { |
27508f5f VM |
1116 | hard_regno = ira_class_hard_regs[aclass][j]; |
1117 | if (! TEST_HARD_REG_BIT (data->profitable_hard_regs, | |
1118 | hard_regno)) | |
1119 | continue; | |
b81a2f0d VM |
1120 | if (ALLOCNO_UPDATED_MEMORY_COST (a) < costs[j] |
1121 | /* Do not remove HARD_REGNO for static chain pointer | |
1122 | pseudo when non-local goto is used. */ | |
1123 | && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a))) | |
27508f5f VM |
1124 | CLEAR_HARD_REG_BIT (data->profitable_hard_regs, |
1125 | hard_regno); | |
1126 | else if (min_cost > costs[j]) | |
1127 | min_cost = costs[j]; | |
1756cb66 | 1128 | } |
1756cb66 | 1129 | } |
27508f5f | 1130 | else if (ALLOCNO_UPDATED_MEMORY_COST (a) |
b81a2f0d VM |
1131 | < ALLOCNO_UPDATED_CLASS_COST (a) |
1132 | /* Do not empty profitable regs for static chain | |
1133 | pointer pseudo when non-local goto is used. */ | |
1134 | && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a))) | |
27508f5f | 1135 | CLEAR_HARD_REG_SET (data->profitable_hard_regs); |
1756cb66 VM |
1136 | if (ALLOCNO_UPDATED_CLASS_COST (a) > min_cost) |
1137 | ALLOCNO_UPDATED_CLASS_COST (a) = min_cost; | |
1138 | } | |
1139 | } | |
3553f0bb VM |
1140 | |
1141 | \f | |
1142 | ||
058e97ec VM |
1143 | /* This page contains functions used to choose hard registers for |
1144 | allocnos. */ | |
1145 | ||
3b6d1699 | 1146 | /* Pool for update cost records. */ |
fb0b2914 | 1147 | static object_allocator<update_cost_record> update_cost_record_pool |
fcb87c50 | 1148 | ("update cost records"); |
3b6d1699 VM |
1149 | |
1150 | /* Return new update cost record with given params. */ | |
1151 | static struct update_cost_record * | |
1152 | get_update_cost_record (int hard_regno, int divisor, | |
1153 | struct update_cost_record *next) | |
1154 | { | |
1155 | struct update_cost_record *record; | |
1156 | ||
8b17d27f | 1157 | record = update_cost_record_pool.allocate (); |
3b6d1699 VM |
1158 | record->hard_regno = hard_regno; |
1159 | record->divisor = divisor; | |
1160 | record->next = next; | |
1161 | return record; | |
1162 | } | |
1163 | ||
1164 | /* Free memory for all records in LIST. */ | |
1165 | static void | |
1166 | free_update_cost_record_list (struct update_cost_record *list) | |
1167 | { | |
1168 | struct update_cost_record *next; | |
1169 | ||
1170 | while (list != NULL) | |
1171 | { | |
1172 | next = list->next; | |
8b17d27f | 1173 | update_cost_record_pool.remove (list); |
3b6d1699 VM |
1174 | list = next; |
1175 | } | |
1176 | } | |
1177 | ||
1178 | /* Free memory allocated for all update cost records. */ | |
1179 | static void | |
1180 | finish_update_cost_records (void) | |
1181 | { | |
8b17d27f | 1182 | update_cost_record_pool.release (); |
3b6d1699 VM |
1183 | } |
1184 | ||
058e97ec VM |
1185 | /* Array whose element value is TRUE if the corresponding hard |
1186 | register was already allocated for an allocno. */ | |
1187 | static bool allocated_hardreg_p[FIRST_PSEUDO_REGISTER]; | |
1188 | ||
f754734f | 1189 | /* Describes one element in a queue of allocnos whose costs need to be |
1756cb66 VM |
1190 | updated. Each allocno in the queue is known to have an allocno |
1191 | class. */ | |
f35bf7a9 RS |
1192 | struct update_cost_queue_elem |
1193 | { | |
f754734f RS |
1194 | /* This element is in the queue iff CHECK == update_cost_check. */ |
1195 | int check; | |
1196 | ||
1197 | /* COST_HOP_DIVISOR**N, where N is the length of the shortest path | |
1198 | connecting this allocno to the one being allocated. */ | |
1199 | int divisor; | |
1200 | ||
df3e3493 | 1201 | /* Allocno from which we are chaining costs of connected allocnos. |
3b6d1699 VM |
1202 | It is used not go back in graph of allocnos connected by |
1203 | copies. */ | |
1204 | ira_allocno_t from; | |
1205 | ||
f754734f RS |
1206 | /* The next allocno in the queue, or null if this is the last element. */ |
1207 | ira_allocno_t next; | |
1208 | }; | |
1209 | ||
1210 | /* The first element in a queue of allocnos whose copy costs need to be | |
1211 | updated. Null if the queue is empty. */ | |
1212 | static ira_allocno_t update_cost_queue; | |
1213 | ||
1214 | /* The last element in the queue described by update_cost_queue. | |
1215 | Not valid if update_cost_queue is null. */ | |
1216 | static struct update_cost_queue_elem *update_cost_queue_tail; | |
1217 | ||
1218 | /* A pool of elements in the queue described by update_cost_queue. | |
1219 | Elements are indexed by ALLOCNO_NUM. */ | |
1220 | static struct update_cost_queue_elem *update_cost_queue_elems; | |
058e97ec | 1221 | |
3b6d1699 | 1222 | /* The current value of update_costs_from_copies call count. */ |
058e97ec VM |
1223 | static int update_cost_check; |
1224 | ||
1225 | /* Allocate and initialize data necessary for function | |
c73ccc80 | 1226 | update_costs_from_copies. */ |
058e97ec VM |
1227 | static void |
1228 | initiate_cost_update (void) | |
1229 | { | |
f754734f RS |
1230 | size_t size; |
1231 | ||
1232 | size = ira_allocnos_num * sizeof (struct update_cost_queue_elem); | |
1233 | update_cost_queue_elems | |
1234 | = (struct update_cost_queue_elem *) ira_allocate (size); | |
1235 | memset (update_cost_queue_elems, 0, size); | |
058e97ec VM |
1236 | update_cost_check = 0; |
1237 | } | |
1238 | ||
3b6d1699 | 1239 | /* Deallocate data used by function update_costs_from_copies. */ |
058e97ec VM |
1240 | static void |
1241 | finish_cost_update (void) | |
1242 | { | |
0eeb2240 | 1243 | ira_free (update_cost_queue_elems); |
3b6d1699 | 1244 | finish_update_cost_records (); |
058e97ec VM |
1245 | } |
1246 | ||
a7f32992 VM |
1247 | /* When we traverse allocnos to update hard register costs, the cost |
1248 | divisor will be multiplied by the following macro value for each | |
1249 | hop from given allocno to directly connected allocnos. */ | |
1250 | #define COST_HOP_DIVISOR 4 | |
1251 | ||
f754734f | 1252 | /* Start a new cost-updating pass. */ |
058e97ec | 1253 | static void |
f754734f | 1254 | start_update_cost (void) |
058e97ec | 1255 | { |
f754734f RS |
1256 | update_cost_check++; |
1257 | update_cost_queue = NULL; | |
1258 | } | |
058e97ec | 1259 | |
3b6d1699 | 1260 | /* Add (ALLOCNO, FROM, DIVISOR) to the end of update_cost_queue, unless |
1756cb66 | 1261 | ALLOCNO is already in the queue, or has NO_REGS class. */ |
f754734f | 1262 | static inline void |
3b6d1699 | 1263 | queue_update_cost (ira_allocno_t allocno, ira_allocno_t from, int divisor) |
f754734f RS |
1264 | { |
1265 | struct update_cost_queue_elem *elem; | |
1266 | ||
1267 | elem = &update_cost_queue_elems[ALLOCNO_NUM (allocno)]; | |
1268 | if (elem->check != update_cost_check | |
1756cb66 | 1269 | && ALLOCNO_CLASS (allocno) != NO_REGS) |
058e97ec | 1270 | { |
f754734f | 1271 | elem->check = update_cost_check; |
3b6d1699 | 1272 | elem->from = from; |
f754734f RS |
1273 | elem->divisor = divisor; |
1274 | elem->next = NULL; | |
1275 | if (update_cost_queue == NULL) | |
1276 | update_cost_queue = allocno; | |
058e97ec | 1277 | else |
f754734f RS |
1278 | update_cost_queue_tail->next = allocno; |
1279 | update_cost_queue_tail = elem; | |
058e97ec VM |
1280 | } |
1281 | } | |
1282 | ||
3b6d1699 VM |
1283 | /* Try to remove the first element from update_cost_queue. Return |
1284 | false if the queue was empty, otherwise make (*ALLOCNO, *FROM, | |
1285 | *DIVISOR) describe the removed element. */ | |
f754734f | 1286 | static inline bool |
3b6d1699 | 1287 | get_next_update_cost (ira_allocno_t *allocno, ira_allocno_t *from, int *divisor) |
058e97ec | 1288 | { |
f754734f RS |
1289 | struct update_cost_queue_elem *elem; |
1290 | ||
1291 | if (update_cost_queue == NULL) | |
1292 | return false; | |
1293 | ||
1294 | *allocno = update_cost_queue; | |
1295 | elem = &update_cost_queue_elems[ALLOCNO_NUM (*allocno)]; | |
3b6d1699 | 1296 | *from = elem->from; |
f754734f RS |
1297 | *divisor = elem->divisor; |
1298 | update_cost_queue = elem->next; | |
1299 | return true; | |
058e97ec VM |
1300 | } |
1301 | ||
86f0bef3 VM |
1302 | /* Increase costs of HARD_REGNO by UPDATE_COST and conflict cost by |
1303 | UPDATE_CONFLICT_COST for ALLOCNO. Return true if we really | |
1304 | modified the cost. */ | |
3b6d1699 | 1305 | static bool |
86f0bef3 VM |
1306 | update_allocno_cost (ira_allocno_t allocno, int hard_regno, |
1307 | int update_cost, int update_conflict_cost) | |
3b6d1699 VM |
1308 | { |
1309 | int i; | |
1310 | enum reg_class aclass = ALLOCNO_CLASS (allocno); | |
1311 | ||
1312 | i = ira_class_hard_reg_index[aclass][hard_regno]; | |
1313 | if (i < 0) | |
1314 | return false; | |
1315 | ira_allocate_and_set_or_copy_costs | |
1316 | (&ALLOCNO_UPDATED_HARD_REG_COSTS (allocno), aclass, | |
1317 | ALLOCNO_UPDATED_CLASS_COST (allocno), | |
1318 | ALLOCNO_HARD_REG_COSTS (allocno)); | |
1319 | ira_allocate_and_set_or_copy_costs | |
1320 | (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno), | |
1321 | aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (allocno)); | |
1322 | ALLOCNO_UPDATED_HARD_REG_COSTS (allocno)[i] += update_cost; | |
86f0bef3 | 1323 | ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno)[i] += update_conflict_cost; |
3b6d1699 VM |
1324 | return true; |
1325 | } | |
1326 | ||
1327 | /* Update (decrease if DECR_P) HARD_REGNO cost of allocnos connected | |
1328 | by copies to ALLOCNO to increase chances to remove some copies as | |
1329 | the result of subsequent assignment. Record cost updates if | |
1330 | RECORD_P is true. */ | |
a7f32992 | 1331 | static void |
3b6d1699 VM |
1332 | update_costs_from_allocno (ira_allocno_t allocno, int hard_regno, |
1333 | int divisor, bool decr_p, bool record_p) | |
a7f32992 | 1334 | { |
86f0bef3 | 1335 | int cost, update_cost, update_conflict_cost; |
ef4bddc2 | 1336 | machine_mode mode; |
1756cb66 | 1337 | enum reg_class rclass, aclass; |
3b6d1699 | 1338 | ira_allocno_t another_allocno, from = NULL; |
a7f32992 VM |
1339 | ira_copy_t cp, next_cp; |
1340 | ||
f754734f | 1341 | rclass = REGNO_REG_CLASS (hard_regno); |
f754734f | 1342 | do |
a7f32992 | 1343 | { |
f754734f | 1344 | mode = ALLOCNO_MODE (allocno); |
1756cb66 | 1345 | ira_init_register_move_cost_if_necessary (mode); |
f754734f | 1346 | for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp) |
a7f32992 | 1347 | { |
f754734f | 1348 | if (cp->first == allocno) |
a7f32992 | 1349 | { |
f754734f RS |
1350 | next_cp = cp->next_first_allocno_copy; |
1351 | another_allocno = cp->second; | |
1352 | } | |
1353 | else if (cp->second == allocno) | |
1354 | { | |
1355 | next_cp = cp->next_second_allocno_copy; | |
1356 | another_allocno = cp->first; | |
a7f32992 | 1357 | } |
f754734f RS |
1358 | else |
1359 | gcc_unreachable (); | |
1360 | ||
3b6d1699 VM |
1361 | if (another_allocno == from) |
1362 | continue; | |
1363 | ||
1756cb66 VM |
1364 | aclass = ALLOCNO_CLASS (another_allocno); |
1365 | if (! TEST_HARD_REG_BIT (reg_class_contents[aclass], | |
6042d1dd | 1366 | hard_regno) |
f754734f RS |
1367 | || ALLOCNO_ASSIGNED_P (another_allocno)) |
1368 | continue; | |
1369 | ||
e2323a2b VM |
1370 | if (GET_MODE_SIZE (ALLOCNO_MODE (cp->second)) < GET_MODE_SIZE (mode)) |
1371 | /* If we have different modes use the smallest one. It is | |
1372 | a sub-register move. It is hard to predict what LRA | |
1373 | will reload (the pseudo or its sub-register) but LRA | |
1374 | will try to minimize the data movement. Also for some | |
1375 | register classes bigger modes might be invalid, | |
1376 | e.g. DImode for AREG on x86. For such cases the | |
1377 | register move cost will be maximal. */ | |
1378 | mode = ALLOCNO_MODE (cp->second); | |
1379 | ||
f754734f | 1380 | cost = (cp->second == allocno |
1756cb66 VM |
1381 | ? ira_register_move_cost[mode][rclass][aclass] |
1382 | : ira_register_move_cost[mode][aclass][rclass]); | |
f754734f RS |
1383 | if (decr_p) |
1384 | cost = -cost; | |
1385 | ||
86f0bef3 VM |
1386 | update_conflict_cost = update_cost = cp->freq * cost / divisor; |
1387 | ||
1388 | if (ALLOCNO_COLOR_DATA (another_allocno) != NULL | |
1389 | && (ALLOCNO_COLOR_DATA (allocno)->first_thread_allocno | |
1390 | != ALLOCNO_COLOR_DATA (another_allocno)->first_thread_allocno)) | |
1391 | /* Decrease conflict cost of ANOTHER_ALLOCNO if it is not | |
1392 | in the same allocation thread. */ | |
1393 | update_conflict_cost /= COST_HOP_DIVISOR; | |
1394 | ||
f754734f RS |
1395 | if (update_cost == 0) |
1396 | continue; | |
1397 | ||
86f0bef3 VM |
1398 | if (! update_allocno_cost (another_allocno, hard_regno, |
1399 | update_cost, update_conflict_cost)) | |
1756cb66 | 1400 | continue; |
3b6d1699 VM |
1401 | queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR); |
1402 | if (record_p && ALLOCNO_COLOR_DATA (another_allocno) != NULL) | |
1403 | ALLOCNO_COLOR_DATA (another_allocno)->update_cost_records | |
1404 | = get_update_cost_record (hard_regno, divisor, | |
1405 | ALLOCNO_COLOR_DATA (another_allocno) | |
1406 | ->update_cost_records); | |
a7f32992 | 1407 | } |
a7f32992 | 1408 | } |
3b6d1699 VM |
1409 | while (get_next_update_cost (&allocno, &from, &divisor)); |
1410 | } | |
1411 | ||
1412 | /* Decrease preferred ALLOCNO hard register costs and costs of | |
1413 | allocnos connected to ALLOCNO through copy. */ | |
1414 | static void | |
1415 | update_costs_from_prefs (ira_allocno_t allocno) | |
1416 | { | |
1417 | ira_pref_t pref; | |
1418 | ||
1419 | start_update_cost (); | |
1420 | for (pref = ALLOCNO_PREFS (allocno); pref != NULL; pref = pref->next_pref) | |
1421 | update_costs_from_allocno (allocno, pref->hard_regno, | |
1422 | COST_HOP_DIVISOR, true, true); | |
1423 | } | |
1424 | ||
1425 | /* Update (decrease if DECR_P) the cost of allocnos connected to | |
1426 | ALLOCNO through copies to increase chances to remove some copies as | |
1427 | the result of subsequent assignment. ALLOCNO was just assigned to | |
c73ccc80 | 1428 | a hard register. Record cost updates if RECORD_P is true. */ |
3b6d1699 | 1429 | static void |
c73ccc80 | 1430 | update_costs_from_copies (ira_allocno_t allocno, bool decr_p, bool record_p) |
3b6d1699 VM |
1431 | { |
1432 | int hard_regno; | |
1433 | ||
1434 | hard_regno = ALLOCNO_HARD_REGNO (allocno); | |
1435 | ira_assert (hard_regno >= 0 && ALLOCNO_CLASS (allocno) != NO_REGS); | |
1436 | start_update_cost (); | |
c73ccc80 | 1437 | update_costs_from_allocno (allocno, hard_regno, 1, decr_p, record_p); |
3b6d1699 VM |
1438 | } |
1439 | ||
1440 | /* Restore costs of allocnos connected to ALLOCNO by copies as it was | |
1441 | before updating costs of these allocnos from given allocno. This | |
1442 | is a wise thing to do as if given allocno did not get an expected | |
1443 | hard reg, using smaller cost of the hard reg for allocnos connected | |
1444 | by copies to given allocno becomes actually misleading. Free all | |
1445 | update cost records for ALLOCNO as we don't need them anymore. */ | |
1446 | static void | |
1447 | restore_costs_from_copies (ira_allocno_t allocno) | |
1448 | { | |
1449 | struct update_cost_record *records, *curr; | |
1450 | ||
1451 | if (ALLOCNO_COLOR_DATA (allocno) == NULL) | |
1452 | return; | |
1453 | records = ALLOCNO_COLOR_DATA (allocno)->update_cost_records; | |
1454 | start_update_cost (); | |
1455 | for (curr = records; curr != NULL; curr = curr->next) | |
1456 | update_costs_from_allocno (allocno, curr->hard_regno, | |
1457 | curr->divisor, true, false); | |
1458 | free_update_cost_record_list (records); | |
1459 | ALLOCNO_COLOR_DATA (allocno)->update_cost_records = NULL; | |
f754734f RS |
1460 | } |
1461 | ||
7db7ed3c | 1462 | /* This function updates COSTS (decrease if DECR_P) for hard_registers |
1756cb66 | 1463 | of ACLASS by conflict costs of the unassigned allocnos |
7db7ed3c VM |
1464 | connected by copies with allocnos in update_cost_queue. This |
1465 | update increases chances to remove some copies. */ | |
f754734f | 1466 | static void |
1756cb66 | 1467 | update_conflict_hard_regno_costs (int *costs, enum reg_class aclass, |
7db7ed3c | 1468 | bool decr_p) |
f754734f RS |
1469 | { |
1470 | int i, cost, class_size, freq, mult, div, divisor; | |
7db7ed3c | 1471 | int index, hard_regno; |
f754734f RS |
1472 | int *conflict_costs; |
1473 | bool cont_p; | |
1756cb66 | 1474 | enum reg_class another_aclass; |
3b6d1699 | 1475 | ira_allocno_t allocno, another_allocno, from; |
f754734f RS |
1476 | ira_copy_t cp, next_cp; |
1477 | ||
3b6d1699 | 1478 | while (get_next_update_cost (&allocno, &from, &divisor)) |
f754734f RS |
1479 | for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp) |
1480 | { | |
1481 | if (cp->first == allocno) | |
1482 | { | |
1483 | next_cp = cp->next_first_allocno_copy; | |
1484 | another_allocno = cp->second; | |
1485 | } | |
1486 | else if (cp->second == allocno) | |
1487 | { | |
1488 | next_cp = cp->next_second_allocno_copy; | |
1489 | another_allocno = cp->first; | |
1490 | } | |
1491 | else | |
1492 | gcc_unreachable (); | |
3b6d1699 VM |
1493 | |
1494 | if (another_allocno == from) | |
1495 | continue; | |
1496 | ||
1756cb66 VM |
1497 | another_aclass = ALLOCNO_CLASS (another_allocno); |
1498 | if (! ira_reg_classes_intersect_p[aclass][another_aclass] | |
f754734f | 1499 | || ALLOCNO_ASSIGNED_P (another_allocno) |
1756cb66 | 1500 | || ALLOCNO_COLOR_DATA (another_allocno)->may_be_spilled_p) |
f754734f | 1501 | continue; |
1756cb66 | 1502 | class_size = ira_class_hard_regs_num[another_aclass]; |
f754734f RS |
1503 | ira_allocate_and_copy_costs |
1504 | (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno), | |
1756cb66 | 1505 | another_aclass, ALLOCNO_CONFLICT_HARD_REG_COSTS (another_allocno)); |
f754734f RS |
1506 | conflict_costs |
1507 | = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno); | |
1508 | if (conflict_costs == NULL) | |
1509 | cont_p = true; | |
1510 | else | |
1511 | { | |
1512 | mult = cp->freq; | |
1513 | freq = ALLOCNO_FREQ (another_allocno); | |
1514 | if (freq == 0) | |
1515 | freq = 1; | |
1516 | div = freq * divisor; | |
1517 | cont_p = false; | |
1518 | for (i = class_size - 1; i >= 0; i--) | |
1519 | { | |
1756cb66 | 1520 | hard_regno = ira_class_hard_regs[another_aclass][i]; |
7db7ed3c | 1521 | ira_assert (hard_regno >= 0); |
1756cb66 | 1522 | index = ira_class_hard_reg_index[aclass][hard_regno]; |
7db7ed3c VM |
1523 | if (index < 0) |
1524 | continue; | |
7879aabe | 1525 | cost = (int) (((int64_t) conflict_costs [i] * mult) / div); |
f754734f RS |
1526 | if (cost == 0) |
1527 | continue; | |
1528 | cont_p = true; | |
1529 | if (decr_p) | |
1530 | cost = -cost; | |
7db7ed3c | 1531 | costs[index] += cost; |
f754734f RS |
1532 | } |
1533 | } | |
1534 | /* Probably 5 hops will be enough. */ | |
1535 | if (cont_p | |
1536 | && divisor <= (COST_HOP_DIVISOR | |
1537 | * COST_HOP_DIVISOR | |
1538 | * COST_HOP_DIVISOR | |
1539 | * COST_HOP_DIVISOR)) | |
3b6d1699 | 1540 | queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR); |
f754734f | 1541 | } |
a7f32992 VM |
1542 | } |
1543 | ||
27508f5f VM |
1544 | /* Set up conflicting (through CONFLICT_REGS) for each object of |
1545 | allocno A and the start allocno profitable regs (through | |
1546 | START_PROFITABLE_REGS). Remember that the start profitable regs | |
1547 | exclude hard regs which can not hold value of mode of allocno A. | |
1548 | This covers mostly cases when multi-register value should be | |
1549 | aligned. */ | |
1756cb66 | 1550 | static inline void |
27508f5f VM |
1551 | get_conflict_and_start_profitable_regs (ira_allocno_t a, bool retry_p, |
1552 | HARD_REG_SET *conflict_regs, | |
1553 | HARD_REG_SET *start_profitable_regs) | |
1756cb66 VM |
1554 | { |
1555 | int i, nwords; | |
1556 | ira_object_t obj; | |
1557 | ||
1558 | nwords = ALLOCNO_NUM_OBJECTS (a); | |
1559 | for (i = 0; i < nwords; i++) | |
1560 | { | |
1561 | obj = ALLOCNO_OBJECT (a, i); | |
1562 | COPY_HARD_REG_SET (conflict_regs[i], | |
1563 | OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)); | |
1756cb66 | 1564 | } |
27508f5f VM |
1565 | if (retry_p) |
1566 | { | |
1567 | COPY_HARD_REG_SET (*start_profitable_regs, | |
1568 | reg_class_contents[ALLOCNO_CLASS (a)]); | |
1569 | AND_COMPL_HARD_REG_SET (*start_profitable_regs, | |
1570 | ira_prohibited_class_mode_regs | |
1571 | [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]); | |
1572 | } | |
1573 | else | |
1574 | COPY_HARD_REG_SET (*start_profitable_regs, | |
1575 | ALLOCNO_COLOR_DATA (a)->profitable_hard_regs); | |
1756cb66 VM |
1576 | } |
1577 | ||
27508f5f VM |
1578 | /* Return true if HARD_REGNO is ok for assigning to allocno A with |
1579 | PROFITABLE_REGS and whose objects have CONFLICT_REGS. */ | |
1756cb66 VM |
1580 | static inline bool |
1581 | check_hard_reg_p (ira_allocno_t a, int hard_regno, | |
27508f5f | 1582 | HARD_REG_SET *conflict_regs, HARD_REG_SET profitable_regs) |
1756cb66 VM |
1583 | { |
1584 | int j, nwords, nregs; | |
8d189b3f | 1585 | enum reg_class aclass; |
ef4bddc2 | 1586 | machine_mode mode; |
1756cb66 | 1587 | |
8d189b3f VM |
1588 | aclass = ALLOCNO_CLASS (a); |
1589 | mode = ALLOCNO_MODE (a); | |
1590 | if (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode], | |
1591 | hard_regno)) | |
1592 | return false; | |
27508f5f VM |
1593 | /* Checking only profitable hard regs. */ |
1594 | if (! TEST_HARD_REG_BIT (profitable_regs, hard_regno)) | |
1595 | return false; | |
8d189b3f | 1596 | nregs = hard_regno_nregs[hard_regno][mode]; |
1756cb66 VM |
1597 | nwords = ALLOCNO_NUM_OBJECTS (a); |
1598 | for (j = 0; j < nregs; j++) | |
1599 | { | |
1600 | int k; | |
1601 | int set_to_test_start = 0, set_to_test_end = nwords; | |
1602 | ||
1603 | if (nregs == nwords) | |
1604 | { | |
2805e6c0 | 1605 | if (REG_WORDS_BIG_ENDIAN) |
1756cb66 VM |
1606 | set_to_test_start = nwords - j - 1; |
1607 | else | |
1608 | set_to_test_start = j; | |
1609 | set_to_test_end = set_to_test_start + 1; | |
1610 | } | |
1611 | for (k = set_to_test_start; k < set_to_test_end; k++) | |
27508f5f | 1612 | if (TEST_HARD_REG_BIT (conflict_regs[k], hard_regno + j)) |
1756cb66 VM |
1613 | break; |
1614 | if (k != set_to_test_end) | |
1615 | break; | |
1616 | } | |
1617 | return j == nregs; | |
1618 | } | |
9181a6e5 VM |
1619 | |
1620 | /* Return number of registers needed to be saved and restored at | |
1621 | function prologue/epilogue if we allocate HARD_REGNO to hold value | |
1622 | of MODE. */ | |
1623 | static int | |
ef4bddc2 | 1624 | calculate_saved_nregs (int hard_regno, machine_mode mode) |
9181a6e5 VM |
1625 | { |
1626 | int i; | |
1627 | int nregs = 0; | |
1628 | ||
1629 | ira_assert (hard_regno >= 0); | |
1630 | for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--) | |
1631 | if (!allocated_hardreg_p[hard_regno + i] | |
1632 | && !TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + i) | |
1633 | && !LOCAL_REGNO (hard_regno + i)) | |
1634 | nregs++; | |
1635 | return nregs; | |
1636 | } | |
1756cb66 | 1637 | |
22b0982c VM |
1638 | /* Choose a hard register for allocno A. If RETRY_P is TRUE, it means |
1639 | that the function called from function | |
1756cb66 VM |
1640 | `ira_reassign_conflict_allocnos' and `allocno_reload_assign'. In |
1641 | this case some allocno data are not defined or updated and we | |
1642 | should not touch these data. The function returns true if we | |
1643 | managed to assign a hard register to the allocno. | |
1644 | ||
1645 | To assign a hard register, first of all we calculate all conflict | |
1646 | hard registers which can come from conflicting allocnos with | |
1647 | already assigned hard registers. After that we find first free | |
1648 | hard register with the minimal cost. During hard register cost | |
1649 | calculation we take conflict hard register costs into account to | |
1650 | give a chance for conflicting allocnos to get a better hard | |
1651 | register in the future. | |
1652 | ||
1653 | If the best hard register cost is bigger than cost of memory usage | |
1654 | for the allocno, we don't assign a hard register to given allocno | |
1655 | at all. | |
1656 | ||
1657 | If we assign a hard register to the allocno, we update costs of the | |
1658 | hard register for allocnos connected by copies to improve a chance | |
1659 | to coalesce insns represented by the copies when we assign hard | |
1660 | registers to the allocnos connected by the copies. */ | |
058e97ec | 1661 | static bool |
22b0982c | 1662 | assign_hard_reg (ira_allocno_t a, bool retry_p) |
058e97ec | 1663 | { |
27508f5f | 1664 | HARD_REG_SET conflicting_regs[2], profitable_hard_regs; |
fbddb81d | 1665 | int i, j, hard_regno, best_hard_regno, class_size; |
22b0982c | 1666 | int cost, mem_cost, min_cost, full_cost, min_full_cost, nwords, word; |
058e97ec | 1667 | int *a_costs; |
1756cb66 | 1668 | enum reg_class aclass; |
ef4bddc2 | 1669 | machine_mode mode; |
058e97ec | 1670 | static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER]; |
fbddb81d | 1671 | int saved_nregs; |
a5c011cd MP |
1672 | enum reg_class rclass; |
1673 | int add_cost; | |
058e97ec VM |
1674 | #ifdef STACK_REGS |
1675 | bool no_stack_reg_p; | |
1676 | #endif | |
1677 | ||
22b0982c | 1678 | ira_assert (! ALLOCNO_ASSIGNED_P (a)); |
27508f5f VM |
1679 | get_conflict_and_start_profitable_regs (a, retry_p, |
1680 | conflicting_regs, | |
1681 | &profitable_hard_regs); | |
1756cb66 VM |
1682 | aclass = ALLOCNO_CLASS (a); |
1683 | class_size = ira_class_hard_regs_num[aclass]; | |
058e97ec VM |
1684 | best_hard_regno = -1; |
1685 | memset (full_costs, 0, sizeof (int) * class_size); | |
1686 | mem_cost = 0; | |
058e97ec VM |
1687 | memset (costs, 0, sizeof (int) * class_size); |
1688 | memset (full_costs, 0, sizeof (int) * class_size); | |
1689 | #ifdef STACK_REGS | |
1690 | no_stack_reg_p = false; | |
1691 | #endif | |
1756cb66 VM |
1692 | if (! retry_p) |
1693 | start_update_cost (); | |
22b0982c VM |
1694 | mem_cost += ALLOCNO_UPDATED_MEMORY_COST (a); |
1695 | ||
1696 | ira_allocate_and_copy_costs (&ALLOCNO_UPDATED_HARD_REG_COSTS (a), | |
1756cb66 | 1697 | aclass, ALLOCNO_HARD_REG_COSTS (a)); |
22b0982c | 1698 | a_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a); |
058e97ec | 1699 | #ifdef STACK_REGS |
22b0982c | 1700 | no_stack_reg_p = no_stack_reg_p || ALLOCNO_TOTAL_NO_STACK_REG_P (a); |
058e97ec | 1701 | #endif |
1756cb66 | 1702 | cost = ALLOCNO_UPDATED_CLASS_COST (a); |
22b0982c VM |
1703 | for (i = 0; i < class_size; i++) |
1704 | if (a_costs != NULL) | |
1705 | { | |
1706 | costs[i] += a_costs[i]; | |
1707 | full_costs[i] += a_costs[i]; | |
1708 | } | |
1709 | else | |
1710 | { | |
1711 | costs[i] += cost; | |
1712 | full_costs[i] += cost; | |
1713 | } | |
1756cb66 | 1714 | nwords = ALLOCNO_NUM_OBJECTS (a); |
27508f5f | 1715 | curr_allocno_process++; |
22b0982c VM |
1716 | for (word = 0; word < nwords; word++) |
1717 | { | |
1718 | ira_object_t conflict_obj; | |
1719 | ira_object_t obj = ALLOCNO_OBJECT (a, word); | |
1720 | ira_object_conflict_iterator oci; | |
1721 | ||
22b0982c VM |
1722 | /* Take preferences of conflicting allocnos into account. */ |
1723 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) | |
1756cb66 | 1724 | { |
22b0982c | 1725 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); |
1756cb66 | 1726 | enum reg_class conflict_aclass; |
4ef20c29 | 1727 | allocno_color_data_t data = ALLOCNO_COLOR_DATA (conflict_a); |
1756cb66 | 1728 | |
22b0982c VM |
1729 | /* Reload can give another class so we need to check all |
1730 | allocnos. */ | |
1756cb66 | 1731 | if (!retry_p |
06fbce66 ZZ |
1732 | && ((!ALLOCNO_ASSIGNED_P (conflict_a) |
1733 | || ALLOCNO_HARD_REGNO (conflict_a) < 0) | |
1734 | && !(hard_reg_set_intersect_p | |
1735 | (profitable_hard_regs, | |
1736 | ALLOCNO_COLOR_DATA | |
1737 | (conflict_a)->profitable_hard_regs)))) | |
1738 | { | |
1739 | /* All conflict allocnos are in consideration bitmap | |
1740 | when retry_p is false. It might change in future and | |
1741 | if it happens the assert will be broken. It means | |
1742 | the code should be modified for the new | |
1743 | assumptions. */ | |
1744 | ira_assert (bitmap_bit_p (consideration_allocno_bitmap, | |
1745 | ALLOCNO_NUM (conflict_a))); | |
1746 | continue; | |
1747 | } | |
1756cb66 | 1748 | conflict_aclass = ALLOCNO_CLASS (conflict_a); |
22b0982c | 1749 | ira_assert (ira_reg_classes_intersect_p |
1756cb66 | 1750 | [aclass][conflict_aclass]); |
22b0982c | 1751 | if (ALLOCNO_ASSIGNED_P (conflict_a)) |
fa86d337 | 1752 | { |
22b0982c VM |
1753 | hard_regno = ALLOCNO_HARD_REGNO (conflict_a); |
1754 | if (hard_regno >= 0 | |
b8faca75 VM |
1755 | && (ira_hard_reg_set_intersection_p |
1756 | (hard_regno, ALLOCNO_MODE (conflict_a), | |
1757 | reg_class_contents[aclass]))) | |
fa86d337 | 1758 | { |
22b0982c | 1759 | int n_objects = ALLOCNO_NUM_OBJECTS (conflict_a); |
4648deb4 | 1760 | int conflict_nregs; |
1756cb66 | 1761 | |
4648deb4 VM |
1762 | mode = ALLOCNO_MODE (conflict_a); |
1763 | conflict_nregs = hard_regno_nregs[hard_regno][mode]; | |
22b0982c | 1764 | if (conflict_nregs == n_objects && conflict_nregs > 1) |
fa86d337 | 1765 | { |
22b0982c | 1766 | int num = OBJECT_SUBWORD (conflict_obj); |
ac0ab4f7 | 1767 | |
2805e6c0 | 1768 | if (REG_WORDS_BIG_ENDIAN) |
22b0982c VM |
1769 | SET_HARD_REG_BIT (conflicting_regs[word], |
1770 | hard_regno + n_objects - num - 1); | |
1771 | else | |
1772 | SET_HARD_REG_BIT (conflicting_regs[word], | |
1773 | hard_regno + num); | |
ac0ab4f7 | 1774 | } |
22b0982c VM |
1775 | else |
1776 | IOR_HARD_REG_SET | |
1777 | (conflicting_regs[word], | |
1778 | ira_reg_mode_hard_regset[hard_regno][mode]); | |
27508f5f | 1779 | if (hard_reg_set_subset_p (profitable_hard_regs, |
22b0982c VM |
1780 | conflicting_regs[word])) |
1781 | goto fail; | |
fa86d337 BS |
1782 | } |
1783 | } | |
1756cb66 | 1784 | else if (! retry_p |
27508f5f VM |
1785 | && ! ALLOCNO_COLOR_DATA (conflict_a)->may_be_spilled_p |
1786 | /* Don't process the conflict allocno twice. */ | |
1787 | && (ALLOCNO_COLOR_DATA (conflict_a)->last_process | |
1788 | != curr_allocno_process)) | |
22b0982c VM |
1789 | { |
1790 | int k, *conflict_costs; | |
1791 | ||
27508f5f VM |
1792 | ALLOCNO_COLOR_DATA (conflict_a)->last_process |
1793 | = curr_allocno_process; | |
22b0982c VM |
1794 | ira_allocate_and_copy_costs |
1795 | (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a), | |
1756cb66 | 1796 | conflict_aclass, |
22b0982c VM |
1797 | ALLOCNO_CONFLICT_HARD_REG_COSTS (conflict_a)); |
1798 | conflict_costs | |
1799 | = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a); | |
1800 | if (conflict_costs != NULL) | |
1801 | for (j = class_size - 1; j >= 0; j--) | |
1802 | { | |
1756cb66 | 1803 | hard_regno = ira_class_hard_regs[aclass][j]; |
22b0982c | 1804 | ira_assert (hard_regno >= 0); |
1756cb66 | 1805 | k = ira_class_hard_reg_index[conflict_aclass][hard_regno]; |
4ef20c29 ZC |
1806 | if (k < 0 |
1807 | /* If HARD_REGNO is not available for CONFLICT_A, | |
1808 | the conflict would be ignored, since HARD_REGNO | |
1809 | will never be assigned to CONFLICT_A. */ | |
1810 | || !TEST_HARD_REG_BIT (data->profitable_hard_regs, | |
1811 | hard_regno)) | |
22b0982c VM |
1812 | continue; |
1813 | full_costs[j] -= conflict_costs[k]; | |
1814 | } | |
3b6d1699 VM |
1815 | queue_update_cost (conflict_a, NULL, COST_HOP_DIVISOR); |
1816 | ||
22b0982c | 1817 | } |
fa86d337 | 1818 | } |
058e97ec | 1819 | } |
1756cb66 VM |
1820 | if (! retry_p) |
1821 | /* Take into account preferences of allocnos connected by copies to | |
1822 | the conflict allocnos. */ | |
1823 | update_conflict_hard_regno_costs (full_costs, aclass, true); | |
f754734f | 1824 | |
a7f32992 VM |
1825 | /* Take preferences of allocnos connected by copies into |
1826 | account. */ | |
1756cb66 VM |
1827 | if (! retry_p) |
1828 | { | |
1829 | start_update_cost (); | |
3b6d1699 | 1830 | queue_update_cost (a, NULL, COST_HOP_DIVISOR); |
1756cb66 VM |
1831 | update_conflict_hard_regno_costs (full_costs, aclass, false); |
1832 | } | |
058e97ec VM |
1833 | min_cost = min_full_cost = INT_MAX; |
1834 | /* We don't care about giving callee saved registers to allocnos no | |
1835 | living through calls because call clobbered registers are | |
1836 | allocated first (it is usual practice to put them first in | |
1837 | REG_ALLOC_ORDER). */ | |
1756cb66 | 1838 | mode = ALLOCNO_MODE (a); |
058e97ec VM |
1839 | for (i = 0; i < class_size; i++) |
1840 | { | |
1756cb66 | 1841 | hard_regno = ira_class_hard_regs[aclass][i]; |
058e97ec VM |
1842 | #ifdef STACK_REGS |
1843 | if (no_stack_reg_p | |
1844 | && FIRST_STACK_REG <= hard_regno && hard_regno <= LAST_STACK_REG) | |
1845 | continue; | |
1846 | #endif | |
1756cb66 VM |
1847 | if (! check_hard_reg_p (a, hard_regno, |
1848 | conflicting_regs, profitable_hard_regs)) | |
058e97ec VM |
1849 | continue; |
1850 | cost = costs[i]; | |
1851 | full_cost = full_costs[i]; | |
ed15c598 | 1852 | if (!HONOR_REG_ALLOC_ORDER) |
058e97ec | 1853 | { |
ed15c598 KC |
1854 | if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0) |
1855 | /* We need to save/restore the hard register in | |
1856 | epilogue/prologue. Therefore we increase the cost. */ | |
1857 | { | |
1858 | rclass = REGNO_REG_CLASS (hard_regno); | |
1859 | add_cost = ((ira_memory_move_cost[mode][rclass][0] | |
1860 | + ira_memory_move_cost[mode][rclass][1]) | |
1861 | * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1); | |
1862 | cost += add_cost; | |
1863 | full_cost += add_cost; | |
1864 | } | |
058e97ec VM |
1865 | } |
1866 | if (min_cost > cost) | |
1867 | min_cost = cost; | |
1868 | if (min_full_cost > full_cost) | |
1869 | { | |
1870 | min_full_cost = full_cost; | |
1871 | best_hard_regno = hard_regno; | |
1872 | ira_assert (hard_regno >= 0); | |
1873 | } | |
1874 | } | |
b81a2f0d VM |
1875 | if (min_full_cost > mem_cost |
1876 | /* Do not spill static chain pointer pseudo when non-local goto | |
1877 | is used. */ | |
1878 | && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a))) | |
058e97ec VM |
1879 | { |
1880 | if (! retry_p && internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
1881 | fprintf (ira_dump_file, "(memory is more profitable %d vs %d) ", | |
1882 | mem_cost, min_full_cost); | |
1883 | best_hard_regno = -1; | |
1884 | } | |
1885 | fail: | |
058e97ec | 1886 | if (best_hard_regno >= 0) |
9181a6e5 VM |
1887 | { |
1888 | for (i = hard_regno_nregs[best_hard_regno][mode] - 1; i >= 0; i--) | |
34672f15 | 1889 | allocated_hardreg_p[best_hard_regno + i] = true; |
9181a6e5 | 1890 | } |
c73ccc80 VM |
1891 | if (! retry_p) |
1892 | restore_costs_from_copies (a); | |
22b0982c VM |
1893 | ALLOCNO_HARD_REGNO (a) = best_hard_regno; |
1894 | ALLOCNO_ASSIGNED_P (a) = true; | |
1895 | if (best_hard_regno >= 0) | |
c73ccc80 | 1896 | update_costs_from_copies (a, true, ! retry_p); |
1756cb66 | 1897 | ira_assert (ALLOCNO_CLASS (a) == aclass); |
2b9c63a2 | 1898 | /* We don't need updated costs anymore. */ |
22b0982c | 1899 | ira_free_allocno_updated_costs (a); |
058e97ec VM |
1900 | return best_hard_regno >= 0; |
1901 | } | |
1902 | ||
1903 | \f | |
1904 | ||
bf08fb16 VM |
1905 | /* An array used to sort copies. */ |
1906 | static ira_copy_t *sorted_copies; | |
1907 | ||
1908 | /* Return TRUE if live ranges of allocnos A1 and A2 intersect. It is | |
1909 | used to find a conflict for new allocnos or allocnos with the | |
1910 | different allocno classes. */ | |
1911 | static bool | |
1912 | allocnos_conflict_by_live_ranges_p (ira_allocno_t a1, ira_allocno_t a2) | |
1913 | { | |
1914 | rtx reg1, reg2; | |
1915 | int i, j; | |
1916 | int n1 = ALLOCNO_NUM_OBJECTS (a1); | |
1917 | int n2 = ALLOCNO_NUM_OBJECTS (a2); | |
1918 | ||
1919 | if (a1 == a2) | |
1920 | return false; | |
1921 | reg1 = regno_reg_rtx[ALLOCNO_REGNO (a1)]; | |
1922 | reg2 = regno_reg_rtx[ALLOCNO_REGNO (a2)]; | |
1923 | if (reg1 != NULL && reg2 != NULL | |
1924 | && ORIGINAL_REGNO (reg1) == ORIGINAL_REGNO (reg2)) | |
1925 | return false; | |
1926 | ||
1927 | for (i = 0; i < n1; i++) | |
1928 | { | |
1929 | ira_object_t c1 = ALLOCNO_OBJECT (a1, i); | |
1930 | ||
1931 | for (j = 0; j < n2; j++) | |
1932 | { | |
1933 | ira_object_t c2 = ALLOCNO_OBJECT (a2, j); | |
1934 | ||
1935 | if (ira_live_ranges_intersect_p (OBJECT_LIVE_RANGES (c1), | |
1936 | OBJECT_LIVE_RANGES (c2))) | |
1937 | return true; | |
1938 | } | |
1939 | } | |
1940 | return false; | |
1941 | } | |
1942 | ||
1943 | /* The function is used to sort copies according to their execution | |
1944 | frequencies. */ | |
1945 | static int | |
1946 | copy_freq_compare_func (const void *v1p, const void *v2p) | |
1947 | { | |
1948 | ira_copy_t cp1 = *(const ira_copy_t *) v1p, cp2 = *(const ira_copy_t *) v2p; | |
1949 | int pri1, pri2; | |
1950 | ||
1951 | pri1 = cp1->freq; | |
1952 | pri2 = cp2->freq; | |
1953 | if (pri2 - pri1) | |
1954 | return pri2 - pri1; | |
1955 | ||
df3e3493 | 1956 | /* If frequencies are equal, sort by copies, so that the results of |
bf08fb16 VM |
1957 | qsort leave nothing to chance. */ |
1958 | return cp1->num - cp2->num; | |
1959 | } | |
1960 | ||
1961 | \f | |
1962 | ||
1963 | /* Return true if any allocno from thread of A1 conflicts with any | |
1964 | allocno from thread A2. */ | |
1965 | static bool | |
1966 | allocno_thread_conflict_p (ira_allocno_t a1, ira_allocno_t a2) | |
1967 | { | |
1968 | ira_allocno_t a, conflict_a; | |
1969 | ||
1970 | for (a = ALLOCNO_COLOR_DATA (a2)->next_thread_allocno;; | |
1971 | a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno) | |
1972 | { | |
1973 | for (conflict_a = ALLOCNO_COLOR_DATA (a1)->next_thread_allocno;; | |
1974 | conflict_a = ALLOCNO_COLOR_DATA (conflict_a)->next_thread_allocno) | |
1975 | { | |
1976 | if (allocnos_conflict_by_live_ranges_p (a, conflict_a)) | |
1977 | return true; | |
1978 | if (conflict_a == a1) | |
1979 | break; | |
1980 | } | |
1981 | if (a == a2) | |
1982 | break; | |
1983 | } | |
1984 | return false; | |
1985 | } | |
1986 | ||
1987 | /* Merge two threads given correspondingly by their first allocnos T1 | |
1988 | and T2 (more accurately merging T2 into T1). */ | |
1989 | static void | |
1990 | merge_threads (ira_allocno_t t1, ira_allocno_t t2) | |
1991 | { | |
1992 | ira_allocno_t a, next, last; | |
1993 | ||
1994 | gcc_assert (t1 != t2 | |
1995 | && ALLOCNO_COLOR_DATA (t1)->first_thread_allocno == t1 | |
1996 | && ALLOCNO_COLOR_DATA (t2)->first_thread_allocno == t2); | |
1997 | for (last = t2, a = ALLOCNO_COLOR_DATA (t2)->next_thread_allocno;; | |
1998 | a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno) | |
1999 | { | |
2000 | ALLOCNO_COLOR_DATA (a)->first_thread_allocno = t1; | |
2001 | if (a == t2) | |
2002 | break; | |
2003 | last = a; | |
2004 | } | |
2005 | next = ALLOCNO_COLOR_DATA (t1)->next_thread_allocno; | |
2006 | ALLOCNO_COLOR_DATA (t1)->next_thread_allocno = t2; | |
2007 | ALLOCNO_COLOR_DATA (last)->next_thread_allocno = next; | |
2008 | ALLOCNO_COLOR_DATA (t1)->thread_freq += ALLOCNO_COLOR_DATA (t2)->thread_freq; | |
2009 | } | |
2010 | ||
df3e3493 | 2011 | /* Create threads by processing CP_NUM copies from sorted copies. We |
bf08fb16 VM |
2012 | process the most expensive copies first. */ |
2013 | static void | |
2014 | form_threads_from_copies (int cp_num) | |
2015 | { | |
2016 | ira_allocno_t a, thread1, thread2; | |
2017 | ira_copy_t cp; | |
2018 | int i, n; | |
2019 | ||
2020 | qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func); | |
2021 | /* Form threads processing copies, most frequently executed | |
2022 | first. */ | |
2023 | for (; cp_num != 0;) | |
2024 | { | |
2025 | for (i = 0; i < cp_num; i++) | |
2026 | { | |
2027 | cp = sorted_copies[i]; | |
2028 | thread1 = ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno; | |
2029 | thread2 = ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno; | |
2030 | if (thread1 == thread2) | |
2031 | continue; | |
2032 | if (! allocno_thread_conflict_p (thread1, thread2)) | |
2033 | { | |
2034 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2035 | fprintf | |
2036 | (ira_dump_file, | |
2037 | " Forming thread by copy %d:a%dr%d-a%dr%d (freq=%d):\n", | |
2038 | cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first), | |
2039 | ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second), | |
2040 | cp->freq); | |
2041 | merge_threads (thread1, thread2); | |
2042 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2043 | { | |
2044 | thread1 = ALLOCNO_COLOR_DATA (thread1)->first_thread_allocno; | |
2045 | fprintf (ira_dump_file, " Result (freq=%d): a%dr%d(%d)", | |
2046 | ALLOCNO_COLOR_DATA (thread1)->thread_freq, | |
2047 | ALLOCNO_NUM (thread1), ALLOCNO_REGNO (thread1), | |
2048 | ALLOCNO_FREQ (thread1)); | |
2049 | for (a = ALLOCNO_COLOR_DATA (thread1)->next_thread_allocno; | |
2050 | a != thread1; | |
2051 | a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno) | |
2052 | fprintf (ira_dump_file, " a%dr%d(%d)", | |
2053 | ALLOCNO_NUM (a), ALLOCNO_REGNO (a), | |
2054 | ALLOCNO_FREQ (a)); | |
2055 | fprintf (ira_dump_file, "\n"); | |
2056 | } | |
2057 | i++; | |
2058 | break; | |
2059 | } | |
2060 | } | |
2061 | /* Collect the rest of copies. */ | |
2062 | for (n = 0; i < cp_num; i++) | |
2063 | { | |
2064 | cp = sorted_copies[i]; | |
2065 | if (ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno | |
2066 | != ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno) | |
2067 | sorted_copies[n++] = cp; | |
2068 | } | |
2069 | cp_num = n; | |
2070 | } | |
2071 | } | |
2072 | ||
2073 | /* Create threads by processing copies of all alocnos from BUCKET. We | |
2074 | process the most expensive copies first. */ | |
2075 | static void | |
2076 | form_threads_from_bucket (ira_allocno_t bucket) | |
2077 | { | |
2078 | ira_allocno_t a; | |
2079 | ira_copy_t cp, next_cp; | |
2080 | int cp_num = 0; | |
2081 | ||
2082 | for (a = bucket; a != NULL; a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno) | |
2083 | { | |
2084 | for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp) | |
2085 | { | |
2086 | if (cp->first == a) | |
2087 | { | |
2088 | next_cp = cp->next_first_allocno_copy; | |
2089 | sorted_copies[cp_num++] = cp; | |
2090 | } | |
2091 | else if (cp->second == a) | |
2092 | next_cp = cp->next_second_allocno_copy; | |
2093 | else | |
2094 | gcc_unreachable (); | |
2095 | } | |
2096 | } | |
2097 | form_threads_from_copies (cp_num); | |
2098 | } | |
2099 | ||
2100 | /* Create threads by processing copies of colorable allocno A. We | |
2101 | process most expensive copies first. */ | |
2102 | static void | |
2103 | form_threads_from_colorable_allocno (ira_allocno_t a) | |
2104 | { | |
2105 | ira_allocno_t another_a; | |
2106 | ira_copy_t cp, next_cp; | |
2107 | int cp_num = 0; | |
2108 | ||
2109 | for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp) | |
2110 | { | |
2111 | if (cp->first == a) | |
2112 | { | |
2113 | next_cp = cp->next_first_allocno_copy; | |
2114 | another_a = cp->second; | |
2115 | } | |
2116 | else if (cp->second == a) | |
2117 | { | |
2118 | next_cp = cp->next_second_allocno_copy; | |
2119 | another_a = cp->first; | |
2120 | } | |
2121 | else | |
2122 | gcc_unreachable (); | |
2123 | if ((! ALLOCNO_COLOR_DATA (another_a)->in_graph_p | |
2124 | && !ALLOCNO_COLOR_DATA (another_a)->may_be_spilled_p) | |
2125 | || ALLOCNO_COLOR_DATA (another_a)->colorable_p) | |
2126 | sorted_copies[cp_num++] = cp; | |
2127 | } | |
2128 | form_threads_from_copies (cp_num); | |
2129 | } | |
2130 | ||
2131 | /* Form initial threads which contain only one allocno. */ | |
2132 | static void | |
2133 | init_allocno_threads (void) | |
2134 | { | |
2135 | ira_allocno_t a; | |
2136 | unsigned int j; | |
2137 | bitmap_iterator bi; | |
2138 | ||
2139 | EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi) | |
2140 | { | |
2141 | a = ira_allocnos[j]; | |
2142 | /* Set up initial thread data: */ | |
2143 | ALLOCNO_COLOR_DATA (a)->first_thread_allocno | |
2144 | = ALLOCNO_COLOR_DATA (a)->next_thread_allocno = a; | |
2145 | ALLOCNO_COLOR_DATA (a)->thread_freq = ALLOCNO_FREQ (a); | |
2146 | } | |
2147 | } | |
2148 | ||
2149 | \f | |
2150 | ||
058e97ec VM |
2151 | /* This page contains the allocator based on the Chaitin-Briggs algorithm. */ |
2152 | ||
2153 | /* Bucket of allocnos that can colored currently without spilling. */ | |
2154 | static ira_allocno_t colorable_allocno_bucket; | |
2155 | ||
2156 | /* Bucket of allocnos that might be not colored currently without | |
2157 | spilling. */ | |
2158 | static ira_allocno_t uncolorable_allocno_bucket; | |
2159 | ||
1756cb66 VM |
2160 | /* The current number of allocnos in the uncolorable_bucket. */ |
2161 | static int uncolorable_allocnos_num; | |
058e97ec | 2162 | |
30ea859e VM |
2163 | /* Return the current spill priority of allocno A. The less the |
2164 | number, the more preferable the allocno for spilling. */ | |
1756cb66 | 2165 | static inline int |
30ea859e VM |
2166 | allocno_spill_priority (ira_allocno_t a) |
2167 | { | |
1756cb66 VM |
2168 | allocno_color_data_t data = ALLOCNO_COLOR_DATA (a); |
2169 | ||
2170 | return (data->temp | |
2171 | / (ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a) | |
2172 | * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)] | |
30ea859e VM |
2173 | + 1)); |
2174 | } | |
2175 | ||
1756cb66 | 2176 | /* Add allocno A to bucket *BUCKET_PTR. A should be not in a bucket |
058e97ec VM |
2177 | before the call. */ |
2178 | static void | |
1756cb66 | 2179 | add_allocno_to_bucket (ira_allocno_t a, ira_allocno_t *bucket_ptr) |
058e97ec | 2180 | { |
1756cb66 VM |
2181 | ira_allocno_t first_a; |
2182 | allocno_color_data_t data; | |
058e97ec VM |
2183 | |
2184 | if (bucket_ptr == &uncolorable_allocno_bucket | |
1756cb66 | 2185 | && ALLOCNO_CLASS (a) != NO_REGS) |
058e97ec | 2186 | { |
1756cb66 VM |
2187 | uncolorable_allocnos_num++; |
2188 | ira_assert (uncolorable_allocnos_num > 0); | |
058e97ec | 2189 | } |
1756cb66 VM |
2190 | first_a = *bucket_ptr; |
2191 | data = ALLOCNO_COLOR_DATA (a); | |
2192 | data->next_bucket_allocno = first_a; | |
2193 | data->prev_bucket_allocno = NULL; | |
2194 | if (first_a != NULL) | |
2195 | ALLOCNO_COLOR_DATA (first_a)->prev_bucket_allocno = a; | |
2196 | *bucket_ptr = a; | |
058e97ec VM |
2197 | } |
2198 | ||
058e97ec VM |
2199 | /* Compare two allocnos to define which allocno should be pushed first |
2200 | into the coloring stack. If the return is a negative number, the | |
2201 | allocno given by the first parameter will be pushed first. In this | |
2202 | case such allocno has less priority than the second one and the | |
2203 | hard register will be assigned to it after assignment to the second | |
2204 | one. As the result of such assignment order, the second allocno | |
2205 | has a better chance to get the best hard register. */ | |
2206 | static int | |
2207 | bucket_allocno_compare_func (const void *v1p, const void *v2p) | |
2208 | { | |
2209 | ira_allocno_t a1 = *(const ira_allocno_t *) v1p; | |
2210 | ira_allocno_t a2 = *(const ira_allocno_t *) v2p; | |
bf08fb16 VM |
2211 | int diff, freq1, freq2, a1_num, a2_num; |
2212 | ira_allocno_t t1 = ALLOCNO_COLOR_DATA (a1)->first_thread_allocno; | |
2213 | ira_allocno_t t2 = ALLOCNO_COLOR_DATA (a2)->first_thread_allocno; | |
9c3b0346 VM |
2214 | int cl1 = ALLOCNO_CLASS (a1), cl2 = ALLOCNO_CLASS (a2); |
2215 | ||
bf08fb16 VM |
2216 | freq1 = ALLOCNO_COLOR_DATA (t1)->thread_freq; |
2217 | freq2 = ALLOCNO_COLOR_DATA (t2)->thread_freq; | |
2218 | if ((diff = freq1 - freq2) != 0) | |
2219 | return diff; | |
2220 | ||
2221 | if ((diff = ALLOCNO_NUM (t2) - ALLOCNO_NUM (t1)) != 0) | |
2222 | return diff; | |
2223 | ||
9c3b0346 VM |
2224 | /* Push pseudos requiring less hard registers first. It means that |
2225 | we will assign pseudos requiring more hard registers first | |
2226 | avoiding creation small holes in free hard register file into | |
2227 | which the pseudos requiring more hard registers can not fit. */ | |
2228 | if ((diff = (ira_reg_class_max_nregs[cl1][ALLOCNO_MODE (a1)] | |
2229 | - ira_reg_class_max_nregs[cl2][ALLOCNO_MODE (a2)])) != 0) | |
058e97ec | 2230 | return diff; |
bf08fb16 VM |
2231 | |
2232 | freq1 = ALLOCNO_FREQ (a1); | |
2233 | freq2 = ALLOCNO_FREQ (a2); | |
2234 | if ((diff = freq1 - freq2) != 0) | |
058e97ec | 2235 | return diff; |
bf08fb16 | 2236 | |
1756cb66 VM |
2237 | a1_num = ALLOCNO_COLOR_DATA (a1)->available_regs_num; |
2238 | a2_num = ALLOCNO_COLOR_DATA (a2)->available_regs_num; | |
2239 | if ((diff = a2_num - a1_num) != 0) | |
99710245 | 2240 | return diff; |
058e97ec VM |
2241 | return ALLOCNO_NUM (a2) - ALLOCNO_NUM (a1); |
2242 | } | |
2243 | ||
2244 | /* Sort bucket *BUCKET_PTR and return the result through | |
2245 | BUCKET_PTR. */ | |
2246 | static void | |
1756cb66 VM |
2247 | sort_bucket (ira_allocno_t *bucket_ptr, |
2248 | int (*compare_func) (const void *, const void *)) | |
058e97ec VM |
2249 | { |
2250 | ira_allocno_t a, head; | |
2251 | int n; | |
2252 | ||
1756cb66 VM |
2253 | for (n = 0, a = *bucket_ptr; |
2254 | a != NULL; | |
2255 | a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno) | |
058e97ec VM |
2256 | sorted_allocnos[n++] = a; |
2257 | if (n <= 1) | |
2258 | return; | |
1756cb66 | 2259 | qsort (sorted_allocnos, n, sizeof (ira_allocno_t), compare_func); |
058e97ec VM |
2260 | head = NULL; |
2261 | for (n--; n >= 0; n--) | |
2262 | { | |
2263 | a = sorted_allocnos[n]; | |
1756cb66 VM |
2264 | ALLOCNO_COLOR_DATA (a)->next_bucket_allocno = head; |
2265 | ALLOCNO_COLOR_DATA (a)->prev_bucket_allocno = NULL; | |
058e97ec | 2266 | if (head != NULL) |
1756cb66 | 2267 | ALLOCNO_COLOR_DATA (head)->prev_bucket_allocno = a; |
058e97ec VM |
2268 | head = a; |
2269 | } | |
2270 | *bucket_ptr = head; | |
2271 | } | |
2272 | ||
bf08fb16 | 2273 | /* Add ALLOCNO to colorable bucket maintaining the order according |
058e97ec VM |
2274 | their priority. ALLOCNO should be not in a bucket before the |
2275 | call. */ | |
2276 | static void | |
bf08fb16 | 2277 | add_allocno_to_ordered_colorable_bucket (ira_allocno_t allocno) |
058e97ec VM |
2278 | { |
2279 | ira_allocno_t before, after; | |
058e97ec | 2280 | |
bf08fb16 VM |
2281 | form_threads_from_colorable_allocno (allocno); |
2282 | for (before = colorable_allocno_bucket, after = NULL; | |
058e97ec | 2283 | before != NULL; |
1756cb66 VM |
2284 | after = before, |
2285 | before = ALLOCNO_COLOR_DATA (before)->next_bucket_allocno) | |
058e97ec VM |
2286 | if (bucket_allocno_compare_func (&allocno, &before) < 0) |
2287 | break; | |
1756cb66 VM |
2288 | ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno = before; |
2289 | ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno = after; | |
058e97ec | 2290 | if (after == NULL) |
bf08fb16 | 2291 | colorable_allocno_bucket = allocno; |
058e97ec | 2292 | else |
1756cb66 | 2293 | ALLOCNO_COLOR_DATA (after)->next_bucket_allocno = allocno; |
058e97ec | 2294 | if (before != NULL) |
1756cb66 | 2295 | ALLOCNO_COLOR_DATA (before)->prev_bucket_allocno = allocno; |
058e97ec VM |
2296 | } |
2297 | ||
2298 | /* Delete ALLOCNO from bucket *BUCKET_PTR. It should be there before | |
2299 | the call. */ | |
2300 | static void | |
2301 | delete_allocno_from_bucket (ira_allocno_t allocno, ira_allocno_t *bucket_ptr) | |
2302 | { | |
2303 | ira_allocno_t prev_allocno, next_allocno; | |
058e97ec VM |
2304 | |
2305 | if (bucket_ptr == &uncolorable_allocno_bucket | |
1756cb66 | 2306 | && ALLOCNO_CLASS (allocno) != NO_REGS) |
058e97ec | 2307 | { |
1756cb66 VM |
2308 | uncolorable_allocnos_num--; |
2309 | ira_assert (uncolorable_allocnos_num >= 0); | |
058e97ec | 2310 | } |
1756cb66 VM |
2311 | prev_allocno = ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno; |
2312 | next_allocno = ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno; | |
058e97ec | 2313 | if (prev_allocno != NULL) |
1756cb66 | 2314 | ALLOCNO_COLOR_DATA (prev_allocno)->next_bucket_allocno = next_allocno; |
058e97ec VM |
2315 | else |
2316 | { | |
2317 | ira_assert (*bucket_ptr == allocno); | |
2318 | *bucket_ptr = next_allocno; | |
2319 | } | |
2320 | if (next_allocno != NULL) | |
1756cb66 | 2321 | ALLOCNO_COLOR_DATA (next_allocno)->prev_bucket_allocno = prev_allocno; |
058e97ec VM |
2322 | } |
2323 | ||
22b0982c | 2324 | /* Put allocno A onto the coloring stack without removing it from its |
058e97ec VM |
2325 | bucket. Pushing allocno to the coloring stack can result in moving |
2326 | conflicting allocnos from the uncolorable bucket to the colorable | |
2327 | one. */ | |
2328 | static void | |
22b0982c | 2329 | push_allocno_to_stack (ira_allocno_t a) |
058e97ec | 2330 | { |
1756cb66 VM |
2331 | enum reg_class aclass; |
2332 | allocno_color_data_t data, conflict_data; | |
2333 | int size, i, n = ALLOCNO_NUM_OBJECTS (a); | |
2334 | ||
2335 | data = ALLOCNO_COLOR_DATA (a); | |
2336 | data->in_graph_p = false; | |
9771b263 | 2337 | allocno_stack_vec.safe_push (a); |
1756cb66 VM |
2338 | aclass = ALLOCNO_CLASS (a); |
2339 | if (aclass == NO_REGS) | |
058e97ec | 2340 | return; |
1756cb66 VM |
2341 | size = ira_reg_class_max_nregs[aclass][ALLOCNO_MODE (a)]; |
2342 | if (n > 1) | |
ac0ab4f7 BS |
2343 | { |
2344 | /* We will deal with the subwords individually. */ | |
22b0982c | 2345 | gcc_assert (size == ALLOCNO_NUM_OBJECTS (a)); |
ac0ab4f7 BS |
2346 | size = 1; |
2347 | } | |
22b0982c | 2348 | for (i = 0; i < n; i++) |
058e97ec | 2349 | { |
22b0982c | 2350 | ira_object_t obj = ALLOCNO_OBJECT (a, i); |
22b0982c VM |
2351 | ira_object_t conflict_obj; |
2352 | ira_object_conflict_iterator oci; | |
2353 | ||
2354 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) | |
548a6322 | 2355 | { |
22b0982c | 2356 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); |
22b0982c | 2357 | |
1756cb66 VM |
2358 | conflict_data = ALLOCNO_COLOR_DATA (conflict_a); |
2359 | if (conflict_data->colorable_p | |
2360 | || ! conflict_data->in_graph_p | |
2361 | || ALLOCNO_ASSIGNED_P (conflict_a) | |
2362 | || !(hard_reg_set_intersect_p | |
27508f5f VM |
2363 | (ALLOCNO_COLOR_DATA (a)->profitable_hard_regs, |
2364 | conflict_data->profitable_hard_regs))) | |
22b0982c | 2365 | continue; |
1756cb66 VM |
2366 | ira_assert (bitmap_bit_p (coloring_allocno_bitmap, |
2367 | ALLOCNO_NUM (conflict_a))); | |
27508f5f | 2368 | if (update_left_conflict_sizes_p (conflict_a, a, size)) |
22b0982c VM |
2369 | { |
2370 | delete_allocno_from_bucket | |
27508f5f | 2371 | (conflict_a, &uncolorable_allocno_bucket); |
bf08fb16 | 2372 | add_allocno_to_ordered_colorable_bucket (conflict_a); |
1756cb66 VM |
2373 | if (internal_flag_ira_verbose > 4 && ira_dump_file != NULL) |
2374 | { | |
2375 | fprintf (ira_dump_file, " Making"); | |
2376 | ira_print_expanded_allocno (conflict_a); | |
2377 | fprintf (ira_dump_file, " colorable\n"); | |
2378 | } | |
548a6322 | 2379 | } |
1756cb66 | 2380 | |
548a6322 | 2381 | } |
058e97ec VM |
2382 | } |
2383 | } | |
2384 | ||
2385 | /* Put ALLOCNO onto the coloring stack and remove it from its bucket. | |
2386 | The allocno is in the colorable bucket if COLORABLE_P is TRUE. */ | |
2387 | static void | |
2388 | remove_allocno_from_bucket_and_push (ira_allocno_t allocno, bool colorable_p) | |
2389 | { | |
058e97ec VM |
2390 | if (colorable_p) |
2391 | delete_allocno_from_bucket (allocno, &colorable_allocno_bucket); | |
2392 | else | |
2393 | delete_allocno_from_bucket (allocno, &uncolorable_allocno_bucket); | |
2394 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2395 | { | |
2396 | fprintf (ira_dump_file, " Pushing"); | |
22b0982c | 2397 | ira_print_expanded_allocno (allocno); |
30ea859e | 2398 | if (colorable_p) |
1756cb66 VM |
2399 | fprintf (ira_dump_file, "(cost %d)\n", |
2400 | ALLOCNO_COLOR_DATA (allocno)->temp); | |
30ea859e VM |
2401 | else |
2402 | fprintf (ira_dump_file, "(potential spill: %spri=%d, cost=%d)\n", | |
2403 | ALLOCNO_BAD_SPILL_P (allocno) ? "bad spill, " : "", | |
1756cb66 VM |
2404 | allocno_spill_priority (allocno), |
2405 | ALLOCNO_COLOR_DATA (allocno)->temp); | |
2406 | } | |
058e97ec | 2407 | if (! colorable_p) |
1756cb66 | 2408 | ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p = true; |
548a6322 | 2409 | push_allocno_to_stack (allocno); |
058e97ec VM |
2410 | } |
2411 | ||
2412 | /* Put all allocnos from colorable bucket onto the coloring stack. */ | |
2413 | static void | |
2414 | push_only_colorable (void) | |
2415 | { | |
bf08fb16 | 2416 | form_threads_from_bucket (colorable_allocno_bucket); |
1756cb66 | 2417 | sort_bucket (&colorable_allocno_bucket, bucket_allocno_compare_func); |
058e97ec VM |
2418 | for (;colorable_allocno_bucket != NULL;) |
2419 | remove_allocno_from_bucket_and_push (colorable_allocno_bucket, true); | |
2420 | } | |
2421 | ||
058e97ec | 2422 | /* Return the frequency of exit edges (if EXIT_P) or entry from/to the |
b8698a0f | 2423 | loop given by its LOOP_NODE. */ |
058e97ec VM |
2424 | int |
2425 | ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int regno, bool exit_p) | |
2426 | { | |
2427 | int freq, i; | |
2428 | edge_iterator ei; | |
2429 | edge e; | |
9771b263 | 2430 | vec<edge> edges; |
058e97ec | 2431 | |
2608d841 | 2432 | ira_assert (current_loops != NULL && loop_node->loop != NULL |
058e97ec VM |
2433 | && (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)); |
2434 | freq = 0; | |
2435 | if (! exit_p) | |
2436 | { | |
2437 | FOR_EACH_EDGE (e, ei, loop_node->loop->header->preds) | |
2438 | if (e->src != loop_node->loop->latch | |
2439 | && (regno < 0 | |
bf744527 SB |
2440 | || (bitmap_bit_p (df_get_live_out (e->src), regno) |
2441 | && bitmap_bit_p (df_get_live_in (e->dest), regno)))) | |
058e97ec VM |
2442 | freq += EDGE_FREQUENCY (e); |
2443 | } | |
2444 | else | |
2445 | { | |
2446 | edges = get_loop_exit_edges (loop_node->loop); | |
9771b263 | 2447 | FOR_EACH_VEC_ELT (edges, i, e) |
058e97ec | 2448 | if (regno < 0 |
bf744527 SB |
2449 | || (bitmap_bit_p (df_get_live_out (e->src), regno) |
2450 | && bitmap_bit_p (df_get_live_in (e->dest), regno))) | |
058e97ec | 2451 | freq += EDGE_FREQUENCY (e); |
9771b263 | 2452 | edges.release (); |
058e97ec VM |
2453 | } |
2454 | ||
2455 | return REG_FREQ_FROM_EDGE_FREQ (freq); | |
2456 | } | |
2457 | ||
2458 | /* Calculate and return the cost of putting allocno A into memory. */ | |
2459 | static int | |
2460 | calculate_allocno_spill_cost (ira_allocno_t a) | |
2461 | { | |
2462 | int regno, cost; | |
ef4bddc2 | 2463 | machine_mode mode; |
058e97ec VM |
2464 | enum reg_class rclass; |
2465 | ira_allocno_t parent_allocno; | |
2466 | ira_loop_tree_node_t parent_node, loop_node; | |
2467 | ||
2468 | regno = ALLOCNO_REGNO (a); | |
1756cb66 | 2469 | cost = ALLOCNO_UPDATED_MEMORY_COST (a) - ALLOCNO_UPDATED_CLASS_COST (a); |
058e97ec VM |
2470 | if (ALLOCNO_CAP (a) != NULL) |
2471 | return cost; | |
2472 | loop_node = ALLOCNO_LOOP_TREE_NODE (a); | |
2473 | if ((parent_node = loop_node->parent) == NULL) | |
2474 | return cost; | |
2475 | if ((parent_allocno = parent_node->regno_allocno_map[regno]) == NULL) | |
2476 | return cost; | |
2477 | mode = ALLOCNO_MODE (a); | |
1756cb66 | 2478 | rclass = ALLOCNO_CLASS (a); |
058e97ec VM |
2479 | if (ALLOCNO_HARD_REGNO (parent_allocno) < 0) |
2480 | cost -= (ira_memory_move_cost[mode][rclass][0] | |
2481 | * ira_loop_edge_freq (loop_node, regno, true) | |
2482 | + ira_memory_move_cost[mode][rclass][1] | |
2483 | * ira_loop_edge_freq (loop_node, regno, false)); | |
2484 | else | |
1756cb66 VM |
2485 | { |
2486 | ira_init_register_move_cost_if_necessary (mode); | |
2487 | cost += ((ira_memory_move_cost[mode][rclass][1] | |
2488 | * ira_loop_edge_freq (loop_node, regno, true) | |
2489 | + ira_memory_move_cost[mode][rclass][0] | |
2490 | * ira_loop_edge_freq (loop_node, regno, false)) | |
2491 | - (ira_register_move_cost[mode][rclass][rclass] | |
2492 | * (ira_loop_edge_freq (loop_node, regno, false) | |
2493 | + ira_loop_edge_freq (loop_node, regno, true)))); | |
2494 | } | |
058e97ec VM |
2495 | return cost; |
2496 | } | |
2497 | ||
1756cb66 VM |
2498 | /* Used for sorting allocnos for spilling. */ |
2499 | static inline int | |
2500 | allocno_spill_priority_compare (ira_allocno_t a1, ira_allocno_t a2) | |
058e97ec VM |
2501 | { |
2502 | int pri1, pri2, diff; | |
b8698a0f | 2503 | |
b81a2f0d VM |
2504 | /* Avoid spilling static chain pointer pseudo when non-local goto is |
2505 | used. */ | |
2506 | if (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a1))) | |
2507 | return 1; | |
2508 | else if (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a2))) | |
2509 | return -1; | |
1756cb66 VM |
2510 | if (ALLOCNO_BAD_SPILL_P (a1) && ! ALLOCNO_BAD_SPILL_P (a2)) |
2511 | return 1; | |
2512 | if (ALLOCNO_BAD_SPILL_P (a2) && ! ALLOCNO_BAD_SPILL_P (a1)) | |
2513 | return -1; | |
2514 | pri1 = allocno_spill_priority (a1); | |
2515 | pri2 = allocno_spill_priority (a2); | |
058e97ec VM |
2516 | if ((diff = pri1 - pri2) != 0) |
2517 | return diff; | |
1756cb66 VM |
2518 | if ((diff |
2519 | = ALLOCNO_COLOR_DATA (a1)->temp - ALLOCNO_COLOR_DATA (a2)->temp) != 0) | |
058e97ec VM |
2520 | return diff; |
2521 | return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2); | |
2522 | } | |
2523 | ||
1756cb66 VM |
2524 | /* Used for sorting allocnos for spilling. */ |
2525 | static int | |
2526 | allocno_spill_sort_compare (const void *v1p, const void *v2p) | |
99710245 | 2527 | { |
1756cb66 VM |
2528 | ira_allocno_t p1 = *(const ira_allocno_t *) v1p; |
2529 | ira_allocno_t p2 = *(const ira_allocno_t *) v2p; | |
99710245 | 2530 | |
1756cb66 | 2531 | return allocno_spill_priority_compare (p1, p2); |
058e97ec VM |
2532 | } |
2533 | ||
2534 | /* Push allocnos to the coloring stack. The order of allocnos in the | |
1756cb66 VM |
2535 | stack defines the order for the subsequent coloring. */ |
2536 | static void | |
2537 | push_allocnos_to_stack (void) | |
2538 | { | |
2539 | ira_allocno_t a; | |
2540 | int cost; | |
2541 | ||
2542 | /* Calculate uncolorable allocno spill costs. */ | |
2543 | for (a = uncolorable_allocno_bucket; | |
2544 | a != NULL; | |
2545 | a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno) | |
2546 | if (ALLOCNO_CLASS (a) != NO_REGS) | |
2547 | { | |
2548 | cost = calculate_allocno_spill_cost (a); | |
2549 | /* ??? Remove cost of copies between the coalesced | |
2550 | allocnos. */ | |
2551 | ALLOCNO_COLOR_DATA (a)->temp = cost; | |
2552 | } | |
2553 | sort_bucket (&uncolorable_allocno_bucket, allocno_spill_sort_compare); | |
2554 | for (;;) | |
2555 | { | |
2556 | push_only_colorable (); | |
2557 | a = uncolorable_allocno_bucket; | |
2558 | if (a == NULL) | |
2559 | break; | |
2560 | remove_allocno_from_bucket_and_push (a, false); | |
058e97ec VM |
2561 | } |
2562 | ira_assert (colorable_allocno_bucket == NULL | |
2563 | && uncolorable_allocno_bucket == NULL); | |
1756cb66 | 2564 | ira_assert (uncolorable_allocnos_num == 0); |
058e97ec VM |
2565 | } |
2566 | ||
2567 | /* Pop the coloring stack and assign hard registers to the popped | |
2568 | allocnos. */ | |
2569 | static void | |
2570 | pop_allocnos_from_stack (void) | |
2571 | { | |
2572 | ira_allocno_t allocno; | |
1756cb66 | 2573 | enum reg_class aclass; |
058e97ec | 2574 | |
9771b263 | 2575 | for (;allocno_stack_vec.length () != 0;) |
058e97ec | 2576 | { |
9771b263 | 2577 | allocno = allocno_stack_vec.pop (); |
1756cb66 | 2578 | aclass = ALLOCNO_CLASS (allocno); |
058e97ec VM |
2579 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) |
2580 | { | |
2581 | fprintf (ira_dump_file, " Popping"); | |
22b0982c | 2582 | ira_print_expanded_allocno (allocno); |
058e97ec VM |
2583 | fprintf (ira_dump_file, " -- "); |
2584 | } | |
1756cb66 | 2585 | if (aclass == NO_REGS) |
058e97ec VM |
2586 | { |
2587 | ALLOCNO_HARD_REGNO (allocno) = -1; | |
2588 | ALLOCNO_ASSIGNED_P (allocno) = true; | |
2589 | ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (allocno) == NULL); | |
2590 | ira_assert | |
2591 | (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno) == NULL); | |
2592 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2593 | fprintf (ira_dump_file, "assign memory\n"); | |
2594 | } | |
2595 | else if (assign_hard_reg (allocno, false)) | |
2596 | { | |
2597 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2598 | fprintf (ira_dump_file, "assign reg %d\n", | |
2599 | ALLOCNO_HARD_REGNO (allocno)); | |
2600 | } | |
2601 | else if (ALLOCNO_ASSIGNED_P (allocno)) | |
2602 | { | |
2603 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3b6d1699 VM |
2604 | fprintf (ira_dump_file, "spill%s\n", |
2605 | ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p | |
2606 | ? "" : "!"); | |
058e97ec | 2607 | } |
1756cb66 | 2608 | ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true; |
ac0ab4f7 BS |
2609 | } |
2610 | } | |
2611 | ||
22b0982c | 2612 | /* Set up number of available hard registers for allocno A. */ |
058e97ec | 2613 | static void |
22b0982c | 2614 | setup_allocno_available_regs_num (ira_allocno_t a) |
058e97ec | 2615 | { |
27508f5f | 2616 | int i, n, hard_regno, hard_regs_num, nwords; |
1756cb66 | 2617 | enum reg_class aclass; |
1756cb66 | 2618 | allocno_color_data_t data; |
058e97ec | 2619 | |
1756cb66 VM |
2620 | aclass = ALLOCNO_CLASS (a); |
2621 | data = ALLOCNO_COLOR_DATA (a); | |
2622 | data->available_regs_num = 0; | |
2623 | if (aclass == NO_REGS) | |
058e97ec | 2624 | return; |
1756cb66 | 2625 | hard_regs_num = ira_class_hard_regs_num[aclass]; |
1756cb66 | 2626 | nwords = ALLOCNO_NUM_OBJECTS (a); |
058e97ec | 2627 | for (n = 0, i = hard_regs_num - 1; i >= 0; i--) |
478ab26d | 2628 | { |
1756cb66 | 2629 | hard_regno = ira_class_hard_regs[aclass][i]; |
27508f5f VM |
2630 | /* Checking only profitable hard regs. */ |
2631 | if (TEST_HARD_REG_BIT (data->profitable_hard_regs, hard_regno)) | |
478ab26d VM |
2632 | n++; |
2633 | } | |
1756cb66 VM |
2634 | data->available_regs_num = n; |
2635 | if (internal_flag_ira_verbose <= 2 || ira_dump_file == NULL) | |
2636 | return; | |
2637 | fprintf | |
2638 | (ira_dump_file, | |
27508f5f | 2639 | " Allocno a%dr%d of %s(%d) has %d avail. regs ", |
1756cb66 VM |
2640 | ALLOCNO_NUM (a), ALLOCNO_REGNO (a), |
2641 | reg_class_names[aclass], ira_class_hard_regs_num[aclass], n); | |
27508f5f VM |
2642 | print_hard_reg_set (ira_dump_file, data->profitable_hard_regs, false); |
2643 | fprintf (ira_dump_file, ", %snode: ", | |
2644 | hard_reg_set_equal_p (data->profitable_hard_regs, | |
2645 | data->hard_regs_node->hard_regs->set) | |
2646 | ? "" : "^"); | |
2647 | print_hard_reg_set (ira_dump_file, | |
2648 | data->hard_regs_node->hard_regs->set, false); | |
1756cb66 | 2649 | for (i = 0; i < nwords; i++) |
22b0982c | 2650 | { |
1756cb66 | 2651 | ira_object_t obj = ALLOCNO_OBJECT (a, i); |
ac0ab4f7 | 2652 | |
1756cb66 | 2653 | if (nwords != 1) |
22b0982c | 2654 | { |
1756cb66 VM |
2655 | if (i != 0) |
2656 | fprintf (ira_dump_file, ", "); | |
2657 | fprintf (ira_dump_file, " obj %d", i); | |
22b0982c | 2658 | } |
1756cb66 VM |
2659 | fprintf (ira_dump_file, " (confl regs = "); |
2660 | print_hard_reg_set (ira_dump_file, OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), | |
2661 | false); | |
27508f5f | 2662 | fprintf (ira_dump_file, ")"); |
22b0982c | 2663 | } |
1756cb66 | 2664 | fprintf (ira_dump_file, "\n"); |
058e97ec VM |
2665 | } |
2666 | ||
2667 | /* Put ALLOCNO in a bucket corresponding to its number and size of its | |
2668 | conflicting allocnos and hard registers. */ | |
2669 | static void | |
2670 | put_allocno_into_bucket (ira_allocno_t allocno) | |
2671 | { | |
1756cb66 | 2672 | ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true; |
058e97ec | 2673 | setup_allocno_available_regs_num (allocno); |
1756cb66 | 2674 | if (setup_left_conflict_sizes_p (allocno)) |
548a6322 | 2675 | add_allocno_to_bucket (allocno, &colorable_allocno_bucket); |
058e97ec | 2676 | else |
548a6322 | 2677 | add_allocno_to_bucket (allocno, &uncolorable_allocno_bucket); |
058e97ec VM |
2678 | } |
2679 | ||
22b0982c VM |
2680 | /* Map: allocno number -> allocno priority. */ |
2681 | static int *allocno_priorities; | |
058e97ec | 2682 | |
22b0982c VM |
2683 | /* Set up priorities for N allocnos in array |
2684 | CONSIDERATION_ALLOCNOS. */ | |
058e97ec | 2685 | static void |
22b0982c | 2686 | setup_allocno_priorities (ira_allocno_t *consideration_allocnos, int n) |
058e97ec | 2687 | { |
22b0982c VM |
2688 | int i, length, nrefs, priority, max_priority, mult; |
2689 | ira_allocno_t a; | |
058e97ec | 2690 | |
22b0982c VM |
2691 | max_priority = 0; |
2692 | for (i = 0; i < n; i++) | |
7db7ed3c VM |
2693 | { |
2694 | a = consideration_allocnos[i]; | |
2695 | nrefs = ALLOCNO_NREFS (a); | |
2696 | ira_assert (nrefs >= 0); | |
2697 | mult = floor_log2 (ALLOCNO_NREFS (a)) + 1; | |
2698 | ira_assert (mult >= 0); | |
2699 | allocno_priorities[ALLOCNO_NUM (a)] | |
2700 | = priority | |
2701 | = (mult | |
1756cb66 VM |
2702 | * (ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a)) |
2703 | * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]); | |
7db7ed3c VM |
2704 | if (priority < 0) |
2705 | priority = -priority; | |
2706 | if (max_priority < priority) | |
2707 | max_priority = priority; | |
2708 | } | |
2709 | mult = max_priority == 0 ? 1 : INT_MAX / max_priority; | |
2710 | for (i = 0; i < n; i++) | |
2711 | { | |
2712 | a = consideration_allocnos[i]; | |
2713 | length = ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a); | |
ac0ab4f7 BS |
2714 | if (ALLOCNO_NUM_OBJECTS (a) > 1) |
2715 | length /= ALLOCNO_NUM_OBJECTS (a); | |
7db7ed3c VM |
2716 | if (length <= 0) |
2717 | length = 1; | |
2718 | allocno_priorities[ALLOCNO_NUM (a)] | |
2719 | = allocno_priorities[ALLOCNO_NUM (a)] * mult / length; | |
2720 | } | |
2721 | } | |
2722 | ||
1756cb66 VM |
2723 | /* Sort allocnos according to the profit of usage of a hard register |
2724 | instead of memory for them. */ | |
2725 | static int | |
2726 | allocno_cost_compare_func (const void *v1p, const void *v2p) | |
2727 | { | |
2728 | ira_allocno_t p1 = *(const ira_allocno_t *) v1p; | |
2729 | ira_allocno_t p2 = *(const ira_allocno_t *) v2p; | |
2730 | int c1, c2; | |
2731 | ||
2732 | c1 = ALLOCNO_UPDATED_MEMORY_COST (p1) - ALLOCNO_UPDATED_CLASS_COST (p1); | |
2733 | c2 = ALLOCNO_UPDATED_MEMORY_COST (p2) - ALLOCNO_UPDATED_CLASS_COST (p2); | |
2734 | if (c1 - c2) | |
2735 | return c1 - c2; | |
2736 | ||
2737 | /* If regs are equally good, sort by allocno numbers, so that the | |
2738 | results of qsort leave nothing to chance. */ | |
2739 | return ALLOCNO_NUM (p1) - ALLOCNO_NUM (p2); | |
2740 | } | |
2741 | ||
da178d56 VM |
2742 | /* Return savings on removed copies when ALLOCNO is assigned to |
2743 | HARD_REGNO. */ | |
2744 | static int | |
2745 | allocno_copy_cost_saving (ira_allocno_t allocno, int hard_regno) | |
2746 | { | |
2747 | int cost = 0; | |
b8506a8a | 2748 | machine_mode allocno_mode = ALLOCNO_MODE (allocno); |
da178d56 VM |
2749 | enum reg_class rclass; |
2750 | ira_copy_t cp, next_cp; | |
2751 | ||
2752 | rclass = REGNO_REG_CLASS (hard_regno); | |
c4b1942c VM |
2753 | if (ira_reg_class_max_nregs[rclass][allocno_mode] |
2754 | > ira_class_hard_regs_num[rclass]) | |
2755 | /* For the above condition the cost can be wrong. Use the allocno | |
2756 | class in this case. */ | |
2757 | rclass = ALLOCNO_CLASS (allocno); | |
da178d56 VM |
2758 | for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp) |
2759 | { | |
2760 | if (cp->first == allocno) | |
2761 | { | |
2762 | next_cp = cp->next_first_allocno_copy; | |
2763 | if (ALLOCNO_HARD_REGNO (cp->second) != hard_regno) | |
2764 | continue; | |
2765 | } | |
2766 | else if (cp->second == allocno) | |
2767 | { | |
2768 | next_cp = cp->next_second_allocno_copy; | |
2769 | if (ALLOCNO_HARD_REGNO (cp->first) != hard_regno) | |
2770 | continue; | |
2771 | } | |
2772 | else | |
2773 | gcc_unreachable (); | |
c4b1942c | 2774 | cost += cp->freq * ira_register_move_cost[allocno_mode][rclass][rclass]; |
da178d56 VM |
2775 | } |
2776 | return cost; | |
2777 | } | |
2778 | ||
1756cb66 VM |
2779 | /* We used Chaitin-Briggs coloring to assign as many pseudos as |
2780 | possible to hard registers. Let us try to improve allocation with | |
2781 | cost point of view. This function improves the allocation by | |
2782 | spilling some allocnos and assigning the freed hard registers to | |
2783 | other allocnos if it decreases the overall allocation cost. */ | |
2784 | static void | |
2785 | improve_allocation (void) | |
2786 | { | |
2787 | unsigned int i; | |
2788 | int j, k, n, hregno, conflict_hregno, base_cost, class_size, word, nwords; | |
2789 | int check, spill_cost, min_cost, nregs, conflict_nregs, r, best; | |
2790 | bool try_p; | |
2791 | enum reg_class aclass; | |
ef4bddc2 | 2792 | machine_mode mode; |
1756cb66 VM |
2793 | int *allocno_costs; |
2794 | int costs[FIRST_PSEUDO_REGISTER]; | |
27508f5f | 2795 | HARD_REG_SET conflicting_regs[2], profitable_hard_regs; |
1756cb66 VM |
2796 | ira_allocno_t a; |
2797 | bitmap_iterator bi; | |
2798 | ||
b81a2f0d VM |
2799 | /* Don't bother to optimize the code with static chain pointer and |
2800 | non-local goto in order not to spill the chain pointer | |
2801 | pseudo. */ | |
2802 | if (cfun->static_chain_decl && crtl->has_nonlocal_goto) | |
2803 | return; | |
1756cb66 VM |
2804 | /* Clear counts used to process conflicting allocnos only once for |
2805 | each allocno. */ | |
2806 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) | |
2807 | ALLOCNO_COLOR_DATA (ira_allocnos[i])->temp = 0; | |
2808 | check = n = 0; | |
2809 | /* Process each allocno and try to assign a hard register to it by | |
2810 | spilling some its conflicting allocnos. */ | |
2811 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) | |
2812 | { | |
2813 | a = ira_allocnos[i]; | |
2814 | ALLOCNO_COLOR_DATA (a)->temp = 0; | |
2815 | if (empty_profitable_hard_regs (a)) | |
2816 | continue; | |
2817 | check++; | |
2818 | aclass = ALLOCNO_CLASS (a); | |
da178d56 | 2819 | allocno_costs = ALLOCNO_HARD_REG_COSTS (a); |
1756cb66 VM |
2820 | if ((hregno = ALLOCNO_HARD_REGNO (a)) < 0) |
2821 | base_cost = ALLOCNO_UPDATED_MEMORY_COST (a); | |
2822 | else if (allocno_costs == NULL) | |
2823 | /* It means that assigning a hard register is not profitable | |
2824 | (we don't waste memory for hard register costs in this | |
2825 | case). */ | |
2826 | continue; | |
2827 | else | |
da178d56 VM |
2828 | base_cost = (allocno_costs[ira_class_hard_reg_index[aclass][hregno]] |
2829 | - allocno_copy_cost_saving (a, hregno)); | |
1756cb66 | 2830 | try_p = false; |
27508f5f VM |
2831 | get_conflict_and_start_profitable_regs (a, false, |
2832 | conflicting_regs, | |
2833 | &profitable_hard_regs); | |
1756cb66 VM |
2834 | class_size = ira_class_hard_regs_num[aclass]; |
2835 | /* Set up cost improvement for usage of each profitable hard | |
2836 | register for allocno A. */ | |
2837 | for (j = 0; j < class_size; j++) | |
2838 | { | |
2839 | hregno = ira_class_hard_regs[aclass][j]; | |
2840 | if (! check_hard_reg_p (a, hregno, | |
2841 | conflicting_regs, profitable_hard_regs)) | |
2842 | continue; | |
2843 | ira_assert (ira_class_hard_reg_index[aclass][hregno] == j); | |
2844 | k = allocno_costs == NULL ? 0 : j; | |
2845 | costs[hregno] = (allocno_costs == NULL | |
2846 | ? ALLOCNO_UPDATED_CLASS_COST (a) : allocno_costs[k]); | |
da178d56 | 2847 | costs[hregno] -= allocno_copy_cost_saving (a, hregno); |
1756cb66 VM |
2848 | costs[hregno] -= base_cost; |
2849 | if (costs[hregno] < 0) | |
2850 | try_p = true; | |
2851 | } | |
2852 | if (! try_p) | |
2853 | /* There is no chance to improve the allocation cost by | |
2854 | assigning hard register to allocno A even without spilling | |
2855 | conflicting allocnos. */ | |
2856 | continue; | |
2857 | mode = ALLOCNO_MODE (a); | |
2858 | nwords = ALLOCNO_NUM_OBJECTS (a); | |
2859 | /* Process each allocno conflicting with A and update the cost | |
2860 | improvement for profitable hard registers of A. To use a | |
2861 | hard register for A we need to spill some conflicting | |
2862 | allocnos and that creates penalty for the cost | |
2863 | improvement. */ | |
2864 | for (word = 0; word < nwords; word++) | |
2865 | { | |
2866 | ira_object_t conflict_obj; | |
2867 | ira_object_t obj = ALLOCNO_OBJECT (a, word); | |
2868 | ira_object_conflict_iterator oci; | |
2869 | ||
2870 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) | |
2871 | { | |
2872 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); | |
2873 | ||
2874 | if (ALLOCNO_COLOR_DATA (conflict_a)->temp == check) | |
2875 | /* We already processed this conflicting allocno | |
2876 | because we processed earlier another object of the | |
2877 | conflicting allocno. */ | |
2878 | continue; | |
2879 | ALLOCNO_COLOR_DATA (conflict_a)->temp = check; | |
2880 | if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0) | |
2881 | continue; | |
2882 | spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a); | |
2883 | k = (ira_class_hard_reg_index | |
2884 | [ALLOCNO_CLASS (conflict_a)][conflict_hregno]); | |
2885 | ira_assert (k >= 0); | |
da178d56 | 2886 | if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a)) |
1756cb66 VM |
2887 | != NULL) |
2888 | spill_cost -= allocno_costs[k]; | |
1756cb66 VM |
2889 | else |
2890 | spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a); | |
da178d56 VM |
2891 | spill_cost |
2892 | += allocno_copy_cost_saving (conflict_a, conflict_hregno); | |
1756cb66 VM |
2893 | conflict_nregs |
2894 | = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)]; | |
2895 | for (r = conflict_hregno; | |
2896 | r >= 0 && r + hard_regno_nregs[r][mode] > conflict_hregno; | |
2897 | r--) | |
2898 | if (check_hard_reg_p (a, r, | |
2899 | conflicting_regs, profitable_hard_regs)) | |
2900 | costs[r] += spill_cost; | |
2901 | for (r = conflict_hregno + 1; | |
2902 | r < conflict_hregno + conflict_nregs; | |
2903 | r++) | |
2904 | if (check_hard_reg_p (a, r, | |
2905 | conflicting_regs, profitable_hard_regs)) | |
2906 | costs[r] += spill_cost; | |
2907 | } | |
2908 | } | |
2909 | min_cost = INT_MAX; | |
2910 | best = -1; | |
2911 | /* Now we choose hard register for A which results in highest | |
2912 | allocation cost improvement. */ | |
2913 | for (j = 0; j < class_size; j++) | |
2914 | { | |
2915 | hregno = ira_class_hard_regs[aclass][j]; | |
2916 | if (check_hard_reg_p (a, hregno, | |
2917 | conflicting_regs, profitable_hard_regs) | |
2918 | && min_cost > costs[hregno]) | |
2919 | { | |
2920 | best = hregno; | |
2921 | min_cost = costs[hregno]; | |
2922 | } | |
2923 | } | |
2924 | if (min_cost >= 0) | |
2925 | /* We are in a situation when assigning any hard register to A | |
2926 | by spilling some conflicting allocnos does not improve the | |
2927 | allocation cost. */ | |
2928 | continue; | |
2929 | nregs = hard_regno_nregs[best][mode]; | |
2930 | /* Now spill conflicting allocnos which contain a hard register | |
2931 | of A when we assign the best chosen hard register to it. */ | |
2932 | for (word = 0; word < nwords; word++) | |
2933 | { | |
2934 | ira_object_t conflict_obj; | |
2935 | ira_object_t obj = ALLOCNO_OBJECT (a, word); | |
2936 | ira_object_conflict_iterator oci; | |
2937 | ||
2938 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) | |
2939 | { | |
2940 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); | |
2941 | ||
2942 | if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0) | |
2943 | continue; | |
2944 | conflict_nregs | |
2945 | = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)]; | |
2946 | if (best + nregs <= conflict_hregno | |
2947 | || conflict_hregno + conflict_nregs <= best) | |
2948 | /* No intersection. */ | |
2949 | continue; | |
2950 | ALLOCNO_HARD_REGNO (conflict_a) = -1; | |
2951 | sorted_allocnos[n++] = conflict_a; | |
2952 | if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL) | |
2953 | fprintf (ira_dump_file, "Spilling a%dr%d for a%dr%d\n", | |
2954 | ALLOCNO_NUM (conflict_a), ALLOCNO_REGNO (conflict_a), | |
2955 | ALLOCNO_NUM (a), ALLOCNO_REGNO (a)); | |
2956 | } | |
2957 | } | |
2958 | /* Assign the best chosen hard register to A. */ | |
2959 | ALLOCNO_HARD_REGNO (a) = best; | |
2960 | if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL) | |
2961 | fprintf (ira_dump_file, "Assigning %d to a%dr%d\n", | |
2962 | best, ALLOCNO_NUM (a), ALLOCNO_REGNO (a)); | |
2963 | } | |
2964 | if (n == 0) | |
2965 | return; | |
2966 | /* We spilled some allocnos to assign their hard registers to other | |
2967 | allocnos. The spilled allocnos are now in array | |
2968 | 'sorted_allocnos'. There is still a possibility that some of the | |
2969 | spilled allocnos can get hard registers. So let us try assign | |
2970 | them hard registers again (just a reminder -- function | |
2971 | 'assign_hard_reg' assigns hard registers only if it is possible | |
2972 | and profitable). We process the spilled allocnos with biggest | |
2973 | benefit to get hard register first -- see function | |
2974 | 'allocno_cost_compare_func'. */ | |
2975 | qsort (sorted_allocnos, n, sizeof (ira_allocno_t), | |
2976 | allocno_cost_compare_func); | |
2977 | for (j = 0; j < n; j++) | |
2978 | { | |
2979 | a = sorted_allocnos[j]; | |
2980 | ALLOCNO_ASSIGNED_P (a) = false; | |
2981 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2982 | { | |
2983 | fprintf (ira_dump_file, " "); | |
2984 | ira_print_expanded_allocno (a); | |
2985 | fprintf (ira_dump_file, " -- "); | |
2986 | } | |
2987 | if (assign_hard_reg (a, false)) | |
2988 | { | |
2989 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2990 | fprintf (ira_dump_file, "assign hard reg %d\n", | |
2991 | ALLOCNO_HARD_REGNO (a)); | |
2992 | } | |
2993 | else | |
2994 | { | |
2995 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
2996 | fprintf (ira_dump_file, "assign memory\n"); | |
2997 | } | |
2998 | } | |
2999 | } | |
3000 | ||
aeb9f7cf | 3001 | /* Sort allocnos according to their priorities. */ |
7db7ed3c VM |
3002 | static int |
3003 | allocno_priority_compare_func (const void *v1p, const void *v2p) | |
3004 | { | |
3005 | ira_allocno_t a1 = *(const ira_allocno_t *) v1p; | |
3006 | ira_allocno_t a2 = *(const ira_allocno_t *) v2p; | |
3007 | int pri1, pri2; | |
3008 | ||
b81a2f0d VM |
3009 | /* Assign hard reg to static chain pointer pseudo first when |
3010 | non-local goto is used. */ | |
3011 | if (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a1))) | |
3012 | return 1; | |
3013 | else if (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a2))) | |
3014 | return -1; | |
7db7ed3c VM |
3015 | pri1 = allocno_priorities[ALLOCNO_NUM (a1)]; |
3016 | pri2 = allocno_priorities[ALLOCNO_NUM (a2)]; | |
71af27d2 OH |
3017 | if (pri2 != pri1) |
3018 | return SORTGT (pri2, pri1); | |
7db7ed3c VM |
3019 | |
3020 | /* If regs are equally good, sort by allocnos, so that the results of | |
3021 | qsort leave nothing to chance. */ | |
3022 | return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2); | |
3023 | } | |
3024 | ||
058e97ec VM |
3025 | /* Chaitin-Briggs coloring for allocnos in COLORING_ALLOCNO_BITMAP |
3026 | taking into account allocnos in CONSIDERATION_ALLOCNO_BITMAP. */ | |
3027 | static void | |
3028 | color_allocnos (void) | |
3029 | { | |
7db7ed3c | 3030 | unsigned int i, n; |
058e97ec VM |
3031 | bitmap_iterator bi; |
3032 | ira_allocno_t a; | |
3033 | ||
76763a6d | 3034 | setup_profitable_hard_regs (); |
3b6d1699 VM |
3035 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) |
3036 | { | |
3037 | int l, nr; | |
3038 | HARD_REG_SET conflict_hard_regs; | |
3039 | allocno_color_data_t data; | |
3040 | ira_pref_t pref, next_pref; | |
3041 | ||
3042 | a = ira_allocnos[i]; | |
3043 | nr = ALLOCNO_NUM_OBJECTS (a); | |
3044 | CLEAR_HARD_REG_SET (conflict_hard_regs); | |
3045 | for (l = 0; l < nr; l++) | |
3046 | { | |
3047 | ira_object_t obj = ALLOCNO_OBJECT (a, l); | |
3048 | IOR_HARD_REG_SET (conflict_hard_regs, | |
3049 | OBJECT_CONFLICT_HARD_REGS (obj)); | |
3050 | } | |
3051 | data = ALLOCNO_COLOR_DATA (a); | |
3052 | for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = next_pref) | |
3053 | { | |
3054 | next_pref = pref->next_pref; | |
3055 | if (! ira_hard_reg_in_set_p (pref->hard_regno, | |
3056 | ALLOCNO_MODE (a), | |
3057 | data->profitable_hard_regs)) | |
3058 | ira_remove_pref (pref); | |
3059 | } | |
3060 | } | |
7db7ed3c | 3061 | if (flag_ira_algorithm == IRA_ALGORITHM_PRIORITY) |
058e97ec | 3062 | { |
7db7ed3c VM |
3063 | n = 0; |
3064 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) | |
058e97ec | 3065 | { |
7db7ed3c | 3066 | a = ira_allocnos[i]; |
1756cb66 | 3067 | if (ALLOCNO_CLASS (a) == NO_REGS) |
058e97ec | 3068 | { |
7db7ed3c VM |
3069 | ALLOCNO_HARD_REGNO (a) = -1; |
3070 | ALLOCNO_ASSIGNED_P (a) = true; | |
3071 | ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL); | |
3072 | ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL); | |
3073 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3074 | { | |
3075 | fprintf (ira_dump_file, " Spill"); | |
22b0982c | 3076 | ira_print_expanded_allocno (a); |
7db7ed3c VM |
3077 | fprintf (ira_dump_file, "\n"); |
3078 | } | |
3079 | continue; | |
058e97ec | 3080 | } |
7db7ed3c VM |
3081 | sorted_allocnos[n++] = a; |
3082 | } | |
3083 | if (n != 0) | |
3084 | { | |
3085 | setup_allocno_priorities (sorted_allocnos, n); | |
3086 | qsort (sorted_allocnos, n, sizeof (ira_allocno_t), | |
3087 | allocno_priority_compare_func); | |
3088 | for (i = 0; i < n; i++) | |
3089 | { | |
3090 | a = sorted_allocnos[i]; | |
3091 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3092 | { | |
3093 | fprintf (ira_dump_file, " "); | |
22b0982c | 3094 | ira_print_expanded_allocno (a); |
7db7ed3c VM |
3095 | fprintf (ira_dump_file, " -- "); |
3096 | } | |
3097 | if (assign_hard_reg (a, false)) | |
3098 | { | |
3099 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3100 | fprintf (ira_dump_file, "assign hard reg %d\n", | |
3101 | ALLOCNO_HARD_REGNO (a)); | |
3102 | } | |
3103 | else | |
3104 | { | |
3105 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3106 | fprintf (ira_dump_file, "assign memory\n"); | |
3107 | } | |
3108 | } | |
3109 | } | |
3110 | } | |
3111 | else | |
3112 | { | |
27508f5f | 3113 | form_allocno_hard_regs_nodes_forest (); |
1756cb66 VM |
3114 | if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL) |
3115 | print_hard_regs_forest (ira_dump_file); | |
7db7ed3c VM |
3116 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) |
3117 | { | |
3118 | a = ira_allocnos[i]; | |
1756cb66 | 3119 | if (ALLOCNO_CLASS (a) != NO_REGS && ! empty_profitable_hard_regs (a)) |
3b6d1699 VM |
3120 | { |
3121 | ALLOCNO_COLOR_DATA (a)->in_graph_p = true; | |
3122 | update_costs_from_prefs (a); | |
3123 | } | |
1756cb66 | 3124 | else |
7db7ed3c VM |
3125 | { |
3126 | ALLOCNO_HARD_REGNO (a) = -1; | |
3127 | ALLOCNO_ASSIGNED_P (a) = true; | |
1756cb66 VM |
3128 | /* We don't need updated costs anymore. */ |
3129 | ira_free_allocno_updated_costs (a); | |
7db7ed3c VM |
3130 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) |
3131 | { | |
3132 | fprintf (ira_dump_file, " Spill"); | |
22b0982c | 3133 | ira_print_expanded_allocno (a); |
7db7ed3c VM |
3134 | fprintf (ira_dump_file, "\n"); |
3135 | } | |
7db7ed3c | 3136 | } |
1756cb66 VM |
3137 | } |
3138 | /* Put the allocnos into the corresponding buckets. */ | |
3139 | colorable_allocno_bucket = NULL; | |
3140 | uncolorable_allocno_bucket = NULL; | |
3141 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi) | |
3142 | { | |
3143 | a = ira_allocnos[i]; | |
3144 | if (ALLOCNO_COLOR_DATA (a)->in_graph_p) | |
3145 | put_allocno_into_bucket (a); | |
058e97ec | 3146 | } |
7db7ed3c VM |
3147 | push_allocnos_to_stack (); |
3148 | pop_allocnos_from_stack (); | |
27508f5f | 3149 | finish_allocno_hard_regs_nodes_forest (); |
058e97ec | 3150 | } |
1756cb66 | 3151 | improve_allocation (); |
058e97ec VM |
3152 | } |
3153 | ||
3154 | \f | |
3155 | ||
2b9c63a2 | 3156 | /* Output information about the loop given by its LOOP_TREE_NODE. */ |
058e97ec VM |
3157 | static void |
3158 | print_loop_title (ira_loop_tree_node_t loop_tree_node) | |
3159 | { | |
3160 | unsigned int j; | |
3161 | bitmap_iterator bi; | |
ea1c67e6 VM |
3162 | ira_loop_tree_node_t subloop_node, dest_loop_node; |
3163 | edge e; | |
3164 | edge_iterator ei; | |
058e97ec | 3165 | |
2608d841 VM |
3166 | if (loop_tree_node->parent == NULL) |
3167 | fprintf (ira_dump_file, | |
3168 | "\n Loop 0 (parent -1, header bb%d, depth 0)\n bbs:", | |
3169 | NUM_FIXED_BLOCKS); | |
3170 | else | |
3171 | { | |
3172 | ira_assert (current_loops != NULL && loop_tree_node->loop != NULL); | |
3173 | fprintf (ira_dump_file, | |
3174 | "\n Loop %d (parent %d, header bb%d, depth %d)\n bbs:", | |
3175 | loop_tree_node->loop_num, loop_tree_node->parent->loop_num, | |
3176 | loop_tree_node->loop->header->index, | |
3177 | loop_depth (loop_tree_node->loop)); | |
3178 | } | |
ea1c67e6 VM |
3179 | for (subloop_node = loop_tree_node->children; |
3180 | subloop_node != NULL; | |
3181 | subloop_node = subloop_node->next) | |
3182 | if (subloop_node->bb != NULL) | |
3183 | { | |
3184 | fprintf (ira_dump_file, " %d", subloop_node->bb->index); | |
3185 | FOR_EACH_EDGE (e, ei, subloop_node->bb->succs) | |
fefa31b5 | 3186 | if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) |
ea1c67e6 VM |
3187 | && ((dest_loop_node = IRA_BB_NODE (e->dest)->parent) |
3188 | != loop_tree_node)) | |
3189 | fprintf (ira_dump_file, "(->%d:l%d)", | |
2608d841 | 3190 | e->dest->index, dest_loop_node->loop_num); |
ea1c67e6 VM |
3191 | } |
3192 | fprintf (ira_dump_file, "\n all:"); | |
49d988e7 | 3193 | EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi) |
058e97ec VM |
3194 | fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j])); |
3195 | fprintf (ira_dump_file, "\n modified regnos:"); | |
3196 | EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->modified_regnos, 0, j, bi) | |
3197 | fprintf (ira_dump_file, " %d", j); | |
3198 | fprintf (ira_dump_file, "\n border:"); | |
3199 | EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->border_allocnos, 0, j, bi) | |
3200 | fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j])); | |
3201 | fprintf (ira_dump_file, "\n Pressure:"); | |
1756cb66 | 3202 | for (j = 0; (int) j < ira_pressure_classes_num; j++) |
058e97ec | 3203 | { |
1756cb66 | 3204 | enum reg_class pclass; |
b8698a0f | 3205 | |
1756cb66 VM |
3206 | pclass = ira_pressure_classes[j]; |
3207 | if (loop_tree_node->reg_pressure[pclass] == 0) | |
058e97ec | 3208 | continue; |
1756cb66 VM |
3209 | fprintf (ira_dump_file, " %s=%d", reg_class_names[pclass], |
3210 | loop_tree_node->reg_pressure[pclass]); | |
058e97ec VM |
3211 | } |
3212 | fprintf (ira_dump_file, "\n"); | |
3213 | } | |
3214 | ||
3215 | /* Color the allocnos inside loop (in the extreme case it can be all | |
3216 | of the function) given the corresponding LOOP_TREE_NODE. The | |
3217 | function is called for each loop during top-down traverse of the | |
3218 | loop tree. */ | |
3219 | static void | |
3220 | color_pass (ira_loop_tree_node_t loop_tree_node) | |
3221 | { | |
27508f5f | 3222 | int regno, hard_regno, index = -1, n; |
058e97ec VM |
3223 | int cost, exit_freq, enter_freq; |
3224 | unsigned int j; | |
3225 | bitmap_iterator bi; | |
ef4bddc2 | 3226 | machine_mode mode; |
1756cb66 | 3227 | enum reg_class rclass, aclass, pclass; |
058e97ec VM |
3228 | ira_allocno_t a, subloop_allocno; |
3229 | ira_loop_tree_node_t subloop_node; | |
3230 | ||
3231 | ira_assert (loop_tree_node->bb == NULL); | |
3232 | if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL) | |
3233 | print_loop_title (loop_tree_node); | |
3234 | ||
49d988e7 | 3235 | bitmap_copy (coloring_allocno_bitmap, loop_tree_node->all_allocnos); |
058e97ec | 3236 | bitmap_copy (consideration_allocno_bitmap, coloring_allocno_bitmap); |
27508f5f | 3237 | n = 0; |
1756cb66 VM |
3238 | EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi) |
3239 | { | |
3240 | a = ira_allocnos[j]; | |
3241 | n++; | |
1756cb66 VM |
3242 | if (! ALLOCNO_ASSIGNED_P (a)) |
3243 | continue; | |
3244 | bitmap_clear_bit (coloring_allocno_bitmap, ALLOCNO_NUM (a)); | |
3245 | } | |
3246 | allocno_color_data | |
3247 | = (allocno_color_data_t) ira_allocate (sizeof (struct allocno_color_data) | |
3248 | * n); | |
3249 | memset (allocno_color_data, 0, sizeof (struct allocno_color_data) * n); | |
27508f5f VM |
3250 | curr_allocno_process = 0; |
3251 | n = 0; | |
058e97ec VM |
3252 | EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi) |
3253 | { | |
3254 | a = ira_allocnos[j]; | |
1756cb66 VM |
3255 | ALLOCNO_ADD_DATA (a) = allocno_color_data + n; |
3256 | n++; | |
058e97ec | 3257 | } |
bf08fb16 | 3258 | init_allocno_threads (); |
058e97ec VM |
3259 | /* Color all mentioned allocnos including transparent ones. */ |
3260 | color_allocnos (); | |
3261 | /* Process caps. They are processed just once. */ | |
7db7ed3c VM |
3262 | if (flag_ira_region == IRA_REGION_MIXED |
3263 | || flag_ira_region == IRA_REGION_ALL) | |
49d988e7 | 3264 | EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi) |
058e97ec VM |
3265 | { |
3266 | a = ira_allocnos[j]; | |
3267 | if (ALLOCNO_CAP_MEMBER (a) == NULL) | |
3268 | continue; | |
3269 | /* Remove from processing in the next loop. */ | |
3270 | bitmap_clear_bit (consideration_allocno_bitmap, j); | |
1756cb66 VM |
3271 | rclass = ALLOCNO_CLASS (a); |
3272 | pclass = ira_pressure_class_translate[rclass]; | |
7db7ed3c | 3273 | if (flag_ira_region == IRA_REGION_MIXED |
1756cb66 | 3274 | && (loop_tree_node->reg_pressure[pclass] |
f508f827 | 3275 | <= ira_class_hard_regs_num[pclass])) |
058e97ec VM |
3276 | { |
3277 | mode = ALLOCNO_MODE (a); | |
3278 | hard_regno = ALLOCNO_HARD_REGNO (a); | |
3279 | if (hard_regno >= 0) | |
3280 | { | |
3281 | index = ira_class_hard_reg_index[rclass][hard_regno]; | |
3282 | ira_assert (index >= 0); | |
3283 | } | |
3284 | regno = ALLOCNO_REGNO (a); | |
3285 | subloop_allocno = ALLOCNO_CAP_MEMBER (a); | |
3286 | subloop_node = ALLOCNO_LOOP_TREE_NODE (subloop_allocno); | |
3287 | ira_assert (!ALLOCNO_ASSIGNED_P (subloop_allocno)); | |
3288 | ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno; | |
3289 | ALLOCNO_ASSIGNED_P (subloop_allocno) = true; | |
3290 | if (hard_regno >= 0) | |
c73ccc80 | 3291 | update_costs_from_copies (subloop_allocno, true, true); |
2b9c63a2 | 3292 | /* We don't need updated costs anymore. */ |
058e97ec VM |
3293 | ira_free_allocno_updated_costs (subloop_allocno); |
3294 | } | |
3295 | } | |
3296 | /* Update costs of the corresponding allocnos (not caps) in the | |
3297 | subloops. */ | |
3298 | for (subloop_node = loop_tree_node->subloops; | |
3299 | subloop_node != NULL; | |
3300 | subloop_node = subloop_node->subloop_next) | |
3301 | { | |
3302 | ira_assert (subloop_node->bb == NULL); | |
3303 | EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi) | |
3304 | { | |
3305 | a = ira_allocnos[j]; | |
3306 | ira_assert (ALLOCNO_CAP_MEMBER (a) == NULL); | |
3307 | mode = ALLOCNO_MODE (a); | |
1756cb66 VM |
3308 | rclass = ALLOCNO_CLASS (a); |
3309 | pclass = ira_pressure_class_translate[rclass]; | |
058e97ec | 3310 | hard_regno = ALLOCNO_HARD_REGNO (a); |
7db7ed3c | 3311 | /* Use hard register class here. ??? */ |
058e97ec VM |
3312 | if (hard_regno >= 0) |
3313 | { | |
3314 | index = ira_class_hard_reg_index[rclass][hard_regno]; | |
3315 | ira_assert (index >= 0); | |
3316 | } | |
3317 | regno = ALLOCNO_REGNO (a); | |
3318 | /* ??? conflict costs */ | |
3319 | subloop_allocno = subloop_node->regno_allocno_map[regno]; | |
3320 | if (subloop_allocno == NULL | |
3321 | || ALLOCNO_CAP (subloop_allocno) != NULL) | |
3322 | continue; | |
1756cb66 | 3323 | ira_assert (ALLOCNO_CLASS (subloop_allocno) == rclass); |
49d988e7 VM |
3324 | ira_assert (bitmap_bit_p (subloop_node->all_allocnos, |
3325 | ALLOCNO_NUM (subloop_allocno))); | |
bcb21886 KY |
3326 | if ((flag_ira_region == IRA_REGION_MIXED |
3327 | && (loop_tree_node->reg_pressure[pclass] | |
3328 | <= ira_class_hard_regs_num[pclass])) | |
3329 | || (pic_offset_table_rtx != NULL | |
3c20c9bc VM |
3330 | && regno == (int) REGNO (pic_offset_table_rtx)) |
3331 | /* Avoid overlapped multi-registers. Moves between them | |
3332 | might result in wrong code generation. */ | |
3333 | || (hard_regno >= 0 | |
3334 | && ira_reg_class_max_nregs[pclass][mode] > 1)) | |
058e97ec VM |
3335 | { |
3336 | if (! ALLOCNO_ASSIGNED_P (subloop_allocno)) | |
3337 | { | |
3338 | ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno; | |
3339 | ALLOCNO_ASSIGNED_P (subloop_allocno) = true; | |
3340 | if (hard_regno >= 0) | |
c73ccc80 | 3341 | update_costs_from_copies (subloop_allocno, true, true); |
2b9c63a2 | 3342 | /* We don't need updated costs anymore. */ |
058e97ec VM |
3343 | ira_free_allocno_updated_costs (subloop_allocno); |
3344 | } | |
3345 | continue; | |
3346 | } | |
3347 | exit_freq = ira_loop_edge_freq (subloop_node, regno, true); | |
3348 | enter_freq = ira_loop_edge_freq (subloop_node, regno, false); | |
3349 | ira_assert (regno < ira_reg_equiv_len); | |
55a2c322 | 3350 | if (ira_equiv_no_lvalue_p (regno)) |
058e97ec VM |
3351 | { |
3352 | if (! ALLOCNO_ASSIGNED_P (subloop_allocno)) | |
3353 | { | |
3354 | ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno; | |
3355 | ALLOCNO_ASSIGNED_P (subloop_allocno) = true; | |
3356 | if (hard_regno >= 0) | |
c73ccc80 | 3357 | update_costs_from_copies (subloop_allocno, true, true); |
2b9c63a2 | 3358 | /* We don't need updated costs anymore. */ |
058e97ec VM |
3359 | ira_free_allocno_updated_costs (subloop_allocno); |
3360 | } | |
3361 | } | |
3362 | else if (hard_regno < 0) | |
3363 | { | |
3364 | ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno) | |
3365 | -= ((ira_memory_move_cost[mode][rclass][1] * enter_freq) | |
3366 | + (ira_memory_move_cost[mode][rclass][0] * exit_freq)); | |
3367 | } | |
3368 | else | |
3369 | { | |
1756cb66 VM |
3370 | aclass = ALLOCNO_CLASS (subloop_allocno); |
3371 | ira_init_register_move_cost_if_necessary (mode); | |
3372 | cost = (ira_register_move_cost[mode][rclass][rclass] | |
058e97ec | 3373 | * (exit_freq + enter_freq)); |
cb1ca6ac | 3374 | ira_allocate_and_set_or_copy_costs |
1756cb66 VM |
3375 | (&ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno), aclass, |
3376 | ALLOCNO_UPDATED_CLASS_COST (subloop_allocno), | |
cb1ca6ac VM |
3377 | ALLOCNO_HARD_REG_COSTS (subloop_allocno)); |
3378 | ira_allocate_and_set_or_copy_costs | |
3379 | (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno), | |
1756cb66 | 3380 | aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (subloop_allocno)); |
cb1ca6ac VM |
3381 | ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index] -= cost; |
3382 | ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno)[index] | |
058e97ec | 3383 | -= cost; |
1756cb66 | 3384 | if (ALLOCNO_UPDATED_CLASS_COST (subloop_allocno) |
cb1ca6ac | 3385 | > ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index]) |
1756cb66 | 3386 | ALLOCNO_UPDATED_CLASS_COST (subloop_allocno) |
cb1ca6ac | 3387 | = ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index]; |
058e97ec VM |
3388 | ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno) |
3389 | += (ira_memory_move_cost[mode][rclass][0] * enter_freq | |
3390 | + ira_memory_move_cost[mode][rclass][1] * exit_freq); | |
058e97ec VM |
3391 | } |
3392 | } | |
3393 | } | |
1756cb66 | 3394 | ira_free (allocno_color_data); |
bf08fb16 | 3395 | EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi) |
1756cb66 VM |
3396 | { |
3397 | a = ira_allocnos[j]; | |
3398 | ALLOCNO_ADD_DATA (a) = NULL; | |
1756cb66 | 3399 | } |
058e97ec VM |
3400 | } |
3401 | ||
3402 | /* Initialize the common data for coloring and calls functions to do | |
3403 | Chaitin-Briggs and regional coloring. */ | |
3404 | static void | |
3405 | do_coloring (void) | |
3406 | { | |
3407 | coloring_allocno_bitmap = ira_allocate_bitmap (); | |
058e97ec VM |
3408 | if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL) |
3409 | fprintf (ira_dump_file, "\n**** Allocnos coloring:\n\n"); | |
b8698a0f | 3410 | |
058e97ec VM |
3411 | ira_traverse_loop_tree (false, ira_loop_tree_root, color_pass, NULL); |
3412 | ||
3413 | if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL) | |
3414 | ira_print_disposition (ira_dump_file); | |
3415 | ||
058e97ec | 3416 | ira_free_bitmap (coloring_allocno_bitmap); |
058e97ec VM |
3417 | } |
3418 | ||
3419 | \f | |
3420 | ||
3421 | /* Move spill/restore code, which are to be generated in ira-emit.c, | |
3422 | to less frequent points (if it is profitable) by reassigning some | |
3423 | allocnos (in loop with subloops containing in another loop) to | |
3424 | memory which results in longer live-range where the corresponding | |
3425 | pseudo-registers will be in memory. */ | |
3426 | static void | |
3427 | move_spill_restore (void) | |
3428 | { | |
3429 | int cost, regno, hard_regno, hard_regno2, index; | |
3430 | bool changed_p; | |
3431 | int enter_freq, exit_freq; | |
ef4bddc2 | 3432 | machine_mode mode; |
058e97ec VM |
3433 | enum reg_class rclass; |
3434 | ira_allocno_t a, parent_allocno, subloop_allocno; | |
3435 | ira_loop_tree_node_t parent, loop_node, subloop_node; | |
3436 | ira_allocno_iterator ai; | |
3437 | ||
3438 | for (;;) | |
3439 | { | |
3440 | changed_p = false; | |
3441 | if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL) | |
3442 | fprintf (ira_dump_file, "New iteration of spill/restore move\n"); | |
3443 | FOR_EACH_ALLOCNO (a, ai) | |
3444 | { | |
3445 | regno = ALLOCNO_REGNO (a); | |
3446 | loop_node = ALLOCNO_LOOP_TREE_NODE (a); | |
3447 | if (ALLOCNO_CAP_MEMBER (a) != NULL | |
3448 | || ALLOCNO_CAP (a) != NULL | |
3449 | || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0 | |
3450 | || loop_node->children == NULL | |
3451 | /* don't do the optimization because it can create | |
3452 | copies and the reload pass can spill the allocno set | |
3453 | by copy although the allocno will not get memory | |
3454 | slot. */ | |
55a2c322 | 3455 | || ira_equiv_no_lvalue_p (regno) |
b81a2f0d VM |
3456 | || !bitmap_bit_p (loop_node->border_allocnos, ALLOCNO_NUM (a)) |
3457 | /* Do not spill static chain pointer pseudo when | |
3458 | non-local goto is used. */ | |
3459 | || non_spilled_static_chain_regno_p (regno)) | |
058e97ec VM |
3460 | continue; |
3461 | mode = ALLOCNO_MODE (a); | |
1756cb66 | 3462 | rclass = ALLOCNO_CLASS (a); |
058e97ec VM |
3463 | index = ira_class_hard_reg_index[rclass][hard_regno]; |
3464 | ira_assert (index >= 0); | |
3465 | cost = (ALLOCNO_MEMORY_COST (a) | |
3466 | - (ALLOCNO_HARD_REG_COSTS (a) == NULL | |
1756cb66 | 3467 | ? ALLOCNO_CLASS_COST (a) |
058e97ec | 3468 | : ALLOCNO_HARD_REG_COSTS (a)[index])); |
1756cb66 | 3469 | ira_init_register_move_cost_if_necessary (mode); |
058e97ec VM |
3470 | for (subloop_node = loop_node->subloops; |
3471 | subloop_node != NULL; | |
3472 | subloop_node = subloop_node->subloop_next) | |
3473 | { | |
3474 | ira_assert (subloop_node->bb == NULL); | |
3475 | subloop_allocno = subloop_node->regno_allocno_map[regno]; | |
3476 | if (subloop_allocno == NULL) | |
3477 | continue; | |
1756cb66 | 3478 | ira_assert (rclass == ALLOCNO_CLASS (subloop_allocno)); |
058e97ec VM |
3479 | /* We have accumulated cost. To get the real cost of |
3480 | allocno usage in the loop we should subtract costs of | |
3481 | the subloop allocnos. */ | |
3482 | cost -= (ALLOCNO_MEMORY_COST (subloop_allocno) | |
3483 | - (ALLOCNO_HARD_REG_COSTS (subloop_allocno) == NULL | |
1756cb66 | 3484 | ? ALLOCNO_CLASS_COST (subloop_allocno) |
058e97ec VM |
3485 | : ALLOCNO_HARD_REG_COSTS (subloop_allocno)[index])); |
3486 | exit_freq = ira_loop_edge_freq (subloop_node, regno, true); | |
3487 | enter_freq = ira_loop_edge_freq (subloop_node, regno, false); | |
3488 | if ((hard_regno2 = ALLOCNO_HARD_REGNO (subloop_allocno)) < 0) | |
3489 | cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq | |
3490 | + ira_memory_move_cost[mode][rclass][1] * enter_freq); | |
3491 | else | |
3492 | { | |
3493 | cost | |
3494 | += (ira_memory_move_cost[mode][rclass][0] * exit_freq | |
3495 | + ira_memory_move_cost[mode][rclass][1] * enter_freq); | |
3496 | if (hard_regno2 != hard_regno) | |
1756cb66 | 3497 | cost -= (ira_register_move_cost[mode][rclass][rclass] |
058e97ec VM |
3498 | * (exit_freq + enter_freq)); |
3499 | } | |
3500 | } | |
3501 | if ((parent = loop_node->parent) != NULL | |
3502 | && (parent_allocno = parent->regno_allocno_map[regno]) != NULL) | |
3503 | { | |
1756cb66 | 3504 | ira_assert (rclass == ALLOCNO_CLASS (parent_allocno)); |
058e97ec VM |
3505 | exit_freq = ira_loop_edge_freq (loop_node, regno, true); |
3506 | enter_freq = ira_loop_edge_freq (loop_node, regno, false); | |
3507 | if ((hard_regno2 = ALLOCNO_HARD_REGNO (parent_allocno)) < 0) | |
3508 | cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq | |
3509 | + ira_memory_move_cost[mode][rclass][1] * enter_freq); | |
3510 | else | |
3511 | { | |
3512 | cost | |
3513 | += (ira_memory_move_cost[mode][rclass][1] * exit_freq | |
3514 | + ira_memory_move_cost[mode][rclass][0] * enter_freq); | |
3515 | if (hard_regno2 != hard_regno) | |
1756cb66 | 3516 | cost -= (ira_register_move_cost[mode][rclass][rclass] |
058e97ec VM |
3517 | * (exit_freq + enter_freq)); |
3518 | } | |
3519 | } | |
3520 | if (cost < 0) | |
3521 | { | |
3522 | ALLOCNO_HARD_REGNO (a) = -1; | |
3523 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3524 | { | |
3525 | fprintf | |
3526 | (ira_dump_file, | |
3527 | " Moving spill/restore for a%dr%d up from loop %d", | |
2608d841 | 3528 | ALLOCNO_NUM (a), regno, loop_node->loop_num); |
058e97ec VM |
3529 | fprintf (ira_dump_file, " - profit %d\n", -cost); |
3530 | } | |
3531 | changed_p = true; | |
3532 | } | |
3533 | } | |
3534 | if (! changed_p) | |
3535 | break; | |
3536 | } | |
3537 | } | |
3538 | ||
3539 | \f | |
3540 | ||
3541 | /* Update current hard reg costs and current conflict hard reg costs | |
3542 | for allocno A. It is done by processing its copies containing | |
3543 | other allocnos already assigned. */ | |
3544 | static void | |
3545 | update_curr_costs (ira_allocno_t a) | |
3546 | { | |
3547 | int i, hard_regno, cost; | |
ef4bddc2 | 3548 | machine_mode mode; |
1756cb66 | 3549 | enum reg_class aclass, rclass; |
058e97ec VM |
3550 | ira_allocno_t another_a; |
3551 | ira_copy_t cp, next_cp; | |
3552 | ||
bdf0eb06 | 3553 | ira_free_allocno_updated_costs (a); |
058e97ec | 3554 | ira_assert (! ALLOCNO_ASSIGNED_P (a)); |
1756cb66 VM |
3555 | aclass = ALLOCNO_CLASS (a); |
3556 | if (aclass == NO_REGS) | |
058e97ec VM |
3557 | return; |
3558 | mode = ALLOCNO_MODE (a); | |
1756cb66 | 3559 | ira_init_register_move_cost_if_necessary (mode); |
058e97ec VM |
3560 | for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp) |
3561 | { | |
3562 | if (cp->first == a) | |
3563 | { | |
3564 | next_cp = cp->next_first_allocno_copy; | |
3565 | another_a = cp->second; | |
3566 | } | |
3567 | else if (cp->second == a) | |
3568 | { | |
3569 | next_cp = cp->next_second_allocno_copy; | |
3570 | another_a = cp->first; | |
3571 | } | |
3572 | else | |
3573 | gcc_unreachable (); | |
1756cb66 | 3574 | if (! ira_reg_classes_intersect_p[aclass][ALLOCNO_CLASS (another_a)] |
058e97ec VM |
3575 | || ! ALLOCNO_ASSIGNED_P (another_a) |
3576 | || (hard_regno = ALLOCNO_HARD_REGNO (another_a)) < 0) | |
3577 | continue; | |
3578 | rclass = REGNO_REG_CLASS (hard_regno); | |
1756cb66 | 3579 | i = ira_class_hard_reg_index[aclass][hard_regno]; |
7db7ed3c VM |
3580 | if (i < 0) |
3581 | continue; | |
058e97ec | 3582 | cost = (cp->first == a |
1756cb66 VM |
3583 | ? ira_register_move_cost[mode][rclass][aclass] |
3584 | : ira_register_move_cost[mode][aclass][rclass]); | |
058e97ec | 3585 | ira_allocate_and_set_or_copy_costs |
1756cb66 | 3586 | (&ALLOCNO_UPDATED_HARD_REG_COSTS (a), aclass, ALLOCNO_CLASS_COST (a), |
058e97ec VM |
3587 | ALLOCNO_HARD_REG_COSTS (a)); |
3588 | ira_allocate_and_set_or_copy_costs | |
3589 | (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a), | |
1756cb66 | 3590 | aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (a)); |
058e97ec VM |
3591 | ALLOCNO_UPDATED_HARD_REG_COSTS (a)[i] -= cp->freq * cost; |
3592 | ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a)[i] -= cp->freq * cost; | |
3593 | } | |
3594 | } | |
3595 | ||
058e97ec VM |
3596 | /* Try to assign hard registers to the unassigned allocnos and |
3597 | allocnos conflicting with them or conflicting with allocnos whose | |
3598 | regno >= START_REGNO. The function is called after ira_flattening, | |
3599 | so more allocnos (including ones created in ira-emit.c) will have a | |
3600 | chance to get a hard register. We use simple assignment algorithm | |
3601 | based on priorities. */ | |
3602 | void | |
3603 | ira_reassign_conflict_allocnos (int start_regno) | |
3604 | { | |
3605 | int i, allocnos_to_color_num; | |
fa86d337 | 3606 | ira_allocno_t a; |
1756cb66 | 3607 | enum reg_class aclass; |
058e97ec VM |
3608 | bitmap allocnos_to_color; |
3609 | ira_allocno_iterator ai; | |
3610 | ||
3611 | allocnos_to_color = ira_allocate_bitmap (); | |
3612 | allocnos_to_color_num = 0; | |
3613 | FOR_EACH_ALLOCNO (a, ai) | |
3614 | { | |
ac0ab4f7 | 3615 | int n = ALLOCNO_NUM_OBJECTS (a); |
fa86d337 | 3616 | |
058e97ec VM |
3617 | if (! ALLOCNO_ASSIGNED_P (a) |
3618 | && ! bitmap_bit_p (allocnos_to_color, ALLOCNO_NUM (a))) | |
3619 | { | |
1756cb66 | 3620 | if (ALLOCNO_CLASS (a) != NO_REGS) |
058e97ec VM |
3621 | sorted_allocnos[allocnos_to_color_num++] = a; |
3622 | else | |
3623 | { | |
3624 | ALLOCNO_ASSIGNED_P (a) = true; | |
3625 | ALLOCNO_HARD_REGNO (a) = -1; | |
3626 | ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL); | |
3627 | ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL); | |
3628 | } | |
3629 | bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (a)); | |
3630 | } | |
3631 | if (ALLOCNO_REGNO (a) < start_regno | |
1756cb66 | 3632 | || (aclass = ALLOCNO_CLASS (a)) == NO_REGS) |
058e97ec | 3633 | continue; |
ac0ab4f7 | 3634 | for (i = 0; i < n; i++) |
058e97ec | 3635 | { |
ac0ab4f7 BS |
3636 | ira_object_t obj = ALLOCNO_OBJECT (a, i); |
3637 | ira_object_t conflict_obj; | |
3638 | ira_object_conflict_iterator oci; | |
1756cb66 | 3639 | |
ac0ab4f7 BS |
3640 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) |
3641 | { | |
3642 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); | |
1756cb66 | 3643 | |
ac0ab4f7 | 3644 | ira_assert (ira_reg_classes_intersect_p |
1756cb66 | 3645 | [aclass][ALLOCNO_CLASS (conflict_a)]); |
fcaa4ca4 | 3646 | if (!bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (conflict_a))) |
ac0ab4f7 | 3647 | continue; |
ac0ab4f7 BS |
3648 | sorted_allocnos[allocnos_to_color_num++] = conflict_a; |
3649 | } | |
058e97ec VM |
3650 | } |
3651 | } | |
3652 | ira_free_bitmap (allocnos_to_color); | |
3653 | if (allocnos_to_color_num > 1) | |
3654 | { | |
1ae64b0f | 3655 | setup_allocno_priorities (sorted_allocnos, allocnos_to_color_num); |
058e97ec VM |
3656 | qsort (sorted_allocnos, allocnos_to_color_num, sizeof (ira_allocno_t), |
3657 | allocno_priority_compare_func); | |
3658 | } | |
3659 | for (i = 0; i < allocnos_to_color_num; i++) | |
3660 | { | |
3661 | a = sorted_allocnos[i]; | |
3662 | ALLOCNO_ASSIGNED_P (a) = false; | |
058e97ec VM |
3663 | update_curr_costs (a); |
3664 | } | |
3665 | for (i = 0; i < allocnos_to_color_num; i++) | |
3666 | { | |
3667 | a = sorted_allocnos[i]; | |
3668 | if (assign_hard_reg (a, true)) | |
3669 | { | |
3670 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3671 | fprintf | |
3672 | (ira_dump_file, | |
3673 | " Secondary allocation: assign hard reg %d to reg %d\n", | |
3674 | ALLOCNO_HARD_REGNO (a), ALLOCNO_REGNO (a)); | |
3675 | } | |
3676 | } | |
3677 | } | |
3678 | ||
3679 | \f | |
3680 | ||
1756cb66 VM |
3681 | /* This page contains functions used to find conflicts using allocno |
3682 | live ranges. */ | |
3683 | ||
1756cb66 VM |
3684 | #ifdef ENABLE_IRA_CHECKING |
3685 | ||
3686 | /* Return TRUE if live ranges of pseudo-registers REGNO1 and REGNO2 | |
3687 | intersect. This should be used when there is only one region. | |
3688 | Currently this is used during reload. */ | |
3689 | static bool | |
3690 | conflict_by_live_ranges_p (int regno1, int regno2) | |
3691 | { | |
3692 | ira_allocno_t a1, a2; | |
3693 | ||
3694 | ira_assert (regno1 >= FIRST_PSEUDO_REGISTER | |
3695 | && regno2 >= FIRST_PSEUDO_REGISTER); | |
df3e3493 | 3696 | /* Reg info calculated by dataflow infrastructure can be different |
1756cb66 VM |
3697 | from one calculated by regclass. */ |
3698 | if ((a1 = ira_loop_tree_root->regno_allocno_map[regno1]) == NULL | |
3699 | || (a2 = ira_loop_tree_root->regno_allocno_map[regno2]) == NULL) | |
3700 | return false; | |
3701 | return allocnos_conflict_by_live_ranges_p (a1, a2); | |
3702 | } | |
3703 | ||
3704 | #endif | |
3705 | ||
3706 | \f | |
3707 | ||
058e97ec VM |
3708 | /* This page contains code to coalesce memory stack slots used by |
3709 | spilled allocnos. This results in smaller stack frame, better data | |
3710 | locality, and in smaller code for some architectures like | |
3711 | x86/x86_64 where insn size depends on address displacement value. | |
3712 | On the other hand, it can worsen insn scheduling after the RA but | |
3713 | in practice it is less important than smaller stack frames. */ | |
3714 | ||
22b0982c VM |
3715 | /* TRUE if we coalesced some allocnos. In other words, if we got |
3716 | loops formed by members first_coalesced_allocno and | |
3717 | next_coalesced_allocno containing more one allocno. */ | |
3718 | static bool allocno_coalesced_p; | |
3719 | ||
3720 | /* Bitmap used to prevent a repeated allocno processing because of | |
3721 | coalescing. */ | |
3722 | static bitmap processed_coalesced_allocno_bitmap; | |
3723 | ||
1756cb66 VM |
3724 | /* See below. */ |
3725 | typedef struct coalesce_data *coalesce_data_t; | |
3726 | ||
3727 | /* To decrease footprint of ira_allocno structure we store all data | |
3728 | needed only for coalescing in the following structure. */ | |
3729 | struct coalesce_data | |
3730 | { | |
3731 | /* Coalesced allocnos form a cyclic list. One allocno given by | |
3732 | FIRST represents all coalesced allocnos. The | |
3733 | list is chained by NEXT. */ | |
3734 | ira_allocno_t first; | |
3735 | ira_allocno_t next; | |
3736 | int temp; | |
3737 | }; | |
3738 | ||
3739 | /* Container for storing allocno data concerning coalescing. */ | |
3740 | static coalesce_data_t allocno_coalesce_data; | |
3741 | ||
3742 | /* Macro to access the data concerning coalescing. */ | |
3743 | #define ALLOCNO_COALESCE_DATA(a) ((coalesce_data_t) ALLOCNO_ADD_DATA (a)) | |
3744 | ||
22b0982c VM |
3745 | /* Merge two sets of coalesced allocnos given correspondingly by |
3746 | allocnos A1 and A2 (more accurately merging A2 set into A1 | |
3747 | set). */ | |
3748 | static void | |
3749 | merge_allocnos (ira_allocno_t a1, ira_allocno_t a2) | |
3750 | { | |
3751 | ira_allocno_t a, first, last, next; | |
3752 | ||
1756cb66 VM |
3753 | first = ALLOCNO_COALESCE_DATA (a1)->first; |
3754 | a = ALLOCNO_COALESCE_DATA (a2)->first; | |
3755 | if (first == a) | |
22b0982c | 3756 | return; |
1756cb66 VM |
3757 | for (last = a2, a = ALLOCNO_COALESCE_DATA (a2)->next;; |
3758 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
22b0982c | 3759 | { |
1756cb66 | 3760 | ALLOCNO_COALESCE_DATA (a)->first = first; |
22b0982c VM |
3761 | if (a == a2) |
3762 | break; | |
3763 | last = a; | |
3764 | } | |
1756cb66 VM |
3765 | next = allocno_coalesce_data[ALLOCNO_NUM (first)].next; |
3766 | allocno_coalesce_data[ALLOCNO_NUM (first)].next = a2; | |
3767 | allocno_coalesce_data[ALLOCNO_NUM (last)].next = next; | |
22b0982c VM |
3768 | } |
3769 | ||
1756cb66 VM |
3770 | /* Return TRUE if there are conflicting allocnos from two sets of |
3771 | coalesced allocnos given correspondingly by allocnos A1 and A2. We | |
3772 | use live ranges to find conflicts because conflicts are represented | |
3773 | only for allocnos of the same allocno class and during the reload | |
3774 | pass we coalesce allocnos for sharing stack memory slots. */ | |
22b0982c VM |
3775 | static bool |
3776 | coalesced_allocno_conflict_p (ira_allocno_t a1, ira_allocno_t a2) | |
3777 | { | |
1756cb66 | 3778 | ira_allocno_t a, conflict_a; |
22b0982c | 3779 | |
22b0982c VM |
3780 | if (allocno_coalesced_p) |
3781 | { | |
1756cb66 VM |
3782 | bitmap_clear (processed_coalesced_allocno_bitmap); |
3783 | for (a = ALLOCNO_COALESCE_DATA (a1)->next;; | |
3784 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
22b0982c | 3785 | { |
1756cb66 | 3786 | bitmap_set_bit (processed_coalesced_allocno_bitmap, ALLOCNO_NUM (a)); |
22b0982c VM |
3787 | if (a == a1) |
3788 | break; | |
3789 | } | |
3790 | } | |
1756cb66 VM |
3791 | for (a = ALLOCNO_COALESCE_DATA (a2)->next;; |
3792 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
22b0982c | 3793 | { |
1756cb66 VM |
3794 | for (conflict_a = ALLOCNO_COALESCE_DATA (a1)->next;; |
3795 | conflict_a = ALLOCNO_COALESCE_DATA (conflict_a)->next) | |
22b0982c | 3796 | { |
1756cb66 | 3797 | if (allocnos_conflict_by_live_ranges_p (a, conflict_a)) |
22b0982c | 3798 | return true; |
1756cb66 | 3799 | if (conflict_a == a1) |
22b0982c VM |
3800 | break; |
3801 | } | |
22b0982c VM |
3802 | if (a == a2) |
3803 | break; | |
3804 | } | |
3805 | return false; | |
3806 | } | |
3807 | ||
3808 | /* The major function for aggressive allocno coalescing. We coalesce | |
3809 | only spilled allocnos. If some allocnos have been coalesced, we | |
3810 | set up flag allocno_coalesced_p. */ | |
3811 | static void | |
3812 | coalesce_allocnos (void) | |
3813 | { | |
3814 | ira_allocno_t a; | |
bf08fb16 | 3815 | ira_copy_t cp, next_cp; |
22b0982c VM |
3816 | unsigned int j; |
3817 | int i, n, cp_num, regno; | |
3818 | bitmap_iterator bi; | |
3819 | ||
22b0982c VM |
3820 | cp_num = 0; |
3821 | /* Collect copies. */ | |
3822 | EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, j, bi) | |
3823 | { | |
3824 | a = ira_allocnos[j]; | |
3825 | regno = ALLOCNO_REGNO (a); | |
3826 | if (! ALLOCNO_ASSIGNED_P (a) || ALLOCNO_HARD_REGNO (a) >= 0 | |
55a2c322 | 3827 | || ira_equiv_no_lvalue_p (regno)) |
22b0982c VM |
3828 | continue; |
3829 | for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp) | |
3830 | { | |
3831 | if (cp->first == a) | |
3832 | { | |
3833 | next_cp = cp->next_first_allocno_copy; | |
3834 | regno = ALLOCNO_REGNO (cp->second); | |
3835 | /* For priority coloring we coalesce allocnos only with | |
1756cb66 | 3836 | the same allocno class not with intersected allocno |
22b0982c VM |
3837 | classes as it were possible. It is done for |
3838 | simplicity. */ | |
3839 | if ((cp->insn != NULL || cp->constraint_p) | |
3840 | && ALLOCNO_ASSIGNED_P (cp->second) | |
3841 | && ALLOCNO_HARD_REGNO (cp->second) < 0 | |
55a2c322 | 3842 | && ! ira_equiv_no_lvalue_p (regno)) |
22b0982c VM |
3843 | sorted_copies[cp_num++] = cp; |
3844 | } | |
3845 | else if (cp->second == a) | |
3846 | next_cp = cp->next_second_allocno_copy; | |
3847 | else | |
3848 | gcc_unreachable (); | |
3849 | } | |
3850 | } | |
3851 | qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func); | |
3852 | /* Coalesced copies, most frequently executed first. */ | |
3853 | for (; cp_num != 0;) | |
3854 | { | |
3855 | for (i = 0; i < cp_num; i++) | |
3856 | { | |
3857 | cp = sorted_copies[i]; | |
3858 | if (! coalesced_allocno_conflict_p (cp->first, cp->second)) | |
3859 | { | |
3860 | allocno_coalesced_p = true; | |
3861 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
3862 | fprintf | |
3863 | (ira_dump_file, | |
3864 | " Coalescing copy %d:a%dr%d-a%dr%d (freq=%d)\n", | |
3865 | cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first), | |
3866 | ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second), | |
3867 | cp->freq); | |
3868 | merge_allocnos (cp->first, cp->second); | |
3869 | i++; | |
3870 | break; | |
3871 | } | |
3872 | } | |
3873 | /* Collect the rest of copies. */ | |
3874 | for (n = 0; i < cp_num; i++) | |
3875 | { | |
3876 | cp = sorted_copies[i]; | |
1756cb66 VM |
3877 | if (allocno_coalesce_data[ALLOCNO_NUM (cp->first)].first |
3878 | != allocno_coalesce_data[ALLOCNO_NUM (cp->second)].first) | |
22b0982c VM |
3879 | sorted_copies[n++] = cp; |
3880 | } | |
3881 | cp_num = n; | |
3882 | } | |
22b0982c VM |
3883 | } |
3884 | ||
058e97ec VM |
3885 | /* Usage cost and order number of coalesced allocno set to which |
3886 | given pseudo register belongs to. */ | |
3887 | static int *regno_coalesced_allocno_cost; | |
3888 | static int *regno_coalesced_allocno_num; | |
3889 | ||
3890 | /* Sort pseudos according frequencies of coalesced allocno sets they | |
3891 | belong to (putting most frequently ones first), and according to | |
3892 | coalesced allocno set order numbers. */ | |
3893 | static int | |
3894 | coalesced_pseudo_reg_freq_compare (const void *v1p, const void *v2p) | |
3895 | { | |
3896 | const int regno1 = *(const int *) v1p; | |
3897 | const int regno2 = *(const int *) v2p; | |
3898 | int diff; | |
3899 | ||
3900 | if ((diff = (regno_coalesced_allocno_cost[regno2] | |
3901 | - regno_coalesced_allocno_cost[regno1])) != 0) | |
3902 | return diff; | |
3903 | if ((diff = (regno_coalesced_allocno_num[regno1] | |
3904 | - regno_coalesced_allocno_num[regno2])) != 0) | |
3905 | return diff; | |
3906 | return regno1 - regno2; | |
3907 | } | |
3908 | ||
3909 | /* Widest width in which each pseudo reg is referred to (via subreg). | |
3910 | It is used for sorting pseudo registers. */ | |
3911 | static unsigned int *regno_max_ref_width; | |
3912 | ||
058e97ec VM |
3913 | /* Sort pseudos according their slot numbers (putting ones with |
3914 | smaller numbers first, or last when the frame pointer is not | |
3915 | needed). */ | |
3916 | static int | |
3917 | coalesced_pseudo_reg_slot_compare (const void *v1p, const void *v2p) | |
3918 | { | |
3919 | const int regno1 = *(const int *) v1p; | |
3920 | const int regno2 = *(const int *) v2p; | |
3921 | ira_allocno_t a1 = ira_regno_allocno_map[regno1]; | |
3922 | ira_allocno_t a2 = ira_regno_allocno_map[regno2]; | |
3923 | int diff, slot_num1, slot_num2; | |
3924 | int total_size1, total_size2; | |
3925 | ||
3926 | if (a1 == NULL || ALLOCNO_HARD_REGNO (a1) >= 0) | |
3927 | { | |
3928 | if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0) | |
004a6ce8 | 3929 | return regno1 - regno2; |
058e97ec VM |
3930 | return 1; |
3931 | } | |
3932 | else if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0) | |
3933 | return -1; | |
3934 | slot_num1 = -ALLOCNO_HARD_REGNO (a1); | |
3935 | slot_num2 = -ALLOCNO_HARD_REGNO (a2); | |
3936 | if ((diff = slot_num1 - slot_num2) != 0) | |
3937 | return (frame_pointer_needed | |
e0bf0dc2 | 3938 | || (!FRAME_GROWS_DOWNWARD) == STACK_GROWS_DOWNWARD ? diff : -diff); |
1756cb66 VM |
3939 | total_size1 = MAX (PSEUDO_REGNO_BYTES (regno1), |
3940 | regno_max_ref_width[regno1]); | |
3941 | total_size2 = MAX (PSEUDO_REGNO_BYTES (regno2), | |
3942 | regno_max_ref_width[regno2]); | |
058e97ec VM |
3943 | if ((diff = total_size2 - total_size1) != 0) |
3944 | return diff; | |
004a6ce8 | 3945 | return regno1 - regno2; |
058e97ec VM |
3946 | } |
3947 | ||
3948 | /* Setup REGNO_COALESCED_ALLOCNO_COST and REGNO_COALESCED_ALLOCNO_NUM | |
3949 | for coalesced allocno sets containing allocnos with their regnos | |
3950 | given in array PSEUDO_REGNOS of length N. */ | |
3951 | static void | |
3952 | setup_coalesced_allocno_costs_and_nums (int *pseudo_regnos, int n) | |
3953 | { | |
3954 | int i, num, regno, cost; | |
3955 | ira_allocno_t allocno, a; | |
3956 | ||
3957 | for (num = i = 0; i < n; i++) | |
3958 | { | |
3959 | regno = pseudo_regnos[i]; | |
3960 | allocno = ira_regno_allocno_map[regno]; | |
3961 | if (allocno == NULL) | |
3962 | { | |
3963 | regno_coalesced_allocno_cost[regno] = 0; | |
3964 | regno_coalesced_allocno_num[regno] = ++num; | |
3965 | continue; | |
3966 | } | |
1756cb66 | 3967 | if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno) |
058e97ec VM |
3968 | continue; |
3969 | num++; | |
1756cb66 VM |
3970 | for (cost = 0, a = ALLOCNO_COALESCE_DATA (allocno)->next;; |
3971 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
058e97ec VM |
3972 | { |
3973 | cost += ALLOCNO_FREQ (a); | |
3974 | if (a == allocno) | |
3975 | break; | |
3976 | } | |
1756cb66 VM |
3977 | for (a = ALLOCNO_COALESCE_DATA (allocno)->next;; |
3978 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
058e97ec VM |
3979 | { |
3980 | regno_coalesced_allocno_num[ALLOCNO_REGNO (a)] = num; | |
3981 | regno_coalesced_allocno_cost[ALLOCNO_REGNO (a)] = cost; | |
3982 | if (a == allocno) | |
3983 | break; | |
3984 | } | |
3985 | } | |
3986 | } | |
3987 | ||
3988 | /* Collect spilled allocnos representing coalesced allocno sets (the | |
3989 | first coalesced allocno). The collected allocnos are returned | |
3990 | through array SPILLED_COALESCED_ALLOCNOS. The function returns the | |
3991 | number of the collected allocnos. The allocnos are given by their | |
3992 | regnos in array PSEUDO_REGNOS of length N. */ | |
3993 | static int | |
3994 | collect_spilled_coalesced_allocnos (int *pseudo_regnos, int n, | |
3995 | ira_allocno_t *spilled_coalesced_allocnos) | |
3996 | { | |
3997 | int i, num, regno; | |
3998 | ira_allocno_t allocno; | |
3999 | ||
4000 | for (num = i = 0; i < n; i++) | |
4001 | { | |
4002 | regno = pseudo_regnos[i]; | |
4003 | allocno = ira_regno_allocno_map[regno]; | |
4004 | if (allocno == NULL || ALLOCNO_HARD_REGNO (allocno) >= 0 | |
1756cb66 | 4005 | || ALLOCNO_COALESCE_DATA (allocno)->first != allocno) |
058e97ec VM |
4006 | continue; |
4007 | spilled_coalesced_allocnos[num++] = allocno; | |
4008 | } | |
4009 | return num; | |
4010 | } | |
4011 | ||
3553f0bb VM |
4012 | /* Array of live ranges of size IRA_ALLOCNOS_NUM. Live range for |
4013 | given slot contains live ranges of coalesced allocnos assigned to | |
4014 | given slot. */ | |
b14151b5 | 4015 | static live_range_t *slot_coalesced_allocnos_live_ranges; |
b15a7ae6 | 4016 | |
3553f0bb VM |
4017 | /* Return TRUE if coalesced allocnos represented by ALLOCNO has live |
4018 | ranges intersected with live ranges of coalesced allocnos assigned | |
4019 | to slot with number N. */ | |
b15a7ae6 | 4020 | static bool |
3553f0bb | 4021 | slot_coalesced_allocno_live_ranges_intersect_p (ira_allocno_t allocno, int n) |
b15a7ae6 | 4022 | { |
b15a7ae6 | 4023 | ira_allocno_t a; |
b15a7ae6 | 4024 | |
1756cb66 VM |
4025 | for (a = ALLOCNO_COALESCE_DATA (allocno)->next;; |
4026 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
b15a7ae6 | 4027 | { |
ac0ab4f7 BS |
4028 | int i; |
4029 | int nr = ALLOCNO_NUM_OBJECTS (a); | |
1756cb66 | 4030 | |
ac0ab4f7 BS |
4031 | for (i = 0; i < nr; i++) |
4032 | { | |
4033 | ira_object_t obj = ALLOCNO_OBJECT (a, i); | |
1756cb66 VM |
4034 | |
4035 | if (ira_live_ranges_intersect_p | |
4036 | (slot_coalesced_allocnos_live_ranges[n], | |
4037 | OBJECT_LIVE_RANGES (obj))) | |
ac0ab4f7 BS |
4038 | return true; |
4039 | } | |
b15a7ae6 VM |
4040 | if (a == allocno) |
4041 | break; | |
4042 | } | |
4043 | return false; | |
4044 | } | |
4045 | ||
3553f0bb VM |
4046 | /* Update live ranges of slot to which coalesced allocnos represented |
4047 | by ALLOCNO were assigned. */ | |
b15a7ae6 | 4048 | static void |
3553f0bb | 4049 | setup_slot_coalesced_allocno_live_ranges (ira_allocno_t allocno) |
b15a7ae6 | 4050 | { |
ac0ab4f7 | 4051 | int i, n; |
b15a7ae6 | 4052 | ira_allocno_t a; |
b14151b5 | 4053 | live_range_t r; |
b15a7ae6 | 4054 | |
1756cb66 VM |
4055 | n = ALLOCNO_COALESCE_DATA (allocno)->temp; |
4056 | for (a = ALLOCNO_COALESCE_DATA (allocno)->next;; | |
4057 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
b15a7ae6 | 4058 | { |
ac0ab4f7 BS |
4059 | int nr = ALLOCNO_NUM_OBJECTS (a); |
4060 | for (i = 0; i < nr; i++) | |
4061 | { | |
4062 | ira_object_t obj = ALLOCNO_OBJECT (a, i); | |
1756cb66 | 4063 | |
ac0ab4f7 BS |
4064 | r = ira_copy_live_range_list (OBJECT_LIVE_RANGES (obj)); |
4065 | slot_coalesced_allocnos_live_ranges[n] | |
4066 | = ira_merge_live_ranges | |
1756cb66 | 4067 | (slot_coalesced_allocnos_live_ranges[n], r); |
ac0ab4f7 | 4068 | } |
b15a7ae6 VM |
4069 | if (a == allocno) |
4070 | break; | |
4071 | } | |
4072 | } | |
4073 | ||
058e97ec VM |
4074 | /* We have coalesced allocnos involving in copies. Coalesce allocnos |
4075 | further in order to share the same memory stack slot. Allocnos | |
4076 | representing sets of allocnos coalesced before the call are given | |
4077 | in array SPILLED_COALESCED_ALLOCNOS of length NUM. Return TRUE if | |
4078 | some allocnos were coalesced in the function. */ | |
4079 | static bool | |
4080 | coalesce_spill_slots (ira_allocno_t *spilled_coalesced_allocnos, int num) | |
4081 | { | |
3553f0bb | 4082 | int i, j, n, last_coalesced_allocno_num; |
058e97ec VM |
4083 | ira_allocno_t allocno, a; |
4084 | bool merged_p = false; | |
1240d76e | 4085 | bitmap set_jump_crosses = regstat_get_setjmp_crosses (); |
058e97ec | 4086 | |
3553f0bb | 4087 | slot_coalesced_allocnos_live_ranges |
b14151b5 | 4088 | = (live_range_t *) ira_allocate (sizeof (live_range_t) * ira_allocnos_num); |
3553f0bb | 4089 | memset (slot_coalesced_allocnos_live_ranges, 0, |
b14151b5 | 4090 | sizeof (live_range_t) * ira_allocnos_num); |
b15a7ae6 | 4091 | last_coalesced_allocno_num = 0; |
058e97ec VM |
4092 | /* Coalesce non-conflicting spilled allocnos preferring most |
4093 | frequently used. */ | |
4094 | for (i = 0; i < num; i++) | |
4095 | { | |
4096 | allocno = spilled_coalesced_allocnos[i]; | |
1756cb66 | 4097 | if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno |
1240d76e | 4098 | || bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (allocno)) |
55a2c322 | 4099 | || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno))) |
058e97ec VM |
4100 | continue; |
4101 | for (j = 0; j < i; j++) | |
4102 | { | |
4103 | a = spilled_coalesced_allocnos[j]; | |
1756cb66 VM |
4104 | n = ALLOCNO_COALESCE_DATA (a)->temp; |
4105 | if (ALLOCNO_COALESCE_DATA (a)->first == a | |
1240d76e | 4106 | && ! bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (a)) |
55a2c322 | 4107 | && ! ira_equiv_no_lvalue_p (ALLOCNO_REGNO (a)) |
3553f0bb | 4108 | && ! slot_coalesced_allocno_live_ranges_intersect_p (allocno, n)) |
b15a7ae6 VM |
4109 | break; |
4110 | } | |
4111 | if (j >= i) | |
4112 | { | |
4113 | /* No coalescing: set up number for coalesced allocnos | |
4114 | represented by ALLOCNO. */ | |
1756cb66 | 4115 | ALLOCNO_COALESCE_DATA (allocno)->temp = last_coalesced_allocno_num++; |
3553f0bb | 4116 | setup_slot_coalesced_allocno_live_ranges (allocno); |
b15a7ae6 VM |
4117 | } |
4118 | else | |
4119 | { | |
058e97ec VM |
4120 | allocno_coalesced_p = true; |
4121 | merged_p = true; | |
4122 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4123 | fprintf (ira_dump_file, | |
4124 | " Coalescing spilled allocnos a%dr%d->a%dr%d\n", | |
4125 | ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno), | |
4126 | ALLOCNO_NUM (a), ALLOCNO_REGNO (a)); | |
1756cb66 VM |
4127 | ALLOCNO_COALESCE_DATA (allocno)->temp |
4128 | = ALLOCNO_COALESCE_DATA (a)->temp; | |
3553f0bb | 4129 | setup_slot_coalesced_allocno_live_ranges (allocno); |
058e97ec | 4130 | merge_allocnos (a, allocno); |
1756cb66 | 4131 | ira_assert (ALLOCNO_COALESCE_DATA (a)->first == a); |
058e97ec VM |
4132 | } |
4133 | } | |
3553f0bb | 4134 | for (i = 0; i < ira_allocnos_num; i++) |
9140d27b | 4135 | ira_finish_live_range_list (slot_coalesced_allocnos_live_ranges[i]); |
3553f0bb | 4136 | ira_free (slot_coalesced_allocnos_live_ranges); |
058e97ec VM |
4137 | return merged_p; |
4138 | } | |
4139 | ||
4140 | /* Sort pseudo-register numbers in array PSEUDO_REGNOS of length N for | |
4141 | subsequent assigning stack slots to them in the reload pass. To do | |
4142 | this we coalesce spilled allocnos first to decrease the number of | |
4143 | memory-memory move insns. This function is called by the | |
4144 | reload. */ | |
4145 | void | |
4146 | ira_sort_regnos_for_alter_reg (int *pseudo_regnos, int n, | |
4147 | unsigned int *reg_max_ref_width) | |
4148 | { | |
4149 | int max_regno = max_reg_num (); | |
4150 | int i, regno, num, slot_num; | |
4151 | ira_allocno_t allocno, a; | |
4152 | ira_allocno_iterator ai; | |
4153 | ira_allocno_t *spilled_coalesced_allocnos; | |
4154 | ||
9994ad20 KC |
4155 | ira_assert (! ira_use_lra_p); |
4156 | ||
058e97ec VM |
4157 | /* Set up allocnos can be coalesced. */ |
4158 | coloring_allocno_bitmap = ira_allocate_bitmap (); | |
4159 | for (i = 0; i < n; i++) | |
4160 | { | |
4161 | regno = pseudo_regnos[i]; | |
4162 | allocno = ira_regno_allocno_map[regno]; | |
4163 | if (allocno != NULL) | |
1756cb66 | 4164 | bitmap_set_bit (coloring_allocno_bitmap, ALLOCNO_NUM (allocno)); |
058e97ec VM |
4165 | } |
4166 | allocno_coalesced_p = false; | |
22b0982c | 4167 | processed_coalesced_allocno_bitmap = ira_allocate_bitmap (); |
1756cb66 VM |
4168 | allocno_coalesce_data |
4169 | = (coalesce_data_t) ira_allocate (sizeof (struct coalesce_data) | |
4170 | * ira_allocnos_num); | |
4171 | /* Initialize coalesce data for allocnos. */ | |
4172 | FOR_EACH_ALLOCNO (a, ai) | |
4173 | { | |
4174 | ALLOCNO_ADD_DATA (a) = allocno_coalesce_data + ALLOCNO_NUM (a); | |
4175 | ALLOCNO_COALESCE_DATA (a)->first = a; | |
4176 | ALLOCNO_COALESCE_DATA (a)->next = a; | |
4177 | } | |
22b0982c | 4178 | coalesce_allocnos (); |
058e97ec VM |
4179 | ira_free_bitmap (coloring_allocno_bitmap); |
4180 | regno_coalesced_allocno_cost | |
4181 | = (int *) ira_allocate (max_regno * sizeof (int)); | |
4182 | regno_coalesced_allocno_num | |
4183 | = (int *) ira_allocate (max_regno * sizeof (int)); | |
4184 | memset (regno_coalesced_allocno_num, 0, max_regno * sizeof (int)); | |
4185 | setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n); | |
4186 | /* Sort regnos according frequencies of the corresponding coalesced | |
4187 | allocno sets. */ | |
4188 | qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_freq_compare); | |
4189 | spilled_coalesced_allocnos | |
4190 | = (ira_allocno_t *) ira_allocate (ira_allocnos_num | |
4191 | * sizeof (ira_allocno_t)); | |
4192 | /* Collect allocnos representing the spilled coalesced allocno | |
4193 | sets. */ | |
4194 | num = collect_spilled_coalesced_allocnos (pseudo_regnos, n, | |
4195 | spilled_coalesced_allocnos); | |
4196 | if (flag_ira_share_spill_slots | |
4197 | && coalesce_spill_slots (spilled_coalesced_allocnos, num)) | |
4198 | { | |
4199 | setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n); | |
4200 | qsort (pseudo_regnos, n, sizeof (int), | |
4201 | coalesced_pseudo_reg_freq_compare); | |
4202 | num = collect_spilled_coalesced_allocnos (pseudo_regnos, n, | |
4203 | spilled_coalesced_allocnos); | |
4204 | } | |
4205 | ira_free_bitmap (processed_coalesced_allocno_bitmap); | |
4206 | allocno_coalesced_p = false; | |
4207 | /* Assign stack slot numbers to spilled allocno sets, use smaller | |
4208 | numbers for most frequently used coalesced allocnos. -1 is | |
4209 | reserved for dynamic search of stack slots for pseudos spilled by | |
4210 | the reload. */ | |
4211 | slot_num = 1; | |
4212 | for (i = 0; i < num; i++) | |
4213 | { | |
4214 | allocno = spilled_coalesced_allocnos[i]; | |
1756cb66 | 4215 | if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno |
058e97ec | 4216 | || ALLOCNO_HARD_REGNO (allocno) >= 0 |
55a2c322 | 4217 | || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno))) |
058e97ec VM |
4218 | continue; |
4219 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4220 | fprintf (ira_dump_file, " Slot %d (freq,size):", slot_num); | |
4221 | slot_num++; | |
1756cb66 VM |
4222 | for (a = ALLOCNO_COALESCE_DATA (allocno)->next;; |
4223 | a = ALLOCNO_COALESCE_DATA (a)->next) | |
058e97ec VM |
4224 | { |
4225 | ira_assert (ALLOCNO_HARD_REGNO (a) < 0); | |
4226 | ALLOCNO_HARD_REGNO (a) = -slot_num; | |
4227 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4228 | fprintf (ira_dump_file, " a%dr%d(%d,%d)", | |
4229 | ALLOCNO_NUM (a), ALLOCNO_REGNO (a), ALLOCNO_FREQ (a), | |
4230 | MAX (PSEUDO_REGNO_BYTES (ALLOCNO_REGNO (a)), | |
4231 | reg_max_ref_width[ALLOCNO_REGNO (a)])); | |
b8698a0f | 4232 | |
058e97ec VM |
4233 | if (a == allocno) |
4234 | break; | |
4235 | } | |
4236 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4237 | fprintf (ira_dump_file, "\n"); | |
4238 | } | |
4239 | ira_spilled_reg_stack_slots_num = slot_num - 1; | |
4240 | ira_free (spilled_coalesced_allocnos); | |
4241 | /* Sort regnos according the slot numbers. */ | |
4242 | regno_max_ref_width = reg_max_ref_width; | |
4243 | qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_slot_compare); | |
058e97ec | 4244 | FOR_EACH_ALLOCNO (a, ai) |
1756cb66 VM |
4245 | ALLOCNO_ADD_DATA (a) = NULL; |
4246 | ira_free (allocno_coalesce_data); | |
058e97ec VM |
4247 | ira_free (regno_coalesced_allocno_num); |
4248 | ira_free (regno_coalesced_allocno_cost); | |
4249 | } | |
4250 | ||
4251 | \f | |
4252 | ||
4253 | /* This page contains code used by the reload pass to improve the | |
4254 | final code. */ | |
4255 | ||
4256 | /* The function is called from reload to mark changes in the | |
4257 | allocation of REGNO made by the reload. Remember that reg_renumber | |
4258 | reflects the change result. */ | |
4259 | void | |
4260 | ira_mark_allocation_change (int regno) | |
4261 | { | |
4262 | ira_allocno_t a = ira_regno_allocno_map[regno]; | |
4263 | int old_hard_regno, hard_regno, cost; | |
1756cb66 | 4264 | enum reg_class aclass = ALLOCNO_CLASS (a); |
058e97ec VM |
4265 | |
4266 | ira_assert (a != NULL); | |
4267 | hard_regno = reg_renumber[regno]; | |
4268 | if ((old_hard_regno = ALLOCNO_HARD_REGNO (a)) == hard_regno) | |
4269 | return; | |
4270 | if (old_hard_regno < 0) | |
4271 | cost = -ALLOCNO_MEMORY_COST (a); | |
4272 | else | |
4273 | { | |
1756cb66 | 4274 | ira_assert (ira_class_hard_reg_index[aclass][old_hard_regno] >= 0); |
058e97ec | 4275 | cost = -(ALLOCNO_HARD_REG_COSTS (a) == NULL |
1756cb66 | 4276 | ? ALLOCNO_CLASS_COST (a) |
058e97ec | 4277 | : ALLOCNO_HARD_REG_COSTS (a) |
1756cb66 | 4278 | [ira_class_hard_reg_index[aclass][old_hard_regno]]); |
c73ccc80 | 4279 | update_costs_from_copies (a, false, false); |
058e97ec VM |
4280 | } |
4281 | ira_overall_cost -= cost; | |
4282 | ALLOCNO_HARD_REGNO (a) = hard_regno; | |
4283 | if (hard_regno < 0) | |
4284 | { | |
4285 | ALLOCNO_HARD_REGNO (a) = -1; | |
4286 | cost += ALLOCNO_MEMORY_COST (a); | |
4287 | } | |
1756cb66 | 4288 | else if (ira_class_hard_reg_index[aclass][hard_regno] >= 0) |
058e97ec VM |
4289 | { |
4290 | cost += (ALLOCNO_HARD_REG_COSTS (a) == NULL | |
1756cb66 | 4291 | ? ALLOCNO_CLASS_COST (a) |
058e97ec | 4292 | : ALLOCNO_HARD_REG_COSTS (a) |
1756cb66 | 4293 | [ira_class_hard_reg_index[aclass][hard_regno]]); |
c73ccc80 | 4294 | update_costs_from_copies (a, true, false); |
058e97ec VM |
4295 | } |
4296 | else | |
4297 | /* Reload changed class of the allocno. */ | |
4298 | cost = 0; | |
4299 | ira_overall_cost += cost; | |
4300 | } | |
4301 | ||
4302 | /* This function is called when reload deletes memory-memory move. In | |
4303 | this case we marks that the allocation of the corresponding | |
4304 | allocnos should be not changed in future. Otherwise we risk to get | |
4305 | a wrong code. */ | |
4306 | void | |
4307 | ira_mark_memory_move_deletion (int dst_regno, int src_regno) | |
4308 | { | |
4309 | ira_allocno_t dst = ira_regno_allocno_map[dst_regno]; | |
4310 | ira_allocno_t src = ira_regno_allocno_map[src_regno]; | |
4311 | ||
4312 | ira_assert (dst != NULL && src != NULL | |
4313 | && ALLOCNO_HARD_REGNO (dst) < 0 | |
4314 | && ALLOCNO_HARD_REGNO (src) < 0); | |
4315 | ALLOCNO_DONT_REASSIGN_P (dst) = true; | |
4316 | ALLOCNO_DONT_REASSIGN_P (src) = true; | |
4317 | } | |
4318 | ||
4319 | /* Try to assign a hard register (except for FORBIDDEN_REGS) to | |
3631be48 | 4320 | allocno A and return TRUE in the case of success. */ |
058e97ec VM |
4321 | static bool |
4322 | allocno_reload_assign (ira_allocno_t a, HARD_REG_SET forbidden_regs) | |
4323 | { | |
4324 | int hard_regno; | |
1756cb66 | 4325 | enum reg_class aclass; |
058e97ec | 4326 | int regno = ALLOCNO_REGNO (a); |
ac0ab4f7 BS |
4327 | HARD_REG_SET saved[2]; |
4328 | int i, n; | |
058e97ec | 4329 | |
ac0ab4f7 BS |
4330 | n = ALLOCNO_NUM_OBJECTS (a); |
4331 | for (i = 0; i < n; i++) | |
4332 | { | |
4333 | ira_object_t obj = ALLOCNO_OBJECT (a, i); | |
4334 | COPY_HARD_REG_SET (saved[i], OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)); | |
4335 | IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), forbidden_regs); | |
4336 | if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0) | |
4337 | IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), | |
4338 | call_used_reg_set); | |
4339 | } | |
058e97ec | 4340 | ALLOCNO_ASSIGNED_P (a) = false; |
1756cb66 | 4341 | aclass = ALLOCNO_CLASS (a); |
058e97ec VM |
4342 | update_curr_costs (a); |
4343 | assign_hard_reg (a, true); | |
4344 | hard_regno = ALLOCNO_HARD_REGNO (a); | |
4345 | reg_renumber[regno] = hard_regno; | |
4346 | if (hard_regno < 0) | |
4347 | ALLOCNO_HARD_REGNO (a) = -1; | |
4348 | else | |
4349 | { | |
1756cb66 VM |
4350 | ira_assert (ira_class_hard_reg_index[aclass][hard_regno] >= 0); |
4351 | ira_overall_cost | |
4352 | -= (ALLOCNO_MEMORY_COST (a) | |
4353 | - (ALLOCNO_HARD_REG_COSTS (a) == NULL | |
4354 | ? ALLOCNO_CLASS_COST (a) | |
4355 | : ALLOCNO_HARD_REG_COSTS (a)[ira_class_hard_reg_index | |
4356 | [aclass][hard_regno]])); | |
058e97ec | 4357 | if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0 |
9181a6e5 VM |
4358 | && ira_hard_reg_set_intersection_p (hard_regno, ALLOCNO_MODE (a), |
4359 | call_used_reg_set)) | |
058e97ec VM |
4360 | { |
4361 | ira_assert (flag_caller_saves); | |
4362 | caller_save_needed = 1; | |
4363 | } | |
4364 | } | |
4365 | ||
4366 | /* If we found a hard register, modify the RTL for the pseudo | |
4367 | register to show the hard register, and mark the pseudo register | |
4368 | live. */ | |
4369 | if (reg_renumber[regno] >= 0) | |
4370 | { | |
4371 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4372 | fprintf (ira_dump_file, ": reassign to %d\n", reg_renumber[regno]); | |
4373 | SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]); | |
4374 | mark_home_live (regno); | |
4375 | } | |
4376 | else if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4377 | fprintf (ira_dump_file, "\n"); | |
ac0ab4f7 BS |
4378 | for (i = 0; i < n; i++) |
4379 | { | |
4380 | ira_object_t obj = ALLOCNO_OBJECT (a, i); | |
4381 | COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), saved[i]); | |
4382 | } | |
058e97ec VM |
4383 | return reg_renumber[regno] >= 0; |
4384 | } | |
4385 | ||
4386 | /* Sort pseudos according their usage frequencies (putting most | |
4387 | frequently ones first). */ | |
4388 | static int | |
4389 | pseudo_reg_compare (const void *v1p, const void *v2p) | |
4390 | { | |
4391 | int regno1 = *(const int *) v1p; | |
4392 | int regno2 = *(const int *) v2p; | |
4393 | int diff; | |
4394 | ||
4395 | if ((diff = REG_FREQ (regno2) - REG_FREQ (regno1)) != 0) | |
4396 | return diff; | |
4397 | return regno1 - regno2; | |
4398 | } | |
4399 | ||
4400 | /* Try to allocate hard registers to SPILLED_PSEUDO_REGS (there are | |
4401 | NUM of them) or spilled pseudos conflicting with pseudos in | |
4402 | SPILLED_PSEUDO_REGS. Return TRUE and update SPILLED, if the | |
4403 | allocation has been changed. The function doesn't use | |
4404 | BAD_SPILL_REGS and hard registers in PSEUDO_FORBIDDEN_REGS and | |
4405 | PSEUDO_PREVIOUS_REGS for the corresponding pseudos. The function | |
4406 | is called by the reload pass at the end of each reload | |
4407 | iteration. */ | |
4408 | bool | |
4409 | ira_reassign_pseudos (int *spilled_pseudo_regs, int num, | |
4410 | HARD_REG_SET bad_spill_regs, | |
4411 | HARD_REG_SET *pseudo_forbidden_regs, | |
6190446b JL |
4412 | HARD_REG_SET *pseudo_previous_regs, |
4413 | bitmap spilled) | |
058e97ec | 4414 | { |
016f9d9d | 4415 | int i, n, regno; |
058e97ec | 4416 | bool changed_p; |
fa86d337 | 4417 | ira_allocno_t a; |
058e97ec | 4418 | HARD_REG_SET forbidden_regs; |
6190446b JL |
4419 | bitmap temp = BITMAP_ALLOC (NULL); |
4420 | ||
4421 | /* Add pseudos which conflict with pseudos already in | |
4422 | SPILLED_PSEUDO_REGS to SPILLED_PSEUDO_REGS. This is preferable | |
4423 | to allocating in two steps as some of the conflicts might have | |
4424 | a higher priority than the pseudos passed in SPILLED_PSEUDO_REGS. */ | |
4425 | for (i = 0; i < num; i++) | |
4426 | bitmap_set_bit (temp, spilled_pseudo_regs[i]); | |
4427 | ||
4428 | for (i = 0, n = num; i < n; i++) | |
4429 | { | |
ac0ab4f7 | 4430 | int nr, j; |
6190446b JL |
4431 | int regno = spilled_pseudo_regs[i]; |
4432 | bitmap_set_bit (temp, regno); | |
4433 | ||
4434 | a = ira_regno_allocno_map[regno]; | |
ac0ab4f7 BS |
4435 | nr = ALLOCNO_NUM_OBJECTS (a); |
4436 | for (j = 0; j < nr; j++) | |
fa86d337 | 4437 | { |
ac0ab4f7 BS |
4438 | ira_object_t conflict_obj; |
4439 | ira_object_t obj = ALLOCNO_OBJECT (a, j); | |
4440 | ira_object_conflict_iterator oci; | |
4441 | ||
4442 | FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci) | |
fa86d337 | 4443 | { |
ac0ab4f7 BS |
4444 | ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj); |
4445 | if (ALLOCNO_HARD_REGNO (conflict_a) < 0 | |
4446 | && ! ALLOCNO_DONT_REASSIGN_P (conflict_a) | |
fcaa4ca4 | 4447 | && bitmap_set_bit (temp, ALLOCNO_REGNO (conflict_a))) |
ac0ab4f7 BS |
4448 | { |
4449 | spilled_pseudo_regs[num++] = ALLOCNO_REGNO (conflict_a); | |
ac0ab4f7 BS |
4450 | /* ?!? This seems wrong. */ |
4451 | bitmap_set_bit (consideration_allocno_bitmap, | |
4452 | ALLOCNO_NUM (conflict_a)); | |
4453 | } | |
fa86d337 BS |
4454 | } |
4455 | } | |
6190446b | 4456 | } |
058e97ec VM |
4457 | |
4458 | if (num > 1) | |
4459 | qsort (spilled_pseudo_regs, num, sizeof (int), pseudo_reg_compare); | |
4460 | changed_p = false; | |
4461 | /* Try to assign hard registers to pseudos from | |
4462 | SPILLED_PSEUDO_REGS. */ | |
016f9d9d | 4463 | for (i = 0; i < num; i++) |
058e97ec VM |
4464 | { |
4465 | regno = spilled_pseudo_regs[i]; | |
4466 | COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs); | |
4467 | IOR_HARD_REG_SET (forbidden_regs, pseudo_forbidden_regs[regno]); | |
4468 | IOR_HARD_REG_SET (forbidden_regs, pseudo_previous_regs[regno]); | |
4469 | gcc_assert (reg_renumber[regno] < 0); | |
4470 | a = ira_regno_allocno_map[regno]; | |
4471 | ira_mark_allocation_change (regno); | |
4472 | ira_assert (reg_renumber[regno] < 0); | |
4473 | if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL) | |
4474 | fprintf (ira_dump_file, | |
6190446b | 4475 | " Try Assign %d(a%d), cost=%d", regno, ALLOCNO_NUM (a), |
058e97ec | 4476 | ALLOCNO_MEMORY_COST (a) |
1756cb66 | 4477 | - ALLOCNO_CLASS_COST (a)); |
058e97ec VM |
4478 | allocno_reload_assign (a, forbidden_regs); |
4479 | if (reg_renumber[regno] >= 0) | |
4480 | { | |
4481 | CLEAR_REGNO_REG_SET (spilled, regno); | |
4482 | changed_p = true; | |
4483 | } | |
058e97ec | 4484 | } |
6190446b | 4485 | BITMAP_FREE (temp); |
058e97ec VM |
4486 | return changed_p; |
4487 | } | |
4488 | ||
4489 | /* The function is called by reload and returns already allocated | |
4490 | stack slot (if any) for REGNO with given INHERENT_SIZE and | |
4491 | TOTAL_SIZE. In the case of failure to find a slot which can be | |
4492 | used for REGNO, the function returns NULL. */ | |
4493 | rtx | |
4494 | ira_reuse_stack_slot (int regno, unsigned int inherent_size, | |
4495 | unsigned int total_size) | |
4496 | { | |
4497 | unsigned int i; | |
4498 | int slot_num, best_slot_num; | |
4499 | int cost, best_cost; | |
4500 | ira_copy_t cp, next_cp; | |
4501 | ira_allocno_t another_allocno, allocno = ira_regno_allocno_map[regno]; | |
4502 | rtx x; | |
4503 | bitmap_iterator bi; | |
4504 | struct ira_spilled_reg_stack_slot *slot = NULL; | |
4505 | ||
9994ad20 KC |
4506 | ira_assert (! ira_use_lra_p); |
4507 | ||
2af2dbdc | 4508 | ira_assert (inherent_size == PSEUDO_REGNO_BYTES (regno) |
058e97ec VM |
4509 | && inherent_size <= total_size |
4510 | && ALLOCNO_HARD_REGNO (allocno) < 0); | |
4511 | if (! flag_ira_share_spill_slots) | |
4512 | return NULL_RTX; | |
4513 | slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2; | |
4514 | if (slot_num != -1) | |
4515 | { | |
4516 | slot = &ira_spilled_reg_stack_slots[slot_num]; | |
4517 | x = slot->mem; | |
4518 | } | |
4519 | else | |
4520 | { | |
4521 | best_cost = best_slot_num = -1; | |
4522 | x = NULL_RTX; | |
4523 | /* It means that the pseudo was spilled in the reload pass, try | |
4524 | to reuse a slot. */ | |
4525 | for (slot_num = 0; | |
4526 | slot_num < ira_spilled_reg_stack_slots_num; | |
4527 | slot_num++) | |
4528 | { | |
4529 | slot = &ira_spilled_reg_stack_slots[slot_num]; | |
4530 | if (slot->mem == NULL_RTX) | |
4531 | continue; | |
4532 | if (slot->width < total_size | |
4533 | || GET_MODE_SIZE (GET_MODE (slot->mem)) < inherent_size) | |
4534 | continue; | |
b8698a0f | 4535 | |
058e97ec VM |
4536 | EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs, |
4537 | FIRST_PSEUDO_REGISTER, i, bi) | |
4538 | { | |
4539 | another_allocno = ira_regno_allocno_map[i]; | |
1756cb66 VM |
4540 | if (allocnos_conflict_by_live_ranges_p (allocno, |
4541 | another_allocno)) | |
058e97ec VM |
4542 | goto cont; |
4543 | } | |
4544 | for (cost = 0, cp = ALLOCNO_COPIES (allocno); | |
4545 | cp != NULL; | |
4546 | cp = next_cp) | |
4547 | { | |
4548 | if (cp->first == allocno) | |
4549 | { | |
4550 | next_cp = cp->next_first_allocno_copy; | |
4551 | another_allocno = cp->second; | |
4552 | } | |
4553 | else if (cp->second == allocno) | |
4554 | { | |
4555 | next_cp = cp->next_second_allocno_copy; | |
4556 | another_allocno = cp->first; | |
4557 | } | |
4558 | else | |
4559 | gcc_unreachable (); | |
4560 | if (cp->insn == NULL_RTX) | |
4561 | continue; | |
4562 | if (bitmap_bit_p (&slot->spilled_regs, | |
4563 | ALLOCNO_REGNO (another_allocno))) | |
4564 | cost += cp->freq; | |
4565 | } | |
4566 | if (cost > best_cost) | |
4567 | { | |
4568 | best_cost = cost; | |
4569 | best_slot_num = slot_num; | |
4570 | } | |
4571 | cont: | |
4572 | ; | |
4573 | } | |
4574 | if (best_cost >= 0) | |
4575 | { | |
99b96649 EB |
4576 | slot_num = best_slot_num; |
4577 | slot = &ira_spilled_reg_stack_slots[slot_num]; | |
058e97ec VM |
4578 | SET_REGNO_REG_SET (&slot->spilled_regs, regno); |
4579 | x = slot->mem; | |
99b96649 | 4580 | ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2; |
058e97ec VM |
4581 | } |
4582 | } | |
4583 | if (x != NULL_RTX) | |
4584 | { | |
4585 | ira_assert (slot->width >= total_size); | |
f7556aae | 4586 | #ifdef ENABLE_IRA_CHECKING |
058e97ec VM |
4587 | EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs, |
4588 | FIRST_PSEUDO_REGISTER, i, bi) | |
4589 | { | |
1756cb66 | 4590 | ira_assert (! conflict_by_live_ranges_p (regno, i)); |
058e97ec | 4591 | } |
f7556aae | 4592 | #endif |
058e97ec VM |
4593 | SET_REGNO_REG_SET (&slot->spilled_regs, regno); |
4594 | if (internal_flag_ira_verbose > 3 && ira_dump_file) | |
4595 | { | |
4596 | fprintf (ira_dump_file, " Assigning %d(freq=%d) slot %d of", | |
4597 | regno, REG_FREQ (regno), slot_num); | |
4598 | EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs, | |
4599 | FIRST_PSEUDO_REGISTER, i, bi) | |
4600 | { | |
4601 | if ((unsigned) regno != i) | |
4602 | fprintf (ira_dump_file, " %d", i); | |
4603 | } | |
4604 | fprintf (ira_dump_file, "\n"); | |
4605 | } | |
4606 | } | |
4607 | return x; | |
4608 | } | |
4609 | ||
4610 | /* This is called by reload every time a new stack slot X with | |
4611 | TOTAL_SIZE was allocated for REGNO. We store this info for | |
4612 | subsequent ira_reuse_stack_slot calls. */ | |
4613 | void | |
4614 | ira_mark_new_stack_slot (rtx x, int regno, unsigned int total_size) | |
4615 | { | |
4616 | struct ira_spilled_reg_stack_slot *slot; | |
4617 | int slot_num; | |
4618 | ira_allocno_t allocno; | |
4619 | ||
9994ad20 KC |
4620 | ira_assert (! ira_use_lra_p); |
4621 | ||
2af2dbdc | 4622 | ira_assert (PSEUDO_REGNO_BYTES (regno) <= total_size); |
058e97ec VM |
4623 | allocno = ira_regno_allocno_map[regno]; |
4624 | slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2; | |
4625 | if (slot_num == -1) | |
4626 | { | |
4627 | slot_num = ira_spilled_reg_stack_slots_num++; | |
4628 | ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2; | |
4629 | } | |
4630 | slot = &ira_spilled_reg_stack_slots[slot_num]; | |
4631 | INIT_REG_SET (&slot->spilled_regs); | |
4632 | SET_REGNO_REG_SET (&slot->spilled_regs, regno); | |
4633 | slot->mem = x; | |
4634 | slot->width = total_size; | |
4635 | if (internal_flag_ira_verbose > 3 && ira_dump_file) | |
4636 | fprintf (ira_dump_file, " Assigning %d(freq=%d) a new slot %d\n", | |
4637 | regno, REG_FREQ (regno), slot_num); | |
4638 | } | |
4639 | ||
4640 | ||
4641 | /* Return spill cost for pseudo-registers whose numbers are in array | |
4642 | REGNOS (with a negative number as an end marker) for reload with | |
4643 | given IN and OUT for INSN. Return also number points (through | |
4644 | EXCESS_PRESSURE_LIVE_LENGTH) where the pseudo-register lives and | |
4645 | the register pressure is high, number of references of the | |
4646 | pseudo-registers (through NREFS), number of callee-clobbered | |
4647 | hard-registers occupied by the pseudo-registers (through | |
4648 | CALL_USED_COUNT), and the first hard regno occupied by the | |
4649 | pseudo-registers (through FIRST_HARD_REGNO). */ | |
4650 | static int | |
8c797f81 | 4651 | calculate_spill_cost (int *regnos, rtx in, rtx out, rtx_insn *insn, |
058e97ec VM |
4652 | int *excess_pressure_live_length, |
4653 | int *nrefs, int *call_used_count, int *first_hard_regno) | |
4654 | { | |
4655 | int i, cost, regno, hard_regno, j, count, saved_cost, nregs; | |
4656 | bool in_p, out_p; | |
4657 | int length; | |
4658 | ira_allocno_t a; | |
4659 | ||
4660 | *nrefs = 0; | |
4661 | for (length = count = cost = i = 0;; i++) | |
4662 | { | |
4663 | regno = regnos[i]; | |
4664 | if (regno < 0) | |
4665 | break; | |
4666 | *nrefs += REG_N_REFS (regno); | |
4667 | hard_regno = reg_renumber[regno]; | |
4668 | ira_assert (hard_regno >= 0); | |
4669 | a = ira_regno_allocno_map[regno]; | |
ac0ab4f7 | 4670 | length += ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a) / ALLOCNO_NUM_OBJECTS (a); |
1756cb66 | 4671 | cost += ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a); |
058e97ec VM |
4672 | nregs = hard_regno_nregs[hard_regno][ALLOCNO_MODE (a)]; |
4673 | for (j = 0; j < nregs; j++) | |
4674 | if (! TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + j)) | |
4675 | break; | |
4676 | if (j == nregs) | |
4677 | count++; | |
4678 | in_p = in && REG_P (in) && (int) REGNO (in) == hard_regno; | |
4679 | out_p = out && REG_P (out) && (int) REGNO (out) == hard_regno; | |
4680 | if ((in_p || out_p) | |
4681 | && find_regno_note (insn, REG_DEAD, hard_regno) != NULL_RTX) | |
4682 | { | |
4683 | saved_cost = 0; | |
4684 | if (in_p) | |
4685 | saved_cost += ira_memory_move_cost | |
1756cb66 | 4686 | [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][1]; |
058e97ec VM |
4687 | if (out_p) |
4688 | saved_cost | |
4689 | += ira_memory_move_cost | |
1756cb66 | 4690 | [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][0]; |
058e97ec VM |
4691 | cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)) * saved_cost; |
4692 | } | |
4693 | } | |
4694 | *excess_pressure_live_length = length; | |
4695 | *call_used_count = count; | |
4696 | hard_regno = -1; | |
4697 | if (regnos[0] >= 0) | |
4698 | { | |
4699 | hard_regno = reg_renumber[regnos[0]]; | |
4700 | } | |
4701 | *first_hard_regno = hard_regno; | |
4702 | return cost; | |
4703 | } | |
4704 | ||
4705 | /* Return TRUE if spilling pseudo-registers whose numbers are in array | |
4706 | REGNOS is better than spilling pseudo-registers with numbers in | |
4707 | OTHER_REGNOS for reload with given IN and OUT for INSN. The | |
4708 | function used by the reload pass to make better register spilling | |
4709 | decisions. */ | |
4710 | bool | |
4711 | ira_better_spill_reload_regno_p (int *regnos, int *other_regnos, | |
8c797f81 | 4712 | rtx in, rtx out, rtx_insn *insn) |
058e97ec VM |
4713 | { |
4714 | int cost, other_cost; | |
4715 | int length, other_length; | |
4716 | int nrefs, other_nrefs; | |
4717 | int call_used_count, other_call_used_count; | |
4718 | int hard_regno, other_hard_regno; | |
4719 | ||
b8698a0f | 4720 | cost = calculate_spill_cost (regnos, in, out, insn, |
058e97ec VM |
4721 | &length, &nrefs, &call_used_count, &hard_regno); |
4722 | other_cost = calculate_spill_cost (other_regnos, in, out, insn, | |
4723 | &other_length, &other_nrefs, | |
4724 | &other_call_used_count, | |
4725 | &other_hard_regno); | |
4726 | if (nrefs == 0 && other_nrefs != 0) | |
4727 | return true; | |
4728 | if (nrefs != 0 && other_nrefs == 0) | |
4729 | return false; | |
4730 | if (cost != other_cost) | |
4731 | return cost < other_cost; | |
4732 | if (length != other_length) | |
4733 | return length > other_length; | |
4734 | #ifdef REG_ALLOC_ORDER | |
4735 | if (hard_regno >= 0 && other_hard_regno >= 0) | |
4736 | return (inv_reg_alloc_order[hard_regno] | |
4737 | < inv_reg_alloc_order[other_hard_regno]); | |
4738 | #else | |
4739 | if (call_used_count != other_call_used_count) | |
4740 | return call_used_count > other_call_used_count; | |
4741 | #endif | |
4742 | return false; | |
4743 | } | |
4744 | ||
4745 | \f | |
4746 | ||
4747 | /* Allocate and initialize data necessary for assign_hard_reg. */ | |
4748 | void | |
4749 | ira_initiate_assign (void) | |
4750 | { | |
4751 | sorted_allocnos | |
4752 | = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t) | |
4753 | * ira_allocnos_num); | |
4754 | consideration_allocno_bitmap = ira_allocate_bitmap (); | |
4755 | initiate_cost_update (); | |
4756 | allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num); | |
bf08fb16 VM |
4757 | sorted_copies = (ira_copy_t *) ira_allocate (ira_copies_num |
4758 | * sizeof (ira_copy_t)); | |
058e97ec VM |
4759 | } |
4760 | ||
4761 | /* Deallocate data used by assign_hard_reg. */ | |
4762 | void | |
4763 | ira_finish_assign (void) | |
4764 | { | |
4765 | ira_free (sorted_allocnos); | |
4766 | ira_free_bitmap (consideration_allocno_bitmap); | |
4767 | finish_cost_update (); | |
4768 | ira_free (allocno_priorities); | |
bf08fb16 | 4769 | ira_free (sorted_copies); |
058e97ec VM |
4770 | } |
4771 | ||
4772 | \f | |
4773 | ||
4774 | /* Entry function doing color-based register allocation. */ | |
cb1ca6ac VM |
4775 | static void |
4776 | color (void) | |
058e97ec | 4777 | { |
9771b263 | 4778 | allocno_stack_vec.create (ira_allocnos_num); |
058e97ec VM |
4779 | memset (allocated_hardreg_p, 0, sizeof (allocated_hardreg_p)); |
4780 | ira_initiate_assign (); | |
4781 | do_coloring (); | |
4782 | ira_finish_assign (); | |
9771b263 | 4783 | allocno_stack_vec.release (); |
058e97ec VM |
4784 | move_spill_restore (); |
4785 | } | |
4786 | ||
4787 | \f | |
4788 | ||
4789 | /* This page contains a simple register allocator without usage of | |
4790 | allocno conflicts. This is used for fast allocation for -O0. */ | |
4791 | ||
4792 | /* Do register allocation by not using allocno conflicts. It uses | |
4793 | only allocno live ranges. The algorithm is close to Chow's | |
4794 | priority coloring. */ | |
cb1ca6ac VM |
4795 | static void |
4796 | fast_allocation (void) | |
058e97ec | 4797 | { |
1ae64b0f | 4798 | int i, j, k, num, class_size, hard_regno; |
058e97ec VM |
4799 | #ifdef STACK_REGS |
4800 | bool no_stack_reg_p; | |
4801 | #endif | |
1756cb66 | 4802 | enum reg_class aclass; |
ef4bddc2 | 4803 | machine_mode mode; |
058e97ec VM |
4804 | ira_allocno_t a; |
4805 | ira_allocno_iterator ai; | |
b14151b5 | 4806 | live_range_t r; |
058e97ec VM |
4807 | HARD_REG_SET conflict_hard_regs, *used_hard_regs; |
4808 | ||
058e97ec VM |
4809 | sorted_allocnos = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t) |
4810 | * ira_allocnos_num); | |
4811 | num = 0; | |
4812 | FOR_EACH_ALLOCNO (a, ai) | |
4813 | sorted_allocnos[num++] = a; | |
1ae64b0f VM |
4814 | allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num); |
4815 | setup_allocno_priorities (sorted_allocnos, num); | |
4816 | used_hard_regs = (HARD_REG_SET *) ira_allocate (sizeof (HARD_REG_SET) | |
4817 | * ira_max_point); | |
4818 | for (i = 0; i < ira_max_point; i++) | |
4819 | CLEAR_HARD_REG_SET (used_hard_regs[i]); | |
311aab06 | 4820 | qsort (sorted_allocnos, num, sizeof (ira_allocno_t), |
058e97ec VM |
4821 | allocno_priority_compare_func); |
4822 | for (i = 0; i < num; i++) | |
4823 | { | |
ac0ab4f7 BS |
4824 | int nr, l; |
4825 | ||
058e97ec | 4826 | a = sorted_allocnos[i]; |
ac0ab4f7 BS |
4827 | nr = ALLOCNO_NUM_OBJECTS (a); |
4828 | CLEAR_HARD_REG_SET (conflict_hard_regs); | |
4829 | for (l = 0; l < nr; l++) | |
4830 | { | |
4831 | ira_object_t obj = ALLOCNO_OBJECT (a, l); | |
4832 | IOR_HARD_REG_SET (conflict_hard_regs, | |
4833 | OBJECT_CONFLICT_HARD_REGS (obj)); | |
4834 | for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) | |
4835 | for (j = r->start; j <= r->finish; j++) | |
4836 | IOR_HARD_REG_SET (conflict_hard_regs, used_hard_regs[j]); | |
4837 | } | |
1756cb66 | 4838 | aclass = ALLOCNO_CLASS (a); |
6b8d9676 VM |
4839 | ALLOCNO_ASSIGNED_P (a) = true; |
4840 | ALLOCNO_HARD_REGNO (a) = -1; | |
1756cb66 | 4841 | if (hard_reg_set_subset_p (reg_class_contents[aclass], |
058e97ec VM |
4842 | conflict_hard_regs)) |
4843 | continue; | |
4844 | mode = ALLOCNO_MODE (a); | |
4845 | #ifdef STACK_REGS | |
4846 | no_stack_reg_p = ALLOCNO_NO_STACK_REG_P (a); | |
4847 | #endif | |
1756cb66 | 4848 | class_size = ira_class_hard_regs_num[aclass]; |
058e97ec VM |
4849 | for (j = 0; j < class_size; j++) |
4850 | { | |
1756cb66 | 4851 | hard_regno = ira_class_hard_regs[aclass][j]; |
058e97ec VM |
4852 | #ifdef STACK_REGS |
4853 | if (no_stack_reg_p && FIRST_STACK_REG <= hard_regno | |
4854 | && hard_regno <= LAST_STACK_REG) | |
4855 | continue; | |
4856 | #endif | |
9181a6e5 | 4857 | if (ira_hard_reg_set_intersection_p (hard_regno, mode, conflict_hard_regs) |
058e97ec | 4858 | || (TEST_HARD_REG_BIT |
1756cb66 | 4859 | (ira_prohibited_class_mode_regs[aclass][mode], hard_regno))) |
058e97ec VM |
4860 | continue; |
4861 | ALLOCNO_HARD_REGNO (a) = hard_regno; | |
ac0ab4f7 BS |
4862 | for (l = 0; l < nr; l++) |
4863 | { | |
4864 | ira_object_t obj = ALLOCNO_OBJECT (a, l); | |
4865 | for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) | |
4866 | for (k = r->start; k <= r->finish; k++) | |
4867 | IOR_HARD_REG_SET (used_hard_regs[k], | |
4868 | ira_reg_mode_hard_regset[hard_regno][mode]); | |
4869 | } | |
058e97ec VM |
4870 | break; |
4871 | } | |
4872 | } | |
4873 | ira_free (sorted_allocnos); | |
4874 | ira_free (used_hard_regs); | |
4875 | ira_free (allocno_priorities); | |
4876 | if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL) | |
4877 | ira_print_disposition (ira_dump_file); | |
4878 | } | |
cb1ca6ac VM |
4879 | |
4880 | \f | |
4881 | ||
4882 | /* Entry function doing coloring. */ | |
4883 | void | |
4884 | ira_color (void) | |
4885 | { | |
4886 | ira_allocno_t a; | |
4887 | ira_allocno_iterator ai; | |
4888 | ||
4889 | /* Setup updated costs. */ | |
4890 | FOR_EACH_ALLOCNO (a, ai) | |
4891 | { | |
4892 | ALLOCNO_UPDATED_MEMORY_COST (a) = ALLOCNO_MEMORY_COST (a); | |
1756cb66 | 4893 | ALLOCNO_UPDATED_CLASS_COST (a) = ALLOCNO_CLASS_COST (a); |
cb1ca6ac | 4894 | } |
311aab06 | 4895 | if (ira_conflicts_p) |
cb1ca6ac VM |
4896 | color (); |
4897 | else | |
4898 | fast_allocation (); | |
4899 | } |