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058e97ec 1/* IRA allocation based on graph coloring.
23a5b65a 2 Copyright (C) 2006-2014 Free Software Foundation, Inc.
058e97ec
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3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
24#include "tm.h"
25#include "rtl.h"
26#include "tm_p.h"
27#include "target.h"
28#include "regs.h"
29#include "flags.h"
30#include "sbitmap.h"
31#include "bitmap.h"
4a8fb1a1 32#include "hash-table.h"
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33#include "hard-reg-set.h"
34#include "basic-block.h"
35#include "expr.h"
718f9c0f 36#include "diagnostic-core.h"
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37#include "reload.h"
38#include "params.h"
39#include "df.h"
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40#include "ira-int.h"
41
27508f5f 42typedef struct allocno_hard_regs *allocno_hard_regs_t;
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43
44/* The structure contains information about hard registers can be
27508f5f 45 assigned to allocnos. Usually it is allocno profitable hard
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46 registers but in some cases this set can be a bit different. Major
47 reason of the difference is a requirement to use hard register sets
48 that form a tree or a forest (set of trees), i.e. hard register set
49 of a node should contain hard register sets of its subnodes. */
27508f5f 50struct allocno_hard_regs
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51{
52 /* Hard registers can be assigned to an allocno. */
53 HARD_REG_SET set;
54 /* Overall (spilling) cost of all allocnos with given register
55 set. */
a9243bfc 56 int64_t cost;
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57};
58
27508f5f 59typedef struct allocno_hard_regs_node *allocno_hard_regs_node_t;
1756cb66 60
27508f5f 61/* A node representing allocno hard registers. Such nodes form a
1756cb66 62 forest (set of trees). Each subnode of given node in the forest
27508f5f 63 refers for hard register set (usually allocno profitable hard
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64 register set) which is a subset of one referred from given
65 node. */
27508f5f 66struct allocno_hard_regs_node
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67{
68 /* Set up number of the node in preorder traversing of the forest. */
69 int preorder_num;
70 /* Used for different calculation like finding conflict size of an
71 allocno. */
72 int check;
73 /* Used for calculation of conflict size of an allocno. The
27508f5f 74 conflict size of the allocno is maximal number of given allocno
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75 hard registers needed for allocation of the conflicting allocnos.
76 Given allocno is trivially colored if this number plus the number
77 of hard registers needed for given allocno is not greater than
78 the number of given allocno hard register set. */
79 int conflict_size;
80 /* The number of hard registers given by member hard_regs. */
81 int hard_regs_num;
82 /* The following member is used to form the final forest. */
83 bool used_p;
84 /* Pointer to the corresponding profitable hard registers. */
27508f5f 85 allocno_hard_regs_t hard_regs;
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86 /* Parent, first subnode, previous and next node with the same
87 parent in the forest. */
27508f5f 88 allocno_hard_regs_node_t parent, first, prev, next;
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89};
90
3b6d1699
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91/* Info about changing hard reg costs of an allocno. */
92struct update_cost_record
93{
94 /* Hard regno for which we changed the cost. */
95 int hard_regno;
96 /* Divisor used when we changed the cost of HARD_REGNO. */
97 int divisor;
98 /* Next record for given allocno. */
99 struct update_cost_record *next;
100};
101
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102/* To decrease footprint of ira_allocno structure we store all data
103 needed only for coloring in the following structure. */
104struct allocno_color_data
105{
106 /* TRUE value means that the allocno was not removed yet from the
107 conflicting graph during colouring. */
108 unsigned int in_graph_p : 1;
109 /* TRUE if it is put on the stack to make other allocnos
110 colorable. */
111 unsigned int may_be_spilled_p : 1;
27508f5f 112 /* TRUE if the allocno is trivially colorable. */
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113 unsigned int colorable_p : 1;
114 /* Number of hard registers of the allocno class really
115 available for the allocno allocation. It is number of the
116 profitable hard regs. */
117 int available_regs_num;
118 /* Allocnos in a bucket (used in coloring) chained by the following
119 two members. */
120 ira_allocno_t next_bucket_allocno;
121 ira_allocno_t prev_bucket_allocno;
122 /* Used for temporary purposes. */
123 int temp;
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124 /* Used to exclude repeated processing. */
125 int last_process;
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126 /* Profitable hard regs available for this pseudo allocation. It
127 means that the set excludes unavailable hard regs and hard regs
128 conflicting with given pseudo. They should be of the allocno
129 class. */
130 HARD_REG_SET profitable_hard_regs;
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131 /* The allocno hard registers node. */
132 allocno_hard_regs_node_t hard_regs_node;
133 /* Array of structures allocno_hard_regs_subnode representing
134 given allocno hard registers node (the 1st element in the array)
135 and all its subnodes in the tree (forest) of allocno hard
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136 register nodes (see comments above). */
137 int hard_regs_subnodes_start;
2b9c63a2 138 /* The length of the previous array. */
1756cb66 139 int hard_regs_subnodes_num;
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140 /* Records about updating allocno hard reg costs from copies. If
141 the allocno did not get expected hard register, these records are
142 used to restore original hard reg costs of allocnos connected to
143 this allocno by copies. */
144 struct update_cost_record *update_cost_records;
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145 /* Threads. We collect allocnos connected by copies into threads
146 and try to assign hard regs to allocnos by threads. */
147 /* Allocno representing all thread. */
148 ira_allocno_t first_thread_allocno;
149 /* Allocnos in thread forms a cycle list through the following
150 member. */
151 ira_allocno_t next_thread_allocno;
152 /* All thread frequency. Defined only for first thread allocno. */
153 int thread_freq;
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154};
155
156/* See above. */
27508f5f 157typedef struct allocno_color_data *allocno_color_data_t;
1756cb66 158
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159/* Container for storing allocno data concerning coloring. */
160static allocno_color_data_t allocno_color_data;
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161
162/* Macro to access the data concerning coloring. */
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163#define ALLOCNO_COLOR_DATA(a) ((allocno_color_data_t) ALLOCNO_ADD_DATA (a))
164
165/* Used for finding allocno colorability to exclude repeated allocno
166 processing and for updating preferencing to exclude repeated
167 allocno processing during assignment. */
168static int curr_allocno_process;
1756cb66 169
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170/* This file contains code for regional graph coloring, spill/restore
171 code placement optimization, and code helping the reload pass to do
172 a better job. */
173
174/* Bitmap of allocnos which should be colored. */
175static bitmap coloring_allocno_bitmap;
176
177/* Bitmap of allocnos which should be taken into account during
178 coloring. In general case it contains allocnos from
179 coloring_allocno_bitmap plus other already colored conflicting
180 allocnos. */
181static bitmap consideration_allocno_bitmap;
182
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183/* All allocnos sorted according their priorities. */
184static ira_allocno_t *sorted_allocnos;
185
186/* Vec representing the stack of allocnos used during coloring. */
9771b263 187static vec<ira_allocno_t> allocno_stack_vec;
058e97ec 188
71af27d2
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189/* Helper for qsort comparison callbacks - return a positive integer if
190 X > Y, or a negative value otherwise. Use a conditional expression
191 instead of a difference computation to insulate from possible overflow
192 issues, e.g. X - Y < 0 for some X > 0 and Y < 0. */
193#define SORTGT(x,y) (((x) > (y)) ? 1 : -1)
194
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195\f
196
27508f5f 197/* Definition of vector of allocno hard registers. */
fe82cdfb 198
27508f5f 199/* Vector of unique allocno hard registers. */
9771b263 200static vec<allocno_hard_regs_t> allocno_hard_regs_vec;
1756cb66 201
4a8fb1a1 202struct allocno_hard_regs_hasher : typed_noop_remove <allocno_hard_regs>
1756cb66 203{
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LC
204 typedef allocno_hard_regs value_type;
205 typedef allocno_hard_regs compare_type;
206 static inline hashval_t hash (const value_type *);
207 static inline bool equal (const value_type *, const compare_type *);
208};
1756cb66 209
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210/* Returns hash value for allocno hard registers V. */
211inline hashval_t
212allocno_hard_regs_hasher::hash (const value_type *hv)
213{
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214 return iterative_hash (&hv->set, sizeof (HARD_REG_SET), 0);
215}
216
27508f5f 217/* Compares allocno hard registers V1 and V2. */
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218inline bool
219allocno_hard_regs_hasher::equal (const value_type *hv1, const compare_type *hv2)
1756cb66 220{
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221 return hard_reg_set_equal_p (hv1->set, hv2->set);
222}
223
27508f5f 224/* Hash table of unique allocno hard registers. */
c203e8a7 225static hash_table<allocno_hard_regs_hasher> *allocno_hard_regs_htab;
1756cb66 226
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227/* Return allocno hard registers in the hash table equal to HV. */
228static allocno_hard_regs_t
229find_hard_regs (allocno_hard_regs_t hv)
1756cb66 230{
c203e8a7 231 return allocno_hard_regs_htab->find (hv);
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232}
233
234/* Insert allocno hard registers HV in the hash table (if it is not
235 there yet) and return the value which in the table. */
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236static allocno_hard_regs_t
237insert_hard_regs (allocno_hard_regs_t hv)
1756cb66 238{
c203e8a7 239 allocno_hard_regs **slot = allocno_hard_regs_htab->find_slot (hv, INSERT);
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240
241 if (*slot == NULL)
242 *slot = hv;
4a8fb1a1 243 return *slot;
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244}
245
27508f5f 246/* Initialize data concerning allocno hard registers. */
1756cb66 247static void
27508f5f 248init_allocno_hard_regs (void)
1756cb66 249{
9771b263 250 allocno_hard_regs_vec.create (200);
c203e8a7
TS
251 allocno_hard_regs_htab
252 = new hash_table<allocno_hard_regs_hasher> (200);
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253}
254
27508f5f 255/* Add (or update info about) allocno hard registers with SET and
1756cb66 256 COST. */
27508f5f 257static allocno_hard_regs_t
a9243bfc 258add_allocno_hard_regs (HARD_REG_SET set, int64_t cost)
1756cb66 259{
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260 struct allocno_hard_regs temp;
261 allocno_hard_regs_t hv;
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262
263 gcc_assert (! hard_reg_set_empty_p (set));
264 COPY_HARD_REG_SET (temp.set, set);
265 if ((hv = find_hard_regs (&temp)) != NULL)
266 hv->cost += cost;
267 else
268 {
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269 hv = ((struct allocno_hard_regs *)
270 ira_allocate (sizeof (struct allocno_hard_regs)));
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271 COPY_HARD_REG_SET (hv->set, set);
272 hv->cost = cost;
9771b263 273 allocno_hard_regs_vec.safe_push (hv);
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274 insert_hard_regs (hv);
275 }
276 return hv;
277}
278
279/* Finalize data concerning allocno hard registers. */
280static void
27508f5f 281finish_allocno_hard_regs (void)
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282{
283 int i;
27508f5f 284 allocno_hard_regs_t hv;
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285
286 for (i = 0;
9771b263 287 allocno_hard_regs_vec.iterate (i, &hv);
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288 i++)
289 ira_free (hv);
c203e8a7
TS
290 delete allocno_hard_regs_htab;
291 allocno_hard_regs_htab = NULL;
9771b263 292 allocno_hard_regs_vec.release ();
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293}
294
295/* Sort hard regs according to their frequency of usage. */
296static int
27508f5f 297allocno_hard_regs_compare (const void *v1p, const void *v2p)
1756cb66 298{
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299 allocno_hard_regs_t hv1 = *(const allocno_hard_regs_t *) v1p;
300 allocno_hard_regs_t hv2 = *(const allocno_hard_regs_t *) v2p;
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301
302 if (hv2->cost > hv1->cost)
303 return 1;
304 else if (hv2->cost < hv1->cost)
305 return -1;
306 else
307 return 0;
308}
309
310\f
311
312/* Used for finding a common ancestor of two allocno hard registers
313 nodes in the forest. We use the current value of
314 'node_check_tick' to mark all nodes from one node to the top and
315 then walking up from another node until we find a marked node.
316
317 It is also used to figure out allocno colorability as a mark that
318 we already reset value of member 'conflict_size' for the forest
319 node corresponding to the processed allocno. */
320static int node_check_tick;
321
322/* Roots of the forest containing hard register sets can be assigned
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323 to allocnos. */
324static allocno_hard_regs_node_t hard_regs_roots;
1756cb66 325
27508f5f 326/* Definition of vector of allocno hard register nodes. */
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327
328/* Vector used to create the forest. */
9771b263 329static vec<allocno_hard_regs_node_t> hard_regs_node_vec;
1756cb66 330
27508f5f 331/* Create and return allocno hard registers node containing allocno
1756cb66 332 hard registers HV. */
27508f5f
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333static allocno_hard_regs_node_t
334create_new_allocno_hard_regs_node (allocno_hard_regs_t hv)
1756cb66 335{
27508f5f 336 allocno_hard_regs_node_t new_node;
1756cb66 337
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338 new_node = ((struct allocno_hard_regs_node *)
339 ira_allocate (sizeof (struct allocno_hard_regs_node)));
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340 new_node->check = 0;
341 new_node->hard_regs = hv;
342 new_node->hard_regs_num = hard_reg_set_size (hv->set);
343 new_node->first = NULL;
344 new_node->used_p = false;
345 return new_node;
346}
347
27508f5f 348/* Add allocno hard registers node NEW_NODE to the forest on its level
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349 given by ROOTS. */
350static void
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351add_new_allocno_hard_regs_node_to_forest (allocno_hard_regs_node_t *roots,
352 allocno_hard_regs_node_t new_node)
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353{
354 new_node->next = *roots;
355 if (new_node->next != NULL)
356 new_node->next->prev = new_node;
357 new_node->prev = NULL;
358 *roots = new_node;
359}
360
27508f5f 361/* Add allocno hard registers HV (or its best approximation if it is
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362 not possible) to the forest on its level given by ROOTS. */
363static void
27508f5f
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364add_allocno_hard_regs_to_forest (allocno_hard_regs_node_t *roots,
365 allocno_hard_regs_t hv)
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366{
367 unsigned int i, start;
27508f5f 368 allocno_hard_regs_node_t node, prev, new_node;
1756cb66 369 HARD_REG_SET temp_set;
27508f5f 370 allocno_hard_regs_t hv2;
1756cb66 371
9771b263 372 start = hard_regs_node_vec.length ();
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VM
373 for (node = *roots; node != NULL; node = node->next)
374 {
375 if (hard_reg_set_equal_p (hv->set, node->hard_regs->set))
376 return;
377 if (hard_reg_set_subset_p (hv->set, node->hard_regs->set))
378 {
27508f5f 379 add_allocno_hard_regs_to_forest (&node->first, hv);
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380 return;
381 }
382 if (hard_reg_set_subset_p (node->hard_regs->set, hv->set))
9771b263 383 hard_regs_node_vec.safe_push (node);
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384 else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set))
385 {
386 COPY_HARD_REG_SET (temp_set, hv->set);
387 AND_HARD_REG_SET (temp_set, node->hard_regs->set);
27508f5f
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388 hv2 = add_allocno_hard_regs (temp_set, hv->cost);
389 add_allocno_hard_regs_to_forest (&node->first, hv2);
1756cb66
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390 }
391 }
9771b263 392 if (hard_regs_node_vec.length ()
1756cb66
VM
393 > start + 1)
394 {
395 /* Create a new node which contains nodes in hard_regs_node_vec. */
396 CLEAR_HARD_REG_SET (temp_set);
397 for (i = start;
9771b263 398 i < hard_regs_node_vec.length ();
1756cb66
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399 i++)
400 {
9771b263 401 node = hard_regs_node_vec[i];
1756cb66
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402 IOR_HARD_REG_SET (temp_set, node->hard_regs->set);
403 }
27508f5f
VM
404 hv = add_allocno_hard_regs (temp_set, hv->cost);
405 new_node = create_new_allocno_hard_regs_node (hv);
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406 prev = NULL;
407 for (i = start;
9771b263 408 i < hard_regs_node_vec.length ();
1756cb66
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409 i++)
410 {
9771b263 411 node = hard_regs_node_vec[i];
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412 if (node->prev == NULL)
413 *roots = node->next;
414 else
415 node->prev->next = node->next;
416 if (node->next != NULL)
417 node->next->prev = node->prev;
418 if (prev == NULL)
419 new_node->first = node;
420 else
421 prev->next = node;
422 node->prev = prev;
423 node->next = NULL;
424 prev = node;
425 }
27508f5f 426 add_new_allocno_hard_regs_node_to_forest (roots, new_node);
1756cb66 427 }
9771b263 428 hard_regs_node_vec.truncate (start);
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429}
430
27508f5f 431/* Add allocno hard registers nodes starting with the forest level
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432 given by FIRST which contains biggest set inside SET. */
433static void
27508f5f 434collect_allocno_hard_regs_cover (allocno_hard_regs_node_t first,
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435 HARD_REG_SET set)
436{
27508f5f 437 allocno_hard_regs_node_t node;
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438
439 ira_assert (first != NULL);
440 for (node = first; node != NULL; node = node->next)
441 if (hard_reg_set_subset_p (node->hard_regs->set, set))
9771b263 442 hard_regs_node_vec.safe_push (node);
1756cb66 443 else if (hard_reg_set_intersect_p (set, node->hard_regs->set))
27508f5f 444 collect_allocno_hard_regs_cover (node->first, set);
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445}
446
27508f5f 447/* Set up field parent as PARENT in all allocno hard registers nodes
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448 in forest given by FIRST. */
449static void
27508f5f
VM
450setup_allocno_hard_regs_nodes_parent (allocno_hard_regs_node_t first,
451 allocno_hard_regs_node_t parent)
1756cb66 452{
27508f5f 453 allocno_hard_regs_node_t node;
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VM
454
455 for (node = first; node != NULL; node = node->next)
456 {
457 node->parent = parent;
27508f5f 458 setup_allocno_hard_regs_nodes_parent (node->first, node);
1756cb66
VM
459 }
460}
461
27508f5f 462/* Return allocno hard registers node which is a first common ancestor
1756cb66 463 node of FIRST and SECOND in the forest. */
27508f5f
VM
464static allocno_hard_regs_node_t
465first_common_ancestor_node (allocno_hard_regs_node_t first,
466 allocno_hard_regs_node_t second)
1756cb66 467{
27508f5f 468 allocno_hard_regs_node_t node;
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469
470 node_check_tick++;
471 for (node = first; node != NULL; node = node->parent)
472 node->check = node_check_tick;
473 for (node = second; node != NULL; node = node->parent)
474 if (node->check == node_check_tick)
475 return node;
476 return first_common_ancestor_node (second, first);
477}
478
479/* Print hard reg set SET to F. */
480static void
481print_hard_reg_set (FILE *f, HARD_REG_SET set, bool new_line_p)
482{
483 int i, start;
484
485 for (start = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++)
486 {
487 if (TEST_HARD_REG_BIT (set, i))
488 {
489 if (i == 0 || ! TEST_HARD_REG_BIT (set, i - 1))
490 start = i;
491 }
492 if (start >= 0
493 && (i == FIRST_PSEUDO_REGISTER - 1 || ! TEST_HARD_REG_BIT (set, i)))
494 {
495 if (start == i - 1)
496 fprintf (f, " %d", start);
497 else if (start == i - 2)
498 fprintf (f, " %d %d", start, start + 1);
499 else
500 fprintf (f, " %d-%d", start, i - 1);
501 start = -1;
502 }
503 }
504 if (new_line_p)
505 fprintf (f, "\n");
506}
507
27508f5f 508/* Print allocno hard register subforest given by ROOTS and its LEVEL
1756cb66
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509 to F. */
510static void
27508f5f 511print_hard_regs_subforest (FILE *f, allocno_hard_regs_node_t roots,
1756cb66
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512 int level)
513{
514 int i;
27508f5f 515 allocno_hard_regs_node_t node;
1756cb66
VM
516
517 for (node = roots; node != NULL; node = node->next)
518 {
519 fprintf (f, " ");
520 for (i = 0; i < level * 2; i++)
521 fprintf (f, " ");
522 fprintf (f, "%d:(", node->preorder_num);
523 print_hard_reg_set (f, node->hard_regs->set, false);
a9243bfc 524 fprintf (f, ")@%"PRId64"\n", node->hard_regs->cost);
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525 print_hard_regs_subforest (f, node->first, level + 1);
526 }
527}
528
27508f5f 529/* Print the allocno hard register forest to F. */
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530static void
531print_hard_regs_forest (FILE *f)
532{
533 fprintf (f, " Hard reg set forest:\n");
534 print_hard_regs_subforest (f, hard_regs_roots, 1);
535}
536
27508f5f 537/* Print the allocno hard register forest to stderr. */
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538void
539ira_debug_hard_regs_forest (void)
540{
541 print_hard_regs_forest (stderr);
542}
543
27508f5f 544/* Remove unused allocno hard registers nodes from forest given by its
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545 *ROOTS. */
546static void
27508f5f 547remove_unused_allocno_hard_regs_nodes (allocno_hard_regs_node_t *roots)
1756cb66 548{
27508f5f 549 allocno_hard_regs_node_t node, prev, next, last;
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VM
550
551 for (prev = NULL, node = *roots; node != NULL; node = next)
552 {
553 next = node->next;
554 if (node->used_p)
555 {
27508f5f 556 remove_unused_allocno_hard_regs_nodes (&node->first);
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557 prev = node;
558 }
559 else
560 {
561 for (last = node->first;
562 last != NULL && last->next != NULL;
563 last = last->next)
564 ;
565 if (last != NULL)
566 {
567 if (prev == NULL)
568 *roots = node->first;
569 else
570 prev->next = node->first;
571 if (next != NULL)
572 next->prev = last;
573 last->next = next;
574 next = node->first;
575 }
576 else
577 {
578 if (prev == NULL)
579 *roots = next;
580 else
581 prev->next = next;
582 if (next != NULL)
583 next->prev = prev;
584 }
585 ira_free (node);
586 }
587 }
588}
589
27508f5f 590/* Set up fields preorder_num starting with START_NUM in all allocno
1756cb66
VM
591 hard registers nodes in forest given by FIRST. Return biggest set
592 PREORDER_NUM increased by 1. */
593static int
27508f5f
VM
594enumerate_allocno_hard_regs_nodes (allocno_hard_regs_node_t first,
595 allocno_hard_regs_node_t parent,
596 int start_num)
1756cb66 597{
27508f5f 598 allocno_hard_regs_node_t node;
1756cb66
VM
599
600 for (node = first; node != NULL; node = node->next)
601 {
602 node->preorder_num = start_num++;
603 node->parent = parent;
27508f5f
VM
604 start_num = enumerate_allocno_hard_regs_nodes (node->first, node,
605 start_num);
1756cb66
VM
606 }
607 return start_num;
608}
609
27508f5f
VM
610/* Number of allocno hard registers nodes in the forest. */
611static int allocno_hard_regs_nodes_num;
1756cb66 612
27508f5f
VM
613/* Table preorder number of allocno hard registers node in the forest
614 -> the allocno hard registers node. */
615static allocno_hard_regs_node_t *allocno_hard_regs_nodes;
1756cb66
VM
616
617/* See below. */
27508f5f 618typedef struct allocno_hard_regs_subnode *allocno_hard_regs_subnode_t;
1756cb66
VM
619
620/* The structure is used to describes all subnodes (not only immediate
27508f5f 621 ones) in the mentioned above tree for given allocno hard register
1756cb66
VM
622 node. The usage of such data accelerates calculation of
623 colorability of given allocno. */
27508f5f 624struct allocno_hard_regs_subnode
1756cb66
VM
625{
626 /* The conflict size of conflicting allocnos whose hard register
627 sets are equal sets (plus supersets if given node is given
27508f5f 628 allocno hard registers node) of one in the given node. */
1756cb66
VM
629 int left_conflict_size;
630 /* The summary conflict size of conflicting allocnos whose hard
631 register sets are strict subsets of one in the given node.
632 Overall conflict size is
633 left_conflict_subnodes_size
634 + MIN (max_node_impact - left_conflict_subnodes_size,
635 left_conflict_size)
636 */
637 short left_conflict_subnodes_size;
638 short max_node_impact;
639};
640
27508f5f
VM
641/* Container for hard regs subnodes of all allocnos. */
642static allocno_hard_regs_subnode_t allocno_hard_regs_subnodes;
1756cb66 643
27508f5f
VM
644/* Table (preorder number of allocno hard registers node in the
645 forest, preorder number of allocno hard registers subnode) -> index
1756cb66
VM
646 of the subnode relative to the node. -1 if it is not a
647 subnode. */
27508f5f 648static int *allocno_hard_regs_subnode_index;
1756cb66 649
27508f5f
VM
650/* Setup arrays ALLOCNO_HARD_REGS_NODES and
651 ALLOCNO_HARD_REGS_SUBNODE_INDEX. */
1756cb66 652static void
27508f5f 653setup_allocno_hard_regs_subnode_index (allocno_hard_regs_node_t first)
1756cb66 654{
27508f5f 655 allocno_hard_regs_node_t node, parent;
1756cb66
VM
656 int index;
657
658 for (node = first; node != NULL; node = node->next)
659 {
27508f5f 660 allocno_hard_regs_nodes[node->preorder_num] = node;
1756cb66
VM
661 for (parent = node; parent != NULL; parent = parent->parent)
662 {
27508f5f
VM
663 index = parent->preorder_num * allocno_hard_regs_nodes_num;
664 allocno_hard_regs_subnode_index[index + node->preorder_num]
1756cb66
VM
665 = node->preorder_num - parent->preorder_num;
666 }
27508f5f 667 setup_allocno_hard_regs_subnode_index (node->first);
1756cb66
VM
668 }
669}
670
27508f5f 671/* Count all allocno hard registers nodes in tree ROOT. */
1756cb66 672static int
27508f5f 673get_allocno_hard_regs_subnodes_num (allocno_hard_regs_node_t root)
1756cb66
VM
674{
675 int len = 1;
676
677 for (root = root->first; root != NULL; root = root->next)
27508f5f 678 len += get_allocno_hard_regs_subnodes_num (root);
1756cb66
VM
679 return len;
680}
681
27508f5f 682/* Build the forest of allocno hard registers nodes and assign each
1756cb66
VM
683 allocno a node from the forest. */
684static void
27508f5f 685form_allocno_hard_regs_nodes_forest (void)
1756cb66
VM
686{
687 unsigned int i, j, size, len;
27508f5f 688 int start;
1756cb66 689 ira_allocno_t a;
27508f5f 690 allocno_hard_regs_t hv;
1756cb66
VM
691 bitmap_iterator bi;
692 HARD_REG_SET temp;
27508f5f
VM
693 allocno_hard_regs_node_t node, allocno_hard_regs_node;
694 allocno_color_data_t allocno_data;
1756cb66
VM
695
696 node_check_tick = 0;
27508f5f 697 init_allocno_hard_regs ();
1756cb66 698 hard_regs_roots = NULL;
9771b263 699 hard_regs_node_vec.create (100);
1756cb66
VM
700 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
701 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i))
702 {
703 CLEAR_HARD_REG_SET (temp);
704 SET_HARD_REG_BIT (temp, i);
27508f5f
VM
705 hv = add_allocno_hard_regs (temp, 0);
706 node = create_new_allocno_hard_regs_node (hv);
707 add_new_allocno_hard_regs_node_to_forest (&hard_regs_roots, node);
1756cb66 708 }
9771b263 709 start = allocno_hard_regs_vec.length ();
1756cb66
VM
710 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
711 {
712 a = ira_allocnos[i];
27508f5f
VM
713 allocno_data = ALLOCNO_COLOR_DATA (a);
714
715 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
716 continue;
717 hv = (add_allocno_hard_regs
718 (allocno_data->profitable_hard_regs,
719 ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a)));
1756cb66
VM
720 }
721 SET_HARD_REG_SET (temp);
722 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
27508f5f 723 add_allocno_hard_regs (temp, 0);
9771b263
DN
724 qsort (allocno_hard_regs_vec.address () + start,
725 allocno_hard_regs_vec.length () - start,
27508f5f 726 sizeof (allocno_hard_regs_t), allocno_hard_regs_compare);
1756cb66 727 for (i = start;
9771b263 728 allocno_hard_regs_vec.iterate (i, &hv);
1756cb66
VM
729 i++)
730 {
27508f5f 731 add_allocno_hard_regs_to_forest (&hard_regs_roots, hv);
9771b263 732 ira_assert (hard_regs_node_vec.length () == 0);
1756cb66
VM
733 }
734 /* We need to set up parent fields for right work of
735 first_common_ancestor_node. */
27508f5f 736 setup_allocno_hard_regs_nodes_parent (hard_regs_roots, NULL);
1756cb66
VM
737 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
738 {
739 a = ira_allocnos[i];
27508f5f
VM
740 allocno_data = ALLOCNO_COLOR_DATA (a);
741 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
742 continue;
9771b263 743 hard_regs_node_vec.truncate (0);
27508f5f
VM
744 collect_allocno_hard_regs_cover (hard_regs_roots,
745 allocno_data->profitable_hard_regs);
746 allocno_hard_regs_node = NULL;
9771b263 747 for (j = 0; hard_regs_node_vec.iterate (j, &node); j++)
27508f5f
VM
748 allocno_hard_regs_node
749 = (j == 0
750 ? node
751 : first_common_ancestor_node (node, allocno_hard_regs_node));
752 /* That is a temporary storage. */
753 allocno_hard_regs_node->used_p = true;
754 allocno_data->hard_regs_node = allocno_hard_regs_node;
1756cb66
VM
755 }
756 ira_assert (hard_regs_roots->next == NULL);
757 hard_regs_roots->used_p = true;
27508f5f
VM
758 remove_unused_allocno_hard_regs_nodes (&hard_regs_roots);
759 allocno_hard_regs_nodes_num
760 = enumerate_allocno_hard_regs_nodes (hard_regs_roots, NULL, 0);
761 allocno_hard_regs_nodes
762 = ((allocno_hard_regs_node_t *)
763 ira_allocate (allocno_hard_regs_nodes_num
764 * sizeof (allocno_hard_regs_node_t)));
765 size = allocno_hard_regs_nodes_num * allocno_hard_regs_nodes_num;
766 allocno_hard_regs_subnode_index
1756cb66
VM
767 = (int *) ira_allocate (size * sizeof (int));
768 for (i = 0; i < size; i++)
27508f5f
VM
769 allocno_hard_regs_subnode_index[i] = -1;
770 setup_allocno_hard_regs_subnode_index (hard_regs_roots);
1756cb66
VM
771 start = 0;
772 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
773 {
774 a = ira_allocnos[i];
27508f5f
VM
775 allocno_data = ALLOCNO_COLOR_DATA (a);
776 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
777 continue;
778 len = get_allocno_hard_regs_subnodes_num (allocno_data->hard_regs_node);
779 allocno_data->hard_regs_subnodes_start = start;
780 allocno_data->hard_regs_subnodes_num = len;
781 start += len;
1756cb66 782 }
27508f5f
VM
783 allocno_hard_regs_subnodes
784 = ((allocno_hard_regs_subnode_t)
785 ira_allocate (sizeof (struct allocno_hard_regs_subnode) * start));
9771b263 786 hard_regs_node_vec.release ();
1756cb66
VM
787}
788
27508f5f 789/* Free tree of allocno hard registers nodes given by its ROOT. */
1756cb66 790static void
27508f5f 791finish_allocno_hard_regs_nodes_tree (allocno_hard_regs_node_t root)
1756cb66 792{
27508f5f 793 allocno_hard_regs_node_t child, next;
1756cb66
VM
794
795 for (child = root->first; child != NULL; child = next)
796 {
797 next = child->next;
27508f5f 798 finish_allocno_hard_regs_nodes_tree (child);
1756cb66
VM
799 }
800 ira_free (root);
801}
802
27508f5f 803/* Finish work with the forest of allocno hard registers nodes. */
1756cb66 804static void
27508f5f 805finish_allocno_hard_regs_nodes_forest (void)
1756cb66 806{
27508f5f 807 allocno_hard_regs_node_t node, next;
1756cb66 808
27508f5f 809 ira_free (allocno_hard_regs_subnodes);
1756cb66
VM
810 for (node = hard_regs_roots; node != NULL; node = next)
811 {
812 next = node->next;
27508f5f 813 finish_allocno_hard_regs_nodes_tree (node);
1756cb66 814 }
27508f5f
VM
815 ira_free (allocno_hard_regs_nodes);
816 ira_free (allocno_hard_regs_subnode_index);
817 finish_allocno_hard_regs ();
1756cb66
VM
818}
819
820/* Set up left conflict sizes and left conflict subnodes sizes of hard
821 registers subnodes of allocno A. Return TRUE if allocno A is
822 trivially colorable. */
3553f0bb 823static bool
1756cb66 824setup_left_conflict_sizes_p (ira_allocno_t a)
3553f0bb 825{
27508f5f
VM
826 int i, k, nobj, start;
827 int conflict_size, left_conflict_subnodes_size, node_preorder_num;
1756cb66 828 allocno_color_data_t data;
27508f5f
VM
829 HARD_REG_SET profitable_hard_regs;
830 allocno_hard_regs_subnode_t subnodes;
831 allocno_hard_regs_node_t node;
832 HARD_REG_SET node_set;
ac0ab4f7 833
1756cb66
VM
834 nobj = ALLOCNO_NUM_OBJECTS (a);
835 conflict_size = 0;
836 data = ALLOCNO_COLOR_DATA (a);
27508f5f
VM
837 subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
838 COPY_HARD_REG_SET (profitable_hard_regs, data->profitable_hard_regs);
839 node = data->hard_regs_node;
840 node_preorder_num = node->preorder_num;
841 COPY_HARD_REG_SET (node_set, node->hard_regs->set);
842 node_check_tick++;
1756cb66
VM
843 for (k = 0; k < nobj; k++)
844 {
1756cb66
VM
845 ira_object_t obj = ALLOCNO_OBJECT (a, k);
846 ira_object_t conflict_obj;
847 ira_object_conflict_iterator oci;
1756cb66 848
1756cb66
VM
849 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
850 {
851 int size;
852 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
27508f5f 853 allocno_hard_regs_node_t conflict_node, temp_node;
1756cb66 854 HARD_REG_SET conflict_node_set;
27508f5f 855 allocno_color_data_t conflict_data;
1756cb66 856
27508f5f 857 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
1756cb66
VM
858 if (! ALLOCNO_COLOR_DATA (conflict_a)->in_graph_p
859 || ! hard_reg_set_intersect_p (profitable_hard_regs,
27508f5f 860 conflict_data
1756cb66
VM
861 ->profitable_hard_regs))
862 continue;
27508f5f 863 conflict_node = conflict_data->hard_regs_node;
1756cb66
VM
864 COPY_HARD_REG_SET (conflict_node_set, conflict_node->hard_regs->set);
865 if (hard_reg_set_subset_p (node_set, conflict_node_set))
866 temp_node = node;
867 else
868 {
869 ira_assert (hard_reg_set_subset_p (conflict_node_set, node_set));
870 temp_node = conflict_node;
871 }
872 if (temp_node->check != node_check_tick)
873 {
874 temp_node->check = node_check_tick;
875 temp_node->conflict_size = 0;
876 }
877 size = (ira_reg_class_max_nregs
878 [ALLOCNO_CLASS (conflict_a)][ALLOCNO_MODE (conflict_a)]);
879 if (ALLOCNO_NUM_OBJECTS (conflict_a) > 1)
880 /* We will deal with the subwords individually. */
881 size = 1;
882 temp_node->conflict_size += size;
883 }
27508f5f
VM
884 }
885 for (i = 0; i < data->hard_regs_subnodes_num; i++)
886 {
887 allocno_hard_regs_node_t temp_node;
888
889 temp_node = allocno_hard_regs_nodes[i + node_preorder_num];
890 ira_assert (temp_node->preorder_num == i + node_preorder_num);
891 subnodes[i].left_conflict_size = (temp_node->check != node_check_tick
892 ? 0 : temp_node->conflict_size);
893 if (hard_reg_set_subset_p (temp_node->hard_regs->set,
894 profitable_hard_regs))
895 subnodes[i].max_node_impact = temp_node->hard_regs_num;
896 else
1756cb66 897 {
27508f5f
VM
898 HARD_REG_SET temp_set;
899 int j, n, hard_regno;
900 enum reg_class aclass;
901
902 COPY_HARD_REG_SET (temp_set, temp_node->hard_regs->set);
903 AND_HARD_REG_SET (temp_set, profitable_hard_regs);
904 aclass = ALLOCNO_CLASS (a);
905 for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
1756cb66 906 {
27508f5f
VM
907 hard_regno = ira_class_hard_regs[aclass][j];
908 if (TEST_HARD_REG_BIT (temp_set, hard_regno))
909 n++;
1756cb66 910 }
27508f5f 911 subnodes[i].max_node_impact = n;
1756cb66 912 }
27508f5f
VM
913 subnodes[i].left_conflict_subnodes_size = 0;
914 }
915 start = node_preorder_num * allocno_hard_regs_nodes_num;
916 for (i = data->hard_regs_subnodes_num - 1; i >= 0; i--)
917 {
918 int size, parent_i;
919 allocno_hard_regs_node_t parent;
920
921 size = (subnodes[i].left_conflict_subnodes_size
922 + MIN (subnodes[i].max_node_impact
923 - subnodes[i].left_conflict_subnodes_size,
924 subnodes[i].left_conflict_size));
925 parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent;
926 if (parent == NULL)
927 continue;
928 parent_i
929 = allocno_hard_regs_subnode_index[start + parent->preorder_num];
930 if (parent_i < 0)
931 continue;
932 subnodes[parent_i].left_conflict_subnodes_size += size;
1756cb66 933 }
27508f5f
VM
934 left_conflict_subnodes_size = subnodes[0].left_conflict_subnodes_size;
935 conflict_size
936 += (left_conflict_subnodes_size
937 + MIN (subnodes[0].max_node_impact - left_conflict_subnodes_size,
938 subnodes[0].left_conflict_size));
1756cb66
VM
939 conflict_size += ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)];
940 data->colorable_p = conflict_size <= data->available_regs_num;
941 return data->colorable_p;
942}
ac0ab4f7 943
1756cb66 944/* Update left conflict sizes of hard registers subnodes of allocno A
27508f5f
VM
945 after removing allocno REMOVED_A with SIZE from the conflict graph.
946 Return TRUE if A is trivially colorable. */
1756cb66
VM
947static bool
948update_left_conflict_sizes_p (ira_allocno_t a,
27508f5f 949 ira_allocno_t removed_a, int size)
1756cb66 950{
27508f5f 951 int i, conflict_size, before_conflict_size, diff, start;
1756cb66 952 int node_preorder_num, parent_i;
27508f5f
VM
953 allocno_hard_regs_node_t node, removed_node, parent;
954 allocno_hard_regs_subnode_t subnodes;
1756cb66 955 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1756cb66
VM
956
957 ira_assert (! data->colorable_p);
27508f5f
VM
958 node = data->hard_regs_node;
959 node_preorder_num = node->preorder_num;
960 removed_node = ALLOCNO_COLOR_DATA (removed_a)->hard_regs_node;
961 ira_assert (hard_reg_set_subset_p (removed_node->hard_regs->set,
962 node->hard_regs->set)
963 || hard_reg_set_subset_p (node->hard_regs->set,
964 removed_node->hard_regs->set));
965 start = node_preorder_num * allocno_hard_regs_nodes_num;
966 i = allocno_hard_regs_subnode_index[start + removed_node->preorder_num];
967 if (i < 0)
968 i = 0;
969 subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
970 before_conflict_size
971 = (subnodes[i].left_conflict_subnodes_size
972 + MIN (subnodes[i].max_node_impact
973 - subnodes[i].left_conflict_subnodes_size,
974 subnodes[i].left_conflict_size));
975 subnodes[i].left_conflict_size -= size;
976 for (;;)
ac0ab4f7 977 {
27508f5f
VM
978 conflict_size
979 = (subnodes[i].left_conflict_subnodes_size
980 + MIN (subnodes[i].max_node_impact
981 - subnodes[i].left_conflict_subnodes_size,
982 subnodes[i].left_conflict_size));
983 if ((diff = before_conflict_size - conflict_size) == 0)
984 break;
985 ira_assert (conflict_size < before_conflict_size);
986 parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent;
987 if (parent == NULL)
988 break;
989 parent_i
990 = allocno_hard_regs_subnode_index[start + parent->preorder_num];
991 if (parent_i < 0)
992 break;
993 i = parent_i;
1756cb66
VM
994 before_conflict_size
995 = (subnodes[i].left_conflict_subnodes_size
996 + MIN (subnodes[i].max_node_impact
997 - subnodes[i].left_conflict_subnodes_size,
998 subnodes[i].left_conflict_size));
27508f5f 999 subnodes[i].left_conflict_subnodes_size -= diff;
ac0ab4f7 1000 }
27508f5f
VM
1001 if (i != 0
1002 || (conflict_size
1003 + ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
1004 > data->available_regs_num))
1005 return false;
1006 data->colorable_p = true;
1007 return true;
3553f0bb
VM
1008}
1009
27508f5f 1010/* Return true if allocno A has empty profitable hard regs. */
3553f0bb 1011static bool
1756cb66 1012empty_profitable_hard_regs (ira_allocno_t a)
3553f0bb 1013{
27508f5f 1014 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1756cb66 1015
27508f5f 1016 return hard_reg_set_empty_p (data->profitable_hard_regs);
3553f0bb
VM
1017}
1018
1756cb66
VM
1019/* Set up profitable hard registers for each allocno being
1020 colored. */
1021static void
1022setup_profitable_hard_regs (void)
1023{
1024 unsigned int i;
1025 int j, k, nobj, hard_regno, nregs, class_size;
1026 ira_allocno_t a;
1027 bitmap_iterator bi;
1028 enum reg_class aclass;
1029 enum machine_mode mode;
27508f5f 1030 allocno_color_data_t data;
1756cb66 1031
8d189b3f
VM
1032 /* Initial set up from allocno classes and explicitly conflicting
1033 hard regs. */
1756cb66
VM
1034 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1035 {
1036 a = ira_allocnos[i];
1037 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS)
1038 continue;
27508f5f
VM
1039 data = ALLOCNO_COLOR_DATA (a);
1040 if (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL
1041 && ALLOCNO_CLASS_COST (a) > ALLOCNO_MEMORY_COST (a))
1042 CLEAR_HARD_REG_SET (data->profitable_hard_regs);
1043 else
1756cb66 1044 {
a2c19e93 1045 mode = ALLOCNO_MODE (a);
27508f5f 1046 COPY_HARD_REG_SET (data->profitable_hard_regs,
a2c19e93 1047 ira_useful_class_mode_regs[aclass][mode]);
27508f5f
VM
1048 nobj = ALLOCNO_NUM_OBJECTS (a);
1049 for (k = 0; k < nobj; k++)
1756cb66 1050 {
27508f5f
VM
1051 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1052
1053 AND_COMPL_HARD_REG_SET (data->profitable_hard_regs,
1756cb66
VM
1054 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
1055 }
1056 }
1057 }
8d189b3f 1058 /* Exclude hard regs already assigned for conflicting objects. */
1756cb66
VM
1059 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, i, bi)
1060 {
1061 a = ira_allocnos[i];
1062 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1063 || ! ALLOCNO_ASSIGNED_P (a)
1064 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0)
1065 continue;
1066 mode = ALLOCNO_MODE (a);
1067 nregs = hard_regno_nregs[hard_regno][mode];
1068 nobj = ALLOCNO_NUM_OBJECTS (a);
1069 for (k = 0; k < nobj; k++)
1070 {
1071 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1072 ira_object_t conflict_obj;
1073 ira_object_conflict_iterator oci;
1074
1075 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1076 {
27508f5f
VM
1077 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1078
1079 /* We can process the conflict allocno repeatedly with
1080 the same result. */
1756cb66
VM
1081 if (nregs == nobj && nregs > 1)
1082 {
1083 int num = OBJECT_SUBWORD (conflict_obj);
1084
2805e6c0 1085 if (REG_WORDS_BIG_ENDIAN)
1756cb66 1086 CLEAR_HARD_REG_BIT
27508f5f 1087 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1088 hard_regno + nobj - num - 1);
1089 else
1090 CLEAR_HARD_REG_BIT
27508f5f 1091 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1092 hard_regno + num);
1093 }
1094 else
1095 AND_COMPL_HARD_REG_SET
27508f5f 1096 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1097 ira_reg_mode_hard_regset[hard_regno][mode]);
1098 }
1099 }
1100 }
8d189b3f 1101 /* Exclude too costly hard regs. */
1756cb66
VM
1102 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1103 {
1104 int min_cost = INT_MAX;
1105 int *costs;
1106
1107 a = ira_allocnos[i];
1108 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1109 || empty_profitable_hard_regs (a))
1110 continue;
27508f5f 1111 data = ALLOCNO_COLOR_DATA (a);
1756cb66 1112 mode = ALLOCNO_MODE (a);
27508f5f
VM
1113 if ((costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a)) != NULL
1114 || (costs = ALLOCNO_HARD_REG_COSTS (a)) != NULL)
1756cb66 1115 {
27508f5f
VM
1116 class_size = ira_class_hard_regs_num[aclass];
1117 for (j = 0; j < class_size; j++)
1756cb66 1118 {
27508f5f
VM
1119 hard_regno = ira_class_hard_regs[aclass][j];
1120 if (! TEST_HARD_REG_BIT (data->profitable_hard_regs,
1121 hard_regno))
1122 continue;
1123 if (ALLOCNO_UPDATED_MEMORY_COST (a) < costs[j])
1124 CLEAR_HARD_REG_BIT (data->profitable_hard_regs,
1125 hard_regno);
1126 else if (min_cost > costs[j])
1127 min_cost = costs[j];
1756cb66 1128 }
1756cb66 1129 }
27508f5f
VM
1130 else if (ALLOCNO_UPDATED_MEMORY_COST (a)
1131 < ALLOCNO_UPDATED_CLASS_COST (a))
1132 CLEAR_HARD_REG_SET (data->profitable_hard_regs);
1756cb66
VM
1133 if (ALLOCNO_UPDATED_CLASS_COST (a) > min_cost)
1134 ALLOCNO_UPDATED_CLASS_COST (a) = min_cost;
1135 }
1136}
3553f0bb
VM
1137
1138\f
1139
058e97ec
VM
1140/* This page contains functions used to choose hard registers for
1141 allocnos. */
1142
3b6d1699
VM
1143/* Pool for update cost records. */
1144static alloc_pool update_cost_record_pool;
1145
1146/* Initiate update cost records. */
1147static void
1148init_update_cost_records (void)
1149{
1150 update_cost_record_pool
1151 = create_alloc_pool ("update cost records",
1152 sizeof (struct update_cost_record), 100);
1153}
1154
1155/* Return new update cost record with given params. */
1156static struct update_cost_record *
1157get_update_cost_record (int hard_regno, int divisor,
1158 struct update_cost_record *next)
1159{
1160 struct update_cost_record *record;
1161
1162 record = (struct update_cost_record *) pool_alloc (update_cost_record_pool);
1163 record->hard_regno = hard_regno;
1164 record->divisor = divisor;
1165 record->next = next;
1166 return record;
1167}
1168
1169/* Free memory for all records in LIST. */
1170static void
1171free_update_cost_record_list (struct update_cost_record *list)
1172{
1173 struct update_cost_record *next;
1174
1175 while (list != NULL)
1176 {
1177 next = list->next;
1178 pool_free (update_cost_record_pool, list);
1179 list = next;
1180 }
1181}
1182
1183/* Free memory allocated for all update cost records. */
1184static void
1185finish_update_cost_records (void)
1186{
1187 free_alloc_pool (update_cost_record_pool);
1188}
1189
058e97ec
VM
1190/* Array whose element value is TRUE if the corresponding hard
1191 register was already allocated for an allocno. */
1192static bool allocated_hardreg_p[FIRST_PSEUDO_REGISTER];
1193
f754734f 1194/* Describes one element in a queue of allocnos whose costs need to be
1756cb66
VM
1195 updated. Each allocno in the queue is known to have an allocno
1196 class. */
f35bf7a9
RS
1197struct update_cost_queue_elem
1198{
f754734f
RS
1199 /* This element is in the queue iff CHECK == update_cost_check. */
1200 int check;
1201
1202 /* COST_HOP_DIVISOR**N, where N is the length of the shortest path
1203 connecting this allocno to the one being allocated. */
1204 int divisor;
1205
3b6d1699
VM
1206 /* Allocno from which we are chaning costs of connected allocnos.
1207 It is used not go back in graph of allocnos connected by
1208 copies. */
1209 ira_allocno_t from;
1210
f754734f
RS
1211 /* The next allocno in the queue, or null if this is the last element. */
1212 ira_allocno_t next;
1213};
1214
1215/* The first element in a queue of allocnos whose copy costs need to be
1216 updated. Null if the queue is empty. */
1217static ira_allocno_t update_cost_queue;
1218
1219/* The last element in the queue described by update_cost_queue.
1220 Not valid if update_cost_queue is null. */
1221static struct update_cost_queue_elem *update_cost_queue_tail;
1222
1223/* A pool of elements in the queue described by update_cost_queue.
1224 Elements are indexed by ALLOCNO_NUM. */
1225static struct update_cost_queue_elem *update_cost_queue_elems;
058e97ec 1226
3b6d1699 1227/* The current value of update_costs_from_copies call count. */
058e97ec
VM
1228static int update_cost_check;
1229
1230/* Allocate and initialize data necessary for function
c73ccc80 1231 update_costs_from_copies. */
058e97ec
VM
1232static void
1233initiate_cost_update (void)
1234{
f754734f
RS
1235 size_t size;
1236
1237 size = ira_allocnos_num * sizeof (struct update_cost_queue_elem);
1238 update_cost_queue_elems
1239 = (struct update_cost_queue_elem *) ira_allocate (size);
1240 memset (update_cost_queue_elems, 0, size);
058e97ec 1241 update_cost_check = 0;
3b6d1699 1242 init_update_cost_records ();
058e97ec
VM
1243}
1244
3b6d1699 1245/* Deallocate data used by function update_costs_from_copies. */
058e97ec
VM
1246static void
1247finish_cost_update (void)
1248{
0eeb2240 1249 ira_free (update_cost_queue_elems);
3b6d1699 1250 finish_update_cost_records ();
058e97ec
VM
1251}
1252
a7f32992
VM
1253/* When we traverse allocnos to update hard register costs, the cost
1254 divisor will be multiplied by the following macro value for each
1255 hop from given allocno to directly connected allocnos. */
1256#define COST_HOP_DIVISOR 4
1257
f754734f 1258/* Start a new cost-updating pass. */
058e97ec 1259static void
f754734f 1260start_update_cost (void)
058e97ec 1261{
f754734f
RS
1262 update_cost_check++;
1263 update_cost_queue = NULL;
1264}
058e97ec 1265
3b6d1699 1266/* Add (ALLOCNO, FROM, DIVISOR) to the end of update_cost_queue, unless
1756cb66 1267 ALLOCNO is already in the queue, or has NO_REGS class. */
f754734f 1268static inline void
3b6d1699 1269queue_update_cost (ira_allocno_t allocno, ira_allocno_t from, int divisor)
f754734f
RS
1270{
1271 struct update_cost_queue_elem *elem;
1272
1273 elem = &update_cost_queue_elems[ALLOCNO_NUM (allocno)];
1274 if (elem->check != update_cost_check
1756cb66 1275 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 1276 {
f754734f 1277 elem->check = update_cost_check;
3b6d1699 1278 elem->from = from;
f754734f
RS
1279 elem->divisor = divisor;
1280 elem->next = NULL;
1281 if (update_cost_queue == NULL)
1282 update_cost_queue = allocno;
058e97ec 1283 else
f754734f
RS
1284 update_cost_queue_tail->next = allocno;
1285 update_cost_queue_tail = elem;
058e97ec
VM
1286 }
1287}
1288
3b6d1699
VM
1289/* Try to remove the first element from update_cost_queue. Return
1290 false if the queue was empty, otherwise make (*ALLOCNO, *FROM,
1291 *DIVISOR) describe the removed element. */
f754734f 1292static inline bool
3b6d1699 1293get_next_update_cost (ira_allocno_t *allocno, ira_allocno_t *from, int *divisor)
058e97ec 1294{
f754734f
RS
1295 struct update_cost_queue_elem *elem;
1296
1297 if (update_cost_queue == NULL)
1298 return false;
1299
1300 *allocno = update_cost_queue;
1301 elem = &update_cost_queue_elems[ALLOCNO_NUM (*allocno)];
3b6d1699 1302 *from = elem->from;
f754734f
RS
1303 *divisor = elem->divisor;
1304 update_cost_queue = elem->next;
1305 return true;
058e97ec
VM
1306}
1307
3b6d1699
VM
1308/* Increase costs of HARD_REGNO by UPDATE_COST for ALLOCNO. Return
1309 true if we really modified the cost. */
1310static bool
1311update_allocno_cost (ira_allocno_t allocno, int hard_regno, int update_cost)
1312{
1313 int i;
1314 enum reg_class aclass = ALLOCNO_CLASS (allocno);
1315
1316 i = ira_class_hard_reg_index[aclass][hard_regno];
1317 if (i < 0)
1318 return false;
1319 ira_allocate_and_set_or_copy_costs
1320 (&ALLOCNO_UPDATED_HARD_REG_COSTS (allocno), aclass,
1321 ALLOCNO_UPDATED_CLASS_COST (allocno),
1322 ALLOCNO_HARD_REG_COSTS (allocno));
1323 ira_allocate_and_set_or_copy_costs
1324 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno),
1325 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (allocno));
1326 ALLOCNO_UPDATED_HARD_REG_COSTS (allocno)[i] += update_cost;
1327 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno)[i] += update_cost;
1328 return true;
1329}
1330
1331/* Update (decrease if DECR_P) HARD_REGNO cost of allocnos connected
1332 by copies to ALLOCNO to increase chances to remove some copies as
1333 the result of subsequent assignment. Record cost updates if
1334 RECORD_P is true. */
a7f32992 1335static void
3b6d1699
VM
1336update_costs_from_allocno (ira_allocno_t allocno, int hard_regno,
1337 int divisor, bool decr_p, bool record_p)
a7f32992 1338{
3b6d1699 1339 int cost, update_cost;
a7f32992 1340 enum machine_mode mode;
1756cb66 1341 enum reg_class rclass, aclass;
3b6d1699 1342 ira_allocno_t another_allocno, from = NULL;
a7f32992
VM
1343 ira_copy_t cp, next_cp;
1344
f754734f 1345 rclass = REGNO_REG_CLASS (hard_regno);
f754734f 1346 do
a7f32992 1347 {
f754734f 1348 mode = ALLOCNO_MODE (allocno);
1756cb66 1349 ira_init_register_move_cost_if_necessary (mode);
f754734f 1350 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
a7f32992 1351 {
f754734f 1352 if (cp->first == allocno)
a7f32992 1353 {
f754734f
RS
1354 next_cp = cp->next_first_allocno_copy;
1355 another_allocno = cp->second;
1356 }
1357 else if (cp->second == allocno)
1358 {
1359 next_cp = cp->next_second_allocno_copy;
1360 another_allocno = cp->first;
a7f32992 1361 }
f754734f
RS
1362 else
1363 gcc_unreachable ();
1364
3b6d1699
VM
1365 if (another_allocno == from)
1366 continue;
1367
1756cb66
VM
1368 aclass = ALLOCNO_CLASS (another_allocno);
1369 if (! TEST_HARD_REG_BIT (reg_class_contents[aclass],
6042d1dd 1370 hard_regno)
f754734f
RS
1371 || ALLOCNO_ASSIGNED_P (another_allocno))
1372 continue;
1373
1374 cost = (cp->second == allocno
1756cb66
VM
1375 ? ira_register_move_cost[mode][rclass][aclass]
1376 : ira_register_move_cost[mode][aclass][rclass]);
f754734f
RS
1377 if (decr_p)
1378 cost = -cost;
1379
1380 update_cost = cp->freq * cost / divisor;
1381 if (update_cost == 0)
1382 continue;
1383
3b6d1699 1384 if (! update_allocno_cost (another_allocno, hard_regno, update_cost))
1756cb66 1385 continue;
3b6d1699
VM
1386 queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR);
1387 if (record_p && ALLOCNO_COLOR_DATA (another_allocno) != NULL)
1388 ALLOCNO_COLOR_DATA (another_allocno)->update_cost_records
1389 = get_update_cost_record (hard_regno, divisor,
1390 ALLOCNO_COLOR_DATA (another_allocno)
1391 ->update_cost_records);
a7f32992 1392 }
a7f32992 1393 }
3b6d1699
VM
1394 while (get_next_update_cost (&allocno, &from, &divisor));
1395}
1396
1397/* Decrease preferred ALLOCNO hard register costs and costs of
1398 allocnos connected to ALLOCNO through copy. */
1399static void
1400update_costs_from_prefs (ira_allocno_t allocno)
1401{
1402 ira_pref_t pref;
1403
1404 start_update_cost ();
1405 for (pref = ALLOCNO_PREFS (allocno); pref != NULL; pref = pref->next_pref)
1406 update_costs_from_allocno (allocno, pref->hard_regno,
1407 COST_HOP_DIVISOR, true, true);
1408}
1409
1410/* Update (decrease if DECR_P) the cost of allocnos connected to
1411 ALLOCNO through copies to increase chances to remove some copies as
1412 the result of subsequent assignment. ALLOCNO was just assigned to
c73ccc80 1413 a hard register. Record cost updates if RECORD_P is true. */
3b6d1699 1414static void
c73ccc80 1415update_costs_from_copies (ira_allocno_t allocno, bool decr_p, bool record_p)
3b6d1699
VM
1416{
1417 int hard_regno;
1418
1419 hard_regno = ALLOCNO_HARD_REGNO (allocno);
1420 ira_assert (hard_regno >= 0 && ALLOCNO_CLASS (allocno) != NO_REGS);
1421 start_update_cost ();
c73ccc80 1422 update_costs_from_allocno (allocno, hard_regno, 1, decr_p, record_p);
3b6d1699
VM
1423}
1424
1425/* Restore costs of allocnos connected to ALLOCNO by copies as it was
1426 before updating costs of these allocnos from given allocno. This
1427 is a wise thing to do as if given allocno did not get an expected
1428 hard reg, using smaller cost of the hard reg for allocnos connected
1429 by copies to given allocno becomes actually misleading. Free all
1430 update cost records for ALLOCNO as we don't need them anymore. */
1431static void
1432restore_costs_from_copies (ira_allocno_t allocno)
1433{
1434 struct update_cost_record *records, *curr;
1435
1436 if (ALLOCNO_COLOR_DATA (allocno) == NULL)
1437 return;
1438 records = ALLOCNO_COLOR_DATA (allocno)->update_cost_records;
1439 start_update_cost ();
1440 for (curr = records; curr != NULL; curr = curr->next)
1441 update_costs_from_allocno (allocno, curr->hard_regno,
1442 curr->divisor, true, false);
1443 free_update_cost_record_list (records);
1444 ALLOCNO_COLOR_DATA (allocno)->update_cost_records = NULL;
f754734f
RS
1445}
1446
7db7ed3c 1447/* This function updates COSTS (decrease if DECR_P) for hard_registers
1756cb66 1448 of ACLASS by conflict costs of the unassigned allocnos
7db7ed3c
VM
1449 connected by copies with allocnos in update_cost_queue. This
1450 update increases chances to remove some copies. */
f754734f 1451static void
1756cb66 1452update_conflict_hard_regno_costs (int *costs, enum reg_class aclass,
7db7ed3c 1453 bool decr_p)
f754734f
RS
1454{
1455 int i, cost, class_size, freq, mult, div, divisor;
7db7ed3c 1456 int index, hard_regno;
f754734f
RS
1457 int *conflict_costs;
1458 bool cont_p;
1756cb66 1459 enum reg_class another_aclass;
3b6d1699 1460 ira_allocno_t allocno, another_allocno, from;
f754734f
RS
1461 ira_copy_t cp, next_cp;
1462
3b6d1699 1463 while (get_next_update_cost (&allocno, &from, &divisor))
f754734f
RS
1464 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
1465 {
1466 if (cp->first == allocno)
1467 {
1468 next_cp = cp->next_first_allocno_copy;
1469 another_allocno = cp->second;
1470 }
1471 else if (cp->second == allocno)
1472 {
1473 next_cp = cp->next_second_allocno_copy;
1474 another_allocno = cp->first;
1475 }
1476 else
1477 gcc_unreachable ();
3b6d1699
VM
1478
1479 if (another_allocno == from)
1480 continue;
1481
1756cb66
VM
1482 another_aclass = ALLOCNO_CLASS (another_allocno);
1483 if (! ira_reg_classes_intersect_p[aclass][another_aclass]
f754734f 1484 || ALLOCNO_ASSIGNED_P (another_allocno)
1756cb66 1485 || ALLOCNO_COLOR_DATA (another_allocno)->may_be_spilled_p)
f754734f 1486 continue;
1756cb66 1487 class_size = ira_class_hard_regs_num[another_aclass];
f754734f
RS
1488 ira_allocate_and_copy_costs
1489 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno),
1756cb66 1490 another_aclass, ALLOCNO_CONFLICT_HARD_REG_COSTS (another_allocno));
f754734f
RS
1491 conflict_costs
1492 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno);
1493 if (conflict_costs == NULL)
1494 cont_p = true;
1495 else
1496 {
1497 mult = cp->freq;
1498 freq = ALLOCNO_FREQ (another_allocno);
1499 if (freq == 0)
1500 freq = 1;
1501 div = freq * divisor;
1502 cont_p = false;
1503 for (i = class_size - 1; i >= 0; i--)
1504 {
1756cb66 1505 hard_regno = ira_class_hard_regs[another_aclass][i];
7db7ed3c 1506 ira_assert (hard_regno >= 0);
1756cb66 1507 index = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
1508 if (index < 0)
1509 continue;
6686e0bc 1510 cost = (int) ((unsigned) conflict_costs [i] * mult) / div;
f754734f
RS
1511 if (cost == 0)
1512 continue;
1513 cont_p = true;
1514 if (decr_p)
1515 cost = -cost;
7db7ed3c 1516 costs[index] += cost;
f754734f
RS
1517 }
1518 }
1519 /* Probably 5 hops will be enough. */
1520 if (cont_p
1521 && divisor <= (COST_HOP_DIVISOR
1522 * COST_HOP_DIVISOR
1523 * COST_HOP_DIVISOR
1524 * COST_HOP_DIVISOR))
3b6d1699 1525 queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR);
f754734f 1526 }
a7f32992
VM
1527}
1528
27508f5f
VM
1529/* Set up conflicting (through CONFLICT_REGS) for each object of
1530 allocno A and the start allocno profitable regs (through
1531 START_PROFITABLE_REGS). Remember that the start profitable regs
1532 exclude hard regs which can not hold value of mode of allocno A.
1533 This covers mostly cases when multi-register value should be
1534 aligned. */
1756cb66 1535static inline void
27508f5f
VM
1536get_conflict_and_start_profitable_regs (ira_allocno_t a, bool retry_p,
1537 HARD_REG_SET *conflict_regs,
1538 HARD_REG_SET *start_profitable_regs)
1756cb66
VM
1539{
1540 int i, nwords;
1541 ira_object_t obj;
1542
1543 nwords = ALLOCNO_NUM_OBJECTS (a);
1544 for (i = 0; i < nwords; i++)
1545 {
1546 obj = ALLOCNO_OBJECT (a, i);
1547 COPY_HARD_REG_SET (conflict_regs[i],
1548 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
1756cb66 1549 }
27508f5f
VM
1550 if (retry_p)
1551 {
1552 COPY_HARD_REG_SET (*start_profitable_regs,
1553 reg_class_contents[ALLOCNO_CLASS (a)]);
1554 AND_COMPL_HARD_REG_SET (*start_profitable_regs,
1555 ira_prohibited_class_mode_regs
1556 [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
1557 }
1558 else
1559 COPY_HARD_REG_SET (*start_profitable_regs,
1560 ALLOCNO_COLOR_DATA (a)->profitable_hard_regs);
1756cb66
VM
1561}
1562
27508f5f
VM
1563/* Return true if HARD_REGNO is ok for assigning to allocno A with
1564 PROFITABLE_REGS and whose objects have CONFLICT_REGS. */
1756cb66
VM
1565static inline bool
1566check_hard_reg_p (ira_allocno_t a, int hard_regno,
27508f5f 1567 HARD_REG_SET *conflict_regs, HARD_REG_SET profitable_regs)
1756cb66
VM
1568{
1569 int j, nwords, nregs;
8d189b3f
VM
1570 enum reg_class aclass;
1571 enum machine_mode mode;
1756cb66 1572
8d189b3f
VM
1573 aclass = ALLOCNO_CLASS (a);
1574 mode = ALLOCNO_MODE (a);
1575 if (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode],
1576 hard_regno))
1577 return false;
27508f5f
VM
1578 /* Checking only profitable hard regs. */
1579 if (! TEST_HARD_REG_BIT (profitable_regs, hard_regno))
1580 return false;
8d189b3f 1581 nregs = hard_regno_nregs[hard_regno][mode];
1756cb66
VM
1582 nwords = ALLOCNO_NUM_OBJECTS (a);
1583 for (j = 0; j < nregs; j++)
1584 {
1585 int k;
1586 int set_to_test_start = 0, set_to_test_end = nwords;
1587
1588 if (nregs == nwords)
1589 {
2805e6c0 1590 if (REG_WORDS_BIG_ENDIAN)
1756cb66
VM
1591 set_to_test_start = nwords - j - 1;
1592 else
1593 set_to_test_start = j;
1594 set_to_test_end = set_to_test_start + 1;
1595 }
1596 for (k = set_to_test_start; k < set_to_test_end; k++)
27508f5f 1597 if (TEST_HARD_REG_BIT (conflict_regs[k], hard_regno + j))
1756cb66
VM
1598 break;
1599 if (k != set_to_test_end)
1600 break;
1601 }
1602 return j == nregs;
1603}
9181a6e5
VM
1604
1605/* Return number of registers needed to be saved and restored at
1606 function prologue/epilogue if we allocate HARD_REGNO to hold value
1607 of MODE. */
1608static int
1609calculate_saved_nregs (int hard_regno, enum machine_mode mode)
1610{
1611 int i;
1612 int nregs = 0;
1613
1614 ira_assert (hard_regno >= 0);
1615 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1616 if (!allocated_hardreg_p[hard_regno + i]
1617 && !TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + i)
1618 && !LOCAL_REGNO (hard_regno + i))
1619 nregs++;
1620 return nregs;
1621}
1756cb66 1622
22b0982c
VM
1623/* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
1624 that the function called from function
1756cb66
VM
1625 `ira_reassign_conflict_allocnos' and `allocno_reload_assign'. In
1626 this case some allocno data are not defined or updated and we
1627 should not touch these data. The function returns true if we
1628 managed to assign a hard register to the allocno.
1629
1630 To assign a hard register, first of all we calculate all conflict
1631 hard registers which can come from conflicting allocnos with
1632 already assigned hard registers. After that we find first free
1633 hard register with the minimal cost. During hard register cost
1634 calculation we take conflict hard register costs into account to
1635 give a chance for conflicting allocnos to get a better hard
1636 register in the future.
1637
1638 If the best hard register cost is bigger than cost of memory usage
1639 for the allocno, we don't assign a hard register to given allocno
1640 at all.
1641
1642 If we assign a hard register to the allocno, we update costs of the
1643 hard register for allocnos connected by copies to improve a chance
1644 to coalesce insns represented by the copies when we assign hard
1645 registers to the allocnos connected by the copies. */
058e97ec 1646static bool
22b0982c 1647assign_hard_reg (ira_allocno_t a, bool retry_p)
058e97ec 1648{
27508f5f 1649 HARD_REG_SET conflicting_regs[2], profitable_hard_regs;
fbddb81d 1650 int i, j, hard_regno, best_hard_regno, class_size;
22b0982c 1651 int cost, mem_cost, min_cost, full_cost, min_full_cost, nwords, word;
058e97ec 1652 int *a_costs;
1756cb66 1653 enum reg_class aclass;
058e97ec 1654 enum machine_mode mode;
058e97ec 1655 static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
fbddb81d 1656 int saved_nregs;
a5c011cd
MP
1657 enum reg_class rclass;
1658 int add_cost;
058e97ec
VM
1659#ifdef STACK_REGS
1660 bool no_stack_reg_p;
1661#endif
1662
22b0982c 1663 ira_assert (! ALLOCNO_ASSIGNED_P (a));
27508f5f
VM
1664 get_conflict_and_start_profitable_regs (a, retry_p,
1665 conflicting_regs,
1666 &profitable_hard_regs);
1756cb66
VM
1667 aclass = ALLOCNO_CLASS (a);
1668 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
1669 best_hard_regno = -1;
1670 memset (full_costs, 0, sizeof (int) * class_size);
1671 mem_cost = 0;
058e97ec
VM
1672 memset (costs, 0, sizeof (int) * class_size);
1673 memset (full_costs, 0, sizeof (int) * class_size);
1674#ifdef STACK_REGS
1675 no_stack_reg_p = false;
1676#endif
1756cb66
VM
1677 if (! retry_p)
1678 start_update_cost ();
22b0982c
VM
1679 mem_cost += ALLOCNO_UPDATED_MEMORY_COST (a);
1680
1681 ira_allocate_and_copy_costs (&ALLOCNO_UPDATED_HARD_REG_COSTS (a),
1756cb66 1682 aclass, ALLOCNO_HARD_REG_COSTS (a));
22b0982c 1683 a_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
058e97ec 1684#ifdef STACK_REGS
22b0982c 1685 no_stack_reg_p = no_stack_reg_p || ALLOCNO_TOTAL_NO_STACK_REG_P (a);
058e97ec 1686#endif
1756cb66 1687 cost = ALLOCNO_UPDATED_CLASS_COST (a);
22b0982c
VM
1688 for (i = 0; i < class_size; i++)
1689 if (a_costs != NULL)
1690 {
1691 costs[i] += a_costs[i];
1692 full_costs[i] += a_costs[i];
1693 }
1694 else
1695 {
1696 costs[i] += cost;
1697 full_costs[i] += cost;
1698 }
1756cb66 1699 nwords = ALLOCNO_NUM_OBJECTS (a);
27508f5f 1700 curr_allocno_process++;
22b0982c
VM
1701 for (word = 0; word < nwords; word++)
1702 {
1703 ira_object_t conflict_obj;
1704 ira_object_t obj = ALLOCNO_OBJECT (a, word);
1705 ira_object_conflict_iterator oci;
1706
22b0982c
VM
1707 /* Take preferences of conflicting allocnos into account. */
1708 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1756cb66 1709 {
22b0982c 1710 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66 1711 enum reg_class conflict_aclass;
4ef20c29 1712 allocno_color_data_t data = ALLOCNO_COLOR_DATA (conflict_a);
1756cb66 1713
22b0982c
VM
1714 /* Reload can give another class so we need to check all
1715 allocnos. */
1756cb66
VM
1716 if (!retry_p
1717 && (!bitmap_bit_p (consideration_allocno_bitmap,
1718 ALLOCNO_NUM (conflict_a))
1719 || ((!ALLOCNO_ASSIGNED_P (conflict_a)
1720 || ALLOCNO_HARD_REGNO (conflict_a) < 0)
1721 && !(hard_reg_set_intersect_p
27508f5f
VM
1722 (profitable_hard_regs,
1723 ALLOCNO_COLOR_DATA
1724 (conflict_a)->profitable_hard_regs)))))
22b0982c 1725 continue;
1756cb66 1726 conflict_aclass = ALLOCNO_CLASS (conflict_a);
22b0982c 1727 ira_assert (ira_reg_classes_intersect_p
1756cb66 1728 [aclass][conflict_aclass]);
22b0982c 1729 if (ALLOCNO_ASSIGNED_P (conflict_a))
fa86d337 1730 {
22b0982c
VM
1731 hard_regno = ALLOCNO_HARD_REGNO (conflict_a);
1732 if (hard_regno >= 0
b8faca75
VM
1733 && (ira_hard_reg_set_intersection_p
1734 (hard_regno, ALLOCNO_MODE (conflict_a),
1735 reg_class_contents[aclass])))
fa86d337 1736 {
22b0982c 1737 int n_objects = ALLOCNO_NUM_OBJECTS (conflict_a);
4648deb4 1738 int conflict_nregs;
1756cb66 1739
4648deb4
VM
1740 mode = ALLOCNO_MODE (conflict_a);
1741 conflict_nregs = hard_regno_nregs[hard_regno][mode];
22b0982c 1742 if (conflict_nregs == n_objects && conflict_nregs > 1)
fa86d337 1743 {
22b0982c 1744 int num = OBJECT_SUBWORD (conflict_obj);
ac0ab4f7 1745
2805e6c0 1746 if (REG_WORDS_BIG_ENDIAN)
22b0982c
VM
1747 SET_HARD_REG_BIT (conflicting_regs[word],
1748 hard_regno + n_objects - num - 1);
1749 else
1750 SET_HARD_REG_BIT (conflicting_regs[word],
1751 hard_regno + num);
ac0ab4f7 1752 }
22b0982c
VM
1753 else
1754 IOR_HARD_REG_SET
1755 (conflicting_regs[word],
1756 ira_reg_mode_hard_regset[hard_regno][mode]);
27508f5f 1757 if (hard_reg_set_subset_p (profitable_hard_regs,
22b0982c
VM
1758 conflicting_regs[word]))
1759 goto fail;
fa86d337
BS
1760 }
1761 }
1756cb66 1762 else if (! retry_p
27508f5f
VM
1763 && ! ALLOCNO_COLOR_DATA (conflict_a)->may_be_spilled_p
1764 /* Don't process the conflict allocno twice. */
1765 && (ALLOCNO_COLOR_DATA (conflict_a)->last_process
1766 != curr_allocno_process))
22b0982c
VM
1767 {
1768 int k, *conflict_costs;
1769
27508f5f
VM
1770 ALLOCNO_COLOR_DATA (conflict_a)->last_process
1771 = curr_allocno_process;
22b0982c
VM
1772 ira_allocate_and_copy_costs
1773 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a),
1756cb66 1774 conflict_aclass,
22b0982c
VM
1775 ALLOCNO_CONFLICT_HARD_REG_COSTS (conflict_a));
1776 conflict_costs
1777 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a);
1778 if (conflict_costs != NULL)
1779 for (j = class_size - 1; j >= 0; j--)
1780 {
1756cb66 1781 hard_regno = ira_class_hard_regs[aclass][j];
22b0982c 1782 ira_assert (hard_regno >= 0);
1756cb66 1783 k = ira_class_hard_reg_index[conflict_aclass][hard_regno];
4ef20c29
ZC
1784 if (k < 0
1785 /* If HARD_REGNO is not available for CONFLICT_A,
1786 the conflict would be ignored, since HARD_REGNO
1787 will never be assigned to CONFLICT_A. */
1788 || !TEST_HARD_REG_BIT (data->profitable_hard_regs,
1789 hard_regno))
22b0982c
VM
1790 continue;
1791 full_costs[j] -= conflict_costs[k];
1792 }
3b6d1699
VM
1793 queue_update_cost (conflict_a, NULL, COST_HOP_DIVISOR);
1794
22b0982c 1795 }
fa86d337 1796 }
058e97ec 1797 }
1756cb66
VM
1798 if (! retry_p)
1799 /* Take into account preferences of allocnos connected by copies to
1800 the conflict allocnos. */
1801 update_conflict_hard_regno_costs (full_costs, aclass, true);
f754734f 1802
a7f32992
VM
1803 /* Take preferences of allocnos connected by copies into
1804 account. */
1756cb66
VM
1805 if (! retry_p)
1806 {
1807 start_update_cost ();
3b6d1699 1808 queue_update_cost (a, NULL, COST_HOP_DIVISOR);
1756cb66
VM
1809 update_conflict_hard_regno_costs (full_costs, aclass, false);
1810 }
058e97ec
VM
1811 min_cost = min_full_cost = INT_MAX;
1812 /* We don't care about giving callee saved registers to allocnos no
1813 living through calls because call clobbered registers are
1814 allocated first (it is usual practice to put them first in
1815 REG_ALLOC_ORDER). */
1756cb66 1816 mode = ALLOCNO_MODE (a);
058e97ec
VM
1817 for (i = 0; i < class_size; i++)
1818 {
1756cb66 1819 hard_regno = ira_class_hard_regs[aclass][i];
058e97ec
VM
1820#ifdef STACK_REGS
1821 if (no_stack_reg_p
1822 && FIRST_STACK_REG <= hard_regno && hard_regno <= LAST_STACK_REG)
1823 continue;
1824#endif
1756cb66
VM
1825 if (! check_hard_reg_p (a, hard_regno,
1826 conflicting_regs, profitable_hard_regs))
058e97ec
VM
1827 continue;
1828 cost = costs[i];
1829 full_cost = full_costs[i];
ed15c598 1830 if (!HONOR_REG_ALLOC_ORDER)
058e97ec 1831 {
ed15c598
KC
1832 if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
1833 /* We need to save/restore the hard register in
1834 epilogue/prologue. Therefore we increase the cost. */
1835 {
1836 rclass = REGNO_REG_CLASS (hard_regno);
1837 add_cost = ((ira_memory_move_cost[mode][rclass][0]
1838 + ira_memory_move_cost[mode][rclass][1])
1839 * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1);
1840 cost += add_cost;
1841 full_cost += add_cost;
1842 }
058e97ec
VM
1843 }
1844 if (min_cost > cost)
1845 min_cost = cost;
1846 if (min_full_cost > full_cost)
1847 {
1848 min_full_cost = full_cost;
1849 best_hard_regno = hard_regno;
1850 ira_assert (hard_regno >= 0);
1851 }
1852 }
1853 if (min_full_cost > mem_cost)
1854 {
1855 if (! retry_p && internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
1856 fprintf (ira_dump_file, "(memory is more profitable %d vs %d) ",
1857 mem_cost, min_full_cost);
1858 best_hard_regno = -1;
1859 }
1860 fail:
058e97ec 1861 if (best_hard_regno >= 0)
9181a6e5
VM
1862 {
1863 for (i = hard_regno_nregs[best_hard_regno][mode] - 1; i >= 0; i--)
34672f15 1864 allocated_hardreg_p[best_hard_regno + i] = true;
9181a6e5 1865 }
c73ccc80
VM
1866 if (! retry_p)
1867 restore_costs_from_copies (a);
22b0982c
VM
1868 ALLOCNO_HARD_REGNO (a) = best_hard_regno;
1869 ALLOCNO_ASSIGNED_P (a) = true;
1870 if (best_hard_regno >= 0)
c73ccc80 1871 update_costs_from_copies (a, true, ! retry_p);
1756cb66 1872 ira_assert (ALLOCNO_CLASS (a) == aclass);
2b9c63a2 1873 /* We don't need updated costs anymore. */
22b0982c 1874 ira_free_allocno_updated_costs (a);
058e97ec
VM
1875 return best_hard_regno >= 0;
1876}
1877
1878\f
1879
bf08fb16
VM
1880/* An array used to sort copies. */
1881static ira_copy_t *sorted_copies;
1882
1883/* Return TRUE if live ranges of allocnos A1 and A2 intersect. It is
1884 used to find a conflict for new allocnos or allocnos with the
1885 different allocno classes. */
1886static bool
1887allocnos_conflict_by_live_ranges_p (ira_allocno_t a1, ira_allocno_t a2)
1888{
1889 rtx reg1, reg2;
1890 int i, j;
1891 int n1 = ALLOCNO_NUM_OBJECTS (a1);
1892 int n2 = ALLOCNO_NUM_OBJECTS (a2);
1893
1894 if (a1 == a2)
1895 return false;
1896 reg1 = regno_reg_rtx[ALLOCNO_REGNO (a1)];
1897 reg2 = regno_reg_rtx[ALLOCNO_REGNO (a2)];
1898 if (reg1 != NULL && reg2 != NULL
1899 && ORIGINAL_REGNO (reg1) == ORIGINAL_REGNO (reg2))
1900 return false;
1901
1902 for (i = 0; i < n1; i++)
1903 {
1904 ira_object_t c1 = ALLOCNO_OBJECT (a1, i);
1905
1906 for (j = 0; j < n2; j++)
1907 {
1908 ira_object_t c2 = ALLOCNO_OBJECT (a2, j);
1909
1910 if (ira_live_ranges_intersect_p (OBJECT_LIVE_RANGES (c1),
1911 OBJECT_LIVE_RANGES (c2)))
1912 return true;
1913 }
1914 }
1915 return false;
1916}
1917
1918/* The function is used to sort copies according to their execution
1919 frequencies. */
1920static int
1921copy_freq_compare_func (const void *v1p, const void *v2p)
1922{
1923 ira_copy_t cp1 = *(const ira_copy_t *) v1p, cp2 = *(const ira_copy_t *) v2p;
1924 int pri1, pri2;
1925
1926 pri1 = cp1->freq;
1927 pri2 = cp2->freq;
1928 if (pri2 - pri1)
1929 return pri2 - pri1;
1930
1931 /* If freqencies are equal, sort by copies, so that the results of
1932 qsort leave nothing to chance. */
1933 return cp1->num - cp2->num;
1934}
1935
1936\f
1937
1938/* Return true if any allocno from thread of A1 conflicts with any
1939 allocno from thread A2. */
1940static bool
1941allocno_thread_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
1942{
1943 ira_allocno_t a, conflict_a;
1944
1945 for (a = ALLOCNO_COLOR_DATA (a2)->next_thread_allocno;;
1946 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
1947 {
1948 for (conflict_a = ALLOCNO_COLOR_DATA (a1)->next_thread_allocno;;
1949 conflict_a = ALLOCNO_COLOR_DATA (conflict_a)->next_thread_allocno)
1950 {
1951 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
1952 return true;
1953 if (conflict_a == a1)
1954 break;
1955 }
1956 if (a == a2)
1957 break;
1958 }
1959 return false;
1960}
1961
1962/* Merge two threads given correspondingly by their first allocnos T1
1963 and T2 (more accurately merging T2 into T1). */
1964static void
1965merge_threads (ira_allocno_t t1, ira_allocno_t t2)
1966{
1967 ira_allocno_t a, next, last;
1968
1969 gcc_assert (t1 != t2
1970 && ALLOCNO_COLOR_DATA (t1)->first_thread_allocno == t1
1971 && ALLOCNO_COLOR_DATA (t2)->first_thread_allocno == t2);
1972 for (last = t2, a = ALLOCNO_COLOR_DATA (t2)->next_thread_allocno;;
1973 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
1974 {
1975 ALLOCNO_COLOR_DATA (a)->first_thread_allocno = t1;
1976 if (a == t2)
1977 break;
1978 last = a;
1979 }
1980 next = ALLOCNO_COLOR_DATA (t1)->next_thread_allocno;
1981 ALLOCNO_COLOR_DATA (t1)->next_thread_allocno = t2;
1982 ALLOCNO_COLOR_DATA (last)->next_thread_allocno = next;
1983 ALLOCNO_COLOR_DATA (t1)->thread_freq += ALLOCNO_COLOR_DATA (t2)->thread_freq;
1984}
1985
1986/* Create threads by processing CP_NUM copies from sorted)ciopeis. We
1987 process the most expensive copies first. */
1988static void
1989form_threads_from_copies (int cp_num)
1990{
1991 ira_allocno_t a, thread1, thread2;
1992 ira_copy_t cp;
1993 int i, n;
1994
1995 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
1996 /* Form threads processing copies, most frequently executed
1997 first. */
1998 for (; cp_num != 0;)
1999 {
2000 for (i = 0; i < cp_num; i++)
2001 {
2002 cp = sorted_copies[i];
2003 thread1 = ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno;
2004 thread2 = ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno;
2005 if (thread1 == thread2)
2006 continue;
2007 if (! allocno_thread_conflict_p (thread1, thread2))
2008 {
2009 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2010 fprintf
2011 (ira_dump_file,
2012 " Forming thread by copy %d:a%dr%d-a%dr%d (freq=%d):\n",
2013 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
2014 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
2015 cp->freq);
2016 merge_threads (thread1, thread2);
2017 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2018 {
2019 thread1 = ALLOCNO_COLOR_DATA (thread1)->first_thread_allocno;
2020 fprintf (ira_dump_file, " Result (freq=%d): a%dr%d(%d)",
2021 ALLOCNO_COLOR_DATA (thread1)->thread_freq,
2022 ALLOCNO_NUM (thread1), ALLOCNO_REGNO (thread1),
2023 ALLOCNO_FREQ (thread1));
2024 for (a = ALLOCNO_COLOR_DATA (thread1)->next_thread_allocno;
2025 a != thread1;
2026 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
2027 fprintf (ira_dump_file, " a%dr%d(%d)",
2028 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2029 ALLOCNO_FREQ (a));
2030 fprintf (ira_dump_file, "\n");
2031 }
2032 i++;
2033 break;
2034 }
2035 }
2036 /* Collect the rest of copies. */
2037 for (n = 0; i < cp_num; i++)
2038 {
2039 cp = sorted_copies[i];
2040 if (ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno
2041 != ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno)
2042 sorted_copies[n++] = cp;
2043 }
2044 cp_num = n;
2045 }
2046}
2047
2048/* Create threads by processing copies of all alocnos from BUCKET. We
2049 process the most expensive copies first. */
2050static void
2051form_threads_from_bucket (ira_allocno_t bucket)
2052{
2053 ira_allocno_t a;
2054 ira_copy_t cp, next_cp;
2055 int cp_num = 0;
2056
2057 for (a = bucket; a != NULL; a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2058 {
2059 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
2060 {
2061 if (cp->first == a)
2062 {
2063 next_cp = cp->next_first_allocno_copy;
2064 sorted_copies[cp_num++] = cp;
2065 }
2066 else if (cp->second == a)
2067 next_cp = cp->next_second_allocno_copy;
2068 else
2069 gcc_unreachable ();
2070 }
2071 }
2072 form_threads_from_copies (cp_num);
2073}
2074
2075/* Create threads by processing copies of colorable allocno A. We
2076 process most expensive copies first. */
2077static void
2078form_threads_from_colorable_allocno (ira_allocno_t a)
2079{
2080 ira_allocno_t another_a;
2081 ira_copy_t cp, next_cp;
2082 int cp_num = 0;
2083
2084 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
2085 {
2086 if (cp->first == a)
2087 {
2088 next_cp = cp->next_first_allocno_copy;
2089 another_a = cp->second;
2090 }
2091 else if (cp->second == a)
2092 {
2093 next_cp = cp->next_second_allocno_copy;
2094 another_a = cp->first;
2095 }
2096 else
2097 gcc_unreachable ();
2098 if ((! ALLOCNO_COLOR_DATA (another_a)->in_graph_p
2099 && !ALLOCNO_COLOR_DATA (another_a)->may_be_spilled_p)
2100 || ALLOCNO_COLOR_DATA (another_a)->colorable_p)
2101 sorted_copies[cp_num++] = cp;
2102 }
2103 form_threads_from_copies (cp_num);
2104}
2105
2106/* Form initial threads which contain only one allocno. */
2107static void
2108init_allocno_threads (void)
2109{
2110 ira_allocno_t a;
2111 unsigned int j;
2112 bitmap_iterator bi;
2113
2114 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
2115 {
2116 a = ira_allocnos[j];
2117 /* Set up initial thread data: */
2118 ALLOCNO_COLOR_DATA (a)->first_thread_allocno
2119 = ALLOCNO_COLOR_DATA (a)->next_thread_allocno = a;
2120 ALLOCNO_COLOR_DATA (a)->thread_freq = ALLOCNO_FREQ (a);
2121 }
2122}
2123
2124\f
2125
058e97ec
VM
2126/* This page contains the allocator based on the Chaitin-Briggs algorithm. */
2127
2128/* Bucket of allocnos that can colored currently without spilling. */
2129static ira_allocno_t colorable_allocno_bucket;
2130
2131/* Bucket of allocnos that might be not colored currently without
2132 spilling. */
2133static ira_allocno_t uncolorable_allocno_bucket;
2134
1756cb66
VM
2135/* The current number of allocnos in the uncolorable_bucket. */
2136static int uncolorable_allocnos_num;
058e97ec 2137
30ea859e
VM
2138/* Return the current spill priority of allocno A. The less the
2139 number, the more preferable the allocno for spilling. */
1756cb66 2140static inline int
30ea859e
VM
2141allocno_spill_priority (ira_allocno_t a)
2142{
1756cb66
VM
2143 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
2144
2145 return (data->temp
2146 / (ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a)
2147 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
30ea859e
VM
2148 + 1));
2149}
2150
1756cb66 2151/* Add allocno A to bucket *BUCKET_PTR. A should be not in a bucket
058e97ec
VM
2152 before the call. */
2153static void
1756cb66 2154add_allocno_to_bucket (ira_allocno_t a, ira_allocno_t *bucket_ptr)
058e97ec 2155{
1756cb66
VM
2156 ira_allocno_t first_a;
2157 allocno_color_data_t data;
058e97ec
VM
2158
2159 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 2160 && ALLOCNO_CLASS (a) != NO_REGS)
058e97ec 2161 {
1756cb66
VM
2162 uncolorable_allocnos_num++;
2163 ira_assert (uncolorable_allocnos_num > 0);
058e97ec 2164 }
1756cb66
VM
2165 first_a = *bucket_ptr;
2166 data = ALLOCNO_COLOR_DATA (a);
2167 data->next_bucket_allocno = first_a;
2168 data->prev_bucket_allocno = NULL;
2169 if (first_a != NULL)
2170 ALLOCNO_COLOR_DATA (first_a)->prev_bucket_allocno = a;
2171 *bucket_ptr = a;
058e97ec
VM
2172}
2173
058e97ec
VM
2174/* Compare two allocnos to define which allocno should be pushed first
2175 into the coloring stack. If the return is a negative number, the
2176 allocno given by the first parameter will be pushed first. In this
2177 case such allocno has less priority than the second one and the
2178 hard register will be assigned to it after assignment to the second
2179 one. As the result of such assignment order, the second allocno
2180 has a better chance to get the best hard register. */
2181static int
2182bucket_allocno_compare_func (const void *v1p, const void *v2p)
2183{
2184 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
2185 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
bf08fb16
VM
2186 int diff, freq1, freq2, a1_num, a2_num;
2187 ira_allocno_t t1 = ALLOCNO_COLOR_DATA (a1)->first_thread_allocno;
2188 ira_allocno_t t2 = ALLOCNO_COLOR_DATA (a2)->first_thread_allocno;
9c3b0346
VM
2189 int cl1 = ALLOCNO_CLASS (a1), cl2 = ALLOCNO_CLASS (a2);
2190
bf08fb16
VM
2191 freq1 = ALLOCNO_COLOR_DATA (t1)->thread_freq;
2192 freq2 = ALLOCNO_COLOR_DATA (t2)->thread_freq;
2193 if ((diff = freq1 - freq2) != 0)
2194 return diff;
2195
2196 if ((diff = ALLOCNO_NUM (t2) - ALLOCNO_NUM (t1)) != 0)
2197 return diff;
2198
9c3b0346
VM
2199 /* Push pseudos requiring less hard registers first. It means that
2200 we will assign pseudos requiring more hard registers first
2201 avoiding creation small holes in free hard register file into
2202 which the pseudos requiring more hard registers can not fit. */
2203 if ((diff = (ira_reg_class_max_nregs[cl1][ALLOCNO_MODE (a1)]
2204 - ira_reg_class_max_nregs[cl2][ALLOCNO_MODE (a2)])) != 0)
058e97ec 2205 return diff;
bf08fb16
VM
2206
2207 freq1 = ALLOCNO_FREQ (a1);
2208 freq2 = ALLOCNO_FREQ (a2);
2209 if ((diff = freq1 - freq2) != 0)
058e97ec 2210 return diff;
bf08fb16 2211
1756cb66
VM
2212 a1_num = ALLOCNO_COLOR_DATA (a1)->available_regs_num;
2213 a2_num = ALLOCNO_COLOR_DATA (a2)->available_regs_num;
2214 if ((diff = a2_num - a1_num) != 0)
99710245 2215 return diff;
058e97ec
VM
2216 return ALLOCNO_NUM (a2) - ALLOCNO_NUM (a1);
2217}
2218
2219/* Sort bucket *BUCKET_PTR and return the result through
2220 BUCKET_PTR. */
2221static void
1756cb66
VM
2222sort_bucket (ira_allocno_t *bucket_ptr,
2223 int (*compare_func) (const void *, const void *))
058e97ec
VM
2224{
2225 ira_allocno_t a, head;
2226 int n;
2227
1756cb66
VM
2228 for (n = 0, a = *bucket_ptr;
2229 a != NULL;
2230 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
058e97ec
VM
2231 sorted_allocnos[n++] = a;
2232 if (n <= 1)
2233 return;
1756cb66 2234 qsort (sorted_allocnos, n, sizeof (ira_allocno_t), compare_func);
058e97ec
VM
2235 head = NULL;
2236 for (n--; n >= 0; n--)
2237 {
2238 a = sorted_allocnos[n];
1756cb66
VM
2239 ALLOCNO_COLOR_DATA (a)->next_bucket_allocno = head;
2240 ALLOCNO_COLOR_DATA (a)->prev_bucket_allocno = NULL;
058e97ec 2241 if (head != NULL)
1756cb66 2242 ALLOCNO_COLOR_DATA (head)->prev_bucket_allocno = a;
058e97ec
VM
2243 head = a;
2244 }
2245 *bucket_ptr = head;
2246}
2247
bf08fb16 2248/* Add ALLOCNO to colorable bucket maintaining the order according
058e97ec
VM
2249 their priority. ALLOCNO should be not in a bucket before the
2250 call. */
2251static void
bf08fb16 2252add_allocno_to_ordered_colorable_bucket (ira_allocno_t allocno)
058e97ec
VM
2253{
2254 ira_allocno_t before, after;
058e97ec 2255
bf08fb16
VM
2256 form_threads_from_colorable_allocno (allocno);
2257 for (before = colorable_allocno_bucket, after = NULL;
058e97ec 2258 before != NULL;
1756cb66
VM
2259 after = before,
2260 before = ALLOCNO_COLOR_DATA (before)->next_bucket_allocno)
058e97ec
VM
2261 if (bucket_allocno_compare_func (&allocno, &before) < 0)
2262 break;
1756cb66
VM
2263 ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno = before;
2264 ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno = after;
058e97ec 2265 if (after == NULL)
bf08fb16 2266 colorable_allocno_bucket = allocno;
058e97ec 2267 else
1756cb66 2268 ALLOCNO_COLOR_DATA (after)->next_bucket_allocno = allocno;
058e97ec 2269 if (before != NULL)
1756cb66 2270 ALLOCNO_COLOR_DATA (before)->prev_bucket_allocno = allocno;
058e97ec
VM
2271}
2272
2273/* Delete ALLOCNO from bucket *BUCKET_PTR. It should be there before
2274 the call. */
2275static void
2276delete_allocno_from_bucket (ira_allocno_t allocno, ira_allocno_t *bucket_ptr)
2277{
2278 ira_allocno_t prev_allocno, next_allocno;
058e97ec
VM
2279
2280 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 2281 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 2282 {
1756cb66
VM
2283 uncolorable_allocnos_num--;
2284 ira_assert (uncolorable_allocnos_num >= 0);
058e97ec 2285 }
1756cb66
VM
2286 prev_allocno = ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno;
2287 next_allocno = ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno;
058e97ec 2288 if (prev_allocno != NULL)
1756cb66 2289 ALLOCNO_COLOR_DATA (prev_allocno)->next_bucket_allocno = next_allocno;
058e97ec
VM
2290 else
2291 {
2292 ira_assert (*bucket_ptr == allocno);
2293 *bucket_ptr = next_allocno;
2294 }
2295 if (next_allocno != NULL)
1756cb66 2296 ALLOCNO_COLOR_DATA (next_allocno)->prev_bucket_allocno = prev_allocno;
058e97ec
VM
2297}
2298
22b0982c 2299/* Put allocno A onto the coloring stack without removing it from its
058e97ec
VM
2300 bucket. Pushing allocno to the coloring stack can result in moving
2301 conflicting allocnos from the uncolorable bucket to the colorable
2302 one. */
2303static void
22b0982c 2304push_allocno_to_stack (ira_allocno_t a)
058e97ec 2305{
1756cb66
VM
2306 enum reg_class aclass;
2307 allocno_color_data_t data, conflict_data;
2308 int size, i, n = ALLOCNO_NUM_OBJECTS (a);
2309
2310 data = ALLOCNO_COLOR_DATA (a);
2311 data->in_graph_p = false;
9771b263 2312 allocno_stack_vec.safe_push (a);
1756cb66
VM
2313 aclass = ALLOCNO_CLASS (a);
2314 if (aclass == NO_REGS)
058e97ec 2315 return;
1756cb66
VM
2316 size = ira_reg_class_max_nregs[aclass][ALLOCNO_MODE (a)];
2317 if (n > 1)
ac0ab4f7
BS
2318 {
2319 /* We will deal with the subwords individually. */
22b0982c 2320 gcc_assert (size == ALLOCNO_NUM_OBJECTS (a));
ac0ab4f7
BS
2321 size = 1;
2322 }
22b0982c 2323 for (i = 0; i < n; i++)
058e97ec 2324 {
22b0982c 2325 ira_object_t obj = ALLOCNO_OBJECT (a, i);
22b0982c
VM
2326 ira_object_t conflict_obj;
2327 ira_object_conflict_iterator oci;
2328
2329 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
548a6322 2330 {
22b0982c 2331 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
22b0982c 2332
1756cb66
VM
2333 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
2334 if (conflict_data->colorable_p
2335 || ! conflict_data->in_graph_p
2336 || ALLOCNO_ASSIGNED_P (conflict_a)
2337 || !(hard_reg_set_intersect_p
27508f5f
VM
2338 (ALLOCNO_COLOR_DATA (a)->profitable_hard_regs,
2339 conflict_data->profitable_hard_regs)))
22b0982c 2340 continue;
1756cb66
VM
2341 ira_assert (bitmap_bit_p (coloring_allocno_bitmap,
2342 ALLOCNO_NUM (conflict_a)));
27508f5f 2343 if (update_left_conflict_sizes_p (conflict_a, a, size))
22b0982c
VM
2344 {
2345 delete_allocno_from_bucket
27508f5f 2346 (conflict_a, &uncolorable_allocno_bucket);
bf08fb16 2347 add_allocno_to_ordered_colorable_bucket (conflict_a);
1756cb66
VM
2348 if (internal_flag_ira_verbose > 4 && ira_dump_file != NULL)
2349 {
2350 fprintf (ira_dump_file, " Making");
2351 ira_print_expanded_allocno (conflict_a);
2352 fprintf (ira_dump_file, " colorable\n");
2353 }
548a6322 2354 }
1756cb66 2355
548a6322 2356 }
058e97ec
VM
2357 }
2358}
2359
2360/* Put ALLOCNO onto the coloring stack and remove it from its bucket.
2361 The allocno is in the colorable bucket if COLORABLE_P is TRUE. */
2362static void
2363remove_allocno_from_bucket_and_push (ira_allocno_t allocno, bool colorable_p)
2364{
058e97ec
VM
2365 if (colorable_p)
2366 delete_allocno_from_bucket (allocno, &colorable_allocno_bucket);
2367 else
2368 delete_allocno_from_bucket (allocno, &uncolorable_allocno_bucket);
2369 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2370 {
2371 fprintf (ira_dump_file, " Pushing");
22b0982c 2372 ira_print_expanded_allocno (allocno);
30ea859e 2373 if (colorable_p)
1756cb66
VM
2374 fprintf (ira_dump_file, "(cost %d)\n",
2375 ALLOCNO_COLOR_DATA (allocno)->temp);
30ea859e
VM
2376 else
2377 fprintf (ira_dump_file, "(potential spill: %spri=%d, cost=%d)\n",
2378 ALLOCNO_BAD_SPILL_P (allocno) ? "bad spill, " : "",
1756cb66
VM
2379 allocno_spill_priority (allocno),
2380 ALLOCNO_COLOR_DATA (allocno)->temp);
2381 }
058e97ec 2382 if (! colorable_p)
1756cb66 2383 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p = true;
548a6322 2384 push_allocno_to_stack (allocno);
058e97ec
VM
2385}
2386
2387/* Put all allocnos from colorable bucket onto the coloring stack. */
2388static void
2389push_only_colorable (void)
2390{
bf08fb16 2391 form_threads_from_bucket (colorable_allocno_bucket);
1756cb66 2392 sort_bucket (&colorable_allocno_bucket, bucket_allocno_compare_func);
058e97ec
VM
2393 for (;colorable_allocno_bucket != NULL;)
2394 remove_allocno_from_bucket_and_push (colorable_allocno_bucket, true);
2395}
2396
058e97ec 2397/* Return the frequency of exit edges (if EXIT_P) or entry from/to the
b8698a0f 2398 loop given by its LOOP_NODE. */
058e97ec
VM
2399int
2400ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int regno, bool exit_p)
2401{
2402 int freq, i;
2403 edge_iterator ei;
2404 edge e;
9771b263 2405 vec<edge> edges;
058e97ec 2406
2608d841 2407 ira_assert (current_loops != NULL && loop_node->loop != NULL
058e97ec
VM
2408 && (regno < 0 || regno >= FIRST_PSEUDO_REGISTER));
2409 freq = 0;
2410 if (! exit_p)
2411 {
2412 FOR_EACH_EDGE (e, ei, loop_node->loop->header->preds)
2413 if (e->src != loop_node->loop->latch
2414 && (regno < 0
bf744527
SB
2415 || (bitmap_bit_p (df_get_live_out (e->src), regno)
2416 && bitmap_bit_p (df_get_live_in (e->dest), regno))))
058e97ec
VM
2417 freq += EDGE_FREQUENCY (e);
2418 }
2419 else
2420 {
2421 edges = get_loop_exit_edges (loop_node->loop);
9771b263 2422 FOR_EACH_VEC_ELT (edges, i, e)
058e97ec 2423 if (regno < 0
bf744527
SB
2424 || (bitmap_bit_p (df_get_live_out (e->src), regno)
2425 && bitmap_bit_p (df_get_live_in (e->dest), regno)))
058e97ec 2426 freq += EDGE_FREQUENCY (e);
9771b263 2427 edges.release ();
058e97ec
VM
2428 }
2429
2430 return REG_FREQ_FROM_EDGE_FREQ (freq);
2431}
2432
2433/* Calculate and return the cost of putting allocno A into memory. */
2434static int
2435calculate_allocno_spill_cost (ira_allocno_t a)
2436{
2437 int regno, cost;
2438 enum machine_mode mode;
2439 enum reg_class rclass;
2440 ira_allocno_t parent_allocno;
2441 ira_loop_tree_node_t parent_node, loop_node;
2442
2443 regno = ALLOCNO_REGNO (a);
1756cb66 2444 cost = ALLOCNO_UPDATED_MEMORY_COST (a) - ALLOCNO_UPDATED_CLASS_COST (a);
058e97ec
VM
2445 if (ALLOCNO_CAP (a) != NULL)
2446 return cost;
2447 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
2448 if ((parent_node = loop_node->parent) == NULL)
2449 return cost;
2450 if ((parent_allocno = parent_node->regno_allocno_map[regno]) == NULL)
2451 return cost;
2452 mode = ALLOCNO_MODE (a);
1756cb66 2453 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
2454 if (ALLOCNO_HARD_REGNO (parent_allocno) < 0)
2455 cost -= (ira_memory_move_cost[mode][rclass][0]
2456 * ira_loop_edge_freq (loop_node, regno, true)
2457 + ira_memory_move_cost[mode][rclass][1]
2458 * ira_loop_edge_freq (loop_node, regno, false));
2459 else
1756cb66
VM
2460 {
2461 ira_init_register_move_cost_if_necessary (mode);
2462 cost += ((ira_memory_move_cost[mode][rclass][1]
2463 * ira_loop_edge_freq (loop_node, regno, true)
2464 + ira_memory_move_cost[mode][rclass][0]
2465 * ira_loop_edge_freq (loop_node, regno, false))
2466 - (ira_register_move_cost[mode][rclass][rclass]
2467 * (ira_loop_edge_freq (loop_node, regno, false)
2468 + ira_loop_edge_freq (loop_node, regno, true))));
2469 }
058e97ec
VM
2470 return cost;
2471}
2472
1756cb66
VM
2473/* Used for sorting allocnos for spilling. */
2474static inline int
2475allocno_spill_priority_compare (ira_allocno_t a1, ira_allocno_t a2)
058e97ec
VM
2476{
2477 int pri1, pri2, diff;
b8698a0f 2478
1756cb66
VM
2479 if (ALLOCNO_BAD_SPILL_P (a1) && ! ALLOCNO_BAD_SPILL_P (a2))
2480 return 1;
2481 if (ALLOCNO_BAD_SPILL_P (a2) && ! ALLOCNO_BAD_SPILL_P (a1))
2482 return -1;
2483 pri1 = allocno_spill_priority (a1);
2484 pri2 = allocno_spill_priority (a2);
058e97ec
VM
2485 if ((diff = pri1 - pri2) != 0)
2486 return diff;
1756cb66
VM
2487 if ((diff
2488 = ALLOCNO_COLOR_DATA (a1)->temp - ALLOCNO_COLOR_DATA (a2)->temp) != 0)
058e97ec
VM
2489 return diff;
2490 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2491}
2492
1756cb66
VM
2493/* Used for sorting allocnos for spilling. */
2494static int
2495allocno_spill_sort_compare (const void *v1p, const void *v2p)
99710245 2496{
1756cb66
VM
2497 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2498 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
99710245 2499
1756cb66 2500 return allocno_spill_priority_compare (p1, p2);
058e97ec
VM
2501}
2502
2503/* Push allocnos to the coloring stack. The order of allocnos in the
1756cb66
VM
2504 stack defines the order for the subsequent coloring. */
2505static void
2506push_allocnos_to_stack (void)
2507{
2508 ira_allocno_t a;
2509 int cost;
2510
2511 /* Calculate uncolorable allocno spill costs. */
2512 for (a = uncolorable_allocno_bucket;
2513 a != NULL;
2514 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2515 if (ALLOCNO_CLASS (a) != NO_REGS)
2516 {
2517 cost = calculate_allocno_spill_cost (a);
2518 /* ??? Remove cost of copies between the coalesced
2519 allocnos. */
2520 ALLOCNO_COLOR_DATA (a)->temp = cost;
2521 }
2522 sort_bucket (&uncolorable_allocno_bucket, allocno_spill_sort_compare);
2523 for (;;)
2524 {
2525 push_only_colorable ();
2526 a = uncolorable_allocno_bucket;
2527 if (a == NULL)
2528 break;
2529 remove_allocno_from_bucket_and_push (a, false);
058e97ec
VM
2530 }
2531 ira_assert (colorable_allocno_bucket == NULL
2532 && uncolorable_allocno_bucket == NULL);
1756cb66 2533 ira_assert (uncolorable_allocnos_num == 0);
058e97ec
VM
2534}
2535
2536/* Pop the coloring stack and assign hard registers to the popped
2537 allocnos. */
2538static void
2539pop_allocnos_from_stack (void)
2540{
2541 ira_allocno_t allocno;
1756cb66 2542 enum reg_class aclass;
058e97ec 2543
9771b263 2544 for (;allocno_stack_vec.length () != 0;)
058e97ec 2545 {
9771b263 2546 allocno = allocno_stack_vec.pop ();
1756cb66 2547 aclass = ALLOCNO_CLASS (allocno);
058e97ec
VM
2548 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2549 {
2550 fprintf (ira_dump_file, " Popping");
22b0982c 2551 ira_print_expanded_allocno (allocno);
058e97ec
VM
2552 fprintf (ira_dump_file, " -- ");
2553 }
1756cb66 2554 if (aclass == NO_REGS)
058e97ec
VM
2555 {
2556 ALLOCNO_HARD_REGNO (allocno) = -1;
2557 ALLOCNO_ASSIGNED_P (allocno) = true;
2558 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (allocno) == NULL);
2559 ira_assert
2560 (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno) == NULL);
2561 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2562 fprintf (ira_dump_file, "assign memory\n");
2563 }
2564 else if (assign_hard_reg (allocno, false))
2565 {
2566 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2567 fprintf (ira_dump_file, "assign reg %d\n",
2568 ALLOCNO_HARD_REGNO (allocno));
2569 }
2570 else if (ALLOCNO_ASSIGNED_P (allocno))
2571 {
2572 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3b6d1699
VM
2573 fprintf (ira_dump_file, "spill%s\n",
2574 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p
2575 ? "" : "!");
058e97ec 2576 }
1756cb66 2577 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
ac0ab4f7
BS
2578 }
2579}
2580
22b0982c 2581/* Set up number of available hard registers for allocno A. */
058e97ec 2582static void
22b0982c 2583setup_allocno_available_regs_num (ira_allocno_t a)
058e97ec 2584{
27508f5f 2585 int i, n, hard_regno, hard_regs_num, nwords;
1756cb66 2586 enum reg_class aclass;
1756cb66 2587 allocno_color_data_t data;
058e97ec 2588
1756cb66
VM
2589 aclass = ALLOCNO_CLASS (a);
2590 data = ALLOCNO_COLOR_DATA (a);
2591 data->available_regs_num = 0;
2592 if (aclass == NO_REGS)
058e97ec 2593 return;
1756cb66 2594 hard_regs_num = ira_class_hard_regs_num[aclass];
1756cb66 2595 nwords = ALLOCNO_NUM_OBJECTS (a);
058e97ec 2596 for (n = 0, i = hard_regs_num - 1; i >= 0; i--)
478ab26d 2597 {
1756cb66 2598 hard_regno = ira_class_hard_regs[aclass][i];
27508f5f
VM
2599 /* Checking only profitable hard regs. */
2600 if (TEST_HARD_REG_BIT (data->profitable_hard_regs, hard_regno))
478ab26d
VM
2601 n++;
2602 }
1756cb66
VM
2603 data->available_regs_num = n;
2604 if (internal_flag_ira_verbose <= 2 || ira_dump_file == NULL)
2605 return;
2606 fprintf
2607 (ira_dump_file,
27508f5f 2608 " Allocno a%dr%d of %s(%d) has %d avail. regs ",
1756cb66
VM
2609 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2610 reg_class_names[aclass], ira_class_hard_regs_num[aclass], n);
27508f5f
VM
2611 print_hard_reg_set (ira_dump_file, data->profitable_hard_regs, false);
2612 fprintf (ira_dump_file, ", %snode: ",
2613 hard_reg_set_equal_p (data->profitable_hard_regs,
2614 data->hard_regs_node->hard_regs->set)
2615 ? "" : "^");
2616 print_hard_reg_set (ira_dump_file,
2617 data->hard_regs_node->hard_regs->set, false);
1756cb66 2618 for (i = 0; i < nwords; i++)
22b0982c 2619 {
1756cb66 2620 ira_object_t obj = ALLOCNO_OBJECT (a, i);
ac0ab4f7 2621
1756cb66 2622 if (nwords != 1)
22b0982c 2623 {
1756cb66
VM
2624 if (i != 0)
2625 fprintf (ira_dump_file, ", ");
2626 fprintf (ira_dump_file, " obj %d", i);
22b0982c 2627 }
1756cb66
VM
2628 fprintf (ira_dump_file, " (confl regs = ");
2629 print_hard_reg_set (ira_dump_file, OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
2630 false);
27508f5f 2631 fprintf (ira_dump_file, ")");
22b0982c 2632 }
1756cb66 2633 fprintf (ira_dump_file, "\n");
058e97ec
VM
2634}
2635
2636/* Put ALLOCNO in a bucket corresponding to its number and size of its
2637 conflicting allocnos and hard registers. */
2638static void
2639put_allocno_into_bucket (ira_allocno_t allocno)
2640{
1756cb66 2641 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
058e97ec 2642 setup_allocno_available_regs_num (allocno);
1756cb66 2643 if (setup_left_conflict_sizes_p (allocno))
548a6322 2644 add_allocno_to_bucket (allocno, &colorable_allocno_bucket);
058e97ec 2645 else
548a6322 2646 add_allocno_to_bucket (allocno, &uncolorable_allocno_bucket);
058e97ec
VM
2647}
2648
22b0982c
VM
2649/* Map: allocno number -> allocno priority. */
2650static int *allocno_priorities;
058e97ec 2651
22b0982c
VM
2652/* Set up priorities for N allocnos in array
2653 CONSIDERATION_ALLOCNOS. */
058e97ec 2654static void
22b0982c 2655setup_allocno_priorities (ira_allocno_t *consideration_allocnos, int n)
058e97ec 2656{
22b0982c
VM
2657 int i, length, nrefs, priority, max_priority, mult;
2658 ira_allocno_t a;
058e97ec 2659
22b0982c
VM
2660 max_priority = 0;
2661 for (i = 0; i < n; i++)
7db7ed3c
VM
2662 {
2663 a = consideration_allocnos[i];
2664 nrefs = ALLOCNO_NREFS (a);
2665 ira_assert (nrefs >= 0);
2666 mult = floor_log2 (ALLOCNO_NREFS (a)) + 1;
2667 ira_assert (mult >= 0);
2668 allocno_priorities[ALLOCNO_NUM (a)]
2669 = priority
2670 = (mult
1756cb66
VM
2671 * (ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a))
2672 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
7db7ed3c
VM
2673 if (priority < 0)
2674 priority = -priority;
2675 if (max_priority < priority)
2676 max_priority = priority;
2677 }
2678 mult = max_priority == 0 ? 1 : INT_MAX / max_priority;
2679 for (i = 0; i < n; i++)
2680 {
2681 a = consideration_allocnos[i];
2682 length = ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a);
ac0ab4f7
BS
2683 if (ALLOCNO_NUM_OBJECTS (a) > 1)
2684 length /= ALLOCNO_NUM_OBJECTS (a);
7db7ed3c
VM
2685 if (length <= 0)
2686 length = 1;
2687 allocno_priorities[ALLOCNO_NUM (a)]
2688 = allocno_priorities[ALLOCNO_NUM (a)] * mult / length;
2689 }
2690}
2691
1756cb66
VM
2692/* Sort allocnos according to the profit of usage of a hard register
2693 instead of memory for them. */
2694static int
2695allocno_cost_compare_func (const void *v1p, const void *v2p)
2696{
2697 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2698 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
2699 int c1, c2;
2700
2701 c1 = ALLOCNO_UPDATED_MEMORY_COST (p1) - ALLOCNO_UPDATED_CLASS_COST (p1);
2702 c2 = ALLOCNO_UPDATED_MEMORY_COST (p2) - ALLOCNO_UPDATED_CLASS_COST (p2);
2703 if (c1 - c2)
2704 return c1 - c2;
2705
2706 /* If regs are equally good, sort by allocno numbers, so that the
2707 results of qsort leave nothing to chance. */
2708 return ALLOCNO_NUM (p1) - ALLOCNO_NUM (p2);
2709}
2710
2711/* We used Chaitin-Briggs coloring to assign as many pseudos as
2712 possible to hard registers. Let us try to improve allocation with
2713 cost point of view. This function improves the allocation by
2714 spilling some allocnos and assigning the freed hard registers to
2715 other allocnos if it decreases the overall allocation cost. */
2716static void
2717improve_allocation (void)
2718{
2719 unsigned int i;
2720 int j, k, n, hregno, conflict_hregno, base_cost, class_size, word, nwords;
2721 int check, spill_cost, min_cost, nregs, conflict_nregs, r, best;
2722 bool try_p;
2723 enum reg_class aclass;
2724 enum machine_mode mode;
2725 int *allocno_costs;
2726 int costs[FIRST_PSEUDO_REGISTER];
27508f5f 2727 HARD_REG_SET conflicting_regs[2], profitable_hard_regs;
1756cb66
VM
2728 ira_allocno_t a;
2729 bitmap_iterator bi;
2730
2731 /* Clear counts used to process conflicting allocnos only once for
2732 each allocno. */
2733 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2734 ALLOCNO_COLOR_DATA (ira_allocnos[i])->temp = 0;
2735 check = n = 0;
2736 /* Process each allocno and try to assign a hard register to it by
2737 spilling some its conflicting allocnos. */
2738 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2739 {
2740 a = ira_allocnos[i];
2741 ALLOCNO_COLOR_DATA (a)->temp = 0;
2742 if (empty_profitable_hard_regs (a))
2743 continue;
2744 check++;
2745 aclass = ALLOCNO_CLASS (a);
2746 allocno_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
2747 if (allocno_costs == NULL)
2748 allocno_costs = ALLOCNO_HARD_REG_COSTS (a);
2749 if ((hregno = ALLOCNO_HARD_REGNO (a)) < 0)
2750 base_cost = ALLOCNO_UPDATED_MEMORY_COST (a);
2751 else if (allocno_costs == NULL)
2752 /* It means that assigning a hard register is not profitable
2753 (we don't waste memory for hard register costs in this
2754 case). */
2755 continue;
2756 else
2757 base_cost = allocno_costs[ira_class_hard_reg_index[aclass][hregno]];
2758 try_p = false;
27508f5f
VM
2759 get_conflict_and_start_profitable_regs (a, false,
2760 conflicting_regs,
2761 &profitable_hard_regs);
1756cb66
VM
2762 class_size = ira_class_hard_regs_num[aclass];
2763 /* Set up cost improvement for usage of each profitable hard
2764 register for allocno A. */
2765 for (j = 0; j < class_size; j++)
2766 {
2767 hregno = ira_class_hard_regs[aclass][j];
2768 if (! check_hard_reg_p (a, hregno,
2769 conflicting_regs, profitable_hard_regs))
2770 continue;
2771 ira_assert (ira_class_hard_reg_index[aclass][hregno] == j);
2772 k = allocno_costs == NULL ? 0 : j;
2773 costs[hregno] = (allocno_costs == NULL
2774 ? ALLOCNO_UPDATED_CLASS_COST (a) : allocno_costs[k]);
2775 costs[hregno] -= base_cost;
2776 if (costs[hregno] < 0)
2777 try_p = true;
2778 }
2779 if (! try_p)
2780 /* There is no chance to improve the allocation cost by
2781 assigning hard register to allocno A even without spilling
2782 conflicting allocnos. */
2783 continue;
2784 mode = ALLOCNO_MODE (a);
2785 nwords = ALLOCNO_NUM_OBJECTS (a);
2786 /* Process each allocno conflicting with A and update the cost
2787 improvement for profitable hard registers of A. To use a
2788 hard register for A we need to spill some conflicting
2789 allocnos and that creates penalty for the cost
2790 improvement. */
2791 for (word = 0; word < nwords; word++)
2792 {
2793 ira_object_t conflict_obj;
2794 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2795 ira_object_conflict_iterator oci;
2796
2797 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2798 {
2799 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2800
2801 if (ALLOCNO_COLOR_DATA (conflict_a)->temp == check)
2802 /* We already processed this conflicting allocno
2803 because we processed earlier another object of the
2804 conflicting allocno. */
2805 continue;
2806 ALLOCNO_COLOR_DATA (conflict_a)->temp = check;
2807 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2808 continue;
2809 spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a);
2810 k = (ira_class_hard_reg_index
2811 [ALLOCNO_CLASS (conflict_a)][conflict_hregno]);
2812 ira_assert (k >= 0);
2813 if ((allocno_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (conflict_a))
2814 != NULL)
2815 spill_cost -= allocno_costs[k];
2816 else if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a))
2817 != NULL)
2818 spill_cost -= allocno_costs[k];
2819 else
2820 spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a);
2821 conflict_nregs
2822 = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)];
2823 for (r = conflict_hregno;
2824 r >= 0 && r + hard_regno_nregs[r][mode] > conflict_hregno;
2825 r--)
2826 if (check_hard_reg_p (a, r,
2827 conflicting_regs, profitable_hard_regs))
2828 costs[r] += spill_cost;
2829 for (r = conflict_hregno + 1;
2830 r < conflict_hregno + conflict_nregs;
2831 r++)
2832 if (check_hard_reg_p (a, r,
2833 conflicting_regs, profitable_hard_regs))
2834 costs[r] += spill_cost;
2835 }
2836 }
2837 min_cost = INT_MAX;
2838 best = -1;
2839 /* Now we choose hard register for A which results in highest
2840 allocation cost improvement. */
2841 for (j = 0; j < class_size; j++)
2842 {
2843 hregno = ira_class_hard_regs[aclass][j];
2844 if (check_hard_reg_p (a, hregno,
2845 conflicting_regs, profitable_hard_regs)
2846 && min_cost > costs[hregno])
2847 {
2848 best = hregno;
2849 min_cost = costs[hregno];
2850 }
2851 }
2852 if (min_cost >= 0)
2853 /* We are in a situation when assigning any hard register to A
2854 by spilling some conflicting allocnos does not improve the
2855 allocation cost. */
2856 continue;
2857 nregs = hard_regno_nregs[best][mode];
2858 /* Now spill conflicting allocnos which contain a hard register
2859 of A when we assign the best chosen hard register to it. */
2860 for (word = 0; word < nwords; word++)
2861 {
2862 ira_object_t conflict_obj;
2863 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2864 ira_object_conflict_iterator oci;
2865
2866 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2867 {
2868 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2869
2870 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2871 continue;
2872 conflict_nregs
2873 = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)];
2874 if (best + nregs <= conflict_hregno
2875 || conflict_hregno + conflict_nregs <= best)
2876 /* No intersection. */
2877 continue;
2878 ALLOCNO_HARD_REGNO (conflict_a) = -1;
2879 sorted_allocnos[n++] = conflict_a;
2880 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2881 fprintf (ira_dump_file, "Spilling a%dr%d for a%dr%d\n",
2882 ALLOCNO_NUM (conflict_a), ALLOCNO_REGNO (conflict_a),
2883 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
2884 }
2885 }
2886 /* Assign the best chosen hard register to A. */
2887 ALLOCNO_HARD_REGNO (a) = best;
2888 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2889 fprintf (ira_dump_file, "Assigning %d to a%dr%d\n",
2890 best, ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
2891 }
2892 if (n == 0)
2893 return;
2894 /* We spilled some allocnos to assign their hard registers to other
2895 allocnos. The spilled allocnos are now in array
2896 'sorted_allocnos'. There is still a possibility that some of the
2897 spilled allocnos can get hard registers. So let us try assign
2898 them hard registers again (just a reminder -- function
2899 'assign_hard_reg' assigns hard registers only if it is possible
2900 and profitable). We process the spilled allocnos with biggest
2901 benefit to get hard register first -- see function
2902 'allocno_cost_compare_func'. */
2903 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
2904 allocno_cost_compare_func);
2905 for (j = 0; j < n; j++)
2906 {
2907 a = sorted_allocnos[j];
2908 ALLOCNO_ASSIGNED_P (a) = false;
2909 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2910 {
2911 fprintf (ira_dump_file, " ");
2912 ira_print_expanded_allocno (a);
2913 fprintf (ira_dump_file, " -- ");
2914 }
2915 if (assign_hard_reg (a, false))
2916 {
2917 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2918 fprintf (ira_dump_file, "assign hard reg %d\n",
2919 ALLOCNO_HARD_REGNO (a));
2920 }
2921 else
2922 {
2923 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2924 fprintf (ira_dump_file, "assign memory\n");
2925 }
2926 }
2927}
2928
aeb9f7cf 2929/* Sort allocnos according to their priorities. */
7db7ed3c
VM
2930static int
2931allocno_priority_compare_func (const void *v1p, const void *v2p)
2932{
2933 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
2934 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
2935 int pri1, pri2;
2936
2937 pri1 = allocno_priorities[ALLOCNO_NUM (a1)];
2938 pri2 = allocno_priorities[ALLOCNO_NUM (a2)];
71af27d2
OH
2939 if (pri2 != pri1)
2940 return SORTGT (pri2, pri1);
7db7ed3c
VM
2941
2942 /* If regs are equally good, sort by allocnos, so that the results of
2943 qsort leave nothing to chance. */
2944 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2945}
2946
058e97ec
VM
2947/* Chaitin-Briggs coloring for allocnos in COLORING_ALLOCNO_BITMAP
2948 taking into account allocnos in CONSIDERATION_ALLOCNO_BITMAP. */
2949static void
2950color_allocnos (void)
2951{
7db7ed3c 2952 unsigned int i, n;
058e97ec
VM
2953 bitmap_iterator bi;
2954 ira_allocno_t a;
2955
76763a6d 2956 setup_profitable_hard_regs ();
3b6d1699
VM
2957 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2958 {
2959 int l, nr;
2960 HARD_REG_SET conflict_hard_regs;
2961 allocno_color_data_t data;
2962 ira_pref_t pref, next_pref;
2963
2964 a = ira_allocnos[i];
2965 nr = ALLOCNO_NUM_OBJECTS (a);
2966 CLEAR_HARD_REG_SET (conflict_hard_regs);
2967 for (l = 0; l < nr; l++)
2968 {
2969 ira_object_t obj = ALLOCNO_OBJECT (a, l);
2970 IOR_HARD_REG_SET (conflict_hard_regs,
2971 OBJECT_CONFLICT_HARD_REGS (obj));
2972 }
2973 data = ALLOCNO_COLOR_DATA (a);
2974 for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = next_pref)
2975 {
2976 next_pref = pref->next_pref;
2977 if (! ira_hard_reg_in_set_p (pref->hard_regno,
2978 ALLOCNO_MODE (a),
2979 data->profitable_hard_regs))
2980 ira_remove_pref (pref);
2981 }
2982 }
7db7ed3c 2983 if (flag_ira_algorithm == IRA_ALGORITHM_PRIORITY)
058e97ec 2984 {
7db7ed3c
VM
2985 n = 0;
2986 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
058e97ec 2987 {
7db7ed3c 2988 a = ira_allocnos[i];
1756cb66 2989 if (ALLOCNO_CLASS (a) == NO_REGS)
058e97ec 2990 {
7db7ed3c
VM
2991 ALLOCNO_HARD_REGNO (a) = -1;
2992 ALLOCNO_ASSIGNED_P (a) = true;
2993 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
2994 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
2995 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2996 {
2997 fprintf (ira_dump_file, " Spill");
22b0982c 2998 ira_print_expanded_allocno (a);
7db7ed3c
VM
2999 fprintf (ira_dump_file, "\n");
3000 }
3001 continue;
058e97ec 3002 }
7db7ed3c
VM
3003 sorted_allocnos[n++] = a;
3004 }
3005 if (n != 0)
3006 {
3007 setup_allocno_priorities (sorted_allocnos, n);
3008 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
3009 allocno_priority_compare_func);
3010 for (i = 0; i < n; i++)
3011 {
3012 a = sorted_allocnos[i];
3013 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3014 {
3015 fprintf (ira_dump_file, " ");
22b0982c 3016 ira_print_expanded_allocno (a);
7db7ed3c
VM
3017 fprintf (ira_dump_file, " -- ");
3018 }
3019 if (assign_hard_reg (a, false))
3020 {
3021 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3022 fprintf (ira_dump_file, "assign hard reg %d\n",
3023 ALLOCNO_HARD_REGNO (a));
3024 }
3025 else
3026 {
3027 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3028 fprintf (ira_dump_file, "assign memory\n");
3029 }
3030 }
3031 }
3032 }
3033 else
3034 {
27508f5f 3035 form_allocno_hard_regs_nodes_forest ();
1756cb66
VM
3036 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
3037 print_hard_regs_forest (ira_dump_file);
7db7ed3c
VM
3038 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3039 {
3040 a = ira_allocnos[i];
1756cb66 3041 if (ALLOCNO_CLASS (a) != NO_REGS && ! empty_profitable_hard_regs (a))
3b6d1699
VM
3042 {
3043 ALLOCNO_COLOR_DATA (a)->in_graph_p = true;
3044 update_costs_from_prefs (a);
3045 }
1756cb66 3046 else
7db7ed3c
VM
3047 {
3048 ALLOCNO_HARD_REGNO (a) = -1;
3049 ALLOCNO_ASSIGNED_P (a) = true;
1756cb66
VM
3050 /* We don't need updated costs anymore. */
3051 ira_free_allocno_updated_costs (a);
7db7ed3c
VM
3052 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3053 {
3054 fprintf (ira_dump_file, " Spill");
22b0982c 3055 ira_print_expanded_allocno (a);
7db7ed3c
VM
3056 fprintf (ira_dump_file, "\n");
3057 }
7db7ed3c 3058 }
1756cb66
VM
3059 }
3060 /* Put the allocnos into the corresponding buckets. */
3061 colorable_allocno_bucket = NULL;
3062 uncolorable_allocno_bucket = NULL;
3063 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3064 {
3065 a = ira_allocnos[i];
3066 if (ALLOCNO_COLOR_DATA (a)->in_graph_p)
3067 put_allocno_into_bucket (a);
058e97ec 3068 }
7db7ed3c
VM
3069 push_allocnos_to_stack ();
3070 pop_allocnos_from_stack ();
27508f5f 3071 finish_allocno_hard_regs_nodes_forest ();
058e97ec 3072 }
1756cb66 3073 improve_allocation ();
058e97ec
VM
3074}
3075
3076\f
3077
2b9c63a2 3078/* Output information about the loop given by its LOOP_TREE_NODE. */
058e97ec
VM
3079static void
3080print_loop_title (ira_loop_tree_node_t loop_tree_node)
3081{
3082 unsigned int j;
3083 bitmap_iterator bi;
ea1c67e6
VM
3084 ira_loop_tree_node_t subloop_node, dest_loop_node;
3085 edge e;
3086 edge_iterator ei;
058e97ec 3087
2608d841
VM
3088 if (loop_tree_node->parent == NULL)
3089 fprintf (ira_dump_file,
3090 "\n Loop 0 (parent -1, header bb%d, depth 0)\n bbs:",
3091 NUM_FIXED_BLOCKS);
3092 else
3093 {
3094 ira_assert (current_loops != NULL && loop_tree_node->loop != NULL);
3095 fprintf (ira_dump_file,
3096 "\n Loop %d (parent %d, header bb%d, depth %d)\n bbs:",
3097 loop_tree_node->loop_num, loop_tree_node->parent->loop_num,
3098 loop_tree_node->loop->header->index,
3099 loop_depth (loop_tree_node->loop));
3100 }
ea1c67e6
VM
3101 for (subloop_node = loop_tree_node->children;
3102 subloop_node != NULL;
3103 subloop_node = subloop_node->next)
3104 if (subloop_node->bb != NULL)
3105 {
3106 fprintf (ira_dump_file, " %d", subloop_node->bb->index);
3107 FOR_EACH_EDGE (e, ei, subloop_node->bb->succs)
fefa31b5 3108 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
ea1c67e6
VM
3109 && ((dest_loop_node = IRA_BB_NODE (e->dest)->parent)
3110 != loop_tree_node))
3111 fprintf (ira_dump_file, "(->%d:l%d)",
2608d841 3112 e->dest->index, dest_loop_node->loop_num);
ea1c67e6
VM
3113 }
3114 fprintf (ira_dump_file, "\n all:");
49d988e7 3115 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
3116 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
3117 fprintf (ira_dump_file, "\n modified regnos:");
3118 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->modified_regnos, 0, j, bi)
3119 fprintf (ira_dump_file, " %d", j);
3120 fprintf (ira_dump_file, "\n border:");
3121 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->border_allocnos, 0, j, bi)
3122 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
3123 fprintf (ira_dump_file, "\n Pressure:");
1756cb66 3124 for (j = 0; (int) j < ira_pressure_classes_num; j++)
058e97ec 3125 {
1756cb66 3126 enum reg_class pclass;
b8698a0f 3127
1756cb66
VM
3128 pclass = ira_pressure_classes[j];
3129 if (loop_tree_node->reg_pressure[pclass] == 0)
058e97ec 3130 continue;
1756cb66
VM
3131 fprintf (ira_dump_file, " %s=%d", reg_class_names[pclass],
3132 loop_tree_node->reg_pressure[pclass]);
058e97ec
VM
3133 }
3134 fprintf (ira_dump_file, "\n");
3135}
3136
3137/* Color the allocnos inside loop (in the extreme case it can be all
3138 of the function) given the corresponding LOOP_TREE_NODE. The
3139 function is called for each loop during top-down traverse of the
3140 loop tree. */
3141static void
3142color_pass (ira_loop_tree_node_t loop_tree_node)
3143{
27508f5f 3144 int regno, hard_regno, index = -1, n;
058e97ec
VM
3145 int cost, exit_freq, enter_freq;
3146 unsigned int j;
3147 bitmap_iterator bi;
3148 enum machine_mode mode;
1756cb66 3149 enum reg_class rclass, aclass, pclass;
058e97ec
VM
3150 ira_allocno_t a, subloop_allocno;
3151 ira_loop_tree_node_t subloop_node;
3152
3153 ira_assert (loop_tree_node->bb == NULL);
3154 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
3155 print_loop_title (loop_tree_node);
3156
49d988e7 3157 bitmap_copy (coloring_allocno_bitmap, loop_tree_node->all_allocnos);
058e97ec 3158 bitmap_copy (consideration_allocno_bitmap, coloring_allocno_bitmap);
27508f5f 3159 n = 0;
1756cb66
VM
3160 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3161 {
3162 a = ira_allocnos[j];
3163 n++;
1756cb66
VM
3164 if (! ALLOCNO_ASSIGNED_P (a))
3165 continue;
3166 bitmap_clear_bit (coloring_allocno_bitmap, ALLOCNO_NUM (a));
3167 }
3168 allocno_color_data
3169 = (allocno_color_data_t) ira_allocate (sizeof (struct allocno_color_data)
3170 * n);
3171 memset (allocno_color_data, 0, sizeof (struct allocno_color_data) * n);
27508f5f
VM
3172 curr_allocno_process = 0;
3173 n = 0;
058e97ec
VM
3174 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3175 {
3176 a = ira_allocnos[j];
1756cb66
VM
3177 ALLOCNO_ADD_DATA (a) = allocno_color_data + n;
3178 n++;
058e97ec 3179 }
bf08fb16 3180 init_allocno_threads ();
058e97ec
VM
3181 /* Color all mentioned allocnos including transparent ones. */
3182 color_allocnos ();
3183 /* Process caps. They are processed just once. */
7db7ed3c
VM
3184 if (flag_ira_region == IRA_REGION_MIXED
3185 || flag_ira_region == IRA_REGION_ALL)
49d988e7 3186 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
3187 {
3188 a = ira_allocnos[j];
3189 if (ALLOCNO_CAP_MEMBER (a) == NULL)
3190 continue;
3191 /* Remove from processing in the next loop. */
3192 bitmap_clear_bit (consideration_allocno_bitmap, j);
1756cb66
VM
3193 rclass = ALLOCNO_CLASS (a);
3194 pclass = ira_pressure_class_translate[rclass];
7db7ed3c 3195 if (flag_ira_region == IRA_REGION_MIXED
1756cb66 3196 && (loop_tree_node->reg_pressure[pclass]
f508f827 3197 <= ira_class_hard_regs_num[pclass]))
058e97ec
VM
3198 {
3199 mode = ALLOCNO_MODE (a);
3200 hard_regno = ALLOCNO_HARD_REGNO (a);
3201 if (hard_regno >= 0)
3202 {
3203 index = ira_class_hard_reg_index[rclass][hard_regno];
3204 ira_assert (index >= 0);
3205 }
3206 regno = ALLOCNO_REGNO (a);
3207 subloop_allocno = ALLOCNO_CAP_MEMBER (a);
3208 subloop_node = ALLOCNO_LOOP_TREE_NODE (subloop_allocno);
3209 ira_assert (!ALLOCNO_ASSIGNED_P (subloop_allocno));
3210 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3211 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3212 if (hard_regno >= 0)
c73ccc80 3213 update_costs_from_copies (subloop_allocno, true, true);
2b9c63a2 3214 /* We don't need updated costs anymore. */
058e97ec
VM
3215 ira_free_allocno_updated_costs (subloop_allocno);
3216 }
3217 }
3218 /* Update costs of the corresponding allocnos (not caps) in the
3219 subloops. */
3220 for (subloop_node = loop_tree_node->subloops;
3221 subloop_node != NULL;
3222 subloop_node = subloop_node->subloop_next)
3223 {
3224 ira_assert (subloop_node->bb == NULL);
3225 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3226 {
3227 a = ira_allocnos[j];
3228 ira_assert (ALLOCNO_CAP_MEMBER (a) == NULL);
3229 mode = ALLOCNO_MODE (a);
1756cb66
VM
3230 rclass = ALLOCNO_CLASS (a);
3231 pclass = ira_pressure_class_translate[rclass];
058e97ec 3232 hard_regno = ALLOCNO_HARD_REGNO (a);
7db7ed3c 3233 /* Use hard register class here. ??? */
058e97ec
VM
3234 if (hard_regno >= 0)
3235 {
3236 index = ira_class_hard_reg_index[rclass][hard_regno];
3237 ira_assert (index >= 0);
3238 }
3239 regno = ALLOCNO_REGNO (a);
3240 /* ??? conflict costs */
3241 subloop_allocno = subloop_node->regno_allocno_map[regno];
3242 if (subloop_allocno == NULL
3243 || ALLOCNO_CAP (subloop_allocno) != NULL)
3244 continue;
1756cb66 3245 ira_assert (ALLOCNO_CLASS (subloop_allocno) == rclass);
49d988e7
VM
3246 ira_assert (bitmap_bit_p (subloop_node->all_allocnos,
3247 ALLOCNO_NUM (subloop_allocno)));
bcb21886
KY
3248 if ((flag_ira_region == IRA_REGION_MIXED
3249 && (loop_tree_node->reg_pressure[pclass]
3250 <= ira_class_hard_regs_num[pclass]))
3251 || (pic_offset_table_rtx != NULL
3252 && regno == (int) REGNO (pic_offset_table_rtx)))
058e97ec
VM
3253 {
3254 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
3255 {
3256 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3257 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3258 if (hard_regno >= 0)
c73ccc80 3259 update_costs_from_copies (subloop_allocno, true, true);
2b9c63a2 3260 /* We don't need updated costs anymore. */
058e97ec
VM
3261 ira_free_allocno_updated_costs (subloop_allocno);
3262 }
3263 continue;
3264 }
3265 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3266 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3267 ira_assert (regno < ira_reg_equiv_len);
55a2c322 3268 if (ira_equiv_no_lvalue_p (regno))
058e97ec
VM
3269 {
3270 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
3271 {
3272 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3273 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3274 if (hard_regno >= 0)
c73ccc80 3275 update_costs_from_copies (subloop_allocno, true, true);
2b9c63a2 3276 /* We don't need updated costs anymore. */
058e97ec
VM
3277 ira_free_allocno_updated_costs (subloop_allocno);
3278 }
3279 }
3280 else if (hard_regno < 0)
3281 {
3282 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
3283 -= ((ira_memory_move_cost[mode][rclass][1] * enter_freq)
3284 + (ira_memory_move_cost[mode][rclass][0] * exit_freq));
3285 }
3286 else
3287 {
1756cb66
VM
3288 aclass = ALLOCNO_CLASS (subloop_allocno);
3289 ira_init_register_move_cost_if_necessary (mode);
3290 cost = (ira_register_move_cost[mode][rclass][rclass]
058e97ec 3291 * (exit_freq + enter_freq));
cb1ca6ac 3292 ira_allocate_and_set_or_copy_costs
1756cb66
VM
3293 (&ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno), aclass,
3294 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno),
cb1ca6ac
VM
3295 ALLOCNO_HARD_REG_COSTS (subloop_allocno));
3296 ira_allocate_and_set_or_copy_costs
3297 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno),
1756cb66 3298 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (subloop_allocno));
cb1ca6ac
VM
3299 ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index] -= cost;
3300 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno)[index]
058e97ec 3301 -= cost;
1756cb66 3302 if (ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 3303 > ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index])
1756cb66 3304 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 3305 = ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index];
058e97ec
VM
3306 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
3307 += (ira_memory_move_cost[mode][rclass][0] * enter_freq
3308 + ira_memory_move_cost[mode][rclass][1] * exit_freq);
058e97ec
VM
3309 }
3310 }
3311 }
1756cb66 3312 ira_free (allocno_color_data);
bf08fb16 3313 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
1756cb66
VM
3314 {
3315 a = ira_allocnos[j];
3316 ALLOCNO_ADD_DATA (a) = NULL;
1756cb66 3317 }
058e97ec
VM
3318}
3319
3320/* Initialize the common data for coloring and calls functions to do
3321 Chaitin-Briggs and regional coloring. */
3322static void
3323do_coloring (void)
3324{
3325 coloring_allocno_bitmap = ira_allocate_bitmap ();
058e97ec
VM
3326 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3327 fprintf (ira_dump_file, "\n**** Allocnos coloring:\n\n");
b8698a0f 3328
058e97ec
VM
3329 ira_traverse_loop_tree (false, ira_loop_tree_root, color_pass, NULL);
3330
3331 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
3332 ira_print_disposition (ira_dump_file);
3333
058e97ec 3334 ira_free_bitmap (coloring_allocno_bitmap);
058e97ec
VM
3335}
3336
3337\f
3338
3339/* Move spill/restore code, which are to be generated in ira-emit.c,
3340 to less frequent points (if it is profitable) by reassigning some
3341 allocnos (in loop with subloops containing in another loop) to
3342 memory which results in longer live-range where the corresponding
3343 pseudo-registers will be in memory. */
3344static void
3345move_spill_restore (void)
3346{
3347 int cost, regno, hard_regno, hard_regno2, index;
3348 bool changed_p;
3349 int enter_freq, exit_freq;
3350 enum machine_mode mode;
3351 enum reg_class rclass;
3352 ira_allocno_t a, parent_allocno, subloop_allocno;
3353 ira_loop_tree_node_t parent, loop_node, subloop_node;
3354 ira_allocno_iterator ai;
3355
3356 for (;;)
3357 {
3358 changed_p = false;
3359 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3360 fprintf (ira_dump_file, "New iteration of spill/restore move\n");
3361 FOR_EACH_ALLOCNO (a, ai)
3362 {
3363 regno = ALLOCNO_REGNO (a);
3364 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
3365 if (ALLOCNO_CAP_MEMBER (a) != NULL
3366 || ALLOCNO_CAP (a) != NULL
3367 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0
3368 || loop_node->children == NULL
3369 /* don't do the optimization because it can create
3370 copies and the reload pass can spill the allocno set
3371 by copy although the allocno will not get memory
3372 slot. */
55a2c322 3373 || ira_equiv_no_lvalue_p (regno)
058e97ec
VM
3374 || !bitmap_bit_p (loop_node->border_allocnos, ALLOCNO_NUM (a)))
3375 continue;
3376 mode = ALLOCNO_MODE (a);
1756cb66 3377 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
3378 index = ira_class_hard_reg_index[rclass][hard_regno];
3379 ira_assert (index >= 0);
3380 cost = (ALLOCNO_MEMORY_COST (a)
3381 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 3382 ? ALLOCNO_CLASS_COST (a)
058e97ec 3383 : ALLOCNO_HARD_REG_COSTS (a)[index]));
1756cb66 3384 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3385 for (subloop_node = loop_node->subloops;
3386 subloop_node != NULL;
3387 subloop_node = subloop_node->subloop_next)
3388 {
3389 ira_assert (subloop_node->bb == NULL);
3390 subloop_allocno = subloop_node->regno_allocno_map[regno];
3391 if (subloop_allocno == NULL)
3392 continue;
1756cb66 3393 ira_assert (rclass == ALLOCNO_CLASS (subloop_allocno));
058e97ec
VM
3394 /* We have accumulated cost. To get the real cost of
3395 allocno usage in the loop we should subtract costs of
3396 the subloop allocnos. */
3397 cost -= (ALLOCNO_MEMORY_COST (subloop_allocno)
3398 - (ALLOCNO_HARD_REG_COSTS (subloop_allocno) == NULL
1756cb66 3399 ? ALLOCNO_CLASS_COST (subloop_allocno)
058e97ec
VM
3400 : ALLOCNO_HARD_REG_COSTS (subloop_allocno)[index]));
3401 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3402 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3403 if ((hard_regno2 = ALLOCNO_HARD_REGNO (subloop_allocno)) < 0)
3404 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3405 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3406 else
3407 {
3408 cost
3409 += (ira_memory_move_cost[mode][rclass][0] * exit_freq
3410 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3411 if (hard_regno2 != hard_regno)
1756cb66 3412 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3413 * (exit_freq + enter_freq));
3414 }
3415 }
3416 if ((parent = loop_node->parent) != NULL
3417 && (parent_allocno = parent->regno_allocno_map[regno]) != NULL)
3418 {
1756cb66 3419 ira_assert (rclass == ALLOCNO_CLASS (parent_allocno));
058e97ec
VM
3420 exit_freq = ira_loop_edge_freq (loop_node, regno, true);
3421 enter_freq = ira_loop_edge_freq (loop_node, regno, false);
3422 if ((hard_regno2 = ALLOCNO_HARD_REGNO (parent_allocno)) < 0)
3423 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3424 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3425 else
3426 {
3427 cost
3428 += (ira_memory_move_cost[mode][rclass][1] * exit_freq
3429 + ira_memory_move_cost[mode][rclass][0] * enter_freq);
3430 if (hard_regno2 != hard_regno)
1756cb66 3431 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3432 * (exit_freq + enter_freq));
3433 }
3434 }
3435 if (cost < 0)
3436 {
3437 ALLOCNO_HARD_REGNO (a) = -1;
3438 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3439 {
3440 fprintf
3441 (ira_dump_file,
3442 " Moving spill/restore for a%dr%d up from loop %d",
2608d841 3443 ALLOCNO_NUM (a), regno, loop_node->loop_num);
058e97ec
VM
3444 fprintf (ira_dump_file, " - profit %d\n", -cost);
3445 }
3446 changed_p = true;
3447 }
3448 }
3449 if (! changed_p)
3450 break;
3451 }
3452}
3453
3454\f
3455
3456/* Update current hard reg costs and current conflict hard reg costs
3457 for allocno A. It is done by processing its copies containing
3458 other allocnos already assigned. */
3459static void
3460update_curr_costs (ira_allocno_t a)
3461{
3462 int i, hard_regno, cost;
3463 enum machine_mode mode;
1756cb66 3464 enum reg_class aclass, rclass;
058e97ec
VM
3465 ira_allocno_t another_a;
3466 ira_copy_t cp, next_cp;
3467
bdf0eb06 3468 ira_free_allocno_updated_costs (a);
058e97ec 3469 ira_assert (! ALLOCNO_ASSIGNED_P (a));
1756cb66
VM
3470 aclass = ALLOCNO_CLASS (a);
3471 if (aclass == NO_REGS)
058e97ec
VM
3472 return;
3473 mode = ALLOCNO_MODE (a);
1756cb66 3474 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3475 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3476 {
3477 if (cp->first == a)
3478 {
3479 next_cp = cp->next_first_allocno_copy;
3480 another_a = cp->second;
3481 }
3482 else if (cp->second == a)
3483 {
3484 next_cp = cp->next_second_allocno_copy;
3485 another_a = cp->first;
3486 }
3487 else
3488 gcc_unreachable ();
1756cb66 3489 if (! ira_reg_classes_intersect_p[aclass][ALLOCNO_CLASS (another_a)]
058e97ec
VM
3490 || ! ALLOCNO_ASSIGNED_P (another_a)
3491 || (hard_regno = ALLOCNO_HARD_REGNO (another_a)) < 0)
3492 continue;
3493 rclass = REGNO_REG_CLASS (hard_regno);
1756cb66 3494 i = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
3495 if (i < 0)
3496 continue;
058e97ec 3497 cost = (cp->first == a
1756cb66
VM
3498 ? ira_register_move_cost[mode][rclass][aclass]
3499 : ira_register_move_cost[mode][aclass][rclass]);
058e97ec 3500 ira_allocate_and_set_or_copy_costs
1756cb66 3501 (&ALLOCNO_UPDATED_HARD_REG_COSTS (a), aclass, ALLOCNO_CLASS_COST (a),
058e97ec
VM
3502 ALLOCNO_HARD_REG_COSTS (a));
3503 ira_allocate_and_set_or_copy_costs
3504 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a),
1756cb66 3505 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (a));
058e97ec
VM
3506 ALLOCNO_UPDATED_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3507 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3508 }
3509}
3510
058e97ec
VM
3511/* Try to assign hard registers to the unassigned allocnos and
3512 allocnos conflicting with them or conflicting with allocnos whose
3513 regno >= START_REGNO. The function is called after ira_flattening,
3514 so more allocnos (including ones created in ira-emit.c) will have a
3515 chance to get a hard register. We use simple assignment algorithm
3516 based on priorities. */
3517void
3518ira_reassign_conflict_allocnos (int start_regno)
3519{
3520 int i, allocnos_to_color_num;
fa86d337 3521 ira_allocno_t a;
1756cb66 3522 enum reg_class aclass;
058e97ec
VM
3523 bitmap allocnos_to_color;
3524 ira_allocno_iterator ai;
3525
3526 allocnos_to_color = ira_allocate_bitmap ();
3527 allocnos_to_color_num = 0;
3528 FOR_EACH_ALLOCNO (a, ai)
3529 {
ac0ab4f7 3530 int n = ALLOCNO_NUM_OBJECTS (a);
fa86d337 3531
058e97ec
VM
3532 if (! ALLOCNO_ASSIGNED_P (a)
3533 && ! bitmap_bit_p (allocnos_to_color, ALLOCNO_NUM (a)))
3534 {
1756cb66 3535 if (ALLOCNO_CLASS (a) != NO_REGS)
058e97ec
VM
3536 sorted_allocnos[allocnos_to_color_num++] = a;
3537 else
3538 {
3539 ALLOCNO_ASSIGNED_P (a) = true;
3540 ALLOCNO_HARD_REGNO (a) = -1;
3541 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
3542 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
3543 }
3544 bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (a));
3545 }
3546 if (ALLOCNO_REGNO (a) < start_regno
1756cb66 3547 || (aclass = ALLOCNO_CLASS (a)) == NO_REGS)
058e97ec 3548 continue;
ac0ab4f7 3549 for (i = 0; i < n; i++)
058e97ec 3550 {
ac0ab4f7
BS
3551 ira_object_t obj = ALLOCNO_OBJECT (a, i);
3552 ira_object_t conflict_obj;
3553 ira_object_conflict_iterator oci;
1756cb66 3554
ac0ab4f7
BS
3555 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
3556 {
3557 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66 3558
ac0ab4f7 3559 ira_assert (ira_reg_classes_intersect_p
1756cb66 3560 [aclass][ALLOCNO_CLASS (conflict_a)]);
fcaa4ca4 3561 if (!bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (conflict_a)))
ac0ab4f7 3562 continue;
ac0ab4f7
BS
3563 sorted_allocnos[allocnos_to_color_num++] = conflict_a;
3564 }
058e97ec
VM
3565 }
3566 }
3567 ira_free_bitmap (allocnos_to_color);
3568 if (allocnos_to_color_num > 1)
3569 {
1ae64b0f 3570 setup_allocno_priorities (sorted_allocnos, allocnos_to_color_num);
058e97ec
VM
3571 qsort (sorted_allocnos, allocnos_to_color_num, sizeof (ira_allocno_t),
3572 allocno_priority_compare_func);
3573 }
3574 for (i = 0; i < allocnos_to_color_num; i++)
3575 {
3576 a = sorted_allocnos[i];
3577 ALLOCNO_ASSIGNED_P (a) = false;
058e97ec
VM
3578 update_curr_costs (a);
3579 }
3580 for (i = 0; i < allocnos_to_color_num; i++)
3581 {
3582 a = sorted_allocnos[i];
3583 if (assign_hard_reg (a, true))
3584 {
3585 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3586 fprintf
3587 (ira_dump_file,
3588 " Secondary allocation: assign hard reg %d to reg %d\n",
3589 ALLOCNO_HARD_REGNO (a), ALLOCNO_REGNO (a));
3590 }
3591 }
3592}
3593
3594\f
3595
1756cb66
VM
3596/* This page contains functions used to find conflicts using allocno
3597 live ranges. */
3598
1756cb66
VM
3599#ifdef ENABLE_IRA_CHECKING
3600
3601/* Return TRUE if live ranges of pseudo-registers REGNO1 and REGNO2
3602 intersect. This should be used when there is only one region.
3603 Currently this is used during reload. */
3604static bool
3605conflict_by_live_ranges_p (int regno1, int regno2)
3606{
3607 ira_allocno_t a1, a2;
3608
3609 ira_assert (regno1 >= FIRST_PSEUDO_REGISTER
3610 && regno2 >= FIRST_PSEUDO_REGISTER);
3611 /* Reg info caclulated by dataflow infrastructure can be different
3612 from one calculated by regclass. */
3613 if ((a1 = ira_loop_tree_root->regno_allocno_map[regno1]) == NULL
3614 || (a2 = ira_loop_tree_root->regno_allocno_map[regno2]) == NULL)
3615 return false;
3616 return allocnos_conflict_by_live_ranges_p (a1, a2);
3617}
3618
3619#endif
3620
3621\f
3622
058e97ec
VM
3623/* This page contains code to coalesce memory stack slots used by
3624 spilled allocnos. This results in smaller stack frame, better data
3625 locality, and in smaller code for some architectures like
3626 x86/x86_64 where insn size depends on address displacement value.
3627 On the other hand, it can worsen insn scheduling after the RA but
3628 in practice it is less important than smaller stack frames. */
3629
22b0982c
VM
3630/* TRUE if we coalesced some allocnos. In other words, if we got
3631 loops formed by members first_coalesced_allocno and
3632 next_coalesced_allocno containing more one allocno. */
3633static bool allocno_coalesced_p;
3634
3635/* Bitmap used to prevent a repeated allocno processing because of
3636 coalescing. */
3637static bitmap processed_coalesced_allocno_bitmap;
3638
1756cb66
VM
3639/* See below. */
3640typedef struct coalesce_data *coalesce_data_t;
3641
3642/* To decrease footprint of ira_allocno structure we store all data
3643 needed only for coalescing in the following structure. */
3644struct coalesce_data
3645{
3646 /* Coalesced allocnos form a cyclic list. One allocno given by
3647 FIRST represents all coalesced allocnos. The
3648 list is chained by NEXT. */
3649 ira_allocno_t first;
3650 ira_allocno_t next;
3651 int temp;
3652};
3653
3654/* Container for storing allocno data concerning coalescing. */
3655static coalesce_data_t allocno_coalesce_data;
3656
3657/* Macro to access the data concerning coalescing. */
3658#define ALLOCNO_COALESCE_DATA(a) ((coalesce_data_t) ALLOCNO_ADD_DATA (a))
3659
22b0982c
VM
3660/* Merge two sets of coalesced allocnos given correspondingly by
3661 allocnos A1 and A2 (more accurately merging A2 set into A1
3662 set). */
3663static void
3664merge_allocnos (ira_allocno_t a1, ira_allocno_t a2)
3665{
3666 ira_allocno_t a, first, last, next;
3667
1756cb66
VM
3668 first = ALLOCNO_COALESCE_DATA (a1)->first;
3669 a = ALLOCNO_COALESCE_DATA (a2)->first;
3670 if (first == a)
22b0982c 3671 return;
1756cb66
VM
3672 for (last = a2, a = ALLOCNO_COALESCE_DATA (a2)->next;;
3673 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3674 {
1756cb66 3675 ALLOCNO_COALESCE_DATA (a)->first = first;
22b0982c
VM
3676 if (a == a2)
3677 break;
3678 last = a;
3679 }
1756cb66
VM
3680 next = allocno_coalesce_data[ALLOCNO_NUM (first)].next;
3681 allocno_coalesce_data[ALLOCNO_NUM (first)].next = a2;
3682 allocno_coalesce_data[ALLOCNO_NUM (last)].next = next;
22b0982c
VM
3683}
3684
1756cb66
VM
3685/* Return TRUE if there are conflicting allocnos from two sets of
3686 coalesced allocnos given correspondingly by allocnos A1 and A2. We
3687 use live ranges to find conflicts because conflicts are represented
3688 only for allocnos of the same allocno class and during the reload
3689 pass we coalesce allocnos for sharing stack memory slots. */
22b0982c
VM
3690static bool
3691coalesced_allocno_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
3692{
1756cb66 3693 ira_allocno_t a, conflict_a;
22b0982c 3694
22b0982c
VM
3695 if (allocno_coalesced_p)
3696 {
1756cb66
VM
3697 bitmap_clear (processed_coalesced_allocno_bitmap);
3698 for (a = ALLOCNO_COALESCE_DATA (a1)->next;;
3699 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3700 {
1756cb66 3701 bitmap_set_bit (processed_coalesced_allocno_bitmap, ALLOCNO_NUM (a));
22b0982c
VM
3702 if (a == a1)
3703 break;
3704 }
3705 }
1756cb66
VM
3706 for (a = ALLOCNO_COALESCE_DATA (a2)->next;;
3707 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3708 {
1756cb66
VM
3709 for (conflict_a = ALLOCNO_COALESCE_DATA (a1)->next;;
3710 conflict_a = ALLOCNO_COALESCE_DATA (conflict_a)->next)
22b0982c 3711 {
1756cb66 3712 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
22b0982c 3713 return true;
1756cb66 3714 if (conflict_a == a1)
22b0982c
VM
3715 break;
3716 }
22b0982c
VM
3717 if (a == a2)
3718 break;
3719 }
3720 return false;
3721}
3722
3723/* The major function for aggressive allocno coalescing. We coalesce
3724 only spilled allocnos. If some allocnos have been coalesced, we
3725 set up flag allocno_coalesced_p. */
3726static void
3727coalesce_allocnos (void)
3728{
3729 ira_allocno_t a;
bf08fb16 3730 ira_copy_t cp, next_cp;
22b0982c
VM
3731 unsigned int j;
3732 int i, n, cp_num, regno;
3733 bitmap_iterator bi;
3734
22b0982c
VM
3735 cp_num = 0;
3736 /* Collect copies. */
3737 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, j, bi)
3738 {
3739 a = ira_allocnos[j];
3740 regno = ALLOCNO_REGNO (a);
3741 if (! ALLOCNO_ASSIGNED_P (a) || ALLOCNO_HARD_REGNO (a) >= 0
55a2c322 3742 || ira_equiv_no_lvalue_p (regno))
22b0982c
VM
3743 continue;
3744 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3745 {
3746 if (cp->first == a)
3747 {
3748 next_cp = cp->next_first_allocno_copy;
3749 regno = ALLOCNO_REGNO (cp->second);
3750 /* For priority coloring we coalesce allocnos only with
1756cb66 3751 the same allocno class not with intersected allocno
22b0982c
VM
3752 classes as it were possible. It is done for
3753 simplicity. */
3754 if ((cp->insn != NULL || cp->constraint_p)
3755 && ALLOCNO_ASSIGNED_P (cp->second)
3756 && ALLOCNO_HARD_REGNO (cp->second) < 0
55a2c322 3757 && ! ira_equiv_no_lvalue_p (regno))
22b0982c
VM
3758 sorted_copies[cp_num++] = cp;
3759 }
3760 else if (cp->second == a)
3761 next_cp = cp->next_second_allocno_copy;
3762 else
3763 gcc_unreachable ();
3764 }
3765 }
3766 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
3767 /* Coalesced copies, most frequently executed first. */
3768 for (; cp_num != 0;)
3769 {
3770 for (i = 0; i < cp_num; i++)
3771 {
3772 cp = sorted_copies[i];
3773 if (! coalesced_allocno_conflict_p (cp->first, cp->second))
3774 {
3775 allocno_coalesced_p = true;
3776 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3777 fprintf
3778 (ira_dump_file,
3779 " Coalescing copy %d:a%dr%d-a%dr%d (freq=%d)\n",
3780 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
3781 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
3782 cp->freq);
3783 merge_allocnos (cp->first, cp->second);
3784 i++;
3785 break;
3786 }
3787 }
3788 /* Collect the rest of copies. */
3789 for (n = 0; i < cp_num; i++)
3790 {
3791 cp = sorted_copies[i];
1756cb66
VM
3792 if (allocno_coalesce_data[ALLOCNO_NUM (cp->first)].first
3793 != allocno_coalesce_data[ALLOCNO_NUM (cp->second)].first)
22b0982c
VM
3794 sorted_copies[n++] = cp;
3795 }
3796 cp_num = n;
3797 }
22b0982c
VM
3798}
3799
058e97ec
VM
3800/* Usage cost and order number of coalesced allocno set to which
3801 given pseudo register belongs to. */
3802static int *regno_coalesced_allocno_cost;
3803static int *regno_coalesced_allocno_num;
3804
3805/* Sort pseudos according frequencies of coalesced allocno sets they
3806 belong to (putting most frequently ones first), and according to
3807 coalesced allocno set order numbers. */
3808static int
3809coalesced_pseudo_reg_freq_compare (const void *v1p, const void *v2p)
3810{
3811 const int regno1 = *(const int *) v1p;
3812 const int regno2 = *(const int *) v2p;
3813 int diff;
3814
3815 if ((diff = (regno_coalesced_allocno_cost[regno2]
3816 - regno_coalesced_allocno_cost[regno1])) != 0)
3817 return diff;
3818 if ((diff = (regno_coalesced_allocno_num[regno1]
3819 - regno_coalesced_allocno_num[regno2])) != 0)
3820 return diff;
3821 return regno1 - regno2;
3822}
3823
3824/* Widest width in which each pseudo reg is referred to (via subreg).
3825 It is used for sorting pseudo registers. */
3826static unsigned int *regno_max_ref_width;
3827
3828/* Redefine STACK_GROWS_DOWNWARD in terms of 0 or 1. */
3829#ifdef STACK_GROWS_DOWNWARD
3830# undef STACK_GROWS_DOWNWARD
3831# define STACK_GROWS_DOWNWARD 1
3832#else
3833# define STACK_GROWS_DOWNWARD 0
3834#endif
3835
3836/* Sort pseudos according their slot numbers (putting ones with
3837 smaller numbers first, or last when the frame pointer is not
3838 needed). */
3839static int
3840coalesced_pseudo_reg_slot_compare (const void *v1p, const void *v2p)
3841{
3842 const int regno1 = *(const int *) v1p;
3843 const int regno2 = *(const int *) v2p;
3844 ira_allocno_t a1 = ira_regno_allocno_map[regno1];
3845 ira_allocno_t a2 = ira_regno_allocno_map[regno2];
3846 int diff, slot_num1, slot_num2;
3847 int total_size1, total_size2;
3848
3849 if (a1 == NULL || ALLOCNO_HARD_REGNO (a1) >= 0)
3850 {
3851 if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
004a6ce8 3852 return regno1 - regno2;
058e97ec
VM
3853 return 1;
3854 }
3855 else if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
3856 return -1;
3857 slot_num1 = -ALLOCNO_HARD_REGNO (a1);
3858 slot_num2 = -ALLOCNO_HARD_REGNO (a2);
3859 if ((diff = slot_num1 - slot_num2) != 0)
3860 return (frame_pointer_needed
e0bf0dc2 3861 || (!FRAME_GROWS_DOWNWARD) == STACK_GROWS_DOWNWARD ? diff : -diff);
1756cb66
VM
3862 total_size1 = MAX (PSEUDO_REGNO_BYTES (regno1),
3863 regno_max_ref_width[regno1]);
3864 total_size2 = MAX (PSEUDO_REGNO_BYTES (regno2),
3865 regno_max_ref_width[regno2]);
058e97ec
VM
3866 if ((diff = total_size2 - total_size1) != 0)
3867 return diff;
004a6ce8 3868 return regno1 - regno2;
058e97ec
VM
3869}
3870
3871/* Setup REGNO_COALESCED_ALLOCNO_COST and REGNO_COALESCED_ALLOCNO_NUM
3872 for coalesced allocno sets containing allocnos with their regnos
3873 given in array PSEUDO_REGNOS of length N. */
3874static void
3875setup_coalesced_allocno_costs_and_nums (int *pseudo_regnos, int n)
3876{
3877 int i, num, regno, cost;
3878 ira_allocno_t allocno, a;
3879
3880 for (num = i = 0; i < n; i++)
3881 {
3882 regno = pseudo_regnos[i];
3883 allocno = ira_regno_allocno_map[regno];
3884 if (allocno == NULL)
3885 {
3886 regno_coalesced_allocno_cost[regno] = 0;
3887 regno_coalesced_allocno_num[regno] = ++num;
3888 continue;
3889 }
1756cb66 3890 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
3891 continue;
3892 num++;
1756cb66
VM
3893 for (cost = 0, a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3894 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3895 {
3896 cost += ALLOCNO_FREQ (a);
3897 if (a == allocno)
3898 break;
3899 }
1756cb66
VM
3900 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3901 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3902 {
3903 regno_coalesced_allocno_num[ALLOCNO_REGNO (a)] = num;
3904 regno_coalesced_allocno_cost[ALLOCNO_REGNO (a)] = cost;
3905 if (a == allocno)
3906 break;
3907 }
3908 }
3909}
3910
3911/* Collect spilled allocnos representing coalesced allocno sets (the
3912 first coalesced allocno). The collected allocnos are returned
3913 through array SPILLED_COALESCED_ALLOCNOS. The function returns the
3914 number of the collected allocnos. The allocnos are given by their
3915 regnos in array PSEUDO_REGNOS of length N. */
3916static int
3917collect_spilled_coalesced_allocnos (int *pseudo_regnos, int n,
3918 ira_allocno_t *spilled_coalesced_allocnos)
3919{
3920 int i, num, regno;
3921 ira_allocno_t allocno;
3922
3923 for (num = i = 0; i < n; i++)
3924 {
3925 regno = pseudo_regnos[i];
3926 allocno = ira_regno_allocno_map[regno];
3927 if (allocno == NULL || ALLOCNO_HARD_REGNO (allocno) >= 0
1756cb66 3928 || ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
3929 continue;
3930 spilled_coalesced_allocnos[num++] = allocno;
3931 }
3932 return num;
3933}
3934
3553f0bb
VM
3935/* Array of live ranges of size IRA_ALLOCNOS_NUM. Live range for
3936 given slot contains live ranges of coalesced allocnos assigned to
3937 given slot. */
b14151b5 3938static live_range_t *slot_coalesced_allocnos_live_ranges;
b15a7ae6 3939
3553f0bb
VM
3940/* Return TRUE if coalesced allocnos represented by ALLOCNO has live
3941 ranges intersected with live ranges of coalesced allocnos assigned
3942 to slot with number N. */
b15a7ae6 3943static bool
3553f0bb 3944slot_coalesced_allocno_live_ranges_intersect_p (ira_allocno_t allocno, int n)
b15a7ae6 3945{
b15a7ae6 3946 ira_allocno_t a;
b15a7ae6 3947
1756cb66
VM
3948 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3949 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 3950 {
ac0ab4f7
BS
3951 int i;
3952 int nr = ALLOCNO_NUM_OBJECTS (a);
1756cb66 3953
ac0ab4f7
BS
3954 for (i = 0; i < nr; i++)
3955 {
3956 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66
VM
3957
3958 if (ira_live_ranges_intersect_p
3959 (slot_coalesced_allocnos_live_ranges[n],
3960 OBJECT_LIVE_RANGES (obj)))
ac0ab4f7
BS
3961 return true;
3962 }
b15a7ae6
VM
3963 if (a == allocno)
3964 break;
3965 }
3966 return false;
3967}
3968
3553f0bb
VM
3969/* Update live ranges of slot to which coalesced allocnos represented
3970 by ALLOCNO were assigned. */
b15a7ae6 3971static void
3553f0bb 3972setup_slot_coalesced_allocno_live_ranges (ira_allocno_t allocno)
b15a7ae6 3973{
ac0ab4f7 3974 int i, n;
b15a7ae6 3975 ira_allocno_t a;
b14151b5 3976 live_range_t r;
b15a7ae6 3977
1756cb66
VM
3978 n = ALLOCNO_COALESCE_DATA (allocno)->temp;
3979 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3980 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 3981 {
ac0ab4f7
BS
3982 int nr = ALLOCNO_NUM_OBJECTS (a);
3983 for (i = 0; i < nr; i++)
3984 {
3985 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66 3986
ac0ab4f7
BS
3987 r = ira_copy_live_range_list (OBJECT_LIVE_RANGES (obj));
3988 slot_coalesced_allocnos_live_ranges[n]
3989 = ira_merge_live_ranges
1756cb66 3990 (slot_coalesced_allocnos_live_ranges[n], r);
ac0ab4f7 3991 }
b15a7ae6
VM
3992 if (a == allocno)
3993 break;
3994 }
3995}
3996
058e97ec
VM
3997/* We have coalesced allocnos involving in copies. Coalesce allocnos
3998 further in order to share the same memory stack slot. Allocnos
3999 representing sets of allocnos coalesced before the call are given
4000 in array SPILLED_COALESCED_ALLOCNOS of length NUM. Return TRUE if
4001 some allocnos were coalesced in the function. */
4002static bool
4003coalesce_spill_slots (ira_allocno_t *spilled_coalesced_allocnos, int num)
4004{
3553f0bb 4005 int i, j, n, last_coalesced_allocno_num;
058e97ec
VM
4006 ira_allocno_t allocno, a;
4007 bool merged_p = false;
1240d76e 4008 bitmap set_jump_crosses = regstat_get_setjmp_crosses ();
058e97ec 4009
3553f0bb 4010 slot_coalesced_allocnos_live_ranges
b14151b5 4011 = (live_range_t *) ira_allocate (sizeof (live_range_t) * ira_allocnos_num);
3553f0bb 4012 memset (slot_coalesced_allocnos_live_ranges, 0,
b14151b5 4013 sizeof (live_range_t) * ira_allocnos_num);
b15a7ae6 4014 last_coalesced_allocno_num = 0;
058e97ec
VM
4015 /* Coalesce non-conflicting spilled allocnos preferring most
4016 frequently used. */
4017 for (i = 0; i < num; i++)
4018 {
4019 allocno = spilled_coalesced_allocnos[i];
1756cb66 4020 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
1240d76e 4021 || bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (allocno))
55a2c322 4022 || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno)))
058e97ec
VM
4023 continue;
4024 for (j = 0; j < i; j++)
4025 {
4026 a = spilled_coalesced_allocnos[j];
1756cb66
VM
4027 n = ALLOCNO_COALESCE_DATA (a)->temp;
4028 if (ALLOCNO_COALESCE_DATA (a)->first == a
1240d76e 4029 && ! bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (a))
55a2c322 4030 && ! ira_equiv_no_lvalue_p (ALLOCNO_REGNO (a))
3553f0bb 4031 && ! slot_coalesced_allocno_live_ranges_intersect_p (allocno, n))
b15a7ae6
VM
4032 break;
4033 }
4034 if (j >= i)
4035 {
4036 /* No coalescing: set up number for coalesced allocnos
4037 represented by ALLOCNO. */
1756cb66 4038 ALLOCNO_COALESCE_DATA (allocno)->temp = last_coalesced_allocno_num++;
3553f0bb 4039 setup_slot_coalesced_allocno_live_ranges (allocno);
b15a7ae6
VM
4040 }
4041 else
4042 {
058e97ec
VM
4043 allocno_coalesced_p = true;
4044 merged_p = true;
4045 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4046 fprintf (ira_dump_file,
4047 " Coalescing spilled allocnos a%dr%d->a%dr%d\n",
4048 ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno),
4049 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
1756cb66
VM
4050 ALLOCNO_COALESCE_DATA (allocno)->temp
4051 = ALLOCNO_COALESCE_DATA (a)->temp;
3553f0bb 4052 setup_slot_coalesced_allocno_live_ranges (allocno);
058e97ec 4053 merge_allocnos (a, allocno);
1756cb66 4054 ira_assert (ALLOCNO_COALESCE_DATA (a)->first == a);
058e97ec
VM
4055 }
4056 }
3553f0bb 4057 for (i = 0; i < ira_allocnos_num; i++)
9140d27b 4058 ira_finish_live_range_list (slot_coalesced_allocnos_live_ranges[i]);
3553f0bb 4059 ira_free (slot_coalesced_allocnos_live_ranges);
058e97ec
VM
4060 return merged_p;
4061}
4062
4063/* Sort pseudo-register numbers in array PSEUDO_REGNOS of length N for
4064 subsequent assigning stack slots to them in the reload pass. To do
4065 this we coalesce spilled allocnos first to decrease the number of
4066 memory-memory move insns. This function is called by the
4067 reload. */
4068void
4069ira_sort_regnos_for_alter_reg (int *pseudo_regnos, int n,
4070 unsigned int *reg_max_ref_width)
4071{
4072 int max_regno = max_reg_num ();
4073 int i, regno, num, slot_num;
4074 ira_allocno_t allocno, a;
4075 ira_allocno_iterator ai;
4076 ira_allocno_t *spilled_coalesced_allocnos;
4077
9994ad20
KC
4078 ira_assert (! ira_use_lra_p);
4079
058e97ec
VM
4080 /* Set up allocnos can be coalesced. */
4081 coloring_allocno_bitmap = ira_allocate_bitmap ();
4082 for (i = 0; i < n; i++)
4083 {
4084 regno = pseudo_regnos[i];
4085 allocno = ira_regno_allocno_map[regno];
4086 if (allocno != NULL)
1756cb66 4087 bitmap_set_bit (coloring_allocno_bitmap, ALLOCNO_NUM (allocno));
058e97ec
VM
4088 }
4089 allocno_coalesced_p = false;
22b0982c 4090 processed_coalesced_allocno_bitmap = ira_allocate_bitmap ();
1756cb66
VM
4091 allocno_coalesce_data
4092 = (coalesce_data_t) ira_allocate (sizeof (struct coalesce_data)
4093 * ira_allocnos_num);
4094 /* Initialize coalesce data for allocnos. */
4095 FOR_EACH_ALLOCNO (a, ai)
4096 {
4097 ALLOCNO_ADD_DATA (a) = allocno_coalesce_data + ALLOCNO_NUM (a);
4098 ALLOCNO_COALESCE_DATA (a)->first = a;
4099 ALLOCNO_COALESCE_DATA (a)->next = a;
4100 }
22b0982c 4101 coalesce_allocnos ();
058e97ec
VM
4102 ira_free_bitmap (coloring_allocno_bitmap);
4103 regno_coalesced_allocno_cost
4104 = (int *) ira_allocate (max_regno * sizeof (int));
4105 regno_coalesced_allocno_num
4106 = (int *) ira_allocate (max_regno * sizeof (int));
4107 memset (regno_coalesced_allocno_num, 0, max_regno * sizeof (int));
4108 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
4109 /* Sort regnos according frequencies of the corresponding coalesced
4110 allocno sets. */
4111 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_freq_compare);
4112 spilled_coalesced_allocnos
4113 = (ira_allocno_t *) ira_allocate (ira_allocnos_num
4114 * sizeof (ira_allocno_t));
4115 /* Collect allocnos representing the spilled coalesced allocno
4116 sets. */
4117 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
4118 spilled_coalesced_allocnos);
4119 if (flag_ira_share_spill_slots
4120 && coalesce_spill_slots (spilled_coalesced_allocnos, num))
4121 {
4122 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
4123 qsort (pseudo_regnos, n, sizeof (int),
4124 coalesced_pseudo_reg_freq_compare);
4125 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
4126 spilled_coalesced_allocnos);
4127 }
4128 ira_free_bitmap (processed_coalesced_allocno_bitmap);
4129 allocno_coalesced_p = false;
4130 /* Assign stack slot numbers to spilled allocno sets, use smaller
4131 numbers for most frequently used coalesced allocnos. -1 is
4132 reserved for dynamic search of stack slots for pseudos spilled by
4133 the reload. */
4134 slot_num = 1;
4135 for (i = 0; i < num; i++)
4136 {
4137 allocno = spilled_coalesced_allocnos[i];
1756cb66 4138 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
058e97ec 4139 || ALLOCNO_HARD_REGNO (allocno) >= 0
55a2c322 4140 || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno)))
058e97ec
VM
4141 continue;
4142 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4143 fprintf (ira_dump_file, " Slot %d (freq,size):", slot_num);
4144 slot_num++;
1756cb66
VM
4145 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4146 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
4147 {
4148 ira_assert (ALLOCNO_HARD_REGNO (a) < 0);
4149 ALLOCNO_HARD_REGNO (a) = -slot_num;
4150 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4151 fprintf (ira_dump_file, " a%dr%d(%d,%d)",
4152 ALLOCNO_NUM (a), ALLOCNO_REGNO (a), ALLOCNO_FREQ (a),
4153 MAX (PSEUDO_REGNO_BYTES (ALLOCNO_REGNO (a)),
4154 reg_max_ref_width[ALLOCNO_REGNO (a)]));
b8698a0f 4155
058e97ec
VM
4156 if (a == allocno)
4157 break;
4158 }
4159 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4160 fprintf (ira_dump_file, "\n");
4161 }
4162 ira_spilled_reg_stack_slots_num = slot_num - 1;
4163 ira_free (spilled_coalesced_allocnos);
4164 /* Sort regnos according the slot numbers. */
4165 regno_max_ref_width = reg_max_ref_width;
4166 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_slot_compare);
058e97ec 4167 FOR_EACH_ALLOCNO (a, ai)
1756cb66
VM
4168 ALLOCNO_ADD_DATA (a) = NULL;
4169 ira_free (allocno_coalesce_data);
058e97ec
VM
4170 ira_free (regno_coalesced_allocno_num);
4171 ira_free (regno_coalesced_allocno_cost);
4172}
4173
4174\f
4175
4176/* This page contains code used by the reload pass to improve the
4177 final code. */
4178
4179/* The function is called from reload to mark changes in the
4180 allocation of REGNO made by the reload. Remember that reg_renumber
4181 reflects the change result. */
4182void
4183ira_mark_allocation_change (int regno)
4184{
4185 ira_allocno_t a = ira_regno_allocno_map[regno];
4186 int old_hard_regno, hard_regno, cost;
1756cb66 4187 enum reg_class aclass = ALLOCNO_CLASS (a);
058e97ec
VM
4188
4189 ira_assert (a != NULL);
4190 hard_regno = reg_renumber[regno];
4191 if ((old_hard_regno = ALLOCNO_HARD_REGNO (a)) == hard_regno)
4192 return;
4193 if (old_hard_regno < 0)
4194 cost = -ALLOCNO_MEMORY_COST (a);
4195 else
4196 {
1756cb66 4197 ira_assert (ira_class_hard_reg_index[aclass][old_hard_regno] >= 0);
058e97ec 4198 cost = -(ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 4199 ? ALLOCNO_CLASS_COST (a)
058e97ec 4200 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 4201 [ira_class_hard_reg_index[aclass][old_hard_regno]]);
c73ccc80 4202 update_costs_from_copies (a, false, false);
058e97ec
VM
4203 }
4204 ira_overall_cost -= cost;
4205 ALLOCNO_HARD_REGNO (a) = hard_regno;
4206 if (hard_regno < 0)
4207 {
4208 ALLOCNO_HARD_REGNO (a) = -1;
4209 cost += ALLOCNO_MEMORY_COST (a);
4210 }
1756cb66 4211 else if (ira_class_hard_reg_index[aclass][hard_regno] >= 0)
058e97ec
VM
4212 {
4213 cost += (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 4214 ? ALLOCNO_CLASS_COST (a)
058e97ec 4215 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 4216 [ira_class_hard_reg_index[aclass][hard_regno]]);
c73ccc80 4217 update_costs_from_copies (a, true, false);
058e97ec
VM
4218 }
4219 else
4220 /* Reload changed class of the allocno. */
4221 cost = 0;
4222 ira_overall_cost += cost;
4223}
4224
4225/* This function is called when reload deletes memory-memory move. In
4226 this case we marks that the allocation of the corresponding
4227 allocnos should be not changed in future. Otherwise we risk to get
4228 a wrong code. */
4229void
4230ira_mark_memory_move_deletion (int dst_regno, int src_regno)
4231{
4232 ira_allocno_t dst = ira_regno_allocno_map[dst_regno];
4233 ira_allocno_t src = ira_regno_allocno_map[src_regno];
4234
4235 ira_assert (dst != NULL && src != NULL
4236 && ALLOCNO_HARD_REGNO (dst) < 0
4237 && ALLOCNO_HARD_REGNO (src) < 0);
4238 ALLOCNO_DONT_REASSIGN_P (dst) = true;
4239 ALLOCNO_DONT_REASSIGN_P (src) = true;
4240}
4241
4242/* Try to assign a hard register (except for FORBIDDEN_REGS) to
3631be48 4243 allocno A and return TRUE in the case of success. */
058e97ec
VM
4244static bool
4245allocno_reload_assign (ira_allocno_t a, HARD_REG_SET forbidden_regs)
4246{
4247 int hard_regno;
1756cb66 4248 enum reg_class aclass;
058e97ec 4249 int regno = ALLOCNO_REGNO (a);
ac0ab4f7
BS
4250 HARD_REG_SET saved[2];
4251 int i, n;
058e97ec 4252
ac0ab4f7
BS
4253 n = ALLOCNO_NUM_OBJECTS (a);
4254 for (i = 0; i < n; i++)
4255 {
4256 ira_object_t obj = ALLOCNO_OBJECT (a, i);
4257 COPY_HARD_REG_SET (saved[i], OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
4258 IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), forbidden_regs);
4259 if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
4260 IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
4261 call_used_reg_set);
4262 }
058e97ec 4263 ALLOCNO_ASSIGNED_P (a) = false;
1756cb66 4264 aclass = ALLOCNO_CLASS (a);
058e97ec
VM
4265 update_curr_costs (a);
4266 assign_hard_reg (a, true);
4267 hard_regno = ALLOCNO_HARD_REGNO (a);
4268 reg_renumber[regno] = hard_regno;
4269 if (hard_regno < 0)
4270 ALLOCNO_HARD_REGNO (a) = -1;
4271 else
4272 {
1756cb66
VM
4273 ira_assert (ira_class_hard_reg_index[aclass][hard_regno] >= 0);
4274 ira_overall_cost
4275 -= (ALLOCNO_MEMORY_COST (a)
4276 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
4277 ? ALLOCNO_CLASS_COST (a)
4278 : ALLOCNO_HARD_REG_COSTS (a)[ira_class_hard_reg_index
4279 [aclass][hard_regno]]));
058e97ec 4280 if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0
9181a6e5
VM
4281 && ira_hard_reg_set_intersection_p (hard_regno, ALLOCNO_MODE (a),
4282 call_used_reg_set))
058e97ec
VM
4283 {
4284 ira_assert (flag_caller_saves);
4285 caller_save_needed = 1;
4286 }
4287 }
4288
4289 /* If we found a hard register, modify the RTL for the pseudo
4290 register to show the hard register, and mark the pseudo register
4291 live. */
4292 if (reg_renumber[regno] >= 0)
4293 {
4294 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4295 fprintf (ira_dump_file, ": reassign to %d\n", reg_renumber[regno]);
4296 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
4297 mark_home_live (regno);
4298 }
4299 else if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4300 fprintf (ira_dump_file, "\n");
ac0ab4f7
BS
4301 for (i = 0; i < n; i++)
4302 {
4303 ira_object_t obj = ALLOCNO_OBJECT (a, i);
4304 COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), saved[i]);
4305 }
058e97ec
VM
4306 return reg_renumber[regno] >= 0;
4307}
4308
4309/* Sort pseudos according their usage frequencies (putting most
4310 frequently ones first). */
4311static int
4312pseudo_reg_compare (const void *v1p, const void *v2p)
4313{
4314 int regno1 = *(const int *) v1p;
4315 int regno2 = *(const int *) v2p;
4316 int diff;
4317
4318 if ((diff = REG_FREQ (regno2) - REG_FREQ (regno1)) != 0)
4319 return diff;
4320 return regno1 - regno2;
4321}
4322
4323/* Try to allocate hard registers to SPILLED_PSEUDO_REGS (there are
4324 NUM of them) or spilled pseudos conflicting with pseudos in
4325 SPILLED_PSEUDO_REGS. Return TRUE and update SPILLED, if the
4326 allocation has been changed. The function doesn't use
4327 BAD_SPILL_REGS and hard registers in PSEUDO_FORBIDDEN_REGS and
4328 PSEUDO_PREVIOUS_REGS for the corresponding pseudos. The function
4329 is called by the reload pass at the end of each reload
4330 iteration. */
4331bool
4332ira_reassign_pseudos (int *spilled_pseudo_regs, int num,
4333 HARD_REG_SET bad_spill_regs,
4334 HARD_REG_SET *pseudo_forbidden_regs,
6190446b
JL
4335 HARD_REG_SET *pseudo_previous_regs,
4336 bitmap spilled)
058e97ec 4337{
016f9d9d 4338 int i, n, regno;
058e97ec 4339 bool changed_p;
fa86d337 4340 ira_allocno_t a;
058e97ec 4341 HARD_REG_SET forbidden_regs;
6190446b
JL
4342 bitmap temp = BITMAP_ALLOC (NULL);
4343
4344 /* Add pseudos which conflict with pseudos already in
4345 SPILLED_PSEUDO_REGS to SPILLED_PSEUDO_REGS. This is preferable
4346 to allocating in two steps as some of the conflicts might have
4347 a higher priority than the pseudos passed in SPILLED_PSEUDO_REGS. */
4348 for (i = 0; i < num; i++)
4349 bitmap_set_bit (temp, spilled_pseudo_regs[i]);
4350
4351 for (i = 0, n = num; i < n; i++)
4352 {
ac0ab4f7 4353 int nr, j;
6190446b
JL
4354 int regno = spilled_pseudo_regs[i];
4355 bitmap_set_bit (temp, regno);
4356
4357 a = ira_regno_allocno_map[regno];
ac0ab4f7
BS
4358 nr = ALLOCNO_NUM_OBJECTS (a);
4359 for (j = 0; j < nr; j++)
fa86d337 4360 {
ac0ab4f7
BS
4361 ira_object_t conflict_obj;
4362 ira_object_t obj = ALLOCNO_OBJECT (a, j);
4363 ira_object_conflict_iterator oci;
4364
4365 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
fa86d337 4366 {
ac0ab4f7
BS
4367 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
4368 if (ALLOCNO_HARD_REGNO (conflict_a) < 0
4369 && ! ALLOCNO_DONT_REASSIGN_P (conflict_a)
fcaa4ca4 4370 && bitmap_set_bit (temp, ALLOCNO_REGNO (conflict_a)))
ac0ab4f7
BS
4371 {
4372 spilled_pseudo_regs[num++] = ALLOCNO_REGNO (conflict_a);
ac0ab4f7
BS
4373 /* ?!? This seems wrong. */
4374 bitmap_set_bit (consideration_allocno_bitmap,
4375 ALLOCNO_NUM (conflict_a));
4376 }
fa86d337
BS
4377 }
4378 }
6190446b 4379 }
058e97ec
VM
4380
4381 if (num > 1)
4382 qsort (spilled_pseudo_regs, num, sizeof (int), pseudo_reg_compare);
4383 changed_p = false;
4384 /* Try to assign hard registers to pseudos from
4385 SPILLED_PSEUDO_REGS. */
016f9d9d 4386 for (i = 0; i < num; i++)
058e97ec
VM
4387 {
4388 regno = spilled_pseudo_regs[i];
4389 COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs);
4390 IOR_HARD_REG_SET (forbidden_regs, pseudo_forbidden_regs[regno]);
4391 IOR_HARD_REG_SET (forbidden_regs, pseudo_previous_regs[regno]);
4392 gcc_assert (reg_renumber[regno] < 0);
4393 a = ira_regno_allocno_map[regno];
4394 ira_mark_allocation_change (regno);
4395 ira_assert (reg_renumber[regno] < 0);
4396 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4397 fprintf (ira_dump_file,
6190446b 4398 " Try Assign %d(a%d), cost=%d", regno, ALLOCNO_NUM (a),
058e97ec 4399 ALLOCNO_MEMORY_COST (a)
1756cb66 4400 - ALLOCNO_CLASS_COST (a));
058e97ec
VM
4401 allocno_reload_assign (a, forbidden_regs);
4402 if (reg_renumber[regno] >= 0)
4403 {
4404 CLEAR_REGNO_REG_SET (spilled, regno);
4405 changed_p = true;
4406 }
058e97ec 4407 }
6190446b 4408 BITMAP_FREE (temp);
058e97ec
VM
4409 return changed_p;
4410}
4411
4412/* The function is called by reload and returns already allocated
4413 stack slot (if any) for REGNO with given INHERENT_SIZE and
4414 TOTAL_SIZE. In the case of failure to find a slot which can be
4415 used for REGNO, the function returns NULL. */
4416rtx
4417ira_reuse_stack_slot (int regno, unsigned int inherent_size,
4418 unsigned int total_size)
4419{
4420 unsigned int i;
4421 int slot_num, best_slot_num;
4422 int cost, best_cost;
4423 ira_copy_t cp, next_cp;
4424 ira_allocno_t another_allocno, allocno = ira_regno_allocno_map[regno];
4425 rtx x;
4426 bitmap_iterator bi;
4427 struct ira_spilled_reg_stack_slot *slot = NULL;
4428
9994ad20
KC
4429 ira_assert (! ira_use_lra_p);
4430
2af2dbdc 4431 ira_assert (inherent_size == PSEUDO_REGNO_BYTES (regno)
058e97ec
VM
4432 && inherent_size <= total_size
4433 && ALLOCNO_HARD_REGNO (allocno) < 0);
4434 if (! flag_ira_share_spill_slots)
4435 return NULL_RTX;
4436 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4437 if (slot_num != -1)
4438 {
4439 slot = &ira_spilled_reg_stack_slots[slot_num];
4440 x = slot->mem;
4441 }
4442 else
4443 {
4444 best_cost = best_slot_num = -1;
4445 x = NULL_RTX;
4446 /* It means that the pseudo was spilled in the reload pass, try
4447 to reuse a slot. */
4448 for (slot_num = 0;
4449 slot_num < ira_spilled_reg_stack_slots_num;
4450 slot_num++)
4451 {
4452 slot = &ira_spilled_reg_stack_slots[slot_num];
4453 if (slot->mem == NULL_RTX)
4454 continue;
4455 if (slot->width < total_size
4456 || GET_MODE_SIZE (GET_MODE (slot->mem)) < inherent_size)
4457 continue;
b8698a0f 4458
058e97ec
VM
4459 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4460 FIRST_PSEUDO_REGISTER, i, bi)
4461 {
4462 another_allocno = ira_regno_allocno_map[i];
1756cb66
VM
4463 if (allocnos_conflict_by_live_ranges_p (allocno,
4464 another_allocno))
058e97ec
VM
4465 goto cont;
4466 }
4467 for (cost = 0, cp = ALLOCNO_COPIES (allocno);
4468 cp != NULL;
4469 cp = next_cp)
4470 {
4471 if (cp->first == allocno)
4472 {
4473 next_cp = cp->next_first_allocno_copy;
4474 another_allocno = cp->second;
4475 }
4476 else if (cp->second == allocno)
4477 {
4478 next_cp = cp->next_second_allocno_copy;
4479 another_allocno = cp->first;
4480 }
4481 else
4482 gcc_unreachable ();
4483 if (cp->insn == NULL_RTX)
4484 continue;
4485 if (bitmap_bit_p (&slot->spilled_regs,
4486 ALLOCNO_REGNO (another_allocno)))
4487 cost += cp->freq;
4488 }
4489 if (cost > best_cost)
4490 {
4491 best_cost = cost;
4492 best_slot_num = slot_num;
4493 }
4494 cont:
4495 ;
4496 }
4497 if (best_cost >= 0)
4498 {
99b96649
EB
4499 slot_num = best_slot_num;
4500 slot = &ira_spilled_reg_stack_slots[slot_num];
058e97ec
VM
4501 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4502 x = slot->mem;
99b96649 4503 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
058e97ec
VM
4504 }
4505 }
4506 if (x != NULL_RTX)
4507 {
4508 ira_assert (slot->width >= total_size);
f7556aae 4509#ifdef ENABLE_IRA_CHECKING
058e97ec
VM
4510 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4511 FIRST_PSEUDO_REGISTER, i, bi)
4512 {
1756cb66 4513 ira_assert (! conflict_by_live_ranges_p (regno, i));
058e97ec 4514 }
f7556aae 4515#endif
058e97ec
VM
4516 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4517 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4518 {
4519 fprintf (ira_dump_file, " Assigning %d(freq=%d) slot %d of",
4520 regno, REG_FREQ (regno), slot_num);
4521 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4522 FIRST_PSEUDO_REGISTER, i, bi)
4523 {
4524 if ((unsigned) regno != i)
4525 fprintf (ira_dump_file, " %d", i);
4526 }
4527 fprintf (ira_dump_file, "\n");
4528 }
4529 }
4530 return x;
4531}
4532
4533/* This is called by reload every time a new stack slot X with
4534 TOTAL_SIZE was allocated for REGNO. We store this info for
4535 subsequent ira_reuse_stack_slot calls. */
4536void
4537ira_mark_new_stack_slot (rtx x, int regno, unsigned int total_size)
4538{
4539 struct ira_spilled_reg_stack_slot *slot;
4540 int slot_num;
4541 ira_allocno_t allocno;
4542
9994ad20
KC
4543 ira_assert (! ira_use_lra_p);
4544
2af2dbdc 4545 ira_assert (PSEUDO_REGNO_BYTES (regno) <= total_size);
058e97ec
VM
4546 allocno = ira_regno_allocno_map[regno];
4547 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4548 if (slot_num == -1)
4549 {
4550 slot_num = ira_spilled_reg_stack_slots_num++;
4551 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
4552 }
4553 slot = &ira_spilled_reg_stack_slots[slot_num];
4554 INIT_REG_SET (&slot->spilled_regs);
4555 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4556 slot->mem = x;
4557 slot->width = total_size;
4558 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4559 fprintf (ira_dump_file, " Assigning %d(freq=%d) a new slot %d\n",
4560 regno, REG_FREQ (regno), slot_num);
4561}
4562
4563
4564/* Return spill cost for pseudo-registers whose numbers are in array
4565 REGNOS (with a negative number as an end marker) for reload with
4566 given IN and OUT for INSN. Return also number points (through
4567 EXCESS_PRESSURE_LIVE_LENGTH) where the pseudo-register lives and
4568 the register pressure is high, number of references of the
4569 pseudo-registers (through NREFS), number of callee-clobbered
4570 hard-registers occupied by the pseudo-registers (through
4571 CALL_USED_COUNT), and the first hard regno occupied by the
4572 pseudo-registers (through FIRST_HARD_REGNO). */
4573static int
4574calculate_spill_cost (int *regnos, rtx in, rtx out, rtx insn,
4575 int *excess_pressure_live_length,
4576 int *nrefs, int *call_used_count, int *first_hard_regno)
4577{
4578 int i, cost, regno, hard_regno, j, count, saved_cost, nregs;
4579 bool in_p, out_p;
4580 int length;
4581 ira_allocno_t a;
4582
4583 *nrefs = 0;
4584 for (length = count = cost = i = 0;; i++)
4585 {
4586 regno = regnos[i];
4587 if (regno < 0)
4588 break;
4589 *nrefs += REG_N_REFS (regno);
4590 hard_regno = reg_renumber[regno];
4591 ira_assert (hard_regno >= 0);
4592 a = ira_regno_allocno_map[regno];
ac0ab4f7 4593 length += ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a) / ALLOCNO_NUM_OBJECTS (a);
1756cb66 4594 cost += ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a);
058e97ec
VM
4595 nregs = hard_regno_nregs[hard_regno][ALLOCNO_MODE (a)];
4596 for (j = 0; j < nregs; j++)
4597 if (! TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + j))
4598 break;
4599 if (j == nregs)
4600 count++;
4601 in_p = in && REG_P (in) && (int) REGNO (in) == hard_regno;
4602 out_p = out && REG_P (out) && (int) REGNO (out) == hard_regno;
4603 if ((in_p || out_p)
4604 && find_regno_note (insn, REG_DEAD, hard_regno) != NULL_RTX)
4605 {
4606 saved_cost = 0;
4607 if (in_p)
4608 saved_cost += ira_memory_move_cost
1756cb66 4609 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][1];
058e97ec
VM
4610 if (out_p)
4611 saved_cost
4612 += ira_memory_move_cost
1756cb66 4613 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][0];
058e97ec
VM
4614 cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)) * saved_cost;
4615 }
4616 }
4617 *excess_pressure_live_length = length;
4618 *call_used_count = count;
4619 hard_regno = -1;
4620 if (regnos[0] >= 0)
4621 {
4622 hard_regno = reg_renumber[regnos[0]];
4623 }
4624 *first_hard_regno = hard_regno;
4625 return cost;
4626}
4627
4628/* Return TRUE if spilling pseudo-registers whose numbers are in array
4629 REGNOS is better than spilling pseudo-registers with numbers in
4630 OTHER_REGNOS for reload with given IN and OUT for INSN. The
4631 function used by the reload pass to make better register spilling
4632 decisions. */
4633bool
4634ira_better_spill_reload_regno_p (int *regnos, int *other_regnos,
4635 rtx in, rtx out, rtx insn)
4636{
4637 int cost, other_cost;
4638 int length, other_length;
4639 int nrefs, other_nrefs;
4640 int call_used_count, other_call_used_count;
4641 int hard_regno, other_hard_regno;
4642
b8698a0f 4643 cost = calculate_spill_cost (regnos, in, out, insn,
058e97ec
VM
4644 &length, &nrefs, &call_used_count, &hard_regno);
4645 other_cost = calculate_spill_cost (other_regnos, in, out, insn,
4646 &other_length, &other_nrefs,
4647 &other_call_used_count,
4648 &other_hard_regno);
4649 if (nrefs == 0 && other_nrefs != 0)
4650 return true;
4651 if (nrefs != 0 && other_nrefs == 0)
4652 return false;
4653 if (cost != other_cost)
4654 return cost < other_cost;
4655 if (length != other_length)
4656 return length > other_length;
4657#ifdef REG_ALLOC_ORDER
4658 if (hard_regno >= 0 && other_hard_regno >= 0)
4659 return (inv_reg_alloc_order[hard_regno]
4660 < inv_reg_alloc_order[other_hard_regno]);
4661#else
4662 if (call_used_count != other_call_used_count)
4663 return call_used_count > other_call_used_count;
4664#endif
4665 return false;
4666}
4667
4668\f
4669
4670/* Allocate and initialize data necessary for assign_hard_reg. */
4671void
4672ira_initiate_assign (void)
4673{
4674 sorted_allocnos
4675 = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4676 * ira_allocnos_num);
4677 consideration_allocno_bitmap = ira_allocate_bitmap ();
4678 initiate_cost_update ();
4679 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
bf08fb16
VM
4680 sorted_copies = (ira_copy_t *) ira_allocate (ira_copies_num
4681 * sizeof (ira_copy_t));
058e97ec
VM
4682}
4683
4684/* Deallocate data used by assign_hard_reg. */
4685void
4686ira_finish_assign (void)
4687{
4688 ira_free (sorted_allocnos);
4689 ira_free_bitmap (consideration_allocno_bitmap);
4690 finish_cost_update ();
4691 ira_free (allocno_priorities);
bf08fb16 4692 ira_free (sorted_copies);
058e97ec
VM
4693}
4694
4695\f
4696
4697/* Entry function doing color-based register allocation. */
cb1ca6ac
VM
4698static void
4699color (void)
058e97ec 4700{
9771b263 4701 allocno_stack_vec.create (ira_allocnos_num);
058e97ec
VM
4702 memset (allocated_hardreg_p, 0, sizeof (allocated_hardreg_p));
4703 ira_initiate_assign ();
4704 do_coloring ();
4705 ira_finish_assign ();
9771b263 4706 allocno_stack_vec.release ();
058e97ec
VM
4707 move_spill_restore ();
4708}
4709
4710\f
4711
4712/* This page contains a simple register allocator without usage of
4713 allocno conflicts. This is used for fast allocation for -O0. */
4714
4715/* Do register allocation by not using allocno conflicts. It uses
4716 only allocno live ranges. The algorithm is close to Chow's
4717 priority coloring. */
cb1ca6ac
VM
4718static void
4719fast_allocation (void)
058e97ec 4720{
1ae64b0f 4721 int i, j, k, num, class_size, hard_regno;
058e97ec
VM
4722#ifdef STACK_REGS
4723 bool no_stack_reg_p;
4724#endif
1756cb66 4725 enum reg_class aclass;
058e97ec
VM
4726 enum machine_mode mode;
4727 ira_allocno_t a;
4728 ira_allocno_iterator ai;
b14151b5 4729 live_range_t r;
058e97ec
VM
4730 HARD_REG_SET conflict_hard_regs, *used_hard_regs;
4731
058e97ec
VM
4732 sorted_allocnos = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4733 * ira_allocnos_num);
4734 num = 0;
4735 FOR_EACH_ALLOCNO (a, ai)
4736 sorted_allocnos[num++] = a;
1ae64b0f
VM
4737 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
4738 setup_allocno_priorities (sorted_allocnos, num);
4739 used_hard_regs = (HARD_REG_SET *) ira_allocate (sizeof (HARD_REG_SET)
4740 * ira_max_point);
4741 for (i = 0; i < ira_max_point; i++)
4742 CLEAR_HARD_REG_SET (used_hard_regs[i]);
311aab06 4743 qsort (sorted_allocnos, num, sizeof (ira_allocno_t),
058e97ec
VM
4744 allocno_priority_compare_func);
4745 for (i = 0; i < num; i++)
4746 {
ac0ab4f7
BS
4747 int nr, l;
4748
058e97ec 4749 a = sorted_allocnos[i];
ac0ab4f7
BS
4750 nr = ALLOCNO_NUM_OBJECTS (a);
4751 CLEAR_HARD_REG_SET (conflict_hard_regs);
4752 for (l = 0; l < nr; l++)
4753 {
4754 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4755 IOR_HARD_REG_SET (conflict_hard_regs,
4756 OBJECT_CONFLICT_HARD_REGS (obj));
4757 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4758 for (j = r->start; j <= r->finish; j++)
4759 IOR_HARD_REG_SET (conflict_hard_regs, used_hard_regs[j]);
4760 }
1756cb66 4761 aclass = ALLOCNO_CLASS (a);
6b8d9676
VM
4762 ALLOCNO_ASSIGNED_P (a) = true;
4763 ALLOCNO_HARD_REGNO (a) = -1;
1756cb66 4764 if (hard_reg_set_subset_p (reg_class_contents[aclass],
058e97ec
VM
4765 conflict_hard_regs))
4766 continue;
4767 mode = ALLOCNO_MODE (a);
4768#ifdef STACK_REGS
4769 no_stack_reg_p = ALLOCNO_NO_STACK_REG_P (a);
4770#endif
1756cb66 4771 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
4772 for (j = 0; j < class_size; j++)
4773 {
1756cb66 4774 hard_regno = ira_class_hard_regs[aclass][j];
058e97ec
VM
4775#ifdef STACK_REGS
4776 if (no_stack_reg_p && FIRST_STACK_REG <= hard_regno
4777 && hard_regno <= LAST_STACK_REG)
4778 continue;
4779#endif
9181a6e5 4780 if (ira_hard_reg_set_intersection_p (hard_regno, mode, conflict_hard_regs)
058e97ec 4781 || (TEST_HARD_REG_BIT
1756cb66 4782 (ira_prohibited_class_mode_regs[aclass][mode], hard_regno)))
058e97ec
VM
4783 continue;
4784 ALLOCNO_HARD_REGNO (a) = hard_regno;
ac0ab4f7
BS
4785 for (l = 0; l < nr; l++)
4786 {
4787 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4788 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4789 for (k = r->start; k <= r->finish; k++)
4790 IOR_HARD_REG_SET (used_hard_regs[k],
4791 ira_reg_mode_hard_regset[hard_regno][mode]);
4792 }
058e97ec
VM
4793 break;
4794 }
4795 }
4796 ira_free (sorted_allocnos);
4797 ira_free (used_hard_regs);
4798 ira_free (allocno_priorities);
4799 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
4800 ira_print_disposition (ira_dump_file);
4801}
cb1ca6ac
VM
4802
4803\f
4804
4805/* Entry function doing coloring. */
4806void
4807ira_color (void)
4808{
4809 ira_allocno_t a;
4810 ira_allocno_iterator ai;
4811
4812 /* Setup updated costs. */
4813 FOR_EACH_ALLOCNO (a, ai)
4814 {
4815 ALLOCNO_UPDATED_MEMORY_COST (a) = ALLOCNO_MEMORY_COST (a);
1756cb66 4816 ALLOCNO_UPDATED_CLASS_COST (a) = ALLOCNO_CLASS_COST (a);
cb1ca6ac 4817 }
311aab06 4818 if (ira_conflicts_p)
cb1ca6ac
VM
4819 color ();
4820 else
4821 fast_allocation ();
4822}