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058e97ec 1/* IRA allocation based on graph coloring.
1756cb66 2 Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
058e97ec
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3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
21
22#include "config.h"
23#include "system.h"
24#include "coretypes.h"
25#include "tm.h"
26#include "rtl.h"
27#include "tm_p.h"
28#include "target.h"
29#include "regs.h"
30#include "flags.h"
31#include "sbitmap.h"
32#include "bitmap.h"
33#include "hard-reg-set.h"
34#include "basic-block.h"
35#include "expr.h"
718f9c0f 36#include "diagnostic-core.h"
058e97ec
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37#include "reload.h"
38#include "params.h"
39#include "df.h"
058e97ec
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40#include "ira-int.h"
41
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42typedef struct object_hard_regs *object_hard_regs_t;
43
44/* The structure contains information about hard registers can be
45 assigned to objects. Usually it is allocno profitable hard
46 registers but in some cases this set can be a bit different. Major
47 reason of the difference is a requirement to use hard register sets
48 that form a tree or a forest (set of trees), i.e. hard register set
49 of a node should contain hard register sets of its subnodes. */
50struct object_hard_regs
51{
52 /* Hard registers can be assigned to an allocno. */
53 HARD_REG_SET set;
54 /* Overall (spilling) cost of all allocnos with given register
55 set. */
56 long long int cost;
57};
58
59typedef struct object_hard_regs_node *object_hard_regs_node_t;
60
61/* A node representing object hard registers. Such nodes form a
62 forest (set of trees). Each subnode of given node in the forest
63 refers for hard register set (usually object profitable hard
64 register set) which is a subset of one referred from given
65 node. */
66struct object_hard_regs_node
67{
68 /* Set up number of the node in preorder traversing of the forest. */
69 int preorder_num;
70 /* Used for different calculation like finding conflict size of an
71 allocno. */
72 int check;
73 /* Used for calculation of conflict size of an allocno. The
74 conflict size of the allocno is maximal number of given object
75 hard registers needed for allocation of the conflicting allocnos.
76 Given allocno is trivially colored if this number plus the number
77 of hard registers needed for given allocno is not greater than
78 the number of given allocno hard register set. */
79 int conflict_size;
80 /* The number of hard registers given by member hard_regs. */
81 int hard_regs_num;
82 /* The following member is used to form the final forest. */
83 bool used_p;
84 /* Pointer to the corresponding profitable hard registers. */
85 object_hard_regs_t hard_regs;
86 /* Parent, first subnode, previous and next node with the same
87 parent in the forest. */
88 object_hard_regs_node_t parent, first, prev, next;
89};
90
91/* To decrease footprint of ira_allocno structure we store all data
92 needed only for coloring in the following structure. */
93struct allocno_color_data
94{
95 /* TRUE value means that the allocno was not removed yet from the
96 conflicting graph during colouring. */
97 unsigned int in_graph_p : 1;
98 /* TRUE if it is put on the stack to make other allocnos
99 colorable. */
100 unsigned int may_be_spilled_p : 1;
101 /* TRUE if the object is trivially colorable. */
102 unsigned int colorable_p : 1;
103 /* Number of hard registers of the allocno class really
104 available for the allocno allocation. It is number of the
105 profitable hard regs. */
106 int available_regs_num;
107 /* Allocnos in a bucket (used in coloring) chained by the following
108 two members. */
109 ira_allocno_t next_bucket_allocno;
110 ira_allocno_t prev_bucket_allocno;
111 /* Used for temporary purposes. */
112 int temp;
113};
114
115/* See above. */
116typedef struct allocno_color_data *allocno_color_data_t;
117
118/* Container for storing allocno data concerning coloring. */
119static allocno_color_data_t allocno_color_data;
120
121/* Macro to access the data concerning coloring. */
122#define ALLOCNO_COLOR_DATA(a) ((allocno_color_data_t) ALLOCNO_ADD_DATA (a))
123
124/* To decrease footprint of ira_object structure we store all data
125 needed only for coloring in the following structure. */
126struct object_color_data
127{
128 /* Profitable hard regs available for this pseudo allocation. It
129 means that the set excludes unavailable hard regs and hard regs
130 conflicting with given pseudo. They should be of the allocno
131 class. */
132 HARD_REG_SET profitable_hard_regs;
133 /* The object hard registers node. */
134 object_hard_regs_node_t hard_regs_node;
135 /* Array of structures object_hard_regs_subnode representing
136 given object hard registers node (the 1st element in the array)
137 and all its subnodes in the tree (forest) of object hard
138 register nodes (see comments above). */
139 int hard_regs_subnodes_start;
140 /* The length of the previous array. */
141 int hard_regs_subnodes_num;
142};
143
144/* See above. */
145typedef struct object_color_data *object_color_data_t;
146
147/* Container for storing object data concerning coloring. */
148static object_color_data_t object_color_data;
149
150/* Macro to access the data concerning coloring. */
151#define OBJECT_COLOR_DATA(o) ((object_color_data_t) OBJECT_ADD_DATA (o))
152
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153/* This file contains code for regional graph coloring, spill/restore
154 code placement optimization, and code helping the reload pass to do
155 a better job. */
156
157/* Bitmap of allocnos which should be colored. */
158static bitmap coloring_allocno_bitmap;
159
160/* Bitmap of allocnos which should be taken into account during
161 coloring. In general case it contains allocnos from
162 coloring_allocno_bitmap plus other already colored conflicting
163 allocnos. */
164static bitmap consideration_allocno_bitmap;
165
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166/* All allocnos sorted according their priorities. */
167static ira_allocno_t *sorted_allocnos;
168
169/* Vec representing the stack of allocnos used during coloring. */
170static VEC(ira_allocno_t,heap) *allocno_stack_vec;
171
71af27d2
OH
172/* Helper for qsort comparison callbacks - return a positive integer if
173 X > Y, or a negative value otherwise. Use a conditional expression
174 instead of a difference computation to insulate from possible overflow
175 issues, e.g. X - Y < 0 for some X > 0 and Y < 0. */
176#define SORTGT(x,y) (((x) > (y)) ? 1 : -1)
177
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178\f
179
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180/* Definition of vector of object hard registers. */
181DEF_VEC_P(object_hard_regs_t);
182DEF_VEC_ALLOC_P(object_hard_regs_t, heap);
fe82cdfb 183
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184/* Vector of unique object hard registers. */
185static VEC(object_hard_regs_t, heap) *object_hard_regs_vec;
186
187/* Returns hash value for object hard registers V. */
188static hashval_t
189object_hard_regs_hash (const void *v)
190{
191 const struct object_hard_regs *hv = (const struct object_hard_regs *) v;
192
193 return iterative_hash (&hv->set, sizeof (HARD_REG_SET), 0);
194}
195
196/* Compares object hard registers V1 and V2. */
197static int
198object_hard_regs_eq (const void *v1, const void *v2)
199{
200 const struct object_hard_regs *hv1 = (const struct object_hard_regs *) v1;
201 const struct object_hard_regs *hv2 = (const struct object_hard_regs *) v2;
202
203 return hard_reg_set_equal_p (hv1->set, hv2->set);
204}
205
206/* Hash table of unique object hard registers. */
207static htab_t object_hard_regs_htab;
208
209/* Return object hard registers in the hash table equal to HV. */
210static object_hard_regs_t
211find_hard_regs (object_hard_regs_t hv)
212{
213 return (object_hard_regs_t) htab_find (object_hard_regs_htab, hv);
214}
215
216/* Insert allocno hard registers HV in the hash table (if it is not
217 there yet) and return the value which in the table. */
218static object_hard_regs_t
219insert_hard_regs (object_hard_regs_t hv)
220{
221 PTR *slot = htab_find_slot (object_hard_regs_htab, hv, INSERT);
222
223 if (*slot == NULL)
224 *slot = hv;
225 return (object_hard_regs_t) *slot;
226}
227
228/* Initialize data concerning object hard registers. */
229static void
230init_object_hard_regs (void)
231{
232 object_hard_regs_vec = VEC_alloc (object_hard_regs_t, heap, 200);
233 object_hard_regs_htab
234 = htab_create (200, object_hard_regs_hash, object_hard_regs_eq, NULL);
235}
236
237/* Add (or update info about) object hard registers with SET and
238 COST. */
239static object_hard_regs_t
240add_object_hard_regs (HARD_REG_SET set, long long int cost)
241{
242 struct object_hard_regs temp;
243 object_hard_regs_t hv;
244
245 gcc_assert (! hard_reg_set_empty_p (set));
246 COPY_HARD_REG_SET (temp.set, set);
247 if ((hv = find_hard_regs (&temp)) != NULL)
248 hv->cost += cost;
249 else
250 {
251 hv = ((struct object_hard_regs *)
252 ira_allocate (sizeof (struct object_hard_regs)));
253 COPY_HARD_REG_SET (hv->set, set);
254 hv->cost = cost;
255 VEC_safe_push (object_hard_regs_t, heap, object_hard_regs_vec, hv);
256 insert_hard_regs (hv);
257 }
258 return hv;
259}
260
261/* Finalize data concerning allocno hard registers. */
262static void
263finish_object_hard_regs (void)
264{
265 int i;
266 object_hard_regs_t hv;
267
268 for (i = 0;
269 VEC_iterate (object_hard_regs_t, object_hard_regs_vec, i, hv);
270 i++)
271 ira_free (hv);
272 htab_delete (object_hard_regs_htab);
273 VEC_free (object_hard_regs_t, heap, object_hard_regs_vec);
274}
275
276/* Sort hard regs according to their frequency of usage. */
277static int
278object_hard_regs_compare (const void *v1p, const void *v2p)
279{
280 object_hard_regs_t hv1 = *(const object_hard_regs_t *) v1p;
281 object_hard_regs_t hv2 = *(const object_hard_regs_t *) v2p;
282
283 if (hv2->cost > hv1->cost)
284 return 1;
285 else if (hv2->cost < hv1->cost)
286 return -1;
287 else
288 return 0;
289}
290
291\f
292
293/* Used for finding a common ancestor of two allocno hard registers
294 nodes in the forest. We use the current value of
295 'node_check_tick' to mark all nodes from one node to the top and
296 then walking up from another node until we find a marked node.
297
298 It is also used to figure out allocno colorability as a mark that
299 we already reset value of member 'conflict_size' for the forest
300 node corresponding to the processed allocno. */
301static int node_check_tick;
302
303/* Roots of the forest containing hard register sets can be assigned
304 to objects. */
305static object_hard_regs_node_t hard_regs_roots;
306
307/* Definition of vector of object hard register nodes. */
308DEF_VEC_P(object_hard_regs_node_t);
309DEF_VEC_ALLOC_P(object_hard_regs_node_t, heap);
310
311/* Vector used to create the forest. */
312static VEC(object_hard_regs_node_t, heap) *hard_regs_node_vec;
313
314/* Create and return object hard registers node containing object
315 hard registers HV. */
316static object_hard_regs_node_t
317create_new_object_hard_regs_node (object_hard_regs_t hv)
318{
319 object_hard_regs_node_t new_node;
320
321 new_node = ((struct object_hard_regs_node *)
322 ira_allocate (sizeof (struct object_hard_regs_node)));
323 new_node->check = 0;
324 new_node->hard_regs = hv;
325 new_node->hard_regs_num = hard_reg_set_size (hv->set);
326 new_node->first = NULL;
327 new_node->used_p = false;
328 return new_node;
329}
330
331/* Add object hard registers node NEW_NODE to the forest on its level
332 given by ROOTS. */
333static void
334add_new_object_hard_regs_node_to_forest (object_hard_regs_node_t *roots,
335 object_hard_regs_node_t new_node)
336{
337 new_node->next = *roots;
338 if (new_node->next != NULL)
339 new_node->next->prev = new_node;
340 new_node->prev = NULL;
341 *roots = new_node;
342}
343
344/* Add object hard registers HV (or its best approximation if it is
345 not possible) to the forest on its level given by ROOTS. */
346static void
347add_object_hard_regs_to_forest (object_hard_regs_node_t *roots,
348 object_hard_regs_t hv)
349{
350 unsigned int i, start;
351 object_hard_regs_node_t node, prev, new_node;
352 HARD_REG_SET temp_set;
353 object_hard_regs_t hv2;
354
355 start = VEC_length (object_hard_regs_node_t, hard_regs_node_vec);
356 for (node = *roots; node != NULL; node = node->next)
357 {
358 if (hard_reg_set_equal_p (hv->set, node->hard_regs->set))
359 return;
360 if (hard_reg_set_subset_p (hv->set, node->hard_regs->set))
361 {
362 add_object_hard_regs_to_forest (&node->first, hv);
363 return;
364 }
365 if (hard_reg_set_subset_p (node->hard_regs->set, hv->set))
366 VEC_safe_push (object_hard_regs_node_t, heap,
367 hard_regs_node_vec, node);
368 else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set))
369 {
370 COPY_HARD_REG_SET (temp_set, hv->set);
371 AND_HARD_REG_SET (temp_set, node->hard_regs->set);
372 hv2 = add_object_hard_regs (temp_set, hv->cost);
373 add_object_hard_regs_to_forest (&node->first, hv2);
374 }
375 }
376 if (VEC_length (object_hard_regs_node_t, hard_regs_node_vec)
377 > start + 1)
378 {
379 /* Create a new node which contains nodes in hard_regs_node_vec. */
380 CLEAR_HARD_REG_SET (temp_set);
381 for (i = start;
382 i < VEC_length (object_hard_regs_node_t, hard_regs_node_vec);
383 i++)
384 {
385 node = VEC_index (object_hard_regs_node_t, hard_regs_node_vec, i);
386 IOR_HARD_REG_SET (temp_set, node->hard_regs->set);
387 }
388 hv = add_object_hard_regs (temp_set, hv->cost);
389 new_node = create_new_object_hard_regs_node (hv);
390 prev = NULL;
391 for (i = start;
392 i < VEC_length (object_hard_regs_node_t, hard_regs_node_vec);
393 i++)
394 {
395 node = VEC_index (object_hard_regs_node_t, hard_regs_node_vec, i);
396 if (node->prev == NULL)
397 *roots = node->next;
398 else
399 node->prev->next = node->next;
400 if (node->next != NULL)
401 node->next->prev = node->prev;
402 if (prev == NULL)
403 new_node->first = node;
404 else
405 prev->next = node;
406 node->prev = prev;
407 node->next = NULL;
408 prev = node;
409 }
410 add_new_object_hard_regs_node_to_forest (roots, new_node);
411 }
412 VEC_truncate (object_hard_regs_node_t, hard_regs_node_vec, start);
413}
414
415/* Add object hard registers nodes starting with the forest level
416 given by FIRST which contains biggest set inside SET. */
417static void
418collect_object_hard_regs_cover (object_hard_regs_node_t first,
419 HARD_REG_SET set)
420{
421 object_hard_regs_node_t node;
422
423 ira_assert (first != NULL);
424 for (node = first; node != NULL; node = node->next)
425 if (hard_reg_set_subset_p (node->hard_regs->set, set))
426 VEC_safe_push (object_hard_regs_node_t, heap, hard_regs_node_vec,
427 node);
428 else if (hard_reg_set_intersect_p (set, node->hard_regs->set))
429 collect_object_hard_regs_cover (node->first, set);
430}
431
432/* Set up field parent as PARENT in all object hard registers nodes
433 in forest given by FIRST. */
434static void
435setup_object_hard_regs_nodes_parent (object_hard_regs_node_t first,
436 object_hard_regs_node_t parent)
437{
438 object_hard_regs_node_t node;
439
440 for (node = first; node != NULL; node = node->next)
441 {
442 node->parent = parent;
443 setup_object_hard_regs_nodes_parent (node->first, node);
444 }
445}
446
447/* Return object hard registers node which is a first common ancestor
448 node of FIRST and SECOND in the forest. */
449static object_hard_regs_node_t
450first_common_ancestor_node (object_hard_regs_node_t first,
451 object_hard_regs_node_t second)
452{
453 object_hard_regs_node_t node;
454
455 node_check_tick++;
456 for (node = first; node != NULL; node = node->parent)
457 node->check = node_check_tick;
458 for (node = second; node != NULL; node = node->parent)
459 if (node->check == node_check_tick)
460 return node;
461 return first_common_ancestor_node (second, first);
462}
463
464/* Print hard reg set SET to F. */
465static void
466print_hard_reg_set (FILE *f, HARD_REG_SET set, bool new_line_p)
467{
468 int i, start;
469
470 for (start = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++)
471 {
472 if (TEST_HARD_REG_BIT (set, i))
473 {
474 if (i == 0 || ! TEST_HARD_REG_BIT (set, i - 1))
475 start = i;
476 }
477 if (start >= 0
478 && (i == FIRST_PSEUDO_REGISTER - 1 || ! TEST_HARD_REG_BIT (set, i)))
479 {
480 if (start == i - 1)
481 fprintf (f, " %d", start);
482 else if (start == i - 2)
483 fprintf (f, " %d %d", start, start + 1);
484 else
485 fprintf (f, " %d-%d", start, i - 1);
486 start = -1;
487 }
488 }
489 if (new_line_p)
490 fprintf (f, "\n");
491}
492
493/* Print object hard register subforest given by ROOTS and its LEVEL
494 to F. */
495static void
496print_hard_regs_subforest (FILE *f, object_hard_regs_node_t roots,
497 int level)
498{
499 int i;
500 object_hard_regs_node_t node;
501
502 for (node = roots; node != NULL; node = node->next)
503 {
504 fprintf (f, " ");
505 for (i = 0; i < level * 2; i++)
506 fprintf (f, " ");
507 fprintf (f, "%d:(", node->preorder_num);
508 print_hard_reg_set (f, node->hard_regs->set, false);
509 fprintf (f, ")@%lld\n", node->hard_regs->cost);
510 print_hard_regs_subforest (f, node->first, level + 1);
511 }
512}
513
514/* Print the object hard register forest to F. */
515static void
516print_hard_regs_forest (FILE *f)
517{
518 fprintf (f, " Hard reg set forest:\n");
519 print_hard_regs_subforest (f, hard_regs_roots, 1);
520}
521
522/* Print the object hard register forest to stderr. */
523void
524ira_debug_hard_regs_forest (void)
525{
526 print_hard_regs_forest (stderr);
527}
528
529/* Remove unused object hard registers nodes from forest given by its
530 *ROOTS. */
531static void
532remove_unused_object_hard_regs_nodes (object_hard_regs_node_t *roots)
533{
534 object_hard_regs_node_t node, prev, next, last;
535
536 for (prev = NULL, node = *roots; node != NULL; node = next)
537 {
538 next = node->next;
539 if (node->used_p)
540 {
541 remove_unused_object_hard_regs_nodes (&node->first);
542 prev = node;
543 }
544 else
545 {
546 for (last = node->first;
547 last != NULL && last->next != NULL;
548 last = last->next)
549 ;
550 if (last != NULL)
551 {
552 if (prev == NULL)
553 *roots = node->first;
554 else
555 prev->next = node->first;
556 if (next != NULL)
557 next->prev = last;
558 last->next = next;
559 next = node->first;
560 }
561 else
562 {
563 if (prev == NULL)
564 *roots = next;
565 else
566 prev->next = next;
567 if (next != NULL)
568 next->prev = prev;
569 }
570 ira_free (node);
571 }
572 }
573}
574
575/* Set up fields preorder_num starting with START_NUM in all object
576 hard registers nodes in forest given by FIRST. Return biggest set
577 PREORDER_NUM increased by 1. */
578static int
579enumerate_object_hard_regs_nodes (object_hard_regs_node_t first,
580 object_hard_regs_node_t parent,
581 int start_num)
582{
583 object_hard_regs_node_t node;
584
585 for (node = first; node != NULL; node = node->next)
586 {
587 node->preorder_num = start_num++;
588 node->parent = parent;
589 start_num = enumerate_object_hard_regs_nodes (node->first, node,
590 start_num);
591 }
592 return start_num;
593}
594
595/* Number of object hard registers nodes in the forest. */
596static int object_hard_regs_nodes_num;
597
598/* Table preorder number of object hard registers node in the forest
599 -> the object hard registers node. */
600static object_hard_regs_node_t *object_hard_regs_nodes;
601
602/* See below. */
603typedef struct object_hard_regs_subnode *object_hard_regs_subnode_t;
604
605/* The structure is used to describes all subnodes (not only immediate
606 ones) in the mentioned above tree for given object hard register
607 node. The usage of such data accelerates calculation of
608 colorability of given allocno. */
609struct object_hard_regs_subnode
610{
611 /* The conflict size of conflicting allocnos whose hard register
612 sets are equal sets (plus supersets if given node is given
613 object hard registers node) of one in the given node. */
614 int left_conflict_size;
615 /* The summary conflict size of conflicting allocnos whose hard
616 register sets are strict subsets of one in the given node.
617 Overall conflict size is
618 left_conflict_subnodes_size
619 + MIN (max_node_impact - left_conflict_subnodes_size,
620 left_conflict_size)
621 */
622 short left_conflict_subnodes_size;
623 short max_node_impact;
624};
625
626/* Container for hard regs subnodes of all objects. */
627static object_hard_regs_subnode_t object_hard_regs_subnodes;
628
629/* Table (preorder number of object hard registers node in the
630 forest, preorder number of object hard registers subnode) -> index
631 of the subnode relative to the node. -1 if it is not a
632 subnode. */
633static int *object_hard_regs_subnode_index;
634
635/* Setup arrays OBJECT_HARD_REGS_NODES and
636 OBJECT_HARD_REGS_SUBNODE_INDEX. */
637static void
638setup_object_hard_regs_subnode_index (object_hard_regs_node_t first)
639{
640 object_hard_regs_node_t node, parent;
641 int index;
642
643 for (node = first; node != NULL; node = node->next)
644 {
645 object_hard_regs_nodes[node->preorder_num] = node;
646 for (parent = node; parent != NULL; parent = parent->parent)
647 {
648 index = parent->preorder_num * object_hard_regs_nodes_num;
649 object_hard_regs_subnode_index[index + node->preorder_num]
650 = node->preorder_num - parent->preorder_num;
651 }
652 setup_object_hard_regs_subnode_index (node->first);
653 }
654}
655
656/* Count all object hard registers nodes in tree ROOT. */
657static int
658get_object_hard_regs_subnodes_num (object_hard_regs_node_t root)
659{
660 int len = 1;
661
662 for (root = root->first; root != NULL; root = root->next)
663 len += get_object_hard_regs_subnodes_num (root);
664 return len;
665}
666
667/* Build the forest of object hard registers nodes and assign each
668 allocno a node from the forest. */
669static void
670form_object_hard_regs_nodes_forest (void)
671{
672 unsigned int i, j, size, len;
673 int start, k;
674 ira_allocno_t a;
675 object_hard_regs_t hv;
676 bitmap_iterator bi;
677 HARD_REG_SET temp;
678 object_hard_regs_node_t node, object_hard_regs_node;
679
680 node_check_tick = 0;
681 init_object_hard_regs ();
682 hard_regs_roots = NULL;
683 hard_regs_node_vec = VEC_alloc (object_hard_regs_node_t, heap, 100);
684 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
685 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i))
686 {
687 CLEAR_HARD_REG_SET (temp);
688 SET_HARD_REG_BIT (temp, i);
689 hv = add_object_hard_regs (temp, 0);
690 node = create_new_object_hard_regs_node (hv);
691 add_new_object_hard_regs_node_to_forest (&hard_regs_roots, node);
692 }
693 start = VEC_length (object_hard_regs_t, object_hard_regs_vec);
694 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
695 {
696 a = ira_allocnos[i];
697 for (k = 0; k < ALLOCNO_NUM_OBJECTS (a); k++)
698 {
699 ira_object_t obj = ALLOCNO_OBJECT (a, k);
700 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
701
702 if (hard_reg_set_empty_p (obj_data->profitable_hard_regs))
703 continue;
704 hv = (add_object_hard_regs
705 (obj_data->profitable_hard_regs,
706 ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a)));
707 }
708 }
709 SET_HARD_REG_SET (temp);
710 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
711 add_object_hard_regs (temp, 0);
712 qsort (VEC_address (object_hard_regs_t, object_hard_regs_vec) + start,
713 VEC_length (object_hard_regs_t, object_hard_regs_vec) - start,
714 sizeof (object_hard_regs_t), object_hard_regs_compare);
715 for (i = start;
716 VEC_iterate (object_hard_regs_t, object_hard_regs_vec, i, hv);
717 i++)
718 {
719 add_object_hard_regs_to_forest (&hard_regs_roots, hv);
720 ira_assert (VEC_length (object_hard_regs_node_t,
721 hard_regs_node_vec) == 0);
722 }
723 /* We need to set up parent fields for right work of
724 first_common_ancestor_node. */
725 setup_object_hard_regs_nodes_parent (hard_regs_roots, NULL);
726 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
727 {
728 a = ira_allocnos[i];
729 for (k = 0; k < ALLOCNO_NUM_OBJECTS (a); k++)
730 {
731 ira_object_t obj = ALLOCNO_OBJECT (a, k);
732 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
733
734 if (hard_reg_set_empty_p (obj_data->profitable_hard_regs))
735 continue;
736 VEC_truncate (object_hard_regs_node_t, hard_regs_node_vec, 0);
737 collect_object_hard_regs_cover (hard_regs_roots,
738 obj_data->profitable_hard_regs);
739 object_hard_regs_node = NULL;
740 for (j = 0;
741 VEC_iterate (object_hard_regs_node_t, hard_regs_node_vec,
742 j, node);
743 j++)
744 object_hard_regs_node
745 = (j == 0
746 ? node
747 : first_common_ancestor_node (node, object_hard_regs_node));
748 /* That is a temporary storage. */
749 object_hard_regs_node->used_p = true;
750 obj_data->hard_regs_node = object_hard_regs_node;
751 }
752 }
753 ira_assert (hard_regs_roots->next == NULL);
754 hard_regs_roots->used_p = true;
755 remove_unused_object_hard_regs_nodes (&hard_regs_roots);
756 object_hard_regs_nodes_num
757 = enumerate_object_hard_regs_nodes (hard_regs_roots, NULL, 0);
758 object_hard_regs_nodes
759 = ((object_hard_regs_node_t *)
760 ira_allocate (object_hard_regs_nodes_num
761 * sizeof (object_hard_regs_node_t)));
762 size = object_hard_regs_nodes_num * object_hard_regs_nodes_num;
763 object_hard_regs_subnode_index
764 = (int *) ira_allocate (size * sizeof (int));
765 for (i = 0; i < size; i++)
766 object_hard_regs_subnode_index[i] = -1;
767 setup_object_hard_regs_subnode_index (hard_regs_roots);
768 start = 0;
769 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
770 {
771 a = ira_allocnos[i];
772 for (k = 0; k < ALLOCNO_NUM_OBJECTS (a); k++)
773 {
774 ira_object_t obj = ALLOCNO_OBJECT (a, k);
775 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
776
777 if (hard_reg_set_empty_p (obj_data->profitable_hard_regs))
778 continue;
779 len = get_object_hard_regs_subnodes_num (obj_data->hard_regs_node);
780 obj_data->hard_regs_subnodes_start = start;
781 obj_data->hard_regs_subnodes_num = len;
782 start += len;
783 }
784 }
785 object_hard_regs_subnodes
786 = ((object_hard_regs_subnode_t)
787 ira_allocate (sizeof (struct object_hard_regs_subnode) * start));
788 VEC_free (object_hard_regs_node_t, heap, hard_regs_node_vec);
789}
790
791/* Free tree of object hard registers nodes given by its ROOT. */
792static void
793finish_object_hard_regs_nodes_tree (object_hard_regs_node_t root)
794{
795 object_hard_regs_node_t child, next;
796
797 for (child = root->first; child != NULL; child = next)
798 {
799 next = child->next;
800 finish_object_hard_regs_nodes_tree (child);
801 }
802 ira_free (root);
803}
804
805/* Finish work with the forest of object hard registers nodes. */
806static void
807finish_object_hard_regs_nodes_forest (void)
808{
809 object_hard_regs_node_t node, next;
810
811 ira_free (object_hard_regs_subnodes);
812 for (node = hard_regs_roots; node != NULL; node = next)
813 {
814 next = node->next;
815 finish_object_hard_regs_nodes_tree (node);
816 }
817 ira_free (object_hard_regs_nodes);
818 ira_free (object_hard_regs_subnode_index);
819 finish_object_hard_regs ();
820}
821
822/* Set up left conflict sizes and left conflict subnodes sizes of hard
823 registers subnodes of allocno A. Return TRUE if allocno A is
824 trivially colorable. */
3553f0bb 825static bool
1756cb66 826setup_left_conflict_sizes_p (ira_allocno_t a)
3553f0bb 827{
1756cb66
VM
828 int k, nobj, conflict_size;
829 allocno_color_data_t data;
ac0ab4f7 830
1756cb66
VM
831 nobj = ALLOCNO_NUM_OBJECTS (a);
832 conflict_size = 0;
833 data = ALLOCNO_COLOR_DATA (a);
834 for (k = 0; k < nobj; k++)
835 {
836 int i, node_preorder_num, start, left_conflict_subnodes_size;
837 HARD_REG_SET profitable_hard_regs;
838 object_hard_regs_subnode_t subnodes;
839 object_hard_regs_node_t node;
840 HARD_REG_SET node_set;
841 ira_object_t obj = ALLOCNO_OBJECT (a, k);
842 ira_object_t conflict_obj;
843 ira_object_conflict_iterator oci;
844 object_color_data_t obj_data;
845
846 node_check_tick++;
847 obj_data = OBJECT_COLOR_DATA (obj);
848 subnodes = object_hard_regs_subnodes + obj_data->hard_regs_subnodes_start;
849 COPY_HARD_REG_SET (profitable_hard_regs, obj_data->profitable_hard_regs);
850 node = obj_data->hard_regs_node;
851 node_preorder_num = node->preorder_num;
852 COPY_HARD_REG_SET (node_set, node->hard_regs->set);
853 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
854 {
855 int size;
856 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
857 object_hard_regs_node_t conflict_node, temp_node;
858 HARD_REG_SET conflict_node_set;
859 object_color_data_t conflict_obj_data;
860
861 conflict_obj_data = OBJECT_COLOR_DATA (conflict_obj);
862 if (! ALLOCNO_COLOR_DATA (conflict_a)->in_graph_p
863 || ! hard_reg_set_intersect_p (profitable_hard_regs,
864 conflict_obj_data
865 ->profitable_hard_regs))
866 continue;
867 conflict_node = conflict_obj_data->hard_regs_node;
868 COPY_HARD_REG_SET (conflict_node_set, conflict_node->hard_regs->set);
869 if (hard_reg_set_subset_p (node_set, conflict_node_set))
870 temp_node = node;
871 else
872 {
873 ira_assert (hard_reg_set_subset_p (conflict_node_set, node_set));
874 temp_node = conflict_node;
875 }
876 if (temp_node->check != node_check_tick)
877 {
878 temp_node->check = node_check_tick;
879 temp_node->conflict_size = 0;
880 }
881 size = (ira_reg_class_max_nregs
882 [ALLOCNO_CLASS (conflict_a)][ALLOCNO_MODE (conflict_a)]);
883 if (ALLOCNO_NUM_OBJECTS (conflict_a) > 1)
884 /* We will deal with the subwords individually. */
885 size = 1;
886 temp_node->conflict_size += size;
887 }
888 for (i = 0; i < obj_data->hard_regs_subnodes_num; i++)
889 {
890 object_hard_regs_node_t temp_node;
891
892 temp_node = object_hard_regs_nodes[i + node_preorder_num];
893 ira_assert (temp_node->preorder_num == i + node_preorder_num);
894 subnodes[i].left_conflict_size = (temp_node->check != node_check_tick
895 ? 0 : temp_node->conflict_size);
896 if (hard_reg_set_subset_p (temp_node->hard_regs->set,
897 profitable_hard_regs))
898 subnodes[i].max_node_impact = temp_node->hard_regs_num;
899 else
900 {
901 HARD_REG_SET temp_set;
902 int j, n;
903 enum reg_class aclass;
904
905 COPY_HARD_REG_SET (temp_set, temp_node->hard_regs->set);
906 AND_HARD_REG_SET (temp_set, profitable_hard_regs);
907 aclass = ALLOCNO_CLASS (a);
908 for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
909 if (TEST_HARD_REG_BIT (temp_set, ira_class_hard_regs[aclass][j]))
910 n++;
911 subnodes[i].max_node_impact = n;
912 }
913 subnodes[i].left_conflict_subnodes_size = 0;
914 }
915 start = node_preorder_num * object_hard_regs_nodes_num;
916 for (i = obj_data->hard_regs_subnodes_num - 1; i >= 0; i--)
917 {
918 int size, parent_i;
919 object_hard_regs_node_t parent;
920
921 size = (subnodes[i].left_conflict_subnodes_size
922 + MIN (subnodes[i].max_node_impact
923 - subnodes[i].left_conflict_subnodes_size,
924 subnodes[i].left_conflict_size));
925 parent = object_hard_regs_nodes[i + node_preorder_num]->parent;
926 if (parent == NULL)
927 continue;
928 parent_i
929 = object_hard_regs_subnode_index[start + parent->preorder_num];
930 if (parent_i < 0)
931 continue;
932 subnodes[parent_i].left_conflict_subnodes_size += size;
933 }
934 left_conflict_subnodes_size = subnodes[0].left_conflict_subnodes_size;
935 conflict_size
936 += (left_conflict_subnodes_size
937 + MIN (subnodes[0].max_node_impact - left_conflict_subnodes_size,
938 subnodes[0].left_conflict_size));
939 }
940 conflict_size += ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)];
941 data->colorable_p = conflict_size <= data->available_regs_num;
942 return data->colorable_p;
943}
ac0ab4f7 944
1756cb66
VM
945/* Update left conflict sizes of hard registers subnodes of allocno A
946 after removing allocno containing object REMOVED_OBJ with SIZE from
947 the conflict graph. Return TRUE if A is trivially colorable. */
948static bool
949update_left_conflict_sizes_p (ira_allocno_t a,
950 ira_object_t removed_obj, int size)
951{
952 int i, k, conflict_size, before_conflict_size, diff, start;
953 int node_preorder_num, parent_i;
954 object_hard_regs_node_t node, removed_node, parent;
955 object_hard_regs_subnode_t subnodes;
956 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
957 bool colorable_p = true;
958
959 ira_assert (! data->colorable_p);
960 for (k = 0; k < ALLOCNO_NUM_OBJECTS (a); k++)
ac0ab4f7 961 {
1756cb66
VM
962 ira_object_t obj = ALLOCNO_OBJECT (a, k);
963 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
964
965 node = obj_data->hard_regs_node;
966 node_preorder_num = node->preorder_num;
967 removed_node = OBJECT_COLOR_DATA (removed_obj)->hard_regs_node;
968 if (! hard_reg_set_subset_p (removed_node->hard_regs->set,
969 node->hard_regs->set)
970 && ! hard_reg_set_subset_p (node->hard_regs->set,
971 removed_node->hard_regs->set))
972 /* It is a rare case which can happen for conflicting
973 multi-object allocnos where only one pair of objects might
974 conflict. */
975 continue;
976 start = node_preorder_num * object_hard_regs_nodes_num;
977 i = object_hard_regs_subnode_index[start + removed_node->preorder_num];
978 if (i < 0)
979 i = 0;
980 subnodes = object_hard_regs_subnodes + obj_data->hard_regs_subnodes_start;
981 before_conflict_size
982 = (subnodes[i].left_conflict_subnodes_size
983 + MIN (subnodes[i].max_node_impact
984 - subnodes[i].left_conflict_subnodes_size,
985 subnodes[i].left_conflict_size));
986 subnodes[i].left_conflict_size -= size;
987 for (;;)
fe82cdfb 988 {
1756cb66
VM
989 conflict_size
990 = (subnodes[i].left_conflict_subnodes_size
991 + MIN (subnodes[i].max_node_impact
992 - subnodes[i].left_conflict_subnodes_size,
993 subnodes[i].left_conflict_size));
994 if ((diff = before_conflict_size - conflict_size) == 0)
995 break;
996 ira_assert (conflict_size < before_conflict_size);
997 parent = object_hard_regs_nodes[i + node_preorder_num]->parent;
998 if (parent == NULL)
999 break;
1000 parent_i
1001 = object_hard_regs_subnode_index[start + parent->preorder_num];
1002 if (parent_i < 0)
1003 break;
1004 i = parent_i;
1005 before_conflict_size
1006 = (subnodes[i].left_conflict_subnodes_size
1007 + MIN (subnodes[i].max_node_impact
1008 - subnodes[i].left_conflict_subnodes_size,
1009 subnodes[i].left_conflict_size));
1010 subnodes[i].left_conflict_subnodes_size -= diff;
fe82cdfb 1011 }
1756cb66
VM
1012 if (i != 0
1013 || (conflict_size
1014 + ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
1015 > data->available_regs_num))
1016 {
1017 colorable_p = false;
1018 break;
1019 }
1020 }
1021 if (colorable_p)
1022 {
1023 data->colorable_p = true;
1024 return true;
ac0ab4f7
BS
1025 }
1026 return false;
3553f0bb
VM
1027}
1028
1756cb66
VM
1029/* Return true if allocno A has an object with empty profitable hard
1030 regs. */
3553f0bb 1031static bool
1756cb66 1032empty_profitable_hard_regs (ira_allocno_t a)
3553f0bb 1033{
1756cb66 1034 int k, nobj;
fe82cdfb 1035
1756cb66
VM
1036 nobj = ALLOCNO_NUM_OBJECTS (a);
1037 for (k = 0; k < nobj; k++)
1038 {
1039 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1040 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
1041
1042 if (hard_reg_set_empty_p (obj_data->profitable_hard_regs))
1043 return true;
1044 }
1045 return false;
3553f0bb
VM
1046}
1047
1756cb66
VM
1048/* Set up profitable hard registers for each allocno being
1049 colored. */
1050static void
1051setup_profitable_hard_regs (void)
1052{
1053 unsigned int i;
1054 int j, k, nobj, hard_regno, nregs, class_size;
1055 ira_allocno_t a;
1056 bitmap_iterator bi;
1057 enum reg_class aclass;
1058 enum machine_mode mode;
1059
8d189b3f
VM
1060 /* Initial set up from allocno classes and explicitly conflicting
1061 hard regs. */
1756cb66
VM
1062 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1063 {
1064 a = ira_allocnos[i];
1065 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS)
1066 continue;
1067 mode = ALLOCNO_MODE (a);
1068 nobj = ALLOCNO_NUM_OBJECTS (a);
1069 for (k = 0; k < nobj; k++)
1070 {
1071 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1072 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
1073
1074 if (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL
1075 && ALLOCNO_CLASS_COST (a) > ALLOCNO_MEMORY_COST (a))
1076 CLEAR_HARD_REG_SET (obj_data->profitable_hard_regs);
1077 else
1078 {
1079 COPY_HARD_REG_SET (obj_data->profitable_hard_regs,
1080 reg_class_contents[aclass]);
1756cb66
VM
1081 AND_COMPL_HARD_REG_SET (obj_data->profitable_hard_regs,
1082 ira_no_alloc_regs);
1083 AND_COMPL_HARD_REG_SET (obj_data->profitable_hard_regs,
1084 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
1085 }
1086 }
1087 }
8d189b3f 1088 /* Exclude hard regs already assigned for conflicting objects. */
1756cb66
VM
1089 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, i, bi)
1090 {
1091 a = ira_allocnos[i];
1092 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1093 || ! ALLOCNO_ASSIGNED_P (a)
1094 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0)
1095 continue;
1096 mode = ALLOCNO_MODE (a);
1097 nregs = hard_regno_nregs[hard_regno][mode];
1098 nobj = ALLOCNO_NUM_OBJECTS (a);
1099 for (k = 0; k < nobj; k++)
1100 {
1101 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1102 ira_object_t conflict_obj;
1103 ira_object_conflict_iterator oci;
1104
1105 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1106 {
1107 if (nregs == nobj && nregs > 1)
1108 {
1109 int num = OBJECT_SUBWORD (conflict_obj);
1110
1111 if (WORDS_BIG_ENDIAN)
1112 CLEAR_HARD_REG_BIT
1113 (OBJECT_COLOR_DATA (conflict_obj)->profitable_hard_regs,
1114 hard_regno + nobj - num - 1);
1115 else
1116 CLEAR_HARD_REG_BIT
1117 (OBJECT_COLOR_DATA (conflict_obj)->profitable_hard_regs,
1118 hard_regno + num);
1119 }
1120 else
1121 AND_COMPL_HARD_REG_SET
1122 (OBJECT_COLOR_DATA (conflict_obj)->profitable_hard_regs,
1123 ira_reg_mode_hard_regset[hard_regno][mode]);
1124 }
1125 }
1126 }
8d189b3f 1127 /* Exclude too costly hard regs. */
1756cb66
VM
1128 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1129 {
1130 int min_cost = INT_MAX;
1131 int *costs;
1132
1133 a = ira_allocnos[i];
1134 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1135 || empty_profitable_hard_regs (a))
1136 continue;
1137 mode = ALLOCNO_MODE (a);
1138 nobj = ALLOCNO_NUM_OBJECTS (a);
1139 for (k = 0; k < nobj; k++)
1140 {
1141 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1142 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
1143
1144 if ((costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a)) != NULL
1145 || (costs = ALLOCNO_HARD_REG_COSTS (a)) != NULL)
1146 {
1147 class_size = ira_class_hard_regs_num[aclass];
1148 for (j = 0; j < class_size; j++)
1149 {
1150 hard_regno = ira_class_hard_regs[aclass][j];
1151 nregs = hard_regno_nregs[hard_regno][mode];
1152 if (nregs == nobj && nregs > 1)
1153 {
1154 int num = OBJECT_SUBWORD (obj);
1155
1156 if (WORDS_BIG_ENDIAN)
1157 hard_regno += nobj - num - 1;
1158 else
1159 hard_regno += num;
1160 }
1161 if (! TEST_HARD_REG_BIT (obj_data->profitable_hard_regs,
1162 hard_regno))
1163 continue;
1164 if (ALLOCNO_UPDATED_MEMORY_COST (a) < costs[j])
1165 CLEAR_HARD_REG_BIT (obj_data->profitable_hard_regs,
1166 hard_regno);
1167 else if (min_cost > costs[j])
1168 min_cost = costs[j];
1169 }
1170 }
1171 else if (ALLOCNO_UPDATED_MEMORY_COST (a)
1172 < ALLOCNO_UPDATED_CLASS_COST (a))
1173 CLEAR_HARD_REG_SET (obj_data->profitable_hard_regs);
1174 }
1175 if (ALLOCNO_UPDATED_CLASS_COST (a) > min_cost)
1176 ALLOCNO_UPDATED_CLASS_COST (a) = min_cost;
1177 }
1178}
3553f0bb
VM
1179
1180\f
1181
058e97ec
VM
1182/* This page contains functions used to choose hard registers for
1183 allocnos. */
1184
1185/* Array whose element value is TRUE if the corresponding hard
1186 register was already allocated for an allocno. */
1187static bool allocated_hardreg_p[FIRST_PSEUDO_REGISTER];
1188
f754734f 1189/* Describes one element in a queue of allocnos whose costs need to be
1756cb66
VM
1190 updated. Each allocno in the queue is known to have an allocno
1191 class. */
f35bf7a9
RS
1192struct update_cost_queue_elem
1193{
f754734f
RS
1194 /* This element is in the queue iff CHECK == update_cost_check. */
1195 int check;
1196
1197 /* COST_HOP_DIVISOR**N, where N is the length of the shortest path
1198 connecting this allocno to the one being allocated. */
1199 int divisor;
1200
1201 /* The next allocno in the queue, or null if this is the last element. */
1202 ira_allocno_t next;
1203};
1204
1205/* The first element in a queue of allocnos whose copy costs need to be
1206 updated. Null if the queue is empty. */
1207static ira_allocno_t update_cost_queue;
1208
1209/* The last element in the queue described by update_cost_queue.
1210 Not valid if update_cost_queue is null. */
1211static struct update_cost_queue_elem *update_cost_queue_tail;
1212
1213/* A pool of elements in the queue described by update_cost_queue.
1214 Elements are indexed by ALLOCNO_NUM. */
1215static struct update_cost_queue_elem *update_cost_queue_elems;
058e97ec
VM
1216
1217/* The current value of update_copy_cost call count. */
1218static int update_cost_check;
1219
1220/* Allocate and initialize data necessary for function
1221 update_copy_costs. */
1222static void
1223initiate_cost_update (void)
1224{
f754734f
RS
1225 size_t size;
1226
1227 size = ira_allocnos_num * sizeof (struct update_cost_queue_elem);
1228 update_cost_queue_elems
1229 = (struct update_cost_queue_elem *) ira_allocate (size);
1230 memset (update_cost_queue_elems, 0, size);
058e97ec
VM
1231 update_cost_check = 0;
1232}
1233
1234/* Deallocate data used by function update_copy_costs. */
1235static void
1236finish_cost_update (void)
1237{
0eeb2240 1238 ira_free (update_cost_queue_elems);
058e97ec
VM
1239}
1240
a7f32992
VM
1241/* When we traverse allocnos to update hard register costs, the cost
1242 divisor will be multiplied by the following macro value for each
1243 hop from given allocno to directly connected allocnos. */
1244#define COST_HOP_DIVISOR 4
1245
f754734f 1246/* Start a new cost-updating pass. */
058e97ec 1247static void
f754734f 1248start_update_cost (void)
058e97ec 1249{
f754734f
RS
1250 update_cost_check++;
1251 update_cost_queue = NULL;
1252}
058e97ec 1253
1756cb66
VM
1254/* Add (ALLOCNO, DIVISOR) to the end of update_cost_queue, unless
1255 ALLOCNO is already in the queue, or has NO_REGS class. */
f754734f
RS
1256static inline void
1257queue_update_cost (ira_allocno_t allocno, int divisor)
1258{
1259 struct update_cost_queue_elem *elem;
1260
1261 elem = &update_cost_queue_elems[ALLOCNO_NUM (allocno)];
1262 if (elem->check != update_cost_check
1756cb66 1263 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 1264 {
f754734f
RS
1265 elem->check = update_cost_check;
1266 elem->divisor = divisor;
1267 elem->next = NULL;
1268 if (update_cost_queue == NULL)
1269 update_cost_queue = allocno;
058e97ec 1270 else
f754734f
RS
1271 update_cost_queue_tail->next = allocno;
1272 update_cost_queue_tail = elem;
058e97ec
VM
1273 }
1274}
1275
f754734f
RS
1276/* Try to remove the first element from update_cost_queue. Return false
1277 if the queue was empty, otherwise make (*ALLOCNO, *DIVISOR) describe
1278 the removed element. */
1279static inline bool
1280get_next_update_cost (ira_allocno_t *allocno, int *divisor)
058e97ec 1281{
f754734f
RS
1282 struct update_cost_queue_elem *elem;
1283
1284 if (update_cost_queue == NULL)
1285 return false;
1286
1287 *allocno = update_cost_queue;
1288 elem = &update_cost_queue_elems[ALLOCNO_NUM (*allocno)];
1289 *divisor = elem->divisor;
1290 update_cost_queue = elem->next;
1291 return true;
058e97ec
VM
1292}
1293
f754734f
RS
1294/* Update the cost of allocnos to increase chances to remove some
1295 copies as the result of subsequent assignment. */
a7f32992 1296static void
f754734f 1297update_copy_costs (ira_allocno_t allocno, bool decr_p)
a7f32992 1298{
f754734f 1299 int i, cost, update_cost, hard_regno, divisor;
a7f32992 1300 enum machine_mode mode;
1756cb66 1301 enum reg_class rclass, aclass;
a7f32992
VM
1302 ira_allocno_t another_allocno;
1303 ira_copy_t cp, next_cp;
1304
f754734f
RS
1305 hard_regno = ALLOCNO_HARD_REGNO (allocno);
1306 ira_assert (hard_regno >= 0);
1307
1756cb66
VM
1308 aclass = ALLOCNO_CLASS (allocno);
1309 if (aclass == NO_REGS)
a7f32992 1310 return;
1756cb66 1311 i = ira_class_hard_reg_index[aclass][hard_regno];
f754734f
RS
1312 ira_assert (i >= 0);
1313 rclass = REGNO_REG_CLASS (hard_regno);
1314
1315 start_update_cost ();
1316 divisor = 1;
1317 do
a7f32992 1318 {
f754734f 1319 mode = ALLOCNO_MODE (allocno);
1756cb66 1320 ira_init_register_move_cost_if_necessary (mode);
f754734f 1321 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
a7f32992 1322 {
f754734f 1323 if (cp->first == allocno)
a7f32992 1324 {
f754734f
RS
1325 next_cp = cp->next_first_allocno_copy;
1326 another_allocno = cp->second;
1327 }
1328 else if (cp->second == allocno)
1329 {
1330 next_cp = cp->next_second_allocno_copy;
1331 another_allocno = cp->first;
a7f32992 1332 }
f754734f
RS
1333 else
1334 gcc_unreachable ();
1335
1756cb66
VM
1336 aclass = ALLOCNO_CLASS (another_allocno);
1337 if (! TEST_HARD_REG_BIT (reg_class_contents[aclass],
6042d1dd 1338 hard_regno)
f754734f
RS
1339 || ALLOCNO_ASSIGNED_P (another_allocno))
1340 continue;
1341
1342 cost = (cp->second == allocno
1756cb66
VM
1343 ? ira_register_move_cost[mode][rclass][aclass]
1344 : ira_register_move_cost[mode][aclass][rclass]);
f754734f
RS
1345 if (decr_p)
1346 cost = -cost;
1347
1348 update_cost = cp->freq * cost / divisor;
1349 if (update_cost == 0)
1350 continue;
1351
1352 ira_allocate_and_set_or_copy_costs
1756cb66
VM
1353 (&ALLOCNO_UPDATED_HARD_REG_COSTS (another_allocno), aclass,
1354 ALLOCNO_UPDATED_CLASS_COST (another_allocno),
f754734f
RS
1355 ALLOCNO_HARD_REG_COSTS (another_allocno));
1356 ira_allocate_and_set_or_copy_costs
1357 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno),
1756cb66
VM
1358 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (another_allocno));
1359 i = ira_class_hard_reg_index[aclass][hard_regno];
1360 if (i < 0)
1361 continue;
f754734f
RS
1362 ALLOCNO_UPDATED_HARD_REG_COSTS (another_allocno)[i] += update_cost;
1363 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno)[i]
1364 += update_cost;
1365
1366 queue_update_cost (another_allocno, divisor * COST_HOP_DIVISOR);
a7f32992 1367 }
a7f32992 1368 }
f754734f
RS
1369 while (get_next_update_cost (&allocno, &divisor));
1370}
1371
7db7ed3c 1372/* This function updates COSTS (decrease if DECR_P) for hard_registers
1756cb66 1373 of ACLASS by conflict costs of the unassigned allocnos
7db7ed3c
VM
1374 connected by copies with allocnos in update_cost_queue. This
1375 update increases chances to remove some copies. */
f754734f 1376static void
1756cb66 1377update_conflict_hard_regno_costs (int *costs, enum reg_class aclass,
7db7ed3c 1378 bool decr_p)
f754734f
RS
1379{
1380 int i, cost, class_size, freq, mult, div, divisor;
7db7ed3c 1381 int index, hard_regno;
f754734f
RS
1382 int *conflict_costs;
1383 bool cont_p;
1756cb66 1384 enum reg_class another_aclass;
f754734f
RS
1385 ira_allocno_t allocno, another_allocno;
1386 ira_copy_t cp, next_cp;
1387
1388 while (get_next_update_cost (&allocno, &divisor))
1389 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
1390 {
1391 if (cp->first == allocno)
1392 {
1393 next_cp = cp->next_first_allocno_copy;
1394 another_allocno = cp->second;
1395 }
1396 else if (cp->second == allocno)
1397 {
1398 next_cp = cp->next_second_allocno_copy;
1399 another_allocno = cp->first;
1400 }
1401 else
1402 gcc_unreachable ();
1756cb66
VM
1403 another_aclass = ALLOCNO_CLASS (another_allocno);
1404 if (! ira_reg_classes_intersect_p[aclass][another_aclass]
f754734f 1405 || ALLOCNO_ASSIGNED_P (another_allocno)
1756cb66 1406 || ALLOCNO_COLOR_DATA (another_allocno)->may_be_spilled_p)
f754734f 1407 continue;
1756cb66 1408 class_size = ira_class_hard_regs_num[another_aclass];
f754734f
RS
1409 ira_allocate_and_copy_costs
1410 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno),
1756cb66 1411 another_aclass, ALLOCNO_CONFLICT_HARD_REG_COSTS (another_allocno));
f754734f
RS
1412 conflict_costs
1413 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno);
1414 if (conflict_costs == NULL)
1415 cont_p = true;
1416 else
1417 {
1418 mult = cp->freq;
1419 freq = ALLOCNO_FREQ (another_allocno);
1420 if (freq == 0)
1421 freq = 1;
1422 div = freq * divisor;
1423 cont_p = false;
1424 for (i = class_size - 1; i >= 0; i--)
1425 {
1756cb66 1426 hard_regno = ira_class_hard_regs[another_aclass][i];
7db7ed3c 1427 ira_assert (hard_regno >= 0);
1756cb66 1428 index = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
1429 if (index < 0)
1430 continue;
f754734f
RS
1431 cost = conflict_costs [i] * mult / div;
1432 if (cost == 0)
1433 continue;
1434 cont_p = true;
1435 if (decr_p)
1436 cost = -cost;
7db7ed3c 1437 costs[index] += cost;
f754734f
RS
1438 }
1439 }
1440 /* Probably 5 hops will be enough. */
1441 if (cont_p
1442 && divisor <= (COST_HOP_DIVISOR
1443 * COST_HOP_DIVISOR
1444 * COST_HOP_DIVISOR
1445 * COST_HOP_DIVISOR))
1446 queue_update_cost (another_allocno, divisor * COST_HOP_DIVISOR);
1447 }
a7f32992
VM
1448}
1449
1756cb66 1450/* Set up conflicting and profitable regs (through CONFLICT_REGS and
ad3b266b
VM
1451 PROFITABLE_REGS) for each object of allocno A. Remember that the
1452 profitable regs exclude hard regs which can not hold value of mode
1453 of allocno A. */
1756cb66 1454static inline void
8d189b3f
VM
1455get_conflict_profitable_regs (ira_allocno_t a, bool retry_p,
1456 HARD_REG_SET *conflict_regs,
1457 HARD_REG_SET *profitable_regs)
1756cb66
VM
1458{
1459 int i, nwords;
1460 ira_object_t obj;
1461
1462 nwords = ALLOCNO_NUM_OBJECTS (a);
1463 for (i = 0; i < nwords; i++)
1464 {
1465 obj = ALLOCNO_OBJECT (a, i);
1466 COPY_HARD_REG_SET (conflict_regs[i],
1467 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
1468 if (retry_p)
ad3b266b
VM
1469 {
1470 COPY_HARD_REG_SET (profitable_regs[i],
1471 reg_class_contents[ALLOCNO_CLASS (a)]);
1472 AND_COMPL_HARD_REG_SET (profitable_regs[i],
1473 ira_prohibited_class_mode_regs
1474 [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
1475 }
1756cb66
VM
1476 else
1477 COPY_HARD_REG_SET (profitable_regs[i],
1478 OBJECT_COLOR_DATA (obj)->profitable_hard_regs);
1479 }
1480}
1481
1482/* Return true if HARD_REGNO is ok for assigning to allocno A whose
1483 objects have corresponding CONFLICT_REGS and PROFITABLE_REGS. */
1484static inline bool
1485check_hard_reg_p (ira_allocno_t a, int hard_regno,
1486 HARD_REG_SET *conflict_regs, HARD_REG_SET *profitable_regs)
1487{
1488 int j, nwords, nregs;
8d189b3f
VM
1489 enum reg_class aclass;
1490 enum machine_mode mode;
1756cb66 1491
8d189b3f
VM
1492 aclass = ALLOCNO_CLASS (a);
1493 mode = ALLOCNO_MODE (a);
1494 if (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode],
1495 hard_regno))
1496 return false;
1497 nregs = hard_regno_nregs[hard_regno][mode];
1756cb66
VM
1498 nwords = ALLOCNO_NUM_OBJECTS (a);
1499 for (j = 0; j < nregs; j++)
1500 {
1501 int k;
1502 int set_to_test_start = 0, set_to_test_end = nwords;
1503
1504 if (nregs == nwords)
1505 {
1506 if (WORDS_BIG_ENDIAN)
1507 set_to_test_start = nwords - j - 1;
1508 else
1509 set_to_test_start = j;
1510 set_to_test_end = set_to_test_start + 1;
1511 }
1512 for (k = set_to_test_start; k < set_to_test_end; k++)
1513 /* Checking only profitable hard regs. */
1514 if (TEST_HARD_REG_BIT (conflict_regs[k], hard_regno + j)
1515 || ! TEST_HARD_REG_BIT (profitable_regs[k], hard_regno + j))
1516 break;
1517 if (k != set_to_test_end)
1518 break;
1519 }
1520 return j == nregs;
1521}
9181a6e5
VM
1522#ifndef HONOR_REG_ALLOC_ORDER
1523
1524/* Return number of registers needed to be saved and restored at
1525 function prologue/epilogue if we allocate HARD_REGNO to hold value
1526 of MODE. */
1527static int
1528calculate_saved_nregs (int hard_regno, enum machine_mode mode)
1529{
1530 int i;
1531 int nregs = 0;
1532
1533 ira_assert (hard_regno >= 0);
1534 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1535 if (!allocated_hardreg_p[hard_regno + i]
1536 && !TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + i)
1537 && !LOCAL_REGNO (hard_regno + i))
1538 nregs++;
1539 return nregs;
1540}
1541#endif
1756cb66 1542
22b0982c
VM
1543/* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
1544 that the function called from function
1756cb66
VM
1545 `ira_reassign_conflict_allocnos' and `allocno_reload_assign'. In
1546 this case some allocno data are not defined or updated and we
1547 should not touch these data. The function returns true if we
1548 managed to assign a hard register to the allocno.
1549
1550 To assign a hard register, first of all we calculate all conflict
1551 hard registers which can come from conflicting allocnos with
1552 already assigned hard registers. After that we find first free
1553 hard register with the minimal cost. During hard register cost
1554 calculation we take conflict hard register costs into account to
1555 give a chance for conflicting allocnos to get a better hard
1556 register in the future.
1557
1558 If the best hard register cost is bigger than cost of memory usage
1559 for the allocno, we don't assign a hard register to given allocno
1560 at all.
1561
1562 If we assign a hard register to the allocno, we update costs of the
1563 hard register for allocnos connected by copies to improve a chance
1564 to coalesce insns represented by the copies when we assign hard
1565 registers to the allocnos connected by the copies. */
058e97ec 1566static bool
22b0982c 1567assign_hard_reg (ira_allocno_t a, bool retry_p)
058e97ec 1568{
1756cb66 1569 HARD_REG_SET conflicting_regs[2], profitable_hard_regs[2];
9181a6e5 1570 int i, j, hard_regno, best_hard_regno, class_size, saved_nregs;
22b0982c 1571 int cost, mem_cost, min_cost, full_cost, min_full_cost, nwords, word;
058e97ec 1572 int *a_costs;
1756cb66 1573 enum reg_class aclass;
058e97ec 1574 enum machine_mode mode;
058e97ec 1575 static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
a5c011cd
MP
1576#ifndef HONOR_REG_ALLOC_ORDER
1577 enum reg_class rclass;
1578 int add_cost;
1579#endif
058e97ec
VM
1580#ifdef STACK_REGS
1581 bool no_stack_reg_p;
1582#endif
1583
22b0982c 1584 ira_assert (! ALLOCNO_ASSIGNED_P (a));
8d189b3f
VM
1585 get_conflict_profitable_regs (a, retry_p,
1586 conflicting_regs, profitable_hard_regs);
1756cb66
VM
1587 aclass = ALLOCNO_CLASS (a);
1588 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
1589 best_hard_regno = -1;
1590 memset (full_costs, 0, sizeof (int) * class_size);
1591 mem_cost = 0;
058e97ec
VM
1592 memset (costs, 0, sizeof (int) * class_size);
1593 memset (full_costs, 0, sizeof (int) * class_size);
1594#ifdef STACK_REGS
1595 no_stack_reg_p = false;
1596#endif
1756cb66
VM
1597 if (! retry_p)
1598 start_update_cost ();
22b0982c
VM
1599 mem_cost += ALLOCNO_UPDATED_MEMORY_COST (a);
1600
1601 ira_allocate_and_copy_costs (&ALLOCNO_UPDATED_HARD_REG_COSTS (a),
1756cb66 1602 aclass, ALLOCNO_HARD_REG_COSTS (a));
22b0982c 1603 a_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
058e97ec 1604#ifdef STACK_REGS
22b0982c 1605 no_stack_reg_p = no_stack_reg_p || ALLOCNO_TOTAL_NO_STACK_REG_P (a);
058e97ec 1606#endif
1756cb66 1607 cost = ALLOCNO_UPDATED_CLASS_COST (a);
22b0982c
VM
1608 for (i = 0; i < class_size; i++)
1609 if (a_costs != NULL)
1610 {
1611 costs[i] += a_costs[i];
1612 full_costs[i] += a_costs[i];
1613 }
1614 else
1615 {
1616 costs[i] += cost;
1617 full_costs[i] += cost;
1618 }
1756cb66 1619 nwords = ALLOCNO_NUM_OBJECTS (a);
22b0982c
VM
1620 for (word = 0; word < nwords; word++)
1621 {
1622 ira_object_t conflict_obj;
1623 ira_object_t obj = ALLOCNO_OBJECT (a, word);
1624 ira_object_conflict_iterator oci;
1625
22b0982c
VM
1626 /* Take preferences of conflicting allocnos into account. */
1627 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1756cb66 1628 {
22b0982c 1629 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66
VM
1630 enum reg_class conflict_aclass;
1631
22b0982c
VM
1632 /* Reload can give another class so we need to check all
1633 allocnos. */
1756cb66
VM
1634 if (!retry_p
1635 && (!bitmap_bit_p (consideration_allocno_bitmap,
1636 ALLOCNO_NUM (conflict_a))
1637 || ((!ALLOCNO_ASSIGNED_P (conflict_a)
1638 || ALLOCNO_HARD_REGNO (conflict_a) < 0)
1639 && !(hard_reg_set_intersect_p
1640 (profitable_hard_regs[word],
1641 OBJECT_COLOR_DATA
1642 (conflict_obj)->profitable_hard_regs)))))
22b0982c 1643 continue;
1756cb66 1644 conflict_aclass = ALLOCNO_CLASS (conflict_a);
22b0982c 1645 ira_assert (ira_reg_classes_intersect_p
1756cb66 1646 [aclass][conflict_aclass]);
22b0982c 1647 if (ALLOCNO_ASSIGNED_P (conflict_a))
fa86d337 1648 {
22b0982c
VM
1649 hard_regno = ALLOCNO_HARD_REGNO (conflict_a);
1650 if (hard_regno >= 0
b8faca75
VM
1651 && (ira_hard_reg_set_intersection_p
1652 (hard_regno, ALLOCNO_MODE (conflict_a),
1653 reg_class_contents[aclass])))
fa86d337 1654 {
22b0982c 1655 int n_objects = ALLOCNO_NUM_OBJECTS (conflict_a);
4648deb4 1656 int conflict_nregs;
1756cb66 1657
4648deb4
VM
1658 mode = ALLOCNO_MODE (conflict_a);
1659 conflict_nregs = hard_regno_nregs[hard_regno][mode];
22b0982c 1660 if (conflict_nregs == n_objects && conflict_nregs > 1)
fa86d337 1661 {
22b0982c 1662 int num = OBJECT_SUBWORD (conflict_obj);
ac0ab4f7 1663
22b0982c
VM
1664 if (WORDS_BIG_ENDIAN)
1665 SET_HARD_REG_BIT (conflicting_regs[word],
1666 hard_regno + n_objects - num - 1);
1667 else
1668 SET_HARD_REG_BIT (conflicting_regs[word],
1669 hard_regno + num);
ac0ab4f7 1670 }
22b0982c
VM
1671 else
1672 IOR_HARD_REG_SET
1673 (conflicting_regs[word],
1674 ira_reg_mode_hard_regset[hard_regno][mode]);
1756cb66 1675 if (hard_reg_set_subset_p (profitable_hard_regs[word],
22b0982c
VM
1676 conflicting_regs[word]))
1677 goto fail;
fa86d337
BS
1678 }
1679 }
1756cb66
VM
1680 else if (! retry_p
1681 && ! ALLOCNO_COLOR_DATA (conflict_a)->may_be_spilled_p)
22b0982c
VM
1682 {
1683 int k, *conflict_costs;
1684
1685 ira_allocate_and_copy_costs
1686 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a),
1756cb66 1687 conflict_aclass,
22b0982c
VM
1688 ALLOCNO_CONFLICT_HARD_REG_COSTS (conflict_a));
1689 conflict_costs
1690 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a);
1691 if (conflict_costs != NULL)
1692 for (j = class_size - 1; j >= 0; j--)
1693 {
1756cb66 1694 hard_regno = ira_class_hard_regs[aclass][j];
22b0982c 1695 ira_assert (hard_regno >= 0);
1756cb66 1696 k = ira_class_hard_reg_index[conflict_aclass][hard_regno];
22b0982c
VM
1697 if (k < 0)
1698 continue;
1699 full_costs[j] -= conflict_costs[k];
1700 }
1701 queue_update_cost (conflict_a, COST_HOP_DIVISOR);
1702 }
fa86d337 1703 }
058e97ec 1704 }
1756cb66
VM
1705 if (! retry_p)
1706 /* Take into account preferences of allocnos connected by copies to
1707 the conflict allocnos. */
1708 update_conflict_hard_regno_costs (full_costs, aclass, true);
f754734f 1709
a7f32992
VM
1710 /* Take preferences of allocnos connected by copies into
1711 account. */
1756cb66
VM
1712 if (! retry_p)
1713 {
1714 start_update_cost ();
1715 queue_update_cost (a, COST_HOP_DIVISOR);
1716 update_conflict_hard_regno_costs (full_costs, aclass, false);
1717 }
058e97ec 1718 min_cost = min_full_cost = INT_MAX;
ac0ab4f7 1719
058e97ec
VM
1720 /* We don't care about giving callee saved registers to allocnos no
1721 living through calls because call clobbered registers are
1722 allocated first (it is usual practice to put them first in
1723 REG_ALLOC_ORDER). */
1756cb66 1724 mode = ALLOCNO_MODE (a);
058e97ec
VM
1725 for (i = 0; i < class_size; i++)
1726 {
1756cb66 1727 hard_regno = ira_class_hard_regs[aclass][i];
058e97ec
VM
1728#ifdef STACK_REGS
1729 if (no_stack_reg_p
1730 && FIRST_STACK_REG <= hard_regno && hard_regno <= LAST_STACK_REG)
1731 continue;
1732#endif
1756cb66
VM
1733 if (! check_hard_reg_p (a, hard_regno,
1734 conflicting_regs, profitable_hard_regs))
058e97ec
VM
1735 continue;
1736 cost = costs[i];
1737 full_cost = full_costs[i];
5a733826 1738#ifndef HONOR_REG_ALLOC_ORDER
9181a6e5 1739 if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
058e97ec
VM
1740 /* We need to save/restore the hard register in
1741 epilogue/prologue. Therefore we increase the cost. */
1742 {
058e97ec 1743 rclass = REGNO_REG_CLASS (hard_regno);
9181a6e5
VM
1744 add_cost = ((ira_memory_move_cost[mode][rclass][0]
1745 + ira_memory_move_cost[mode][rclass][1])
1746 * saved_nregs / hard_regno_nregs[hard_regno][mode] - 1);
058e97ec
VM
1747 cost += add_cost;
1748 full_cost += add_cost;
1749 }
5a733826 1750#endif
058e97ec
VM
1751 if (min_cost > cost)
1752 min_cost = cost;
1753 if (min_full_cost > full_cost)
1754 {
1755 min_full_cost = full_cost;
1756 best_hard_regno = hard_regno;
1757 ira_assert (hard_regno >= 0);
1758 }
1759 }
1760 if (min_full_cost > mem_cost)
1761 {
1762 if (! retry_p && internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
1763 fprintf (ira_dump_file, "(memory is more profitable %d vs %d) ",
1764 mem_cost, min_full_cost);
1765 best_hard_regno = -1;
1766 }
1767 fail:
058e97ec 1768 if (best_hard_regno >= 0)
9181a6e5
VM
1769 {
1770 for (i = hard_regno_nregs[best_hard_regno][mode] - 1; i >= 0; i--)
1771 allocated_hardreg_p[best_hard_regno + 1] = true;
1772 }
22b0982c
VM
1773 ALLOCNO_HARD_REGNO (a) = best_hard_regno;
1774 ALLOCNO_ASSIGNED_P (a) = true;
1775 if (best_hard_regno >= 0)
1776 update_copy_costs (a, true);
1756cb66 1777 ira_assert (ALLOCNO_CLASS (a) == aclass);
22b0982c
VM
1778 /* We don't need updated costs anymore: */
1779 ira_free_allocno_updated_costs (a);
058e97ec
VM
1780 return best_hard_regno >= 0;
1781}
1782
1783\f
1784
1785/* This page contains the allocator based on the Chaitin-Briggs algorithm. */
1786
1787/* Bucket of allocnos that can colored currently without spilling. */
1788static ira_allocno_t colorable_allocno_bucket;
1789
1790/* Bucket of allocnos that might be not colored currently without
1791 spilling. */
1792static ira_allocno_t uncolorable_allocno_bucket;
1793
1756cb66
VM
1794/* The current number of allocnos in the uncolorable_bucket. */
1795static int uncolorable_allocnos_num;
058e97ec 1796
30ea859e
VM
1797/* Return the current spill priority of allocno A. The less the
1798 number, the more preferable the allocno for spilling. */
1756cb66 1799static inline int
30ea859e
VM
1800allocno_spill_priority (ira_allocno_t a)
1801{
1756cb66
VM
1802 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1803
1804 return (data->temp
1805 / (ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a)
1806 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
30ea859e
VM
1807 + 1));
1808}
1809
1756cb66 1810/* Add allocno A to bucket *BUCKET_PTR. A should be not in a bucket
058e97ec
VM
1811 before the call. */
1812static void
1756cb66 1813add_allocno_to_bucket (ira_allocno_t a, ira_allocno_t *bucket_ptr)
058e97ec 1814{
1756cb66
VM
1815 ira_allocno_t first_a;
1816 allocno_color_data_t data;
058e97ec
VM
1817
1818 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 1819 && ALLOCNO_CLASS (a) != NO_REGS)
058e97ec 1820 {
1756cb66
VM
1821 uncolorable_allocnos_num++;
1822 ira_assert (uncolorable_allocnos_num > 0);
058e97ec 1823 }
1756cb66
VM
1824 first_a = *bucket_ptr;
1825 data = ALLOCNO_COLOR_DATA (a);
1826 data->next_bucket_allocno = first_a;
1827 data->prev_bucket_allocno = NULL;
1828 if (first_a != NULL)
1829 ALLOCNO_COLOR_DATA (first_a)->prev_bucket_allocno = a;
1830 *bucket_ptr = a;
058e97ec
VM
1831}
1832
058e97ec
VM
1833/* Compare two allocnos to define which allocno should be pushed first
1834 into the coloring stack. If the return is a negative number, the
1835 allocno given by the first parameter will be pushed first. In this
1836 case such allocno has less priority than the second one and the
1837 hard register will be assigned to it after assignment to the second
1838 one. As the result of such assignment order, the second allocno
1839 has a better chance to get the best hard register. */
1840static int
1841bucket_allocno_compare_func (const void *v1p, const void *v2p)
1842{
1843 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
1844 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
1845 int diff, a1_freq, a2_freq, a1_num, a2_num;
1846
1756cb66 1847 if ((diff = (int) ALLOCNO_CLASS (a2) - ALLOCNO_CLASS (a1)) != 0)
058e97ec 1848 return diff;
22b0982c 1849 a1_freq = ALLOCNO_FREQ (a1);
22b0982c 1850 a2_freq = ALLOCNO_FREQ (a2);
1756cb66 1851 if ((diff = a1_freq - a2_freq) != 0)
058e97ec 1852 return diff;
1756cb66
VM
1853 a1_num = ALLOCNO_COLOR_DATA (a1)->available_regs_num;
1854 a2_num = ALLOCNO_COLOR_DATA (a2)->available_regs_num;
1855 if ((diff = a2_num - a1_num) != 0)
99710245 1856 return diff;
058e97ec
VM
1857 return ALLOCNO_NUM (a2) - ALLOCNO_NUM (a1);
1858}
1859
1860/* Sort bucket *BUCKET_PTR and return the result through
1861 BUCKET_PTR. */
1862static void
1756cb66
VM
1863sort_bucket (ira_allocno_t *bucket_ptr,
1864 int (*compare_func) (const void *, const void *))
058e97ec
VM
1865{
1866 ira_allocno_t a, head;
1867 int n;
1868
1756cb66
VM
1869 for (n = 0, a = *bucket_ptr;
1870 a != NULL;
1871 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
058e97ec
VM
1872 sorted_allocnos[n++] = a;
1873 if (n <= 1)
1874 return;
1756cb66 1875 qsort (sorted_allocnos, n, sizeof (ira_allocno_t), compare_func);
058e97ec
VM
1876 head = NULL;
1877 for (n--; n >= 0; n--)
1878 {
1879 a = sorted_allocnos[n];
1756cb66
VM
1880 ALLOCNO_COLOR_DATA (a)->next_bucket_allocno = head;
1881 ALLOCNO_COLOR_DATA (a)->prev_bucket_allocno = NULL;
058e97ec 1882 if (head != NULL)
1756cb66 1883 ALLOCNO_COLOR_DATA (head)->prev_bucket_allocno = a;
058e97ec
VM
1884 head = a;
1885 }
1886 *bucket_ptr = head;
1887}
1888
1889/* Add ALLOCNO to bucket *BUCKET_PTR maintaining the order according
1890 their priority. ALLOCNO should be not in a bucket before the
1891 call. */
1892static void
548a6322
VM
1893add_allocno_to_ordered_bucket (ira_allocno_t allocno,
1894 ira_allocno_t *bucket_ptr)
058e97ec
VM
1895{
1896 ira_allocno_t before, after;
058e97ec
VM
1897
1898 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 1899 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 1900 {
1756cb66
VM
1901 uncolorable_allocnos_num++;
1902 ira_assert (uncolorable_allocnos_num > 0);
058e97ec
VM
1903 }
1904 for (before = *bucket_ptr, after = NULL;
1905 before != NULL;
1756cb66
VM
1906 after = before,
1907 before = ALLOCNO_COLOR_DATA (before)->next_bucket_allocno)
058e97ec
VM
1908 if (bucket_allocno_compare_func (&allocno, &before) < 0)
1909 break;
1756cb66
VM
1910 ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno = before;
1911 ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno = after;
058e97ec
VM
1912 if (after == NULL)
1913 *bucket_ptr = allocno;
1914 else
1756cb66 1915 ALLOCNO_COLOR_DATA (after)->next_bucket_allocno = allocno;
058e97ec 1916 if (before != NULL)
1756cb66 1917 ALLOCNO_COLOR_DATA (before)->prev_bucket_allocno = allocno;
058e97ec
VM
1918}
1919
1920/* Delete ALLOCNO from bucket *BUCKET_PTR. It should be there before
1921 the call. */
1922static void
1923delete_allocno_from_bucket (ira_allocno_t allocno, ira_allocno_t *bucket_ptr)
1924{
1925 ira_allocno_t prev_allocno, next_allocno;
058e97ec
VM
1926
1927 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 1928 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 1929 {
1756cb66
VM
1930 uncolorable_allocnos_num--;
1931 ira_assert (uncolorable_allocnos_num >= 0);
058e97ec 1932 }
1756cb66
VM
1933 prev_allocno = ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno;
1934 next_allocno = ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno;
058e97ec 1935 if (prev_allocno != NULL)
1756cb66 1936 ALLOCNO_COLOR_DATA (prev_allocno)->next_bucket_allocno = next_allocno;
058e97ec
VM
1937 else
1938 {
1939 ira_assert (*bucket_ptr == allocno);
1940 *bucket_ptr = next_allocno;
1941 }
1942 if (next_allocno != NULL)
1756cb66 1943 ALLOCNO_COLOR_DATA (next_allocno)->prev_bucket_allocno = prev_allocno;
058e97ec
VM
1944}
1945
22b0982c 1946/* Put allocno A onto the coloring stack without removing it from its
058e97ec
VM
1947 bucket. Pushing allocno to the coloring stack can result in moving
1948 conflicting allocnos from the uncolorable bucket to the colorable
1949 one. */
1950static void
22b0982c 1951push_allocno_to_stack (ira_allocno_t a)
058e97ec 1952{
1756cb66
VM
1953 enum reg_class aclass;
1954 allocno_color_data_t data, conflict_data;
1955 int size, i, n = ALLOCNO_NUM_OBJECTS (a);
1956
1957 data = ALLOCNO_COLOR_DATA (a);
1958 data->in_graph_p = false;
22b0982c 1959 VEC_safe_push (ira_allocno_t, heap, allocno_stack_vec, a);
1756cb66
VM
1960 aclass = ALLOCNO_CLASS (a);
1961 if (aclass == NO_REGS)
058e97ec 1962 return;
1756cb66
VM
1963 size = ira_reg_class_max_nregs[aclass][ALLOCNO_MODE (a)];
1964 if (n > 1)
ac0ab4f7
BS
1965 {
1966 /* We will deal with the subwords individually. */
22b0982c 1967 gcc_assert (size == ALLOCNO_NUM_OBJECTS (a));
ac0ab4f7
BS
1968 size = 1;
1969 }
22b0982c 1970 for (i = 0; i < n; i++)
058e97ec 1971 {
22b0982c 1972 ira_object_t obj = ALLOCNO_OBJECT (a, i);
22b0982c
VM
1973 ira_object_t conflict_obj;
1974 ira_object_conflict_iterator oci;
1975
1976 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
548a6322 1977 {
22b0982c 1978 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
22b0982c 1979
1756cb66
VM
1980 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
1981 if (conflict_data->colorable_p
1982 || ! conflict_data->in_graph_p
1983 || ALLOCNO_ASSIGNED_P (conflict_a)
1984 || !(hard_reg_set_intersect_p
1985 (OBJECT_COLOR_DATA (obj)->profitable_hard_regs,
1986 OBJECT_COLOR_DATA (conflict_obj)->profitable_hard_regs)))
22b0982c 1987 continue;
1756cb66
VM
1988 ira_assert (bitmap_bit_p (coloring_allocno_bitmap,
1989 ALLOCNO_NUM (conflict_a)));
1990 if (update_left_conflict_sizes_p (conflict_a, obj, size))
22b0982c
VM
1991 {
1992 delete_allocno_from_bucket
1756cb66 1993 (conflict_a, &uncolorable_allocno_bucket);
22b0982c
VM
1994 add_allocno_to_ordered_bucket
1995 (conflict_a, &colorable_allocno_bucket);
1756cb66
VM
1996 if (internal_flag_ira_verbose > 4 && ira_dump_file != NULL)
1997 {
1998 fprintf (ira_dump_file, " Making");
1999 ira_print_expanded_allocno (conflict_a);
2000 fprintf (ira_dump_file, " colorable\n");
2001 }
548a6322 2002 }
1756cb66 2003
548a6322 2004 }
058e97ec
VM
2005 }
2006}
2007
2008/* Put ALLOCNO onto the coloring stack and remove it from its bucket.
2009 The allocno is in the colorable bucket if COLORABLE_P is TRUE. */
2010static void
2011remove_allocno_from_bucket_and_push (ira_allocno_t allocno, bool colorable_p)
2012{
058e97ec
VM
2013 if (colorable_p)
2014 delete_allocno_from_bucket (allocno, &colorable_allocno_bucket);
2015 else
2016 delete_allocno_from_bucket (allocno, &uncolorable_allocno_bucket);
2017 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2018 {
2019 fprintf (ira_dump_file, " Pushing");
22b0982c 2020 ira_print_expanded_allocno (allocno);
30ea859e 2021 if (colorable_p)
1756cb66
VM
2022 fprintf (ira_dump_file, "(cost %d)\n",
2023 ALLOCNO_COLOR_DATA (allocno)->temp);
30ea859e
VM
2024 else
2025 fprintf (ira_dump_file, "(potential spill: %spri=%d, cost=%d)\n",
2026 ALLOCNO_BAD_SPILL_P (allocno) ? "bad spill, " : "",
1756cb66
VM
2027 allocno_spill_priority (allocno),
2028 ALLOCNO_COLOR_DATA (allocno)->temp);
2029 }
058e97ec 2030 if (! colorable_p)
1756cb66 2031 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p = true;
548a6322 2032 push_allocno_to_stack (allocno);
058e97ec
VM
2033}
2034
2035/* Put all allocnos from colorable bucket onto the coloring stack. */
2036static void
2037push_only_colorable (void)
2038{
1756cb66 2039 sort_bucket (&colorable_allocno_bucket, bucket_allocno_compare_func);
058e97ec
VM
2040 for (;colorable_allocno_bucket != NULL;)
2041 remove_allocno_from_bucket_and_push (colorable_allocno_bucket, true);
2042}
2043
058e97ec 2044/* Return the frequency of exit edges (if EXIT_P) or entry from/to the
b8698a0f 2045 loop given by its LOOP_NODE. */
058e97ec
VM
2046int
2047ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int regno, bool exit_p)
2048{
2049 int freq, i;
2050 edge_iterator ei;
2051 edge e;
2052 VEC (edge, heap) *edges;
2053
2054 ira_assert (loop_node->loop != NULL
2055 && (regno < 0 || regno >= FIRST_PSEUDO_REGISTER));
2056 freq = 0;
2057 if (! exit_p)
2058 {
2059 FOR_EACH_EDGE (e, ei, loop_node->loop->header->preds)
2060 if (e->src != loop_node->loop->latch
2061 && (regno < 0
174b3107
VM
2062 || (bitmap_bit_p (DF_LR_OUT (e->src), regno)
2063 && bitmap_bit_p (DF_LR_IN (e->dest), regno))))
058e97ec
VM
2064 freq += EDGE_FREQUENCY (e);
2065 }
2066 else
2067 {
2068 edges = get_loop_exit_edges (loop_node->loop);
ac47786e 2069 FOR_EACH_VEC_ELT (edge, edges, i, e)
058e97ec 2070 if (regno < 0
174b3107
VM
2071 || (bitmap_bit_p (DF_LR_OUT (e->src), regno)
2072 && bitmap_bit_p (DF_LR_IN (e->dest), regno)))
058e97ec
VM
2073 freq += EDGE_FREQUENCY (e);
2074 VEC_free (edge, heap, edges);
2075 }
2076
2077 return REG_FREQ_FROM_EDGE_FREQ (freq);
2078}
2079
2080/* Calculate and return the cost of putting allocno A into memory. */
2081static int
2082calculate_allocno_spill_cost (ira_allocno_t a)
2083{
2084 int regno, cost;
2085 enum machine_mode mode;
2086 enum reg_class rclass;
2087 ira_allocno_t parent_allocno;
2088 ira_loop_tree_node_t parent_node, loop_node;
2089
2090 regno = ALLOCNO_REGNO (a);
1756cb66 2091 cost = ALLOCNO_UPDATED_MEMORY_COST (a) - ALLOCNO_UPDATED_CLASS_COST (a);
058e97ec
VM
2092 if (ALLOCNO_CAP (a) != NULL)
2093 return cost;
2094 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
2095 if ((parent_node = loop_node->parent) == NULL)
2096 return cost;
2097 if ((parent_allocno = parent_node->regno_allocno_map[regno]) == NULL)
2098 return cost;
2099 mode = ALLOCNO_MODE (a);
1756cb66 2100 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
2101 if (ALLOCNO_HARD_REGNO (parent_allocno) < 0)
2102 cost -= (ira_memory_move_cost[mode][rclass][0]
2103 * ira_loop_edge_freq (loop_node, regno, true)
2104 + ira_memory_move_cost[mode][rclass][1]
2105 * ira_loop_edge_freq (loop_node, regno, false));
2106 else
1756cb66
VM
2107 {
2108 ira_init_register_move_cost_if_necessary (mode);
2109 cost += ((ira_memory_move_cost[mode][rclass][1]
2110 * ira_loop_edge_freq (loop_node, regno, true)
2111 + ira_memory_move_cost[mode][rclass][0]
2112 * ira_loop_edge_freq (loop_node, regno, false))
2113 - (ira_register_move_cost[mode][rclass][rclass]
2114 * (ira_loop_edge_freq (loop_node, regno, false)
2115 + ira_loop_edge_freq (loop_node, regno, true))));
2116 }
058e97ec
VM
2117 return cost;
2118}
2119
1756cb66
VM
2120/* Used for sorting allocnos for spilling. */
2121static inline int
2122allocno_spill_priority_compare (ira_allocno_t a1, ira_allocno_t a2)
058e97ec
VM
2123{
2124 int pri1, pri2, diff;
b8698a0f 2125
1756cb66
VM
2126 if (ALLOCNO_BAD_SPILL_P (a1) && ! ALLOCNO_BAD_SPILL_P (a2))
2127 return 1;
2128 if (ALLOCNO_BAD_SPILL_P (a2) && ! ALLOCNO_BAD_SPILL_P (a1))
2129 return -1;
2130 pri1 = allocno_spill_priority (a1);
2131 pri2 = allocno_spill_priority (a2);
058e97ec
VM
2132 if ((diff = pri1 - pri2) != 0)
2133 return diff;
1756cb66
VM
2134 if ((diff
2135 = ALLOCNO_COLOR_DATA (a1)->temp - ALLOCNO_COLOR_DATA (a2)->temp) != 0)
058e97ec
VM
2136 return diff;
2137 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2138}
2139
1756cb66
VM
2140/* Used for sorting allocnos for spilling. */
2141static int
2142allocno_spill_sort_compare (const void *v1p, const void *v2p)
99710245 2143{
1756cb66
VM
2144 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2145 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
99710245 2146
1756cb66 2147 return allocno_spill_priority_compare (p1, p2);
058e97ec
VM
2148}
2149
2150/* Push allocnos to the coloring stack. The order of allocnos in the
1756cb66
VM
2151 stack defines the order for the subsequent coloring. */
2152static void
2153push_allocnos_to_stack (void)
2154{
2155 ira_allocno_t a;
2156 int cost;
2157
2158 /* Calculate uncolorable allocno spill costs. */
2159 for (a = uncolorable_allocno_bucket;
2160 a != NULL;
2161 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2162 if (ALLOCNO_CLASS (a) != NO_REGS)
2163 {
2164 cost = calculate_allocno_spill_cost (a);
2165 /* ??? Remove cost of copies between the coalesced
2166 allocnos. */
2167 ALLOCNO_COLOR_DATA (a)->temp = cost;
2168 }
2169 sort_bucket (&uncolorable_allocno_bucket, allocno_spill_sort_compare);
2170 for (;;)
2171 {
2172 push_only_colorable ();
2173 a = uncolorable_allocno_bucket;
2174 if (a == NULL)
2175 break;
2176 remove_allocno_from_bucket_and_push (a, false);
058e97ec
VM
2177 }
2178 ira_assert (colorable_allocno_bucket == NULL
2179 && uncolorable_allocno_bucket == NULL);
1756cb66 2180 ira_assert (uncolorable_allocnos_num == 0);
058e97ec
VM
2181}
2182
2183/* Pop the coloring stack and assign hard registers to the popped
2184 allocnos. */
2185static void
2186pop_allocnos_from_stack (void)
2187{
2188 ira_allocno_t allocno;
1756cb66 2189 enum reg_class aclass;
058e97ec
VM
2190
2191 for (;VEC_length (ira_allocno_t, allocno_stack_vec) != 0;)
2192 {
2193 allocno = VEC_pop (ira_allocno_t, allocno_stack_vec);
1756cb66 2194 aclass = ALLOCNO_CLASS (allocno);
058e97ec
VM
2195 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2196 {
2197 fprintf (ira_dump_file, " Popping");
22b0982c 2198 ira_print_expanded_allocno (allocno);
058e97ec
VM
2199 fprintf (ira_dump_file, " -- ");
2200 }
1756cb66 2201 if (aclass == NO_REGS)
058e97ec
VM
2202 {
2203 ALLOCNO_HARD_REGNO (allocno) = -1;
2204 ALLOCNO_ASSIGNED_P (allocno) = true;
2205 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (allocno) == NULL);
2206 ira_assert
2207 (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno) == NULL);
2208 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2209 fprintf (ira_dump_file, "assign memory\n");
2210 }
2211 else if (assign_hard_reg (allocno, false))
2212 {
2213 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2214 fprintf (ira_dump_file, "assign reg %d\n",
2215 ALLOCNO_HARD_REGNO (allocno));
2216 }
2217 else if (ALLOCNO_ASSIGNED_P (allocno))
2218 {
2219 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2220 fprintf (ira_dump_file, "spill\n");
2221 }
1756cb66 2222 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
ac0ab4f7
BS
2223 }
2224}
2225
22b0982c 2226/* Set up number of available hard registers for allocno A. */
058e97ec 2227static void
22b0982c 2228setup_allocno_available_regs_num (ira_allocno_t a)
058e97ec 2229{
1756cb66
VM
2230 int i, j, n, hard_regno, hard_regs_num, nwords, nregs;
2231 enum reg_class aclass;
478ab26d 2232 enum machine_mode mode;
1756cb66 2233 allocno_color_data_t data;
058e97ec 2234
1756cb66
VM
2235 aclass = ALLOCNO_CLASS (a);
2236 data = ALLOCNO_COLOR_DATA (a);
2237 data->available_regs_num = 0;
2238 if (aclass == NO_REGS)
058e97ec 2239 return;
1756cb66 2240 hard_regs_num = ira_class_hard_regs_num[aclass];
22b0982c 2241 mode = ALLOCNO_MODE (a);
1756cb66 2242 nwords = ALLOCNO_NUM_OBJECTS (a);
058e97ec 2243 for (n = 0, i = hard_regs_num - 1; i >= 0; i--)
478ab26d 2244 {
1756cb66
VM
2245 hard_regno = ira_class_hard_regs[aclass][i];
2246 nregs = hard_regno_nregs[hard_regno][mode];
2247 for (j = 0; j < nregs; j++)
2248 {
2249 int k;
2250 int set_to_test_start = 0, set_to_test_end = nwords;
2251
2252 if (nregs == nwords)
2253 {
2254 if (WORDS_BIG_ENDIAN)
2255 set_to_test_start = nwords - j - 1;
2256 else
2257 set_to_test_start = j;
2258 set_to_test_end = set_to_test_start + 1;
2259 }
2260 for (k = set_to_test_start; k < set_to_test_end; k++)
2261 {
2262 ira_object_t obj = ALLOCNO_OBJECT (a, k);
2263 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
2264
8d189b3f
VM
2265 /* Checking only profitable hard regs which exclude
2266 object's conflict hard regs. */
1756cb66
VM
2267 if (TEST_HARD_REG_BIT (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
2268 hard_regno + j)
2269 || ! TEST_HARD_REG_BIT (obj_data->profitable_hard_regs,
2270 hard_regno + j))
2271 break;
2272 }
2273 if (k != set_to_test_end)
2274 break;
2275 }
2276 if (j == nregs)
478ab26d
VM
2277 n++;
2278 }
1756cb66
VM
2279 data->available_regs_num = n;
2280 if (internal_flag_ira_verbose <= 2 || ira_dump_file == NULL)
2281 return;
2282 fprintf
2283 (ira_dump_file,
2284 " Allocno a%dr%d of %s(%d) has %d avail. regs",
2285 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2286 reg_class_names[aclass], ira_class_hard_regs_num[aclass], n);
2287 for (i = 0; i < nwords; i++)
22b0982c 2288 {
1756cb66
VM
2289 ira_object_t obj = ALLOCNO_OBJECT (a, i);
2290 object_color_data_t obj_data = OBJECT_COLOR_DATA (obj);
ac0ab4f7 2291
1756cb66 2292 if (nwords != 1)
22b0982c 2293 {
1756cb66
VM
2294 if (i != 0)
2295 fprintf (ira_dump_file, ", ");
2296 fprintf (ira_dump_file, " obj %d", i);
22b0982c 2297 }
1756cb66
VM
2298 print_hard_reg_set (ira_dump_file, obj_data->profitable_hard_regs, false);
2299 fprintf (ira_dump_file, " (confl regs = ");
2300 print_hard_reg_set (ira_dump_file, OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
2301 false);
2302 fprintf (ira_dump_file, " ) %snode: ",
2303 hard_reg_set_equal_p (obj_data->profitable_hard_regs,
2304 obj_data->hard_regs_node->hard_regs->set)
2305 ? "" : "^");
2306 print_hard_reg_set (ira_dump_file,
2307 obj_data->hard_regs_node->hard_regs->set, false);
2308
22b0982c 2309 }
1756cb66 2310 fprintf (ira_dump_file, "\n");
058e97ec
VM
2311}
2312
2313/* Put ALLOCNO in a bucket corresponding to its number and size of its
2314 conflicting allocnos and hard registers. */
2315static void
2316put_allocno_into_bucket (ira_allocno_t allocno)
2317{
1756cb66 2318 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
058e97ec 2319 setup_allocno_available_regs_num (allocno);
1756cb66 2320 if (setup_left_conflict_sizes_p (allocno))
548a6322 2321 add_allocno_to_bucket (allocno, &colorable_allocno_bucket);
058e97ec 2322 else
548a6322 2323 add_allocno_to_bucket (allocno, &uncolorable_allocno_bucket);
058e97ec
VM
2324}
2325
22b0982c
VM
2326/* Map: allocno number -> allocno priority. */
2327static int *allocno_priorities;
058e97ec 2328
22b0982c
VM
2329/* Set up priorities for N allocnos in array
2330 CONSIDERATION_ALLOCNOS. */
058e97ec 2331static void
22b0982c 2332setup_allocno_priorities (ira_allocno_t *consideration_allocnos, int n)
058e97ec 2333{
22b0982c
VM
2334 int i, length, nrefs, priority, max_priority, mult;
2335 ira_allocno_t a;
058e97ec 2336
22b0982c
VM
2337 max_priority = 0;
2338 for (i = 0; i < n; i++)
7db7ed3c
VM
2339 {
2340 a = consideration_allocnos[i];
2341 nrefs = ALLOCNO_NREFS (a);
2342 ira_assert (nrefs >= 0);
2343 mult = floor_log2 (ALLOCNO_NREFS (a)) + 1;
2344 ira_assert (mult >= 0);
2345 allocno_priorities[ALLOCNO_NUM (a)]
2346 = priority
2347 = (mult
1756cb66
VM
2348 * (ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a))
2349 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
7db7ed3c
VM
2350 if (priority < 0)
2351 priority = -priority;
2352 if (max_priority < priority)
2353 max_priority = priority;
2354 }
2355 mult = max_priority == 0 ? 1 : INT_MAX / max_priority;
2356 for (i = 0; i < n; i++)
2357 {
2358 a = consideration_allocnos[i];
2359 length = ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a);
ac0ab4f7
BS
2360 if (ALLOCNO_NUM_OBJECTS (a) > 1)
2361 length /= ALLOCNO_NUM_OBJECTS (a);
7db7ed3c
VM
2362 if (length <= 0)
2363 length = 1;
2364 allocno_priorities[ALLOCNO_NUM (a)]
2365 = allocno_priorities[ALLOCNO_NUM (a)] * mult / length;
2366 }
2367}
2368
1756cb66
VM
2369/* Sort allocnos according to the profit of usage of a hard register
2370 instead of memory for them. */
2371static int
2372allocno_cost_compare_func (const void *v1p, const void *v2p)
2373{
2374 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2375 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
2376 int c1, c2;
2377
2378 c1 = ALLOCNO_UPDATED_MEMORY_COST (p1) - ALLOCNO_UPDATED_CLASS_COST (p1);
2379 c2 = ALLOCNO_UPDATED_MEMORY_COST (p2) - ALLOCNO_UPDATED_CLASS_COST (p2);
2380 if (c1 - c2)
2381 return c1 - c2;
2382
2383 /* If regs are equally good, sort by allocno numbers, so that the
2384 results of qsort leave nothing to chance. */
2385 return ALLOCNO_NUM (p1) - ALLOCNO_NUM (p2);
2386}
2387
2388/* We used Chaitin-Briggs coloring to assign as many pseudos as
2389 possible to hard registers. Let us try to improve allocation with
2390 cost point of view. This function improves the allocation by
2391 spilling some allocnos and assigning the freed hard registers to
2392 other allocnos if it decreases the overall allocation cost. */
2393static void
2394improve_allocation (void)
2395{
2396 unsigned int i;
2397 int j, k, n, hregno, conflict_hregno, base_cost, class_size, word, nwords;
2398 int check, spill_cost, min_cost, nregs, conflict_nregs, r, best;
2399 bool try_p;
2400 enum reg_class aclass;
2401 enum machine_mode mode;
2402 int *allocno_costs;
2403 int costs[FIRST_PSEUDO_REGISTER];
2404 HARD_REG_SET conflicting_regs[2], profitable_hard_regs[2];
2405 ira_allocno_t a;
2406 bitmap_iterator bi;
2407
2408 /* Clear counts used to process conflicting allocnos only once for
2409 each allocno. */
2410 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2411 ALLOCNO_COLOR_DATA (ira_allocnos[i])->temp = 0;
2412 check = n = 0;
2413 /* Process each allocno and try to assign a hard register to it by
2414 spilling some its conflicting allocnos. */
2415 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2416 {
2417 a = ira_allocnos[i];
2418 ALLOCNO_COLOR_DATA (a)->temp = 0;
2419 if (empty_profitable_hard_regs (a))
2420 continue;
2421 check++;
2422 aclass = ALLOCNO_CLASS (a);
2423 allocno_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
2424 if (allocno_costs == NULL)
2425 allocno_costs = ALLOCNO_HARD_REG_COSTS (a);
2426 if ((hregno = ALLOCNO_HARD_REGNO (a)) < 0)
2427 base_cost = ALLOCNO_UPDATED_MEMORY_COST (a);
2428 else if (allocno_costs == NULL)
2429 /* It means that assigning a hard register is not profitable
2430 (we don't waste memory for hard register costs in this
2431 case). */
2432 continue;
2433 else
2434 base_cost = allocno_costs[ira_class_hard_reg_index[aclass][hregno]];
2435 try_p = false;
8d189b3f
VM
2436 get_conflict_profitable_regs (a, false,
2437 conflicting_regs, profitable_hard_regs);
1756cb66
VM
2438 class_size = ira_class_hard_regs_num[aclass];
2439 /* Set up cost improvement for usage of each profitable hard
2440 register for allocno A. */
2441 for (j = 0; j < class_size; j++)
2442 {
2443 hregno = ira_class_hard_regs[aclass][j];
2444 if (! check_hard_reg_p (a, hregno,
2445 conflicting_regs, profitable_hard_regs))
2446 continue;
2447 ira_assert (ira_class_hard_reg_index[aclass][hregno] == j);
2448 k = allocno_costs == NULL ? 0 : j;
2449 costs[hregno] = (allocno_costs == NULL
2450 ? ALLOCNO_UPDATED_CLASS_COST (a) : allocno_costs[k]);
2451 costs[hregno] -= base_cost;
2452 if (costs[hregno] < 0)
2453 try_p = true;
2454 }
2455 if (! try_p)
2456 /* There is no chance to improve the allocation cost by
2457 assigning hard register to allocno A even without spilling
2458 conflicting allocnos. */
2459 continue;
2460 mode = ALLOCNO_MODE (a);
2461 nwords = ALLOCNO_NUM_OBJECTS (a);
2462 /* Process each allocno conflicting with A and update the cost
2463 improvement for profitable hard registers of A. To use a
2464 hard register for A we need to spill some conflicting
2465 allocnos and that creates penalty for the cost
2466 improvement. */
2467 for (word = 0; word < nwords; word++)
2468 {
2469 ira_object_t conflict_obj;
2470 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2471 ira_object_conflict_iterator oci;
2472
2473 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2474 {
2475 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2476
2477 if (ALLOCNO_COLOR_DATA (conflict_a)->temp == check)
2478 /* We already processed this conflicting allocno
2479 because we processed earlier another object of the
2480 conflicting allocno. */
2481 continue;
2482 ALLOCNO_COLOR_DATA (conflict_a)->temp = check;
2483 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2484 continue;
2485 spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a);
2486 k = (ira_class_hard_reg_index
2487 [ALLOCNO_CLASS (conflict_a)][conflict_hregno]);
2488 ira_assert (k >= 0);
2489 if ((allocno_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (conflict_a))
2490 != NULL)
2491 spill_cost -= allocno_costs[k];
2492 else if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a))
2493 != NULL)
2494 spill_cost -= allocno_costs[k];
2495 else
2496 spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a);
2497 conflict_nregs
2498 = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)];
2499 for (r = conflict_hregno;
2500 r >= 0 && r + hard_regno_nregs[r][mode] > conflict_hregno;
2501 r--)
2502 if (check_hard_reg_p (a, r,
2503 conflicting_regs, profitable_hard_regs))
2504 costs[r] += spill_cost;
2505 for (r = conflict_hregno + 1;
2506 r < conflict_hregno + conflict_nregs;
2507 r++)
2508 if (check_hard_reg_p (a, r,
2509 conflicting_regs, profitable_hard_regs))
2510 costs[r] += spill_cost;
2511 }
2512 }
2513 min_cost = INT_MAX;
2514 best = -1;
2515 /* Now we choose hard register for A which results in highest
2516 allocation cost improvement. */
2517 for (j = 0; j < class_size; j++)
2518 {
2519 hregno = ira_class_hard_regs[aclass][j];
2520 if (check_hard_reg_p (a, hregno,
2521 conflicting_regs, profitable_hard_regs)
2522 && min_cost > costs[hregno])
2523 {
2524 best = hregno;
2525 min_cost = costs[hregno];
2526 }
2527 }
2528 if (min_cost >= 0)
2529 /* We are in a situation when assigning any hard register to A
2530 by spilling some conflicting allocnos does not improve the
2531 allocation cost. */
2532 continue;
2533 nregs = hard_regno_nregs[best][mode];
2534 /* Now spill conflicting allocnos which contain a hard register
2535 of A when we assign the best chosen hard register to it. */
2536 for (word = 0; word < nwords; word++)
2537 {
2538 ira_object_t conflict_obj;
2539 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2540 ira_object_conflict_iterator oci;
2541
2542 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2543 {
2544 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2545
2546 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2547 continue;
2548 conflict_nregs
2549 = hard_regno_nregs[conflict_hregno][ALLOCNO_MODE (conflict_a)];
2550 if (best + nregs <= conflict_hregno
2551 || conflict_hregno + conflict_nregs <= best)
2552 /* No intersection. */
2553 continue;
2554 ALLOCNO_HARD_REGNO (conflict_a) = -1;
2555 sorted_allocnos[n++] = conflict_a;
2556 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2557 fprintf (ira_dump_file, "Spilling a%dr%d for a%dr%d\n",
2558 ALLOCNO_NUM (conflict_a), ALLOCNO_REGNO (conflict_a),
2559 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
2560 }
2561 }
2562 /* Assign the best chosen hard register to A. */
2563 ALLOCNO_HARD_REGNO (a) = best;
2564 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2565 fprintf (ira_dump_file, "Assigning %d to a%dr%d\n",
2566 best, ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
2567 }
2568 if (n == 0)
2569 return;
2570 /* We spilled some allocnos to assign their hard registers to other
2571 allocnos. The spilled allocnos are now in array
2572 'sorted_allocnos'. There is still a possibility that some of the
2573 spilled allocnos can get hard registers. So let us try assign
2574 them hard registers again (just a reminder -- function
2575 'assign_hard_reg' assigns hard registers only if it is possible
2576 and profitable). We process the spilled allocnos with biggest
2577 benefit to get hard register first -- see function
2578 'allocno_cost_compare_func'. */
2579 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
2580 allocno_cost_compare_func);
2581 for (j = 0; j < n; j++)
2582 {
2583 a = sorted_allocnos[j];
2584 ALLOCNO_ASSIGNED_P (a) = false;
2585 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2586 {
2587 fprintf (ira_dump_file, " ");
2588 ira_print_expanded_allocno (a);
2589 fprintf (ira_dump_file, " -- ");
2590 }
2591 if (assign_hard_reg (a, false))
2592 {
2593 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2594 fprintf (ira_dump_file, "assign hard reg %d\n",
2595 ALLOCNO_HARD_REGNO (a));
2596 }
2597 else
2598 {
2599 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2600 fprintf (ira_dump_file, "assign memory\n");
2601 }
2602 }
2603}
2604
7db7ed3c
VM
2605/* Sort allocnos according to their priorities which are calculated
2606 analogous to ones in file `global.c'. */
2607static int
2608allocno_priority_compare_func (const void *v1p, const void *v2p)
2609{
2610 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
2611 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
2612 int pri1, pri2;
2613
2614 pri1 = allocno_priorities[ALLOCNO_NUM (a1)];
2615 pri2 = allocno_priorities[ALLOCNO_NUM (a2)];
71af27d2
OH
2616 if (pri2 != pri1)
2617 return SORTGT (pri2, pri1);
7db7ed3c
VM
2618
2619 /* If regs are equally good, sort by allocnos, so that the results of
2620 qsort leave nothing to chance. */
2621 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2622}
2623
058e97ec
VM
2624/* Chaitin-Briggs coloring for allocnos in COLORING_ALLOCNO_BITMAP
2625 taking into account allocnos in CONSIDERATION_ALLOCNO_BITMAP. */
2626static void
2627color_allocnos (void)
2628{
7db7ed3c 2629 unsigned int i, n;
058e97ec
VM
2630 bitmap_iterator bi;
2631 ira_allocno_t a;
2632
76763a6d 2633 setup_profitable_hard_regs ();
7db7ed3c 2634 if (flag_ira_algorithm == IRA_ALGORITHM_PRIORITY)
058e97ec 2635 {
7db7ed3c
VM
2636 n = 0;
2637 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
058e97ec 2638 {
7db7ed3c 2639 a = ira_allocnos[i];
1756cb66 2640 if (ALLOCNO_CLASS (a) == NO_REGS)
058e97ec 2641 {
7db7ed3c
VM
2642 ALLOCNO_HARD_REGNO (a) = -1;
2643 ALLOCNO_ASSIGNED_P (a) = true;
2644 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
2645 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
2646 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2647 {
2648 fprintf (ira_dump_file, " Spill");
22b0982c 2649 ira_print_expanded_allocno (a);
7db7ed3c
VM
2650 fprintf (ira_dump_file, "\n");
2651 }
2652 continue;
058e97ec 2653 }
7db7ed3c
VM
2654 sorted_allocnos[n++] = a;
2655 }
2656 if (n != 0)
2657 {
2658 setup_allocno_priorities (sorted_allocnos, n);
2659 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
2660 allocno_priority_compare_func);
2661 for (i = 0; i < n; i++)
2662 {
2663 a = sorted_allocnos[i];
2664 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2665 {
2666 fprintf (ira_dump_file, " ");
22b0982c 2667 ira_print_expanded_allocno (a);
7db7ed3c
VM
2668 fprintf (ira_dump_file, " -- ");
2669 }
2670 if (assign_hard_reg (a, false))
2671 {
2672 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2673 fprintf (ira_dump_file, "assign hard reg %d\n",
2674 ALLOCNO_HARD_REGNO (a));
2675 }
2676 else
2677 {
2678 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2679 fprintf (ira_dump_file, "assign memory\n");
2680 }
2681 }
2682 }
2683 }
2684 else
2685 {
1756cb66
VM
2686 form_object_hard_regs_nodes_forest ();
2687 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
2688 print_hard_regs_forest (ira_dump_file);
7db7ed3c
VM
2689 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2690 {
2691 a = ira_allocnos[i];
1756cb66
VM
2692 if (ALLOCNO_CLASS (a) != NO_REGS && ! empty_profitable_hard_regs (a))
2693 ALLOCNO_COLOR_DATA (a)->in_graph_p = true;
2694 else
7db7ed3c
VM
2695 {
2696 ALLOCNO_HARD_REGNO (a) = -1;
2697 ALLOCNO_ASSIGNED_P (a) = true;
1756cb66
VM
2698 /* We don't need updated costs anymore. */
2699 ira_free_allocno_updated_costs (a);
7db7ed3c
VM
2700 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2701 {
2702 fprintf (ira_dump_file, " Spill");
22b0982c 2703 ira_print_expanded_allocno (a);
7db7ed3c
VM
2704 fprintf (ira_dump_file, "\n");
2705 }
7db7ed3c 2706 }
1756cb66
VM
2707 }
2708 /* Put the allocnos into the corresponding buckets. */
2709 colorable_allocno_bucket = NULL;
2710 uncolorable_allocno_bucket = NULL;
2711 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2712 {
2713 a = ira_allocnos[i];
2714 if (ALLOCNO_COLOR_DATA (a)->in_graph_p)
2715 put_allocno_into_bucket (a);
058e97ec 2716 }
7db7ed3c
VM
2717 push_allocnos_to_stack ();
2718 pop_allocnos_from_stack ();
1756cb66 2719 finish_object_hard_regs_nodes_forest ();
058e97ec 2720 }
1756cb66 2721 improve_allocation ();
058e97ec
VM
2722}
2723
2724\f
2725
2726/* Output information about the loop given by its LOOP_TREE_NODE. */
2727static void
2728print_loop_title (ira_loop_tree_node_t loop_tree_node)
2729{
2730 unsigned int j;
2731 bitmap_iterator bi;
ea1c67e6
VM
2732 ira_loop_tree_node_t subloop_node, dest_loop_node;
2733 edge e;
2734 edge_iterator ei;
058e97ec
VM
2735
2736 ira_assert (loop_tree_node->loop != NULL);
2737 fprintf (ira_dump_file,
ea1c67e6 2738 "\n Loop %d (parent %d, header bb%d, depth %d)\n bbs:",
058e97ec
VM
2739 loop_tree_node->loop->num,
2740 (loop_tree_node->parent == NULL
2741 ? -1 : loop_tree_node->parent->loop->num),
2742 loop_tree_node->loop->header->index,
2743 loop_depth (loop_tree_node->loop));
ea1c67e6
VM
2744 for (subloop_node = loop_tree_node->children;
2745 subloop_node != NULL;
2746 subloop_node = subloop_node->next)
2747 if (subloop_node->bb != NULL)
2748 {
2749 fprintf (ira_dump_file, " %d", subloop_node->bb->index);
2750 FOR_EACH_EDGE (e, ei, subloop_node->bb->succs)
2751 if (e->dest != EXIT_BLOCK_PTR
2752 && ((dest_loop_node = IRA_BB_NODE (e->dest)->parent)
2753 != loop_tree_node))
2754 fprintf (ira_dump_file, "(->%d:l%d)",
2755 e->dest->index, dest_loop_node->loop->num);
2756 }
2757 fprintf (ira_dump_file, "\n all:");
49d988e7 2758 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
2759 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
2760 fprintf (ira_dump_file, "\n modified regnos:");
2761 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->modified_regnos, 0, j, bi)
2762 fprintf (ira_dump_file, " %d", j);
2763 fprintf (ira_dump_file, "\n border:");
2764 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->border_allocnos, 0, j, bi)
2765 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
2766 fprintf (ira_dump_file, "\n Pressure:");
1756cb66 2767 for (j = 0; (int) j < ira_pressure_classes_num; j++)
058e97ec 2768 {
1756cb66 2769 enum reg_class pclass;
b8698a0f 2770
1756cb66
VM
2771 pclass = ira_pressure_classes[j];
2772 if (loop_tree_node->reg_pressure[pclass] == 0)
058e97ec 2773 continue;
1756cb66
VM
2774 fprintf (ira_dump_file, " %s=%d", reg_class_names[pclass],
2775 loop_tree_node->reg_pressure[pclass]);
058e97ec
VM
2776 }
2777 fprintf (ira_dump_file, "\n");
2778}
2779
2780/* Color the allocnos inside loop (in the extreme case it can be all
2781 of the function) given the corresponding LOOP_TREE_NODE. The
2782 function is called for each loop during top-down traverse of the
2783 loop tree. */
2784static void
2785color_pass (ira_loop_tree_node_t loop_tree_node)
2786{
1756cb66 2787 int i, regno, hard_regno, index = -1, n, nobj;
058e97ec
VM
2788 int cost, exit_freq, enter_freq;
2789 unsigned int j;
2790 bitmap_iterator bi;
2791 enum machine_mode mode;
1756cb66 2792 enum reg_class rclass, aclass, pclass;
058e97ec
VM
2793 ira_allocno_t a, subloop_allocno;
2794 ira_loop_tree_node_t subloop_node;
2795
2796 ira_assert (loop_tree_node->bb == NULL);
2797 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
2798 print_loop_title (loop_tree_node);
2799
49d988e7 2800 bitmap_copy (coloring_allocno_bitmap, loop_tree_node->all_allocnos);
058e97ec 2801 bitmap_copy (consideration_allocno_bitmap, coloring_allocno_bitmap);
1756cb66
VM
2802 n = nobj = 0;
2803 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
2804 {
2805 a = ira_allocnos[j];
2806 n++;
2807 nobj += ALLOCNO_NUM_OBJECTS (a);
2808 if (! ALLOCNO_ASSIGNED_P (a))
2809 continue;
2810 bitmap_clear_bit (coloring_allocno_bitmap, ALLOCNO_NUM (a));
2811 }
2812 allocno_color_data
2813 = (allocno_color_data_t) ira_allocate (sizeof (struct allocno_color_data)
2814 * n);
2815 memset (allocno_color_data, 0, sizeof (struct allocno_color_data) * n);
2816 object_color_data
2817 = (object_color_data_t) ira_allocate (sizeof (struct object_color_data)
2818 * nobj);
2819 memset (object_color_data, 0, sizeof (struct object_color_data) * nobj);
2820 n = nobj = 0;
058e97ec
VM
2821 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
2822 {
2823 a = ira_allocnos[j];
1756cb66
VM
2824 ALLOCNO_ADD_DATA (a) = allocno_color_data + n;
2825 n++;
2826 for (i = 0; i < ALLOCNO_NUM_OBJECTS (a); i++)
2827 {
2828 OBJECT_ADD_DATA (ALLOCNO_OBJECT (a, i)) = object_color_data + nobj;
2829 nobj++;
2830 }
058e97ec
VM
2831 }
2832 /* Color all mentioned allocnos including transparent ones. */
2833 color_allocnos ();
2834 /* Process caps. They are processed just once. */
7db7ed3c
VM
2835 if (flag_ira_region == IRA_REGION_MIXED
2836 || flag_ira_region == IRA_REGION_ALL)
49d988e7 2837 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
2838 {
2839 a = ira_allocnos[j];
2840 if (ALLOCNO_CAP_MEMBER (a) == NULL)
2841 continue;
2842 /* Remove from processing in the next loop. */
2843 bitmap_clear_bit (consideration_allocno_bitmap, j);
1756cb66
VM
2844 rclass = ALLOCNO_CLASS (a);
2845 pclass = ira_pressure_class_translate[rclass];
7db7ed3c 2846 if (flag_ira_region == IRA_REGION_MIXED
1756cb66
VM
2847 && (loop_tree_node->reg_pressure[pclass]
2848 <= ira_available_class_regs[pclass]))
058e97ec
VM
2849 {
2850 mode = ALLOCNO_MODE (a);
2851 hard_regno = ALLOCNO_HARD_REGNO (a);
2852 if (hard_regno >= 0)
2853 {
2854 index = ira_class_hard_reg_index[rclass][hard_regno];
2855 ira_assert (index >= 0);
2856 }
2857 regno = ALLOCNO_REGNO (a);
2858 subloop_allocno = ALLOCNO_CAP_MEMBER (a);
2859 subloop_node = ALLOCNO_LOOP_TREE_NODE (subloop_allocno);
2860 ira_assert (!ALLOCNO_ASSIGNED_P (subloop_allocno));
2861 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
2862 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
2863 if (hard_regno >= 0)
2864 update_copy_costs (subloop_allocno, true);
2865 /* We don't need updated costs anymore: */
2866 ira_free_allocno_updated_costs (subloop_allocno);
2867 }
2868 }
2869 /* Update costs of the corresponding allocnos (not caps) in the
2870 subloops. */
2871 for (subloop_node = loop_tree_node->subloops;
2872 subloop_node != NULL;
2873 subloop_node = subloop_node->subloop_next)
2874 {
2875 ira_assert (subloop_node->bb == NULL);
2876 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
2877 {
2878 a = ira_allocnos[j];
2879 ira_assert (ALLOCNO_CAP_MEMBER (a) == NULL);
2880 mode = ALLOCNO_MODE (a);
1756cb66
VM
2881 rclass = ALLOCNO_CLASS (a);
2882 pclass = ira_pressure_class_translate[rclass];
058e97ec 2883 hard_regno = ALLOCNO_HARD_REGNO (a);
7db7ed3c 2884 /* Use hard register class here. ??? */
058e97ec
VM
2885 if (hard_regno >= 0)
2886 {
2887 index = ira_class_hard_reg_index[rclass][hard_regno];
2888 ira_assert (index >= 0);
2889 }
2890 regno = ALLOCNO_REGNO (a);
2891 /* ??? conflict costs */
2892 subloop_allocno = subloop_node->regno_allocno_map[regno];
2893 if (subloop_allocno == NULL
2894 || ALLOCNO_CAP (subloop_allocno) != NULL)
2895 continue;
1756cb66 2896 ira_assert (ALLOCNO_CLASS (subloop_allocno) == rclass);
49d988e7
VM
2897 ira_assert (bitmap_bit_p (subloop_node->all_allocnos,
2898 ALLOCNO_NUM (subloop_allocno)));
7db7ed3c 2899 if ((flag_ira_region == IRA_REGION_MIXED)
1756cb66
VM
2900 && (loop_tree_node->reg_pressure[pclass]
2901 <= ira_available_class_regs[pclass]))
058e97ec
VM
2902 {
2903 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
2904 {
2905 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
2906 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
2907 if (hard_regno >= 0)
2908 update_copy_costs (subloop_allocno, true);
2909 /* We don't need updated costs anymore: */
2910 ira_free_allocno_updated_costs (subloop_allocno);
2911 }
2912 continue;
2913 }
2914 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
2915 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
2916 ira_assert (regno < ira_reg_equiv_len);
2917 if (ira_reg_equiv_invariant_p[regno]
2918 || ira_reg_equiv_const[regno] != NULL_RTX)
2919 {
2920 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
2921 {
2922 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
2923 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
2924 if (hard_regno >= 0)
2925 update_copy_costs (subloop_allocno, true);
2926 /* We don't need updated costs anymore: */
2927 ira_free_allocno_updated_costs (subloop_allocno);
2928 }
2929 }
2930 else if (hard_regno < 0)
2931 {
2932 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
2933 -= ((ira_memory_move_cost[mode][rclass][1] * enter_freq)
2934 + (ira_memory_move_cost[mode][rclass][0] * exit_freq));
2935 }
2936 else
2937 {
1756cb66
VM
2938 aclass = ALLOCNO_CLASS (subloop_allocno);
2939 ira_init_register_move_cost_if_necessary (mode);
2940 cost = (ira_register_move_cost[mode][rclass][rclass]
058e97ec 2941 * (exit_freq + enter_freq));
cb1ca6ac 2942 ira_allocate_and_set_or_copy_costs
1756cb66
VM
2943 (&ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno), aclass,
2944 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno),
cb1ca6ac
VM
2945 ALLOCNO_HARD_REG_COSTS (subloop_allocno));
2946 ira_allocate_and_set_or_copy_costs
2947 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno),
1756cb66 2948 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (subloop_allocno));
cb1ca6ac
VM
2949 ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index] -= cost;
2950 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno)[index]
058e97ec 2951 -= cost;
1756cb66 2952 if (ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 2953 > ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index])
1756cb66 2954 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 2955 = ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index];
058e97ec
VM
2956 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
2957 += (ira_memory_move_cost[mode][rclass][0] * enter_freq
2958 + ira_memory_move_cost[mode][rclass][1] * exit_freq);
058e97ec
VM
2959 }
2960 }
2961 }
1756cb66
VM
2962 ira_free (object_color_data);
2963 ira_free (allocno_color_data);
2964 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, j, bi)
2965 {
2966 a = ira_allocnos[j];
2967 ALLOCNO_ADD_DATA (a) = NULL;
2968 for (i = 0; i < ALLOCNO_NUM_OBJECTS (a); i++)
2969 OBJECT_ADD_DATA (a) = NULL;
2970 }
058e97ec
VM
2971}
2972
2973/* Initialize the common data for coloring and calls functions to do
2974 Chaitin-Briggs and regional coloring. */
2975static void
2976do_coloring (void)
2977{
2978 coloring_allocno_bitmap = ira_allocate_bitmap ();
058e97ec
VM
2979 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
2980 fprintf (ira_dump_file, "\n**** Allocnos coloring:\n\n");
b8698a0f 2981
058e97ec
VM
2982 ira_traverse_loop_tree (false, ira_loop_tree_root, color_pass, NULL);
2983
2984 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
2985 ira_print_disposition (ira_dump_file);
2986
058e97ec 2987 ira_free_bitmap (coloring_allocno_bitmap);
058e97ec
VM
2988}
2989
2990\f
2991
2992/* Move spill/restore code, which are to be generated in ira-emit.c,
2993 to less frequent points (if it is profitable) by reassigning some
2994 allocnos (in loop with subloops containing in another loop) to
2995 memory which results in longer live-range where the corresponding
2996 pseudo-registers will be in memory. */
2997static void
2998move_spill_restore (void)
2999{
3000 int cost, regno, hard_regno, hard_regno2, index;
3001 bool changed_p;
3002 int enter_freq, exit_freq;
3003 enum machine_mode mode;
3004 enum reg_class rclass;
3005 ira_allocno_t a, parent_allocno, subloop_allocno;
3006 ira_loop_tree_node_t parent, loop_node, subloop_node;
3007 ira_allocno_iterator ai;
3008
3009 for (;;)
3010 {
3011 changed_p = false;
3012 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3013 fprintf (ira_dump_file, "New iteration of spill/restore move\n");
3014 FOR_EACH_ALLOCNO (a, ai)
3015 {
3016 regno = ALLOCNO_REGNO (a);
3017 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
3018 if (ALLOCNO_CAP_MEMBER (a) != NULL
3019 || ALLOCNO_CAP (a) != NULL
3020 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0
3021 || loop_node->children == NULL
3022 /* don't do the optimization because it can create
3023 copies and the reload pass can spill the allocno set
3024 by copy although the allocno will not get memory
3025 slot. */
3026 || ira_reg_equiv_invariant_p[regno]
3027 || ira_reg_equiv_const[regno] != NULL_RTX
3028 || !bitmap_bit_p (loop_node->border_allocnos, ALLOCNO_NUM (a)))
3029 continue;
3030 mode = ALLOCNO_MODE (a);
1756cb66 3031 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
3032 index = ira_class_hard_reg_index[rclass][hard_regno];
3033 ira_assert (index >= 0);
3034 cost = (ALLOCNO_MEMORY_COST (a)
3035 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 3036 ? ALLOCNO_CLASS_COST (a)
058e97ec 3037 : ALLOCNO_HARD_REG_COSTS (a)[index]));
1756cb66 3038 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3039 for (subloop_node = loop_node->subloops;
3040 subloop_node != NULL;
3041 subloop_node = subloop_node->subloop_next)
3042 {
3043 ira_assert (subloop_node->bb == NULL);
3044 subloop_allocno = subloop_node->regno_allocno_map[regno];
3045 if (subloop_allocno == NULL)
3046 continue;
1756cb66 3047 ira_assert (rclass == ALLOCNO_CLASS (subloop_allocno));
058e97ec
VM
3048 /* We have accumulated cost. To get the real cost of
3049 allocno usage in the loop we should subtract costs of
3050 the subloop allocnos. */
3051 cost -= (ALLOCNO_MEMORY_COST (subloop_allocno)
3052 - (ALLOCNO_HARD_REG_COSTS (subloop_allocno) == NULL
1756cb66 3053 ? ALLOCNO_CLASS_COST (subloop_allocno)
058e97ec
VM
3054 : ALLOCNO_HARD_REG_COSTS (subloop_allocno)[index]));
3055 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3056 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3057 if ((hard_regno2 = ALLOCNO_HARD_REGNO (subloop_allocno)) < 0)
3058 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3059 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3060 else
3061 {
3062 cost
3063 += (ira_memory_move_cost[mode][rclass][0] * exit_freq
3064 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3065 if (hard_regno2 != hard_regno)
1756cb66 3066 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3067 * (exit_freq + enter_freq));
3068 }
3069 }
3070 if ((parent = loop_node->parent) != NULL
3071 && (parent_allocno = parent->regno_allocno_map[regno]) != NULL)
3072 {
1756cb66 3073 ira_assert (rclass == ALLOCNO_CLASS (parent_allocno));
058e97ec
VM
3074 exit_freq = ira_loop_edge_freq (loop_node, regno, true);
3075 enter_freq = ira_loop_edge_freq (loop_node, regno, false);
3076 if ((hard_regno2 = ALLOCNO_HARD_REGNO (parent_allocno)) < 0)
3077 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3078 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3079 else
3080 {
3081 cost
3082 += (ira_memory_move_cost[mode][rclass][1] * exit_freq
3083 + ira_memory_move_cost[mode][rclass][0] * enter_freq);
3084 if (hard_regno2 != hard_regno)
1756cb66 3085 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3086 * (exit_freq + enter_freq));
3087 }
3088 }
3089 if (cost < 0)
3090 {
3091 ALLOCNO_HARD_REGNO (a) = -1;
3092 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3093 {
3094 fprintf
3095 (ira_dump_file,
3096 " Moving spill/restore for a%dr%d up from loop %d",
3097 ALLOCNO_NUM (a), regno, loop_node->loop->num);
3098 fprintf (ira_dump_file, " - profit %d\n", -cost);
3099 }
3100 changed_p = true;
3101 }
3102 }
3103 if (! changed_p)
3104 break;
3105 }
3106}
3107
3108\f
3109
3110/* Update current hard reg costs and current conflict hard reg costs
3111 for allocno A. It is done by processing its copies containing
3112 other allocnos already assigned. */
3113static void
3114update_curr_costs (ira_allocno_t a)
3115{
3116 int i, hard_regno, cost;
3117 enum machine_mode mode;
1756cb66 3118 enum reg_class aclass, rclass;
058e97ec
VM
3119 ira_allocno_t another_a;
3120 ira_copy_t cp, next_cp;
3121
bdf0eb06 3122 ira_free_allocno_updated_costs (a);
058e97ec 3123 ira_assert (! ALLOCNO_ASSIGNED_P (a));
1756cb66
VM
3124 aclass = ALLOCNO_CLASS (a);
3125 if (aclass == NO_REGS)
058e97ec
VM
3126 return;
3127 mode = ALLOCNO_MODE (a);
1756cb66 3128 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3129 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3130 {
3131 if (cp->first == a)
3132 {
3133 next_cp = cp->next_first_allocno_copy;
3134 another_a = cp->second;
3135 }
3136 else if (cp->second == a)
3137 {
3138 next_cp = cp->next_second_allocno_copy;
3139 another_a = cp->first;
3140 }
3141 else
3142 gcc_unreachable ();
1756cb66 3143 if (! ira_reg_classes_intersect_p[aclass][ALLOCNO_CLASS (another_a)]
058e97ec
VM
3144 || ! ALLOCNO_ASSIGNED_P (another_a)
3145 || (hard_regno = ALLOCNO_HARD_REGNO (another_a)) < 0)
3146 continue;
3147 rclass = REGNO_REG_CLASS (hard_regno);
1756cb66 3148 i = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
3149 if (i < 0)
3150 continue;
058e97ec 3151 cost = (cp->first == a
1756cb66
VM
3152 ? ira_register_move_cost[mode][rclass][aclass]
3153 : ira_register_move_cost[mode][aclass][rclass]);
058e97ec 3154 ira_allocate_and_set_or_copy_costs
1756cb66 3155 (&ALLOCNO_UPDATED_HARD_REG_COSTS (a), aclass, ALLOCNO_CLASS_COST (a),
058e97ec
VM
3156 ALLOCNO_HARD_REG_COSTS (a));
3157 ira_allocate_and_set_or_copy_costs
3158 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a),
1756cb66 3159 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (a));
058e97ec
VM
3160 ALLOCNO_UPDATED_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3161 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3162 }
3163}
3164
058e97ec
VM
3165/* Try to assign hard registers to the unassigned allocnos and
3166 allocnos conflicting with them or conflicting with allocnos whose
3167 regno >= START_REGNO. The function is called after ira_flattening,
3168 so more allocnos (including ones created in ira-emit.c) will have a
3169 chance to get a hard register. We use simple assignment algorithm
3170 based on priorities. */
3171void
3172ira_reassign_conflict_allocnos (int start_regno)
3173{
3174 int i, allocnos_to_color_num;
fa86d337 3175 ira_allocno_t a;
1756cb66 3176 enum reg_class aclass;
058e97ec
VM
3177 bitmap allocnos_to_color;
3178 ira_allocno_iterator ai;
3179
3180 allocnos_to_color = ira_allocate_bitmap ();
3181 allocnos_to_color_num = 0;
3182 FOR_EACH_ALLOCNO (a, ai)
3183 {
ac0ab4f7 3184 int n = ALLOCNO_NUM_OBJECTS (a);
fa86d337 3185
058e97ec
VM
3186 if (! ALLOCNO_ASSIGNED_P (a)
3187 && ! bitmap_bit_p (allocnos_to_color, ALLOCNO_NUM (a)))
3188 {
1756cb66 3189 if (ALLOCNO_CLASS (a) != NO_REGS)
058e97ec
VM
3190 sorted_allocnos[allocnos_to_color_num++] = a;
3191 else
3192 {
3193 ALLOCNO_ASSIGNED_P (a) = true;
3194 ALLOCNO_HARD_REGNO (a) = -1;
3195 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
3196 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
3197 }
3198 bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (a));
3199 }
3200 if (ALLOCNO_REGNO (a) < start_regno
1756cb66 3201 || (aclass = ALLOCNO_CLASS (a)) == NO_REGS)
058e97ec 3202 continue;
ac0ab4f7 3203 for (i = 0; i < n; i++)
058e97ec 3204 {
ac0ab4f7
BS
3205 ira_object_t obj = ALLOCNO_OBJECT (a, i);
3206 ira_object_t conflict_obj;
3207 ira_object_conflict_iterator oci;
1756cb66 3208
ac0ab4f7
BS
3209 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
3210 {
3211 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66 3212
ac0ab4f7 3213 ira_assert (ira_reg_classes_intersect_p
1756cb66 3214 [aclass][ALLOCNO_CLASS (conflict_a)]);
fcaa4ca4 3215 if (!bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (conflict_a)))
ac0ab4f7 3216 continue;
ac0ab4f7
BS
3217 sorted_allocnos[allocnos_to_color_num++] = conflict_a;
3218 }
058e97ec
VM
3219 }
3220 }
3221 ira_free_bitmap (allocnos_to_color);
3222 if (allocnos_to_color_num > 1)
3223 {
1ae64b0f 3224 setup_allocno_priorities (sorted_allocnos, allocnos_to_color_num);
058e97ec
VM
3225 qsort (sorted_allocnos, allocnos_to_color_num, sizeof (ira_allocno_t),
3226 allocno_priority_compare_func);
3227 }
3228 for (i = 0; i < allocnos_to_color_num; i++)
3229 {
3230 a = sorted_allocnos[i];
3231 ALLOCNO_ASSIGNED_P (a) = false;
058e97ec
VM
3232 update_curr_costs (a);
3233 }
3234 for (i = 0; i < allocnos_to_color_num; i++)
3235 {
3236 a = sorted_allocnos[i];
3237 if (assign_hard_reg (a, true))
3238 {
3239 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3240 fprintf
3241 (ira_dump_file,
3242 " Secondary allocation: assign hard reg %d to reg %d\n",
3243 ALLOCNO_HARD_REGNO (a), ALLOCNO_REGNO (a));
3244 }
3245 }
3246}
3247
3248\f
3249
1756cb66
VM
3250/* This page contains functions used to find conflicts using allocno
3251 live ranges. */
3252
3253/* Return TRUE if live ranges of allocnos A1 and A2 intersect. It is
3254 used to find a conflict for new allocnos or allocnos with the
3255 different allocno classes. */
3256static bool
3257allocnos_conflict_by_live_ranges_p (ira_allocno_t a1, ira_allocno_t a2)
3258{
3259 rtx reg1, reg2;
3260 int i, j;
3261 int n1 = ALLOCNO_NUM_OBJECTS (a1);
3262 int n2 = ALLOCNO_NUM_OBJECTS (a2);
3263
3264 if (a1 == a2)
3265 return false;
3266 reg1 = regno_reg_rtx[ALLOCNO_REGNO (a1)];
3267 reg2 = regno_reg_rtx[ALLOCNO_REGNO (a2)];
3268 if (reg1 != NULL && reg2 != NULL
3269 && ORIGINAL_REGNO (reg1) == ORIGINAL_REGNO (reg2))
3270 return false;
3271
3272 for (i = 0; i < n1; i++)
3273 {
3274 ira_object_t c1 = ALLOCNO_OBJECT (a1, i);
3275
3276 for (j = 0; j < n2; j++)
3277 {
3278 ira_object_t c2 = ALLOCNO_OBJECT (a2, j);
3279
3280 if (ira_live_ranges_intersect_p (OBJECT_LIVE_RANGES (c1),
3281 OBJECT_LIVE_RANGES (c2)))
3282 return true;
3283 }
3284 }
3285 return false;
3286}
3287
3288#ifdef ENABLE_IRA_CHECKING
3289
3290/* Return TRUE if live ranges of pseudo-registers REGNO1 and REGNO2
3291 intersect. This should be used when there is only one region.
3292 Currently this is used during reload. */
3293static bool
3294conflict_by_live_ranges_p (int regno1, int regno2)
3295{
3296 ira_allocno_t a1, a2;
3297
3298 ira_assert (regno1 >= FIRST_PSEUDO_REGISTER
3299 && regno2 >= FIRST_PSEUDO_REGISTER);
3300 /* Reg info caclulated by dataflow infrastructure can be different
3301 from one calculated by regclass. */
3302 if ((a1 = ira_loop_tree_root->regno_allocno_map[regno1]) == NULL
3303 || (a2 = ira_loop_tree_root->regno_allocno_map[regno2]) == NULL)
3304 return false;
3305 return allocnos_conflict_by_live_ranges_p (a1, a2);
3306}
3307
3308#endif
3309
3310\f
3311
058e97ec
VM
3312/* This page contains code to coalesce memory stack slots used by
3313 spilled allocnos. This results in smaller stack frame, better data
3314 locality, and in smaller code for some architectures like
3315 x86/x86_64 where insn size depends on address displacement value.
3316 On the other hand, it can worsen insn scheduling after the RA but
3317 in practice it is less important than smaller stack frames. */
3318
22b0982c
VM
3319/* TRUE if we coalesced some allocnos. In other words, if we got
3320 loops formed by members first_coalesced_allocno and
3321 next_coalesced_allocno containing more one allocno. */
3322static bool allocno_coalesced_p;
3323
3324/* Bitmap used to prevent a repeated allocno processing because of
3325 coalescing. */
3326static bitmap processed_coalesced_allocno_bitmap;
3327
1756cb66
VM
3328/* See below. */
3329typedef struct coalesce_data *coalesce_data_t;
3330
3331/* To decrease footprint of ira_allocno structure we store all data
3332 needed only for coalescing in the following structure. */
3333struct coalesce_data
3334{
3335 /* Coalesced allocnos form a cyclic list. One allocno given by
3336 FIRST represents all coalesced allocnos. The
3337 list is chained by NEXT. */
3338 ira_allocno_t first;
3339 ira_allocno_t next;
3340 int temp;
3341};
3342
3343/* Container for storing allocno data concerning coalescing. */
3344static coalesce_data_t allocno_coalesce_data;
3345
3346/* Macro to access the data concerning coalescing. */
3347#define ALLOCNO_COALESCE_DATA(a) ((coalesce_data_t) ALLOCNO_ADD_DATA (a))
3348
22b0982c
VM
3349/* The function is used to sort allocnos according to their execution
3350 frequencies. */
3351static int
3352copy_freq_compare_func (const void *v1p, const void *v2p)
3353{
3354 ira_copy_t cp1 = *(const ira_copy_t *) v1p, cp2 = *(const ira_copy_t *) v2p;
3355 int pri1, pri2;
3356
3357 pri1 = cp1->freq;
3358 pri2 = cp2->freq;
3359 if (pri2 - pri1)
3360 return pri2 - pri1;
3361
3362 /* If freqencies are equal, sort by copies, so that the results of
3363 qsort leave nothing to chance. */
3364 return cp1->num - cp2->num;
3365}
3366
3367/* Merge two sets of coalesced allocnos given correspondingly by
3368 allocnos A1 and A2 (more accurately merging A2 set into A1
3369 set). */
3370static void
3371merge_allocnos (ira_allocno_t a1, ira_allocno_t a2)
3372{
3373 ira_allocno_t a, first, last, next;
3374
1756cb66
VM
3375 first = ALLOCNO_COALESCE_DATA (a1)->first;
3376 a = ALLOCNO_COALESCE_DATA (a2)->first;
3377 if (first == a)
22b0982c 3378 return;
1756cb66
VM
3379 for (last = a2, a = ALLOCNO_COALESCE_DATA (a2)->next;;
3380 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3381 {
1756cb66 3382 ALLOCNO_COALESCE_DATA (a)->first = first;
22b0982c
VM
3383 if (a == a2)
3384 break;
3385 last = a;
3386 }
1756cb66
VM
3387 next = allocno_coalesce_data[ALLOCNO_NUM (first)].next;
3388 allocno_coalesce_data[ALLOCNO_NUM (first)].next = a2;
3389 allocno_coalesce_data[ALLOCNO_NUM (last)].next = next;
22b0982c
VM
3390}
3391
1756cb66
VM
3392/* Return TRUE if there are conflicting allocnos from two sets of
3393 coalesced allocnos given correspondingly by allocnos A1 and A2. We
3394 use live ranges to find conflicts because conflicts are represented
3395 only for allocnos of the same allocno class and during the reload
3396 pass we coalesce allocnos for sharing stack memory slots. */
22b0982c
VM
3397static bool
3398coalesced_allocno_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
3399{
1756cb66 3400 ira_allocno_t a, conflict_a;
22b0982c 3401
22b0982c
VM
3402 if (allocno_coalesced_p)
3403 {
1756cb66
VM
3404 bitmap_clear (processed_coalesced_allocno_bitmap);
3405 for (a = ALLOCNO_COALESCE_DATA (a1)->next;;
3406 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3407 {
1756cb66 3408 bitmap_set_bit (processed_coalesced_allocno_bitmap, ALLOCNO_NUM (a));
22b0982c
VM
3409 if (a == a1)
3410 break;
3411 }
3412 }
1756cb66
VM
3413 for (a = ALLOCNO_COALESCE_DATA (a2)->next;;
3414 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3415 {
1756cb66
VM
3416 for (conflict_a = ALLOCNO_COALESCE_DATA (a1)->next;;
3417 conflict_a = ALLOCNO_COALESCE_DATA (conflict_a)->next)
22b0982c 3418 {
1756cb66 3419 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
22b0982c 3420 return true;
1756cb66 3421 if (conflict_a == a1)
22b0982c
VM
3422 break;
3423 }
22b0982c
VM
3424 if (a == a2)
3425 break;
3426 }
3427 return false;
3428}
3429
3430/* The major function for aggressive allocno coalescing. We coalesce
3431 only spilled allocnos. If some allocnos have been coalesced, we
3432 set up flag allocno_coalesced_p. */
3433static void
3434coalesce_allocnos (void)
3435{
3436 ira_allocno_t a;
3437 ira_copy_t cp, next_cp, *sorted_copies;
3438 unsigned int j;
3439 int i, n, cp_num, regno;
3440 bitmap_iterator bi;
3441
3442 sorted_copies = (ira_copy_t *) ira_allocate (ira_copies_num
3443 * sizeof (ira_copy_t));
3444 cp_num = 0;
3445 /* Collect copies. */
3446 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, j, bi)
3447 {
3448 a = ira_allocnos[j];
3449 regno = ALLOCNO_REGNO (a);
3450 if (! ALLOCNO_ASSIGNED_P (a) || ALLOCNO_HARD_REGNO (a) >= 0
3451 || (regno < ira_reg_equiv_len
3452 && (ira_reg_equiv_const[regno] != NULL_RTX
3453 || ira_reg_equiv_invariant_p[regno])))
3454 continue;
3455 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3456 {
3457 if (cp->first == a)
3458 {
3459 next_cp = cp->next_first_allocno_copy;
3460 regno = ALLOCNO_REGNO (cp->second);
3461 /* For priority coloring we coalesce allocnos only with
1756cb66 3462 the same allocno class not with intersected allocno
22b0982c
VM
3463 classes as it were possible. It is done for
3464 simplicity. */
3465 if ((cp->insn != NULL || cp->constraint_p)
3466 && ALLOCNO_ASSIGNED_P (cp->second)
3467 && ALLOCNO_HARD_REGNO (cp->second) < 0
3468 && (regno >= ira_reg_equiv_len
3469 || (! ira_reg_equiv_invariant_p[regno]
3470 && ira_reg_equiv_const[regno] == NULL_RTX)))
3471 sorted_copies[cp_num++] = cp;
3472 }
3473 else if (cp->second == a)
3474 next_cp = cp->next_second_allocno_copy;
3475 else
3476 gcc_unreachable ();
3477 }
3478 }
3479 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
3480 /* Coalesced copies, most frequently executed first. */
3481 for (; cp_num != 0;)
3482 {
3483 for (i = 0; i < cp_num; i++)
3484 {
3485 cp = sorted_copies[i];
3486 if (! coalesced_allocno_conflict_p (cp->first, cp->second))
3487 {
3488 allocno_coalesced_p = true;
3489 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3490 fprintf
3491 (ira_dump_file,
3492 " Coalescing copy %d:a%dr%d-a%dr%d (freq=%d)\n",
3493 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
3494 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
3495 cp->freq);
3496 merge_allocnos (cp->first, cp->second);
3497 i++;
3498 break;
3499 }
3500 }
3501 /* Collect the rest of copies. */
3502 for (n = 0; i < cp_num; i++)
3503 {
3504 cp = sorted_copies[i];
1756cb66
VM
3505 if (allocno_coalesce_data[ALLOCNO_NUM (cp->first)].first
3506 != allocno_coalesce_data[ALLOCNO_NUM (cp->second)].first)
22b0982c
VM
3507 sorted_copies[n++] = cp;
3508 }
3509 cp_num = n;
3510 }
3511 ira_free (sorted_copies);
3512}
3513
058e97ec
VM
3514/* Usage cost and order number of coalesced allocno set to which
3515 given pseudo register belongs to. */
3516static int *regno_coalesced_allocno_cost;
3517static int *regno_coalesced_allocno_num;
3518
3519/* Sort pseudos according frequencies of coalesced allocno sets they
3520 belong to (putting most frequently ones first), and according to
3521 coalesced allocno set order numbers. */
3522static int
3523coalesced_pseudo_reg_freq_compare (const void *v1p, const void *v2p)
3524{
3525 const int regno1 = *(const int *) v1p;
3526 const int regno2 = *(const int *) v2p;
3527 int diff;
3528
3529 if ((diff = (regno_coalesced_allocno_cost[regno2]
3530 - regno_coalesced_allocno_cost[regno1])) != 0)
3531 return diff;
3532 if ((diff = (regno_coalesced_allocno_num[regno1]
3533 - regno_coalesced_allocno_num[regno2])) != 0)
3534 return diff;
3535 return regno1 - regno2;
3536}
3537
3538/* Widest width in which each pseudo reg is referred to (via subreg).
3539 It is used for sorting pseudo registers. */
3540static unsigned int *regno_max_ref_width;
3541
3542/* Redefine STACK_GROWS_DOWNWARD in terms of 0 or 1. */
3543#ifdef STACK_GROWS_DOWNWARD
3544# undef STACK_GROWS_DOWNWARD
3545# define STACK_GROWS_DOWNWARD 1
3546#else
3547# define STACK_GROWS_DOWNWARD 0
3548#endif
3549
3550/* Sort pseudos according their slot numbers (putting ones with
3551 smaller numbers first, or last when the frame pointer is not
3552 needed). */
3553static int
3554coalesced_pseudo_reg_slot_compare (const void *v1p, const void *v2p)
3555{
3556 const int regno1 = *(const int *) v1p;
3557 const int regno2 = *(const int *) v2p;
3558 ira_allocno_t a1 = ira_regno_allocno_map[regno1];
3559 ira_allocno_t a2 = ira_regno_allocno_map[regno2];
3560 int diff, slot_num1, slot_num2;
3561 int total_size1, total_size2;
3562
3563 if (a1 == NULL || ALLOCNO_HARD_REGNO (a1) >= 0)
3564 {
3565 if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
004a6ce8 3566 return regno1 - regno2;
058e97ec
VM
3567 return 1;
3568 }
3569 else if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
3570 return -1;
3571 slot_num1 = -ALLOCNO_HARD_REGNO (a1);
3572 slot_num2 = -ALLOCNO_HARD_REGNO (a2);
3573 if ((diff = slot_num1 - slot_num2) != 0)
3574 return (frame_pointer_needed
3575 || !FRAME_GROWS_DOWNWARD == STACK_GROWS_DOWNWARD ? diff : -diff);
1756cb66
VM
3576 total_size1 = MAX (PSEUDO_REGNO_BYTES (regno1),
3577 regno_max_ref_width[regno1]);
3578 total_size2 = MAX (PSEUDO_REGNO_BYTES (regno2),
3579 regno_max_ref_width[regno2]);
058e97ec
VM
3580 if ((diff = total_size2 - total_size1) != 0)
3581 return diff;
004a6ce8 3582 return regno1 - regno2;
058e97ec
VM
3583}
3584
3585/* Setup REGNO_COALESCED_ALLOCNO_COST and REGNO_COALESCED_ALLOCNO_NUM
3586 for coalesced allocno sets containing allocnos with their regnos
3587 given in array PSEUDO_REGNOS of length N. */
3588static void
3589setup_coalesced_allocno_costs_and_nums (int *pseudo_regnos, int n)
3590{
3591 int i, num, regno, cost;
3592 ira_allocno_t allocno, a;
3593
3594 for (num = i = 0; i < n; i++)
3595 {
3596 regno = pseudo_regnos[i];
3597 allocno = ira_regno_allocno_map[regno];
3598 if (allocno == NULL)
3599 {
3600 regno_coalesced_allocno_cost[regno] = 0;
3601 regno_coalesced_allocno_num[regno] = ++num;
3602 continue;
3603 }
1756cb66 3604 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
3605 continue;
3606 num++;
1756cb66
VM
3607 for (cost = 0, a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3608 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3609 {
3610 cost += ALLOCNO_FREQ (a);
3611 if (a == allocno)
3612 break;
3613 }
1756cb66
VM
3614 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3615 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3616 {
3617 regno_coalesced_allocno_num[ALLOCNO_REGNO (a)] = num;
3618 regno_coalesced_allocno_cost[ALLOCNO_REGNO (a)] = cost;
3619 if (a == allocno)
3620 break;
3621 }
3622 }
3623}
3624
3625/* Collect spilled allocnos representing coalesced allocno sets (the
3626 first coalesced allocno). The collected allocnos are returned
3627 through array SPILLED_COALESCED_ALLOCNOS. The function returns the
3628 number of the collected allocnos. The allocnos are given by their
3629 regnos in array PSEUDO_REGNOS of length N. */
3630static int
3631collect_spilled_coalesced_allocnos (int *pseudo_regnos, int n,
3632 ira_allocno_t *spilled_coalesced_allocnos)
3633{
3634 int i, num, regno;
3635 ira_allocno_t allocno;
3636
3637 for (num = i = 0; i < n; i++)
3638 {
3639 regno = pseudo_regnos[i];
3640 allocno = ira_regno_allocno_map[regno];
3641 if (allocno == NULL || ALLOCNO_HARD_REGNO (allocno) >= 0
1756cb66 3642 || ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
3643 continue;
3644 spilled_coalesced_allocnos[num++] = allocno;
3645 }
3646 return num;
3647}
3648
3553f0bb
VM
3649/* Array of live ranges of size IRA_ALLOCNOS_NUM. Live range for
3650 given slot contains live ranges of coalesced allocnos assigned to
3651 given slot. */
b14151b5 3652static live_range_t *slot_coalesced_allocnos_live_ranges;
b15a7ae6 3653
3553f0bb
VM
3654/* Return TRUE if coalesced allocnos represented by ALLOCNO has live
3655 ranges intersected with live ranges of coalesced allocnos assigned
3656 to slot with number N. */
b15a7ae6 3657static bool
3553f0bb 3658slot_coalesced_allocno_live_ranges_intersect_p (ira_allocno_t allocno, int n)
b15a7ae6 3659{
b15a7ae6 3660 ira_allocno_t a;
b15a7ae6 3661
1756cb66
VM
3662 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3663 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 3664 {
ac0ab4f7
BS
3665 int i;
3666 int nr = ALLOCNO_NUM_OBJECTS (a);
1756cb66 3667
ac0ab4f7
BS
3668 for (i = 0; i < nr; i++)
3669 {
3670 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66
VM
3671
3672 if (ira_live_ranges_intersect_p
3673 (slot_coalesced_allocnos_live_ranges[n],
3674 OBJECT_LIVE_RANGES (obj)))
ac0ab4f7
BS
3675 return true;
3676 }
b15a7ae6
VM
3677 if (a == allocno)
3678 break;
3679 }
3680 return false;
3681}
3682
3553f0bb
VM
3683/* Update live ranges of slot to which coalesced allocnos represented
3684 by ALLOCNO were assigned. */
b15a7ae6 3685static void
3553f0bb 3686setup_slot_coalesced_allocno_live_ranges (ira_allocno_t allocno)
b15a7ae6 3687{
ac0ab4f7 3688 int i, n;
b15a7ae6 3689 ira_allocno_t a;
b14151b5 3690 live_range_t r;
b15a7ae6 3691
1756cb66
VM
3692 n = ALLOCNO_COALESCE_DATA (allocno)->temp;
3693 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3694 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 3695 {
ac0ab4f7
BS
3696 int nr = ALLOCNO_NUM_OBJECTS (a);
3697 for (i = 0; i < nr; i++)
3698 {
3699 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66 3700
ac0ab4f7
BS
3701 r = ira_copy_live_range_list (OBJECT_LIVE_RANGES (obj));
3702 slot_coalesced_allocnos_live_ranges[n]
3703 = ira_merge_live_ranges
1756cb66 3704 (slot_coalesced_allocnos_live_ranges[n], r);
ac0ab4f7 3705 }
b15a7ae6
VM
3706 if (a == allocno)
3707 break;
3708 }
3709}
3710
058e97ec
VM
3711/* We have coalesced allocnos involving in copies. Coalesce allocnos
3712 further in order to share the same memory stack slot. Allocnos
3713 representing sets of allocnos coalesced before the call are given
3714 in array SPILLED_COALESCED_ALLOCNOS of length NUM. Return TRUE if
3715 some allocnos were coalesced in the function. */
3716static bool
3717coalesce_spill_slots (ira_allocno_t *spilled_coalesced_allocnos, int num)
3718{
3553f0bb 3719 int i, j, n, last_coalesced_allocno_num;
058e97ec
VM
3720 ira_allocno_t allocno, a;
3721 bool merged_p = false;
1240d76e 3722 bitmap set_jump_crosses = regstat_get_setjmp_crosses ();
058e97ec 3723
3553f0bb 3724 slot_coalesced_allocnos_live_ranges
b14151b5 3725 = (live_range_t *) ira_allocate (sizeof (live_range_t) * ira_allocnos_num);
3553f0bb 3726 memset (slot_coalesced_allocnos_live_ranges, 0,
b14151b5 3727 sizeof (live_range_t) * ira_allocnos_num);
b15a7ae6 3728 last_coalesced_allocno_num = 0;
058e97ec
VM
3729 /* Coalesce non-conflicting spilled allocnos preferring most
3730 frequently used. */
3731 for (i = 0; i < num; i++)
3732 {
3733 allocno = spilled_coalesced_allocnos[i];
1756cb66 3734 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
1240d76e 3735 || bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (allocno))
058e97ec 3736 || (ALLOCNO_REGNO (allocno) < ira_reg_equiv_len
3553f0bb
VM
3737 && (ira_reg_equiv_const[ALLOCNO_REGNO (allocno)] != NULL_RTX
3738 || ira_reg_equiv_invariant_p[ALLOCNO_REGNO (allocno)])))
058e97ec
VM
3739 continue;
3740 for (j = 0; j < i; j++)
3741 {
3742 a = spilled_coalesced_allocnos[j];
1756cb66
VM
3743 n = ALLOCNO_COALESCE_DATA (a)->temp;
3744 if (ALLOCNO_COALESCE_DATA (a)->first == a
1240d76e 3745 && ! bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (a))
b15a7ae6
VM
3746 && (ALLOCNO_REGNO (a) >= ira_reg_equiv_len
3747 || (! ira_reg_equiv_invariant_p[ALLOCNO_REGNO (a)]
3748 && ira_reg_equiv_const[ALLOCNO_REGNO (a)] == NULL_RTX))
3553f0bb 3749 && ! slot_coalesced_allocno_live_ranges_intersect_p (allocno, n))
b15a7ae6
VM
3750 break;
3751 }
3752 if (j >= i)
3753 {
3754 /* No coalescing: set up number for coalesced allocnos
3755 represented by ALLOCNO. */
1756cb66 3756 ALLOCNO_COALESCE_DATA (allocno)->temp = last_coalesced_allocno_num++;
3553f0bb 3757 setup_slot_coalesced_allocno_live_ranges (allocno);
b15a7ae6
VM
3758 }
3759 else
3760 {
058e97ec
VM
3761 allocno_coalesced_p = true;
3762 merged_p = true;
3763 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3764 fprintf (ira_dump_file,
3765 " Coalescing spilled allocnos a%dr%d->a%dr%d\n",
3766 ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno),
3767 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
1756cb66
VM
3768 ALLOCNO_COALESCE_DATA (allocno)->temp
3769 = ALLOCNO_COALESCE_DATA (a)->temp;
3553f0bb 3770 setup_slot_coalesced_allocno_live_ranges (allocno);
058e97ec 3771 merge_allocnos (a, allocno);
1756cb66 3772 ira_assert (ALLOCNO_COALESCE_DATA (a)->first == a);
058e97ec
VM
3773 }
3774 }
3553f0bb 3775 for (i = 0; i < ira_allocnos_num; i++)
9140d27b 3776 ira_finish_live_range_list (slot_coalesced_allocnos_live_ranges[i]);
3553f0bb 3777 ira_free (slot_coalesced_allocnos_live_ranges);
058e97ec
VM
3778 return merged_p;
3779}
3780
3781/* Sort pseudo-register numbers in array PSEUDO_REGNOS of length N for
3782 subsequent assigning stack slots to them in the reload pass. To do
3783 this we coalesce spilled allocnos first to decrease the number of
3784 memory-memory move insns. This function is called by the
3785 reload. */
3786void
3787ira_sort_regnos_for_alter_reg (int *pseudo_regnos, int n,
3788 unsigned int *reg_max_ref_width)
3789{
3790 int max_regno = max_reg_num ();
3791 int i, regno, num, slot_num;
3792 ira_allocno_t allocno, a;
3793 ira_allocno_iterator ai;
3794 ira_allocno_t *spilled_coalesced_allocnos;
3795
058e97ec
VM
3796 /* Set up allocnos can be coalesced. */
3797 coloring_allocno_bitmap = ira_allocate_bitmap ();
3798 for (i = 0; i < n; i++)
3799 {
3800 regno = pseudo_regnos[i];
3801 allocno = ira_regno_allocno_map[regno];
3802 if (allocno != NULL)
1756cb66 3803 bitmap_set_bit (coloring_allocno_bitmap, ALLOCNO_NUM (allocno));
058e97ec
VM
3804 }
3805 allocno_coalesced_p = false;
22b0982c 3806 processed_coalesced_allocno_bitmap = ira_allocate_bitmap ();
1756cb66
VM
3807 allocno_coalesce_data
3808 = (coalesce_data_t) ira_allocate (sizeof (struct coalesce_data)
3809 * ira_allocnos_num);
3810 /* Initialize coalesce data for allocnos. */
3811 FOR_EACH_ALLOCNO (a, ai)
3812 {
3813 ALLOCNO_ADD_DATA (a) = allocno_coalesce_data + ALLOCNO_NUM (a);
3814 ALLOCNO_COALESCE_DATA (a)->first = a;
3815 ALLOCNO_COALESCE_DATA (a)->next = a;
3816 }
22b0982c 3817 coalesce_allocnos ();
058e97ec
VM
3818 ira_free_bitmap (coloring_allocno_bitmap);
3819 regno_coalesced_allocno_cost
3820 = (int *) ira_allocate (max_regno * sizeof (int));
3821 regno_coalesced_allocno_num
3822 = (int *) ira_allocate (max_regno * sizeof (int));
3823 memset (regno_coalesced_allocno_num, 0, max_regno * sizeof (int));
3824 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
3825 /* Sort regnos according frequencies of the corresponding coalesced
3826 allocno sets. */
3827 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_freq_compare);
3828 spilled_coalesced_allocnos
3829 = (ira_allocno_t *) ira_allocate (ira_allocnos_num
3830 * sizeof (ira_allocno_t));
3831 /* Collect allocnos representing the spilled coalesced allocno
3832 sets. */
3833 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
3834 spilled_coalesced_allocnos);
3835 if (flag_ira_share_spill_slots
3836 && coalesce_spill_slots (spilled_coalesced_allocnos, num))
3837 {
3838 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
3839 qsort (pseudo_regnos, n, sizeof (int),
3840 coalesced_pseudo_reg_freq_compare);
3841 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
3842 spilled_coalesced_allocnos);
3843 }
3844 ira_free_bitmap (processed_coalesced_allocno_bitmap);
3845 allocno_coalesced_p = false;
3846 /* Assign stack slot numbers to spilled allocno sets, use smaller
3847 numbers for most frequently used coalesced allocnos. -1 is
3848 reserved for dynamic search of stack slots for pseudos spilled by
3849 the reload. */
3850 slot_num = 1;
3851 for (i = 0; i < num; i++)
3852 {
3853 allocno = spilled_coalesced_allocnos[i];
1756cb66 3854 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
058e97ec
VM
3855 || ALLOCNO_HARD_REGNO (allocno) >= 0
3856 || (ALLOCNO_REGNO (allocno) < ira_reg_equiv_len
3553f0bb
VM
3857 && (ira_reg_equiv_const[ALLOCNO_REGNO (allocno)] != NULL_RTX
3858 || ira_reg_equiv_invariant_p[ALLOCNO_REGNO (allocno)])))
058e97ec
VM
3859 continue;
3860 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3861 fprintf (ira_dump_file, " Slot %d (freq,size):", slot_num);
3862 slot_num++;
1756cb66
VM
3863 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
3864 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
3865 {
3866 ira_assert (ALLOCNO_HARD_REGNO (a) < 0);
3867 ALLOCNO_HARD_REGNO (a) = -slot_num;
3868 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3869 fprintf (ira_dump_file, " a%dr%d(%d,%d)",
3870 ALLOCNO_NUM (a), ALLOCNO_REGNO (a), ALLOCNO_FREQ (a),
3871 MAX (PSEUDO_REGNO_BYTES (ALLOCNO_REGNO (a)),
3872 reg_max_ref_width[ALLOCNO_REGNO (a)]));
b8698a0f 3873
058e97ec
VM
3874 if (a == allocno)
3875 break;
3876 }
3877 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3878 fprintf (ira_dump_file, "\n");
3879 }
3880 ira_spilled_reg_stack_slots_num = slot_num - 1;
3881 ira_free (spilled_coalesced_allocnos);
3882 /* Sort regnos according the slot numbers. */
3883 regno_max_ref_width = reg_max_ref_width;
3884 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_slot_compare);
058e97ec 3885 FOR_EACH_ALLOCNO (a, ai)
1756cb66
VM
3886 ALLOCNO_ADD_DATA (a) = NULL;
3887 ira_free (allocno_coalesce_data);
058e97ec
VM
3888 ira_free (regno_coalesced_allocno_num);
3889 ira_free (regno_coalesced_allocno_cost);
3890}
3891
3892\f
3893
3894/* This page contains code used by the reload pass to improve the
3895 final code. */
3896
3897/* The function is called from reload to mark changes in the
3898 allocation of REGNO made by the reload. Remember that reg_renumber
3899 reflects the change result. */
3900void
3901ira_mark_allocation_change (int regno)
3902{
3903 ira_allocno_t a = ira_regno_allocno_map[regno];
3904 int old_hard_regno, hard_regno, cost;
1756cb66 3905 enum reg_class aclass = ALLOCNO_CLASS (a);
058e97ec
VM
3906
3907 ira_assert (a != NULL);
3908 hard_regno = reg_renumber[regno];
3909 if ((old_hard_regno = ALLOCNO_HARD_REGNO (a)) == hard_regno)
3910 return;
3911 if (old_hard_regno < 0)
3912 cost = -ALLOCNO_MEMORY_COST (a);
3913 else
3914 {
1756cb66 3915 ira_assert (ira_class_hard_reg_index[aclass][old_hard_regno] >= 0);
058e97ec 3916 cost = -(ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 3917 ? ALLOCNO_CLASS_COST (a)
058e97ec 3918 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 3919 [ira_class_hard_reg_index[aclass][old_hard_regno]]);
058e97ec
VM
3920 update_copy_costs (a, false);
3921 }
3922 ira_overall_cost -= cost;
3923 ALLOCNO_HARD_REGNO (a) = hard_regno;
3924 if (hard_regno < 0)
3925 {
3926 ALLOCNO_HARD_REGNO (a) = -1;
3927 cost += ALLOCNO_MEMORY_COST (a);
3928 }
1756cb66 3929 else if (ira_class_hard_reg_index[aclass][hard_regno] >= 0)
058e97ec
VM
3930 {
3931 cost += (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 3932 ? ALLOCNO_CLASS_COST (a)
058e97ec 3933 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 3934 [ira_class_hard_reg_index[aclass][hard_regno]]);
058e97ec
VM
3935 update_copy_costs (a, true);
3936 }
3937 else
3938 /* Reload changed class of the allocno. */
3939 cost = 0;
3940 ira_overall_cost += cost;
3941}
3942
3943/* This function is called when reload deletes memory-memory move. In
3944 this case we marks that the allocation of the corresponding
3945 allocnos should be not changed in future. Otherwise we risk to get
3946 a wrong code. */
3947void
3948ira_mark_memory_move_deletion (int dst_regno, int src_regno)
3949{
3950 ira_allocno_t dst = ira_regno_allocno_map[dst_regno];
3951 ira_allocno_t src = ira_regno_allocno_map[src_regno];
3952
3953 ira_assert (dst != NULL && src != NULL
3954 && ALLOCNO_HARD_REGNO (dst) < 0
3955 && ALLOCNO_HARD_REGNO (src) < 0);
3956 ALLOCNO_DONT_REASSIGN_P (dst) = true;
3957 ALLOCNO_DONT_REASSIGN_P (src) = true;
3958}
3959
3960/* Try to assign a hard register (except for FORBIDDEN_REGS) to
3631be48 3961 allocno A and return TRUE in the case of success. */
058e97ec
VM
3962static bool
3963allocno_reload_assign (ira_allocno_t a, HARD_REG_SET forbidden_regs)
3964{
3965 int hard_regno;
1756cb66 3966 enum reg_class aclass;
058e97ec 3967 int regno = ALLOCNO_REGNO (a);
ac0ab4f7
BS
3968 HARD_REG_SET saved[2];
3969 int i, n;
058e97ec 3970
ac0ab4f7
BS
3971 n = ALLOCNO_NUM_OBJECTS (a);
3972 for (i = 0; i < n; i++)
3973 {
3974 ira_object_t obj = ALLOCNO_OBJECT (a, i);
3975 COPY_HARD_REG_SET (saved[i], OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
3976 IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), forbidden_regs);
3977 if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
3978 IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
3979 call_used_reg_set);
3980 }
058e97ec 3981 ALLOCNO_ASSIGNED_P (a) = false;
1756cb66 3982 aclass = ALLOCNO_CLASS (a);
058e97ec
VM
3983 update_curr_costs (a);
3984 assign_hard_reg (a, true);
3985 hard_regno = ALLOCNO_HARD_REGNO (a);
3986 reg_renumber[regno] = hard_regno;
3987 if (hard_regno < 0)
3988 ALLOCNO_HARD_REGNO (a) = -1;
3989 else
3990 {
1756cb66
VM
3991 ira_assert (ira_class_hard_reg_index[aclass][hard_regno] >= 0);
3992 ira_overall_cost
3993 -= (ALLOCNO_MEMORY_COST (a)
3994 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
3995 ? ALLOCNO_CLASS_COST (a)
3996 : ALLOCNO_HARD_REG_COSTS (a)[ira_class_hard_reg_index
3997 [aclass][hard_regno]]));
058e97ec 3998 if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0
9181a6e5
VM
3999 && ira_hard_reg_set_intersection_p (hard_regno, ALLOCNO_MODE (a),
4000 call_used_reg_set))
058e97ec
VM
4001 {
4002 ira_assert (flag_caller_saves);
4003 caller_save_needed = 1;
4004 }
4005 }
4006
4007 /* If we found a hard register, modify the RTL for the pseudo
4008 register to show the hard register, and mark the pseudo register
4009 live. */
4010 if (reg_renumber[regno] >= 0)
4011 {
4012 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4013 fprintf (ira_dump_file, ": reassign to %d\n", reg_renumber[regno]);
4014 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
4015 mark_home_live (regno);
4016 }
4017 else if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4018 fprintf (ira_dump_file, "\n");
ac0ab4f7
BS
4019 for (i = 0; i < n; i++)
4020 {
4021 ira_object_t obj = ALLOCNO_OBJECT (a, i);
4022 COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), saved[i]);
4023 }
058e97ec
VM
4024 return reg_renumber[regno] >= 0;
4025}
4026
4027/* Sort pseudos according their usage frequencies (putting most
4028 frequently ones first). */
4029static int
4030pseudo_reg_compare (const void *v1p, const void *v2p)
4031{
4032 int regno1 = *(const int *) v1p;
4033 int regno2 = *(const int *) v2p;
4034 int diff;
4035
4036 if ((diff = REG_FREQ (regno2) - REG_FREQ (regno1)) != 0)
4037 return diff;
4038 return regno1 - regno2;
4039}
4040
4041/* Try to allocate hard registers to SPILLED_PSEUDO_REGS (there are
4042 NUM of them) or spilled pseudos conflicting with pseudos in
4043 SPILLED_PSEUDO_REGS. Return TRUE and update SPILLED, if the
4044 allocation has been changed. The function doesn't use
4045 BAD_SPILL_REGS and hard registers in PSEUDO_FORBIDDEN_REGS and
4046 PSEUDO_PREVIOUS_REGS for the corresponding pseudos. The function
4047 is called by the reload pass at the end of each reload
4048 iteration. */
4049bool
4050ira_reassign_pseudos (int *spilled_pseudo_regs, int num,
4051 HARD_REG_SET bad_spill_regs,
4052 HARD_REG_SET *pseudo_forbidden_regs,
6190446b
JL
4053 HARD_REG_SET *pseudo_previous_regs,
4054 bitmap spilled)
058e97ec 4055{
016f9d9d 4056 int i, n, regno;
058e97ec 4057 bool changed_p;
fa86d337 4058 ira_allocno_t a;
058e97ec 4059 HARD_REG_SET forbidden_regs;
6190446b
JL
4060 bitmap temp = BITMAP_ALLOC (NULL);
4061
4062 /* Add pseudos which conflict with pseudos already in
4063 SPILLED_PSEUDO_REGS to SPILLED_PSEUDO_REGS. This is preferable
4064 to allocating in two steps as some of the conflicts might have
4065 a higher priority than the pseudos passed in SPILLED_PSEUDO_REGS. */
4066 for (i = 0; i < num; i++)
4067 bitmap_set_bit (temp, spilled_pseudo_regs[i]);
4068
4069 for (i = 0, n = num; i < n; i++)
4070 {
ac0ab4f7 4071 int nr, j;
6190446b
JL
4072 int regno = spilled_pseudo_regs[i];
4073 bitmap_set_bit (temp, regno);
4074
4075 a = ira_regno_allocno_map[regno];
ac0ab4f7
BS
4076 nr = ALLOCNO_NUM_OBJECTS (a);
4077 for (j = 0; j < nr; j++)
fa86d337 4078 {
ac0ab4f7
BS
4079 ira_object_t conflict_obj;
4080 ira_object_t obj = ALLOCNO_OBJECT (a, j);
4081 ira_object_conflict_iterator oci;
4082
4083 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
fa86d337 4084 {
ac0ab4f7
BS
4085 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
4086 if (ALLOCNO_HARD_REGNO (conflict_a) < 0
4087 && ! ALLOCNO_DONT_REASSIGN_P (conflict_a)
fcaa4ca4 4088 && bitmap_set_bit (temp, ALLOCNO_REGNO (conflict_a)))
ac0ab4f7
BS
4089 {
4090 spilled_pseudo_regs[num++] = ALLOCNO_REGNO (conflict_a);
ac0ab4f7
BS
4091 /* ?!? This seems wrong. */
4092 bitmap_set_bit (consideration_allocno_bitmap,
4093 ALLOCNO_NUM (conflict_a));
4094 }
fa86d337
BS
4095 }
4096 }
6190446b 4097 }
058e97ec
VM
4098
4099 if (num > 1)
4100 qsort (spilled_pseudo_regs, num, sizeof (int), pseudo_reg_compare);
4101 changed_p = false;
4102 /* Try to assign hard registers to pseudos from
4103 SPILLED_PSEUDO_REGS. */
016f9d9d 4104 for (i = 0; i < num; i++)
058e97ec
VM
4105 {
4106 regno = spilled_pseudo_regs[i];
4107 COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs);
4108 IOR_HARD_REG_SET (forbidden_regs, pseudo_forbidden_regs[regno]);
4109 IOR_HARD_REG_SET (forbidden_regs, pseudo_previous_regs[regno]);
4110 gcc_assert (reg_renumber[regno] < 0);
4111 a = ira_regno_allocno_map[regno];
4112 ira_mark_allocation_change (regno);
4113 ira_assert (reg_renumber[regno] < 0);
4114 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4115 fprintf (ira_dump_file,
6190446b 4116 " Try Assign %d(a%d), cost=%d", regno, ALLOCNO_NUM (a),
058e97ec 4117 ALLOCNO_MEMORY_COST (a)
1756cb66 4118 - ALLOCNO_CLASS_COST (a));
058e97ec
VM
4119 allocno_reload_assign (a, forbidden_regs);
4120 if (reg_renumber[regno] >= 0)
4121 {
4122 CLEAR_REGNO_REG_SET (spilled, regno);
4123 changed_p = true;
4124 }
058e97ec 4125 }
6190446b 4126 BITMAP_FREE (temp);
058e97ec
VM
4127 return changed_p;
4128}
4129
4130/* The function is called by reload and returns already allocated
4131 stack slot (if any) for REGNO with given INHERENT_SIZE and
4132 TOTAL_SIZE. In the case of failure to find a slot which can be
4133 used for REGNO, the function returns NULL. */
4134rtx
4135ira_reuse_stack_slot (int regno, unsigned int inherent_size,
4136 unsigned int total_size)
4137{
4138 unsigned int i;
4139 int slot_num, best_slot_num;
4140 int cost, best_cost;
4141 ira_copy_t cp, next_cp;
4142 ira_allocno_t another_allocno, allocno = ira_regno_allocno_map[regno];
4143 rtx x;
4144 bitmap_iterator bi;
4145 struct ira_spilled_reg_stack_slot *slot = NULL;
4146
2af2dbdc 4147 ira_assert (inherent_size == PSEUDO_REGNO_BYTES (regno)
058e97ec
VM
4148 && inherent_size <= total_size
4149 && ALLOCNO_HARD_REGNO (allocno) < 0);
4150 if (! flag_ira_share_spill_slots)
4151 return NULL_RTX;
4152 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4153 if (slot_num != -1)
4154 {
4155 slot = &ira_spilled_reg_stack_slots[slot_num];
4156 x = slot->mem;
4157 }
4158 else
4159 {
4160 best_cost = best_slot_num = -1;
4161 x = NULL_RTX;
4162 /* It means that the pseudo was spilled in the reload pass, try
4163 to reuse a slot. */
4164 for (slot_num = 0;
4165 slot_num < ira_spilled_reg_stack_slots_num;
4166 slot_num++)
4167 {
4168 slot = &ira_spilled_reg_stack_slots[slot_num];
4169 if (slot->mem == NULL_RTX)
4170 continue;
4171 if (slot->width < total_size
4172 || GET_MODE_SIZE (GET_MODE (slot->mem)) < inherent_size)
4173 continue;
b8698a0f 4174
058e97ec
VM
4175 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4176 FIRST_PSEUDO_REGISTER, i, bi)
4177 {
4178 another_allocno = ira_regno_allocno_map[i];
1756cb66
VM
4179 if (allocnos_conflict_by_live_ranges_p (allocno,
4180 another_allocno))
058e97ec
VM
4181 goto cont;
4182 }
4183 for (cost = 0, cp = ALLOCNO_COPIES (allocno);
4184 cp != NULL;
4185 cp = next_cp)
4186 {
4187 if (cp->first == allocno)
4188 {
4189 next_cp = cp->next_first_allocno_copy;
4190 another_allocno = cp->second;
4191 }
4192 else if (cp->second == allocno)
4193 {
4194 next_cp = cp->next_second_allocno_copy;
4195 another_allocno = cp->first;
4196 }
4197 else
4198 gcc_unreachable ();
4199 if (cp->insn == NULL_RTX)
4200 continue;
4201 if (bitmap_bit_p (&slot->spilled_regs,
4202 ALLOCNO_REGNO (another_allocno)))
4203 cost += cp->freq;
4204 }
4205 if (cost > best_cost)
4206 {
4207 best_cost = cost;
4208 best_slot_num = slot_num;
4209 }
4210 cont:
4211 ;
4212 }
4213 if (best_cost >= 0)
4214 {
99b96649
EB
4215 slot_num = best_slot_num;
4216 slot = &ira_spilled_reg_stack_slots[slot_num];
058e97ec
VM
4217 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4218 x = slot->mem;
99b96649 4219 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
058e97ec
VM
4220 }
4221 }
4222 if (x != NULL_RTX)
4223 {
4224 ira_assert (slot->width >= total_size);
f7556aae 4225#ifdef ENABLE_IRA_CHECKING
058e97ec
VM
4226 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4227 FIRST_PSEUDO_REGISTER, i, bi)
4228 {
1756cb66 4229 ira_assert (! conflict_by_live_ranges_p (regno, i));
058e97ec 4230 }
f7556aae 4231#endif
058e97ec
VM
4232 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4233 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4234 {
4235 fprintf (ira_dump_file, " Assigning %d(freq=%d) slot %d of",
4236 regno, REG_FREQ (regno), slot_num);
4237 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4238 FIRST_PSEUDO_REGISTER, i, bi)
4239 {
4240 if ((unsigned) regno != i)
4241 fprintf (ira_dump_file, " %d", i);
4242 }
4243 fprintf (ira_dump_file, "\n");
4244 }
4245 }
4246 return x;
4247}
4248
4249/* This is called by reload every time a new stack slot X with
4250 TOTAL_SIZE was allocated for REGNO. We store this info for
4251 subsequent ira_reuse_stack_slot calls. */
4252void
4253ira_mark_new_stack_slot (rtx x, int regno, unsigned int total_size)
4254{
4255 struct ira_spilled_reg_stack_slot *slot;
4256 int slot_num;
4257 ira_allocno_t allocno;
4258
2af2dbdc 4259 ira_assert (PSEUDO_REGNO_BYTES (regno) <= total_size);
058e97ec
VM
4260 allocno = ira_regno_allocno_map[regno];
4261 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4262 if (slot_num == -1)
4263 {
4264 slot_num = ira_spilled_reg_stack_slots_num++;
4265 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
4266 }
4267 slot = &ira_spilled_reg_stack_slots[slot_num];
4268 INIT_REG_SET (&slot->spilled_regs);
4269 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4270 slot->mem = x;
4271 slot->width = total_size;
4272 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4273 fprintf (ira_dump_file, " Assigning %d(freq=%d) a new slot %d\n",
4274 regno, REG_FREQ (regno), slot_num);
4275}
4276
4277
4278/* Return spill cost for pseudo-registers whose numbers are in array
4279 REGNOS (with a negative number as an end marker) for reload with
4280 given IN and OUT for INSN. Return also number points (through
4281 EXCESS_PRESSURE_LIVE_LENGTH) where the pseudo-register lives and
4282 the register pressure is high, number of references of the
4283 pseudo-registers (through NREFS), number of callee-clobbered
4284 hard-registers occupied by the pseudo-registers (through
4285 CALL_USED_COUNT), and the first hard regno occupied by the
4286 pseudo-registers (through FIRST_HARD_REGNO). */
4287static int
4288calculate_spill_cost (int *regnos, rtx in, rtx out, rtx insn,
4289 int *excess_pressure_live_length,
4290 int *nrefs, int *call_used_count, int *first_hard_regno)
4291{
4292 int i, cost, regno, hard_regno, j, count, saved_cost, nregs;
4293 bool in_p, out_p;
4294 int length;
4295 ira_allocno_t a;
4296
4297 *nrefs = 0;
4298 for (length = count = cost = i = 0;; i++)
4299 {
4300 regno = regnos[i];
4301 if (regno < 0)
4302 break;
4303 *nrefs += REG_N_REFS (regno);
4304 hard_regno = reg_renumber[regno];
4305 ira_assert (hard_regno >= 0);
4306 a = ira_regno_allocno_map[regno];
ac0ab4f7 4307 length += ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a) / ALLOCNO_NUM_OBJECTS (a);
1756cb66 4308 cost += ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a);
058e97ec
VM
4309 nregs = hard_regno_nregs[hard_regno][ALLOCNO_MODE (a)];
4310 for (j = 0; j < nregs; j++)
4311 if (! TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + j))
4312 break;
4313 if (j == nregs)
4314 count++;
4315 in_p = in && REG_P (in) && (int) REGNO (in) == hard_regno;
4316 out_p = out && REG_P (out) && (int) REGNO (out) == hard_regno;
4317 if ((in_p || out_p)
4318 && find_regno_note (insn, REG_DEAD, hard_regno) != NULL_RTX)
4319 {
4320 saved_cost = 0;
4321 if (in_p)
4322 saved_cost += ira_memory_move_cost
1756cb66 4323 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][1];
058e97ec
VM
4324 if (out_p)
4325 saved_cost
4326 += ira_memory_move_cost
1756cb66 4327 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][0];
058e97ec
VM
4328 cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)) * saved_cost;
4329 }
4330 }
4331 *excess_pressure_live_length = length;
4332 *call_used_count = count;
4333 hard_regno = -1;
4334 if (regnos[0] >= 0)
4335 {
4336 hard_regno = reg_renumber[regnos[0]];
4337 }
4338 *first_hard_regno = hard_regno;
4339 return cost;
4340}
4341
4342/* Return TRUE if spilling pseudo-registers whose numbers are in array
4343 REGNOS is better than spilling pseudo-registers with numbers in
4344 OTHER_REGNOS for reload with given IN and OUT for INSN. The
4345 function used by the reload pass to make better register spilling
4346 decisions. */
4347bool
4348ira_better_spill_reload_regno_p (int *regnos, int *other_regnos,
4349 rtx in, rtx out, rtx insn)
4350{
4351 int cost, other_cost;
4352 int length, other_length;
4353 int nrefs, other_nrefs;
4354 int call_used_count, other_call_used_count;
4355 int hard_regno, other_hard_regno;
4356
b8698a0f 4357 cost = calculate_spill_cost (regnos, in, out, insn,
058e97ec
VM
4358 &length, &nrefs, &call_used_count, &hard_regno);
4359 other_cost = calculate_spill_cost (other_regnos, in, out, insn,
4360 &other_length, &other_nrefs,
4361 &other_call_used_count,
4362 &other_hard_regno);
4363 if (nrefs == 0 && other_nrefs != 0)
4364 return true;
4365 if (nrefs != 0 && other_nrefs == 0)
4366 return false;
4367 if (cost != other_cost)
4368 return cost < other_cost;
4369 if (length != other_length)
4370 return length > other_length;
4371#ifdef REG_ALLOC_ORDER
4372 if (hard_regno >= 0 && other_hard_regno >= 0)
4373 return (inv_reg_alloc_order[hard_regno]
4374 < inv_reg_alloc_order[other_hard_regno]);
4375#else
4376 if (call_used_count != other_call_used_count)
4377 return call_used_count > other_call_used_count;
4378#endif
4379 return false;
4380}
4381
4382\f
4383
4384/* Allocate and initialize data necessary for assign_hard_reg. */
4385void
4386ira_initiate_assign (void)
4387{
4388 sorted_allocnos
4389 = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4390 * ira_allocnos_num);
4391 consideration_allocno_bitmap = ira_allocate_bitmap ();
4392 initiate_cost_update ();
4393 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
4394}
4395
4396/* Deallocate data used by assign_hard_reg. */
4397void
4398ira_finish_assign (void)
4399{
4400 ira_free (sorted_allocnos);
4401 ira_free_bitmap (consideration_allocno_bitmap);
4402 finish_cost_update ();
4403 ira_free (allocno_priorities);
4404}
4405
4406\f
4407
4408/* Entry function doing color-based register allocation. */
cb1ca6ac
VM
4409static void
4410color (void)
058e97ec
VM
4411{
4412 allocno_stack_vec = VEC_alloc (ira_allocno_t, heap, ira_allocnos_num);
058e97ec
VM
4413 memset (allocated_hardreg_p, 0, sizeof (allocated_hardreg_p));
4414 ira_initiate_assign ();
4415 do_coloring ();
4416 ira_finish_assign ();
058e97ec
VM
4417 VEC_free (ira_allocno_t, heap, allocno_stack_vec);
4418 move_spill_restore ();
4419}
4420
4421\f
4422
4423/* This page contains a simple register allocator without usage of
4424 allocno conflicts. This is used for fast allocation for -O0. */
4425
4426/* Do register allocation by not using allocno conflicts. It uses
4427 only allocno live ranges. The algorithm is close to Chow's
4428 priority coloring. */
cb1ca6ac
VM
4429static void
4430fast_allocation (void)
058e97ec 4431{
1ae64b0f 4432 int i, j, k, num, class_size, hard_regno;
058e97ec
VM
4433#ifdef STACK_REGS
4434 bool no_stack_reg_p;
4435#endif
1756cb66 4436 enum reg_class aclass;
058e97ec
VM
4437 enum machine_mode mode;
4438 ira_allocno_t a;
4439 ira_allocno_iterator ai;
b14151b5 4440 live_range_t r;
058e97ec
VM
4441 HARD_REG_SET conflict_hard_regs, *used_hard_regs;
4442
058e97ec
VM
4443 sorted_allocnos = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4444 * ira_allocnos_num);
4445 num = 0;
4446 FOR_EACH_ALLOCNO (a, ai)
4447 sorted_allocnos[num++] = a;
1ae64b0f
VM
4448 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
4449 setup_allocno_priorities (sorted_allocnos, num);
4450 used_hard_regs = (HARD_REG_SET *) ira_allocate (sizeof (HARD_REG_SET)
4451 * ira_max_point);
4452 for (i = 0; i < ira_max_point; i++)
4453 CLEAR_HARD_REG_SET (used_hard_regs[i]);
311aab06 4454 qsort (sorted_allocnos, num, sizeof (ira_allocno_t),
058e97ec
VM
4455 allocno_priority_compare_func);
4456 for (i = 0; i < num; i++)
4457 {
ac0ab4f7
BS
4458 int nr, l;
4459
058e97ec 4460 a = sorted_allocnos[i];
ac0ab4f7
BS
4461 nr = ALLOCNO_NUM_OBJECTS (a);
4462 CLEAR_HARD_REG_SET (conflict_hard_regs);
4463 for (l = 0; l < nr; l++)
4464 {
4465 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4466 IOR_HARD_REG_SET (conflict_hard_regs,
4467 OBJECT_CONFLICT_HARD_REGS (obj));
4468 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4469 for (j = r->start; j <= r->finish; j++)
4470 IOR_HARD_REG_SET (conflict_hard_regs, used_hard_regs[j]);
4471 }
1756cb66 4472 aclass = ALLOCNO_CLASS (a);
6b8d9676
VM
4473 ALLOCNO_ASSIGNED_P (a) = true;
4474 ALLOCNO_HARD_REGNO (a) = -1;
1756cb66 4475 if (hard_reg_set_subset_p (reg_class_contents[aclass],
058e97ec
VM
4476 conflict_hard_regs))
4477 continue;
4478 mode = ALLOCNO_MODE (a);
4479#ifdef STACK_REGS
4480 no_stack_reg_p = ALLOCNO_NO_STACK_REG_P (a);
4481#endif
1756cb66 4482 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
4483 for (j = 0; j < class_size; j++)
4484 {
1756cb66 4485 hard_regno = ira_class_hard_regs[aclass][j];
058e97ec
VM
4486#ifdef STACK_REGS
4487 if (no_stack_reg_p && FIRST_STACK_REG <= hard_regno
4488 && hard_regno <= LAST_STACK_REG)
4489 continue;
4490#endif
9181a6e5 4491 if (ira_hard_reg_set_intersection_p (hard_regno, mode, conflict_hard_regs)
058e97ec 4492 || (TEST_HARD_REG_BIT
1756cb66 4493 (ira_prohibited_class_mode_regs[aclass][mode], hard_regno)))
058e97ec
VM
4494 continue;
4495 ALLOCNO_HARD_REGNO (a) = hard_regno;
ac0ab4f7
BS
4496 for (l = 0; l < nr; l++)
4497 {
4498 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4499 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4500 for (k = r->start; k <= r->finish; k++)
4501 IOR_HARD_REG_SET (used_hard_regs[k],
4502 ira_reg_mode_hard_regset[hard_regno][mode]);
4503 }
058e97ec
VM
4504 break;
4505 }
4506 }
4507 ira_free (sorted_allocnos);
4508 ira_free (used_hard_regs);
4509 ira_free (allocno_priorities);
4510 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
4511 ira_print_disposition (ira_dump_file);
4512}
cb1ca6ac
VM
4513
4514\f
4515
4516/* Entry function doing coloring. */
4517void
4518ira_color (void)
4519{
4520 ira_allocno_t a;
4521 ira_allocno_iterator ai;
4522
4523 /* Setup updated costs. */
4524 FOR_EACH_ALLOCNO (a, ai)
4525 {
4526 ALLOCNO_UPDATED_MEMORY_COST (a) = ALLOCNO_MEMORY_COST (a);
1756cb66 4527 ALLOCNO_UPDATED_CLASS_COST (a) = ALLOCNO_CLASS_COST (a);
cb1ca6ac 4528 }
311aab06 4529 if (ira_conflicts_p)
cb1ca6ac
VM
4530 color ();
4531 else
4532 fast_allocation ();
4533}