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cb20f7e8 | 1 | /* RTL-level loop invariant motion. |
99dee823 | 2 | Copyright (C) 2004-2021 Free Software Foundation, Inc. |
cb20f7e8 | 3 | |
5e962776 | 4 | This file is part of GCC. |
cb20f7e8 | 5 | |
5e962776 ZD |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the | |
9dcd6f09 | 8 | Free Software Foundation; either version 3, or (at your option) any |
5e962776 | 9 | later version. |
cb20f7e8 | 10 | |
5e962776 ZD |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
cb20f7e8 | 15 | |
5e962776 | 16 | You should have received a copy of the GNU General Public License |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
5e962776 ZD |
19 | |
20 | /* This implements the loop invariant motion pass. It is very simple | |
4a8cae83 SB |
21 | (no calls, no loads/stores, etc.). This should be sufficient to cleanup |
22 | things like address arithmetics -- other more complicated invariants should | |
23 | be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c. | |
cb20f7e8 | 24 | |
5e962776 ZD |
25 | We proceed loop by loop -- it is simpler than trying to handle things |
26 | globally and should not lose much. First we inspect all sets inside loop | |
27 | and create a dependency graph on insns (saying "to move this insn, you must | |
28 | also move the following insns"). | |
29 | ||
30 | We then need to determine what to move. We estimate the number of registers | |
31 | used and move as many invariants as possible while we still have enough free | |
32 | registers. We prefer the expensive invariants. | |
cb20f7e8 | 33 | |
5e962776 ZD |
34 | Then we move the selected invariants out of the loop, creating a new |
35 | temporaries for them if necessary. */ | |
36 | ||
37 | #include "config.h" | |
38 | #include "system.h" | |
39 | #include "coretypes.h" | |
c7131fb2 | 40 | #include "backend.h" |
957060b5 | 41 | #include "target.h" |
5e962776 | 42 | #include "rtl.h" |
957060b5 AM |
43 | #include "tree.h" |
44 | #include "cfghooks.h" | |
c7131fb2 | 45 | #include "df.h" |
4d0cdd0c | 46 | #include "memmodel.h" |
3912d291 | 47 | #include "tm_p.h" |
957060b5 AM |
48 | #include "insn-config.h" |
49 | #include "regs.h" | |
50 | #include "ira.h" | |
51 | #include "recog.h" | |
60393bbc | 52 | #include "cfgrtl.h" |
60393bbc AM |
53 | #include "cfgloop.h" |
54 | #include "expr.h" | |
192912db | 55 | #include "rtl-iter.h" |
7ee2468b | 56 | #include "dumpfile.h" |
5e962776 ZD |
57 | |
58 | /* The data stored for the loop. */ | |
59 | ||
6c1dae73 | 60 | class loop_data |
5e962776 | 61 | { |
6c1dae73 | 62 | public: |
99b1c316 | 63 | class loop *outermost_exit; /* The outermost exit of the loop. */ |
5e962776 | 64 | bool has_call; /* True if the loop contains a call. */ |
1833192f | 65 | /* Maximal register pressure inside loop for given register class |
1756cb66 | 66 | (defined only for the pressure classes). */ |
1833192f VM |
67 | int max_reg_pressure[N_REG_CLASSES]; |
68 | /* Loop regs referenced and live pseudo-registers. */ | |
69 | bitmap_head regs_ref; | |
70 | bitmap_head regs_live; | |
5e962776 ZD |
71 | }; |
72 | ||
99b1c316 | 73 | #define LOOP_DATA(LOOP) ((class loop_data *) (LOOP)->aux) |
5e962776 ZD |
74 | |
75 | /* The description of an use. */ | |
76 | ||
77 | struct use | |
78 | { | |
79 | rtx *pos; /* Position of the use. */ | |
89bfd6f5 | 80 | rtx_insn *insn; /* The insn in that the use occurs. */ |
1bfdbb29 | 81 | unsigned addr_use_p; /* Whether the use occurs in an address. */ |
5e962776 ZD |
82 | struct use *next; /* Next use in the list. */ |
83 | }; | |
84 | ||
85 | /* The description of a def. */ | |
86 | ||
87 | struct def | |
88 | { | |
89 | struct use *uses; /* The list of uses that are uniquely reached | |
90 | by it. */ | |
91 | unsigned n_uses; /* Number of such uses. */ | |
1bfdbb29 | 92 | unsigned n_addr_uses; /* Number of uses in addresses. */ |
5e962776 | 93 | unsigned invno; /* The corresponding invariant. */ |
5b92e189 BC |
94 | bool can_prop_to_addr_uses; /* True if the corresponding inv can be |
95 | propagated into its address uses. */ | |
5e962776 ZD |
96 | }; |
97 | ||
98 | /* The data stored for each invariant. */ | |
99 | ||
100 | struct invariant | |
101 | { | |
102 | /* The number of the invariant. */ | |
103 | unsigned invno; | |
104 | ||
1052bd54 ZD |
105 | /* The number of the invariant with the same value. */ |
106 | unsigned eqto; | |
107 | ||
e42e3d15 ZC |
108 | /* The number of invariants which eqto this. */ |
109 | unsigned eqno; | |
110 | ||
1833192f VM |
111 | /* If we moved the invariant out of the loop, the original regno |
112 | that contained its value. */ | |
113 | int orig_regno; | |
114 | ||
34e82342 RB |
115 | /* If we moved the invariant out of the loop, the register that contains its |
116 | value. */ | |
117 | rtx reg; | |
118 | ||
5e962776 ZD |
119 | /* The definition of the invariant. */ |
120 | struct def *def; | |
121 | ||
122 | /* The insn in that it is defined. */ | |
89bfd6f5 | 123 | rtx_insn *insn; |
5e962776 ZD |
124 | |
125 | /* Whether it is always executed. */ | |
126 | bool always_executed; | |
127 | ||
128 | /* Whether to move the invariant. */ | |
129 | bool move; | |
130 | ||
1bfdbb29 PB |
131 | /* Whether the invariant is cheap when used as an address. */ |
132 | bool cheap_address; | |
133 | ||
cb20f7e8 | 134 | /* Cost of the invariant. */ |
5e962776 ZD |
135 | unsigned cost; |
136 | ||
5e962776 ZD |
137 | /* Used for detecting already visited invariants during determining |
138 | costs of movements. */ | |
139 | unsigned stamp; | |
34e82342 RB |
140 | |
141 | /* The invariants it depends on. */ | |
142 | bitmap depends_on; | |
5e962776 ZD |
143 | }; |
144 | ||
1833192f | 145 | /* Currently processed loop. */ |
99b1c316 | 146 | static class loop *curr_loop; |
1833192f | 147 | |
6fb5fa3c DB |
148 | /* Table of invariants indexed by the df_ref uid field. */ |
149 | ||
150 | static unsigned int invariant_table_size = 0; | |
151 | static struct invariant ** invariant_table; | |
152 | ||
1052bd54 ZD |
153 | /* Entry for hash table of invariant expressions. */ |
154 | ||
155 | struct invariant_expr_entry | |
156 | { | |
157 | /* The invariant. */ | |
158 | struct invariant *inv; | |
159 | ||
160 | /* Its value. */ | |
161 | rtx expr; | |
162 | ||
163 | /* Its mode. */ | |
ef4bddc2 | 164 | machine_mode mode; |
1052bd54 ZD |
165 | |
166 | /* Its hash. */ | |
167 | hashval_t hash; | |
168 | }; | |
169 | ||
5e962776 ZD |
170 | /* The actual stamp for marking already visited invariants during determining |
171 | costs of movements. */ | |
172 | ||
173 | static unsigned actual_stamp; | |
174 | ||
edd954e6 KH |
175 | typedef struct invariant *invariant_p; |
176 | ||
edd954e6 | 177 | |
5e962776 ZD |
178 | /* The invariants. */ |
179 | ||
9771b263 | 180 | static vec<invariant_p> invariants; |
5e962776 | 181 | |
6fb5fa3c | 182 | /* Check the size of the invariant table and realloc if necessary. */ |
cb20f7e8 | 183 | |
b8698a0f | 184 | static void |
6fb5fa3c DB |
185 | check_invariant_table_size (void) |
186 | { | |
c3284718 | 187 | if (invariant_table_size < DF_DEFS_TABLE_SIZE ()) |
6fb5fa3c DB |
188 | { |
189 | unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4); | |
d3bfe4de | 190 | invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size); |
b8698a0f | 191 | memset (&invariant_table[invariant_table_size], 0, |
92cfe9d5 | 192 | (new_size - invariant_table_size) * sizeof (struct invariant *)); |
6fb5fa3c DB |
193 | invariant_table_size = new_size; |
194 | } | |
195 | } | |
cb20f7e8 | 196 | |
5e962776 ZD |
197 | /* Test for possibility of invariantness of X. */ |
198 | ||
199 | static bool | |
200 | check_maybe_invariant (rtx x) | |
201 | { | |
202 | enum rtx_code code = GET_CODE (x); | |
203 | int i, j; | |
204 | const char *fmt; | |
205 | ||
206 | switch (code) | |
207 | { | |
d8116890 | 208 | CASE_CONST_ANY: |
5e962776 ZD |
209 | case SYMBOL_REF: |
210 | case CONST: | |
211 | case LABEL_REF: | |
212 | return true; | |
213 | ||
214 | case PC: | |
5e962776 ZD |
215 | case UNSPEC_VOLATILE: |
216 | case CALL: | |
217 | return false; | |
218 | ||
219 | case REG: | |
220 | return true; | |
221 | ||
222 | case MEM: | |
223 | /* Load/store motion is done elsewhere. ??? Perhaps also add it here? | |
224 | It should not be hard, and might be faster than "elsewhere". */ | |
225 | ||
226 | /* Just handle the most trivial case where we load from an unchanging | |
227 | location (most importantly, pic tables). */ | |
66f91b93 | 228 | if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x)) |
5e962776 ZD |
229 | break; |
230 | ||
231 | return false; | |
232 | ||
233 | case ASM_OPERANDS: | |
234 | /* Don't mess with insns declared volatile. */ | |
235 | if (MEM_VOLATILE_P (x)) | |
236 | return false; | |
237 | break; | |
238 | ||
239 | default: | |
240 | break; | |
241 | } | |
242 | ||
243 | fmt = GET_RTX_FORMAT (code); | |
244 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
245 | { | |
246 | if (fmt[i] == 'e') | |
247 | { | |
248 | if (!check_maybe_invariant (XEXP (x, i))) | |
249 | return false; | |
250 | } | |
251 | else if (fmt[i] == 'E') | |
252 | { | |
253 | for (j = 0; j < XVECLEN (x, i); j++) | |
254 | if (!check_maybe_invariant (XVECEXP (x, i, j))) | |
255 | return false; | |
256 | } | |
257 | } | |
258 | ||
259 | return true; | |
260 | } | |
261 | ||
1052bd54 ZD |
262 | /* Returns the invariant definition for USE, or NULL if USE is not |
263 | invariant. */ | |
264 | ||
265 | static struct invariant * | |
57512f53 | 266 | invariant_for_use (df_ref use) |
1052bd54 ZD |
267 | { |
268 | struct df_link *defs; | |
57512f53 | 269 | df_ref def; |
50e94c7e | 270 | basic_block bb = DF_REF_BB (use), def_bb; |
1052bd54 | 271 | |
57512f53 | 272 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
b6c9b9bc ZD |
273 | return NULL; |
274 | ||
1052bd54 ZD |
275 | defs = DF_REF_CHAIN (use); |
276 | if (!defs || defs->next) | |
277 | return NULL; | |
278 | def = defs->ref; | |
6fb5fa3c | 279 | check_invariant_table_size (); |
c3284718 | 280 | if (!invariant_table[DF_REF_ID (def)]) |
1052bd54 ZD |
281 | return NULL; |
282 | ||
283 | def_bb = DF_REF_BB (def); | |
284 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
285 | return NULL; | |
c3284718 | 286 | return invariant_table[DF_REF_ID (def)]; |
1052bd54 ZD |
287 | } |
288 | ||
289 | /* Computes hash value for invariant expression X in INSN. */ | |
290 | ||
291 | static hashval_t | |
89bfd6f5 | 292 | hash_invariant_expr_1 (rtx_insn *insn, rtx x) |
1052bd54 ZD |
293 | { |
294 | enum rtx_code code = GET_CODE (x); | |
295 | int i, j; | |
296 | const char *fmt; | |
297 | hashval_t val = code; | |
298 | int do_not_record_p; | |
57512f53 | 299 | df_ref use; |
1052bd54 ZD |
300 | struct invariant *inv; |
301 | ||
302 | switch (code) | |
303 | { | |
d8116890 | 304 | CASE_CONST_ANY: |
1052bd54 ZD |
305 | case SYMBOL_REF: |
306 | case CONST: | |
307 | case LABEL_REF: | |
308 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
309 | ||
310 | case REG: | |
6fb5fa3c | 311 | use = df_find_use (insn, x); |
1052bd54 ZD |
312 | if (!use) |
313 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
314 | inv = invariant_for_use (use); | |
315 | if (!inv) | |
316 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
317 | ||
318 | gcc_assert (inv->eqto != ~0u); | |
319 | return inv->eqto; | |
320 | ||
321 | default: | |
322 | break; | |
323 | } | |
324 | ||
325 | fmt = GET_RTX_FORMAT (code); | |
326 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
327 | { | |
328 | if (fmt[i] == 'e') | |
329 | val ^= hash_invariant_expr_1 (insn, XEXP (x, i)); | |
330 | else if (fmt[i] == 'E') | |
331 | { | |
332 | for (j = 0; j < XVECLEN (x, i); j++) | |
333 | val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j)); | |
334 | } | |
8e1409e8 ZD |
335 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
336 | val ^= XINT (x, i); | |
91914e56 RS |
337 | else if (fmt[i] == 'p') |
338 | val ^= constant_lower_bound (SUBREG_BYTE (x)); | |
1052bd54 ZD |
339 | } |
340 | ||
341 | return val; | |
342 | } | |
343 | ||
344 | /* Returns true if the invariant expressions E1 and E2 used in insns INSN1 | |
345 | and INSN2 have always the same value. */ | |
346 | ||
347 | static bool | |
89bfd6f5 | 348 | invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2) |
1052bd54 ZD |
349 | { |
350 | enum rtx_code code = GET_CODE (e1); | |
351 | int i, j; | |
352 | const char *fmt; | |
57512f53 | 353 | df_ref use1, use2; |
1052bd54 ZD |
354 | struct invariant *inv1 = NULL, *inv2 = NULL; |
355 | rtx sub1, sub2; | |
356 | ||
357 | /* If mode of only one of the operands is VOIDmode, it is not equivalent to | |
358 | the other one. If both are VOIDmode, we rely on the caller of this | |
359 | function to verify that their modes are the same. */ | |
360 | if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2)) | |
361 | return false; | |
362 | ||
363 | switch (code) | |
364 | { | |
d8116890 | 365 | CASE_CONST_ANY: |
1052bd54 ZD |
366 | case SYMBOL_REF: |
367 | case CONST: | |
368 | case LABEL_REF: | |
369 | return rtx_equal_p (e1, e2); | |
370 | ||
371 | case REG: | |
6fb5fa3c DB |
372 | use1 = df_find_use (insn1, e1); |
373 | use2 = df_find_use (insn2, e2); | |
1052bd54 ZD |
374 | if (use1) |
375 | inv1 = invariant_for_use (use1); | |
376 | if (use2) | |
377 | inv2 = invariant_for_use (use2); | |
378 | ||
379 | if (!inv1 && !inv2) | |
380 | return rtx_equal_p (e1, e2); | |
381 | ||
382 | if (!inv1 || !inv2) | |
383 | return false; | |
384 | ||
385 | gcc_assert (inv1->eqto != ~0u); | |
386 | gcc_assert (inv2->eqto != ~0u); | |
387 | return inv1->eqto == inv2->eqto; | |
388 | ||
389 | default: | |
390 | break; | |
391 | } | |
392 | ||
393 | fmt = GET_RTX_FORMAT (code); | |
394 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
395 | { | |
396 | if (fmt[i] == 'e') | |
397 | { | |
398 | sub1 = XEXP (e1, i); | |
399 | sub2 = XEXP (e2, i); | |
400 | ||
401 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
402 | return false; | |
403 | } | |
404 | ||
405 | else if (fmt[i] == 'E') | |
406 | { | |
407 | if (XVECLEN (e1, i) != XVECLEN (e2, i)) | |
408 | return false; | |
409 | ||
410 | for (j = 0; j < XVECLEN (e1, i); j++) | |
411 | { | |
412 | sub1 = XVECEXP (e1, i, j); | |
413 | sub2 = XVECEXP (e2, i, j); | |
414 | ||
415 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
416 | return false; | |
417 | } | |
418 | } | |
8e1409e8 ZD |
419 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
420 | { | |
421 | if (XINT (e1, i) != XINT (e2, i)) | |
422 | return false; | |
423 | } | |
91914e56 RS |
424 | else if (fmt[i] == 'p') |
425 | { | |
426 | if (maybe_ne (SUBREG_BYTE (e1), SUBREG_BYTE (e2))) | |
427 | return false; | |
428 | } | |
8e1409e8 ZD |
429 | /* Unhandled type of subexpression, we fail conservatively. */ |
430 | else | |
431 | return false; | |
1052bd54 ZD |
432 | } |
433 | ||
434 | return true; | |
435 | } | |
436 | ||
95fbe13e | 437 | struct invariant_expr_hasher : free_ptr_hash <invariant_expr_entry> |
1052bd54 | 438 | { |
67f58944 TS |
439 | static inline hashval_t hash (const invariant_expr_entry *); |
440 | static inline bool equal (const invariant_expr_entry *, | |
441 | const invariant_expr_entry *); | |
4a8fb1a1 LC |
442 | }; |
443 | ||
444 | /* Returns hash value for invariant expression entry ENTRY. */ | |
1052bd54 | 445 | |
4a8fb1a1 | 446 | inline hashval_t |
67f58944 | 447 | invariant_expr_hasher::hash (const invariant_expr_entry *entry) |
4a8fb1a1 | 448 | { |
1052bd54 ZD |
449 | return entry->hash; |
450 | } | |
451 | ||
4a8fb1a1 | 452 | /* Compares invariant expression entries ENTRY1 and ENTRY2. */ |
1052bd54 | 453 | |
4a8fb1a1 | 454 | inline bool |
67f58944 TS |
455 | invariant_expr_hasher::equal (const invariant_expr_entry *entry1, |
456 | const invariant_expr_entry *entry2) | |
1052bd54 | 457 | { |
1052bd54 ZD |
458 | if (entry1->mode != entry2->mode) |
459 | return 0; | |
460 | ||
461 | return invariant_expr_equal_p (entry1->inv->insn, entry1->expr, | |
462 | entry2->inv->insn, entry2->expr); | |
463 | } | |
464 | ||
c203e8a7 | 465 | typedef hash_table<invariant_expr_hasher> invariant_htab_type; |
4a8fb1a1 | 466 | |
1052bd54 ZD |
467 | /* Checks whether invariant with value EXPR in machine mode MODE is |
468 | recorded in EQ. If this is the case, return the invariant. Otherwise | |
469 | insert INV to the table for this expression and return INV. */ | |
470 | ||
471 | static struct invariant * | |
ef4bddc2 | 472 | find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode, |
1052bd54 ZD |
473 | struct invariant *inv) |
474 | { | |
475 | hashval_t hash = hash_invariant_expr_1 (inv->insn, expr); | |
476 | struct invariant_expr_entry *entry; | |
477 | struct invariant_expr_entry pentry; | |
4a8fb1a1 | 478 | invariant_expr_entry **slot; |
1052bd54 ZD |
479 | |
480 | pentry.expr = expr; | |
481 | pentry.inv = inv; | |
482 | pentry.mode = mode; | |
c203e8a7 | 483 | slot = eq->find_slot_with_hash (&pentry, hash, INSERT); |
4a8fb1a1 | 484 | entry = *slot; |
1052bd54 ZD |
485 | |
486 | if (entry) | |
487 | return entry->inv; | |
488 | ||
5ed6ace5 | 489 | entry = XNEW (struct invariant_expr_entry); |
1052bd54 ZD |
490 | entry->inv = inv; |
491 | entry->expr = expr; | |
492 | entry->mode = mode; | |
493 | entry->hash = hash; | |
494 | *slot = entry; | |
495 | ||
496 | return inv; | |
497 | } | |
498 | ||
499 | /* Finds invariants identical to INV and records the equivalence. EQ is the | |
500 | hash table of the invariants. */ | |
501 | ||
502 | static void | |
c203e8a7 | 503 | find_identical_invariants (invariant_htab_type *eq, struct invariant *inv) |
1052bd54 ZD |
504 | { |
505 | unsigned depno; | |
506 | bitmap_iterator bi; | |
507 | struct invariant *dep; | |
508 | rtx expr, set; | |
ef4bddc2 | 509 | machine_mode mode; |
e42e3d15 | 510 | struct invariant *tmp; |
1052bd54 ZD |
511 | |
512 | if (inv->eqto != ~0u) | |
513 | return; | |
514 | ||
515 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
516 | { | |
9771b263 | 517 | dep = invariants[depno]; |
1052bd54 ZD |
518 | find_identical_invariants (eq, dep); |
519 | } | |
520 | ||
521 | set = single_set (inv->insn); | |
522 | expr = SET_SRC (set); | |
523 | mode = GET_MODE (expr); | |
524 | if (mode == VOIDmode) | |
525 | mode = GET_MODE (SET_DEST (set)); | |
e42e3d15 ZC |
526 | |
527 | tmp = find_or_insert_inv (eq, expr, mode, inv); | |
528 | inv->eqto = tmp->invno; | |
529 | ||
530 | if (tmp->invno != inv->invno && inv->always_executed) | |
531 | tmp->eqno++; | |
1052bd54 ZD |
532 | |
533 | if (dump_file && inv->eqto != inv->invno) | |
534 | fprintf (dump_file, | |
e755fcf5 | 535 | "Invariant %d is equivalent to invariant %d.\n", |
1052bd54 ZD |
536 | inv->invno, inv->eqto); |
537 | } | |
538 | ||
539 | /* Find invariants with the same value and record the equivalences. */ | |
540 | ||
541 | static void | |
542 | merge_identical_invariants (void) | |
543 | { | |
544 | unsigned i; | |
545 | struct invariant *inv; | |
c203e8a7 | 546 | invariant_htab_type eq (invariants.length ()); |
1052bd54 | 547 | |
9771b263 | 548 | FOR_EACH_VEC_ELT (invariants, i, inv) |
c203e8a7 | 549 | find_identical_invariants (&eq, inv); |
1052bd54 ZD |
550 | } |
551 | ||
5e962776 ZD |
552 | /* Determines the basic blocks inside LOOP that are always executed and |
553 | stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of | |
554 | basic blocks that may either exit the loop, or contain the call that | |
555 | does not have to return. BODY is body of the loop obtained by | |
556 | get_loop_body_in_dom_order. */ | |
557 | ||
558 | static void | |
99b1c316 | 559 | compute_always_reached (class loop *loop, basic_block *body, |
5e962776 ZD |
560 | bitmap may_exit, bitmap always_reached) |
561 | { | |
562 | unsigned i; | |
563 | ||
564 | for (i = 0; i < loop->num_nodes; i++) | |
565 | { | |
566 | if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i])) | |
567 | bitmap_set_bit (always_reached, i); | |
568 | ||
569 | if (bitmap_bit_p (may_exit, i)) | |
570 | return; | |
571 | } | |
572 | } | |
573 | ||
574 | /* Finds exits out of the LOOP with body BODY. Marks blocks in that we may | |
575 | exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT | |
576 | additionally mark blocks that may exit due to a call. */ | |
577 | ||
578 | static void | |
99b1c316 | 579 | find_exits (class loop *loop, basic_block *body, |
5e962776 ZD |
580 | bitmap may_exit, bitmap has_exit) |
581 | { | |
582 | unsigned i; | |
628f6a4e | 583 | edge_iterator ei; |
5e962776 | 584 | edge e; |
99b1c316 | 585 | class loop *outermost_exit = loop, *aexit; |
5e962776 | 586 | bool has_call = false; |
89bfd6f5 | 587 | rtx_insn *insn; |
5e962776 ZD |
588 | |
589 | for (i = 0; i < loop->num_nodes; i++) | |
590 | { | |
591 | if (body[i]->loop_father == loop) | |
592 | { | |
593 | FOR_BB_INSNS (body[i], insn) | |
594 | { | |
4b4bf941 | 595 | if (CALL_P (insn) |
becfd6e5 KZ |
596 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
597 | || !RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
598 | { |
599 | has_call = true; | |
600 | bitmap_set_bit (may_exit, i); | |
601 | break; | |
602 | } | |
603 | } | |
604 | ||
628f6a4e | 605 | FOR_EACH_EDGE (e, ei, body[i]->succs) |
5e962776 | 606 | { |
964ef24c RB |
607 | if (! flow_bb_inside_loop_p (loop, e->dest)) |
608 | { | |
609 | bitmap_set_bit (may_exit, i); | |
610 | bitmap_set_bit (has_exit, i); | |
611 | outermost_exit = find_common_loop (outermost_exit, | |
612 | e->dest->loop_father); | |
613 | } | |
614 | /* If we enter a subloop that might never terminate treat | |
615 | it like a possible exit. */ | |
616 | if (flow_loop_nested_p (loop, e->dest->loop_father)) | |
617 | bitmap_set_bit (may_exit, i); | |
5e962776 ZD |
618 | } |
619 | continue; | |
620 | } | |
cb20f7e8 | 621 | |
5e962776 ZD |
622 | /* Use the data stored for the subloop to decide whether we may exit |
623 | through it. It is sufficient to do this for header of the loop, | |
624 | as other basic blocks inside it must be dominated by it. */ | |
625 | if (body[i]->loop_father->header != body[i]) | |
626 | continue; | |
627 | ||
628 | if (LOOP_DATA (body[i]->loop_father)->has_call) | |
629 | { | |
630 | has_call = true; | |
631 | bitmap_set_bit (may_exit, i); | |
632 | } | |
633 | aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit; | |
634 | if (aexit != loop) | |
635 | { | |
636 | bitmap_set_bit (may_exit, i); | |
637 | bitmap_set_bit (has_exit, i); | |
638 | ||
639 | if (flow_loop_nested_p (aexit, outermost_exit)) | |
640 | outermost_exit = aexit; | |
641 | } | |
642 | } | |
643 | ||
1833192f VM |
644 | if (loop->aux == NULL) |
645 | { | |
99b1c316 | 646 | loop->aux = xcalloc (1, sizeof (class loop_data)); |
1833192f VM |
647 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); |
648 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
649 | } | |
5e962776 ZD |
650 | LOOP_DATA (loop)->outermost_exit = outermost_exit; |
651 | LOOP_DATA (loop)->has_call = has_call; | |
652 | } | |
653 | ||
654 | /* Check whether we may assign a value to X from a register. */ | |
655 | ||
656 | static bool | |
657 | may_assign_reg_p (rtx x) | |
658 | { | |
bd361d85 | 659 | return (GET_MODE (x) != VOIDmode |
4b06592a | 660 | && GET_MODE (x) != BLKmode |
bd361d85 | 661 | && can_copy_p (GET_MODE (x)) |
7ee1f872 EB |
662 | /* Do not mess with the frame pointer adjustments that can |
663 | be generated e.g. by expand_builtin_setjmp_receiver. */ | |
664 | && x != frame_pointer_rtx | |
a7f4ccb1 SB |
665 | && (!REG_P (x) |
666 | || !HARD_REGISTER_P (x) | |
667 | || REGNO_REG_CLASS (REGNO (x)) != NO_REGS)); | |
5e962776 ZD |
668 | } |
669 | ||
cb20f7e8 ZD |
670 | /* Finds definitions that may correspond to invariants in LOOP with body |
671 | BODY. */ | |
5e962776 ZD |
672 | |
673 | static void | |
99b1c316 | 674 | find_defs (class loop *loop) |
5e962776 | 675 | { |
7b19209f SB |
676 | if (dump_file) |
677 | { | |
678 | fprintf (dump_file, | |
679 | "*****starting processing of loop %d ******\n", | |
680 | loop->num); | |
681 | } | |
682 | ||
6fb5fa3c | 683 | df_chain_add_problem (DF_UD_CHAIN); |
7b19209f | 684 | df_set_flags (DF_RD_PRUNE_DEAD_DEFS); |
7be64667 | 685 | df_analyze_loop (loop); |
7b19209f | 686 | check_invariant_table_size (); |
6fb5fa3c DB |
687 | |
688 | if (dump_file) | |
689 | { | |
ffd640ed | 690 | df_dump_region (dump_file); |
7b19209f SB |
691 | fprintf (dump_file, |
692 | "*****ending processing of loop %d ******\n", | |
693 | loop->num); | |
6fb5fa3c | 694 | } |
5e962776 ZD |
695 | } |
696 | ||
697 | /* Creates a new invariant for definition DEF in INSN, depending on invariants | |
698 | in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed, | |
1052bd54 ZD |
699 | unless the program ends due to a function call. The newly created invariant |
700 | is returned. */ | |
5e962776 | 701 | |
1052bd54 | 702 | static struct invariant * |
89bfd6f5 | 703 | create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on, |
5e962776 ZD |
704 | bool always_executed) |
705 | { | |
5ed6ace5 | 706 | struct invariant *inv = XNEW (struct invariant); |
5e962776 | 707 | rtx set = single_set (insn); |
f40751dd | 708 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); |
5e962776 ZD |
709 | |
710 | inv->def = def; | |
711 | inv->always_executed = always_executed; | |
712 | inv->depends_on = depends_on; | |
713 | ||
714 | /* If the set is simple, usually by moving it we move the whole store out of | |
715 | the loop. Otherwise we save only cost of the computation. */ | |
716 | if (def) | |
1bfdbb29 | 717 | { |
d51102f3 | 718 | inv->cost = set_rtx_cost (set, speed); |
1578e910 MM |
719 | /* ??? Try to determine cheapness of address computation. Unfortunately |
720 | the address cost is only a relative measure, we can't really compare | |
721 | it with any absolute number, but only with other address costs. | |
722 | But here we don't have any other addresses, so compare with a magic | |
723 | number anyway. It has to be large enough to not regress PR33928 | |
724 | (by avoiding to move reg+8,reg+16,reg+24 invariants), but small | |
725 | enough to not regress 410.bwaves either (by still moving reg+reg | |
726 | invariants). | |
727 | See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */ | |
315a349c DS |
728 | if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set)))) |
729 | inv->cheap_address = address_cost (SET_SRC (set), word_mode, | |
730 | ADDR_SPACE_GENERIC, speed) < 3; | |
731 | else | |
732 | inv->cheap_address = false; | |
1bfdbb29 | 733 | } |
5e962776 | 734 | else |
1bfdbb29 | 735 | { |
e548c9df AM |
736 | inv->cost = set_src_cost (SET_SRC (set), GET_MODE (SET_DEST (set)), |
737 | speed); | |
1bfdbb29 PB |
738 | inv->cheap_address = false; |
739 | } | |
5e962776 ZD |
740 | |
741 | inv->move = false; | |
1052bd54 | 742 | inv->reg = NULL_RTX; |
1833192f | 743 | inv->orig_regno = -1; |
5e962776 ZD |
744 | inv->stamp = 0; |
745 | inv->insn = insn; | |
746 | ||
9771b263 | 747 | inv->invno = invariants.length (); |
1052bd54 | 748 | inv->eqto = ~0u; |
e42e3d15 ZC |
749 | |
750 | /* Itself. */ | |
751 | inv->eqno = 1; | |
752 | ||
5e962776 ZD |
753 | if (def) |
754 | def->invno = inv->invno; | |
9771b263 | 755 | invariants.safe_push (inv); |
5e962776 ZD |
756 | |
757 | if (dump_file) | |
758 | { | |
759 | fprintf (dump_file, | |
760 | "Set in insn %d is invariant (%d), cost %d, depends on ", | |
761 | INSN_UID (insn), inv->invno, inv->cost); | |
762 | dump_bitmap (dump_file, inv->depends_on); | |
763 | } | |
1052bd54 ZD |
764 | |
765 | return inv; | |
5e962776 ZD |
766 | } |
767 | ||
192912db BC |
768 | /* Return a canonical version of X for the address, from the point of view, |
769 | that all multiplications are represented as MULT instead of the multiply | |
770 | by a power of 2 being represented as ASHIFT. | |
771 | ||
772 | Callers should prepare a copy of X because this function may modify it | |
773 | in place. */ | |
774 | ||
775 | static void | |
776 | canonicalize_address_mult (rtx x) | |
777 | { | |
778 | subrtx_var_iterator::array_type array; | |
779 | FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) | |
780 | { | |
781 | rtx sub = *iter; | |
7c61657f RS |
782 | scalar_int_mode sub_mode; |
783 | if (is_a <scalar_int_mode> (GET_MODE (sub), &sub_mode) | |
784 | && GET_CODE (sub) == ASHIFT | |
192912db | 785 | && CONST_INT_P (XEXP (sub, 1)) |
7c61657f | 786 | && INTVAL (XEXP (sub, 1)) < GET_MODE_BITSIZE (sub_mode) |
192912db BC |
787 | && INTVAL (XEXP (sub, 1)) >= 0) |
788 | { | |
789 | HOST_WIDE_INT shift = INTVAL (XEXP (sub, 1)); | |
790 | PUT_CODE (sub, MULT); | |
7c61657f | 791 | XEXP (sub, 1) = gen_int_mode (HOST_WIDE_INT_1 << shift, sub_mode); |
192912db BC |
792 | iter.skip_subrtxes (); |
793 | } | |
794 | } | |
795 | } | |
796 | ||
797 | /* Maximum number of sub expressions in address. We set it to | |
798 | a small integer since it's unlikely to have a complicated | |
799 | address expression. */ | |
800 | ||
801 | #define MAX_CANON_ADDR_PARTS (5) | |
802 | ||
803 | /* Collect sub expressions in address X with PLUS as the seperator. | |
804 | Sub expressions are stored in vector ADDR_PARTS. */ | |
805 | ||
806 | static void | |
807 | collect_address_parts (rtx x, vec<rtx> *addr_parts) | |
808 | { | |
809 | subrtx_var_iterator::array_type array; | |
810 | FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) | |
811 | { | |
812 | rtx sub = *iter; | |
813 | ||
814 | if (GET_CODE (sub) != PLUS) | |
815 | { | |
816 | addr_parts->safe_push (sub); | |
817 | iter.skip_subrtxes (); | |
818 | } | |
819 | } | |
820 | } | |
821 | ||
822 | /* Compare function for sorting sub expressions X and Y based on | |
823 | precedence defined for communitive operations. */ | |
824 | ||
825 | static int | |
826 | compare_address_parts (const void *x, const void *y) | |
827 | { | |
828 | const rtx *rx = (const rtx *)x; | |
829 | const rtx *ry = (const rtx *)y; | |
830 | int px = commutative_operand_precedence (*rx); | |
831 | int py = commutative_operand_precedence (*ry); | |
832 | ||
833 | return (py - px); | |
834 | } | |
835 | ||
836 | /* Return a canonical version address for X by following steps: | |
837 | 1) Rewrite ASHIFT into MULT recursively. | |
838 | 2) Divide address into sub expressions with PLUS as the | |
839 | separator. | |
840 | 3) Sort sub expressions according to precedence defined | |
841 | for communative operations. | |
842 | 4) Simplify CONST_INT_P sub expressions. | |
843 | 5) Create new canonicalized address and return. | |
844 | Callers should prepare a copy of X because this function may | |
845 | modify it in place. */ | |
846 | ||
847 | static rtx | |
848 | canonicalize_address (rtx x) | |
849 | { | |
850 | rtx res; | |
851 | unsigned int i, j; | |
852 | machine_mode mode = GET_MODE (x); | |
853 | auto_vec<rtx, MAX_CANON_ADDR_PARTS> addr_parts; | |
854 | ||
855 | /* Rewrite ASHIFT into MULT. */ | |
856 | canonicalize_address_mult (x); | |
857 | /* Divide address into sub expressions. */ | |
858 | collect_address_parts (x, &addr_parts); | |
859 | /* Unlikely to have very complicated address. */ | |
860 | if (addr_parts.length () < 2 | |
861 | || addr_parts.length () > MAX_CANON_ADDR_PARTS) | |
862 | return x; | |
863 | ||
864 | /* Sort sub expressions according to canonicalization precedence. */ | |
865 | addr_parts.qsort (compare_address_parts); | |
866 | ||
867 | /* Simplify all constant int summary if possible. */ | |
868 | for (i = 0; i < addr_parts.length (); i++) | |
869 | if (CONST_INT_P (addr_parts[i])) | |
870 | break; | |
871 | ||
872 | for (j = i + 1; j < addr_parts.length (); j++) | |
873 | { | |
874 | gcc_assert (CONST_INT_P (addr_parts[j])); | |
875 | addr_parts[i] = simplify_gen_binary (PLUS, mode, | |
876 | addr_parts[i], | |
877 | addr_parts[j]); | |
878 | } | |
879 | ||
880 | /* Chain PLUS operators to the left for !CONST_INT_P sub expressions. */ | |
881 | res = addr_parts[0]; | |
882 | for (j = 1; j < i; j++) | |
883 | res = simplify_gen_binary (PLUS, mode, res, addr_parts[j]); | |
884 | ||
885 | /* Pickup the last CONST_INT_P sub expression. */ | |
886 | if (i < addr_parts.length ()) | |
887 | res = simplify_gen_binary (PLUS, mode, res, addr_parts[i]); | |
888 | ||
889 | return res; | |
890 | } | |
891 | ||
5b92e189 BC |
892 | /* Given invariant DEF and its address USE, check if the corresponding |
893 | invariant expr can be propagated into the use or not. */ | |
894 | ||
895 | static bool | |
896 | inv_can_prop_to_addr_use (struct def *def, df_ref use) | |
897 | { | |
898 | struct invariant *inv; | |
192912db | 899 | rtx *pos = DF_REF_REAL_LOC (use), def_set, use_set; |
5b92e189 BC |
900 | rtx_insn *use_insn = DF_REF_INSN (use); |
901 | rtx_insn *def_insn; | |
902 | bool ok; | |
903 | ||
904 | inv = invariants[def->invno]; | |
905 | /* No need to check if address expression is expensive. */ | |
906 | if (!inv->cheap_address) | |
907 | return false; | |
908 | ||
909 | def_insn = inv->insn; | |
910 | def_set = single_set (def_insn); | |
911 | if (!def_set) | |
912 | return false; | |
913 | ||
914 | validate_unshare_change (use_insn, pos, SET_SRC (def_set), true); | |
915 | ok = verify_changes (0); | |
192912db BC |
916 | /* Try harder with canonicalization in address expression. */ |
917 | if (!ok && (use_set = single_set (use_insn)) != NULL_RTX) | |
918 | { | |
919 | rtx src, dest, mem = NULL_RTX; | |
920 | ||
921 | src = SET_SRC (use_set); | |
922 | dest = SET_DEST (use_set); | |
923 | if (MEM_P (src)) | |
924 | mem = src; | |
925 | else if (MEM_P (dest)) | |
926 | mem = dest; | |
927 | ||
928 | if (mem != NULL_RTX | |
929 | && !memory_address_addr_space_p (GET_MODE (mem), | |
930 | XEXP (mem, 0), | |
931 | MEM_ADDR_SPACE (mem))) | |
932 | { | |
933 | rtx addr = canonicalize_address (copy_rtx (XEXP (mem, 0))); | |
934 | if (memory_address_addr_space_p (GET_MODE (mem), | |
935 | addr, MEM_ADDR_SPACE (mem))) | |
936 | ok = true; | |
937 | } | |
938 | } | |
5b92e189 BC |
939 | cancel_changes (0); |
940 | return ok; | |
941 | } | |
942 | ||
5e962776 ZD |
943 | /* Record USE at DEF. */ |
944 | ||
945 | static void | |
1bfdbb29 | 946 | record_use (struct def *def, df_ref use) |
5e962776 | 947 | { |
5ed6ace5 | 948 | struct use *u = XNEW (struct use); |
5e962776 | 949 | |
1bfdbb29 PB |
950 | u->pos = DF_REF_REAL_LOC (use); |
951 | u->insn = DF_REF_INSN (use); | |
952 | u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD | |
3e807ffc | 953 | || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE); |
5e962776 ZD |
954 | u->next = def->uses; |
955 | def->uses = u; | |
956 | def->n_uses++; | |
1bfdbb29 | 957 | if (u->addr_use_p) |
5b92e189 BC |
958 | { |
959 | /* Initialize propagation information if this is the first addr | |
960 | use of the inv def. */ | |
961 | if (def->n_addr_uses == 0) | |
962 | def->can_prop_to_addr_uses = true; | |
963 | ||
964 | def->n_addr_uses++; | |
965 | if (def->can_prop_to_addr_uses && !inv_can_prop_to_addr_use (def, use)) | |
966 | def->can_prop_to_addr_uses = false; | |
967 | } | |
5e962776 ZD |
968 | } |
969 | ||
6fb5fa3c DB |
970 | /* Finds the invariants USE depends on and store them to the DEPENDS_ON |
971 | bitmap. Returns true if all dependencies of USE are known to be | |
b6c9b9bc | 972 | loop invariants, false otherwise. */ |
5e962776 ZD |
973 | |
974 | static bool | |
57512f53 | 975 | check_dependency (basic_block bb, df_ref use, bitmap depends_on) |
5e962776 | 976 | { |
57512f53 | 977 | df_ref def; |
6fb5fa3c | 978 | basic_block def_bb; |
4d779342 | 979 | struct df_link *defs; |
5e962776 | 980 | struct def *def_data; |
1052bd54 | 981 | struct invariant *inv; |
b8698a0f | 982 | |
57512f53 | 983 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
6fb5fa3c | 984 | return false; |
b8698a0f | 985 | |
6fb5fa3c DB |
986 | defs = DF_REF_CHAIN (use); |
987 | if (!defs) | |
1a17bd35 EB |
988 | { |
989 | unsigned int regno = DF_REF_REGNO (use); | |
990 | ||
991 | /* If this is the use of an uninitialized argument register that is | |
992 | likely to be spilled, do not move it lest this might extend its | |
993 | lifetime and cause reload to die. This can occur for a call to | |
994 | a function taking complex number arguments and moving the insns | |
995 | preparing the arguments without moving the call itself wouldn't | |
996 | gain much in practice. */ | |
997 | if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE) | |
998 | && FUNCTION_ARG_REGNO_P (regno) | |
999 | && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) | |
1000 | return false; | |
1001 | ||
1002 | return true; | |
1003 | } | |
b8698a0f | 1004 | |
6fb5fa3c DB |
1005 | if (defs->next) |
1006 | return false; | |
b8698a0f | 1007 | |
6fb5fa3c DB |
1008 | def = defs->ref; |
1009 | check_invariant_table_size (); | |
c3284718 | 1010 | inv = invariant_table[DF_REF_ID (def)]; |
6fb5fa3c DB |
1011 | if (!inv) |
1012 | return false; | |
b8698a0f | 1013 | |
6fb5fa3c DB |
1014 | def_data = inv->def; |
1015 | gcc_assert (def_data != NULL); | |
b8698a0f | 1016 | |
6fb5fa3c DB |
1017 | def_bb = DF_REF_BB (def); |
1018 | /* Note that in case bb == def_bb, we know that the definition | |
1019 | dominates insn, because def has invariant_table[DF_REF_ID(def)] | |
1020 | defined and we process the insns in the basic block bb | |
1021 | sequentially. */ | |
1022 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
1023 | return false; | |
b8698a0f | 1024 | |
6fb5fa3c DB |
1025 | bitmap_set_bit (depends_on, def_data->invno); |
1026 | return true; | |
1027 | } | |
1052bd54 | 1028 | |
1052bd54 | 1029 | |
6fb5fa3c DB |
1030 | /* Finds the invariants INSN depends on and store them to the DEPENDS_ON |
1031 | bitmap. Returns true if all dependencies of INSN are known to be | |
1032 | loop invariants, false otherwise. */ | |
5e962776 | 1033 | |
6fb5fa3c | 1034 | static bool |
89bfd6f5 | 1035 | check_dependencies (rtx_insn *insn, bitmap depends_on) |
6fb5fa3c | 1036 | { |
50e94c7e | 1037 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 1038 | df_ref use; |
6fb5fa3c | 1039 | basic_block bb = BLOCK_FOR_INSN (insn); |
5e962776 | 1040 | |
bfac633a RS |
1041 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
1042 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 1043 | return false; |
bfac633a RS |
1044 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
1045 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 1046 | return false; |
b8698a0f | 1047 | |
5e962776 ZD |
1048 | return true; |
1049 | } | |
1050 | ||
67914693 | 1051 | /* Pre-check candidate DEST to skip the one which cannot make a valid insn |
2c97f472 ZC |
1052 | during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */ |
1053 | static bool | |
1054 | pre_check_invariant_p (bool simple, rtx dest) | |
1055 | { | |
1056 | if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1) | |
1057 | { | |
1058 | df_ref use; | |
2c97f472 ZC |
1059 | unsigned int i = REGNO (dest); |
1060 | struct df_insn_info *insn_info; | |
1061 | df_ref def_rec; | |
1062 | ||
1063 | for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use)) | |
1064 | { | |
e67d1102 | 1065 | rtx_insn *ref = DF_REF_INSN (use); |
2c97f472 ZC |
1066 | insn_info = DF_INSN_INFO_GET (ref); |
1067 | ||
1068 | FOR_EACH_INSN_INFO_DEF (def_rec, insn_info) | |
1069 | if (DF_REF_REGNO (def_rec) == i) | |
1070 | { | |
1071 | /* Multi definitions at this stage, most likely are due to | |
1072 | instruction constraints, which requires both read and write | |
1073 | on the same register. Since move_invariant_reg is not | |
1074 | powerful enough to handle such cases, just ignore the INV | |
1075 | and leave the chance to others. */ | |
1076 | return false; | |
1077 | } | |
1078 | } | |
1079 | } | |
1080 | return true; | |
1081 | } | |
1082 | ||
5e962776 ZD |
1083 | /* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always |
1084 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 1085 | unless the program ends due to a function call. */ |
5e962776 ZD |
1086 | |
1087 | static void | |
89bfd6f5 | 1088 | find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 1089 | { |
57512f53 | 1090 | df_ref ref; |
5e962776 ZD |
1091 | struct def *def; |
1092 | bitmap depends_on; | |
1093 | rtx set, dest; | |
1094 | bool simple = true; | |
1052bd54 | 1095 | struct invariant *inv; |
5e962776 | 1096 | |
404d0ca7 JJ |
1097 | /* Jumps have control flow side-effects. */ |
1098 | if (JUMP_P (insn)) | |
1099 | return; | |
1100 | ||
5e962776 ZD |
1101 | set = single_set (insn); |
1102 | if (!set) | |
1103 | return; | |
1104 | dest = SET_DEST (set); | |
1105 | ||
2ca202e7 | 1106 | if (!REG_P (dest) |
5e962776 ZD |
1107 | || HARD_REGISTER_P (dest)) |
1108 | simple = false; | |
1109 | ||
2c97f472 ZC |
1110 | if (!may_assign_reg_p (dest) |
1111 | || !pre_check_invariant_p (simple, dest) | |
a7f4ccb1 | 1112 | || !check_maybe_invariant (SET_SRC (set))) |
5e962776 ZD |
1113 | return; |
1114 | ||
28749cfb ZD |
1115 | /* If the insn can throw exception, we cannot move it at all without changing |
1116 | cfg. */ | |
1117 | if (can_throw_internal (insn)) | |
1118 | return; | |
5e962776 | 1119 | |
28749cfb | 1120 | /* We cannot make trapping insn executed, unless it was executed before. */ |
48e8382e | 1121 | if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached) |
28749cfb | 1122 | return; |
5e962776 | 1123 | |
8bdbfff5 | 1124 | depends_on = BITMAP_ALLOC (NULL); |
cb20f7e8 | 1125 | if (!check_dependencies (insn, depends_on)) |
5e962776 | 1126 | { |
8bdbfff5 | 1127 | BITMAP_FREE (depends_on); |
5e962776 ZD |
1128 | return; |
1129 | } | |
1130 | ||
1131 | if (simple) | |
5ed6ace5 | 1132 | def = XCNEW (struct def); |
5e962776 ZD |
1133 | else |
1134 | def = NULL; | |
1135 | ||
1052bd54 ZD |
1136 | inv = create_new_invariant (def, insn, depends_on, always_executed); |
1137 | ||
1138 | if (simple) | |
1139 | { | |
6fb5fa3c DB |
1140 | ref = df_find_def (insn, dest); |
1141 | check_invariant_table_size (); | |
c3284718 | 1142 | invariant_table[DF_REF_ID (ref)] = inv; |
1052bd54 | 1143 | } |
5e962776 ZD |
1144 | } |
1145 | ||
cb20f7e8 | 1146 | /* Record registers used in INSN that have a unique invariant definition. */ |
5e962776 ZD |
1147 | |
1148 | static void | |
89bfd6f5 | 1149 | record_uses (rtx_insn *insn) |
5e962776 | 1150 | { |
50e94c7e | 1151 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 1152 | df_ref use; |
1052bd54 ZD |
1153 | struct invariant *inv; |
1154 | ||
bfac633a | 1155 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
6fb5fa3c | 1156 | { |
6fb5fa3c DB |
1157 | inv = invariant_for_use (use); |
1158 | if (inv) | |
1bfdbb29 | 1159 | record_use (inv->def, use); |
6fb5fa3c | 1160 | } |
bfac633a | 1161 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
5e962776 | 1162 | { |
1052bd54 ZD |
1163 | inv = invariant_for_use (use); |
1164 | if (inv) | |
1bfdbb29 | 1165 | record_use (inv->def, use); |
5e962776 ZD |
1166 | } |
1167 | } | |
1168 | ||
1169 | /* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always | |
1170 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 1171 | unless the program ends due to a function call. */ |
5e962776 ZD |
1172 | |
1173 | static void | |
89bfd6f5 | 1174 | find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 1175 | { |
cb20f7e8 ZD |
1176 | find_invariant_insn (insn, always_reached, always_executed); |
1177 | record_uses (insn); | |
5e962776 ZD |
1178 | } |
1179 | ||
1180 | /* Finds invariants in basic block BB. ALWAYS_REACHED is true if the | |
1181 | basic block is always executed. ALWAYS_EXECUTED is true if the basic | |
1182 | block is always executed, unless the program ends due to a function | |
cb20f7e8 | 1183 | call. */ |
5e962776 ZD |
1184 | |
1185 | static void | |
cb20f7e8 | 1186 | find_invariants_bb (basic_block bb, bool always_reached, bool always_executed) |
5e962776 | 1187 | { |
89bfd6f5 | 1188 | rtx_insn *insn; |
5e962776 ZD |
1189 | |
1190 | FOR_BB_INSNS (bb, insn) | |
1191 | { | |
b5b8b0ac | 1192 | if (!NONDEBUG_INSN_P (insn)) |
5e962776 ZD |
1193 | continue; |
1194 | ||
cb20f7e8 | 1195 | find_invariants_insn (insn, always_reached, always_executed); |
5e962776 ZD |
1196 | |
1197 | if (always_reached | |
4b4bf941 | 1198 | && CALL_P (insn) |
becfd6e5 KZ |
1199 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
1200 | || ! RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
1201 | always_reached = false; |
1202 | } | |
1203 | } | |
1204 | ||
1205 | /* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of | |
1206 | basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the | |
1207 | bitmap of basic blocks in BODY that are always executed unless the program | |
cb20f7e8 | 1208 | ends due to a function call. */ |
5e962776 ZD |
1209 | |
1210 | static void | |
99b1c316 | 1211 | find_invariants_body (class loop *loop, basic_block *body, |
cb20f7e8 | 1212 | bitmap always_reached, bitmap always_executed) |
5e962776 ZD |
1213 | { |
1214 | unsigned i; | |
1215 | ||
1216 | for (i = 0; i < loop->num_nodes; i++) | |
1217 | find_invariants_bb (body[i], | |
1218 | bitmap_bit_p (always_reached, i), | |
cb20f7e8 | 1219 | bitmap_bit_p (always_executed, i)); |
5e962776 ZD |
1220 | } |
1221 | ||
cb20f7e8 | 1222 | /* Finds invariants in LOOP. */ |
5e962776 ZD |
1223 | |
1224 | static void | |
99b1c316 | 1225 | find_invariants (class loop *loop) |
5e962776 | 1226 | { |
0e3de1d4 TS |
1227 | auto_bitmap may_exit; |
1228 | auto_bitmap always_reached; | |
1229 | auto_bitmap has_exit; | |
1230 | auto_bitmap always_executed; | |
5e962776 ZD |
1231 | basic_block *body = get_loop_body_in_dom_order (loop); |
1232 | ||
1233 | find_exits (loop, body, may_exit, has_exit); | |
1234 | compute_always_reached (loop, body, may_exit, always_reached); | |
1235 | compute_always_reached (loop, body, has_exit, always_executed); | |
1236 | ||
7be64667 | 1237 | find_defs (loop); |
cb20f7e8 | 1238 | find_invariants_body (loop, body, always_reached, always_executed); |
1052bd54 | 1239 | merge_identical_invariants (); |
5e962776 | 1240 | |
5e962776 ZD |
1241 | free (body); |
1242 | } | |
1243 | ||
1244 | /* Frees a list of uses USE. */ | |
1245 | ||
1246 | static void | |
1247 | free_use_list (struct use *use) | |
1248 | { | |
1249 | struct use *next; | |
1250 | ||
1251 | for (; use; use = next) | |
1252 | { | |
1253 | next = use->next; | |
1254 | free (use); | |
1255 | } | |
1256 | } | |
1257 | ||
1756cb66 | 1258 | /* Return pressure class and number of hard registers (through *NREGS) |
1833192f VM |
1259 | for destination of INSN. */ |
1260 | static enum reg_class | |
89bfd6f5 | 1261 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1833192f VM |
1262 | { |
1263 | rtx reg; | |
1756cb66 | 1264 | enum reg_class pressure_class; |
1833192f | 1265 | rtx set = single_set (insn); |
b8698a0f | 1266 | |
1833192f VM |
1267 | /* Considered invariant insns have only one set. */ |
1268 | gcc_assert (set != NULL_RTX); | |
1269 | reg = SET_DEST (set); | |
1270 | if (GET_CODE (reg) == SUBREG) | |
1271 | reg = SUBREG_REG (reg); | |
1272 | if (MEM_P (reg)) | |
1273 | { | |
1274 | *nregs = 0; | |
1756cb66 | 1275 | pressure_class = NO_REGS; |
1833192f VM |
1276 | } |
1277 | else | |
1278 | { | |
1279 | if (! REG_P (reg)) | |
1280 | reg = NULL_RTX; | |
1281 | if (reg == NULL_RTX) | |
1756cb66 | 1282 | pressure_class = GENERAL_REGS; |
1833192f | 1283 | else |
1756cb66 VM |
1284 | { |
1285 | pressure_class = reg_allocno_class (REGNO (reg)); | |
1286 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1287 | } | |
1288 | *nregs | |
1289 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
1833192f | 1290 | } |
1756cb66 | 1291 | return pressure_class; |
1833192f VM |
1292 | } |
1293 | ||
5e962776 | 1294 | /* Calculates cost and number of registers needed for moving invariant INV |
51a69168 ZC |
1295 | out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be |
1296 | the REG_CLASS of INV. Return | |
1297 | -1: if INV is invalid. | |
1298 | 0: if INV and its depends_on have same reg_class | |
1299 | 1: if INV and its depends_on have different reg_classes. */ | |
5e962776 | 1300 | |
51a69168 ZC |
1301 | static int |
1302 | get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed, | |
1303 | enum reg_class *cl) | |
5e962776 | 1304 | { |
1833192f VM |
1305 | int i, acomp_cost; |
1306 | unsigned aregs_needed[N_REG_CLASSES]; | |
5e962776 ZD |
1307 | unsigned depno; |
1308 | struct invariant *dep; | |
87c476a2 | 1309 | bitmap_iterator bi; |
51a69168 | 1310 | int ret = 1; |
5e962776 | 1311 | |
1052bd54 | 1312 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1313 | inv = invariants[inv->eqto]; |
1052bd54 | 1314 | |
5e962776 | 1315 | *comp_cost = 0; |
1833192f VM |
1316 | if (! flag_ira_loop_pressure) |
1317 | regs_needed[0] = 0; | |
1318 | else | |
1319 | { | |
1756cb66 VM |
1320 | for (i = 0; i < ira_pressure_classes_num; i++) |
1321 | regs_needed[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1322 | } |
1323 | ||
5e962776 ZD |
1324 | if (inv->move |
1325 | || inv->stamp == actual_stamp) | |
51a69168 | 1326 | return -1; |
5e962776 ZD |
1327 | inv->stamp = actual_stamp; |
1328 | ||
1833192f VM |
1329 | if (! flag_ira_loop_pressure) |
1330 | regs_needed[0]++; | |
1331 | else | |
1332 | { | |
1333 | int nregs; | |
1756cb66 | 1334 | enum reg_class pressure_class; |
1833192f | 1335 | |
1756cb66 VM |
1336 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1337 | regs_needed[pressure_class] += nregs; | |
51a69168 ZC |
1338 | *cl = pressure_class; |
1339 | ret = 0; | |
1833192f VM |
1340 | } |
1341 | ||
1bfdbb29 | 1342 | if (!inv->cheap_address |
315a349c | 1343 | || inv->def->n_uses == 0 |
5b92e189 BC |
1344 | || inv->def->n_addr_uses < inv->def->n_uses |
1345 | /* Count cost if the inv can't be propagated into address uses. */ | |
1346 | || !inv->def->can_prop_to_addr_uses) | |
e42e3d15 | 1347 | (*comp_cost) += inv->cost * inv->eqno; |
5e962776 | 1348 | |
3d8504ac RS |
1349 | #ifdef STACK_REGS |
1350 | { | |
1351 | /* Hoisting constant pool constants into stack regs may cost more than | |
1352 | just single register. On x87, the balance is affected both by the | |
c0220ea4 | 1353 | small number of FP registers, and by its register stack organization, |
3d8504ac RS |
1354 | that forces us to add compensation code in and around the loop to |
1355 | shuffle the operands to the top of stack before use, and pop them | |
1356 | from the stack after the loop finishes. | |
1357 | ||
1358 | To model this effect, we increase the number of registers needed for | |
1359 | stack registers by two: one register push, and one register pop. | |
1360 | This usually has the effect that FP constant loads from the constant | |
1361 | pool are not moved out of the loop. | |
1362 | ||
67914693 | 1363 | Note that this also means that dependent invariants cannot be moved. |
3d8504ac RS |
1364 | However, the primary purpose of this pass is to move loop invariant |
1365 | address arithmetic out of loops, and address arithmetic that depends | |
1366 | on floating point constants is unlikely to ever occur. */ | |
1367 | rtx set = single_set (inv->insn); | |
1368 | if (set | |
1833192f VM |
1369 | && IS_STACK_MODE (GET_MODE (SET_SRC (set))) |
1370 | && constant_pool_constant_p (SET_SRC (set))) | |
1371 | { | |
1372 | if (flag_ira_loop_pressure) | |
1756cb66 | 1373 | regs_needed[ira_stack_reg_pressure_class] += 2; |
1833192f VM |
1374 | else |
1375 | regs_needed[0] += 2; | |
1376 | } | |
3d8504ac RS |
1377 | } |
1378 | #endif | |
1379 | ||
87c476a2 | 1380 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) |
5e962776 | 1381 | { |
1833192f | 1382 | bool check_p; |
51a69168 ZC |
1383 | enum reg_class dep_cl = ALL_REGS; |
1384 | int dep_ret; | |
1833192f | 1385 | |
9771b263 | 1386 | dep = invariants[depno]; |
5e962776 | 1387 | |
61fc05c7 ZC |
1388 | /* If DEP is moved out of the loop, it is not a depends_on any more. */ |
1389 | if (dep->move) | |
1390 | continue; | |
1391 | ||
51a69168 | 1392 | dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl); |
5e962776 | 1393 | |
1833192f VM |
1394 | if (! flag_ira_loop_pressure) |
1395 | check_p = aregs_needed[0] != 0; | |
1396 | else | |
1397 | { | |
1756cb66 VM |
1398 | for (i = 0; i < ira_pressure_classes_num; i++) |
1399 | if (aregs_needed[ira_pressure_classes[i]] != 0) | |
1833192f | 1400 | break; |
1756cb66 | 1401 | check_p = i < ira_pressure_classes_num; |
51a69168 ZC |
1402 | |
1403 | if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl))) | |
1404 | { | |
1405 | *cl = ALL_REGS; | |
1406 | ret = 1; | |
1407 | } | |
1833192f VM |
1408 | } |
1409 | if (check_p | |
5e962776 ZD |
1410 | /* We need to check always_executed, since if the original value of |
1411 | the invariant may be preserved, we may need to keep it in a | |
1412 | separate register. TODO check whether the register has an | |
1413 | use outside of the loop. */ | |
1414 | && dep->always_executed | |
1415 | && !dep->def->uses->next) | |
1416 | { | |
1417 | /* If this is a single use, after moving the dependency we will not | |
1418 | need a new register. */ | |
1833192f VM |
1419 | if (! flag_ira_loop_pressure) |
1420 | aregs_needed[0]--; | |
1421 | else | |
1422 | { | |
1423 | int nregs; | |
1756cb66 | 1424 | enum reg_class pressure_class; |
1833192f | 1425 | |
1756cb66 VM |
1426 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1427 | aregs_needed[pressure_class] -= nregs; | |
1833192f | 1428 | } |
5e962776 ZD |
1429 | } |
1430 | ||
1833192f VM |
1431 | if (! flag_ira_loop_pressure) |
1432 | regs_needed[0] += aregs_needed[0]; | |
1433 | else | |
1434 | { | |
1756cb66 VM |
1435 | for (i = 0; i < ira_pressure_classes_num; i++) |
1436 | regs_needed[ira_pressure_classes[i]] | |
1437 | += aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1438 | } |
5e962776 | 1439 | (*comp_cost) += acomp_cost; |
87c476a2 | 1440 | } |
51a69168 | 1441 | return ret; |
5e962776 ZD |
1442 | } |
1443 | ||
1444 | /* Calculates gain for eliminating invariant INV. REGS_USED is the number | |
a154b43a ZD |
1445 | of registers used in the loop, NEW_REGS is the number of new variables |
1446 | already added due to the invariant motion. The number of registers needed | |
bec922f0 SL |
1447 | for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed |
1448 | through to estimate_reg_pressure_cost. */ | |
5e962776 ZD |
1449 | |
1450 | static int | |
1451 | gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | |
bec922f0 SL |
1452 | unsigned *new_regs, unsigned regs_used, |
1453 | bool speed, bool call_p) | |
5e962776 ZD |
1454 | { |
1455 | int comp_cost, size_cost; | |
e54bd4ab JJ |
1456 | /* Workaround -Wmaybe-uninitialized false positive during |
1457 | profiledbootstrap by initializing it. */ | |
1458 | enum reg_class cl = NO_REGS; | |
51a69168 | 1459 | int ret; |
5e962776 | 1460 | |
5e962776 ZD |
1461 | actual_stamp++; |
1462 | ||
51a69168 | 1463 | ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl); |
1833192f VM |
1464 | |
1465 | if (! flag_ira_loop_pressure) | |
1466 | { | |
1467 | size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], | |
bec922f0 | 1468 | regs_used, speed, call_p) |
1833192f | 1469 | - estimate_reg_pressure_cost (new_regs[0], |
bec922f0 | 1470 | regs_used, speed, call_p)); |
1833192f | 1471 | } |
51a69168 ZC |
1472 | else if (ret < 0) |
1473 | return -1; | |
1474 | else if ((ret == 0) && (cl == NO_REGS)) | |
1475 | /* Hoist it anyway since it does not impact register pressure. */ | |
1476 | return 1; | |
1833192f VM |
1477 | else |
1478 | { | |
1479 | int i; | |
1756cb66 | 1480 | enum reg_class pressure_class; |
1833192f | 1481 | |
1756cb66 | 1482 | for (i = 0; i < ira_pressure_classes_num; i++) |
1833192f | 1483 | { |
1756cb66 | 1484 | pressure_class = ira_pressure_classes[i]; |
51a69168 ZC |
1485 | |
1486 | if (!reg_classes_intersect_p (pressure_class, cl)) | |
1487 | continue; | |
1488 | ||
1756cb66 VM |
1489 | if ((int) new_regs[pressure_class] |
1490 | + (int) regs_needed[pressure_class] | |
1491 | + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
028d4092 | 1492 | + param_ira_loop_reserved_regs |
f508f827 | 1493 | > ira_class_hard_regs_num[pressure_class]) |
1833192f VM |
1494 | break; |
1495 | } | |
1756cb66 | 1496 | if (i < ira_pressure_classes_num) |
1833192f VM |
1497 | /* There will be register pressure excess and we want not to |
1498 | make this loop invariant motion. All loop invariants with | |
1499 | non-positive gains will be rejected in function | |
1500 | find_invariants_to_move. Therefore we return the negative | |
1501 | number here. | |
1502 | ||
1503 | One could think that this rejects also expensive loop | |
1504 | invariant motions and this will hurt code performance. | |
1505 | However numerous experiments with different heuristics | |
1506 | taking invariant cost into account did not confirm this | |
1507 | assumption. There are possible explanations for this | |
1508 | result: | |
1509 | o probably all expensive invariants were already moved out | |
1510 | of the loop by PRE and gimple invariant motion pass. | |
1511 | o expensive invariant execution will be hidden by insn | |
1512 | scheduling or OOO processor hardware because usually such | |
1513 | invariants have a lot of freedom to be executed | |
1514 | out-of-order. | |
1515 | Another reason for ignoring invariant cost vs spilling cost | |
1516 | heuristics is also in difficulties to evaluate accurately | |
1517 | spill cost at this stage. */ | |
1518 | return -1; | |
1519 | else | |
1520 | size_cost = 0; | |
1521 | } | |
5e962776 ZD |
1522 | |
1523 | return comp_cost - size_cost; | |
1524 | } | |
1525 | ||
1526 | /* Finds invariant with best gain for moving. Returns the gain, stores | |
1527 | the invariant in *BEST and number of registers needed for it to | |
a154b43a ZD |
1528 | *REGS_NEEDED. REGS_USED is the number of registers used in the loop. |
1529 | NEW_REGS is the number of new variables already added due to invariant | |
1530 | motion. */ | |
5e962776 ZD |
1531 | |
1532 | static int | |
1533 | best_gain_for_invariant (struct invariant **best, unsigned *regs_needed, | |
bec922f0 SL |
1534 | unsigned *new_regs, unsigned regs_used, |
1535 | bool speed, bool call_p) | |
5e962776 ZD |
1536 | { |
1537 | struct invariant *inv; | |
1833192f VM |
1538 | int i, gain = 0, again; |
1539 | unsigned aregs_needed[N_REG_CLASSES], invno; | |
5e962776 | 1540 | |
9771b263 | 1541 | FOR_EACH_VEC_ELT (invariants, invno, inv) |
5e962776 | 1542 | { |
5e962776 ZD |
1543 | if (inv->move) |
1544 | continue; | |
1545 | ||
1052bd54 ZD |
1546 | /* Only consider the "representatives" of equivalent invariants. */ |
1547 | if (inv->eqto != inv->invno) | |
1548 | continue; | |
1549 | ||
1833192f | 1550 | again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used, |
bec922f0 | 1551 | speed, call_p); |
5e962776 ZD |
1552 | if (again > gain) |
1553 | { | |
1554 | gain = again; | |
1555 | *best = inv; | |
1833192f VM |
1556 | if (! flag_ira_loop_pressure) |
1557 | regs_needed[0] = aregs_needed[0]; | |
1558 | else | |
1559 | { | |
1756cb66 VM |
1560 | for (i = 0; i < ira_pressure_classes_num; i++) |
1561 | regs_needed[ira_pressure_classes[i]] | |
1562 | = aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1563 | } |
5e962776 ZD |
1564 | } |
1565 | } | |
1566 | ||
1567 | return gain; | |
1568 | } | |
1569 | ||
1570 | /* Marks invariant INVNO and all its dependencies for moving. */ | |
1571 | ||
1572 | static void | |
1833192f | 1573 | set_move_mark (unsigned invno, int gain) |
5e962776 | 1574 | { |
9771b263 | 1575 | struct invariant *inv = invariants[invno]; |
87c476a2 | 1576 | bitmap_iterator bi; |
5e962776 | 1577 | |
1052bd54 | 1578 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1579 | inv = invariants[inv->eqto]; |
1052bd54 | 1580 | |
5e962776 ZD |
1581 | if (inv->move) |
1582 | return; | |
1583 | inv->move = true; | |
1584 | ||
1585 | if (dump_file) | |
1833192f VM |
1586 | { |
1587 | if (gain >= 0) | |
1588 | fprintf (dump_file, "Decided to move invariant %d -- gain %d\n", | |
1589 | invno, gain); | |
1590 | else | |
1591 | fprintf (dump_file, "Decided to move dependent invariant %d\n", | |
1592 | invno); | |
1593 | }; | |
5e962776 | 1594 | |
87c476a2 ZD |
1595 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi) |
1596 | { | |
1833192f | 1597 | set_move_mark (invno, -1); |
87c476a2 | 1598 | } |
5e962776 ZD |
1599 | } |
1600 | ||
cb20f7e8 | 1601 | /* Determines which invariants to move. */ |
5e962776 ZD |
1602 | |
1603 | static void | |
bec922f0 | 1604 | find_invariants_to_move (bool speed, bool call_p) |
5e962776 | 1605 | { |
1833192f VM |
1606 | int gain; |
1607 | unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; | |
5e962776 ZD |
1608 | struct invariant *inv = NULL; |
1609 | ||
9771b263 | 1610 | if (!invariants.length ()) |
5e962776 ZD |
1611 | return; |
1612 | ||
1833192f | 1613 | if (flag_ira_loop_pressure) |
b8698a0f | 1614 | /* REGS_USED is actually never used when the flag is on. */ |
1833192f VM |
1615 | regs_used = 0; |
1616 | else | |
1617 | /* We do not really do a good job in estimating number of | |
1618 | registers used; we put some initial bound here to stand for | |
1619 | induction variables etc. that we do not detect. */ | |
5e962776 | 1620 | { |
1833192f VM |
1621 | unsigned int n_regs = DF_REG_SIZE (df); |
1622 | ||
1623 | regs_used = 2; | |
b8698a0f | 1624 | |
1833192f | 1625 | for (i = 0; i < n_regs; i++) |
5e962776 | 1626 | { |
1833192f VM |
1627 | if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) |
1628 | { | |
1629 | /* This is a value that is used but not changed inside loop. */ | |
1630 | regs_used++; | |
1631 | } | |
5e962776 ZD |
1632 | } |
1633 | } | |
1634 | ||
1833192f VM |
1635 | if (! flag_ira_loop_pressure) |
1636 | new_regs[0] = regs_needed[0] = 0; | |
1637 | else | |
5e962776 | 1638 | { |
1756cb66 VM |
1639 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1640 | new_regs[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1641 | } |
1642 | while ((gain = best_gain_for_invariant (&inv, regs_needed, | |
bec922f0 SL |
1643 | new_regs, regs_used, |
1644 | speed, call_p)) > 0) | |
1833192f VM |
1645 | { |
1646 | set_move_mark (inv->invno, gain); | |
1647 | if (! flag_ira_loop_pressure) | |
1648 | new_regs[0] += regs_needed[0]; | |
1649 | else | |
1650 | { | |
1756cb66 VM |
1651 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1652 | new_regs[ira_pressure_classes[i]] | |
1653 | += regs_needed[ira_pressure_classes[i]]; | |
1833192f | 1654 | } |
5e962776 ZD |
1655 | } |
1656 | } | |
1657 | ||
43ba743c EB |
1658 | /* Replace the uses, reached by the definition of invariant INV, by REG. |
1659 | ||
1660 | IN_GROUP is nonzero if this is part of a group of changes that must be | |
1661 | performed as a group. In that case, the changes will be stored. The | |
1662 | function `apply_change_group' will validate and apply the changes. */ | |
1663 | ||
1664 | static int | |
1665 | replace_uses (struct invariant *inv, rtx reg, bool in_group) | |
1666 | { | |
1667 | /* Replace the uses we know to be dominated. It saves work for copy | |
1668 | propagation, and also it is necessary so that dependent invariants | |
1669 | are computed right. */ | |
1670 | if (inv->def) | |
1671 | { | |
1672 | struct use *use; | |
1673 | for (use = inv->def->uses; use; use = use->next) | |
1674 | validate_change (use->insn, use->pos, reg, true); | |
1675 | ||
1676 | /* If we aren't part of a larger group, apply the changes now. */ | |
1677 | if (!in_group) | |
1678 | return apply_change_group (); | |
1679 | } | |
1680 | ||
1681 | return 1; | |
1682 | } | |
1683 | ||
aa953e2f TP |
1684 | /* Whether invariant INV setting REG can be moved out of LOOP, at the end of |
1685 | the block preceding its header. */ | |
1686 | ||
1687 | static bool | |
99b1c316 | 1688 | can_move_invariant_reg (class loop *loop, struct invariant *inv, rtx reg) |
aa953e2f TP |
1689 | { |
1690 | df_ref def, use; | |
1691 | unsigned int dest_regno, defs_in_loop_count = 0; | |
1692 | rtx_insn *insn = inv->insn; | |
1693 | basic_block bb = BLOCK_FOR_INSN (inv->insn); | |
1694 | ||
1695 | /* We ignore hard register and memory access for cost and complexity reasons. | |
1696 | Hard register are few at this stage and expensive to consider as they | |
1697 | require building a separate data flow. Memory access would require using | |
1698 | df_simulate_* and can_move_insns_across functions and is more complex. */ | |
1699 | if (!REG_P (reg) || HARD_REGISTER_P (reg)) | |
1700 | return false; | |
1701 | ||
1702 | /* Check whether the set is always executed. We could omit this condition if | |
1703 | we know that the register is unused outside of the loop, but it does not | |
1704 | seem worth finding out. */ | |
1705 | if (!inv->always_executed) | |
1706 | return false; | |
1707 | ||
1708 | /* Check that all uses that would be dominated by def are already dominated | |
1709 | by it. */ | |
1710 | dest_regno = REGNO (reg); | |
1711 | for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use)) | |
1712 | { | |
1713 | rtx_insn *use_insn; | |
1714 | basic_block use_bb; | |
1715 | ||
1716 | use_insn = DF_REF_INSN (use); | |
1717 | use_bb = BLOCK_FOR_INSN (use_insn); | |
1718 | ||
1719 | /* Ignore instruction considered for moving. */ | |
1720 | if (use_insn == insn) | |
1721 | continue; | |
1722 | ||
1723 | /* Don't consider uses outside loop. */ | |
1724 | if (!flow_bb_inside_loop_p (loop, use_bb)) | |
1725 | continue; | |
1726 | ||
1727 | /* Don't move if a use is not dominated by def in insn. */ | |
1728 | if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn)) | |
1729 | return false; | |
1730 | if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb)) | |
1731 | return false; | |
1732 | } | |
1733 | ||
1734 | /* Check for other defs. Any other def in the loop might reach a use | |
1735 | currently reached by the def in insn. */ | |
1736 | for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def)) | |
1737 | { | |
1738 | basic_block def_bb = DF_REF_BB (def); | |
1739 | ||
1740 | /* Defs in exit block cannot reach a use they weren't already. */ | |
1741 | if (single_succ_p (def_bb)) | |
1742 | { | |
1743 | basic_block def_bb_succ; | |
1744 | ||
1745 | def_bb_succ = single_succ (def_bb); | |
1746 | if (!flow_bb_inside_loop_p (loop, def_bb_succ)) | |
1747 | continue; | |
1748 | } | |
1749 | ||
1750 | if (++defs_in_loop_count > 1) | |
1751 | return false; | |
1752 | } | |
1753 | ||
1754 | return true; | |
1755 | } | |
1756 | ||
ba946209 ZD |
1757 | /* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false |
1758 | otherwise. */ | |
1759 | ||
1760 | static bool | |
99b1c316 | 1761 | move_invariant_reg (class loop *loop, unsigned invno) |
5e962776 | 1762 | { |
9771b263 DN |
1763 | struct invariant *inv = invariants[invno]; |
1764 | struct invariant *repr = invariants[inv->eqto]; | |
5e962776 ZD |
1765 | unsigned i; |
1766 | basic_block preheader = loop_preheader_edge (loop)->src; | |
90b1c344 | 1767 | rtx reg, set, dest, note; |
87c476a2 | 1768 | bitmap_iterator bi; |
43ba743c | 1769 | int regno = -1; |
5e962776 | 1770 | |
ba946209 ZD |
1771 | if (inv->reg) |
1772 | return true; | |
1773 | if (!repr->move) | |
1774 | return false; | |
43ba743c | 1775 | |
1052bd54 ZD |
1776 | /* If this is a representative of the class of equivalent invariants, |
1777 | really move the invariant. Otherwise just replace its use with | |
1778 | the register used for the representative. */ | |
1779 | if (inv == repr) | |
5e962776 | 1780 | { |
1052bd54 | 1781 | if (inv->depends_on) |
5e962776 | 1782 | { |
1052bd54 ZD |
1783 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi) |
1784 | { | |
ba946209 ZD |
1785 | if (!move_invariant_reg (loop, i)) |
1786 | goto fail; | |
1052bd54 | 1787 | } |
87c476a2 | 1788 | } |
5e962776 | 1789 | |
aa953e2f TP |
1790 | /* If possible, just move the set out of the loop. Otherwise, we |
1791 | need to create a temporary register. */ | |
1052bd54 | 1792 | set = single_set (inv->insn); |
1833192f VM |
1793 | reg = dest = SET_DEST (set); |
1794 | if (GET_CODE (reg) == SUBREG) | |
1795 | reg = SUBREG_REG (reg); | |
1796 | if (REG_P (reg)) | |
1797 | regno = REGNO (reg); | |
1798 | ||
ddd93587 | 1799 | if (!can_move_invariant_reg (loop, inv, dest)) |
aa953e2f TP |
1800 | { |
1801 | reg = gen_reg_rtx_and_attrs (dest); | |
1052bd54 | 1802 | |
aa953e2f TP |
1803 | /* Try replacing the destination by a new pseudoregister. */ |
1804 | validate_change (inv->insn, &SET_DEST (set), reg, true); | |
43ba743c | 1805 | |
aa953e2f TP |
1806 | /* As well as all the dominated uses. */ |
1807 | replace_uses (inv, reg, true); | |
43ba743c | 1808 | |
aa953e2f TP |
1809 | /* And validate all the changes. */ |
1810 | if (!apply_change_group ()) | |
1811 | goto fail; | |
90b1c344 | 1812 | |
aa953e2f TP |
1813 | emit_insn_after (gen_move_insn (dest, reg), inv->insn); |
1814 | } | |
1815 | else if (dump_file) | |
1816 | fprintf (dump_file, "Invariant %d moved without introducing a new " | |
1817 | "temporary register\n", invno); | |
90b1c344 | 1818 | reorder_insns (inv->insn, inv->insn, BB_END (preheader)); |
43d56ad7 | 1819 | df_recompute_luids (preheader); |
90b1c344 | 1820 | |
82fa5f8a L |
1821 | /* If there is a REG_EQUAL note on the insn we just moved, and the |
1822 | insn is in a basic block that is not always executed or the note | |
1823 | contains something for which we don't know the invariant status, | |
1824 | the note may no longer be valid after we move the insn. Note that | |
1825 | uses in REG_EQUAL notes are taken into account in the computation | |
1826 | of invariants, so it is safe to retain the note even if it contains | |
1827 | register references for which we know the invariant status. */ | |
1828 | if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX)) | |
1829 | && (!inv->always_executed | |
1830 | || !check_maybe_invariant (XEXP (note, 0)))) | |
90b1c344 | 1831 | remove_note (inv->insn, note); |
b644b211 SB |
1832 | } |
1833 | else | |
1834 | { | |
ba946209 ZD |
1835 | if (!move_invariant_reg (loop, repr->invno)) |
1836 | goto fail; | |
1052bd54 | 1837 | reg = repr->reg; |
1833192f | 1838 | regno = repr->orig_regno; |
43ba743c EB |
1839 | if (!replace_uses (inv, reg, false)) |
1840 | goto fail; | |
1052bd54 | 1841 | set = single_set (inv->insn); |
4d779342 DB |
1842 | emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn); |
1843 | delete_insn (inv->insn); | |
b644b211 | 1844 | } |
5e962776 | 1845 | |
1052bd54 | 1846 | inv->reg = reg; |
1833192f | 1847 | inv->orig_regno = regno; |
1052bd54 | 1848 | |
ba946209 ZD |
1849 | return true; |
1850 | ||
1851 | fail: | |
1852 | /* If we failed, clear move flag, so that we do not try to move inv | |
1853 | again. */ | |
1854 | if (dump_file) | |
1855 | fprintf (dump_file, "Failed to move invariant %d\n", invno); | |
1856 | inv->move = false; | |
1857 | inv->reg = NULL_RTX; | |
1833192f | 1858 | inv->orig_regno = -1; |
6fb5fa3c | 1859 | |
ba946209 | 1860 | return false; |
5e962776 ZD |
1861 | } |
1862 | ||
1863 | /* Move selected invariant out of the LOOP. Newly created regs are marked | |
cb20f7e8 | 1864 | in TEMPORARY_REGS. */ |
5e962776 ZD |
1865 | |
1866 | static void | |
99b1c316 | 1867 | move_invariants (class loop *loop) |
5e962776 ZD |
1868 | { |
1869 | struct invariant *inv; | |
1870 | unsigned i; | |
1871 | ||
9771b263 | 1872 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1052bd54 | 1873 | move_invariant_reg (loop, i); |
1833192f VM |
1874 | if (flag_ira_loop_pressure && resize_reg_info ()) |
1875 | { | |
9771b263 | 1876 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1833192f VM |
1877 | if (inv->reg != NULL_RTX) |
1878 | { | |
1879 | if (inv->orig_regno >= 0) | |
1880 | setup_reg_classes (REGNO (inv->reg), | |
1881 | reg_preferred_class (inv->orig_regno), | |
1882 | reg_alternate_class (inv->orig_regno), | |
1756cb66 | 1883 | reg_allocno_class (inv->orig_regno)); |
1833192f VM |
1884 | else |
1885 | setup_reg_classes (REGNO (inv->reg), | |
1886 | GENERAL_REGS, NO_REGS, GENERAL_REGS); | |
1887 | } | |
1888 | } | |
6541e97d RS |
1889 | /* Remove the DF_UD_CHAIN problem added in find_defs before rescanning, |
1890 | to save a bit of compile time. */ | |
1891 | df_remove_problem (df_chain); | |
1892 | df_process_deferred_rescans (); | |
5e962776 ZD |
1893 | } |
1894 | ||
1895 | /* Initializes invariant motion data. */ | |
1896 | ||
1897 | static void | |
1898 | init_inv_motion_data (void) | |
1899 | { | |
1900 | actual_stamp = 1; | |
1901 | ||
9771b263 | 1902 | invariants.create (100); |
5e962776 ZD |
1903 | } |
1904 | ||
cb20f7e8 | 1905 | /* Frees the data allocated by invariant motion. */ |
5e962776 ZD |
1906 | |
1907 | static void | |
cb20f7e8 | 1908 | free_inv_motion_data (void) |
5e962776 ZD |
1909 | { |
1910 | unsigned i; | |
1911 | struct def *def; | |
1912 | struct invariant *inv; | |
1913 | ||
6fb5fa3c DB |
1914 | check_invariant_table_size (); |
1915 | for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++) | |
5e962776 | 1916 | { |
6fb5fa3c DB |
1917 | inv = invariant_table[i]; |
1918 | if (inv) | |
1919 | { | |
1920 | def = inv->def; | |
1921 | gcc_assert (def != NULL); | |
b8698a0f | 1922 | |
6fb5fa3c DB |
1923 | free_use_list (def->uses); |
1924 | free (def); | |
1925 | invariant_table[i] = NULL; | |
1926 | } | |
5e962776 ZD |
1927 | } |
1928 | ||
9771b263 | 1929 | FOR_EACH_VEC_ELT (invariants, i, inv) |
5e962776 | 1930 | { |
8bdbfff5 | 1931 | BITMAP_FREE (inv->depends_on); |
5e962776 ZD |
1932 | free (inv); |
1933 | } | |
9771b263 | 1934 | invariants.release (); |
5e962776 ZD |
1935 | } |
1936 | ||
cb20f7e8 | 1937 | /* Move the invariants out of the LOOP. */ |
5e962776 ZD |
1938 | |
1939 | static void | |
99b1c316 | 1940 | move_single_loop_invariants (class loop *loop) |
5e962776 ZD |
1941 | { |
1942 | init_inv_motion_data (); | |
1943 | ||
cb20f7e8 | 1944 | find_invariants (loop); |
bec922f0 SL |
1945 | find_invariants_to_move (optimize_loop_for_speed_p (loop), |
1946 | LOOP_DATA (loop)->has_call); | |
cb20f7e8 | 1947 | move_invariants (loop); |
5e962776 | 1948 | |
cb20f7e8 | 1949 | free_inv_motion_data (); |
5e962776 ZD |
1950 | } |
1951 | ||
1952 | /* Releases the auxiliary data for LOOP. */ | |
1953 | ||
1954 | static void | |
99b1c316 | 1955 | free_loop_data (class loop *loop) |
5e962776 | 1956 | { |
99b1c316 | 1957 | class loop_data *data = LOOP_DATA (loop); |
eb149440 RG |
1958 | if (!data) |
1959 | return; | |
5e962776 | 1960 | |
1833192f VM |
1961 | bitmap_clear (&LOOP_DATA (loop)->regs_ref); |
1962 | bitmap_clear (&LOOP_DATA (loop)->regs_live); | |
5e962776 ZD |
1963 | free (data); |
1964 | loop->aux = NULL; | |
1965 | } | |
1966 | ||
1833192f VM |
1967 | \f |
1968 | ||
1969 | /* Registers currently living. */ | |
1970 | static bitmap_head curr_regs_live; | |
1971 | ||
1756cb66 | 1972 | /* Current reg pressure for each pressure class. */ |
1833192f VM |
1973 | static int curr_reg_pressure[N_REG_CLASSES]; |
1974 | ||
1975 | /* Record all regs that are set in any one insn. Communication from | |
1976 | mark_reg_{store,clobber} and global_conflicts. Asm can refer to | |
1977 | all hard-registers. */ | |
1978 | static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS | |
1979 | ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2]; | |
1980 | /* Number of regs stored in the previous array. */ | |
1981 | static int n_regs_set; | |
1982 | ||
1756cb66 | 1983 | /* Return pressure class and number of needed hard registers (through |
b8698a0f | 1984 | *NREGS) of register REGNO. */ |
1833192f | 1985 | static enum reg_class |
1756cb66 | 1986 | get_regno_pressure_class (int regno, int *nregs) |
1833192f VM |
1987 | { |
1988 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1989 | { | |
1756cb66 | 1990 | enum reg_class pressure_class; |
1833192f | 1991 | |
1756cb66 VM |
1992 | pressure_class = reg_allocno_class (regno); |
1993 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1994 | *nregs | |
1995 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
1996 | return pressure_class; | |
1833192f VM |
1997 | } |
1998 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
1999 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
2000 | { | |
2001 | *nregs = 1; | |
1756cb66 | 2002 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; |
1833192f VM |
2003 | } |
2004 | else | |
2005 | { | |
2006 | *nregs = 0; | |
2007 | return NO_REGS; | |
2008 | } | |
2009 | } | |
2010 | ||
2011 | /* Increase (if INCR_P) or decrease current register pressure for | |
2012 | register REGNO. */ | |
2013 | static void | |
2014 | change_pressure (int regno, bool incr_p) | |
2015 | { | |
2016 | int nregs; | |
1756cb66 | 2017 | enum reg_class pressure_class; |
1833192f | 2018 | |
1756cb66 | 2019 | pressure_class = get_regno_pressure_class (regno, &nregs); |
1833192f | 2020 | if (! incr_p) |
1756cb66 | 2021 | curr_reg_pressure[pressure_class] -= nregs; |
1833192f VM |
2022 | else |
2023 | { | |
1756cb66 VM |
2024 | curr_reg_pressure[pressure_class] += nregs; |
2025 | if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
2026 | < curr_reg_pressure[pressure_class]) | |
2027 | LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
2028 | = curr_reg_pressure[pressure_class]; | |
1833192f VM |
2029 | } |
2030 | } | |
2031 | ||
2032 | /* Mark REGNO birth. */ | |
2033 | static void | |
2034 | mark_regno_live (int regno) | |
2035 | { | |
99b1c316 | 2036 | class loop *loop; |
1833192f VM |
2037 | |
2038 | for (loop = curr_loop; | |
2039 | loop != current_loops->tree_root; | |
2040 | loop = loop_outer (loop)) | |
2041 | bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno); | |
fcaa4ca4 | 2042 | if (!bitmap_set_bit (&curr_regs_live, regno)) |
1833192f | 2043 | return; |
1833192f VM |
2044 | change_pressure (regno, true); |
2045 | } | |
2046 | ||
2047 | /* Mark REGNO death. */ | |
2048 | static void | |
2049 | mark_regno_death (int regno) | |
2050 | { | |
fcaa4ca4 | 2051 | if (! bitmap_clear_bit (&curr_regs_live, regno)) |
1833192f | 2052 | return; |
1833192f VM |
2053 | change_pressure (regno, false); |
2054 | } | |
2055 | ||
2056 | /* Mark setting register REG. */ | |
2057 | static void | |
2058 | mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, | |
2059 | void *data ATTRIBUTE_UNUSED) | |
2060 | { | |
1833192f VM |
2061 | if (GET_CODE (reg) == SUBREG) |
2062 | reg = SUBREG_REG (reg); | |
2063 | ||
2064 | if (! REG_P (reg)) | |
2065 | return; | |
2066 | ||
2067 | regs_set[n_regs_set++] = reg; | |
2068 | ||
53d1bae9 RS |
2069 | unsigned int end_regno = END_REGNO (reg); |
2070 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 2071 | mark_regno_live (regno); |
1833192f VM |
2072 | } |
2073 | ||
2074 | /* Mark clobbering register REG. */ | |
2075 | static void | |
2076 | mark_reg_clobber (rtx reg, const_rtx setter, void *data) | |
2077 | { | |
2078 | if (GET_CODE (setter) == CLOBBER) | |
2079 | mark_reg_store (reg, setter, data); | |
2080 | } | |
2081 | ||
2082 | /* Mark register REG death. */ | |
2083 | static void | |
2084 | mark_reg_death (rtx reg) | |
2085 | { | |
53d1bae9 RS |
2086 | unsigned int end_regno = END_REGNO (reg); |
2087 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 2088 | mark_regno_death (regno); |
1833192f VM |
2089 | } |
2090 | ||
2091 | /* Mark occurrence of registers in X for the current loop. */ | |
2092 | static void | |
2093 | mark_ref_regs (rtx x) | |
2094 | { | |
2095 | RTX_CODE code; | |
2096 | int i; | |
2097 | const char *fmt; | |
2098 | ||
2099 | if (!x) | |
2100 | return; | |
2101 | ||
2102 | code = GET_CODE (x); | |
2103 | if (code == REG) | |
2104 | { | |
99b1c316 | 2105 | class loop *loop; |
b8698a0f | 2106 | |
1833192f VM |
2107 | for (loop = curr_loop; |
2108 | loop != current_loops->tree_root; | |
2109 | loop = loop_outer (loop)) | |
2110 | bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x)); | |
2111 | return; | |
2112 | } | |
2113 | ||
2114 | fmt = GET_RTX_FORMAT (code); | |
2115 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2116 | if (fmt[i] == 'e') | |
2117 | mark_ref_regs (XEXP (x, i)); | |
2118 | else if (fmt[i] == 'E') | |
2119 | { | |
2120 | int j; | |
b8698a0f | 2121 | |
1833192f VM |
2122 | for (j = 0; j < XVECLEN (x, i); j++) |
2123 | mark_ref_regs (XVECEXP (x, i, j)); | |
2124 | } | |
2125 | } | |
2126 | ||
2127 | /* Calculate register pressure in the loops. */ | |
2128 | static void | |
2129 | calculate_loop_reg_pressure (void) | |
2130 | { | |
2131 | int i; | |
2132 | unsigned int j; | |
2133 | bitmap_iterator bi; | |
2134 | basic_block bb; | |
89bfd6f5 DM |
2135 | rtx_insn *insn; |
2136 | rtx link; | |
99b1c316 | 2137 | class loop *loop, *parent; |
1833192f | 2138 | |
e41ba804 | 2139 | for (auto loop : loops_list (cfun, 0)) |
1833192f VM |
2140 | if (loop->aux == NULL) |
2141 | { | |
99b1c316 | 2142 | loop->aux = xcalloc (1, sizeof (class loop_data)); |
1833192f VM |
2143 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); |
2144 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
2145 | } | |
8d49e7ef | 2146 | ira_setup_eliminable_regset (); |
1833192f | 2147 | bitmap_initialize (&curr_regs_live, ®_obstack); |
11cd3bed | 2148 | FOR_EACH_BB_FN (bb, cfun) |
1833192f VM |
2149 | { |
2150 | curr_loop = bb->loop_father; | |
2151 | if (curr_loop == current_loops->tree_root) | |
2152 | continue; | |
2153 | ||
2154 | for (loop = curr_loop; | |
2155 | loop != current_loops->tree_root; | |
2156 | loop = loop_outer (loop)) | |
2157 | bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb)); | |
2158 | ||
2159 | bitmap_copy (&curr_regs_live, DF_LR_IN (bb)); | |
1756cb66 VM |
2160 | for (i = 0; i < ira_pressure_classes_num; i++) |
2161 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
1833192f VM |
2162 | EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi) |
2163 | change_pressure (j, true); | |
2164 | ||
2165 | FOR_BB_INSNS (bb, insn) | |
2166 | { | |
dd8c071d | 2167 | if (! NONDEBUG_INSN_P (insn)) |
1833192f VM |
2168 | continue; |
2169 | ||
2170 | mark_ref_regs (PATTERN (insn)); | |
2171 | n_regs_set = 0; | |
e8448ba5 | 2172 | note_stores (insn, mark_reg_clobber, NULL); |
b8698a0f | 2173 | |
1833192f | 2174 | /* Mark any registers dead after INSN as dead now. */ |
b8698a0f | 2175 | |
1833192f VM |
2176 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
2177 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
2178 | mark_reg_death (XEXP (link, 0)); | |
b8698a0f | 2179 | |
1833192f VM |
2180 | /* Mark any registers set in INSN as live, |
2181 | and mark them as conflicting with all other live regs. | |
2182 | Clobbers are processed again, so they conflict with | |
2183 | the registers that are set. */ | |
b8698a0f | 2184 | |
e8448ba5 | 2185 | note_stores (insn, mark_reg_store, NULL); |
b8698a0f | 2186 | |
760edf20 TS |
2187 | if (AUTO_INC_DEC) |
2188 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2189 | if (REG_NOTE_KIND (link) == REG_INC) | |
2190 | mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); | |
2191 | ||
1833192f VM |
2192 | while (n_regs_set-- > 0) |
2193 | { | |
2194 | rtx note = find_regno_note (insn, REG_UNUSED, | |
2195 | REGNO (regs_set[n_regs_set])); | |
2196 | if (! note) | |
2197 | continue; | |
b8698a0f | 2198 | |
1833192f VM |
2199 | mark_reg_death (XEXP (note, 0)); |
2200 | } | |
2201 | } | |
2202 | } | |
c0d105c6 | 2203 | bitmap_release (&curr_regs_live); |
1833192f VM |
2204 | if (flag_ira_region == IRA_REGION_MIXED |
2205 | || flag_ira_region == IRA_REGION_ALL) | |
e41ba804 | 2206 | for (auto loop : loops_list (cfun, 0)) |
1833192f VM |
2207 | { |
2208 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2209 | if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j)) | |
2210 | { | |
1756cb66 | 2211 | enum reg_class pressure_class; |
1833192f VM |
2212 | int nregs; |
2213 | ||
1756cb66 VM |
2214 | pressure_class = get_regno_pressure_class (j, &nregs); |
2215 | LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs; | |
1833192f VM |
2216 | } |
2217 | } | |
2218 | if (dump_file == NULL) | |
2219 | return; | |
e41ba804 | 2220 | for (auto loop : loops_list (cfun, 0)) |
1833192f VM |
2221 | { |
2222 | parent = loop_outer (loop); | |
2223 | fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n", | |
2224 | loop->num, (parent == NULL ? -1 : parent->num), | |
2225 | loop->header->index, loop_depth (loop)); | |
2226 | fprintf (dump_file, "\n ref. regnos:"); | |
2227 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi) | |
2228 | fprintf (dump_file, " %d", j); | |
2229 | fprintf (dump_file, "\n live regnos:"); | |
2230 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2231 | fprintf (dump_file, " %d", j); | |
2232 | fprintf (dump_file, "\n Pressure:"); | |
1756cb66 | 2233 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1833192f | 2234 | { |
1756cb66 | 2235 | enum reg_class pressure_class; |
b8698a0f | 2236 | |
1756cb66 VM |
2237 | pressure_class = ira_pressure_classes[i]; |
2238 | if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0) | |
1833192f | 2239 | continue; |
1756cb66 VM |
2240 | fprintf (dump_file, " %s=%d", reg_class_names[pressure_class], |
2241 | LOOP_DATA (loop)->max_reg_pressure[pressure_class]); | |
1833192f VM |
2242 | } |
2243 | fprintf (dump_file, "\n"); | |
2244 | } | |
2245 | } | |
2246 | ||
2247 | \f | |
2248 | ||
d73be268 | 2249 | /* Move the invariants out of the loops. */ |
5e962776 ZD |
2250 | |
2251 | void | |
d73be268 | 2252 | move_loop_invariants (void) |
5e962776 | 2253 | { |
6541e97d RS |
2254 | if (optimize == 1) |
2255 | df_live_add_problem (); | |
2256 | /* ??? This is a hack. We should only need to call df_live_set_all_dirty | |
2257 | for optimize == 1, but can_move_invariant_reg relies on DF_INSN_LUID | |
2258 | being up-to-date. That isn't always true (even after df_analyze) | |
2259 | because df_process_deferred_rescans doesn't necessarily cause | |
2260 | blocks to be rescanned. */ | |
2261 | df_live_set_all_dirty (); | |
1833192f VM |
2262 | if (flag_ira_loop_pressure) |
2263 | { | |
2264 | df_analyze (); | |
1756cb66 | 2265 | regstat_init_n_sets_and_refs (); |
b11f0116 | 2266 | ira_set_pseudo_classes (true, dump_file); |
1833192f | 2267 | calculate_loop_reg_pressure (); |
1756cb66 | 2268 | regstat_free_n_sets_and_refs (); |
1833192f | 2269 | } |
6fb5fa3c | 2270 | df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); |
5e962776 | 2271 | /* Process the loops, innermost first. */ |
e41ba804 | 2272 | for (auto loop : loops_list (cfun, LI_FROM_INNERMOST)) |
5e962776 | 2273 | { |
1833192f | 2274 | curr_loop = loop; |
fc2d7303 RB |
2275 | /* move_single_loop_invariants for very large loops is time consuming |
2276 | and might need a lot of memory. For -O1 only do loop invariant | |
2277 | motion for very small loops. */ | |
028d4092 | 2278 | unsigned max_bbs = param_loop_invariant_max_bbs_in_loop; |
fc2d7303 RB |
2279 | if (optimize < 2) |
2280 | max_bbs /= 10; | |
2281 | if (loop->num_nodes <= max_bbs) | |
b1fb9f56 | 2282 | move_single_loop_invariants (loop); |
5e962776 ZD |
2283 | } |
2284 | ||
e41ba804 | 2285 | for (auto loop : loops_list (cfun, 0)) |
42fd6772 | 2286 | free_loop_data (loop); |
5e962776 | 2287 | |
1833192f VM |
2288 | if (flag_ira_loop_pressure) |
2289 | /* There is no sense to keep this info because it was most | |
2290 | probably outdated by subsequent passes. */ | |
2291 | free_reg_info (); | |
6fb5fa3c DB |
2292 | free (invariant_table); |
2293 | invariant_table = NULL; | |
2294 | invariant_table_size = 0; | |
a7f4ccb1 | 2295 | |
6541e97d RS |
2296 | if (optimize == 1) |
2297 | df_remove_problem (df_live); | |
2298 | ||
b2b29377 | 2299 | checking_verify_flow_info (); |
5e962776 | 2300 | } |