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cb20f7e8 | 1 | /* RTL-level loop invariant motion. |
818ab71a | 2 | Copyright (C) 2004-2016 Free Software Foundation, Inc. |
cb20f7e8 | 3 | |
5e962776 | 4 | This file is part of GCC. |
cb20f7e8 | 5 | |
5e962776 ZD |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the | |
9dcd6f09 | 8 | Free Software Foundation; either version 3, or (at your option) any |
5e962776 | 9 | later version. |
cb20f7e8 | 10 | |
5e962776 ZD |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
cb20f7e8 | 15 | |
5e962776 | 16 | You should have received a copy of the GNU General Public License |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
5e962776 ZD |
19 | |
20 | /* This implements the loop invariant motion pass. It is very simple | |
4a8cae83 SB |
21 | (no calls, no loads/stores, etc.). This should be sufficient to cleanup |
22 | things like address arithmetics -- other more complicated invariants should | |
23 | be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c. | |
cb20f7e8 | 24 | |
5e962776 ZD |
25 | We proceed loop by loop -- it is simpler than trying to handle things |
26 | globally and should not lose much. First we inspect all sets inside loop | |
27 | and create a dependency graph on insns (saying "to move this insn, you must | |
28 | also move the following insns"). | |
29 | ||
30 | We then need to determine what to move. We estimate the number of registers | |
31 | used and move as many invariants as possible while we still have enough free | |
32 | registers. We prefer the expensive invariants. | |
cb20f7e8 | 33 | |
5e962776 ZD |
34 | Then we move the selected invariants out of the loop, creating a new |
35 | temporaries for them if necessary. */ | |
36 | ||
37 | #include "config.h" | |
38 | #include "system.h" | |
39 | #include "coretypes.h" | |
c7131fb2 | 40 | #include "backend.h" |
957060b5 | 41 | #include "target.h" |
5e962776 | 42 | #include "rtl.h" |
957060b5 AM |
43 | #include "tree.h" |
44 | #include "cfghooks.h" | |
c7131fb2 | 45 | #include "df.h" |
3912d291 | 46 | #include "tm_p.h" |
957060b5 AM |
47 | #include "insn-config.h" |
48 | #include "regs.h" | |
49 | #include "ira.h" | |
50 | #include "recog.h" | |
60393bbc | 51 | #include "cfgrtl.h" |
60393bbc AM |
52 | #include "cfgloop.h" |
53 | #include "expr.h" | |
b1fb9f56 | 54 | #include "params.h" |
192912db | 55 | #include "rtl-iter.h" |
7ee2468b | 56 | #include "dumpfile.h" |
5e962776 ZD |
57 | |
58 | /* The data stored for the loop. */ | |
59 | ||
60 | struct loop_data | |
61 | { | |
62 | struct loop *outermost_exit; /* The outermost exit of the loop. */ | |
63 | bool has_call; /* True if the loop contains a call. */ | |
1833192f | 64 | /* Maximal register pressure inside loop for given register class |
1756cb66 | 65 | (defined only for the pressure classes). */ |
1833192f VM |
66 | int max_reg_pressure[N_REG_CLASSES]; |
67 | /* Loop regs referenced and live pseudo-registers. */ | |
68 | bitmap_head regs_ref; | |
69 | bitmap_head regs_live; | |
5e962776 ZD |
70 | }; |
71 | ||
72 | #define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux) | |
73 | ||
74 | /* The description of an use. */ | |
75 | ||
76 | struct use | |
77 | { | |
78 | rtx *pos; /* Position of the use. */ | |
89bfd6f5 | 79 | rtx_insn *insn; /* The insn in that the use occurs. */ |
1bfdbb29 | 80 | unsigned addr_use_p; /* Whether the use occurs in an address. */ |
5e962776 ZD |
81 | struct use *next; /* Next use in the list. */ |
82 | }; | |
83 | ||
84 | /* The description of a def. */ | |
85 | ||
86 | struct def | |
87 | { | |
88 | struct use *uses; /* The list of uses that are uniquely reached | |
89 | by it. */ | |
90 | unsigned n_uses; /* Number of such uses. */ | |
1bfdbb29 | 91 | unsigned n_addr_uses; /* Number of uses in addresses. */ |
5e962776 | 92 | unsigned invno; /* The corresponding invariant. */ |
5b92e189 BC |
93 | bool can_prop_to_addr_uses; /* True if the corresponding inv can be |
94 | propagated into its address uses. */ | |
5e962776 ZD |
95 | }; |
96 | ||
97 | /* The data stored for each invariant. */ | |
98 | ||
99 | struct invariant | |
100 | { | |
101 | /* The number of the invariant. */ | |
102 | unsigned invno; | |
103 | ||
1052bd54 ZD |
104 | /* The number of the invariant with the same value. */ |
105 | unsigned eqto; | |
106 | ||
e42e3d15 ZC |
107 | /* The number of invariants which eqto this. */ |
108 | unsigned eqno; | |
109 | ||
1052bd54 ZD |
110 | /* If we moved the invariant out of the loop, the register that contains its |
111 | value. */ | |
112 | rtx reg; | |
5e962776 | 113 | |
1833192f VM |
114 | /* If we moved the invariant out of the loop, the original regno |
115 | that contained its value. */ | |
116 | int orig_regno; | |
117 | ||
5e962776 ZD |
118 | /* The definition of the invariant. */ |
119 | struct def *def; | |
120 | ||
121 | /* The insn in that it is defined. */ | |
89bfd6f5 | 122 | rtx_insn *insn; |
5e962776 ZD |
123 | |
124 | /* Whether it is always executed. */ | |
125 | bool always_executed; | |
126 | ||
127 | /* Whether to move the invariant. */ | |
128 | bool move; | |
129 | ||
1bfdbb29 PB |
130 | /* Whether the invariant is cheap when used as an address. */ |
131 | bool cheap_address; | |
132 | ||
cb20f7e8 | 133 | /* Cost of the invariant. */ |
5e962776 ZD |
134 | unsigned cost; |
135 | ||
136 | /* The invariants it depends on. */ | |
137 | bitmap depends_on; | |
138 | ||
139 | /* Used for detecting already visited invariants during determining | |
140 | costs of movements. */ | |
141 | unsigned stamp; | |
142 | }; | |
143 | ||
1833192f VM |
144 | /* Currently processed loop. */ |
145 | static struct loop *curr_loop; | |
146 | ||
6fb5fa3c DB |
147 | /* Table of invariants indexed by the df_ref uid field. */ |
148 | ||
149 | static unsigned int invariant_table_size = 0; | |
150 | static struct invariant ** invariant_table; | |
151 | ||
1052bd54 ZD |
152 | /* Entry for hash table of invariant expressions. */ |
153 | ||
154 | struct invariant_expr_entry | |
155 | { | |
156 | /* The invariant. */ | |
157 | struct invariant *inv; | |
158 | ||
159 | /* Its value. */ | |
160 | rtx expr; | |
161 | ||
162 | /* Its mode. */ | |
ef4bddc2 | 163 | machine_mode mode; |
1052bd54 ZD |
164 | |
165 | /* Its hash. */ | |
166 | hashval_t hash; | |
167 | }; | |
168 | ||
5e962776 ZD |
169 | /* The actual stamp for marking already visited invariants during determining |
170 | costs of movements. */ | |
171 | ||
172 | static unsigned actual_stamp; | |
173 | ||
edd954e6 KH |
174 | typedef struct invariant *invariant_p; |
175 | ||
edd954e6 | 176 | |
5e962776 ZD |
177 | /* The invariants. */ |
178 | ||
9771b263 | 179 | static vec<invariant_p> invariants; |
5e962776 | 180 | |
6fb5fa3c | 181 | /* Check the size of the invariant table and realloc if necessary. */ |
cb20f7e8 | 182 | |
b8698a0f | 183 | static void |
6fb5fa3c DB |
184 | check_invariant_table_size (void) |
185 | { | |
c3284718 | 186 | if (invariant_table_size < DF_DEFS_TABLE_SIZE ()) |
6fb5fa3c DB |
187 | { |
188 | unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4); | |
d3bfe4de | 189 | invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size); |
b8698a0f | 190 | memset (&invariant_table[invariant_table_size], 0, |
92cfe9d5 | 191 | (new_size - invariant_table_size) * sizeof (struct invariant *)); |
6fb5fa3c DB |
192 | invariant_table_size = new_size; |
193 | } | |
194 | } | |
cb20f7e8 | 195 | |
5e962776 ZD |
196 | /* Test for possibility of invariantness of X. */ |
197 | ||
198 | static bool | |
199 | check_maybe_invariant (rtx x) | |
200 | { | |
201 | enum rtx_code code = GET_CODE (x); | |
202 | int i, j; | |
203 | const char *fmt; | |
204 | ||
205 | switch (code) | |
206 | { | |
d8116890 | 207 | CASE_CONST_ANY: |
5e962776 ZD |
208 | case SYMBOL_REF: |
209 | case CONST: | |
210 | case LABEL_REF: | |
211 | return true; | |
212 | ||
213 | case PC: | |
214 | case CC0: | |
215 | case UNSPEC_VOLATILE: | |
216 | case CALL: | |
217 | return false; | |
218 | ||
219 | case REG: | |
220 | return true; | |
221 | ||
222 | case MEM: | |
223 | /* Load/store motion is done elsewhere. ??? Perhaps also add it here? | |
224 | It should not be hard, and might be faster than "elsewhere". */ | |
225 | ||
226 | /* Just handle the most trivial case where we load from an unchanging | |
227 | location (most importantly, pic tables). */ | |
66f91b93 | 228 | if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x)) |
5e962776 ZD |
229 | break; |
230 | ||
231 | return false; | |
232 | ||
233 | case ASM_OPERANDS: | |
234 | /* Don't mess with insns declared volatile. */ | |
235 | if (MEM_VOLATILE_P (x)) | |
236 | return false; | |
237 | break; | |
238 | ||
239 | default: | |
240 | break; | |
241 | } | |
242 | ||
243 | fmt = GET_RTX_FORMAT (code); | |
244 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
245 | { | |
246 | if (fmt[i] == 'e') | |
247 | { | |
248 | if (!check_maybe_invariant (XEXP (x, i))) | |
249 | return false; | |
250 | } | |
251 | else if (fmt[i] == 'E') | |
252 | { | |
253 | for (j = 0; j < XVECLEN (x, i); j++) | |
254 | if (!check_maybe_invariant (XVECEXP (x, i, j))) | |
255 | return false; | |
256 | } | |
257 | } | |
258 | ||
259 | return true; | |
260 | } | |
261 | ||
1052bd54 ZD |
262 | /* Returns the invariant definition for USE, or NULL if USE is not |
263 | invariant. */ | |
264 | ||
265 | static struct invariant * | |
57512f53 | 266 | invariant_for_use (df_ref use) |
1052bd54 ZD |
267 | { |
268 | struct df_link *defs; | |
57512f53 | 269 | df_ref def; |
50e94c7e | 270 | basic_block bb = DF_REF_BB (use), def_bb; |
1052bd54 | 271 | |
57512f53 | 272 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
b6c9b9bc ZD |
273 | return NULL; |
274 | ||
1052bd54 ZD |
275 | defs = DF_REF_CHAIN (use); |
276 | if (!defs || defs->next) | |
277 | return NULL; | |
278 | def = defs->ref; | |
6fb5fa3c | 279 | check_invariant_table_size (); |
c3284718 | 280 | if (!invariant_table[DF_REF_ID (def)]) |
1052bd54 ZD |
281 | return NULL; |
282 | ||
283 | def_bb = DF_REF_BB (def); | |
284 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
285 | return NULL; | |
c3284718 | 286 | return invariant_table[DF_REF_ID (def)]; |
1052bd54 ZD |
287 | } |
288 | ||
289 | /* Computes hash value for invariant expression X in INSN. */ | |
290 | ||
291 | static hashval_t | |
89bfd6f5 | 292 | hash_invariant_expr_1 (rtx_insn *insn, rtx x) |
1052bd54 ZD |
293 | { |
294 | enum rtx_code code = GET_CODE (x); | |
295 | int i, j; | |
296 | const char *fmt; | |
297 | hashval_t val = code; | |
298 | int do_not_record_p; | |
57512f53 | 299 | df_ref use; |
1052bd54 ZD |
300 | struct invariant *inv; |
301 | ||
302 | switch (code) | |
303 | { | |
d8116890 | 304 | CASE_CONST_ANY: |
1052bd54 ZD |
305 | case SYMBOL_REF: |
306 | case CONST: | |
307 | case LABEL_REF: | |
308 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
309 | ||
310 | case REG: | |
6fb5fa3c | 311 | use = df_find_use (insn, x); |
1052bd54 ZD |
312 | if (!use) |
313 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
314 | inv = invariant_for_use (use); | |
315 | if (!inv) | |
316 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
317 | ||
318 | gcc_assert (inv->eqto != ~0u); | |
319 | return inv->eqto; | |
320 | ||
321 | default: | |
322 | break; | |
323 | } | |
324 | ||
325 | fmt = GET_RTX_FORMAT (code); | |
326 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
327 | { | |
328 | if (fmt[i] == 'e') | |
329 | val ^= hash_invariant_expr_1 (insn, XEXP (x, i)); | |
330 | else if (fmt[i] == 'E') | |
331 | { | |
332 | for (j = 0; j < XVECLEN (x, i); j++) | |
333 | val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j)); | |
334 | } | |
8e1409e8 ZD |
335 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
336 | val ^= XINT (x, i); | |
1052bd54 ZD |
337 | } |
338 | ||
339 | return val; | |
340 | } | |
341 | ||
342 | /* Returns true if the invariant expressions E1 and E2 used in insns INSN1 | |
343 | and INSN2 have always the same value. */ | |
344 | ||
345 | static bool | |
89bfd6f5 | 346 | invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2) |
1052bd54 ZD |
347 | { |
348 | enum rtx_code code = GET_CODE (e1); | |
349 | int i, j; | |
350 | const char *fmt; | |
57512f53 | 351 | df_ref use1, use2; |
1052bd54 ZD |
352 | struct invariant *inv1 = NULL, *inv2 = NULL; |
353 | rtx sub1, sub2; | |
354 | ||
355 | /* If mode of only one of the operands is VOIDmode, it is not equivalent to | |
356 | the other one. If both are VOIDmode, we rely on the caller of this | |
357 | function to verify that their modes are the same. */ | |
358 | if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2)) | |
359 | return false; | |
360 | ||
361 | switch (code) | |
362 | { | |
d8116890 | 363 | CASE_CONST_ANY: |
1052bd54 ZD |
364 | case SYMBOL_REF: |
365 | case CONST: | |
366 | case LABEL_REF: | |
367 | return rtx_equal_p (e1, e2); | |
368 | ||
369 | case REG: | |
6fb5fa3c DB |
370 | use1 = df_find_use (insn1, e1); |
371 | use2 = df_find_use (insn2, e2); | |
1052bd54 ZD |
372 | if (use1) |
373 | inv1 = invariant_for_use (use1); | |
374 | if (use2) | |
375 | inv2 = invariant_for_use (use2); | |
376 | ||
377 | if (!inv1 && !inv2) | |
378 | return rtx_equal_p (e1, e2); | |
379 | ||
380 | if (!inv1 || !inv2) | |
381 | return false; | |
382 | ||
383 | gcc_assert (inv1->eqto != ~0u); | |
384 | gcc_assert (inv2->eqto != ~0u); | |
385 | return inv1->eqto == inv2->eqto; | |
386 | ||
387 | default: | |
388 | break; | |
389 | } | |
390 | ||
391 | fmt = GET_RTX_FORMAT (code); | |
392 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
393 | { | |
394 | if (fmt[i] == 'e') | |
395 | { | |
396 | sub1 = XEXP (e1, i); | |
397 | sub2 = XEXP (e2, i); | |
398 | ||
399 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
400 | return false; | |
401 | } | |
402 | ||
403 | else if (fmt[i] == 'E') | |
404 | { | |
405 | if (XVECLEN (e1, i) != XVECLEN (e2, i)) | |
406 | return false; | |
407 | ||
408 | for (j = 0; j < XVECLEN (e1, i); j++) | |
409 | { | |
410 | sub1 = XVECEXP (e1, i, j); | |
411 | sub2 = XVECEXP (e2, i, j); | |
412 | ||
413 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
414 | return false; | |
415 | } | |
416 | } | |
8e1409e8 ZD |
417 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
418 | { | |
419 | if (XINT (e1, i) != XINT (e2, i)) | |
420 | return false; | |
421 | } | |
422 | /* Unhandled type of subexpression, we fail conservatively. */ | |
423 | else | |
424 | return false; | |
1052bd54 ZD |
425 | } |
426 | ||
427 | return true; | |
428 | } | |
429 | ||
95fbe13e | 430 | struct invariant_expr_hasher : free_ptr_hash <invariant_expr_entry> |
1052bd54 | 431 | { |
67f58944 TS |
432 | static inline hashval_t hash (const invariant_expr_entry *); |
433 | static inline bool equal (const invariant_expr_entry *, | |
434 | const invariant_expr_entry *); | |
4a8fb1a1 LC |
435 | }; |
436 | ||
437 | /* Returns hash value for invariant expression entry ENTRY. */ | |
1052bd54 | 438 | |
4a8fb1a1 | 439 | inline hashval_t |
67f58944 | 440 | invariant_expr_hasher::hash (const invariant_expr_entry *entry) |
4a8fb1a1 | 441 | { |
1052bd54 ZD |
442 | return entry->hash; |
443 | } | |
444 | ||
4a8fb1a1 | 445 | /* Compares invariant expression entries ENTRY1 and ENTRY2. */ |
1052bd54 | 446 | |
4a8fb1a1 | 447 | inline bool |
67f58944 TS |
448 | invariant_expr_hasher::equal (const invariant_expr_entry *entry1, |
449 | const invariant_expr_entry *entry2) | |
1052bd54 | 450 | { |
1052bd54 ZD |
451 | if (entry1->mode != entry2->mode) |
452 | return 0; | |
453 | ||
454 | return invariant_expr_equal_p (entry1->inv->insn, entry1->expr, | |
455 | entry2->inv->insn, entry2->expr); | |
456 | } | |
457 | ||
c203e8a7 | 458 | typedef hash_table<invariant_expr_hasher> invariant_htab_type; |
4a8fb1a1 | 459 | |
1052bd54 ZD |
460 | /* Checks whether invariant with value EXPR in machine mode MODE is |
461 | recorded in EQ. If this is the case, return the invariant. Otherwise | |
462 | insert INV to the table for this expression and return INV. */ | |
463 | ||
464 | static struct invariant * | |
ef4bddc2 | 465 | find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode, |
1052bd54 ZD |
466 | struct invariant *inv) |
467 | { | |
468 | hashval_t hash = hash_invariant_expr_1 (inv->insn, expr); | |
469 | struct invariant_expr_entry *entry; | |
470 | struct invariant_expr_entry pentry; | |
4a8fb1a1 | 471 | invariant_expr_entry **slot; |
1052bd54 ZD |
472 | |
473 | pentry.expr = expr; | |
474 | pentry.inv = inv; | |
475 | pentry.mode = mode; | |
c203e8a7 | 476 | slot = eq->find_slot_with_hash (&pentry, hash, INSERT); |
4a8fb1a1 | 477 | entry = *slot; |
1052bd54 ZD |
478 | |
479 | if (entry) | |
480 | return entry->inv; | |
481 | ||
5ed6ace5 | 482 | entry = XNEW (struct invariant_expr_entry); |
1052bd54 ZD |
483 | entry->inv = inv; |
484 | entry->expr = expr; | |
485 | entry->mode = mode; | |
486 | entry->hash = hash; | |
487 | *slot = entry; | |
488 | ||
489 | return inv; | |
490 | } | |
491 | ||
492 | /* Finds invariants identical to INV and records the equivalence. EQ is the | |
493 | hash table of the invariants. */ | |
494 | ||
495 | static void | |
c203e8a7 | 496 | find_identical_invariants (invariant_htab_type *eq, struct invariant *inv) |
1052bd54 ZD |
497 | { |
498 | unsigned depno; | |
499 | bitmap_iterator bi; | |
500 | struct invariant *dep; | |
501 | rtx expr, set; | |
ef4bddc2 | 502 | machine_mode mode; |
e42e3d15 | 503 | struct invariant *tmp; |
1052bd54 ZD |
504 | |
505 | if (inv->eqto != ~0u) | |
506 | return; | |
507 | ||
508 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
509 | { | |
9771b263 | 510 | dep = invariants[depno]; |
1052bd54 ZD |
511 | find_identical_invariants (eq, dep); |
512 | } | |
513 | ||
514 | set = single_set (inv->insn); | |
515 | expr = SET_SRC (set); | |
516 | mode = GET_MODE (expr); | |
517 | if (mode == VOIDmode) | |
518 | mode = GET_MODE (SET_DEST (set)); | |
e42e3d15 ZC |
519 | |
520 | tmp = find_or_insert_inv (eq, expr, mode, inv); | |
521 | inv->eqto = tmp->invno; | |
522 | ||
523 | if (tmp->invno != inv->invno && inv->always_executed) | |
524 | tmp->eqno++; | |
1052bd54 ZD |
525 | |
526 | if (dump_file && inv->eqto != inv->invno) | |
527 | fprintf (dump_file, | |
e755fcf5 | 528 | "Invariant %d is equivalent to invariant %d.\n", |
1052bd54 ZD |
529 | inv->invno, inv->eqto); |
530 | } | |
531 | ||
532 | /* Find invariants with the same value and record the equivalences. */ | |
533 | ||
534 | static void | |
535 | merge_identical_invariants (void) | |
536 | { | |
537 | unsigned i; | |
538 | struct invariant *inv; | |
c203e8a7 | 539 | invariant_htab_type eq (invariants.length ()); |
1052bd54 | 540 | |
9771b263 | 541 | FOR_EACH_VEC_ELT (invariants, i, inv) |
c203e8a7 | 542 | find_identical_invariants (&eq, inv); |
1052bd54 ZD |
543 | } |
544 | ||
5e962776 ZD |
545 | /* Determines the basic blocks inside LOOP that are always executed and |
546 | stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of | |
547 | basic blocks that may either exit the loop, or contain the call that | |
548 | does not have to return. BODY is body of the loop obtained by | |
549 | get_loop_body_in_dom_order. */ | |
550 | ||
551 | static void | |
552 | compute_always_reached (struct loop *loop, basic_block *body, | |
553 | bitmap may_exit, bitmap always_reached) | |
554 | { | |
555 | unsigned i; | |
556 | ||
557 | for (i = 0; i < loop->num_nodes; i++) | |
558 | { | |
559 | if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i])) | |
560 | bitmap_set_bit (always_reached, i); | |
561 | ||
562 | if (bitmap_bit_p (may_exit, i)) | |
563 | return; | |
564 | } | |
565 | } | |
566 | ||
567 | /* Finds exits out of the LOOP with body BODY. Marks blocks in that we may | |
568 | exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT | |
569 | additionally mark blocks that may exit due to a call. */ | |
570 | ||
571 | static void | |
572 | find_exits (struct loop *loop, basic_block *body, | |
573 | bitmap may_exit, bitmap has_exit) | |
574 | { | |
575 | unsigned i; | |
628f6a4e | 576 | edge_iterator ei; |
5e962776 ZD |
577 | edge e; |
578 | struct loop *outermost_exit = loop, *aexit; | |
579 | bool has_call = false; | |
89bfd6f5 | 580 | rtx_insn *insn; |
5e962776 ZD |
581 | |
582 | for (i = 0; i < loop->num_nodes; i++) | |
583 | { | |
584 | if (body[i]->loop_father == loop) | |
585 | { | |
586 | FOR_BB_INSNS (body[i], insn) | |
587 | { | |
4b4bf941 | 588 | if (CALL_P (insn) |
becfd6e5 KZ |
589 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
590 | || !RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
591 | { |
592 | has_call = true; | |
593 | bitmap_set_bit (may_exit, i); | |
594 | break; | |
595 | } | |
596 | } | |
597 | ||
628f6a4e | 598 | FOR_EACH_EDGE (e, ei, body[i]->succs) |
5e962776 ZD |
599 | { |
600 | if (flow_bb_inside_loop_p (loop, e->dest)) | |
601 | continue; | |
602 | ||
603 | bitmap_set_bit (may_exit, i); | |
604 | bitmap_set_bit (has_exit, i); | |
605 | outermost_exit = find_common_loop (outermost_exit, | |
606 | e->dest->loop_father); | |
607 | } | |
608 | continue; | |
609 | } | |
cb20f7e8 | 610 | |
5e962776 ZD |
611 | /* Use the data stored for the subloop to decide whether we may exit |
612 | through it. It is sufficient to do this for header of the loop, | |
613 | as other basic blocks inside it must be dominated by it. */ | |
614 | if (body[i]->loop_father->header != body[i]) | |
615 | continue; | |
616 | ||
617 | if (LOOP_DATA (body[i]->loop_father)->has_call) | |
618 | { | |
619 | has_call = true; | |
620 | bitmap_set_bit (may_exit, i); | |
621 | } | |
622 | aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit; | |
623 | if (aexit != loop) | |
624 | { | |
625 | bitmap_set_bit (may_exit, i); | |
626 | bitmap_set_bit (has_exit, i); | |
627 | ||
628 | if (flow_loop_nested_p (aexit, outermost_exit)) | |
629 | outermost_exit = aexit; | |
630 | } | |
631 | } | |
632 | ||
1833192f VM |
633 | if (loop->aux == NULL) |
634 | { | |
635 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
636 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
637 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
638 | } | |
5e962776 ZD |
639 | LOOP_DATA (loop)->outermost_exit = outermost_exit; |
640 | LOOP_DATA (loop)->has_call = has_call; | |
641 | } | |
642 | ||
643 | /* Check whether we may assign a value to X from a register. */ | |
644 | ||
645 | static bool | |
646 | may_assign_reg_p (rtx x) | |
647 | { | |
bd361d85 | 648 | return (GET_MODE (x) != VOIDmode |
4b06592a | 649 | && GET_MODE (x) != BLKmode |
bd361d85 | 650 | && can_copy_p (GET_MODE (x)) |
a7f4ccb1 SB |
651 | && (!REG_P (x) |
652 | || !HARD_REGISTER_P (x) | |
653 | || REGNO_REG_CLASS (REGNO (x)) != NO_REGS)); | |
5e962776 ZD |
654 | } |
655 | ||
cb20f7e8 ZD |
656 | /* Finds definitions that may correspond to invariants in LOOP with body |
657 | BODY. */ | |
5e962776 ZD |
658 | |
659 | static void | |
7be64667 | 660 | find_defs (struct loop *loop) |
5e962776 | 661 | { |
7b19209f SB |
662 | if (dump_file) |
663 | { | |
664 | fprintf (dump_file, | |
665 | "*****starting processing of loop %d ******\n", | |
666 | loop->num); | |
667 | } | |
668 | ||
6fb5fa3c DB |
669 | df_remove_problem (df_chain); |
670 | df_process_deferred_rescans (); | |
671 | df_chain_add_problem (DF_UD_CHAIN); | |
43d56ad7 TP |
672 | df_live_add_problem (); |
673 | df_live_set_all_dirty (); | |
7b19209f | 674 | df_set_flags (DF_RD_PRUNE_DEAD_DEFS); |
7be64667 | 675 | df_analyze_loop (loop); |
7b19209f | 676 | check_invariant_table_size (); |
6fb5fa3c DB |
677 | |
678 | if (dump_file) | |
679 | { | |
ffd640ed | 680 | df_dump_region (dump_file); |
7b19209f SB |
681 | fprintf (dump_file, |
682 | "*****ending processing of loop %d ******\n", | |
683 | loop->num); | |
6fb5fa3c | 684 | } |
5e962776 ZD |
685 | } |
686 | ||
687 | /* Creates a new invariant for definition DEF in INSN, depending on invariants | |
688 | in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed, | |
1052bd54 ZD |
689 | unless the program ends due to a function call. The newly created invariant |
690 | is returned. */ | |
5e962776 | 691 | |
1052bd54 | 692 | static struct invariant * |
89bfd6f5 | 693 | create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on, |
5e962776 ZD |
694 | bool always_executed) |
695 | { | |
5ed6ace5 | 696 | struct invariant *inv = XNEW (struct invariant); |
5e962776 | 697 | rtx set = single_set (insn); |
f40751dd | 698 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); |
5e962776 ZD |
699 | |
700 | inv->def = def; | |
701 | inv->always_executed = always_executed; | |
702 | inv->depends_on = depends_on; | |
703 | ||
704 | /* If the set is simple, usually by moving it we move the whole store out of | |
705 | the loop. Otherwise we save only cost of the computation. */ | |
706 | if (def) | |
1bfdbb29 | 707 | { |
d51102f3 | 708 | inv->cost = set_rtx_cost (set, speed); |
1578e910 MM |
709 | /* ??? Try to determine cheapness of address computation. Unfortunately |
710 | the address cost is only a relative measure, we can't really compare | |
711 | it with any absolute number, but only with other address costs. | |
712 | But here we don't have any other addresses, so compare with a magic | |
713 | number anyway. It has to be large enough to not regress PR33928 | |
714 | (by avoiding to move reg+8,reg+16,reg+24 invariants), but small | |
715 | enough to not regress 410.bwaves either (by still moving reg+reg | |
716 | invariants). | |
717 | See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */ | |
315a349c DS |
718 | if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set)))) |
719 | inv->cheap_address = address_cost (SET_SRC (set), word_mode, | |
720 | ADDR_SPACE_GENERIC, speed) < 3; | |
721 | else | |
722 | inv->cheap_address = false; | |
1bfdbb29 | 723 | } |
5e962776 | 724 | else |
1bfdbb29 | 725 | { |
e548c9df AM |
726 | inv->cost = set_src_cost (SET_SRC (set), GET_MODE (SET_DEST (set)), |
727 | speed); | |
1bfdbb29 PB |
728 | inv->cheap_address = false; |
729 | } | |
5e962776 ZD |
730 | |
731 | inv->move = false; | |
1052bd54 | 732 | inv->reg = NULL_RTX; |
1833192f | 733 | inv->orig_regno = -1; |
5e962776 ZD |
734 | inv->stamp = 0; |
735 | inv->insn = insn; | |
736 | ||
9771b263 | 737 | inv->invno = invariants.length (); |
1052bd54 | 738 | inv->eqto = ~0u; |
e42e3d15 ZC |
739 | |
740 | /* Itself. */ | |
741 | inv->eqno = 1; | |
742 | ||
5e962776 ZD |
743 | if (def) |
744 | def->invno = inv->invno; | |
9771b263 | 745 | invariants.safe_push (inv); |
5e962776 ZD |
746 | |
747 | if (dump_file) | |
748 | { | |
749 | fprintf (dump_file, | |
750 | "Set in insn %d is invariant (%d), cost %d, depends on ", | |
751 | INSN_UID (insn), inv->invno, inv->cost); | |
752 | dump_bitmap (dump_file, inv->depends_on); | |
753 | } | |
1052bd54 ZD |
754 | |
755 | return inv; | |
5e962776 ZD |
756 | } |
757 | ||
192912db BC |
758 | /* Return a canonical version of X for the address, from the point of view, |
759 | that all multiplications are represented as MULT instead of the multiply | |
760 | by a power of 2 being represented as ASHIFT. | |
761 | ||
762 | Callers should prepare a copy of X because this function may modify it | |
763 | in place. */ | |
764 | ||
765 | static void | |
766 | canonicalize_address_mult (rtx x) | |
767 | { | |
768 | subrtx_var_iterator::array_type array; | |
769 | FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) | |
770 | { | |
771 | rtx sub = *iter; | |
772 | ||
773 | if (GET_CODE (sub) == ASHIFT | |
774 | && CONST_INT_P (XEXP (sub, 1)) | |
775 | && INTVAL (XEXP (sub, 1)) < GET_MODE_BITSIZE (GET_MODE (sub)) | |
776 | && INTVAL (XEXP (sub, 1)) >= 0) | |
777 | { | |
778 | HOST_WIDE_INT shift = INTVAL (XEXP (sub, 1)); | |
779 | PUT_CODE (sub, MULT); | |
fecfbfa4 | 780 | XEXP (sub, 1) = gen_int_mode (HOST_WIDE_INT_1 << shift, |
192912db BC |
781 | GET_MODE (sub)); |
782 | iter.skip_subrtxes (); | |
783 | } | |
784 | } | |
785 | } | |
786 | ||
787 | /* Maximum number of sub expressions in address. We set it to | |
788 | a small integer since it's unlikely to have a complicated | |
789 | address expression. */ | |
790 | ||
791 | #define MAX_CANON_ADDR_PARTS (5) | |
792 | ||
793 | /* Collect sub expressions in address X with PLUS as the seperator. | |
794 | Sub expressions are stored in vector ADDR_PARTS. */ | |
795 | ||
796 | static void | |
797 | collect_address_parts (rtx x, vec<rtx> *addr_parts) | |
798 | { | |
799 | subrtx_var_iterator::array_type array; | |
800 | FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) | |
801 | { | |
802 | rtx sub = *iter; | |
803 | ||
804 | if (GET_CODE (sub) != PLUS) | |
805 | { | |
806 | addr_parts->safe_push (sub); | |
807 | iter.skip_subrtxes (); | |
808 | } | |
809 | } | |
810 | } | |
811 | ||
812 | /* Compare function for sorting sub expressions X and Y based on | |
813 | precedence defined for communitive operations. */ | |
814 | ||
815 | static int | |
816 | compare_address_parts (const void *x, const void *y) | |
817 | { | |
818 | const rtx *rx = (const rtx *)x; | |
819 | const rtx *ry = (const rtx *)y; | |
820 | int px = commutative_operand_precedence (*rx); | |
821 | int py = commutative_operand_precedence (*ry); | |
822 | ||
823 | return (py - px); | |
824 | } | |
825 | ||
826 | /* Return a canonical version address for X by following steps: | |
827 | 1) Rewrite ASHIFT into MULT recursively. | |
828 | 2) Divide address into sub expressions with PLUS as the | |
829 | separator. | |
830 | 3) Sort sub expressions according to precedence defined | |
831 | for communative operations. | |
832 | 4) Simplify CONST_INT_P sub expressions. | |
833 | 5) Create new canonicalized address and return. | |
834 | Callers should prepare a copy of X because this function may | |
835 | modify it in place. */ | |
836 | ||
837 | static rtx | |
838 | canonicalize_address (rtx x) | |
839 | { | |
840 | rtx res; | |
841 | unsigned int i, j; | |
842 | machine_mode mode = GET_MODE (x); | |
843 | auto_vec<rtx, MAX_CANON_ADDR_PARTS> addr_parts; | |
844 | ||
845 | /* Rewrite ASHIFT into MULT. */ | |
846 | canonicalize_address_mult (x); | |
847 | /* Divide address into sub expressions. */ | |
848 | collect_address_parts (x, &addr_parts); | |
849 | /* Unlikely to have very complicated address. */ | |
850 | if (addr_parts.length () < 2 | |
851 | || addr_parts.length () > MAX_CANON_ADDR_PARTS) | |
852 | return x; | |
853 | ||
854 | /* Sort sub expressions according to canonicalization precedence. */ | |
855 | addr_parts.qsort (compare_address_parts); | |
856 | ||
857 | /* Simplify all constant int summary if possible. */ | |
858 | for (i = 0; i < addr_parts.length (); i++) | |
859 | if (CONST_INT_P (addr_parts[i])) | |
860 | break; | |
861 | ||
862 | for (j = i + 1; j < addr_parts.length (); j++) | |
863 | { | |
864 | gcc_assert (CONST_INT_P (addr_parts[j])); | |
865 | addr_parts[i] = simplify_gen_binary (PLUS, mode, | |
866 | addr_parts[i], | |
867 | addr_parts[j]); | |
868 | } | |
869 | ||
870 | /* Chain PLUS operators to the left for !CONST_INT_P sub expressions. */ | |
871 | res = addr_parts[0]; | |
872 | for (j = 1; j < i; j++) | |
873 | res = simplify_gen_binary (PLUS, mode, res, addr_parts[j]); | |
874 | ||
875 | /* Pickup the last CONST_INT_P sub expression. */ | |
876 | if (i < addr_parts.length ()) | |
877 | res = simplify_gen_binary (PLUS, mode, res, addr_parts[i]); | |
878 | ||
879 | return res; | |
880 | } | |
881 | ||
5b92e189 BC |
882 | /* Given invariant DEF and its address USE, check if the corresponding |
883 | invariant expr can be propagated into the use or not. */ | |
884 | ||
885 | static bool | |
886 | inv_can_prop_to_addr_use (struct def *def, df_ref use) | |
887 | { | |
888 | struct invariant *inv; | |
192912db | 889 | rtx *pos = DF_REF_REAL_LOC (use), def_set, use_set; |
5b92e189 BC |
890 | rtx_insn *use_insn = DF_REF_INSN (use); |
891 | rtx_insn *def_insn; | |
892 | bool ok; | |
893 | ||
894 | inv = invariants[def->invno]; | |
895 | /* No need to check if address expression is expensive. */ | |
896 | if (!inv->cheap_address) | |
897 | return false; | |
898 | ||
899 | def_insn = inv->insn; | |
900 | def_set = single_set (def_insn); | |
901 | if (!def_set) | |
902 | return false; | |
903 | ||
904 | validate_unshare_change (use_insn, pos, SET_SRC (def_set), true); | |
905 | ok = verify_changes (0); | |
192912db BC |
906 | /* Try harder with canonicalization in address expression. */ |
907 | if (!ok && (use_set = single_set (use_insn)) != NULL_RTX) | |
908 | { | |
909 | rtx src, dest, mem = NULL_RTX; | |
910 | ||
911 | src = SET_SRC (use_set); | |
912 | dest = SET_DEST (use_set); | |
913 | if (MEM_P (src)) | |
914 | mem = src; | |
915 | else if (MEM_P (dest)) | |
916 | mem = dest; | |
917 | ||
918 | if (mem != NULL_RTX | |
919 | && !memory_address_addr_space_p (GET_MODE (mem), | |
920 | XEXP (mem, 0), | |
921 | MEM_ADDR_SPACE (mem))) | |
922 | { | |
923 | rtx addr = canonicalize_address (copy_rtx (XEXP (mem, 0))); | |
924 | if (memory_address_addr_space_p (GET_MODE (mem), | |
925 | addr, MEM_ADDR_SPACE (mem))) | |
926 | ok = true; | |
927 | } | |
928 | } | |
5b92e189 BC |
929 | cancel_changes (0); |
930 | return ok; | |
931 | } | |
932 | ||
5e962776 ZD |
933 | /* Record USE at DEF. */ |
934 | ||
935 | static void | |
1bfdbb29 | 936 | record_use (struct def *def, df_ref use) |
5e962776 | 937 | { |
5ed6ace5 | 938 | struct use *u = XNEW (struct use); |
5e962776 | 939 | |
1bfdbb29 PB |
940 | u->pos = DF_REF_REAL_LOC (use); |
941 | u->insn = DF_REF_INSN (use); | |
942 | u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD | |
3e807ffc | 943 | || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE); |
5e962776 ZD |
944 | u->next = def->uses; |
945 | def->uses = u; | |
946 | def->n_uses++; | |
1bfdbb29 | 947 | if (u->addr_use_p) |
5b92e189 BC |
948 | { |
949 | /* Initialize propagation information if this is the first addr | |
950 | use of the inv def. */ | |
951 | if (def->n_addr_uses == 0) | |
952 | def->can_prop_to_addr_uses = true; | |
953 | ||
954 | def->n_addr_uses++; | |
955 | if (def->can_prop_to_addr_uses && !inv_can_prop_to_addr_use (def, use)) | |
956 | def->can_prop_to_addr_uses = false; | |
957 | } | |
5e962776 ZD |
958 | } |
959 | ||
6fb5fa3c DB |
960 | /* Finds the invariants USE depends on and store them to the DEPENDS_ON |
961 | bitmap. Returns true if all dependencies of USE are known to be | |
b6c9b9bc | 962 | loop invariants, false otherwise. */ |
5e962776 ZD |
963 | |
964 | static bool | |
57512f53 | 965 | check_dependency (basic_block bb, df_ref use, bitmap depends_on) |
5e962776 | 966 | { |
57512f53 | 967 | df_ref def; |
6fb5fa3c | 968 | basic_block def_bb; |
4d779342 | 969 | struct df_link *defs; |
5e962776 | 970 | struct def *def_data; |
1052bd54 | 971 | struct invariant *inv; |
b8698a0f | 972 | |
57512f53 | 973 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
6fb5fa3c | 974 | return false; |
b8698a0f | 975 | |
6fb5fa3c DB |
976 | defs = DF_REF_CHAIN (use); |
977 | if (!defs) | |
1a17bd35 EB |
978 | { |
979 | unsigned int regno = DF_REF_REGNO (use); | |
980 | ||
981 | /* If this is the use of an uninitialized argument register that is | |
982 | likely to be spilled, do not move it lest this might extend its | |
983 | lifetime and cause reload to die. This can occur for a call to | |
984 | a function taking complex number arguments and moving the insns | |
985 | preparing the arguments without moving the call itself wouldn't | |
986 | gain much in practice. */ | |
987 | if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE) | |
988 | && FUNCTION_ARG_REGNO_P (regno) | |
989 | && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) | |
990 | return false; | |
991 | ||
992 | return true; | |
993 | } | |
b8698a0f | 994 | |
6fb5fa3c DB |
995 | if (defs->next) |
996 | return false; | |
b8698a0f | 997 | |
6fb5fa3c DB |
998 | def = defs->ref; |
999 | check_invariant_table_size (); | |
c3284718 | 1000 | inv = invariant_table[DF_REF_ID (def)]; |
6fb5fa3c DB |
1001 | if (!inv) |
1002 | return false; | |
b8698a0f | 1003 | |
6fb5fa3c DB |
1004 | def_data = inv->def; |
1005 | gcc_assert (def_data != NULL); | |
b8698a0f | 1006 | |
6fb5fa3c DB |
1007 | def_bb = DF_REF_BB (def); |
1008 | /* Note that in case bb == def_bb, we know that the definition | |
1009 | dominates insn, because def has invariant_table[DF_REF_ID(def)] | |
1010 | defined and we process the insns in the basic block bb | |
1011 | sequentially. */ | |
1012 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
1013 | return false; | |
b8698a0f | 1014 | |
6fb5fa3c DB |
1015 | bitmap_set_bit (depends_on, def_data->invno); |
1016 | return true; | |
1017 | } | |
1052bd54 | 1018 | |
1052bd54 | 1019 | |
6fb5fa3c DB |
1020 | /* Finds the invariants INSN depends on and store them to the DEPENDS_ON |
1021 | bitmap. Returns true if all dependencies of INSN are known to be | |
1022 | loop invariants, false otherwise. */ | |
5e962776 | 1023 | |
6fb5fa3c | 1024 | static bool |
89bfd6f5 | 1025 | check_dependencies (rtx_insn *insn, bitmap depends_on) |
6fb5fa3c | 1026 | { |
50e94c7e | 1027 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 1028 | df_ref use; |
6fb5fa3c | 1029 | basic_block bb = BLOCK_FOR_INSN (insn); |
5e962776 | 1030 | |
bfac633a RS |
1031 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
1032 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 1033 | return false; |
bfac633a RS |
1034 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
1035 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 1036 | return false; |
b8698a0f | 1037 | |
5e962776 ZD |
1038 | return true; |
1039 | } | |
1040 | ||
2c97f472 ZC |
1041 | /* Pre-check candidate DEST to skip the one which can not make a valid insn |
1042 | during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */ | |
1043 | static bool | |
1044 | pre_check_invariant_p (bool simple, rtx dest) | |
1045 | { | |
1046 | if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1) | |
1047 | { | |
1048 | df_ref use; | |
2c97f472 ZC |
1049 | unsigned int i = REGNO (dest); |
1050 | struct df_insn_info *insn_info; | |
1051 | df_ref def_rec; | |
1052 | ||
1053 | for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use)) | |
1054 | { | |
e67d1102 | 1055 | rtx_insn *ref = DF_REF_INSN (use); |
2c97f472 ZC |
1056 | insn_info = DF_INSN_INFO_GET (ref); |
1057 | ||
1058 | FOR_EACH_INSN_INFO_DEF (def_rec, insn_info) | |
1059 | if (DF_REF_REGNO (def_rec) == i) | |
1060 | { | |
1061 | /* Multi definitions at this stage, most likely are due to | |
1062 | instruction constraints, which requires both read and write | |
1063 | on the same register. Since move_invariant_reg is not | |
1064 | powerful enough to handle such cases, just ignore the INV | |
1065 | and leave the chance to others. */ | |
1066 | return false; | |
1067 | } | |
1068 | } | |
1069 | } | |
1070 | return true; | |
1071 | } | |
1072 | ||
5e962776 ZD |
1073 | /* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always |
1074 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 1075 | unless the program ends due to a function call. */ |
5e962776 ZD |
1076 | |
1077 | static void | |
89bfd6f5 | 1078 | find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 1079 | { |
57512f53 | 1080 | df_ref ref; |
5e962776 ZD |
1081 | struct def *def; |
1082 | bitmap depends_on; | |
1083 | rtx set, dest; | |
1084 | bool simple = true; | |
1052bd54 | 1085 | struct invariant *inv; |
5e962776 | 1086 | |
00f70f98 | 1087 | /* We can't move a CC0 setter without the user. */ |
058eb3b0 | 1088 | if (HAVE_cc0 && sets_cc0_p (insn)) |
00f70f98 | 1089 | return; |
00f70f98 | 1090 | |
5e962776 ZD |
1091 | set = single_set (insn); |
1092 | if (!set) | |
1093 | return; | |
1094 | dest = SET_DEST (set); | |
1095 | ||
2ca202e7 | 1096 | if (!REG_P (dest) |
5e962776 ZD |
1097 | || HARD_REGISTER_P (dest)) |
1098 | simple = false; | |
1099 | ||
2c97f472 ZC |
1100 | if (!may_assign_reg_p (dest) |
1101 | || !pre_check_invariant_p (simple, dest) | |
a7f4ccb1 | 1102 | || !check_maybe_invariant (SET_SRC (set))) |
5e962776 ZD |
1103 | return; |
1104 | ||
28749cfb ZD |
1105 | /* If the insn can throw exception, we cannot move it at all without changing |
1106 | cfg. */ | |
1107 | if (can_throw_internal (insn)) | |
1108 | return; | |
5e962776 | 1109 | |
28749cfb | 1110 | /* We cannot make trapping insn executed, unless it was executed before. */ |
48e8382e | 1111 | if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached) |
28749cfb | 1112 | return; |
5e962776 | 1113 | |
8bdbfff5 | 1114 | depends_on = BITMAP_ALLOC (NULL); |
cb20f7e8 | 1115 | if (!check_dependencies (insn, depends_on)) |
5e962776 | 1116 | { |
8bdbfff5 | 1117 | BITMAP_FREE (depends_on); |
5e962776 ZD |
1118 | return; |
1119 | } | |
1120 | ||
1121 | if (simple) | |
5ed6ace5 | 1122 | def = XCNEW (struct def); |
5e962776 ZD |
1123 | else |
1124 | def = NULL; | |
1125 | ||
1052bd54 ZD |
1126 | inv = create_new_invariant (def, insn, depends_on, always_executed); |
1127 | ||
1128 | if (simple) | |
1129 | { | |
6fb5fa3c DB |
1130 | ref = df_find_def (insn, dest); |
1131 | check_invariant_table_size (); | |
c3284718 | 1132 | invariant_table[DF_REF_ID (ref)] = inv; |
1052bd54 | 1133 | } |
5e962776 ZD |
1134 | } |
1135 | ||
cb20f7e8 | 1136 | /* Record registers used in INSN that have a unique invariant definition. */ |
5e962776 ZD |
1137 | |
1138 | static void | |
89bfd6f5 | 1139 | record_uses (rtx_insn *insn) |
5e962776 | 1140 | { |
50e94c7e | 1141 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 1142 | df_ref use; |
1052bd54 ZD |
1143 | struct invariant *inv; |
1144 | ||
bfac633a | 1145 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
6fb5fa3c | 1146 | { |
6fb5fa3c DB |
1147 | inv = invariant_for_use (use); |
1148 | if (inv) | |
1bfdbb29 | 1149 | record_use (inv->def, use); |
6fb5fa3c | 1150 | } |
bfac633a | 1151 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
5e962776 | 1152 | { |
1052bd54 ZD |
1153 | inv = invariant_for_use (use); |
1154 | if (inv) | |
1bfdbb29 | 1155 | record_use (inv->def, use); |
5e962776 ZD |
1156 | } |
1157 | } | |
1158 | ||
1159 | /* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always | |
1160 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 1161 | unless the program ends due to a function call. */ |
5e962776 ZD |
1162 | |
1163 | static void | |
89bfd6f5 | 1164 | find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 1165 | { |
cb20f7e8 ZD |
1166 | find_invariant_insn (insn, always_reached, always_executed); |
1167 | record_uses (insn); | |
5e962776 ZD |
1168 | } |
1169 | ||
1170 | /* Finds invariants in basic block BB. ALWAYS_REACHED is true if the | |
1171 | basic block is always executed. ALWAYS_EXECUTED is true if the basic | |
1172 | block is always executed, unless the program ends due to a function | |
cb20f7e8 | 1173 | call. */ |
5e962776 ZD |
1174 | |
1175 | static void | |
cb20f7e8 | 1176 | find_invariants_bb (basic_block bb, bool always_reached, bool always_executed) |
5e962776 | 1177 | { |
89bfd6f5 | 1178 | rtx_insn *insn; |
5e962776 ZD |
1179 | |
1180 | FOR_BB_INSNS (bb, insn) | |
1181 | { | |
b5b8b0ac | 1182 | if (!NONDEBUG_INSN_P (insn)) |
5e962776 ZD |
1183 | continue; |
1184 | ||
cb20f7e8 | 1185 | find_invariants_insn (insn, always_reached, always_executed); |
5e962776 ZD |
1186 | |
1187 | if (always_reached | |
4b4bf941 | 1188 | && CALL_P (insn) |
becfd6e5 KZ |
1189 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
1190 | || ! RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
1191 | always_reached = false; |
1192 | } | |
1193 | } | |
1194 | ||
1195 | /* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of | |
1196 | basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the | |
1197 | bitmap of basic blocks in BODY that are always executed unless the program | |
cb20f7e8 | 1198 | ends due to a function call. */ |
5e962776 ZD |
1199 | |
1200 | static void | |
1201 | find_invariants_body (struct loop *loop, basic_block *body, | |
cb20f7e8 | 1202 | bitmap always_reached, bitmap always_executed) |
5e962776 ZD |
1203 | { |
1204 | unsigned i; | |
1205 | ||
1206 | for (i = 0; i < loop->num_nodes; i++) | |
1207 | find_invariants_bb (body[i], | |
1208 | bitmap_bit_p (always_reached, i), | |
cb20f7e8 | 1209 | bitmap_bit_p (always_executed, i)); |
5e962776 ZD |
1210 | } |
1211 | ||
cb20f7e8 | 1212 | /* Finds invariants in LOOP. */ |
5e962776 ZD |
1213 | |
1214 | static void | |
cb20f7e8 | 1215 | find_invariants (struct loop *loop) |
5e962776 | 1216 | { |
8bdbfff5 NS |
1217 | bitmap may_exit = BITMAP_ALLOC (NULL); |
1218 | bitmap always_reached = BITMAP_ALLOC (NULL); | |
1219 | bitmap has_exit = BITMAP_ALLOC (NULL); | |
1220 | bitmap always_executed = BITMAP_ALLOC (NULL); | |
5e962776 ZD |
1221 | basic_block *body = get_loop_body_in_dom_order (loop); |
1222 | ||
1223 | find_exits (loop, body, may_exit, has_exit); | |
1224 | compute_always_reached (loop, body, may_exit, always_reached); | |
1225 | compute_always_reached (loop, body, has_exit, always_executed); | |
1226 | ||
7be64667 | 1227 | find_defs (loop); |
cb20f7e8 | 1228 | find_invariants_body (loop, body, always_reached, always_executed); |
1052bd54 | 1229 | merge_identical_invariants (); |
5e962776 | 1230 | |
8bdbfff5 NS |
1231 | BITMAP_FREE (always_reached); |
1232 | BITMAP_FREE (always_executed); | |
1233 | BITMAP_FREE (may_exit); | |
1234 | BITMAP_FREE (has_exit); | |
5e962776 ZD |
1235 | free (body); |
1236 | } | |
1237 | ||
1238 | /* Frees a list of uses USE. */ | |
1239 | ||
1240 | static void | |
1241 | free_use_list (struct use *use) | |
1242 | { | |
1243 | struct use *next; | |
1244 | ||
1245 | for (; use; use = next) | |
1246 | { | |
1247 | next = use->next; | |
1248 | free (use); | |
1249 | } | |
1250 | } | |
1251 | ||
1756cb66 | 1252 | /* Return pressure class and number of hard registers (through *NREGS) |
1833192f VM |
1253 | for destination of INSN. */ |
1254 | static enum reg_class | |
89bfd6f5 | 1255 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1833192f VM |
1256 | { |
1257 | rtx reg; | |
1756cb66 | 1258 | enum reg_class pressure_class; |
1833192f | 1259 | rtx set = single_set (insn); |
b8698a0f | 1260 | |
1833192f VM |
1261 | /* Considered invariant insns have only one set. */ |
1262 | gcc_assert (set != NULL_RTX); | |
1263 | reg = SET_DEST (set); | |
1264 | if (GET_CODE (reg) == SUBREG) | |
1265 | reg = SUBREG_REG (reg); | |
1266 | if (MEM_P (reg)) | |
1267 | { | |
1268 | *nregs = 0; | |
1756cb66 | 1269 | pressure_class = NO_REGS; |
1833192f VM |
1270 | } |
1271 | else | |
1272 | { | |
1273 | if (! REG_P (reg)) | |
1274 | reg = NULL_RTX; | |
1275 | if (reg == NULL_RTX) | |
1756cb66 | 1276 | pressure_class = GENERAL_REGS; |
1833192f | 1277 | else |
1756cb66 VM |
1278 | { |
1279 | pressure_class = reg_allocno_class (REGNO (reg)); | |
1280 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1281 | } | |
1282 | *nregs | |
1283 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
1833192f | 1284 | } |
1756cb66 | 1285 | return pressure_class; |
1833192f VM |
1286 | } |
1287 | ||
5e962776 | 1288 | /* Calculates cost and number of registers needed for moving invariant INV |
51a69168 ZC |
1289 | out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be |
1290 | the REG_CLASS of INV. Return | |
1291 | -1: if INV is invalid. | |
1292 | 0: if INV and its depends_on have same reg_class | |
1293 | 1: if INV and its depends_on have different reg_classes. */ | |
5e962776 | 1294 | |
51a69168 ZC |
1295 | static int |
1296 | get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed, | |
1297 | enum reg_class *cl) | |
5e962776 | 1298 | { |
1833192f VM |
1299 | int i, acomp_cost; |
1300 | unsigned aregs_needed[N_REG_CLASSES]; | |
5e962776 ZD |
1301 | unsigned depno; |
1302 | struct invariant *dep; | |
87c476a2 | 1303 | bitmap_iterator bi; |
51a69168 | 1304 | int ret = 1; |
5e962776 | 1305 | |
1052bd54 | 1306 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1307 | inv = invariants[inv->eqto]; |
1052bd54 | 1308 | |
5e962776 | 1309 | *comp_cost = 0; |
1833192f VM |
1310 | if (! flag_ira_loop_pressure) |
1311 | regs_needed[0] = 0; | |
1312 | else | |
1313 | { | |
1756cb66 VM |
1314 | for (i = 0; i < ira_pressure_classes_num; i++) |
1315 | regs_needed[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1316 | } |
1317 | ||
5e962776 ZD |
1318 | if (inv->move |
1319 | || inv->stamp == actual_stamp) | |
51a69168 | 1320 | return -1; |
5e962776 ZD |
1321 | inv->stamp = actual_stamp; |
1322 | ||
1833192f VM |
1323 | if (! flag_ira_loop_pressure) |
1324 | regs_needed[0]++; | |
1325 | else | |
1326 | { | |
1327 | int nregs; | |
1756cb66 | 1328 | enum reg_class pressure_class; |
1833192f | 1329 | |
1756cb66 VM |
1330 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1331 | regs_needed[pressure_class] += nregs; | |
51a69168 ZC |
1332 | *cl = pressure_class; |
1333 | ret = 0; | |
1833192f VM |
1334 | } |
1335 | ||
1bfdbb29 | 1336 | if (!inv->cheap_address |
315a349c | 1337 | || inv->def->n_uses == 0 |
5b92e189 BC |
1338 | || inv->def->n_addr_uses < inv->def->n_uses |
1339 | /* Count cost if the inv can't be propagated into address uses. */ | |
1340 | || !inv->def->can_prop_to_addr_uses) | |
e42e3d15 | 1341 | (*comp_cost) += inv->cost * inv->eqno; |
5e962776 | 1342 | |
3d8504ac RS |
1343 | #ifdef STACK_REGS |
1344 | { | |
1345 | /* Hoisting constant pool constants into stack regs may cost more than | |
1346 | just single register. On x87, the balance is affected both by the | |
c0220ea4 | 1347 | small number of FP registers, and by its register stack organization, |
3d8504ac RS |
1348 | that forces us to add compensation code in and around the loop to |
1349 | shuffle the operands to the top of stack before use, and pop them | |
1350 | from the stack after the loop finishes. | |
1351 | ||
1352 | To model this effect, we increase the number of registers needed for | |
1353 | stack registers by two: one register push, and one register pop. | |
1354 | This usually has the effect that FP constant loads from the constant | |
1355 | pool are not moved out of the loop. | |
1356 | ||
1357 | Note that this also means that dependent invariants can not be moved. | |
1358 | However, the primary purpose of this pass is to move loop invariant | |
1359 | address arithmetic out of loops, and address arithmetic that depends | |
1360 | on floating point constants is unlikely to ever occur. */ | |
1361 | rtx set = single_set (inv->insn); | |
1362 | if (set | |
1833192f VM |
1363 | && IS_STACK_MODE (GET_MODE (SET_SRC (set))) |
1364 | && constant_pool_constant_p (SET_SRC (set))) | |
1365 | { | |
1366 | if (flag_ira_loop_pressure) | |
1756cb66 | 1367 | regs_needed[ira_stack_reg_pressure_class] += 2; |
1833192f VM |
1368 | else |
1369 | regs_needed[0] += 2; | |
1370 | } | |
3d8504ac RS |
1371 | } |
1372 | #endif | |
1373 | ||
87c476a2 | 1374 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) |
5e962776 | 1375 | { |
1833192f | 1376 | bool check_p; |
51a69168 ZC |
1377 | enum reg_class dep_cl = ALL_REGS; |
1378 | int dep_ret; | |
1833192f | 1379 | |
9771b263 | 1380 | dep = invariants[depno]; |
5e962776 | 1381 | |
61fc05c7 ZC |
1382 | /* If DEP is moved out of the loop, it is not a depends_on any more. */ |
1383 | if (dep->move) | |
1384 | continue; | |
1385 | ||
51a69168 | 1386 | dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl); |
5e962776 | 1387 | |
1833192f VM |
1388 | if (! flag_ira_loop_pressure) |
1389 | check_p = aregs_needed[0] != 0; | |
1390 | else | |
1391 | { | |
1756cb66 VM |
1392 | for (i = 0; i < ira_pressure_classes_num; i++) |
1393 | if (aregs_needed[ira_pressure_classes[i]] != 0) | |
1833192f | 1394 | break; |
1756cb66 | 1395 | check_p = i < ira_pressure_classes_num; |
51a69168 ZC |
1396 | |
1397 | if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl))) | |
1398 | { | |
1399 | *cl = ALL_REGS; | |
1400 | ret = 1; | |
1401 | } | |
1833192f VM |
1402 | } |
1403 | if (check_p | |
5e962776 ZD |
1404 | /* We need to check always_executed, since if the original value of |
1405 | the invariant may be preserved, we may need to keep it in a | |
1406 | separate register. TODO check whether the register has an | |
1407 | use outside of the loop. */ | |
1408 | && dep->always_executed | |
1409 | && !dep->def->uses->next) | |
1410 | { | |
1411 | /* If this is a single use, after moving the dependency we will not | |
1412 | need a new register. */ | |
1833192f VM |
1413 | if (! flag_ira_loop_pressure) |
1414 | aregs_needed[0]--; | |
1415 | else | |
1416 | { | |
1417 | int nregs; | |
1756cb66 | 1418 | enum reg_class pressure_class; |
1833192f | 1419 | |
1756cb66 VM |
1420 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1421 | aregs_needed[pressure_class] -= nregs; | |
1833192f | 1422 | } |
5e962776 ZD |
1423 | } |
1424 | ||
1833192f VM |
1425 | if (! flag_ira_loop_pressure) |
1426 | regs_needed[0] += aregs_needed[0]; | |
1427 | else | |
1428 | { | |
1756cb66 VM |
1429 | for (i = 0; i < ira_pressure_classes_num; i++) |
1430 | regs_needed[ira_pressure_classes[i]] | |
1431 | += aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1432 | } |
5e962776 | 1433 | (*comp_cost) += acomp_cost; |
87c476a2 | 1434 | } |
51a69168 | 1435 | return ret; |
5e962776 ZD |
1436 | } |
1437 | ||
1438 | /* Calculates gain for eliminating invariant INV. REGS_USED is the number | |
a154b43a ZD |
1439 | of registers used in the loop, NEW_REGS is the number of new variables |
1440 | already added due to the invariant motion. The number of registers needed | |
bec922f0 SL |
1441 | for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed |
1442 | through to estimate_reg_pressure_cost. */ | |
5e962776 ZD |
1443 | |
1444 | static int | |
1445 | gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | |
bec922f0 SL |
1446 | unsigned *new_regs, unsigned regs_used, |
1447 | bool speed, bool call_p) | |
5e962776 ZD |
1448 | { |
1449 | int comp_cost, size_cost; | |
e54bd4ab JJ |
1450 | /* Workaround -Wmaybe-uninitialized false positive during |
1451 | profiledbootstrap by initializing it. */ | |
1452 | enum reg_class cl = NO_REGS; | |
51a69168 | 1453 | int ret; |
5e962776 | 1454 | |
5e962776 ZD |
1455 | actual_stamp++; |
1456 | ||
51a69168 | 1457 | ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl); |
1833192f VM |
1458 | |
1459 | if (! flag_ira_loop_pressure) | |
1460 | { | |
1461 | size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], | |
bec922f0 | 1462 | regs_used, speed, call_p) |
1833192f | 1463 | - estimate_reg_pressure_cost (new_regs[0], |
bec922f0 | 1464 | regs_used, speed, call_p)); |
1833192f | 1465 | } |
51a69168 ZC |
1466 | else if (ret < 0) |
1467 | return -1; | |
1468 | else if ((ret == 0) && (cl == NO_REGS)) | |
1469 | /* Hoist it anyway since it does not impact register pressure. */ | |
1470 | return 1; | |
1833192f VM |
1471 | else |
1472 | { | |
1473 | int i; | |
1756cb66 | 1474 | enum reg_class pressure_class; |
1833192f | 1475 | |
1756cb66 | 1476 | for (i = 0; i < ira_pressure_classes_num; i++) |
1833192f | 1477 | { |
1756cb66 | 1478 | pressure_class = ira_pressure_classes[i]; |
51a69168 ZC |
1479 | |
1480 | if (!reg_classes_intersect_p (pressure_class, cl)) | |
1481 | continue; | |
1482 | ||
1756cb66 VM |
1483 | if ((int) new_regs[pressure_class] |
1484 | + (int) regs_needed[pressure_class] | |
1485 | + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1833192f | 1486 | + IRA_LOOP_RESERVED_REGS |
f508f827 | 1487 | > ira_class_hard_regs_num[pressure_class]) |
1833192f VM |
1488 | break; |
1489 | } | |
1756cb66 | 1490 | if (i < ira_pressure_classes_num) |
1833192f VM |
1491 | /* There will be register pressure excess and we want not to |
1492 | make this loop invariant motion. All loop invariants with | |
1493 | non-positive gains will be rejected in function | |
1494 | find_invariants_to_move. Therefore we return the negative | |
1495 | number here. | |
1496 | ||
1497 | One could think that this rejects also expensive loop | |
1498 | invariant motions and this will hurt code performance. | |
1499 | However numerous experiments with different heuristics | |
1500 | taking invariant cost into account did not confirm this | |
1501 | assumption. There are possible explanations for this | |
1502 | result: | |
1503 | o probably all expensive invariants were already moved out | |
1504 | of the loop by PRE and gimple invariant motion pass. | |
1505 | o expensive invariant execution will be hidden by insn | |
1506 | scheduling or OOO processor hardware because usually such | |
1507 | invariants have a lot of freedom to be executed | |
1508 | out-of-order. | |
1509 | Another reason for ignoring invariant cost vs spilling cost | |
1510 | heuristics is also in difficulties to evaluate accurately | |
1511 | spill cost at this stage. */ | |
1512 | return -1; | |
1513 | else | |
1514 | size_cost = 0; | |
1515 | } | |
5e962776 ZD |
1516 | |
1517 | return comp_cost - size_cost; | |
1518 | } | |
1519 | ||
1520 | /* Finds invariant with best gain for moving. Returns the gain, stores | |
1521 | the invariant in *BEST and number of registers needed for it to | |
a154b43a ZD |
1522 | *REGS_NEEDED. REGS_USED is the number of registers used in the loop. |
1523 | NEW_REGS is the number of new variables already added due to invariant | |
1524 | motion. */ | |
5e962776 ZD |
1525 | |
1526 | static int | |
1527 | best_gain_for_invariant (struct invariant **best, unsigned *regs_needed, | |
bec922f0 SL |
1528 | unsigned *new_regs, unsigned regs_used, |
1529 | bool speed, bool call_p) | |
5e962776 ZD |
1530 | { |
1531 | struct invariant *inv; | |
1833192f VM |
1532 | int i, gain = 0, again; |
1533 | unsigned aregs_needed[N_REG_CLASSES], invno; | |
5e962776 | 1534 | |
9771b263 | 1535 | FOR_EACH_VEC_ELT (invariants, invno, inv) |
5e962776 | 1536 | { |
5e962776 ZD |
1537 | if (inv->move) |
1538 | continue; | |
1539 | ||
1052bd54 ZD |
1540 | /* Only consider the "representatives" of equivalent invariants. */ |
1541 | if (inv->eqto != inv->invno) | |
1542 | continue; | |
1543 | ||
1833192f | 1544 | again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used, |
bec922f0 | 1545 | speed, call_p); |
5e962776 ZD |
1546 | if (again > gain) |
1547 | { | |
1548 | gain = again; | |
1549 | *best = inv; | |
1833192f VM |
1550 | if (! flag_ira_loop_pressure) |
1551 | regs_needed[0] = aregs_needed[0]; | |
1552 | else | |
1553 | { | |
1756cb66 VM |
1554 | for (i = 0; i < ira_pressure_classes_num; i++) |
1555 | regs_needed[ira_pressure_classes[i]] | |
1556 | = aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1557 | } |
5e962776 ZD |
1558 | } |
1559 | } | |
1560 | ||
1561 | return gain; | |
1562 | } | |
1563 | ||
1564 | /* Marks invariant INVNO and all its dependencies for moving. */ | |
1565 | ||
1566 | static void | |
1833192f | 1567 | set_move_mark (unsigned invno, int gain) |
5e962776 | 1568 | { |
9771b263 | 1569 | struct invariant *inv = invariants[invno]; |
87c476a2 | 1570 | bitmap_iterator bi; |
5e962776 | 1571 | |
1052bd54 | 1572 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1573 | inv = invariants[inv->eqto]; |
1052bd54 | 1574 | |
5e962776 ZD |
1575 | if (inv->move) |
1576 | return; | |
1577 | inv->move = true; | |
1578 | ||
1579 | if (dump_file) | |
1833192f VM |
1580 | { |
1581 | if (gain >= 0) | |
1582 | fprintf (dump_file, "Decided to move invariant %d -- gain %d\n", | |
1583 | invno, gain); | |
1584 | else | |
1585 | fprintf (dump_file, "Decided to move dependent invariant %d\n", | |
1586 | invno); | |
1587 | }; | |
5e962776 | 1588 | |
87c476a2 ZD |
1589 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi) |
1590 | { | |
1833192f | 1591 | set_move_mark (invno, -1); |
87c476a2 | 1592 | } |
5e962776 ZD |
1593 | } |
1594 | ||
cb20f7e8 | 1595 | /* Determines which invariants to move. */ |
5e962776 ZD |
1596 | |
1597 | static void | |
bec922f0 | 1598 | find_invariants_to_move (bool speed, bool call_p) |
5e962776 | 1599 | { |
1833192f VM |
1600 | int gain; |
1601 | unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; | |
5e962776 ZD |
1602 | struct invariant *inv = NULL; |
1603 | ||
9771b263 | 1604 | if (!invariants.length ()) |
5e962776 ZD |
1605 | return; |
1606 | ||
1833192f | 1607 | if (flag_ira_loop_pressure) |
b8698a0f | 1608 | /* REGS_USED is actually never used when the flag is on. */ |
1833192f VM |
1609 | regs_used = 0; |
1610 | else | |
1611 | /* We do not really do a good job in estimating number of | |
1612 | registers used; we put some initial bound here to stand for | |
1613 | induction variables etc. that we do not detect. */ | |
5e962776 | 1614 | { |
1833192f VM |
1615 | unsigned int n_regs = DF_REG_SIZE (df); |
1616 | ||
1617 | regs_used = 2; | |
b8698a0f | 1618 | |
1833192f | 1619 | for (i = 0; i < n_regs; i++) |
5e962776 | 1620 | { |
1833192f VM |
1621 | if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) |
1622 | { | |
1623 | /* This is a value that is used but not changed inside loop. */ | |
1624 | regs_used++; | |
1625 | } | |
5e962776 ZD |
1626 | } |
1627 | } | |
1628 | ||
1833192f VM |
1629 | if (! flag_ira_loop_pressure) |
1630 | new_regs[0] = regs_needed[0] = 0; | |
1631 | else | |
5e962776 | 1632 | { |
1756cb66 VM |
1633 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1634 | new_regs[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1635 | } |
1636 | while ((gain = best_gain_for_invariant (&inv, regs_needed, | |
bec922f0 SL |
1637 | new_regs, regs_used, |
1638 | speed, call_p)) > 0) | |
1833192f VM |
1639 | { |
1640 | set_move_mark (inv->invno, gain); | |
1641 | if (! flag_ira_loop_pressure) | |
1642 | new_regs[0] += regs_needed[0]; | |
1643 | else | |
1644 | { | |
1756cb66 VM |
1645 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1646 | new_regs[ira_pressure_classes[i]] | |
1647 | += regs_needed[ira_pressure_classes[i]]; | |
1833192f | 1648 | } |
5e962776 ZD |
1649 | } |
1650 | } | |
1651 | ||
43ba743c EB |
1652 | /* Replace the uses, reached by the definition of invariant INV, by REG. |
1653 | ||
1654 | IN_GROUP is nonzero if this is part of a group of changes that must be | |
1655 | performed as a group. In that case, the changes will be stored. The | |
1656 | function `apply_change_group' will validate and apply the changes. */ | |
1657 | ||
1658 | static int | |
1659 | replace_uses (struct invariant *inv, rtx reg, bool in_group) | |
1660 | { | |
1661 | /* Replace the uses we know to be dominated. It saves work for copy | |
1662 | propagation, and also it is necessary so that dependent invariants | |
1663 | are computed right. */ | |
1664 | if (inv->def) | |
1665 | { | |
1666 | struct use *use; | |
1667 | for (use = inv->def->uses; use; use = use->next) | |
1668 | validate_change (use->insn, use->pos, reg, true); | |
1669 | ||
1670 | /* If we aren't part of a larger group, apply the changes now. */ | |
1671 | if (!in_group) | |
1672 | return apply_change_group (); | |
1673 | } | |
1674 | ||
1675 | return 1; | |
1676 | } | |
1677 | ||
aa953e2f TP |
1678 | /* Whether invariant INV setting REG can be moved out of LOOP, at the end of |
1679 | the block preceding its header. */ | |
1680 | ||
1681 | static bool | |
1682 | can_move_invariant_reg (struct loop *loop, struct invariant *inv, rtx reg) | |
1683 | { | |
1684 | df_ref def, use; | |
1685 | unsigned int dest_regno, defs_in_loop_count = 0; | |
1686 | rtx_insn *insn = inv->insn; | |
1687 | basic_block bb = BLOCK_FOR_INSN (inv->insn); | |
1688 | ||
1689 | /* We ignore hard register and memory access for cost and complexity reasons. | |
1690 | Hard register are few at this stage and expensive to consider as they | |
1691 | require building a separate data flow. Memory access would require using | |
1692 | df_simulate_* and can_move_insns_across functions and is more complex. */ | |
1693 | if (!REG_P (reg) || HARD_REGISTER_P (reg)) | |
1694 | return false; | |
1695 | ||
1696 | /* Check whether the set is always executed. We could omit this condition if | |
1697 | we know that the register is unused outside of the loop, but it does not | |
1698 | seem worth finding out. */ | |
1699 | if (!inv->always_executed) | |
1700 | return false; | |
1701 | ||
1702 | /* Check that all uses that would be dominated by def are already dominated | |
1703 | by it. */ | |
1704 | dest_regno = REGNO (reg); | |
1705 | for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use)) | |
1706 | { | |
1707 | rtx_insn *use_insn; | |
1708 | basic_block use_bb; | |
1709 | ||
1710 | use_insn = DF_REF_INSN (use); | |
1711 | use_bb = BLOCK_FOR_INSN (use_insn); | |
1712 | ||
1713 | /* Ignore instruction considered for moving. */ | |
1714 | if (use_insn == insn) | |
1715 | continue; | |
1716 | ||
1717 | /* Don't consider uses outside loop. */ | |
1718 | if (!flow_bb_inside_loop_p (loop, use_bb)) | |
1719 | continue; | |
1720 | ||
1721 | /* Don't move if a use is not dominated by def in insn. */ | |
1722 | if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn)) | |
1723 | return false; | |
1724 | if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb)) | |
1725 | return false; | |
1726 | } | |
1727 | ||
1728 | /* Check for other defs. Any other def in the loop might reach a use | |
1729 | currently reached by the def in insn. */ | |
1730 | for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def)) | |
1731 | { | |
1732 | basic_block def_bb = DF_REF_BB (def); | |
1733 | ||
1734 | /* Defs in exit block cannot reach a use they weren't already. */ | |
1735 | if (single_succ_p (def_bb)) | |
1736 | { | |
1737 | basic_block def_bb_succ; | |
1738 | ||
1739 | def_bb_succ = single_succ (def_bb); | |
1740 | if (!flow_bb_inside_loop_p (loop, def_bb_succ)) | |
1741 | continue; | |
1742 | } | |
1743 | ||
1744 | if (++defs_in_loop_count > 1) | |
1745 | return false; | |
1746 | } | |
1747 | ||
1748 | return true; | |
1749 | } | |
1750 | ||
ba946209 ZD |
1751 | /* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false |
1752 | otherwise. */ | |
1753 | ||
1754 | static bool | |
cb20f7e8 | 1755 | move_invariant_reg (struct loop *loop, unsigned invno) |
5e962776 | 1756 | { |
9771b263 DN |
1757 | struct invariant *inv = invariants[invno]; |
1758 | struct invariant *repr = invariants[inv->eqto]; | |
5e962776 ZD |
1759 | unsigned i; |
1760 | basic_block preheader = loop_preheader_edge (loop)->src; | |
90b1c344 | 1761 | rtx reg, set, dest, note; |
87c476a2 | 1762 | bitmap_iterator bi; |
43ba743c | 1763 | int regno = -1; |
5e962776 | 1764 | |
ba946209 ZD |
1765 | if (inv->reg) |
1766 | return true; | |
1767 | if (!repr->move) | |
1768 | return false; | |
43ba743c | 1769 | |
1052bd54 ZD |
1770 | /* If this is a representative of the class of equivalent invariants, |
1771 | really move the invariant. Otherwise just replace its use with | |
1772 | the register used for the representative. */ | |
1773 | if (inv == repr) | |
5e962776 | 1774 | { |
1052bd54 | 1775 | if (inv->depends_on) |
5e962776 | 1776 | { |
1052bd54 ZD |
1777 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi) |
1778 | { | |
ba946209 ZD |
1779 | if (!move_invariant_reg (loop, i)) |
1780 | goto fail; | |
1052bd54 | 1781 | } |
87c476a2 | 1782 | } |
5e962776 | 1783 | |
aa953e2f TP |
1784 | /* If possible, just move the set out of the loop. Otherwise, we |
1785 | need to create a temporary register. */ | |
1052bd54 | 1786 | set = single_set (inv->insn); |
1833192f VM |
1787 | reg = dest = SET_DEST (set); |
1788 | if (GET_CODE (reg) == SUBREG) | |
1789 | reg = SUBREG_REG (reg); | |
1790 | if (REG_P (reg)) | |
1791 | regno = REGNO (reg); | |
1792 | ||
ddd93587 | 1793 | if (!can_move_invariant_reg (loop, inv, dest)) |
aa953e2f TP |
1794 | { |
1795 | reg = gen_reg_rtx_and_attrs (dest); | |
1052bd54 | 1796 | |
aa953e2f TP |
1797 | /* Try replacing the destination by a new pseudoregister. */ |
1798 | validate_change (inv->insn, &SET_DEST (set), reg, true); | |
43ba743c | 1799 | |
aa953e2f TP |
1800 | /* As well as all the dominated uses. */ |
1801 | replace_uses (inv, reg, true); | |
43ba743c | 1802 | |
aa953e2f TP |
1803 | /* And validate all the changes. */ |
1804 | if (!apply_change_group ()) | |
1805 | goto fail; | |
90b1c344 | 1806 | |
aa953e2f TP |
1807 | emit_insn_after (gen_move_insn (dest, reg), inv->insn); |
1808 | } | |
1809 | else if (dump_file) | |
1810 | fprintf (dump_file, "Invariant %d moved without introducing a new " | |
1811 | "temporary register\n", invno); | |
90b1c344 | 1812 | reorder_insns (inv->insn, inv->insn, BB_END (preheader)); |
43d56ad7 | 1813 | df_recompute_luids (preheader); |
90b1c344 | 1814 | |
82fa5f8a L |
1815 | /* If there is a REG_EQUAL note on the insn we just moved, and the |
1816 | insn is in a basic block that is not always executed or the note | |
1817 | contains something for which we don't know the invariant status, | |
1818 | the note may no longer be valid after we move the insn. Note that | |
1819 | uses in REG_EQUAL notes are taken into account in the computation | |
1820 | of invariants, so it is safe to retain the note even if it contains | |
1821 | register references for which we know the invariant status. */ | |
1822 | if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX)) | |
1823 | && (!inv->always_executed | |
1824 | || !check_maybe_invariant (XEXP (note, 0)))) | |
90b1c344 | 1825 | remove_note (inv->insn, note); |
b644b211 SB |
1826 | } |
1827 | else | |
1828 | { | |
ba946209 ZD |
1829 | if (!move_invariant_reg (loop, repr->invno)) |
1830 | goto fail; | |
1052bd54 | 1831 | reg = repr->reg; |
1833192f | 1832 | regno = repr->orig_regno; |
43ba743c EB |
1833 | if (!replace_uses (inv, reg, false)) |
1834 | goto fail; | |
1052bd54 | 1835 | set = single_set (inv->insn); |
4d779342 DB |
1836 | emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn); |
1837 | delete_insn (inv->insn); | |
b644b211 | 1838 | } |
5e962776 | 1839 | |
1052bd54 | 1840 | inv->reg = reg; |
1833192f | 1841 | inv->orig_regno = regno; |
1052bd54 | 1842 | |
ba946209 ZD |
1843 | return true; |
1844 | ||
1845 | fail: | |
1846 | /* If we failed, clear move flag, so that we do not try to move inv | |
1847 | again. */ | |
1848 | if (dump_file) | |
1849 | fprintf (dump_file, "Failed to move invariant %d\n", invno); | |
1850 | inv->move = false; | |
1851 | inv->reg = NULL_RTX; | |
1833192f | 1852 | inv->orig_regno = -1; |
6fb5fa3c | 1853 | |
ba946209 | 1854 | return false; |
5e962776 ZD |
1855 | } |
1856 | ||
1857 | /* Move selected invariant out of the LOOP. Newly created regs are marked | |
cb20f7e8 | 1858 | in TEMPORARY_REGS. */ |
5e962776 ZD |
1859 | |
1860 | static void | |
cb20f7e8 | 1861 | move_invariants (struct loop *loop) |
5e962776 ZD |
1862 | { |
1863 | struct invariant *inv; | |
1864 | unsigned i; | |
1865 | ||
9771b263 | 1866 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1052bd54 | 1867 | move_invariant_reg (loop, i); |
1833192f VM |
1868 | if (flag_ira_loop_pressure && resize_reg_info ()) |
1869 | { | |
9771b263 | 1870 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1833192f VM |
1871 | if (inv->reg != NULL_RTX) |
1872 | { | |
1873 | if (inv->orig_regno >= 0) | |
1874 | setup_reg_classes (REGNO (inv->reg), | |
1875 | reg_preferred_class (inv->orig_regno), | |
1876 | reg_alternate_class (inv->orig_regno), | |
1756cb66 | 1877 | reg_allocno_class (inv->orig_regno)); |
1833192f VM |
1878 | else |
1879 | setup_reg_classes (REGNO (inv->reg), | |
1880 | GENERAL_REGS, NO_REGS, GENERAL_REGS); | |
1881 | } | |
1882 | } | |
5e962776 ZD |
1883 | } |
1884 | ||
1885 | /* Initializes invariant motion data. */ | |
1886 | ||
1887 | static void | |
1888 | init_inv_motion_data (void) | |
1889 | { | |
1890 | actual_stamp = 1; | |
1891 | ||
9771b263 | 1892 | invariants.create (100); |
5e962776 ZD |
1893 | } |
1894 | ||
cb20f7e8 | 1895 | /* Frees the data allocated by invariant motion. */ |
5e962776 ZD |
1896 | |
1897 | static void | |
cb20f7e8 | 1898 | free_inv_motion_data (void) |
5e962776 ZD |
1899 | { |
1900 | unsigned i; | |
1901 | struct def *def; | |
1902 | struct invariant *inv; | |
1903 | ||
6fb5fa3c DB |
1904 | check_invariant_table_size (); |
1905 | for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++) | |
5e962776 | 1906 | { |
6fb5fa3c DB |
1907 | inv = invariant_table[i]; |
1908 | if (inv) | |
1909 | { | |
1910 | def = inv->def; | |
1911 | gcc_assert (def != NULL); | |
b8698a0f | 1912 | |
6fb5fa3c DB |
1913 | free_use_list (def->uses); |
1914 | free (def); | |
1915 | invariant_table[i] = NULL; | |
1916 | } | |
5e962776 ZD |
1917 | } |
1918 | ||
9771b263 | 1919 | FOR_EACH_VEC_ELT (invariants, i, inv) |
5e962776 | 1920 | { |
8bdbfff5 | 1921 | BITMAP_FREE (inv->depends_on); |
5e962776 ZD |
1922 | free (inv); |
1923 | } | |
9771b263 | 1924 | invariants.release (); |
5e962776 ZD |
1925 | } |
1926 | ||
cb20f7e8 | 1927 | /* Move the invariants out of the LOOP. */ |
5e962776 ZD |
1928 | |
1929 | static void | |
cb20f7e8 | 1930 | move_single_loop_invariants (struct loop *loop) |
5e962776 ZD |
1931 | { |
1932 | init_inv_motion_data (); | |
1933 | ||
cb20f7e8 | 1934 | find_invariants (loop); |
bec922f0 SL |
1935 | find_invariants_to_move (optimize_loop_for_speed_p (loop), |
1936 | LOOP_DATA (loop)->has_call); | |
cb20f7e8 | 1937 | move_invariants (loop); |
5e962776 | 1938 | |
cb20f7e8 | 1939 | free_inv_motion_data (); |
5e962776 ZD |
1940 | } |
1941 | ||
1942 | /* Releases the auxiliary data for LOOP. */ | |
1943 | ||
1944 | static void | |
1945 | free_loop_data (struct loop *loop) | |
1946 | { | |
1947 | struct loop_data *data = LOOP_DATA (loop); | |
eb149440 RG |
1948 | if (!data) |
1949 | return; | |
5e962776 | 1950 | |
1833192f VM |
1951 | bitmap_clear (&LOOP_DATA (loop)->regs_ref); |
1952 | bitmap_clear (&LOOP_DATA (loop)->regs_live); | |
5e962776 ZD |
1953 | free (data); |
1954 | loop->aux = NULL; | |
1955 | } | |
1956 | ||
1833192f VM |
1957 | \f |
1958 | ||
1959 | /* Registers currently living. */ | |
1960 | static bitmap_head curr_regs_live; | |
1961 | ||
1756cb66 | 1962 | /* Current reg pressure for each pressure class. */ |
1833192f VM |
1963 | static int curr_reg_pressure[N_REG_CLASSES]; |
1964 | ||
1965 | /* Record all regs that are set in any one insn. Communication from | |
1966 | mark_reg_{store,clobber} and global_conflicts. Asm can refer to | |
1967 | all hard-registers. */ | |
1968 | static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS | |
1969 | ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2]; | |
1970 | /* Number of regs stored in the previous array. */ | |
1971 | static int n_regs_set; | |
1972 | ||
1756cb66 | 1973 | /* Return pressure class and number of needed hard registers (through |
b8698a0f | 1974 | *NREGS) of register REGNO. */ |
1833192f | 1975 | static enum reg_class |
1756cb66 | 1976 | get_regno_pressure_class (int regno, int *nregs) |
1833192f VM |
1977 | { |
1978 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1979 | { | |
1756cb66 | 1980 | enum reg_class pressure_class; |
1833192f | 1981 | |
1756cb66 VM |
1982 | pressure_class = reg_allocno_class (regno); |
1983 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1984 | *nregs | |
1985 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
1986 | return pressure_class; | |
1833192f VM |
1987 | } |
1988 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
1989 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
1990 | { | |
1991 | *nregs = 1; | |
1756cb66 | 1992 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; |
1833192f VM |
1993 | } |
1994 | else | |
1995 | { | |
1996 | *nregs = 0; | |
1997 | return NO_REGS; | |
1998 | } | |
1999 | } | |
2000 | ||
2001 | /* Increase (if INCR_P) or decrease current register pressure for | |
2002 | register REGNO. */ | |
2003 | static void | |
2004 | change_pressure (int regno, bool incr_p) | |
2005 | { | |
2006 | int nregs; | |
1756cb66 | 2007 | enum reg_class pressure_class; |
1833192f | 2008 | |
1756cb66 | 2009 | pressure_class = get_regno_pressure_class (regno, &nregs); |
1833192f | 2010 | if (! incr_p) |
1756cb66 | 2011 | curr_reg_pressure[pressure_class] -= nregs; |
1833192f VM |
2012 | else |
2013 | { | |
1756cb66 VM |
2014 | curr_reg_pressure[pressure_class] += nregs; |
2015 | if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
2016 | < curr_reg_pressure[pressure_class]) | |
2017 | LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
2018 | = curr_reg_pressure[pressure_class]; | |
1833192f VM |
2019 | } |
2020 | } | |
2021 | ||
2022 | /* Mark REGNO birth. */ | |
2023 | static void | |
2024 | mark_regno_live (int regno) | |
2025 | { | |
2026 | struct loop *loop; | |
2027 | ||
2028 | for (loop = curr_loop; | |
2029 | loop != current_loops->tree_root; | |
2030 | loop = loop_outer (loop)) | |
2031 | bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno); | |
fcaa4ca4 | 2032 | if (!bitmap_set_bit (&curr_regs_live, regno)) |
1833192f | 2033 | return; |
1833192f VM |
2034 | change_pressure (regno, true); |
2035 | } | |
2036 | ||
2037 | /* Mark REGNO death. */ | |
2038 | static void | |
2039 | mark_regno_death (int regno) | |
2040 | { | |
fcaa4ca4 | 2041 | if (! bitmap_clear_bit (&curr_regs_live, regno)) |
1833192f | 2042 | return; |
1833192f VM |
2043 | change_pressure (regno, false); |
2044 | } | |
2045 | ||
2046 | /* Mark setting register REG. */ | |
2047 | static void | |
2048 | mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, | |
2049 | void *data ATTRIBUTE_UNUSED) | |
2050 | { | |
1833192f VM |
2051 | if (GET_CODE (reg) == SUBREG) |
2052 | reg = SUBREG_REG (reg); | |
2053 | ||
2054 | if (! REG_P (reg)) | |
2055 | return; | |
2056 | ||
2057 | regs_set[n_regs_set++] = reg; | |
2058 | ||
53d1bae9 RS |
2059 | unsigned int end_regno = END_REGNO (reg); |
2060 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 2061 | mark_regno_live (regno); |
1833192f VM |
2062 | } |
2063 | ||
2064 | /* Mark clobbering register REG. */ | |
2065 | static void | |
2066 | mark_reg_clobber (rtx reg, const_rtx setter, void *data) | |
2067 | { | |
2068 | if (GET_CODE (setter) == CLOBBER) | |
2069 | mark_reg_store (reg, setter, data); | |
2070 | } | |
2071 | ||
2072 | /* Mark register REG death. */ | |
2073 | static void | |
2074 | mark_reg_death (rtx reg) | |
2075 | { | |
53d1bae9 RS |
2076 | unsigned int end_regno = END_REGNO (reg); |
2077 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 2078 | mark_regno_death (regno); |
1833192f VM |
2079 | } |
2080 | ||
2081 | /* Mark occurrence of registers in X for the current loop. */ | |
2082 | static void | |
2083 | mark_ref_regs (rtx x) | |
2084 | { | |
2085 | RTX_CODE code; | |
2086 | int i; | |
2087 | const char *fmt; | |
2088 | ||
2089 | if (!x) | |
2090 | return; | |
2091 | ||
2092 | code = GET_CODE (x); | |
2093 | if (code == REG) | |
2094 | { | |
2095 | struct loop *loop; | |
b8698a0f | 2096 | |
1833192f VM |
2097 | for (loop = curr_loop; |
2098 | loop != current_loops->tree_root; | |
2099 | loop = loop_outer (loop)) | |
2100 | bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x)); | |
2101 | return; | |
2102 | } | |
2103 | ||
2104 | fmt = GET_RTX_FORMAT (code); | |
2105 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2106 | if (fmt[i] == 'e') | |
2107 | mark_ref_regs (XEXP (x, i)); | |
2108 | else if (fmt[i] == 'E') | |
2109 | { | |
2110 | int j; | |
b8698a0f | 2111 | |
1833192f VM |
2112 | for (j = 0; j < XVECLEN (x, i); j++) |
2113 | mark_ref_regs (XVECEXP (x, i, j)); | |
2114 | } | |
2115 | } | |
2116 | ||
2117 | /* Calculate register pressure in the loops. */ | |
2118 | static void | |
2119 | calculate_loop_reg_pressure (void) | |
2120 | { | |
2121 | int i; | |
2122 | unsigned int j; | |
2123 | bitmap_iterator bi; | |
2124 | basic_block bb; | |
89bfd6f5 DM |
2125 | rtx_insn *insn; |
2126 | rtx link; | |
1833192f | 2127 | struct loop *loop, *parent; |
1833192f | 2128 | |
f0bd40b1 | 2129 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2130 | if (loop->aux == NULL) |
2131 | { | |
2132 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
2133 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
2134 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
2135 | } | |
8d49e7ef | 2136 | ira_setup_eliminable_regset (); |
1833192f | 2137 | bitmap_initialize (&curr_regs_live, ®_obstack); |
11cd3bed | 2138 | FOR_EACH_BB_FN (bb, cfun) |
1833192f VM |
2139 | { |
2140 | curr_loop = bb->loop_father; | |
2141 | if (curr_loop == current_loops->tree_root) | |
2142 | continue; | |
2143 | ||
2144 | for (loop = curr_loop; | |
2145 | loop != current_loops->tree_root; | |
2146 | loop = loop_outer (loop)) | |
2147 | bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb)); | |
2148 | ||
2149 | bitmap_copy (&curr_regs_live, DF_LR_IN (bb)); | |
1756cb66 VM |
2150 | for (i = 0; i < ira_pressure_classes_num; i++) |
2151 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
1833192f VM |
2152 | EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi) |
2153 | change_pressure (j, true); | |
2154 | ||
2155 | FOR_BB_INSNS (bb, insn) | |
2156 | { | |
dd8c071d | 2157 | if (! NONDEBUG_INSN_P (insn)) |
1833192f VM |
2158 | continue; |
2159 | ||
2160 | mark_ref_regs (PATTERN (insn)); | |
2161 | n_regs_set = 0; | |
2162 | note_stores (PATTERN (insn), mark_reg_clobber, NULL); | |
b8698a0f | 2163 | |
1833192f | 2164 | /* Mark any registers dead after INSN as dead now. */ |
b8698a0f | 2165 | |
1833192f VM |
2166 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
2167 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
2168 | mark_reg_death (XEXP (link, 0)); | |
b8698a0f | 2169 | |
1833192f VM |
2170 | /* Mark any registers set in INSN as live, |
2171 | and mark them as conflicting with all other live regs. | |
2172 | Clobbers are processed again, so they conflict with | |
2173 | the registers that are set. */ | |
b8698a0f | 2174 | |
1833192f | 2175 | note_stores (PATTERN (insn), mark_reg_store, NULL); |
b8698a0f | 2176 | |
760edf20 TS |
2177 | if (AUTO_INC_DEC) |
2178 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2179 | if (REG_NOTE_KIND (link) == REG_INC) | |
2180 | mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); | |
2181 | ||
1833192f VM |
2182 | while (n_regs_set-- > 0) |
2183 | { | |
2184 | rtx note = find_regno_note (insn, REG_UNUSED, | |
2185 | REGNO (regs_set[n_regs_set])); | |
2186 | if (! note) | |
2187 | continue; | |
b8698a0f | 2188 | |
1833192f VM |
2189 | mark_reg_death (XEXP (note, 0)); |
2190 | } | |
2191 | } | |
2192 | } | |
2193 | bitmap_clear (&curr_regs_live); | |
2194 | if (flag_ira_region == IRA_REGION_MIXED | |
2195 | || flag_ira_region == IRA_REGION_ALL) | |
f0bd40b1 | 2196 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2197 | { |
2198 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2199 | if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j)) | |
2200 | { | |
1756cb66 | 2201 | enum reg_class pressure_class; |
1833192f VM |
2202 | int nregs; |
2203 | ||
1756cb66 VM |
2204 | pressure_class = get_regno_pressure_class (j, &nregs); |
2205 | LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs; | |
1833192f VM |
2206 | } |
2207 | } | |
2208 | if (dump_file == NULL) | |
2209 | return; | |
f0bd40b1 | 2210 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2211 | { |
2212 | parent = loop_outer (loop); | |
2213 | fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n", | |
2214 | loop->num, (parent == NULL ? -1 : parent->num), | |
2215 | loop->header->index, loop_depth (loop)); | |
2216 | fprintf (dump_file, "\n ref. regnos:"); | |
2217 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi) | |
2218 | fprintf (dump_file, " %d", j); | |
2219 | fprintf (dump_file, "\n live regnos:"); | |
2220 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2221 | fprintf (dump_file, " %d", j); | |
2222 | fprintf (dump_file, "\n Pressure:"); | |
1756cb66 | 2223 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1833192f | 2224 | { |
1756cb66 | 2225 | enum reg_class pressure_class; |
b8698a0f | 2226 | |
1756cb66 VM |
2227 | pressure_class = ira_pressure_classes[i]; |
2228 | if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0) | |
1833192f | 2229 | continue; |
1756cb66 VM |
2230 | fprintf (dump_file, " %s=%d", reg_class_names[pressure_class], |
2231 | LOOP_DATA (loop)->max_reg_pressure[pressure_class]); | |
1833192f VM |
2232 | } |
2233 | fprintf (dump_file, "\n"); | |
2234 | } | |
2235 | } | |
2236 | ||
2237 | \f | |
2238 | ||
d73be268 | 2239 | /* Move the invariants out of the loops. */ |
5e962776 ZD |
2240 | |
2241 | void | |
d73be268 | 2242 | move_loop_invariants (void) |
5e962776 ZD |
2243 | { |
2244 | struct loop *loop; | |
cb20f7e8 | 2245 | |
1833192f VM |
2246 | if (flag_ira_loop_pressure) |
2247 | { | |
2248 | df_analyze (); | |
1756cb66 | 2249 | regstat_init_n_sets_and_refs (); |
b11f0116 | 2250 | ira_set_pseudo_classes (true, dump_file); |
1833192f | 2251 | calculate_loop_reg_pressure (); |
1756cb66 | 2252 | regstat_free_n_sets_and_refs (); |
1833192f | 2253 | } |
6fb5fa3c | 2254 | df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); |
5e962776 | 2255 | /* Process the loops, innermost first. */ |
f0bd40b1 | 2256 | FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) |
5e962776 | 2257 | { |
1833192f | 2258 | curr_loop = loop; |
b1fb9f56 JJ |
2259 | /* move_single_loop_invariants for very large loops |
2260 | is time consuming and might need a lot of memory. */ | |
2261 | if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP) | |
2262 | move_single_loop_invariants (loop); | |
5e962776 ZD |
2263 | } |
2264 | ||
f0bd40b1 | 2265 | FOR_EACH_LOOP (loop, 0) |
42fd6772 ZD |
2266 | { |
2267 | free_loop_data (loop); | |
2268 | } | |
5e962776 | 2269 | |
1833192f VM |
2270 | if (flag_ira_loop_pressure) |
2271 | /* There is no sense to keep this info because it was most | |
2272 | probably outdated by subsequent passes. */ | |
2273 | free_reg_info (); | |
6fb5fa3c DB |
2274 | free (invariant_table); |
2275 | invariant_table = NULL; | |
2276 | invariant_table_size = 0; | |
a7f4ccb1 | 2277 | |
b2b29377 | 2278 | checking_verify_flow_info (); |
5e962776 | 2279 | } |