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cb20f7e8 | 1 | /* RTL-level loop invariant motion. |
5624e564 | 2 | Copyright (C) 2004-2015 Free Software Foundation, Inc. |
cb20f7e8 | 3 | |
5e962776 | 4 | This file is part of GCC. |
cb20f7e8 | 5 | |
5e962776 ZD |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the | |
9dcd6f09 | 8 | Free Software Foundation; either version 3, or (at your option) any |
5e962776 | 9 | later version. |
cb20f7e8 | 10 | |
5e962776 ZD |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
cb20f7e8 | 15 | |
5e962776 | 16 | You should have received a copy of the GNU General Public License |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
5e962776 ZD |
19 | |
20 | /* This implements the loop invariant motion pass. It is very simple | |
4a8cae83 SB |
21 | (no calls, no loads/stores, etc.). This should be sufficient to cleanup |
22 | things like address arithmetics -- other more complicated invariants should | |
23 | be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c. | |
cb20f7e8 | 24 | |
5e962776 ZD |
25 | We proceed loop by loop -- it is simpler than trying to handle things |
26 | globally and should not lose much. First we inspect all sets inside loop | |
27 | and create a dependency graph on insns (saying "to move this insn, you must | |
28 | also move the following insns"). | |
29 | ||
30 | We then need to determine what to move. We estimate the number of registers | |
31 | used and move as many invariants as possible while we still have enough free | |
32 | registers. We prefer the expensive invariants. | |
cb20f7e8 | 33 | |
5e962776 ZD |
34 | Then we move the selected invariants out of the loop, creating a new |
35 | temporaries for them if necessary. */ | |
36 | ||
37 | #include "config.h" | |
38 | #include "system.h" | |
39 | #include "coretypes.h" | |
40 | #include "tm.h" | |
1833192f | 41 | #include "hard-reg-set.h" |
5e962776 | 42 | #include "rtl.h" |
3912d291 | 43 | #include "tm_p.h" |
7932a3db | 44 | #include "obstack.h" |
60393bbc | 45 | #include "predict.h" |
5e962776 | 46 | #include "function.h" |
60393bbc AM |
47 | #include "dominance.h" |
48 | #include "cfg.h" | |
49 | #include "cfgrtl.h" | |
50 | #include "basic-block.h" | |
51 | #include "cfgloop.h" | |
40e23961 | 52 | #include "symtab.h" |
36566b39 | 53 | #include "flags.h" |
36566b39 | 54 | #include "alias.h" |
36566b39 PK |
55 | #include "tree.h" |
56 | #include "insn-config.h" | |
57 | #include "expmed.h" | |
58 | #include "dojump.h" | |
59 | #include "explow.h" | |
60 | #include "calls.h" | |
61 | #include "emit-rtl.h" | |
62 | #include "varasm.h" | |
63 | #include "stmt.h" | |
60393bbc AM |
64 | #include "expr.h" |
65 | #include "recog.h" | |
66 | #include "target.h" | |
5e962776 | 67 | #include "df.h" |
28749cfb | 68 | #include "except.h" |
b1fb9f56 | 69 | #include "params.h" |
1833192f VM |
70 | #include "regs.h" |
71 | #include "ira.h" | |
7ee2468b | 72 | #include "dumpfile.h" |
5e962776 ZD |
73 | |
74 | /* The data stored for the loop. */ | |
75 | ||
76 | struct loop_data | |
77 | { | |
78 | struct loop *outermost_exit; /* The outermost exit of the loop. */ | |
79 | bool has_call; /* True if the loop contains a call. */ | |
1833192f | 80 | /* Maximal register pressure inside loop for given register class |
1756cb66 | 81 | (defined only for the pressure classes). */ |
1833192f VM |
82 | int max_reg_pressure[N_REG_CLASSES]; |
83 | /* Loop regs referenced and live pseudo-registers. */ | |
84 | bitmap_head regs_ref; | |
85 | bitmap_head regs_live; | |
5e962776 ZD |
86 | }; |
87 | ||
88 | #define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux) | |
89 | ||
90 | /* The description of an use. */ | |
91 | ||
92 | struct use | |
93 | { | |
94 | rtx *pos; /* Position of the use. */ | |
89bfd6f5 | 95 | rtx_insn *insn; /* The insn in that the use occurs. */ |
1bfdbb29 | 96 | unsigned addr_use_p; /* Whether the use occurs in an address. */ |
5e962776 ZD |
97 | struct use *next; /* Next use in the list. */ |
98 | }; | |
99 | ||
100 | /* The description of a def. */ | |
101 | ||
102 | struct def | |
103 | { | |
104 | struct use *uses; /* The list of uses that are uniquely reached | |
105 | by it. */ | |
106 | unsigned n_uses; /* Number of such uses. */ | |
1bfdbb29 | 107 | unsigned n_addr_uses; /* Number of uses in addresses. */ |
5e962776 ZD |
108 | unsigned invno; /* The corresponding invariant. */ |
109 | }; | |
110 | ||
111 | /* The data stored for each invariant. */ | |
112 | ||
113 | struct invariant | |
114 | { | |
115 | /* The number of the invariant. */ | |
116 | unsigned invno; | |
117 | ||
1052bd54 ZD |
118 | /* The number of the invariant with the same value. */ |
119 | unsigned eqto; | |
120 | ||
e42e3d15 ZC |
121 | /* The number of invariants which eqto this. */ |
122 | unsigned eqno; | |
123 | ||
1052bd54 ZD |
124 | /* If we moved the invariant out of the loop, the register that contains its |
125 | value. */ | |
126 | rtx reg; | |
5e962776 | 127 | |
1833192f VM |
128 | /* If we moved the invariant out of the loop, the original regno |
129 | that contained its value. */ | |
130 | int orig_regno; | |
131 | ||
5e962776 ZD |
132 | /* The definition of the invariant. */ |
133 | struct def *def; | |
134 | ||
135 | /* The insn in that it is defined. */ | |
89bfd6f5 | 136 | rtx_insn *insn; |
5e962776 ZD |
137 | |
138 | /* Whether it is always executed. */ | |
139 | bool always_executed; | |
140 | ||
141 | /* Whether to move the invariant. */ | |
142 | bool move; | |
143 | ||
1bfdbb29 PB |
144 | /* Whether the invariant is cheap when used as an address. */ |
145 | bool cheap_address; | |
146 | ||
cb20f7e8 | 147 | /* Cost of the invariant. */ |
5e962776 ZD |
148 | unsigned cost; |
149 | ||
150 | /* The invariants it depends on. */ | |
151 | bitmap depends_on; | |
152 | ||
153 | /* Used for detecting already visited invariants during determining | |
154 | costs of movements. */ | |
155 | unsigned stamp; | |
156 | }; | |
157 | ||
1833192f VM |
158 | /* Currently processed loop. */ |
159 | static struct loop *curr_loop; | |
160 | ||
6fb5fa3c DB |
161 | /* Table of invariants indexed by the df_ref uid field. */ |
162 | ||
163 | static unsigned int invariant_table_size = 0; | |
164 | static struct invariant ** invariant_table; | |
165 | ||
1052bd54 ZD |
166 | /* Entry for hash table of invariant expressions. */ |
167 | ||
168 | struct invariant_expr_entry | |
169 | { | |
170 | /* The invariant. */ | |
171 | struct invariant *inv; | |
172 | ||
173 | /* Its value. */ | |
174 | rtx expr; | |
175 | ||
176 | /* Its mode. */ | |
ef4bddc2 | 177 | machine_mode mode; |
1052bd54 ZD |
178 | |
179 | /* Its hash. */ | |
180 | hashval_t hash; | |
181 | }; | |
182 | ||
5e962776 ZD |
183 | /* The actual stamp for marking already visited invariants during determining |
184 | costs of movements. */ | |
185 | ||
186 | static unsigned actual_stamp; | |
187 | ||
edd954e6 KH |
188 | typedef struct invariant *invariant_p; |
189 | ||
edd954e6 | 190 | |
5e962776 ZD |
191 | /* The invariants. */ |
192 | ||
9771b263 | 193 | static vec<invariant_p> invariants; |
5e962776 | 194 | |
6fb5fa3c | 195 | /* Check the size of the invariant table and realloc if necessary. */ |
cb20f7e8 | 196 | |
b8698a0f | 197 | static void |
6fb5fa3c DB |
198 | check_invariant_table_size (void) |
199 | { | |
c3284718 | 200 | if (invariant_table_size < DF_DEFS_TABLE_SIZE ()) |
6fb5fa3c DB |
201 | { |
202 | unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4); | |
d3bfe4de | 203 | invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size); |
b8698a0f | 204 | memset (&invariant_table[invariant_table_size], 0, |
92cfe9d5 | 205 | (new_size - invariant_table_size) * sizeof (struct invariant *)); |
6fb5fa3c DB |
206 | invariant_table_size = new_size; |
207 | } | |
208 | } | |
cb20f7e8 | 209 | |
5e962776 ZD |
210 | /* Test for possibility of invariantness of X. */ |
211 | ||
212 | static bool | |
213 | check_maybe_invariant (rtx x) | |
214 | { | |
215 | enum rtx_code code = GET_CODE (x); | |
216 | int i, j; | |
217 | const char *fmt; | |
218 | ||
219 | switch (code) | |
220 | { | |
d8116890 | 221 | CASE_CONST_ANY: |
5e962776 ZD |
222 | case SYMBOL_REF: |
223 | case CONST: | |
224 | case LABEL_REF: | |
225 | return true; | |
226 | ||
227 | case PC: | |
228 | case CC0: | |
229 | case UNSPEC_VOLATILE: | |
230 | case CALL: | |
231 | return false; | |
232 | ||
233 | case REG: | |
234 | return true; | |
235 | ||
236 | case MEM: | |
237 | /* Load/store motion is done elsewhere. ??? Perhaps also add it here? | |
238 | It should not be hard, and might be faster than "elsewhere". */ | |
239 | ||
240 | /* Just handle the most trivial case where we load from an unchanging | |
241 | location (most importantly, pic tables). */ | |
66f91b93 | 242 | if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x)) |
5e962776 ZD |
243 | break; |
244 | ||
245 | return false; | |
246 | ||
247 | case ASM_OPERANDS: | |
248 | /* Don't mess with insns declared volatile. */ | |
249 | if (MEM_VOLATILE_P (x)) | |
250 | return false; | |
251 | break; | |
252 | ||
253 | default: | |
254 | break; | |
255 | } | |
256 | ||
257 | fmt = GET_RTX_FORMAT (code); | |
258 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
259 | { | |
260 | if (fmt[i] == 'e') | |
261 | { | |
262 | if (!check_maybe_invariant (XEXP (x, i))) | |
263 | return false; | |
264 | } | |
265 | else if (fmt[i] == 'E') | |
266 | { | |
267 | for (j = 0; j < XVECLEN (x, i); j++) | |
268 | if (!check_maybe_invariant (XVECEXP (x, i, j))) | |
269 | return false; | |
270 | } | |
271 | } | |
272 | ||
273 | return true; | |
274 | } | |
275 | ||
1052bd54 ZD |
276 | /* Returns the invariant definition for USE, or NULL if USE is not |
277 | invariant. */ | |
278 | ||
279 | static struct invariant * | |
57512f53 | 280 | invariant_for_use (df_ref use) |
1052bd54 ZD |
281 | { |
282 | struct df_link *defs; | |
57512f53 | 283 | df_ref def; |
50e94c7e | 284 | basic_block bb = DF_REF_BB (use), def_bb; |
1052bd54 | 285 | |
57512f53 | 286 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
b6c9b9bc ZD |
287 | return NULL; |
288 | ||
1052bd54 ZD |
289 | defs = DF_REF_CHAIN (use); |
290 | if (!defs || defs->next) | |
291 | return NULL; | |
292 | def = defs->ref; | |
6fb5fa3c | 293 | check_invariant_table_size (); |
c3284718 | 294 | if (!invariant_table[DF_REF_ID (def)]) |
1052bd54 ZD |
295 | return NULL; |
296 | ||
297 | def_bb = DF_REF_BB (def); | |
298 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
299 | return NULL; | |
c3284718 | 300 | return invariant_table[DF_REF_ID (def)]; |
1052bd54 ZD |
301 | } |
302 | ||
303 | /* Computes hash value for invariant expression X in INSN. */ | |
304 | ||
305 | static hashval_t | |
89bfd6f5 | 306 | hash_invariant_expr_1 (rtx_insn *insn, rtx x) |
1052bd54 ZD |
307 | { |
308 | enum rtx_code code = GET_CODE (x); | |
309 | int i, j; | |
310 | const char *fmt; | |
311 | hashval_t val = code; | |
312 | int do_not_record_p; | |
57512f53 | 313 | df_ref use; |
1052bd54 ZD |
314 | struct invariant *inv; |
315 | ||
316 | switch (code) | |
317 | { | |
d8116890 | 318 | CASE_CONST_ANY: |
1052bd54 ZD |
319 | case SYMBOL_REF: |
320 | case CONST: | |
321 | case LABEL_REF: | |
322 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
323 | ||
324 | case REG: | |
6fb5fa3c | 325 | use = df_find_use (insn, x); |
1052bd54 ZD |
326 | if (!use) |
327 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
328 | inv = invariant_for_use (use); | |
329 | if (!inv) | |
330 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
331 | ||
332 | gcc_assert (inv->eqto != ~0u); | |
333 | return inv->eqto; | |
334 | ||
335 | default: | |
336 | break; | |
337 | } | |
338 | ||
339 | fmt = GET_RTX_FORMAT (code); | |
340 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
341 | { | |
342 | if (fmt[i] == 'e') | |
343 | val ^= hash_invariant_expr_1 (insn, XEXP (x, i)); | |
344 | else if (fmt[i] == 'E') | |
345 | { | |
346 | for (j = 0; j < XVECLEN (x, i); j++) | |
347 | val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j)); | |
348 | } | |
8e1409e8 ZD |
349 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
350 | val ^= XINT (x, i); | |
1052bd54 ZD |
351 | } |
352 | ||
353 | return val; | |
354 | } | |
355 | ||
356 | /* Returns true if the invariant expressions E1 and E2 used in insns INSN1 | |
357 | and INSN2 have always the same value. */ | |
358 | ||
359 | static bool | |
89bfd6f5 | 360 | invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2) |
1052bd54 ZD |
361 | { |
362 | enum rtx_code code = GET_CODE (e1); | |
363 | int i, j; | |
364 | const char *fmt; | |
57512f53 | 365 | df_ref use1, use2; |
1052bd54 ZD |
366 | struct invariant *inv1 = NULL, *inv2 = NULL; |
367 | rtx sub1, sub2; | |
368 | ||
369 | /* If mode of only one of the operands is VOIDmode, it is not equivalent to | |
370 | the other one. If both are VOIDmode, we rely on the caller of this | |
371 | function to verify that their modes are the same. */ | |
372 | if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2)) | |
373 | return false; | |
374 | ||
375 | switch (code) | |
376 | { | |
d8116890 | 377 | CASE_CONST_ANY: |
1052bd54 ZD |
378 | case SYMBOL_REF: |
379 | case CONST: | |
380 | case LABEL_REF: | |
381 | return rtx_equal_p (e1, e2); | |
382 | ||
383 | case REG: | |
6fb5fa3c DB |
384 | use1 = df_find_use (insn1, e1); |
385 | use2 = df_find_use (insn2, e2); | |
1052bd54 ZD |
386 | if (use1) |
387 | inv1 = invariant_for_use (use1); | |
388 | if (use2) | |
389 | inv2 = invariant_for_use (use2); | |
390 | ||
391 | if (!inv1 && !inv2) | |
392 | return rtx_equal_p (e1, e2); | |
393 | ||
394 | if (!inv1 || !inv2) | |
395 | return false; | |
396 | ||
397 | gcc_assert (inv1->eqto != ~0u); | |
398 | gcc_assert (inv2->eqto != ~0u); | |
399 | return inv1->eqto == inv2->eqto; | |
400 | ||
401 | default: | |
402 | break; | |
403 | } | |
404 | ||
405 | fmt = GET_RTX_FORMAT (code); | |
406 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
407 | { | |
408 | if (fmt[i] == 'e') | |
409 | { | |
410 | sub1 = XEXP (e1, i); | |
411 | sub2 = XEXP (e2, i); | |
412 | ||
413 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
414 | return false; | |
415 | } | |
416 | ||
417 | else if (fmt[i] == 'E') | |
418 | { | |
419 | if (XVECLEN (e1, i) != XVECLEN (e2, i)) | |
420 | return false; | |
421 | ||
422 | for (j = 0; j < XVECLEN (e1, i); j++) | |
423 | { | |
424 | sub1 = XVECEXP (e1, i, j); | |
425 | sub2 = XVECEXP (e2, i, j); | |
426 | ||
427 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
428 | return false; | |
429 | } | |
430 | } | |
8e1409e8 ZD |
431 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
432 | { | |
433 | if (XINT (e1, i) != XINT (e2, i)) | |
434 | return false; | |
435 | } | |
436 | /* Unhandled type of subexpression, we fail conservatively. */ | |
437 | else | |
438 | return false; | |
1052bd54 ZD |
439 | } |
440 | ||
441 | return true; | |
442 | } | |
443 | ||
4a8fb1a1 | 444 | struct invariant_expr_hasher : typed_free_remove <invariant_expr_entry> |
1052bd54 | 445 | { |
67f58944 TS |
446 | typedef invariant_expr_entry *value_type; |
447 | typedef invariant_expr_entry *compare_type; | |
448 | static inline hashval_t hash (const invariant_expr_entry *); | |
449 | static inline bool equal (const invariant_expr_entry *, | |
450 | const invariant_expr_entry *); | |
4a8fb1a1 LC |
451 | }; |
452 | ||
453 | /* Returns hash value for invariant expression entry ENTRY. */ | |
1052bd54 | 454 | |
4a8fb1a1 | 455 | inline hashval_t |
67f58944 | 456 | invariant_expr_hasher::hash (const invariant_expr_entry *entry) |
4a8fb1a1 | 457 | { |
1052bd54 ZD |
458 | return entry->hash; |
459 | } | |
460 | ||
4a8fb1a1 | 461 | /* Compares invariant expression entries ENTRY1 and ENTRY2. */ |
1052bd54 | 462 | |
4a8fb1a1 | 463 | inline bool |
67f58944 TS |
464 | invariant_expr_hasher::equal (const invariant_expr_entry *entry1, |
465 | const invariant_expr_entry *entry2) | |
1052bd54 | 466 | { |
1052bd54 ZD |
467 | if (entry1->mode != entry2->mode) |
468 | return 0; | |
469 | ||
470 | return invariant_expr_equal_p (entry1->inv->insn, entry1->expr, | |
471 | entry2->inv->insn, entry2->expr); | |
472 | } | |
473 | ||
c203e8a7 | 474 | typedef hash_table<invariant_expr_hasher> invariant_htab_type; |
4a8fb1a1 | 475 | |
1052bd54 ZD |
476 | /* Checks whether invariant with value EXPR in machine mode MODE is |
477 | recorded in EQ. If this is the case, return the invariant. Otherwise | |
478 | insert INV to the table for this expression and return INV. */ | |
479 | ||
480 | static struct invariant * | |
ef4bddc2 | 481 | find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode, |
1052bd54 ZD |
482 | struct invariant *inv) |
483 | { | |
484 | hashval_t hash = hash_invariant_expr_1 (inv->insn, expr); | |
485 | struct invariant_expr_entry *entry; | |
486 | struct invariant_expr_entry pentry; | |
4a8fb1a1 | 487 | invariant_expr_entry **slot; |
1052bd54 ZD |
488 | |
489 | pentry.expr = expr; | |
490 | pentry.inv = inv; | |
491 | pentry.mode = mode; | |
c203e8a7 | 492 | slot = eq->find_slot_with_hash (&pentry, hash, INSERT); |
4a8fb1a1 | 493 | entry = *slot; |
1052bd54 ZD |
494 | |
495 | if (entry) | |
496 | return entry->inv; | |
497 | ||
5ed6ace5 | 498 | entry = XNEW (struct invariant_expr_entry); |
1052bd54 ZD |
499 | entry->inv = inv; |
500 | entry->expr = expr; | |
501 | entry->mode = mode; | |
502 | entry->hash = hash; | |
503 | *slot = entry; | |
504 | ||
505 | return inv; | |
506 | } | |
507 | ||
508 | /* Finds invariants identical to INV and records the equivalence. EQ is the | |
509 | hash table of the invariants. */ | |
510 | ||
511 | static void | |
c203e8a7 | 512 | find_identical_invariants (invariant_htab_type *eq, struct invariant *inv) |
1052bd54 ZD |
513 | { |
514 | unsigned depno; | |
515 | bitmap_iterator bi; | |
516 | struct invariant *dep; | |
517 | rtx expr, set; | |
ef4bddc2 | 518 | machine_mode mode; |
e42e3d15 | 519 | struct invariant *tmp; |
1052bd54 ZD |
520 | |
521 | if (inv->eqto != ~0u) | |
522 | return; | |
523 | ||
524 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
525 | { | |
9771b263 | 526 | dep = invariants[depno]; |
1052bd54 ZD |
527 | find_identical_invariants (eq, dep); |
528 | } | |
529 | ||
530 | set = single_set (inv->insn); | |
531 | expr = SET_SRC (set); | |
532 | mode = GET_MODE (expr); | |
533 | if (mode == VOIDmode) | |
534 | mode = GET_MODE (SET_DEST (set)); | |
e42e3d15 ZC |
535 | |
536 | tmp = find_or_insert_inv (eq, expr, mode, inv); | |
537 | inv->eqto = tmp->invno; | |
538 | ||
539 | if (tmp->invno != inv->invno && inv->always_executed) | |
540 | tmp->eqno++; | |
1052bd54 ZD |
541 | |
542 | if (dump_file && inv->eqto != inv->invno) | |
543 | fprintf (dump_file, | |
e755fcf5 | 544 | "Invariant %d is equivalent to invariant %d.\n", |
1052bd54 ZD |
545 | inv->invno, inv->eqto); |
546 | } | |
547 | ||
548 | /* Find invariants with the same value and record the equivalences. */ | |
549 | ||
550 | static void | |
551 | merge_identical_invariants (void) | |
552 | { | |
553 | unsigned i; | |
554 | struct invariant *inv; | |
c203e8a7 | 555 | invariant_htab_type eq (invariants.length ()); |
1052bd54 | 556 | |
9771b263 | 557 | FOR_EACH_VEC_ELT (invariants, i, inv) |
c203e8a7 | 558 | find_identical_invariants (&eq, inv); |
1052bd54 ZD |
559 | } |
560 | ||
5e962776 ZD |
561 | /* Determines the basic blocks inside LOOP that are always executed and |
562 | stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of | |
563 | basic blocks that may either exit the loop, or contain the call that | |
564 | does not have to return. BODY is body of the loop obtained by | |
565 | get_loop_body_in_dom_order. */ | |
566 | ||
567 | static void | |
568 | compute_always_reached (struct loop *loop, basic_block *body, | |
569 | bitmap may_exit, bitmap always_reached) | |
570 | { | |
571 | unsigned i; | |
572 | ||
573 | for (i = 0; i < loop->num_nodes; i++) | |
574 | { | |
575 | if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i])) | |
576 | bitmap_set_bit (always_reached, i); | |
577 | ||
578 | if (bitmap_bit_p (may_exit, i)) | |
579 | return; | |
580 | } | |
581 | } | |
582 | ||
583 | /* Finds exits out of the LOOP with body BODY. Marks blocks in that we may | |
584 | exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT | |
585 | additionally mark blocks that may exit due to a call. */ | |
586 | ||
587 | static void | |
588 | find_exits (struct loop *loop, basic_block *body, | |
589 | bitmap may_exit, bitmap has_exit) | |
590 | { | |
591 | unsigned i; | |
628f6a4e | 592 | edge_iterator ei; |
5e962776 ZD |
593 | edge e; |
594 | struct loop *outermost_exit = loop, *aexit; | |
595 | bool has_call = false; | |
89bfd6f5 | 596 | rtx_insn *insn; |
5e962776 ZD |
597 | |
598 | for (i = 0; i < loop->num_nodes; i++) | |
599 | { | |
600 | if (body[i]->loop_father == loop) | |
601 | { | |
602 | FOR_BB_INSNS (body[i], insn) | |
603 | { | |
4b4bf941 | 604 | if (CALL_P (insn) |
becfd6e5 KZ |
605 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
606 | || !RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
607 | { |
608 | has_call = true; | |
609 | bitmap_set_bit (may_exit, i); | |
610 | break; | |
611 | } | |
612 | } | |
613 | ||
628f6a4e | 614 | FOR_EACH_EDGE (e, ei, body[i]->succs) |
5e962776 ZD |
615 | { |
616 | if (flow_bb_inside_loop_p (loop, e->dest)) | |
617 | continue; | |
618 | ||
619 | bitmap_set_bit (may_exit, i); | |
620 | bitmap_set_bit (has_exit, i); | |
621 | outermost_exit = find_common_loop (outermost_exit, | |
622 | e->dest->loop_father); | |
623 | } | |
624 | continue; | |
625 | } | |
cb20f7e8 | 626 | |
5e962776 ZD |
627 | /* Use the data stored for the subloop to decide whether we may exit |
628 | through it. It is sufficient to do this for header of the loop, | |
629 | as other basic blocks inside it must be dominated by it. */ | |
630 | if (body[i]->loop_father->header != body[i]) | |
631 | continue; | |
632 | ||
633 | if (LOOP_DATA (body[i]->loop_father)->has_call) | |
634 | { | |
635 | has_call = true; | |
636 | bitmap_set_bit (may_exit, i); | |
637 | } | |
638 | aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit; | |
639 | if (aexit != loop) | |
640 | { | |
641 | bitmap_set_bit (may_exit, i); | |
642 | bitmap_set_bit (has_exit, i); | |
643 | ||
644 | if (flow_loop_nested_p (aexit, outermost_exit)) | |
645 | outermost_exit = aexit; | |
646 | } | |
647 | } | |
648 | ||
1833192f VM |
649 | if (loop->aux == NULL) |
650 | { | |
651 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
652 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
653 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
654 | } | |
5e962776 ZD |
655 | LOOP_DATA (loop)->outermost_exit = outermost_exit; |
656 | LOOP_DATA (loop)->has_call = has_call; | |
657 | } | |
658 | ||
659 | /* Check whether we may assign a value to X from a register. */ | |
660 | ||
661 | static bool | |
662 | may_assign_reg_p (rtx x) | |
663 | { | |
bd361d85 | 664 | return (GET_MODE (x) != VOIDmode |
4b06592a | 665 | && GET_MODE (x) != BLKmode |
bd361d85 | 666 | && can_copy_p (GET_MODE (x)) |
a7f4ccb1 SB |
667 | && (!REG_P (x) |
668 | || !HARD_REGISTER_P (x) | |
669 | || REGNO_REG_CLASS (REGNO (x)) != NO_REGS)); | |
5e962776 ZD |
670 | } |
671 | ||
cb20f7e8 ZD |
672 | /* Finds definitions that may correspond to invariants in LOOP with body |
673 | BODY. */ | |
5e962776 ZD |
674 | |
675 | static void | |
7be64667 | 676 | find_defs (struct loop *loop) |
5e962776 | 677 | { |
7b19209f SB |
678 | if (dump_file) |
679 | { | |
680 | fprintf (dump_file, | |
681 | "*****starting processing of loop %d ******\n", | |
682 | loop->num); | |
683 | } | |
684 | ||
6fb5fa3c DB |
685 | df_remove_problem (df_chain); |
686 | df_process_deferred_rescans (); | |
687 | df_chain_add_problem (DF_UD_CHAIN); | |
7b19209f | 688 | df_set_flags (DF_RD_PRUNE_DEAD_DEFS); |
7be64667 | 689 | df_analyze_loop (loop); |
7b19209f | 690 | check_invariant_table_size (); |
6fb5fa3c DB |
691 | |
692 | if (dump_file) | |
693 | { | |
ffd640ed | 694 | df_dump_region (dump_file); |
7b19209f SB |
695 | fprintf (dump_file, |
696 | "*****ending processing of loop %d ******\n", | |
697 | loop->num); | |
6fb5fa3c | 698 | } |
5e962776 ZD |
699 | } |
700 | ||
701 | /* Creates a new invariant for definition DEF in INSN, depending on invariants | |
702 | in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed, | |
1052bd54 ZD |
703 | unless the program ends due to a function call. The newly created invariant |
704 | is returned. */ | |
5e962776 | 705 | |
1052bd54 | 706 | static struct invariant * |
89bfd6f5 | 707 | create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on, |
5e962776 ZD |
708 | bool always_executed) |
709 | { | |
5ed6ace5 | 710 | struct invariant *inv = XNEW (struct invariant); |
5e962776 | 711 | rtx set = single_set (insn); |
f40751dd | 712 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); |
5e962776 ZD |
713 | |
714 | inv->def = def; | |
715 | inv->always_executed = always_executed; | |
716 | inv->depends_on = depends_on; | |
717 | ||
718 | /* If the set is simple, usually by moving it we move the whole store out of | |
719 | the loop. Otherwise we save only cost of the computation. */ | |
720 | if (def) | |
1bfdbb29 | 721 | { |
d51102f3 | 722 | inv->cost = set_rtx_cost (set, speed); |
1578e910 MM |
723 | /* ??? Try to determine cheapness of address computation. Unfortunately |
724 | the address cost is only a relative measure, we can't really compare | |
725 | it with any absolute number, but only with other address costs. | |
726 | But here we don't have any other addresses, so compare with a magic | |
727 | number anyway. It has to be large enough to not regress PR33928 | |
728 | (by avoiding to move reg+8,reg+16,reg+24 invariants), but small | |
729 | enough to not regress 410.bwaves either (by still moving reg+reg | |
730 | invariants). | |
731 | See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */ | |
315a349c DS |
732 | if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set)))) |
733 | inv->cheap_address = address_cost (SET_SRC (set), word_mode, | |
734 | ADDR_SPACE_GENERIC, speed) < 3; | |
735 | else | |
736 | inv->cheap_address = false; | |
1bfdbb29 | 737 | } |
5e962776 | 738 | else |
1bfdbb29 | 739 | { |
5e8f01f4 | 740 | inv->cost = set_src_cost (SET_SRC (set), speed); |
1bfdbb29 PB |
741 | inv->cheap_address = false; |
742 | } | |
5e962776 ZD |
743 | |
744 | inv->move = false; | |
1052bd54 | 745 | inv->reg = NULL_RTX; |
1833192f | 746 | inv->orig_regno = -1; |
5e962776 ZD |
747 | inv->stamp = 0; |
748 | inv->insn = insn; | |
749 | ||
9771b263 | 750 | inv->invno = invariants.length (); |
1052bd54 | 751 | inv->eqto = ~0u; |
e42e3d15 ZC |
752 | |
753 | /* Itself. */ | |
754 | inv->eqno = 1; | |
755 | ||
5e962776 ZD |
756 | if (def) |
757 | def->invno = inv->invno; | |
9771b263 | 758 | invariants.safe_push (inv); |
5e962776 ZD |
759 | |
760 | if (dump_file) | |
761 | { | |
762 | fprintf (dump_file, | |
763 | "Set in insn %d is invariant (%d), cost %d, depends on ", | |
764 | INSN_UID (insn), inv->invno, inv->cost); | |
765 | dump_bitmap (dump_file, inv->depends_on); | |
766 | } | |
1052bd54 ZD |
767 | |
768 | return inv; | |
5e962776 ZD |
769 | } |
770 | ||
771 | /* Record USE at DEF. */ | |
772 | ||
773 | static void | |
1bfdbb29 | 774 | record_use (struct def *def, df_ref use) |
5e962776 | 775 | { |
5ed6ace5 | 776 | struct use *u = XNEW (struct use); |
5e962776 | 777 | |
1bfdbb29 PB |
778 | u->pos = DF_REF_REAL_LOC (use); |
779 | u->insn = DF_REF_INSN (use); | |
780 | u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD | |
3e807ffc | 781 | || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE); |
5e962776 ZD |
782 | u->next = def->uses; |
783 | def->uses = u; | |
784 | def->n_uses++; | |
1bfdbb29 PB |
785 | if (u->addr_use_p) |
786 | def->n_addr_uses++; | |
5e962776 ZD |
787 | } |
788 | ||
6fb5fa3c DB |
789 | /* Finds the invariants USE depends on and store them to the DEPENDS_ON |
790 | bitmap. Returns true if all dependencies of USE are known to be | |
b6c9b9bc | 791 | loop invariants, false otherwise. */ |
5e962776 ZD |
792 | |
793 | static bool | |
57512f53 | 794 | check_dependency (basic_block bb, df_ref use, bitmap depends_on) |
5e962776 | 795 | { |
57512f53 | 796 | df_ref def; |
6fb5fa3c | 797 | basic_block def_bb; |
4d779342 | 798 | struct df_link *defs; |
5e962776 | 799 | struct def *def_data; |
1052bd54 | 800 | struct invariant *inv; |
b8698a0f | 801 | |
57512f53 | 802 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
6fb5fa3c | 803 | return false; |
b8698a0f | 804 | |
6fb5fa3c DB |
805 | defs = DF_REF_CHAIN (use); |
806 | if (!defs) | |
1a17bd35 EB |
807 | { |
808 | unsigned int regno = DF_REF_REGNO (use); | |
809 | ||
810 | /* If this is the use of an uninitialized argument register that is | |
811 | likely to be spilled, do not move it lest this might extend its | |
812 | lifetime and cause reload to die. This can occur for a call to | |
813 | a function taking complex number arguments and moving the insns | |
814 | preparing the arguments without moving the call itself wouldn't | |
815 | gain much in practice. */ | |
816 | if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE) | |
817 | && FUNCTION_ARG_REGNO_P (regno) | |
818 | && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) | |
819 | return false; | |
820 | ||
821 | return true; | |
822 | } | |
b8698a0f | 823 | |
6fb5fa3c DB |
824 | if (defs->next) |
825 | return false; | |
b8698a0f | 826 | |
6fb5fa3c DB |
827 | def = defs->ref; |
828 | check_invariant_table_size (); | |
c3284718 | 829 | inv = invariant_table[DF_REF_ID (def)]; |
6fb5fa3c DB |
830 | if (!inv) |
831 | return false; | |
b8698a0f | 832 | |
6fb5fa3c DB |
833 | def_data = inv->def; |
834 | gcc_assert (def_data != NULL); | |
b8698a0f | 835 | |
6fb5fa3c DB |
836 | def_bb = DF_REF_BB (def); |
837 | /* Note that in case bb == def_bb, we know that the definition | |
838 | dominates insn, because def has invariant_table[DF_REF_ID(def)] | |
839 | defined and we process the insns in the basic block bb | |
840 | sequentially. */ | |
841 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
842 | return false; | |
b8698a0f | 843 | |
6fb5fa3c DB |
844 | bitmap_set_bit (depends_on, def_data->invno); |
845 | return true; | |
846 | } | |
1052bd54 | 847 | |
1052bd54 | 848 | |
6fb5fa3c DB |
849 | /* Finds the invariants INSN depends on and store them to the DEPENDS_ON |
850 | bitmap. Returns true if all dependencies of INSN are known to be | |
851 | loop invariants, false otherwise. */ | |
5e962776 | 852 | |
6fb5fa3c | 853 | static bool |
89bfd6f5 | 854 | check_dependencies (rtx_insn *insn, bitmap depends_on) |
6fb5fa3c | 855 | { |
50e94c7e | 856 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 857 | df_ref use; |
6fb5fa3c | 858 | basic_block bb = BLOCK_FOR_INSN (insn); |
5e962776 | 859 | |
bfac633a RS |
860 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
861 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 862 | return false; |
bfac633a RS |
863 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
864 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 865 | return false; |
b8698a0f | 866 | |
5e962776 ZD |
867 | return true; |
868 | } | |
869 | ||
2c97f472 ZC |
870 | /* Pre-check candidate DEST to skip the one which can not make a valid insn |
871 | during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */ | |
872 | static bool | |
873 | pre_check_invariant_p (bool simple, rtx dest) | |
874 | { | |
875 | if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1) | |
876 | { | |
877 | df_ref use; | |
2c97f472 ZC |
878 | unsigned int i = REGNO (dest); |
879 | struct df_insn_info *insn_info; | |
880 | df_ref def_rec; | |
881 | ||
882 | for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use)) | |
883 | { | |
e67d1102 | 884 | rtx_insn *ref = DF_REF_INSN (use); |
2c97f472 ZC |
885 | insn_info = DF_INSN_INFO_GET (ref); |
886 | ||
887 | FOR_EACH_INSN_INFO_DEF (def_rec, insn_info) | |
888 | if (DF_REF_REGNO (def_rec) == i) | |
889 | { | |
890 | /* Multi definitions at this stage, most likely are due to | |
891 | instruction constraints, which requires both read and write | |
892 | on the same register. Since move_invariant_reg is not | |
893 | powerful enough to handle such cases, just ignore the INV | |
894 | and leave the chance to others. */ | |
895 | return false; | |
896 | } | |
897 | } | |
898 | } | |
899 | return true; | |
900 | } | |
901 | ||
5e962776 ZD |
902 | /* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always |
903 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 904 | unless the program ends due to a function call. */ |
5e962776 ZD |
905 | |
906 | static void | |
89bfd6f5 | 907 | find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 908 | { |
57512f53 | 909 | df_ref ref; |
5e962776 ZD |
910 | struct def *def; |
911 | bitmap depends_on; | |
912 | rtx set, dest; | |
913 | bool simple = true; | |
1052bd54 | 914 | struct invariant *inv; |
5e962776 | 915 | |
00f70f98 | 916 | /* We can't move a CC0 setter without the user. */ |
058eb3b0 | 917 | if (HAVE_cc0 && sets_cc0_p (insn)) |
00f70f98 | 918 | return; |
00f70f98 | 919 | |
5e962776 ZD |
920 | set = single_set (insn); |
921 | if (!set) | |
922 | return; | |
923 | dest = SET_DEST (set); | |
924 | ||
2ca202e7 | 925 | if (!REG_P (dest) |
5e962776 ZD |
926 | || HARD_REGISTER_P (dest)) |
927 | simple = false; | |
928 | ||
2c97f472 ZC |
929 | if (!may_assign_reg_p (dest) |
930 | || !pre_check_invariant_p (simple, dest) | |
a7f4ccb1 | 931 | || !check_maybe_invariant (SET_SRC (set))) |
5e962776 ZD |
932 | return; |
933 | ||
28749cfb ZD |
934 | /* If the insn can throw exception, we cannot move it at all without changing |
935 | cfg. */ | |
936 | if (can_throw_internal (insn)) | |
937 | return; | |
5e962776 | 938 | |
28749cfb | 939 | /* We cannot make trapping insn executed, unless it was executed before. */ |
48e8382e | 940 | if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached) |
28749cfb | 941 | return; |
5e962776 | 942 | |
8bdbfff5 | 943 | depends_on = BITMAP_ALLOC (NULL); |
cb20f7e8 | 944 | if (!check_dependencies (insn, depends_on)) |
5e962776 | 945 | { |
8bdbfff5 | 946 | BITMAP_FREE (depends_on); |
5e962776 ZD |
947 | return; |
948 | } | |
949 | ||
950 | if (simple) | |
5ed6ace5 | 951 | def = XCNEW (struct def); |
5e962776 ZD |
952 | else |
953 | def = NULL; | |
954 | ||
1052bd54 ZD |
955 | inv = create_new_invariant (def, insn, depends_on, always_executed); |
956 | ||
957 | if (simple) | |
958 | { | |
6fb5fa3c DB |
959 | ref = df_find_def (insn, dest); |
960 | check_invariant_table_size (); | |
c3284718 | 961 | invariant_table[DF_REF_ID (ref)] = inv; |
1052bd54 | 962 | } |
5e962776 ZD |
963 | } |
964 | ||
cb20f7e8 | 965 | /* Record registers used in INSN that have a unique invariant definition. */ |
5e962776 ZD |
966 | |
967 | static void | |
89bfd6f5 | 968 | record_uses (rtx_insn *insn) |
5e962776 | 969 | { |
50e94c7e | 970 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 971 | df_ref use; |
1052bd54 ZD |
972 | struct invariant *inv; |
973 | ||
bfac633a | 974 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
6fb5fa3c | 975 | { |
6fb5fa3c DB |
976 | inv = invariant_for_use (use); |
977 | if (inv) | |
1bfdbb29 | 978 | record_use (inv->def, use); |
6fb5fa3c | 979 | } |
bfac633a | 980 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
5e962776 | 981 | { |
1052bd54 ZD |
982 | inv = invariant_for_use (use); |
983 | if (inv) | |
1bfdbb29 | 984 | record_use (inv->def, use); |
5e962776 ZD |
985 | } |
986 | } | |
987 | ||
988 | /* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always | |
989 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 990 | unless the program ends due to a function call. */ |
5e962776 ZD |
991 | |
992 | static void | |
89bfd6f5 | 993 | find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 994 | { |
cb20f7e8 ZD |
995 | find_invariant_insn (insn, always_reached, always_executed); |
996 | record_uses (insn); | |
5e962776 ZD |
997 | } |
998 | ||
999 | /* Finds invariants in basic block BB. ALWAYS_REACHED is true if the | |
1000 | basic block is always executed. ALWAYS_EXECUTED is true if the basic | |
1001 | block is always executed, unless the program ends due to a function | |
cb20f7e8 | 1002 | call. */ |
5e962776 ZD |
1003 | |
1004 | static void | |
cb20f7e8 | 1005 | find_invariants_bb (basic_block bb, bool always_reached, bool always_executed) |
5e962776 | 1006 | { |
89bfd6f5 | 1007 | rtx_insn *insn; |
5e962776 ZD |
1008 | |
1009 | FOR_BB_INSNS (bb, insn) | |
1010 | { | |
b5b8b0ac | 1011 | if (!NONDEBUG_INSN_P (insn)) |
5e962776 ZD |
1012 | continue; |
1013 | ||
cb20f7e8 | 1014 | find_invariants_insn (insn, always_reached, always_executed); |
5e962776 ZD |
1015 | |
1016 | if (always_reached | |
4b4bf941 | 1017 | && CALL_P (insn) |
becfd6e5 KZ |
1018 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
1019 | || ! RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
1020 | always_reached = false; |
1021 | } | |
1022 | } | |
1023 | ||
1024 | /* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of | |
1025 | basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the | |
1026 | bitmap of basic blocks in BODY that are always executed unless the program | |
cb20f7e8 | 1027 | ends due to a function call. */ |
5e962776 ZD |
1028 | |
1029 | static void | |
1030 | find_invariants_body (struct loop *loop, basic_block *body, | |
cb20f7e8 | 1031 | bitmap always_reached, bitmap always_executed) |
5e962776 ZD |
1032 | { |
1033 | unsigned i; | |
1034 | ||
1035 | for (i = 0; i < loop->num_nodes; i++) | |
1036 | find_invariants_bb (body[i], | |
1037 | bitmap_bit_p (always_reached, i), | |
cb20f7e8 | 1038 | bitmap_bit_p (always_executed, i)); |
5e962776 ZD |
1039 | } |
1040 | ||
cb20f7e8 | 1041 | /* Finds invariants in LOOP. */ |
5e962776 ZD |
1042 | |
1043 | static void | |
cb20f7e8 | 1044 | find_invariants (struct loop *loop) |
5e962776 | 1045 | { |
8bdbfff5 NS |
1046 | bitmap may_exit = BITMAP_ALLOC (NULL); |
1047 | bitmap always_reached = BITMAP_ALLOC (NULL); | |
1048 | bitmap has_exit = BITMAP_ALLOC (NULL); | |
1049 | bitmap always_executed = BITMAP_ALLOC (NULL); | |
5e962776 ZD |
1050 | basic_block *body = get_loop_body_in_dom_order (loop); |
1051 | ||
1052 | find_exits (loop, body, may_exit, has_exit); | |
1053 | compute_always_reached (loop, body, may_exit, always_reached); | |
1054 | compute_always_reached (loop, body, has_exit, always_executed); | |
1055 | ||
7be64667 | 1056 | find_defs (loop); |
cb20f7e8 | 1057 | find_invariants_body (loop, body, always_reached, always_executed); |
1052bd54 | 1058 | merge_identical_invariants (); |
5e962776 | 1059 | |
8bdbfff5 NS |
1060 | BITMAP_FREE (always_reached); |
1061 | BITMAP_FREE (always_executed); | |
1062 | BITMAP_FREE (may_exit); | |
1063 | BITMAP_FREE (has_exit); | |
5e962776 ZD |
1064 | free (body); |
1065 | } | |
1066 | ||
1067 | /* Frees a list of uses USE. */ | |
1068 | ||
1069 | static void | |
1070 | free_use_list (struct use *use) | |
1071 | { | |
1072 | struct use *next; | |
1073 | ||
1074 | for (; use; use = next) | |
1075 | { | |
1076 | next = use->next; | |
1077 | free (use); | |
1078 | } | |
1079 | } | |
1080 | ||
1756cb66 | 1081 | /* Return pressure class and number of hard registers (through *NREGS) |
1833192f VM |
1082 | for destination of INSN. */ |
1083 | static enum reg_class | |
89bfd6f5 | 1084 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1833192f VM |
1085 | { |
1086 | rtx reg; | |
1756cb66 | 1087 | enum reg_class pressure_class; |
1833192f | 1088 | rtx set = single_set (insn); |
b8698a0f | 1089 | |
1833192f VM |
1090 | /* Considered invariant insns have only one set. */ |
1091 | gcc_assert (set != NULL_RTX); | |
1092 | reg = SET_DEST (set); | |
1093 | if (GET_CODE (reg) == SUBREG) | |
1094 | reg = SUBREG_REG (reg); | |
1095 | if (MEM_P (reg)) | |
1096 | { | |
1097 | *nregs = 0; | |
1756cb66 | 1098 | pressure_class = NO_REGS; |
1833192f VM |
1099 | } |
1100 | else | |
1101 | { | |
1102 | if (! REG_P (reg)) | |
1103 | reg = NULL_RTX; | |
1104 | if (reg == NULL_RTX) | |
1756cb66 | 1105 | pressure_class = GENERAL_REGS; |
1833192f | 1106 | else |
1756cb66 VM |
1107 | { |
1108 | pressure_class = reg_allocno_class (REGNO (reg)); | |
1109 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1110 | } | |
1111 | *nregs | |
1112 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
1833192f | 1113 | } |
1756cb66 | 1114 | return pressure_class; |
1833192f VM |
1115 | } |
1116 | ||
5e962776 | 1117 | /* Calculates cost and number of registers needed for moving invariant INV |
51a69168 ZC |
1118 | out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be |
1119 | the REG_CLASS of INV. Return | |
1120 | -1: if INV is invalid. | |
1121 | 0: if INV and its depends_on have same reg_class | |
1122 | 1: if INV and its depends_on have different reg_classes. */ | |
5e962776 | 1123 | |
51a69168 ZC |
1124 | static int |
1125 | get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed, | |
1126 | enum reg_class *cl) | |
5e962776 | 1127 | { |
1833192f VM |
1128 | int i, acomp_cost; |
1129 | unsigned aregs_needed[N_REG_CLASSES]; | |
5e962776 ZD |
1130 | unsigned depno; |
1131 | struct invariant *dep; | |
87c476a2 | 1132 | bitmap_iterator bi; |
51a69168 | 1133 | int ret = 1; |
5e962776 | 1134 | |
1052bd54 | 1135 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1136 | inv = invariants[inv->eqto]; |
1052bd54 | 1137 | |
5e962776 | 1138 | *comp_cost = 0; |
1833192f VM |
1139 | if (! flag_ira_loop_pressure) |
1140 | regs_needed[0] = 0; | |
1141 | else | |
1142 | { | |
1756cb66 VM |
1143 | for (i = 0; i < ira_pressure_classes_num; i++) |
1144 | regs_needed[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1145 | } |
1146 | ||
5e962776 ZD |
1147 | if (inv->move |
1148 | || inv->stamp == actual_stamp) | |
51a69168 | 1149 | return -1; |
5e962776 ZD |
1150 | inv->stamp = actual_stamp; |
1151 | ||
1833192f VM |
1152 | if (! flag_ira_loop_pressure) |
1153 | regs_needed[0]++; | |
1154 | else | |
1155 | { | |
1156 | int nregs; | |
1756cb66 | 1157 | enum reg_class pressure_class; |
1833192f | 1158 | |
1756cb66 VM |
1159 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1160 | regs_needed[pressure_class] += nregs; | |
51a69168 ZC |
1161 | *cl = pressure_class; |
1162 | ret = 0; | |
1833192f VM |
1163 | } |
1164 | ||
1bfdbb29 | 1165 | if (!inv->cheap_address |
315a349c | 1166 | || inv->def->n_uses == 0 |
1bfdbb29 | 1167 | || inv->def->n_addr_uses < inv->def->n_uses) |
e42e3d15 | 1168 | (*comp_cost) += inv->cost * inv->eqno; |
5e962776 | 1169 | |
3d8504ac RS |
1170 | #ifdef STACK_REGS |
1171 | { | |
1172 | /* Hoisting constant pool constants into stack regs may cost more than | |
1173 | just single register. On x87, the balance is affected both by the | |
c0220ea4 | 1174 | small number of FP registers, and by its register stack organization, |
3d8504ac RS |
1175 | that forces us to add compensation code in and around the loop to |
1176 | shuffle the operands to the top of stack before use, and pop them | |
1177 | from the stack after the loop finishes. | |
1178 | ||
1179 | To model this effect, we increase the number of registers needed for | |
1180 | stack registers by two: one register push, and one register pop. | |
1181 | This usually has the effect that FP constant loads from the constant | |
1182 | pool are not moved out of the loop. | |
1183 | ||
1184 | Note that this also means that dependent invariants can not be moved. | |
1185 | However, the primary purpose of this pass is to move loop invariant | |
1186 | address arithmetic out of loops, and address arithmetic that depends | |
1187 | on floating point constants is unlikely to ever occur. */ | |
1188 | rtx set = single_set (inv->insn); | |
1189 | if (set | |
1833192f VM |
1190 | && IS_STACK_MODE (GET_MODE (SET_SRC (set))) |
1191 | && constant_pool_constant_p (SET_SRC (set))) | |
1192 | { | |
1193 | if (flag_ira_loop_pressure) | |
1756cb66 | 1194 | regs_needed[ira_stack_reg_pressure_class] += 2; |
1833192f VM |
1195 | else |
1196 | regs_needed[0] += 2; | |
1197 | } | |
3d8504ac RS |
1198 | } |
1199 | #endif | |
1200 | ||
87c476a2 | 1201 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) |
5e962776 | 1202 | { |
1833192f | 1203 | bool check_p; |
51a69168 ZC |
1204 | enum reg_class dep_cl = ALL_REGS; |
1205 | int dep_ret; | |
1833192f | 1206 | |
9771b263 | 1207 | dep = invariants[depno]; |
5e962776 | 1208 | |
61fc05c7 ZC |
1209 | /* If DEP is moved out of the loop, it is not a depends_on any more. */ |
1210 | if (dep->move) | |
1211 | continue; | |
1212 | ||
51a69168 | 1213 | dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl); |
5e962776 | 1214 | |
1833192f VM |
1215 | if (! flag_ira_loop_pressure) |
1216 | check_p = aregs_needed[0] != 0; | |
1217 | else | |
1218 | { | |
1756cb66 VM |
1219 | for (i = 0; i < ira_pressure_classes_num; i++) |
1220 | if (aregs_needed[ira_pressure_classes[i]] != 0) | |
1833192f | 1221 | break; |
1756cb66 | 1222 | check_p = i < ira_pressure_classes_num; |
51a69168 ZC |
1223 | |
1224 | if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl))) | |
1225 | { | |
1226 | *cl = ALL_REGS; | |
1227 | ret = 1; | |
1228 | } | |
1833192f VM |
1229 | } |
1230 | if (check_p | |
5e962776 ZD |
1231 | /* We need to check always_executed, since if the original value of |
1232 | the invariant may be preserved, we may need to keep it in a | |
1233 | separate register. TODO check whether the register has an | |
1234 | use outside of the loop. */ | |
1235 | && dep->always_executed | |
1236 | && !dep->def->uses->next) | |
1237 | { | |
1238 | /* If this is a single use, after moving the dependency we will not | |
1239 | need a new register. */ | |
1833192f VM |
1240 | if (! flag_ira_loop_pressure) |
1241 | aregs_needed[0]--; | |
1242 | else | |
1243 | { | |
1244 | int nregs; | |
1756cb66 | 1245 | enum reg_class pressure_class; |
1833192f | 1246 | |
1756cb66 VM |
1247 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1248 | aregs_needed[pressure_class] -= nregs; | |
1833192f | 1249 | } |
5e962776 ZD |
1250 | } |
1251 | ||
1833192f VM |
1252 | if (! flag_ira_loop_pressure) |
1253 | regs_needed[0] += aregs_needed[0]; | |
1254 | else | |
1255 | { | |
1756cb66 VM |
1256 | for (i = 0; i < ira_pressure_classes_num; i++) |
1257 | regs_needed[ira_pressure_classes[i]] | |
1258 | += aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1259 | } |
5e962776 | 1260 | (*comp_cost) += acomp_cost; |
87c476a2 | 1261 | } |
51a69168 | 1262 | return ret; |
5e962776 ZD |
1263 | } |
1264 | ||
1265 | /* Calculates gain for eliminating invariant INV. REGS_USED is the number | |
a154b43a ZD |
1266 | of registers used in the loop, NEW_REGS is the number of new variables |
1267 | already added due to the invariant motion. The number of registers needed | |
bec922f0 SL |
1268 | for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed |
1269 | through to estimate_reg_pressure_cost. */ | |
5e962776 ZD |
1270 | |
1271 | static int | |
1272 | gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | |
bec922f0 SL |
1273 | unsigned *new_regs, unsigned regs_used, |
1274 | bool speed, bool call_p) | |
5e962776 ZD |
1275 | { |
1276 | int comp_cost, size_cost; | |
e54bd4ab JJ |
1277 | /* Workaround -Wmaybe-uninitialized false positive during |
1278 | profiledbootstrap by initializing it. */ | |
1279 | enum reg_class cl = NO_REGS; | |
51a69168 | 1280 | int ret; |
5e962776 | 1281 | |
5e962776 ZD |
1282 | actual_stamp++; |
1283 | ||
51a69168 | 1284 | ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl); |
1833192f VM |
1285 | |
1286 | if (! flag_ira_loop_pressure) | |
1287 | { | |
1288 | size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], | |
bec922f0 | 1289 | regs_used, speed, call_p) |
1833192f | 1290 | - estimate_reg_pressure_cost (new_regs[0], |
bec922f0 | 1291 | regs_used, speed, call_p)); |
1833192f | 1292 | } |
51a69168 ZC |
1293 | else if (ret < 0) |
1294 | return -1; | |
1295 | else if ((ret == 0) && (cl == NO_REGS)) | |
1296 | /* Hoist it anyway since it does not impact register pressure. */ | |
1297 | return 1; | |
1833192f VM |
1298 | else |
1299 | { | |
1300 | int i; | |
1756cb66 | 1301 | enum reg_class pressure_class; |
1833192f | 1302 | |
1756cb66 | 1303 | for (i = 0; i < ira_pressure_classes_num; i++) |
1833192f | 1304 | { |
1756cb66 | 1305 | pressure_class = ira_pressure_classes[i]; |
51a69168 ZC |
1306 | |
1307 | if (!reg_classes_intersect_p (pressure_class, cl)) | |
1308 | continue; | |
1309 | ||
1756cb66 VM |
1310 | if ((int) new_regs[pressure_class] |
1311 | + (int) regs_needed[pressure_class] | |
1312 | + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1833192f | 1313 | + IRA_LOOP_RESERVED_REGS |
f508f827 | 1314 | > ira_class_hard_regs_num[pressure_class]) |
1833192f VM |
1315 | break; |
1316 | } | |
1756cb66 | 1317 | if (i < ira_pressure_classes_num) |
1833192f VM |
1318 | /* There will be register pressure excess and we want not to |
1319 | make this loop invariant motion. All loop invariants with | |
1320 | non-positive gains will be rejected in function | |
1321 | find_invariants_to_move. Therefore we return the negative | |
1322 | number here. | |
1323 | ||
1324 | One could think that this rejects also expensive loop | |
1325 | invariant motions and this will hurt code performance. | |
1326 | However numerous experiments with different heuristics | |
1327 | taking invariant cost into account did not confirm this | |
1328 | assumption. There are possible explanations for this | |
1329 | result: | |
1330 | o probably all expensive invariants were already moved out | |
1331 | of the loop by PRE and gimple invariant motion pass. | |
1332 | o expensive invariant execution will be hidden by insn | |
1333 | scheduling or OOO processor hardware because usually such | |
1334 | invariants have a lot of freedom to be executed | |
1335 | out-of-order. | |
1336 | Another reason for ignoring invariant cost vs spilling cost | |
1337 | heuristics is also in difficulties to evaluate accurately | |
1338 | spill cost at this stage. */ | |
1339 | return -1; | |
1340 | else | |
1341 | size_cost = 0; | |
1342 | } | |
5e962776 ZD |
1343 | |
1344 | return comp_cost - size_cost; | |
1345 | } | |
1346 | ||
1347 | /* Finds invariant with best gain for moving. Returns the gain, stores | |
1348 | the invariant in *BEST and number of registers needed for it to | |
a154b43a ZD |
1349 | *REGS_NEEDED. REGS_USED is the number of registers used in the loop. |
1350 | NEW_REGS is the number of new variables already added due to invariant | |
1351 | motion. */ | |
5e962776 ZD |
1352 | |
1353 | static int | |
1354 | best_gain_for_invariant (struct invariant **best, unsigned *regs_needed, | |
bec922f0 SL |
1355 | unsigned *new_regs, unsigned regs_used, |
1356 | bool speed, bool call_p) | |
5e962776 ZD |
1357 | { |
1358 | struct invariant *inv; | |
1833192f VM |
1359 | int i, gain = 0, again; |
1360 | unsigned aregs_needed[N_REG_CLASSES], invno; | |
5e962776 | 1361 | |
9771b263 | 1362 | FOR_EACH_VEC_ELT (invariants, invno, inv) |
5e962776 | 1363 | { |
5e962776 ZD |
1364 | if (inv->move) |
1365 | continue; | |
1366 | ||
1052bd54 ZD |
1367 | /* Only consider the "representatives" of equivalent invariants. */ |
1368 | if (inv->eqto != inv->invno) | |
1369 | continue; | |
1370 | ||
1833192f | 1371 | again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used, |
bec922f0 | 1372 | speed, call_p); |
5e962776 ZD |
1373 | if (again > gain) |
1374 | { | |
1375 | gain = again; | |
1376 | *best = inv; | |
1833192f VM |
1377 | if (! flag_ira_loop_pressure) |
1378 | regs_needed[0] = aregs_needed[0]; | |
1379 | else | |
1380 | { | |
1756cb66 VM |
1381 | for (i = 0; i < ira_pressure_classes_num; i++) |
1382 | regs_needed[ira_pressure_classes[i]] | |
1383 | = aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1384 | } |
5e962776 ZD |
1385 | } |
1386 | } | |
1387 | ||
1388 | return gain; | |
1389 | } | |
1390 | ||
1391 | /* Marks invariant INVNO and all its dependencies for moving. */ | |
1392 | ||
1393 | static void | |
1833192f | 1394 | set_move_mark (unsigned invno, int gain) |
5e962776 | 1395 | { |
9771b263 | 1396 | struct invariant *inv = invariants[invno]; |
87c476a2 | 1397 | bitmap_iterator bi; |
5e962776 | 1398 | |
1052bd54 | 1399 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1400 | inv = invariants[inv->eqto]; |
1052bd54 | 1401 | |
5e962776 ZD |
1402 | if (inv->move) |
1403 | return; | |
1404 | inv->move = true; | |
1405 | ||
1406 | if (dump_file) | |
1833192f VM |
1407 | { |
1408 | if (gain >= 0) | |
1409 | fprintf (dump_file, "Decided to move invariant %d -- gain %d\n", | |
1410 | invno, gain); | |
1411 | else | |
1412 | fprintf (dump_file, "Decided to move dependent invariant %d\n", | |
1413 | invno); | |
1414 | }; | |
5e962776 | 1415 | |
87c476a2 ZD |
1416 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi) |
1417 | { | |
1833192f | 1418 | set_move_mark (invno, -1); |
87c476a2 | 1419 | } |
5e962776 ZD |
1420 | } |
1421 | ||
cb20f7e8 | 1422 | /* Determines which invariants to move. */ |
5e962776 ZD |
1423 | |
1424 | static void | |
bec922f0 | 1425 | find_invariants_to_move (bool speed, bool call_p) |
5e962776 | 1426 | { |
1833192f VM |
1427 | int gain; |
1428 | unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; | |
5e962776 ZD |
1429 | struct invariant *inv = NULL; |
1430 | ||
9771b263 | 1431 | if (!invariants.length ()) |
5e962776 ZD |
1432 | return; |
1433 | ||
1833192f | 1434 | if (flag_ira_loop_pressure) |
b8698a0f | 1435 | /* REGS_USED is actually never used when the flag is on. */ |
1833192f VM |
1436 | regs_used = 0; |
1437 | else | |
1438 | /* We do not really do a good job in estimating number of | |
1439 | registers used; we put some initial bound here to stand for | |
1440 | induction variables etc. that we do not detect. */ | |
5e962776 | 1441 | { |
1833192f VM |
1442 | unsigned int n_regs = DF_REG_SIZE (df); |
1443 | ||
1444 | regs_used = 2; | |
b8698a0f | 1445 | |
1833192f | 1446 | for (i = 0; i < n_regs; i++) |
5e962776 | 1447 | { |
1833192f VM |
1448 | if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) |
1449 | { | |
1450 | /* This is a value that is used but not changed inside loop. */ | |
1451 | regs_used++; | |
1452 | } | |
5e962776 ZD |
1453 | } |
1454 | } | |
1455 | ||
1833192f VM |
1456 | if (! flag_ira_loop_pressure) |
1457 | new_regs[0] = regs_needed[0] = 0; | |
1458 | else | |
5e962776 | 1459 | { |
1756cb66 VM |
1460 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1461 | new_regs[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1462 | } |
1463 | while ((gain = best_gain_for_invariant (&inv, regs_needed, | |
bec922f0 SL |
1464 | new_regs, regs_used, |
1465 | speed, call_p)) > 0) | |
1833192f VM |
1466 | { |
1467 | set_move_mark (inv->invno, gain); | |
1468 | if (! flag_ira_loop_pressure) | |
1469 | new_regs[0] += regs_needed[0]; | |
1470 | else | |
1471 | { | |
1756cb66 VM |
1472 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1473 | new_regs[ira_pressure_classes[i]] | |
1474 | += regs_needed[ira_pressure_classes[i]]; | |
1833192f | 1475 | } |
5e962776 ZD |
1476 | } |
1477 | } | |
1478 | ||
43ba743c EB |
1479 | /* Replace the uses, reached by the definition of invariant INV, by REG. |
1480 | ||
1481 | IN_GROUP is nonzero if this is part of a group of changes that must be | |
1482 | performed as a group. In that case, the changes will be stored. The | |
1483 | function `apply_change_group' will validate and apply the changes. */ | |
1484 | ||
1485 | static int | |
1486 | replace_uses (struct invariant *inv, rtx reg, bool in_group) | |
1487 | { | |
1488 | /* Replace the uses we know to be dominated. It saves work for copy | |
1489 | propagation, and also it is necessary so that dependent invariants | |
1490 | are computed right. */ | |
1491 | if (inv->def) | |
1492 | { | |
1493 | struct use *use; | |
1494 | for (use = inv->def->uses; use; use = use->next) | |
1495 | validate_change (use->insn, use->pos, reg, true); | |
1496 | ||
1497 | /* If we aren't part of a larger group, apply the changes now. */ | |
1498 | if (!in_group) | |
1499 | return apply_change_group (); | |
1500 | } | |
1501 | ||
1502 | return 1; | |
1503 | } | |
1504 | ||
aa953e2f TP |
1505 | /* Whether invariant INV setting REG can be moved out of LOOP, at the end of |
1506 | the block preceding its header. */ | |
1507 | ||
1508 | static bool | |
1509 | can_move_invariant_reg (struct loop *loop, struct invariant *inv, rtx reg) | |
1510 | { | |
1511 | df_ref def, use; | |
1512 | unsigned int dest_regno, defs_in_loop_count = 0; | |
1513 | rtx_insn *insn = inv->insn; | |
1514 | basic_block bb = BLOCK_FOR_INSN (inv->insn); | |
1515 | ||
1516 | /* We ignore hard register and memory access for cost and complexity reasons. | |
1517 | Hard register are few at this stage and expensive to consider as they | |
1518 | require building a separate data flow. Memory access would require using | |
1519 | df_simulate_* and can_move_insns_across functions and is more complex. */ | |
1520 | if (!REG_P (reg) || HARD_REGISTER_P (reg)) | |
1521 | return false; | |
1522 | ||
1523 | /* Check whether the set is always executed. We could omit this condition if | |
1524 | we know that the register is unused outside of the loop, but it does not | |
1525 | seem worth finding out. */ | |
1526 | if (!inv->always_executed) | |
1527 | return false; | |
1528 | ||
1529 | /* Check that all uses that would be dominated by def are already dominated | |
1530 | by it. */ | |
1531 | dest_regno = REGNO (reg); | |
1532 | for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use)) | |
1533 | { | |
1534 | rtx_insn *use_insn; | |
1535 | basic_block use_bb; | |
1536 | ||
1537 | use_insn = DF_REF_INSN (use); | |
1538 | use_bb = BLOCK_FOR_INSN (use_insn); | |
1539 | ||
1540 | /* Ignore instruction considered for moving. */ | |
1541 | if (use_insn == insn) | |
1542 | continue; | |
1543 | ||
1544 | /* Don't consider uses outside loop. */ | |
1545 | if (!flow_bb_inside_loop_p (loop, use_bb)) | |
1546 | continue; | |
1547 | ||
1548 | /* Don't move if a use is not dominated by def in insn. */ | |
1549 | if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn)) | |
1550 | return false; | |
1551 | if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb)) | |
1552 | return false; | |
1553 | } | |
1554 | ||
1555 | /* Check for other defs. Any other def in the loop might reach a use | |
1556 | currently reached by the def in insn. */ | |
1557 | for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def)) | |
1558 | { | |
1559 | basic_block def_bb = DF_REF_BB (def); | |
1560 | ||
1561 | /* Defs in exit block cannot reach a use they weren't already. */ | |
1562 | if (single_succ_p (def_bb)) | |
1563 | { | |
1564 | basic_block def_bb_succ; | |
1565 | ||
1566 | def_bb_succ = single_succ (def_bb); | |
1567 | if (!flow_bb_inside_loop_p (loop, def_bb_succ)) | |
1568 | continue; | |
1569 | } | |
1570 | ||
1571 | if (++defs_in_loop_count > 1) | |
1572 | return false; | |
1573 | } | |
1574 | ||
1575 | return true; | |
1576 | } | |
1577 | ||
ba946209 ZD |
1578 | /* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false |
1579 | otherwise. */ | |
1580 | ||
1581 | static bool | |
cb20f7e8 | 1582 | move_invariant_reg (struct loop *loop, unsigned invno) |
5e962776 | 1583 | { |
9771b263 DN |
1584 | struct invariant *inv = invariants[invno]; |
1585 | struct invariant *repr = invariants[inv->eqto]; | |
5e962776 ZD |
1586 | unsigned i; |
1587 | basic_block preheader = loop_preheader_edge (loop)->src; | |
90b1c344 | 1588 | rtx reg, set, dest, note; |
87c476a2 | 1589 | bitmap_iterator bi; |
43ba743c | 1590 | int regno = -1; |
5e962776 | 1591 | |
ba946209 ZD |
1592 | if (inv->reg) |
1593 | return true; | |
1594 | if (!repr->move) | |
1595 | return false; | |
43ba743c | 1596 | |
1052bd54 ZD |
1597 | /* If this is a representative of the class of equivalent invariants, |
1598 | really move the invariant. Otherwise just replace its use with | |
1599 | the register used for the representative. */ | |
1600 | if (inv == repr) | |
5e962776 | 1601 | { |
1052bd54 | 1602 | if (inv->depends_on) |
5e962776 | 1603 | { |
1052bd54 ZD |
1604 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi) |
1605 | { | |
ba946209 ZD |
1606 | if (!move_invariant_reg (loop, i)) |
1607 | goto fail; | |
1052bd54 | 1608 | } |
87c476a2 | 1609 | } |
5e962776 | 1610 | |
aa953e2f TP |
1611 | /* If possible, just move the set out of the loop. Otherwise, we |
1612 | need to create a temporary register. */ | |
1052bd54 | 1613 | set = single_set (inv->insn); |
1833192f VM |
1614 | reg = dest = SET_DEST (set); |
1615 | if (GET_CODE (reg) == SUBREG) | |
1616 | reg = SUBREG_REG (reg); | |
1617 | if (REG_P (reg)) | |
1618 | regno = REGNO (reg); | |
1619 | ||
ddd93587 | 1620 | if (!can_move_invariant_reg (loop, inv, dest)) |
aa953e2f TP |
1621 | { |
1622 | reg = gen_reg_rtx_and_attrs (dest); | |
1052bd54 | 1623 | |
aa953e2f TP |
1624 | /* Try replacing the destination by a new pseudoregister. */ |
1625 | validate_change (inv->insn, &SET_DEST (set), reg, true); | |
43ba743c | 1626 | |
aa953e2f TP |
1627 | /* As well as all the dominated uses. */ |
1628 | replace_uses (inv, reg, true); | |
43ba743c | 1629 | |
aa953e2f TP |
1630 | /* And validate all the changes. */ |
1631 | if (!apply_change_group ()) | |
1632 | goto fail; | |
90b1c344 | 1633 | |
aa953e2f TP |
1634 | emit_insn_after (gen_move_insn (dest, reg), inv->insn); |
1635 | } | |
1636 | else if (dump_file) | |
1637 | fprintf (dump_file, "Invariant %d moved without introducing a new " | |
1638 | "temporary register\n", invno); | |
90b1c344 ZD |
1639 | reorder_insns (inv->insn, inv->insn, BB_END (preheader)); |
1640 | ||
82fa5f8a L |
1641 | /* If there is a REG_EQUAL note on the insn we just moved, and the |
1642 | insn is in a basic block that is not always executed or the note | |
1643 | contains something for which we don't know the invariant status, | |
1644 | the note may no longer be valid after we move the insn. Note that | |
1645 | uses in REG_EQUAL notes are taken into account in the computation | |
1646 | of invariants, so it is safe to retain the note even if it contains | |
1647 | register references for which we know the invariant status. */ | |
1648 | if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX)) | |
1649 | && (!inv->always_executed | |
1650 | || !check_maybe_invariant (XEXP (note, 0)))) | |
90b1c344 | 1651 | remove_note (inv->insn, note); |
b644b211 SB |
1652 | } |
1653 | else | |
1654 | { | |
ba946209 ZD |
1655 | if (!move_invariant_reg (loop, repr->invno)) |
1656 | goto fail; | |
1052bd54 | 1657 | reg = repr->reg; |
1833192f | 1658 | regno = repr->orig_regno; |
43ba743c EB |
1659 | if (!replace_uses (inv, reg, false)) |
1660 | goto fail; | |
1052bd54 | 1661 | set = single_set (inv->insn); |
4d779342 DB |
1662 | emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn); |
1663 | delete_insn (inv->insn); | |
b644b211 | 1664 | } |
5e962776 | 1665 | |
1052bd54 | 1666 | inv->reg = reg; |
1833192f | 1667 | inv->orig_regno = regno; |
1052bd54 | 1668 | |
ba946209 ZD |
1669 | return true; |
1670 | ||
1671 | fail: | |
1672 | /* If we failed, clear move flag, so that we do not try to move inv | |
1673 | again. */ | |
1674 | if (dump_file) | |
1675 | fprintf (dump_file, "Failed to move invariant %d\n", invno); | |
1676 | inv->move = false; | |
1677 | inv->reg = NULL_RTX; | |
1833192f | 1678 | inv->orig_regno = -1; |
6fb5fa3c | 1679 | |
ba946209 | 1680 | return false; |
5e962776 ZD |
1681 | } |
1682 | ||
1683 | /* Move selected invariant out of the LOOP. Newly created regs are marked | |
cb20f7e8 | 1684 | in TEMPORARY_REGS. */ |
5e962776 ZD |
1685 | |
1686 | static void | |
cb20f7e8 | 1687 | move_invariants (struct loop *loop) |
5e962776 ZD |
1688 | { |
1689 | struct invariant *inv; | |
1690 | unsigned i; | |
1691 | ||
9771b263 | 1692 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1052bd54 | 1693 | move_invariant_reg (loop, i); |
1833192f VM |
1694 | if (flag_ira_loop_pressure && resize_reg_info ()) |
1695 | { | |
9771b263 | 1696 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1833192f VM |
1697 | if (inv->reg != NULL_RTX) |
1698 | { | |
1699 | if (inv->orig_regno >= 0) | |
1700 | setup_reg_classes (REGNO (inv->reg), | |
1701 | reg_preferred_class (inv->orig_regno), | |
1702 | reg_alternate_class (inv->orig_regno), | |
1756cb66 | 1703 | reg_allocno_class (inv->orig_regno)); |
1833192f VM |
1704 | else |
1705 | setup_reg_classes (REGNO (inv->reg), | |
1706 | GENERAL_REGS, NO_REGS, GENERAL_REGS); | |
1707 | } | |
1708 | } | |
5e962776 ZD |
1709 | } |
1710 | ||
1711 | /* Initializes invariant motion data. */ | |
1712 | ||
1713 | static void | |
1714 | init_inv_motion_data (void) | |
1715 | { | |
1716 | actual_stamp = 1; | |
1717 | ||
9771b263 | 1718 | invariants.create (100); |
5e962776 ZD |
1719 | } |
1720 | ||
cb20f7e8 | 1721 | /* Frees the data allocated by invariant motion. */ |
5e962776 ZD |
1722 | |
1723 | static void | |
cb20f7e8 | 1724 | free_inv_motion_data (void) |
5e962776 ZD |
1725 | { |
1726 | unsigned i; | |
1727 | struct def *def; | |
1728 | struct invariant *inv; | |
1729 | ||
6fb5fa3c DB |
1730 | check_invariant_table_size (); |
1731 | for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++) | |
5e962776 | 1732 | { |
6fb5fa3c DB |
1733 | inv = invariant_table[i]; |
1734 | if (inv) | |
1735 | { | |
1736 | def = inv->def; | |
1737 | gcc_assert (def != NULL); | |
b8698a0f | 1738 | |
6fb5fa3c DB |
1739 | free_use_list (def->uses); |
1740 | free (def); | |
1741 | invariant_table[i] = NULL; | |
1742 | } | |
5e962776 ZD |
1743 | } |
1744 | ||
9771b263 | 1745 | FOR_EACH_VEC_ELT (invariants, i, inv) |
5e962776 | 1746 | { |
8bdbfff5 | 1747 | BITMAP_FREE (inv->depends_on); |
5e962776 ZD |
1748 | free (inv); |
1749 | } | |
9771b263 | 1750 | invariants.release (); |
5e962776 ZD |
1751 | } |
1752 | ||
cb20f7e8 | 1753 | /* Move the invariants out of the LOOP. */ |
5e962776 ZD |
1754 | |
1755 | static void | |
cb20f7e8 | 1756 | move_single_loop_invariants (struct loop *loop) |
5e962776 ZD |
1757 | { |
1758 | init_inv_motion_data (); | |
1759 | ||
cb20f7e8 | 1760 | find_invariants (loop); |
bec922f0 SL |
1761 | find_invariants_to_move (optimize_loop_for_speed_p (loop), |
1762 | LOOP_DATA (loop)->has_call); | |
cb20f7e8 | 1763 | move_invariants (loop); |
5e962776 | 1764 | |
cb20f7e8 | 1765 | free_inv_motion_data (); |
5e962776 ZD |
1766 | } |
1767 | ||
1768 | /* Releases the auxiliary data for LOOP. */ | |
1769 | ||
1770 | static void | |
1771 | free_loop_data (struct loop *loop) | |
1772 | { | |
1773 | struct loop_data *data = LOOP_DATA (loop); | |
eb149440 RG |
1774 | if (!data) |
1775 | return; | |
5e962776 | 1776 | |
1833192f VM |
1777 | bitmap_clear (&LOOP_DATA (loop)->regs_ref); |
1778 | bitmap_clear (&LOOP_DATA (loop)->regs_live); | |
5e962776 ZD |
1779 | free (data); |
1780 | loop->aux = NULL; | |
1781 | } | |
1782 | ||
1833192f VM |
1783 | \f |
1784 | ||
1785 | /* Registers currently living. */ | |
1786 | static bitmap_head curr_regs_live; | |
1787 | ||
1756cb66 | 1788 | /* Current reg pressure for each pressure class. */ |
1833192f VM |
1789 | static int curr_reg_pressure[N_REG_CLASSES]; |
1790 | ||
1791 | /* Record all regs that are set in any one insn. Communication from | |
1792 | mark_reg_{store,clobber} and global_conflicts. Asm can refer to | |
1793 | all hard-registers. */ | |
1794 | static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS | |
1795 | ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2]; | |
1796 | /* Number of regs stored in the previous array. */ | |
1797 | static int n_regs_set; | |
1798 | ||
1756cb66 | 1799 | /* Return pressure class and number of needed hard registers (through |
b8698a0f | 1800 | *NREGS) of register REGNO. */ |
1833192f | 1801 | static enum reg_class |
1756cb66 | 1802 | get_regno_pressure_class (int regno, int *nregs) |
1833192f VM |
1803 | { |
1804 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1805 | { | |
1756cb66 | 1806 | enum reg_class pressure_class; |
1833192f | 1807 | |
1756cb66 VM |
1808 | pressure_class = reg_allocno_class (regno); |
1809 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1810 | *nregs | |
1811 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
1812 | return pressure_class; | |
1833192f VM |
1813 | } |
1814 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
1815 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
1816 | { | |
1817 | *nregs = 1; | |
1756cb66 | 1818 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; |
1833192f VM |
1819 | } |
1820 | else | |
1821 | { | |
1822 | *nregs = 0; | |
1823 | return NO_REGS; | |
1824 | } | |
1825 | } | |
1826 | ||
1827 | /* Increase (if INCR_P) or decrease current register pressure for | |
1828 | register REGNO. */ | |
1829 | static void | |
1830 | change_pressure (int regno, bool incr_p) | |
1831 | { | |
1832 | int nregs; | |
1756cb66 | 1833 | enum reg_class pressure_class; |
1833192f | 1834 | |
1756cb66 | 1835 | pressure_class = get_regno_pressure_class (regno, &nregs); |
1833192f | 1836 | if (! incr_p) |
1756cb66 | 1837 | curr_reg_pressure[pressure_class] -= nregs; |
1833192f VM |
1838 | else |
1839 | { | |
1756cb66 VM |
1840 | curr_reg_pressure[pressure_class] += nregs; |
1841 | if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1842 | < curr_reg_pressure[pressure_class]) | |
1843 | LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1844 | = curr_reg_pressure[pressure_class]; | |
1833192f VM |
1845 | } |
1846 | } | |
1847 | ||
1848 | /* Mark REGNO birth. */ | |
1849 | static void | |
1850 | mark_regno_live (int regno) | |
1851 | { | |
1852 | struct loop *loop; | |
1853 | ||
1854 | for (loop = curr_loop; | |
1855 | loop != current_loops->tree_root; | |
1856 | loop = loop_outer (loop)) | |
1857 | bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno); | |
fcaa4ca4 | 1858 | if (!bitmap_set_bit (&curr_regs_live, regno)) |
1833192f | 1859 | return; |
1833192f VM |
1860 | change_pressure (regno, true); |
1861 | } | |
1862 | ||
1863 | /* Mark REGNO death. */ | |
1864 | static void | |
1865 | mark_regno_death (int regno) | |
1866 | { | |
fcaa4ca4 | 1867 | if (! bitmap_clear_bit (&curr_regs_live, regno)) |
1833192f | 1868 | return; |
1833192f VM |
1869 | change_pressure (regno, false); |
1870 | } | |
1871 | ||
1872 | /* Mark setting register REG. */ | |
1873 | static void | |
1874 | mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, | |
1875 | void *data ATTRIBUTE_UNUSED) | |
1876 | { | |
1833192f VM |
1877 | if (GET_CODE (reg) == SUBREG) |
1878 | reg = SUBREG_REG (reg); | |
1879 | ||
1880 | if (! REG_P (reg)) | |
1881 | return; | |
1882 | ||
1883 | regs_set[n_regs_set++] = reg; | |
1884 | ||
53d1bae9 RS |
1885 | unsigned int end_regno = END_REGNO (reg); |
1886 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 1887 | mark_regno_live (regno); |
1833192f VM |
1888 | } |
1889 | ||
1890 | /* Mark clobbering register REG. */ | |
1891 | static void | |
1892 | mark_reg_clobber (rtx reg, const_rtx setter, void *data) | |
1893 | { | |
1894 | if (GET_CODE (setter) == CLOBBER) | |
1895 | mark_reg_store (reg, setter, data); | |
1896 | } | |
1897 | ||
1898 | /* Mark register REG death. */ | |
1899 | static void | |
1900 | mark_reg_death (rtx reg) | |
1901 | { | |
53d1bae9 RS |
1902 | unsigned int end_regno = END_REGNO (reg); |
1903 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 1904 | mark_regno_death (regno); |
1833192f VM |
1905 | } |
1906 | ||
1907 | /* Mark occurrence of registers in X for the current loop. */ | |
1908 | static void | |
1909 | mark_ref_regs (rtx x) | |
1910 | { | |
1911 | RTX_CODE code; | |
1912 | int i; | |
1913 | const char *fmt; | |
1914 | ||
1915 | if (!x) | |
1916 | return; | |
1917 | ||
1918 | code = GET_CODE (x); | |
1919 | if (code == REG) | |
1920 | { | |
1921 | struct loop *loop; | |
b8698a0f | 1922 | |
1833192f VM |
1923 | for (loop = curr_loop; |
1924 | loop != current_loops->tree_root; | |
1925 | loop = loop_outer (loop)) | |
1926 | bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x)); | |
1927 | return; | |
1928 | } | |
1929 | ||
1930 | fmt = GET_RTX_FORMAT (code); | |
1931 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1932 | if (fmt[i] == 'e') | |
1933 | mark_ref_regs (XEXP (x, i)); | |
1934 | else if (fmt[i] == 'E') | |
1935 | { | |
1936 | int j; | |
b8698a0f | 1937 | |
1833192f VM |
1938 | for (j = 0; j < XVECLEN (x, i); j++) |
1939 | mark_ref_regs (XVECEXP (x, i, j)); | |
1940 | } | |
1941 | } | |
1942 | ||
1943 | /* Calculate register pressure in the loops. */ | |
1944 | static void | |
1945 | calculate_loop_reg_pressure (void) | |
1946 | { | |
1947 | int i; | |
1948 | unsigned int j; | |
1949 | bitmap_iterator bi; | |
1950 | basic_block bb; | |
89bfd6f5 DM |
1951 | rtx_insn *insn; |
1952 | rtx link; | |
1833192f | 1953 | struct loop *loop, *parent; |
1833192f | 1954 | |
f0bd40b1 | 1955 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
1956 | if (loop->aux == NULL) |
1957 | { | |
1958 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
1959 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
1960 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
1961 | } | |
8d49e7ef | 1962 | ira_setup_eliminable_regset (); |
1833192f | 1963 | bitmap_initialize (&curr_regs_live, ®_obstack); |
11cd3bed | 1964 | FOR_EACH_BB_FN (bb, cfun) |
1833192f VM |
1965 | { |
1966 | curr_loop = bb->loop_father; | |
1967 | if (curr_loop == current_loops->tree_root) | |
1968 | continue; | |
1969 | ||
1970 | for (loop = curr_loop; | |
1971 | loop != current_loops->tree_root; | |
1972 | loop = loop_outer (loop)) | |
1973 | bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb)); | |
1974 | ||
1975 | bitmap_copy (&curr_regs_live, DF_LR_IN (bb)); | |
1756cb66 VM |
1976 | for (i = 0; i < ira_pressure_classes_num; i++) |
1977 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1978 | EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi) |
1979 | change_pressure (j, true); | |
1980 | ||
1981 | FOR_BB_INSNS (bb, insn) | |
1982 | { | |
dd8c071d | 1983 | if (! NONDEBUG_INSN_P (insn)) |
1833192f VM |
1984 | continue; |
1985 | ||
1986 | mark_ref_regs (PATTERN (insn)); | |
1987 | n_regs_set = 0; | |
1988 | note_stores (PATTERN (insn), mark_reg_clobber, NULL); | |
b8698a0f | 1989 | |
1833192f | 1990 | /* Mark any registers dead after INSN as dead now. */ |
b8698a0f | 1991 | |
1833192f VM |
1992 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1993 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
1994 | mark_reg_death (XEXP (link, 0)); | |
b8698a0f | 1995 | |
1833192f VM |
1996 | /* Mark any registers set in INSN as live, |
1997 | and mark them as conflicting with all other live regs. | |
1998 | Clobbers are processed again, so they conflict with | |
1999 | the registers that are set. */ | |
b8698a0f | 2000 | |
1833192f | 2001 | note_stores (PATTERN (insn), mark_reg_store, NULL); |
b8698a0f | 2002 | |
1833192f VM |
2003 | #ifdef AUTO_INC_DEC |
2004 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2005 | if (REG_NOTE_KIND (link) == REG_INC) | |
2006 | mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); | |
2007 | #endif | |
2008 | while (n_regs_set-- > 0) | |
2009 | { | |
2010 | rtx note = find_regno_note (insn, REG_UNUSED, | |
2011 | REGNO (regs_set[n_regs_set])); | |
2012 | if (! note) | |
2013 | continue; | |
b8698a0f | 2014 | |
1833192f VM |
2015 | mark_reg_death (XEXP (note, 0)); |
2016 | } | |
2017 | } | |
2018 | } | |
2019 | bitmap_clear (&curr_regs_live); | |
2020 | if (flag_ira_region == IRA_REGION_MIXED | |
2021 | || flag_ira_region == IRA_REGION_ALL) | |
f0bd40b1 | 2022 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2023 | { |
2024 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2025 | if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j)) | |
2026 | { | |
1756cb66 | 2027 | enum reg_class pressure_class; |
1833192f VM |
2028 | int nregs; |
2029 | ||
1756cb66 VM |
2030 | pressure_class = get_regno_pressure_class (j, &nregs); |
2031 | LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs; | |
1833192f VM |
2032 | } |
2033 | } | |
2034 | if (dump_file == NULL) | |
2035 | return; | |
f0bd40b1 | 2036 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2037 | { |
2038 | parent = loop_outer (loop); | |
2039 | fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n", | |
2040 | loop->num, (parent == NULL ? -1 : parent->num), | |
2041 | loop->header->index, loop_depth (loop)); | |
2042 | fprintf (dump_file, "\n ref. regnos:"); | |
2043 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi) | |
2044 | fprintf (dump_file, " %d", j); | |
2045 | fprintf (dump_file, "\n live regnos:"); | |
2046 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2047 | fprintf (dump_file, " %d", j); | |
2048 | fprintf (dump_file, "\n Pressure:"); | |
1756cb66 | 2049 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1833192f | 2050 | { |
1756cb66 | 2051 | enum reg_class pressure_class; |
b8698a0f | 2052 | |
1756cb66 VM |
2053 | pressure_class = ira_pressure_classes[i]; |
2054 | if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0) | |
1833192f | 2055 | continue; |
1756cb66 VM |
2056 | fprintf (dump_file, " %s=%d", reg_class_names[pressure_class], |
2057 | LOOP_DATA (loop)->max_reg_pressure[pressure_class]); | |
1833192f VM |
2058 | } |
2059 | fprintf (dump_file, "\n"); | |
2060 | } | |
2061 | } | |
2062 | ||
2063 | \f | |
2064 | ||
d73be268 | 2065 | /* Move the invariants out of the loops. */ |
5e962776 ZD |
2066 | |
2067 | void | |
d73be268 | 2068 | move_loop_invariants (void) |
5e962776 ZD |
2069 | { |
2070 | struct loop *loop; | |
cb20f7e8 | 2071 | |
1833192f VM |
2072 | if (flag_ira_loop_pressure) |
2073 | { | |
2074 | df_analyze (); | |
1756cb66 | 2075 | regstat_init_n_sets_and_refs (); |
b11f0116 | 2076 | ira_set_pseudo_classes (true, dump_file); |
1833192f | 2077 | calculate_loop_reg_pressure (); |
1756cb66 | 2078 | regstat_free_n_sets_and_refs (); |
1833192f | 2079 | } |
6fb5fa3c | 2080 | df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); |
5e962776 | 2081 | /* Process the loops, innermost first. */ |
f0bd40b1 | 2082 | FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) |
5e962776 | 2083 | { |
1833192f | 2084 | curr_loop = loop; |
b1fb9f56 JJ |
2085 | /* move_single_loop_invariants for very large loops |
2086 | is time consuming and might need a lot of memory. */ | |
2087 | if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP) | |
2088 | move_single_loop_invariants (loop); | |
5e962776 ZD |
2089 | } |
2090 | ||
f0bd40b1 | 2091 | FOR_EACH_LOOP (loop, 0) |
42fd6772 ZD |
2092 | { |
2093 | free_loop_data (loop); | |
2094 | } | |
5e962776 | 2095 | |
1833192f VM |
2096 | if (flag_ira_loop_pressure) |
2097 | /* There is no sense to keep this info because it was most | |
2098 | probably outdated by subsequent passes. */ | |
2099 | free_reg_info (); | |
6fb5fa3c DB |
2100 | free (invariant_table); |
2101 | invariant_table = NULL; | |
2102 | invariant_table_size = 0; | |
a7f4ccb1 SB |
2103 | |
2104 | #ifdef ENABLE_CHECKING | |
2105 | verify_flow_info (); | |
2106 | #endif | |
5e962776 | 2107 | } |