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cb20f7e8 | 1 | /* RTL-level loop invariant motion. |
5624e564 | 2 | Copyright (C) 2004-2015 Free Software Foundation, Inc. |
cb20f7e8 | 3 | |
5e962776 | 4 | This file is part of GCC. |
cb20f7e8 | 5 | |
5e962776 ZD |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the | |
9dcd6f09 | 8 | Free Software Foundation; either version 3, or (at your option) any |
5e962776 | 9 | later version. |
cb20f7e8 | 10 | |
5e962776 ZD |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
cb20f7e8 | 15 | |
5e962776 | 16 | You should have received a copy of the GNU General Public License |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
5e962776 ZD |
19 | |
20 | /* This implements the loop invariant motion pass. It is very simple | |
4a8cae83 SB |
21 | (no calls, no loads/stores, etc.). This should be sufficient to cleanup |
22 | things like address arithmetics -- other more complicated invariants should | |
23 | be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c. | |
cb20f7e8 | 24 | |
5e962776 ZD |
25 | We proceed loop by loop -- it is simpler than trying to handle things |
26 | globally and should not lose much. First we inspect all sets inside loop | |
27 | and create a dependency graph on insns (saying "to move this insn, you must | |
28 | also move the following insns"). | |
29 | ||
30 | We then need to determine what to move. We estimate the number of registers | |
31 | used and move as many invariants as possible while we still have enough free | |
32 | registers. We prefer the expensive invariants. | |
cb20f7e8 | 33 | |
5e962776 ZD |
34 | Then we move the selected invariants out of the loop, creating a new |
35 | temporaries for them if necessary. */ | |
36 | ||
37 | #include "config.h" | |
38 | #include "system.h" | |
39 | #include "coretypes.h" | |
c7131fb2 | 40 | #include "backend.h" |
957060b5 | 41 | #include "target.h" |
5e962776 | 42 | #include "rtl.h" |
957060b5 AM |
43 | #include "tree.h" |
44 | #include "cfghooks.h" | |
c7131fb2 | 45 | #include "df.h" |
3912d291 | 46 | #include "tm_p.h" |
957060b5 AM |
47 | #include "expmed.h" |
48 | #include "insn-config.h" | |
49 | #include "regs.h" | |
50 | #include "ira.h" | |
51 | #include "recog.h" | |
60393bbc | 52 | #include "cfgrtl.h" |
60393bbc | 53 | #include "cfgloop.h" |
36566b39 | 54 | #include "flags.h" |
36566b39 | 55 | #include "alias.h" |
36566b39 PK |
56 | #include "dojump.h" |
57 | #include "explow.h" | |
58 | #include "calls.h" | |
36566b39 PK |
59 | #include "varasm.h" |
60 | #include "stmt.h" | |
60393bbc | 61 | #include "expr.h" |
28749cfb | 62 | #include "except.h" |
b1fb9f56 | 63 | #include "params.h" |
7ee2468b | 64 | #include "dumpfile.h" |
5e962776 ZD |
65 | |
66 | /* The data stored for the loop. */ | |
67 | ||
68 | struct loop_data | |
69 | { | |
70 | struct loop *outermost_exit; /* The outermost exit of the loop. */ | |
71 | bool has_call; /* True if the loop contains a call. */ | |
1833192f | 72 | /* Maximal register pressure inside loop for given register class |
1756cb66 | 73 | (defined only for the pressure classes). */ |
1833192f VM |
74 | int max_reg_pressure[N_REG_CLASSES]; |
75 | /* Loop regs referenced and live pseudo-registers. */ | |
76 | bitmap_head regs_ref; | |
77 | bitmap_head regs_live; | |
5e962776 ZD |
78 | }; |
79 | ||
80 | #define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux) | |
81 | ||
82 | /* The description of an use. */ | |
83 | ||
84 | struct use | |
85 | { | |
86 | rtx *pos; /* Position of the use. */ | |
89bfd6f5 | 87 | rtx_insn *insn; /* The insn in that the use occurs. */ |
1bfdbb29 | 88 | unsigned addr_use_p; /* Whether the use occurs in an address. */ |
5e962776 ZD |
89 | struct use *next; /* Next use in the list. */ |
90 | }; | |
91 | ||
92 | /* The description of a def. */ | |
93 | ||
94 | struct def | |
95 | { | |
96 | struct use *uses; /* The list of uses that are uniquely reached | |
97 | by it. */ | |
98 | unsigned n_uses; /* Number of such uses. */ | |
1bfdbb29 | 99 | unsigned n_addr_uses; /* Number of uses in addresses. */ |
5e962776 | 100 | unsigned invno; /* The corresponding invariant. */ |
5b92e189 BC |
101 | bool can_prop_to_addr_uses; /* True if the corresponding inv can be |
102 | propagated into its address uses. */ | |
5e962776 ZD |
103 | }; |
104 | ||
105 | /* The data stored for each invariant. */ | |
106 | ||
107 | struct invariant | |
108 | { | |
109 | /* The number of the invariant. */ | |
110 | unsigned invno; | |
111 | ||
1052bd54 ZD |
112 | /* The number of the invariant with the same value. */ |
113 | unsigned eqto; | |
114 | ||
e42e3d15 ZC |
115 | /* The number of invariants which eqto this. */ |
116 | unsigned eqno; | |
117 | ||
1052bd54 ZD |
118 | /* If we moved the invariant out of the loop, the register that contains its |
119 | value. */ | |
120 | rtx reg; | |
5e962776 | 121 | |
1833192f VM |
122 | /* If we moved the invariant out of the loop, the original regno |
123 | that contained its value. */ | |
124 | int orig_regno; | |
125 | ||
5e962776 ZD |
126 | /* The definition of the invariant. */ |
127 | struct def *def; | |
128 | ||
129 | /* The insn in that it is defined. */ | |
89bfd6f5 | 130 | rtx_insn *insn; |
5e962776 ZD |
131 | |
132 | /* Whether it is always executed. */ | |
133 | bool always_executed; | |
134 | ||
135 | /* Whether to move the invariant. */ | |
136 | bool move; | |
137 | ||
1bfdbb29 PB |
138 | /* Whether the invariant is cheap when used as an address. */ |
139 | bool cheap_address; | |
140 | ||
cb20f7e8 | 141 | /* Cost of the invariant. */ |
5e962776 ZD |
142 | unsigned cost; |
143 | ||
144 | /* The invariants it depends on. */ | |
145 | bitmap depends_on; | |
146 | ||
147 | /* Used for detecting already visited invariants during determining | |
148 | costs of movements. */ | |
149 | unsigned stamp; | |
150 | }; | |
151 | ||
1833192f VM |
152 | /* Currently processed loop. */ |
153 | static struct loop *curr_loop; | |
154 | ||
6fb5fa3c DB |
155 | /* Table of invariants indexed by the df_ref uid field. */ |
156 | ||
157 | static unsigned int invariant_table_size = 0; | |
158 | static struct invariant ** invariant_table; | |
159 | ||
1052bd54 ZD |
160 | /* Entry for hash table of invariant expressions. */ |
161 | ||
162 | struct invariant_expr_entry | |
163 | { | |
164 | /* The invariant. */ | |
165 | struct invariant *inv; | |
166 | ||
167 | /* Its value. */ | |
168 | rtx expr; | |
169 | ||
170 | /* Its mode. */ | |
ef4bddc2 | 171 | machine_mode mode; |
1052bd54 ZD |
172 | |
173 | /* Its hash. */ | |
174 | hashval_t hash; | |
175 | }; | |
176 | ||
5e962776 ZD |
177 | /* The actual stamp for marking already visited invariants during determining |
178 | costs of movements. */ | |
179 | ||
180 | static unsigned actual_stamp; | |
181 | ||
edd954e6 KH |
182 | typedef struct invariant *invariant_p; |
183 | ||
edd954e6 | 184 | |
5e962776 ZD |
185 | /* The invariants. */ |
186 | ||
9771b263 | 187 | static vec<invariant_p> invariants; |
5e962776 | 188 | |
6fb5fa3c | 189 | /* Check the size of the invariant table and realloc if necessary. */ |
cb20f7e8 | 190 | |
b8698a0f | 191 | static void |
6fb5fa3c DB |
192 | check_invariant_table_size (void) |
193 | { | |
c3284718 | 194 | if (invariant_table_size < DF_DEFS_TABLE_SIZE ()) |
6fb5fa3c DB |
195 | { |
196 | unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4); | |
d3bfe4de | 197 | invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size); |
b8698a0f | 198 | memset (&invariant_table[invariant_table_size], 0, |
92cfe9d5 | 199 | (new_size - invariant_table_size) * sizeof (struct invariant *)); |
6fb5fa3c DB |
200 | invariant_table_size = new_size; |
201 | } | |
202 | } | |
cb20f7e8 | 203 | |
5e962776 ZD |
204 | /* Test for possibility of invariantness of X. */ |
205 | ||
206 | static bool | |
207 | check_maybe_invariant (rtx x) | |
208 | { | |
209 | enum rtx_code code = GET_CODE (x); | |
210 | int i, j; | |
211 | const char *fmt; | |
212 | ||
213 | switch (code) | |
214 | { | |
d8116890 | 215 | CASE_CONST_ANY: |
5e962776 ZD |
216 | case SYMBOL_REF: |
217 | case CONST: | |
218 | case LABEL_REF: | |
219 | return true; | |
220 | ||
221 | case PC: | |
222 | case CC0: | |
223 | case UNSPEC_VOLATILE: | |
224 | case CALL: | |
225 | return false; | |
226 | ||
227 | case REG: | |
228 | return true; | |
229 | ||
230 | case MEM: | |
231 | /* Load/store motion is done elsewhere. ??? Perhaps also add it here? | |
232 | It should not be hard, and might be faster than "elsewhere". */ | |
233 | ||
234 | /* Just handle the most trivial case where we load from an unchanging | |
235 | location (most importantly, pic tables). */ | |
66f91b93 | 236 | if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x)) |
5e962776 ZD |
237 | break; |
238 | ||
239 | return false; | |
240 | ||
241 | case ASM_OPERANDS: | |
242 | /* Don't mess with insns declared volatile. */ | |
243 | if (MEM_VOLATILE_P (x)) | |
244 | return false; | |
245 | break; | |
246 | ||
247 | default: | |
248 | break; | |
249 | } | |
250 | ||
251 | fmt = GET_RTX_FORMAT (code); | |
252 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
253 | { | |
254 | if (fmt[i] == 'e') | |
255 | { | |
256 | if (!check_maybe_invariant (XEXP (x, i))) | |
257 | return false; | |
258 | } | |
259 | else if (fmt[i] == 'E') | |
260 | { | |
261 | for (j = 0; j < XVECLEN (x, i); j++) | |
262 | if (!check_maybe_invariant (XVECEXP (x, i, j))) | |
263 | return false; | |
264 | } | |
265 | } | |
266 | ||
267 | return true; | |
268 | } | |
269 | ||
1052bd54 ZD |
270 | /* Returns the invariant definition for USE, or NULL if USE is not |
271 | invariant. */ | |
272 | ||
273 | static struct invariant * | |
57512f53 | 274 | invariant_for_use (df_ref use) |
1052bd54 ZD |
275 | { |
276 | struct df_link *defs; | |
57512f53 | 277 | df_ref def; |
50e94c7e | 278 | basic_block bb = DF_REF_BB (use), def_bb; |
1052bd54 | 279 | |
57512f53 | 280 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
b6c9b9bc ZD |
281 | return NULL; |
282 | ||
1052bd54 ZD |
283 | defs = DF_REF_CHAIN (use); |
284 | if (!defs || defs->next) | |
285 | return NULL; | |
286 | def = defs->ref; | |
6fb5fa3c | 287 | check_invariant_table_size (); |
c3284718 | 288 | if (!invariant_table[DF_REF_ID (def)]) |
1052bd54 ZD |
289 | return NULL; |
290 | ||
291 | def_bb = DF_REF_BB (def); | |
292 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
293 | return NULL; | |
c3284718 | 294 | return invariant_table[DF_REF_ID (def)]; |
1052bd54 ZD |
295 | } |
296 | ||
297 | /* Computes hash value for invariant expression X in INSN. */ | |
298 | ||
299 | static hashval_t | |
89bfd6f5 | 300 | hash_invariant_expr_1 (rtx_insn *insn, rtx x) |
1052bd54 ZD |
301 | { |
302 | enum rtx_code code = GET_CODE (x); | |
303 | int i, j; | |
304 | const char *fmt; | |
305 | hashval_t val = code; | |
306 | int do_not_record_p; | |
57512f53 | 307 | df_ref use; |
1052bd54 ZD |
308 | struct invariant *inv; |
309 | ||
310 | switch (code) | |
311 | { | |
d8116890 | 312 | CASE_CONST_ANY: |
1052bd54 ZD |
313 | case SYMBOL_REF: |
314 | case CONST: | |
315 | case LABEL_REF: | |
316 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
317 | ||
318 | case REG: | |
6fb5fa3c | 319 | use = df_find_use (insn, x); |
1052bd54 ZD |
320 | if (!use) |
321 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
322 | inv = invariant_for_use (use); | |
323 | if (!inv) | |
324 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
325 | ||
326 | gcc_assert (inv->eqto != ~0u); | |
327 | return inv->eqto; | |
328 | ||
329 | default: | |
330 | break; | |
331 | } | |
332 | ||
333 | fmt = GET_RTX_FORMAT (code); | |
334 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
335 | { | |
336 | if (fmt[i] == 'e') | |
337 | val ^= hash_invariant_expr_1 (insn, XEXP (x, i)); | |
338 | else if (fmt[i] == 'E') | |
339 | { | |
340 | for (j = 0; j < XVECLEN (x, i); j++) | |
341 | val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j)); | |
342 | } | |
8e1409e8 ZD |
343 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
344 | val ^= XINT (x, i); | |
1052bd54 ZD |
345 | } |
346 | ||
347 | return val; | |
348 | } | |
349 | ||
350 | /* Returns true if the invariant expressions E1 and E2 used in insns INSN1 | |
351 | and INSN2 have always the same value. */ | |
352 | ||
353 | static bool | |
89bfd6f5 | 354 | invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2) |
1052bd54 ZD |
355 | { |
356 | enum rtx_code code = GET_CODE (e1); | |
357 | int i, j; | |
358 | const char *fmt; | |
57512f53 | 359 | df_ref use1, use2; |
1052bd54 ZD |
360 | struct invariant *inv1 = NULL, *inv2 = NULL; |
361 | rtx sub1, sub2; | |
362 | ||
363 | /* If mode of only one of the operands is VOIDmode, it is not equivalent to | |
364 | the other one. If both are VOIDmode, we rely on the caller of this | |
365 | function to verify that their modes are the same. */ | |
366 | if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2)) | |
367 | return false; | |
368 | ||
369 | switch (code) | |
370 | { | |
d8116890 | 371 | CASE_CONST_ANY: |
1052bd54 ZD |
372 | case SYMBOL_REF: |
373 | case CONST: | |
374 | case LABEL_REF: | |
375 | return rtx_equal_p (e1, e2); | |
376 | ||
377 | case REG: | |
6fb5fa3c DB |
378 | use1 = df_find_use (insn1, e1); |
379 | use2 = df_find_use (insn2, e2); | |
1052bd54 ZD |
380 | if (use1) |
381 | inv1 = invariant_for_use (use1); | |
382 | if (use2) | |
383 | inv2 = invariant_for_use (use2); | |
384 | ||
385 | if (!inv1 && !inv2) | |
386 | return rtx_equal_p (e1, e2); | |
387 | ||
388 | if (!inv1 || !inv2) | |
389 | return false; | |
390 | ||
391 | gcc_assert (inv1->eqto != ~0u); | |
392 | gcc_assert (inv2->eqto != ~0u); | |
393 | return inv1->eqto == inv2->eqto; | |
394 | ||
395 | default: | |
396 | break; | |
397 | } | |
398 | ||
399 | fmt = GET_RTX_FORMAT (code); | |
400 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
401 | { | |
402 | if (fmt[i] == 'e') | |
403 | { | |
404 | sub1 = XEXP (e1, i); | |
405 | sub2 = XEXP (e2, i); | |
406 | ||
407 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
408 | return false; | |
409 | } | |
410 | ||
411 | else if (fmt[i] == 'E') | |
412 | { | |
413 | if (XVECLEN (e1, i) != XVECLEN (e2, i)) | |
414 | return false; | |
415 | ||
416 | for (j = 0; j < XVECLEN (e1, i); j++) | |
417 | { | |
418 | sub1 = XVECEXP (e1, i, j); | |
419 | sub2 = XVECEXP (e2, i, j); | |
420 | ||
421 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
422 | return false; | |
423 | } | |
424 | } | |
8e1409e8 ZD |
425 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
426 | { | |
427 | if (XINT (e1, i) != XINT (e2, i)) | |
428 | return false; | |
429 | } | |
430 | /* Unhandled type of subexpression, we fail conservatively. */ | |
431 | else | |
432 | return false; | |
1052bd54 ZD |
433 | } |
434 | ||
435 | return true; | |
436 | } | |
437 | ||
95fbe13e | 438 | struct invariant_expr_hasher : free_ptr_hash <invariant_expr_entry> |
1052bd54 | 439 | { |
67f58944 TS |
440 | static inline hashval_t hash (const invariant_expr_entry *); |
441 | static inline bool equal (const invariant_expr_entry *, | |
442 | const invariant_expr_entry *); | |
4a8fb1a1 LC |
443 | }; |
444 | ||
445 | /* Returns hash value for invariant expression entry ENTRY. */ | |
1052bd54 | 446 | |
4a8fb1a1 | 447 | inline hashval_t |
67f58944 | 448 | invariant_expr_hasher::hash (const invariant_expr_entry *entry) |
4a8fb1a1 | 449 | { |
1052bd54 ZD |
450 | return entry->hash; |
451 | } | |
452 | ||
4a8fb1a1 | 453 | /* Compares invariant expression entries ENTRY1 and ENTRY2. */ |
1052bd54 | 454 | |
4a8fb1a1 | 455 | inline bool |
67f58944 TS |
456 | invariant_expr_hasher::equal (const invariant_expr_entry *entry1, |
457 | const invariant_expr_entry *entry2) | |
1052bd54 | 458 | { |
1052bd54 ZD |
459 | if (entry1->mode != entry2->mode) |
460 | return 0; | |
461 | ||
462 | return invariant_expr_equal_p (entry1->inv->insn, entry1->expr, | |
463 | entry2->inv->insn, entry2->expr); | |
464 | } | |
465 | ||
c203e8a7 | 466 | typedef hash_table<invariant_expr_hasher> invariant_htab_type; |
4a8fb1a1 | 467 | |
1052bd54 ZD |
468 | /* Checks whether invariant with value EXPR in machine mode MODE is |
469 | recorded in EQ. If this is the case, return the invariant. Otherwise | |
470 | insert INV to the table for this expression and return INV. */ | |
471 | ||
472 | static struct invariant * | |
ef4bddc2 | 473 | find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode, |
1052bd54 ZD |
474 | struct invariant *inv) |
475 | { | |
476 | hashval_t hash = hash_invariant_expr_1 (inv->insn, expr); | |
477 | struct invariant_expr_entry *entry; | |
478 | struct invariant_expr_entry pentry; | |
4a8fb1a1 | 479 | invariant_expr_entry **slot; |
1052bd54 ZD |
480 | |
481 | pentry.expr = expr; | |
482 | pentry.inv = inv; | |
483 | pentry.mode = mode; | |
c203e8a7 | 484 | slot = eq->find_slot_with_hash (&pentry, hash, INSERT); |
4a8fb1a1 | 485 | entry = *slot; |
1052bd54 ZD |
486 | |
487 | if (entry) | |
488 | return entry->inv; | |
489 | ||
5ed6ace5 | 490 | entry = XNEW (struct invariant_expr_entry); |
1052bd54 ZD |
491 | entry->inv = inv; |
492 | entry->expr = expr; | |
493 | entry->mode = mode; | |
494 | entry->hash = hash; | |
495 | *slot = entry; | |
496 | ||
497 | return inv; | |
498 | } | |
499 | ||
500 | /* Finds invariants identical to INV and records the equivalence. EQ is the | |
501 | hash table of the invariants. */ | |
502 | ||
503 | static void | |
c203e8a7 | 504 | find_identical_invariants (invariant_htab_type *eq, struct invariant *inv) |
1052bd54 ZD |
505 | { |
506 | unsigned depno; | |
507 | bitmap_iterator bi; | |
508 | struct invariant *dep; | |
509 | rtx expr, set; | |
ef4bddc2 | 510 | machine_mode mode; |
e42e3d15 | 511 | struct invariant *tmp; |
1052bd54 ZD |
512 | |
513 | if (inv->eqto != ~0u) | |
514 | return; | |
515 | ||
516 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
517 | { | |
9771b263 | 518 | dep = invariants[depno]; |
1052bd54 ZD |
519 | find_identical_invariants (eq, dep); |
520 | } | |
521 | ||
522 | set = single_set (inv->insn); | |
523 | expr = SET_SRC (set); | |
524 | mode = GET_MODE (expr); | |
525 | if (mode == VOIDmode) | |
526 | mode = GET_MODE (SET_DEST (set)); | |
e42e3d15 ZC |
527 | |
528 | tmp = find_or_insert_inv (eq, expr, mode, inv); | |
529 | inv->eqto = tmp->invno; | |
530 | ||
531 | if (tmp->invno != inv->invno && inv->always_executed) | |
532 | tmp->eqno++; | |
1052bd54 ZD |
533 | |
534 | if (dump_file && inv->eqto != inv->invno) | |
535 | fprintf (dump_file, | |
e755fcf5 | 536 | "Invariant %d is equivalent to invariant %d.\n", |
1052bd54 ZD |
537 | inv->invno, inv->eqto); |
538 | } | |
539 | ||
540 | /* Find invariants with the same value and record the equivalences. */ | |
541 | ||
542 | static void | |
543 | merge_identical_invariants (void) | |
544 | { | |
545 | unsigned i; | |
546 | struct invariant *inv; | |
c203e8a7 | 547 | invariant_htab_type eq (invariants.length ()); |
1052bd54 | 548 | |
9771b263 | 549 | FOR_EACH_VEC_ELT (invariants, i, inv) |
c203e8a7 | 550 | find_identical_invariants (&eq, inv); |
1052bd54 ZD |
551 | } |
552 | ||
5e962776 ZD |
553 | /* Determines the basic blocks inside LOOP that are always executed and |
554 | stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of | |
555 | basic blocks that may either exit the loop, or contain the call that | |
556 | does not have to return. BODY is body of the loop obtained by | |
557 | get_loop_body_in_dom_order. */ | |
558 | ||
559 | static void | |
560 | compute_always_reached (struct loop *loop, basic_block *body, | |
561 | bitmap may_exit, bitmap always_reached) | |
562 | { | |
563 | unsigned i; | |
564 | ||
565 | for (i = 0; i < loop->num_nodes; i++) | |
566 | { | |
567 | if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i])) | |
568 | bitmap_set_bit (always_reached, i); | |
569 | ||
570 | if (bitmap_bit_p (may_exit, i)) | |
571 | return; | |
572 | } | |
573 | } | |
574 | ||
575 | /* Finds exits out of the LOOP with body BODY. Marks blocks in that we may | |
576 | exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT | |
577 | additionally mark blocks that may exit due to a call. */ | |
578 | ||
579 | static void | |
580 | find_exits (struct loop *loop, basic_block *body, | |
581 | bitmap may_exit, bitmap has_exit) | |
582 | { | |
583 | unsigned i; | |
628f6a4e | 584 | edge_iterator ei; |
5e962776 ZD |
585 | edge e; |
586 | struct loop *outermost_exit = loop, *aexit; | |
587 | bool has_call = false; | |
89bfd6f5 | 588 | rtx_insn *insn; |
5e962776 ZD |
589 | |
590 | for (i = 0; i < loop->num_nodes; i++) | |
591 | { | |
592 | if (body[i]->loop_father == loop) | |
593 | { | |
594 | FOR_BB_INSNS (body[i], insn) | |
595 | { | |
4b4bf941 | 596 | if (CALL_P (insn) |
becfd6e5 KZ |
597 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
598 | || !RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
599 | { |
600 | has_call = true; | |
601 | bitmap_set_bit (may_exit, i); | |
602 | break; | |
603 | } | |
604 | } | |
605 | ||
628f6a4e | 606 | FOR_EACH_EDGE (e, ei, body[i]->succs) |
5e962776 ZD |
607 | { |
608 | if (flow_bb_inside_loop_p (loop, e->dest)) | |
609 | continue; | |
610 | ||
611 | bitmap_set_bit (may_exit, i); | |
612 | bitmap_set_bit (has_exit, i); | |
613 | outermost_exit = find_common_loop (outermost_exit, | |
614 | e->dest->loop_father); | |
615 | } | |
616 | continue; | |
617 | } | |
cb20f7e8 | 618 | |
5e962776 ZD |
619 | /* Use the data stored for the subloop to decide whether we may exit |
620 | through it. It is sufficient to do this for header of the loop, | |
621 | as other basic blocks inside it must be dominated by it. */ | |
622 | if (body[i]->loop_father->header != body[i]) | |
623 | continue; | |
624 | ||
625 | if (LOOP_DATA (body[i]->loop_father)->has_call) | |
626 | { | |
627 | has_call = true; | |
628 | bitmap_set_bit (may_exit, i); | |
629 | } | |
630 | aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit; | |
631 | if (aexit != loop) | |
632 | { | |
633 | bitmap_set_bit (may_exit, i); | |
634 | bitmap_set_bit (has_exit, i); | |
635 | ||
636 | if (flow_loop_nested_p (aexit, outermost_exit)) | |
637 | outermost_exit = aexit; | |
638 | } | |
639 | } | |
640 | ||
1833192f VM |
641 | if (loop->aux == NULL) |
642 | { | |
643 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
644 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
645 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
646 | } | |
5e962776 ZD |
647 | LOOP_DATA (loop)->outermost_exit = outermost_exit; |
648 | LOOP_DATA (loop)->has_call = has_call; | |
649 | } | |
650 | ||
651 | /* Check whether we may assign a value to X from a register. */ | |
652 | ||
653 | static bool | |
654 | may_assign_reg_p (rtx x) | |
655 | { | |
bd361d85 | 656 | return (GET_MODE (x) != VOIDmode |
4b06592a | 657 | && GET_MODE (x) != BLKmode |
bd361d85 | 658 | && can_copy_p (GET_MODE (x)) |
a7f4ccb1 SB |
659 | && (!REG_P (x) |
660 | || !HARD_REGISTER_P (x) | |
661 | || REGNO_REG_CLASS (REGNO (x)) != NO_REGS)); | |
5e962776 ZD |
662 | } |
663 | ||
cb20f7e8 ZD |
664 | /* Finds definitions that may correspond to invariants in LOOP with body |
665 | BODY. */ | |
5e962776 ZD |
666 | |
667 | static void | |
7be64667 | 668 | find_defs (struct loop *loop) |
5e962776 | 669 | { |
7b19209f SB |
670 | if (dump_file) |
671 | { | |
672 | fprintf (dump_file, | |
673 | "*****starting processing of loop %d ******\n", | |
674 | loop->num); | |
675 | } | |
676 | ||
6fb5fa3c DB |
677 | df_remove_problem (df_chain); |
678 | df_process_deferred_rescans (); | |
679 | df_chain_add_problem (DF_UD_CHAIN); | |
43d56ad7 TP |
680 | df_live_add_problem (); |
681 | df_live_set_all_dirty (); | |
7b19209f | 682 | df_set_flags (DF_RD_PRUNE_DEAD_DEFS); |
7be64667 | 683 | df_analyze_loop (loop); |
7b19209f | 684 | check_invariant_table_size (); |
6fb5fa3c DB |
685 | |
686 | if (dump_file) | |
687 | { | |
ffd640ed | 688 | df_dump_region (dump_file); |
7b19209f SB |
689 | fprintf (dump_file, |
690 | "*****ending processing of loop %d ******\n", | |
691 | loop->num); | |
6fb5fa3c | 692 | } |
5e962776 ZD |
693 | } |
694 | ||
695 | /* Creates a new invariant for definition DEF in INSN, depending on invariants | |
696 | in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed, | |
1052bd54 ZD |
697 | unless the program ends due to a function call. The newly created invariant |
698 | is returned. */ | |
5e962776 | 699 | |
1052bd54 | 700 | static struct invariant * |
89bfd6f5 | 701 | create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on, |
5e962776 ZD |
702 | bool always_executed) |
703 | { | |
5ed6ace5 | 704 | struct invariant *inv = XNEW (struct invariant); |
5e962776 | 705 | rtx set = single_set (insn); |
f40751dd | 706 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); |
5e962776 ZD |
707 | |
708 | inv->def = def; | |
709 | inv->always_executed = always_executed; | |
710 | inv->depends_on = depends_on; | |
711 | ||
712 | /* If the set is simple, usually by moving it we move the whole store out of | |
713 | the loop. Otherwise we save only cost of the computation. */ | |
714 | if (def) | |
1bfdbb29 | 715 | { |
d51102f3 | 716 | inv->cost = set_rtx_cost (set, speed); |
1578e910 MM |
717 | /* ??? Try to determine cheapness of address computation. Unfortunately |
718 | the address cost is only a relative measure, we can't really compare | |
719 | it with any absolute number, but only with other address costs. | |
720 | But here we don't have any other addresses, so compare with a magic | |
721 | number anyway. It has to be large enough to not regress PR33928 | |
722 | (by avoiding to move reg+8,reg+16,reg+24 invariants), but small | |
723 | enough to not regress 410.bwaves either (by still moving reg+reg | |
724 | invariants). | |
725 | See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */ | |
315a349c DS |
726 | if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set)))) |
727 | inv->cheap_address = address_cost (SET_SRC (set), word_mode, | |
728 | ADDR_SPACE_GENERIC, speed) < 3; | |
729 | else | |
730 | inv->cheap_address = false; | |
1bfdbb29 | 731 | } |
5e962776 | 732 | else |
1bfdbb29 | 733 | { |
e548c9df AM |
734 | inv->cost = set_src_cost (SET_SRC (set), GET_MODE (SET_DEST (set)), |
735 | speed); | |
1bfdbb29 PB |
736 | inv->cheap_address = false; |
737 | } | |
5e962776 ZD |
738 | |
739 | inv->move = false; | |
1052bd54 | 740 | inv->reg = NULL_RTX; |
1833192f | 741 | inv->orig_regno = -1; |
5e962776 ZD |
742 | inv->stamp = 0; |
743 | inv->insn = insn; | |
744 | ||
9771b263 | 745 | inv->invno = invariants.length (); |
1052bd54 | 746 | inv->eqto = ~0u; |
e42e3d15 ZC |
747 | |
748 | /* Itself. */ | |
749 | inv->eqno = 1; | |
750 | ||
5e962776 ZD |
751 | if (def) |
752 | def->invno = inv->invno; | |
9771b263 | 753 | invariants.safe_push (inv); |
5e962776 ZD |
754 | |
755 | if (dump_file) | |
756 | { | |
757 | fprintf (dump_file, | |
758 | "Set in insn %d is invariant (%d), cost %d, depends on ", | |
759 | INSN_UID (insn), inv->invno, inv->cost); | |
760 | dump_bitmap (dump_file, inv->depends_on); | |
761 | } | |
1052bd54 ZD |
762 | |
763 | return inv; | |
5e962776 ZD |
764 | } |
765 | ||
5b92e189 BC |
766 | /* Given invariant DEF and its address USE, check if the corresponding |
767 | invariant expr can be propagated into the use or not. */ | |
768 | ||
769 | static bool | |
770 | inv_can_prop_to_addr_use (struct def *def, df_ref use) | |
771 | { | |
772 | struct invariant *inv; | |
773 | rtx *pos = DF_REF_REAL_LOC (use), def_set; | |
774 | rtx_insn *use_insn = DF_REF_INSN (use); | |
775 | rtx_insn *def_insn; | |
776 | bool ok; | |
777 | ||
778 | inv = invariants[def->invno]; | |
779 | /* No need to check if address expression is expensive. */ | |
780 | if (!inv->cheap_address) | |
781 | return false; | |
782 | ||
783 | def_insn = inv->insn; | |
784 | def_set = single_set (def_insn); | |
785 | if (!def_set) | |
786 | return false; | |
787 | ||
788 | validate_unshare_change (use_insn, pos, SET_SRC (def_set), true); | |
789 | ok = verify_changes (0); | |
790 | cancel_changes (0); | |
791 | return ok; | |
792 | } | |
793 | ||
5e962776 ZD |
794 | /* Record USE at DEF. */ |
795 | ||
796 | static void | |
1bfdbb29 | 797 | record_use (struct def *def, df_ref use) |
5e962776 | 798 | { |
5ed6ace5 | 799 | struct use *u = XNEW (struct use); |
5e962776 | 800 | |
1bfdbb29 PB |
801 | u->pos = DF_REF_REAL_LOC (use); |
802 | u->insn = DF_REF_INSN (use); | |
803 | u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD | |
3e807ffc | 804 | || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE); |
5e962776 ZD |
805 | u->next = def->uses; |
806 | def->uses = u; | |
807 | def->n_uses++; | |
1bfdbb29 | 808 | if (u->addr_use_p) |
5b92e189 BC |
809 | { |
810 | /* Initialize propagation information if this is the first addr | |
811 | use of the inv def. */ | |
812 | if (def->n_addr_uses == 0) | |
813 | def->can_prop_to_addr_uses = true; | |
814 | ||
815 | def->n_addr_uses++; | |
816 | if (def->can_prop_to_addr_uses && !inv_can_prop_to_addr_use (def, use)) | |
817 | def->can_prop_to_addr_uses = false; | |
818 | } | |
5e962776 ZD |
819 | } |
820 | ||
6fb5fa3c DB |
821 | /* Finds the invariants USE depends on and store them to the DEPENDS_ON |
822 | bitmap. Returns true if all dependencies of USE are known to be | |
b6c9b9bc | 823 | loop invariants, false otherwise. */ |
5e962776 ZD |
824 | |
825 | static bool | |
57512f53 | 826 | check_dependency (basic_block bb, df_ref use, bitmap depends_on) |
5e962776 | 827 | { |
57512f53 | 828 | df_ref def; |
6fb5fa3c | 829 | basic_block def_bb; |
4d779342 | 830 | struct df_link *defs; |
5e962776 | 831 | struct def *def_data; |
1052bd54 | 832 | struct invariant *inv; |
b8698a0f | 833 | |
57512f53 | 834 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
6fb5fa3c | 835 | return false; |
b8698a0f | 836 | |
6fb5fa3c DB |
837 | defs = DF_REF_CHAIN (use); |
838 | if (!defs) | |
1a17bd35 EB |
839 | { |
840 | unsigned int regno = DF_REF_REGNO (use); | |
841 | ||
842 | /* If this is the use of an uninitialized argument register that is | |
843 | likely to be spilled, do not move it lest this might extend its | |
844 | lifetime and cause reload to die. This can occur for a call to | |
845 | a function taking complex number arguments and moving the insns | |
846 | preparing the arguments without moving the call itself wouldn't | |
847 | gain much in practice. */ | |
848 | if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE) | |
849 | && FUNCTION_ARG_REGNO_P (regno) | |
850 | && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) | |
851 | return false; | |
852 | ||
853 | return true; | |
854 | } | |
b8698a0f | 855 | |
6fb5fa3c DB |
856 | if (defs->next) |
857 | return false; | |
b8698a0f | 858 | |
6fb5fa3c DB |
859 | def = defs->ref; |
860 | check_invariant_table_size (); | |
c3284718 | 861 | inv = invariant_table[DF_REF_ID (def)]; |
6fb5fa3c DB |
862 | if (!inv) |
863 | return false; | |
b8698a0f | 864 | |
6fb5fa3c DB |
865 | def_data = inv->def; |
866 | gcc_assert (def_data != NULL); | |
b8698a0f | 867 | |
6fb5fa3c DB |
868 | def_bb = DF_REF_BB (def); |
869 | /* Note that in case bb == def_bb, we know that the definition | |
870 | dominates insn, because def has invariant_table[DF_REF_ID(def)] | |
871 | defined and we process the insns in the basic block bb | |
872 | sequentially. */ | |
873 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
874 | return false; | |
b8698a0f | 875 | |
6fb5fa3c DB |
876 | bitmap_set_bit (depends_on, def_data->invno); |
877 | return true; | |
878 | } | |
1052bd54 | 879 | |
1052bd54 | 880 | |
6fb5fa3c DB |
881 | /* Finds the invariants INSN depends on and store them to the DEPENDS_ON |
882 | bitmap. Returns true if all dependencies of INSN are known to be | |
883 | loop invariants, false otherwise. */ | |
5e962776 | 884 | |
6fb5fa3c | 885 | static bool |
89bfd6f5 | 886 | check_dependencies (rtx_insn *insn, bitmap depends_on) |
6fb5fa3c | 887 | { |
50e94c7e | 888 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 889 | df_ref use; |
6fb5fa3c | 890 | basic_block bb = BLOCK_FOR_INSN (insn); |
5e962776 | 891 | |
bfac633a RS |
892 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
893 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 894 | return false; |
bfac633a RS |
895 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
896 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 897 | return false; |
b8698a0f | 898 | |
5e962776 ZD |
899 | return true; |
900 | } | |
901 | ||
2c97f472 ZC |
902 | /* Pre-check candidate DEST to skip the one which can not make a valid insn |
903 | during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */ | |
904 | static bool | |
905 | pre_check_invariant_p (bool simple, rtx dest) | |
906 | { | |
907 | if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1) | |
908 | { | |
909 | df_ref use; | |
2c97f472 ZC |
910 | unsigned int i = REGNO (dest); |
911 | struct df_insn_info *insn_info; | |
912 | df_ref def_rec; | |
913 | ||
914 | for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use)) | |
915 | { | |
e67d1102 | 916 | rtx_insn *ref = DF_REF_INSN (use); |
2c97f472 ZC |
917 | insn_info = DF_INSN_INFO_GET (ref); |
918 | ||
919 | FOR_EACH_INSN_INFO_DEF (def_rec, insn_info) | |
920 | if (DF_REF_REGNO (def_rec) == i) | |
921 | { | |
922 | /* Multi definitions at this stage, most likely are due to | |
923 | instruction constraints, which requires both read and write | |
924 | on the same register. Since move_invariant_reg is not | |
925 | powerful enough to handle such cases, just ignore the INV | |
926 | and leave the chance to others. */ | |
927 | return false; | |
928 | } | |
929 | } | |
930 | } | |
931 | return true; | |
932 | } | |
933 | ||
5e962776 ZD |
934 | /* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always |
935 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 936 | unless the program ends due to a function call. */ |
5e962776 ZD |
937 | |
938 | static void | |
89bfd6f5 | 939 | find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 940 | { |
57512f53 | 941 | df_ref ref; |
5e962776 ZD |
942 | struct def *def; |
943 | bitmap depends_on; | |
944 | rtx set, dest; | |
945 | bool simple = true; | |
1052bd54 | 946 | struct invariant *inv; |
5e962776 | 947 | |
00f70f98 | 948 | /* We can't move a CC0 setter without the user. */ |
058eb3b0 | 949 | if (HAVE_cc0 && sets_cc0_p (insn)) |
00f70f98 | 950 | return; |
00f70f98 | 951 | |
5e962776 ZD |
952 | set = single_set (insn); |
953 | if (!set) | |
954 | return; | |
955 | dest = SET_DEST (set); | |
956 | ||
2ca202e7 | 957 | if (!REG_P (dest) |
5e962776 ZD |
958 | || HARD_REGISTER_P (dest)) |
959 | simple = false; | |
960 | ||
2c97f472 ZC |
961 | if (!may_assign_reg_p (dest) |
962 | || !pre_check_invariant_p (simple, dest) | |
a7f4ccb1 | 963 | || !check_maybe_invariant (SET_SRC (set))) |
5e962776 ZD |
964 | return; |
965 | ||
28749cfb ZD |
966 | /* If the insn can throw exception, we cannot move it at all without changing |
967 | cfg. */ | |
968 | if (can_throw_internal (insn)) | |
969 | return; | |
5e962776 | 970 | |
28749cfb | 971 | /* We cannot make trapping insn executed, unless it was executed before. */ |
48e8382e | 972 | if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached) |
28749cfb | 973 | return; |
5e962776 | 974 | |
8bdbfff5 | 975 | depends_on = BITMAP_ALLOC (NULL); |
cb20f7e8 | 976 | if (!check_dependencies (insn, depends_on)) |
5e962776 | 977 | { |
8bdbfff5 | 978 | BITMAP_FREE (depends_on); |
5e962776 ZD |
979 | return; |
980 | } | |
981 | ||
982 | if (simple) | |
5ed6ace5 | 983 | def = XCNEW (struct def); |
5e962776 ZD |
984 | else |
985 | def = NULL; | |
986 | ||
1052bd54 ZD |
987 | inv = create_new_invariant (def, insn, depends_on, always_executed); |
988 | ||
989 | if (simple) | |
990 | { | |
6fb5fa3c DB |
991 | ref = df_find_def (insn, dest); |
992 | check_invariant_table_size (); | |
c3284718 | 993 | invariant_table[DF_REF_ID (ref)] = inv; |
1052bd54 | 994 | } |
5e962776 ZD |
995 | } |
996 | ||
cb20f7e8 | 997 | /* Record registers used in INSN that have a unique invariant definition. */ |
5e962776 ZD |
998 | |
999 | static void | |
89bfd6f5 | 1000 | record_uses (rtx_insn *insn) |
5e962776 | 1001 | { |
50e94c7e | 1002 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 1003 | df_ref use; |
1052bd54 ZD |
1004 | struct invariant *inv; |
1005 | ||
bfac633a | 1006 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
6fb5fa3c | 1007 | { |
6fb5fa3c DB |
1008 | inv = invariant_for_use (use); |
1009 | if (inv) | |
1bfdbb29 | 1010 | record_use (inv->def, use); |
6fb5fa3c | 1011 | } |
bfac633a | 1012 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
5e962776 | 1013 | { |
1052bd54 ZD |
1014 | inv = invariant_for_use (use); |
1015 | if (inv) | |
1bfdbb29 | 1016 | record_use (inv->def, use); |
5e962776 ZD |
1017 | } |
1018 | } | |
1019 | ||
1020 | /* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always | |
1021 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 1022 | unless the program ends due to a function call. */ |
5e962776 ZD |
1023 | |
1024 | static void | |
89bfd6f5 | 1025 | find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 1026 | { |
cb20f7e8 ZD |
1027 | find_invariant_insn (insn, always_reached, always_executed); |
1028 | record_uses (insn); | |
5e962776 ZD |
1029 | } |
1030 | ||
1031 | /* Finds invariants in basic block BB. ALWAYS_REACHED is true if the | |
1032 | basic block is always executed. ALWAYS_EXECUTED is true if the basic | |
1033 | block is always executed, unless the program ends due to a function | |
cb20f7e8 | 1034 | call. */ |
5e962776 ZD |
1035 | |
1036 | static void | |
cb20f7e8 | 1037 | find_invariants_bb (basic_block bb, bool always_reached, bool always_executed) |
5e962776 | 1038 | { |
89bfd6f5 | 1039 | rtx_insn *insn; |
5e962776 ZD |
1040 | |
1041 | FOR_BB_INSNS (bb, insn) | |
1042 | { | |
b5b8b0ac | 1043 | if (!NONDEBUG_INSN_P (insn)) |
5e962776 ZD |
1044 | continue; |
1045 | ||
cb20f7e8 | 1046 | find_invariants_insn (insn, always_reached, always_executed); |
5e962776 ZD |
1047 | |
1048 | if (always_reached | |
4b4bf941 | 1049 | && CALL_P (insn) |
becfd6e5 KZ |
1050 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
1051 | || ! RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
1052 | always_reached = false; |
1053 | } | |
1054 | } | |
1055 | ||
1056 | /* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of | |
1057 | basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the | |
1058 | bitmap of basic blocks in BODY that are always executed unless the program | |
cb20f7e8 | 1059 | ends due to a function call. */ |
5e962776 ZD |
1060 | |
1061 | static void | |
1062 | find_invariants_body (struct loop *loop, basic_block *body, | |
cb20f7e8 | 1063 | bitmap always_reached, bitmap always_executed) |
5e962776 ZD |
1064 | { |
1065 | unsigned i; | |
1066 | ||
1067 | for (i = 0; i < loop->num_nodes; i++) | |
1068 | find_invariants_bb (body[i], | |
1069 | bitmap_bit_p (always_reached, i), | |
cb20f7e8 | 1070 | bitmap_bit_p (always_executed, i)); |
5e962776 ZD |
1071 | } |
1072 | ||
cb20f7e8 | 1073 | /* Finds invariants in LOOP. */ |
5e962776 ZD |
1074 | |
1075 | static void | |
cb20f7e8 | 1076 | find_invariants (struct loop *loop) |
5e962776 | 1077 | { |
8bdbfff5 NS |
1078 | bitmap may_exit = BITMAP_ALLOC (NULL); |
1079 | bitmap always_reached = BITMAP_ALLOC (NULL); | |
1080 | bitmap has_exit = BITMAP_ALLOC (NULL); | |
1081 | bitmap always_executed = BITMAP_ALLOC (NULL); | |
5e962776 ZD |
1082 | basic_block *body = get_loop_body_in_dom_order (loop); |
1083 | ||
1084 | find_exits (loop, body, may_exit, has_exit); | |
1085 | compute_always_reached (loop, body, may_exit, always_reached); | |
1086 | compute_always_reached (loop, body, has_exit, always_executed); | |
1087 | ||
7be64667 | 1088 | find_defs (loop); |
cb20f7e8 | 1089 | find_invariants_body (loop, body, always_reached, always_executed); |
1052bd54 | 1090 | merge_identical_invariants (); |
5e962776 | 1091 | |
8bdbfff5 NS |
1092 | BITMAP_FREE (always_reached); |
1093 | BITMAP_FREE (always_executed); | |
1094 | BITMAP_FREE (may_exit); | |
1095 | BITMAP_FREE (has_exit); | |
5e962776 ZD |
1096 | free (body); |
1097 | } | |
1098 | ||
1099 | /* Frees a list of uses USE. */ | |
1100 | ||
1101 | static void | |
1102 | free_use_list (struct use *use) | |
1103 | { | |
1104 | struct use *next; | |
1105 | ||
1106 | for (; use; use = next) | |
1107 | { | |
1108 | next = use->next; | |
1109 | free (use); | |
1110 | } | |
1111 | } | |
1112 | ||
1756cb66 | 1113 | /* Return pressure class and number of hard registers (through *NREGS) |
1833192f VM |
1114 | for destination of INSN. */ |
1115 | static enum reg_class | |
89bfd6f5 | 1116 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1833192f VM |
1117 | { |
1118 | rtx reg; | |
1756cb66 | 1119 | enum reg_class pressure_class; |
1833192f | 1120 | rtx set = single_set (insn); |
b8698a0f | 1121 | |
1833192f VM |
1122 | /* Considered invariant insns have only one set. */ |
1123 | gcc_assert (set != NULL_RTX); | |
1124 | reg = SET_DEST (set); | |
1125 | if (GET_CODE (reg) == SUBREG) | |
1126 | reg = SUBREG_REG (reg); | |
1127 | if (MEM_P (reg)) | |
1128 | { | |
1129 | *nregs = 0; | |
1756cb66 | 1130 | pressure_class = NO_REGS; |
1833192f VM |
1131 | } |
1132 | else | |
1133 | { | |
1134 | if (! REG_P (reg)) | |
1135 | reg = NULL_RTX; | |
1136 | if (reg == NULL_RTX) | |
1756cb66 | 1137 | pressure_class = GENERAL_REGS; |
1833192f | 1138 | else |
1756cb66 VM |
1139 | { |
1140 | pressure_class = reg_allocno_class (REGNO (reg)); | |
1141 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1142 | } | |
1143 | *nregs | |
1144 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
1833192f | 1145 | } |
1756cb66 | 1146 | return pressure_class; |
1833192f VM |
1147 | } |
1148 | ||
5e962776 | 1149 | /* Calculates cost and number of registers needed for moving invariant INV |
51a69168 ZC |
1150 | out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be |
1151 | the REG_CLASS of INV. Return | |
1152 | -1: if INV is invalid. | |
1153 | 0: if INV and its depends_on have same reg_class | |
1154 | 1: if INV and its depends_on have different reg_classes. */ | |
5e962776 | 1155 | |
51a69168 ZC |
1156 | static int |
1157 | get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed, | |
1158 | enum reg_class *cl) | |
5e962776 | 1159 | { |
1833192f VM |
1160 | int i, acomp_cost; |
1161 | unsigned aregs_needed[N_REG_CLASSES]; | |
5e962776 ZD |
1162 | unsigned depno; |
1163 | struct invariant *dep; | |
87c476a2 | 1164 | bitmap_iterator bi; |
51a69168 | 1165 | int ret = 1; |
5e962776 | 1166 | |
1052bd54 | 1167 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1168 | inv = invariants[inv->eqto]; |
1052bd54 | 1169 | |
5e962776 | 1170 | *comp_cost = 0; |
1833192f VM |
1171 | if (! flag_ira_loop_pressure) |
1172 | regs_needed[0] = 0; | |
1173 | else | |
1174 | { | |
1756cb66 VM |
1175 | for (i = 0; i < ira_pressure_classes_num; i++) |
1176 | regs_needed[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1177 | } |
1178 | ||
5e962776 ZD |
1179 | if (inv->move |
1180 | || inv->stamp == actual_stamp) | |
51a69168 | 1181 | return -1; |
5e962776 ZD |
1182 | inv->stamp = actual_stamp; |
1183 | ||
1833192f VM |
1184 | if (! flag_ira_loop_pressure) |
1185 | regs_needed[0]++; | |
1186 | else | |
1187 | { | |
1188 | int nregs; | |
1756cb66 | 1189 | enum reg_class pressure_class; |
1833192f | 1190 | |
1756cb66 VM |
1191 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1192 | regs_needed[pressure_class] += nregs; | |
51a69168 ZC |
1193 | *cl = pressure_class; |
1194 | ret = 0; | |
1833192f VM |
1195 | } |
1196 | ||
1bfdbb29 | 1197 | if (!inv->cheap_address |
315a349c | 1198 | || inv->def->n_uses == 0 |
5b92e189 BC |
1199 | || inv->def->n_addr_uses < inv->def->n_uses |
1200 | /* Count cost if the inv can't be propagated into address uses. */ | |
1201 | || !inv->def->can_prop_to_addr_uses) | |
e42e3d15 | 1202 | (*comp_cost) += inv->cost * inv->eqno; |
5e962776 | 1203 | |
3d8504ac RS |
1204 | #ifdef STACK_REGS |
1205 | { | |
1206 | /* Hoisting constant pool constants into stack regs may cost more than | |
1207 | just single register. On x87, the balance is affected both by the | |
c0220ea4 | 1208 | small number of FP registers, and by its register stack organization, |
3d8504ac RS |
1209 | that forces us to add compensation code in and around the loop to |
1210 | shuffle the operands to the top of stack before use, and pop them | |
1211 | from the stack after the loop finishes. | |
1212 | ||
1213 | To model this effect, we increase the number of registers needed for | |
1214 | stack registers by two: one register push, and one register pop. | |
1215 | This usually has the effect that FP constant loads from the constant | |
1216 | pool are not moved out of the loop. | |
1217 | ||
1218 | Note that this also means that dependent invariants can not be moved. | |
1219 | However, the primary purpose of this pass is to move loop invariant | |
1220 | address arithmetic out of loops, and address arithmetic that depends | |
1221 | on floating point constants is unlikely to ever occur. */ | |
1222 | rtx set = single_set (inv->insn); | |
1223 | if (set | |
1833192f VM |
1224 | && IS_STACK_MODE (GET_MODE (SET_SRC (set))) |
1225 | && constant_pool_constant_p (SET_SRC (set))) | |
1226 | { | |
1227 | if (flag_ira_loop_pressure) | |
1756cb66 | 1228 | regs_needed[ira_stack_reg_pressure_class] += 2; |
1833192f VM |
1229 | else |
1230 | regs_needed[0] += 2; | |
1231 | } | |
3d8504ac RS |
1232 | } |
1233 | #endif | |
1234 | ||
87c476a2 | 1235 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) |
5e962776 | 1236 | { |
1833192f | 1237 | bool check_p; |
51a69168 ZC |
1238 | enum reg_class dep_cl = ALL_REGS; |
1239 | int dep_ret; | |
1833192f | 1240 | |
9771b263 | 1241 | dep = invariants[depno]; |
5e962776 | 1242 | |
61fc05c7 ZC |
1243 | /* If DEP is moved out of the loop, it is not a depends_on any more. */ |
1244 | if (dep->move) | |
1245 | continue; | |
1246 | ||
51a69168 | 1247 | dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl); |
5e962776 | 1248 | |
1833192f VM |
1249 | if (! flag_ira_loop_pressure) |
1250 | check_p = aregs_needed[0] != 0; | |
1251 | else | |
1252 | { | |
1756cb66 VM |
1253 | for (i = 0; i < ira_pressure_classes_num; i++) |
1254 | if (aregs_needed[ira_pressure_classes[i]] != 0) | |
1833192f | 1255 | break; |
1756cb66 | 1256 | check_p = i < ira_pressure_classes_num; |
51a69168 ZC |
1257 | |
1258 | if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl))) | |
1259 | { | |
1260 | *cl = ALL_REGS; | |
1261 | ret = 1; | |
1262 | } | |
1833192f VM |
1263 | } |
1264 | if (check_p | |
5e962776 ZD |
1265 | /* We need to check always_executed, since if the original value of |
1266 | the invariant may be preserved, we may need to keep it in a | |
1267 | separate register. TODO check whether the register has an | |
1268 | use outside of the loop. */ | |
1269 | && dep->always_executed | |
1270 | && !dep->def->uses->next) | |
1271 | { | |
1272 | /* If this is a single use, after moving the dependency we will not | |
1273 | need a new register. */ | |
1833192f VM |
1274 | if (! flag_ira_loop_pressure) |
1275 | aregs_needed[0]--; | |
1276 | else | |
1277 | { | |
1278 | int nregs; | |
1756cb66 | 1279 | enum reg_class pressure_class; |
1833192f | 1280 | |
1756cb66 VM |
1281 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1282 | aregs_needed[pressure_class] -= nregs; | |
1833192f | 1283 | } |
5e962776 ZD |
1284 | } |
1285 | ||
1833192f VM |
1286 | if (! flag_ira_loop_pressure) |
1287 | regs_needed[0] += aregs_needed[0]; | |
1288 | else | |
1289 | { | |
1756cb66 VM |
1290 | for (i = 0; i < ira_pressure_classes_num; i++) |
1291 | regs_needed[ira_pressure_classes[i]] | |
1292 | += aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1293 | } |
5e962776 | 1294 | (*comp_cost) += acomp_cost; |
87c476a2 | 1295 | } |
51a69168 | 1296 | return ret; |
5e962776 ZD |
1297 | } |
1298 | ||
1299 | /* Calculates gain for eliminating invariant INV. REGS_USED is the number | |
a154b43a ZD |
1300 | of registers used in the loop, NEW_REGS is the number of new variables |
1301 | already added due to the invariant motion. The number of registers needed | |
bec922f0 SL |
1302 | for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed |
1303 | through to estimate_reg_pressure_cost. */ | |
5e962776 ZD |
1304 | |
1305 | static int | |
1306 | gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | |
bec922f0 SL |
1307 | unsigned *new_regs, unsigned regs_used, |
1308 | bool speed, bool call_p) | |
5e962776 ZD |
1309 | { |
1310 | int comp_cost, size_cost; | |
e54bd4ab JJ |
1311 | /* Workaround -Wmaybe-uninitialized false positive during |
1312 | profiledbootstrap by initializing it. */ | |
1313 | enum reg_class cl = NO_REGS; | |
51a69168 | 1314 | int ret; |
5e962776 | 1315 | |
5e962776 ZD |
1316 | actual_stamp++; |
1317 | ||
51a69168 | 1318 | ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl); |
1833192f VM |
1319 | |
1320 | if (! flag_ira_loop_pressure) | |
1321 | { | |
1322 | size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], | |
bec922f0 | 1323 | regs_used, speed, call_p) |
1833192f | 1324 | - estimate_reg_pressure_cost (new_regs[0], |
bec922f0 | 1325 | regs_used, speed, call_p)); |
1833192f | 1326 | } |
51a69168 ZC |
1327 | else if (ret < 0) |
1328 | return -1; | |
1329 | else if ((ret == 0) && (cl == NO_REGS)) | |
1330 | /* Hoist it anyway since it does not impact register pressure. */ | |
1331 | return 1; | |
1833192f VM |
1332 | else |
1333 | { | |
1334 | int i; | |
1756cb66 | 1335 | enum reg_class pressure_class; |
1833192f | 1336 | |
1756cb66 | 1337 | for (i = 0; i < ira_pressure_classes_num; i++) |
1833192f | 1338 | { |
1756cb66 | 1339 | pressure_class = ira_pressure_classes[i]; |
51a69168 ZC |
1340 | |
1341 | if (!reg_classes_intersect_p (pressure_class, cl)) | |
1342 | continue; | |
1343 | ||
1756cb66 VM |
1344 | if ((int) new_regs[pressure_class] |
1345 | + (int) regs_needed[pressure_class] | |
1346 | + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1833192f | 1347 | + IRA_LOOP_RESERVED_REGS |
f508f827 | 1348 | > ira_class_hard_regs_num[pressure_class]) |
1833192f VM |
1349 | break; |
1350 | } | |
1756cb66 | 1351 | if (i < ira_pressure_classes_num) |
1833192f VM |
1352 | /* There will be register pressure excess and we want not to |
1353 | make this loop invariant motion. All loop invariants with | |
1354 | non-positive gains will be rejected in function | |
1355 | find_invariants_to_move. Therefore we return the negative | |
1356 | number here. | |
1357 | ||
1358 | One could think that this rejects also expensive loop | |
1359 | invariant motions and this will hurt code performance. | |
1360 | However numerous experiments with different heuristics | |
1361 | taking invariant cost into account did not confirm this | |
1362 | assumption. There are possible explanations for this | |
1363 | result: | |
1364 | o probably all expensive invariants were already moved out | |
1365 | of the loop by PRE and gimple invariant motion pass. | |
1366 | o expensive invariant execution will be hidden by insn | |
1367 | scheduling or OOO processor hardware because usually such | |
1368 | invariants have a lot of freedom to be executed | |
1369 | out-of-order. | |
1370 | Another reason for ignoring invariant cost vs spilling cost | |
1371 | heuristics is also in difficulties to evaluate accurately | |
1372 | spill cost at this stage. */ | |
1373 | return -1; | |
1374 | else | |
1375 | size_cost = 0; | |
1376 | } | |
5e962776 ZD |
1377 | |
1378 | return comp_cost - size_cost; | |
1379 | } | |
1380 | ||
1381 | /* Finds invariant with best gain for moving. Returns the gain, stores | |
1382 | the invariant in *BEST and number of registers needed for it to | |
a154b43a ZD |
1383 | *REGS_NEEDED. REGS_USED is the number of registers used in the loop. |
1384 | NEW_REGS is the number of new variables already added due to invariant | |
1385 | motion. */ | |
5e962776 ZD |
1386 | |
1387 | static int | |
1388 | best_gain_for_invariant (struct invariant **best, unsigned *regs_needed, | |
bec922f0 SL |
1389 | unsigned *new_regs, unsigned regs_used, |
1390 | bool speed, bool call_p) | |
5e962776 ZD |
1391 | { |
1392 | struct invariant *inv; | |
1833192f VM |
1393 | int i, gain = 0, again; |
1394 | unsigned aregs_needed[N_REG_CLASSES], invno; | |
5e962776 | 1395 | |
9771b263 | 1396 | FOR_EACH_VEC_ELT (invariants, invno, inv) |
5e962776 | 1397 | { |
5e962776 ZD |
1398 | if (inv->move) |
1399 | continue; | |
1400 | ||
1052bd54 ZD |
1401 | /* Only consider the "representatives" of equivalent invariants. */ |
1402 | if (inv->eqto != inv->invno) | |
1403 | continue; | |
1404 | ||
1833192f | 1405 | again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used, |
bec922f0 | 1406 | speed, call_p); |
5e962776 ZD |
1407 | if (again > gain) |
1408 | { | |
1409 | gain = again; | |
1410 | *best = inv; | |
1833192f VM |
1411 | if (! flag_ira_loop_pressure) |
1412 | regs_needed[0] = aregs_needed[0]; | |
1413 | else | |
1414 | { | |
1756cb66 VM |
1415 | for (i = 0; i < ira_pressure_classes_num; i++) |
1416 | regs_needed[ira_pressure_classes[i]] | |
1417 | = aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1418 | } |
5e962776 ZD |
1419 | } |
1420 | } | |
1421 | ||
1422 | return gain; | |
1423 | } | |
1424 | ||
1425 | /* Marks invariant INVNO and all its dependencies for moving. */ | |
1426 | ||
1427 | static void | |
1833192f | 1428 | set_move_mark (unsigned invno, int gain) |
5e962776 | 1429 | { |
9771b263 | 1430 | struct invariant *inv = invariants[invno]; |
87c476a2 | 1431 | bitmap_iterator bi; |
5e962776 | 1432 | |
1052bd54 | 1433 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1434 | inv = invariants[inv->eqto]; |
1052bd54 | 1435 | |
5e962776 ZD |
1436 | if (inv->move) |
1437 | return; | |
1438 | inv->move = true; | |
1439 | ||
1440 | if (dump_file) | |
1833192f VM |
1441 | { |
1442 | if (gain >= 0) | |
1443 | fprintf (dump_file, "Decided to move invariant %d -- gain %d\n", | |
1444 | invno, gain); | |
1445 | else | |
1446 | fprintf (dump_file, "Decided to move dependent invariant %d\n", | |
1447 | invno); | |
1448 | }; | |
5e962776 | 1449 | |
87c476a2 ZD |
1450 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi) |
1451 | { | |
1833192f | 1452 | set_move_mark (invno, -1); |
87c476a2 | 1453 | } |
5e962776 ZD |
1454 | } |
1455 | ||
cb20f7e8 | 1456 | /* Determines which invariants to move. */ |
5e962776 ZD |
1457 | |
1458 | static void | |
bec922f0 | 1459 | find_invariants_to_move (bool speed, bool call_p) |
5e962776 | 1460 | { |
1833192f VM |
1461 | int gain; |
1462 | unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; | |
5e962776 ZD |
1463 | struct invariant *inv = NULL; |
1464 | ||
9771b263 | 1465 | if (!invariants.length ()) |
5e962776 ZD |
1466 | return; |
1467 | ||
1833192f | 1468 | if (flag_ira_loop_pressure) |
b8698a0f | 1469 | /* REGS_USED is actually never used when the flag is on. */ |
1833192f VM |
1470 | regs_used = 0; |
1471 | else | |
1472 | /* We do not really do a good job in estimating number of | |
1473 | registers used; we put some initial bound here to stand for | |
1474 | induction variables etc. that we do not detect. */ | |
5e962776 | 1475 | { |
1833192f VM |
1476 | unsigned int n_regs = DF_REG_SIZE (df); |
1477 | ||
1478 | regs_used = 2; | |
b8698a0f | 1479 | |
1833192f | 1480 | for (i = 0; i < n_regs; i++) |
5e962776 | 1481 | { |
1833192f VM |
1482 | if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) |
1483 | { | |
1484 | /* This is a value that is used but not changed inside loop. */ | |
1485 | regs_used++; | |
1486 | } | |
5e962776 ZD |
1487 | } |
1488 | } | |
1489 | ||
1833192f VM |
1490 | if (! flag_ira_loop_pressure) |
1491 | new_regs[0] = regs_needed[0] = 0; | |
1492 | else | |
5e962776 | 1493 | { |
1756cb66 VM |
1494 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1495 | new_regs[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1496 | } |
1497 | while ((gain = best_gain_for_invariant (&inv, regs_needed, | |
bec922f0 SL |
1498 | new_regs, regs_used, |
1499 | speed, call_p)) > 0) | |
1833192f VM |
1500 | { |
1501 | set_move_mark (inv->invno, gain); | |
1502 | if (! flag_ira_loop_pressure) | |
1503 | new_regs[0] += regs_needed[0]; | |
1504 | else | |
1505 | { | |
1756cb66 VM |
1506 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1507 | new_regs[ira_pressure_classes[i]] | |
1508 | += regs_needed[ira_pressure_classes[i]]; | |
1833192f | 1509 | } |
5e962776 ZD |
1510 | } |
1511 | } | |
1512 | ||
43ba743c EB |
1513 | /* Replace the uses, reached by the definition of invariant INV, by REG. |
1514 | ||
1515 | IN_GROUP is nonzero if this is part of a group of changes that must be | |
1516 | performed as a group. In that case, the changes will be stored. The | |
1517 | function `apply_change_group' will validate and apply the changes. */ | |
1518 | ||
1519 | static int | |
1520 | replace_uses (struct invariant *inv, rtx reg, bool in_group) | |
1521 | { | |
1522 | /* Replace the uses we know to be dominated. It saves work for copy | |
1523 | propagation, and also it is necessary so that dependent invariants | |
1524 | are computed right. */ | |
1525 | if (inv->def) | |
1526 | { | |
1527 | struct use *use; | |
1528 | for (use = inv->def->uses; use; use = use->next) | |
1529 | validate_change (use->insn, use->pos, reg, true); | |
1530 | ||
1531 | /* If we aren't part of a larger group, apply the changes now. */ | |
1532 | if (!in_group) | |
1533 | return apply_change_group (); | |
1534 | } | |
1535 | ||
1536 | return 1; | |
1537 | } | |
1538 | ||
aa953e2f TP |
1539 | /* Whether invariant INV setting REG can be moved out of LOOP, at the end of |
1540 | the block preceding its header. */ | |
1541 | ||
1542 | static bool | |
1543 | can_move_invariant_reg (struct loop *loop, struct invariant *inv, rtx reg) | |
1544 | { | |
1545 | df_ref def, use; | |
1546 | unsigned int dest_regno, defs_in_loop_count = 0; | |
1547 | rtx_insn *insn = inv->insn; | |
1548 | basic_block bb = BLOCK_FOR_INSN (inv->insn); | |
1549 | ||
1550 | /* We ignore hard register and memory access for cost and complexity reasons. | |
1551 | Hard register are few at this stage and expensive to consider as they | |
1552 | require building a separate data flow. Memory access would require using | |
1553 | df_simulate_* and can_move_insns_across functions and is more complex. */ | |
1554 | if (!REG_P (reg) || HARD_REGISTER_P (reg)) | |
1555 | return false; | |
1556 | ||
1557 | /* Check whether the set is always executed. We could omit this condition if | |
1558 | we know that the register is unused outside of the loop, but it does not | |
1559 | seem worth finding out. */ | |
1560 | if (!inv->always_executed) | |
1561 | return false; | |
1562 | ||
1563 | /* Check that all uses that would be dominated by def are already dominated | |
1564 | by it. */ | |
1565 | dest_regno = REGNO (reg); | |
1566 | for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use)) | |
1567 | { | |
1568 | rtx_insn *use_insn; | |
1569 | basic_block use_bb; | |
1570 | ||
1571 | use_insn = DF_REF_INSN (use); | |
1572 | use_bb = BLOCK_FOR_INSN (use_insn); | |
1573 | ||
1574 | /* Ignore instruction considered for moving. */ | |
1575 | if (use_insn == insn) | |
1576 | continue; | |
1577 | ||
1578 | /* Don't consider uses outside loop. */ | |
1579 | if (!flow_bb_inside_loop_p (loop, use_bb)) | |
1580 | continue; | |
1581 | ||
1582 | /* Don't move if a use is not dominated by def in insn. */ | |
1583 | if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn)) | |
1584 | return false; | |
1585 | if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb)) | |
1586 | return false; | |
1587 | } | |
1588 | ||
1589 | /* Check for other defs. Any other def in the loop might reach a use | |
1590 | currently reached by the def in insn. */ | |
1591 | for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def)) | |
1592 | { | |
1593 | basic_block def_bb = DF_REF_BB (def); | |
1594 | ||
1595 | /* Defs in exit block cannot reach a use they weren't already. */ | |
1596 | if (single_succ_p (def_bb)) | |
1597 | { | |
1598 | basic_block def_bb_succ; | |
1599 | ||
1600 | def_bb_succ = single_succ (def_bb); | |
1601 | if (!flow_bb_inside_loop_p (loop, def_bb_succ)) | |
1602 | continue; | |
1603 | } | |
1604 | ||
1605 | if (++defs_in_loop_count > 1) | |
1606 | return false; | |
1607 | } | |
1608 | ||
1609 | return true; | |
1610 | } | |
1611 | ||
ba946209 ZD |
1612 | /* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false |
1613 | otherwise. */ | |
1614 | ||
1615 | static bool | |
cb20f7e8 | 1616 | move_invariant_reg (struct loop *loop, unsigned invno) |
5e962776 | 1617 | { |
9771b263 DN |
1618 | struct invariant *inv = invariants[invno]; |
1619 | struct invariant *repr = invariants[inv->eqto]; | |
5e962776 ZD |
1620 | unsigned i; |
1621 | basic_block preheader = loop_preheader_edge (loop)->src; | |
90b1c344 | 1622 | rtx reg, set, dest, note; |
87c476a2 | 1623 | bitmap_iterator bi; |
43ba743c | 1624 | int regno = -1; |
5e962776 | 1625 | |
ba946209 ZD |
1626 | if (inv->reg) |
1627 | return true; | |
1628 | if (!repr->move) | |
1629 | return false; | |
43ba743c | 1630 | |
1052bd54 ZD |
1631 | /* If this is a representative of the class of equivalent invariants, |
1632 | really move the invariant. Otherwise just replace its use with | |
1633 | the register used for the representative. */ | |
1634 | if (inv == repr) | |
5e962776 | 1635 | { |
1052bd54 | 1636 | if (inv->depends_on) |
5e962776 | 1637 | { |
1052bd54 ZD |
1638 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi) |
1639 | { | |
ba946209 ZD |
1640 | if (!move_invariant_reg (loop, i)) |
1641 | goto fail; | |
1052bd54 | 1642 | } |
87c476a2 | 1643 | } |
5e962776 | 1644 | |
aa953e2f TP |
1645 | /* If possible, just move the set out of the loop. Otherwise, we |
1646 | need to create a temporary register. */ | |
1052bd54 | 1647 | set = single_set (inv->insn); |
1833192f VM |
1648 | reg = dest = SET_DEST (set); |
1649 | if (GET_CODE (reg) == SUBREG) | |
1650 | reg = SUBREG_REG (reg); | |
1651 | if (REG_P (reg)) | |
1652 | regno = REGNO (reg); | |
1653 | ||
ddd93587 | 1654 | if (!can_move_invariant_reg (loop, inv, dest)) |
aa953e2f TP |
1655 | { |
1656 | reg = gen_reg_rtx_and_attrs (dest); | |
1052bd54 | 1657 | |
aa953e2f TP |
1658 | /* Try replacing the destination by a new pseudoregister. */ |
1659 | validate_change (inv->insn, &SET_DEST (set), reg, true); | |
43ba743c | 1660 | |
aa953e2f TP |
1661 | /* As well as all the dominated uses. */ |
1662 | replace_uses (inv, reg, true); | |
43ba743c | 1663 | |
aa953e2f TP |
1664 | /* And validate all the changes. */ |
1665 | if (!apply_change_group ()) | |
1666 | goto fail; | |
90b1c344 | 1667 | |
aa953e2f TP |
1668 | emit_insn_after (gen_move_insn (dest, reg), inv->insn); |
1669 | } | |
1670 | else if (dump_file) | |
1671 | fprintf (dump_file, "Invariant %d moved without introducing a new " | |
1672 | "temporary register\n", invno); | |
90b1c344 | 1673 | reorder_insns (inv->insn, inv->insn, BB_END (preheader)); |
43d56ad7 | 1674 | df_recompute_luids (preheader); |
90b1c344 | 1675 | |
82fa5f8a L |
1676 | /* If there is a REG_EQUAL note on the insn we just moved, and the |
1677 | insn is in a basic block that is not always executed or the note | |
1678 | contains something for which we don't know the invariant status, | |
1679 | the note may no longer be valid after we move the insn. Note that | |
1680 | uses in REG_EQUAL notes are taken into account in the computation | |
1681 | of invariants, so it is safe to retain the note even if it contains | |
1682 | register references for which we know the invariant status. */ | |
1683 | if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX)) | |
1684 | && (!inv->always_executed | |
1685 | || !check_maybe_invariant (XEXP (note, 0)))) | |
90b1c344 | 1686 | remove_note (inv->insn, note); |
b644b211 SB |
1687 | } |
1688 | else | |
1689 | { | |
ba946209 ZD |
1690 | if (!move_invariant_reg (loop, repr->invno)) |
1691 | goto fail; | |
1052bd54 | 1692 | reg = repr->reg; |
1833192f | 1693 | regno = repr->orig_regno; |
43ba743c EB |
1694 | if (!replace_uses (inv, reg, false)) |
1695 | goto fail; | |
1052bd54 | 1696 | set = single_set (inv->insn); |
4d779342 DB |
1697 | emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn); |
1698 | delete_insn (inv->insn); | |
b644b211 | 1699 | } |
5e962776 | 1700 | |
1052bd54 | 1701 | inv->reg = reg; |
1833192f | 1702 | inv->orig_regno = regno; |
1052bd54 | 1703 | |
ba946209 ZD |
1704 | return true; |
1705 | ||
1706 | fail: | |
1707 | /* If we failed, clear move flag, so that we do not try to move inv | |
1708 | again. */ | |
1709 | if (dump_file) | |
1710 | fprintf (dump_file, "Failed to move invariant %d\n", invno); | |
1711 | inv->move = false; | |
1712 | inv->reg = NULL_RTX; | |
1833192f | 1713 | inv->orig_regno = -1; |
6fb5fa3c | 1714 | |
ba946209 | 1715 | return false; |
5e962776 ZD |
1716 | } |
1717 | ||
1718 | /* Move selected invariant out of the LOOP. Newly created regs are marked | |
cb20f7e8 | 1719 | in TEMPORARY_REGS. */ |
5e962776 ZD |
1720 | |
1721 | static void | |
cb20f7e8 | 1722 | move_invariants (struct loop *loop) |
5e962776 ZD |
1723 | { |
1724 | struct invariant *inv; | |
1725 | unsigned i; | |
1726 | ||
9771b263 | 1727 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1052bd54 | 1728 | move_invariant_reg (loop, i); |
1833192f VM |
1729 | if (flag_ira_loop_pressure && resize_reg_info ()) |
1730 | { | |
9771b263 | 1731 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1833192f VM |
1732 | if (inv->reg != NULL_RTX) |
1733 | { | |
1734 | if (inv->orig_regno >= 0) | |
1735 | setup_reg_classes (REGNO (inv->reg), | |
1736 | reg_preferred_class (inv->orig_regno), | |
1737 | reg_alternate_class (inv->orig_regno), | |
1756cb66 | 1738 | reg_allocno_class (inv->orig_regno)); |
1833192f VM |
1739 | else |
1740 | setup_reg_classes (REGNO (inv->reg), | |
1741 | GENERAL_REGS, NO_REGS, GENERAL_REGS); | |
1742 | } | |
1743 | } | |
5e962776 ZD |
1744 | } |
1745 | ||
1746 | /* Initializes invariant motion data. */ | |
1747 | ||
1748 | static void | |
1749 | init_inv_motion_data (void) | |
1750 | { | |
1751 | actual_stamp = 1; | |
1752 | ||
9771b263 | 1753 | invariants.create (100); |
5e962776 ZD |
1754 | } |
1755 | ||
cb20f7e8 | 1756 | /* Frees the data allocated by invariant motion. */ |
5e962776 ZD |
1757 | |
1758 | static void | |
cb20f7e8 | 1759 | free_inv_motion_data (void) |
5e962776 ZD |
1760 | { |
1761 | unsigned i; | |
1762 | struct def *def; | |
1763 | struct invariant *inv; | |
1764 | ||
6fb5fa3c DB |
1765 | check_invariant_table_size (); |
1766 | for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++) | |
5e962776 | 1767 | { |
6fb5fa3c DB |
1768 | inv = invariant_table[i]; |
1769 | if (inv) | |
1770 | { | |
1771 | def = inv->def; | |
1772 | gcc_assert (def != NULL); | |
b8698a0f | 1773 | |
6fb5fa3c DB |
1774 | free_use_list (def->uses); |
1775 | free (def); | |
1776 | invariant_table[i] = NULL; | |
1777 | } | |
5e962776 ZD |
1778 | } |
1779 | ||
9771b263 | 1780 | FOR_EACH_VEC_ELT (invariants, i, inv) |
5e962776 | 1781 | { |
8bdbfff5 | 1782 | BITMAP_FREE (inv->depends_on); |
5e962776 ZD |
1783 | free (inv); |
1784 | } | |
9771b263 | 1785 | invariants.release (); |
5e962776 ZD |
1786 | } |
1787 | ||
cb20f7e8 | 1788 | /* Move the invariants out of the LOOP. */ |
5e962776 ZD |
1789 | |
1790 | static void | |
cb20f7e8 | 1791 | move_single_loop_invariants (struct loop *loop) |
5e962776 ZD |
1792 | { |
1793 | init_inv_motion_data (); | |
1794 | ||
cb20f7e8 | 1795 | find_invariants (loop); |
bec922f0 SL |
1796 | find_invariants_to_move (optimize_loop_for_speed_p (loop), |
1797 | LOOP_DATA (loop)->has_call); | |
cb20f7e8 | 1798 | move_invariants (loop); |
5e962776 | 1799 | |
cb20f7e8 | 1800 | free_inv_motion_data (); |
5e962776 ZD |
1801 | } |
1802 | ||
1803 | /* Releases the auxiliary data for LOOP. */ | |
1804 | ||
1805 | static void | |
1806 | free_loop_data (struct loop *loop) | |
1807 | { | |
1808 | struct loop_data *data = LOOP_DATA (loop); | |
eb149440 RG |
1809 | if (!data) |
1810 | return; | |
5e962776 | 1811 | |
1833192f VM |
1812 | bitmap_clear (&LOOP_DATA (loop)->regs_ref); |
1813 | bitmap_clear (&LOOP_DATA (loop)->regs_live); | |
5e962776 ZD |
1814 | free (data); |
1815 | loop->aux = NULL; | |
1816 | } | |
1817 | ||
1833192f VM |
1818 | \f |
1819 | ||
1820 | /* Registers currently living. */ | |
1821 | static bitmap_head curr_regs_live; | |
1822 | ||
1756cb66 | 1823 | /* Current reg pressure for each pressure class. */ |
1833192f VM |
1824 | static int curr_reg_pressure[N_REG_CLASSES]; |
1825 | ||
1826 | /* Record all regs that are set in any one insn. Communication from | |
1827 | mark_reg_{store,clobber} and global_conflicts. Asm can refer to | |
1828 | all hard-registers. */ | |
1829 | static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS | |
1830 | ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2]; | |
1831 | /* Number of regs stored in the previous array. */ | |
1832 | static int n_regs_set; | |
1833 | ||
1756cb66 | 1834 | /* Return pressure class and number of needed hard registers (through |
b8698a0f | 1835 | *NREGS) of register REGNO. */ |
1833192f | 1836 | static enum reg_class |
1756cb66 | 1837 | get_regno_pressure_class (int regno, int *nregs) |
1833192f VM |
1838 | { |
1839 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1840 | { | |
1756cb66 | 1841 | enum reg_class pressure_class; |
1833192f | 1842 | |
1756cb66 VM |
1843 | pressure_class = reg_allocno_class (regno); |
1844 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1845 | *nregs | |
1846 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
1847 | return pressure_class; | |
1833192f VM |
1848 | } |
1849 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
1850 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
1851 | { | |
1852 | *nregs = 1; | |
1756cb66 | 1853 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; |
1833192f VM |
1854 | } |
1855 | else | |
1856 | { | |
1857 | *nregs = 0; | |
1858 | return NO_REGS; | |
1859 | } | |
1860 | } | |
1861 | ||
1862 | /* Increase (if INCR_P) or decrease current register pressure for | |
1863 | register REGNO. */ | |
1864 | static void | |
1865 | change_pressure (int regno, bool incr_p) | |
1866 | { | |
1867 | int nregs; | |
1756cb66 | 1868 | enum reg_class pressure_class; |
1833192f | 1869 | |
1756cb66 | 1870 | pressure_class = get_regno_pressure_class (regno, &nregs); |
1833192f | 1871 | if (! incr_p) |
1756cb66 | 1872 | curr_reg_pressure[pressure_class] -= nregs; |
1833192f VM |
1873 | else |
1874 | { | |
1756cb66 VM |
1875 | curr_reg_pressure[pressure_class] += nregs; |
1876 | if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1877 | < curr_reg_pressure[pressure_class]) | |
1878 | LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1879 | = curr_reg_pressure[pressure_class]; | |
1833192f VM |
1880 | } |
1881 | } | |
1882 | ||
1883 | /* Mark REGNO birth. */ | |
1884 | static void | |
1885 | mark_regno_live (int regno) | |
1886 | { | |
1887 | struct loop *loop; | |
1888 | ||
1889 | for (loop = curr_loop; | |
1890 | loop != current_loops->tree_root; | |
1891 | loop = loop_outer (loop)) | |
1892 | bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno); | |
fcaa4ca4 | 1893 | if (!bitmap_set_bit (&curr_regs_live, regno)) |
1833192f | 1894 | return; |
1833192f VM |
1895 | change_pressure (regno, true); |
1896 | } | |
1897 | ||
1898 | /* Mark REGNO death. */ | |
1899 | static void | |
1900 | mark_regno_death (int regno) | |
1901 | { | |
fcaa4ca4 | 1902 | if (! bitmap_clear_bit (&curr_regs_live, regno)) |
1833192f | 1903 | return; |
1833192f VM |
1904 | change_pressure (regno, false); |
1905 | } | |
1906 | ||
1907 | /* Mark setting register REG. */ | |
1908 | static void | |
1909 | mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, | |
1910 | void *data ATTRIBUTE_UNUSED) | |
1911 | { | |
1833192f VM |
1912 | if (GET_CODE (reg) == SUBREG) |
1913 | reg = SUBREG_REG (reg); | |
1914 | ||
1915 | if (! REG_P (reg)) | |
1916 | return; | |
1917 | ||
1918 | regs_set[n_regs_set++] = reg; | |
1919 | ||
53d1bae9 RS |
1920 | unsigned int end_regno = END_REGNO (reg); |
1921 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 1922 | mark_regno_live (regno); |
1833192f VM |
1923 | } |
1924 | ||
1925 | /* Mark clobbering register REG. */ | |
1926 | static void | |
1927 | mark_reg_clobber (rtx reg, const_rtx setter, void *data) | |
1928 | { | |
1929 | if (GET_CODE (setter) == CLOBBER) | |
1930 | mark_reg_store (reg, setter, data); | |
1931 | } | |
1932 | ||
1933 | /* Mark register REG death. */ | |
1934 | static void | |
1935 | mark_reg_death (rtx reg) | |
1936 | { | |
53d1bae9 RS |
1937 | unsigned int end_regno = END_REGNO (reg); |
1938 | for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno) | |
1833192f | 1939 | mark_regno_death (regno); |
1833192f VM |
1940 | } |
1941 | ||
1942 | /* Mark occurrence of registers in X for the current loop. */ | |
1943 | static void | |
1944 | mark_ref_regs (rtx x) | |
1945 | { | |
1946 | RTX_CODE code; | |
1947 | int i; | |
1948 | const char *fmt; | |
1949 | ||
1950 | if (!x) | |
1951 | return; | |
1952 | ||
1953 | code = GET_CODE (x); | |
1954 | if (code == REG) | |
1955 | { | |
1956 | struct loop *loop; | |
b8698a0f | 1957 | |
1833192f VM |
1958 | for (loop = curr_loop; |
1959 | loop != current_loops->tree_root; | |
1960 | loop = loop_outer (loop)) | |
1961 | bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x)); | |
1962 | return; | |
1963 | } | |
1964 | ||
1965 | fmt = GET_RTX_FORMAT (code); | |
1966 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1967 | if (fmt[i] == 'e') | |
1968 | mark_ref_regs (XEXP (x, i)); | |
1969 | else if (fmt[i] == 'E') | |
1970 | { | |
1971 | int j; | |
b8698a0f | 1972 | |
1833192f VM |
1973 | for (j = 0; j < XVECLEN (x, i); j++) |
1974 | mark_ref_regs (XVECEXP (x, i, j)); | |
1975 | } | |
1976 | } | |
1977 | ||
1978 | /* Calculate register pressure in the loops. */ | |
1979 | static void | |
1980 | calculate_loop_reg_pressure (void) | |
1981 | { | |
1982 | int i; | |
1983 | unsigned int j; | |
1984 | bitmap_iterator bi; | |
1985 | basic_block bb; | |
89bfd6f5 DM |
1986 | rtx_insn *insn; |
1987 | rtx link; | |
1833192f | 1988 | struct loop *loop, *parent; |
1833192f | 1989 | |
f0bd40b1 | 1990 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
1991 | if (loop->aux == NULL) |
1992 | { | |
1993 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
1994 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
1995 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
1996 | } | |
8d49e7ef | 1997 | ira_setup_eliminable_regset (); |
1833192f | 1998 | bitmap_initialize (&curr_regs_live, ®_obstack); |
11cd3bed | 1999 | FOR_EACH_BB_FN (bb, cfun) |
1833192f VM |
2000 | { |
2001 | curr_loop = bb->loop_father; | |
2002 | if (curr_loop == current_loops->tree_root) | |
2003 | continue; | |
2004 | ||
2005 | for (loop = curr_loop; | |
2006 | loop != current_loops->tree_root; | |
2007 | loop = loop_outer (loop)) | |
2008 | bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb)); | |
2009 | ||
2010 | bitmap_copy (&curr_regs_live, DF_LR_IN (bb)); | |
1756cb66 VM |
2011 | for (i = 0; i < ira_pressure_classes_num; i++) |
2012 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
1833192f VM |
2013 | EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi) |
2014 | change_pressure (j, true); | |
2015 | ||
2016 | FOR_BB_INSNS (bb, insn) | |
2017 | { | |
dd8c071d | 2018 | if (! NONDEBUG_INSN_P (insn)) |
1833192f VM |
2019 | continue; |
2020 | ||
2021 | mark_ref_regs (PATTERN (insn)); | |
2022 | n_regs_set = 0; | |
2023 | note_stores (PATTERN (insn), mark_reg_clobber, NULL); | |
b8698a0f | 2024 | |
1833192f | 2025 | /* Mark any registers dead after INSN as dead now. */ |
b8698a0f | 2026 | |
1833192f VM |
2027 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
2028 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
2029 | mark_reg_death (XEXP (link, 0)); | |
b8698a0f | 2030 | |
1833192f VM |
2031 | /* Mark any registers set in INSN as live, |
2032 | and mark them as conflicting with all other live regs. | |
2033 | Clobbers are processed again, so they conflict with | |
2034 | the registers that are set. */ | |
b8698a0f | 2035 | |
1833192f | 2036 | note_stores (PATTERN (insn), mark_reg_store, NULL); |
b8698a0f | 2037 | |
760edf20 TS |
2038 | if (AUTO_INC_DEC) |
2039 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
2040 | if (REG_NOTE_KIND (link) == REG_INC) | |
2041 | mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); | |
2042 | ||
1833192f VM |
2043 | while (n_regs_set-- > 0) |
2044 | { | |
2045 | rtx note = find_regno_note (insn, REG_UNUSED, | |
2046 | REGNO (regs_set[n_regs_set])); | |
2047 | if (! note) | |
2048 | continue; | |
b8698a0f | 2049 | |
1833192f VM |
2050 | mark_reg_death (XEXP (note, 0)); |
2051 | } | |
2052 | } | |
2053 | } | |
2054 | bitmap_clear (&curr_regs_live); | |
2055 | if (flag_ira_region == IRA_REGION_MIXED | |
2056 | || flag_ira_region == IRA_REGION_ALL) | |
f0bd40b1 | 2057 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2058 | { |
2059 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2060 | if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j)) | |
2061 | { | |
1756cb66 | 2062 | enum reg_class pressure_class; |
1833192f VM |
2063 | int nregs; |
2064 | ||
1756cb66 VM |
2065 | pressure_class = get_regno_pressure_class (j, &nregs); |
2066 | LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs; | |
1833192f VM |
2067 | } |
2068 | } | |
2069 | if (dump_file == NULL) | |
2070 | return; | |
f0bd40b1 | 2071 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
2072 | { |
2073 | parent = loop_outer (loop); | |
2074 | fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n", | |
2075 | loop->num, (parent == NULL ? -1 : parent->num), | |
2076 | loop->header->index, loop_depth (loop)); | |
2077 | fprintf (dump_file, "\n ref. regnos:"); | |
2078 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi) | |
2079 | fprintf (dump_file, " %d", j); | |
2080 | fprintf (dump_file, "\n live regnos:"); | |
2081 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
2082 | fprintf (dump_file, " %d", j); | |
2083 | fprintf (dump_file, "\n Pressure:"); | |
1756cb66 | 2084 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1833192f | 2085 | { |
1756cb66 | 2086 | enum reg_class pressure_class; |
b8698a0f | 2087 | |
1756cb66 VM |
2088 | pressure_class = ira_pressure_classes[i]; |
2089 | if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0) | |
1833192f | 2090 | continue; |
1756cb66 VM |
2091 | fprintf (dump_file, " %s=%d", reg_class_names[pressure_class], |
2092 | LOOP_DATA (loop)->max_reg_pressure[pressure_class]); | |
1833192f VM |
2093 | } |
2094 | fprintf (dump_file, "\n"); | |
2095 | } | |
2096 | } | |
2097 | ||
2098 | \f | |
2099 | ||
d73be268 | 2100 | /* Move the invariants out of the loops. */ |
5e962776 ZD |
2101 | |
2102 | void | |
d73be268 | 2103 | move_loop_invariants (void) |
5e962776 ZD |
2104 | { |
2105 | struct loop *loop; | |
cb20f7e8 | 2106 | |
1833192f VM |
2107 | if (flag_ira_loop_pressure) |
2108 | { | |
2109 | df_analyze (); | |
1756cb66 | 2110 | regstat_init_n_sets_and_refs (); |
b11f0116 | 2111 | ira_set_pseudo_classes (true, dump_file); |
1833192f | 2112 | calculate_loop_reg_pressure (); |
1756cb66 | 2113 | regstat_free_n_sets_and_refs (); |
1833192f | 2114 | } |
6fb5fa3c | 2115 | df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); |
5e962776 | 2116 | /* Process the loops, innermost first. */ |
f0bd40b1 | 2117 | FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) |
5e962776 | 2118 | { |
1833192f | 2119 | curr_loop = loop; |
b1fb9f56 JJ |
2120 | /* move_single_loop_invariants for very large loops |
2121 | is time consuming and might need a lot of memory. */ | |
2122 | if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP) | |
2123 | move_single_loop_invariants (loop); | |
5e962776 ZD |
2124 | } |
2125 | ||
f0bd40b1 | 2126 | FOR_EACH_LOOP (loop, 0) |
42fd6772 ZD |
2127 | { |
2128 | free_loop_data (loop); | |
2129 | } | |
5e962776 | 2130 | |
1833192f VM |
2131 | if (flag_ira_loop_pressure) |
2132 | /* There is no sense to keep this info because it was most | |
2133 | probably outdated by subsequent passes. */ | |
2134 | free_reg_info (); | |
6fb5fa3c DB |
2135 | free (invariant_table); |
2136 | invariant_table = NULL; | |
2137 | invariant_table_size = 0; | |
a7f4ccb1 | 2138 | |
b2b29377 | 2139 | checking_verify_flow_info (); |
5e962776 | 2140 | } |