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cb20f7e8 1/* RTL-level loop invariant motion.
5624e564 2 Copyright (C) 2004-2015 Free Software Foundation, Inc.
cb20f7e8 3
5e962776 4This file is part of GCC.
cb20f7e8 5
5e962776
ZD
6GCC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
9dcd6f09 8Free Software Foundation; either version 3, or (at your option) any
5e962776 9later version.
cb20f7e8 10
5e962776
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11GCC is distributed in the hope that it will be useful, but WITHOUT
12ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
cb20f7e8 15
5e962776 16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
5e962776
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19
20/* This implements the loop invariant motion pass. It is very simple
4a8cae83
SB
21 (no calls, no loads/stores, etc.). This should be sufficient to cleanup
22 things like address arithmetics -- other more complicated invariants should
23 be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c.
cb20f7e8 24
5e962776
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25 We proceed loop by loop -- it is simpler than trying to handle things
26 globally and should not lose much. First we inspect all sets inside loop
27 and create a dependency graph on insns (saying "to move this insn, you must
28 also move the following insns").
29
30 We then need to determine what to move. We estimate the number of registers
31 used and move as many invariants as possible while we still have enough free
32 registers. We prefer the expensive invariants.
cb20f7e8 33
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34 Then we move the selected invariants out of the loop, creating a new
35 temporaries for them if necessary. */
36
37#include "config.h"
38#include "system.h"
39#include "coretypes.h"
40#include "tm.h"
1833192f 41#include "hard-reg-set.h"
5e962776 42#include "rtl.h"
3912d291 43#include "tm_p.h"
7932a3db 44#include "obstack.h"
60393bbc 45#include "predict.h"
5e962776 46#include "function.h"
60393bbc
AM
47#include "dominance.h"
48#include "cfg.h"
49#include "cfgrtl.h"
50#include "basic-block.h"
51#include "cfgloop.h"
40e23961 52#include "symtab.h"
36566b39 53#include "flags.h"
36566b39 54#include "alias.h"
36566b39
PK
55#include "tree.h"
56#include "insn-config.h"
57#include "expmed.h"
58#include "dojump.h"
59#include "explow.h"
60#include "calls.h"
61#include "emit-rtl.h"
62#include "varasm.h"
63#include "stmt.h"
60393bbc
AM
64#include "expr.h"
65#include "recog.h"
66#include "target.h"
5e962776 67#include "df.h"
28749cfb 68#include "except.h"
b1fb9f56 69#include "params.h"
1833192f
VM
70#include "regs.h"
71#include "ira.h"
7ee2468b 72#include "dumpfile.h"
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73
74/* The data stored for the loop. */
75
76struct loop_data
77{
78 struct loop *outermost_exit; /* The outermost exit of the loop. */
79 bool has_call; /* True if the loop contains a call. */
1833192f 80 /* Maximal register pressure inside loop for given register class
1756cb66 81 (defined only for the pressure classes). */
1833192f
VM
82 int max_reg_pressure[N_REG_CLASSES];
83 /* Loop regs referenced and live pseudo-registers. */
84 bitmap_head regs_ref;
85 bitmap_head regs_live;
5e962776
ZD
86};
87
88#define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux)
89
90/* The description of an use. */
91
92struct use
93{
94 rtx *pos; /* Position of the use. */
89bfd6f5 95 rtx_insn *insn; /* The insn in that the use occurs. */
1bfdbb29 96 unsigned addr_use_p; /* Whether the use occurs in an address. */
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97 struct use *next; /* Next use in the list. */
98};
99
100/* The description of a def. */
101
102struct def
103{
104 struct use *uses; /* The list of uses that are uniquely reached
105 by it. */
106 unsigned n_uses; /* Number of such uses. */
1bfdbb29 107 unsigned n_addr_uses; /* Number of uses in addresses. */
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108 unsigned invno; /* The corresponding invariant. */
109};
110
111/* The data stored for each invariant. */
112
113struct invariant
114{
115 /* The number of the invariant. */
116 unsigned invno;
117
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118 /* The number of the invariant with the same value. */
119 unsigned eqto;
120
e42e3d15
ZC
121 /* The number of invariants which eqto this. */
122 unsigned eqno;
123
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124 /* If we moved the invariant out of the loop, the register that contains its
125 value. */
126 rtx reg;
5e962776 127
1833192f
VM
128 /* If we moved the invariant out of the loop, the original regno
129 that contained its value. */
130 int orig_regno;
131
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132 /* The definition of the invariant. */
133 struct def *def;
134
135 /* The insn in that it is defined. */
89bfd6f5 136 rtx_insn *insn;
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137
138 /* Whether it is always executed. */
139 bool always_executed;
140
141 /* Whether to move the invariant. */
142 bool move;
143
1bfdbb29
PB
144 /* Whether the invariant is cheap when used as an address. */
145 bool cheap_address;
146
cb20f7e8 147 /* Cost of the invariant. */
5e962776
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148 unsigned cost;
149
150 /* The invariants it depends on. */
151 bitmap depends_on;
152
153 /* Used for detecting already visited invariants during determining
154 costs of movements. */
155 unsigned stamp;
156};
157
1833192f
VM
158/* Currently processed loop. */
159static struct loop *curr_loop;
160
6fb5fa3c
DB
161/* Table of invariants indexed by the df_ref uid field. */
162
163static unsigned int invariant_table_size = 0;
164static struct invariant ** invariant_table;
165
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166/* Entry for hash table of invariant expressions. */
167
168struct invariant_expr_entry
169{
170 /* The invariant. */
171 struct invariant *inv;
172
173 /* Its value. */
174 rtx expr;
175
176 /* Its mode. */
ef4bddc2 177 machine_mode mode;
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178
179 /* Its hash. */
180 hashval_t hash;
181};
182
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183/* The actual stamp for marking already visited invariants during determining
184 costs of movements. */
185
186static unsigned actual_stamp;
187
edd954e6
KH
188typedef struct invariant *invariant_p;
189
edd954e6 190
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191/* The invariants. */
192
9771b263 193static vec<invariant_p> invariants;
5e962776 194
6fb5fa3c 195/* Check the size of the invariant table and realloc if necessary. */
cb20f7e8 196
b8698a0f 197static void
6fb5fa3c
DB
198check_invariant_table_size (void)
199{
c3284718 200 if (invariant_table_size < DF_DEFS_TABLE_SIZE ())
6fb5fa3c
DB
201 {
202 unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4);
d3bfe4de 203 invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size);
b8698a0f 204 memset (&invariant_table[invariant_table_size], 0,
92cfe9d5 205 (new_size - invariant_table_size) * sizeof (struct invariant *));
6fb5fa3c
DB
206 invariant_table_size = new_size;
207 }
208}
cb20f7e8 209
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210/* Test for possibility of invariantness of X. */
211
212static bool
213check_maybe_invariant (rtx x)
214{
215 enum rtx_code code = GET_CODE (x);
216 int i, j;
217 const char *fmt;
218
219 switch (code)
220 {
d8116890 221 CASE_CONST_ANY:
5e962776
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222 case SYMBOL_REF:
223 case CONST:
224 case LABEL_REF:
225 return true;
226
227 case PC:
228 case CC0:
229 case UNSPEC_VOLATILE:
230 case CALL:
231 return false;
232
233 case REG:
234 return true;
235
236 case MEM:
237 /* Load/store motion is done elsewhere. ??? Perhaps also add it here?
238 It should not be hard, and might be faster than "elsewhere". */
239
240 /* Just handle the most trivial case where we load from an unchanging
241 location (most importantly, pic tables). */
66f91b93 242 if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x))
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243 break;
244
245 return false;
246
247 case ASM_OPERANDS:
248 /* Don't mess with insns declared volatile. */
249 if (MEM_VOLATILE_P (x))
250 return false;
251 break;
252
253 default:
254 break;
255 }
256
257 fmt = GET_RTX_FORMAT (code);
258 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
259 {
260 if (fmt[i] == 'e')
261 {
262 if (!check_maybe_invariant (XEXP (x, i)))
263 return false;
264 }
265 else if (fmt[i] == 'E')
266 {
267 for (j = 0; j < XVECLEN (x, i); j++)
268 if (!check_maybe_invariant (XVECEXP (x, i, j)))
269 return false;
270 }
271 }
272
273 return true;
274}
275
1052bd54
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276/* Returns the invariant definition for USE, or NULL if USE is not
277 invariant. */
278
279static struct invariant *
57512f53 280invariant_for_use (df_ref use)
1052bd54
ZD
281{
282 struct df_link *defs;
57512f53 283 df_ref def;
50e94c7e 284 basic_block bb = DF_REF_BB (use), def_bb;
1052bd54 285
57512f53 286 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
b6c9b9bc
ZD
287 return NULL;
288
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ZD
289 defs = DF_REF_CHAIN (use);
290 if (!defs || defs->next)
291 return NULL;
292 def = defs->ref;
6fb5fa3c 293 check_invariant_table_size ();
c3284718 294 if (!invariant_table[DF_REF_ID (def)])
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295 return NULL;
296
297 def_bb = DF_REF_BB (def);
298 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
299 return NULL;
c3284718 300 return invariant_table[DF_REF_ID (def)];
1052bd54
ZD
301}
302
303/* Computes hash value for invariant expression X in INSN. */
304
305static hashval_t
89bfd6f5 306hash_invariant_expr_1 (rtx_insn *insn, rtx x)
1052bd54
ZD
307{
308 enum rtx_code code = GET_CODE (x);
309 int i, j;
310 const char *fmt;
311 hashval_t val = code;
312 int do_not_record_p;
57512f53 313 df_ref use;
1052bd54
ZD
314 struct invariant *inv;
315
316 switch (code)
317 {
d8116890 318 CASE_CONST_ANY:
1052bd54
ZD
319 case SYMBOL_REF:
320 case CONST:
321 case LABEL_REF:
322 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
323
324 case REG:
6fb5fa3c 325 use = df_find_use (insn, x);
1052bd54
ZD
326 if (!use)
327 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
328 inv = invariant_for_use (use);
329 if (!inv)
330 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
331
332 gcc_assert (inv->eqto != ~0u);
333 return inv->eqto;
334
335 default:
336 break;
337 }
338
339 fmt = GET_RTX_FORMAT (code);
340 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
341 {
342 if (fmt[i] == 'e')
343 val ^= hash_invariant_expr_1 (insn, XEXP (x, i));
344 else if (fmt[i] == 'E')
345 {
346 for (j = 0; j < XVECLEN (x, i); j++)
347 val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j));
348 }
8e1409e8
ZD
349 else if (fmt[i] == 'i' || fmt[i] == 'n')
350 val ^= XINT (x, i);
1052bd54
ZD
351 }
352
353 return val;
354}
355
356/* Returns true if the invariant expressions E1 and E2 used in insns INSN1
357 and INSN2 have always the same value. */
358
359static bool
89bfd6f5 360invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2)
1052bd54
ZD
361{
362 enum rtx_code code = GET_CODE (e1);
363 int i, j;
364 const char *fmt;
57512f53 365 df_ref use1, use2;
1052bd54
ZD
366 struct invariant *inv1 = NULL, *inv2 = NULL;
367 rtx sub1, sub2;
368
369 /* If mode of only one of the operands is VOIDmode, it is not equivalent to
370 the other one. If both are VOIDmode, we rely on the caller of this
371 function to verify that their modes are the same. */
372 if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2))
373 return false;
374
375 switch (code)
376 {
d8116890 377 CASE_CONST_ANY:
1052bd54
ZD
378 case SYMBOL_REF:
379 case CONST:
380 case LABEL_REF:
381 return rtx_equal_p (e1, e2);
382
383 case REG:
6fb5fa3c
DB
384 use1 = df_find_use (insn1, e1);
385 use2 = df_find_use (insn2, e2);
1052bd54
ZD
386 if (use1)
387 inv1 = invariant_for_use (use1);
388 if (use2)
389 inv2 = invariant_for_use (use2);
390
391 if (!inv1 && !inv2)
392 return rtx_equal_p (e1, e2);
393
394 if (!inv1 || !inv2)
395 return false;
396
397 gcc_assert (inv1->eqto != ~0u);
398 gcc_assert (inv2->eqto != ~0u);
399 return inv1->eqto == inv2->eqto;
400
401 default:
402 break;
403 }
404
405 fmt = GET_RTX_FORMAT (code);
406 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
407 {
408 if (fmt[i] == 'e')
409 {
410 sub1 = XEXP (e1, i);
411 sub2 = XEXP (e2, i);
412
413 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
414 return false;
415 }
416
417 else if (fmt[i] == 'E')
418 {
419 if (XVECLEN (e1, i) != XVECLEN (e2, i))
420 return false;
421
422 for (j = 0; j < XVECLEN (e1, i); j++)
423 {
424 sub1 = XVECEXP (e1, i, j);
425 sub2 = XVECEXP (e2, i, j);
426
427 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
428 return false;
429 }
430 }
8e1409e8
ZD
431 else if (fmt[i] == 'i' || fmt[i] == 'n')
432 {
433 if (XINT (e1, i) != XINT (e2, i))
434 return false;
435 }
436 /* Unhandled type of subexpression, we fail conservatively. */
437 else
438 return false;
1052bd54
ZD
439 }
440
441 return true;
442}
443
95fbe13e 444struct invariant_expr_hasher : free_ptr_hash <invariant_expr_entry>
1052bd54 445{
67f58944
TS
446 static inline hashval_t hash (const invariant_expr_entry *);
447 static inline bool equal (const invariant_expr_entry *,
448 const invariant_expr_entry *);
4a8fb1a1
LC
449};
450
451/* Returns hash value for invariant expression entry ENTRY. */
1052bd54 452
4a8fb1a1 453inline hashval_t
67f58944 454invariant_expr_hasher::hash (const invariant_expr_entry *entry)
4a8fb1a1 455{
1052bd54
ZD
456 return entry->hash;
457}
458
4a8fb1a1 459/* Compares invariant expression entries ENTRY1 and ENTRY2. */
1052bd54 460
4a8fb1a1 461inline bool
67f58944
TS
462invariant_expr_hasher::equal (const invariant_expr_entry *entry1,
463 const invariant_expr_entry *entry2)
1052bd54 464{
1052bd54
ZD
465 if (entry1->mode != entry2->mode)
466 return 0;
467
468 return invariant_expr_equal_p (entry1->inv->insn, entry1->expr,
469 entry2->inv->insn, entry2->expr);
470}
471
c203e8a7 472typedef hash_table<invariant_expr_hasher> invariant_htab_type;
4a8fb1a1 473
1052bd54
ZD
474/* Checks whether invariant with value EXPR in machine mode MODE is
475 recorded in EQ. If this is the case, return the invariant. Otherwise
476 insert INV to the table for this expression and return INV. */
477
478static struct invariant *
ef4bddc2 479find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode,
1052bd54
ZD
480 struct invariant *inv)
481{
482 hashval_t hash = hash_invariant_expr_1 (inv->insn, expr);
483 struct invariant_expr_entry *entry;
484 struct invariant_expr_entry pentry;
4a8fb1a1 485 invariant_expr_entry **slot;
1052bd54
ZD
486
487 pentry.expr = expr;
488 pentry.inv = inv;
489 pentry.mode = mode;
c203e8a7 490 slot = eq->find_slot_with_hash (&pentry, hash, INSERT);
4a8fb1a1 491 entry = *slot;
1052bd54
ZD
492
493 if (entry)
494 return entry->inv;
495
5ed6ace5 496 entry = XNEW (struct invariant_expr_entry);
1052bd54
ZD
497 entry->inv = inv;
498 entry->expr = expr;
499 entry->mode = mode;
500 entry->hash = hash;
501 *slot = entry;
502
503 return inv;
504}
505
506/* Finds invariants identical to INV and records the equivalence. EQ is the
507 hash table of the invariants. */
508
509static void
c203e8a7 510find_identical_invariants (invariant_htab_type *eq, struct invariant *inv)
1052bd54
ZD
511{
512 unsigned depno;
513 bitmap_iterator bi;
514 struct invariant *dep;
515 rtx expr, set;
ef4bddc2 516 machine_mode mode;
e42e3d15 517 struct invariant *tmp;
1052bd54
ZD
518
519 if (inv->eqto != ~0u)
520 return;
521
522 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
523 {
9771b263 524 dep = invariants[depno];
1052bd54
ZD
525 find_identical_invariants (eq, dep);
526 }
527
528 set = single_set (inv->insn);
529 expr = SET_SRC (set);
530 mode = GET_MODE (expr);
531 if (mode == VOIDmode)
532 mode = GET_MODE (SET_DEST (set));
e42e3d15
ZC
533
534 tmp = find_or_insert_inv (eq, expr, mode, inv);
535 inv->eqto = tmp->invno;
536
537 if (tmp->invno != inv->invno && inv->always_executed)
538 tmp->eqno++;
1052bd54
ZD
539
540 if (dump_file && inv->eqto != inv->invno)
541 fprintf (dump_file,
e755fcf5 542 "Invariant %d is equivalent to invariant %d.\n",
1052bd54
ZD
543 inv->invno, inv->eqto);
544}
545
546/* Find invariants with the same value and record the equivalences. */
547
548static void
549merge_identical_invariants (void)
550{
551 unsigned i;
552 struct invariant *inv;
c203e8a7 553 invariant_htab_type eq (invariants.length ());
1052bd54 554
9771b263 555 FOR_EACH_VEC_ELT (invariants, i, inv)
c203e8a7 556 find_identical_invariants (&eq, inv);
1052bd54
ZD
557}
558
5e962776
ZD
559/* Determines the basic blocks inside LOOP that are always executed and
560 stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of
561 basic blocks that may either exit the loop, or contain the call that
562 does not have to return. BODY is body of the loop obtained by
563 get_loop_body_in_dom_order. */
564
565static void
566compute_always_reached (struct loop *loop, basic_block *body,
567 bitmap may_exit, bitmap always_reached)
568{
569 unsigned i;
570
571 for (i = 0; i < loop->num_nodes; i++)
572 {
573 if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i]))
574 bitmap_set_bit (always_reached, i);
575
576 if (bitmap_bit_p (may_exit, i))
577 return;
578 }
579}
580
581/* Finds exits out of the LOOP with body BODY. Marks blocks in that we may
582 exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT
583 additionally mark blocks that may exit due to a call. */
584
585static void
586find_exits (struct loop *loop, basic_block *body,
587 bitmap may_exit, bitmap has_exit)
588{
589 unsigned i;
628f6a4e 590 edge_iterator ei;
5e962776
ZD
591 edge e;
592 struct loop *outermost_exit = loop, *aexit;
593 bool has_call = false;
89bfd6f5 594 rtx_insn *insn;
5e962776
ZD
595
596 for (i = 0; i < loop->num_nodes; i++)
597 {
598 if (body[i]->loop_father == loop)
599 {
600 FOR_BB_INSNS (body[i], insn)
601 {
4b4bf941 602 if (CALL_P (insn)
becfd6e5
KZ
603 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
604 || !RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
605 {
606 has_call = true;
607 bitmap_set_bit (may_exit, i);
608 break;
609 }
610 }
611
628f6a4e 612 FOR_EACH_EDGE (e, ei, body[i]->succs)
5e962776
ZD
613 {
614 if (flow_bb_inside_loop_p (loop, e->dest))
615 continue;
616
617 bitmap_set_bit (may_exit, i);
618 bitmap_set_bit (has_exit, i);
619 outermost_exit = find_common_loop (outermost_exit,
620 e->dest->loop_father);
621 }
622 continue;
623 }
cb20f7e8 624
5e962776
ZD
625 /* Use the data stored for the subloop to decide whether we may exit
626 through it. It is sufficient to do this for header of the loop,
627 as other basic blocks inside it must be dominated by it. */
628 if (body[i]->loop_father->header != body[i])
629 continue;
630
631 if (LOOP_DATA (body[i]->loop_father)->has_call)
632 {
633 has_call = true;
634 bitmap_set_bit (may_exit, i);
635 }
636 aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit;
637 if (aexit != loop)
638 {
639 bitmap_set_bit (may_exit, i);
640 bitmap_set_bit (has_exit, i);
641
642 if (flow_loop_nested_p (aexit, outermost_exit))
643 outermost_exit = aexit;
644 }
645 }
646
1833192f
VM
647 if (loop->aux == NULL)
648 {
649 loop->aux = xcalloc (1, sizeof (struct loop_data));
650 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
651 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
652 }
5e962776
ZD
653 LOOP_DATA (loop)->outermost_exit = outermost_exit;
654 LOOP_DATA (loop)->has_call = has_call;
655}
656
657/* Check whether we may assign a value to X from a register. */
658
659static bool
660may_assign_reg_p (rtx x)
661{
bd361d85 662 return (GET_MODE (x) != VOIDmode
4b06592a 663 && GET_MODE (x) != BLKmode
bd361d85 664 && can_copy_p (GET_MODE (x))
a7f4ccb1
SB
665 && (!REG_P (x)
666 || !HARD_REGISTER_P (x)
667 || REGNO_REG_CLASS (REGNO (x)) != NO_REGS));
5e962776
ZD
668}
669
cb20f7e8
ZD
670/* Finds definitions that may correspond to invariants in LOOP with body
671 BODY. */
5e962776
ZD
672
673static void
7be64667 674find_defs (struct loop *loop)
5e962776 675{
7b19209f
SB
676 if (dump_file)
677 {
678 fprintf (dump_file,
679 "*****starting processing of loop %d ******\n",
680 loop->num);
681 }
682
6fb5fa3c
DB
683 df_remove_problem (df_chain);
684 df_process_deferred_rescans ();
685 df_chain_add_problem (DF_UD_CHAIN);
7b19209f 686 df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
7be64667 687 df_analyze_loop (loop);
7b19209f 688 check_invariant_table_size ();
6fb5fa3c
DB
689
690 if (dump_file)
691 {
ffd640ed 692 df_dump_region (dump_file);
7b19209f
SB
693 fprintf (dump_file,
694 "*****ending processing of loop %d ******\n",
695 loop->num);
6fb5fa3c 696 }
5e962776
ZD
697}
698
699/* Creates a new invariant for definition DEF in INSN, depending on invariants
700 in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed,
1052bd54
ZD
701 unless the program ends due to a function call. The newly created invariant
702 is returned. */
5e962776 703
1052bd54 704static struct invariant *
89bfd6f5 705create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on,
5e962776
ZD
706 bool always_executed)
707{
5ed6ace5 708 struct invariant *inv = XNEW (struct invariant);
5e962776 709 rtx set = single_set (insn);
f40751dd 710 bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
5e962776
ZD
711
712 inv->def = def;
713 inv->always_executed = always_executed;
714 inv->depends_on = depends_on;
715
716 /* If the set is simple, usually by moving it we move the whole store out of
717 the loop. Otherwise we save only cost of the computation. */
718 if (def)
1bfdbb29 719 {
d51102f3 720 inv->cost = set_rtx_cost (set, speed);
1578e910
MM
721 /* ??? Try to determine cheapness of address computation. Unfortunately
722 the address cost is only a relative measure, we can't really compare
723 it with any absolute number, but only with other address costs.
724 But here we don't have any other addresses, so compare with a magic
725 number anyway. It has to be large enough to not regress PR33928
726 (by avoiding to move reg+8,reg+16,reg+24 invariants), but small
727 enough to not regress 410.bwaves either (by still moving reg+reg
728 invariants).
729 See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */
315a349c
DS
730 if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set))))
731 inv->cheap_address = address_cost (SET_SRC (set), word_mode,
732 ADDR_SPACE_GENERIC, speed) < 3;
733 else
734 inv->cheap_address = false;
1bfdbb29 735 }
5e962776 736 else
1bfdbb29 737 {
5e8f01f4 738 inv->cost = set_src_cost (SET_SRC (set), speed);
1bfdbb29
PB
739 inv->cheap_address = false;
740 }
5e962776
ZD
741
742 inv->move = false;
1052bd54 743 inv->reg = NULL_RTX;
1833192f 744 inv->orig_regno = -1;
5e962776
ZD
745 inv->stamp = 0;
746 inv->insn = insn;
747
9771b263 748 inv->invno = invariants.length ();
1052bd54 749 inv->eqto = ~0u;
e42e3d15
ZC
750
751 /* Itself. */
752 inv->eqno = 1;
753
5e962776
ZD
754 if (def)
755 def->invno = inv->invno;
9771b263 756 invariants.safe_push (inv);
5e962776
ZD
757
758 if (dump_file)
759 {
760 fprintf (dump_file,
761 "Set in insn %d is invariant (%d), cost %d, depends on ",
762 INSN_UID (insn), inv->invno, inv->cost);
763 dump_bitmap (dump_file, inv->depends_on);
764 }
1052bd54
ZD
765
766 return inv;
5e962776
ZD
767}
768
769/* Record USE at DEF. */
770
771static void
1bfdbb29 772record_use (struct def *def, df_ref use)
5e962776 773{
5ed6ace5 774 struct use *u = XNEW (struct use);
5e962776 775
1bfdbb29
PB
776 u->pos = DF_REF_REAL_LOC (use);
777 u->insn = DF_REF_INSN (use);
778 u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD
3e807ffc 779 || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE);
5e962776
ZD
780 u->next = def->uses;
781 def->uses = u;
782 def->n_uses++;
1bfdbb29
PB
783 if (u->addr_use_p)
784 def->n_addr_uses++;
5e962776
ZD
785}
786
6fb5fa3c
DB
787/* Finds the invariants USE depends on and store them to the DEPENDS_ON
788 bitmap. Returns true if all dependencies of USE are known to be
b6c9b9bc 789 loop invariants, false otherwise. */
5e962776
ZD
790
791static bool
57512f53 792check_dependency (basic_block bb, df_ref use, bitmap depends_on)
5e962776 793{
57512f53 794 df_ref def;
6fb5fa3c 795 basic_block def_bb;
4d779342 796 struct df_link *defs;
5e962776 797 struct def *def_data;
1052bd54 798 struct invariant *inv;
b8698a0f 799
57512f53 800 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
6fb5fa3c 801 return false;
b8698a0f 802
6fb5fa3c
DB
803 defs = DF_REF_CHAIN (use);
804 if (!defs)
1a17bd35
EB
805 {
806 unsigned int regno = DF_REF_REGNO (use);
807
808 /* If this is the use of an uninitialized argument register that is
809 likely to be spilled, do not move it lest this might extend its
810 lifetime and cause reload to die. This can occur for a call to
811 a function taking complex number arguments and moving the insns
812 preparing the arguments without moving the call itself wouldn't
813 gain much in practice. */
814 if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE)
815 && FUNCTION_ARG_REGNO_P (regno)
816 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
817 return false;
818
819 return true;
820 }
b8698a0f 821
6fb5fa3c
DB
822 if (defs->next)
823 return false;
b8698a0f 824
6fb5fa3c
DB
825 def = defs->ref;
826 check_invariant_table_size ();
c3284718 827 inv = invariant_table[DF_REF_ID (def)];
6fb5fa3c
DB
828 if (!inv)
829 return false;
b8698a0f 830
6fb5fa3c
DB
831 def_data = inv->def;
832 gcc_assert (def_data != NULL);
b8698a0f 833
6fb5fa3c
DB
834 def_bb = DF_REF_BB (def);
835 /* Note that in case bb == def_bb, we know that the definition
836 dominates insn, because def has invariant_table[DF_REF_ID(def)]
837 defined and we process the insns in the basic block bb
838 sequentially. */
839 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
840 return false;
b8698a0f 841
6fb5fa3c
DB
842 bitmap_set_bit (depends_on, def_data->invno);
843 return true;
844}
1052bd54 845
1052bd54 846
6fb5fa3c
DB
847/* Finds the invariants INSN depends on and store them to the DEPENDS_ON
848 bitmap. Returns true if all dependencies of INSN are known to be
849 loop invariants, false otherwise. */
5e962776 850
6fb5fa3c 851static bool
89bfd6f5 852check_dependencies (rtx_insn *insn, bitmap depends_on)
6fb5fa3c 853{
50e94c7e 854 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 855 df_ref use;
6fb5fa3c 856 basic_block bb = BLOCK_FOR_INSN (insn);
5e962776 857
bfac633a
RS
858 FOR_EACH_INSN_INFO_USE (use, insn_info)
859 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 860 return false;
bfac633a
RS
861 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
862 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 863 return false;
b8698a0f 864
5e962776
ZD
865 return true;
866}
867
2c97f472
ZC
868/* Pre-check candidate DEST to skip the one which can not make a valid insn
869 during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */
870static bool
871pre_check_invariant_p (bool simple, rtx dest)
872{
873 if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1)
874 {
875 df_ref use;
2c97f472
ZC
876 unsigned int i = REGNO (dest);
877 struct df_insn_info *insn_info;
878 df_ref def_rec;
879
880 for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use))
881 {
e67d1102 882 rtx_insn *ref = DF_REF_INSN (use);
2c97f472
ZC
883 insn_info = DF_INSN_INFO_GET (ref);
884
885 FOR_EACH_INSN_INFO_DEF (def_rec, insn_info)
886 if (DF_REF_REGNO (def_rec) == i)
887 {
888 /* Multi definitions at this stage, most likely are due to
889 instruction constraints, which requires both read and write
890 on the same register. Since move_invariant_reg is not
891 powerful enough to handle such cases, just ignore the INV
892 and leave the chance to others. */
893 return false;
894 }
895 }
896 }
897 return true;
898}
899
5e962776
ZD
900/* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always
901 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 902 unless the program ends due to a function call. */
5e962776
ZD
903
904static void
89bfd6f5 905find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed)
5e962776 906{
57512f53 907 df_ref ref;
5e962776
ZD
908 struct def *def;
909 bitmap depends_on;
910 rtx set, dest;
911 bool simple = true;
1052bd54 912 struct invariant *inv;
5e962776 913
00f70f98 914 /* We can't move a CC0 setter without the user. */
058eb3b0 915 if (HAVE_cc0 && sets_cc0_p (insn))
00f70f98 916 return;
00f70f98 917
5e962776
ZD
918 set = single_set (insn);
919 if (!set)
920 return;
921 dest = SET_DEST (set);
922
2ca202e7 923 if (!REG_P (dest)
5e962776
ZD
924 || HARD_REGISTER_P (dest))
925 simple = false;
926
2c97f472
ZC
927 if (!may_assign_reg_p (dest)
928 || !pre_check_invariant_p (simple, dest)
a7f4ccb1 929 || !check_maybe_invariant (SET_SRC (set)))
5e962776
ZD
930 return;
931
28749cfb
ZD
932 /* If the insn can throw exception, we cannot move it at all without changing
933 cfg. */
934 if (can_throw_internal (insn))
935 return;
5e962776 936
28749cfb 937 /* We cannot make trapping insn executed, unless it was executed before. */
48e8382e 938 if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached)
28749cfb 939 return;
5e962776 940
8bdbfff5 941 depends_on = BITMAP_ALLOC (NULL);
cb20f7e8 942 if (!check_dependencies (insn, depends_on))
5e962776 943 {
8bdbfff5 944 BITMAP_FREE (depends_on);
5e962776
ZD
945 return;
946 }
947
948 if (simple)
5ed6ace5 949 def = XCNEW (struct def);
5e962776
ZD
950 else
951 def = NULL;
952
1052bd54
ZD
953 inv = create_new_invariant (def, insn, depends_on, always_executed);
954
955 if (simple)
956 {
6fb5fa3c
DB
957 ref = df_find_def (insn, dest);
958 check_invariant_table_size ();
c3284718 959 invariant_table[DF_REF_ID (ref)] = inv;
1052bd54 960 }
5e962776
ZD
961}
962
cb20f7e8 963/* Record registers used in INSN that have a unique invariant definition. */
5e962776
ZD
964
965static void
89bfd6f5 966record_uses (rtx_insn *insn)
5e962776 967{
50e94c7e 968 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 969 df_ref use;
1052bd54
ZD
970 struct invariant *inv;
971
bfac633a 972 FOR_EACH_INSN_INFO_USE (use, insn_info)
6fb5fa3c 973 {
6fb5fa3c
DB
974 inv = invariant_for_use (use);
975 if (inv)
1bfdbb29 976 record_use (inv->def, use);
6fb5fa3c 977 }
bfac633a 978 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
5e962776 979 {
1052bd54
ZD
980 inv = invariant_for_use (use);
981 if (inv)
1bfdbb29 982 record_use (inv->def, use);
5e962776
ZD
983 }
984}
985
986/* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always
987 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 988 unless the program ends due to a function call. */
5e962776
ZD
989
990static void
89bfd6f5 991find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed)
5e962776 992{
cb20f7e8
ZD
993 find_invariant_insn (insn, always_reached, always_executed);
994 record_uses (insn);
5e962776
ZD
995}
996
997/* Finds invariants in basic block BB. ALWAYS_REACHED is true if the
998 basic block is always executed. ALWAYS_EXECUTED is true if the basic
999 block is always executed, unless the program ends due to a function
cb20f7e8 1000 call. */
5e962776
ZD
1001
1002static void
cb20f7e8 1003find_invariants_bb (basic_block bb, bool always_reached, bool always_executed)
5e962776 1004{
89bfd6f5 1005 rtx_insn *insn;
5e962776
ZD
1006
1007 FOR_BB_INSNS (bb, insn)
1008 {
b5b8b0ac 1009 if (!NONDEBUG_INSN_P (insn))
5e962776
ZD
1010 continue;
1011
cb20f7e8 1012 find_invariants_insn (insn, always_reached, always_executed);
5e962776
ZD
1013
1014 if (always_reached
4b4bf941 1015 && CALL_P (insn)
becfd6e5
KZ
1016 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
1017 || ! RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
1018 always_reached = false;
1019 }
1020}
1021
1022/* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of
1023 basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the
1024 bitmap of basic blocks in BODY that are always executed unless the program
cb20f7e8 1025 ends due to a function call. */
5e962776
ZD
1026
1027static void
1028find_invariants_body (struct loop *loop, basic_block *body,
cb20f7e8 1029 bitmap always_reached, bitmap always_executed)
5e962776
ZD
1030{
1031 unsigned i;
1032
1033 for (i = 0; i < loop->num_nodes; i++)
1034 find_invariants_bb (body[i],
1035 bitmap_bit_p (always_reached, i),
cb20f7e8 1036 bitmap_bit_p (always_executed, i));
5e962776
ZD
1037}
1038
cb20f7e8 1039/* Finds invariants in LOOP. */
5e962776
ZD
1040
1041static void
cb20f7e8 1042find_invariants (struct loop *loop)
5e962776 1043{
8bdbfff5
NS
1044 bitmap may_exit = BITMAP_ALLOC (NULL);
1045 bitmap always_reached = BITMAP_ALLOC (NULL);
1046 bitmap has_exit = BITMAP_ALLOC (NULL);
1047 bitmap always_executed = BITMAP_ALLOC (NULL);
5e962776
ZD
1048 basic_block *body = get_loop_body_in_dom_order (loop);
1049
1050 find_exits (loop, body, may_exit, has_exit);
1051 compute_always_reached (loop, body, may_exit, always_reached);
1052 compute_always_reached (loop, body, has_exit, always_executed);
1053
7be64667 1054 find_defs (loop);
cb20f7e8 1055 find_invariants_body (loop, body, always_reached, always_executed);
1052bd54 1056 merge_identical_invariants ();
5e962776 1057
8bdbfff5
NS
1058 BITMAP_FREE (always_reached);
1059 BITMAP_FREE (always_executed);
1060 BITMAP_FREE (may_exit);
1061 BITMAP_FREE (has_exit);
5e962776
ZD
1062 free (body);
1063}
1064
1065/* Frees a list of uses USE. */
1066
1067static void
1068free_use_list (struct use *use)
1069{
1070 struct use *next;
1071
1072 for (; use; use = next)
1073 {
1074 next = use->next;
1075 free (use);
1076 }
1077}
1078
1756cb66 1079/* Return pressure class and number of hard registers (through *NREGS)
1833192f
VM
1080 for destination of INSN. */
1081static enum reg_class
89bfd6f5 1082get_pressure_class_and_nregs (rtx_insn *insn, int *nregs)
1833192f
VM
1083{
1084 rtx reg;
1756cb66 1085 enum reg_class pressure_class;
1833192f 1086 rtx set = single_set (insn);
b8698a0f 1087
1833192f
VM
1088 /* Considered invariant insns have only one set. */
1089 gcc_assert (set != NULL_RTX);
1090 reg = SET_DEST (set);
1091 if (GET_CODE (reg) == SUBREG)
1092 reg = SUBREG_REG (reg);
1093 if (MEM_P (reg))
1094 {
1095 *nregs = 0;
1756cb66 1096 pressure_class = NO_REGS;
1833192f
VM
1097 }
1098 else
1099 {
1100 if (! REG_P (reg))
1101 reg = NULL_RTX;
1102 if (reg == NULL_RTX)
1756cb66 1103 pressure_class = GENERAL_REGS;
1833192f 1104 else
1756cb66
VM
1105 {
1106 pressure_class = reg_allocno_class (REGNO (reg));
1107 pressure_class = ira_pressure_class_translate[pressure_class];
1108 }
1109 *nregs
1110 = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))];
1833192f 1111 }
1756cb66 1112 return pressure_class;
1833192f
VM
1113}
1114
5e962776 1115/* Calculates cost and number of registers needed for moving invariant INV
51a69168
ZC
1116 out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be
1117 the REG_CLASS of INV. Return
1118 -1: if INV is invalid.
1119 0: if INV and its depends_on have same reg_class
1120 1: if INV and its depends_on have different reg_classes. */
5e962776 1121
51a69168
ZC
1122static int
1123get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed,
1124 enum reg_class *cl)
5e962776 1125{
1833192f
VM
1126 int i, acomp_cost;
1127 unsigned aregs_needed[N_REG_CLASSES];
5e962776
ZD
1128 unsigned depno;
1129 struct invariant *dep;
87c476a2 1130 bitmap_iterator bi;
51a69168 1131 int ret = 1;
5e962776 1132
1052bd54 1133 /* Find the representative of the class of the equivalent invariants. */
9771b263 1134 inv = invariants[inv->eqto];
1052bd54 1135
5e962776 1136 *comp_cost = 0;
1833192f
VM
1137 if (! flag_ira_loop_pressure)
1138 regs_needed[0] = 0;
1139 else
1140 {
1756cb66
VM
1141 for (i = 0; i < ira_pressure_classes_num; i++)
1142 regs_needed[ira_pressure_classes[i]] = 0;
1833192f
VM
1143 }
1144
5e962776
ZD
1145 if (inv->move
1146 || inv->stamp == actual_stamp)
51a69168 1147 return -1;
5e962776
ZD
1148 inv->stamp = actual_stamp;
1149
1833192f
VM
1150 if (! flag_ira_loop_pressure)
1151 regs_needed[0]++;
1152 else
1153 {
1154 int nregs;
1756cb66 1155 enum reg_class pressure_class;
1833192f 1156
1756cb66
VM
1157 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1158 regs_needed[pressure_class] += nregs;
51a69168
ZC
1159 *cl = pressure_class;
1160 ret = 0;
1833192f
VM
1161 }
1162
1bfdbb29 1163 if (!inv->cheap_address
315a349c 1164 || inv->def->n_uses == 0
1bfdbb29 1165 || inv->def->n_addr_uses < inv->def->n_uses)
e42e3d15 1166 (*comp_cost) += inv->cost * inv->eqno;
5e962776 1167
3d8504ac
RS
1168#ifdef STACK_REGS
1169 {
1170 /* Hoisting constant pool constants into stack regs may cost more than
1171 just single register. On x87, the balance is affected both by the
c0220ea4 1172 small number of FP registers, and by its register stack organization,
3d8504ac
RS
1173 that forces us to add compensation code in and around the loop to
1174 shuffle the operands to the top of stack before use, and pop them
1175 from the stack after the loop finishes.
1176
1177 To model this effect, we increase the number of registers needed for
1178 stack registers by two: one register push, and one register pop.
1179 This usually has the effect that FP constant loads from the constant
1180 pool are not moved out of the loop.
1181
1182 Note that this also means that dependent invariants can not be moved.
1183 However, the primary purpose of this pass is to move loop invariant
1184 address arithmetic out of loops, and address arithmetic that depends
1185 on floating point constants is unlikely to ever occur. */
1186 rtx set = single_set (inv->insn);
1187 if (set
1833192f
VM
1188 && IS_STACK_MODE (GET_MODE (SET_SRC (set)))
1189 && constant_pool_constant_p (SET_SRC (set)))
1190 {
1191 if (flag_ira_loop_pressure)
1756cb66 1192 regs_needed[ira_stack_reg_pressure_class] += 2;
1833192f
VM
1193 else
1194 regs_needed[0] += 2;
1195 }
3d8504ac
RS
1196 }
1197#endif
1198
87c476a2 1199 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
5e962776 1200 {
1833192f 1201 bool check_p;
51a69168
ZC
1202 enum reg_class dep_cl = ALL_REGS;
1203 int dep_ret;
1833192f 1204
9771b263 1205 dep = invariants[depno];
5e962776 1206
61fc05c7
ZC
1207 /* If DEP is moved out of the loop, it is not a depends_on any more. */
1208 if (dep->move)
1209 continue;
1210
51a69168 1211 dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl);
5e962776 1212
1833192f
VM
1213 if (! flag_ira_loop_pressure)
1214 check_p = aregs_needed[0] != 0;
1215 else
1216 {
1756cb66
VM
1217 for (i = 0; i < ira_pressure_classes_num; i++)
1218 if (aregs_needed[ira_pressure_classes[i]] != 0)
1833192f 1219 break;
1756cb66 1220 check_p = i < ira_pressure_classes_num;
51a69168
ZC
1221
1222 if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl)))
1223 {
1224 *cl = ALL_REGS;
1225 ret = 1;
1226 }
1833192f
VM
1227 }
1228 if (check_p
5e962776
ZD
1229 /* We need to check always_executed, since if the original value of
1230 the invariant may be preserved, we may need to keep it in a
1231 separate register. TODO check whether the register has an
1232 use outside of the loop. */
1233 && dep->always_executed
1234 && !dep->def->uses->next)
1235 {
1236 /* If this is a single use, after moving the dependency we will not
1237 need a new register. */
1833192f
VM
1238 if (! flag_ira_loop_pressure)
1239 aregs_needed[0]--;
1240 else
1241 {
1242 int nregs;
1756cb66 1243 enum reg_class pressure_class;
1833192f 1244
1756cb66
VM
1245 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1246 aregs_needed[pressure_class] -= nregs;
1833192f 1247 }
5e962776
ZD
1248 }
1249
1833192f
VM
1250 if (! flag_ira_loop_pressure)
1251 regs_needed[0] += aregs_needed[0];
1252 else
1253 {
1756cb66
VM
1254 for (i = 0; i < ira_pressure_classes_num; i++)
1255 regs_needed[ira_pressure_classes[i]]
1256 += aregs_needed[ira_pressure_classes[i]];
1833192f 1257 }
5e962776 1258 (*comp_cost) += acomp_cost;
87c476a2 1259 }
51a69168 1260 return ret;
5e962776
ZD
1261}
1262
1263/* Calculates gain for eliminating invariant INV. REGS_USED is the number
a154b43a
ZD
1264 of registers used in the loop, NEW_REGS is the number of new variables
1265 already added due to the invariant motion. The number of registers needed
bec922f0
SL
1266 for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed
1267 through to estimate_reg_pressure_cost. */
5e962776
ZD
1268
1269static int
1270gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
bec922f0
SL
1271 unsigned *new_regs, unsigned regs_used,
1272 bool speed, bool call_p)
5e962776
ZD
1273{
1274 int comp_cost, size_cost;
e54bd4ab
JJ
1275 /* Workaround -Wmaybe-uninitialized false positive during
1276 profiledbootstrap by initializing it. */
1277 enum reg_class cl = NO_REGS;
51a69168 1278 int ret;
5e962776 1279
5e962776
ZD
1280 actual_stamp++;
1281
51a69168 1282 ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl);
1833192f
VM
1283
1284 if (! flag_ira_loop_pressure)
1285 {
1286 size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0],
bec922f0 1287 regs_used, speed, call_p)
1833192f 1288 - estimate_reg_pressure_cost (new_regs[0],
bec922f0 1289 regs_used, speed, call_p));
1833192f 1290 }
51a69168
ZC
1291 else if (ret < 0)
1292 return -1;
1293 else if ((ret == 0) && (cl == NO_REGS))
1294 /* Hoist it anyway since it does not impact register pressure. */
1295 return 1;
1833192f
VM
1296 else
1297 {
1298 int i;
1756cb66 1299 enum reg_class pressure_class;
1833192f 1300
1756cb66 1301 for (i = 0; i < ira_pressure_classes_num; i++)
1833192f 1302 {
1756cb66 1303 pressure_class = ira_pressure_classes[i];
51a69168
ZC
1304
1305 if (!reg_classes_intersect_p (pressure_class, cl))
1306 continue;
1307
1756cb66
VM
1308 if ((int) new_regs[pressure_class]
1309 + (int) regs_needed[pressure_class]
1310 + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1833192f 1311 + IRA_LOOP_RESERVED_REGS
f508f827 1312 > ira_class_hard_regs_num[pressure_class])
1833192f
VM
1313 break;
1314 }
1756cb66 1315 if (i < ira_pressure_classes_num)
1833192f
VM
1316 /* There will be register pressure excess and we want not to
1317 make this loop invariant motion. All loop invariants with
1318 non-positive gains will be rejected in function
1319 find_invariants_to_move. Therefore we return the negative
1320 number here.
1321
1322 One could think that this rejects also expensive loop
1323 invariant motions and this will hurt code performance.
1324 However numerous experiments with different heuristics
1325 taking invariant cost into account did not confirm this
1326 assumption. There are possible explanations for this
1327 result:
1328 o probably all expensive invariants were already moved out
1329 of the loop by PRE and gimple invariant motion pass.
1330 o expensive invariant execution will be hidden by insn
1331 scheduling or OOO processor hardware because usually such
1332 invariants have a lot of freedom to be executed
1333 out-of-order.
1334 Another reason for ignoring invariant cost vs spilling cost
1335 heuristics is also in difficulties to evaluate accurately
1336 spill cost at this stage. */
1337 return -1;
1338 else
1339 size_cost = 0;
1340 }
5e962776
ZD
1341
1342 return comp_cost - size_cost;
1343}
1344
1345/* Finds invariant with best gain for moving. Returns the gain, stores
1346 the invariant in *BEST and number of registers needed for it to
a154b43a
ZD
1347 *REGS_NEEDED. REGS_USED is the number of registers used in the loop.
1348 NEW_REGS is the number of new variables already added due to invariant
1349 motion. */
5e962776
ZD
1350
1351static int
1352best_gain_for_invariant (struct invariant **best, unsigned *regs_needed,
bec922f0
SL
1353 unsigned *new_regs, unsigned regs_used,
1354 bool speed, bool call_p)
5e962776
ZD
1355{
1356 struct invariant *inv;
1833192f
VM
1357 int i, gain = 0, again;
1358 unsigned aregs_needed[N_REG_CLASSES], invno;
5e962776 1359
9771b263 1360 FOR_EACH_VEC_ELT (invariants, invno, inv)
5e962776 1361 {
5e962776
ZD
1362 if (inv->move)
1363 continue;
1364
1052bd54
ZD
1365 /* Only consider the "representatives" of equivalent invariants. */
1366 if (inv->eqto != inv->invno)
1367 continue;
1368
1833192f 1369 again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used,
bec922f0 1370 speed, call_p);
5e962776
ZD
1371 if (again > gain)
1372 {
1373 gain = again;
1374 *best = inv;
1833192f
VM
1375 if (! flag_ira_loop_pressure)
1376 regs_needed[0] = aregs_needed[0];
1377 else
1378 {
1756cb66
VM
1379 for (i = 0; i < ira_pressure_classes_num; i++)
1380 regs_needed[ira_pressure_classes[i]]
1381 = aregs_needed[ira_pressure_classes[i]];
1833192f 1382 }
5e962776
ZD
1383 }
1384 }
1385
1386 return gain;
1387}
1388
1389/* Marks invariant INVNO and all its dependencies for moving. */
1390
1391static void
1833192f 1392set_move_mark (unsigned invno, int gain)
5e962776 1393{
9771b263 1394 struct invariant *inv = invariants[invno];
87c476a2 1395 bitmap_iterator bi;
5e962776 1396
1052bd54 1397 /* Find the representative of the class of the equivalent invariants. */
9771b263 1398 inv = invariants[inv->eqto];
1052bd54 1399
5e962776
ZD
1400 if (inv->move)
1401 return;
1402 inv->move = true;
1403
1404 if (dump_file)
1833192f
VM
1405 {
1406 if (gain >= 0)
1407 fprintf (dump_file, "Decided to move invariant %d -- gain %d\n",
1408 invno, gain);
1409 else
1410 fprintf (dump_file, "Decided to move dependent invariant %d\n",
1411 invno);
1412 };
5e962776 1413
87c476a2
ZD
1414 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi)
1415 {
1833192f 1416 set_move_mark (invno, -1);
87c476a2 1417 }
5e962776
ZD
1418}
1419
cb20f7e8 1420/* Determines which invariants to move. */
5e962776
ZD
1421
1422static void
bec922f0 1423find_invariants_to_move (bool speed, bool call_p)
5e962776 1424{
1833192f
VM
1425 int gain;
1426 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES];
5e962776
ZD
1427 struct invariant *inv = NULL;
1428
9771b263 1429 if (!invariants.length ())
5e962776
ZD
1430 return;
1431
1833192f 1432 if (flag_ira_loop_pressure)
b8698a0f 1433 /* REGS_USED is actually never used when the flag is on. */
1833192f
VM
1434 regs_used = 0;
1435 else
1436 /* We do not really do a good job in estimating number of
1437 registers used; we put some initial bound here to stand for
1438 induction variables etc. that we do not detect. */
5e962776 1439 {
1833192f
VM
1440 unsigned int n_regs = DF_REG_SIZE (df);
1441
1442 regs_used = 2;
b8698a0f 1443
1833192f 1444 for (i = 0; i < n_regs; i++)
5e962776 1445 {
1833192f
VM
1446 if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i))
1447 {
1448 /* This is a value that is used but not changed inside loop. */
1449 regs_used++;
1450 }
5e962776
ZD
1451 }
1452 }
1453
1833192f
VM
1454 if (! flag_ira_loop_pressure)
1455 new_regs[0] = regs_needed[0] = 0;
1456 else
5e962776 1457 {
1756cb66
VM
1458 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1459 new_regs[ira_pressure_classes[i]] = 0;
1833192f
VM
1460 }
1461 while ((gain = best_gain_for_invariant (&inv, regs_needed,
bec922f0
SL
1462 new_regs, regs_used,
1463 speed, call_p)) > 0)
1833192f
VM
1464 {
1465 set_move_mark (inv->invno, gain);
1466 if (! flag_ira_loop_pressure)
1467 new_regs[0] += regs_needed[0];
1468 else
1469 {
1756cb66
VM
1470 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1471 new_regs[ira_pressure_classes[i]]
1472 += regs_needed[ira_pressure_classes[i]];
1833192f 1473 }
5e962776
ZD
1474 }
1475}
1476
43ba743c
EB
1477/* Replace the uses, reached by the definition of invariant INV, by REG.
1478
1479 IN_GROUP is nonzero if this is part of a group of changes that must be
1480 performed as a group. In that case, the changes will be stored. The
1481 function `apply_change_group' will validate and apply the changes. */
1482
1483static int
1484replace_uses (struct invariant *inv, rtx reg, bool in_group)
1485{
1486 /* Replace the uses we know to be dominated. It saves work for copy
1487 propagation, and also it is necessary so that dependent invariants
1488 are computed right. */
1489 if (inv->def)
1490 {
1491 struct use *use;
1492 for (use = inv->def->uses; use; use = use->next)
1493 validate_change (use->insn, use->pos, reg, true);
1494
1495 /* If we aren't part of a larger group, apply the changes now. */
1496 if (!in_group)
1497 return apply_change_group ();
1498 }
1499
1500 return 1;
1501}
1502
aa953e2f
TP
1503/* Whether invariant INV setting REG can be moved out of LOOP, at the end of
1504 the block preceding its header. */
1505
1506static bool
1507can_move_invariant_reg (struct loop *loop, struct invariant *inv, rtx reg)
1508{
1509 df_ref def, use;
1510 unsigned int dest_regno, defs_in_loop_count = 0;
1511 rtx_insn *insn = inv->insn;
1512 basic_block bb = BLOCK_FOR_INSN (inv->insn);
1513
1514 /* We ignore hard register and memory access for cost and complexity reasons.
1515 Hard register are few at this stage and expensive to consider as they
1516 require building a separate data flow. Memory access would require using
1517 df_simulate_* and can_move_insns_across functions and is more complex. */
1518 if (!REG_P (reg) || HARD_REGISTER_P (reg))
1519 return false;
1520
1521 /* Check whether the set is always executed. We could omit this condition if
1522 we know that the register is unused outside of the loop, but it does not
1523 seem worth finding out. */
1524 if (!inv->always_executed)
1525 return false;
1526
1527 /* Check that all uses that would be dominated by def are already dominated
1528 by it. */
1529 dest_regno = REGNO (reg);
1530 for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use))
1531 {
1532 rtx_insn *use_insn;
1533 basic_block use_bb;
1534
1535 use_insn = DF_REF_INSN (use);
1536 use_bb = BLOCK_FOR_INSN (use_insn);
1537
1538 /* Ignore instruction considered for moving. */
1539 if (use_insn == insn)
1540 continue;
1541
1542 /* Don't consider uses outside loop. */
1543 if (!flow_bb_inside_loop_p (loop, use_bb))
1544 continue;
1545
1546 /* Don't move if a use is not dominated by def in insn. */
1547 if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn))
1548 return false;
1549 if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb))
1550 return false;
1551 }
1552
1553 /* Check for other defs. Any other def in the loop might reach a use
1554 currently reached by the def in insn. */
1555 for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def))
1556 {
1557 basic_block def_bb = DF_REF_BB (def);
1558
1559 /* Defs in exit block cannot reach a use they weren't already. */
1560 if (single_succ_p (def_bb))
1561 {
1562 basic_block def_bb_succ;
1563
1564 def_bb_succ = single_succ (def_bb);
1565 if (!flow_bb_inside_loop_p (loop, def_bb_succ))
1566 continue;
1567 }
1568
1569 if (++defs_in_loop_count > 1)
1570 return false;
1571 }
1572
1573 return true;
1574}
1575
ba946209
ZD
1576/* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false
1577 otherwise. */
1578
1579static bool
cb20f7e8 1580move_invariant_reg (struct loop *loop, unsigned invno)
5e962776 1581{
9771b263
DN
1582 struct invariant *inv = invariants[invno];
1583 struct invariant *repr = invariants[inv->eqto];
5e962776
ZD
1584 unsigned i;
1585 basic_block preheader = loop_preheader_edge (loop)->src;
90b1c344 1586 rtx reg, set, dest, note;
87c476a2 1587 bitmap_iterator bi;
43ba743c 1588 int regno = -1;
5e962776 1589
ba946209
ZD
1590 if (inv->reg)
1591 return true;
1592 if (!repr->move)
1593 return false;
43ba743c 1594
1052bd54
ZD
1595 /* If this is a representative of the class of equivalent invariants,
1596 really move the invariant. Otherwise just replace its use with
1597 the register used for the representative. */
1598 if (inv == repr)
5e962776 1599 {
1052bd54 1600 if (inv->depends_on)
5e962776 1601 {
1052bd54
ZD
1602 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi)
1603 {
ba946209
ZD
1604 if (!move_invariant_reg (loop, i))
1605 goto fail;
1052bd54 1606 }
87c476a2 1607 }
5e962776 1608
aa953e2f
TP
1609 /* If possible, just move the set out of the loop. Otherwise, we
1610 need to create a temporary register. */
1052bd54 1611 set = single_set (inv->insn);
1833192f
VM
1612 reg = dest = SET_DEST (set);
1613 if (GET_CODE (reg) == SUBREG)
1614 reg = SUBREG_REG (reg);
1615 if (REG_P (reg))
1616 regno = REGNO (reg);
1617
ddd93587 1618 if (!can_move_invariant_reg (loop, inv, dest))
aa953e2f
TP
1619 {
1620 reg = gen_reg_rtx_and_attrs (dest);
1052bd54 1621
aa953e2f
TP
1622 /* Try replacing the destination by a new pseudoregister. */
1623 validate_change (inv->insn, &SET_DEST (set), reg, true);
43ba743c 1624
aa953e2f
TP
1625 /* As well as all the dominated uses. */
1626 replace_uses (inv, reg, true);
43ba743c 1627
aa953e2f
TP
1628 /* And validate all the changes. */
1629 if (!apply_change_group ())
1630 goto fail;
90b1c344 1631
aa953e2f
TP
1632 emit_insn_after (gen_move_insn (dest, reg), inv->insn);
1633 }
1634 else if (dump_file)
1635 fprintf (dump_file, "Invariant %d moved without introducing a new "
1636 "temporary register\n", invno);
90b1c344
ZD
1637 reorder_insns (inv->insn, inv->insn, BB_END (preheader));
1638
82fa5f8a
L
1639 /* If there is a REG_EQUAL note on the insn we just moved, and the
1640 insn is in a basic block that is not always executed or the note
1641 contains something for which we don't know the invariant status,
1642 the note may no longer be valid after we move the insn. Note that
1643 uses in REG_EQUAL notes are taken into account in the computation
1644 of invariants, so it is safe to retain the note even if it contains
1645 register references for which we know the invariant status. */
1646 if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX))
1647 && (!inv->always_executed
1648 || !check_maybe_invariant (XEXP (note, 0))))
90b1c344 1649 remove_note (inv->insn, note);
b644b211
SB
1650 }
1651 else
1652 {
ba946209
ZD
1653 if (!move_invariant_reg (loop, repr->invno))
1654 goto fail;
1052bd54 1655 reg = repr->reg;
1833192f 1656 regno = repr->orig_regno;
43ba743c
EB
1657 if (!replace_uses (inv, reg, false))
1658 goto fail;
1052bd54 1659 set = single_set (inv->insn);
4d779342
DB
1660 emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn);
1661 delete_insn (inv->insn);
b644b211 1662 }
5e962776 1663
1052bd54 1664 inv->reg = reg;
1833192f 1665 inv->orig_regno = regno;
1052bd54 1666
ba946209
ZD
1667 return true;
1668
1669fail:
1670 /* If we failed, clear move flag, so that we do not try to move inv
1671 again. */
1672 if (dump_file)
1673 fprintf (dump_file, "Failed to move invariant %d\n", invno);
1674 inv->move = false;
1675 inv->reg = NULL_RTX;
1833192f 1676 inv->orig_regno = -1;
6fb5fa3c 1677
ba946209 1678 return false;
5e962776
ZD
1679}
1680
1681/* Move selected invariant out of the LOOP. Newly created regs are marked
cb20f7e8 1682 in TEMPORARY_REGS. */
5e962776
ZD
1683
1684static void
cb20f7e8 1685move_invariants (struct loop *loop)
5e962776
ZD
1686{
1687 struct invariant *inv;
1688 unsigned i;
1689
9771b263 1690 FOR_EACH_VEC_ELT (invariants, i, inv)
1052bd54 1691 move_invariant_reg (loop, i);
1833192f
VM
1692 if (flag_ira_loop_pressure && resize_reg_info ())
1693 {
9771b263 1694 FOR_EACH_VEC_ELT (invariants, i, inv)
1833192f
VM
1695 if (inv->reg != NULL_RTX)
1696 {
1697 if (inv->orig_regno >= 0)
1698 setup_reg_classes (REGNO (inv->reg),
1699 reg_preferred_class (inv->orig_regno),
1700 reg_alternate_class (inv->orig_regno),
1756cb66 1701 reg_allocno_class (inv->orig_regno));
1833192f
VM
1702 else
1703 setup_reg_classes (REGNO (inv->reg),
1704 GENERAL_REGS, NO_REGS, GENERAL_REGS);
1705 }
1706 }
5e962776
ZD
1707}
1708
1709/* Initializes invariant motion data. */
1710
1711static void
1712init_inv_motion_data (void)
1713{
1714 actual_stamp = 1;
1715
9771b263 1716 invariants.create (100);
5e962776
ZD
1717}
1718
cb20f7e8 1719/* Frees the data allocated by invariant motion. */
5e962776
ZD
1720
1721static void
cb20f7e8 1722free_inv_motion_data (void)
5e962776
ZD
1723{
1724 unsigned i;
1725 struct def *def;
1726 struct invariant *inv;
1727
6fb5fa3c
DB
1728 check_invariant_table_size ();
1729 for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++)
5e962776 1730 {
6fb5fa3c
DB
1731 inv = invariant_table[i];
1732 if (inv)
1733 {
1734 def = inv->def;
1735 gcc_assert (def != NULL);
b8698a0f 1736
6fb5fa3c
DB
1737 free_use_list (def->uses);
1738 free (def);
1739 invariant_table[i] = NULL;
1740 }
5e962776
ZD
1741 }
1742
9771b263 1743 FOR_EACH_VEC_ELT (invariants, i, inv)
5e962776 1744 {
8bdbfff5 1745 BITMAP_FREE (inv->depends_on);
5e962776
ZD
1746 free (inv);
1747 }
9771b263 1748 invariants.release ();
5e962776
ZD
1749}
1750
cb20f7e8 1751/* Move the invariants out of the LOOP. */
5e962776
ZD
1752
1753static void
cb20f7e8 1754move_single_loop_invariants (struct loop *loop)
5e962776
ZD
1755{
1756 init_inv_motion_data ();
1757
cb20f7e8 1758 find_invariants (loop);
bec922f0
SL
1759 find_invariants_to_move (optimize_loop_for_speed_p (loop),
1760 LOOP_DATA (loop)->has_call);
cb20f7e8 1761 move_invariants (loop);
5e962776 1762
cb20f7e8 1763 free_inv_motion_data ();
5e962776
ZD
1764}
1765
1766/* Releases the auxiliary data for LOOP. */
1767
1768static void
1769free_loop_data (struct loop *loop)
1770{
1771 struct loop_data *data = LOOP_DATA (loop);
eb149440
RG
1772 if (!data)
1773 return;
5e962776 1774
1833192f
VM
1775 bitmap_clear (&LOOP_DATA (loop)->regs_ref);
1776 bitmap_clear (&LOOP_DATA (loop)->regs_live);
5e962776
ZD
1777 free (data);
1778 loop->aux = NULL;
1779}
1780
1833192f
VM
1781\f
1782
1783/* Registers currently living. */
1784static bitmap_head curr_regs_live;
1785
1756cb66 1786/* Current reg pressure for each pressure class. */
1833192f
VM
1787static int curr_reg_pressure[N_REG_CLASSES];
1788
1789/* Record all regs that are set in any one insn. Communication from
1790 mark_reg_{store,clobber} and global_conflicts. Asm can refer to
1791 all hard-registers. */
1792static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS
1793 ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2];
1794/* Number of regs stored in the previous array. */
1795static int n_regs_set;
1796
1756cb66 1797/* Return pressure class and number of needed hard registers (through
b8698a0f 1798 *NREGS) of register REGNO. */
1833192f 1799static enum reg_class
1756cb66 1800get_regno_pressure_class (int regno, int *nregs)
1833192f
VM
1801{
1802 if (regno >= FIRST_PSEUDO_REGISTER)
1803 {
1756cb66 1804 enum reg_class pressure_class;
1833192f 1805
1756cb66
VM
1806 pressure_class = reg_allocno_class (regno);
1807 pressure_class = ira_pressure_class_translate[pressure_class];
1808 *nregs
1809 = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)];
1810 return pressure_class;
1833192f
VM
1811 }
1812 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)
1813 && ! TEST_HARD_REG_BIT (eliminable_regset, regno))
1814 {
1815 *nregs = 1;
1756cb66 1816 return ira_pressure_class_translate[REGNO_REG_CLASS (regno)];
1833192f
VM
1817 }
1818 else
1819 {
1820 *nregs = 0;
1821 return NO_REGS;
1822 }
1823}
1824
1825/* Increase (if INCR_P) or decrease current register pressure for
1826 register REGNO. */
1827static void
1828change_pressure (int regno, bool incr_p)
1829{
1830 int nregs;
1756cb66 1831 enum reg_class pressure_class;
1833192f 1832
1756cb66 1833 pressure_class = get_regno_pressure_class (regno, &nregs);
1833192f 1834 if (! incr_p)
1756cb66 1835 curr_reg_pressure[pressure_class] -= nregs;
1833192f
VM
1836 else
1837 {
1756cb66
VM
1838 curr_reg_pressure[pressure_class] += nregs;
1839 if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1840 < curr_reg_pressure[pressure_class])
1841 LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1842 = curr_reg_pressure[pressure_class];
1833192f
VM
1843 }
1844}
1845
1846/* Mark REGNO birth. */
1847static void
1848mark_regno_live (int regno)
1849{
1850 struct loop *loop;
1851
1852 for (loop = curr_loop;
1853 loop != current_loops->tree_root;
1854 loop = loop_outer (loop))
1855 bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno);
fcaa4ca4 1856 if (!bitmap_set_bit (&curr_regs_live, regno))
1833192f 1857 return;
1833192f
VM
1858 change_pressure (regno, true);
1859}
1860
1861/* Mark REGNO death. */
1862static void
1863mark_regno_death (int regno)
1864{
fcaa4ca4 1865 if (! bitmap_clear_bit (&curr_regs_live, regno))
1833192f 1866 return;
1833192f
VM
1867 change_pressure (regno, false);
1868}
1869
1870/* Mark setting register REG. */
1871static void
1872mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED,
1873 void *data ATTRIBUTE_UNUSED)
1874{
1833192f
VM
1875 if (GET_CODE (reg) == SUBREG)
1876 reg = SUBREG_REG (reg);
1877
1878 if (! REG_P (reg))
1879 return;
1880
1881 regs_set[n_regs_set++] = reg;
1882
53d1bae9
RS
1883 unsigned int end_regno = END_REGNO (reg);
1884 for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
1833192f 1885 mark_regno_live (regno);
1833192f
VM
1886}
1887
1888/* Mark clobbering register REG. */
1889static void
1890mark_reg_clobber (rtx reg, const_rtx setter, void *data)
1891{
1892 if (GET_CODE (setter) == CLOBBER)
1893 mark_reg_store (reg, setter, data);
1894}
1895
1896/* Mark register REG death. */
1897static void
1898mark_reg_death (rtx reg)
1899{
53d1bae9
RS
1900 unsigned int end_regno = END_REGNO (reg);
1901 for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
1833192f 1902 mark_regno_death (regno);
1833192f
VM
1903}
1904
1905/* Mark occurrence of registers in X for the current loop. */
1906static void
1907mark_ref_regs (rtx x)
1908{
1909 RTX_CODE code;
1910 int i;
1911 const char *fmt;
1912
1913 if (!x)
1914 return;
1915
1916 code = GET_CODE (x);
1917 if (code == REG)
1918 {
1919 struct loop *loop;
b8698a0f 1920
1833192f
VM
1921 for (loop = curr_loop;
1922 loop != current_loops->tree_root;
1923 loop = loop_outer (loop))
1924 bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x));
1925 return;
1926 }
1927
1928 fmt = GET_RTX_FORMAT (code);
1929 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1930 if (fmt[i] == 'e')
1931 mark_ref_regs (XEXP (x, i));
1932 else if (fmt[i] == 'E')
1933 {
1934 int j;
b8698a0f 1935
1833192f
VM
1936 for (j = 0; j < XVECLEN (x, i); j++)
1937 mark_ref_regs (XVECEXP (x, i, j));
1938 }
1939}
1940
1941/* Calculate register pressure in the loops. */
1942static void
1943calculate_loop_reg_pressure (void)
1944{
1945 int i;
1946 unsigned int j;
1947 bitmap_iterator bi;
1948 basic_block bb;
89bfd6f5
DM
1949 rtx_insn *insn;
1950 rtx link;
1833192f 1951 struct loop *loop, *parent;
1833192f 1952
f0bd40b1 1953 FOR_EACH_LOOP (loop, 0)
1833192f
VM
1954 if (loop->aux == NULL)
1955 {
1956 loop->aux = xcalloc (1, sizeof (struct loop_data));
1957 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
1958 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
1959 }
8d49e7ef 1960 ira_setup_eliminable_regset ();
1833192f 1961 bitmap_initialize (&curr_regs_live, &reg_obstack);
11cd3bed 1962 FOR_EACH_BB_FN (bb, cfun)
1833192f
VM
1963 {
1964 curr_loop = bb->loop_father;
1965 if (curr_loop == current_loops->tree_root)
1966 continue;
1967
1968 for (loop = curr_loop;
1969 loop != current_loops->tree_root;
1970 loop = loop_outer (loop))
1971 bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb));
1972
1973 bitmap_copy (&curr_regs_live, DF_LR_IN (bb));
1756cb66
VM
1974 for (i = 0; i < ira_pressure_classes_num; i++)
1975 curr_reg_pressure[ira_pressure_classes[i]] = 0;
1833192f
VM
1976 EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi)
1977 change_pressure (j, true);
1978
1979 FOR_BB_INSNS (bb, insn)
1980 {
dd8c071d 1981 if (! NONDEBUG_INSN_P (insn))
1833192f
VM
1982 continue;
1983
1984 mark_ref_regs (PATTERN (insn));
1985 n_regs_set = 0;
1986 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
b8698a0f 1987
1833192f 1988 /* Mark any registers dead after INSN as dead now. */
b8698a0f 1989
1833192f
VM
1990 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1991 if (REG_NOTE_KIND (link) == REG_DEAD)
1992 mark_reg_death (XEXP (link, 0));
b8698a0f 1993
1833192f
VM
1994 /* Mark any registers set in INSN as live,
1995 and mark them as conflicting with all other live regs.
1996 Clobbers are processed again, so they conflict with
1997 the registers that are set. */
b8698a0f 1998
1833192f 1999 note_stores (PATTERN (insn), mark_reg_store, NULL);
b8698a0f 2000
1833192f
VM
2001#ifdef AUTO_INC_DEC
2002 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2003 if (REG_NOTE_KIND (link) == REG_INC)
2004 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
2005#endif
2006 while (n_regs_set-- > 0)
2007 {
2008 rtx note = find_regno_note (insn, REG_UNUSED,
2009 REGNO (regs_set[n_regs_set]));
2010 if (! note)
2011 continue;
b8698a0f 2012
1833192f
VM
2013 mark_reg_death (XEXP (note, 0));
2014 }
2015 }
2016 }
2017 bitmap_clear (&curr_regs_live);
2018 if (flag_ira_region == IRA_REGION_MIXED
2019 || flag_ira_region == IRA_REGION_ALL)
f0bd40b1 2020 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2021 {
2022 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
2023 if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j))
2024 {
1756cb66 2025 enum reg_class pressure_class;
1833192f
VM
2026 int nregs;
2027
1756cb66
VM
2028 pressure_class = get_regno_pressure_class (j, &nregs);
2029 LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs;
1833192f
VM
2030 }
2031 }
2032 if (dump_file == NULL)
2033 return;
f0bd40b1 2034 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2035 {
2036 parent = loop_outer (loop);
2037 fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n",
2038 loop->num, (parent == NULL ? -1 : parent->num),
2039 loop->header->index, loop_depth (loop));
2040 fprintf (dump_file, "\n ref. regnos:");
2041 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi)
2042 fprintf (dump_file, " %d", j);
2043 fprintf (dump_file, "\n live regnos:");
2044 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
2045 fprintf (dump_file, " %d", j);
2046 fprintf (dump_file, "\n Pressure:");
1756cb66 2047 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1833192f 2048 {
1756cb66 2049 enum reg_class pressure_class;
b8698a0f 2050
1756cb66
VM
2051 pressure_class = ira_pressure_classes[i];
2052 if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0)
1833192f 2053 continue;
1756cb66
VM
2054 fprintf (dump_file, " %s=%d", reg_class_names[pressure_class],
2055 LOOP_DATA (loop)->max_reg_pressure[pressure_class]);
1833192f
VM
2056 }
2057 fprintf (dump_file, "\n");
2058 }
2059}
2060
2061\f
2062
d73be268 2063/* Move the invariants out of the loops. */
5e962776
ZD
2064
2065void
d73be268 2066move_loop_invariants (void)
5e962776
ZD
2067{
2068 struct loop *loop;
cb20f7e8 2069
1833192f
VM
2070 if (flag_ira_loop_pressure)
2071 {
2072 df_analyze ();
1756cb66 2073 regstat_init_n_sets_and_refs ();
b11f0116 2074 ira_set_pseudo_classes (true, dump_file);
1833192f 2075 calculate_loop_reg_pressure ();
1756cb66 2076 regstat_free_n_sets_and_refs ();
1833192f 2077 }
6fb5fa3c 2078 df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN);
5e962776 2079 /* Process the loops, innermost first. */
f0bd40b1 2080 FOR_EACH_LOOP (loop, LI_FROM_INNERMOST)
5e962776 2081 {
1833192f 2082 curr_loop = loop;
b1fb9f56
JJ
2083 /* move_single_loop_invariants for very large loops
2084 is time consuming and might need a lot of memory. */
2085 if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP)
2086 move_single_loop_invariants (loop);
5e962776
ZD
2087 }
2088
f0bd40b1 2089 FOR_EACH_LOOP (loop, 0)
42fd6772
ZD
2090 {
2091 free_loop_data (loop);
2092 }
5e962776 2093
1833192f
VM
2094 if (flag_ira_loop_pressure)
2095 /* There is no sense to keep this info because it was most
2096 probably outdated by subsequent passes. */
2097 free_reg_info ();
6fb5fa3c
DB
2098 free (invariant_table);
2099 invariant_table = NULL;
2100 invariant_table_size = 0;
a7f4ccb1
SB
2101
2102#ifdef ENABLE_CHECKING
2103 verify_flow_info ();
2104#endif
5e962776 2105}