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cb20f7e8 | 1 | /* RTL-level loop invariant motion. |
23a5b65a | 2 | Copyright (C) 2004-2014 Free Software Foundation, Inc. |
cb20f7e8 | 3 | |
5e962776 | 4 | This file is part of GCC. |
cb20f7e8 | 5 | |
5e962776 ZD |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the | |
9dcd6f09 | 8 | Free Software Foundation; either version 3, or (at your option) any |
5e962776 | 9 | later version. |
cb20f7e8 | 10 | |
5e962776 ZD |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
cb20f7e8 | 15 | |
5e962776 | 16 | You should have received a copy of the GNU General Public License |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
5e962776 ZD |
19 | |
20 | /* This implements the loop invariant motion pass. It is very simple | |
4a8cae83 SB |
21 | (no calls, no loads/stores, etc.). This should be sufficient to cleanup |
22 | things like address arithmetics -- other more complicated invariants should | |
23 | be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c. | |
cb20f7e8 | 24 | |
5e962776 ZD |
25 | We proceed loop by loop -- it is simpler than trying to handle things |
26 | globally and should not lose much. First we inspect all sets inside loop | |
27 | and create a dependency graph on insns (saying "to move this insn, you must | |
28 | also move the following insns"). | |
29 | ||
30 | We then need to determine what to move. We estimate the number of registers | |
31 | used and move as many invariants as possible while we still have enough free | |
32 | registers. We prefer the expensive invariants. | |
cb20f7e8 | 33 | |
5e962776 ZD |
34 | Then we move the selected invariants out of the loop, creating a new |
35 | temporaries for them if necessary. */ | |
36 | ||
37 | #include "config.h" | |
38 | #include "system.h" | |
39 | #include "coretypes.h" | |
40 | #include "tm.h" | |
1833192f | 41 | #include "hard-reg-set.h" |
5e962776 | 42 | #include "rtl.h" |
3912d291 | 43 | #include "tm_p.h" |
7932a3db | 44 | #include "obstack.h" |
60393bbc AM |
45 | #include "predict.h" |
46 | #include "vec.h" | |
83685514 AM |
47 | #include "hashtab.h" |
48 | #include "hash-set.h" | |
83685514 AM |
49 | #include "machmode.h" |
50 | #include "input.h" | |
5e962776 | 51 | #include "function.h" |
60393bbc AM |
52 | #include "dominance.h" |
53 | #include "cfg.h" | |
54 | #include "cfgrtl.h" | |
55 | #include "basic-block.h" | |
56 | #include "cfgloop.h" | |
57 | #include "expr.h" | |
58 | #include "recog.h" | |
59 | #include "target.h" | |
5e962776 ZD |
60 | #include "flags.h" |
61 | #include "df.h" | |
4a8fb1a1 | 62 | #include "hash-table.h" |
28749cfb | 63 | #include "except.h" |
b1fb9f56 | 64 | #include "params.h" |
1833192f VM |
65 | #include "regs.h" |
66 | #include "ira.h" | |
7ee2468b | 67 | #include "dumpfile.h" |
5e962776 ZD |
68 | |
69 | /* The data stored for the loop. */ | |
70 | ||
71 | struct loop_data | |
72 | { | |
73 | struct loop *outermost_exit; /* The outermost exit of the loop. */ | |
74 | bool has_call; /* True if the loop contains a call. */ | |
1833192f | 75 | /* Maximal register pressure inside loop for given register class |
1756cb66 | 76 | (defined only for the pressure classes). */ |
1833192f VM |
77 | int max_reg_pressure[N_REG_CLASSES]; |
78 | /* Loop regs referenced and live pseudo-registers. */ | |
79 | bitmap_head regs_ref; | |
80 | bitmap_head regs_live; | |
5e962776 ZD |
81 | }; |
82 | ||
83 | #define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux) | |
84 | ||
85 | /* The description of an use. */ | |
86 | ||
87 | struct use | |
88 | { | |
89 | rtx *pos; /* Position of the use. */ | |
89bfd6f5 | 90 | rtx_insn *insn; /* The insn in that the use occurs. */ |
1bfdbb29 | 91 | unsigned addr_use_p; /* Whether the use occurs in an address. */ |
5e962776 ZD |
92 | struct use *next; /* Next use in the list. */ |
93 | }; | |
94 | ||
95 | /* The description of a def. */ | |
96 | ||
97 | struct def | |
98 | { | |
99 | struct use *uses; /* The list of uses that are uniquely reached | |
100 | by it. */ | |
101 | unsigned n_uses; /* Number of such uses. */ | |
1bfdbb29 | 102 | unsigned n_addr_uses; /* Number of uses in addresses. */ |
5e962776 ZD |
103 | unsigned invno; /* The corresponding invariant. */ |
104 | }; | |
105 | ||
106 | /* The data stored for each invariant. */ | |
107 | ||
108 | struct invariant | |
109 | { | |
110 | /* The number of the invariant. */ | |
111 | unsigned invno; | |
112 | ||
1052bd54 ZD |
113 | /* The number of the invariant with the same value. */ |
114 | unsigned eqto; | |
115 | ||
e42e3d15 ZC |
116 | /* The number of invariants which eqto this. */ |
117 | unsigned eqno; | |
118 | ||
1052bd54 ZD |
119 | /* If we moved the invariant out of the loop, the register that contains its |
120 | value. */ | |
121 | rtx reg; | |
5e962776 | 122 | |
1833192f VM |
123 | /* If we moved the invariant out of the loop, the original regno |
124 | that contained its value. */ | |
125 | int orig_regno; | |
126 | ||
5e962776 ZD |
127 | /* The definition of the invariant. */ |
128 | struct def *def; | |
129 | ||
130 | /* The insn in that it is defined. */ | |
89bfd6f5 | 131 | rtx_insn *insn; |
5e962776 ZD |
132 | |
133 | /* Whether it is always executed. */ | |
134 | bool always_executed; | |
135 | ||
136 | /* Whether to move the invariant. */ | |
137 | bool move; | |
138 | ||
1bfdbb29 PB |
139 | /* Whether the invariant is cheap when used as an address. */ |
140 | bool cheap_address; | |
141 | ||
cb20f7e8 | 142 | /* Cost of the invariant. */ |
5e962776 ZD |
143 | unsigned cost; |
144 | ||
145 | /* The invariants it depends on. */ | |
146 | bitmap depends_on; | |
147 | ||
148 | /* Used for detecting already visited invariants during determining | |
149 | costs of movements. */ | |
150 | unsigned stamp; | |
151 | }; | |
152 | ||
1833192f VM |
153 | /* Currently processed loop. */ |
154 | static struct loop *curr_loop; | |
155 | ||
6fb5fa3c DB |
156 | /* Table of invariants indexed by the df_ref uid field. */ |
157 | ||
158 | static unsigned int invariant_table_size = 0; | |
159 | static struct invariant ** invariant_table; | |
160 | ||
1052bd54 ZD |
161 | /* Entry for hash table of invariant expressions. */ |
162 | ||
163 | struct invariant_expr_entry | |
164 | { | |
165 | /* The invariant. */ | |
166 | struct invariant *inv; | |
167 | ||
168 | /* Its value. */ | |
169 | rtx expr; | |
170 | ||
171 | /* Its mode. */ | |
172 | enum machine_mode mode; | |
173 | ||
174 | /* Its hash. */ | |
175 | hashval_t hash; | |
176 | }; | |
177 | ||
5e962776 ZD |
178 | /* The actual stamp for marking already visited invariants during determining |
179 | costs of movements. */ | |
180 | ||
181 | static unsigned actual_stamp; | |
182 | ||
edd954e6 KH |
183 | typedef struct invariant *invariant_p; |
184 | ||
edd954e6 | 185 | |
5e962776 ZD |
186 | /* The invariants. */ |
187 | ||
9771b263 | 188 | static vec<invariant_p> invariants; |
5e962776 | 189 | |
6fb5fa3c | 190 | /* Check the size of the invariant table and realloc if necessary. */ |
cb20f7e8 | 191 | |
b8698a0f | 192 | static void |
6fb5fa3c DB |
193 | check_invariant_table_size (void) |
194 | { | |
c3284718 | 195 | if (invariant_table_size < DF_DEFS_TABLE_SIZE ()) |
6fb5fa3c DB |
196 | { |
197 | unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4); | |
d3bfe4de | 198 | invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size); |
b8698a0f | 199 | memset (&invariant_table[invariant_table_size], 0, |
92cfe9d5 | 200 | (new_size - invariant_table_size) * sizeof (struct invariant *)); |
6fb5fa3c DB |
201 | invariant_table_size = new_size; |
202 | } | |
203 | } | |
cb20f7e8 | 204 | |
5e962776 ZD |
205 | /* Test for possibility of invariantness of X. */ |
206 | ||
207 | static bool | |
208 | check_maybe_invariant (rtx x) | |
209 | { | |
210 | enum rtx_code code = GET_CODE (x); | |
211 | int i, j; | |
212 | const char *fmt; | |
213 | ||
214 | switch (code) | |
215 | { | |
d8116890 | 216 | CASE_CONST_ANY: |
5e962776 ZD |
217 | case SYMBOL_REF: |
218 | case CONST: | |
219 | case LABEL_REF: | |
220 | return true; | |
221 | ||
222 | case PC: | |
223 | case CC0: | |
224 | case UNSPEC_VOLATILE: | |
225 | case CALL: | |
226 | return false; | |
227 | ||
228 | case REG: | |
229 | return true; | |
230 | ||
231 | case MEM: | |
232 | /* Load/store motion is done elsewhere. ??? Perhaps also add it here? | |
233 | It should not be hard, and might be faster than "elsewhere". */ | |
234 | ||
235 | /* Just handle the most trivial case where we load from an unchanging | |
236 | location (most importantly, pic tables). */ | |
66f91b93 | 237 | if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x)) |
5e962776 ZD |
238 | break; |
239 | ||
240 | return false; | |
241 | ||
242 | case ASM_OPERANDS: | |
243 | /* Don't mess with insns declared volatile. */ | |
244 | if (MEM_VOLATILE_P (x)) | |
245 | return false; | |
246 | break; | |
247 | ||
248 | default: | |
249 | break; | |
250 | } | |
251 | ||
252 | fmt = GET_RTX_FORMAT (code); | |
253 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
254 | { | |
255 | if (fmt[i] == 'e') | |
256 | { | |
257 | if (!check_maybe_invariant (XEXP (x, i))) | |
258 | return false; | |
259 | } | |
260 | else if (fmt[i] == 'E') | |
261 | { | |
262 | for (j = 0; j < XVECLEN (x, i); j++) | |
263 | if (!check_maybe_invariant (XVECEXP (x, i, j))) | |
264 | return false; | |
265 | } | |
266 | } | |
267 | ||
268 | return true; | |
269 | } | |
270 | ||
1052bd54 ZD |
271 | /* Returns the invariant definition for USE, or NULL if USE is not |
272 | invariant. */ | |
273 | ||
274 | static struct invariant * | |
57512f53 | 275 | invariant_for_use (df_ref use) |
1052bd54 ZD |
276 | { |
277 | struct df_link *defs; | |
57512f53 | 278 | df_ref def; |
50e94c7e | 279 | basic_block bb = DF_REF_BB (use), def_bb; |
1052bd54 | 280 | |
57512f53 | 281 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
b6c9b9bc ZD |
282 | return NULL; |
283 | ||
1052bd54 ZD |
284 | defs = DF_REF_CHAIN (use); |
285 | if (!defs || defs->next) | |
286 | return NULL; | |
287 | def = defs->ref; | |
6fb5fa3c | 288 | check_invariant_table_size (); |
c3284718 | 289 | if (!invariant_table[DF_REF_ID (def)]) |
1052bd54 ZD |
290 | return NULL; |
291 | ||
292 | def_bb = DF_REF_BB (def); | |
293 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
294 | return NULL; | |
c3284718 | 295 | return invariant_table[DF_REF_ID (def)]; |
1052bd54 ZD |
296 | } |
297 | ||
298 | /* Computes hash value for invariant expression X in INSN. */ | |
299 | ||
300 | static hashval_t | |
89bfd6f5 | 301 | hash_invariant_expr_1 (rtx_insn *insn, rtx x) |
1052bd54 ZD |
302 | { |
303 | enum rtx_code code = GET_CODE (x); | |
304 | int i, j; | |
305 | const char *fmt; | |
306 | hashval_t val = code; | |
307 | int do_not_record_p; | |
57512f53 | 308 | df_ref use; |
1052bd54 ZD |
309 | struct invariant *inv; |
310 | ||
311 | switch (code) | |
312 | { | |
d8116890 | 313 | CASE_CONST_ANY: |
1052bd54 ZD |
314 | case SYMBOL_REF: |
315 | case CONST: | |
316 | case LABEL_REF: | |
317 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
318 | ||
319 | case REG: | |
6fb5fa3c | 320 | use = df_find_use (insn, x); |
1052bd54 ZD |
321 | if (!use) |
322 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
323 | inv = invariant_for_use (use); | |
324 | if (!inv) | |
325 | return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false); | |
326 | ||
327 | gcc_assert (inv->eqto != ~0u); | |
328 | return inv->eqto; | |
329 | ||
330 | default: | |
331 | break; | |
332 | } | |
333 | ||
334 | fmt = GET_RTX_FORMAT (code); | |
335 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
336 | { | |
337 | if (fmt[i] == 'e') | |
338 | val ^= hash_invariant_expr_1 (insn, XEXP (x, i)); | |
339 | else if (fmt[i] == 'E') | |
340 | { | |
341 | for (j = 0; j < XVECLEN (x, i); j++) | |
342 | val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j)); | |
343 | } | |
8e1409e8 ZD |
344 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
345 | val ^= XINT (x, i); | |
1052bd54 ZD |
346 | } |
347 | ||
348 | return val; | |
349 | } | |
350 | ||
351 | /* Returns true if the invariant expressions E1 and E2 used in insns INSN1 | |
352 | and INSN2 have always the same value. */ | |
353 | ||
354 | static bool | |
89bfd6f5 | 355 | invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2) |
1052bd54 ZD |
356 | { |
357 | enum rtx_code code = GET_CODE (e1); | |
358 | int i, j; | |
359 | const char *fmt; | |
57512f53 | 360 | df_ref use1, use2; |
1052bd54 ZD |
361 | struct invariant *inv1 = NULL, *inv2 = NULL; |
362 | rtx sub1, sub2; | |
363 | ||
364 | /* If mode of only one of the operands is VOIDmode, it is not equivalent to | |
365 | the other one. If both are VOIDmode, we rely on the caller of this | |
366 | function to verify that their modes are the same. */ | |
367 | if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2)) | |
368 | return false; | |
369 | ||
370 | switch (code) | |
371 | { | |
d8116890 | 372 | CASE_CONST_ANY: |
1052bd54 ZD |
373 | case SYMBOL_REF: |
374 | case CONST: | |
375 | case LABEL_REF: | |
376 | return rtx_equal_p (e1, e2); | |
377 | ||
378 | case REG: | |
6fb5fa3c DB |
379 | use1 = df_find_use (insn1, e1); |
380 | use2 = df_find_use (insn2, e2); | |
1052bd54 ZD |
381 | if (use1) |
382 | inv1 = invariant_for_use (use1); | |
383 | if (use2) | |
384 | inv2 = invariant_for_use (use2); | |
385 | ||
386 | if (!inv1 && !inv2) | |
387 | return rtx_equal_p (e1, e2); | |
388 | ||
389 | if (!inv1 || !inv2) | |
390 | return false; | |
391 | ||
392 | gcc_assert (inv1->eqto != ~0u); | |
393 | gcc_assert (inv2->eqto != ~0u); | |
394 | return inv1->eqto == inv2->eqto; | |
395 | ||
396 | default: | |
397 | break; | |
398 | } | |
399 | ||
400 | fmt = GET_RTX_FORMAT (code); | |
401 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
402 | { | |
403 | if (fmt[i] == 'e') | |
404 | { | |
405 | sub1 = XEXP (e1, i); | |
406 | sub2 = XEXP (e2, i); | |
407 | ||
408 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
409 | return false; | |
410 | } | |
411 | ||
412 | else if (fmt[i] == 'E') | |
413 | { | |
414 | if (XVECLEN (e1, i) != XVECLEN (e2, i)) | |
415 | return false; | |
416 | ||
417 | for (j = 0; j < XVECLEN (e1, i); j++) | |
418 | { | |
419 | sub1 = XVECEXP (e1, i, j); | |
420 | sub2 = XVECEXP (e2, i, j); | |
421 | ||
422 | if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2)) | |
423 | return false; | |
424 | } | |
425 | } | |
8e1409e8 ZD |
426 | else if (fmt[i] == 'i' || fmt[i] == 'n') |
427 | { | |
428 | if (XINT (e1, i) != XINT (e2, i)) | |
429 | return false; | |
430 | } | |
431 | /* Unhandled type of subexpression, we fail conservatively. */ | |
432 | else | |
433 | return false; | |
1052bd54 ZD |
434 | } |
435 | ||
436 | return true; | |
437 | } | |
438 | ||
4a8fb1a1 | 439 | struct invariant_expr_hasher : typed_free_remove <invariant_expr_entry> |
1052bd54 | 440 | { |
4a8fb1a1 LC |
441 | typedef invariant_expr_entry value_type; |
442 | typedef invariant_expr_entry compare_type; | |
443 | static inline hashval_t hash (const value_type *); | |
444 | static inline bool equal (const value_type *, const compare_type *); | |
445 | }; | |
446 | ||
447 | /* Returns hash value for invariant expression entry ENTRY. */ | |
1052bd54 | 448 | |
4a8fb1a1 LC |
449 | inline hashval_t |
450 | invariant_expr_hasher::hash (const value_type *entry) | |
451 | { | |
1052bd54 ZD |
452 | return entry->hash; |
453 | } | |
454 | ||
4a8fb1a1 | 455 | /* Compares invariant expression entries ENTRY1 and ENTRY2. */ |
1052bd54 | 456 | |
4a8fb1a1 LC |
457 | inline bool |
458 | invariant_expr_hasher::equal (const value_type *entry1, | |
459 | const compare_type *entry2) | |
1052bd54 | 460 | { |
1052bd54 ZD |
461 | if (entry1->mode != entry2->mode) |
462 | return 0; | |
463 | ||
464 | return invariant_expr_equal_p (entry1->inv->insn, entry1->expr, | |
465 | entry2->inv->insn, entry2->expr); | |
466 | } | |
467 | ||
c203e8a7 | 468 | typedef hash_table<invariant_expr_hasher> invariant_htab_type; |
4a8fb1a1 | 469 | |
1052bd54 ZD |
470 | /* Checks whether invariant with value EXPR in machine mode MODE is |
471 | recorded in EQ. If this is the case, return the invariant. Otherwise | |
472 | insert INV to the table for this expression and return INV. */ | |
473 | ||
474 | static struct invariant * | |
c203e8a7 | 475 | find_or_insert_inv (invariant_htab_type *eq, rtx expr, enum machine_mode mode, |
1052bd54 ZD |
476 | struct invariant *inv) |
477 | { | |
478 | hashval_t hash = hash_invariant_expr_1 (inv->insn, expr); | |
479 | struct invariant_expr_entry *entry; | |
480 | struct invariant_expr_entry pentry; | |
4a8fb1a1 | 481 | invariant_expr_entry **slot; |
1052bd54 ZD |
482 | |
483 | pentry.expr = expr; | |
484 | pentry.inv = inv; | |
485 | pentry.mode = mode; | |
c203e8a7 | 486 | slot = eq->find_slot_with_hash (&pentry, hash, INSERT); |
4a8fb1a1 | 487 | entry = *slot; |
1052bd54 ZD |
488 | |
489 | if (entry) | |
490 | return entry->inv; | |
491 | ||
5ed6ace5 | 492 | entry = XNEW (struct invariant_expr_entry); |
1052bd54 ZD |
493 | entry->inv = inv; |
494 | entry->expr = expr; | |
495 | entry->mode = mode; | |
496 | entry->hash = hash; | |
497 | *slot = entry; | |
498 | ||
499 | return inv; | |
500 | } | |
501 | ||
502 | /* Finds invariants identical to INV and records the equivalence. EQ is the | |
503 | hash table of the invariants. */ | |
504 | ||
505 | static void | |
c203e8a7 | 506 | find_identical_invariants (invariant_htab_type *eq, struct invariant *inv) |
1052bd54 ZD |
507 | { |
508 | unsigned depno; | |
509 | bitmap_iterator bi; | |
510 | struct invariant *dep; | |
511 | rtx expr, set; | |
512 | enum machine_mode mode; | |
e42e3d15 | 513 | struct invariant *tmp; |
1052bd54 ZD |
514 | |
515 | if (inv->eqto != ~0u) | |
516 | return; | |
517 | ||
518 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) | |
519 | { | |
9771b263 | 520 | dep = invariants[depno]; |
1052bd54 ZD |
521 | find_identical_invariants (eq, dep); |
522 | } | |
523 | ||
524 | set = single_set (inv->insn); | |
525 | expr = SET_SRC (set); | |
526 | mode = GET_MODE (expr); | |
527 | if (mode == VOIDmode) | |
528 | mode = GET_MODE (SET_DEST (set)); | |
e42e3d15 ZC |
529 | |
530 | tmp = find_or_insert_inv (eq, expr, mode, inv); | |
531 | inv->eqto = tmp->invno; | |
532 | ||
533 | if (tmp->invno != inv->invno && inv->always_executed) | |
534 | tmp->eqno++; | |
1052bd54 ZD |
535 | |
536 | if (dump_file && inv->eqto != inv->invno) | |
537 | fprintf (dump_file, | |
e755fcf5 | 538 | "Invariant %d is equivalent to invariant %d.\n", |
1052bd54 ZD |
539 | inv->invno, inv->eqto); |
540 | } | |
541 | ||
542 | /* Find invariants with the same value and record the equivalences. */ | |
543 | ||
544 | static void | |
545 | merge_identical_invariants (void) | |
546 | { | |
547 | unsigned i; | |
548 | struct invariant *inv; | |
c203e8a7 | 549 | invariant_htab_type eq (invariants.length ()); |
1052bd54 | 550 | |
9771b263 | 551 | FOR_EACH_VEC_ELT (invariants, i, inv) |
c203e8a7 | 552 | find_identical_invariants (&eq, inv); |
1052bd54 ZD |
553 | } |
554 | ||
5e962776 ZD |
555 | /* Determines the basic blocks inside LOOP that are always executed and |
556 | stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of | |
557 | basic blocks that may either exit the loop, or contain the call that | |
558 | does not have to return. BODY is body of the loop obtained by | |
559 | get_loop_body_in_dom_order. */ | |
560 | ||
561 | static void | |
562 | compute_always_reached (struct loop *loop, basic_block *body, | |
563 | bitmap may_exit, bitmap always_reached) | |
564 | { | |
565 | unsigned i; | |
566 | ||
567 | for (i = 0; i < loop->num_nodes; i++) | |
568 | { | |
569 | if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i])) | |
570 | bitmap_set_bit (always_reached, i); | |
571 | ||
572 | if (bitmap_bit_p (may_exit, i)) | |
573 | return; | |
574 | } | |
575 | } | |
576 | ||
577 | /* Finds exits out of the LOOP with body BODY. Marks blocks in that we may | |
578 | exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT | |
579 | additionally mark blocks that may exit due to a call. */ | |
580 | ||
581 | static void | |
582 | find_exits (struct loop *loop, basic_block *body, | |
583 | bitmap may_exit, bitmap has_exit) | |
584 | { | |
585 | unsigned i; | |
628f6a4e | 586 | edge_iterator ei; |
5e962776 ZD |
587 | edge e; |
588 | struct loop *outermost_exit = loop, *aexit; | |
589 | bool has_call = false; | |
89bfd6f5 | 590 | rtx_insn *insn; |
5e962776 ZD |
591 | |
592 | for (i = 0; i < loop->num_nodes; i++) | |
593 | { | |
594 | if (body[i]->loop_father == loop) | |
595 | { | |
596 | FOR_BB_INSNS (body[i], insn) | |
597 | { | |
4b4bf941 | 598 | if (CALL_P (insn) |
becfd6e5 KZ |
599 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
600 | || !RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
601 | { |
602 | has_call = true; | |
603 | bitmap_set_bit (may_exit, i); | |
604 | break; | |
605 | } | |
606 | } | |
607 | ||
628f6a4e | 608 | FOR_EACH_EDGE (e, ei, body[i]->succs) |
5e962776 ZD |
609 | { |
610 | if (flow_bb_inside_loop_p (loop, e->dest)) | |
611 | continue; | |
612 | ||
613 | bitmap_set_bit (may_exit, i); | |
614 | bitmap_set_bit (has_exit, i); | |
615 | outermost_exit = find_common_loop (outermost_exit, | |
616 | e->dest->loop_father); | |
617 | } | |
618 | continue; | |
619 | } | |
cb20f7e8 | 620 | |
5e962776 ZD |
621 | /* Use the data stored for the subloop to decide whether we may exit |
622 | through it. It is sufficient to do this for header of the loop, | |
623 | as other basic blocks inside it must be dominated by it. */ | |
624 | if (body[i]->loop_father->header != body[i]) | |
625 | continue; | |
626 | ||
627 | if (LOOP_DATA (body[i]->loop_father)->has_call) | |
628 | { | |
629 | has_call = true; | |
630 | bitmap_set_bit (may_exit, i); | |
631 | } | |
632 | aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit; | |
633 | if (aexit != loop) | |
634 | { | |
635 | bitmap_set_bit (may_exit, i); | |
636 | bitmap_set_bit (has_exit, i); | |
637 | ||
638 | if (flow_loop_nested_p (aexit, outermost_exit)) | |
639 | outermost_exit = aexit; | |
640 | } | |
641 | } | |
642 | ||
1833192f VM |
643 | if (loop->aux == NULL) |
644 | { | |
645 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
646 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
647 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
648 | } | |
5e962776 ZD |
649 | LOOP_DATA (loop)->outermost_exit = outermost_exit; |
650 | LOOP_DATA (loop)->has_call = has_call; | |
651 | } | |
652 | ||
653 | /* Check whether we may assign a value to X from a register. */ | |
654 | ||
655 | static bool | |
656 | may_assign_reg_p (rtx x) | |
657 | { | |
bd361d85 | 658 | return (GET_MODE (x) != VOIDmode |
4b06592a | 659 | && GET_MODE (x) != BLKmode |
bd361d85 | 660 | && can_copy_p (GET_MODE (x)) |
a7f4ccb1 SB |
661 | && (!REG_P (x) |
662 | || !HARD_REGISTER_P (x) | |
663 | || REGNO_REG_CLASS (REGNO (x)) != NO_REGS)); | |
5e962776 ZD |
664 | } |
665 | ||
cb20f7e8 ZD |
666 | /* Finds definitions that may correspond to invariants in LOOP with body |
667 | BODY. */ | |
5e962776 ZD |
668 | |
669 | static void | |
7be64667 | 670 | find_defs (struct loop *loop) |
5e962776 | 671 | { |
7b19209f SB |
672 | if (dump_file) |
673 | { | |
674 | fprintf (dump_file, | |
675 | "*****starting processing of loop %d ******\n", | |
676 | loop->num); | |
677 | } | |
678 | ||
6fb5fa3c DB |
679 | df_remove_problem (df_chain); |
680 | df_process_deferred_rescans (); | |
681 | df_chain_add_problem (DF_UD_CHAIN); | |
7b19209f | 682 | df_set_flags (DF_RD_PRUNE_DEAD_DEFS); |
7be64667 | 683 | df_analyze_loop (loop); |
7b19209f | 684 | check_invariant_table_size (); |
6fb5fa3c DB |
685 | |
686 | if (dump_file) | |
687 | { | |
ffd640ed | 688 | df_dump_region (dump_file); |
7b19209f SB |
689 | fprintf (dump_file, |
690 | "*****ending processing of loop %d ******\n", | |
691 | loop->num); | |
6fb5fa3c | 692 | } |
5e962776 ZD |
693 | } |
694 | ||
695 | /* Creates a new invariant for definition DEF in INSN, depending on invariants | |
696 | in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed, | |
1052bd54 ZD |
697 | unless the program ends due to a function call. The newly created invariant |
698 | is returned. */ | |
5e962776 | 699 | |
1052bd54 | 700 | static struct invariant * |
89bfd6f5 | 701 | create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on, |
5e962776 ZD |
702 | bool always_executed) |
703 | { | |
5ed6ace5 | 704 | struct invariant *inv = XNEW (struct invariant); |
5e962776 | 705 | rtx set = single_set (insn); |
f40751dd | 706 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); |
5e962776 ZD |
707 | |
708 | inv->def = def; | |
709 | inv->always_executed = always_executed; | |
710 | inv->depends_on = depends_on; | |
711 | ||
712 | /* If the set is simple, usually by moving it we move the whole store out of | |
713 | the loop. Otherwise we save only cost of the computation. */ | |
714 | if (def) | |
1bfdbb29 | 715 | { |
d51102f3 | 716 | inv->cost = set_rtx_cost (set, speed); |
1578e910 MM |
717 | /* ??? Try to determine cheapness of address computation. Unfortunately |
718 | the address cost is only a relative measure, we can't really compare | |
719 | it with any absolute number, but only with other address costs. | |
720 | But here we don't have any other addresses, so compare with a magic | |
721 | number anyway. It has to be large enough to not regress PR33928 | |
722 | (by avoiding to move reg+8,reg+16,reg+24 invariants), but small | |
723 | enough to not regress 410.bwaves either (by still moving reg+reg | |
724 | invariants). | |
725 | See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */ | |
1bfdbb29 | 726 | inv->cheap_address = address_cost (SET_SRC (set), word_mode, |
09e881c9 | 727 | ADDR_SPACE_GENERIC, speed) < 3; |
1bfdbb29 | 728 | } |
5e962776 | 729 | else |
1bfdbb29 | 730 | { |
5e8f01f4 | 731 | inv->cost = set_src_cost (SET_SRC (set), speed); |
1bfdbb29 PB |
732 | inv->cheap_address = false; |
733 | } | |
5e962776 ZD |
734 | |
735 | inv->move = false; | |
1052bd54 | 736 | inv->reg = NULL_RTX; |
1833192f | 737 | inv->orig_regno = -1; |
5e962776 ZD |
738 | inv->stamp = 0; |
739 | inv->insn = insn; | |
740 | ||
9771b263 | 741 | inv->invno = invariants.length (); |
1052bd54 | 742 | inv->eqto = ~0u; |
e42e3d15 ZC |
743 | |
744 | /* Itself. */ | |
745 | inv->eqno = 1; | |
746 | ||
5e962776 ZD |
747 | if (def) |
748 | def->invno = inv->invno; | |
9771b263 | 749 | invariants.safe_push (inv); |
5e962776 ZD |
750 | |
751 | if (dump_file) | |
752 | { | |
753 | fprintf (dump_file, | |
754 | "Set in insn %d is invariant (%d), cost %d, depends on ", | |
755 | INSN_UID (insn), inv->invno, inv->cost); | |
756 | dump_bitmap (dump_file, inv->depends_on); | |
757 | } | |
1052bd54 ZD |
758 | |
759 | return inv; | |
5e962776 ZD |
760 | } |
761 | ||
762 | /* Record USE at DEF. */ | |
763 | ||
764 | static void | |
1bfdbb29 | 765 | record_use (struct def *def, df_ref use) |
5e962776 | 766 | { |
5ed6ace5 | 767 | struct use *u = XNEW (struct use); |
5e962776 | 768 | |
1bfdbb29 PB |
769 | u->pos = DF_REF_REAL_LOC (use); |
770 | u->insn = DF_REF_INSN (use); | |
771 | u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD | |
3e807ffc | 772 | || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE); |
5e962776 ZD |
773 | u->next = def->uses; |
774 | def->uses = u; | |
775 | def->n_uses++; | |
1bfdbb29 PB |
776 | if (u->addr_use_p) |
777 | def->n_addr_uses++; | |
5e962776 ZD |
778 | } |
779 | ||
6fb5fa3c DB |
780 | /* Finds the invariants USE depends on and store them to the DEPENDS_ON |
781 | bitmap. Returns true if all dependencies of USE are known to be | |
b6c9b9bc | 782 | loop invariants, false otherwise. */ |
5e962776 ZD |
783 | |
784 | static bool | |
57512f53 | 785 | check_dependency (basic_block bb, df_ref use, bitmap depends_on) |
5e962776 | 786 | { |
57512f53 | 787 | df_ref def; |
6fb5fa3c | 788 | basic_block def_bb; |
4d779342 | 789 | struct df_link *defs; |
5e962776 | 790 | struct def *def_data; |
1052bd54 | 791 | struct invariant *inv; |
b8698a0f | 792 | |
57512f53 | 793 | if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE) |
6fb5fa3c | 794 | return false; |
b8698a0f | 795 | |
6fb5fa3c DB |
796 | defs = DF_REF_CHAIN (use); |
797 | if (!defs) | |
1a17bd35 EB |
798 | { |
799 | unsigned int regno = DF_REF_REGNO (use); | |
800 | ||
801 | /* If this is the use of an uninitialized argument register that is | |
802 | likely to be spilled, do not move it lest this might extend its | |
803 | lifetime and cause reload to die. This can occur for a call to | |
804 | a function taking complex number arguments and moving the insns | |
805 | preparing the arguments without moving the call itself wouldn't | |
806 | gain much in practice. */ | |
807 | if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE) | |
808 | && FUNCTION_ARG_REGNO_P (regno) | |
809 | && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno))) | |
810 | return false; | |
811 | ||
812 | return true; | |
813 | } | |
b8698a0f | 814 | |
6fb5fa3c DB |
815 | if (defs->next) |
816 | return false; | |
b8698a0f | 817 | |
6fb5fa3c DB |
818 | def = defs->ref; |
819 | check_invariant_table_size (); | |
c3284718 | 820 | inv = invariant_table[DF_REF_ID (def)]; |
6fb5fa3c DB |
821 | if (!inv) |
822 | return false; | |
b8698a0f | 823 | |
6fb5fa3c DB |
824 | def_data = inv->def; |
825 | gcc_assert (def_data != NULL); | |
b8698a0f | 826 | |
6fb5fa3c DB |
827 | def_bb = DF_REF_BB (def); |
828 | /* Note that in case bb == def_bb, we know that the definition | |
829 | dominates insn, because def has invariant_table[DF_REF_ID(def)] | |
830 | defined and we process the insns in the basic block bb | |
831 | sequentially. */ | |
832 | if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb)) | |
833 | return false; | |
b8698a0f | 834 | |
6fb5fa3c DB |
835 | bitmap_set_bit (depends_on, def_data->invno); |
836 | return true; | |
837 | } | |
1052bd54 | 838 | |
1052bd54 | 839 | |
6fb5fa3c DB |
840 | /* Finds the invariants INSN depends on and store them to the DEPENDS_ON |
841 | bitmap. Returns true if all dependencies of INSN are known to be | |
842 | loop invariants, false otherwise. */ | |
5e962776 | 843 | |
6fb5fa3c | 844 | static bool |
89bfd6f5 | 845 | check_dependencies (rtx_insn *insn, bitmap depends_on) |
6fb5fa3c | 846 | { |
50e94c7e | 847 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 848 | df_ref use; |
6fb5fa3c | 849 | basic_block bb = BLOCK_FOR_INSN (insn); |
5e962776 | 850 | |
bfac633a RS |
851 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
852 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 853 | return false; |
bfac633a RS |
854 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
855 | if (!check_dependency (bb, use, depends_on)) | |
6fb5fa3c | 856 | return false; |
b8698a0f | 857 | |
5e962776 ZD |
858 | return true; |
859 | } | |
860 | ||
2c97f472 ZC |
861 | /* Pre-check candidate DEST to skip the one which can not make a valid insn |
862 | during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */ | |
863 | static bool | |
864 | pre_check_invariant_p (bool simple, rtx dest) | |
865 | { | |
866 | if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1) | |
867 | { | |
868 | df_ref use; | |
869 | rtx ref; | |
870 | unsigned int i = REGNO (dest); | |
871 | struct df_insn_info *insn_info; | |
872 | df_ref def_rec; | |
873 | ||
874 | for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use)) | |
875 | { | |
876 | ref = DF_REF_INSN (use); | |
877 | insn_info = DF_INSN_INFO_GET (ref); | |
878 | ||
879 | FOR_EACH_INSN_INFO_DEF (def_rec, insn_info) | |
880 | if (DF_REF_REGNO (def_rec) == i) | |
881 | { | |
882 | /* Multi definitions at this stage, most likely are due to | |
883 | instruction constraints, which requires both read and write | |
884 | on the same register. Since move_invariant_reg is not | |
885 | powerful enough to handle such cases, just ignore the INV | |
886 | and leave the chance to others. */ | |
887 | return false; | |
888 | } | |
889 | } | |
890 | } | |
891 | return true; | |
892 | } | |
893 | ||
5e962776 ZD |
894 | /* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always |
895 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 896 | unless the program ends due to a function call. */ |
5e962776 ZD |
897 | |
898 | static void | |
89bfd6f5 | 899 | find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 900 | { |
57512f53 | 901 | df_ref ref; |
5e962776 ZD |
902 | struct def *def; |
903 | bitmap depends_on; | |
904 | rtx set, dest; | |
905 | bool simple = true; | |
1052bd54 | 906 | struct invariant *inv; |
5e962776 | 907 | |
00f70f98 ZD |
908 | #ifdef HAVE_cc0 |
909 | /* We can't move a CC0 setter without the user. */ | |
910 | if (sets_cc0_p (insn)) | |
911 | return; | |
912 | #endif | |
913 | ||
5e962776 ZD |
914 | set = single_set (insn); |
915 | if (!set) | |
916 | return; | |
917 | dest = SET_DEST (set); | |
918 | ||
2ca202e7 | 919 | if (!REG_P (dest) |
5e962776 ZD |
920 | || HARD_REGISTER_P (dest)) |
921 | simple = false; | |
922 | ||
2c97f472 ZC |
923 | if (!may_assign_reg_p (dest) |
924 | || !pre_check_invariant_p (simple, dest) | |
a7f4ccb1 | 925 | || !check_maybe_invariant (SET_SRC (set))) |
5e962776 ZD |
926 | return; |
927 | ||
28749cfb ZD |
928 | /* If the insn can throw exception, we cannot move it at all without changing |
929 | cfg. */ | |
930 | if (can_throw_internal (insn)) | |
931 | return; | |
5e962776 | 932 | |
28749cfb | 933 | /* We cannot make trapping insn executed, unless it was executed before. */ |
48e8382e | 934 | if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached) |
28749cfb | 935 | return; |
5e962776 | 936 | |
8bdbfff5 | 937 | depends_on = BITMAP_ALLOC (NULL); |
cb20f7e8 | 938 | if (!check_dependencies (insn, depends_on)) |
5e962776 | 939 | { |
8bdbfff5 | 940 | BITMAP_FREE (depends_on); |
5e962776 ZD |
941 | return; |
942 | } | |
943 | ||
944 | if (simple) | |
5ed6ace5 | 945 | def = XCNEW (struct def); |
5e962776 ZD |
946 | else |
947 | def = NULL; | |
948 | ||
1052bd54 ZD |
949 | inv = create_new_invariant (def, insn, depends_on, always_executed); |
950 | ||
951 | if (simple) | |
952 | { | |
6fb5fa3c DB |
953 | ref = df_find_def (insn, dest); |
954 | check_invariant_table_size (); | |
c3284718 | 955 | invariant_table[DF_REF_ID (ref)] = inv; |
1052bd54 | 956 | } |
5e962776 ZD |
957 | } |
958 | ||
cb20f7e8 | 959 | /* Record registers used in INSN that have a unique invariant definition. */ |
5e962776 ZD |
960 | |
961 | static void | |
89bfd6f5 | 962 | record_uses (rtx_insn *insn) |
5e962776 | 963 | { |
50e94c7e | 964 | struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn); |
bfac633a | 965 | df_ref use; |
1052bd54 ZD |
966 | struct invariant *inv; |
967 | ||
bfac633a | 968 | FOR_EACH_INSN_INFO_USE (use, insn_info) |
6fb5fa3c | 969 | { |
6fb5fa3c DB |
970 | inv = invariant_for_use (use); |
971 | if (inv) | |
1bfdbb29 | 972 | record_use (inv->def, use); |
6fb5fa3c | 973 | } |
bfac633a | 974 | FOR_EACH_INSN_INFO_EQ_USE (use, insn_info) |
5e962776 | 975 | { |
1052bd54 ZD |
976 | inv = invariant_for_use (use); |
977 | if (inv) | |
1bfdbb29 | 978 | record_use (inv->def, use); |
5e962776 ZD |
979 | } |
980 | } | |
981 | ||
982 | /* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always | |
983 | executed. ALWAYS_EXECUTED is true if the insn is always executed, | |
cb20f7e8 | 984 | unless the program ends due to a function call. */ |
5e962776 ZD |
985 | |
986 | static void | |
89bfd6f5 | 987 | find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed) |
5e962776 | 988 | { |
cb20f7e8 ZD |
989 | find_invariant_insn (insn, always_reached, always_executed); |
990 | record_uses (insn); | |
5e962776 ZD |
991 | } |
992 | ||
993 | /* Finds invariants in basic block BB. ALWAYS_REACHED is true if the | |
994 | basic block is always executed. ALWAYS_EXECUTED is true if the basic | |
995 | block is always executed, unless the program ends due to a function | |
cb20f7e8 | 996 | call. */ |
5e962776 ZD |
997 | |
998 | static void | |
cb20f7e8 | 999 | find_invariants_bb (basic_block bb, bool always_reached, bool always_executed) |
5e962776 | 1000 | { |
89bfd6f5 | 1001 | rtx_insn *insn; |
5e962776 ZD |
1002 | |
1003 | FOR_BB_INSNS (bb, insn) | |
1004 | { | |
b5b8b0ac | 1005 | if (!NONDEBUG_INSN_P (insn)) |
5e962776 ZD |
1006 | continue; |
1007 | ||
cb20f7e8 | 1008 | find_invariants_insn (insn, always_reached, always_executed); |
5e962776 ZD |
1009 | |
1010 | if (always_reached | |
4b4bf941 | 1011 | && CALL_P (insn) |
becfd6e5 KZ |
1012 | && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn) |
1013 | || ! RTL_CONST_OR_PURE_CALL_P (insn))) | |
5e962776 ZD |
1014 | always_reached = false; |
1015 | } | |
1016 | } | |
1017 | ||
1018 | /* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of | |
1019 | basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the | |
1020 | bitmap of basic blocks in BODY that are always executed unless the program | |
cb20f7e8 | 1021 | ends due to a function call. */ |
5e962776 ZD |
1022 | |
1023 | static void | |
1024 | find_invariants_body (struct loop *loop, basic_block *body, | |
cb20f7e8 | 1025 | bitmap always_reached, bitmap always_executed) |
5e962776 ZD |
1026 | { |
1027 | unsigned i; | |
1028 | ||
1029 | for (i = 0; i < loop->num_nodes; i++) | |
1030 | find_invariants_bb (body[i], | |
1031 | bitmap_bit_p (always_reached, i), | |
cb20f7e8 | 1032 | bitmap_bit_p (always_executed, i)); |
5e962776 ZD |
1033 | } |
1034 | ||
cb20f7e8 | 1035 | /* Finds invariants in LOOP. */ |
5e962776 ZD |
1036 | |
1037 | static void | |
cb20f7e8 | 1038 | find_invariants (struct loop *loop) |
5e962776 | 1039 | { |
8bdbfff5 NS |
1040 | bitmap may_exit = BITMAP_ALLOC (NULL); |
1041 | bitmap always_reached = BITMAP_ALLOC (NULL); | |
1042 | bitmap has_exit = BITMAP_ALLOC (NULL); | |
1043 | bitmap always_executed = BITMAP_ALLOC (NULL); | |
5e962776 ZD |
1044 | basic_block *body = get_loop_body_in_dom_order (loop); |
1045 | ||
1046 | find_exits (loop, body, may_exit, has_exit); | |
1047 | compute_always_reached (loop, body, may_exit, always_reached); | |
1048 | compute_always_reached (loop, body, has_exit, always_executed); | |
1049 | ||
7be64667 | 1050 | find_defs (loop); |
cb20f7e8 | 1051 | find_invariants_body (loop, body, always_reached, always_executed); |
1052bd54 | 1052 | merge_identical_invariants (); |
5e962776 | 1053 | |
8bdbfff5 NS |
1054 | BITMAP_FREE (always_reached); |
1055 | BITMAP_FREE (always_executed); | |
1056 | BITMAP_FREE (may_exit); | |
1057 | BITMAP_FREE (has_exit); | |
5e962776 ZD |
1058 | free (body); |
1059 | } | |
1060 | ||
1061 | /* Frees a list of uses USE. */ | |
1062 | ||
1063 | static void | |
1064 | free_use_list (struct use *use) | |
1065 | { | |
1066 | struct use *next; | |
1067 | ||
1068 | for (; use; use = next) | |
1069 | { | |
1070 | next = use->next; | |
1071 | free (use); | |
1072 | } | |
1073 | } | |
1074 | ||
1756cb66 | 1075 | /* Return pressure class and number of hard registers (through *NREGS) |
1833192f VM |
1076 | for destination of INSN. */ |
1077 | static enum reg_class | |
89bfd6f5 | 1078 | get_pressure_class_and_nregs (rtx_insn *insn, int *nregs) |
1833192f VM |
1079 | { |
1080 | rtx reg; | |
1756cb66 | 1081 | enum reg_class pressure_class; |
1833192f | 1082 | rtx set = single_set (insn); |
b8698a0f | 1083 | |
1833192f VM |
1084 | /* Considered invariant insns have only one set. */ |
1085 | gcc_assert (set != NULL_RTX); | |
1086 | reg = SET_DEST (set); | |
1087 | if (GET_CODE (reg) == SUBREG) | |
1088 | reg = SUBREG_REG (reg); | |
1089 | if (MEM_P (reg)) | |
1090 | { | |
1091 | *nregs = 0; | |
1756cb66 | 1092 | pressure_class = NO_REGS; |
1833192f VM |
1093 | } |
1094 | else | |
1095 | { | |
1096 | if (! REG_P (reg)) | |
1097 | reg = NULL_RTX; | |
1098 | if (reg == NULL_RTX) | |
1756cb66 | 1099 | pressure_class = GENERAL_REGS; |
1833192f | 1100 | else |
1756cb66 VM |
1101 | { |
1102 | pressure_class = reg_allocno_class (REGNO (reg)); | |
1103 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1104 | } | |
1105 | *nregs | |
1106 | = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))]; | |
1833192f | 1107 | } |
1756cb66 | 1108 | return pressure_class; |
1833192f VM |
1109 | } |
1110 | ||
5e962776 | 1111 | /* Calculates cost and number of registers needed for moving invariant INV |
51a69168 ZC |
1112 | out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be |
1113 | the REG_CLASS of INV. Return | |
1114 | -1: if INV is invalid. | |
1115 | 0: if INV and its depends_on have same reg_class | |
1116 | 1: if INV and its depends_on have different reg_classes. */ | |
5e962776 | 1117 | |
51a69168 ZC |
1118 | static int |
1119 | get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed, | |
1120 | enum reg_class *cl) | |
5e962776 | 1121 | { |
1833192f VM |
1122 | int i, acomp_cost; |
1123 | unsigned aregs_needed[N_REG_CLASSES]; | |
5e962776 ZD |
1124 | unsigned depno; |
1125 | struct invariant *dep; | |
87c476a2 | 1126 | bitmap_iterator bi; |
51a69168 | 1127 | int ret = 1; |
5e962776 | 1128 | |
1052bd54 | 1129 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1130 | inv = invariants[inv->eqto]; |
1052bd54 | 1131 | |
5e962776 | 1132 | *comp_cost = 0; |
1833192f VM |
1133 | if (! flag_ira_loop_pressure) |
1134 | regs_needed[0] = 0; | |
1135 | else | |
1136 | { | |
1756cb66 VM |
1137 | for (i = 0; i < ira_pressure_classes_num; i++) |
1138 | regs_needed[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1139 | } |
1140 | ||
5e962776 ZD |
1141 | if (inv->move |
1142 | || inv->stamp == actual_stamp) | |
51a69168 | 1143 | return -1; |
5e962776 ZD |
1144 | inv->stamp = actual_stamp; |
1145 | ||
1833192f VM |
1146 | if (! flag_ira_loop_pressure) |
1147 | regs_needed[0]++; | |
1148 | else | |
1149 | { | |
1150 | int nregs; | |
1756cb66 | 1151 | enum reg_class pressure_class; |
1833192f | 1152 | |
1756cb66 VM |
1153 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1154 | regs_needed[pressure_class] += nregs; | |
51a69168 ZC |
1155 | *cl = pressure_class; |
1156 | ret = 0; | |
1833192f VM |
1157 | } |
1158 | ||
1bfdbb29 PB |
1159 | if (!inv->cheap_address |
1160 | || inv->def->n_addr_uses < inv->def->n_uses) | |
e42e3d15 | 1161 | (*comp_cost) += inv->cost * inv->eqno; |
5e962776 | 1162 | |
3d8504ac RS |
1163 | #ifdef STACK_REGS |
1164 | { | |
1165 | /* Hoisting constant pool constants into stack regs may cost more than | |
1166 | just single register. On x87, the balance is affected both by the | |
c0220ea4 | 1167 | small number of FP registers, and by its register stack organization, |
3d8504ac RS |
1168 | that forces us to add compensation code in and around the loop to |
1169 | shuffle the operands to the top of stack before use, and pop them | |
1170 | from the stack after the loop finishes. | |
1171 | ||
1172 | To model this effect, we increase the number of registers needed for | |
1173 | stack registers by two: one register push, and one register pop. | |
1174 | This usually has the effect that FP constant loads from the constant | |
1175 | pool are not moved out of the loop. | |
1176 | ||
1177 | Note that this also means that dependent invariants can not be moved. | |
1178 | However, the primary purpose of this pass is to move loop invariant | |
1179 | address arithmetic out of loops, and address arithmetic that depends | |
1180 | on floating point constants is unlikely to ever occur. */ | |
1181 | rtx set = single_set (inv->insn); | |
1182 | if (set | |
1833192f VM |
1183 | && IS_STACK_MODE (GET_MODE (SET_SRC (set))) |
1184 | && constant_pool_constant_p (SET_SRC (set))) | |
1185 | { | |
1186 | if (flag_ira_loop_pressure) | |
1756cb66 | 1187 | regs_needed[ira_stack_reg_pressure_class] += 2; |
1833192f VM |
1188 | else |
1189 | regs_needed[0] += 2; | |
1190 | } | |
3d8504ac RS |
1191 | } |
1192 | #endif | |
1193 | ||
87c476a2 | 1194 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi) |
5e962776 | 1195 | { |
1833192f | 1196 | bool check_p; |
51a69168 ZC |
1197 | enum reg_class dep_cl = ALL_REGS; |
1198 | int dep_ret; | |
1833192f | 1199 | |
9771b263 | 1200 | dep = invariants[depno]; |
5e962776 | 1201 | |
61fc05c7 ZC |
1202 | /* If DEP is moved out of the loop, it is not a depends_on any more. */ |
1203 | if (dep->move) | |
1204 | continue; | |
1205 | ||
51a69168 | 1206 | dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl); |
5e962776 | 1207 | |
1833192f VM |
1208 | if (! flag_ira_loop_pressure) |
1209 | check_p = aregs_needed[0] != 0; | |
1210 | else | |
1211 | { | |
1756cb66 VM |
1212 | for (i = 0; i < ira_pressure_classes_num; i++) |
1213 | if (aregs_needed[ira_pressure_classes[i]] != 0) | |
1833192f | 1214 | break; |
1756cb66 | 1215 | check_p = i < ira_pressure_classes_num; |
51a69168 ZC |
1216 | |
1217 | if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl))) | |
1218 | { | |
1219 | *cl = ALL_REGS; | |
1220 | ret = 1; | |
1221 | } | |
1833192f VM |
1222 | } |
1223 | if (check_p | |
5e962776 ZD |
1224 | /* We need to check always_executed, since if the original value of |
1225 | the invariant may be preserved, we may need to keep it in a | |
1226 | separate register. TODO check whether the register has an | |
1227 | use outside of the loop. */ | |
1228 | && dep->always_executed | |
1229 | && !dep->def->uses->next) | |
1230 | { | |
1231 | /* If this is a single use, after moving the dependency we will not | |
1232 | need a new register. */ | |
1833192f VM |
1233 | if (! flag_ira_loop_pressure) |
1234 | aregs_needed[0]--; | |
1235 | else | |
1236 | { | |
1237 | int nregs; | |
1756cb66 | 1238 | enum reg_class pressure_class; |
1833192f | 1239 | |
1756cb66 VM |
1240 | pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs); |
1241 | aregs_needed[pressure_class] -= nregs; | |
1833192f | 1242 | } |
5e962776 ZD |
1243 | } |
1244 | ||
1833192f VM |
1245 | if (! flag_ira_loop_pressure) |
1246 | regs_needed[0] += aregs_needed[0]; | |
1247 | else | |
1248 | { | |
1756cb66 VM |
1249 | for (i = 0; i < ira_pressure_classes_num; i++) |
1250 | regs_needed[ira_pressure_classes[i]] | |
1251 | += aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1252 | } |
5e962776 | 1253 | (*comp_cost) += acomp_cost; |
87c476a2 | 1254 | } |
51a69168 | 1255 | return ret; |
5e962776 ZD |
1256 | } |
1257 | ||
1258 | /* Calculates gain for eliminating invariant INV. REGS_USED is the number | |
a154b43a ZD |
1259 | of registers used in the loop, NEW_REGS is the number of new variables |
1260 | already added due to the invariant motion. The number of registers needed | |
bec922f0 SL |
1261 | for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed |
1262 | through to estimate_reg_pressure_cost. */ | |
5e962776 ZD |
1263 | |
1264 | static int | |
1265 | gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | |
bec922f0 SL |
1266 | unsigned *new_regs, unsigned regs_used, |
1267 | bool speed, bool call_p) | |
5e962776 ZD |
1268 | { |
1269 | int comp_cost, size_cost; | |
51a69168 ZC |
1270 | enum reg_class cl; |
1271 | int ret; | |
5e962776 | 1272 | |
5e962776 ZD |
1273 | actual_stamp++; |
1274 | ||
51a69168 | 1275 | ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl); |
1833192f VM |
1276 | |
1277 | if (! flag_ira_loop_pressure) | |
1278 | { | |
1279 | size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], | |
bec922f0 | 1280 | regs_used, speed, call_p) |
1833192f | 1281 | - estimate_reg_pressure_cost (new_regs[0], |
bec922f0 | 1282 | regs_used, speed, call_p)); |
1833192f | 1283 | } |
51a69168 ZC |
1284 | else if (ret < 0) |
1285 | return -1; | |
1286 | else if ((ret == 0) && (cl == NO_REGS)) | |
1287 | /* Hoist it anyway since it does not impact register pressure. */ | |
1288 | return 1; | |
1833192f VM |
1289 | else |
1290 | { | |
1291 | int i; | |
1756cb66 | 1292 | enum reg_class pressure_class; |
1833192f | 1293 | |
1756cb66 | 1294 | for (i = 0; i < ira_pressure_classes_num; i++) |
1833192f | 1295 | { |
1756cb66 | 1296 | pressure_class = ira_pressure_classes[i]; |
51a69168 ZC |
1297 | |
1298 | if (!reg_classes_intersect_p (pressure_class, cl)) | |
1299 | continue; | |
1300 | ||
1756cb66 VM |
1301 | if ((int) new_regs[pressure_class] |
1302 | + (int) regs_needed[pressure_class] | |
1303 | + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1833192f | 1304 | + IRA_LOOP_RESERVED_REGS |
f508f827 | 1305 | > ira_class_hard_regs_num[pressure_class]) |
1833192f VM |
1306 | break; |
1307 | } | |
1756cb66 | 1308 | if (i < ira_pressure_classes_num) |
1833192f VM |
1309 | /* There will be register pressure excess and we want not to |
1310 | make this loop invariant motion. All loop invariants with | |
1311 | non-positive gains will be rejected in function | |
1312 | find_invariants_to_move. Therefore we return the negative | |
1313 | number here. | |
1314 | ||
1315 | One could think that this rejects also expensive loop | |
1316 | invariant motions and this will hurt code performance. | |
1317 | However numerous experiments with different heuristics | |
1318 | taking invariant cost into account did not confirm this | |
1319 | assumption. There are possible explanations for this | |
1320 | result: | |
1321 | o probably all expensive invariants were already moved out | |
1322 | of the loop by PRE and gimple invariant motion pass. | |
1323 | o expensive invariant execution will be hidden by insn | |
1324 | scheduling or OOO processor hardware because usually such | |
1325 | invariants have a lot of freedom to be executed | |
1326 | out-of-order. | |
1327 | Another reason for ignoring invariant cost vs spilling cost | |
1328 | heuristics is also in difficulties to evaluate accurately | |
1329 | spill cost at this stage. */ | |
1330 | return -1; | |
1331 | else | |
1332 | size_cost = 0; | |
1333 | } | |
5e962776 ZD |
1334 | |
1335 | return comp_cost - size_cost; | |
1336 | } | |
1337 | ||
1338 | /* Finds invariant with best gain for moving. Returns the gain, stores | |
1339 | the invariant in *BEST and number of registers needed for it to | |
a154b43a ZD |
1340 | *REGS_NEEDED. REGS_USED is the number of registers used in the loop. |
1341 | NEW_REGS is the number of new variables already added due to invariant | |
1342 | motion. */ | |
5e962776 ZD |
1343 | |
1344 | static int | |
1345 | best_gain_for_invariant (struct invariant **best, unsigned *regs_needed, | |
bec922f0 SL |
1346 | unsigned *new_regs, unsigned regs_used, |
1347 | bool speed, bool call_p) | |
5e962776 ZD |
1348 | { |
1349 | struct invariant *inv; | |
1833192f VM |
1350 | int i, gain = 0, again; |
1351 | unsigned aregs_needed[N_REG_CLASSES], invno; | |
5e962776 | 1352 | |
9771b263 | 1353 | FOR_EACH_VEC_ELT (invariants, invno, inv) |
5e962776 | 1354 | { |
5e962776 ZD |
1355 | if (inv->move) |
1356 | continue; | |
1357 | ||
1052bd54 ZD |
1358 | /* Only consider the "representatives" of equivalent invariants. */ |
1359 | if (inv->eqto != inv->invno) | |
1360 | continue; | |
1361 | ||
1833192f | 1362 | again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used, |
bec922f0 | 1363 | speed, call_p); |
5e962776 ZD |
1364 | if (again > gain) |
1365 | { | |
1366 | gain = again; | |
1367 | *best = inv; | |
1833192f VM |
1368 | if (! flag_ira_loop_pressure) |
1369 | regs_needed[0] = aregs_needed[0]; | |
1370 | else | |
1371 | { | |
1756cb66 VM |
1372 | for (i = 0; i < ira_pressure_classes_num; i++) |
1373 | regs_needed[ira_pressure_classes[i]] | |
1374 | = aregs_needed[ira_pressure_classes[i]]; | |
1833192f | 1375 | } |
5e962776 ZD |
1376 | } |
1377 | } | |
1378 | ||
1379 | return gain; | |
1380 | } | |
1381 | ||
1382 | /* Marks invariant INVNO and all its dependencies for moving. */ | |
1383 | ||
1384 | static void | |
1833192f | 1385 | set_move_mark (unsigned invno, int gain) |
5e962776 | 1386 | { |
9771b263 | 1387 | struct invariant *inv = invariants[invno]; |
87c476a2 | 1388 | bitmap_iterator bi; |
5e962776 | 1389 | |
1052bd54 | 1390 | /* Find the representative of the class of the equivalent invariants. */ |
9771b263 | 1391 | inv = invariants[inv->eqto]; |
1052bd54 | 1392 | |
5e962776 ZD |
1393 | if (inv->move) |
1394 | return; | |
1395 | inv->move = true; | |
1396 | ||
1397 | if (dump_file) | |
1833192f VM |
1398 | { |
1399 | if (gain >= 0) | |
1400 | fprintf (dump_file, "Decided to move invariant %d -- gain %d\n", | |
1401 | invno, gain); | |
1402 | else | |
1403 | fprintf (dump_file, "Decided to move dependent invariant %d\n", | |
1404 | invno); | |
1405 | }; | |
5e962776 | 1406 | |
87c476a2 ZD |
1407 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi) |
1408 | { | |
1833192f | 1409 | set_move_mark (invno, -1); |
87c476a2 | 1410 | } |
5e962776 ZD |
1411 | } |
1412 | ||
cb20f7e8 | 1413 | /* Determines which invariants to move. */ |
5e962776 ZD |
1414 | |
1415 | static void | |
bec922f0 | 1416 | find_invariants_to_move (bool speed, bool call_p) |
5e962776 | 1417 | { |
1833192f VM |
1418 | int gain; |
1419 | unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES]; | |
5e962776 ZD |
1420 | struct invariant *inv = NULL; |
1421 | ||
9771b263 | 1422 | if (!invariants.length ()) |
5e962776 ZD |
1423 | return; |
1424 | ||
1833192f | 1425 | if (flag_ira_loop_pressure) |
b8698a0f | 1426 | /* REGS_USED is actually never used when the flag is on. */ |
1833192f VM |
1427 | regs_used = 0; |
1428 | else | |
1429 | /* We do not really do a good job in estimating number of | |
1430 | registers used; we put some initial bound here to stand for | |
1431 | induction variables etc. that we do not detect. */ | |
5e962776 | 1432 | { |
1833192f VM |
1433 | unsigned int n_regs = DF_REG_SIZE (df); |
1434 | ||
1435 | regs_used = 2; | |
b8698a0f | 1436 | |
1833192f | 1437 | for (i = 0; i < n_regs; i++) |
5e962776 | 1438 | { |
1833192f VM |
1439 | if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) |
1440 | { | |
1441 | /* This is a value that is used but not changed inside loop. */ | |
1442 | regs_used++; | |
1443 | } | |
5e962776 ZD |
1444 | } |
1445 | } | |
1446 | ||
1833192f VM |
1447 | if (! flag_ira_loop_pressure) |
1448 | new_regs[0] = regs_needed[0] = 0; | |
1449 | else | |
5e962776 | 1450 | { |
1756cb66 VM |
1451 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1452 | new_regs[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1453 | } |
1454 | while ((gain = best_gain_for_invariant (&inv, regs_needed, | |
bec922f0 SL |
1455 | new_regs, regs_used, |
1456 | speed, call_p)) > 0) | |
1833192f VM |
1457 | { |
1458 | set_move_mark (inv->invno, gain); | |
1459 | if (! flag_ira_loop_pressure) | |
1460 | new_regs[0] += regs_needed[0]; | |
1461 | else | |
1462 | { | |
1756cb66 VM |
1463 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1464 | new_regs[ira_pressure_classes[i]] | |
1465 | += regs_needed[ira_pressure_classes[i]]; | |
1833192f | 1466 | } |
5e962776 ZD |
1467 | } |
1468 | } | |
1469 | ||
43ba743c EB |
1470 | /* Replace the uses, reached by the definition of invariant INV, by REG. |
1471 | ||
1472 | IN_GROUP is nonzero if this is part of a group of changes that must be | |
1473 | performed as a group. In that case, the changes will be stored. The | |
1474 | function `apply_change_group' will validate and apply the changes. */ | |
1475 | ||
1476 | static int | |
1477 | replace_uses (struct invariant *inv, rtx reg, bool in_group) | |
1478 | { | |
1479 | /* Replace the uses we know to be dominated. It saves work for copy | |
1480 | propagation, and also it is necessary so that dependent invariants | |
1481 | are computed right. */ | |
1482 | if (inv->def) | |
1483 | { | |
1484 | struct use *use; | |
1485 | for (use = inv->def->uses; use; use = use->next) | |
1486 | validate_change (use->insn, use->pos, reg, true); | |
1487 | ||
1488 | /* If we aren't part of a larger group, apply the changes now. */ | |
1489 | if (!in_group) | |
1490 | return apply_change_group (); | |
1491 | } | |
1492 | ||
1493 | return 1; | |
1494 | } | |
1495 | ||
ba946209 ZD |
1496 | /* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false |
1497 | otherwise. */ | |
1498 | ||
1499 | static bool | |
cb20f7e8 | 1500 | move_invariant_reg (struct loop *loop, unsigned invno) |
5e962776 | 1501 | { |
9771b263 DN |
1502 | struct invariant *inv = invariants[invno]; |
1503 | struct invariant *repr = invariants[inv->eqto]; | |
5e962776 ZD |
1504 | unsigned i; |
1505 | basic_block preheader = loop_preheader_edge (loop)->src; | |
90b1c344 | 1506 | rtx reg, set, dest, note; |
87c476a2 | 1507 | bitmap_iterator bi; |
43ba743c | 1508 | int regno = -1; |
5e962776 | 1509 | |
ba946209 ZD |
1510 | if (inv->reg) |
1511 | return true; | |
1512 | if (!repr->move) | |
1513 | return false; | |
43ba743c | 1514 | |
1052bd54 ZD |
1515 | /* If this is a representative of the class of equivalent invariants, |
1516 | really move the invariant. Otherwise just replace its use with | |
1517 | the register used for the representative. */ | |
1518 | if (inv == repr) | |
5e962776 | 1519 | { |
1052bd54 | 1520 | if (inv->depends_on) |
5e962776 | 1521 | { |
1052bd54 ZD |
1522 | EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi) |
1523 | { | |
ba946209 ZD |
1524 | if (!move_invariant_reg (loop, i)) |
1525 | goto fail; | |
1052bd54 | 1526 | } |
87c476a2 | 1527 | } |
5e962776 | 1528 | |
1052bd54 | 1529 | /* Move the set out of the loop. If the set is always executed (we could |
43ba743c EB |
1530 | omit this condition if we know that the register is unused outside of |
1531 | the loop, but it does not seem worth finding out) and it has no uses | |
1532 | that would not be dominated by it, we may just move it (TODO). | |
1533 | Otherwise we need to create a temporary register. */ | |
1052bd54 | 1534 | set = single_set (inv->insn); |
1833192f VM |
1535 | reg = dest = SET_DEST (set); |
1536 | if (GET_CODE (reg) == SUBREG) | |
1537 | reg = SUBREG_REG (reg); | |
1538 | if (REG_P (reg)) | |
1539 | regno = REGNO (reg); | |
1540 | ||
46b71b03 | 1541 | reg = gen_reg_rtx_and_attrs (dest); |
1052bd54 | 1542 | |
90b1c344 | 1543 | /* Try replacing the destination by a new pseudoregister. */ |
43ba743c EB |
1544 | validate_change (inv->insn, &SET_DEST (set), reg, true); |
1545 | ||
1546 | /* As well as all the dominated uses. */ | |
1547 | replace_uses (inv, reg, true); | |
1548 | ||
1549 | /* And validate all the changes. */ | |
1550 | if (!apply_change_group ()) | |
90b1c344 | 1551 | goto fail; |
90b1c344 ZD |
1552 | |
1553 | emit_insn_after (gen_move_insn (dest, reg), inv->insn); | |
1554 | reorder_insns (inv->insn, inv->insn, BB_END (preheader)); | |
1555 | ||
82fa5f8a L |
1556 | /* If there is a REG_EQUAL note on the insn we just moved, and the |
1557 | insn is in a basic block that is not always executed or the note | |
1558 | contains something for which we don't know the invariant status, | |
1559 | the note may no longer be valid after we move the insn. Note that | |
1560 | uses in REG_EQUAL notes are taken into account in the computation | |
1561 | of invariants, so it is safe to retain the note even if it contains | |
1562 | register references for which we know the invariant status. */ | |
1563 | if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX)) | |
1564 | && (!inv->always_executed | |
1565 | || !check_maybe_invariant (XEXP (note, 0)))) | |
90b1c344 | 1566 | remove_note (inv->insn, note); |
b644b211 SB |
1567 | } |
1568 | else | |
1569 | { | |
ba946209 ZD |
1570 | if (!move_invariant_reg (loop, repr->invno)) |
1571 | goto fail; | |
1052bd54 | 1572 | reg = repr->reg; |
1833192f | 1573 | regno = repr->orig_regno; |
43ba743c EB |
1574 | if (!replace_uses (inv, reg, false)) |
1575 | goto fail; | |
1052bd54 | 1576 | set = single_set (inv->insn); |
4d779342 DB |
1577 | emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn); |
1578 | delete_insn (inv->insn); | |
b644b211 | 1579 | } |
5e962776 | 1580 | |
1052bd54 | 1581 | inv->reg = reg; |
1833192f | 1582 | inv->orig_regno = regno; |
1052bd54 | 1583 | |
ba946209 ZD |
1584 | return true; |
1585 | ||
1586 | fail: | |
1587 | /* If we failed, clear move flag, so that we do not try to move inv | |
1588 | again. */ | |
1589 | if (dump_file) | |
1590 | fprintf (dump_file, "Failed to move invariant %d\n", invno); | |
1591 | inv->move = false; | |
1592 | inv->reg = NULL_RTX; | |
1833192f | 1593 | inv->orig_regno = -1; |
6fb5fa3c | 1594 | |
ba946209 | 1595 | return false; |
5e962776 ZD |
1596 | } |
1597 | ||
1598 | /* Move selected invariant out of the LOOP. Newly created regs are marked | |
cb20f7e8 | 1599 | in TEMPORARY_REGS. */ |
5e962776 ZD |
1600 | |
1601 | static void | |
cb20f7e8 | 1602 | move_invariants (struct loop *loop) |
5e962776 ZD |
1603 | { |
1604 | struct invariant *inv; | |
1605 | unsigned i; | |
1606 | ||
9771b263 | 1607 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1052bd54 | 1608 | move_invariant_reg (loop, i); |
1833192f VM |
1609 | if (flag_ira_loop_pressure && resize_reg_info ()) |
1610 | { | |
9771b263 | 1611 | FOR_EACH_VEC_ELT (invariants, i, inv) |
1833192f VM |
1612 | if (inv->reg != NULL_RTX) |
1613 | { | |
1614 | if (inv->orig_regno >= 0) | |
1615 | setup_reg_classes (REGNO (inv->reg), | |
1616 | reg_preferred_class (inv->orig_regno), | |
1617 | reg_alternate_class (inv->orig_regno), | |
1756cb66 | 1618 | reg_allocno_class (inv->orig_regno)); |
1833192f VM |
1619 | else |
1620 | setup_reg_classes (REGNO (inv->reg), | |
1621 | GENERAL_REGS, NO_REGS, GENERAL_REGS); | |
1622 | } | |
1623 | } | |
5e962776 ZD |
1624 | } |
1625 | ||
1626 | /* Initializes invariant motion data. */ | |
1627 | ||
1628 | static void | |
1629 | init_inv_motion_data (void) | |
1630 | { | |
1631 | actual_stamp = 1; | |
1632 | ||
9771b263 | 1633 | invariants.create (100); |
5e962776 ZD |
1634 | } |
1635 | ||
cb20f7e8 | 1636 | /* Frees the data allocated by invariant motion. */ |
5e962776 ZD |
1637 | |
1638 | static void | |
cb20f7e8 | 1639 | free_inv_motion_data (void) |
5e962776 ZD |
1640 | { |
1641 | unsigned i; | |
1642 | struct def *def; | |
1643 | struct invariant *inv; | |
1644 | ||
6fb5fa3c DB |
1645 | check_invariant_table_size (); |
1646 | for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++) | |
5e962776 | 1647 | { |
6fb5fa3c DB |
1648 | inv = invariant_table[i]; |
1649 | if (inv) | |
1650 | { | |
1651 | def = inv->def; | |
1652 | gcc_assert (def != NULL); | |
b8698a0f | 1653 | |
6fb5fa3c DB |
1654 | free_use_list (def->uses); |
1655 | free (def); | |
1656 | invariant_table[i] = NULL; | |
1657 | } | |
5e962776 ZD |
1658 | } |
1659 | ||
9771b263 | 1660 | FOR_EACH_VEC_ELT (invariants, i, inv) |
5e962776 | 1661 | { |
8bdbfff5 | 1662 | BITMAP_FREE (inv->depends_on); |
5e962776 ZD |
1663 | free (inv); |
1664 | } | |
9771b263 | 1665 | invariants.release (); |
5e962776 ZD |
1666 | } |
1667 | ||
cb20f7e8 | 1668 | /* Move the invariants out of the LOOP. */ |
5e962776 ZD |
1669 | |
1670 | static void | |
cb20f7e8 | 1671 | move_single_loop_invariants (struct loop *loop) |
5e962776 ZD |
1672 | { |
1673 | init_inv_motion_data (); | |
1674 | ||
cb20f7e8 | 1675 | find_invariants (loop); |
bec922f0 SL |
1676 | find_invariants_to_move (optimize_loop_for_speed_p (loop), |
1677 | LOOP_DATA (loop)->has_call); | |
cb20f7e8 | 1678 | move_invariants (loop); |
5e962776 | 1679 | |
cb20f7e8 | 1680 | free_inv_motion_data (); |
5e962776 ZD |
1681 | } |
1682 | ||
1683 | /* Releases the auxiliary data for LOOP. */ | |
1684 | ||
1685 | static void | |
1686 | free_loop_data (struct loop *loop) | |
1687 | { | |
1688 | struct loop_data *data = LOOP_DATA (loop); | |
eb149440 RG |
1689 | if (!data) |
1690 | return; | |
5e962776 | 1691 | |
1833192f VM |
1692 | bitmap_clear (&LOOP_DATA (loop)->regs_ref); |
1693 | bitmap_clear (&LOOP_DATA (loop)->regs_live); | |
5e962776 ZD |
1694 | free (data); |
1695 | loop->aux = NULL; | |
1696 | } | |
1697 | ||
1833192f VM |
1698 | \f |
1699 | ||
1700 | /* Registers currently living. */ | |
1701 | static bitmap_head curr_regs_live; | |
1702 | ||
1756cb66 | 1703 | /* Current reg pressure for each pressure class. */ |
1833192f VM |
1704 | static int curr_reg_pressure[N_REG_CLASSES]; |
1705 | ||
1706 | /* Record all regs that are set in any one insn. Communication from | |
1707 | mark_reg_{store,clobber} and global_conflicts. Asm can refer to | |
1708 | all hard-registers. */ | |
1709 | static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS | |
1710 | ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2]; | |
1711 | /* Number of regs stored in the previous array. */ | |
1712 | static int n_regs_set; | |
1713 | ||
1756cb66 | 1714 | /* Return pressure class and number of needed hard registers (through |
b8698a0f | 1715 | *NREGS) of register REGNO. */ |
1833192f | 1716 | static enum reg_class |
1756cb66 | 1717 | get_regno_pressure_class (int regno, int *nregs) |
1833192f VM |
1718 | { |
1719 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1720 | { | |
1756cb66 | 1721 | enum reg_class pressure_class; |
1833192f | 1722 | |
1756cb66 VM |
1723 | pressure_class = reg_allocno_class (regno); |
1724 | pressure_class = ira_pressure_class_translate[pressure_class]; | |
1725 | *nregs | |
1726 | = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)]; | |
1727 | return pressure_class; | |
1833192f VM |
1728 | } |
1729 | else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) | |
1730 | && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) | |
1731 | { | |
1732 | *nregs = 1; | |
1756cb66 | 1733 | return ira_pressure_class_translate[REGNO_REG_CLASS (regno)]; |
1833192f VM |
1734 | } |
1735 | else | |
1736 | { | |
1737 | *nregs = 0; | |
1738 | return NO_REGS; | |
1739 | } | |
1740 | } | |
1741 | ||
1742 | /* Increase (if INCR_P) or decrease current register pressure for | |
1743 | register REGNO. */ | |
1744 | static void | |
1745 | change_pressure (int regno, bool incr_p) | |
1746 | { | |
1747 | int nregs; | |
1756cb66 | 1748 | enum reg_class pressure_class; |
1833192f | 1749 | |
1756cb66 | 1750 | pressure_class = get_regno_pressure_class (regno, &nregs); |
1833192f | 1751 | if (! incr_p) |
1756cb66 | 1752 | curr_reg_pressure[pressure_class] -= nregs; |
1833192f VM |
1753 | else |
1754 | { | |
1756cb66 VM |
1755 | curr_reg_pressure[pressure_class] += nregs; |
1756 | if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1757 | < curr_reg_pressure[pressure_class]) | |
1758 | LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class] | |
1759 | = curr_reg_pressure[pressure_class]; | |
1833192f VM |
1760 | } |
1761 | } | |
1762 | ||
1763 | /* Mark REGNO birth. */ | |
1764 | static void | |
1765 | mark_regno_live (int regno) | |
1766 | { | |
1767 | struct loop *loop; | |
1768 | ||
1769 | for (loop = curr_loop; | |
1770 | loop != current_loops->tree_root; | |
1771 | loop = loop_outer (loop)) | |
1772 | bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno); | |
fcaa4ca4 | 1773 | if (!bitmap_set_bit (&curr_regs_live, regno)) |
1833192f | 1774 | return; |
1833192f VM |
1775 | change_pressure (regno, true); |
1776 | } | |
1777 | ||
1778 | /* Mark REGNO death. */ | |
1779 | static void | |
1780 | mark_regno_death (int regno) | |
1781 | { | |
fcaa4ca4 | 1782 | if (! bitmap_clear_bit (&curr_regs_live, regno)) |
1833192f | 1783 | return; |
1833192f VM |
1784 | change_pressure (regno, false); |
1785 | } | |
1786 | ||
1787 | /* Mark setting register REG. */ | |
1788 | static void | |
1789 | mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, | |
1790 | void *data ATTRIBUTE_UNUSED) | |
1791 | { | |
1792 | int regno; | |
1793 | ||
1794 | if (GET_CODE (reg) == SUBREG) | |
1795 | reg = SUBREG_REG (reg); | |
1796 | ||
1797 | if (! REG_P (reg)) | |
1798 | return; | |
1799 | ||
1800 | regs_set[n_regs_set++] = reg; | |
1801 | ||
1802 | regno = REGNO (reg); | |
1803 | ||
1804 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1805 | mark_regno_live (regno); | |
1806 | else | |
1807 | { | |
1808 | int last = regno + hard_regno_nregs[regno][GET_MODE (reg)]; | |
1809 | ||
1810 | while (regno < last) | |
1811 | { | |
1812 | mark_regno_live (regno); | |
1813 | regno++; | |
1814 | } | |
1815 | } | |
1816 | } | |
1817 | ||
1818 | /* Mark clobbering register REG. */ | |
1819 | static void | |
1820 | mark_reg_clobber (rtx reg, const_rtx setter, void *data) | |
1821 | { | |
1822 | if (GET_CODE (setter) == CLOBBER) | |
1823 | mark_reg_store (reg, setter, data); | |
1824 | } | |
1825 | ||
1826 | /* Mark register REG death. */ | |
1827 | static void | |
1828 | mark_reg_death (rtx reg) | |
1829 | { | |
1830 | int regno = REGNO (reg); | |
1831 | ||
1832 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1833 | mark_regno_death (regno); | |
1834 | else | |
1835 | { | |
1836 | int last = regno + hard_regno_nregs[regno][GET_MODE (reg)]; | |
1837 | ||
1838 | while (regno < last) | |
1839 | { | |
1840 | mark_regno_death (regno); | |
1841 | regno++; | |
1842 | } | |
1843 | } | |
1844 | } | |
1845 | ||
1846 | /* Mark occurrence of registers in X for the current loop. */ | |
1847 | static void | |
1848 | mark_ref_regs (rtx x) | |
1849 | { | |
1850 | RTX_CODE code; | |
1851 | int i; | |
1852 | const char *fmt; | |
1853 | ||
1854 | if (!x) | |
1855 | return; | |
1856 | ||
1857 | code = GET_CODE (x); | |
1858 | if (code == REG) | |
1859 | { | |
1860 | struct loop *loop; | |
b8698a0f | 1861 | |
1833192f VM |
1862 | for (loop = curr_loop; |
1863 | loop != current_loops->tree_root; | |
1864 | loop = loop_outer (loop)) | |
1865 | bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x)); | |
1866 | return; | |
1867 | } | |
1868 | ||
1869 | fmt = GET_RTX_FORMAT (code); | |
1870 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1871 | if (fmt[i] == 'e') | |
1872 | mark_ref_regs (XEXP (x, i)); | |
1873 | else if (fmt[i] == 'E') | |
1874 | { | |
1875 | int j; | |
b8698a0f | 1876 | |
1833192f VM |
1877 | for (j = 0; j < XVECLEN (x, i); j++) |
1878 | mark_ref_regs (XVECEXP (x, i, j)); | |
1879 | } | |
1880 | } | |
1881 | ||
1882 | /* Calculate register pressure in the loops. */ | |
1883 | static void | |
1884 | calculate_loop_reg_pressure (void) | |
1885 | { | |
1886 | int i; | |
1887 | unsigned int j; | |
1888 | bitmap_iterator bi; | |
1889 | basic_block bb; | |
89bfd6f5 DM |
1890 | rtx_insn *insn; |
1891 | rtx link; | |
1833192f | 1892 | struct loop *loop, *parent; |
1833192f | 1893 | |
f0bd40b1 | 1894 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
1895 | if (loop->aux == NULL) |
1896 | { | |
1897 | loop->aux = xcalloc (1, sizeof (struct loop_data)); | |
1898 | bitmap_initialize (&LOOP_DATA (loop)->regs_ref, ®_obstack); | |
1899 | bitmap_initialize (&LOOP_DATA (loop)->regs_live, ®_obstack); | |
1900 | } | |
8d49e7ef | 1901 | ira_setup_eliminable_regset (); |
1833192f | 1902 | bitmap_initialize (&curr_regs_live, ®_obstack); |
11cd3bed | 1903 | FOR_EACH_BB_FN (bb, cfun) |
1833192f VM |
1904 | { |
1905 | curr_loop = bb->loop_father; | |
1906 | if (curr_loop == current_loops->tree_root) | |
1907 | continue; | |
1908 | ||
1909 | for (loop = curr_loop; | |
1910 | loop != current_loops->tree_root; | |
1911 | loop = loop_outer (loop)) | |
1912 | bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb)); | |
1913 | ||
1914 | bitmap_copy (&curr_regs_live, DF_LR_IN (bb)); | |
1756cb66 VM |
1915 | for (i = 0; i < ira_pressure_classes_num; i++) |
1916 | curr_reg_pressure[ira_pressure_classes[i]] = 0; | |
1833192f VM |
1917 | EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi) |
1918 | change_pressure (j, true); | |
1919 | ||
1920 | FOR_BB_INSNS (bb, insn) | |
1921 | { | |
dd8c071d | 1922 | if (! NONDEBUG_INSN_P (insn)) |
1833192f VM |
1923 | continue; |
1924 | ||
1925 | mark_ref_regs (PATTERN (insn)); | |
1926 | n_regs_set = 0; | |
1927 | note_stores (PATTERN (insn), mark_reg_clobber, NULL); | |
b8698a0f | 1928 | |
1833192f | 1929 | /* Mark any registers dead after INSN as dead now. */ |
b8698a0f | 1930 | |
1833192f VM |
1931 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
1932 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
1933 | mark_reg_death (XEXP (link, 0)); | |
b8698a0f | 1934 | |
1833192f VM |
1935 | /* Mark any registers set in INSN as live, |
1936 | and mark them as conflicting with all other live regs. | |
1937 | Clobbers are processed again, so they conflict with | |
1938 | the registers that are set. */ | |
b8698a0f | 1939 | |
1833192f | 1940 | note_stores (PATTERN (insn), mark_reg_store, NULL); |
b8698a0f | 1941 | |
1833192f VM |
1942 | #ifdef AUTO_INC_DEC |
1943 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
1944 | if (REG_NOTE_KIND (link) == REG_INC) | |
1945 | mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); | |
1946 | #endif | |
1947 | while (n_regs_set-- > 0) | |
1948 | { | |
1949 | rtx note = find_regno_note (insn, REG_UNUSED, | |
1950 | REGNO (regs_set[n_regs_set])); | |
1951 | if (! note) | |
1952 | continue; | |
b8698a0f | 1953 | |
1833192f VM |
1954 | mark_reg_death (XEXP (note, 0)); |
1955 | } | |
1956 | } | |
1957 | } | |
1958 | bitmap_clear (&curr_regs_live); | |
1959 | if (flag_ira_region == IRA_REGION_MIXED | |
1960 | || flag_ira_region == IRA_REGION_ALL) | |
f0bd40b1 | 1961 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
1962 | { |
1963 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
1964 | if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j)) | |
1965 | { | |
1756cb66 | 1966 | enum reg_class pressure_class; |
1833192f VM |
1967 | int nregs; |
1968 | ||
1756cb66 VM |
1969 | pressure_class = get_regno_pressure_class (j, &nregs); |
1970 | LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs; | |
1833192f VM |
1971 | } |
1972 | } | |
1973 | if (dump_file == NULL) | |
1974 | return; | |
f0bd40b1 | 1975 | FOR_EACH_LOOP (loop, 0) |
1833192f VM |
1976 | { |
1977 | parent = loop_outer (loop); | |
1978 | fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n", | |
1979 | loop->num, (parent == NULL ? -1 : parent->num), | |
1980 | loop->header->index, loop_depth (loop)); | |
1981 | fprintf (dump_file, "\n ref. regnos:"); | |
1982 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi) | |
1983 | fprintf (dump_file, " %d", j); | |
1984 | fprintf (dump_file, "\n live regnos:"); | |
1985 | EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi) | |
1986 | fprintf (dump_file, " %d", j); | |
1987 | fprintf (dump_file, "\n Pressure:"); | |
1756cb66 | 1988 | for (i = 0; (int) i < ira_pressure_classes_num; i++) |
1833192f | 1989 | { |
1756cb66 | 1990 | enum reg_class pressure_class; |
b8698a0f | 1991 | |
1756cb66 VM |
1992 | pressure_class = ira_pressure_classes[i]; |
1993 | if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0) | |
1833192f | 1994 | continue; |
1756cb66 VM |
1995 | fprintf (dump_file, " %s=%d", reg_class_names[pressure_class], |
1996 | LOOP_DATA (loop)->max_reg_pressure[pressure_class]); | |
1833192f VM |
1997 | } |
1998 | fprintf (dump_file, "\n"); | |
1999 | } | |
2000 | } | |
2001 | ||
2002 | \f | |
2003 | ||
d73be268 | 2004 | /* Move the invariants out of the loops. */ |
5e962776 ZD |
2005 | |
2006 | void | |
d73be268 | 2007 | move_loop_invariants (void) |
5e962776 ZD |
2008 | { |
2009 | struct loop *loop; | |
cb20f7e8 | 2010 | |
1833192f VM |
2011 | if (flag_ira_loop_pressure) |
2012 | { | |
2013 | df_analyze (); | |
1756cb66 | 2014 | regstat_init_n_sets_and_refs (); |
b11f0116 | 2015 | ira_set_pseudo_classes (true, dump_file); |
1833192f | 2016 | calculate_loop_reg_pressure (); |
1756cb66 | 2017 | regstat_free_n_sets_and_refs (); |
1833192f | 2018 | } |
6fb5fa3c | 2019 | df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN); |
5e962776 | 2020 | /* Process the loops, innermost first. */ |
f0bd40b1 | 2021 | FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) |
5e962776 | 2022 | { |
1833192f | 2023 | curr_loop = loop; |
b1fb9f56 JJ |
2024 | /* move_single_loop_invariants for very large loops |
2025 | is time consuming and might need a lot of memory. */ | |
2026 | if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP) | |
2027 | move_single_loop_invariants (loop); | |
5e962776 ZD |
2028 | } |
2029 | ||
f0bd40b1 | 2030 | FOR_EACH_LOOP (loop, 0) |
42fd6772 ZD |
2031 | { |
2032 | free_loop_data (loop); | |
2033 | } | |
5e962776 | 2034 | |
1833192f VM |
2035 | if (flag_ira_loop_pressure) |
2036 | /* There is no sense to keep this info because it was most | |
2037 | probably outdated by subsequent passes. */ | |
2038 | free_reg_info (); | |
6fb5fa3c DB |
2039 | free (invariant_table); |
2040 | invariant_table = NULL; | |
2041 | invariant_table_size = 0; | |
a7f4ccb1 SB |
2042 | |
2043 | #ifdef ENABLE_CHECKING | |
2044 | verify_flow_info (); | |
2045 | #endif | |
5e962776 | 2046 | } |