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cb20f7e8 1/* RTL-level loop invariant motion.
a5544970 2 Copyright (C) 2004-2019 Free Software Foundation, Inc.
cb20f7e8 3
5e962776 4This file is part of GCC.
cb20f7e8 5
5e962776
ZD
6GCC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
9dcd6f09 8Free Software Foundation; either version 3, or (at your option) any
5e962776 9later version.
cb20f7e8 10
5e962776
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11GCC is distributed in the hope that it will be useful, but WITHOUT
12ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
cb20f7e8 15
5e962776 16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
5e962776
ZD
19
20/* This implements the loop invariant motion pass. It is very simple
4a8cae83
SB
21 (no calls, no loads/stores, etc.). This should be sufficient to cleanup
22 things like address arithmetics -- other more complicated invariants should
23 be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c.
cb20f7e8 24
5e962776
ZD
25 We proceed loop by loop -- it is simpler than trying to handle things
26 globally and should not lose much. First we inspect all sets inside loop
27 and create a dependency graph on insns (saying "to move this insn, you must
28 also move the following insns").
29
30 We then need to determine what to move. We estimate the number of registers
31 used and move as many invariants as possible while we still have enough free
32 registers. We prefer the expensive invariants.
cb20f7e8 33
5e962776
ZD
34 Then we move the selected invariants out of the loop, creating a new
35 temporaries for them if necessary. */
36
37#include "config.h"
38#include "system.h"
39#include "coretypes.h"
c7131fb2 40#include "backend.h"
957060b5 41#include "target.h"
5e962776 42#include "rtl.h"
957060b5
AM
43#include "tree.h"
44#include "cfghooks.h"
c7131fb2 45#include "df.h"
4d0cdd0c 46#include "memmodel.h"
3912d291 47#include "tm_p.h"
957060b5
AM
48#include "insn-config.h"
49#include "regs.h"
50#include "ira.h"
51#include "recog.h"
60393bbc 52#include "cfgrtl.h"
60393bbc
AM
53#include "cfgloop.h"
54#include "expr.h"
b1fb9f56 55#include "params.h"
192912db 56#include "rtl-iter.h"
7ee2468b 57#include "dumpfile.h"
5e962776
ZD
58
59/* The data stored for the loop. */
60
61struct loop_data
62{
63 struct loop *outermost_exit; /* The outermost exit of the loop. */
64 bool has_call; /* True if the loop contains a call. */
1833192f 65 /* Maximal register pressure inside loop for given register class
1756cb66 66 (defined only for the pressure classes). */
1833192f
VM
67 int max_reg_pressure[N_REG_CLASSES];
68 /* Loop regs referenced and live pseudo-registers. */
69 bitmap_head regs_ref;
70 bitmap_head regs_live;
5e962776
ZD
71};
72
73#define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux)
74
75/* The description of an use. */
76
77struct use
78{
79 rtx *pos; /* Position of the use. */
89bfd6f5 80 rtx_insn *insn; /* The insn in that the use occurs. */
1bfdbb29 81 unsigned addr_use_p; /* Whether the use occurs in an address. */
5e962776
ZD
82 struct use *next; /* Next use in the list. */
83};
84
85/* The description of a def. */
86
87struct def
88{
89 struct use *uses; /* The list of uses that are uniquely reached
90 by it. */
91 unsigned n_uses; /* Number of such uses. */
1bfdbb29 92 unsigned n_addr_uses; /* Number of uses in addresses. */
5e962776 93 unsigned invno; /* The corresponding invariant. */
5b92e189
BC
94 bool can_prop_to_addr_uses; /* True if the corresponding inv can be
95 propagated into its address uses. */
5e962776
ZD
96};
97
98/* The data stored for each invariant. */
99
100struct invariant
101{
102 /* The number of the invariant. */
103 unsigned invno;
104
1052bd54
ZD
105 /* The number of the invariant with the same value. */
106 unsigned eqto;
107
e42e3d15
ZC
108 /* The number of invariants which eqto this. */
109 unsigned eqno;
110
1833192f
VM
111 /* If we moved the invariant out of the loop, the original regno
112 that contained its value. */
113 int orig_regno;
114
34e82342
RB
115 /* If we moved the invariant out of the loop, the register that contains its
116 value. */
117 rtx reg;
118
5e962776
ZD
119 /* The definition of the invariant. */
120 struct def *def;
121
122 /* The insn in that it is defined. */
89bfd6f5 123 rtx_insn *insn;
5e962776
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124
125 /* Whether it is always executed. */
126 bool always_executed;
127
128 /* Whether to move the invariant. */
129 bool move;
130
1bfdbb29
PB
131 /* Whether the invariant is cheap when used as an address. */
132 bool cheap_address;
133
cb20f7e8 134 /* Cost of the invariant. */
5e962776
ZD
135 unsigned cost;
136
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137 /* Used for detecting already visited invariants during determining
138 costs of movements. */
139 unsigned stamp;
34e82342
RB
140
141 /* The invariants it depends on. */
142 bitmap depends_on;
5e962776
ZD
143};
144
1833192f
VM
145/* Currently processed loop. */
146static struct loop *curr_loop;
147
6fb5fa3c
DB
148/* Table of invariants indexed by the df_ref uid field. */
149
150static unsigned int invariant_table_size = 0;
151static struct invariant ** invariant_table;
152
1052bd54
ZD
153/* Entry for hash table of invariant expressions. */
154
155struct invariant_expr_entry
156{
157 /* The invariant. */
158 struct invariant *inv;
159
160 /* Its value. */
161 rtx expr;
162
163 /* Its mode. */
ef4bddc2 164 machine_mode mode;
1052bd54
ZD
165
166 /* Its hash. */
167 hashval_t hash;
168};
169
5e962776
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170/* The actual stamp for marking already visited invariants during determining
171 costs of movements. */
172
173static unsigned actual_stamp;
174
edd954e6
KH
175typedef struct invariant *invariant_p;
176
edd954e6 177
5e962776
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178/* The invariants. */
179
9771b263 180static vec<invariant_p> invariants;
5e962776 181
6fb5fa3c 182/* Check the size of the invariant table and realloc if necessary. */
cb20f7e8 183
b8698a0f 184static void
6fb5fa3c
DB
185check_invariant_table_size (void)
186{
c3284718 187 if (invariant_table_size < DF_DEFS_TABLE_SIZE ())
6fb5fa3c
DB
188 {
189 unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4);
d3bfe4de 190 invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size);
b8698a0f 191 memset (&invariant_table[invariant_table_size], 0,
92cfe9d5 192 (new_size - invariant_table_size) * sizeof (struct invariant *));
6fb5fa3c
DB
193 invariant_table_size = new_size;
194 }
195}
cb20f7e8 196
5e962776
ZD
197/* Test for possibility of invariantness of X. */
198
199static bool
200check_maybe_invariant (rtx x)
201{
202 enum rtx_code code = GET_CODE (x);
203 int i, j;
204 const char *fmt;
205
206 switch (code)
207 {
d8116890 208 CASE_CONST_ANY:
5e962776
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209 case SYMBOL_REF:
210 case CONST:
211 case LABEL_REF:
212 return true;
213
214 case PC:
215 case CC0:
216 case UNSPEC_VOLATILE:
217 case CALL:
218 return false;
219
220 case REG:
221 return true;
222
223 case MEM:
224 /* Load/store motion is done elsewhere. ??? Perhaps also add it here?
225 It should not be hard, and might be faster than "elsewhere". */
226
227 /* Just handle the most trivial case where we load from an unchanging
228 location (most importantly, pic tables). */
66f91b93 229 if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x))
5e962776
ZD
230 break;
231
232 return false;
233
234 case ASM_OPERANDS:
235 /* Don't mess with insns declared volatile. */
236 if (MEM_VOLATILE_P (x))
237 return false;
238 break;
239
240 default:
241 break;
242 }
243
244 fmt = GET_RTX_FORMAT (code);
245 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
246 {
247 if (fmt[i] == 'e')
248 {
249 if (!check_maybe_invariant (XEXP (x, i)))
250 return false;
251 }
252 else if (fmt[i] == 'E')
253 {
254 for (j = 0; j < XVECLEN (x, i); j++)
255 if (!check_maybe_invariant (XVECEXP (x, i, j)))
256 return false;
257 }
258 }
259
260 return true;
261}
262
1052bd54
ZD
263/* Returns the invariant definition for USE, or NULL if USE is not
264 invariant. */
265
266static struct invariant *
57512f53 267invariant_for_use (df_ref use)
1052bd54
ZD
268{
269 struct df_link *defs;
57512f53 270 df_ref def;
50e94c7e 271 basic_block bb = DF_REF_BB (use), def_bb;
1052bd54 272
57512f53 273 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
b6c9b9bc
ZD
274 return NULL;
275
1052bd54
ZD
276 defs = DF_REF_CHAIN (use);
277 if (!defs || defs->next)
278 return NULL;
279 def = defs->ref;
6fb5fa3c 280 check_invariant_table_size ();
c3284718 281 if (!invariant_table[DF_REF_ID (def)])
1052bd54
ZD
282 return NULL;
283
284 def_bb = DF_REF_BB (def);
285 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
286 return NULL;
c3284718 287 return invariant_table[DF_REF_ID (def)];
1052bd54
ZD
288}
289
290/* Computes hash value for invariant expression X in INSN. */
291
292static hashval_t
89bfd6f5 293hash_invariant_expr_1 (rtx_insn *insn, rtx x)
1052bd54
ZD
294{
295 enum rtx_code code = GET_CODE (x);
296 int i, j;
297 const char *fmt;
298 hashval_t val = code;
299 int do_not_record_p;
57512f53 300 df_ref use;
1052bd54
ZD
301 struct invariant *inv;
302
303 switch (code)
304 {
d8116890 305 CASE_CONST_ANY:
1052bd54
ZD
306 case SYMBOL_REF:
307 case CONST:
308 case LABEL_REF:
309 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
310
311 case REG:
6fb5fa3c 312 use = df_find_use (insn, x);
1052bd54
ZD
313 if (!use)
314 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
315 inv = invariant_for_use (use);
316 if (!inv)
317 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
318
319 gcc_assert (inv->eqto != ~0u);
320 return inv->eqto;
321
322 default:
323 break;
324 }
325
326 fmt = GET_RTX_FORMAT (code);
327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
328 {
329 if (fmt[i] == 'e')
330 val ^= hash_invariant_expr_1 (insn, XEXP (x, i));
331 else if (fmt[i] == 'E')
332 {
333 for (j = 0; j < XVECLEN (x, i); j++)
334 val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j));
335 }
8e1409e8
ZD
336 else if (fmt[i] == 'i' || fmt[i] == 'n')
337 val ^= XINT (x, i);
91914e56
RS
338 else if (fmt[i] == 'p')
339 val ^= constant_lower_bound (SUBREG_BYTE (x));
1052bd54
ZD
340 }
341
342 return val;
343}
344
345/* Returns true if the invariant expressions E1 and E2 used in insns INSN1
346 and INSN2 have always the same value. */
347
348static bool
89bfd6f5 349invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2)
1052bd54
ZD
350{
351 enum rtx_code code = GET_CODE (e1);
352 int i, j;
353 const char *fmt;
57512f53 354 df_ref use1, use2;
1052bd54
ZD
355 struct invariant *inv1 = NULL, *inv2 = NULL;
356 rtx sub1, sub2;
357
358 /* If mode of only one of the operands is VOIDmode, it is not equivalent to
359 the other one. If both are VOIDmode, we rely on the caller of this
360 function to verify that their modes are the same. */
361 if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2))
362 return false;
363
364 switch (code)
365 {
d8116890 366 CASE_CONST_ANY:
1052bd54
ZD
367 case SYMBOL_REF:
368 case CONST:
369 case LABEL_REF:
370 return rtx_equal_p (e1, e2);
371
372 case REG:
6fb5fa3c
DB
373 use1 = df_find_use (insn1, e1);
374 use2 = df_find_use (insn2, e2);
1052bd54
ZD
375 if (use1)
376 inv1 = invariant_for_use (use1);
377 if (use2)
378 inv2 = invariant_for_use (use2);
379
380 if (!inv1 && !inv2)
381 return rtx_equal_p (e1, e2);
382
383 if (!inv1 || !inv2)
384 return false;
385
386 gcc_assert (inv1->eqto != ~0u);
387 gcc_assert (inv2->eqto != ~0u);
388 return inv1->eqto == inv2->eqto;
389
390 default:
391 break;
392 }
393
394 fmt = GET_RTX_FORMAT (code);
395 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
396 {
397 if (fmt[i] == 'e')
398 {
399 sub1 = XEXP (e1, i);
400 sub2 = XEXP (e2, i);
401
402 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
403 return false;
404 }
405
406 else if (fmt[i] == 'E')
407 {
408 if (XVECLEN (e1, i) != XVECLEN (e2, i))
409 return false;
410
411 for (j = 0; j < XVECLEN (e1, i); j++)
412 {
413 sub1 = XVECEXP (e1, i, j);
414 sub2 = XVECEXP (e2, i, j);
415
416 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
417 return false;
418 }
419 }
8e1409e8
ZD
420 else if (fmt[i] == 'i' || fmt[i] == 'n')
421 {
422 if (XINT (e1, i) != XINT (e2, i))
423 return false;
424 }
91914e56
RS
425 else if (fmt[i] == 'p')
426 {
427 if (maybe_ne (SUBREG_BYTE (e1), SUBREG_BYTE (e2)))
428 return false;
429 }
8e1409e8
ZD
430 /* Unhandled type of subexpression, we fail conservatively. */
431 else
432 return false;
1052bd54
ZD
433 }
434
435 return true;
436}
437
95fbe13e 438struct invariant_expr_hasher : free_ptr_hash <invariant_expr_entry>
1052bd54 439{
67f58944
TS
440 static inline hashval_t hash (const invariant_expr_entry *);
441 static inline bool equal (const invariant_expr_entry *,
442 const invariant_expr_entry *);
4a8fb1a1
LC
443};
444
445/* Returns hash value for invariant expression entry ENTRY. */
1052bd54 446
4a8fb1a1 447inline hashval_t
67f58944 448invariant_expr_hasher::hash (const invariant_expr_entry *entry)
4a8fb1a1 449{
1052bd54
ZD
450 return entry->hash;
451}
452
4a8fb1a1 453/* Compares invariant expression entries ENTRY1 and ENTRY2. */
1052bd54 454
4a8fb1a1 455inline bool
67f58944
TS
456invariant_expr_hasher::equal (const invariant_expr_entry *entry1,
457 const invariant_expr_entry *entry2)
1052bd54 458{
1052bd54
ZD
459 if (entry1->mode != entry2->mode)
460 return 0;
461
462 return invariant_expr_equal_p (entry1->inv->insn, entry1->expr,
463 entry2->inv->insn, entry2->expr);
464}
465
c203e8a7 466typedef hash_table<invariant_expr_hasher> invariant_htab_type;
4a8fb1a1 467
1052bd54
ZD
468/* Checks whether invariant with value EXPR in machine mode MODE is
469 recorded in EQ. If this is the case, return the invariant. Otherwise
470 insert INV to the table for this expression and return INV. */
471
472static struct invariant *
ef4bddc2 473find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode,
1052bd54
ZD
474 struct invariant *inv)
475{
476 hashval_t hash = hash_invariant_expr_1 (inv->insn, expr);
477 struct invariant_expr_entry *entry;
478 struct invariant_expr_entry pentry;
4a8fb1a1 479 invariant_expr_entry **slot;
1052bd54
ZD
480
481 pentry.expr = expr;
482 pentry.inv = inv;
483 pentry.mode = mode;
c203e8a7 484 slot = eq->find_slot_with_hash (&pentry, hash, INSERT);
4a8fb1a1 485 entry = *slot;
1052bd54
ZD
486
487 if (entry)
488 return entry->inv;
489
5ed6ace5 490 entry = XNEW (struct invariant_expr_entry);
1052bd54
ZD
491 entry->inv = inv;
492 entry->expr = expr;
493 entry->mode = mode;
494 entry->hash = hash;
495 *slot = entry;
496
497 return inv;
498}
499
500/* Finds invariants identical to INV and records the equivalence. EQ is the
501 hash table of the invariants. */
502
503static void
c203e8a7 504find_identical_invariants (invariant_htab_type *eq, struct invariant *inv)
1052bd54
ZD
505{
506 unsigned depno;
507 bitmap_iterator bi;
508 struct invariant *dep;
509 rtx expr, set;
ef4bddc2 510 machine_mode mode;
e42e3d15 511 struct invariant *tmp;
1052bd54
ZD
512
513 if (inv->eqto != ~0u)
514 return;
515
516 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
517 {
9771b263 518 dep = invariants[depno];
1052bd54
ZD
519 find_identical_invariants (eq, dep);
520 }
521
522 set = single_set (inv->insn);
523 expr = SET_SRC (set);
524 mode = GET_MODE (expr);
525 if (mode == VOIDmode)
526 mode = GET_MODE (SET_DEST (set));
e42e3d15
ZC
527
528 tmp = find_or_insert_inv (eq, expr, mode, inv);
529 inv->eqto = tmp->invno;
530
531 if (tmp->invno != inv->invno && inv->always_executed)
532 tmp->eqno++;
1052bd54
ZD
533
534 if (dump_file && inv->eqto != inv->invno)
535 fprintf (dump_file,
e755fcf5 536 "Invariant %d is equivalent to invariant %d.\n",
1052bd54
ZD
537 inv->invno, inv->eqto);
538}
539
540/* Find invariants with the same value and record the equivalences. */
541
542static void
543merge_identical_invariants (void)
544{
545 unsigned i;
546 struct invariant *inv;
c203e8a7 547 invariant_htab_type eq (invariants.length ());
1052bd54 548
9771b263 549 FOR_EACH_VEC_ELT (invariants, i, inv)
c203e8a7 550 find_identical_invariants (&eq, inv);
1052bd54
ZD
551}
552
5e962776
ZD
553/* Determines the basic blocks inside LOOP that are always executed and
554 stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of
555 basic blocks that may either exit the loop, or contain the call that
556 does not have to return. BODY is body of the loop obtained by
557 get_loop_body_in_dom_order. */
558
559static void
560compute_always_reached (struct loop *loop, basic_block *body,
561 bitmap may_exit, bitmap always_reached)
562{
563 unsigned i;
564
565 for (i = 0; i < loop->num_nodes; i++)
566 {
567 if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i]))
568 bitmap_set_bit (always_reached, i);
569
570 if (bitmap_bit_p (may_exit, i))
571 return;
572 }
573}
574
575/* Finds exits out of the LOOP with body BODY. Marks blocks in that we may
576 exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT
577 additionally mark blocks that may exit due to a call. */
578
579static void
580find_exits (struct loop *loop, basic_block *body,
581 bitmap may_exit, bitmap has_exit)
582{
583 unsigned i;
628f6a4e 584 edge_iterator ei;
5e962776
ZD
585 edge e;
586 struct loop *outermost_exit = loop, *aexit;
587 bool has_call = false;
89bfd6f5 588 rtx_insn *insn;
5e962776
ZD
589
590 for (i = 0; i < loop->num_nodes; i++)
591 {
592 if (body[i]->loop_father == loop)
593 {
594 FOR_BB_INSNS (body[i], insn)
595 {
4b4bf941 596 if (CALL_P (insn)
becfd6e5
KZ
597 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
598 || !RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
599 {
600 has_call = true;
601 bitmap_set_bit (may_exit, i);
602 break;
603 }
604 }
605
628f6a4e 606 FOR_EACH_EDGE (e, ei, body[i]->succs)
5e962776 607 {
964ef24c
RB
608 if (! flow_bb_inside_loop_p (loop, e->dest))
609 {
610 bitmap_set_bit (may_exit, i);
611 bitmap_set_bit (has_exit, i);
612 outermost_exit = find_common_loop (outermost_exit,
613 e->dest->loop_father);
614 }
615 /* If we enter a subloop that might never terminate treat
616 it like a possible exit. */
617 if (flow_loop_nested_p (loop, e->dest->loop_father))
618 bitmap_set_bit (may_exit, i);
5e962776
ZD
619 }
620 continue;
621 }
cb20f7e8 622
5e962776
ZD
623 /* Use the data stored for the subloop to decide whether we may exit
624 through it. It is sufficient to do this for header of the loop,
625 as other basic blocks inside it must be dominated by it. */
626 if (body[i]->loop_father->header != body[i])
627 continue;
628
629 if (LOOP_DATA (body[i]->loop_father)->has_call)
630 {
631 has_call = true;
632 bitmap_set_bit (may_exit, i);
633 }
634 aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit;
635 if (aexit != loop)
636 {
637 bitmap_set_bit (may_exit, i);
638 bitmap_set_bit (has_exit, i);
639
640 if (flow_loop_nested_p (aexit, outermost_exit))
641 outermost_exit = aexit;
642 }
643 }
644
1833192f
VM
645 if (loop->aux == NULL)
646 {
647 loop->aux = xcalloc (1, sizeof (struct loop_data));
648 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
649 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
650 }
5e962776
ZD
651 LOOP_DATA (loop)->outermost_exit = outermost_exit;
652 LOOP_DATA (loop)->has_call = has_call;
653}
654
655/* Check whether we may assign a value to X from a register. */
656
657static bool
658may_assign_reg_p (rtx x)
659{
bd361d85 660 return (GET_MODE (x) != VOIDmode
4b06592a 661 && GET_MODE (x) != BLKmode
bd361d85 662 && can_copy_p (GET_MODE (x))
7ee1f872
EB
663 /* Do not mess with the frame pointer adjustments that can
664 be generated e.g. by expand_builtin_setjmp_receiver. */
665 && x != frame_pointer_rtx
a7f4ccb1
SB
666 && (!REG_P (x)
667 || !HARD_REGISTER_P (x)
668 || REGNO_REG_CLASS (REGNO (x)) != NO_REGS));
5e962776
ZD
669}
670
cb20f7e8
ZD
671/* Finds definitions that may correspond to invariants in LOOP with body
672 BODY. */
5e962776
ZD
673
674static void
7be64667 675find_defs (struct loop *loop)
5e962776 676{
7b19209f
SB
677 if (dump_file)
678 {
679 fprintf (dump_file,
680 "*****starting processing of loop %d ******\n",
681 loop->num);
682 }
683
6fb5fa3c
DB
684 df_remove_problem (df_chain);
685 df_process_deferred_rescans ();
686 df_chain_add_problem (DF_UD_CHAIN);
43d56ad7
TP
687 df_live_add_problem ();
688 df_live_set_all_dirty ();
7b19209f 689 df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
7be64667 690 df_analyze_loop (loop);
7b19209f 691 check_invariant_table_size ();
6fb5fa3c
DB
692
693 if (dump_file)
694 {
ffd640ed 695 df_dump_region (dump_file);
7b19209f
SB
696 fprintf (dump_file,
697 "*****ending processing of loop %d ******\n",
698 loop->num);
6fb5fa3c 699 }
5e962776
ZD
700}
701
702/* Creates a new invariant for definition DEF in INSN, depending on invariants
703 in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed,
1052bd54
ZD
704 unless the program ends due to a function call. The newly created invariant
705 is returned. */
5e962776 706
1052bd54 707static struct invariant *
89bfd6f5 708create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on,
5e962776
ZD
709 bool always_executed)
710{
5ed6ace5 711 struct invariant *inv = XNEW (struct invariant);
5e962776 712 rtx set = single_set (insn);
f40751dd 713 bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
5e962776
ZD
714
715 inv->def = def;
716 inv->always_executed = always_executed;
717 inv->depends_on = depends_on;
718
719 /* If the set is simple, usually by moving it we move the whole store out of
720 the loop. Otherwise we save only cost of the computation. */
721 if (def)
1bfdbb29 722 {
d51102f3 723 inv->cost = set_rtx_cost (set, speed);
1578e910
MM
724 /* ??? Try to determine cheapness of address computation. Unfortunately
725 the address cost is only a relative measure, we can't really compare
726 it with any absolute number, but only with other address costs.
727 But here we don't have any other addresses, so compare with a magic
728 number anyway. It has to be large enough to not regress PR33928
729 (by avoiding to move reg+8,reg+16,reg+24 invariants), but small
730 enough to not regress 410.bwaves either (by still moving reg+reg
731 invariants).
732 See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */
315a349c
DS
733 if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set))))
734 inv->cheap_address = address_cost (SET_SRC (set), word_mode,
735 ADDR_SPACE_GENERIC, speed) < 3;
736 else
737 inv->cheap_address = false;
1bfdbb29 738 }
5e962776 739 else
1bfdbb29 740 {
e548c9df
AM
741 inv->cost = set_src_cost (SET_SRC (set), GET_MODE (SET_DEST (set)),
742 speed);
1bfdbb29
PB
743 inv->cheap_address = false;
744 }
5e962776
ZD
745
746 inv->move = false;
1052bd54 747 inv->reg = NULL_RTX;
1833192f 748 inv->orig_regno = -1;
5e962776
ZD
749 inv->stamp = 0;
750 inv->insn = insn;
751
9771b263 752 inv->invno = invariants.length ();
1052bd54 753 inv->eqto = ~0u;
e42e3d15
ZC
754
755 /* Itself. */
756 inv->eqno = 1;
757
5e962776
ZD
758 if (def)
759 def->invno = inv->invno;
9771b263 760 invariants.safe_push (inv);
5e962776
ZD
761
762 if (dump_file)
763 {
764 fprintf (dump_file,
765 "Set in insn %d is invariant (%d), cost %d, depends on ",
766 INSN_UID (insn), inv->invno, inv->cost);
767 dump_bitmap (dump_file, inv->depends_on);
768 }
1052bd54
ZD
769
770 return inv;
5e962776
ZD
771}
772
192912db
BC
773/* Return a canonical version of X for the address, from the point of view,
774 that all multiplications are represented as MULT instead of the multiply
775 by a power of 2 being represented as ASHIFT.
776
777 Callers should prepare a copy of X because this function may modify it
778 in place. */
779
780static void
781canonicalize_address_mult (rtx x)
782{
783 subrtx_var_iterator::array_type array;
784 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
785 {
786 rtx sub = *iter;
7c61657f
RS
787 scalar_int_mode sub_mode;
788 if (is_a <scalar_int_mode> (GET_MODE (sub), &sub_mode)
789 && GET_CODE (sub) == ASHIFT
192912db 790 && CONST_INT_P (XEXP (sub, 1))
7c61657f 791 && INTVAL (XEXP (sub, 1)) < GET_MODE_BITSIZE (sub_mode)
192912db
BC
792 && INTVAL (XEXP (sub, 1)) >= 0)
793 {
794 HOST_WIDE_INT shift = INTVAL (XEXP (sub, 1));
795 PUT_CODE (sub, MULT);
7c61657f 796 XEXP (sub, 1) = gen_int_mode (HOST_WIDE_INT_1 << shift, sub_mode);
192912db
BC
797 iter.skip_subrtxes ();
798 }
799 }
800}
801
802/* Maximum number of sub expressions in address. We set it to
803 a small integer since it's unlikely to have a complicated
804 address expression. */
805
806#define MAX_CANON_ADDR_PARTS (5)
807
808/* Collect sub expressions in address X with PLUS as the seperator.
809 Sub expressions are stored in vector ADDR_PARTS. */
810
811static void
812collect_address_parts (rtx x, vec<rtx> *addr_parts)
813{
814 subrtx_var_iterator::array_type array;
815 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
816 {
817 rtx sub = *iter;
818
819 if (GET_CODE (sub) != PLUS)
820 {
821 addr_parts->safe_push (sub);
822 iter.skip_subrtxes ();
823 }
824 }
825}
826
827/* Compare function for sorting sub expressions X and Y based on
828 precedence defined for communitive operations. */
829
830static int
831compare_address_parts (const void *x, const void *y)
832{
833 const rtx *rx = (const rtx *)x;
834 const rtx *ry = (const rtx *)y;
835 int px = commutative_operand_precedence (*rx);
836 int py = commutative_operand_precedence (*ry);
837
838 return (py - px);
839}
840
841/* Return a canonical version address for X by following steps:
842 1) Rewrite ASHIFT into MULT recursively.
843 2) Divide address into sub expressions with PLUS as the
844 separator.
845 3) Sort sub expressions according to precedence defined
846 for communative operations.
847 4) Simplify CONST_INT_P sub expressions.
848 5) Create new canonicalized address and return.
849 Callers should prepare a copy of X because this function may
850 modify it in place. */
851
852static rtx
853canonicalize_address (rtx x)
854{
855 rtx res;
856 unsigned int i, j;
857 machine_mode mode = GET_MODE (x);
858 auto_vec<rtx, MAX_CANON_ADDR_PARTS> addr_parts;
859
860 /* Rewrite ASHIFT into MULT. */
861 canonicalize_address_mult (x);
862 /* Divide address into sub expressions. */
863 collect_address_parts (x, &addr_parts);
864 /* Unlikely to have very complicated address. */
865 if (addr_parts.length () < 2
866 || addr_parts.length () > MAX_CANON_ADDR_PARTS)
867 return x;
868
869 /* Sort sub expressions according to canonicalization precedence. */
870 addr_parts.qsort (compare_address_parts);
871
872 /* Simplify all constant int summary if possible. */
873 for (i = 0; i < addr_parts.length (); i++)
874 if (CONST_INT_P (addr_parts[i]))
875 break;
876
877 for (j = i + 1; j < addr_parts.length (); j++)
878 {
879 gcc_assert (CONST_INT_P (addr_parts[j]));
880 addr_parts[i] = simplify_gen_binary (PLUS, mode,
881 addr_parts[i],
882 addr_parts[j]);
883 }
884
885 /* Chain PLUS operators to the left for !CONST_INT_P sub expressions. */
886 res = addr_parts[0];
887 for (j = 1; j < i; j++)
888 res = simplify_gen_binary (PLUS, mode, res, addr_parts[j]);
889
890 /* Pickup the last CONST_INT_P sub expression. */
891 if (i < addr_parts.length ())
892 res = simplify_gen_binary (PLUS, mode, res, addr_parts[i]);
893
894 return res;
895}
896
5b92e189
BC
897/* Given invariant DEF and its address USE, check if the corresponding
898 invariant expr can be propagated into the use or not. */
899
900static bool
901inv_can_prop_to_addr_use (struct def *def, df_ref use)
902{
903 struct invariant *inv;
192912db 904 rtx *pos = DF_REF_REAL_LOC (use), def_set, use_set;
5b92e189
BC
905 rtx_insn *use_insn = DF_REF_INSN (use);
906 rtx_insn *def_insn;
907 bool ok;
908
909 inv = invariants[def->invno];
910 /* No need to check if address expression is expensive. */
911 if (!inv->cheap_address)
912 return false;
913
914 def_insn = inv->insn;
915 def_set = single_set (def_insn);
916 if (!def_set)
917 return false;
918
919 validate_unshare_change (use_insn, pos, SET_SRC (def_set), true);
920 ok = verify_changes (0);
192912db
BC
921 /* Try harder with canonicalization in address expression. */
922 if (!ok && (use_set = single_set (use_insn)) != NULL_RTX)
923 {
924 rtx src, dest, mem = NULL_RTX;
925
926 src = SET_SRC (use_set);
927 dest = SET_DEST (use_set);
928 if (MEM_P (src))
929 mem = src;
930 else if (MEM_P (dest))
931 mem = dest;
932
933 if (mem != NULL_RTX
934 && !memory_address_addr_space_p (GET_MODE (mem),
935 XEXP (mem, 0),
936 MEM_ADDR_SPACE (mem)))
937 {
938 rtx addr = canonicalize_address (copy_rtx (XEXP (mem, 0)));
939 if (memory_address_addr_space_p (GET_MODE (mem),
940 addr, MEM_ADDR_SPACE (mem)))
941 ok = true;
942 }
943 }
5b92e189
BC
944 cancel_changes (0);
945 return ok;
946}
947
5e962776
ZD
948/* Record USE at DEF. */
949
950static void
1bfdbb29 951record_use (struct def *def, df_ref use)
5e962776 952{
5ed6ace5 953 struct use *u = XNEW (struct use);
5e962776 954
1bfdbb29
PB
955 u->pos = DF_REF_REAL_LOC (use);
956 u->insn = DF_REF_INSN (use);
957 u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD
3e807ffc 958 || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE);
5e962776
ZD
959 u->next = def->uses;
960 def->uses = u;
961 def->n_uses++;
1bfdbb29 962 if (u->addr_use_p)
5b92e189
BC
963 {
964 /* Initialize propagation information if this is the first addr
965 use of the inv def. */
966 if (def->n_addr_uses == 0)
967 def->can_prop_to_addr_uses = true;
968
969 def->n_addr_uses++;
970 if (def->can_prop_to_addr_uses && !inv_can_prop_to_addr_use (def, use))
971 def->can_prop_to_addr_uses = false;
972 }
5e962776
ZD
973}
974
6fb5fa3c
DB
975/* Finds the invariants USE depends on and store them to the DEPENDS_ON
976 bitmap. Returns true if all dependencies of USE are known to be
b6c9b9bc 977 loop invariants, false otherwise. */
5e962776
ZD
978
979static bool
57512f53 980check_dependency (basic_block bb, df_ref use, bitmap depends_on)
5e962776 981{
57512f53 982 df_ref def;
6fb5fa3c 983 basic_block def_bb;
4d779342 984 struct df_link *defs;
5e962776 985 struct def *def_data;
1052bd54 986 struct invariant *inv;
b8698a0f 987
57512f53 988 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
6fb5fa3c 989 return false;
b8698a0f 990
6fb5fa3c
DB
991 defs = DF_REF_CHAIN (use);
992 if (!defs)
1a17bd35
EB
993 {
994 unsigned int regno = DF_REF_REGNO (use);
995
996 /* If this is the use of an uninitialized argument register that is
997 likely to be spilled, do not move it lest this might extend its
998 lifetime and cause reload to die. This can occur for a call to
999 a function taking complex number arguments and moving the insns
1000 preparing the arguments without moving the call itself wouldn't
1001 gain much in practice. */
1002 if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE)
1003 && FUNCTION_ARG_REGNO_P (regno)
1004 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
1005 return false;
1006
1007 return true;
1008 }
b8698a0f 1009
6fb5fa3c
DB
1010 if (defs->next)
1011 return false;
b8698a0f 1012
6fb5fa3c
DB
1013 def = defs->ref;
1014 check_invariant_table_size ();
c3284718 1015 inv = invariant_table[DF_REF_ID (def)];
6fb5fa3c
DB
1016 if (!inv)
1017 return false;
b8698a0f 1018
6fb5fa3c
DB
1019 def_data = inv->def;
1020 gcc_assert (def_data != NULL);
b8698a0f 1021
6fb5fa3c
DB
1022 def_bb = DF_REF_BB (def);
1023 /* Note that in case bb == def_bb, we know that the definition
1024 dominates insn, because def has invariant_table[DF_REF_ID(def)]
1025 defined and we process the insns in the basic block bb
1026 sequentially. */
1027 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
1028 return false;
b8698a0f 1029
6fb5fa3c
DB
1030 bitmap_set_bit (depends_on, def_data->invno);
1031 return true;
1032}
1052bd54 1033
1052bd54 1034
6fb5fa3c
DB
1035/* Finds the invariants INSN depends on and store them to the DEPENDS_ON
1036 bitmap. Returns true if all dependencies of INSN are known to be
1037 loop invariants, false otherwise. */
5e962776 1038
6fb5fa3c 1039static bool
89bfd6f5 1040check_dependencies (rtx_insn *insn, bitmap depends_on)
6fb5fa3c 1041{
50e94c7e 1042 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 1043 df_ref use;
6fb5fa3c 1044 basic_block bb = BLOCK_FOR_INSN (insn);
5e962776 1045
bfac633a
RS
1046 FOR_EACH_INSN_INFO_USE (use, insn_info)
1047 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 1048 return false;
bfac633a
RS
1049 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
1050 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 1051 return false;
b8698a0f 1052
5e962776
ZD
1053 return true;
1054}
1055
2c97f472
ZC
1056/* Pre-check candidate DEST to skip the one which can not make a valid insn
1057 during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */
1058static bool
1059pre_check_invariant_p (bool simple, rtx dest)
1060{
1061 if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1)
1062 {
1063 df_ref use;
2c97f472
ZC
1064 unsigned int i = REGNO (dest);
1065 struct df_insn_info *insn_info;
1066 df_ref def_rec;
1067
1068 for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use))
1069 {
e67d1102 1070 rtx_insn *ref = DF_REF_INSN (use);
2c97f472
ZC
1071 insn_info = DF_INSN_INFO_GET (ref);
1072
1073 FOR_EACH_INSN_INFO_DEF (def_rec, insn_info)
1074 if (DF_REF_REGNO (def_rec) == i)
1075 {
1076 /* Multi definitions at this stage, most likely are due to
1077 instruction constraints, which requires both read and write
1078 on the same register. Since move_invariant_reg is not
1079 powerful enough to handle such cases, just ignore the INV
1080 and leave the chance to others. */
1081 return false;
1082 }
1083 }
1084 }
1085 return true;
1086}
1087
5e962776
ZD
1088/* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always
1089 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 1090 unless the program ends due to a function call. */
5e962776
ZD
1091
1092static void
89bfd6f5 1093find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed)
5e962776 1094{
57512f53 1095 df_ref ref;
5e962776
ZD
1096 struct def *def;
1097 bitmap depends_on;
1098 rtx set, dest;
1099 bool simple = true;
1052bd54 1100 struct invariant *inv;
5e962776 1101
00f70f98 1102 /* We can't move a CC0 setter without the user. */
058eb3b0 1103 if (HAVE_cc0 && sets_cc0_p (insn))
00f70f98 1104 return;
00f70f98 1105
5e962776
ZD
1106 set = single_set (insn);
1107 if (!set)
1108 return;
1109 dest = SET_DEST (set);
1110
2ca202e7 1111 if (!REG_P (dest)
5e962776
ZD
1112 || HARD_REGISTER_P (dest))
1113 simple = false;
1114
2c97f472
ZC
1115 if (!may_assign_reg_p (dest)
1116 || !pre_check_invariant_p (simple, dest)
a7f4ccb1 1117 || !check_maybe_invariant (SET_SRC (set)))
5e962776
ZD
1118 return;
1119
28749cfb
ZD
1120 /* If the insn can throw exception, we cannot move it at all without changing
1121 cfg. */
1122 if (can_throw_internal (insn))
1123 return;
5e962776 1124
28749cfb 1125 /* We cannot make trapping insn executed, unless it was executed before. */
48e8382e 1126 if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached)
28749cfb 1127 return;
5e962776 1128
8bdbfff5 1129 depends_on = BITMAP_ALLOC (NULL);
cb20f7e8 1130 if (!check_dependencies (insn, depends_on))
5e962776 1131 {
8bdbfff5 1132 BITMAP_FREE (depends_on);
5e962776
ZD
1133 return;
1134 }
1135
1136 if (simple)
5ed6ace5 1137 def = XCNEW (struct def);
5e962776
ZD
1138 else
1139 def = NULL;
1140
1052bd54
ZD
1141 inv = create_new_invariant (def, insn, depends_on, always_executed);
1142
1143 if (simple)
1144 {
6fb5fa3c
DB
1145 ref = df_find_def (insn, dest);
1146 check_invariant_table_size ();
c3284718 1147 invariant_table[DF_REF_ID (ref)] = inv;
1052bd54 1148 }
5e962776
ZD
1149}
1150
cb20f7e8 1151/* Record registers used in INSN that have a unique invariant definition. */
5e962776
ZD
1152
1153static void
89bfd6f5 1154record_uses (rtx_insn *insn)
5e962776 1155{
50e94c7e 1156 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 1157 df_ref use;
1052bd54
ZD
1158 struct invariant *inv;
1159
bfac633a 1160 FOR_EACH_INSN_INFO_USE (use, insn_info)
6fb5fa3c 1161 {
6fb5fa3c
DB
1162 inv = invariant_for_use (use);
1163 if (inv)
1bfdbb29 1164 record_use (inv->def, use);
6fb5fa3c 1165 }
bfac633a 1166 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
5e962776 1167 {
1052bd54
ZD
1168 inv = invariant_for_use (use);
1169 if (inv)
1bfdbb29 1170 record_use (inv->def, use);
5e962776
ZD
1171 }
1172}
1173
1174/* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always
1175 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 1176 unless the program ends due to a function call. */
5e962776
ZD
1177
1178static void
89bfd6f5 1179find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed)
5e962776 1180{
cb20f7e8
ZD
1181 find_invariant_insn (insn, always_reached, always_executed);
1182 record_uses (insn);
5e962776
ZD
1183}
1184
1185/* Finds invariants in basic block BB. ALWAYS_REACHED is true if the
1186 basic block is always executed. ALWAYS_EXECUTED is true if the basic
1187 block is always executed, unless the program ends due to a function
cb20f7e8 1188 call. */
5e962776
ZD
1189
1190static void
cb20f7e8 1191find_invariants_bb (basic_block bb, bool always_reached, bool always_executed)
5e962776 1192{
89bfd6f5 1193 rtx_insn *insn;
5e962776
ZD
1194
1195 FOR_BB_INSNS (bb, insn)
1196 {
b5b8b0ac 1197 if (!NONDEBUG_INSN_P (insn))
5e962776
ZD
1198 continue;
1199
cb20f7e8 1200 find_invariants_insn (insn, always_reached, always_executed);
5e962776
ZD
1201
1202 if (always_reached
4b4bf941 1203 && CALL_P (insn)
becfd6e5
KZ
1204 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
1205 || ! RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
1206 always_reached = false;
1207 }
1208}
1209
1210/* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of
1211 basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the
1212 bitmap of basic blocks in BODY that are always executed unless the program
cb20f7e8 1213 ends due to a function call. */
5e962776
ZD
1214
1215static void
1216find_invariants_body (struct loop *loop, basic_block *body,
cb20f7e8 1217 bitmap always_reached, bitmap always_executed)
5e962776
ZD
1218{
1219 unsigned i;
1220
1221 for (i = 0; i < loop->num_nodes; i++)
1222 find_invariants_bb (body[i],
1223 bitmap_bit_p (always_reached, i),
cb20f7e8 1224 bitmap_bit_p (always_executed, i));
5e962776
ZD
1225}
1226
cb20f7e8 1227/* Finds invariants in LOOP. */
5e962776
ZD
1228
1229static void
cb20f7e8 1230find_invariants (struct loop *loop)
5e962776 1231{
0e3de1d4
TS
1232 auto_bitmap may_exit;
1233 auto_bitmap always_reached;
1234 auto_bitmap has_exit;
1235 auto_bitmap always_executed;
5e962776
ZD
1236 basic_block *body = get_loop_body_in_dom_order (loop);
1237
1238 find_exits (loop, body, may_exit, has_exit);
1239 compute_always_reached (loop, body, may_exit, always_reached);
1240 compute_always_reached (loop, body, has_exit, always_executed);
1241
7be64667 1242 find_defs (loop);
cb20f7e8 1243 find_invariants_body (loop, body, always_reached, always_executed);
1052bd54 1244 merge_identical_invariants ();
5e962776 1245
5e962776
ZD
1246 free (body);
1247}
1248
1249/* Frees a list of uses USE. */
1250
1251static void
1252free_use_list (struct use *use)
1253{
1254 struct use *next;
1255
1256 for (; use; use = next)
1257 {
1258 next = use->next;
1259 free (use);
1260 }
1261}
1262
1756cb66 1263/* Return pressure class and number of hard registers (through *NREGS)
1833192f
VM
1264 for destination of INSN. */
1265static enum reg_class
89bfd6f5 1266get_pressure_class_and_nregs (rtx_insn *insn, int *nregs)
1833192f
VM
1267{
1268 rtx reg;
1756cb66 1269 enum reg_class pressure_class;
1833192f 1270 rtx set = single_set (insn);
b8698a0f 1271
1833192f
VM
1272 /* Considered invariant insns have only one set. */
1273 gcc_assert (set != NULL_RTX);
1274 reg = SET_DEST (set);
1275 if (GET_CODE (reg) == SUBREG)
1276 reg = SUBREG_REG (reg);
1277 if (MEM_P (reg))
1278 {
1279 *nregs = 0;
1756cb66 1280 pressure_class = NO_REGS;
1833192f
VM
1281 }
1282 else
1283 {
1284 if (! REG_P (reg))
1285 reg = NULL_RTX;
1286 if (reg == NULL_RTX)
1756cb66 1287 pressure_class = GENERAL_REGS;
1833192f 1288 else
1756cb66
VM
1289 {
1290 pressure_class = reg_allocno_class (REGNO (reg));
1291 pressure_class = ira_pressure_class_translate[pressure_class];
1292 }
1293 *nregs
1294 = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))];
1833192f 1295 }
1756cb66 1296 return pressure_class;
1833192f
VM
1297}
1298
5e962776 1299/* Calculates cost and number of registers needed for moving invariant INV
51a69168
ZC
1300 out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be
1301 the REG_CLASS of INV. Return
1302 -1: if INV is invalid.
1303 0: if INV and its depends_on have same reg_class
1304 1: if INV and its depends_on have different reg_classes. */
5e962776 1305
51a69168
ZC
1306static int
1307get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed,
1308 enum reg_class *cl)
5e962776 1309{
1833192f
VM
1310 int i, acomp_cost;
1311 unsigned aregs_needed[N_REG_CLASSES];
5e962776
ZD
1312 unsigned depno;
1313 struct invariant *dep;
87c476a2 1314 bitmap_iterator bi;
51a69168 1315 int ret = 1;
5e962776 1316
1052bd54 1317 /* Find the representative of the class of the equivalent invariants. */
9771b263 1318 inv = invariants[inv->eqto];
1052bd54 1319
5e962776 1320 *comp_cost = 0;
1833192f
VM
1321 if (! flag_ira_loop_pressure)
1322 regs_needed[0] = 0;
1323 else
1324 {
1756cb66
VM
1325 for (i = 0; i < ira_pressure_classes_num; i++)
1326 regs_needed[ira_pressure_classes[i]] = 0;
1833192f
VM
1327 }
1328
5e962776
ZD
1329 if (inv->move
1330 || inv->stamp == actual_stamp)
51a69168 1331 return -1;
5e962776
ZD
1332 inv->stamp = actual_stamp;
1333
1833192f
VM
1334 if (! flag_ira_loop_pressure)
1335 regs_needed[0]++;
1336 else
1337 {
1338 int nregs;
1756cb66 1339 enum reg_class pressure_class;
1833192f 1340
1756cb66
VM
1341 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1342 regs_needed[pressure_class] += nregs;
51a69168
ZC
1343 *cl = pressure_class;
1344 ret = 0;
1833192f
VM
1345 }
1346
1bfdbb29 1347 if (!inv->cheap_address
315a349c 1348 || inv->def->n_uses == 0
5b92e189
BC
1349 || inv->def->n_addr_uses < inv->def->n_uses
1350 /* Count cost if the inv can't be propagated into address uses. */
1351 || !inv->def->can_prop_to_addr_uses)
e42e3d15 1352 (*comp_cost) += inv->cost * inv->eqno;
5e962776 1353
3d8504ac
RS
1354#ifdef STACK_REGS
1355 {
1356 /* Hoisting constant pool constants into stack regs may cost more than
1357 just single register. On x87, the balance is affected both by the
c0220ea4 1358 small number of FP registers, and by its register stack organization,
3d8504ac
RS
1359 that forces us to add compensation code in and around the loop to
1360 shuffle the operands to the top of stack before use, and pop them
1361 from the stack after the loop finishes.
1362
1363 To model this effect, we increase the number of registers needed for
1364 stack registers by two: one register push, and one register pop.
1365 This usually has the effect that FP constant loads from the constant
1366 pool are not moved out of the loop.
1367
1368 Note that this also means that dependent invariants can not be moved.
1369 However, the primary purpose of this pass is to move loop invariant
1370 address arithmetic out of loops, and address arithmetic that depends
1371 on floating point constants is unlikely to ever occur. */
1372 rtx set = single_set (inv->insn);
1373 if (set
1833192f
VM
1374 && IS_STACK_MODE (GET_MODE (SET_SRC (set)))
1375 && constant_pool_constant_p (SET_SRC (set)))
1376 {
1377 if (flag_ira_loop_pressure)
1756cb66 1378 regs_needed[ira_stack_reg_pressure_class] += 2;
1833192f
VM
1379 else
1380 regs_needed[0] += 2;
1381 }
3d8504ac
RS
1382 }
1383#endif
1384
87c476a2 1385 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
5e962776 1386 {
1833192f 1387 bool check_p;
51a69168
ZC
1388 enum reg_class dep_cl = ALL_REGS;
1389 int dep_ret;
1833192f 1390
9771b263 1391 dep = invariants[depno];
5e962776 1392
61fc05c7
ZC
1393 /* If DEP is moved out of the loop, it is not a depends_on any more. */
1394 if (dep->move)
1395 continue;
1396
51a69168 1397 dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl);
5e962776 1398
1833192f
VM
1399 if (! flag_ira_loop_pressure)
1400 check_p = aregs_needed[0] != 0;
1401 else
1402 {
1756cb66
VM
1403 for (i = 0; i < ira_pressure_classes_num; i++)
1404 if (aregs_needed[ira_pressure_classes[i]] != 0)
1833192f 1405 break;
1756cb66 1406 check_p = i < ira_pressure_classes_num;
51a69168
ZC
1407
1408 if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl)))
1409 {
1410 *cl = ALL_REGS;
1411 ret = 1;
1412 }
1833192f
VM
1413 }
1414 if (check_p
5e962776
ZD
1415 /* We need to check always_executed, since if the original value of
1416 the invariant may be preserved, we may need to keep it in a
1417 separate register. TODO check whether the register has an
1418 use outside of the loop. */
1419 && dep->always_executed
1420 && !dep->def->uses->next)
1421 {
1422 /* If this is a single use, after moving the dependency we will not
1423 need a new register. */
1833192f
VM
1424 if (! flag_ira_loop_pressure)
1425 aregs_needed[0]--;
1426 else
1427 {
1428 int nregs;
1756cb66 1429 enum reg_class pressure_class;
1833192f 1430
1756cb66
VM
1431 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1432 aregs_needed[pressure_class] -= nregs;
1833192f 1433 }
5e962776
ZD
1434 }
1435
1833192f
VM
1436 if (! flag_ira_loop_pressure)
1437 regs_needed[0] += aregs_needed[0];
1438 else
1439 {
1756cb66
VM
1440 for (i = 0; i < ira_pressure_classes_num; i++)
1441 regs_needed[ira_pressure_classes[i]]
1442 += aregs_needed[ira_pressure_classes[i]];
1833192f 1443 }
5e962776 1444 (*comp_cost) += acomp_cost;
87c476a2 1445 }
51a69168 1446 return ret;
5e962776
ZD
1447}
1448
1449/* Calculates gain for eliminating invariant INV. REGS_USED is the number
a154b43a
ZD
1450 of registers used in the loop, NEW_REGS is the number of new variables
1451 already added due to the invariant motion. The number of registers needed
bec922f0
SL
1452 for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed
1453 through to estimate_reg_pressure_cost. */
5e962776
ZD
1454
1455static int
1456gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
bec922f0
SL
1457 unsigned *new_regs, unsigned regs_used,
1458 bool speed, bool call_p)
5e962776
ZD
1459{
1460 int comp_cost, size_cost;
e54bd4ab
JJ
1461 /* Workaround -Wmaybe-uninitialized false positive during
1462 profiledbootstrap by initializing it. */
1463 enum reg_class cl = NO_REGS;
51a69168 1464 int ret;
5e962776 1465
5e962776
ZD
1466 actual_stamp++;
1467
51a69168 1468 ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl);
1833192f
VM
1469
1470 if (! flag_ira_loop_pressure)
1471 {
1472 size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0],
bec922f0 1473 regs_used, speed, call_p)
1833192f 1474 - estimate_reg_pressure_cost (new_regs[0],
bec922f0 1475 regs_used, speed, call_p));
1833192f 1476 }
51a69168
ZC
1477 else if (ret < 0)
1478 return -1;
1479 else if ((ret == 0) && (cl == NO_REGS))
1480 /* Hoist it anyway since it does not impact register pressure. */
1481 return 1;
1833192f
VM
1482 else
1483 {
1484 int i;
1756cb66 1485 enum reg_class pressure_class;
1833192f 1486
1756cb66 1487 for (i = 0; i < ira_pressure_classes_num; i++)
1833192f 1488 {
1756cb66 1489 pressure_class = ira_pressure_classes[i];
51a69168
ZC
1490
1491 if (!reg_classes_intersect_p (pressure_class, cl))
1492 continue;
1493
1756cb66
VM
1494 if ((int) new_regs[pressure_class]
1495 + (int) regs_needed[pressure_class]
1496 + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1833192f 1497 + IRA_LOOP_RESERVED_REGS
f508f827 1498 > ira_class_hard_regs_num[pressure_class])
1833192f
VM
1499 break;
1500 }
1756cb66 1501 if (i < ira_pressure_classes_num)
1833192f
VM
1502 /* There will be register pressure excess and we want not to
1503 make this loop invariant motion. All loop invariants with
1504 non-positive gains will be rejected in function
1505 find_invariants_to_move. Therefore we return the negative
1506 number here.
1507
1508 One could think that this rejects also expensive loop
1509 invariant motions and this will hurt code performance.
1510 However numerous experiments with different heuristics
1511 taking invariant cost into account did not confirm this
1512 assumption. There are possible explanations for this
1513 result:
1514 o probably all expensive invariants were already moved out
1515 of the loop by PRE and gimple invariant motion pass.
1516 o expensive invariant execution will be hidden by insn
1517 scheduling or OOO processor hardware because usually such
1518 invariants have a lot of freedom to be executed
1519 out-of-order.
1520 Another reason for ignoring invariant cost vs spilling cost
1521 heuristics is also in difficulties to evaluate accurately
1522 spill cost at this stage. */
1523 return -1;
1524 else
1525 size_cost = 0;
1526 }
5e962776
ZD
1527
1528 return comp_cost - size_cost;
1529}
1530
1531/* Finds invariant with best gain for moving. Returns the gain, stores
1532 the invariant in *BEST and number of registers needed for it to
a154b43a
ZD
1533 *REGS_NEEDED. REGS_USED is the number of registers used in the loop.
1534 NEW_REGS is the number of new variables already added due to invariant
1535 motion. */
5e962776
ZD
1536
1537static int
1538best_gain_for_invariant (struct invariant **best, unsigned *regs_needed,
bec922f0
SL
1539 unsigned *new_regs, unsigned regs_used,
1540 bool speed, bool call_p)
5e962776
ZD
1541{
1542 struct invariant *inv;
1833192f
VM
1543 int i, gain = 0, again;
1544 unsigned aregs_needed[N_REG_CLASSES], invno;
5e962776 1545
9771b263 1546 FOR_EACH_VEC_ELT (invariants, invno, inv)
5e962776 1547 {
5e962776
ZD
1548 if (inv->move)
1549 continue;
1550
1052bd54
ZD
1551 /* Only consider the "representatives" of equivalent invariants. */
1552 if (inv->eqto != inv->invno)
1553 continue;
1554
1833192f 1555 again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used,
bec922f0 1556 speed, call_p);
5e962776
ZD
1557 if (again > gain)
1558 {
1559 gain = again;
1560 *best = inv;
1833192f
VM
1561 if (! flag_ira_loop_pressure)
1562 regs_needed[0] = aregs_needed[0];
1563 else
1564 {
1756cb66
VM
1565 for (i = 0; i < ira_pressure_classes_num; i++)
1566 regs_needed[ira_pressure_classes[i]]
1567 = aregs_needed[ira_pressure_classes[i]];
1833192f 1568 }
5e962776
ZD
1569 }
1570 }
1571
1572 return gain;
1573}
1574
1575/* Marks invariant INVNO and all its dependencies for moving. */
1576
1577static void
1833192f 1578set_move_mark (unsigned invno, int gain)
5e962776 1579{
9771b263 1580 struct invariant *inv = invariants[invno];
87c476a2 1581 bitmap_iterator bi;
5e962776 1582
1052bd54 1583 /* Find the representative of the class of the equivalent invariants. */
9771b263 1584 inv = invariants[inv->eqto];
1052bd54 1585
5e962776
ZD
1586 if (inv->move)
1587 return;
1588 inv->move = true;
1589
1590 if (dump_file)
1833192f
VM
1591 {
1592 if (gain >= 0)
1593 fprintf (dump_file, "Decided to move invariant %d -- gain %d\n",
1594 invno, gain);
1595 else
1596 fprintf (dump_file, "Decided to move dependent invariant %d\n",
1597 invno);
1598 };
5e962776 1599
87c476a2
ZD
1600 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi)
1601 {
1833192f 1602 set_move_mark (invno, -1);
87c476a2 1603 }
5e962776
ZD
1604}
1605
cb20f7e8 1606/* Determines which invariants to move. */
5e962776
ZD
1607
1608static void
bec922f0 1609find_invariants_to_move (bool speed, bool call_p)
5e962776 1610{
1833192f
VM
1611 int gain;
1612 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES];
5e962776
ZD
1613 struct invariant *inv = NULL;
1614
9771b263 1615 if (!invariants.length ())
5e962776
ZD
1616 return;
1617
1833192f 1618 if (flag_ira_loop_pressure)
b8698a0f 1619 /* REGS_USED is actually never used when the flag is on. */
1833192f
VM
1620 regs_used = 0;
1621 else
1622 /* We do not really do a good job in estimating number of
1623 registers used; we put some initial bound here to stand for
1624 induction variables etc. that we do not detect. */
5e962776 1625 {
1833192f
VM
1626 unsigned int n_regs = DF_REG_SIZE (df);
1627
1628 regs_used = 2;
b8698a0f 1629
1833192f 1630 for (i = 0; i < n_regs; i++)
5e962776 1631 {
1833192f
VM
1632 if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i))
1633 {
1634 /* This is a value that is used but not changed inside loop. */
1635 regs_used++;
1636 }
5e962776
ZD
1637 }
1638 }
1639
1833192f
VM
1640 if (! flag_ira_loop_pressure)
1641 new_regs[0] = regs_needed[0] = 0;
1642 else
5e962776 1643 {
1756cb66
VM
1644 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1645 new_regs[ira_pressure_classes[i]] = 0;
1833192f
VM
1646 }
1647 while ((gain = best_gain_for_invariant (&inv, regs_needed,
bec922f0
SL
1648 new_regs, regs_used,
1649 speed, call_p)) > 0)
1833192f
VM
1650 {
1651 set_move_mark (inv->invno, gain);
1652 if (! flag_ira_loop_pressure)
1653 new_regs[0] += regs_needed[0];
1654 else
1655 {
1756cb66
VM
1656 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1657 new_regs[ira_pressure_classes[i]]
1658 += regs_needed[ira_pressure_classes[i]];
1833192f 1659 }
5e962776
ZD
1660 }
1661}
1662
43ba743c
EB
1663/* Replace the uses, reached by the definition of invariant INV, by REG.
1664
1665 IN_GROUP is nonzero if this is part of a group of changes that must be
1666 performed as a group. In that case, the changes will be stored. The
1667 function `apply_change_group' will validate and apply the changes. */
1668
1669static int
1670replace_uses (struct invariant *inv, rtx reg, bool in_group)
1671{
1672 /* Replace the uses we know to be dominated. It saves work for copy
1673 propagation, and also it is necessary so that dependent invariants
1674 are computed right. */
1675 if (inv->def)
1676 {
1677 struct use *use;
1678 for (use = inv->def->uses; use; use = use->next)
1679 validate_change (use->insn, use->pos, reg, true);
1680
1681 /* If we aren't part of a larger group, apply the changes now. */
1682 if (!in_group)
1683 return apply_change_group ();
1684 }
1685
1686 return 1;
1687}
1688
aa953e2f
TP
1689/* Whether invariant INV setting REG can be moved out of LOOP, at the end of
1690 the block preceding its header. */
1691
1692static bool
1693can_move_invariant_reg (struct loop *loop, struct invariant *inv, rtx reg)
1694{
1695 df_ref def, use;
1696 unsigned int dest_regno, defs_in_loop_count = 0;
1697 rtx_insn *insn = inv->insn;
1698 basic_block bb = BLOCK_FOR_INSN (inv->insn);
1699
1700 /* We ignore hard register and memory access for cost and complexity reasons.
1701 Hard register are few at this stage and expensive to consider as they
1702 require building a separate data flow. Memory access would require using
1703 df_simulate_* and can_move_insns_across functions and is more complex. */
1704 if (!REG_P (reg) || HARD_REGISTER_P (reg))
1705 return false;
1706
1707 /* Check whether the set is always executed. We could omit this condition if
1708 we know that the register is unused outside of the loop, but it does not
1709 seem worth finding out. */
1710 if (!inv->always_executed)
1711 return false;
1712
1713 /* Check that all uses that would be dominated by def are already dominated
1714 by it. */
1715 dest_regno = REGNO (reg);
1716 for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use))
1717 {
1718 rtx_insn *use_insn;
1719 basic_block use_bb;
1720
1721 use_insn = DF_REF_INSN (use);
1722 use_bb = BLOCK_FOR_INSN (use_insn);
1723
1724 /* Ignore instruction considered for moving. */
1725 if (use_insn == insn)
1726 continue;
1727
1728 /* Don't consider uses outside loop. */
1729 if (!flow_bb_inside_loop_p (loop, use_bb))
1730 continue;
1731
1732 /* Don't move if a use is not dominated by def in insn. */
1733 if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn))
1734 return false;
1735 if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb))
1736 return false;
1737 }
1738
1739 /* Check for other defs. Any other def in the loop might reach a use
1740 currently reached by the def in insn. */
1741 for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def))
1742 {
1743 basic_block def_bb = DF_REF_BB (def);
1744
1745 /* Defs in exit block cannot reach a use they weren't already. */
1746 if (single_succ_p (def_bb))
1747 {
1748 basic_block def_bb_succ;
1749
1750 def_bb_succ = single_succ (def_bb);
1751 if (!flow_bb_inside_loop_p (loop, def_bb_succ))
1752 continue;
1753 }
1754
1755 if (++defs_in_loop_count > 1)
1756 return false;
1757 }
1758
1759 return true;
1760}
1761
ba946209
ZD
1762/* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false
1763 otherwise. */
1764
1765static bool
cb20f7e8 1766move_invariant_reg (struct loop *loop, unsigned invno)
5e962776 1767{
9771b263
DN
1768 struct invariant *inv = invariants[invno];
1769 struct invariant *repr = invariants[inv->eqto];
5e962776
ZD
1770 unsigned i;
1771 basic_block preheader = loop_preheader_edge (loop)->src;
90b1c344 1772 rtx reg, set, dest, note;
87c476a2 1773 bitmap_iterator bi;
43ba743c 1774 int regno = -1;
5e962776 1775
ba946209
ZD
1776 if (inv->reg)
1777 return true;
1778 if (!repr->move)
1779 return false;
43ba743c 1780
1052bd54
ZD
1781 /* If this is a representative of the class of equivalent invariants,
1782 really move the invariant. Otherwise just replace its use with
1783 the register used for the representative. */
1784 if (inv == repr)
5e962776 1785 {
1052bd54 1786 if (inv->depends_on)
5e962776 1787 {
1052bd54
ZD
1788 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi)
1789 {
ba946209
ZD
1790 if (!move_invariant_reg (loop, i))
1791 goto fail;
1052bd54 1792 }
87c476a2 1793 }
5e962776 1794
aa953e2f
TP
1795 /* If possible, just move the set out of the loop. Otherwise, we
1796 need to create a temporary register. */
1052bd54 1797 set = single_set (inv->insn);
1833192f
VM
1798 reg = dest = SET_DEST (set);
1799 if (GET_CODE (reg) == SUBREG)
1800 reg = SUBREG_REG (reg);
1801 if (REG_P (reg))
1802 regno = REGNO (reg);
1803
ddd93587 1804 if (!can_move_invariant_reg (loop, inv, dest))
aa953e2f
TP
1805 {
1806 reg = gen_reg_rtx_and_attrs (dest);
1052bd54 1807
aa953e2f
TP
1808 /* Try replacing the destination by a new pseudoregister. */
1809 validate_change (inv->insn, &SET_DEST (set), reg, true);
43ba743c 1810
aa953e2f
TP
1811 /* As well as all the dominated uses. */
1812 replace_uses (inv, reg, true);
43ba743c 1813
aa953e2f
TP
1814 /* And validate all the changes. */
1815 if (!apply_change_group ())
1816 goto fail;
90b1c344 1817
aa953e2f
TP
1818 emit_insn_after (gen_move_insn (dest, reg), inv->insn);
1819 }
1820 else if (dump_file)
1821 fprintf (dump_file, "Invariant %d moved without introducing a new "
1822 "temporary register\n", invno);
90b1c344 1823 reorder_insns (inv->insn, inv->insn, BB_END (preheader));
43d56ad7 1824 df_recompute_luids (preheader);
90b1c344 1825
82fa5f8a
L
1826 /* If there is a REG_EQUAL note on the insn we just moved, and the
1827 insn is in a basic block that is not always executed or the note
1828 contains something for which we don't know the invariant status,
1829 the note may no longer be valid after we move the insn. Note that
1830 uses in REG_EQUAL notes are taken into account in the computation
1831 of invariants, so it is safe to retain the note even if it contains
1832 register references for which we know the invariant status. */
1833 if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX))
1834 && (!inv->always_executed
1835 || !check_maybe_invariant (XEXP (note, 0))))
90b1c344 1836 remove_note (inv->insn, note);
b644b211
SB
1837 }
1838 else
1839 {
ba946209
ZD
1840 if (!move_invariant_reg (loop, repr->invno))
1841 goto fail;
1052bd54 1842 reg = repr->reg;
1833192f 1843 regno = repr->orig_regno;
43ba743c
EB
1844 if (!replace_uses (inv, reg, false))
1845 goto fail;
1052bd54 1846 set = single_set (inv->insn);
4d779342
DB
1847 emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn);
1848 delete_insn (inv->insn);
b644b211 1849 }
5e962776 1850
1052bd54 1851 inv->reg = reg;
1833192f 1852 inv->orig_regno = regno;
1052bd54 1853
ba946209
ZD
1854 return true;
1855
1856fail:
1857 /* If we failed, clear move flag, so that we do not try to move inv
1858 again. */
1859 if (dump_file)
1860 fprintf (dump_file, "Failed to move invariant %d\n", invno);
1861 inv->move = false;
1862 inv->reg = NULL_RTX;
1833192f 1863 inv->orig_regno = -1;
6fb5fa3c 1864
ba946209 1865 return false;
5e962776
ZD
1866}
1867
1868/* Move selected invariant out of the LOOP. Newly created regs are marked
cb20f7e8 1869 in TEMPORARY_REGS. */
5e962776
ZD
1870
1871static void
cb20f7e8 1872move_invariants (struct loop *loop)
5e962776
ZD
1873{
1874 struct invariant *inv;
1875 unsigned i;
1876
9771b263 1877 FOR_EACH_VEC_ELT (invariants, i, inv)
1052bd54 1878 move_invariant_reg (loop, i);
1833192f
VM
1879 if (flag_ira_loop_pressure && resize_reg_info ())
1880 {
9771b263 1881 FOR_EACH_VEC_ELT (invariants, i, inv)
1833192f
VM
1882 if (inv->reg != NULL_RTX)
1883 {
1884 if (inv->orig_regno >= 0)
1885 setup_reg_classes (REGNO (inv->reg),
1886 reg_preferred_class (inv->orig_regno),
1887 reg_alternate_class (inv->orig_regno),
1756cb66 1888 reg_allocno_class (inv->orig_regno));
1833192f
VM
1889 else
1890 setup_reg_classes (REGNO (inv->reg),
1891 GENERAL_REGS, NO_REGS, GENERAL_REGS);
1892 }
1893 }
5e962776
ZD
1894}
1895
1896/* Initializes invariant motion data. */
1897
1898static void
1899init_inv_motion_data (void)
1900{
1901 actual_stamp = 1;
1902
9771b263 1903 invariants.create (100);
5e962776
ZD
1904}
1905
cb20f7e8 1906/* Frees the data allocated by invariant motion. */
5e962776
ZD
1907
1908static void
cb20f7e8 1909free_inv_motion_data (void)
5e962776
ZD
1910{
1911 unsigned i;
1912 struct def *def;
1913 struct invariant *inv;
1914
6fb5fa3c
DB
1915 check_invariant_table_size ();
1916 for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++)
5e962776 1917 {
6fb5fa3c
DB
1918 inv = invariant_table[i];
1919 if (inv)
1920 {
1921 def = inv->def;
1922 gcc_assert (def != NULL);
b8698a0f 1923
6fb5fa3c
DB
1924 free_use_list (def->uses);
1925 free (def);
1926 invariant_table[i] = NULL;
1927 }
5e962776
ZD
1928 }
1929
9771b263 1930 FOR_EACH_VEC_ELT (invariants, i, inv)
5e962776 1931 {
8bdbfff5 1932 BITMAP_FREE (inv->depends_on);
5e962776
ZD
1933 free (inv);
1934 }
9771b263 1935 invariants.release ();
5e962776
ZD
1936}
1937
cb20f7e8 1938/* Move the invariants out of the LOOP. */
5e962776
ZD
1939
1940static void
cb20f7e8 1941move_single_loop_invariants (struct loop *loop)
5e962776
ZD
1942{
1943 init_inv_motion_data ();
1944
cb20f7e8 1945 find_invariants (loop);
bec922f0
SL
1946 find_invariants_to_move (optimize_loop_for_speed_p (loop),
1947 LOOP_DATA (loop)->has_call);
cb20f7e8 1948 move_invariants (loop);
5e962776 1949
cb20f7e8 1950 free_inv_motion_data ();
5e962776
ZD
1951}
1952
1953/* Releases the auxiliary data for LOOP. */
1954
1955static void
1956free_loop_data (struct loop *loop)
1957{
1958 struct loop_data *data = LOOP_DATA (loop);
eb149440
RG
1959 if (!data)
1960 return;
5e962776 1961
1833192f
VM
1962 bitmap_clear (&LOOP_DATA (loop)->regs_ref);
1963 bitmap_clear (&LOOP_DATA (loop)->regs_live);
5e962776
ZD
1964 free (data);
1965 loop->aux = NULL;
1966}
1967
1833192f
VM
1968\f
1969
1970/* Registers currently living. */
1971static bitmap_head curr_regs_live;
1972
1756cb66 1973/* Current reg pressure for each pressure class. */
1833192f
VM
1974static int curr_reg_pressure[N_REG_CLASSES];
1975
1976/* Record all regs that are set in any one insn. Communication from
1977 mark_reg_{store,clobber} and global_conflicts. Asm can refer to
1978 all hard-registers. */
1979static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS
1980 ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2];
1981/* Number of regs stored in the previous array. */
1982static int n_regs_set;
1983
1756cb66 1984/* Return pressure class and number of needed hard registers (through
b8698a0f 1985 *NREGS) of register REGNO. */
1833192f 1986static enum reg_class
1756cb66 1987get_regno_pressure_class (int regno, int *nregs)
1833192f
VM
1988{
1989 if (regno >= FIRST_PSEUDO_REGISTER)
1990 {
1756cb66 1991 enum reg_class pressure_class;
1833192f 1992
1756cb66
VM
1993 pressure_class = reg_allocno_class (regno);
1994 pressure_class = ira_pressure_class_translate[pressure_class];
1995 *nregs
1996 = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)];
1997 return pressure_class;
1833192f
VM
1998 }
1999 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)
2000 && ! TEST_HARD_REG_BIT (eliminable_regset, regno))
2001 {
2002 *nregs = 1;
1756cb66 2003 return ira_pressure_class_translate[REGNO_REG_CLASS (regno)];
1833192f
VM
2004 }
2005 else
2006 {
2007 *nregs = 0;
2008 return NO_REGS;
2009 }
2010}
2011
2012/* Increase (if INCR_P) or decrease current register pressure for
2013 register REGNO. */
2014static void
2015change_pressure (int regno, bool incr_p)
2016{
2017 int nregs;
1756cb66 2018 enum reg_class pressure_class;
1833192f 2019
1756cb66 2020 pressure_class = get_regno_pressure_class (regno, &nregs);
1833192f 2021 if (! incr_p)
1756cb66 2022 curr_reg_pressure[pressure_class] -= nregs;
1833192f
VM
2023 else
2024 {
1756cb66
VM
2025 curr_reg_pressure[pressure_class] += nregs;
2026 if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
2027 < curr_reg_pressure[pressure_class])
2028 LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
2029 = curr_reg_pressure[pressure_class];
1833192f
VM
2030 }
2031}
2032
2033/* Mark REGNO birth. */
2034static void
2035mark_regno_live (int regno)
2036{
2037 struct loop *loop;
2038
2039 for (loop = curr_loop;
2040 loop != current_loops->tree_root;
2041 loop = loop_outer (loop))
2042 bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno);
fcaa4ca4 2043 if (!bitmap_set_bit (&curr_regs_live, regno))
1833192f 2044 return;
1833192f
VM
2045 change_pressure (regno, true);
2046}
2047
2048/* Mark REGNO death. */
2049static void
2050mark_regno_death (int regno)
2051{
fcaa4ca4 2052 if (! bitmap_clear_bit (&curr_regs_live, regno))
1833192f 2053 return;
1833192f
VM
2054 change_pressure (regno, false);
2055}
2056
2057/* Mark setting register REG. */
2058static void
2059mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED,
2060 void *data ATTRIBUTE_UNUSED)
2061{
1833192f
VM
2062 if (GET_CODE (reg) == SUBREG)
2063 reg = SUBREG_REG (reg);
2064
2065 if (! REG_P (reg))
2066 return;
2067
2068 regs_set[n_regs_set++] = reg;
2069
53d1bae9
RS
2070 unsigned int end_regno = END_REGNO (reg);
2071 for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
1833192f 2072 mark_regno_live (regno);
1833192f
VM
2073}
2074
2075/* Mark clobbering register REG. */
2076static void
2077mark_reg_clobber (rtx reg, const_rtx setter, void *data)
2078{
2079 if (GET_CODE (setter) == CLOBBER)
2080 mark_reg_store (reg, setter, data);
2081}
2082
2083/* Mark register REG death. */
2084static void
2085mark_reg_death (rtx reg)
2086{
53d1bae9
RS
2087 unsigned int end_regno = END_REGNO (reg);
2088 for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
1833192f 2089 mark_regno_death (regno);
1833192f
VM
2090}
2091
2092/* Mark occurrence of registers in X for the current loop. */
2093static void
2094mark_ref_regs (rtx x)
2095{
2096 RTX_CODE code;
2097 int i;
2098 const char *fmt;
2099
2100 if (!x)
2101 return;
2102
2103 code = GET_CODE (x);
2104 if (code == REG)
2105 {
2106 struct loop *loop;
b8698a0f 2107
1833192f
VM
2108 for (loop = curr_loop;
2109 loop != current_loops->tree_root;
2110 loop = loop_outer (loop))
2111 bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x));
2112 return;
2113 }
2114
2115 fmt = GET_RTX_FORMAT (code);
2116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2117 if (fmt[i] == 'e')
2118 mark_ref_regs (XEXP (x, i));
2119 else if (fmt[i] == 'E')
2120 {
2121 int j;
b8698a0f 2122
1833192f
VM
2123 for (j = 0; j < XVECLEN (x, i); j++)
2124 mark_ref_regs (XVECEXP (x, i, j));
2125 }
2126}
2127
2128/* Calculate register pressure in the loops. */
2129static void
2130calculate_loop_reg_pressure (void)
2131{
2132 int i;
2133 unsigned int j;
2134 bitmap_iterator bi;
2135 basic_block bb;
89bfd6f5
DM
2136 rtx_insn *insn;
2137 rtx link;
1833192f 2138 struct loop *loop, *parent;
1833192f 2139
f0bd40b1 2140 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2141 if (loop->aux == NULL)
2142 {
2143 loop->aux = xcalloc (1, sizeof (struct loop_data));
2144 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
2145 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
2146 }
8d49e7ef 2147 ira_setup_eliminable_regset ();
1833192f 2148 bitmap_initialize (&curr_regs_live, &reg_obstack);
11cd3bed 2149 FOR_EACH_BB_FN (bb, cfun)
1833192f
VM
2150 {
2151 curr_loop = bb->loop_father;
2152 if (curr_loop == current_loops->tree_root)
2153 continue;
2154
2155 for (loop = curr_loop;
2156 loop != current_loops->tree_root;
2157 loop = loop_outer (loop))
2158 bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb));
2159
2160 bitmap_copy (&curr_regs_live, DF_LR_IN (bb));
1756cb66
VM
2161 for (i = 0; i < ira_pressure_classes_num; i++)
2162 curr_reg_pressure[ira_pressure_classes[i]] = 0;
1833192f
VM
2163 EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi)
2164 change_pressure (j, true);
2165
2166 FOR_BB_INSNS (bb, insn)
2167 {
dd8c071d 2168 if (! NONDEBUG_INSN_P (insn))
1833192f
VM
2169 continue;
2170
2171 mark_ref_regs (PATTERN (insn));
2172 n_regs_set = 0;
2173 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
b8698a0f 2174
1833192f 2175 /* Mark any registers dead after INSN as dead now. */
b8698a0f 2176
1833192f
VM
2177 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2178 if (REG_NOTE_KIND (link) == REG_DEAD)
2179 mark_reg_death (XEXP (link, 0));
b8698a0f 2180
1833192f
VM
2181 /* Mark any registers set in INSN as live,
2182 and mark them as conflicting with all other live regs.
2183 Clobbers are processed again, so they conflict with
2184 the registers that are set. */
b8698a0f 2185
1833192f 2186 note_stores (PATTERN (insn), mark_reg_store, NULL);
b8698a0f 2187
760edf20
TS
2188 if (AUTO_INC_DEC)
2189 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2190 if (REG_NOTE_KIND (link) == REG_INC)
2191 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
2192
1833192f
VM
2193 while (n_regs_set-- > 0)
2194 {
2195 rtx note = find_regno_note (insn, REG_UNUSED,
2196 REGNO (regs_set[n_regs_set]));
2197 if (! note)
2198 continue;
b8698a0f 2199
1833192f
VM
2200 mark_reg_death (XEXP (note, 0));
2201 }
2202 }
2203 }
c0d105c6 2204 bitmap_release (&curr_regs_live);
1833192f
VM
2205 if (flag_ira_region == IRA_REGION_MIXED
2206 || flag_ira_region == IRA_REGION_ALL)
f0bd40b1 2207 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2208 {
2209 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
2210 if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j))
2211 {
1756cb66 2212 enum reg_class pressure_class;
1833192f
VM
2213 int nregs;
2214
1756cb66
VM
2215 pressure_class = get_regno_pressure_class (j, &nregs);
2216 LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs;
1833192f
VM
2217 }
2218 }
2219 if (dump_file == NULL)
2220 return;
f0bd40b1 2221 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2222 {
2223 parent = loop_outer (loop);
2224 fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n",
2225 loop->num, (parent == NULL ? -1 : parent->num),
2226 loop->header->index, loop_depth (loop));
2227 fprintf (dump_file, "\n ref. regnos:");
2228 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi)
2229 fprintf (dump_file, " %d", j);
2230 fprintf (dump_file, "\n live regnos:");
2231 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
2232 fprintf (dump_file, " %d", j);
2233 fprintf (dump_file, "\n Pressure:");
1756cb66 2234 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1833192f 2235 {
1756cb66 2236 enum reg_class pressure_class;
b8698a0f 2237
1756cb66
VM
2238 pressure_class = ira_pressure_classes[i];
2239 if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0)
1833192f 2240 continue;
1756cb66
VM
2241 fprintf (dump_file, " %s=%d", reg_class_names[pressure_class],
2242 LOOP_DATA (loop)->max_reg_pressure[pressure_class]);
1833192f
VM
2243 }
2244 fprintf (dump_file, "\n");
2245 }
2246}
2247
2248\f
2249
d73be268 2250/* Move the invariants out of the loops. */
5e962776
ZD
2251
2252void
d73be268 2253move_loop_invariants (void)
5e962776
ZD
2254{
2255 struct loop *loop;
cb20f7e8 2256
1833192f
VM
2257 if (flag_ira_loop_pressure)
2258 {
2259 df_analyze ();
1756cb66 2260 regstat_init_n_sets_and_refs ();
b11f0116 2261 ira_set_pseudo_classes (true, dump_file);
1833192f 2262 calculate_loop_reg_pressure ();
1756cb66 2263 regstat_free_n_sets_and_refs ();
1833192f 2264 }
6fb5fa3c 2265 df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN);
5e962776 2266 /* Process the loops, innermost first. */
f0bd40b1 2267 FOR_EACH_LOOP (loop, LI_FROM_INNERMOST)
5e962776 2268 {
1833192f 2269 curr_loop = loop;
b1fb9f56
JJ
2270 /* move_single_loop_invariants for very large loops
2271 is time consuming and might need a lot of memory. */
2272 if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP)
2273 move_single_loop_invariants (loop);
5e962776
ZD
2274 }
2275
f0bd40b1 2276 FOR_EACH_LOOP (loop, 0)
42fd6772
ZD
2277 {
2278 free_loop_data (loop);
2279 }
5e962776 2280
1833192f
VM
2281 if (flag_ira_loop_pressure)
2282 /* There is no sense to keep this info because it was most
2283 probably outdated by subsequent passes. */
2284 free_reg_info ();
6fb5fa3c
DB
2285 free (invariant_table);
2286 invariant_table = NULL;
2287 invariant_table_size = 0;
a7f4ccb1 2288
b2b29377 2289 checking_verify_flow_info ();
5e962776 2290}