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e53a16e7 ILT |
1 | /* Decompose multiword subregs. |
2 | Copyright (C) 2007 Free Software Foundation, Inc. | |
3 | Contributed by Richard Henderson <rth@redhat.com> | |
4 | Ian Lance Taylor <iant@google.com> | |
5 | ||
6 | This file is part of GCC. | |
7 | ||
8 | GCC is free software; you can redistribute it and/or modify it under | |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 2, or (at your option) any later | |
11 | version. | |
12 | ||
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GCC; see the file COPYING. If not, write to the Free | |
20 | Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA | |
21 | 02110-1301, USA. */ | |
22 | ||
23 | #include "config.h" | |
24 | #include "system.h" | |
25 | #include "coretypes.h" | |
26 | #include "machmode.h" | |
27 | #include "tm.h" | |
28 | #include "rtl.h" | |
29 | #include "tm_p.h" | |
30 | #include "timevar.h" | |
31 | #include "flags.h" | |
32 | #include "insn-config.h" | |
33 | #include "obstack.h" | |
34 | #include "basic-block.h" | |
35 | #include "recog.h" | |
36 | #include "bitmap.h" | |
37 | #include "expr.h" | |
38 | #include "regs.h" | |
39 | #include "tree-pass.h" | |
40 | ||
41 | #ifdef STACK_GROWS_DOWNWARD | |
42 | # undef STACK_GROWS_DOWNWARD | |
43 | # define STACK_GROWS_DOWNWARD 1 | |
44 | #else | |
45 | # define STACK_GROWS_DOWNWARD 0 | |
46 | #endif | |
47 | ||
48 | DEF_VEC_P (bitmap); | |
49 | DEF_VEC_ALLOC_P (bitmap,heap); | |
50 | ||
51 | /* Decompose multi-word pseudo-registers into individual | |
52 | pseudo-registers when possible. This is possible when all the uses | |
53 | of a multi-word register are via SUBREG, or are copies of the | |
54 | register to another location. Breaking apart the register permits | |
55 | more CSE and permits better register allocation. */ | |
56 | ||
57 | /* Bit N in this bitmap is set if regno N is used in a context in | |
58 | which we can decompose it. */ | |
59 | static bitmap decomposable_context; | |
60 | ||
61 | /* Bit N in this bitmap is set if regno N is used in a context in | |
62 | which it can not be decomposed. */ | |
63 | static bitmap non_decomposable_context; | |
64 | ||
65 | /* Bit N in the bitmap in element M of this array is set if there is a | |
66 | copy from reg M to reg N. */ | |
67 | static VEC(bitmap,heap) *reg_copy_graph; | |
68 | ||
2b54c30f ILT |
69 | /* Return whether X is a simple object which we can take a word_mode |
70 | subreg of. */ | |
71 | ||
72 | static bool | |
73 | simple_move_operand (rtx x) | |
74 | { | |
75 | if (GET_CODE (x) == SUBREG) | |
76 | x = SUBREG_REG (x); | |
77 | ||
78 | if (!OBJECT_P (x)) | |
79 | return false; | |
80 | ||
81 | if (GET_CODE (x) == LABEL_REF | |
82 | || GET_CODE (x) == SYMBOL_REF | |
7e0c3f57 ILT |
83 | || GET_CODE (x) == HIGH |
84 | || GET_CODE (x) == CONST) | |
2b54c30f ILT |
85 | return false; |
86 | ||
87 | if (MEM_P (x) | |
88 | && (MEM_VOLATILE_P (x) | |
89 | || mode_dependent_address_p (XEXP (x, 0)))) | |
90 | return false; | |
91 | ||
92 | return true; | |
93 | } | |
94 | ||
e53a16e7 ILT |
95 | /* If INSN is a single set between two objects, return the single set. |
96 | Such an insn can always be decomposed. INSN should have been | |
97 | passed to recog and extract_insn before this is called. */ | |
98 | ||
99 | static rtx | |
100 | simple_move (rtx insn) | |
101 | { | |
102 | rtx x; | |
103 | rtx set; | |
104 | enum machine_mode mode; | |
105 | ||
106 | if (recog_data.n_operands != 2) | |
107 | return NULL_RTX; | |
108 | ||
109 | set = single_set (insn); | |
110 | if (!set) | |
111 | return NULL_RTX; | |
112 | ||
113 | x = SET_DEST (set); | |
114 | if (x != recog_data.operand[0] && x != recog_data.operand[1]) | |
115 | return NULL_RTX; | |
2b54c30f | 116 | if (!simple_move_operand (x)) |
e53a16e7 ILT |
117 | return NULL_RTX; |
118 | ||
119 | x = SET_SRC (set); | |
120 | if (x != recog_data.operand[0] && x != recog_data.operand[1]) | |
121 | return NULL_RTX; | |
2b54c30f ILT |
122 | /* For the src we can handle ASM_OPERANDS, and it is beneficial for |
123 | things like x86 rdtsc which returns a DImode value. */ | |
124 | if (GET_CODE (x) != ASM_OPERANDS | |
125 | && !simple_move_operand (x)) | |
e53a16e7 ILT |
126 | return NULL_RTX; |
127 | ||
128 | /* We try to decompose in integer modes, to avoid generating | |
129 | inefficient code copying between integer and floating point | |
130 | registers. That means that we can't decompose if this is a | |
131 | non-integer mode for which there is no integer mode of the same | |
132 | size. */ | |
133 | mode = GET_MODE (SET_SRC (set)); | |
134 | if (!SCALAR_INT_MODE_P (mode) | |
135 | && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0) | |
136 | == BLKmode)) | |
137 | return NULL_RTX; | |
138 | ||
1f64a081 ILT |
139 | /* Reject PARTIAL_INT modes. They are used for processor specific |
140 | purposes and it's probably best not to tamper with them. */ | |
141 | if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) | |
142 | return NULL_RTX; | |
143 | ||
e53a16e7 ILT |
144 | return set; |
145 | } | |
146 | ||
147 | /* If SET is a copy from one multi-word pseudo-register to another, | |
148 | record that in reg_copy_graph. Return whether it is such a | |
149 | copy. */ | |
150 | ||
151 | static bool | |
152 | find_pseudo_copy (rtx set) | |
153 | { | |
154 | rtx dest = SET_DEST (set); | |
155 | rtx src = SET_SRC (set); | |
156 | unsigned int rd, rs; | |
157 | bitmap b; | |
158 | ||
159 | if (!REG_P (dest) || !REG_P (src)) | |
160 | return false; | |
161 | ||
162 | rd = REGNO (dest); | |
163 | rs = REGNO (src); | |
164 | if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs)) | |
165 | return false; | |
166 | ||
167 | if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD) | |
168 | return false; | |
169 | ||
170 | b = VEC_index (bitmap, reg_copy_graph, rs); | |
171 | if (b == NULL) | |
172 | { | |
173 | b = BITMAP_ALLOC (NULL); | |
174 | VEC_replace (bitmap, reg_copy_graph, rs, b); | |
175 | } | |
176 | ||
177 | bitmap_set_bit (b, rd); | |
178 | ||
179 | return true; | |
180 | } | |
181 | ||
182 | /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case | |
183 | where they are copied to another register, add the register to | |
184 | which they are copied to DECOMPOSABLE_CONTEXT. Use | |
185 | NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track | |
186 | copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */ | |
187 | ||
188 | static void | |
189 | propagate_pseudo_copies (void) | |
190 | { | |
191 | bitmap queue, propagate; | |
192 | ||
193 | queue = BITMAP_ALLOC (NULL); | |
194 | propagate = BITMAP_ALLOC (NULL); | |
195 | ||
196 | bitmap_copy (queue, decomposable_context); | |
197 | do | |
198 | { | |
199 | bitmap_iterator iter; | |
200 | unsigned int i; | |
201 | ||
202 | bitmap_clear (propagate); | |
203 | ||
204 | EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter) | |
205 | { | |
206 | bitmap b = VEC_index (bitmap, reg_copy_graph, i); | |
207 | if (b) | |
208 | bitmap_ior_and_compl_into (propagate, b, non_decomposable_context); | |
209 | } | |
210 | ||
211 | bitmap_and_compl (queue, propagate, decomposable_context); | |
212 | bitmap_ior_into (decomposable_context, propagate); | |
213 | } | |
214 | while (!bitmap_empty_p (queue)); | |
215 | ||
216 | BITMAP_FREE (queue); | |
217 | BITMAP_FREE (propagate); | |
218 | } | |
219 | ||
220 | /* A pointer to one of these values is passed to | |
221 | find_decomposable_subregs via for_each_rtx. */ | |
222 | ||
223 | enum classify_move_insn | |
224 | { | |
225 | /* Not a simple move from one location to another. */ | |
226 | NOT_SIMPLE_MOVE, | |
227 | /* A simple move from one pseudo-register to another with no | |
228 | REG_RETVAL note. */ | |
229 | SIMPLE_PSEUDO_REG_MOVE, | |
230 | /* A simple move involving a non-pseudo-register, or from one | |
231 | pseudo-register to another with a REG_RETVAL note. */ | |
232 | SIMPLE_MOVE | |
233 | }; | |
234 | ||
235 | /* This is called via for_each_rtx. If we find a SUBREG which we | |
236 | could use to decompose a pseudo-register, set a bit in | |
237 | DECOMPOSABLE_CONTEXT. If we find an unadorned register which is | |
238 | not a simple pseudo-register copy, DATA will point at the type of | |
239 | move, and we set a bit in DECOMPOSABLE_CONTEXT or | |
240 | NON_DECOMPOSABLE_CONTEXT as appropriate. */ | |
241 | ||
242 | static int | |
243 | find_decomposable_subregs (rtx *px, void *data) | |
244 | { | |
245 | enum classify_move_insn *pcmi = (enum classify_move_insn *) data; | |
246 | rtx x = *px; | |
247 | ||
248 | if (x == NULL_RTX) | |
249 | return 0; | |
250 | ||
251 | if (GET_CODE (x) == SUBREG) | |
252 | { | |
253 | rtx inner = SUBREG_REG (x); | |
254 | unsigned int regno, outer_size, inner_size, outer_words, inner_words; | |
255 | ||
256 | if (!REG_P (inner)) | |
257 | return 0; | |
258 | ||
259 | regno = REGNO (inner); | |
260 | if (HARD_REGISTER_NUM_P (regno)) | |
261 | return -1; | |
262 | ||
263 | outer_size = GET_MODE_SIZE (GET_MODE (x)); | |
264 | inner_size = GET_MODE_SIZE (GET_MODE (inner)); | |
265 | outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
266 | inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
267 | ||
268 | /* We only try to decompose single word subregs of multi-word | |
269 | registers. When we find one, we return -1 to avoid iterating | |
270 | over the inner register. | |
271 | ||
272 | ??? This doesn't allow, e.g., DImode subregs of TImode values | |
273 | on 32-bit targets. We would need to record the way the | |
274 | pseudo-register was used, and only decompose if all the uses | |
275 | were the same number and size of pieces. Hopefully this | |
276 | doesn't happen much. */ | |
277 | ||
278 | if (outer_words == 1 && inner_words > 1) | |
279 | { | |
280 | bitmap_set_bit (decomposable_context, regno); | |
281 | return -1; | |
282 | } | |
283 | } | |
2b54c30f | 284 | else if (REG_P (x)) |
e53a16e7 ILT |
285 | { |
286 | unsigned int regno; | |
287 | ||
288 | /* We will see an outer SUBREG before we see the inner REG, so | |
289 | when we see a plain REG here it means a direct reference to | |
290 | the register. | |
291 | ||
292 | If this is not a simple copy from one location to another, | |
293 | then we can not decompose this register. If this is a simple | |
294 | copy from one pseudo-register to another, with no REG_RETVAL | |
295 | note, and the mode is right, then we mark the register as | |
296 | decomposable. Otherwise we don't say anything about this | |
297 | register--it could be decomposed, but whether that would be | |
298 | profitable depends upon how it is used elsewhere. | |
299 | ||
300 | We only set bits in the bitmap for multi-word | |
301 | pseudo-registers, since those are the only ones we care about | |
302 | and it keeps the size of the bitmaps down. */ | |
303 | ||
304 | regno = REGNO (x); | |
305 | if (!HARD_REGISTER_NUM_P (regno) | |
306 | && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) | |
307 | { | |
308 | switch (*pcmi) | |
309 | { | |
310 | case NOT_SIMPLE_MOVE: | |
311 | bitmap_set_bit (non_decomposable_context, regno); | |
312 | break; | |
313 | case SIMPLE_PSEUDO_REG_MOVE: | |
314 | if (MODES_TIEABLE_P (GET_MODE (x), word_mode)) | |
315 | bitmap_set_bit (decomposable_context, regno); | |
316 | break; | |
317 | case SIMPLE_MOVE: | |
318 | break; | |
319 | default: | |
320 | gcc_unreachable (); | |
321 | } | |
322 | } | |
323 | } | |
2b54c30f ILT |
324 | else if (MEM_P (x)) |
325 | { | |
326 | enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE; | |
327 | ||
328 | /* Any registers used in a MEM do not participate in a | |
329 | SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion | |
330 | here, and return -1 to block the parent's recursion. */ | |
331 | for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem); | |
332 | return -1; | |
333 | } | |
e53a16e7 ILT |
334 | |
335 | return 0; | |
336 | } | |
337 | ||
338 | /* Decompose REGNO into word-sized components. We smash the REG node | |
339 | in place. This ensures that (1) something goes wrong quickly if we | |
340 | fail to make some replacement, and (2) the debug information inside | |
341 | the symbol table is automatically kept up to date. */ | |
342 | ||
343 | static void | |
344 | decompose_register (unsigned int regno) | |
345 | { | |
346 | rtx reg; | |
347 | unsigned int words, i; | |
348 | rtvec v; | |
349 | ||
350 | reg = regno_reg_rtx[regno]; | |
351 | ||
352 | regno_reg_rtx[regno] = NULL_RTX; | |
353 | clear_reg_info_regno (regno); | |
354 | ||
355 | words = GET_MODE_SIZE (GET_MODE (reg)); | |
356 | words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
357 | ||
358 | v = rtvec_alloc (words); | |
359 | for (i = 0; i < words; ++i) | |
360 | RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD); | |
361 | ||
362 | PUT_CODE (reg, CONCATN); | |
363 | XVEC (reg, 0) = v; | |
364 | ||
365 | if (dump_file) | |
366 | { | |
367 | fprintf (dump_file, "; Splitting reg %u ->", regno); | |
368 | for (i = 0; i < words; ++i) | |
369 | fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i))); | |
370 | fputc ('\n', dump_file); | |
371 | } | |
372 | } | |
373 | ||
374 | /* Get a SUBREG of a CONCATN. */ | |
375 | ||
376 | static rtx | |
377 | simplify_subreg_concatn (enum machine_mode outermode, rtx op, | |
378 | unsigned int byte) | |
379 | { | |
380 | unsigned int inner_size; | |
381 | enum machine_mode innermode; | |
382 | rtx part; | |
383 | unsigned int final_offset; | |
384 | ||
385 | gcc_assert (GET_CODE (op) == CONCATN); | |
386 | gcc_assert (byte % GET_MODE_SIZE (outermode) == 0); | |
387 | ||
388 | innermode = GET_MODE (op); | |
389 | gcc_assert (byte < GET_MODE_SIZE (innermode)); | |
390 | gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode)); | |
391 | ||
392 | inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0); | |
393 | part = XVECEXP (op, 0, byte / inner_size); | |
394 | final_offset = byte % inner_size; | |
395 | if (final_offset + GET_MODE_SIZE (outermode) > inner_size) | |
396 | return NULL_RTX; | |
397 | ||
398 | return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset); | |
399 | } | |
400 | ||
401 | /* Wrapper around simplify_gen_subreg which handles CONCATN. */ | |
402 | ||
403 | static rtx | |
404 | simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op, | |
405 | enum machine_mode innermode, unsigned int byte) | |
406 | { | |
0e6c5b58 ILT |
407 | rtx ret; |
408 | ||
e53a16e7 ILT |
409 | /* We have to handle generating a SUBREG of a SUBREG of a CONCATN. |
410 | If OP is a SUBREG of a CONCATN, then it must be a simple mode | |
411 | change with the same size and offset 0, or it must extract a | |
412 | part. We shouldn't see anything else here. */ | |
413 | if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN) | |
414 | { | |
415 | rtx op2; | |
416 | ||
417 | if ((GET_MODE_SIZE (GET_MODE (op)) | |
418 | == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))) | |
419 | && SUBREG_BYTE (op) == 0) | |
420 | return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op), | |
421 | GET_MODE (SUBREG_REG (op)), byte); | |
422 | ||
423 | op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op), | |
424 | SUBREG_BYTE (op)); | |
425 | if (op2 == NULL_RTX) | |
426 | { | |
427 | /* We don't handle paradoxical subregs here. */ | |
428 | gcc_assert (GET_MODE_SIZE (outermode) | |
429 | <= GET_MODE_SIZE (GET_MODE (op))); | |
430 | gcc_assert (GET_MODE_SIZE (GET_MODE (op)) | |
431 | <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))); | |
432 | op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op), | |
433 | byte + SUBREG_BYTE (op)); | |
434 | gcc_assert (op2 != NULL_RTX); | |
435 | return op2; | |
436 | } | |
437 | ||
438 | op = op2; | |
439 | gcc_assert (op != NULL_RTX); | |
440 | gcc_assert (innermode == GET_MODE (op)); | |
441 | } | |
0e6c5b58 | 442 | |
e53a16e7 ILT |
443 | if (GET_CODE (op) == CONCATN) |
444 | return simplify_subreg_concatn (outermode, op, byte); | |
0e6c5b58 ILT |
445 | |
446 | ret = simplify_gen_subreg (outermode, op, innermode, byte); | |
447 | ||
448 | /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then | |
449 | resolve_simple_move will ask for the high part of the paradoxical | |
450 | subreg, which does not have a value. Just return a zero. */ | |
451 | if (ret == NULL_RTX | |
452 | && GET_CODE (op) == SUBREG | |
453 | && SUBREG_BYTE (op) == 0 | |
454 | && (GET_MODE_SIZE (innermode) | |
455 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))) | |
456 | return CONST0_RTX (outermode); | |
457 | ||
458 | gcc_assert (ret != NULL_RTX); | |
459 | return ret; | |
e53a16e7 ILT |
460 | } |
461 | ||
462 | /* Return whether we should resolve X into the registers into which it | |
463 | was decomposed. */ | |
464 | ||
465 | static bool | |
466 | resolve_reg_p (rtx x) | |
467 | { | |
468 | return GET_CODE (x) == CONCATN; | |
469 | } | |
470 | ||
471 | /* Return whether X is a SUBREG of a register which we need to | |
472 | resolve. */ | |
473 | ||
474 | static bool | |
475 | resolve_subreg_p (rtx x) | |
476 | { | |
477 | if (GET_CODE (x) != SUBREG) | |
478 | return false; | |
479 | return resolve_reg_p (SUBREG_REG (x)); | |
480 | } | |
481 | ||
482 | /* This is called via for_each_rtx. Look for SUBREGs which need to be | |
483 | decomposed. */ | |
484 | ||
485 | static int | |
486 | resolve_subreg_use (rtx *px, void *data) | |
487 | { | |
488 | rtx insn = (rtx) data; | |
489 | rtx x = *px; | |
490 | ||
491 | if (x == NULL_RTX) | |
492 | return 0; | |
493 | ||
494 | if (resolve_subreg_p (x)) | |
495 | { | |
496 | x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x), | |
497 | SUBREG_BYTE (x)); | |
498 | ||
499 | /* It is possible for a note to contain a reference which we can | |
500 | decompose. In this case, return 1 to the caller to indicate | |
501 | that the note must be removed. */ | |
502 | if (!x) | |
503 | { | |
30d18db4 | 504 | gcc_assert (!insn); |
e53a16e7 ILT |
505 | return 1; |
506 | } | |
507 | ||
508 | validate_change (insn, px, x, 1); | |
509 | return -1; | |
510 | } | |
511 | ||
512 | if (resolve_reg_p (x)) | |
513 | { | |
514 | /* Return 1 to the caller to indicate that we found a direct | |
515 | reference to a register which is being decomposed. This can | |
516 | happen inside notes. */ | |
517 | gcc_assert (!insn); | |
518 | return 1; | |
519 | } | |
520 | ||
521 | return 0; | |
522 | } | |
523 | ||
524 | /* If there is a REG_LIBCALL note on OLD_START, move it to NEW_START, | |
525 | and link the corresponding REG_RETVAL note to NEW_START. */ | |
526 | ||
527 | static void | |
528 | move_libcall_note (rtx old_start, rtx new_start) | |
529 | { | |
530 | rtx note0, note1, end; | |
531 | ||
532 | note0 = find_reg_note (old_start, REG_LIBCALL, NULL); | |
533 | if (note0 == NULL_RTX) | |
534 | return; | |
535 | ||
536 | remove_note (old_start, note0); | |
537 | end = XEXP (note0, 0); | |
538 | note1 = find_reg_note (end, REG_RETVAL, NULL); | |
539 | ||
540 | XEXP (note0, 1) = REG_NOTES (new_start); | |
541 | REG_NOTES (new_start) = note0; | |
542 | XEXP (note1, 0) = new_start; | |
543 | } | |
544 | ||
545 | /* Remove any REG_RETVAL note, the corresponding REG_LIBCALL note, and | |
546 | any markers for a no-conflict block. We have decomposed the | |
547 | registers so the non-conflict is now obvious. */ | |
548 | ||
549 | static void | |
550 | remove_retval_note (rtx insn1) | |
551 | { | |
552 | rtx note0, insn0, note1, insn; | |
553 | ||
554 | note1 = find_reg_note (insn1, REG_RETVAL, NULL); | |
555 | if (note1 == NULL_RTX) | |
556 | return; | |
557 | ||
558 | insn0 = XEXP (note1, 0); | |
559 | note0 = find_reg_note (insn0, REG_LIBCALL, NULL); | |
560 | ||
561 | remove_note (insn0, note0); | |
562 | remove_note (insn1, note1); | |
563 | ||
564 | for (insn = insn0; insn != insn1; insn = NEXT_INSN (insn)) | |
565 | { | |
566 | while (1) | |
567 | { | |
568 | rtx note; | |
569 | ||
570 | note = find_reg_note (insn, REG_NO_CONFLICT, NULL); | |
571 | if (note == NULL_RTX) | |
572 | break; | |
573 | remove_note (insn, note); | |
574 | } | |
575 | } | |
576 | } | |
577 | ||
578 | /* Resolve any decomposed registers which appear in register notes on | |
579 | INSN. */ | |
580 | ||
581 | static void | |
582 | resolve_reg_notes (rtx insn) | |
583 | { | |
584 | rtx *pnote, note; | |
585 | ||
586 | note = find_reg_equal_equiv_note (insn); | |
587 | if (note) | |
588 | { | |
589 | if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL)) | |
590 | { | |
591 | remove_note (insn, note); | |
592 | remove_retval_note (insn); | |
593 | } | |
594 | } | |
595 | ||
596 | pnote = ®_NOTES (insn); | |
597 | while (*pnote != NULL_RTX) | |
598 | { | |
599 | bool delete = false; | |
600 | ||
601 | note = *pnote; | |
602 | switch (REG_NOTE_KIND (note)) | |
603 | { | |
604 | case REG_NO_CONFLICT: | |
605 | if (resolve_reg_p (XEXP (note, 0))) | |
606 | delete = true; | |
607 | break; | |
608 | ||
609 | default: | |
610 | break; | |
611 | } | |
612 | ||
613 | if (delete) | |
614 | *pnote = XEXP (note, 1); | |
615 | else | |
616 | pnote = &XEXP (note, 1); | |
617 | } | |
618 | } | |
619 | ||
2b54c30f | 620 | /* Return whether X can be decomposed into subwords. */ |
e53a16e7 ILT |
621 | |
622 | static bool | |
2b54c30f | 623 | can_decompose_p (rtx x) |
e53a16e7 ILT |
624 | { |
625 | if (REG_P (x)) | |
626 | { | |
627 | unsigned int regno = REGNO (x); | |
628 | ||
629 | if (HARD_REGISTER_NUM_P (regno)) | |
2b54c30f ILT |
630 | return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD) |
631 | && HARD_REGNO_MODE_OK (regno, word_mode)); | |
e53a16e7 | 632 | else |
2b54c30f | 633 | return !bitmap_bit_p (non_decomposable_context, regno); |
e53a16e7 ILT |
634 | } |
635 | ||
2b54c30f | 636 | return true; |
e53a16e7 ILT |
637 | } |
638 | ||
639 | /* Decompose the registers used in a simple move SET within INSN. If | |
640 | we don't change anything, return INSN, otherwise return the start | |
641 | of the sequence of moves. */ | |
642 | ||
643 | static rtx | |
644 | resolve_simple_move (rtx set, rtx insn) | |
645 | { | |
646 | rtx src, dest, real_dest, insns; | |
647 | enum machine_mode orig_mode, dest_mode; | |
648 | unsigned int words; | |
649 | bool pushing; | |
650 | ||
651 | src = SET_SRC (set); | |
652 | dest = SET_DEST (set); | |
653 | orig_mode = GET_MODE (dest); | |
654 | ||
655 | words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
656 | if (words <= 1) | |
657 | return insn; | |
658 | ||
659 | start_sequence (); | |
660 | ||
661 | /* We have to handle copying from a SUBREG of a decomposed reg where | |
662 | the SUBREG is larger than word size. Rather than assume that we | |
663 | can take a word_mode SUBREG of the destination, we copy to a new | |
664 | register and then copy that to the destination. */ | |
665 | ||
666 | real_dest = NULL_RTX; | |
667 | ||
668 | if (GET_CODE (src) == SUBREG | |
669 | && resolve_reg_p (SUBREG_REG (src)) | |
670 | && (SUBREG_BYTE (src) != 0 | |
671 | || (GET_MODE_SIZE (orig_mode) | |
672 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))) | |
673 | { | |
674 | real_dest = dest; | |
675 | dest = gen_reg_rtx (orig_mode); | |
676 | if (REG_P (real_dest)) | |
677 | REG_ATTRS (dest) = REG_ATTRS (real_dest); | |
678 | } | |
679 | ||
680 | /* Similarly if we are copying to a SUBREG of a decomposed reg where | |
681 | the SUBREG is larger than word size. */ | |
682 | ||
683 | if (GET_CODE (dest) == SUBREG | |
684 | && resolve_reg_p (SUBREG_REG (dest)) | |
685 | && (SUBREG_BYTE (dest) != 0 | |
686 | || (GET_MODE_SIZE (orig_mode) | |
687 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))))) | |
688 | { | |
689 | rtx reg, minsn, smove; | |
690 | ||
691 | reg = gen_reg_rtx (orig_mode); | |
692 | minsn = emit_move_insn (reg, src); | |
693 | smove = single_set (minsn); | |
694 | gcc_assert (smove != NULL_RTX); | |
695 | resolve_simple_move (smove, minsn); | |
696 | src = reg; | |
697 | } | |
698 | ||
699 | /* If we didn't have any big SUBREGS of decomposed registers, and | |
700 | neither side of the move is a register we are decomposing, then | |
701 | we don't have to do anything here. */ | |
702 | ||
703 | if (src == SET_SRC (set) | |
704 | && dest == SET_DEST (set) | |
705 | && !resolve_reg_p (src) | |
706 | && !resolve_subreg_p (src) | |
707 | && !resolve_reg_p (dest) | |
708 | && !resolve_subreg_p (dest)) | |
709 | { | |
710 | end_sequence (); | |
711 | return insn; | |
712 | } | |
713 | ||
30d18db4 ILT |
714 | /* It's possible for the code to use a subreg of a decomposed |
715 | register while forming an address. We need to handle that before | |
716 | passing the address to emit_move_insn. We pass NULL_RTX as the | |
717 | insn parameter to resolve_subreg_use because we can not validate | |
718 | the insn yet. */ | |
719 | if (MEM_P (src) || MEM_P (dest)) | |
720 | { | |
721 | int acg; | |
722 | ||
723 | if (MEM_P (src)) | |
724 | for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX); | |
725 | if (MEM_P (dest)) | |
726 | for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX); | |
727 | acg = apply_change_group (); | |
728 | gcc_assert (acg); | |
729 | } | |
730 | ||
e53a16e7 ILT |
731 | /* If SRC is a register which we can't decompose, or has side |
732 | effects, we need to move via a temporary register. */ | |
733 | ||
2b54c30f | 734 | if (!can_decompose_p (src) |
e53a16e7 ILT |
735 | || side_effects_p (src) |
736 | || GET_CODE (src) == ASM_OPERANDS) | |
737 | { | |
738 | rtx reg; | |
739 | ||
740 | reg = gen_reg_rtx (orig_mode); | |
741 | emit_move_insn (reg, src); | |
742 | src = reg; | |
743 | } | |
744 | ||
745 | /* If DEST is a register which we can't decompose, or has side | |
746 | effects, we need to first move to a temporary register. We | |
747 | handle the common case of pushing an operand directly. We also | |
748 | go through a temporary register if it holds a floating point | |
749 | value. This gives us better code on systems which can't move | |
750 | data easily between integer and floating point registers. */ | |
751 | ||
752 | dest_mode = orig_mode; | |
753 | pushing = push_operand (dest, dest_mode); | |
2b54c30f | 754 | if (!can_decompose_p (dest) |
e53a16e7 ILT |
755 | || (side_effects_p (dest) && !pushing) |
756 | || (!SCALAR_INT_MODE_P (dest_mode) | |
757 | && !resolve_reg_p (dest) | |
758 | && !resolve_subreg_p (dest))) | |
759 | { | |
760 | if (real_dest == NULL_RTX) | |
761 | real_dest = dest; | |
762 | if (!SCALAR_INT_MODE_P (dest_mode)) | |
763 | { | |
764 | dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT, | |
765 | MODE_INT, 0); | |
766 | gcc_assert (dest_mode != BLKmode); | |
767 | } | |
768 | dest = gen_reg_rtx (dest_mode); | |
769 | if (REG_P (real_dest)) | |
770 | REG_ATTRS (dest) = REG_ATTRS (real_dest); | |
771 | } | |
772 | ||
773 | if (pushing) | |
774 | { | |
775 | unsigned int i, j, jinc; | |
776 | ||
777 | gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0); | |
778 | gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY); | |
779 | gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY); | |
780 | ||
781 | if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD) | |
782 | { | |
783 | j = 0; | |
784 | jinc = 1; | |
785 | } | |
786 | else | |
787 | { | |
788 | j = words - 1; | |
789 | jinc = -1; | |
790 | } | |
791 | ||
792 | for (i = 0; i < words; ++i, j += jinc) | |
793 | { | |
794 | rtx temp; | |
795 | ||
796 | temp = copy_rtx (XEXP (dest, 0)); | |
797 | temp = adjust_automodify_address_nv (dest, word_mode, temp, | |
798 | j * UNITS_PER_WORD); | |
799 | emit_move_insn (temp, | |
800 | simplify_gen_subreg_concatn (word_mode, src, | |
801 | orig_mode, | |
802 | j * UNITS_PER_WORD)); | |
803 | } | |
804 | } | |
805 | else | |
806 | { | |
807 | unsigned int i; | |
808 | ||
809 | if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest))) | |
810 | emit_insn (gen_rtx_CLOBBER (VOIDmode, dest)); | |
811 | ||
812 | for (i = 0; i < words; ++i) | |
813 | emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest, | |
814 | dest_mode, | |
815 | i * UNITS_PER_WORD), | |
816 | simplify_gen_subreg_concatn (word_mode, src, | |
817 | orig_mode, | |
818 | i * UNITS_PER_WORD)); | |
819 | } | |
820 | ||
821 | if (real_dest != NULL_RTX) | |
822 | { | |
823 | rtx mdest, minsn, smove; | |
824 | ||
825 | if (dest_mode == orig_mode) | |
826 | mdest = dest; | |
827 | else | |
828 | mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0); | |
829 | minsn = emit_move_insn (real_dest, mdest); | |
830 | ||
831 | smove = single_set (minsn); | |
832 | gcc_assert (smove != NULL_RTX); | |
833 | ||
834 | resolve_simple_move (smove, minsn); | |
835 | } | |
836 | ||
837 | insns = get_insns (); | |
838 | end_sequence (); | |
839 | ||
840 | emit_insn_before (insns, insn); | |
841 | ||
842 | move_libcall_note (insn, insns); | |
843 | remove_retval_note (insn); | |
844 | delete_insn (insn); | |
845 | ||
846 | return insns; | |
847 | } | |
848 | ||
849 | /* Change a CLOBBER of a decomposed register into a CLOBBER of the | |
850 | component registers. Return whether we changed something. */ | |
851 | ||
852 | static bool | |
853 | resolve_clobber (rtx pat, rtx insn) | |
854 | { | |
855 | rtx reg; | |
856 | enum machine_mode orig_mode; | |
857 | unsigned int words, i; | |
7e0c3f57 | 858 | int ret; |
e53a16e7 ILT |
859 | |
860 | reg = XEXP (pat, 0); | |
9a5a8e58 | 861 | if (!resolve_reg_p (reg) && !resolve_subreg_p (reg)) |
e53a16e7 ILT |
862 | return false; |
863 | ||
864 | orig_mode = GET_MODE (reg); | |
865 | words = GET_MODE_SIZE (orig_mode); | |
866 | words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
867 | ||
7e0c3f57 ILT |
868 | ret = validate_change (NULL_RTX, &XEXP (pat, 0), |
869 | simplify_gen_subreg_concatn (word_mode, reg, | |
870 | orig_mode, 0), | |
871 | 0); | |
872 | gcc_assert (ret != 0); | |
873 | ||
e53a16e7 ILT |
874 | for (i = words - 1; i > 0; --i) |
875 | { | |
876 | rtx x; | |
877 | ||
9a5a8e58 ILT |
878 | x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode, |
879 | i * UNITS_PER_WORD); | |
e53a16e7 ILT |
880 | x = gen_rtx_CLOBBER (VOIDmode, x); |
881 | emit_insn_after (x, insn); | |
882 | } | |
883 | ||
884 | return true; | |
885 | } | |
886 | ||
887 | /* A USE of a decomposed register is no longer meaningful. Return | |
888 | whether we changed something. */ | |
889 | ||
890 | static bool | |
891 | resolve_use (rtx pat, rtx insn) | |
892 | { | |
893 | if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0))) | |
894 | { | |
895 | delete_insn (insn); | |
896 | return true; | |
897 | } | |
898 | return false; | |
899 | } | |
900 | ||
901 | /* Look for registers which are always accessed via word-sized SUBREGs | |
902 | or via copies. Decompose these registers into several word-sized | |
903 | pseudo-registers. */ | |
904 | ||
905 | static void | |
906 | decompose_multiword_subregs (bool update_life) | |
907 | { | |
908 | unsigned int max; | |
909 | basic_block bb; | |
910 | ||
911 | max = max_reg_num (); | |
912 | ||
913 | /* First see if there are any multi-word pseudo-registers. If there | |
914 | aren't, there is nothing we can do. This should speed up this | |
915 | pass in the normal case, since it should be faster than scanning | |
916 | all the insns. */ | |
917 | { | |
918 | unsigned int i; | |
919 | ||
920 | for (i = FIRST_PSEUDO_REGISTER; i < max; ++i) | |
921 | { | |
922 | if (regno_reg_rtx[i] != NULL | |
923 | && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD) | |
924 | break; | |
925 | } | |
926 | if (i == max) | |
927 | return; | |
928 | } | |
929 | ||
930 | /* FIXME: When the dataflow branch is merged, we can change this | |
931 | code to look for each multi-word pseudo-register and to find each | |
932 | insn which sets or uses that register. That should be faster | |
933 | than scanning all the insns. */ | |
934 | ||
935 | decomposable_context = BITMAP_ALLOC (NULL); | |
936 | non_decomposable_context = BITMAP_ALLOC (NULL); | |
937 | ||
938 | reg_copy_graph = VEC_alloc (bitmap, heap, max); | |
939 | VEC_safe_grow (bitmap, heap, reg_copy_graph, max); | |
940 | memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max); | |
941 | ||
942 | FOR_EACH_BB (bb) | |
943 | { | |
944 | rtx insn; | |
945 | ||
946 | FOR_BB_INSNS (bb, insn) | |
947 | { | |
948 | rtx set; | |
949 | enum classify_move_insn cmi; | |
950 | int i, n; | |
951 | ||
952 | if (!INSN_P (insn) | |
953 | || GET_CODE (PATTERN (insn)) == CLOBBER | |
954 | || GET_CODE (PATTERN (insn)) == USE) | |
955 | continue; | |
956 | ||
957 | recog_memoized (insn); | |
958 | extract_insn (insn); | |
959 | ||
960 | set = simple_move (insn); | |
961 | ||
962 | if (!set) | |
963 | cmi = NOT_SIMPLE_MOVE; | |
964 | else | |
965 | { | |
966 | bool retval; | |
967 | ||
968 | retval = find_reg_note (insn, REG_RETVAL, NULL_RTX) != NULL_RTX; | |
969 | ||
970 | if (find_pseudo_copy (set) && !retval) | |
971 | cmi = SIMPLE_PSEUDO_REG_MOVE; | |
972 | else if (retval | |
973 | && REG_P (SET_SRC (set)) | |
974 | && HARD_REGISTER_P (SET_SRC (set))) | |
975 | { | |
976 | rtx note; | |
977 | ||
978 | /* We don't want to decompose an assignment which | |
979 | copies the value returned by a libcall to a | |
980 | pseudo-register. Doing that will lose the RETVAL | |
981 | note with no real gain. */ | |
982 | cmi = NOT_SIMPLE_MOVE; | |
983 | ||
984 | /* If we have a RETVAL note, there should be an | |
985 | EQUAL note. We don't want to decompose any | |
986 | registers which that EQUAL note refers to | |
987 | directly. If we do, we will no longer know the | |
988 | value of the libcall. */ | |
989 | note = find_reg_equal_equiv_note (insn); | |
990 | if (note != NULL_RTX) | |
991 | for_each_rtx (&XEXP (note, 0), find_decomposable_subregs, | |
992 | &cmi); | |
993 | } | |
994 | else | |
995 | cmi = SIMPLE_MOVE; | |
996 | } | |
997 | ||
998 | n = recog_data.n_operands; | |
999 | for (i = 0; i < n; ++i) | |
1000 | { | |
1001 | for_each_rtx (&recog_data.operand[i], | |
1002 | find_decomposable_subregs, | |
1003 | &cmi); | |
1004 | ||
1005 | /* We handle ASM_OPERANDS as a special case to support | |
1006 | things like x86 rdtsc which returns a DImode value. | |
1007 | We can decompose the output, which will certainly be | |
1008 | operand 0, but not the inputs. */ | |
1009 | ||
1010 | if (cmi == SIMPLE_MOVE | |
1011 | && GET_CODE (SET_SRC (set)) == ASM_OPERANDS) | |
1012 | { | |
1013 | gcc_assert (i == 0); | |
1014 | cmi = NOT_SIMPLE_MOVE; | |
1015 | } | |
1016 | } | |
1017 | } | |
1018 | } | |
1019 | ||
1020 | bitmap_and_compl_into (decomposable_context, non_decomposable_context); | |
1021 | if (!bitmap_empty_p (decomposable_context)) | |
1022 | { | |
1023 | int hold_no_new_pseudos = no_new_pseudos; | |
1024 | int max_regno = max_reg_num (); | |
1025 | sbitmap blocks; | |
1026 | bitmap_iterator iter; | |
1027 | unsigned int regno; | |
1028 | ||
1029 | propagate_pseudo_copies (); | |
1030 | ||
1031 | no_new_pseudos = 0; | |
1032 | blocks = sbitmap_alloc (last_basic_block); | |
1033 | sbitmap_zero (blocks); | |
1034 | ||
1035 | EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter) | |
1036 | decompose_register (regno); | |
1037 | ||
1038 | FOR_EACH_BB (bb) | |
1039 | { | |
1040 | rtx insn; | |
1041 | ||
1042 | FOR_BB_INSNS (bb, insn) | |
1043 | { | |
1044 | rtx next, pat; | |
1045 | bool changed; | |
1046 | ||
1047 | if (!INSN_P (insn)) | |
1048 | continue; | |
1049 | ||
1050 | next = NEXT_INSN (insn); | |
1051 | changed = false; | |
1052 | ||
1053 | pat = PATTERN (insn); | |
1054 | if (GET_CODE (pat) == CLOBBER) | |
1055 | { | |
1056 | if (resolve_clobber (pat, insn)) | |
1057 | changed = true; | |
1058 | } | |
1059 | else if (GET_CODE (pat) == USE) | |
1060 | { | |
1061 | if (resolve_use (pat, insn)) | |
1062 | changed = true; | |
1063 | } | |
1064 | else | |
1065 | { | |
1066 | rtx set; | |
1067 | int i; | |
1068 | ||
1069 | recog_memoized (insn); | |
1070 | extract_insn (insn); | |
1071 | ||
1072 | set = simple_move (insn); | |
1073 | if (set) | |
1074 | { | |
1075 | rtx orig_insn = insn; | |
1076 | ||
1077 | insn = resolve_simple_move (set, insn); | |
1078 | if (insn != orig_insn) | |
1079 | { | |
1080 | changed = true; | |
1081 | ||
1082 | recog_memoized (insn); | |
1083 | extract_insn (insn); | |
1084 | } | |
1085 | } | |
1086 | ||
1087 | for (i = recog_data.n_operands - 1; i >= 0; --i) | |
1088 | for_each_rtx (recog_data.operand_loc[i], | |
1089 | resolve_subreg_use, | |
1090 | insn); | |
1091 | ||
1092 | resolve_reg_notes (insn); | |
1093 | ||
1094 | if (num_validated_changes () > 0) | |
1095 | { | |
1096 | for (i = recog_data.n_dups - 1; i >= 0; --i) | |
1097 | { | |
1098 | rtx *pl = recog_data.dup_loc[i]; | |
1099 | int dup_num = recog_data.dup_num[i]; | |
1100 | rtx *px = recog_data.operand_loc[dup_num]; | |
1101 | ||
1102 | validate_change (insn, pl, *px, 1); | |
1103 | } | |
1104 | ||
1105 | i = apply_change_group (); | |
1106 | gcc_assert (i); | |
1107 | ||
1108 | changed = true; | |
1109 | } | |
1110 | } | |
1111 | ||
1112 | if (changed) | |
1113 | { | |
1114 | SET_BIT (blocks, bb->index); | |
1115 | reg_scan_update (insn, next, max_regno); | |
1116 | } | |
1117 | } | |
1118 | } | |
1119 | ||
1120 | no_new_pseudos = hold_no_new_pseudos; | |
1121 | ||
1122 | if (update_life) | |
1123 | update_life_info (blocks, UPDATE_LIFE_GLOBAL_RM_NOTES, | |
1124 | PROP_DEATH_NOTES); | |
1125 | ||
1126 | sbitmap_free (blocks); | |
1127 | } | |
1128 | ||
1129 | { | |
1130 | unsigned int i; | |
1131 | bitmap b; | |
1132 | ||
1133 | for (i = 0; VEC_iterate (bitmap, reg_copy_graph, i, b); ++i) | |
1134 | if (b) | |
1135 | BITMAP_FREE (b); | |
1136 | } | |
1137 | ||
1138 | VEC_free (bitmap, heap, reg_copy_graph); | |
1139 | ||
1140 | BITMAP_FREE (decomposable_context); | |
1141 | BITMAP_FREE (non_decomposable_context); | |
1142 | } | |
1143 | \f | |
1144 | /* Gate function for lower subreg pass. */ | |
1145 | ||
1146 | static bool | |
1147 | gate_handle_lower_subreg (void) | |
1148 | { | |
1149 | return flag_split_wide_types != 0; | |
1150 | } | |
1151 | ||
1152 | /* Implement first lower subreg pass. */ | |
1153 | ||
1154 | static unsigned int | |
1155 | rest_of_handle_lower_subreg (void) | |
1156 | { | |
1157 | decompose_multiword_subregs (false); | |
1158 | return 0; | |
1159 | } | |
1160 | ||
1161 | /* Implement second lower subreg pass. */ | |
1162 | ||
1163 | static unsigned int | |
1164 | rest_of_handle_lower_subreg2 (void) | |
1165 | { | |
1166 | decompose_multiword_subregs (true); | |
1167 | return 0; | |
1168 | } | |
1169 | ||
1170 | struct tree_opt_pass pass_lower_subreg = | |
1171 | { | |
1172 | "subreg", /* name */ | |
1173 | gate_handle_lower_subreg, /* gate */ | |
1174 | rest_of_handle_lower_subreg, /* execute */ | |
1175 | NULL, /* sub */ | |
1176 | NULL, /* next */ | |
1177 | 0, /* static_pass_number */ | |
1178 | TV_LOWER_SUBREG, /* tv_id */ | |
1179 | 0, /* properties_required */ | |
1180 | 0, /* properties_provided */ | |
1181 | 0, /* properties_destroyed */ | |
1182 | 0, /* todo_flags_start */ | |
1183 | TODO_dump_func | | |
1184 | TODO_ggc_collect, /* todo_flags_finish */ | |
1185 | 'u' /* letter */ | |
1186 | }; | |
1187 | ||
1188 | struct tree_opt_pass pass_lower_subreg2 = | |
1189 | { | |
1190 | "subreg2", /* name */ | |
1191 | gate_handle_lower_subreg, /* gate */ | |
1192 | rest_of_handle_lower_subreg2, /* execute */ | |
1193 | NULL, /* sub */ | |
1194 | NULL, /* next */ | |
1195 | 0, /* static_pass_number */ | |
1196 | TV_LOWER_SUBREG, /* tv_id */ | |
1197 | 0, /* properties_required */ | |
1198 | 0, /* properties_provided */ | |
1199 | 0, /* properties_destroyed */ | |
1200 | 0, /* todo_flags_start */ | |
1201 | TODO_dump_func | | |
1202 | TODO_ggc_collect, /* todo_flags_finish */ | |
1203 | 'U' /* letter */ | |
1204 | }; |