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55a2c322 VM |
1 | /* Assign reload pseudos. |
2 | Copyright (C) 2010, 2011, 2012 | |
3 | Free Software Foundation, Inc. | |
4 | Contributed by Vladimir Makarov <vmakarov@redhat.com>. | |
5 | ||
6 | This file is part of GCC. | |
7 | ||
8 | GCC is free software; you can redistribute it and/or modify it under | |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 3, or (at your option) any later | |
11 | version. | |
12 | ||
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GCC; see the file COPYING3. If not see | |
20 | <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | ||
23 | /* This file's main objective is to assign hard registers to reload | |
24 | pseudos. It also tries to allocate hard registers to other | |
25 | pseudos, but at a lower priority than the reload pseudos. The pass | |
26 | does not transform the RTL. | |
27 | ||
28 | We must allocate a hard register to every reload pseudo. We try to | |
29 | increase the chances of finding a viable allocation by assigning | |
30 | the pseudos in order of fewest available hard registers first. If | |
31 | we still fail to find a hard register, we spill other (non-reload) | |
32 | pseudos in order to make room. | |
33 | ||
34 | find_hard_regno_for finds hard registers for allocation without | |
35 | spilling. spill_for does the same with spilling. Both functions | |
36 | use a cost model to determine the most profitable choice of hard | |
37 | and spill registers. | |
38 | ||
39 | Once we have finished allocating reload pseudos, we also try to | |
40 | assign registers to other (non-reload) pseudos. This is useful if | |
41 | hard registers were freed up by the spilling just described. | |
42 | ||
43 | We try to assign hard registers by collecting pseudos into threads. | |
44 | These threads contain reload and inheritance pseudos that are | |
45 | connected by copies (move insns). Doing this improves the chances | |
46 | of pseudos in the thread getting the same hard register and, as a | |
47 | result, of allowing some move insns to be deleted. | |
48 | ||
49 | When we assign a hard register to a pseudo, we decrease the cost of | |
50 | using the same hard register for pseudos that are connected by | |
51 | copies. | |
52 | ||
53 | If two hard registers have the same frequency-derived cost, we | |
54 | prefer hard registers with higher priorities. The mapping of | |
55 | registers to priorities is controlled by the register_priority | |
56 | target hook. For example, x86-64 has a few register priorities: | |
57 | hard registers with and without REX prefixes have different | |
58 | priorities. This permits us to generate smaller code as insns | |
59 | without REX prefixes are shorter. | |
60 | ||
61 | If a few hard registers are still equally good for the assignment, | |
62 | we choose the least used hard register. It is called leveling and | |
63 | may be profitable for some targets. | |
64 | ||
65 | Only insns with changed allocation pseudos are processed on the | |
66 | next constraint pass. | |
67 | ||
68 | The pseudo live-ranges are used to find conflicting pseudos. | |
69 | ||
70 | For understanding the code, it is important to keep in mind that | |
71 | inheritance, split, and reload pseudos created since last | |
72 | constraint pass have regno >= lra_constraint_new_regno_start. | |
73 | Inheritance and split pseudos created on any pass are in the | |
74 | corresponding bitmaps. Inheritance and split pseudos since the | |
75 | last constraint pass have also the corresponding non-negative | |
76 | restore_regno. */ | |
77 | ||
78 | #include "config.h" | |
79 | #include "system.h" | |
80 | #include "coretypes.h" | |
81 | #include "tm.h" | |
82 | #include "hard-reg-set.h" | |
83 | #include "rtl.h" | |
84 | #include "tm_p.h" | |
85 | #include "target.h" | |
86 | #include "insn-config.h" | |
87 | #include "recog.h" | |
88 | #include "output.h" | |
89 | #include "regs.h" | |
90 | #include "function.h" | |
91 | #include "expr.h" | |
92 | #include "basic-block.h" | |
93 | #include "except.h" | |
94 | #include "df.h" | |
95 | #include "ira.h" | |
96 | #include "sparseset.h" | |
97 | #include "lra-int.h" | |
98 | ||
99 | /* Array containing corresponding values of function | |
100 | lra_get_allocno_class. It is used to speed up the code. */ | |
101 | static enum reg_class *regno_allocno_class_array; | |
102 | ||
103 | /* Information about the thread to which a pseudo belongs. Threads are | |
104 | a set of connected reload and inheritance pseudos with the same set of | |
105 | available hard registers. Lone registers belong to their own threads. */ | |
106 | struct regno_assign_info | |
107 | { | |
108 | /* First/next pseudo of the same thread. */ | |
109 | int first, next; | |
110 | /* Frequency of the thread (execution frequency of only reload | |
111 | pseudos in the thread when the thread contains a reload pseudo). | |
112 | Defined only for the first thread pseudo. */ | |
113 | int freq; | |
114 | }; | |
115 | ||
116 | /* Map regno to the corresponding regno assignment info. */ | |
117 | static struct regno_assign_info *regno_assign_info; | |
118 | ||
119 | /* Process a pseudo copy with execution frequency COPY_FREQ connecting | |
120 | REGNO1 and REGNO2 to form threads. */ | |
121 | static void | |
122 | process_copy_to_form_thread (int regno1, int regno2, int copy_freq) | |
123 | { | |
124 | int last, regno1_first, regno2_first; | |
125 | ||
126 | lra_assert (regno1 >= lra_constraint_new_regno_start | |
127 | && regno2 >= lra_constraint_new_regno_start); | |
128 | regno1_first = regno_assign_info[regno1].first; | |
129 | regno2_first = regno_assign_info[regno2].first; | |
130 | if (regno1_first != regno2_first) | |
131 | { | |
132 | for (last = regno2_first; | |
133 | regno_assign_info[last].next >= 0; | |
134 | last = regno_assign_info[last].next) | |
135 | regno_assign_info[last].first = regno1_first; | |
136 | regno_assign_info[last].first = regno1_first; | |
137 | regno_assign_info[last].next = regno_assign_info[regno1_first].next; | |
138 | regno_assign_info[regno1_first].next = regno2_first; | |
139 | regno_assign_info[regno1_first].freq | |
140 | += regno_assign_info[regno2_first].freq; | |
141 | } | |
142 | regno_assign_info[regno1_first].freq -= 2 * copy_freq; | |
143 | lra_assert (regno_assign_info[regno1_first].freq >= 0); | |
144 | } | |
145 | ||
146 | /* Initialize REGNO_ASSIGN_INFO and form threads. */ | |
147 | static void | |
148 | init_regno_assign_info (void) | |
149 | { | |
150 | int i, regno1, regno2, max_regno = max_reg_num (); | |
151 | lra_copy_t cp; | |
f4eafc30 | 152 | |
55a2c322 VM |
153 | regno_assign_info = XNEWVEC (struct regno_assign_info, max_regno); |
154 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
155 | { | |
156 | regno_assign_info[i].first = i; | |
157 | regno_assign_info[i].next = -1; | |
158 | regno_assign_info[i].freq = lra_reg_info[i].freq; | |
159 | } | |
160 | /* Form the threads. */ | |
161 | for (i = 0; (cp = lra_get_copy (i)) != NULL; i++) | |
162 | if ((regno1 = cp->regno1) >= lra_constraint_new_regno_start | |
163 | && (regno2 = cp->regno2) >= lra_constraint_new_regno_start | |
164 | && reg_renumber[regno1] < 0 && lra_reg_info[regno1].nrefs != 0 | |
165 | && reg_renumber[regno2] < 0 && lra_reg_info[regno2].nrefs != 0 | |
166 | && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]] | |
167 | == ira_class_hard_regs_num[regno_allocno_class_array[regno2]])) | |
168 | process_copy_to_form_thread (regno1, regno2, cp->freq); | |
169 | } | |
170 | ||
171 | /* Free REGNO_ASSIGN_INFO. */ | |
172 | static void | |
173 | finish_regno_assign_info (void) | |
174 | { | |
175 | free (regno_assign_info); | |
176 | } | |
177 | ||
178 | /* The function is used to sort *reload* and *inheritance* pseudos to | |
179 | try to assign them hard registers. We put pseudos from the same | |
180 | thread always nearby. */ | |
181 | static int | |
182 | reload_pseudo_compare_func (const void *v1p, const void *v2p) | |
183 | { | |
184 | int r1 = *(const int *) v1p, r2 = *(const int *) v2p; | |
185 | enum reg_class cl1 = regno_allocno_class_array[r1]; | |
186 | enum reg_class cl2 = regno_allocno_class_array[r2]; | |
187 | int diff; | |
f4eafc30 | 188 | |
55a2c322 VM |
189 | lra_assert (r1 >= lra_constraint_new_regno_start |
190 | && r2 >= lra_constraint_new_regno_start); | |
f4eafc30 | 191 | |
55a2c322 VM |
192 | /* Prefer to assign reload registers with smaller classes first to |
193 | guarantee assignment to all reload registers. */ | |
194 | if ((diff = (ira_class_hard_regs_num[cl1] | |
195 | - ira_class_hard_regs_num[cl2])) != 0) | |
196 | return diff; | |
197 | if ((diff = (regno_assign_info[regno_assign_info[r2].first].freq | |
198 | - regno_assign_info[regno_assign_info[r1].first].freq)) != 0) | |
199 | return diff; | |
200 | /* Put pseudos from the thread nearby. */ | |
201 | if ((diff = regno_assign_info[r1].first - regno_assign_info[r2].first) != 0) | |
202 | return diff; | |
203 | /* If regs are equally good, sort by their numbers, so that the | |
204 | results of qsort leave nothing to chance. */ | |
205 | return r1 - r2; | |
206 | } | |
207 | ||
208 | /* The function is used to sort *non-reload* pseudos to try to assign | |
209 | them hard registers. The order calculation is simpler than in the | |
210 | previous function and based on the pseudo frequency usage. */ | |
211 | static int | |
212 | pseudo_compare_func (const void *v1p, const void *v2p) | |
213 | { | |
214 | int r1 = *(const int *) v1p, r2 = *(const int *) v2p; | |
215 | int diff; | |
216 | ||
217 | /* Prefer to assign more frequently used registers first. */ | |
218 | if ((diff = lra_reg_info[r2].freq - lra_reg_info[r1].freq) != 0) | |
219 | return diff; | |
f4eafc30 | 220 | |
55a2c322 VM |
221 | /* If regs are equally good, sort by their numbers, so that the |
222 | results of qsort leave nothing to chance. */ | |
223 | return r1 - r2; | |
224 | } | |
225 | ||
226 | /* Arrays of size LRA_LIVE_MAX_POINT mapping a program point to the | |
227 | pseudo live ranges with given start point. We insert only live | |
228 | ranges of pseudos interesting for assignment purposes. They are | |
229 | reload pseudos and pseudos assigned to hard registers. */ | |
230 | static lra_live_range_t *start_point_ranges; | |
231 | ||
232 | /* Used as a flag that a live range is not inserted in the start point | |
233 | chain. */ | |
234 | static struct lra_live_range not_in_chain_mark; | |
235 | ||
236 | /* Create and set up START_POINT_RANGES. */ | |
237 | static void | |
238 | create_live_range_start_chains (void) | |
239 | { | |
240 | int i, max_regno; | |
241 | lra_live_range_t r; | |
242 | ||
243 | start_point_ranges = XCNEWVEC (lra_live_range_t, lra_live_max_point); | |
244 | max_regno = max_reg_num (); | |
245 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
246 | if (i >= lra_constraint_new_regno_start || reg_renumber[i] >= 0) | |
247 | { | |
248 | for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
249 | { | |
250 | r->start_next = start_point_ranges[r->start]; | |
251 | start_point_ranges[r->start] = r; | |
252 | } | |
253 | } | |
254 | else | |
255 | { | |
256 | for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
257 | r->start_next = ¬_in_chain_mark; | |
258 | } | |
259 | } | |
260 | ||
261 | /* Insert live ranges of pseudo REGNO into start chains if they are | |
262 | not there yet. */ | |
263 | static void | |
264 | insert_in_live_range_start_chain (int regno) | |
265 | { | |
266 | lra_live_range_t r = lra_reg_info[regno].live_ranges; | |
267 | ||
268 | if (r->start_next != ¬_in_chain_mark) | |
269 | return; | |
270 | for (; r != NULL; r = r->next) | |
271 | { | |
272 | r->start_next = start_point_ranges[r->start]; | |
273 | start_point_ranges[r->start] = r; | |
274 | } | |
275 | } | |
276 | ||
277 | /* Free START_POINT_RANGES. */ | |
278 | static void | |
279 | finish_live_range_start_chains (void) | |
280 | { | |
281 | gcc_assert (start_point_ranges != NULL); | |
282 | free (start_point_ranges); | |
283 | start_point_ranges = NULL; | |
284 | } | |
285 | ||
286 | /* Map: program point -> bitmap of all pseudos living at the point and | |
287 | assigned to hard registers. */ | |
288 | static bitmap_head *live_hard_reg_pseudos; | |
289 | static bitmap_obstack live_hard_reg_pseudos_bitmap_obstack; | |
290 | ||
291 | /* reg_renumber corresponding to pseudos marked in | |
292 | live_hard_reg_pseudos. reg_renumber might be not matched to | |
293 | live_hard_reg_pseudos but live_pseudos_reg_renumber always reflects | |
294 | live_hard_reg_pseudos. */ | |
295 | static int *live_pseudos_reg_renumber; | |
296 | ||
297 | /* Sparseset used to calculate living hard reg pseudos for some program | |
298 | point range. */ | |
299 | static sparseset live_range_hard_reg_pseudos; | |
300 | ||
301 | /* Sparseset used to calculate living reload/inheritance pseudos for | |
302 | some program point range. */ | |
303 | static sparseset live_range_reload_inheritance_pseudos; | |
304 | ||
305 | /* Allocate and initialize the data about living pseudos at program | |
306 | points. */ | |
307 | static void | |
308 | init_lives (void) | |
309 | { | |
310 | int i, max_regno = max_reg_num (); | |
311 | ||
312 | live_range_hard_reg_pseudos = sparseset_alloc (max_regno); | |
313 | live_range_reload_inheritance_pseudos = sparseset_alloc (max_regno); | |
314 | live_hard_reg_pseudos = XNEWVEC (bitmap_head, lra_live_max_point); | |
315 | bitmap_obstack_initialize (&live_hard_reg_pseudos_bitmap_obstack); | |
316 | for (i = 0; i < lra_live_max_point; i++) | |
317 | bitmap_initialize (&live_hard_reg_pseudos[i], | |
318 | &live_hard_reg_pseudos_bitmap_obstack); | |
319 | live_pseudos_reg_renumber = XNEWVEC (int, max_regno); | |
320 | for (i = 0; i < max_regno; i++) | |
321 | live_pseudos_reg_renumber[i] = -1; | |
322 | } | |
323 | ||
324 | /* Free the data about living pseudos at program points. */ | |
325 | static void | |
326 | finish_lives (void) | |
327 | { | |
328 | sparseset_free (live_range_hard_reg_pseudos); | |
329 | sparseset_free (live_range_reload_inheritance_pseudos); | |
330 | free (live_hard_reg_pseudos); | |
331 | bitmap_obstack_release (&live_hard_reg_pseudos_bitmap_obstack); | |
332 | free (live_pseudos_reg_renumber); | |
333 | } | |
334 | ||
335 | /* Update the LIVE_HARD_REG_PSEUDOS and LIVE_PSEUDOS_REG_RENUMBER | |
336 | entries for pseudo REGNO. Assume that the register has been | |
337 | spilled if FREE_P, otherwise assume that it has been assigned | |
338 | reg_renumber[REGNO] (if >= 0). We also insert the pseudo live | |
339 | ranges in the start chains when it is assumed to be assigned to a | |
340 | hard register because we use the chains of pseudos assigned to hard | |
341 | registers during allocation. */ | |
342 | static void | |
343 | update_lives (int regno, bool free_p) | |
344 | { | |
345 | int p; | |
346 | lra_live_range_t r; | |
347 | ||
348 | if (reg_renumber[regno] < 0) | |
349 | return; | |
350 | live_pseudos_reg_renumber[regno] = free_p ? -1 : reg_renumber[regno]; | |
351 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
352 | { | |
353 | for (p = r->start; p <= r->finish; p++) | |
354 | if (free_p) | |
355 | bitmap_clear_bit (&live_hard_reg_pseudos[p], regno); | |
356 | else | |
357 | { | |
358 | bitmap_set_bit (&live_hard_reg_pseudos[p], regno); | |
359 | insert_in_live_range_start_chain (regno); | |
360 | } | |
361 | } | |
362 | } | |
363 | ||
364 | /* Sparseset used to calculate reload pseudos conflicting with a given | |
365 | pseudo when we are trying to find a hard register for the given | |
366 | pseudo. */ | |
367 | static sparseset conflict_reload_and_inheritance_pseudos; | |
368 | ||
369 | /* Map: program point -> bitmap of all reload and inheritance pseudos | |
370 | living at the point. */ | |
371 | static bitmap_head *live_reload_and_inheritance_pseudos; | |
372 | static bitmap_obstack live_reload_and_inheritance_pseudos_bitmap_obstack; | |
373 | ||
374 | /* Allocate and initialize data about living reload pseudos at any | |
375 | given program point. */ | |
376 | static void | |
377 | init_live_reload_and_inheritance_pseudos (void) | |
378 | { | |
379 | int i, p, max_regno = max_reg_num (); | |
380 | lra_live_range_t r; | |
f4eafc30 | 381 | |
55a2c322 VM |
382 | conflict_reload_and_inheritance_pseudos = sparseset_alloc (max_regno); |
383 | live_reload_and_inheritance_pseudos = XNEWVEC (bitmap_head, lra_live_max_point); | |
384 | bitmap_obstack_initialize (&live_reload_and_inheritance_pseudos_bitmap_obstack); | |
385 | for (p = 0; p < lra_live_max_point; p++) | |
386 | bitmap_initialize (&live_reload_and_inheritance_pseudos[p], | |
387 | &live_reload_and_inheritance_pseudos_bitmap_obstack); | |
388 | for (i = lra_constraint_new_regno_start; i < max_regno; i++) | |
389 | { | |
390 | for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
391 | for (p = r->start; p <= r->finish; p++) | |
392 | bitmap_set_bit (&live_reload_and_inheritance_pseudos[p], i); | |
393 | } | |
394 | } | |
395 | ||
396 | /* Finalize data about living reload pseudos at any given program | |
397 | point. */ | |
398 | static void | |
399 | finish_live_reload_and_inheritance_pseudos (void) | |
400 | { | |
401 | sparseset_free (conflict_reload_and_inheritance_pseudos); | |
402 | free (live_reload_and_inheritance_pseudos); | |
403 | bitmap_obstack_release (&live_reload_and_inheritance_pseudos_bitmap_obstack); | |
404 | } | |
405 | ||
406 | /* The value used to check that cost of given hard reg is really | |
407 | defined currently. */ | |
408 | static int curr_hard_regno_costs_check = 0; | |
409 | /* Array used to check that cost of the corresponding hard reg (the | |
410 | array element index) is really defined currently. */ | |
411 | static int hard_regno_costs_check[FIRST_PSEUDO_REGISTER]; | |
412 | /* The current costs of allocation of hard regs. Defined only if the | |
413 | value of the corresponding element of the previous array is equal to | |
414 | CURR_HARD_REGNO_COSTS_CHECK. */ | |
415 | static int hard_regno_costs[FIRST_PSEUDO_REGISTER]; | |
416 | ||
417 | /* Adjust cost of HARD_REGNO by INCR. Reset the cost first if it is | |
418 | not defined yet. */ | |
419 | static inline void | |
420 | adjust_hard_regno_cost (int hard_regno, int incr) | |
421 | { | |
422 | if (hard_regno_costs_check[hard_regno] != curr_hard_regno_costs_check) | |
423 | hard_regno_costs[hard_regno] = 0; | |
424 | hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check; | |
425 | hard_regno_costs[hard_regno] += incr; | |
426 | } | |
427 | ||
428 | /* Try to find a free hard register for pseudo REGNO. Return the | |
429 | hard register on success and set *COST to the cost of using | |
430 | that register. (If several registers have equal cost, the one with | |
431 | the highest priority wins.) Return -1 on failure. | |
432 | ||
433 | If TRY_ONLY_HARD_REGNO >= 0, consider only that hard register, | |
434 | otherwise consider all hard registers in REGNO's class. */ | |
435 | static int | |
436 | find_hard_regno_for (int regno, int *cost, int try_only_hard_regno) | |
437 | { | |
438 | HARD_REG_SET conflict_set; | |
439 | int best_cost = INT_MAX, best_priority = INT_MIN, best_usage = INT_MAX; | |
440 | lra_live_range_t r; | |
441 | int p, i, j, rclass_size, best_hard_regno, priority, hard_regno; | |
442 | int hr, conflict_hr, nregs; | |
443 | enum machine_mode biggest_mode; | |
444 | unsigned int k, conflict_regno; | |
445 | int val, biggest_nregs, nregs_diff; | |
446 | enum reg_class rclass; | |
447 | bitmap_iterator bi; | |
448 | bool *rclass_intersect_p; | |
449 | HARD_REG_SET impossible_start_hard_regs; | |
450 | ||
451 | COPY_HARD_REG_SET (conflict_set, lra_no_alloc_regs); | |
452 | rclass = regno_allocno_class_array[regno]; | |
453 | rclass_intersect_p = ira_reg_classes_intersect_p[rclass]; | |
454 | curr_hard_regno_costs_check++; | |
455 | sparseset_clear (conflict_reload_and_inheritance_pseudos); | |
456 | sparseset_clear (live_range_hard_reg_pseudos); | |
457 | IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs); | |
458 | biggest_mode = lra_reg_info[regno].biggest_mode; | |
459 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
460 | { | |
461 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi) | |
462 | if (rclass_intersect_p[regno_allocno_class_array[k]]) | |
463 | sparseset_set_bit (live_range_hard_reg_pseudos, k); | |
464 | EXECUTE_IF_SET_IN_BITMAP (&live_reload_and_inheritance_pseudos[r->start], | |
465 | 0, k, bi) | |
466 | if (lra_reg_info[k].preferred_hard_regno1 >= 0 | |
467 | && live_pseudos_reg_renumber[k] < 0 | |
468 | && rclass_intersect_p[regno_allocno_class_array[k]]) | |
469 | sparseset_set_bit (conflict_reload_and_inheritance_pseudos, k); | |
470 | for (p = r->start + 1; p <= r->finish; p++) | |
471 | { | |
472 | lra_live_range_t r2; | |
f4eafc30 | 473 | |
55a2c322 VM |
474 | for (r2 = start_point_ranges[p]; |
475 | r2 != NULL; | |
476 | r2 = r2->start_next) | |
477 | { | |
478 | if (r2->regno >= lra_constraint_new_regno_start | |
479 | && lra_reg_info[r2->regno].preferred_hard_regno1 >= 0 | |
480 | && live_pseudos_reg_renumber[r2->regno] < 0 | |
481 | && rclass_intersect_p[regno_allocno_class_array[r2->regno]]) | |
482 | sparseset_set_bit (conflict_reload_and_inheritance_pseudos, | |
483 | r2->regno); | |
484 | if (live_pseudos_reg_renumber[r2->regno] >= 0 | |
485 | && rclass_intersect_p[regno_allocno_class_array[r2->regno]]) | |
486 | sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno); | |
487 | } | |
488 | } | |
489 | } | |
490 | if ((hard_regno = lra_reg_info[regno].preferred_hard_regno1) >= 0) | |
491 | { | |
492 | adjust_hard_regno_cost | |
493 | (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit1); | |
494 | if ((hard_regno = lra_reg_info[regno].preferred_hard_regno2) >= 0) | |
495 | adjust_hard_regno_cost | |
496 | (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit2); | |
497 | } | |
498 | #ifdef STACK_REGS | |
499 | if (lra_reg_info[regno].no_stack_p) | |
500 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
501 | SET_HARD_REG_BIT (conflict_set, i); | |
502 | #endif | |
503 | sparseset_clear_bit (conflict_reload_and_inheritance_pseudos, regno); | |
504 | val = lra_reg_info[regno].val; | |
505 | CLEAR_HARD_REG_SET (impossible_start_hard_regs); | |
506 | EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno) | |
507 | if (val == lra_reg_info[conflict_regno].val) | |
508 | { | |
509 | conflict_hr = live_pseudos_reg_renumber[conflict_regno]; | |
510 | nregs = (hard_regno_nregs[conflict_hr] | |
511 | [lra_reg_info[conflict_regno].biggest_mode]); | |
512 | /* Remember about multi-register pseudos. For example, 2 hard | |
513 | register pseudos can start on the same hard register but can | |
f4eafc30 | 514 | not start on HR and HR+1/HR-1. */ |
55a2c322 VM |
515 | for (hr = conflict_hr + 1; |
516 | hr < FIRST_PSEUDO_REGISTER && hr < conflict_hr + nregs; | |
517 | hr++) | |
518 | SET_HARD_REG_BIT (impossible_start_hard_regs, hr); | |
519 | for (hr = conflict_hr - 1; | |
520 | hr >= 0 && hr + hard_regno_nregs[hr][biggest_mode] > conflict_hr; | |
521 | hr--) | |
522 | SET_HARD_REG_BIT (impossible_start_hard_regs, hr); | |
523 | } | |
524 | else | |
525 | { | |
526 | add_to_hard_reg_set (&conflict_set, | |
527 | lra_reg_info[conflict_regno].biggest_mode, | |
528 | live_pseudos_reg_renumber[conflict_regno]); | |
529 | if (hard_reg_set_subset_p (reg_class_contents[rclass], | |
530 | conflict_set)) | |
531 | return -1; | |
532 | } | |
533 | EXECUTE_IF_SET_IN_SPARSESET (conflict_reload_and_inheritance_pseudos, | |
534 | conflict_regno) | |
535 | if (val != lra_reg_info[conflict_regno].val) | |
536 | { | |
537 | lra_assert (live_pseudos_reg_renumber[conflict_regno] < 0); | |
538 | if ((hard_regno | |
539 | = lra_reg_info[conflict_regno].preferred_hard_regno1) >= 0) | |
540 | { | |
541 | adjust_hard_regno_cost | |
542 | (hard_regno, | |
543 | lra_reg_info[conflict_regno].preferred_hard_regno_profit1); | |
544 | if ((hard_regno | |
545 | = lra_reg_info[conflict_regno].preferred_hard_regno2) >= 0) | |
546 | adjust_hard_regno_cost | |
547 | (hard_regno, | |
548 | lra_reg_info[conflict_regno].preferred_hard_regno_profit2); | |
549 | } | |
550 | } | |
551 | /* Make sure that all registers in a multi-word pseudo belong to the | |
552 | required class. */ | |
553 | IOR_COMPL_HARD_REG_SET (conflict_set, reg_class_contents[rclass]); | |
554 | lra_assert (rclass != NO_REGS); | |
555 | rclass_size = ira_class_hard_regs_num[rclass]; | |
556 | best_hard_regno = -1; | |
557 | hard_regno = ira_class_hard_regs[rclass][0]; | |
558 | biggest_nregs = hard_regno_nregs[hard_regno][biggest_mode]; | |
559 | nregs_diff = (biggest_nregs | |
560 | - hard_regno_nregs[hard_regno][PSEUDO_REGNO_MODE (regno)]); | |
561 | for (i = 0; i < rclass_size; i++) | |
562 | { | |
563 | if (try_only_hard_regno >= 0) | |
564 | hard_regno = try_only_hard_regno; | |
565 | else | |
566 | hard_regno = ira_class_hard_regs[rclass][i]; | |
567 | if (! overlaps_hard_reg_set_p (conflict_set, | |
568 | PSEUDO_REGNO_MODE (regno), hard_regno) | |
569 | /* We can not use prohibited_class_mode_regs because it is | |
570 | not defined for all classes. */ | |
571 | && HARD_REGNO_MODE_OK (hard_regno, PSEUDO_REGNO_MODE (regno)) | |
572 | && ! TEST_HARD_REG_BIT (impossible_start_hard_regs, hard_regno) | |
573 | && (nregs_diff == 0 | |
a1b46e46 JR |
574 | || (WORDS_BIG_ENDIAN |
575 | ? (hard_regno - nregs_diff >= 0 | |
576 | && TEST_HARD_REG_BIT (reg_class_contents[rclass], | |
577 | hard_regno - nregs_diff)) | |
578 | : TEST_HARD_REG_BIT (reg_class_contents[rclass], | |
579 | hard_regno + nregs_diff)))) | |
55a2c322 VM |
580 | { |
581 | if (hard_regno_costs_check[hard_regno] | |
582 | != curr_hard_regno_costs_check) | |
583 | { | |
584 | hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check; | |
585 | hard_regno_costs[hard_regno] = 0; | |
586 | } | |
587 | for (j = 0; | |
588 | j < hard_regno_nregs[hard_regno][PSEUDO_REGNO_MODE (regno)]; | |
589 | j++) | |
590 | if (! TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + j) | |
591 | && ! df_regs_ever_live_p (hard_regno + j)) | |
592 | /* It needs save restore. */ | |
593 | hard_regno_costs[hard_regno] | |
594 | += 2 * ENTRY_BLOCK_PTR->next_bb->frequency; | |
595 | priority = targetm.register_priority (hard_regno); | |
596 | if (best_hard_regno < 0 || hard_regno_costs[hard_regno] < best_cost | |
597 | || (hard_regno_costs[hard_regno] == best_cost | |
598 | && (priority > best_priority | |
599 | /* Hard register usage leveling actually results | |
600 | in bigger code for targets with conditional | |
601 | execution like ARM because it reduces chance | |
602 | of if-conversion after LRA. */ | |
603 | || (! targetm.have_conditional_execution () | |
604 | && priority == best_priority | |
605 | && best_usage > lra_hard_reg_usage[hard_regno])))) | |
606 | { | |
607 | best_hard_regno = hard_regno; | |
608 | best_cost = hard_regno_costs[hard_regno]; | |
609 | best_priority = priority; | |
610 | best_usage = lra_hard_reg_usage[hard_regno]; | |
611 | } | |
612 | } | |
613 | if (try_only_hard_regno >= 0) | |
614 | break; | |
615 | } | |
616 | if (best_hard_regno >= 0) | |
617 | *cost = best_cost - lra_reg_info[regno].freq; | |
618 | return best_hard_regno; | |
619 | } | |
620 | ||
621 | /* Current value used for checking elements in | |
622 | update_hard_regno_preference_check. */ | |
623 | static int curr_update_hard_regno_preference_check; | |
624 | /* If an element value is equal to the above variable value, then the | |
625 | corresponding regno has been processed for preference | |
626 | propagation. */ | |
627 | static int *update_hard_regno_preference_check; | |
628 | ||
629 | /* Update the preference for using HARD_REGNO for pseudos that are | |
630 | connected directly or indirectly with REGNO. Apply divisor DIV | |
631 | to any preference adjustments. | |
632 | ||
633 | The more indirectly a pseudo is connected, the smaller its effect | |
634 | should be. We therefore increase DIV on each "hop". */ | |
635 | static void | |
636 | update_hard_regno_preference (int regno, int hard_regno, int div) | |
637 | { | |
638 | int another_regno, cost; | |
639 | lra_copy_t cp, next_cp; | |
640 | ||
641 | /* Search depth 5 seems to be enough. */ | |
642 | if (div > (1 << 5)) | |
643 | return; | |
644 | for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp) | |
645 | { | |
646 | if (cp->regno1 == regno) | |
647 | { | |
648 | next_cp = cp->regno1_next; | |
649 | another_regno = cp->regno2; | |
650 | } | |
651 | else if (cp->regno2 == regno) | |
652 | { | |
653 | next_cp = cp->regno2_next; | |
654 | another_regno = cp->regno1; | |
655 | } | |
656 | else | |
657 | gcc_unreachable (); | |
658 | if (reg_renumber[another_regno] < 0 | |
659 | && (update_hard_regno_preference_check[another_regno] | |
660 | != curr_update_hard_regno_preference_check)) | |
661 | { | |
662 | update_hard_regno_preference_check[another_regno] | |
663 | = curr_update_hard_regno_preference_check; | |
664 | cost = cp->freq < div ? 1 : cp->freq / div; | |
665 | lra_setup_reload_pseudo_preferenced_hard_reg | |
666 | (another_regno, hard_regno, cost); | |
667 | update_hard_regno_preference (another_regno, hard_regno, div * 2); | |
668 | } | |
669 | } | |
670 | } | |
671 | ||
672 | /* Update REG_RENUMBER and other pseudo preferences by assignment of | |
673 | HARD_REGNO to pseudo REGNO and print about it if PRINT_P. */ | |
674 | void | |
675 | lra_setup_reg_renumber (int regno, int hard_regno, bool print_p) | |
676 | { | |
677 | int i, hr; | |
678 | ||
679 | /* We can not just reassign hard register. */ | |
680 | lra_assert (hard_regno < 0 || reg_renumber[regno] < 0); | |
681 | if ((hr = hard_regno) < 0) | |
682 | hr = reg_renumber[regno]; | |
683 | reg_renumber[regno] = hard_regno; | |
684 | lra_assert (hr >= 0); | |
685 | for (i = 0; i < hard_regno_nregs[hr][PSEUDO_REGNO_MODE (regno)]; i++) | |
686 | if (hard_regno < 0) | |
687 | lra_hard_reg_usage[hr + i] -= lra_reg_info[regno].freq; | |
688 | else | |
689 | lra_hard_reg_usage[hr + i] += lra_reg_info[regno].freq; | |
690 | if (print_p && lra_dump_file != NULL) | |
691 | fprintf (lra_dump_file, " Assign %d to %sr%d (freq=%d)\n", | |
692 | reg_renumber[regno], | |
693 | regno < lra_constraint_new_regno_start | |
694 | ? "" | |
695 | : bitmap_bit_p (&lra_inheritance_pseudos, regno) ? "inheritance " | |
696 | : bitmap_bit_p (&lra_split_regs, regno) ? "split " | |
697 | : bitmap_bit_p (&lra_optional_reload_pseudos, regno) | |
698 | ? "optional reload ": "reload ", | |
699 | regno, lra_reg_info[regno].freq); | |
700 | if (hard_regno >= 0) | |
701 | { | |
702 | curr_update_hard_regno_preference_check++; | |
703 | update_hard_regno_preference (regno, hard_regno, 1); | |
704 | } | |
705 | } | |
706 | ||
707 | /* Pseudos which occur in insns containing a particular pseudo. */ | |
708 | static bitmap_head insn_conflict_pseudos; | |
709 | ||
710 | /* Bitmaps used to contain spill pseudos for given pseudo hard regno | |
711 | and best spill pseudos for given pseudo (and best hard regno). */ | |
712 | static bitmap_head spill_pseudos_bitmap, best_spill_pseudos_bitmap; | |
713 | ||
714 | /* Current pseudo check for validity of elements in | |
715 | TRY_HARD_REG_PSEUDOS. */ | |
716 | static int curr_pseudo_check; | |
717 | /* Array used for validity of elements in TRY_HARD_REG_PSEUDOS. */ | |
718 | static int try_hard_reg_pseudos_check[FIRST_PSEUDO_REGISTER]; | |
719 | /* Pseudos who hold given hard register at the considered points. */ | |
720 | static bitmap_head try_hard_reg_pseudos[FIRST_PSEUDO_REGISTER]; | |
721 | ||
722 | /* Set up try_hard_reg_pseudos for given program point P and class | |
723 | RCLASS. Those are pseudos living at P and assigned to a hard | |
724 | register of RCLASS. In other words, those are pseudos which can be | |
725 | spilled to assign a hard register of RCLASS to a pseudo living at | |
726 | P. */ | |
727 | static void | |
728 | setup_try_hard_regno_pseudos (int p, enum reg_class rclass) | |
729 | { | |
730 | int i, hard_regno; | |
731 | enum machine_mode mode; | |
732 | unsigned int spill_regno; | |
733 | bitmap_iterator bi; | |
734 | ||
735 | /* Find what pseudos could be spilled. */ | |
736 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[p], 0, spill_regno, bi) | |
737 | { | |
738 | mode = PSEUDO_REGNO_MODE (spill_regno); | |
739 | hard_regno = live_pseudos_reg_renumber[spill_regno]; | |
740 | if (overlaps_hard_reg_set_p (reg_class_contents[rclass], | |
741 | mode, hard_regno)) | |
742 | { | |
743 | for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--) | |
744 | { | |
745 | if (try_hard_reg_pseudos_check[hard_regno + i] | |
746 | != curr_pseudo_check) | |
747 | { | |
748 | try_hard_reg_pseudos_check[hard_regno + i] | |
749 | = curr_pseudo_check; | |
750 | bitmap_clear (&try_hard_reg_pseudos[hard_regno + i]); | |
751 | } | |
752 | bitmap_set_bit (&try_hard_reg_pseudos[hard_regno + i], | |
753 | spill_regno); | |
754 | } | |
755 | } | |
756 | } | |
757 | } | |
758 | ||
759 | /* Assign temporarily HARD_REGNO to pseudo REGNO. Temporary | |
760 | assignment means that we might undo the data change. */ | |
761 | static void | |
762 | assign_temporarily (int regno, int hard_regno) | |
763 | { | |
764 | int p; | |
765 | lra_live_range_t r; | |
766 | ||
767 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
768 | { | |
769 | for (p = r->start; p <= r->finish; p++) | |
770 | if (hard_regno < 0) | |
771 | bitmap_clear_bit (&live_hard_reg_pseudos[p], regno); | |
772 | else | |
773 | { | |
774 | bitmap_set_bit (&live_hard_reg_pseudos[p], regno); | |
775 | insert_in_live_range_start_chain (regno); | |
776 | } | |
777 | } | |
778 | live_pseudos_reg_renumber[regno] = hard_regno; | |
779 | } | |
780 | ||
781 | /* Array used for sorting reload pseudos for subsequent allocation | |
782 | after spilling some pseudo. */ | |
783 | static int *sorted_reload_pseudos; | |
784 | ||
785 | /* Spill some pseudos for a reload pseudo REGNO and return hard | |
786 | register which should be used for pseudo after spilling. The | |
787 | function adds spilled pseudos to SPILLED_PSEUDO_BITMAP. When we | |
788 | choose hard register (and pseudos occupying the hard registers and | |
789 | to be spilled), we take into account not only how REGNO will | |
790 | benefit from the spills but also how other reload pseudos not yet | |
791 | assigned to hard registers benefit from the spills too. In very | |
792 | rare cases, the function can fail and return -1. */ | |
793 | static int | |
794 | spill_for (int regno, bitmap spilled_pseudo_bitmap) | |
795 | { | |
796 | int i, j, n, p, hard_regno, best_hard_regno, cost, best_cost, rclass_size; | |
797 | int reload_hard_regno, reload_cost; | |
295d875c | 798 | enum machine_mode mode; |
55a2c322 | 799 | enum reg_class rclass; |
55a2c322 VM |
800 | unsigned int spill_regno, reload_regno, uid; |
801 | int insn_pseudos_num, best_insn_pseudos_num; | |
802 | lra_live_range_t r; | |
803 | bitmap_iterator bi; | |
804 | ||
805 | rclass = regno_allocno_class_array[regno]; | |
806 | lra_assert (reg_renumber[regno] < 0 && rclass != NO_REGS); | |
807 | bitmap_clear (&insn_conflict_pseudos); | |
808 | bitmap_clear (&best_spill_pseudos_bitmap); | |
809 | EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi) | |
810 | { | |
811 | struct lra_insn_reg *ir; | |
f4eafc30 | 812 | |
55a2c322 VM |
813 | for (ir = lra_get_insn_regs (uid); ir != NULL; ir = ir->next) |
814 | if (ir->regno >= FIRST_PSEUDO_REGISTER) | |
815 | bitmap_set_bit (&insn_conflict_pseudos, ir->regno); | |
816 | } | |
817 | best_hard_regno = -1; | |
818 | best_cost = INT_MAX; | |
819 | best_insn_pseudos_num = INT_MAX; | |
820 | rclass_size = ira_class_hard_regs_num[rclass]; | |
821 | mode = PSEUDO_REGNO_MODE (regno); | |
822 | /* Invalidate try_hard_reg_pseudos elements. */ | |
823 | curr_pseudo_check++; | |
824 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
825 | for (p = r->start; p <= r->finish; p++) | |
826 | setup_try_hard_regno_pseudos (p, rclass); | |
827 | for (i = 0; i < rclass_size; i++) | |
828 | { | |
829 | hard_regno = ira_class_hard_regs[rclass][i]; | |
830 | bitmap_clear (&spill_pseudos_bitmap); | |
831 | for (j = hard_regno_nregs[hard_regno][mode] - 1; j >= 0; j--) | |
832 | { | |
833 | if (try_hard_reg_pseudos_check[hard_regno + j] != curr_pseudo_check) | |
834 | continue; | |
835 | lra_assert (!bitmap_empty_p (&try_hard_reg_pseudos[hard_regno + j])); | |
836 | bitmap_ior_into (&spill_pseudos_bitmap, | |
837 | &try_hard_reg_pseudos[hard_regno + j]); | |
838 | } | |
839 | /* Spill pseudos. */ | |
55a2c322 VM |
840 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) |
841 | if ((int) spill_regno >= lra_constraint_new_regno_start | |
842 | && ! bitmap_bit_p (&lra_inheritance_pseudos, spill_regno) | |
843 | && ! bitmap_bit_p (&lra_split_regs, spill_regno) | |
844 | && ! bitmap_bit_p (&lra_optional_reload_pseudos, spill_regno)) | |
845 | goto fail; | |
846 | insn_pseudos_num = 0; | |
847 | if (lra_dump_file != NULL) | |
848 | fprintf (lra_dump_file, " Trying %d:", hard_regno); | |
849 | sparseset_clear (live_range_reload_inheritance_pseudos); | |
850 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
851 | { | |
852 | if (bitmap_bit_p (&insn_conflict_pseudos, spill_regno)) | |
853 | insn_pseudos_num++; | |
55a2c322 VM |
854 | for (r = lra_reg_info[spill_regno].live_ranges; |
855 | r != NULL; | |
856 | r = r->next) | |
857 | { | |
858 | for (p = r->start; p <= r->finish; p++) | |
859 | { | |
860 | lra_live_range_t r2; | |
f4eafc30 | 861 | |
55a2c322 VM |
862 | for (r2 = start_point_ranges[p]; |
863 | r2 != NULL; | |
864 | r2 = r2->start_next) | |
865 | if (r2->regno >= lra_constraint_new_regno_start) | |
866 | sparseset_set_bit (live_range_reload_inheritance_pseudos, | |
867 | r2->regno); | |
868 | } | |
869 | } | |
870 | } | |
295d875c VM |
871 | n = 0; |
872 | EXECUTE_IF_SET_IN_SPARSESET (live_range_reload_inheritance_pseudos, | |
873 | reload_regno) | |
874 | if ((int) reload_regno != regno | |
875 | && (ira_reg_classes_intersect_p | |
876 | [rclass][regno_allocno_class_array[reload_regno]]) | |
877 | && live_pseudos_reg_renumber[reload_regno] < 0 | |
878 | && find_hard_regno_for (reload_regno, &cost, -1) < 0) | |
879 | sorted_reload_pseudos[n++] = reload_regno; | |
880 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
881 | { | |
882 | update_lives (spill_regno, true); | |
883 | if (lra_dump_file != NULL) | |
884 | fprintf (lra_dump_file, " spill %d(freq=%d)", | |
885 | spill_regno, lra_reg_info[spill_regno].freq); | |
886 | } | |
55a2c322 VM |
887 | hard_regno = find_hard_regno_for (regno, &cost, -1); |
888 | if (hard_regno >= 0) | |
889 | { | |
890 | assign_temporarily (regno, hard_regno); | |
55a2c322 VM |
891 | qsort (sorted_reload_pseudos, n, sizeof (int), |
892 | reload_pseudo_compare_func); | |
893 | for (j = 0; j < n; j++) | |
894 | { | |
895 | reload_regno = sorted_reload_pseudos[j]; | |
896 | lra_assert (live_pseudos_reg_renumber[reload_regno] < 0); | |
897 | if ((reload_hard_regno | |
898 | = find_hard_regno_for (reload_regno, | |
295d875c | 899 | &reload_cost, -1)) >= 0) |
55a2c322 VM |
900 | { |
901 | if (lra_dump_file != NULL) | |
902 | fprintf (lra_dump_file, " assign %d(cost=%d)", | |
903 | reload_regno, reload_cost); | |
904 | assign_temporarily (reload_regno, reload_hard_regno); | |
905 | cost += reload_cost; | |
906 | } | |
907 | } | |
908 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
909 | { | |
910 | rtx x; | |
f4eafc30 | 911 | |
55a2c322 VM |
912 | cost += lra_reg_info[spill_regno].freq; |
913 | if (ira_reg_equiv[spill_regno].memory != NULL | |
914 | || ira_reg_equiv[spill_regno].constant != NULL) | |
915 | for (x = ira_reg_equiv[spill_regno].init_insns; | |
916 | x != NULL; | |
917 | x = XEXP (x, 1)) | |
918 | cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (XEXP (x, 0))); | |
919 | } | |
920 | if (best_insn_pseudos_num > insn_pseudos_num | |
921 | || (best_insn_pseudos_num == insn_pseudos_num | |
922 | && best_cost > cost)) | |
923 | { | |
924 | best_insn_pseudos_num = insn_pseudos_num; | |
925 | best_cost = cost; | |
926 | best_hard_regno = hard_regno; | |
927 | bitmap_copy (&best_spill_pseudos_bitmap, &spill_pseudos_bitmap); | |
928 | if (lra_dump_file != NULL) | |
929 | fprintf (lra_dump_file, " Now best %d(cost=%d)\n", | |
930 | hard_regno, cost); | |
931 | } | |
932 | assign_temporarily (regno, -1); | |
933 | for (j = 0; j < n; j++) | |
934 | { | |
935 | reload_regno = sorted_reload_pseudos[j]; | |
936 | if (live_pseudos_reg_renumber[reload_regno] >= 0) | |
937 | assign_temporarily (reload_regno, -1); | |
938 | } | |
939 | } | |
940 | if (lra_dump_file != NULL) | |
941 | fprintf (lra_dump_file, "\n"); | |
942 | /* Restore the live hard reg pseudo info for spilled pseudos. */ | |
943 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
944 | update_lives (spill_regno, false); | |
945 | fail: | |
946 | ; | |
947 | } | |
948 | /* Spill: */ | |
949 | EXECUTE_IF_SET_IN_BITMAP (&best_spill_pseudos_bitmap, 0, spill_regno, bi) | |
950 | { | |
951 | if (lra_dump_file != NULL) | |
952 | fprintf (lra_dump_file, " Spill %sr%d(hr=%d, freq=%d) for r%d\n", | |
953 | ((int) spill_regno < lra_constraint_new_regno_start | |
954 | ? "" | |
955 | : bitmap_bit_p (&lra_inheritance_pseudos, spill_regno) | |
956 | ? "inheritance " | |
957 | : bitmap_bit_p (&lra_split_regs, spill_regno) | |
958 | ? "split " | |
959 | : bitmap_bit_p (&lra_optional_reload_pseudos, spill_regno) | |
960 | ? "optional reload " : "reload "), | |
961 | spill_regno, reg_renumber[spill_regno], | |
962 | lra_reg_info[spill_regno].freq, regno); | |
963 | update_lives (spill_regno, true); | |
964 | lra_setup_reg_renumber (spill_regno, -1, false); | |
965 | } | |
966 | bitmap_ior_into (spilled_pseudo_bitmap, &best_spill_pseudos_bitmap); | |
967 | return best_hard_regno; | |
968 | } | |
969 | ||
970 | /* Assign HARD_REGNO to REGNO. */ | |
971 | static void | |
972 | assign_hard_regno (int hard_regno, int regno) | |
973 | { | |
974 | int i; | |
975 | ||
976 | lra_assert (hard_regno >= 0); | |
977 | lra_setup_reg_renumber (regno, hard_regno, true); | |
978 | update_lives (regno, false); | |
979 | for (i = 0; | |
980 | i < hard_regno_nregs[hard_regno][lra_reg_info[regno].biggest_mode]; | |
981 | i++) | |
982 | df_set_regs_ever_live (hard_regno + i, true); | |
983 | } | |
984 | ||
985 | /* Array used for sorting different pseudos. */ | |
986 | static int *sorted_pseudos; | |
987 | ||
988 | /* The constraints pass is allowed to create equivalences between | |
989 | pseudos that make the current allocation "incorrect" (in the sense | |
990 | that pseudos are assigned to hard registers from their own conflict | |
991 | sets). The global variable lra_risky_transformations_p says | |
992 | whether this might have happened. | |
993 | ||
994 | Process pseudos assigned to hard registers (less frequently used | |
995 | first), spill if a conflict is found, and mark the spilled pseudos | |
996 | in SPILLED_PSEUDO_BITMAP. Set up LIVE_HARD_REG_PSEUDOS from | |
997 | pseudos, assigned to hard registers. */ | |
998 | static void | |
999 | setup_live_pseudos_and_spill_after_risky_transforms (bitmap | |
1000 | spilled_pseudo_bitmap) | |
1001 | { | |
1002 | int p, i, j, n, regno, hard_regno; | |
1003 | unsigned int k, conflict_regno; | |
1004 | int val; | |
1005 | HARD_REG_SET conflict_set; | |
1006 | enum machine_mode mode; | |
1007 | lra_live_range_t r; | |
1008 | bitmap_iterator bi; | |
1009 | int max_regno = max_reg_num (); | |
1010 | ||
1011 | if (! lra_risky_transformations_p) | |
1012 | { | |
1013 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1014 | if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0) | |
1015 | update_lives (i, false); | |
1016 | return; | |
1017 | } | |
1018 | for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1019 | if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0) | |
1020 | sorted_pseudos[n++] = i; | |
1021 | qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func); | |
1022 | for (i = n - 1; i >= 0; i--) | |
1023 | { | |
1024 | regno = sorted_pseudos[i]; | |
1025 | hard_regno = reg_renumber[regno]; | |
1026 | lra_assert (hard_regno >= 0); | |
1027 | mode = lra_reg_info[regno].biggest_mode; | |
1028 | sparseset_clear (live_range_hard_reg_pseudos); | |
1029 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
1030 | { | |
1031 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi) | |
1032 | sparseset_set_bit (live_range_hard_reg_pseudos, k); | |
1033 | for (p = r->start + 1; p <= r->finish; p++) | |
1034 | { | |
1035 | lra_live_range_t r2; | |
f4eafc30 | 1036 | |
55a2c322 VM |
1037 | for (r2 = start_point_ranges[p]; |
1038 | r2 != NULL; | |
1039 | r2 = r2->start_next) | |
1040 | if (live_pseudos_reg_renumber[r2->regno] >= 0) | |
1041 | sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno); | |
1042 | } | |
1043 | } | |
1044 | COPY_HARD_REG_SET (conflict_set, lra_no_alloc_regs); | |
1045 | IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs); | |
1046 | val = lra_reg_info[regno].val; | |
1047 | EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno) | |
1048 | if (val != lra_reg_info[conflict_regno].val | |
1049 | /* If it is multi-register pseudos they should start on | |
1050 | the same hard register. */ | |
1051 | || hard_regno != reg_renumber[conflict_regno]) | |
1052 | add_to_hard_reg_set (&conflict_set, | |
1053 | lra_reg_info[conflict_regno].biggest_mode, | |
1054 | reg_renumber[conflict_regno]); | |
1055 | if (! overlaps_hard_reg_set_p (conflict_set, mode, hard_regno)) | |
1056 | { | |
1057 | update_lives (regno, false); | |
1058 | continue; | |
1059 | } | |
1060 | bitmap_set_bit (spilled_pseudo_bitmap, regno); | |
1061 | for (j = 0; | |
1062 | j < hard_regno_nregs[hard_regno][PSEUDO_REGNO_MODE (regno)]; | |
1063 | j++) | |
1064 | lra_hard_reg_usage[hard_regno + j] -= lra_reg_info[regno].freq; | |
1065 | reg_renumber[regno] = -1; | |
1066 | if (lra_dump_file != NULL) | |
1067 | fprintf (lra_dump_file, " Spill r%d after risky transformations\n", | |
1068 | regno); | |
1069 | } | |
1070 | } | |
1071 | ||
1072 | /* Improve allocation by assigning the same hard regno of inheritance | |
1073 | pseudos to the connected pseudos. We need this because inheritance | |
1074 | pseudos are allocated after reload pseudos in the thread and when | |
1075 | we assign a hard register to a reload pseudo we don't know yet that | |
1076 | the connected inheritance pseudos can get the same hard register. | |
1077 | Add pseudos with changed allocation to bitmap CHANGED_PSEUDOS. */ | |
1078 | static void | |
1079 | improve_inheritance (bitmap changed_pseudos) | |
1080 | { | |
1081 | unsigned int k; | |
1082 | int regno, another_regno, hard_regno, another_hard_regno, cost, i, n; | |
1083 | lra_copy_t cp, next_cp; | |
1084 | bitmap_iterator bi; | |
1085 | ||
1086 | n = 0; | |
1087 | EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, k, bi) | |
1088 | if (reg_renumber[k] >= 0 && lra_reg_info[k].nrefs != 0) | |
1089 | sorted_pseudos[n++] = k; | |
1090 | qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func); | |
1091 | for (i = 0; i < n; i++) | |
1092 | { | |
1093 | regno = sorted_pseudos[i]; | |
1094 | hard_regno = reg_renumber[regno]; | |
1095 | lra_assert (hard_regno >= 0); | |
1096 | for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp) | |
1097 | { | |
1098 | if (cp->regno1 == regno) | |
1099 | { | |
1100 | next_cp = cp->regno1_next; | |
1101 | another_regno = cp->regno2; | |
1102 | } | |
1103 | else if (cp->regno2 == regno) | |
1104 | { | |
1105 | next_cp = cp->regno2_next; | |
1106 | another_regno = cp->regno1; | |
1107 | } | |
1108 | else | |
1109 | gcc_unreachable (); | |
1110 | /* Don't change reload pseudo allocation. It might have | |
1111 | this allocation for a purpose and changing it can result | |
1112 | in LRA cycling. */ | |
1113 | if ((another_regno < lra_constraint_new_regno_start | |
1114 | || bitmap_bit_p (&lra_inheritance_pseudos, another_regno)) | |
1115 | && (another_hard_regno = reg_renumber[another_regno]) >= 0 | |
1116 | && another_hard_regno != hard_regno) | |
1117 | { | |
1118 | if (lra_dump_file != NULL) | |
1119 | fprintf | |
1120 | (lra_dump_file, | |
1121 | " Improving inheritance for %d(%d) and %d(%d)...\n", | |
1122 | regno, hard_regno, another_regno, another_hard_regno); | |
1123 | update_lives (another_regno, true); | |
1124 | lra_setup_reg_renumber (another_regno, -1, false); | |
1125 | if (hard_regno | |
1126 | == find_hard_regno_for (another_regno, &cost, hard_regno)) | |
1127 | assign_hard_regno (hard_regno, another_regno); | |
1128 | else | |
1129 | assign_hard_regno (another_hard_regno, another_regno); | |
1130 | bitmap_set_bit (changed_pseudos, another_regno); | |
1131 | } | |
1132 | } | |
1133 | } | |
1134 | } | |
1135 | ||
1136 | ||
1137 | /* Bitmap finally containing all pseudos spilled on this assignment | |
1138 | pass. */ | |
1139 | static bitmap_head all_spilled_pseudos; | |
1140 | /* All pseudos whose allocation was changed. */ | |
1141 | static bitmap_head changed_pseudo_bitmap; | |
1142 | ||
1143 | /* Assign hard registers to reload pseudos and other pseudos. */ | |
1144 | static void | |
1145 | assign_by_spills (void) | |
1146 | { | |
1147 | int i, n, nfails, iter, regno, hard_regno, cost, restore_regno; | |
1148 | rtx insn; | |
1149 | basic_block bb; | |
1150 | bitmap_head changed_insns, do_not_assign_nonreload_pseudos; | |
1151 | bitmap_head non_reload_pseudos; | |
1152 | unsigned int u; | |
1153 | bitmap_iterator bi; | |
992ca0f0 | 1154 | bool reload_p; |
55a2c322 VM |
1155 | int max_regno = max_reg_num (); |
1156 | ||
1157 | for (n = 0, i = lra_constraint_new_regno_start; i < max_regno; i++) | |
1158 | if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0 | |
1159 | && regno_allocno_class_array[i] != NO_REGS) | |
1160 | sorted_pseudos[n++] = i; | |
1161 | bitmap_initialize (&insn_conflict_pseudos, ®_obstack); | |
1162 | bitmap_initialize (&spill_pseudos_bitmap, ®_obstack); | |
1163 | bitmap_initialize (&best_spill_pseudos_bitmap, ®_obstack); | |
1164 | update_hard_regno_preference_check = XCNEWVEC (int, max_regno); | |
1165 | curr_update_hard_regno_preference_check = 0; | |
1166 | memset (try_hard_reg_pseudos_check, 0, sizeof (try_hard_reg_pseudos_check)); | |
1167 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1168 | bitmap_initialize (&try_hard_reg_pseudos[i], ®_obstack); | |
1169 | curr_pseudo_check = 0; | |
1170 | bitmap_initialize (&changed_insns, ®_obstack); | |
1171 | bitmap_initialize (&non_reload_pseudos, ®_obstack); | |
1172 | bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs); | |
1173 | bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos); | |
1174 | for (iter = 0; iter <= 1; iter++) | |
1175 | { | |
1176 | qsort (sorted_pseudos, n, sizeof (int), reload_pseudo_compare_func); | |
1177 | nfails = 0; | |
1178 | for (i = 0; i < n; i++) | |
1179 | { | |
1180 | regno = sorted_pseudos[i]; | |
1181 | if (lra_dump_file != NULL) | |
1182 | fprintf (lra_dump_file, " Assigning to %d " | |
1183 | "(cl=%s, orig=%d, freq=%d, tfirst=%d, tfreq=%d)...\n", | |
1184 | regno, reg_class_names[regno_allocno_class_array[regno]], | |
1185 | ORIGINAL_REGNO (regno_reg_rtx[regno]), | |
1186 | lra_reg_info[regno].freq, regno_assign_info[regno].first, | |
1187 | regno_assign_info[regno_assign_info[regno].first].freq); | |
1188 | hard_regno = find_hard_regno_for (regno, &cost, -1); | |
992ca0f0 VM |
1189 | reload_p = ! bitmap_bit_p (&non_reload_pseudos, regno); |
1190 | if (hard_regno < 0 && reload_p) | |
55a2c322 VM |
1191 | hard_regno = spill_for (regno, &all_spilled_pseudos); |
1192 | if (hard_regno < 0) | |
1193 | { | |
992ca0f0 | 1194 | if (reload_p) |
55a2c322 VM |
1195 | sorted_pseudos[nfails++] = regno; |
1196 | } | |
1197 | else | |
1198 | { | |
1199 | /* This register might have been spilled by the previous | |
1200 | pass. Indicate that it is no longer spilled. */ | |
1201 | bitmap_clear_bit (&all_spilled_pseudos, regno); | |
1202 | assign_hard_regno (hard_regno, regno); | |
992ca0f0 VM |
1203 | if (! reload_p) |
1204 | /* As non-reload pseudo assignment is changed we | |
1205 | should reconsider insns referring for the | |
1206 | pseudo. */ | |
1207 | bitmap_set_bit (&changed_pseudo_bitmap, regno); | |
55a2c322 VM |
1208 | } |
1209 | } | |
1210 | if (nfails == 0) | |
1211 | break; | |
1212 | lra_assert (iter == 0); | |
1213 | /* This is a very rare event. We can not assign a hard | |
1214 | register to reload pseudo because the hard register was | |
1215 | assigned to another reload pseudo on a previous | |
1216 | assignment pass. For x86 example, on the 1st pass we | |
1217 | assigned CX (although another hard register could be used | |
1218 | for this) to reload pseudo in an insn, on the 2nd pass we | |
1219 | need CX (and only this) hard register for a new reload | |
1220 | pseudo in the same insn. */ | |
1221 | if (lra_dump_file != NULL) | |
1222 | fprintf (lra_dump_file, " 2nd iter for reload pseudo assignments:\n"); | |
1223 | for (i = 0; i < nfails; i++) | |
1224 | { | |
1225 | if (lra_dump_file != NULL) | |
1226 | fprintf (lra_dump_file, " Reload r%d assignment failure\n", | |
1227 | sorted_pseudos[i]); | |
1228 | bitmap_ior_into (&changed_insns, | |
1229 | &lra_reg_info[sorted_pseudos[i]].insn_bitmap); | |
1230 | } | |
1231 | FOR_EACH_BB (bb) | |
1232 | FOR_BB_INSNS (bb, insn) | |
1233 | if (bitmap_bit_p (&changed_insns, INSN_UID (insn))) | |
1234 | { | |
1235 | lra_insn_recog_data_t data; | |
1236 | struct lra_insn_reg *r; | |
f4eafc30 | 1237 | |
55a2c322 VM |
1238 | data = lra_get_insn_recog_data (insn); |
1239 | for (r = data->regs; r != NULL; r = r->next) | |
1240 | { | |
1241 | regno = r->regno; | |
1242 | /* A reload pseudo did not get a hard register on the | |
1243 | first iteration because of the conflict with | |
1244 | another reload pseudos in the same insn. So we | |
1245 | consider only reload pseudos assigned to hard | |
1246 | registers. We shall exclude inheritance pseudos as | |
1247 | they can occur in original insns (not reload ones). | |
1248 | We can omit the check for split pseudos because | |
1249 | they occur only in move insns containing non-reload | |
1250 | pseudos. */ | |
1251 | if (regno < lra_constraint_new_regno_start | |
1252 | || bitmap_bit_p (&lra_inheritance_pseudos, regno) | |
1253 | || reg_renumber[regno] < 0) | |
1254 | continue; | |
1255 | sorted_pseudos[nfails++] = regno; | |
1256 | if (lra_dump_file != NULL) | |
1257 | fprintf (lra_dump_file, | |
1258 | " Spill reload r%d(hr=%d, freq=%d)\n", | |
1259 | regno, reg_renumber[regno], | |
1260 | lra_reg_info[regno].freq); | |
1261 | update_lives (regno, true); | |
1262 | lra_setup_reg_renumber (regno, -1, false); | |
1263 | } | |
1264 | } | |
1265 | n = nfails; | |
1266 | } | |
1267 | improve_inheritance (&changed_pseudo_bitmap); | |
1268 | bitmap_clear (&non_reload_pseudos); | |
1269 | bitmap_clear (&changed_insns); | |
1270 | if (! lra_simple_p) | |
1271 | { | |
1272 | /* We should not assign to original pseudos of inheritance | |
1273 | pseudos or split pseudos if any its inheritance pseudo did | |
1274 | not get hard register or any its split pseudo was not split | |
1275 | because undo inheritance/split pass will extend live range of | |
1276 | such inheritance or split pseudos. */ | |
1277 | bitmap_initialize (&do_not_assign_nonreload_pseudos, ®_obstack); | |
1278 | EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, u, bi) | |
1279 | if ((restore_regno = lra_reg_info[u].restore_regno) >= 0 | |
1280 | && reg_renumber[u] < 0 | |
1281 | && bitmap_bit_p (&lra_inheritance_pseudos, u)) | |
1282 | bitmap_set_bit (&do_not_assign_nonreload_pseudos, restore_regno); | |
1283 | EXECUTE_IF_SET_IN_BITMAP (&lra_split_regs, 0, u, bi) | |
1284 | if ((restore_regno = lra_reg_info[u].restore_regno) >= 0 | |
1285 | && reg_renumber[u] >= 0) | |
1286 | bitmap_set_bit (&do_not_assign_nonreload_pseudos, restore_regno); | |
1287 | for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1288 | if (((i < lra_constraint_new_regno_start | |
1289 | && ! bitmap_bit_p (&do_not_assign_nonreload_pseudos, i)) | |
1290 | || (bitmap_bit_p (&lra_inheritance_pseudos, i) | |
1291 | && lra_reg_info[i].restore_regno >= 0) | |
1292 | || (bitmap_bit_p (&lra_split_regs, i) | |
1293 | && lra_reg_info[i].restore_regno >= 0) | |
1294 | || bitmap_bit_p (&lra_optional_reload_pseudos, i)) | |
1295 | && reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0 | |
1296 | && regno_allocno_class_array[i] != NO_REGS) | |
1297 | sorted_pseudos[n++] = i; | |
1298 | bitmap_clear (&do_not_assign_nonreload_pseudos); | |
1299 | if (n != 0 && lra_dump_file != NULL) | |
1300 | fprintf (lra_dump_file, " Reassigning non-reload pseudos\n"); | |
1301 | qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func); | |
1302 | for (i = 0; i < n; i++) | |
1303 | { | |
1304 | regno = sorted_pseudos[i]; | |
1305 | hard_regno = find_hard_regno_for (regno, &cost, -1); | |
1306 | if (hard_regno >= 0) | |
1307 | { | |
1308 | assign_hard_regno (hard_regno, regno); | |
992ca0f0 VM |
1309 | /* We change allocation for non-reload pseudo on this |
1310 | iteration -- mark the pseudo for invalidation of used | |
1311 | alternatives of insns containing the pseudo. */ | |
55a2c322 VM |
1312 | bitmap_set_bit (&changed_pseudo_bitmap, regno); |
1313 | } | |
1314 | } | |
1315 | } | |
1316 | free (update_hard_regno_preference_check); | |
1317 | bitmap_clear (&best_spill_pseudos_bitmap); | |
1318 | bitmap_clear (&spill_pseudos_bitmap); | |
1319 | bitmap_clear (&insn_conflict_pseudos); | |
1320 | } | |
1321 | ||
1322 | ||
1323 | /* Entry function to assign hard registers to new reload pseudos | |
1324 | starting with LRA_CONSTRAINT_NEW_REGNO_START (by possible spilling | |
1325 | of old pseudos) and possibly to the old pseudos. The function adds | |
1326 | what insns to process for the next constraint pass. Those are all | |
1327 | insns who contains non-reload and non-inheritance pseudos with | |
1328 | changed allocation. | |
1329 | ||
1330 | Return true if we did not spill any non-reload and non-inheritance | |
1331 | pseudos. */ | |
1332 | bool | |
1333 | lra_assign (void) | |
1334 | { | |
1335 | int i; | |
1336 | unsigned int u; | |
1337 | bitmap_iterator bi; | |
1338 | bitmap_head insns_to_process; | |
1339 | bool no_spills_p; | |
1340 | int max_regno = max_reg_num (); | |
1341 | ||
1342 | timevar_push (TV_LRA_ASSIGN); | |
1343 | init_lives (); | |
1344 | sorted_pseudos = XNEWVEC (int, max_regno); | |
1345 | sorted_reload_pseudos = XNEWVEC (int, max_regno); | |
1346 | regno_allocno_class_array = XNEWVEC (enum reg_class, max_regno); | |
1347 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1348 | regno_allocno_class_array[i] = lra_get_allocno_class (i); | |
1349 | init_regno_assign_info (); | |
1350 | bitmap_initialize (&all_spilled_pseudos, ®_obstack); | |
1351 | create_live_range_start_chains (); | |
1352 | setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos); | |
1353 | #ifdef ENABLE_CHECKING | |
1354 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1355 | if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0 | |
1356 | && lra_reg_info[i].call_p | |
1357 | && overlaps_hard_reg_set_p (call_used_reg_set, | |
1358 | PSEUDO_REGNO_MODE (i), reg_renumber[i])) | |
1359 | gcc_unreachable (); | |
1360 | #endif | |
1361 | /* Setup insns to process on the next constraint pass. */ | |
1362 | bitmap_initialize (&changed_pseudo_bitmap, ®_obstack); | |
1363 | init_live_reload_and_inheritance_pseudos (); | |
1364 | assign_by_spills (); | |
1365 | finish_live_reload_and_inheritance_pseudos (); | |
1366 | bitmap_ior_into (&changed_pseudo_bitmap, &all_spilled_pseudos); | |
1367 | no_spills_p = true; | |
1368 | EXECUTE_IF_SET_IN_BITMAP (&all_spilled_pseudos, 0, u, bi) | |
1369 | /* We ignore spilled pseudos created on last inheritance pass | |
1370 | because they will be removed. */ | |
1371 | if (lra_reg_info[u].restore_regno < 0) | |
1372 | { | |
1373 | no_spills_p = false; | |
1374 | break; | |
1375 | } | |
1376 | finish_live_range_start_chains (); | |
1377 | bitmap_clear (&all_spilled_pseudos); | |
1378 | bitmap_initialize (&insns_to_process, ®_obstack); | |
1379 | EXECUTE_IF_SET_IN_BITMAP (&changed_pseudo_bitmap, 0, u, bi) | |
1380 | bitmap_ior_into (&insns_to_process, &lra_reg_info[u].insn_bitmap); | |
1381 | bitmap_clear (&changed_pseudo_bitmap); | |
1382 | EXECUTE_IF_SET_IN_BITMAP (&insns_to_process, 0, u, bi) | |
1383 | { | |
1384 | lra_push_insn_by_uid (u); | |
1385 | /* Invalidate alternatives for insn should be processed. */ | |
1386 | lra_set_used_insn_alternative_by_uid (u, -1); | |
1387 | } | |
1388 | bitmap_clear (&insns_to_process); | |
1389 | finish_regno_assign_info (); | |
1390 | free (regno_allocno_class_array); | |
1391 | free (sorted_pseudos); | |
1392 | free (sorted_reload_pseudos); | |
1393 | finish_lives (); | |
1394 | timevar_pop (TV_LRA_ASSIGN); | |
1395 | return no_spills_p; | |
1396 | } |