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c6a6cdaa | 1 | /* Assign reload pseudos. |
fbd26352 | 2 | Copyright (C) 2010-2019 Free Software Foundation, Inc. |
c6a6cdaa | 3 | Contributed by Vladimir Makarov <vmakarov@redhat.com>. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 3, or (at your option) any later | |
10 | version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | ||
22 | /* This file's main objective is to assign hard registers to reload | |
23 | pseudos. It also tries to allocate hard registers to other | |
24 | pseudos, but at a lower priority than the reload pseudos. The pass | |
25 | does not transform the RTL. | |
26 | ||
27 | We must allocate a hard register to every reload pseudo. We try to | |
28 | increase the chances of finding a viable allocation by assigning | |
29 | the pseudos in order of fewest available hard registers first. If | |
30 | we still fail to find a hard register, we spill other (non-reload) | |
31 | pseudos in order to make room. | |
32 | ||
33 | find_hard_regno_for finds hard registers for allocation without | |
34 | spilling. spill_for does the same with spilling. Both functions | |
35 | use a cost model to determine the most profitable choice of hard | |
36 | and spill registers. | |
37 | ||
38 | Once we have finished allocating reload pseudos, we also try to | |
39 | assign registers to other (non-reload) pseudos. This is useful if | |
40 | hard registers were freed up by the spilling just described. | |
41 | ||
42 | We try to assign hard registers by collecting pseudos into threads. | |
43 | These threads contain reload and inheritance pseudos that are | |
44 | connected by copies (move insns). Doing this improves the chances | |
45 | of pseudos in the thread getting the same hard register and, as a | |
46 | result, of allowing some move insns to be deleted. | |
47 | ||
48 | When we assign a hard register to a pseudo, we decrease the cost of | |
49 | using the same hard register for pseudos that are connected by | |
50 | copies. | |
51 | ||
52 | If two hard registers have the same frequency-derived cost, we | |
53 | prefer hard registers with higher priorities. The mapping of | |
54 | registers to priorities is controlled by the register_priority | |
55 | target hook. For example, x86-64 has a few register priorities: | |
56 | hard registers with and without REX prefixes have different | |
57 | priorities. This permits us to generate smaller code as insns | |
58 | without REX prefixes are shorter. | |
59 | ||
60 | If a few hard registers are still equally good for the assignment, | |
61 | we choose the least used hard register. It is called leveling and | |
62 | may be profitable for some targets. | |
63 | ||
64 | Only insns with changed allocation pseudos are processed on the | |
65 | next constraint pass. | |
66 | ||
67 | The pseudo live-ranges are used to find conflicting pseudos. | |
68 | ||
69 | For understanding the code, it is important to keep in mind that | |
70 | inheritance, split, and reload pseudos created since last | |
71 | constraint pass have regno >= lra_constraint_new_regno_start. | |
72 | Inheritance and split pseudos created on any pass are in the | |
73 | corresponding bitmaps. Inheritance and split pseudos since the | |
74 | last constraint pass have also the corresponding non-negative | |
75 | restore_regno. */ | |
76 | ||
77 | #include "config.h" | |
78 | #include "system.h" | |
79 | #include "coretypes.h" | |
9ef16211 | 80 | #include "backend.h" |
7c29e30e | 81 | #include "target.h" |
c6a6cdaa | 82 | #include "rtl.h" |
7c29e30e | 83 | #include "tree.h" |
84 | #include "predict.h" | |
9ef16211 | 85 | #include "df.h" |
ad7b10a2 | 86 | #include "memmodel.h" |
c6a6cdaa | 87 | #include "tm_p.h" |
c6a6cdaa | 88 | #include "insn-config.h" |
7c29e30e | 89 | #include "regs.h" |
90 | #include "ira.h" | |
c6a6cdaa | 91 | #include "recog.h" |
7c29e30e | 92 | #include "rtl-error.h" |
c6a6cdaa | 93 | #include "sparseset.h" |
eb3db740 | 94 | #include "params.h" |
9ef16211 | 95 | #include "lra.h" |
c6a6cdaa | 96 | #include "lra-int.h" |
97 | ||
f95727ee | 98 | /* Current iteration number of the pass and current iteration number |
99 | of the pass after the latest spill pass when any former reload | |
100 | pseudo was spilled. */ | |
101 | int lra_assignment_iter; | |
102 | int lra_assignment_iter_after_spill; | |
103 | ||
104 | /* Flag of spilling former reload pseudos on this pass. */ | |
105 | static bool former_reload_pseudo_spill_p; | |
106 | ||
c6a6cdaa | 107 | /* Array containing corresponding values of function |
108 | lra_get_allocno_class. It is used to speed up the code. */ | |
109 | static enum reg_class *regno_allocno_class_array; | |
110 | ||
ab4ea053 | 111 | /* Array containing lengths of pseudo live ranges. It is used to |
112 | speed up the code. */ | |
113 | static int *regno_live_length; | |
114 | ||
c6a6cdaa | 115 | /* Information about the thread to which a pseudo belongs. Threads are |
116 | a set of connected reload and inheritance pseudos with the same set of | |
117 | available hard registers. Lone registers belong to their own threads. */ | |
118 | struct regno_assign_info | |
119 | { | |
120 | /* First/next pseudo of the same thread. */ | |
121 | int first, next; | |
122 | /* Frequency of the thread (execution frequency of only reload | |
123 | pseudos in the thread when the thread contains a reload pseudo). | |
124 | Defined only for the first thread pseudo. */ | |
125 | int freq; | |
126 | }; | |
127 | ||
128 | /* Map regno to the corresponding regno assignment info. */ | |
129 | static struct regno_assign_info *regno_assign_info; | |
130 | ||
8033d76f | 131 | /* All inherited, subreg or optional pseudos created before last spill |
132 | sub-pass. Such pseudos are permitted to get memory instead of hard | |
133 | regs. */ | |
134 | static bitmap_head non_reload_pseudos; | |
135 | ||
c6a6cdaa | 136 | /* Process a pseudo copy with execution frequency COPY_FREQ connecting |
137 | REGNO1 and REGNO2 to form threads. */ | |
138 | static void | |
139 | process_copy_to_form_thread (int regno1, int regno2, int copy_freq) | |
140 | { | |
141 | int last, regno1_first, regno2_first; | |
142 | ||
143 | lra_assert (regno1 >= lra_constraint_new_regno_start | |
144 | && regno2 >= lra_constraint_new_regno_start); | |
145 | regno1_first = regno_assign_info[regno1].first; | |
146 | regno2_first = regno_assign_info[regno2].first; | |
147 | if (regno1_first != regno2_first) | |
148 | { | |
149 | for (last = regno2_first; | |
150 | regno_assign_info[last].next >= 0; | |
151 | last = regno_assign_info[last].next) | |
152 | regno_assign_info[last].first = regno1_first; | |
153 | regno_assign_info[last].first = regno1_first; | |
154 | regno_assign_info[last].next = regno_assign_info[regno1_first].next; | |
155 | regno_assign_info[regno1_first].next = regno2_first; | |
156 | regno_assign_info[regno1_first].freq | |
157 | += regno_assign_info[regno2_first].freq; | |
158 | } | |
159 | regno_assign_info[regno1_first].freq -= 2 * copy_freq; | |
160 | lra_assert (regno_assign_info[regno1_first].freq >= 0); | |
161 | } | |
162 | ||
163 | /* Initialize REGNO_ASSIGN_INFO and form threads. */ | |
164 | static void | |
165 | init_regno_assign_info (void) | |
166 | { | |
167 | int i, regno1, regno2, max_regno = max_reg_num (); | |
168 | lra_copy_t cp; | |
1a8f8886 | 169 | |
c6a6cdaa | 170 | regno_assign_info = XNEWVEC (struct regno_assign_info, max_regno); |
171 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
172 | { | |
173 | regno_assign_info[i].first = i; | |
174 | regno_assign_info[i].next = -1; | |
175 | regno_assign_info[i].freq = lra_reg_info[i].freq; | |
176 | } | |
177 | /* Form the threads. */ | |
178 | for (i = 0; (cp = lra_get_copy (i)) != NULL; i++) | |
179 | if ((regno1 = cp->regno1) >= lra_constraint_new_regno_start | |
180 | && (regno2 = cp->regno2) >= lra_constraint_new_regno_start | |
181 | && reg_renumber[regno1] < 0 && lra_reg_info[regno1].nrefs != 0 | |
182 | && reg_renumber[regno2] < 0 && lra_reg_info[regno2].nrefs != 0 | |
183 | && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]] | |
184 | == ira_class_hard_regs_num[regno_allocno_class_array[regno2]])) | |
185 | process_copy_to_form_thread (regno1, regno2, cp->freq); | |
186 | } | |
187 | ||
188 | /* Free REGNO_ASSIGN_INFO. */ | |
189 | static void | |
190 | finish_regno_assign_info (void) | |
191 | { | |
192 | free (regno_assign_info); | |
193 | } | |
194 | ||
195 | /* The function is used to sort *reload* and *inheritance* pseudos to | |
196 | try to assign them hard registers. We put pseudos from the same | |
197 | thread always nearby. */ | |
198 | static int | |
199 | reload_pseudo_compare_func (const void *v1p, const void *v2p) | |
200 | { | |
201 | int r1 = *(const int *) v1p, r2 = *(const int *) v2p; | |
202 | enum reg_class cl1 = regno_allocno_class_array[r1]; | |
203 | enum reg_class cl2 = regno_allocno_class_array[r2]; | |
204 | int diff; | |
1a8f8886 | 205 | |
c6a6cdaa | 206 | lra_assert (r1 >= lra_constraint_new_regno_start |
207 | && r2 >= lra_constraint_new_regno_start); | |
1a8f8886 | 208 | |
c6a6cdaa | 209 | /* Prefer to assign reload registers with smaller classes first to |
210 | guarantee assignment to all reload registers. */ | |
211 | if ((diff = (ira_class_hard_regs_num[cl1] | |
212 | - ira_class_hard_regs_num[cl2])) != 0) | |
213 | return diff; | |
a27d5d8c | 214 | /* Allocate bigger pseudos first to avoid register file |
215 | fragmentation. */ | |
216 | if ((diff | |
217 | = (ira_reg_class_max_nregs[cl2][lra_reg_info[r2].biggest_mode] | |
218 | - ira_reg_class_max_nregs[cl1][lra_reg_info[r1].biggest_mode])) != 0) | |
219 | return diff; | |
0fd61403 | 220 | if ((diff = (regno_assign_info[regno_assign_info[r2].first].freq |
221 | - regno_assign_info[regno_assign_info[r1].first].freq)) != 0) | |
222 | return diff; | |
c6a6cdaa | 223 | /* Put pseudos from the thread nearby. */ |
224 | if ((diff = regno_assign_info[r1].first - regno_assign_info[r2].first) != 0) | |
225 | return diff; | |
ab4ea053 | 226 | /* Prefer pseudos with longer live ranges. It sets up better |
227 | prefered hard registers for the thread pseudos and decreases | |
228 | register-register moves between the thread pseudos. */ | |
229 | if ((diff = regno_live_length[r2] - regno_live_length[r1]) != 0) | |
230 | return diff; | |
c6a6cdaa | 231 | /* If regs are equally good, sort by their numbers, so that the |
232 | results of qsort leave nothing to chance. */ | |
233 | return r1 - r2; | |
234 | } | |
235 | ||
236 | /* The function is used to sort *non-reload* pseudos to try to assign | |
237 | them hard registers. The order calculation is simpler than in the | |
238 | previous function and based on the pseudo frequency usage. */ | |
239 | static int | |
240 | pseudo_compare_func (const void *v1p, const void *v2p) | |
241 | { | |
242 | int r1 = *(const int *) v1p, r2 = *(const int *) v2p; | |
243 | int diff; | |
244 | ||
bf9df576 | 245 | /* Assign hard reg to static chain pointer first pseudo when |
246 | non-local goto is used. */ | |
a47422c4 | 247 | if ((diff = (non_spilled_static_chain_regno_p (r2) |
248 | - non_spilled_static_chain_regno_p (r1))) != 0) | |
249 | return diff; | |
bf9df576 | 250 | |
c6a6cdaa | 251 | /* Prefer to assign more frequently used registers first. */ |
252 | if ((diff = lra_reg_info[r2].freq - lra_reg_info[r1].freq) != 0) | |
253 | return diff; | |
1a8f8886 | 254 | |
c6a6cdaa | 255 | /* If regs are equally good, sort by their numbers, so that the |
256 | results of qsort leave nothing to chance. */ | |
257 | return r1 - r2; | |
258 | } | |
259 | ||
260 | /* Arrays of size LRA_LIVE_MAX_POINT mapping a program point to the | |
261 | pseudo live ranges with given start point. We insert only live | |
262 | ranges of pseudos interesting for assignment purposes. They are | |
263 | reload pseudos and pseudos assigned to hard registers. */ | |
264 | static lra_live_range_t *start_point_ranges; | |
265 | ||
266 | /* Used as a flag that a live range is not inserted in the start point | |
267 | chain. */ | |
268 | static struct lra_live_range not_in_chain_mark; | |
269 | ||
270 | /* Create and set up START_POINT_RANGES. */ | |
271 | static void | |
272 | create_live_range_start_chains (void) | |
273 | { | |
274 | int i, max_regno; | |
275 | lra_live_range_t r; | |
276 | ||
277 | start_point_ranges = XCNEWVEC (lra_live_range_t, lra_live_max_point); | |
278 | max_regno = max_reg_num (); | |
279 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
280 | if (i >= lra_constraint_new_regno_start || reg_renumber[i] >= 0) | |
281 | { | |
282 | for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
283 | { | |
284 | r->start_next = start_point_ranges[r->start]; | |
285 | start_point_ranges[r->start] = r; | |
286 | } | |
287 | } | |
288 | else | |
289 | { | |
290 | for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
291 | r->start_next = ¬_in_chain_mark; | |
292 | } | |
293 | } | |
294 | ||
295 | /* Insert live ranges of pseudo REGNO into start chains if they are | |
296 | not there yet. */ | |
297 | static void | |
298 | insert_in_live_range_start_chain (int regno) | |
299 | { | |
300 | lra_live_range_t r = lra_reg_info[regno].live_ranges; | |
301 | ||
302 | if (r->start_next != ¬_in_chain_mark) | |
303 | return; | |
304 | for (; r != NULL; r = r->next) | |
305 | { | |
306 | r->start_next = start_point_ranges[r->start]; | |
307 | start_point_ranges[r->start] = r; | |
308 | } | |
309 | } | |
310 | ||
311 | /* Free START_POINT_RANGES. */ | |
312 | static void | |
313 | finish_live_range_start_chains (void) | |
314 | { | |
315 | gcc_assert (start_point_ranges != NULL); | |
316 | free (start_point_ranges); | |
317 | start_point_ranges = NULL; | |
318 | } | |
319 | ||
320 | /* Map: program point -> bitmap of all pseudos living at the point and | |
321 | assigned to hard registers. */ | |
322 | static bitmap_head *live_hard_reg_pseudos; | |
323 | static bitmap_obstack live_hard_reg_pseudos_bitmap_obstack; | |
324 | ||
325 | /* reg_renumber corresponding to pseudos marked in | |
326 | live_hard_reg_pseudos. reg_renumber might be not matched to | |
327 | live_hard_reg_pseudos but live_pseudos_reg_renumber always reflects | |
328 | live_hard_reg_pseudos. */ | |
329 | static int *live_pseudos_reg_renumber; | |
330 | ||
331 | /* Sparseset used to calculate living hard reg pseudos for some program | |
332 | point range. */ | |
333 | static sparseset live_range_hard_reg_pseudos; | |
334 | ||
335 | /* Sparseset used to calculate living reload/inheritance pseudos for | |
336 | some program point range. */ | |
337 | static sparseset live_range_reload_inheritance_pseudos; | |
338 | ||
339 | /* Allocate and initialize the data about living pseudos at program | |
340 | points. */ | |
341 | static void | |
342 | init_lives (void) | |
343 | { | |
344 | int i, max_regno = max_reg_num (); | |
345 | ||
346 | live_range_hard_reg_pseudos = sparseset_alloc (max_regno); | |
347 | live_range_reload_inheritance_pseudos = sparseset_alloc (max_regno); | |
348 | live_hard_reg_pseudos = XNEWVEC (bitmap_head, lra_live_max_point); | |
349 | bitmap_obstack_initialize (&live_hard_reg_pseudos_bitmap_obstack); | |
350 | for (i = 0; i < lra_live_max_point; i++) | |
351 | bitmap_initialize (&live_hard_reg_pseudos[i], | |
352 | &live_hard_reg_pseudos_bitmap_obstack); | |
353 | live_pseudos_reg_renumber = XNEWVEC (int, max_regno); | |
354 | for (i = 0; i < max_regno; i++) | |
355 | live_pseudos_reg_renumber[i] = -1; | |
356 | } | |
357 | ||
358 | /* Free the data about living pseudos at program points. */ | |
359 | static void | |
360 | finish_lives (void) | |
361 | { | |
362 | sparseset_free (live_range_hard_reg_pseudos); | |
363 | sparseset_free (live_range_reload_inheritance_pseudos); | |
364 | free (live_hard_reg_pseudos); | |
365 | bitmap_obstack_release (&live_hard_reg_pseudos_bitmap_obstack); | |
366 | free (live_pseudos_reg_renumber); | |
367 | } | |
368 | ||
369 | /* Update the LIVE_HARD_REG_PSEUDOS and LIVE_PSEUDOS_REG_RENUMBER | |
370 | entries for pseudo REGNO. Assume that the register has been | |
371 | spilled if FREE_P, otherwise assume that it has been assigned | |
372 | reg_renumber[REGNO] (if >= 0). We also insert the pseudo live | |
373 | ranges in the start chains when it is assumed to be assigned to a | |
374 | hard register because we use the chains of pseudos assigned to hard | |
375 | registers during allocation. */ | |
376 | static void | |
377 | update_lives (int regno, bool free_p) | |
378 | { | |
379 | int p; | |
380 | lra_live_range_t r; | |
381 | ||
382 | if (reg_renumber[regno] < 0) | |
383 | return; | |
384 | live_pseudos_reg_renumber[regno] = free_p ? -1 : reg_renumber[regno]; | |
385 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
386 | { | |
387 | for (p = r->start; p <= r->finish; p++) | |
388 | if (free_p) | |
389 | bitmap_clear_bit (&live_hard_reg_pseudos[p], regno); | |
390 | else | |
391 | { | |
392 | bitmap_set_bit (&live_hard_reg_pseudos[p], regno); | |
393 | insert_in_live_range_start_chain (regno); | |
394 | } | |
395 | } | |
396 | } | |
397 | ||
398 | /* Sparseset used to calculate reload pseudos conflicting with a given | |
399 | pseudo when we are trying to find a hard register for the given | |
400 | pseudo. */ | |
401 | static sparseset conflict_reload_and_inheritance_pseudos; | |
402 | ||
403 | /* Map: program point -> bitmap of all reload and inheritance pseudos | |
404 | living at the point. */ | |
405 | static bitmap_head *live_reload_and_inheritance_pseudos; | |
406 | static bitmap_obstack live_reload_and_inheritance_pseudos_bitmap_obstack; | |
407 | ||
408 | /* Allocate and initialize data about living reload pseudos at any | |
409 | given program point. */ | |
410 | static void | |
411 | init_live_reload_and_inheritance_pseudos (void) | |
412 | { | |
413 | int i, p, max_regno = max_reg_num (); | |
414 | lra_live_range_t r; | |
1a8f8886 | 415 | |
c6a6cdaa | 416 | conflict_reload_and_inheritance_pseudos = sparseset_alloc (max_regno); |
417 | live_reload_and_inheritance_pseudos = XNEWVEC (bitmap_head, lra_live_max_point); | |
418 | bitmap_obstack_initialize (&live_reload_and_inheritance_pseudos_bitmap_obstack); | |
419 | for (p = 0; p < lra_live_max_point; p++) | |
420 | bitmap_initialize (&live_reload_and_inheritance_pseudos[p], | |
421 | &live_reload_and_inheritance_pseudos_bitmap_obstack); | |
422 | for (i = lra_constraint_new_regno_start; i < max_regno; i++) | |
423 | { | |
424 | for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
425 | for (p = r->start; p <= r->finish; p++) | |
426 | bitmap_set_bit (&live_reload_and_inheritance_pseudos[p], i); | |
427 | } | |
428 | } | |
429 | ||
430 | /* Finalize data about living reload pseudos at any given program | |
431 | point. */ | |
432 | static void | |
433 | finish_live_reload_and_inheritance_pseudos (void) | |
434 | { | |
435 | sparseset_free (conflict_reload_and_inheritance_pseudos); | |
436 | free (live_reload_and_inheritance_pseudos); | |
437 | bitmap_obstack_release (&live_reload_and_inheritance_pseudos_bitmap_obstack); | |
438 | } | |
439 | ||
440 | /* The value used to check that cost of given hard reg is really | |
441 | defined currently. */ | |
442 | static int curr_hard_regno_costs_check = 0; | |
443 | /* Array used to check that cost of the corresponding hard reg (the | |
444 | array element index) is really defined currently. */ | |
445 | static int hard_regno_costs_check[FIRST_PSEUDO_REGISTER]; | |
446 | /* The current costs of allocation of hard regs. Defined only if the | |
447 | value of the corresponding element of the previous array is equal to | |
448 | CURR_HARD_REGNO_COSTS_CHECK. */ | |
449 | static int hard_regno_costs[FIRST_PSEUDO_REGISTER]; | |
450 | ||
451 | /* Adjust cost of HARD_REGNO by INCR. Reset the cost first if it is | |
452 | not defined yet. */ | |
453 | static inline void | |
454 | adjust_hard_regno_cost (int hard_regno, int incr) | |
455 | { | |
456 | if (hard_regno_costs_check[hard_regno] != curr_hard_regno_costs_check) | |
457 | hard_regno_costs[hard_regno] = 0; | |
458 | hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check; | |
459 | hard_regno_costs[hard_regno] += incr; | |
460 | } | |
461 | ||
462 | /* Try to find a free hard register for pseudo REGNO. Return the | |
463 | hard register on success and set *COST to the cost of using | |
464 | that register. (If several registers have equal cost, the one with | |
465 | the highest priority wins.) Return -1 on failure. | |
466 | ||
1f558530 | 467 | If FIRST_P, return the first available hard reg ignoring other |
468 | criteria, e.g. allocation cost. This approach results in less hard | |
469 | reg pool fragmentation and permit to allocate hard regs to reload | |
470 | pseudos in complicated situations where pseudo sizes are different. | |
471 | ||
c6a6cdaa | 472 | If TRY_ONLY_HARD_REGNO >= 0, consider only that hard register, |
02306e02 | 473 | otherwise consider all hard registers in REGNO's class. |
474 | ||
475 | If REGNO_SET is not empty, only hard registers from the set are | |
476 | considered. */ | |
c6a6cdaa | 477 | static int |
02306e02 | 478 | find_hard_regno_for_1 (int regno, int *cost, int try_only_hard_regno, |
479 | bool first_p, HARD_REG_SET regno_set) | |
c6a6cdaa | 480 | { |
481 | HARD_REG_SET conflict_set; | |
482 | int best_cost = INT_MAX, best_priority = INT_MIN, best_usage = INT_MAX; | |
483 | lra_live_range_t r; | |
484 | int p, i, j, rclass_size, best_hard_regno, priority, hard_regno; | |
485 | int hr, conflict_hr, nregs; | |
3754d046 | 486 | machine_mode biggest_mode; |
c6a6cdaa | 487 | unsigned int k, conflict_regno; |
a4686d0a | 488 | poly_int64 offset; |
489 | int val, biggest_nregs, nregs_diff; | |
c6a6cdaa | 490 | enum reg_class rclass; |
491 | bitmap_iterator bi; | |
492 | bool *rclass_intersect_p; | |
d2e86786 | 493 | HARD_REG_SET impossible_start_hard_regs, available_regs; |
c6a6cdaa | 494 | |
02306e02 | 495 | if (hard_reg_set_empty_p (regno_set)) |
496 | COPY_HARD_REG_SET (conflict_set, lra_no_alloc_regs); | |
497 | else | |
498 | { | |
499 | COMPL_HARD_REG_SET (conflict_set, regno_set); | |
500 | IOR_HARD_REG_SET (conflict_set, lra_no_alloc_regs); | |
501 | } | |
c6a6cdaa | 502 | rclass = regno_allocno_class_array[regno]; |
503 | rclass_intersect_p = ira_reg_classes_intersect_p[rclass]; | |
504 | curr_hard_regno_costs_check++; | |
505 | sparseset_clear (conflict_reload_and_inheritance_pseudos); | |
506 | sparseset_clear (live_range_hard_reg_pseudos); | |
507 | IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs); | |
508 | biggest_mode = lra_reg_info[regno].biggest_mode; | |
509 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
510 | { | |
511 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi) | |
512 | if (rclass_intersect_p[regno_allocno_class_array[k]]) | |
513 | sparseset_set_bit (live_range_hard_reg_pseudos, k); | |
514 | EXECUTE_IF_SET_IN_BITMAP (&live_reload_and_inheritance_pseudos[r->start], | |
515 | 0, k, bi) | |
516 | if (lra_reg_info[k].preferred_hard_regno1 >= 0 | |
517 | && live_pseudos_reg_renumber[k] < 0 | |
518 | && rclass_intersect_p[regno_allocno_class_array[k]]) | |
519 | sparseset_set_bit (conflict_reload_and_inheritance_pseudos, k); | |
520 | for (p = r->start + 1; p <= r->finish; p++) | |
521 | { | |
522 | lra_live_range_t r2; | |
1a8f8886 | 523 | |
c6a6cdaa | 524 | for (r2 = start_point_ranges[p]; |
525 | r2 != NULL; | |
526 | r2 = r2->start_next) | |
527 | { | |
528 | if (r2->regno >= lra_constraint_new_regno_start | |
529 | && lra_reg_info[r2->regno].preferred_hard_regno1 >= 0 | |
530 | && live_pseudos_reg_renumber[r2->regno] < 0 | |
531 | && rclass_intersect_p[regno_allocno_class_array[r2->regno]]) | |
532 | sparseset_set_bit (conflict_reload_and_inheritance_pseudos, | |
533 | r2->regno); | |
534 | if (live_pseudos_reg_renumber[r2->regno] >= 0 | |
535 | && rclass_intersect_p[regno_allocno_class_array[r2->regno]]) | |
536 | sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno); | |
537 | } | |
538 | } | |
539 | } | |
540 | if ((hard_regno = lra_reg_info[regno].preferred_hard_regno1) >= 0) | |
541 | { | |
542 | adjust_hard_regno_cost | |
543 | (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit1); | |
544 | if ((hard_regno = lra_reg_info[regno].preferred_hard_regno2) >= 0) | |
545 | adjust_hard_regno_cost | |
546 | (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit2); | |
547 | } | |
548 | #ifdef STACK_REGS | |
549 | if (lra_reg_info[regno].no_stack_p) | |
550 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
551 | SET_HARD_REG_BIT (conflict_set, i); | |
552 | #endif | |
553 | sparseset_clear_bit (conflict_reload_and_inheritance_pseudos, regno); | |
554 | val = lra_reg_info[regno].val; | |
a1064490 | 555 | offset = lra_reg_info[regno].offset; |
c6a6cdaa | 556 | CLEAR_HARD_REG_SET (impossible_start_hard_regs); |
557 | EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno) | |
ae23d86d | 558 | { |
559 | conflict_hr = live_pseudos_reg_renumber[conflict_regno]; | |
560 | if (lra_reg_val_equal_p (conflict_regno, val, offset)) | |
561 | { | |
562 | conflict_hr = live_pseudos_reg_renumber[conflict_regno]; | |
92d2aec3 | 563 | nregs = hard_regno_nregs (conflict_hr, |
564 | lra_reg_info[conflict_regno].biggest_mode); | |
ae23d86d | 565 | /* Remember about multi-register pseudos. For example, 2 |
566 | hard register pseudos can start on the same hard register | |
f4d3c071 | 567 | but cannot start on HR and HR+1/HR-1. */ |
ae23d86d | 568 | for (hr = conflict_hr + 1; |
569 | hr < FIRST_PSEUDO_REGISTER && hr < conflict_hr + nregs; | |
570 | hr++) | |
571 | SET_HARD_REG_BIT (impossible_start_hard_regs, hr); | |
572 | for (hr = conflict_hr - 1; | |
16b9e38b | 573 | hr >= 0 && (int) end_hard_regno (biggest_mode, hr) > conflict_hr; |
ae23d86d | 574 | hr--) |
575 | SET_HARD_REG_BIT (impossible_start_hard_regs, hr); | |
576 | } | |
577 | else | |
578 | { | |
582adad1 | 579 | machine_mode biggest_conflict_mode |
ae23d86d | 580 | = lra_reg_info[conflict_regno].biggest_mode; |
581 | int biggest_conflict_nregs | |
92d2aec3 | 582 | = hard_regno_nregs (conflict_hr, biggest_conflict_mode); |
ae23d86d | 583 | |
92d2aec3 | 584 | nregs_diff |
585 | = (biggest_conflict_nregs | |
586 | - hard_regno_nregs (conflict_hr, | |
587 | PSEUDO_REGNO_MODE (conflict_regno))); | |
ae23d86d | 588 | add_to_hard_reg_set (&conflict_set, |
589 | biggest_conflict_mode, | |
590 | conflict_hr | |
591 | - (WORDS_BIG_ENDIAN ? nregs_diff : 0)); | |
592 | if (hard_reg_set_subset_p (reg_class_contents[rclass], | |
593 | conflict_set)) | |
594 | return -1; | |
595 | } | |
596 | } | |
c6a6cdaa | 597 | EXECUTE_IF_SET_IN_SPARSESET (conflict_reload_and_inheritance_pseudos, |
598 | conflict_regno) | |
a1064490 | 599 | if (!lra_reg_val_equal_p (conflict_regno, val, offset)) |
c6a6cdaa | 600 | { |
601 | lra_assert (live_pseudos_reg_renumber[conflict_regno] < 0); | |
602 | if ((hard_regno | |
603 | = lra_reg_info[conflict_regno].preferred_hard_regno1) >= 0) | |
604 | { | |
605 | adjust_hard_regno_cost | |
606 | (hard_regno, | |
607 | lra_reg_info[conflict_regno].preferred_hard_regno_profit1); | |
608 | if ((hard_regno | |
609 | = lra_reg_info[conflict_regno].preferred_hard_regno2) >= 0) | |
610 | adjust_hard_regno_cost | |
611 | (hard_regno, | |
612 | lra_reg_info[conflict_regno].preferred_hard_regno_profit2); | |
613 | } | |
614 | } | |
615 | /* Make sure that all registers in a multi-word pseudo belong to the | |
616 | required class. */ | |
617 | IOR_COMPL_HARD_REG_SET (conflict_set, reg_class_contents[rclass]); | |
618 | lra_assert (rclass != NO_REGS); | |
619 | rclass_size = ira_class_hard_regs_num[rclass]; | |
620 | best_hard_regno = -1; | |
621 | hard_regno = ira_class_hard_regs[rclass][0]; | |
92d2aec3 | 622 | biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode); |
c6a6cdaa | 623 | nregs_diff = (biggest_nregs |
92d2aec3 | 624 | - hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno))); |
d2e86786 | 625 | COPY_HARD_REG_SET (available_regs, reg_class_contents[rclass]); |
626 | AND_COMPL_HARD_REG_SET (available_regs, lra_no_alloc_regs); | |
c6a6cdaa | 627 | for (i = 0; i < rclass_size; i++) |
628 | { | |
629 | if (try_only_hard_regno >= 0) | |
630 | hard_regno = try_only_hard_regno; | |
631 | else | |
632 | hard_regno = ira_class_hard_regs[rclass][i]; | |
633 | if (! overlaps_hard_reg_set_p (conflict_set, | |
634 | PSEUDO_REGNO_MODE (regno), hard_regno) | |
b395382f | 635 | && targetm.hard_regno_mode_ok (hard_regno, |
636 | PSEUDO_REGNO_MODE (regno)) | |
f4d3c071 | 637 | /* We cannot use prohibited_class_mode_regs for all classes |
0df004ac | 638 | because it is not defined for all classes. */ |
639 | && (ira_allocno_class_translate[rclass] != rclass | |
640 | || ! TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs | |
641 | [rclass][PSEUDO_REGNO_MODE (regno)], | |
642 | hard_regno)) | |
c6a6cdaa | 643 | && ! TEST_HARD_REG_BIT (impossible_start_hard_regs, hard_regno) |
644 | && (nregs_diff == 0 | |
43e4e8dc | 645 | || (WORDS_BIG_ENDIAN |
646 | ? (hard_regno - nregs_diff >= 0 | |
d2e86786 | 647 | && TEST_HARD_REG_BIT (available_regs, |
43e4e8dc | 648 | hard_regno - nregs_diff)) |
d2e86786 | 649 | : TEST_HARD_REG_BIT (available_regs, |
43e4e8dc | 650 | hard_regno + nregs_diff)))) |
c6a6cdaa | 651 | { |
652 | if (hard_regno_costs_check[hard_regno] | |
653 | != curr_hard_regno_costs_check) | |
654 | { | |
655 | hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check; | |
656 | hard_regno_costs[hard_regno] = 0; | |
657 | } | |
658 | for (j = 0; | |
92d2aec3 | 659 | j < hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno)); |
c6a6cdaa | 660 | j++) |
661 | if (! TEST_HARD_REG_BIT (call_used_reg_set, hard_regno + j) | |
662 | && ! df_regs_ever_live_p (hard_regno + j)) | |
663 | /* It needs save restore. */ | |
664 | hard_regno_costs[hard_regno] | |
e374deeb | 665 | += (2 |
666 | * REG_FREQ_FROM_BB (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb) | |
667 | + 1); | |
c6a6cdaa | 668 | priority = targetm.register_priority (hard_regno); |
669 | if (best_hard_regno < 0 || hard_regno_costs[hard_regno] < best_cost | |
670 | || (hard_regno_costs[hard_regno] == best_cost | |
671 | && (priority > best_priority | |
4a2ca8f3 | 672 | || (targetm.register_usage_leveling_p () |
c6a6cdaa | 673 | && priority == best_priority |
674 | && best_usage > lra_hard_reg_usage[hard_regno])))) | |
675 | { | |
676 | best_hard_regno = hard_regno; | |
677 | best_cost = hard_regno_costs[hard_regno]; | |
678 | best_priority = priority; | |
679 | best_usage = lra_hard_reg_usage[hard_regno]; | |
680 | } | |
681 | } | |
1f558530 | 682 | if (try_only_hard_regno >= 0 || (first_p && best_hard_regno >= 0)) |
c6a6cdaa | 683 | break; |
684 | } | |
685 | if (best_hard_regno >= 0) | |
686 | *cost = best_cost - lra_reg_info[regno].freq; | |
687 | return best_hard_regno; | |
688 | } | |
689 | ||
02306e02 | 690 | /* A wrapper for find_hard_regno_for_1 (see comments for that function |
691 | description). This function tries to find a hard register for | |
692 | preferred class first if it is worth. */ | |
693 | static int | |
694 | find_hard_regno_for (int regno, int *cost, int try_only_hard_regno, bool first_p) | |
695 | { | |
696 | int hard_regno; | |
697 | HARD_REG_SET regno_set; | |
698 | ||
699 | /* Only original pseudos can have a different preferred class. */ | |
700 | if (try_only_hard_regno < 0 && regno < lra_new_regno_start) | |
701 | { | |
702 | enum reg_class pref_class = reg_preferred_class (regno); | |
703 | ||
704 | if (regno_allocno_class_array[regno] != pref_class) | |
705 | { | |
706 | hard_regno = find_hard_regno_for_1 (regno, cost, -1, first_p, | |
707 | reg_class_contents[pref_class]); | |
708 | if (hard_regno >= 0) | |
709 | return hard_regno; | |
710 | } | |
711 | } | |
712 | CLEAR_HARD_REG_SET (regno_set); | |
713 | return find_hard_regno_for_1 (regno, cost, try_only_hard_regno, first_p, | |
714 | regno_set); | |
715 | } | |
716 | ||
c6a6cdaa | 717 | /* Current value used for checking elements in |
718 | update_hard_regno_preference_check. */ | |
719 | static int curr_update_hard_regno_preference_check; | |
720 | /* If an element value is equal to the above variable value, then the | |
721 | corresponding regno has been processed for preference | |
722 | propagation. */ | |
723 | static int *update_hard_regno_preference_check; | |
724 | ||
725 | /* Update the preference for using HARD_REGNO for pseudos that are | |
726 | connected directly or indirectly with REGNO. Apply divisor DIV | |
727 | to any preference adjustments. | |
728 | ||
729 | The more indirectly a pseudo is connected, the smaller its effect | |
730 | should be. We therefore increase DIV on each "hop". */ | |
731 | static void | |
732 | update_hard_regno_preference (int regno, int hard_regno, int div) | |
733 | { | |
734 | int another_regno, cost; | |
735 | lra_copy_t cp, next_cp; | |
736 | ||
737 | /* Search depth 5 seems to be enough. */ | |
738 | if (div > (1 << 5)) | |
739 | return; | |
740 | for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp) | |
741 | { | |
742 | if (cp->regno1 == regno) | |
743 | { | |
744 | next_cp = cp->regno1_next; | |
745 | another_regno = cp->regno2; | |
746 | } | |
747 | else if (cp->regno2 == regno) | |
748 | { | |
749 | next_cp = cp->regno2_next; | |
750 | another_regno = cp->regno1; | |
751 | } | |
752 | else | |
753 | gcc_unreachable (); | |
754 | if (reg_renumber[another_regno] < 0 | |
755 | && (update_hard_regno_preference_check[another_regno] | |
756 | != curr_update_hard_regno_preference_check)) | |
757 | { | |
758 | update_hard_regno_preference_check[another_regno] | |
759 | = curr_update_hard_regno_preference_check; | |
760 | cost = cp->freq < div ? 1 : cp->freq / div; | |
761 | lra_setup_reload_pseudo_preferenced_hard_reg | |
762 | (another_regno, hard_regno, cost); | |
763 | update_hard_regno_preference (another_regno, hard_regno, div * 2); | |
764 | } | |
765 | } | |
766 | } | |
767 | ||
1f3a048a | 768 | /* Return prefix title for pseudo REGNO. */ |
769 | static const char * | |
770 | pseudo_prefix_title (int regno) | |
771 | { | |
772 | return | |
773 | (regno < lra_constraint_new_regno_start ? "" | |
774 | : bitmap_bit_p (&lra_inheritance_pseudos, regno) ? "inheritance " | |
775 | : bitmap_bit_p (&lra_split_regs, regno) ? "split " | |
776 | : bitmap_bit_p (&lra_optional_reload_pseudos, regno) ? "optional reload " | |
777 | : bitmap_bit_p (&lra_subreg_reload_pseudos, regno) ? "subreg reload " | |
778 | : "reload "); | |
779 | } | |
780 | ||
c6a6cdaa | 781 | /* Update REG_RENUMBER and other pseudo preferences by assignment of |
782 | HARD_REGNO to pseudo REGNO and print about it if PRINT_P. */ | |
783 | void | |
784 | lra_setup_reg_renumber (int regno, int hard_regno, bool print_p) | |
785 | { | |
786 | int i, hr; | |
787 | ||
f4d3c071 | 788 | /* We cannot just reassign hard register. */ |
c6a6cdaa | 789 | lra_assert (hard_regno < 0 || reg_renumber[regno] < 0); |
790 | if ((hr = hard_regno) < 0) | |
791 | hr = reg_renumber[regno]; | |
792 | reg_renumber[regno] = hard_regno; | |
793 | lra_assert (hr >= 0); | |
92d2aec3 | 794 | for (i = 0; i < hard_regno_nregs (hr, PSEUDO_REGNO_MODE (regno)); i++) |
c6a6cdaa | 795 | if (hard_regno < 0) |
796 | lra_hard_reg_usage[hr + i] -= lra_reg_info[regno].freq; | |
797 | else | |
798 | lra_hard_reg_usage[hr + i] += lra_reg_info[regno].freq; | |
799 | if (print_p && lra_dump_file != NULL) | |
800 | fprintf (lra_dump_file, " Assign %d to %sr%d (freq=%d)\n", | |
1f3a048a | 801 | reg_renumber[regno], pseudo_prefix_title (regno), |
c6a6cdaa | 802 | regno, lra_reg_info[regno].freq); |
803 | if (hard_regno >= 0) | |
804 | { | |
805 | curr_update_hard_regno_preference_check++; | |
806 | update_hard_regno_preference (regno, hard_regno, 1); | |
807 | } | |
808 | } | |
809 | ||
810 | /* Pseudos which occur in insns containing a particular pseudo. */ | |
811 | static bitmap_head insn_conflict_pseudos; | |
812 | ||
813 | /* Bitmaps used to contain spill pseudos for given pseudo hard regno | |
814 | and best spill pseudos for given pseudo (and best hard regno). */ | |
815 | static bitmap_head spill_pseudos_bitmap, best_spill_pseudos_bitmap; | |
816 | ||
817 | /* Current pseudo check for validity of elements in | |
818 | TRY_HARD_REG_PSEUDOS. */ | |
819 | static int curr_pseudo_check; | |
820 | /* Array used for validity of elements in TRY_HARD_REG_PSEUDOS. */ | |
821 | static int try_hard_reg_pseudos_check[FIRST_PSEUDO_REGISTER]; | |
822 | /* Pseudos who hold given hard register at the considered points. */ | |
823 | static bitmap_head try_hard_reg_pseudos[FIRST_PSEUDO_REGISTER]; | |
824 | ||
825 | /* Set up try_hard_reg_pseudos for given program point P and class | |
826 | RCLASS. Those are pseudos living at P and assigned to a hard | |
827 | register of RCLASS. In other words, those are pseudos which can be | |
828 | spilled to assign a hard register of RCLASS to a pseudo living at | |
829 | P. */ | |
830 | static void | |
831 | setup_try_hard_regno_pseudos (int p, enum reg_class rclass) | |
832 | { | |
833 | int i, hard_regno; | |
3754d046 | 834 | machine_mode mode; |
c6a6cdaa | 835 | unsigned int spill_regno; |
836 | bitmap_iterator bi; | |
837 | ||
838 | /* Find what pseudos could be spilled. */ | |
839 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[p], 0, spill_regno, bi) | |
840 | { | |
841 | mode = PSEUDO_REGNO_MODE (spill_regno); | |
842 | hard_regno = live_pseudos_reg_renumber[spill_regno]; | |
843 | if (overlaps_hard_reg_set_p (reg_class_contents[rclass], | |
844 | mode, hard_regno)) | |
845 | { | |
92d2aec3 | 846 | for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--) |
c6a6cdaa | 847 | { |
848 | if (try_hard_reg_pseudos_check[hard_regno + i] | |
849 | != curr_pseudo_check) | |
850 | { | |
851 | try_hard_reg_pseudos_check[hard_regno + i] | |
852 | = curr_pseudo_check; | |
853 | bitmap_clear (&try_hard_reg_pseudos[hard_regno + i]); | |
854 | } | |
855 | bitmap_set_bit (&try_hard_reg_pseudos[hard_regno + i], | |
856 | spill_regno); | |
857 | } | |
858 | } | |
859 | } | |
860 | } | |
861 | ||
862 | /* Assign temporarily HARD_REGNO to pseudo REGNO. Temporary | |
863 | assignment means that we might undo the data change. */ | |
864 | static void | |
865 | assign_temporarily (int regno, int hard_regno) | |
866 | { | |
867 | int p; | |
868 | lra_live_range_t r; | |
869 | ||
870 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
871 | { | |
872 | for (p = r->start; p <= r->finish; p++) | |
873 | if (hard_regno < 0) | |
874 | bitmap_clear_bit (&live_hard_reg_pseudos[p], regno); | |
875 | else | |
876 | { | |
877 | bitmap_set_bit (&live_hard_reg_pseudos[p], regno); | |
878 | insert_in_live_range_start_chain (regno); | |
879 | } | |
880 | } | |
881 | live_pseudos_reg_renumber[regno] = hard_regno; | |
882 | } | |
883 | ||
b7dccfb0 | 884 | /* Return true iff there is a reason why pseudo SPILL_REGNO should not |
885 | be spilled. */ | |
886 | static bool | |
887 | must_not_spill_p (unsigned spill_regno) | |
888 | { | |
889 | if ((pic_offset_table_rtx != NULL | |
890 | && spill_regno == REGNO (pic_offset_table_rtx)) | |
891 | || ((int) spill_regno >= lra_constraint_new_regno_start | |
892 | && ! bitmap_bit_p (&lra_inheritance_pseudos, spill_regno) | |
893 | && ! bitmap_bit_p (&lra_split_regs, spill_regno) | |
894 | && ! bitmap_bit_p (&lra_subreg_reload_pseudos, spill_regno) | |
895 | && ! bitmap_bit_p (&lra_optional_reload_pseudos, spill_regno))) | |
896 | return true; | |
897 | /* A reload pseudo that requires a singleton register class should | |
898 | not be spilled. | |
899 | FIXME: this mitigates the issue on certain i386 patterns, but | |
900 | does not solve the general case where existing reloads fully | |
901 | cover a limited register class. */ | |
902 | if (!bitmap_bit_p (&non_reload_pseudos, spill_regno) | |
8805daa6 | 903 | && reg_class_size [reg_preferred_class (spill_regno)] == 1 |
904 | && reg_alternate_class (spill_regno) == NO_REGS) | |
b7dccfb0 | 905 | return true; |
906 | return false; | |
907 | } | |
908 | ||
c6a6cdaa | 909 | /* Array used for sorting reload pseudos for subsequent allocation |
910 | after spilling some pseudo. */ | |
911 | static int *sorted_reload_pseudos; | |
912 | ||
913 | /* Spill some pseudos for a reload pseudo REGNO and return hard | |
914 | register which should be used for pseudo after spilling. The | |
915 | function adds spilled pseudos to SPILLED_PSEUDO_BITMAP. When we | |
916 | choose hard register (and pseudos occupying the hard registers and | |
917 | to be spilled), we take into account not only how REGNO will | |
918 | benefit from the spills but also how other reload pseudos not yet | |
919 | assigned to hard registers benefit from the spills too. In very | |
1f558530 | 920 | rare cases, the function can fail and return -1. |
921 | ||
922 | If FIRST_P, return the first available hard reg ignoring other | |
923 | criteria, e.g. allocation cost and cost of spilling non-reload | |
924 | pseudos. This approach results in less hard reg pool fragmentation | |
925 | and permit to allocate hard regs to reload pseudos in complicated | |
926 | situations where pseudo sizes are different. */ | |
c6a6cdaa | 927 | static int |
1f558530 | 928 | spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p) |
c6a6cdaa | 929 | { |
930 | int i, j, n, p, hard_regno, best_hard_regno, cost, best_cost, rclass_size; | |
931 | int reload_hard_regno, reload_cost; | |
bf9df576 | 932 | bool static_p, best_static_p; |
3754d046 | 933 | machine_mode mode; |
c6a6cdaa | 934 | enum reg_class rclass; |
c6a6cdaa | 935 | unsigned int spill_regno, reload_regno, uid; |
936 | int insn_pseudos_num, best_insn_pseudos_num; | |
0f7b6a0d | 937 | int bad_spills_num, smallest_bad_spills_num; |
c6a6cdaa | 938 | lra_live_range_t r; |
939 | bitmap_iterator bi; | |
940 | ||
941 | rclass = regno_allocno_class_array[regno]; | |
942 | lra_assert (reg_renumber[regno] < 0 && rclass != NO_REGS); | |
943 | bitmap_clear (&insn_conflict_pseudos); | |
944 | bitmap_clear (&best_spill_pseudos_bitmap); | |
945 | EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi) | |
946 | { | |
947 | struct lra_insn_reg *ir; | |
1a8f8886 | 948 | |
c6a6cdaa | 949 | for (ir = lra_get_insn_regs (uid); ir != NULL; ir = ir->next) |
950 | if (ir->regno >= FIRST_PSEUDO_REGISTER) | |
951 | bitmap_set_bit (&insn_conflict_pseudos, ir->regno); | |
952 | } | |
953 | best_hard_regno = -1; | |
954 | best_cost = INT_MAX; | |
bf9df576 | 955 | best_static_p = TRUE; |
c6a6cdaa | 956 | best_insn_pseudos_num = INT_MAX; |
0f7b6a0d | 957 | smallest_bad_spills_num = INT_MAX; |
c6a6cdaa | 958 | rclass_size = ira_class_hard_regs_num[rclass]; |
959 | mode = PSEUDO_REGNO_MODE (regno); | |
960 | /* Invalidate try_hard_reg_pseudos elements. */ | |
961 | curr_pseudo_check++; | |
962 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
963 | for (p = r->start; p <= r->finish; p++) | |
964 | setup_try_hard_regno_pseudos (p, rclass); | |
965 | for (i = 0; i < rclass_size; i++) | |
966 | { | |
967 | hard_regno = ira_class_hard_regs[rclass][i]; | |
968 | bitmap_clear (&spill_pseudos_bitmap); | |
92d2aec3 | 969 | for (j = hard_regno_nregs (hard_regno, mode) - 1; j >= 0; j--) |
c6a6cdaa | 970 | { |
971 | if (try_hard_reg_pseudos_check[hard_regno + j] != curr_pseudo_check) | |
972 | continue; | |
973 | lra_assert (!bitmap_empty_p (&try_hard_reg_pseudos[hard_regno + j])); | |
974 | bitmap_ior_into (&spill_pseudos_bitmap, | |
975 | &try_hard_reg_pseudos[hard_regno + j]); | |
976 | } | |
977 | /* Spill pseudos. */ | |
bf9df576 | 978 | static_p = false; |
c6a6cdaa | 979 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) |
b7dccfb0 | 980 | if (must_not_spill_p (spill_regno)) |
c6a6cdaa | 981 | goto fail; |
bf9df576 | 982 | else if (non_spilled_static_chain_regno_p (spill_regno)) |
983 | static_p = true; | |
c6a6cdaa | 984 | insn_pseudos_num = 0; |
0f7b6a0d | 985 | bad_spills_num = 0; |
c6a6cdaa | 986 | if (lra_dump_file != NULL) |
987 | fprintf (lra_dump_file, " Trying %d:", hard_regno); | |
988 | sparseset_clear (live_range_reload_inheritance_pseudos); | |
989 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
990 | { | |
991 | if (bitmap_bit_p (&insn_conflict_pseudos, spill_regno)) | |
992 | insn_pseudos_num++; | |
0f7b6a0d | 993 | if (spill_regno >= (unsigned int) lra_bad_spill_regno_start) |
994 | bad_spills_num++; | |
c6a6cdaa | 995 | for (r = lra_reg_info[spill_regno].live_ranges; |
996 | r != NULL; | |
997 | r = r->next) | |
998 | { | |
999 | for (p = r->start; p <= r->finish; p++) | |
1000 | { | |
1001 | lra_live_range_t r2; | |
1a8f8886 | 1002 | |
c6a6cdaa | 1003 | for (r2 = start_point_ranges[p]; |
1004 | r2 != NULL; | |
1005 | r2 = r2->start_next) | |
1006 | if (r2->regno >= lra_constraint_new_regno_start) | |
1007 | sparseset_set_bit (live_range_reload_inheritance_pseudos, | |
1008 | r2->regno); | |
1009 | } | |
1010 | } | |
1011 | } | |
c6ec6506 | 1012 | n = 0; |
eb3db740 | 1013 | if (sparseset_cardinality (live_range_reload_inheritance_pseudos) |
adfa3d5a | 1014 | <= (unsigned)LRA_MAX_CONSIDERED_RELOAD_PSEUDOS) |
eb3db740 | 1015 | EXECUTE_IF_SET_IN_SPARSESET (live_range_reload_inheritance_pseudos, |
1016 | reload_regno) | |
1017 | if ((int) reload_regno != regno | |
1018 | && (ira_reg_classes_intersect_p | |
1019 | [rclass][regno_allocno_class_array[reload_regno]]) | |
1020 | && live_pseudos_reg_renumber[reload_regno] < 0 | |
1f558530 | 1021 | && find_hard_regno_for (reload_regno, &cost, -1, first_p) < 0) |
eb3db740 | 1022 | sorted_reload_pseudos[n++] = reload_regno; |
c6ec6506 | 1023 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) |
1024 | { | |
1025 | update_lives (spill_regno, true); | |
1026 | if (lra_dump_file != NULL) | |
1027 | fprintf (lra_dump_file, " spill %d(freq=%d)", | |
1028 | spill_regno, lra_reg_info[spill_regno].freq); | |
1029 | } | |
1f558530 | 1030 | hard_regno = find_hard_regno_for (regno, &cost, -1, first_p); |
c6a6cdaa | 1031 | if (hard_regno >= 0) |
1032 | { | |
1033 | assign_temporarily (regno, hard_regno); | |
c6a6cdaa | 1034 | qsort (sorted_reload_pseudos, n, sizeof (int), |
1035 | reload_pseudo_compare_func); | |
1036 | for (j = 0; j < n; j++) | |
1037 | { | |
1038 | reload_regno = sorted_reload_pseudos[j]; | |
1039 | lra_assert (live_pseudos_reg_renumber[reload_regno] < 0); | |
1040 | if ((reload_hard_regno | |
1041 | = find_hard_regno_for (reload_regno, | |
1f558530 | 1042 | &reload_cost, -1, first_p)) >= 0) |
c6a6cdaa | 1043 | { |
1044 | if (lra_dump_file != NULL) | |
1045 | fprintf (lra_dump_file, " assign %d(cost=%d)", | |
1046 | reload_regno, reload_cost); | |
1047 | assign_temporarily (reload_regno, reload_hard_regno); | |
1048 | cost += reload_cost; | |
1049 | } | |
1050 | } | |
1051 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
1052 | { | |
382f116f | 1053 | rtx_insn_list *x; |
1a8f8886 | 1054 | |
c6a6cdaa | 1055 | cost += lra_reg_info[spill_regno].freq; |
1056 | if (ira_reg_equiv[spill_regno].memory != NULL | |
1057 | || ira_reg_equiv[spill_regno].constant != NULL) | |
1058 | for (x = ira_reg_equiv[spill_regno].init_insns; | |
1059 | x != NULL; | |
382f116f | 1060 | x = x->next ()) |
1061 | cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (x->insn ())); | |
c6a6cdaa | 1062 | } |
bf9df576 | 1063 | /* Avoid spilling static chain pointer pseudo when non-local |
1064 | goto is used. */ | |
1065 | if ((! static_p && best_static_p) | |
1066 | || (static_p == best_static_p | |
1067 | && (best_insn_pseudos_num > insn_pseudos_num | |
1068 | || (best_insn_pseudos_num == insn_pseudos_num | |
1069 | && (bad_spills_num < smallest_bad_spills_num | |
1070 | || (bad_spills_num == smallest_bad_spills_num | |
1071 | && best_cost > cost)))))) | |
c6a6cdaa | 1072 | { |
1073 | best_insn_pseudos_num = insn_pseudos_num; | |
b439aebd | 1074 | smallest_bad_spills_num = bad_spills_num; |
bf9df576 | 1075 | best_static_p = static_p; |
c6a6cdaa | 1076 | best_cost = cost; |
1077 | best_hard_regno = hard_regno; | |
1078 | bitmap_copy (&best_spill_pseudos_bitmap, &spill_pseudos_bitmap); | |
1079 | if (lra_dump_file != NULL) | |
b439aebd | 1080 | fprintf (lra_dump_file, |
1081 | " Now best %d(cost=%d, bad_spills=%d, insn_pseudos=%d)\n", | |
1082 | hard_regno, cost, bad_spills_num, insn_pseudos_num); | |
c6a6cdaa | 1083 | } |
1084 | assign_temporarily (regno, -1); | |
1085 | for (j = 0; j < n; j++) | |
1086 | { | |
1087 | reload_regno = sorted_reload_pseudos[j]; | |
1088 | if (live_pseudos_reg_renumber[reload_regno] >= 0) | |
1089 | assign_temporarily (reload_regno, -1); | |
1090 | } | |
1091 | } | |
1092 | if (lra_dump_file != NULL) | |
1093 | fprintf (lra_dump_file, "\n"); | |
1094 | /* Restore the live hard reg pseudo info for spilled pseudos. */ | |
1095 | EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi) | |
1096 | update_lives (spill_regno, false); | |
1097 | fail: | |
1098 | ; | |
1099 | } | |
1100 | /* Spill: */ | |
1101 | EXECUTE_IF_SET_IN_BITMAP (&best_spill_pseudos_bitmap, 0, spill_regno, bi) | |
1102 | { | |
f95727ee | 1103 | if ((int) spill_regno >= lra_constraint_new_regno_start) |
1104 | former_reload_pseudo_spill_p = true; | |
c6a6cdaa | 1105 | if (lra_dump_file != NULL) |
1106 | fprintf (lra_dump_file, " Spill %sr%d(hr=%d, freq=%d) for r%d\n", | |
1f3a048a | 1107 | pseudo_prefix_title (spill_regno), |
c6a6cdaa | 1108 | spill_regno, reg_renumber[spill_regno], |
1109 | lra_reg_info[spill_regno].freq, regno); | |
1110 | update_lives (spill_regno, true); | |
1111 | lra_setup_reg_renumber (spill_regno, -1, false); | |
1112 | } | |
1113 | bitmap_ior_into (spilled_pseudo_bitmap, &best_spill_pseudos_bitmap); | |
1114 | return best_hard_regno; | |
1115 | } | |
1116 | ||
1117 | /* Assign HARD_REGNO to REGNO. */ | |
1118 | static void | |
1119 | assign_hard_regno (int hard_regno, int regno) | |
1120 | { | |
1121 | int i; | |
1122 | ||
1123 | lra_assert (hard_regno >= 0); | |
1124 | lra_setup_reg_renumber (regno, hard_regno, true); | |
1125 | update_lives (regno, false); | |
1126 | for (i = 0; | |
92d2aec3 | 1127 | i < hard_regno_nregs (hard_regno, lra_reg_info[regno].biggest_mode); |
c6a6cdaa | 1128 | i++) |
1129 | df_set_regs_ever_live (hard_regno + i, true); | |
1130 | } | |
1131 | ||
1132 | /* Array used for sorting different pseudos. */ | |
1133 | static int *sorted_pseudos; | |
1134 | ||
1135 | /* The constraints pass is allowed to create equivalences between | |
1136 | pseudos that make the current allocation "incorrect" (in the sense | |
1137 | that pseudos are assigned to hard registers from their own conflict | |
1138 | sets). The global variable lra_risky_transformations_p says | |
1139 | whether this might have happened. | |
1140 | ||
1141 | Process pseudos assigned to hard registers (less frequently used | |
1142 | first), spill if a conflict is found, and mark the spilled pseudos | |
1143 | in SPILLED_PSEUDO_BITMAP. Set up LIVE_HARD_REG_PSEUDOS from | |
1144 | pseudos, assigned to hard registers. */ | |
1145 | static void | |
1146 | setup_live_pseudos_and_spill_after_risky_transforms (bitmap | |
1147 | spilled_pseudo_bitmap) | |
1148 | { | |
8ae81042 | 1149 | int p, i, j, n, regno, hard_regno, biggest_nregs, nregs_diff; |
c6a6cdaa | 1150 | unsigned int k, conflict_regno; |
a4686d0a | 1151 | poly_int64 offset; |
1152 | int val; | |
c6a6cdaa | 1153 | HARD_REG_SET conflict_set; |
8ae81042 | 1154 | machine_mode mode, biggest_mode; |
c6a6cdaa | 1155 | lra_live_range_t r; |
1156 | bitmap_iterator bi; | |
1157 | int max_regno = max_reg_num (); | |
1158 | ||
1159 | if (! lra_risky_transformations_p) | |
1160 | { | |
1161 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
1162 | if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0) | |
1163 | update_lives (i, false); | |
1164 | return; | |
1165 | } | |
1166 | for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
a9d8ab38 | 1167 | if ((pic_offset_table_rtx == NULL_RTX |
1168 | || i != (int) REGNO (pic_offset_table_rtx)) | |
8ae81042 | 1169 | && (hard_regno = reg_renumber[i]) >= 0 && lra_reg_info[i].nrefs > 0) |
1170 | { | |
1171 | biggest_mode = lra_reg_info[i].biggest_mode; | |
1172 | biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode); | |
1173 | nregs_diff = (biggest_nregs | |
1174 | - hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (i))); | |
1175 | enum reg_class rclass = lra_get_allocno_class (i); | |
1176 | ||
e1273461 | 1177 | if ((WORDS_BIG_ENDIAN |
1178 | && (hard_regno - nregs_diff < 0 | |
1179 | || !TEST_HARD_REG_BIT (reg_class_contents[rclass], | |
1180 | hard_regno - nregs_diff))) | |
1181 | || (!WORDS_BIG_ENDIAN | |
1182 | && (hard_regno + nregs_diff >= FIRST_PSEUDO_REGISTER | |
1183 | || !TEST_HARD_REG_BIT (reg_class_contents[rclass], | |
1184 | hard_regno + nregs_diff)))) | |
8ae81042 | 1185 | { |
1186 | /* Hard registers of paradoxical sub-registers are out of | |
1187 | range of pseudo register class. Spill the pseudo. */ | |
1188 | reg_renumber[i] = -1; | |
1189 | continue; | |
1190 | } | |
1191 | sorted_pseudos[n++] = i; | |
1192 | } | |
c6a6cdaa | 1193 | qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func); |
a9d8ab38 | 1194 | if (pic_offset_table_rtx != NULL_RTX |
1195 | && (regno = REGNO (pic_offset_table_rtx)) >= FIRST_PSEUDO_REGISTER | |
1196 | && reg_renumber[regno] >= 0 && lra_reg_info[regno].nrefs > 0) | |
1197 | sorted_pseudos[n++] = regno; | |
c6a6cdaa | 1198 | for (i = n - 1; i >= 0; i--) |
1199 | { | |
1200 | regno = sorted_pseudos[i]; | |
1201 | hard_regno = reg_renumber[regno]; | |
1202 | lra_assert (hard_regno >= 0); | |
1203 | mode = lra_reg_info[regno].biggest_mode; | |
1204 | sparseset_clear (live_range_hard_reg_pseudos); | |
1205 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
1206 | { | |
1207 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi) | |
1208 | sparseset_set_bit (live_range_hard_reg_pseudos, k); | |
1209 | for (p = r->start + 1; p <= r->finish; p++) | |
1210 | { | |
1211 | lra_live_range_t r2; | |
1a8f8886 | 1212 | |
c6a6cdaa | 1213 | for (r2 = start_point_ranges[p]; |
1214 | r2 != NULL; | |
1215 | r2 = r2->start_next) | |
1216 | if (live_pseudos_reg_renumber[r2->regno] >= 0) | |
1217 | sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno); | |
1218 | } | |
1219 | } | |
1220 | COPY_HARD_REG_SET (conflict_set, lra_no_alloc_regs); | |
1221 | IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs); | |
1222 | val = lra_reg_info[regno].val; | |
a1064490 | 1223 | offset = lra_reg_info[regno].offset; |
c6a6cdaa | 1224 | EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno) |
a1064490 | 1225 | if (!lra_reg_val_equal_p (conflict_regno, val, offset) |
c6a6cdaa | 1226 | /* If it is multi-register pseudos they should start on |
1227 | the same hard register. */ | |
1228 | || hard_regno != reg_renumber[conflict_regno]) | |
9628978f | 1229 | { |
1230 | int conflict_hard_regno = reg_renumber[conflict_regno]; | |
8ae81042 | 1231 | |
1232 | biggest_mode = lra_reg_info[conflict_regno].biggest_mode; | |
1233 | biggest_nregs = hard_regno_nregs (conflict_hard_regno, | |
1234 | biggest_mode); | |
1235 | nregs_diff | |
92d2aec3 | 1236 | = (biggest_nregs |
1237 | - hard_regno_nregs (conflict_hard_regno, | |
1238 | PSEUDO_REGNO_MODE (conflict_regno))); | |
9628978f | 1239 | add_to_hard_reg_set (&conflict_set, |
1240 | biggest_mode, | |
1241 | conflict_hard_regno | |
1242 | - (WORDS_BIG_ENDIAN ? nregs_diff : 0)); | |
1243 | } | |
c6a6cdaa | 1244 | if (! overlaps_hard_reg_set_p (conflict_set, mode, hard_regno)) |
1245 | { | |
1246 | update_lives (regno, false); | |
1247 | continue; | |
1248 | } | |
1249 | bitmap_set_bit (spilled_pseudo_bitmap, regno); | |
1250 | for (j = 0; | |
92d2aec3 | 1251 | j < hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno)); |
c6a6cdaa | 1252 | j++) |
1253 | lra_hard_reg_usage[hard_regno + j] -= lra_reg_info[regno].freq; | |
1254 | reg_renumber[regno] = -1; | |
f95727ee | 1255 | if (regno >= lra_constraint_new_regno_start) |
1256 | former_reload_pseudo_spill_p = true; | |
c6a6cdaa | 1257 | if (lra_dump_file != NULL) |
1258 | fprintf (lra_dump_file, " Spill r%d after risky transformations\n", | |
1259 | regno); | |
1260 | } | |
1261 | } | |
1262 | ||
1263 | /* Improve allocation by assigning the same hard regno of inheritance | |
1264 | pseudos to the connected pseudos. We need this because inheritance | |
1265 | pseudos are allocated after reload pseudos in the thread and when | |
1266 | we assign a hard register to a reload pseudo we don't know yet that | |
1267 | the connected inheritance pseudos can get the same hard register. | |
1268 | Add pseudos with changed allocation to bitmap CHANGED_PSEUDOS. */ | |
1269 | static void | |
1270 | improve_inheritance (bitmap changed_pseudos) | |
1271 | { | |
1272 | unsigned int k; | |
1273 | int regno, another_regno, hard_regno, another_hard_regno, cost, i, n; | |
1274 | lra_copy_t cp, next_cp; | |
1275 | bitmap_iterator bi; | |
1276 | ||
47f6add2 | 1277 | if (lra_inheritance_iter > LRA_MAX_INHERITANCE_PASSES) |
1278 | return; | |
c6a6cdaa | 1279 | n = 0; |
1280 | EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, k, bi) | |
1281 | if (reg_renumber[k] >= 0 && lra_reg_info[k].nrefs != 0) | |
1282 | sorted_pseudos[n++] = k; | |
1283 | qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func); | |
1284 | for (i = 0; i < n; i++) | |
1285 | { | |
1286 | regno = sorted_pseudos[i]; | |
1287 | hard_regno = reg_renumber[regno]; | |
1288 | lra_assert (hard_regno >= 0); | |
1289 | for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp) | |
1290 | { | |
1291 | if (cp->regno1 == regno) | |
1292 | { | |
1293 | next_cp = cp->regno1_next; | |
1294 | another_regno = cp->regno2; | |
1295 | } | |
1296 | else if (cp->regno2 == regno) | |
1297 | { | |
1298 | next_cp = cp->regno2_next; | |
1299 | another_regno = cp->regno1; | |
1300 | } | |
1301 | else | |
1302 | gcc_unreachable (); | |
1303 | /* Don't change reload pseudo allocation. It might have | |
1304 | this allocation for a purpose and changing it can result | |
1305 | in LRA cycling. */ | |
1306 | if ((another_regno < lra_constraint_new_regno_start | |
1307 | || bitmap_bit_p (&lra_inheritance_pseudos, another_regno)) | |
1308 | && (another_hard_regno = reg_renumber[another_regno]) >= 0 | |
1309 | && another_hard_regno != hard_regno) | |
1310 | { | |
1311 | if (lra_dump_file != NULL) | |
1312 | fprintf | |
1313 | (lra_dump_file, | |
1314 | " Improving inheritance for %d(%d) and %d(%d)...\n", | |
1315 | regno, hard_regno, another_regno, another_hard_regno); | |
1316 | update_lives (another_regno, true); | |
1317 | lra_setup_reg_renumber (another_regno, -1, false); | |
1f558530 | 1318 | if (hard_regno == find_hard_regno_for (another_regno, &cost, |
1319 | hard_regno, false)) | |
c6a6cdaa | 1320 | assign_hard_regno (hard_regno, another_regno); |
1321 | else | |
1322 | assign_hard_regno (another_hard_regno, another_regno); | |
1323 | bitmap_set_bit (changed_pseudos, another_regno); | |
1324 | } | |
1325 | } | |
1326 | } | |
1327 | } | |
1328 | ||
1329 | ||
1330 | /* Bitmap finally containing all pseudos spilled on this assignment | |
1331 | pass. */ | |
1332 | static bitmap_head all_spilled_pseudos; | |
1333 | /* All pseudos whose allocation was changed. */ | |
1334 | static bitmap_head changed_pseudo_bitmap; | |
1335 | ||
1f558530 | 1336 | |
1337 | /* Add to LIVE_RANGE_HARD_REG_PSEUDOS all pseudos conflicting with | |
1338 | REGNO and whose hard regs can be assigned to REGNO. */ | |
1339 | static void | |
1340 | find_all_spills_for (int regno) | |
1341 | { | |
1342 | int p; | |
1343 | lra_live_range_t r; | |
1344 | unsigned int k; | |
1345 | bitmap_iterator bi; | |
1346 | enum reg_class rclass; | |
1347 | bool *rclass_intersect_p; | |
1348 | ||
1349 | rclass = regno_allocno_class_array[regno]; | |
1350 | rclass_intersect_p = ira_reg_classes_intersect_p[rclass]; | |
1351 | for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | |
1352 | { | |
1353 | EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi) | |
1354 | if (rclass_intersect_p[regno_allocno_class_array[k]]) | |
1355 | sparseset_set_bit (live_range_hard_reg_pseudos, k); | |
1356 | for (p = r->start + 1; p <= r->finish; p++) | |
1357 | { | |
1358 | lra_live_range_t r2; | |
1359 | ||
1360 | for (r2 = start_point_ranges[p]; | |
1361 | r2 != NULL; | |
1362 | r2 = r2->start_next) | |
1363 | { | |
1364 | if (live_pseudos_reg_renumber[r2->regno] >= 0 | |
6a4bc24e | 1365 | && ! sparseset_bit_p (live_range_hard_reg_pseudos, r2->regno) |
1366 | && rclass_intersect_p[regno_allocno_class_array[r2->regno]] | |
1367 | && ((int) r2->regno < lra_constraint_new_regno_start | |
1368 | || bitmap_bit_p (&lra_inheritance_pseudos, r2->regno) | |
1369 | || bitmap_bit_p (&lra_split_regs, r2->regno) | |
1370 | || bitmap_bit_p (&lra_optional_reload_pseudos, r2->regno) | |
1371 | /* There is no sense to consider another reload | |
1372 | pseudo if it has the same class. */ | |
1373 | || regno_allocno_class_array[r2->regno] != rclass)) | |
1f558530 | 1374 | sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno); |
1375 | } | |
1376 | } | |
1377 | } | |
1378 | } | |
1379 | ||
6a4bc24e | 1380 | /* Assign hard registers to reload pseudos and other pseudos. Return |
1381 | true if we was not able to assign hard registers to all reload | |
1382 | pseudos. */ | |
1383 | static bool | |
c6a6cdaa | 1384 | assign_by_spills (void) |
1385 | { | |
6a4bc24e | 1386 | int i, n, nfails, iter, regno, regno2, hard_regno, cost; |
ab4ea053 | 1387 | rtx restore_rtx; |
c6a6cdaa | 1388 | bitmap_head changed_insns, do_not_assign_nonreload_pseudos; |
1f558530 | 1389 | unsigned int u, conflict_regno; |
c6a6cdaa | 1390 | bitmap_iterator bi; |
6a4bc24e | 1391 | bool reload_p, fails_p = false; |
c6a6cdaa | 1392 | int max_regno = max_reg_num (); |
1393 | ||
1394 | for (n = 0, i = lra_constraint_new_regno_start; i < max_regno; i++) | |
1395 | if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0 | |
1396 | && regno_allocno_class_array[i] != NO_REGS) | |
1397 | sorted_pseudos[n++] = i; | |
1398 | bitmap_initialize (&insn_conflict_pseudos, ®_obstack); | |
1399 | bitmap_initialize (&spill_pseudos_bitmap, ®_obstack); | |
1400 | bitmap_initialize (&best_spill_pseudos_bitmap, ®_obstack); | |
1401 | update_hard_regno_preference_check = XCNEWVEC (int, max_regno); | |
1402 | curr_update_hard_regno_preference_check = 0; | |
1403 | memset (try_hard_reg_pseudos_check, 0, sizeof (try_hard_reg_pseudos_check)); | |
1404 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1405 | bitmap_initialize (&try_hard_reg_pseudos[i], ®_obstack); | |
1406 | curr_pseudo_check = 0; | |
1407 | bitmap_initialize (&changed_insns, ®_obstack); | |
1408 | bitmap_initialize (&non_reload_pseudos, ®_obstack); | |
1409 | bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs); | |
1f3a048a | 1410 | bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos); |
c6a6cdaa | 1411 | bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos); |
1412 | for (iter = 0; iter <= 1; iter++) | |
1413 | { | |
1414 | qsort (sorted_pseudos, n, sizeof (int), reload_pseudo_compare_func); | |
1415 | nfails = 0; | |
1416 | for (i = 0; i < n; i++) | |
1417 | { | |
1418 | regno = sorted_pseudos[i]; | |
ab4ea053 | 1419 | if (reg_renumber[regno] >= 0) |
1420 | continue; | |
c6a6cdaa | 1421 | if (lra_dump_file != NULL) |
1422 | fprintf (lra_dump_file, " Assigning to %d " | |
1423 | "(cl=%s, orig=%d, freq=%d, tfirst=%d, tfreq=%d)...\n", | |
1424 | regno, reg_class_names[regno_allocno_class_array[regno]], | |
1425 | ORIGINAL_REGNO (regno_reg_rtx[regno]), | |
1426 | lra_reg_info[regno].freq, regno_assign_info[regno].first, | |
1427 | regno_assign_info[regno_assign_info[regno].first].freq); | |
1f558530 | 1428 | hard_regno = find_hard_regno_for (regno, &cost, -1, iter == 1); |
bf619f35 | 1429 | reload_p = ! bitmap_bit_p (&non_reload_pseudos, regno); |
1430 | if (hard_regno < 0 && reload_p) | |
1f558530 | 1431 | hard_regno = spill_for (regno, &all_spilled_pseudos, iter == 1); |
c6a6cdaa | 1432 | if (hard_regno < 0) |
1433 | { | |
6a4bc24e | 1434 | if (reload_p) { |
1435 | /* Put unassigned reload pseudo first in the | |
1436 | array. */ | |
1437 | regno2 = sorted_pseudos[nfails]; | |
c6a6cdaa | 1438 | sorted_pseudos[nfails++] = regno; |
6a4bc24e | 1439 | sorted_pseudos[i] = regno2; |
1440 | } | |
c6a6cdaa | 1441 | } |
1442 | else | |
1443 | { | |
1444 | /* This register might have been spilled by the previous | |
1445 | pass. Indicate that it is no longer spilled. */ | |
1446 | bitmap_clear_bit (&all_spilled_pseudos, regno); | |
1447 | assign_hard_regno (hard_regno, regno); | |
bf619f35 | 1448 | if (! reload_p) |
1449 | /* As non-reload pseudo assignment is changed we | |
1450 | should reconsider insns referring for the | |
1451 | pseudo. */ | |
1452 | bitmap_set_bit (&changed_pseudo_bitmap, regno); | |
c6a6cdaa | 1453 | } |
1454 | } | |
6a4bc24e | 1455 | if (nfails == 0 || iter > 0) |
3729285e | 1456 | { |
6a4bc24e | 1457 | fails_p = nfails != 0; |
3729285e | 1458 | break; |
1459 | } | |
f4d3c071 | 1460 | /* This is a very rare event. We cannot assign a hard register |
1f558530 | 1461 | to reload pseudo because the hard register was assigned to |
1462 | another reload pseudo on a previous assignment pass. For x86 | |
1463 | example, on the 1st pass we assigned CX (although another | |
1464 | hard register could be used for this) to reload pseudo in an | |
1465 | insn, on the 2nd pass we need CX (and only this) hard | |
1466 | register for a new reload pseudo in the same insn. Another | |
1467 | possible situation may occur in assigning to multi-regs | |
1468 | reload pseudos when hard regs pool is too fragmented even | |
1469 | after spilling non-reload pseudos. | |
1470 | ||
1471 | We should do something radical here to succeed. Here we | |
1472 | spill *all* conflicting pseudos and reassign them. */ | |
c6a6cdaa | 1473 | if (lra_dump_file != NULL) |
1474 | fprintf (lra_dump_file, " 2nd iter for reload pseudo assignments:\n"); | |
1f558530 | 1475 | sparseset_clear (live_range_hard_reg_pseudos); |
c6a6cdaa | 1476 | for (i = 0; i < nfails; i++) |
1477 | { | |
1478 | if (lra_dump_file != NULL) | |
1479 | fprintf (lra_dump_file, " Reload r%d assignment failure\n", | |
1480 | sorted_pseudos[i]); | |
1f558530 | 1481 | find_all_spills_for (sorted_pseudos[i]); |
1482 | } | |
1483 | EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno) | |
1484 | { | |
1485 | if ((int) conflict_regno >= lra_constraint_new_regno_start) | |
f95727ee | 1486 | { |
1487 | sorted_pseudos[nfails++] = conflict_regno; | |
1488 | former_reload_pseudo_spill_p = true; | |
1489 | } | |
606eba76 | 1490 | else |
1491 | /* It is better to do reloads before spilling as after the | |
1492 | spill-subpass we will reload memory instead of pseudos | |
1493 | and this will make reusing reload pseudos more | |
1494 | complicated. Going directly to the spill pass in such | |
1495 | case might result in worse code performance or even LRA | |
1496 | cycling if we have few registers. */ | |
1497 | bitmap_set_bit (&all_spilled_pseudos, conflict_regno); | |
1f558530 | 1498 | if (lra_dump_file != NULL) |
1499 | fprintf (lra_dump_file, " Spill %s r%d(hr=%d, freq=%d)\n", | |
1500 | pseudo_prefix_title (conflict_regno), conflict_regno, | |
1501 | reg_renumber[conflict_regno], | |
1502 | lra_reg_info[conflict_regno].freq); | |
1503 | update_lives (conflict_regno, true); | |
1504 | lra_setup_reg_renumber (conflict_regno, -1, false); | |
c6a6cdaa | 1505 | } |
6a4bc24e | 1506 | if (n < nfails) |
1507 | n = nfails; | |
c6a6cdaa | 1508 | } |
1509 | improve_inheritance (&changed_pseudo_bitmap); | |
1510 | bitmap_clear (&non_reload_pseudos); | |
1511 | bitmap_clear (&changed_insns); | |
1512 | if (! lra_simple_p) | |
1513 | { | |
1514 | /* We should not assign to original pseudos of inheritance | |
1515 | pseudos or split pseudos if any its inheritance pseudo did | |
1516 | not get hard register or any its split pseudo was not split | |
1517 | because undo inheritance/split pass will extend live range of | |
1518 | such inheritance or split pseudos. */ | |
1519 | bitmap_initialize (&do_not_assign_nonreload_pseudos, ®_obstack); | |
1520 | EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, u, bi) | |
ab4ea053 | 1521 | if ((restore_rtx = lra_reg_info[u].restore_rtx) != NULL_RTX |
1522 | && REG_P (restore_rtx) | |
c6a6cdaa | 1523 | && reg_renumber[u] < 0 |
1524 | && bitmap_bit_p (&lra_inheritance_pseudos, u)) | |
ab4ea053 | 1525 | bitmap_set_bit (&do_not_assign_nonreload_pseudos, REGNO (restore_rtx)); |
c6a6cdaa | 1526 | EXECUTE_IF_SET_IN_BITMAP (&lra_split_regs, 0, u, bi) |
ab4ea053 | 1527 | if ((restore_rtx = lra_reg_info[u].restore_rtx) != NULL_RTX |
c6a6cdaa | 1528 | && reg_renumber[u] >= 0) |
ab4ea053 | 1529 | { |
1530 | lra_assert (REG_P (restore_rtx)); | |
1531 | bitmap_set_bit (&do_not_assign_nonreload_pseudos, REGNO (restore_rtx)); | |
1532 | } | |
c6a6cdaa | 1533 | for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
1534 | if (((i < lra_constraint_new_regno_start | |
1535 | && ! bitmap_bit_p (&do_not_assign_nonreload_pseudos, i)) | |
1536 | || (bitmap_bit_p (&lra_inheritance_pseudos, i) | |
ab4ea053 | 1537 | && lra_reg_info[i].restore_rtx != NULL_RTX) |
c6a6cdaa | 1538 | || (bitmap_bit_p (&lra_split_regs, i) |
ab4ea053 | 1539 | && lra_reg_info[i].restore_rtx != NULL_RTX) |
1f3a048a | 1540 | || bitmap_bit_p (&lra_subreg_reload_pseudos, i) |
c6a6cdaa | 1541 | || bitmap_bit_p (&lra_optional_reload_pseudos, i)) |
1542 | && reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0 | |
1543 | && regno_allocno_class_array[i] != NO_REGS) | |
1544 | sorted_pseudos[n++] = i; | |
1545 | bitmap_clear (&do_not_assign_nonreload_pseudos); | |
1546 | if (n != 0 && lra_dump_file != NULL) | |
1547 | fprintf (lra_dump_file, " Reassigning non-reload pseudos\n"); | |
1548 | qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func); | |
1549 | for (i = 0; i < n; i++) | |
1550 | { | |
1551 | regno = sorted_pseudos[i]; | |
1f558530 | 1552 | hard_regno = find_hard_regno_for (regno, &cost, -1, false); |
c6a6cdaa | 1553 | if (hard_regno >= 0) |
1554 | { | |
1555 | assign_hard_regno (hard_regno, regno); | |
bf619f35 | 1556 | /* We change allocation for non-reload pseudo on this |
1557 | iteration -- mark the pseudo for invalidation of used | |
1558 | alternatives of insns containing the pseudo. */ | |
c6a6cdaa | 1559 | bitmap_set_bit (&changed_pseudo_bitmap, regno); |
1560 | } | |
3d1f79d1 | 1561 | else |
1562 | { | |
1563 | enum reg_class rclass = lra_get_allocno_class (regno); | |
1564 | enum reg_class spill_class; | |
1565 | ||
0b32b9ec | 1566 | if (targetm.spill_class == NULL |
ab4ea053 | 1567 | || lra_reg_info[regno].restore_rtx == NULL_RTX |
3d1f79d1 | 1568 | || ! bitmap_bit_p (&lra_inheritance_pseudos, regno) |
1569 | || (spill_class | |
1570 | = ((enum reg_class) | |
1571 | targetm.spill_class | |
1572 | ((reg_class_t) rclass, | |
1573 | PSEUDO_REGNO_MODE (regno)))) == NO_REGS) | |
1574 | continue; | |
1575 | regno_allocno_class_array[regno] = spill_class; | |
1576 | hard_regno = find_hard_regno_for (regno, &cost, -1, false); | |
1577 | if (hard_regno < 0) | |
1578 | regno_allocno_class_array[regno] = rclass; | |
1579 | else | |
1580 | { | |
1581 | setup_reg_classes | |
1582 | (regno, spill_class, spill_class, spill_class); | |
1583 | assign_hard_regno (hard_regno, regno); | |
1584 | bitmap_set_bit (&changed_pseudo_bitmap, regno); | |
1585 | } | |
1586 | } | |
c6a6cdaa | 1587 | } |
1588 | } | |
1589 | free (update_hard_regno_preference_check); | |
1590 | bitmap_clear (&best_spill_pseudos_bitmap); | |
1591 | bitmap_clear (&spill_pseudos_bitmap); | |
1592 | bitmap_clear (&insn_conflict_pseudos); | |
6a4bc24e | 1593 | return fails_p; |
c6a6cdaa | 1594 | } |
1595 | ||
c6a6cdaa | 1596 | /* Entry function to assign hard registers to new reload pseudos |
1597 | starting with LRA_CONSTRAINT_NEW_REGNO_START (by possible spilling | |
1598 | of old pseudos) and possibly to the old pseudos. The function adds | |
1599 | what insns to process for the next constraint pass. Those are all | |
1600 | insns who contains non-reload and non-inheritance pseudos with | |
1601 | changed allocation. | |
1602 | ||
1603 | Return true if we did not spill any non-reload and non-inheritance | |
6a4bc24e | 1604 | pseudos. Set up FAILS_P if we failed to assign hard registers to |
1605 | all reload pseudos. */ | |
c6a6cdaa | 1606 | bool |
6a4bc24e | 1607 | lra_assign (bool &fails_p) |
c6a6cdaa | 1608 | { |
1609 | int i; | |
1610 | unsigned int u; | |
1611 | bitmap_iterator bi; | |
1612 | bitmap_head insns_to_process; | |
1613 | bool no_spills_p; | |
1614 | int max_regno = max_reg_num (); | |
1615 | ||
1616 | timevar_push (TV_LRA_ASSIGN); | |
f95727ee | 1617 | lra_assignment_iter++; |
1618 | if (lra_dump_file != NULL) | |
1619 | fprintf (lra_dump_file, "\n********** Assignment #%d: **********\n\n", | |
1620 | lra_assignment_iter); | |
c6a6cdaa | 1621 | init_lives (); |
1622 | sorted_pseudos = XNEWVEC (int, max_regno); | |
1623 | sorted_reload_pseudos = XNEWVEC (int, max_regno); | |
1624 | regno_allocno_class_array = XNEWVEC (enum reg_class, max_regno); | |
ab4ea053 | 1625 | regno_live_length = XNEWVEC (int, max_regno); |
c6a6cdaa | 1626 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
ab4ea053 | 1627 | { |
1628 | int l; | |
1629 | lra_live_range_t r; | |
1630 | ||
1631 | regno_allocno_class_array[i] = lra_get_allocno_class (i); | |
1632 | for (l = 0, r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | |
1633 | l += r->finish - r->start + 1; | |
1634 | regno_live_length[i] = l; | |
1635 | } | |
f95727ee | 1636 | former_reload_pseudo_spill_p = false; |
c6a6cdaa | 1637 | init_regno_assign_info (); |
1638 | bitmap_initialize (&all_spilled_pseudos, ®_obstack); | |
1639 | create_live_range_start_chains (); | |
1640 | setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos); | |
3923c63e | 1641 | if (! lra_asm_error_p && flag_checking && !flag_ipa_ra) |
1642 | /* Check correctness of allocation for call-crossed pseudos but | |
1643 | only when there are no asm errors as in the case of errors the | |
1644 | asm is removed and it can result in incorrect allocation. */ | |
f2cc6708 | 1645 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
1646 | if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0 | |
5c62f29a | 1647 | && lra_reg_info[i].call_insn |
f2cc6708 | 1648 | && overlaps_hard_reg_set_p (call_used_reg_set, |
1649 | PSEUDO_REGNO_MODE (i), reg_renumber[i])) | |
1650 | gcc_unreachable (); | |
c6a6cdaa | 1651 | /* Setup insns to process on the next constraint pass. */ |
1652 | bitmap_initialize (&changed_pseudo_bitmap, ®_obstack); | |
1653 | init_live_reload_and_inheritance_pseudos (); | |
6a4bc24e | 1654 | fails_p = assign_by_spills (); |
c6a6cdaa | 1655 | finish_live_reload_and_inheritance_pseudos (); |
1656 | bitmap_ior_into (&changed_pseudo_bitmap, &all_spilled_pseudos); | |
1657 | no_spills_p = true; | |
1658 | EXECUTE_IF_SET_IN_BITMAP (&all_spilled_pseudos, 0, u, bi) | |
1659 | /* We ignore spilled pseudos created on last inheritance pass | |
1660 | because they will be removed. */ | |
ab4ea053 | 1661 | if (lra_reg_info[u].restore_rtx == NULL_RTX) |
c6a6cdaa | 1662 | { |
1663 | no_spills_p = false; | |
1664 | break; | |
1665 | } | |
1666 | finish_live_range_start_chains (); | |
1667 | bitmap_clear (&all_spilled_pseudos); | |
1668 | bitmap_initialize (&insns_to_process, ®_obstack); | |
1669 | EXECUTE_IF_SET_IN_BITMAP (&changed_pseudo_bitmap, 0, u, bi) | |
1670 | bitmap_ior_into (&insns_to_process, &lra_reg_info[u].insn_bitmap); | |
1671 | bitmap_clear (&changed_pseudo_bitmap); | |
1672 | EXECUTE_IF_SET_IN_BITMAP (&insns_to_process, 0, u, bi) | |
1673 | { | |
1674 | lra_push_insn_by_uid (u); | |
1675 | /* Invalidate alternatives for insn should be processed. */ | |
1676 | lra_set_used_insn_alternative_by_uid (u, -1); | |
1677 | } | |
1678 | bitmap_clear (&insns_to_process); | |
1679 | finish_regno_assign_info (); | |
ab4ea053 | 1680 | free (regno_live_length); |
c6a6cdaa | 1681 | free (regno_allocno_class_array); |
1682 | free (sorted_pseudos); | |
1683 | free (sorted_reload_pseudos); | |
1684 | finish_lives (); | |
1685 | timevar_pop (TV_LRA_ASSIGN); | |
f95727ee | 1686 | if (former_reload_pseudo_spill_p) |
1687 | lra_assignment_iter_after_spill++; | |
c5b93452 | 1688 | /* This is conditional on flag_checking because valid code can take |
1689 | more than this maximum number of iteration, but at the same time | |
1690 | the test can uncover errors in machine descriptions. */ | |
1691 | if (flag_checking | |
1692 | && (lra_assignment_iter_after_spill | |
1693 | > LRA_MAX_ASSIGNMENT_ITERATION_NUMBER)) | |
f95727ee | 1694 | internal_error |
85b9be9b | 1695 | ("maximum number of LRA assignment passes is achieved (%d)", |
f95727ee | 1696 | LRA_MAX_ASSIGNMENT_ITERATION_NUMBER); |
c6a6cdaa | 1697 | return no_spills_p; |
1698 | } | |
ab4ea053 | 1699 | |
6a4bc24e | 1700 | /* Find start and finish insns for reload pseudo REGNO. Return true |
1701 | if we managed to find the expected insns. Return false, | |
1702 | otherwise. */ | |
1703 | static bool | |
1704 | find_reload_regno_insns (int regno, rtx_insn * &start, rtx_insn * &finish) | |
1705 | { | |
1706 | unsigned int uid; | |
1707 | bitmap_iterator bi; | |
1708 | int n = 0; | |
1709 | rtx_insn *prev_insn, *next_insn; | |
1710 | rtx_insn *start_insn = NULL, *first_insn = NULL, *second_insn = NULL; | |
1711 | ||
1712 | EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi) | |
1713 | { | |
1714 | if (start_insn == NULL) | |
1715 | start_insn = lra_insn_recog_data[uid]->insn; | |
1716 | n++; | |
1717 | } | |
1718 | /* For reload pseudo we should have at most 3 insns referring for it: | |
1719 | input/output reload insns and the original insn. */ | |
1720 | if (n > 3) | |
1721 | return false; | |
1722 | if (n > 1) | |
1723 | { | |
1724 | for (prev_insn = PREV_INSN (start_insn), | |
1725 | next_insn = NEXT_INSN (start_insn); | |
1726 | n != 1 && (prev_insn != NULL || next_insn != NULL); ) | |
1727 | { | |
1728 | if (prev_insn != NULL && first_insn == NULL) | |
1729 | { | |
1730 | if (! bitmap_bit_p (&lra_reg_info[regno].insn_bitmap, | |
1731 | INSN_UID (prev_insn))) | |
1732 | prev_insn = PREV_INSN (prev_insn); | |
1733 | else | |
1734 | { | |
1735 | first_insn = prev_insn; | |
1736 | n--; | |
1737 | } | |
1738 | } | |
1739 | if (next_insn != NULL && second_insn == NULL) | |
1740 | { | |
1741 | if (! bitmap_bit_p (&lra_reg_info[regno].insn_bitmap, | |
1742 | INSN_UID (next_insn))) | |
1743 | next_insn = NEXT_INSN (next_insn); | |
1744 | else | |
1745 | { | |
1746 | second_insn = next_insn; | |
1747 | n--; | |
1748 | } | |
1749 | } | |
1750 | } | |
1751 | if (n > 1) | |
1752 | return false; | |
1753 | } | |
1754 | start = first_insn != NULL ? first_insn : start_insn; | |
1755 | finish = second_insn != NULL ? second_insn : start_insn; | |
1756 | return true; | |
1757 | } | |
1758 | ||
1759 | /* Process reload pseudos which did not get a hard reg, split a hard | |
1760 | reg live range in live range of a reload pseudo, and then return | |
1761 | TRUE. If we did not split a hard reg live range, report an error, | |
1762 | and return FALSE. */ | |
1763 | bool | |
1764 | lra_split_hard_reg_for (void) | |
1765 | { | |
eaefe34f | 1766 | int i, regno; |
6a4bc24e | 1767 | rtx_insn *insn, *first, *last; |
1768 | unsigned int u; | |
1769 | bitmap_iterator bi; | |
eaefe34f | 1770 | enum reg_class rclass; |
6a4bc24e | 1771 | int max_regno = max_reg_num (); |
1772 | /* We did not assign hard regs to reload pseudos after two | |
1773 | iterations. Either it's an asm and something is wrong with the | |
1774 | constraints, or we have run out of spill registers; error out in | |
1775 | either case. */ | |
1776 | bool asm_p = false; | |
eaefe34f | 1777 | bitmap_head failed_reload_insns, failed_reload_pseudos; |
6a4bc24e | 1778 | |
1779 | if (lra_dump_file != NULL) | |
1780 | fprintf (lra_dump_file, | |
1781 | "\n****** Splitting a hard reg after assignment #%d: ******\n\n", | |
1782 | lra_assignment_iter); | |
eaefe34f | 1783 | bitmap_initialize (&failed_reload_pseudos, ®_obstack); |
12b5db9d | 1784 | bitmap_initialize (&non_reload_pseudos, ®_obstack); |
1785 | bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs); | |
1786 | bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos); | |
1787 | bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos); | |
eaefe34f | 1788 | for (i = lra_constraint_new_regno_start; i < max_regno; i++) |
6a4bc24e | 1789 | if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0 |
eaefe34f | 1790 | && (rclass = lra_get_allocno_class (i)) != NO_REGS |
6a4bc24e | 1791 | && ! bitmap_bit_p (&non_reload_pseudos, i)) |
1792 | { | |
6a4bc24e | 1793 | if (! find_reload_regno_insns (i, first, last)) |
1794 | continue; | |
eaefe34f | 1795 | if (spill_hard_reg_in_range (i, rclass, first, last)) |
1796 | { | |
1797 | bitmap_clear (&failed_reload_pseudos); | |
1798 | return true; | |
1799 | } | |
1800 | bitmap_set_bit (&failed_reload_pseudos, i); | |
6a4bc24e | 1801 | } |
12b5db9d | 1802 | bitmap_clear (&non_reload_pseudos); |
6a4bc24e | 1803 | bitmap_initialize (&failed_reload_insns, ®_obstack); |
eaefe34f | 1804 | EXECUTE_IF_SET_IN_BITMAP (&failed_reload_pseudos, 0, u, bi) |
6a4bc24e | 1805 | { |
eaefe34f | 1806 | regno = u; |
6a4bc24e | 1807 | bitmap_ior_into (&failed_reload_insns, |
1808 | &lra_reg_info[regno].insn_bitmap); | |
eaefe34f | 1809 | lra_setup_reg_renumber |
1810 | (regno, ira_class_hard_regs[lra_get_allocno_class (regno)][0], false); | |
6a4bc24e | 1811 | } |
1812 | EXECUTE_IF_SET_IN_BITMAP (&failed_reload_insns, 0, u, bi) | |
1813 | { | |
1814 | insn = lra_insn_recog_data[u]->insn; | |
1815 | if (asm_noperands (PATTERN (insn)) >= 0) | |
1816 | { | |
3923c63e | 1817 | lra_asm_error_p = asm_p = true; |
6a4bc24e | 1818 | error_for_asm (insn, |
1819 | "%<asm%> operand has impossible constraints"); | |
1820 | /* Avoid further trouble with this insn. | |
1821 | For asm goto, instead of fixing up all the edges | |
1822 | just clear the template and clear input operands | |
1823 | (asm goto doesn't have any output operands). */ | |
1824 | if (JUMP_P (insn)) | |
1825 | { | |
1826 | rtx asm_op = extract_asm_operands (PATTERN (insn)); | |
1827 | ASM_OPERANDS_TEMPLATE (asm_op) = ggc_strdup (""); | |
1828 | ASM_OPERANDS_INPUT_VEC (asm_op) = rtvec_alloc (0); | |
1829 | ASM_OPERANDS_INPUT_CONSTRAINT_VEC (asm_op) = rtvec_alloc (0); | |
1830 | lra_update_insn_regno_info (insn); | |
1831 | } | |
1832 | else | |
1833 | { | |
1834 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
1835 | lra_set_insn_deleted (insn); | |
1836 | } | |
1837 | } | |
1838 | else if (!asm_p) | |
1839 | { | |
1840 | error ("unable to find a register to spill"); | |
1841 | fatal_insn ("this is the insn:", insn); | |
1842 | } | |
1843 | } | |
eaefe34f | 1844 | bitmap_clear (&failed_reload_pseudos); |
1845 | bitmap_clear (&failed_reload_insns); | |
6a4bc24e | 1846 | return false; |
1847 | } |