]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/lra-eliminations.c
tree-core.h: Include symtab.h.
[thirdparty/gcc.git] / gcc / lra-eliminations.c
CommitLineData
55a2c322 1/* Code for RTL register eliminations.
5624e564 2 Copyright (C) 2010-2015 Free Software Foundation, Inc.
55a2c322
VM
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21/* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
27
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
35
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
45
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
49
50 fp + 42 => sp + 42
51
52*/
53
54#include "config.h"
55#include "system.h"
56#include "coretypes.h"
c7131fb2
AM
57#include "backend.h"
58#include "tree.h"
55a2c322 59#include "rtl.h"
c7131fb2 60#include "df.h"
55a2c322
VM
61#include "tm_p.h"
62#include "regs.h"
63#include "insn-config.h"
64#include "insn-codes.h"
65#include "recog.h"
66#include "output.h"
67#include "addresses.h"
68#include "target.h"
36566b39 69#include "flags.h"
36566b39 70#include "alias.h"
36566b39
PK
71#include "expmed.h"
72#include "dojump.h"
73#include "explow.h"
74#include "calls.h"
75#include "emit-rtl.h"
76#include "varasm.h"
77#include "stmt.h"
55a2c322 78#include "expr.h"
55a2c322
VM
79#include "except.h"
80#include "optabs.h"
55a2c322
VM
81#include "ira.h"
82#include "rtl-error.h"
c7131fb2
AM
83#include "lra.h"
84#include "insn-attr.h"
55a2c322
VM
85#include "lra-int.h"
86
87/* This structure is used to record information about hard register
88 eliminations. */
11478306 89struct lra_elim_table
55a2c322
VM
90{
91 /* Hard register number to be eliminated. */
f4eafc30 92 int from;
55a2c322 93 /* Hard register number used as replacement. */
f4eafc30 94 int to;
55a2c322
VM
95 /* Difference between values of the two hard registers above on
96 previous iteration. */
97 HOST_WIDE_INT previous_offset;
98 /* Difference between the values on the current iteration. */
f4eafc30 99 HOST_WIDE_INT offset;
55a2c322 100 /* Nonzero if this elimination can be done. */
f4eafc30 101 bool can_eliminate;
55a2c322
VM
102 /* CAN_ELIMINATE since the last check. */
103 bool prev_can_eliminate;
104 /* REG rtx for the register to be eliminated. We cannot simply
105 compare the number since we might then spuriously replace a hard
106 register corresponding to a pseudo assigned to the reg to be
107 eliminated. */
f4eafc30 108 rtx from_rtx;
55a2c322 109 /* REG rtx for the replacement. */
f4eafc30 110 rtx to_rtx;
55a2c322
VM
111};
112
113/* The elimination table. Each array entry describes one possible way
114 of eliminating a register in favor of another. If there is more
115 than one way of eliminating a particular register, the most
116 preferred should be specified first. */
11478306 117static struct lra_elim_table *reg_eliminate = 0;
55a2c322
VM
118
119/* This is an intermediate structure to initialize the table. It has
120 exactly the members provided by ELIMINABLE_REGS. */
121static const struct elim_table_1
122{
123 const int from;
124 const int to;
125} reg_eliminate_1[] =
126
127/* If a set of eliminable hard registers was specified, define the
128 table from it. Otherwise, default to the normal case of the frame
129 pointer being replaced by the stack pointer. */
130
131#ifdef ELIMINABLE_REGS
132 ELIMINABLE_REGS;
133#else
134 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
135#endif
136
137#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
138
139/* Print info about elimination table to file F. */
140static void
141print_elim_table (FILE *f)
142{
11478306 143 struct lra_elim_table *ep;
55a2c322
VM
144
145 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
146 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
147 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
148 ep->can_eliminate ? "Can" : "Can't",
149 ep->from, ep->to, ep->offset, ep->previous_offset);
150}
151
152/* Print info about elimination table to stderr. */
153void
154lra_debug_elim_table (void)
155{
156 print_elim_table (stderr);
157}
158
159/* Setup possibility of elimination in elimination table element EP to
160 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
161 pointer to stack pointer is not possible anymore. */
162static void
11478306 163setup_can_eliminate (struct lra_elim_table *ep, bool value)
55a2c322
VM
164{
165 ep->can_eliminate = ep->prev_can_eliminate = value;
166 if (! value
167 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
168 frame_pointer_needed = 1;
d303ff97
L
169 if (!frame_pointer_needed)
170 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
55a2c322
VM
171}
172
173/* Map: eliminable "from" register -> its current elimination,
174 or NULL if none. The elimination table may contain more than
175 one elimination for the same hard register, but this map specifies
176 the one that we are currently using. */
11478306 177static struct lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
55a2c322
VM
178
179/* When an eliminable hard register becomes not eliminable, we use the
180 following special structure to restore original offsets for the
181 register. */
11478306 182static struct lra_elim_table self_elim_table;
55a2c322
VM
183
184/* Offsets should be used to restore original offsets for eliminable
185 hard register which just became not eliminable. Zero,
186 otherwise. */
187static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
188
189/* Map: hard regno -> RTL presentation. RTL presentations of all
190 potentially eliminable hard registers are stored in the map. */
191static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
192
193/* Set up ELIMINATION_MAP of the currently used eliminations. */
194static void
195setup_elimination_map (void)
196{
197 int i;
11478306 198 struct lra_elim_table *ep;
55a2c322
VM
199
200 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
201 elimination_map[i] = NULL;
202 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
203 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
204 elimination_map[ep->from] = ep;
205}
206
207\f
208
209/* Compute the sum of X and Y, making canonicalizations assumed in an
210 address, namely: sum constant integers, surround the sum of two
211 constants with a CONST, put the constant as the second operand, and
212 group the constant on the outermost sum.
213
214 This routine assumes both inputs are already in canonical form. */
215static rtx
216form_sum (rtx x, rtx y)
217{
218 rtx tem;
ef4bddc2 219 machine_mode mode = GET_MODE (x);
55a2c322
VM
220
221 if (mode == VOIDmode)
222 mode = GET_MODE (y);
223
224 if (mode == VOIDmode)
225 mode = Pmode;
226
227 if (CONST_INT_P (x))
228 return plus_constant (mode, y, INTVAL (x));
229 else if (CONST_INT_P (y))
230 return plus_constant (mode, x, INTVAL (y));
231 else if (CONSTANT_P (x))
232 tem = x, x = y, y = tem;
233
234 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
235 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
236
237 /* Note that if the operands of Y are specified in the opposite
238 order in the recursive calls below, infinite recursion will
239 occur. */
240 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
241 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
242
243 /* If both constant, encapsulate sum. Otherwise, just form sum. A
244 constant will have been placed second. */
245 if (CONSTANT_P (x) && CONSTANT_P (y))
246 {
247 if (GET_CODE (x) == CONST)
248 x = XEXP (x, 0);
249 if (GET_CODE (y) == CONST)
250 y = XEXP (y, 0);
251
252 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
253 }
254
255 return gen_rtx_PLUS (mode, x, y);
256}
257
258/* Return the current substitution hard register of the elimination of
259 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
260int
261lra_get_elimination_hard_regno (int hard_regno)
262{
11478306 263 struct lra_elim_table *ep;
55a2c322
VM
264
265 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
266 return hard_regno;
267 if ((ep = elimination_map[hard_regno]) == NULL)
268 return hard_regno;
269 return ep->to;
270}
271
272/* Return elimination which will be used for hard reg REG, NULL
273 otherwise. */
11478306 274static struct lra_elim_table *
55a2c322
VM
275get_elimination (rtx reg)
276{
277 int hard_regno;
11478306 278 struct lra_elim_table *ep;
55a2c322
VM
279 HOST_WIDE_INT offset;
280
281 lra_assert (REG_P (reg));
282 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
283 return NULL;
284 if ((ep = elimination_map[hard_regno]) != NULL)
285 return ep->from_rtx != reg ? NULL : ep;
286 if ((offset = self_elim_offsets[hard_regno]) == 0)
287 return NULL;
288 /* This is an iteration to restore offsets just after HARD_REGNO
289 stopped to be eliminable. */
290 self_elim_table.from = self_elim_table.to = hard_regno;
291 self_elim_table.from_rtx
292 = self_elim_table.to_rtx
293 = eliminable_reg_rtx[hard_regno];
294 lra_assert (self_elim_table.from_rtx != NULL);
295 self_elim_table.offset = offset;
296 return &self_elim_table;
297}
298
299/* Scan X and replace any eliminable registers (such as fp) with a
8d49e7ef 300 replacement (such as sp) if SUBST_P, plus an offset. The offset is
55a2c322
VM
301 a change in the offset between the eliminable register and its
302 substitution if UPDATE_P, or the full offset if FULL_P, or
8d49e7ef 303 otherwise zero. If FULL_P, we also use the SP offsets for
d9cf932c 304 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
a6af1bf9
VM
305 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
306 non-zero, don't use difference of the offset and the previous
307 offset.
55a2c322
VM
308
309 MEM_MODE is the mode of an enclosing MEM. We need this to know how
310 much to adjust a register for, e.g., PRE_DEC. Also, if we are
311 inside a MEM, we are allowed to replace a sum of a hard register
312 and the constant zero with the hard register, which we cannot do
313 outside a MEM. In addition, we need to record the fact that a
314 hard register is referenced outside a MEM.
315
8d49e7ef
VM
316 If we make full substitution to SP for non-null INSN, add the insn
317 sp offset. */
55a2c322 318rtx
ef4bddc2 319lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
d9cf932c
VM
320 bool subst_p, bool update_p,
321 HOST_WIDE_INT update_sp_offset, bool full_p)
55a2c322
VM
322{
323 enum rtx_code code = GET_CODE (x);
11478306 324 struct lra_elim_table *ep;
55a2c322
VM
325 rtx new_rtx;
326 int i, j;
327 const char *fmt;
328 int copied = 0;
329
a6af1bf9
VM
330 lra_assert (!update_p || !full_p);
331 lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
55a2c322
VM
332 if (! current_function_decl)
333 return x;
334
335 switch (code)
336 {
337 CASE_CONST_ANY:
338 case CONST:
339 case SYMBOL_REF:
340 case CODE_LABEL:
341 case PC:
342 case CC0:
343 case ASM_INPUT:
344 case ADDR_VEC:
345 case ADDR_DIFF_VEC:
346 case RETURN:
347 return x;
348
349 case REG:
350 /* First handle the case where we encounter a bare hard register
351 that is eliminable. Replace it with a PLUS. */
352 if ((ep = get_elimination (x)) != NULL)
353 {
354 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
f4eafc30 355
a6af1bf9
VM
356 if (update_sp_offset != 0)
357 {
358 if (ep->to_rtx == stack_pointer_rtx)
359 return plus_constant (Pmode, to, update_sp_offset);
360 return to;
361 }
362 else if (update_p)
363 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
55a2c322 364 else if (full_p)
8d49e7ef
VM
365 return plus_constant (Pmode, to,
366 ep->offset
367 - (insn != NULL_RTX
368 && ep->to_rtx == stack_pointer_rtx
369 ? lra_get_insn_recog_data (insn)->sp_offset
370 : 0));
55a2c322
VM
371 else
372 return to;
373 }
374 return x;
375
376 case PLUS:
377 /* If this is the sum of an eliminable register and a constant, rework
378 the sum. */
379 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
380 {
381 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
382 {
383 HOST_WIDE_INT offset;
384 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
f4eafc30 385
55a2c322
VM
386 if (! update_p && ! full_p)
387 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
a6af1bf9
VM
388
389 if (update_sp_offset != 0)
390 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
391 else
392 offset = (update_p
393 ? ep->offset - ep->previous_offset : ep->offset);
8d49e7ef
VM
394 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
395 offset -= lra_get_insn_recog_data (insn)->sp_offset;
a6af1bf9 396 if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
55a2c322
VM
397 return to;
398 else
399 return gen_rtx_PLUS (Pmode, to,
400 plus_constant (Pmode,
401 XEXP (x, 1), offset));
402 }
403
404 /* If the hard register is not eliminable, we are done since
405 the other operand is a constant. */
406 return x;
407 }
408
409 /* If this is part of an address, we want to bring any constant
410 to the outermost PLUS. We will do this by doing hard
411 register replacement in our operands and seeing if a constant
412 shows up in one of them.
413
414 Note that there is no risk of modifying the structure of the
415 insn, since we only get called for its operands, thus we are
416 either modifying the address inside a MEM, or something like
417 an address operand of a load-address insn. */
418
419 {
8d49e7ef 420 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
d9cf932c
VM
421 subst_p, update_p,
422 update_sp_offset, full_p);
8d49e7ef 423 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
d9cf932c
VM
424 subst_p, update_p,
425 update_sp_offset, full_p);
55a2c322
VM
426
427 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
428 return form_sum (new0, new1);
429 }
430 return x;
431
432 case MULT:
433 /* If this is the product of an eliminable hard register and a
434 constant, apply the distribute law and move the constant out
435 so that we have (plus (mult ..) ..). This is needed in order
436 to keep load-address insns valid. This case is pathological.
437 We ignore the possibility of overflow here. */
438 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
439 && (ep = get_elimination (XEXP (x, 0))) != NULL)
440 {
441 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
f4eafc30 442
a6af1bf9
VM
443 if (update_sp_offset != 0)
444 {
445 if (ep->to_rtx == stack_pointer_rtx)
446 return plus_constant (Pmode,
447 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
448 update_sp_offset * INTVAL (XEXP (x, 1)));
449 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
450 }
451 else if (update_p)
d9cf932c
VM
452 return plus_constant (Pmode,
453 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
a6af1bf9 454 (ep->offset - ep->previous_offset)
d9cf932c 455 * INTVAL (XEXP (x, 1)));
55a2c322 456 else if (full_p)
8d49e7ef
VM
457 {
458 HOST_WIDE_INT offset = ep->offset;
459
460 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
461 offset -= lra_get_insn_recog_data (insn)->sp_offset;
462 return
463 plus_constant (Pmode,
464 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
465 offset * INTVAL (XEXP (x, 1)));
466 }
55a2c322
VM
467 else
468 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
469 }
f4eafc30 470
55a2c322
VM
471 /* ... fall through ... */
472
473 case CALL:
474 case COMPARE:
475 /* See comments before PLUS about handling MINUS. */
476 case MINUS:
477 case DIV: case UDIV:
478 case MOD: case UMOD:
479 case AND: case IOR: case XOR:
480 case ROTATERT: case ROTATE:
481 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
482 case NE: case EQ:
483 case GE: case GT: case GEU: case GTU:
484 case LE: case LT: case LEU: case LTU:
485 {
8d49e7ef 486 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
d9cf932c
VM
487 subst_p, update_p,
488 update_sp_offset, full_p);
55a2c322 489 rtx new1 = XEXP (x, 1)
8d49e7ef 490 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
d9cf932c
VM
491 subst_p, update_p,
492 update_sp_offset, full_p) : 0;
55a2c322
VM
493
494 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
495 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
496 }
497 return x;
498
499 case EXPR_LIST:
500 /* If we have something in XEXP (x, 0), the usual case,
501 eliminate it. */
502 if (XEXP (x, 0))
503 {
8d49e7ef 504 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
d9cf932c
VM
505 subst_p, update_p,
506 update_sp_offset, full_p);
55a2c322
VM
507 if (new_rtx != XEXP (x, 0))
508 {
509 /* If this is a REG_DEAD note, it is not valid anymore.
510 Using the eliminated version could result in creating a
511 REG_DEAD note for the stack or frame pointer. */
512 if (REG_NOTE_KIND (x) == REG_DEAD)
513 return (XEXP (x, 1)
8d49e7ef 514 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
d9cf932c
VM
515 subst_p, update_p,
516 update_sp_offset, full_p)
55a2c322
VM
517 : NULL_RTX);
518
519 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
520 }
521 }
522
523 /* ... fall through ... */
524
525 case INSN_LIST:
f91aec98 526 case INT_LIST:
55a2c322
VM
527 /* Now do eliminations in the rest of the chain. If this was
528 an EXPR_LIST, this might result in allocating more memory than is
529 strictly needed, but it simplifies the code. */
530 if (XEXP (x, 1))
531 {
8d49e7ef 532 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
d9cf932c
VM
533 subst_p, update_p,
534 update_sp_offset, full_p);
55a2c322
VM
535 if (new_rtx != XEXP (x, 1))
536 return
537 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
538 XEXP (x, 0), new_rtx);
539 }
540 return x;
541
542 case PRE_INC:
543 case POST_INC:
544 case PRE_DEC:
545 case POST_DEC:
546 /* We do not support elimination of a register that is modified.
547 elimination_effects has already make sure that this does not
548 happen. */
549 return x;
550
551 case PRE_MODIFY:
552 case POST_MODIFY:
553 /* We do not support elimination of a hard register that is
554 modified. LRA has already make sure that this does not
555 happen. The only remaining case we need to consider here is
556 that the increment value may be an eliminable register. */
557 if (GET_CODE (XEXP (x, 1)) == PLUS
558 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
559 {
8d49e7ef 560 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
d9cf932c
VM
561 mem_mode, subst_p, update_p,
562 update_sp_offset, full_p);
55a2c322
VM
563
564 if (new_rtx != XEXP (XEXP (x, 1), 1))
565 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
566 gen_rtx_PLUS (GET_MODE (x),
567 XEXP (x, 0), new_rtx));
568 }
569 return x;
570
571 case STRICT_LOW_PART:
572 case NEG: case NOT:
573 case SIGN_EXTEND: case ZERO_EXTEND:
574 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
575 case FLOAT: case FIX:
576 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
577 case ABS:
578 case SQRT:
579 case FFS:
580 case CLZ:
581 case CTZ:
582 case POPCOUNT:
583 case PARITY:
584 case BSWAP:
8d49e7ef 585 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
d9cf932c
VM
586 subst_p, update_p,
587 update_sp_offset, full_p);
55a2c322
VM
588 if (new_rtx != XEXP (x, 0))
589 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
590 return x;
591
592 case SUBREG:
8d49e7ef 593 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
d9cf932c
VM
594 subst_p, update_p,
595 update_sp_offset, full_p);
55a2c322
VM
596
597 if (new_rtx != SUBREG_REG (x))
598 {
599 int x_size = GET_MODE_SIZE (GET_MODE (x));
600 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
601
602 if (MEM_P (new_rtx) && x_size <= new_size)
603 {
604 SUBREG_REG (x) = new_rtx;
605 alter_subreg (&x, false);
606 return x;
607 }
b17ec42d
VM
608 else if (! subst_p)
609 {
610 /* LRA can transform subregs itself. So don't call
611 simplify_gen_subreg until LRA transformations are
612 finished. Function simplify_gen_subreg can do
613 non-trivial transformations (like truncation) which
614 might make LRA work to fail. */
615 SUBREG_REG (x) = new_rtx;
616 return x;
617 }
55a2c322 618 else
baa061be
RS
619 return simplify_gen_subreg (GET_MODE (x), new_rtx,
620 GET_MODE (new_rtx), SUBREG_BYTE (x));
55a2c322
VM
621 }
622
623 return x;
624
625 case MEM:
626 /* Our only special processing is to pass the mode of the MEM to our
627 recursive call and copy the flags. While we are here, handle this
628 case more efficiently. */
629 return
630 replace_equiv_address_nv
631 (x,
8d49e7ef 632 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
d9cf932c 633 subst_p, update_p, update_sp_offset, full_p));
55a2c322
VM
634
635 case USE:
636 /* Handle insn_list USE that a call to a pure function may generate. */
8d49e7ef 637 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
d9cf932c 638 subst_p, update_p, update_sp_offset, full_p);
55a2c322
VM
639 if (new_rtx != XEXP (x, 0))
640 return gen_rtx_USE (GET_MODE (x), new_rtx);
641 return x;
642
643 case CLOBBER:
644 case SET:
645 gcc_unreachable ();
646
647 default:
648 break;
649 }
650
651 /* Process each of our operands recursively. If any have changed, make a
652 copy of the rtx. */
653 fmt = GET_RTX_FORMAT (code);
654 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
655 {
656 if (*fmt == 'e')
657 {
8d49e7ef 658 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
d9cf932c
VM
659 subst_p, update_p,
660 update_sp_offset, full_p);
55a2c322
VM
661 if (new_rtx != XEXP (x, i) && ! copied)
662 {
663 x = shallow_copy_rtx (x);
664 copied = 1;
665 }
666 XEXP (x, i) = new_rtx;
667 }
668 else if (*fmt == 'E')
669 {
670 int copied_vec = 0;
671 for (j = 0; j < XVECLEN (x, i); j++)
672 {
8d49e7ef 673 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
d9cf932c
VM
674 subst_p, update_p,
675 update_sp_offset, full_p);
55a2c322
VM
676 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
677 {
678 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
679 XVEC (x, i)->elem);
680 if (! copied)
681 {
682 x = shallow_copy_rtx (x);
683 copied = 1;
684 }
685 XVEC (x, i) = new_v;
686 copied_vec = 1;
687 }
688 XVECEXP (x, i, j) = new_rtx;
689 }
690 }
691 }
692
693 return x;
694}
695
696/* This function is used externally in subsequent passes of GCC. It
697 always does a full elimination of X. */
698rtx
ef4bddc2 699lra_eliminate_regs (rtx x, machine_mode mem_mode,
55a2c322
VM
700 rtx insn ATTRIBUTE_UNUSED)
701{
d9cf932c 702 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
55a2c322
VM
703}
704
8d49e7ef
VM
705/* Stack pointer offset before the current insn relative to one at the
706 func start. RTL insns can change SP explicitly. We keep the
707 changes from one insn to another through this variable. */
708static HOST_WIDE_INT curr_sp_change;
709
55a2c322
VM
710/* Scan rtx X for references to elimination source or target registers
711 in contexts that would prevent the elimination from happening.
712 Update the table of eliminables to reflect the changed state.
713 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
714 within a MEM. */
715static void
ef4bddc2 716mark_not_eliminable (rtx x, machine_mode mem_mode)
55a2c322
VM
717{
718 enum rtx_code code = GET_CODE (x);
11478306 719 struct lra_elim_table *ep;
55a2c322
VM
720 int i, j;
721 const char *fmt;
722
723 switch (code)
724 {
725 case PRE_INC:
726 case POST_INC:
727 case PRE_DEC:
728 case POST_DEC:
729 case POST_MODIFY:
730 case PRE_MODIFY:
8d49e7ef
VM
731 if (XEXP (x, 0) == stack_pointer_rtx
732 && ((code != PRE_MODIFY && code != POST_MODIFY)
733 || (GET_CODE (XEXP (x, 1)) == PLUS
734 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
735 && CONST_INT_P (XEXP (XEXP (x, 1), 1)))))
736 {
737 int size = GET_MODE_SIZE (mem_mode);
738
739#ifdef PUSH_ROUNDING
740 /* If more bytes than MEM_MODE are pushed, account for
741 them. */
742 size = PUSH_ROUNDING (size);
743#endif
744 if (code == PRE_DEC || code == POST_DEC)
745 curr_sp_change -= size;
746 else if (code == PRE_INC || code == POST_INC)
747 curr_sp_change += size;
748 else if (code == PRE_MODIFY || code == POST_MODIFY)
749 curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1));
750 }
751 else if (REG_P (XEXP (x, 0))
752 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
753 {
754 /* If we modify the source of an elimination rule, disable
755 it. Do the same if it is the destination and not the
756 hard frame register. */
757 for (ep = reg_eliminate;
758 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
55a2c322 759 ep++)
8d49e7ef
VM
760 if (ep->from_rtx == XEXP (x, 0)
761 || (ep->to_rtx == XEXP (x, 0)
762 && ep->to_rtx != hard_frame_pointer_rtx))
763 setup_can_eliminate (ep, false);
764 }
55a2c322
VM
765 return;
766
767 case USE:
768 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
769 /* If using a hard register that is the source of an eliminate
770 we still think can be performed, note it cannot be
771 performed since we don't know how this hard register is
772 used. */
773 for (ep = reg_eliminate;
774 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
775 ep++)
776 if (ep->from_rtx == XEXP (x, 0)
777 && ep->to_rtx != hard_frame_pointer_rtx)
778 setup_can_eliminate (ep, false);
779 return;
780
781 case CLOBBER:
782 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
783 /* If clobbering a hard register that is the replacement
784 register for an elimination we still think can be
785 performed, note that it cannot be performed. Otherwise, we
786 need not be concerned about it. */
787 for (ep = reg_eliminate;
788 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
789 ep++)
790 if (ep->to_rtx == XEXP (x, 0)
791 && ep->to_rtx != hard_frame_pointer_rtx)
792 setup_can_eliminate (ep, false);
793 return;
794
795 case SET:
8d49e7ef
VM
796 if (SET_DEST (x) == stack_pointer_rtx
797 && GET_CODE (SET_SRC (x)) == PLUS
798 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
799 && CONST_INT_P (XEXP (SET_SRC (x), 1)))
800 {
801 curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1));
802 return;
803 }
804 if (! REG_P (SET_DEST (x))
805 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
806 mark_not_eliminable (SET_DEST (x), mem_mode);
807 else
55a2c322
VM
808 {
809 /* See if this is setting the replacement hard register for
810 an elimination.
8d49e7ef 811
55a2c322
VM
812 If DEST is the hard frame pointer, we do nothing because
813 we assume that all assignments to the frame pointer are
814 for non-local gotos and are being done at a time when
815 they are valid and do not disturb anything else. Some
816 machines want to eliminate a fake argument pointer (or
817 even a fake frame pointer) with either the real frame
818 pointer or the stack pointer. Assignments to the hard
819 frame pointer must not prevent this elimination. */
55a2c322
VM
820 for (ep = reg_eliminate;
821 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
822 ep++)
823 if (ep->to_rtx == SET_DEST (x)
8d49e7ef 824 && SET_DEST (x) != hard_frame_pointer_rtx)
55a2c322
VM
825 setup_can_eliminate (ep, false);
826 }
8d49e7ef
VM
827
828 mark_not_eliminable (SET_SRC (x), mem_mode);
829 return;
55a2c322 830
8d49e7ef
VM
831 case MEM:
832 /* Our only special processing is to pass the mode of the MEM to
833 our recursive call. */
834 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
55a2c322
VM
835 return;
836
837 default:
838 break;
839 }
840
841 fmt = GET_RTX_FORMAT (code);
842 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
843 {
844 if (*fmt == 'e')
8d49e7ef 845 mark_not_eliminable (XEXP (x, i), mem_mode);
55a2c322
VM
846 else if (*fmt == 'E')
847 for (j = 0; j < XVECLEN (x, i); j++)
8d49e7ef 848 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
55a2c322
VM
849 }
850}
851
852\f
853
ecafcf05
VM
854#ifdef HARD_FRAME_POINTER_REGNUM
855
856/* Find offset equivalence note for reg WHAT in INSN and return the
857 found elmination offset. If the note is not found, return NULL.
858 Remove the found note. */
859static rtx
8c797f81 860remove_reg_equal_offset_note (rtx_insn *insn, rtx what)
ecafcf05
VM
861{
862 rtx link, *link_loc;
863
864 for (link_loc = &REG_NOTES (insn);
865 (link = *link_loc) != NULL_RTX;
866 link_loc = &XEXP (link, 1))
867 if (REG_NOTE_KIND (link) == REG_EQUAL
868 && GET_CODE (XEXP (link, 0)) == PLUS
869 && XEXP (XEXP (link, 0), 0) == what
870 && CONST_INT_P (XEXP (XEXP (link, 0), 1)))
871 {
872 *link_loc = XEXP (link, 1);
873 return XEXP (XEXP (link, 0), 1);
874 }
875 return NULL_RTX;
876}
877
878#endif
879
55a2c322
VM
880/* Scan INSN and eliminate all eliminable hard registers in it.
881
882 If REPLACE_P is true, do the replacement destructively. Also
883 delete the insn as dead it if it is setting an eliminable register.
884
885 If REPLACE_P is false, just update the offsets while keeping the
8d49e7ef 886 base register the same. If FIRST_P, use the sp offset for
a6af1bf9
VM
887 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
888 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
889 and the previous offset. Attach the note about used elimination
890 for insns setting frame pointer to update elimination easy (without
891 parsing already generated elimination insns to find offset
892 previously used) in future. */
55a2c322 893
d9cf932c
VM
894void
895eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
896 HOST_WIDE_INT update_sp_offset)
55a2c322
VM
897{
898 int icode = recog_memoized (insn);
899 rtx old_set = single_set (insn);
900 bool validate_p;
901 int i;
902 rtx substed_operand[MAX_RECOG_OPERANDS];
903 rtx orig_operand[MAX_RECOG_OPERANDS];
11478306 904 struct lra_elim_table *ep;
55a2c322
VM
905 rtx plus_src, plus_cst_src;
906 lra_insn_recog_data_t id;
907 struct lra_static_insn_data *static_id;
908
909 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
910 {
39718607 911 lra_assert (GET_CODE (PATTERN (insn)) == USE
55a2c322 912 || GET_CODE (PATTERN (insn)) == CLOBBER
55a2c322
VM
913 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
914 return;
915 }
916
917 /* Check for setting an eliminable register. */
918 if (old_set != 0 && REG_P (SET_DEST (old_set))
919 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
920 {
80f466c4
VM
921 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
922 if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
923 {
924 bool delete_p = replace_p;
925
55a2c322 926#ifdef HARD_FRAME_POINTER_REGNUM
80f466c4
VM
927 if (ep->from == FRAME_POINTER_REGNUM
928 && ep->to == HARD_FRAME_POINTER_REGNUM)
929 /* If this is setting the frame pointer register to the
930 hardware frame pointer register and this is an
931 elimination that will be done (tested above), this
932 insn is really adjusting the frame pointer downward
933 to compensate for the adjustment done before a
934 nonlocal goto. */
935 {
936 rtx src = SET_SRC (old_set);
937 rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx);
938
a6af1bf9
VM
939 /* We should never process such insn with non-zero
940 UPDATE_SP_OFFSET. */
941 lra_assert (update_sp_offset == 0);
942
80f466c4
VM
943 if (off != NULL_RTX
944 || src == ep->to_rtx
945 || (GET_CODE (src) == PLUS
946 && XEXP (src, 0) == ep->to_rtx
947 && CONST_INT_P (XEXP (src, 1))))
948 {
949 HOST_WIDE_INT offset;
950
951 if (replace_p)
952 {
953 SET_DEST (old_set) = ep->to_rtx;
954 lra_update_insn_recog_data (insn);
955 return;
956 }
957 offset = (off != NULL_RTX ? INTVAL (off)
958 : src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1)));
959 offset -= (ep->offset - ep->previous_offset);
960 src = plus_constant (Pmode, ep->to_rtx, offset);
961
962 /* First see if this insn remains valid when we
963 make the change. If not, keep the INSN_CODE
964 the same and let the constraint pass fit it
965 up. */
966 validate_change (insn, &SET_SRC (old_set), src, 1);
967 validate_change (insn, &SET_DEST (old_set),
968 ep->from_rtx, 1);
969 if (! apply_change_group ())
970 {
971 SET_SRC (old_set) = src;
972 SET_DEST (old_set) = ep->from_rtx;
973 }
974 lra_update_insn_recog_data (insn);
975 /* Add offset note for future updates. */
976 add_reg_note (insn, REG_EQUAL, src);
977 return;
978 }
979 }
55a2c322 980#endif
80f466c4
VM
981
982 /* This insn isn't serving a useful purpose. We delete it
983 when REPLACE is set. */
984 if (delete_p)
985 lra_delete_dead_insn (insn);
986 return;
987 }
55a2c322
VM
988 }
989
990 /* We allow one special case which happens to work on all machines we
991 currently support: a single set with the source or a REG_EQUAL
992 note being a PLUS of an eliminable register and a constant. */
993 plus_src = plus_cst_src = 0;
994 if (old_set && REG_P (SET_DEST (old_set)))
995 {
996 if (GET_CODE (SET_SRC (old_set)) == PLUS)
997 plus_src = SET_SRC (old_set);
998 /* First see if the source is of the form (plus (...) CST). */
999 if (plus_src
1000 && CONST_INT_P (XEXP (plus_src, 1)))
1001 plus_cst_src = plus_src;
1002 /* Check that the first operand of the PLUS is a hard reg or
1003 the lowpart subreg of one. */
1004 if (plus_cst_src)
1005 {
1006 rtx reg = XEXP (plus_cst_src, 0);
1007
1008 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
1009 reg = SUBREG_REG (reg);
1010
1011 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
1012 plus_cst_src = 0;
1013 }
1014 }
1015 if (plus_cst_src)
1016 {
1017 rtx reg = XEXP (plus_cst_src, 0);
1018 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
1019
1020 if (GET_CODE (reg) == SUBREG)
1021 reg = SUBREG_REG (reg);
1022
1023 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
1024 {
1025 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
f4eafc30 1026
55a2c322
VM
1027 if (! replace_p)
1028 {
a6af1bf9
VM
1029 if (update_sp_offset == 0)
1030 offset += (ep->offset - ep->previous_offset);
d9cf932c
VM
1031 if (ep->to_rtx == stack_pointer_rtx)
1032 {
1033 if (first_p)
1034 offset -= lra_get_insn_recog_data (insn)->sp_offset;
1035 else
1036 offset += update_sp_offset;
1037 }
55a2c322
VM
1038 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
1039 }
f4eafc30 1040
55a2c322
VM
1041 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
1042 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
1043 /* If we have a nonzero offset, and the source is already a
1044 simple REG, the following transformation would increase
1045 the cost of the insn by replacing a simple REG with (plus
1046 (reg sp) CST). So try only when we already had a PLUS
1047 before. */
1048 if (offset == 0 || plus_src)
1049 {
1050 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
f4eafc30 1051
55a2c322
VM
1052 old_set = single_set (insn);
1053
1054 /* First see if this insn remains valid when we make the
1055 change. If not, try to replace the whole pattern
1056 with a simple set (this may help if the original insn
1057 was a PARALLEL that was only recognized as single_set
1058 due to REG_UNUSED notes). If this isn't valid
1059 either, keep the INSN_CODE the same and let the
1060 constraint pass fix it up. */
1061 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
1062 {
f7df4a84 1063 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
f4eafc30 1064
55a2c322
VM
1065 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
1066 SET_SRC (old_set) = new_src;
1067 }
1068 lra_update_insn_recog_data (insn);
1069 /* This can't have an effect on elimination offsets, so skip
1070 right to the end. */
1071 return;
1072 }
1073 }
1074 }
1075
1076 /* Eliminate all eliminable registers occurring in operands that
1077 can be handled by the constraint pass. */
1078 id = lra_get_insn_recog_data (insn);
1079 static_id = id->insn_static_data;
1080 validate_p = false;
1081 for (i = 0; i < static_id->n_operands; i++)
1082 {
1083 orig_operand[i] = *id->operand_loc[i];
1084 substed_operand[i] = *id->operand_loc[i];
1085
1086 /* For an asm statement, every operand is eliminable. */
1087 if (icode < 0 || insn_data[icode].operand[i].eliminable)
1088 {
1089 /* Check for setting a hard register that we know about. */
1090 if (static_id->operand[i].type != OP_IN
1091 && REG_P (orig_operand[i]))
1092 {
1093 /* If we are assigning to a hard register that can be
1094 eliminated, it must be as part of a PARALLEL, since
1095 the code above handles single SETs. This reg can not
1096 be longer eliminated -- it is forced by
1097 mark_not_eliminable. */
1098 for (ep = reg_eliminate;
1099 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
1100 ep++)
1101 lra_assert (ep->from_rtx != orig_operand[i]
1102 || ! ep->can_eliminate);
1103 }
1104
1105 /* Companion to the above plus substitution, we can allow
1106 invariants as the source of a plain move. */
1107 substed_operand[i]
8d49e7ef
VM
1108 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
1109 replace_p, ! replace_p && ! first_p,
d9cf932c 1110 update_sp_offset, first_p);
55a2c322
VM
1111 if (substed_operand[i] != orig_operand[i])
1112 validate_p = true;
1113 }
1114 }
1115
2c62cbaa
VM
1116 if (! validate_p)
1117 return;
1118
55a2c322
VM
1119 /* Substitute the operands; the new values are in the substed_operand
1120 array. */
1121 for (i = 0; i < static_id->n_operands; i++)
1122 *id->operand_loc[i] = substed_operand[i];
1123 for (i = 0; i < static_id->n_dups; i++)
1124 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
1125
2c62cbaa
VM
1126 /* If we had a move insn but now we don't, re-recognize it.
1127 This will cause spurious re-recognition if the old move had a
1128 PARALLEL since the new one still will, but we can't call
1129 single_set without having put new body into the insn and the
1130 re-recognition won't hurt in this rare case. */
1131 id = lra_update_insn_recog_data (insn);
1132 static_id = id->insn_static_data;
55a2c322
VM
1133}
1134
1135/* Spill pseudos which are assigned to hard registers in SET. Add
1136 affected insns for processing in the subsequent constraint
1137 pass. */
1138static void
1139spill_pseudos (HARD_REG_SET set)
1140{
1141 int i;
1142 bitmap_head to_process;
cfa434f6 1143 rtx_insn *insn;
55a2c322
VM
1144
1145 if (hard_reg_set_empty_p (set))
1146 return;
1147 if (lra_dump_file != NULL)
1148 {
1149 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1150 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1151 if (TEST_HARD_REG_BIT (set, i))
1152 fprintf (lra_dump_file, " %d", i);
1153 fprintf (lra_dump_file, "\n");
1154 }
1155 bitmap_initialize (&to_process, &reg_obstack);
1156 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1157 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1158 && overlaps_hard_reg_set_p (set,
1159 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1160 {
1161 if (lra_dump_file != NULL)
1162 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1163 i, reg_renumber[i]);
1164 reg_renumber[i] = -1;
1165 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1166 }
1167 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1168 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1169 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1170 {
1171 lra_push_insn (insn);
1172 lra_set_used_insn_alternative (insn, -1);
1173 }
1174 bitmap_clear (&to_process);
1175}
1176
1177/* Update all offsets and possibility for elimination on eliminable
8d49e7ef 1178 registers. Spill pseudos assigned to registers which are
55a2c322
VM
1179 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1180 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
5a107a0f
VM
1181 registers whose offsets should be changed. Return true if any
1182 elimination offset changed. */
1183static bool
55a2c322
VM
1184update_reg_eliminate (bitmap insns_with_changed_offsets)
1185{
5a107a0f 1186 bool prev, result;
11478306 1187 struct lra_elim_table *ep, *ep1;
55a2c322
VM
1188 HARD_REG_SET temp_hard_reg_set;
1189
1190 /* Clear self elimination offsets. */
1191 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1192 self_elim_offsets[ep->from] = 0;
55a2c322
VM
1193 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1194 {
1195 /* If it is a currently used elimination: update the previous
1196 offset. */
1197 if (elimination_map[ep->from] == ep)
1198 ep->previous_offset = ep->offset;
1199
1200 prev = ep->prev_can_eliminate;
1201 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1202 if (ep->can_eliminate && ! prev)
1203 {
1204 /* It is possible that not eliminable register becomes
1205 eliminable because we took other reasons into account to
1206 set up eliminable regs in the initial set up. Just
1207 ignore new eliminable registers. */
1208 setup_can_eliminate (ep, false);
1209 continue;
1210 }
1211 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1212 {
1213 /* We cannot use this elimination anymore -- find another
1214 one. */
1215 if (lra_dump_file != NULL)
1216 fprintf (lra_dump_file,
1217 " Elimination %d to %d is not possible anymore\n",
1218 ep->from, ep->to);
8d49e7ef
VM
1219 /* If after processing RTL we decides that SP can be used as
1220 a result of elimination, it can not be changed. */
ddcfa953
JW
1221 gcc_assert ((ep->to_rtx != stack_pointer_rtx)
1222 || (ep->from < FIRST_PSEUDO_REGISTER
1223 && fixed_regs [ep->from]));
55a2c322
VM
1224 /* Mark that is not eliminable anymore. */
1225 elimination_map[ep->from] = NULL;
1226 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1227 if (ep1->can_eliminate && ep1->from == ep->from)
1228 break;
1229 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1230 {
1231 if (lra_dump_file != NULL)
1232 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1233 ep1->from, ep1->to);
55a2c322
VM
1234 lra_assert (ep1->previous_offset == 0);
1235 ep1->previous_offset = ep->offset;
1236 }
1237 else
1238 {
1239 /* There is no elimination anymore just use the hard
1240 register `from' itself. Setup self elimination
1241 offset to restore the original offset values. */
1242 if (lra_dump_file != NULL)
1243 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1244 ep->from);
1245 self_elim_offsets[ep->from] = -ep->offset;
55a2c322
VM
1246 if (ep->offset != 0)
1247 bitmap_ior_into (insns_with_changed_offsets,
1248 &lra_reg_info[ep->from].insn_bitmap);
1249 }
1250 }
1251
1252#ifdef ELIMINABLE_REGS
1253 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1254#else
1255 INITIAL_FRAME_POINTER_OFFSET (ep->offset);
1256#endif
1257 }
55a2c322 1258 setup_elimination_map ();
5a107a0f 1259 result = false;
8d49e7ef 1260 CLEAR_HARD_REG_SET (temp_hard_reg_set);
55a2c322 1261 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
8d49e7ef
VM
1262 if (elimination_map[ep->from] == NULL)
1263 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
1264 else if (elimination_map[ep->from] == ep)
d70a81dd 1265 {
8d49e7ef
VM
1266 /* Prevent the hard register into which we eliminate from
1267 the usage for pseudos. */
1268 if (ep->from != ep->to)
1269 SET_HARD_REG_BIT (temp_hard_reg_set, ep->to);
1270 if (ep->previous_offset != ep->offset)
1271 {
1272 bitmap_ior_into (insns_with_changed_offsets,
1273 &lra_reg_info[ep->from].insn_bitmap);
1274
1275 /* Update offset when the eliminate offset have been
1276 changed. */
1277 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
1278 ep->offset - ep->previous_offset);
1279 result = true;
1280 }
d70a81dd 1281 }
8d49e7ef
VM
1282 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1283 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1284 spill_pseudos (temp_hard_reg_set);
5a107a0f 1285 return result;
55a2c322
VM
1286}
1287
1288/* Initialize the table of hard registers to eliminate.
1289 Pre-condition: global flag frame_pointer_needed has been set before
1290 calling this function. */
1291static void
1292init_elim_table (void)
1293{
11478306 1294 struct lra_elim_table *ep;
55a2c322 1295#ifdef ELIMINABLE_REGS
522d4efc 1296 bool value_p;
55a2c322
VM
1297 const struct elim_table_1 *ep1;
1298#endif
1299
1300 if (!reg_eliminate)
11478306 1301 reg_eliminate = XCNEWVEC (struct lra_elim_table, NUM_ELIMINABLE_REGS);
55a2c322
VM
1302
1303 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1304 /* Initiate member values which will be never changed. */
1305 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1306 self_elim_table.previous_offset = 0;
1307#ifdef ELIMINABLE_REGS
1308 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1309 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1310 {
1311 ep->offset = ep->previous_offset = 0;
1312 ep->from = ep1->from;
1313 ep->to = ep1->to;
1314 value_p = (targetm.can_eliminate (ep->from, ep->to)
1315 && ! (ep->to == STACK_POINTER_REGNUM
f4eafc30 1316 && frame_pointer_needed
55a2c322
VM
1317 && (! SUPPORTS_STACK_ALIGNMENT
1318 || ! stack_realign_fp)));
1319 setup_can_eliminate (ep, value_p);
1320 }
1321#else
1322 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
1323 reg_eliminate[0].from = reg_eliminate_1[0].from;
1324 reg_eliminate[0].to = reg_eliminate_1[0].to;
1325 setup_can_eliminate (&reg_eliminate[0], ! frame_pointer_needed);
1326#endif
1327
8d49e7ef
VM
1328 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
1329 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
1330 equal stack_pointer_rtx. We depend on this. Threfore we switch
1331 off that we are in LRA temporarily. */
1332 lra_in_progress = 0;
55a2c322
VM
1333 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1334 {
1335 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1336 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1337 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1338 }
8d49e7ef 1339 lra_in_progress = 1;
55a2c322
VM
1340}
1341
8d49e7ef
VM
1342/* Function for initialization of elimination once per function. It
1343 sets up sp offset for each insn. */
1344static void
1345init_elimination (void)
55a2c322 1346{
8d49e7ef 1347 bool stop_to_sp_elimination_p;
55a2c322 1348 basic_block bb;
cfa434f6 1349 rtx_insn *insn;
11478306 1350 struct lra_elim_table *ep;
55a2c322
VM
1351
1352 init_elim_table ();
11cd3bed 1353 FOR_EACH_BB_FN (bb, cfun)
8d49e7ef
VM
1354 {
1355 curr_sp_change = 0;
1356 stop_to_sp_elimination_p = false;
1357 FOR_BB_INSNS (bb, insn)
1358 if (INSN_P (insn))
1359 {
1360 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
1361 if (NONDEBUG_INSN_P (insn))
1362 {
1363 mark_not_eliminable (PATTERN (insn), VOIDmode);
1364 if (curr_sp_change != 0
1365 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
1366 stop_to_sp_elimination_p = true;
1367 }
1368 }
1369 if (! frame_pointer_needed
1370 && (curr_sp_change != 0 || stop_to_sp_elimination_p)
1371 && bb->succs && bb->succs->length () != 0)
1372 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1373 if (ep->to == STACK_POINTER_REGNUM)
1374 setup_can_eliminate (ep, false);
1375 }
55a2c322
VM
1376 setup_elimination_map ();
1377}
1378
1379/* Eliminate hard reg given by its location LOC. */
1380void
1381lra_eliminate_reg_if_possible (rtx *loc)
1382{
1383 int regno;
11478306 1384 struct lra_elim_table *ep;
55a2c322
VM
1385
1386 lra_assert (REG_P (*loc));
1387 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1388 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1389 return;
1390 if ((ep = get_elimination (*loc)) != NULL)
1391 *loc = ep->to_rtx;
1392}
1393
8d49e7ef
VM
1394/* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
1395 the insn for subsequent processing in the constraint pass, update
1396 the insn info. */
55a2c322 1397static void
cfa434f6 1398process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
55a2c322 1399{
d9cf932c 1400 eliminate_regs_in_insn (insn, final_p, first_p, 0);
55a2c322
VM
1401 if (! final_p)
1402 {
1403 /* Check that insn changed its code. This is a case when a move
1404 insn becomes an add insn and we do not want to process the
1405 insn as a move anymore. */
1406 int icode = recog (PATTERN (insn), insn, 0);
1407
1408 if (icode >= 0 && icode != INSN_CODE (insn))
1409 {
1410 INSN_CODE (insn) = icode;
1411 lra_update_insn_recog_data (insn);
1412 }
1413 lra_update_insn_regno_info (insn);
1414 lra_push_insn (insn);
1415 lra_set_used_insn_alternative (insn, -1);
1416 }
1417}
1418
1419/* Entry function to do final elimination if FINAL_P or to update
8d49e7ef
VM
1420 elimination register offsets (FIRST_P if we are doing it the first
1421 time). */
55a2c322 1422void
8d49e7ef 1423lra_eliminate (bool final_p, bool first_p)
55a2c322 1424{
55a2c322 1425 unsigned int uid;
55a2c322
VM
1426 bitmap_head insns_with_changed_offsets;
1427 bitmap_iterator bi;
11478306 1428 struct lra_elim_table *ep;
8d49e7ef
VM
1429
1430 gcc_assert (! final_p || ! first_p);
55a2c322
VM
1431
1432 timevar_push (TV_LRA_ELIMINATE);
1433
8d49e7ef
VM
1434 if (first_p)
1435 init_elimination ();
1436
55a2c322
VM
1437 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1438 if (final_p)
1439 {
1440#ifdef ENABLE_CHECKING
1441 update_reg_eliminate (&insns_with_changed_offsets);
1442 if (! bitmap_empty_p (&insns_with_changed_offsets))
1443 gcc_unreachable ();
1444#endif
1445 /* We change eliminable hard registers in insns so we should do
1446 this for all insns containing any eliminable hard
1447 register. */
1448 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1449 if (elimination_map[ep->from] != NULL)
1450 bitmap_ior_into (&insns_with_changed_offsets,
1451 &lra_reg_info[ep->from].insn_bitmap);
1452 }
5a107a0f
VM
1453 else if (! update_reg_eliminate (&insns_with_changed_offsets))
1454 goto lra_eliminate_done;
55a2c322
VM
1455 if (lra_dump_file != NULL)
1456 {
1457 fprintf (lra_dump_file, "New elimination table:\n");
1458 print_elim_table (lra_dump_file);
1459 }
55a2c322 1460 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
80f466c4
VM
1461 /* A dead insn can be deleted in process_insn_for_elimination. */
1462 if (lra_insn_recog_data[uid] != NULL)
8d49e7ef
VM
1463 process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
1464 final_p, first_p);
55a2c322
VM
1465 bitmap_clear (&insns_with_changed_offsets);
1466
1467lra_eliminate_done:
1468 timevar_pop (TV_LRA_ELIMINATE);
1469}