]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/lra-eliminations.c
Update copyright years.
[thirdparty/gcc.git] / gcc / lra-eliminations.c
CommitLineData
c6a6cdaa 1/* Code for RTL register eliminations.
f1717362 2 Copyright (C) 2010-2016 Free Software Foundation, Inc.
c6a6cdaa 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21/* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
27
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
35
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
45
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
49
50 fp + 42 => sp + 42
51
52*/
53
54#include "config.h"
55#include "system.h"
56#include "coretypes.h"
9ef16211 57#include "backend.h"
7c29e30e 58#include "target.h"
c6a6cdaa 59#include "rtl.h"
7c29e30e 60#include "tree.h"
9ef16211 61#include "df.h"
c6a6cdaa 62#include "tm_p.h"
7c29e30e 63#include "optabs.h"
c6a6cdaa 64#include "regs.h"
7c29e30e 65#include "ira.h"
c6a6cdaa 66#include "recog.h"
67#include "output.h"
c6a6cdaa 68#include "rtl-error.h"
69#include "lra-int.h"
70
71/* This structure is used to record information about hard register
72 eliminations. */
9908fe4d 73struct lra_elim_table
c6a6cdaa 74{
75 /* Hard register number to be eliminated. */
1a8f8886 76 int from;
c6a6cdaa 77 /* Hard register number used as replacement. */
1a8f8886 78 int to;
c6a6cdaa 79 /* Difference between values of the two hard registers above on
80 previous iteration. */
81 HOST_WIDE_INT previous_offset;
82 /* Difference between the values on the current iteration. */
1a8f8886 83 HOST_WIDE_INT offset;
c6a6cdaa 84 /* Nonzero if this elimination can be done. */
1a8f8886 85 bool can_eliminate;
c6a6cdaa 86 /* CAN_ELIMINATE since the last check. */
87 bool prev_can_eliminate;
88 /* REG rtx for the register to be eliminated. We cannot simply
89 compare the number since we might then spuriously replace a hard
90 register corresponding to a pseudo assigned to the reg to be
91 eliminated. */
1a8f8886 92 rtx from_rtx;
c6a6cdaa 93 /* REG rtx for the replacement. */
1a8f8886 94 rtx to_rtx;
c6a6cdaa 95};
96
97/* The elimination table. Each array entry describes one possible way
98 of eliminating a register in favor of another. If there is more
99 than one way of eliminating a particular register, the most
100 preferred should be specified first. */
9908fe4d 101static struct lra_elim_table *reg_eliminate = 0;
c6a6cdaa 102
103/* This is an intermediate structure to initialize the table. It has
104 exactly the members provided by ELIMINABLE_REGS. */
105static const struct elim_table_1
106{
107 const int from;
108 const int to;
109} reg_eliminate_1[] =
110
111/* If a set of eliminable hard registers was specified, define the
112 table from it. Otherwise, default to the normal case of the frame
113 pointer being replaced by the stack pointer. */
114
115#ifdef ELIMINABLE_REGS
116 ELIMINABLE_REGS;
117#else
118 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
119#endif
120
121#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
122
123/* Print info about elimination table to file F. */
124static void
125print_elim_table (FILE *f)
126{
9908fe4d 127 struct lra_elim_table *ep;
c6a6cdaa 128
129 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
130 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
131 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
132 ep->can_eliminate ? "Can" : "Can't",
133 ep->from, ep->to, ep->offset, ep->previous_offset);
134}
135
136/* Print info about elimination table to stderr. */
137void
138lra_debug_elim_table (void)
139{
140 print_elim_table (stderr);
141}
142
143/* Setup possibility of elimination in elimination table element EP to
144 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
145 pointer to stack pointer is not possible anymore. */
146static void
9908fe4d 147setup_can_eliminate (struct lra_elim_table *ep, bool value)
c6a6cdaa 148{
149 ep->can_eliminate = ep->prev_can_eliminate = value;
150 if (! value
151 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
152 frame_pointer_needed = 1;
8f911f37 153 if (!frame_pointer_needed)
154 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
c6a6cdaa 155}
156
157/* Map: eliminable "from" register -> its current elimination,
158 or NULL if none. The elimination table may contain more than
159 one elimination for the same hard register, but this map specifies
160 the one that we are currently using. */
9908fe4d 161static struct lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
c6a6cdaa 162
163/* When an eliminable hard register becomes not eliminable, we use the
164 following special structure to restore original offsets for the
165 register. */
9908fe4d 166static struct lra_elim_table self_elim_table;
c6a6cdaa 167
168/* Offsets should be used to restore original offsets for eliminable
169 hard register which just became not eliminable. Zero,
170 otherwise. */
171static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
172
173/* Map: hard regno -> RTL presentation. RTL presentations of all
174 potentially eliminable hard registers are stored in the map. */
175static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
176
177/* Set up ELIMINATION_MAP of the currently used eliminations. */
178static void
179setup_elimination_map (void)
180{
181 int i;
9908fe4d 182 struct lra_elim_table *ep;
c6a6cdaa 183
184 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
185 elimination_map[i] = NULL;
186 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
187 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
188 elimination_map[ep->from] = ep;
189}
190
191\f
192
193/* Compute the sum of X and Y, making canonicalizations assumed in an
194 address, namely: sum constant integers, surround the sum of two
195 constants with a CONST, put the constant as the second operand, and
196 group the constant on the outermost sum.
197
198 This routine assumes both inputs are already in canonical form. */
199static rtx
200form_sum (rtx x, rtx y)
201{
3754d046 202 machine_mode mode = GET_MODE (x);
c6a6cdaa 203
204 if (mode == VOIDmode)
205 mode = GET_MODE (y);
206
207 if (mode == VOIDmode)
208 mode = Pmode;
209
210 if (CONST_INT_P (x))
211 return plus_constant (mode, y, INTVAL (x));
212 else if (CONST_INT_P (y))
213 return plus_constant (mode, x, INTVAL (y));
214 else if (CONSTANT_P (x))
c586a5e3 215 std::swap (x, y);
c6a6cdaa 216
217 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
218 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
219
220 /* Note that if the operands of Y are specified in the opposite
221 order in the recursive calls below, infinite recursion will
222 occur. */
223 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
224 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
225
226 /* If both constant, encapsulate sum. Otherwise, just form sum. A
227 constant will have been placed second. */
228 if (CONSTANT_P (x) && CONSTANT_P (y))
229 {
230 if (GET_CODE (x) == CONST)
231 x = XEXP (x, 0);
232 if (GET_CODE (y) == CONST)
233 y = XEXP (y, 0);
234
235 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
236 }
237
238 return gen_rtx_PLUS (mode, x, y);
239}
240
241/* Return the current substitution hard register of the elimination of
242 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
243int
244lra_get_elimination_hard_regno (int hard_regno)
245{
9908fe4d 246 struct lra_elim_table *ep;
c6a6cdaa 247
248 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
249 return hard_regno;
250 if ((ep = elimination_map[hard_regno]) == NULL)
251 return hard_regno;
252 return ep->to;
253}
254
255/* Return elimination which will be used for hard reg REG, NULL
256 otherwise. */
9908fe4d 257static struct lra_elim_table *
c6a6cdaa 258get_elimination (rtx reg)
259{
260 int hard_regno;
9908fe4d 261 struct lra_elim_table *ep;
c6a6cdaa 262 HOST_WIDE_INT offset;
263
264 lra_assert (REG_P (reg));
265 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
266 return NULL;
267 if ((ep = elimination_map[hard_regno]) != NULL)
268 return ep->from_rtx != reg ? NULL : ep;
269 if ((offset = self_elim_offsets[hard_regno]) == 0)
270 return NULL;
271 /* This is an iteration to restore offsets just after HARD_REGNO
272 stopped to be eliminable. */
273 self_elim_table.from = self_elim_table.to = hard_regno;
274 self_elim_table.from_rtx
275 = self_elim_table.to_rtx
276 = eliminable_reg_rtx[hard_regno];
277 lra_assert (self_elim_table.from_rtx != NULL);
278 self_elim_table.offset = offset;
279 return &self_elim_table;
280}
281
a9d58e30 282/* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
283 when it is possible. Return X or the transformation result if the
284 transformation is done. */
285static rtx
286move_plus_up (rtx x)
287{
288 rtx subreg_reg;
289 enum machine_mode x_mode, subreg_reg_mode;
290
291 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
292 return x;
293 subreg_reg = SUBREG_REG (x);
294 x_mode = GET_MODE (x);
295 subreg_reg_mode = GET_MODE (subreg_reg);
296 if (GET_CODE (x) == SUBREG && GET_CODE (subreg_reg) == PLUS
297 && GET_MODE_SIZE (x_mode) <= GET_MODE_SIZE (subreg_reg_mode)
298 && CONSTANT_P (XEXP (subreg_reg, 1)))
299 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode, subreg_reg,
300 subreg_reg_mode),
301 XEXP (subreg_reg, 1));
302 return x;
303}
304
c6a6cdaa 305/* Scan X and replace any eliminable registers (such as fp) with a
3b3a5e5f 306 replacement (such as sp) if SUBST_P, plus an offset. The offset is
c6a6cdaa 307 a change in the offset between the eliminable register and its
308 substitution if UPDATE_P, or the full offset if FULL_P, or
3b3a5e5f 309 otherwise zero. If FULL_P, we also use the SP offsets for
497ba60f 310 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
99535fab 311 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
312 non-zero, don't use difference of the offset and the previous
313 offset.
c6a6cdaa 314
315 MEM_MODE is the mode of an enclosing MEM. We need this to know how
316 much to adjust a register for, e.g., PRE_DEC. Also, if we are
317 inside a MEM, we are allowed to replace a sum of a hard register
318 and the constant zero with the hard register, which we cannot do
319 outside a MEM. In addition, we need to record the fact that a
320 hard register is referenced outside a MEM.
321
3b3a5e5f 322 If we make full substitution to SP for non-null INSN, add the insn
323 sp offset. */
c6a6cdaa 324rtx
3754d046 325lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
497ba60f 326 bool subst_p, bool update_p,
327 HOST_WIDE_INT update_sp_offset, bool full_p)
c6a6cdaa 328{
329 enum rtx_code code = GET_CODE (x);
9908fe4d 330 struct lra_elim_table *ep;
c6a6cdaa 331 rtx new_rtx;
332 int i, j;
333 const char *fmt;
334 int copied = 0;
335
99535fab 336 lra_assert (!update_p || !full_p);
337 lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
c6a6cdaa 338 if (! current_function_decl)
339 return x;
340
341 switch (code)
342 {
343 CASE_CONST_ANY:
344 case CONST:
345 case SYMBOL_REF:
346 case CODE_LABEL:
347 case PC:
348 case CC0:
349 case ASM_INPUT:
350 case ADDR_VEC:
351 case ADDR_DIFF_VEC:
352 case RETURN:
353 return x;
354
355 case REG:
356 /* First handle the case where we encounter a bare hard register
357 that is eliminable. Replace it with a PLUS. */
358 if ((ep = get_elimination (x)) != NULL)
359 {
360 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 361
99535fab 362 if (update_sp_offset != 0)
363 {
364 if (ep->to_rtx == stack_pointer_rtx)
365 return plus_constant (Pmode, to, update_sp_offset);
366 return to;
367 }
368 else if (update_p)
369 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
c6a6cdaa 370 else if (full_p)
3b3a5e5f 371 return plus_constant (Pmode, to,
372 ep->offset
373 - (insn != NULL_RTX
374 && ep->to_rtx == stack_pointer_rtx
375 ? lra_get_insn_recog_data (insn)->sp_offset
376 : 0));
c6a6cdaa 377 else
378 return to;
379 }
380 return x;
381
382 case PLUS:
383 /* If this is the sum of an eliminable register and a constant, rework
384 the sum. */
385 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
386 {
387 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
388 {
389 HOST_WIDE_INT offset;
390 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 391
c6a6cdaa 392 if (! update_p && ! full_p)
393 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
99535fab 394
395 if (update_sp_offset != 0)
396 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
397 else
398 offset = (update_p
399 ? ep->offset - ep->previous_offset : ep->offset);
3b3a5e5f 400 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
401 offset -= lra_get_insn_recog_data (insn)->sp_offset;
99535fab 402 if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
c6a6cdaa 403 return to;
404 else
405 return gen_rtx_PLUS (Pmode, to,
406 plus_constant (Pmode,
407 XEXP (x, 1), offset));
408 }
409
410 /* If the hard register is not eliminable, we are done since
411 the other operand is a constant. */
412 return x;
413 }
414
415 /* If this is part of an address, we want to bring any constant
416 to the outermost PLUS. We will do this by doing hard
417 register replacement in our operands and seeing if a constant
418 shows up in one of them.
419
420 Note that there is no risk of modifying the structure of the
421 insn, since we only get called for its operands, thus we are
422 either modifying the address inside a MEM, or something like
423 an address operand of a load-address insn. */
424
425 {
3b3a5e5f 426 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 427 subst_p, update_p,
428 update_sp_offset, full_p);
3b3a5e5f 429 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 430 subst_p, update_p,
431 update_sp_offset, full_p);
c6a6cdaa 432
a9d58e30 433 new0 = move_plus_up (new0);
434 new1 = move_plus_up (new1);
c6a6cdaa 435 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
436 return form_sum (new0, new1);
437 }
438 return x;
439
440 case MULT:
441 /* If this is the product of an eliminable hard register and a
442 constant, apply the distribute law and move the constant out
443 so that we have (plus (mult ..) ..). This is needed in order
444 to keep load-address insns valid. This case is pathological.
445 We ignore the possibility of overflow here. */
446 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
447 && (ep = get_elimination (XEXP (x, 0))) != NULL)
448 {
449 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 450
99535fab 451 if (update_sp_offset != 0)
452 {
453 if (ep->to_rtx == stack_pointer_rtx)
454 return plus_constant (Pmode,
455 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
456 update_sp_offset * INTVAL (XEXP (x, 1)));
457 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
458 }
459 else if (update_p)
497ba60f 460 return plus_constant (Pmode,
461 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
99535fab 462 (ep->offset - ep->previous_offset)
497ba60f 463 * INTVAL (XEXP (x, 1)));
c6a6cdaa 464 else if (full_p)
3b3a5e5f 465 {
466 HOST_WIDE_INT offset = ep->offset;
467
468 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
469 offset -= lra_get_insn_recog_data (insn)->sp_offset;
470 return
471 plus_constant (Pmode,
472 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
473 offset * INTVAL (XEXP (x, 1)));
474 }
c6a6cdaa 475 else
476 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
477 }
1a8f8886 478
c6a6cdaa 479 /* ... fall through ... */
480
481 case CALL:
482 case COMPARE:
483 /* See comments before PLUS about handling MINUS. */
484 case MINUS:
485 case DIV: case UDIV:
486 case MOD: case UMOD:
487 case AND: case IOR: case XOR:
488 case ROTATERT: case ROTATE:
489 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
490 case NE: case EQ:
491 case GE: case GT: case GEU: case GTU:
492 case LE: case LT: case LEU: case LTU:
493 {
3b3a5e5f 494 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 495 subst_p, update_p,
496 update_sp_offset, full_p);
c6a6cdaa 497 rtx new1 = XEXP (x, 1)
3b3a5e5f 498 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 499 subst_p, update_p,
500 update_sp_offset, full_p) : 0;
c6a6cdaa 501
502 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
503 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
504 }
505 return x;
506
507 case EXPR_LIST:
508 /* If we have something in XEXP (x, 0), the usual case,
509 eliminate it. */
510 if (XEXP (x, 0))
511 {
3b3a5e5f 512 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 513 subst_p, update_p,
514 update_sp_offset, full_p);
c6a6cdaa 515 if (new_rtx != XEXP (x, 0))
516 {
517 /* If this is a REG_DEAD note, it is not valid anymore.
518 Using the eliminated version could result in creating a
519 REG_DEAD note for the stack or frame pointer. */
520 if (REG_NOTE_KIND (x) == REG_DEAD)
521 return (XEXP (x, 1)
3b3a5e5f 522 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 523 subst_p, update_p,
524 update_sp_offset, full_p)
c6a6cdaa 525 : NULL_RTX);
526
527 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
528 }
529 }
530
531 /* ... fall through ... */
532
533 case INSN_LIST:
b3578ae7 534 case INT_LIST:
c6a6cdaa 535 /* Now do eliminations in the rest of the chain. If this was
536 an EXPR_LIST, this might result in allocating more memory than is
537 strictly needed, but it simplifies the code. */
538 if (XEXP (x, 1))
539 {
3b3a5e5f 540 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 541 subst_p, update_p,
542 update_sp_offset, full_p);
c6a6cdaa 543 if (new_rtx != XEXP (x, 1))
544 return
545 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
546 XEXP (x, 0), new_rtx);
547 }
548 return x;
549
550 case PRE_INC:
551 case POST_INC:
552 case PRE_DEC:
553 case POST_DEC:
554 /* We do not support elimination of a register that is modified.
555 elimination_effects has already make sure that this does not
556 happen. */
557 return x;
558
559 case PRE_MODIFY:
560 case POST_MODIFY:
561 /* We do not support elimination of a hard register that is
562 modified. LRA has already make sure that this does not
563 happen. The only remaining case we need to consider here is
564 that the increment value may be an eliminable register. */
565 if (GET_CODE (XEXP (x, 1)) == PLUS
566 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
567 {
3b3a5e5f 568 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
497ba60f 569 mem_mode, subst_p, update_p,
570 update_sp_offset, full_p);
c6a6cdaa 571
572 if (new_rtx != XEXP (XEXP (x, 1), 1))
573 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
574 gen_rtx_PLUS (GET_MODE (x),
575 XEXP (x, 0), new_rtx));
576 }
577 return x;
578
579 case STRICT_LOW_PART:
580 case NEG: case NOT:
581 case SIGN_EXTEND: case ZERO_EXTEND:
582 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
583 case FLOAT: case FIX:
584 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
585 case ABS:
586 case SQRT:
587 case FFS:
588 case CLZ:
589 case CTZ:
590 case POPCOUNT:
591 case PARITY:
592 case BSWAP:
3b3a5e5f 593 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 594 subst_p, update_p,
595 update_sp_offset, full_p);
c6a6cdaa 596 if (new_rtx != XEXP (x, 0))
597 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
598 return x;
599
600 case SUBREG:
3b3a5e5f 601 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
497ba60f 602 subst_p, update_p,
603 update_sp_offset, full_p);
c6a6cdaa 604
605 if (new_rtx != SUBREG_REG (x))
606 {
607 int x_size = GET_MODE_SIZE (GET_MODE (x));
608 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
609
610 if (MEM_P (new_rtx) && x_size <= new_size)
611 {
612 SUBREG_REG (x) = new_rtx;
613 alter_subreg (&x, false);
614 return x;
615 }
10258db7 616 else if (! subst_p)
617 {
618 /* LRA can transform subregs itself. So don't call
619 simplify_gen_subreg until LRA transformations are
620 finished. Function simplify_gen_subreg can do
621 non-trivial transformations (like truncation) which
622 might make LRA work to fail. */
623 SUBREG_REG (x) = new_rtx;
624 return x;
625 }
c6a6cdaa 626 else
afe4bda4 627 return simplify_gen_subreg (GET_MODE (x), new_rtx,
628 GET_MODE (new_rtx), SUBREG_BYTE (x));
c6a6cdaa 629 }
630
631 return x;
632
633 case MEM:
634 /* Our only special processing is to pass the mode of the MEM to our
635 recursive call and copy the flags. While we are here, handle this
636 case more efficiently. */
637 return
638 replace_equiv_address_nv
639 (x,
3b3a5e5f 640 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
497ba60f 641 subst_p, update_p, update_sp_offset, full_p));
c6a6cdaa 642
643 case USE:
644 /* Handle insn_list USE that a call to a pure function may generate. */
3b3a5e5f 645 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
497ba60f 646 subst_p, update_p, update_sp_offset, full_p);
c6a6cdaa 647 if (new_rtx != XEXP (x, 0))
648 return gen_rtx_USE (GET_MODE (x), new_rtx);
649 return x;
650
651 case CLOBBER:
652 case SET:
653 gcc_unreachable ();
654
655 default:
656 break;
657 }
658
659 /* Process each of our operands recursively. If any have changed, make a
660 copy of the rtx. */
661 fmt = GET_RTX_FORMAT (code);
662 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
663 {
664 if (*fmt == 'e')
665 {
3b3a5e5f 666 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
497ba60f 667 subst_p, update_p,
668 update_sp_offset, full_p);
c6a6cdaa 669 if (new_rtx != XEXP (x, i) && ! copied)
670 {
671 x = shallow_copy_rtx (x);
672 copied = 1;
673 }
674 XEXP (x, i) = new_rtx;
675 }
676 else if (*fmt == 'E')
677 {
678 int copied_vec = 0;
679 for (j = 0; j < XVECLEN (x, i); j++)
680 {
3b3a5e5f 681 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
497ba60f 682 subst_p, update_p,
683 update_sp_offset, full_p);
c6a6cdaa 684 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
685 {
686 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
687 XVEC (x, i)->elem);
688 if (! copied)
689 {
690 x = shallow_copy_rtx (x);
691 copied = 1;
692 }
693 XVEC (x, i) = new_v;
694 copied_vec = 1;
695 }
696 XVECEXP (x, i, j) = new_rtx;
697 }
698 }
699 }
700
701 return x;
702}
703
704/* This function is used externally in subsequent passes of GCC. It
705 always does a full elimination of X. */
706rtx
3754d046 707lra_eliminate_regs (rtx x, machine_mode mem_mode,
c6a6cdaa 708 rtx insn ATTRIBUTE_UNUSED)
709{
497ba60f 710 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
c6a6cdaa 711}
712
3b3a5e5f 713/* Stack pointer offset before the current insn relative to one at the
714 func start. RTL insns can change SP explicitly. We keep the
715 changes from one insn to another through this variable. */
716static HOST_WIDE_INT curr_sp_change;
717
c6a6cdaa 718/* Scan rtx X for references to elimination source or target registers
719 in contexts that would prevent the elimination from happening.
720 Update the table of eliminables to reflect the changed state.
721 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
722 within a MEM. */
723static void
3754d046 724mark_not_eliminable (rtx x, machine_mode mem_mode)
c6a6cdaa 725{
726 enum rtx_code code = GET_CODE (x);
9908fe4d 727 struct lra_elim_table *ep;
c6a6cdaa 728 int i, j;
729 const char *fmt;
730
731 switch (code)
732 {
733 case PRE_INC:
734 case POST_INC:
735 case PRE_DEC:
736 case POST_DEC:
737 case POST_MODIFY:
738 case PRE_MODIFY:
3b3a5e5f 739 if (XEXP (x, 0) == stack_pointer_rtx
740 && ((code != PRE_MODIFY && code != POST_MODIFY)
741 || (GET_CODE (XEXP (x, 1)) == PLUS
742 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
743 && CONST_INT_P (XEXP (XEXP (x, 1), 1)))))
744 {
745 int size = GET_MODE_SIZE (mem_mode);
746
747#ifdef PUSH_ROUNDING
748 /* If more bytes than MEM_MODE are pushed, account for
749 them. */
750 size = PUSH_ROUNDING (size);
751#endif
752 if (code == PRE_DEC || code == POST_DEC)
753 curr_sp_change -= size;
754 else if (code == PRE_INC || code == POST_INC)
755 curr_sp_change += size;
756 else if (code == PRE_MODIFY || code == POST_MODIFY)
757 curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1));
758 }
759 else if (REG_P (XEXP (x, 0))
760 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
761 {
762 /* If we modify the source of an elimination rule, disable
763 it. Do the same if it is the destination and not the
764 hard frame register. */
765 for (ep = reg_eliminate;
766 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
c6a6cdaa 767 ep++)
3b3a5e5f 768 if (ep->from_rtx == XEXP (x, 0)
769 || (ep->to_rtx == XEXP (x, 0)
770 && ep->to_rtx != hard_frame_pointer_rtx))
771 setup_can_eliminate (ep, false);
772 }
c6a6cdaa 773 return;
774
775 case USE:
776 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
777 /* If using a hard register that is the source of an eliminate
778 we still think can be performed, note it cannot be
779 performed since we don't know how this hard register is
780 used. */
781 for (ep = reg_eliminate;
782 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
783 ep++)
784 if (ep->from_rtx == XEXP (x, 0)
785 && ep->to_rtx != hard_frame_pointer_rtx)
786 setup_can_eliminate (ep, false);
787 return;
788
789 case CLOBBER:
790 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
791 /* If clobbering a hard register that is the replacement
792 register for an elimination we still think can be
793 performed, note that it cannot be performed. Otherwise, we
794 need not be concerned about it. */
795 for (ep = reg_eliminate;
796 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
797 ep++)
798 if (ep->to_rtx == XEXP (x, 0)
799 && ep->to_rtx != hard_frame_pointer_rtx)
800 setup_can_eliminate (ep, false);
801 return;
802
803 case SET:
3b3a5e5f 804 if (SET_DEST (x) == stack_pointer_rtx
805 && GET_CODE (SET_SRC (x)) == PLUS
806 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
807 && CONST_INT_P (XEXP (SET_SRC (x), 1)))
808 {
809 curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1));
810 return;
811 }
812 if (! REG_P (SET_DEST (x))
813 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
814 mark_not_eliminable (SET_DEST (x), mem_mode);
815 else
c6a6cdaa 816 {
817 /* See if this is setting the replacement hard register for
818 an elimination.
3b3a5e5f 819
c6a6cdaa 820 If DEST is the hard frame pointer, we do nothing because
821 we assume that all assignments to the frame pointer are
822 for non-local gotos and are being done at a time when
823 they are valid and do not disturb anything else. Some
824 machines want to eliminate a fake argument pointer (or
825 even a fake frame pointer) with either the real frame
826 pointer or the stack pointer. Assignments to the hard
827 frame pointer must not prevent this elimination. */
c6a6cdaa 828 for (ep = reg_eliminate;
829 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
830 ep++)
831 if (ep->to_rtx == SET_DEST (x)
3b3a5e5f 832 && SET_DEST (x) != hard_frame_pointer_rtx)
c6a6cdaa 833 setup_can_eliminate (ep, false);
834 }
3b3a5e5f 835
836 mark_not_eliminable (SET_SRC (x), mem_mode);
837 return;
c6a6cdaa 838
3b3a5e5f 839 case MEM:
840 /* Our only special processing is to pass the mode of the MEM to
841 our recursive call. */
842 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
c6a6cdaa 843 return;
844
845 default:
846 break;
847 }
848
849 fmt = GET_RTX_FORMAT (code);
850 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
851 {
852 if (*fmt == 'e')
3b3a5e5f 853 mark_not_eliminable (XEXP (x, i), mem_mode);
c6a6cdaa 854 else if (*fmt == 'E')
855 for (j = 0; j < XVECLEN (x, i); j++)
3b3a5e5f 856 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
c6a6cdaa 857 }
858}
859
860\f
861
0e5e8430 862#ifdef HARD_FRAME_POINTER_REGNUM
863
864/* Find offset equivalence note for reg WHAT in INSN and return the
865 found elmination offset. If the note is not found, return NULL.
866 Remove the found note. */
867static rtx
50b1b178 868remove_reg_equal_offset_note (rtx_insn *insn, rtx what)
0e5e8430 869{
870 rtx link, *link_loc;
871
872 for (link_loc = &REG_NOTES (insn);
873 (link = *link_loc) != NULL_RTX;
874 link_loc = &XEXP (link, 1))
875 if (REG_NOTE_KIND (link) == REG_EQUAL
876 && GET_CODE (XEXP (link, 0)) == PLUS
877 && XEXP (XEXP (link, 0), 0) == what
878 && CONST_INT_P (XEXP (XEXP (link, 0), 1)))
879 {
880 *link_loc = XEXP (link, 1);
881 return XEXP (XEXP (link, 0), 1);
882 }
883 return NULL_RTX;
884}
885
886#endif
887
c6a6cdaa 888/* Scan INSN and eliminate all eliminable hard registers in it.
889
890 If REPLACE_P is true, do the replacement destructively. Also
891 delete the insn as dead it if it is setting an eliminable register.
892
893 If REPLACE_P is false, just update the offsets while keeping the
3b3a5e5f 894 base register the same. If FIRST_P, use the sp offset for
99535fab 895 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
896 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
897 and the previous offset. Attach the note about used elimination
898 for insns setting frame pointer to update elimination easy (without
899 parsing already generated elimination insns to find offset
900 previously used) in future. */
c6a6cdaa 901
497ba60f 902void
903eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
904 HOST_WIDE_INT update_sp_offset)
c6a6cdaa 905{
906 int icode = recog_memoized (insn);
907 rtx old_set = single_set (insn);
908 bool validate_p;
909 int i;
910 rtx substed_operand[MAX_RECOG_OPERANDS];
911 rtx orig_operand[MAX_RECOG_OPERANDS];
9908fe4d 912 struct lra_elim_table *ep;
c6a6cdaa 913 rtx plus_src, plus_cst_src;
914 lra_insn_recog_data_t id;
915 struct lra_static_insn_data *static_id;
916
917 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
918 {
91f71fa3 919 lra_assert (GET_CODE (PATTERN (insn)) == USE
c6a6cdaa 920 || GET_CODE (PATTERN (insn)) == CLOBBER
c6a6cdaa 921 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
922 return;
923 }
924
925 /* Check for setting an eliminable register. */
926 if (old_set != 0 && REG_P (SET_DEST (old_set))
927 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
928 {
2b1732ad 929 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
930 if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
931 {
932 bool delete_p = replace_p;
933
c6a6cdaa 934#ifdef HARD_FRAME_POINTER_REGNUM
2b1732ad 935 if (ep->from == FRAME_POINTER_REGNUM
936 && ep->to == HARD_FRAME_POINTER_REGNUM)
937 /* If this is setting the frame pointer register to the
938 hardware frame pointer register and this is an
939 elimination that will be done (tested above), this
940 insn is really adjusting the frame pointer downward
941 to compensate for the adjustment done before a
942 nonlocal goto. */
943 {
944 rtx src = SET_SRC (old_set);
945 rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx);
946
99535fab 947 /* We should never process such insn with non-zero
948 UPDATE_SP_OFFSET. */
949 lra_assert (update_sp_offset == 0);
950
2b1732ad 951 if (off != NULL_RTX
952 || src == ep->to_rtx
953 || (GET_CODE (src) == PLUS
954 && XEXP (src, 0) == ep->to_rtx
955 && CONST_INT_P (XEXP (src, 1))))
956 {
957 HOST_WIDE_INT offset;
958
959 if (replace_p)
960 {
961 SET_DEST (old_set) = ep->to_rtx;
962 lra_update_insn_recog_data (insn);
963 return;
964 }
965 offset = (off != NULL_RTX ? INTVAL (off)
966 : src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1)));
967 offset -= (ep->offset - ep->previous_offset);
968 src = plus_constant (Pmode, ep->to_rtx, offset);
969
970 /* First see if this insn remains valid when we
971 make the change. If not, keep the INSN_CODE
972 the same and let the constraint pass fit it
973 up. */
974 validate_change (insn, &SET_SRC (old_set), src, 1);
975 validate_change (insn, &SET_DEST (old_set),
976 ep->from_rtx, 1);
977 if (! apply_change_group ())
978 {
979 SET_SRC (old_set) = src;
980 SET_DEST (old_set) = ep->from_rtx;
981 }
982 lra_update_insn_recog_data (insn);
983 /* Add offset note for future updates. */
984 add_reg_note (insn, REG_EQUAL, src);
985 return;
986 }
987 }
c6a6cdaa 988#endif
2b1732ad 989
990 /* This insn isn't serving a useful purpose. We delete it
991 when REPLACE is set. */
992 if (delete_p)
993 lra_delete_dead_insn (insn);
994 return;
995 }
c6a6cdaa 996 }
997
998 /* We allow one special case which happens to work on all machines we
999 currently support: a single set with the source or a REG_EQUAL
1000 note being a PLUS of an eliminable register and a constant. */
1001 plus_src = plus_cst_src = 0;
1002 if (old_set && REG_P (SET_DEST (old_set)))
1003 {
1004 if (GET_CODE (SET_SRC (old_set)) == PLUS)
1005 plus_src = SET_SRC (old_set);
1006 /* First see if the source is of the form (plus (...) CST). */
1007 if (plus_src
1008 && CONST_INT_P (XEXP (plus_src, 1)))
1009 plus_cst_src = plus_src;
1010 /* Check that the first operand of the PLUS is a hard reg or
1011 the lowpart subreg of one. */
1012 if (plus_cst_src)
1013 {
1014 rtx reg = XEXP (plus_cst_src, 0);
1015
1016 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
1017 reg = SUBREG_REG (reg);
1018
1019 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
1020 plus_cst_src = 0;
1021 }
1022 }
1023 if (plus_cst_src)
1024 {
1025 rtx reg = XEXP (plus_cst_src, 0);
1026 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
1027
1028 if (GET_CODE (reg) == SUBREG)
1029 reg = SUBREG_REG (reg);
1030
1031 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
1032 {
1033 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 1034
c6a6cdaa 1035 if (! replace_p)
1036 {
99535fab 1037 if (update_sp_offset == 0)
1038 offset += (ep->offset - ep->previous_offset);
497ba60f 1039 if (ep->to_rtx == stack_pointer_rtx)
1040 {
1041 if (first_p)
1042 offset -= lra_get_insn_recog_data (insn)->sp_offset;
1043 else
1044 offset += update_sp_offset;
1045 }
c6a6cdaa 1046 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
1047 }
1a8f8886 1048
c6a6cdaa 1049 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
1050 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
1051 /* If we have a nonzero offset, and the source is already a
1052 simple REG, the following transformation would increase
1053 the cost of the insn by replacing a simple REG with (plus
1054 (reg sp) CST). So try only when we already had a PLUS
1055 before. */
1056 if (offset == 0 || plus_src)
1057 {
1058 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
1a8f8886 1059
c6a6cdaa 1060 old_set = single_set (insn);
1061
1062 /* First see if this insn remains valid when we make the
1063 change. If not, try to replace the whole pattern
1064 with a simple set (this may help if the original insn
1065 was a PARALLEL that was only recognized as single_set
1066 due to REG_UNUSED notes). If this isn't valid
1067 either, keep the INSN_CODE the same and let the
1068 constraint pass fix it up. */
1069 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
1070 {
d1f9b275 1071 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
1a8f8886 1072
c6a6cdaa 1073 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
1074 SET_SRC (old_set) = new_src;
1075 }
1076 lra_update_insn_recog_data (insn);
1077 /* This can't have an effect on elimination offsets, so skip
1078 right to the end. */
1079 return;
1080 }
1081 }
1082 }
1083
1084 /* Eliminate all eliminable registers occurring in operands that
1085 can be handled by the constraint pass. */
1086 id = lra_get_insn_recog_data (insn);
1087 static_id = id->insn_static_data;
1088 validate_p = false;
1089 for (i = 0; i < static_id->n_operands; i++)
1090 {
1091 orig_operand[i] = *id->operand_loc[i];
1092 substed_operand[i] = *id->operand_loc[i];
1093
1094 /* For an asm statement, every operand is eliminable. */
1095 if (icode < 0 || insn_data[icode].operand[i].eliminable)
1096 {
1097 /* Check for setting a hard register that we know about. */
1098 if (static_id->operand[i].type != OP_IN
1099 && REG_P (orig_operand[i]))
1100 {
1101 /* If we are assigning to a hard register that can be
1102 eliminated, it must be as part of a PARALLEL, since
1103 the code above handles single SETs. This reg can not
1104 be longer eliminated -- it is forced by
1105 mark_not_eliminable. */
1106 for (ep = reg_eliminate;
1107 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
1108 ep++)
1109 lra_assert (ep->from_rtx != orig_operand[i]
1110 || ! ep->can_eliminate);
1111 }
1112
1113 /* Companion to the above plus substitution, we can allow
1114 invariants as the source of a plain move. */
1115 substed_operand[i]
3b3a5e5f 1116 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
1117 replace_p, ! replace_p && ! first_p,
497ba60f 1118 update_sp_offset, first_p);
c6a6cdaa 1119 if (substed_operand[i] != orig_operand[i])
1120 validate_p = true;
1121 }
1122 }
1123
ea99c7a1 1124 if (! validate_p)
1125 return;
1126
c6a6cdaa 1127 /* Substitute the operands; the new values are in the substed_operand
1128 array. */
1129 for (i = 0; i < static_id->n_operands; i++)
1130 *id->operand_loc[i] = substed_operand[i];
1131 for (i = 0; i < static_id->n_dups; i++)
1132 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
1133
ea99c7a1 1134 /* If we had a move insn but now we don't, re-recognize it.
1135 This will cause spurious re-recognition if the old move had a
1136 PARALLEL since the new one still will, but we can't call
1137 single_set without having put new body into the insn and the
1138 re-recognition won't hurt in this rare case. */
1139 id = lra_update_insn_recog_data (insn);
1140 static_id = id->insn_static_data;
c6a6cdaa 1141}
1142
1143/* Spill pseudos which are assigned to hard registers in SET. Add
1144 affected insns for processing in the subsequent constraint
1145 pass. */
1146static void
1147spill_pseudos (HARD_REG_SET set)
1148{
1149 int i;
1150 bitmap_head to_process;
7f836b57 1151 rtx_insn *insn;
c6a6cdaa 1152
1153 if (hard_reg_set_empty_p (set))
1154 return;
1155 if (lra_dump_file != NULL)
1156 {
1157 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1158 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1159 if (TEST_HARD_REG_BIT (set, i))
1160 fprintf (lra_dump_file, " %d", i);
1161 fprintf (lra_dump_file, "\n");
1162 }
1163 bitmap_initialize (&to_process, &reg_obstack);
1164 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1165 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1166 && overlaps_hard_reg_set_p (set,
1167 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1168 {
1169 if (lra_dump_file != NULL)
1170 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1171 i, reg_renumber[i]);
1172 reg_renumber[i] = -1;
1173 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1174 }
1175 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1176 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1177 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1178 {
1179 lra_push_insn (insn);
1180 lra_set_used_insn_alternative (insn, -1);
1181 }
1182 bitmap_clear (&to_process);
1183}
1184
1185/* Update all offsets and possibility for elimination on eliminable
3b3a5e5f 1186 registers. Spill pseudos assigned to registers which are
c6a6cdaa 1187 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1188 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
c625778b 1189 registers whose offsets should be changed. Return true if any
1190 elimination offset changed. */
1191static bool
c6a6cdaa 1192update_reg_eliminate (bitmap insns_with_changed_offsets)
1193{
c625778b 1194 bool prev, result;
9908fe4d 1195 struct lra_elim_table *ep, *ep1;
c6a6cdaa 1196 HARD_REG_SET temp_hard_reg_set;
1197
1198 /* Clear self elimination offsets. */
1199 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1200 self_elim_offsets[ep->from] = 0;
c6a6cdaa 1201 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1202 {
1203 /* If it is a currently used elimination: update the previous
1204 offset. */
1205 if (elimination_map[ep->from] == ep)
1206 ep->previous_offset = ep->offset;
1207
1208 prev = ep->prev_can_eliminate;
1209 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1210 if (ep->can_eliminate && ! prev)
1211 {
1212 /* It is possible that not eliminable register becomes
1213 eliminable because we took other reasons into account to
1214 set up eliminable regs in the initial set up. Just
1215 ignore new eliminable registers. */
1216 setup_can_eliminate (ep, false);
1217 continue;
1218 }
1219 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1220 {
1221 /* We cannot use this elimination anymore -- find another
1222 one. */
1223 if (lra_dump_file != NULL)
1224 fprintf (lra_dump_file,
1225 " Elimination %d to %d is not possible anymore\n",
1226 ep->from, ep->to);
3b3a5e5f 1227 /* If after processing RTL we decides that SP can be used as
1228 a result of elimination, it can not be changed. */
0a644bf8 1229 gcc_assert ((ep->to_rtx != stack_pointer_rtx)
1230 || (ep->from < FIRST_PSEUDO_REGISTER
1231 && fixed_regs [ep->from]));
c6a6cdaa 1232 /* Mark that is not eliminable anymore. */
1233 elimination_map[ep->from] = NULL;
1234 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1235 if (ep1->can_eliminate && ep1->from == ep->from)
1236 break;
1237 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1238 {
1239 if (lra_dump_file != NULL)
1240 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1241 ep1->from, ep1->to);
c6a6cdaa 1242 lra_assert (ep1->previous_offset == 0);
1243 ep1->previous_offset = ep->offset;
1244 }
1245 else
1246 {
1247 /* There is no elimination anymore just use the hard
1248 register `from' itself. Setup self elimination
1249 offset to restore the original offset values. */
1250 if (lra_dump_file != NULL)
1251 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1252 ep->from);
1253 self_elim_offsets[ep->from] = -ep->offset;
c6a6cdaa 1254 if (ep->offset != 0)
1255 bitmap_ior_into (insns_with_changed_offsets,
1256 &lra_reg_info[ep->from].insn_bitmap);
1257 }
1258 }
1259
1260#ifdef ELIMINABLE_REGS
1261 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1262#else
1263 INITIAL_FRAME_POINTER_OFFSET (ep->offset);
1264#endif
1265 }
c6a6cdaa 1266 setup_elimination_map ();
c625778b 1267 result = false;
3b3a5e5f 1268 CLEAR_HARD_REG_SET (temp_hard_reg_set);
c6a6cdaa 1269 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
3b3a5e5f 1270 if (elimination_map[ep->from] == NULL)
1271 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
1272 else if (elimination_map[ep->from] == ep)
a1064490 1273 {
3b3a5e5f 1274 /* Prevent the hard register into which we eliminate from
1275 the usage for pseudos. */
1276 if (ep->from != ep->to)
1277 SET_HARD_REG_BIT (temp_hard_reg_set, ep->to);
1278 if (ep->previous_offset != ep->offset)
1279 {
1280 bitmap_ior_into (insns_with_changed_offsets,
1281 &lra_reg_info[ep->from].insn_bitmap);
1282
1283 /* Update offset when the eliminate offset have been
1284 changed. */
1285 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
1286 ep->offset - ep->previous_offset);
1287 result = true;
1288 }
a1064490 1289 }
3b3a5e5f 1290 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1291 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1292 spill_pseudos (temp_hard_reg_set);
c625778b 1293 return result;
c6a6cdaa 1294}
1295
1296/* Initialize the table of hard registers to eliminate.
1297 Pre-condition: global flag frame_pointer_needed has been set before
1298 calling this function. */
1299static void
1300init_elim_table (void)
1301{
9908fe4d 1302 struct lra_elim_table *ep;
c6a6cdaa 1303#ifdef ELIMINABLE_REGS
1dd7fae5 1304 bool value_p;
c6a6cdaa 1305 const struct elim_table_1 *ep1;
1306#endif
1307
1308 if (!reg_eliminate)
9908fe4d 1309 reg_eliminate = XCNEWVEC (struct lra_elim_table, NUM_ELIMINABLE_REGS);
c6a6cdaa 1310
1311 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1312 /* Initiate member values which will be never changed. */
1313 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1314 self_elim_table.previous_offset = 0;
1315#ifdef ELIMINABLE_REGS
1316 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1317 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1318 {
1319 ep->offset = ep->previous_offset = 0;
1320 ep->from = ep1->from;
1321 ep->to = ep1->to;
1322 value_p = (targetm.can_eliminate (ep->from, ep->to)
1323 && ! (ep->to == STACK_POINTER_REGNUM
1a8f8886 1324 && frame_pointer_needed
c6a6cdaa 1325 && (! SUPPORTS_STACK_ALIGNMENT
1326 || ! stack_realign_fp)));
1327 setup_can_eliminate (ep, value_p);
1328 }
1329#else
1330 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
1331 reg_eliminate[0].from = reg_eliminate_1[0].from;
1332 reg_eliminate[0].to = reg_eliminate_1[0].to;
1333 setup_can_eliminate (&reg_eliminate[0], ! frame_pointer_needed);
1334#endif
1335
3b3a5e5f 1336 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
1337 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
1338 equal stack_pointer_rtx. We depend on this. Threfore we switch
1339 off that we are in LRA temporarily. */
1340 lra_in_progress = 0;
c6a6cdaa 1341 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1342 {
1343 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1344 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1345 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1346 }
3b3a5e5f 1347 lra_in_progress = 1;
c6a6cdaa 1348}
1349
3b3a5e5f 1350/* Function for initialization of elimination once per function. It
1351 sets up sp offset for each insn. */
1352static void
1353init_elimination (void)
c6a6cdaa 1354{
3b3a5e5f 1355 bool stop_to_sp_elimination_p;
c6a6cdaa 1356 basic_block bb;
7f836b57 1357 rtx_insn *insn;
9908fe4d 1358 struct lra_elim_table *ep;
c6a6cdaa 1359
1360 init_elim_table ();
fc00614f 1361 FOR_EACH_BB_FN (bb, cfun)
3b3a5e5f 1362 {
1363 curr_sp_change = 0;
1364 stop_to_sp_elimination_p = false;
1365 FOR_BB_INSNS (bb, insn)
1366 if (INSN_P (insn))
1367 {
1368 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
1369 if (NONDEBUG_INSN_P (insn))
1370 {
1371 mark_not_eliminable (PATTERN (insn), VOIDmode);
1372 if (curr_sp_change != 0
1373 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
1374 stop_to_sp_elimination_p = true;
1375 }
1376 }
1377 if (! frame_pointer_needed
1378 && (curr_sp_change != 0 || stop_to_sp_elimination_p)
1379 && bb->succs && bb->succs->length () != 0)
1380 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1381 if (ep->to == STACK_POINTER_REGNUM)
1382 setup_can_eliminate (ep, false);
1383 }
c6a6cdaa 1384 setup_elimination_map ();
1385}
1386
1387/* Eliminate hard reg given by its location LOC. */
1388void
1389lra_eliminate_reg_if_possible (rtx *loc)
1390{
1391 int regno;
9908fe4d 1392 struct lra_elim_table *ep;
c6a6cdaa 1393
1394 lra_assert (REG_P (*loc));
1395 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1396 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1397 return;
1398 if ((ep = get_elimination (*loc)) != NULL)
1399 *loc = ep->to_rtx;
1400}
1401
3b3a5e5f 1402/* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
1403 the insn for subsequent processing in the constraint pass, update
1404 the insn info. */
c6a6cdaa 1405static void
7f836b57 1406process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
c6a6cdaa 1407{
497ba60f 1408 eliminate_regs_in_insn (insn, final_p, first_p, 0);
c6a6cdaa 1409 if (! final_p)
1410 {
1411 /* Check that insn changed its code. This is a case when a move
1412 insn becomes an add insn and we do not want to process the
1413 insn as a move anymore. */
1414 int icode = recog (PATTERN (insn), insn, 0);
1415
1416 if (icode >= 0 && icode != INSN_CODE (insn))
1417 {
1418 INSN_CODE (insn) = icode;
1419 lra_update_insn_recog_data (insn);
1420 }
1421 lra_update_insn_regno_info (insn);
1422 lra_push_insn (insn);
1423 lra_set_used_insn_alternative (insn, -1);
1424 }
1425}
1426
1427/* Entry function to do final elimination if FINAL_P or to update
3b3a5e5f 1428 elimination register offsets (FIRST_P if we are doing it the first
1429 time). */
c6a6cdaa 1430void
3b3a5e5f 1431lra_eliminate (bool final_p, bool first_p)
c6a6cdaa 1432{
c6a6cdaa 1433 unsigned int uid;
c6a6cdaa 1434 bitmap_head insns_with_changed_offsets;
1435 bitmap_iterator bi;
9908fe4d 1436 struct lra_elim_table *ep;
3b3a5e5f 1437
1438 gcc_assert (! final_p || ! first_p);
c6a6cdaa 1439
1440 timevar_push (TV_LRA_ELIMINATE);
1441
3b3a5e5f 1442 if (first_p)
1443 init_elimination ();
1444
c6a6cdaa 1445 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1446 if (final_p)
1447 {
382ecba7 1448 if (flag_checking)
1449 {
1450 update_reg_eliminate (&insns_with_changed_offsets);
1451 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
1452 }
c6a6cdaa 1453 /* We change eliminable hard registers in insns so we should do
1454 this for all insns containing any eliminable hard
1455 register. */
1456 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1457 if (elimination_map[ep->from] != NULL)
1458 bitmap_ior_into (&insns_with_changed_offsets,
1459 &lra_reg_info[ep->from].insn_bitmap);
1460 }
c625778b 1461 else if (! update_reg_eliminate (&insns_with_changed_offsets))
1462 goto lra_eliminate_done;
c6a6cdaa 1463 if (lra_dump_file != NULL)
1464 {
1465 fprintf (lra_dump_file, "New elimination table:\n");
1466 print_elim_table (lra_dump_file);
1467 }
c6a6cdaa 1468 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
2b1732ad 1469 /* A dead insn can be deleted in process_insn_for_elimination. */
1470 if (lra_insn_recog_data[uid] != NULL)
3b3a5e5f 1471 process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
1472 final_p, first_p);
c6a6cdaa 1473 bitmap_clear (&insns_with_changed_offsets);
1474
1475lra_eliminate_done:
1476 timevar_pop (TV_LRA_ELIMINATE);
1477}