]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/lra-int.h
dbxout.c (dbxout_symbol_location): Pass new argument to alter_subreg.
[thirdparty/gcc.git] / gcc / lra-int.h
CommitLineData
55a2c322
VM
1/* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010, 2011, 2012
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
21
22#include "lra.h"
23#include "bitmap.h"
24#include "recog.h"
25#include "insn-attr.h"
26#include "insn-codes.h"
27
28#ifdef ENABLE_CHECKING
29#define lra_assert(c) gcc_assert (c)
30#else
31/* Always define and include C, so that warnings for empty body in an
32 ‘if’ statement and unused variable do not occur. */
33#define lra_assert(c) ((void)(0 && (c)))
34#endif
35
36/* The parameter used to prevent infinite reloading for an insn. Each
37 insn operands might require a reload and, if it is a memory, its
38 base and index registers might require a reload too. */
39#define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
40
41/* Return the hard register which given pseudo REGNO assigned to.
42 Negative value means that the register got memory or we don't know
43 allocation yet. */
44static inline int
45lra_get_regno_hard_regno (int regno)
46{
47 resize_reg_info ();
48 return reg_renumber[regno];
49}
50
51typedef struct lra_live_range *lra_live_range_t;
52
53/* The structure describes program points where a given pseudo lives.
54 The live ranges can be used to find conflicts with other pseudos.
55 If the live ranges of two pseudos are intersected, the pseudos are
56 in conflict. */
57struct lra_live_range
58{
59 /* Pseudo regno whose live range is described by given
60 structure. */
61 int regno;
62 /* Program point range. */
63 int start, finish;
64 /* Next structure describing program points where the pseudo
65 lives. */
66 lra_live_range_t next;
67 /* Pointer to structures with the same start. */
68 lra_live_range_t start_next;
69};
70
71typedef struct lra_copy *lra_copy_t;
72
73/* Copy between pseudos which affects assigning hard registers. */
74struct lra_copy
75{
76 /* True if regno1 is the destination of the copy. */
77 bool regno1_dest_p;
78 /* Execution frequency of the copy. */
79 int freq;
80 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
81 int regno1, regno2;
82 /* Next copy with correspondingly REGNO1 and REGNO2. */
83 lra_copy_t regno1_next, regno2_next;
84};
85
86/* Common info about a register (pseudo or hard register). */
87struct lra_reg
88{
89 /* Bitmap of UIDs of insns (including debug insns) referring the
90 reg. */
91 bitmap_head insn_bitmap;
92 /* The following fields are defined only for pseudos. */
93 /* Hard registers with which the pseudo conflicts. */
94 HARD_REG_SET conflict_hard_regs;
95 /* We assign hard registers to reload pseudos which can occur in few
96 places. So two hard register preferences are enough for them.
97 The following fields define the preferred hard registers. If
98 there are no such hard registers the first field value is
99 negative. If there is only one preferred hard register, the 2nd
100 field is negative. */
101 int preferred_hard_regno1, preferred_hard_regno2;
102 /* Profits to use the corresponding preferred hard registers. If
103 the both hard registers defined, the first hard register has not
104 less profit than the second one. */
105 int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
106#ifdef STACK_REGS
107 /* True if the pseudo should not be assigned to a stack register. */
108 bool no_stack_p;
109#endif
110#ifdef ENABLE_CHECKING
111 /* True if the pseudo crosses a call. It is setup in lra-lives.c
112 and used to check that the pseudo crossing a call did not get a
113 call used hard register. */
114 bool call_p;
115#endif
116 /* Number of references and execution frequencies of the register in
117 *non-debug* insns. */
118 int nrefs, freq;
119 int last_reload;
120 /* Regno used to undo the inheritance. It can be non-zero only
121 between couple of inheritance and undo inheritance passes. */
122 int restore_regno;
123 /* Value holding by register. If the pseudos have the same value
124 they do not conflict. */
125 int val;
126 /* These members are set up in lra-lives.c and updated in
127 lra-coalesce.c. */
128 /* The biggest size mode in which each pseudo reg is referred in
129 whole function (possibly via subreg). */
130 enum machine_mode biggest_mode;
131 /* Live ranges of the pseudo. */
132 lra_live_range_t live_ranges;
133 /* This member is set up in lra-lives.c for subsequent
134 assignments. */
135 lra_copy_t copies;
136};
137
138/* References to the common info about each register. */
139extern struct lra_reg *lra_reg_info;
140
141/* Static info about each insn operand (common for all insns with the
142 same ICODE). Warning: if the structure definition is changed, the
143 initializer for debug_operand_data in lra.c should be changed
144 too. */
145struct lra_operand_data
146{
147 /* The machine description constraint string of the operand. */
148 const char *constraint;
149 /* It is taken only from machine description (which is different
150 from recog_data.operand_mode) and can be of VOIDmode. */
151 ENUM_BITFIELD(machine_mode) mode : 16;
152 /* The type of the operand (in/out/inout). */
153 ENUM_BITFIELD (op_type) type : 8;
154 /* Through if accessed through STRICT_LOW. */
155 unsigned int strict_low : 1;
156 /* True if the operand is an operator. */
157 unsigned int is_operator : 1;
158 /* True if there is an early clobber alternative for this operand.
159 This field is set up every time when corresponding
160 operand_alternative in lra_static_insn_data is set up. */
161 unsigned int early_clobber : 1;
162 /* True if the operand is an address. */
163 unsigned int is_address : 1;
164};
165
166/* Info about register occurrence in an insn. */
167struct lra_insn_reg
168{
169 /* The biggest mode through which the insn refers to the register
170 occurrence (remember the register can be accessed through a
171 subreg in the insn). */
172 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
173 /* The type of the corresponding operand which is the register. */
174 ENUM_BITFIELD (op_type) type : 8;
175 /* True if the reg is accessed through a subreg and the subreg is
176 just a part of the register. */
177 unsigned int subreg_p : 1;
178 /* True if there is an early clobber alternative for this
179 operand. */
180 unsigned int early_clobber : 1;
181 /* The corresponding regno of the register. */
182 int regno;
183 /* Next reg info of the same insn. */
184 struct lra_insn_reg *next;
185};
186
187/* Static part (common info for insns with the same ICODE) of LRA
188 internal insn info. It exists in at most one exemplar for each
189 non-negative ICODE. There is only one exception. Each asm insn has
190 own structure. Warning: if the structure definition is changed,
191 the initializer for debug_insn_static_data in lra.c should be
192 changed too. */
193struct lra_static_insn_data
194{
195 /* Static info about each insn operand. */
196 struct lra_operand_data *operand;
197 /* Each duplication refers to the number of the corresponding
198 operand which is duplicated. */
199 int *dup_num;
200 /* The number of an operand marked as commutative, -1 otherwise. */
201 int commutative;
202 /* Number of operands, duplications, and alternatives of the
203 insn. */
204 char n_operands;
205 char n_dups;
206 char n_alternatives;
207 /* Insns in machine description (or clobbers in asm) may contain
208 explicit hard regs which are not operands. The following list
209 describes such hard registers. */
210 struct lra_insn_reg *hard_regs;
211 /* Array [n_alternatives][n_operand] of static constraint info for
212 given operand in given alternative. This info can be changed if
213 the target reg info is changed. */
214 struct operand_alternative *operand_alternative;
215};
216
217/* LRA internal info about an insn (LRA internal insn
218 representation). */
219struct lra_insn_recog_data
220{
221 /* The insn code. */
222 int icode;
223 /* The insn itself. */
224 rtx insn;
225 /* Common data for insns with the same ICODE. Asm insns (their
226 ICODE is negative) do not share such structures. */
227 struct lra_static_insn_data *insn_static_data;
228 /* Two arrays of size correspondingly equal to the operand and the
229 duplication numbers: */
230 rtx **operand_loc; /* The operand locations, NULL if no operands. */
231 rtx **dup_loc; /* The dup locations, NULL if no dups. */
232 /* Number of hard registers implicitly used in given call insn. The
233 value can be NULL or points to array of the hard register numbers
234 ending with a negative value. */
235 int *arg_hard_regs;
236#ifdef HAVE_ATTR_enabled
237 /* Alternative enabled for the insn. NULL for debug insns. */
238 bool *alternative_enabled_p;
239#endif
240 /* The alternative should be used for the insn, -1 if invalid, or we
241 should try to use any alternative, or the insn is a debug
242 insn. */
243 int used_insn_alternative;
244 /* The following member value is always NULL for a debug insn. */
245 struct lra_insn_reg *regs;
246};
247
248typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
249
250/* lra.c: */
251
252extern FILE *lra_dump_file;
253
254extern bool lra_reg_spill_p;
255
256extern HARD_REG_SET lra_no_alloc_regs;
257
258extern int lra_insn_recog_data_len;
259extern lra_insn_recog_data_t *lra_insn_recog_data;
260
261extern int lra_curr_reload_num;
262
263extern void lra_push_insn (rtx);
264extern void lra_push_insn_by_uid (unsigned int);
265extern void lra_push_insn_and_update_insn_regno_info (rtx);
266extern rtx lra_pop_insn (void);
267extern unsigned int lra_insn_stack_length (void);
268
269extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
270 enum reg_class, const char *);
271extern void lra_set_regno_unique_value (int);
272extern void lra_invalidate_insn_data (rtx);
273extern void lra_set_insn_deleted (rtx);
274extern void lra_delete_dead_insn (rtx);
275extern void lra_emit_add (rtx, rtx, rtx);
276extern void lra_emit_move (rtx, rtx);
277extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
278
279extern void lra_process_new_insns (rtx, rtx, rtx, const char *);
280
281extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx);
282extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx);
283extern void lra_set_used_insn_alternative (rtx, int);
284extern void lra_set_used_insn_alternative_by_uid (int, int);
285
286extern void lra_invalidate_insn_regno_info (rtx);
287extern void lra_update_insn_regno_info (rtx);
288extern struct lra_insn_reg *lra_get_insn_regs (int);
289
290extern void lra_free_copies (void);
291extern void lra_create_copy (int, int, int);
292extern lra_copy_t lra_get_copy (int);
293extern bool lra_former_scratch_p (int);
294extern bool lra_former_scratch_operand_p (rtx, int);
295
296extern int lra_constraint_new_regno_start;
297extern bitmap_head lra_inheritance_pseudos;
298extern bitmap_head lra_split_regs;
299extern bitmap_head lra_optional_reload_pseudos;
300extern int lra_constraint_new_insn_uid_start;
301
302/* lra-constraints.c: */
303
304extern int lra_constraint_offset (int, enum machine_mode);
305
306extern int lra_constraint_iter;
307extern int lra_constraint_iter_after_spill;
308extern bool lra_risky_transformations_p;
309extern int lra_inheritance_iter;
310extern int lra_undo_inheritance_iter;
311extern bool lra_constraints (bool);
312extern void lra_constraints_init (void);
313extern void lra_constraints_finish (void);
314extern void lra_inheritance (void);
315extern bool lra_undo_inheritance (void);
316
317/* lra-lives.c: */
318
319extern int lra_live_max_point;
320extern int *lra_point_freq;
321
322extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
323
324extern int lra_live_range_iter;
325extern void lra_create_live_ranges (bool);
326extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
327extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
328 lra_live_range_t);
329extern bool lra_intersected_live_ranges_p (lra_live_range_t,
330 lra_live_range_t);
331extern void lra_print_live_range_list (FILE *, lra_live_range_t);
332extern void lra_debug_live_range_list (lra_live_range_t);
333extern void lra_debug_pseudo_live_ranges (int);
334extern void lra_debug_live_ranges (void);
335extern void lra_clear_live_ranges (void);
336extern void lra_live_ranges_init (void);
337extern void lra_live_ranges_finish (void);
338extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
339
340/* lra-assigns.c: */
341
342extern void lra_setup_reg_renumber (int, int, bool);
343extern bool lra_assign (void);
344
345
346/* lra-coalesce.c: */
347
348extern int lra_coalesce_iter;
349extern bool lra_coalesce (void);
350
351/* lra-spills.c: */
352
353extern bool lra_need_for_spills_p (void);
354extern void lra_spill (void);
355extern void lra_hard_reg_substitution (void);
356
357
358/* lra-elimination.c: */
359
360extern void lra_debug_elim_table (void);
361extern int lra_get_elimination_hard_regno (int);
362extern rtx lra_eliminate_regs_1 (rtx, enum machine_mode, bool, bool, bool);
363extern void lra_eliminate (bool);
364
365extern void lra_eliminate_reg_if_possible (rtx *);
366
367\f
368
369/* Update insn operands which are duplication of NOP operand. The
370 insn is represented by its LRA internal representation ID. */
371static inline void
372lra_update_dup (lra_insn_recog_data_t id, int nop)
373{
374 int i;
375 struct lra_static_insn_data *static_id = id->insn_static_data;
376
377 for (i = 0; i < static_id->n_dups; i++)
378 if (static_id->dup_num[i] == nop)
379 *id->dup_loc[i] = *id->operand_loc[nop];
380}
381
382/* Process operator duplications in insn with ID. We do it after the
383 operands processing. Generally speaking, we could do this probably
384 simultaneously with operands processing because a common practice
385 is to enumerate the operators after their operands. */
386static inline void
387lra_update_operator_dups (lra_insn_recog_data_t id)
388{
389 int i;
390 struct lra_static_insn_data *static_id = id->insn_static_data;
391
392 for (i = 0; i < static_id->n_dups; i++)
393 {
394 int ndup = static_id->dup_num[i];
395
396 if (static_id->operand[ndup].is_operator)
397 *id->dup_loc[i] = *id->operand_loc[ndup];
398 }
399}
400
401/* Return info about INSN. Set up the info if it is not done yet. */
402static inline lra_insn_recog_data_t
403lra_get_insn_recog_data (rtx insn)
404{
405 lra_insn_recog_data_t data;
406 unsigned int uid = INSN_UID (insn);
407
408 if (lra_insn_recog_data_len > (int) uid
409 && (data = lra_insn_recog_data[uid]) != NULL)
410 {
411 /* Check that we did not change insn without updating the insn
412 info. */
413 lra_assert (data->insn == insn
414 && (INSN_CODE (insn) < 0
415 || data->icode == INSN_CODE (insn)));
416 return data;
417 }
418 return lra_set_insn_recog_data (insn);
419}
420
421\f
422
423struct target_lra_int
424{
425 /* Map INSN_UID -> the operand alternative data (NULL if unknown).
426 We assume that this data is valid until register info is changed
427 because classes in the data can be changed. */
428 struct operand_alternative *x_op_alt_data[LAST_INSN_CODE];
429};
430
431extern struct target_lra_int default_target_lra_int;
432#if SWITCHABLE_TARGET
433extern struct target_lra_int *this_target_lra_int;
434#else
435#define this_target_lra_int (&default_target_lra_int)
436#endif
437
438#define op_alt_data (this_target_lra_int->x_op_alt_data)