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497ba60f 1/* Rematerialize pseudos values.
fbd26352 2 Copyright (C) 2014-2019 Free Software Foundation, Inc.
497ba60f 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21/* This code objective is to rematerialize spilled pseudo values. To
22 do this we calculate available insn candidates. The candidate is
23 available at some point if there is dominated set of insns with the
24 same pattern, the insn inputs are not dying or modified on any path
25 from the set, the outputs are not modified.
26
27 The insns containing memory or spilled pseudos (except for the
28 rematerialized pseudo) are not considered as such insns are not
29 profitable in comparison with regular loads of spilled pseudo
30 values. That simplifies the implementation as we don't need to
31 deal with memory aliasing.
32
33 To speed up available candidate calculation, we calculate partially
34 available candidates first and use them for initialization of the
35 availability. That is because (partial) availability sets are
36 sparse.
37
38 The rematerialization sub-pass could be improved further in the
39 following ways:
40
41 o We could make longer live ranges of inputs in the
42 rematerialization candidates if their hard registers are not used
43 for other purposes. This could be complicated if we need to
44 update BB live info information as LRA does not use
45 DF-infrastructure for compile-time reasons. This problem could
46 be overcome if constrain making live ranges longer only in BB/EBB
47 scope.
48 o We could use cost-based decision to choose rematerialization insn
49 (currently all insns without memory is can be used).
50 o We could use other free hard regs for unused output pseudos in
51 rematerialization candidates although such cases probably will
52 be very rare. */
53
54
55#include "config.h"
56#include "system.h"
57#include "coretypes.h"
9ef16211 58#include "backend.h"
497ba60f 59#include "rtl.h"
9ef16211 60#include "df.h"
497ba60f 61#include "insn-config.h"
7c29e30e 62#include "regs.h"
ad7b10a2 63#include "memmodel.h"
7c29e30e 64#include "ira.h"
497ba60f 65#include "recog.h"
9ef16211 66#include "lra.h"
497ba60f 67#include "lra-int.h"
68
69/* Number of candidates for rematerialization. */
70static unsigned int cands_num;
71
72/* The following is used for representation of call_used_reg_set in
73 form array whose elements are hard register numbers with nonzero bit
74 in CALL_USED_REG_SET. */
75static int call_used_regs_arr_len;
76static int call_used_regs_arr[FIRST_PSEUDO_REGISTER];
77
78/* Bitmap used for different calculations. */
79static bitmap_head temp_bitmap;
80
fa6e6b15 81/* Registers accessed via subreg_p. */
82static bitmap_head subreg_regs;
83
497ba60f 84typedef struct cand *cand_t;
85typedef const struct cand *const_cand_t;
86
87/* Insn candidates for rematerialization. The candidate insn should
88 have the following properies:
89 o no any memory (as access to memory is non-profitable)
90 o no INOUT regs (it means no non-paradoxical subreg of output reg)
91 o one output spilled pseudo (or reload pseudo of a spilled pseudo)
92 o all other pseudos are with assigned hard regs. */
93struct cand
94{
95 /* Index of the candidates in all_cands. */
96 int index;
497ba60f 97 /* Insn pseudo regno for rematerialization. */
98 int regno;
487798e2 99 /* The candidate insn. */
100 rtx_insn *insn;
497ba60f 101 /* Non-negative if a reload pseudo is in the insn instead of the
102 pseudo for rematerialization. */
103 int reload_regno;
104 /* Number of the operand containing the regno or its reload
105 regno. */
106 int nop;
107 /* Next candidate for the same regno. */
108 cand_t next_regno_cand;
109};
110
111/* Vector containing all candidates. */
112static vec<cand_t> all_cands;
07c11f2b 113/* Map: insn -> candidate representing it. It is null if the insn cannot
114 be used for rematerialization. */
497ba60f 115static cand_t *insn_to_cand;
da259f51 116/* A secondary map, for candidates that involve two insns, where the
117 second one makes the equivalence. The candidate must not be used
118 before seeing this activation insn. */
119static cand_t *insn_to_cand_activation;
497ba60f 120
121/* Map regno -> candidates can be used for the regno
122 rematerialization. */
123static cand_t *regno_cands;
124
125/* Data about basic blocks used for the rematerialization
126 sub-pass. */
251317e4 127class remat_bb_data
497ba60f 128{
251317e4 129public:
497ba60f 130 /* Basic block about which the below data are. */
131 basic_block bb;
132 /* Registers changed in the basic block: */
133 bitmap_head changed_regs;
134 /* Registers becoming dead in the BB. */
135 bitmap_head dead_regs;
136 /* Cands present in the BB whose in/out regs are not changed after
137 the cands occurence and are not dead (except the reload
138 regno). */
139 bitmap_head gen_cands;
140 bitmap_head livein_cands; /* cands whose inputs live at the BB start. */
141 bitmap_head pavin_cands; /* cands partially available at BB entry. */
142 bitmap_head pavout_cands; /* cands partially available at BB exit. */
143 bitmap_head avin_cands; /* cands available at the entry of the BB. */
144 bitmap_head avout_cands; /* cands available at the exit of the BB. */
145};
146
147/* Array for all BB data. Indexed by the corresponding BB index. */
2e966e2a 148typedef class remat_bb_data *remat_bb_data_t;
497ba60f 149
150/* Basic blocks for data flow problems -- all bocks except the special
151 ones. */
152static bitmap_head all_blocks;
153
154/* All basic block data are referred through the following array. */
155static remat_bb_data_t remat_bb_data;
156
157/* Two small functions for access to the bb data. */
158static inline remat_bb_data_t
159get_remat_bb_data (basic_block bb)
160{
161 return &remat_bb_data[(bb)->index];
162}
163
164static inline remat_bb_data_t
165get_remat_bb_data_by_index (int index)
166{
167 return &remat_bb_data[index];
168}
169
170\f
171
497ba60f 172/* Hash table for the candidates. Different insns (e.g. structurally
173 the same insns or even insns with different unused output regs) can
174 be represented by the same candidate in the table. */
175static htab_t cand_table;
176
177/* Hash function for candidate CAND. */
178static hashval_t
179cand_hash (const void *cand)
180{
181 const_cand_t c = (const_cand_t) cand;
182 lra_insn_recog_data_t id = lra_get_insn_recog_data (c->insn);
183 struct lra_static_insn_data *static_id = id->insn_static_data;
184 int nops = static_id->n_operands;
185 hashval_t hash = 0;
186
187 for (int i = 0; i < nops; i++)
188 if (i == c->nop)
189 hash = iterative_hash_object (c->regno, hash);
190 else if (static_id->operand[i].type == OP_IN)
191 hash = iterative_hash_object (*id->operand_loc[i], hash);
192 return hash;
193}
194
195/* Equal function for candidates CAND1 and CAND2. They are equal if
196 the corresponding candidate insns have the same code, the same
197 regno for rematerialization, the same input operands. */
198static int
199cand_eq_p (const void *cand1, const void *cand2)
200{
201 const_cand_t c1 = (const_cand_t) cand1;
202 const_cand_t c2 = (const_cand_t) cand2;
203 lra_insn_recog_data_t id1 = lra_get_insn_recog_data (c1->insn);
204 lra_insn_recog_data_t id2 = lra_get_insn_recog_data (c2->insn);
205 struct lra_static_insn_data *static_id1 = id1->insn_static_data;
206 int nops = static_id1->n_operands;
207
208 if (c1->regno != c2->regno
209 || INSN_CODE (c1->insn) < 0
210 || INSN_CODE (c1->insn) != INSN_CODE (c2->insn))
211 return false;
212 gcc_assert (c1->nop == c2->nop);
213 for (int i = 0; i < nops; i++)
214 if (i != c1->nop && static_id1->operand[i].type == OP_IN
215 && *id1->operand_loc[i] != *id2->operand_loc[i])
216 return false;
217 return true;
218}
219
220/* Insert candidate CAND into the table if it is not there yet.
221 Return candidate which is in the table. */
222static cand_t
223insert_cand (cand_t cand)
224{
225 void **entry_ptr;
226
227 entry_ptr = htab_find_slot (cand_table, cand, INSERT);
228 if (*entry_ptr == NULL)
229 *entry_ptr = (void *) cand;
230 return (cand_t) *entry_ptr;
231}
232
233/* Free candidate CAND memory. */
234static void
235free_cand (void *cand)
236{
237 free (cand);
238}
239
240/* Initiate the candidate table. */
241static void
242initiate_cand_table (void)
243{
244 cand_table = htab_create (8000, cand_hash, cand_eq_p,
245 (htab_del) free_cand);
246}
247
248/* Finish the candidate table. */
249static void
250finish_cand_table (void)
251{
252 htab_delete (cand_table);
253}
254
255\f
256
f4d3c071 257/* Return true if X contains memory or some UNSPEC. We cannot just
80d26586 258 check insn operands as memory or unspec might be not an operand
259 itself but contain an operand. Insn with memory access is not
260 profitable for rematerialization. Rematerialization of UNSPEC
261 might result in wrong code generation as the UNPEC effect is
262 unknown (e.g. generating a label). */
497ba60f 263static bool
264bad_for_rematerialization_p (rtx x)
265{
266 int i, j;
267 const char *fmt;
268 enum rtx_code code;
269
80d26586 270 if (MEM_P (x) || GET_CODE (x) == UNSPEC || GET_CODE (x) == UNSPEC_VOLATILE)
497ba60f 271 return true;
272 code = GET_CODE (x);
273 fmt = GET_RTX_FORMAT (code);
274 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
275 {
276 if (fmt[i] == 'e')
277 {
278 if (bad_for_rematerialization_p (XEXP (x, i)))
279 return true;
280 }
281 else if (fmt[i] == 'E')
282 {
283 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
284 if (bad_for_rematerialization_p (XVECEXP (x, i, j)))
285 return true;
286 }
287 }
288 return false;
289}
290
f4d3c071 291/* If INSN cannot be used for rematerialization, return negative
497ba60f 292 value. If INSN can be considered as a candidate for
293 rematerialization, return value which is the operand number of the
294 pseudo for which the insn can be used for rematerialization. Here
295 we consider the insns without any memory, spilled pseudo (except
296 for the rematerialization pseudo), or dying or unused regs. */
297static int
298operand_to_remat (rtx_insn *insn)
299{
300 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
301 struct lra_static_insn_data *static_id = id->insn_static_data;
302 struct lra_insn_reg *reg, *found_reg = NULL;
303
dcf57248 304 /* Don't rematerialize insns which can change PC. */
305 if (JUMP_P (insn) || CALL_P (insn))
306 return -1;
497ba60f 307 /* First find a pseudo which can be rematerialized. */
308 for (reg = id->regs; reg != NULL; reg = reg->next)
fa6e6b15 309 {
f4d3c071 310 /* True FRAME_POINTER_NEEDED might be because we cannot follow
fa6e6b15 311 changing sp offsets, e.g. alloca is used. If the insn contains
f4d3c071 312 stack pointer in such case, we cannot rematerialize it as we
313 cannot know sp offset at a rematerialization place. */
fa6e6b15 314 if (reg->regno == STACK_POINTER_REGNUM && frame_pointer_needed)
315 return -1;
316 else if (reg->type == OP_OUT && ! reg->subreg_p
317 && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
318 {
319 /* We permits only one spilled reg. */
320 if (found_reg != NULL)
321 return -1;
322 found_reg = reg;
323 }
324 /* IRA calculates conflicts separately for subregs of two words
325 pseudo. Even if the pseudo lives, e.g. one its subreg can be
326 used lately, another subreg hard register can be already used
327 for something else. In such case, it is not safe to
328 rematerialize the insn. */
329 if (reg->regno >= FIRST_PSEUDO_REGISTER
330 && bitmap_bit_p (&subreg_regs, reg->regno))
331 return -1;
27b2c1c4 332
333 /* Don't allow hard registers to be rematerialized. */
334 if (reg->regno < FIRST_PSEUDO_REGISTER)
335 return -1;
fa6e6b15 336 }
497ba60f 337 if (found_reg == NULL)
338 return -1;
339 if (found_reg->regno < FIRST_PSEUDO_REGISTER)
340 return -1;
341 if (bad_for_rematerialization_p (PATTERN (insn)))
342 return -1;
343 /* Check the other regs are not spilled. */
344 for (reg = id->regs; reg != NULL; reg = reg->next)
345 if (found_reg == reg)
346 continue;
347 else if (reg->type == OP_INOUT)
348 return -1;
349 else if (reg->regno >= FIRST_PSEUDO_REGISTER
350 && reg_renumber[reg->regno] < 0)
351 /* Another spilled reg. */
352 return -1;
353 else if (reg->type == OP_IN)
354 {
355 if (find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
356 /* We don't want to make live ranges longer. */
357 return -1;
358 /* Check that there is no output reg as the input one. */
359 for (struct lra_insn_reg *reg2 = id->regs;
360 reg2 != NULL;
361 reg2 = reg2->next)
362 if (reg2->type == OP_OUT && reg->regno == reg2->regno)
363 return -1;
b83f34d0 364 if (reg->regno < FIRST_PSEUDO_REGISTER)
365 for (struct lra_insn_reg *reg2 = static_id->hard_regs;
366 reg2 != NULL;
367 reg2 = reg2->next)
368 if (reg2->type == OP_OUT
369 && reg->regno <= reg2->regno
370 && (reg2->regno
16b9e38b 371 < (int) end_hard_regno (reg->biggest_mode, reg->regno)))
b83f34d0 372 return -1;
497ba60f 373 }
48d1445d 374 /* Check hard coded insn registers. */
375 for (struct lra_insn_reg *reg = static_id->hard_regs;
376 reg != NULL;
377 reg = reg->next)
378 if (reg->type == OP_INOUT)
379 return -1;
380 else if (reg->type == OP_IN)
381 {
382 /* Check that there is no output hard reg as the input
383 one. */
384 for (struct lra_insn_reg *reg2 = static_id->hard_regs;
385 reg2 != NULL;
386 reg2 = reg2->next)
387 if (reg2->type == OP_OUT && reg->regno == reg2->regno)
388 return -1;
389 }
497ba60f 390 /* Find the rematerialization operand. */
391 int nop = static_id->n_operands;
392 for (int i = 0; i < nop; i++)
393 if (REG_P (*id->operand_loc[i])
394 && (int) REGNO (*id->operand_loc[i]) == found_reg->regno)
395 return i;
396 return -1;
397}
398
399/* Create candidate for INSN with rematerialization operand NOP and
400 REGNO. Insert the candidate into the table and set up the
401 corresponding INSN_TO_CAND element. */
402static void
da259f51 403create_cand (rtx_insn *insn, int nop, int regno, rtx_insn *activation = NULL)
497ba60f 404{
405 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
406 rtx reg = *id->operand_loc[nop];
407 gcc_assert (REG_P (reg));
408 int op_regno = REGNO (reg);
409 gcc_assert (op_regno >= FIRST_PSEUDO_REGISTER);
410 cand_t cand = XNEW (struct cand);
411 cand->insn = insn;
412 cand->nop = nop;
413 cand->regno = regno;
414 cand->reload_regno = op_regno == regno ? -1 : op_regno;
415 gcc_assert (cand->regno >= 0);
416 cand_t cand_in_table = insert_cand (cand);
417 insn_to_cand[INSN_UID (insn)] = cand_in_table;
418 if (cand != cand_in_table)
419 free (cand);
420 else
421 {
422 /* A new cand. */
423 cand->index = all_cands.length ();
424 all_cands.safe_push (cand);
425 cand->next_regno_cand = regno_cands[cand->regno];
426 regno_cands[cand->regno] = cand;
427 }
da259f51 428 if (activation)
429 insn_to_cand_activation[INSN_UID (activation)] = cand_in_table;
497ba60f 430}
431
432/* Create rematerialization candidates (inserting them into the
433 table). */
434static void
435create_cands (void)
436{
437 rtx_insn *insn;
438 struct potential_cand
439 {
440 rtx_insn *insn;
441 int nop;
442 };
443 struct potential_cand *regno_potential_cand;
444
445 /* Create candidates. */
446 regno_potential_cand = XCNEWVEC (struct potential_cand, max_reg_num ());
447 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
da259f51 448 if (NONDEBUG_INSN_P (insn))
497ba60f 449 {
497ba60f 450 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
da259f51 451 int keep_regno = -1;
452 rtx set = single_set (insn);
453 int nop;
454
455 /* See if this is an output reload for a previous insn. */
456 if (set != NULL
457 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)))
458 {
459 rtx dstreg = SET_DEST (set);
460 int src_regno = REGNO (SET_SRC (set));
461 int dst_regno = REGNO (dstreg);
462 rtx_insn *insn2 = regno_potential_cand[src_regno].insn;
463
464 if (insn2 != NULL
465 && dst_regno >= FIRST_PSEUDO_REGISTER
466 && reg_renumber[dst_regno] < 0
467 && BLOCK_FOR_INSN (insn2) == BLOCK_FOR_INSN (insn))
468 {
469 create_cand (insn2, regno_potential_cand[src_regno].nop,
470 dst_regno, insn);
471 goto done;
472 }
473 }
474
475 nop = operand_to_remat (insn);
476 if (nop >= 0)
497ba60f 477 {
da259f51 478 gcc_assert (REG_P (*id->operand_loc[nop]));
479 int regno = REGNO (*id->operand_loc[nop]);
480 gcc_assert (regno >= FIRST_PSEUDO_REGISTER);
481 /* If we're setting an unrenumbered pseudo, make a candidate immediately.
482 If it's an output reload register, save it for later; the code above
483 looks for output reload insns later on. */
484 if (reg_renumber[regno] < 0)
485 create_cand (insn, nop, regno);
486 else if (regno >= lra_constraint_new_regno_start)
487 {
488 regno_potential_cand[regno].insn = insn;
489 regno_potential_cand[regno].nop = nop;
490 keep_regno = regno;
491 }
497ba60f 492 }
da259f51 493
494 done:
497ba60f 495 for (struct lra_insn_reg *reg = id->regs; reg != NULL; reg = reg->next)
da259f51 496 if (reg->type != OP_IN && reg->regno != keep_regno
497ba60f 497 && reg->regno >= FIRST_PSEUDO_REGISTER)
498 regno_potential_cand[reg->regno].insn = NULL;
499 }
500 cands_num = all_cands.length ();
501 free (regno_potential_cand);
502}
503
504\f
505
506/* Create and initialize BB data. */
507static void
508create_remat_bb_data (void)
509{
510 basic_block bb;
511 remat_bb_data_t bb_info;
512
2e966e2a 513 remat_bb_data = XNEWVEC (class remat_bb_data,
497ba60f 514 last_basic_block_for_fn (cfun));
515 FOR_ALL_BB_FN (bb, cfun)
516 {
382ecba7 517 gcc_checking_assert (bb->index >= 0
518 && bb->index < last_basic_block_for_fn (cfun));
497ba60f 519 bb_info = get_remat_bb_data (bb);
520 bb_info->bb = bb;
521 bitmap_initialize (&bb_info->changed_regs, &reg_obstack);
522 bitmap_initialize (&bb_info->dead_regs, &reg_obstack);
523 bitmap_initialize (&bb_info->gen_cands, &reg_obstack);
524 bitmap_initialize (&bb_info->livein_cands, &reg_obstack);
525 bitmap_initialize (&bb_info->pavin_cands, &reg_obstack);
526 bitmap_initialize (&bb_info->pavout_cands, &reg_obstack);
527 bitmap_initialize (&bb_info->avin_cands, &reg_obstack);
528 bitmap_initialize (&bb_info->avout_cands, &reg_obstack);
529 }
530}
531
532/* Dump all candidates to DUMP_FILE. */
533static void
534dump_cands (FILE *dump_file)
535{
536 int i;
537 cand_t cand;
538
539 fprintf (dump_file, "\nCands:\n");
540 for (i = 0; i < (int) cands_num; i++)
541 {
542 cand = all_cands[i];
543 fprintf (dump_file, "%d (nop=%d, remat_regno=%d, reload_regno=%d):\n",
544 i, cand->nop, cand->regno, cand->reload_regno);
545 print_inline_rtx (dump_file, cand->insn, 6);
546 fprintf (dump_file, "\n");
547 }
548}
549
550/* Dump all candidates and BB data. */
551static void
552dump_candidates_and_remat_bb_data (void)
553{
554 basic_block bb;
555
556 if (lra_dump_file == NULL)
557 return;
558 dump_cands (lra_dump_file);
559 FOR_EACH_BB_FN (bb, cfun)
560 {
561 fprintf (lra_dump_file, "\nBB %d:\n", bb->index);
562 /* Livein */
563 fprintf (lra_dump_file, " register live in:");
564 dump_regset (df_get_live_in (bb), lra_dump_file);
565 putc ('\n', lra_dump_file);
566 /* Liveout */
567 fprintf (lra_dump_file, " register live out:");
568 dump_regset (df_get_live_out (bb), lra_dump_file);
569 putc ('\n', lra_dump_file);
570 /* Changed/dead regs: */
571 fprintf (lra_dump_file, " changed regs:");
572 dump_regset (&get_remat_bb_data (bb)->changed_regs, lra_dump_file);
573 putc ('\n', lra_dump_file);
574 fprintf (lra_dump_file, " dead regs:");
575 dump_regset (&get_remat_bb_data (bb)->dead_regs, lra_dump_file);
576 putc ('\n', lra_dump_file);
577 lra_dump_bitmap_with_title ("cands generated in BB",
578 &get_remat_bb_data (bb)->gen_cands, bb->index);
579 lra_dump_bitmap_with_title ("livein cands in BB",
580 &get_remat_bb_data (bb)->livein_cands, bb->index);
581 lra_dump_bitmap_with_title ("pavin cands in BB",
582 &get_remat_bb_data (bb)->pavin_cands, bb->index);
583 lra_dump_bitmap_with_title ("pavout cands in BB",
584 &get_remat_bb_data (bb)->pavout_cands, bb->index);
585 lra_dump_bitmap_with_title ("avin cands in BB",
586 &get_remat_bb_data (bb)->avin_cands, bb->index);
587 lra_dump_bitmap_with_title ("avout cands in BB",
588 &get_remat_bb_data (bb)->avout_cands, bb->index);
589 }
fa6e6b15 590 fprintf (lra_dump_file, "subreg regs:");
591 dump_regset (&subreg_regs, lra_dump_file);
592 putc ('\n', lra_dump_file);
497ba60f 593}
594
595/* Free all BB data. */
596static void
597finish_remat_bb_data (void)
598{
599 basic_block bb;
600
601 FOR_EACH_BB_FN (bb, cfun)
602 {
603 bitmap_clear (&get_remat_bb_data (bb)->avout_cands);
604 bitmap_clear (&get_remat_bb_data (bb)->avin_cands);
605 bitmap_clear (&get_remat_bb_data (bb)->pavout_cands);
606 bitmap_clear (&get_remat_bb_data (bb)->pavin_cands);
607 bitmap_clear (&get_remat_bb_data (bb)->livein_cands);
608 bitmap_clear (&get_remat_bb_data (bb)->gen_cands);
609 bitmap_clear (&get_remat_bb_data (bb)->dead_regs);
610 bitmap_clear (&get_remat_bb_data (bb)->changed_regs);
611 }
612 free (remat_bb_data);
613}
614
615\f
616
fa6e6b15 617/* Update changed_regs, dead_regs, subreg_regs of BB from INSN. */
497ba60f 618static void
619set_bb_regs (basic_block bb, rtx_insn *insn)
620{
621 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
fa6e6b15 622 remat_bb_data_t bb_info = get_remat_bb_data (bb);
497ba60f 623 struct lra_insn_reg *reg;
624
625 for (reg = id->regs; reg != NULL; reg = reg->next)
fa6e6b15 626 {
627 unsigned regno = reg->regno;
628 if (reg->type != OP_IN)
629 bitmap_set_bit (&bb_info->changed_regs, regno);
630 else if (find_regno_note (insn, REG_DEAD, regno) != NULL)
631 bitmap_set_bit (&bb_info->dead_regs, regno);
632 if (regno >= FIRST_PSEUDO_REGISTER && reg->subreg_p)
633 bitmap_set_bit (&subreg_regs, regno);
634 }
497ba60f 635 if (CALL_P (insn))
636 for (int i = 0; i < call_used_regs_arr_len; i++)
637 bitmap_set_bit (&get_remat_bb_data (bb)->dead_regs,
638 call_used_regs_arr[i]);
639}
640
641/* Calculate changed_regs and dead_regs for each BB. */
642static void
643calculate_local_reg_remat_bb_data (void)
644{
645 basic_block bb;
646 rtx_insn *insn;
647
648 FOR_EACH_BB_FN (bb, cfun)
649 FOR_BB_INSNS (bb, insn)
f4881661 650 if (NONDEBUG_INSN_P (insn))
497ba60f 651 set_bb_regs (bb, insn);
652}
653
654\f
655
27b2c1c4 656/* Return true if REG overlaps an input operand of INSN. */
497ba60f 657static bool
27b2c1c4 658reg_overlap_for_remat_p (lra_insn_reg *reg, rtx_insn *insn)
497ba60f 659{
8b9740d5 660 int iter;
497ba60f 661 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
8b9740d5 662 struct lra_static_insn_data *static_id = id->insn_static_data;
27b2c1c4 663 unsigned regno = reg->regno;
664 int nregs;
665
666 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
667 regno = reg_renumber[regno];
668 if (regno >= FIRST_PSEUDO_REGISTER)
669 nregs = 1;
670 else
92d2aec3 671 nregs = hard_regno_nregs (regno, reg->biggest_mode);
27b2c1c4 672
673 struct lra_insn_reg *reg2;
674
8b9740d5 675 for (iter = 0; iter < 2; iter++)
27b2c1c4 676 for (reg2 = (iter == 0 ? id->regs : static_id->hard_regs);
677 reg2 != NULL;
678 reg2 = reg2->next)
679 {
680 if (reg2->type != OP_IN)
681 continue;
682 unsigned regno2 = reg2->regno;
683 int nregs2;
684
685 if (regno2 >= FIRST_PSEUDO_REGISTER && reg_renumber[regno2] >= 0)
686 regno2 = reg_renumber[regno2];
a93cfb1f 687 if (regno2 >= FIRST_PSEUDO_REGISTER)
27b2c1c4 688 nregs2 = 1;
689 else
92d2aec3 690 nregs2 = hard_regno_nregs (regno2, reg->biggest_mode);
27b2c1c4 691
692 if ((regno2 + nregs2 - 1 >= regno && regno2 < regno + nregs)
693 || (regno + nregs - 1 >= regno2 && regno < regno2 + nregs2))
694 return true;
695 }
497ba60f 696 return false;
697}
698
699/* Return true if a call used register is an input operand of INSN. */
700static bool
701call_used_input_regno_present_p (rtx_insn *insn)
702{
8b9740d5 703 int iter;
497ba60f 704 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
8b9740d5 705 struct lra_static_insn_data *static_id = id->insn_static_data;
497ba60f 706 struct lra_insn_reg *reg;
707
8b9740d5 708 for (iter = 0; iter < 2; iter++)
709 for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
710 reg != NULL;
711 reg = reg->next)
c1031b5a 712 if (reg->type == OP_IN && reg->regno < FIRST_PSEUDO_REGISTER
8b9740d5 713 && TEST_HARD_REG_BIT (call_used_reg_set, reg->regno))
714 return true;
497ba60f 715 return false;
716}
717
718/* Calculate livein_cands for each BB. */
719static void
720calculate_livein_cands (void)
721{
722 basic_block bb;
723
724 FOR_EACH_BB_FN (bb, cfun)
725 {
726 bitmap livein_regs = df_get_live_in (bb);
727 bitmap livein_cands = &get_remat_bb_data (bb)->livein_cands;
728 for (unsigned int i = 0; i < cands_num; i++)
729 {
730 cand_t cand = all_cands[i];
731 lra_insn_recog_data_t id = lra_get_insn_recog_data (cand->insn);
732 struct lra_insn_reg *reg;
733
734 for (reg = id->regs; reg != NULL; reg = reg->next)
735 if (reg->type == OP_IN && ! bitmap_bit_p (livein_regs, reg->regno))
736 break;
737 if (reg == NULL)
738 bitmap_set_bit (livein_cands, i);
739 }
740 }
741}
742
743/* Calculate gen_cands for each BB. */
744static void
745calculate_gen_cands (void)
746{
747 basic_block bb;
748 bitmap gen_cands;
497ba60f 749 rtx_insn *insn;
750
497ba60f 751 FOR_EACH_BB_FN (bb, cfun)
752 {
753 gen_cands = &get_remat_bb_data (bb)->gen_cands;
f6708c36 754 auto_bitmap gen_insns (&reg_obstack);
497ba60f 755 FOR_BB_INSNS (bb, insn)
756 if (INSN_P (insn))
757 {
758 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
8b9740d5 759 struct lra_static_insn_data *static_id = id->insn_static_data;
497ba60f 760 struct lra_insn_reg *reg;
761 unsigned int uid;
762 bitmap_iterator bi;
763 cand_t cand;
764 rtx set;
8b9740d5 765 int iter;
497ba60f 766 int src_regno = -1, dst_regno = -1;
767
768 if ((set = single_set (insn)) != NULL
769 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)))
770 {
771 src_regno = REGNO (SET_SRC (set));
772 dst_regno = REGNO (SET_DEST (set));
773 }
774
775 /* Update gen_cands: */
776 bitmap_clear (&temp_bitmap);
8b9740d5 777 for (iter = 0; iter < 2; iter++)
778 for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
779 reg != NULL;
780 reg = reg->next)
781 if (reg->type != OP_IN
782 || find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
f6708c36 783 EXECUTE_IF_SET_IN_BITMAP (gen_insns, 0, uid, bi)
8b9740d5 784 {
785 rtx_insn *insn2 = lra_insn_recog_data[uid]->insn;
786
787 cand = insn_to_cand[INSN_UID (insn2)];
788 gcc_assert (cand != NULL);
789 /* Ignore the reload insn. */
790 if (src_regno == cand->reload_regno
791 && dst_regno == cand->regno)
792 continue;
793 if (cand->regno == reg->regno
27b2c1c4 794 || reg_overlap_for_remat_p (reg, insn2))
8b9740d5 795 {
796 bitmap_clear_bit (gen_cands, cand->index);
797 bitmap_set_bit (&temp_bitmap, uid);
798 }
799 }
497ba60f 800
801 if (CALL_P (insn))
f6708c36 802 EXECUTE_IF_SET_IN_BITMAP (gen_insns, 0, uid, bi)
497ba60f 803 {
804 rtx_insn *insn2 = lra_insn_recog_data[uid]->insn;
805
806 cand = insn_to_cand[INSN_UID (insn2)];
807 gcc_assert (cand != NULL);
808 if (call_used_input_regno_present_p (insn2))
809 {
810 bitmap_clear_bit (gen_cands, cand->index);
811 bitmap_set_bit (&temp_bitmap, uid);
812 }
813 }
f6708c36 814 bitmap_and_compl_into (gen_insns, &temp_bitmap);
497ba60f 815
816 cand = insn_to_cand[INSN_UID (insn)];
817 if (cand != NULL)
818 {
819 bitmap_set_bit (gen_cands, cand->index);
f6708c36 820 bitmap_set_bit (gen_insns, INSN_UID (insn));
497ba60f 821 }
822 }
823 }
497ba60f 824}
825
826\f
827
828/* The common transfer function used by the DF equation solver to
829 propagate (partial) availability info BB_IN to BB_OUT through block
830 with BB_INDEX according to the following equation:
831
832 bb.out = ((bb.in & bb.livein) - bb.killed) OR bb.gen
833*/
834static bool
835cand_trans_fun (int bb_index, bitmap bb_in, bitmap bb_out)
836{
837 remat_bb_data_t bb_info;
838 bitmap bb_livein, bb_changed_regs, bb_dead_regs;
839 unsigned int cid;
840 bitmap_iterator bi;
841
842 bb_info = get_remat_bb_data_by_index (bb_index);
843 bb_livein = &bb_info->livein_cands;
844 bb_changed_regs = &bb_info->changed_regs;
845 bb_dead_regs = &bb_info->dead_regs;
846 /* Calculate killed avin cands -- cands whose regs are changed or
847 becoming dead in the BB. We calculate it here as we hope that
848 repeated calculations are compensated by smaller size of BB_IN in
849 comparison with all candidates number. */
850 bitmap_clear (&temp_bitmap);
851 EXECUTE_IF_SET_IN_BITMAP (bb_in, 0, cid, bi)
852 {
853 cand_t cand = all_cands[cid];
854 lra_insn_recog_data_t id = lra_get_insn_recog_data (cand->insn);
855 struct lra_insn_reg *reg;
856
857 if (! bitmap_bit_p (bb_livein, cid))
858 {
859 bitmap_set_bit (&temp_bitmap, cid);
860 continue;
861 }
862 for (reg = id->regs; reg != NULL; reg = reg->next)
863 /* Ignore all outputs which are not the regno for
864 rematerialization. */
865 if (reg->type == OP_OUT && reg->regno != cand->regno)
866 continue;
867 else if (bitmap_bit_p (bb_changed_regs, reg->regno)
868 || bitmap_bit_p (bb_dead_regs, reg->regno))
869 {
870 bitmap_set_bit (&temp_bitmap, cid);
871 break;
872 }
68474cd7 873 /* Check regno for rematerialization. */
874 if (bitmap_bit_p (bb_changed_regs, cand->regno)
875 || bitmap_bit_p (bb_dead_regs, cand->regno))
876 bitmap_set_bit (&temp_bitmap, cid);
497ba60f 877 }
878 return bitmap_ior_and_compl (bb_out,
879 &bb_info->gen_cands, bb_in, &temp_bitmap);
880}
881
882\f
883
884/* The transfer function used by the DF equation solver to propagate
885 partial candidate availability info through block with BB_INDEX
886 according to the following equation:
887
888 bb.pavout = ((bb.pavin & bb.livein) - bb.killed) OR bb.gen
889*/
890static bool
891cand_pav_trans_fun (int bb_index)
892{
893 remat_bb_data_t bb_info;
894
895 bb_info = get_remat_bb_data_by_index (bb_index);
896 return cand_trans_fun (bb_index, &bb_info->pavin_cands,
897 &bb_info->pavout_cands);
898}
899
900/* The confluence function used by the DF equation solver to set up
901 cand_pav info for a block BB without predecessor. */
902static void
903cand_pav_con_fun_0 (basic_block bb)
904{
905 bitmap_clear (&get_remat_bb_data (bb)->pavin_cands);
906}
907
908/* The confluence function used by the DF equation solver to propagate
909 partial candidate availability info from predecessor to successor
910 on edge E (pred->bb) according to the following equation:
911
912 bb.pavin_cands = 0 for entry block | OR (pavout_cands of predecessors)
913 */
914static bool
915cand_pav_con_fun_n (edge e)
916{
917 basic_block pred = e->src;
918 basic_block bb = e->dest;
919 remat_bb_data_t bb_info;
920 bitmap bb_pavin, pred_pavout;
921
922 bb_info = get_remat_bb_data (bb);
923 bb_pavin = &bb_info->pavin_cands;
924 pred_pavout = &get_remat_bb_data (pred)->pavout_cands;
925 return bitmap_ior_into (bb_pavin, pred_pavout);
926}
927
928\f
929
930/* The transfer function used by the DF equation solver to propagate
931 candidate availability info through block with BB_INDEX according
932 to the following equation:
933
934 bb.avout = ((bb.avin & bb.livein) - bb.killed) OR bb.gen
935*/
936static bool
937cand_av_trans_fun (int bb_index)
938{
939 remat_bb_data_t bb_info;
940
941 bb_info = get_remat_bb_data_by_index (bb_index);
942 return cand_trans_fun (bb_index, &bb_info->avin_cands,
943 &bb_info->avout_cands);
944}
945
946/* The confluence function used by the DF equation solver to set up
947 cand_av info for a block BB without predecessor. */
948static void
949cand_av_con_fun_0 (basic_block bb)
950{
951 bitmap_clear (&get_remat_bb_data (bb)->avin_cands);
952}
953
954/* The confluence function used by the DF equation solver to propagate
955 cand_av info from predecessor to successor on edge E (pred->bb)
956 according to the following equation:
957
958 bb.avin_cands = 0 for entry block | AND (avout_cands of predecessors)
959 */
960static bool
961cand_av_con_fun_n (edge e)
962{
963 basic_block pred = e->src;
964 basic_block bb = e->dest;
965 remat_bb_data_t bb_info;
966 bitmap bb_avin, pred_avout;
967
968 bb_info = get_remat_bb_data (bb);
969 bb_avin = &bb_info->avin_cands;
970 pred_avout = &get_remat_bb_data (pred)->avout_cands;
971 return bitmap_and_into (bb_avin, pred_avout);
972}
973
974/* Calculate available candidates for each BB. */
975static void
976calculate_global_remat_bb_data (void)
977{
978 basic_block bb;
979
980 df_simple_dataflow
981 (DF_FORWARD, NULL, cand_pav_con_fun_0, cand_pav_con_fun_n,
982 cand_pav_trans_fun, &all_blocks,
983 df_get_postorder (DF_FORWARD), df_get_n_blocks (DF_FORWARD));
984 /* Initialize avin by pavin. */
985 FOR_EACH_BB_FN (bb, cfun)
986 bitmap_copy (&get_remat_bb_data (bb)->avin_cands,
987 &get_remat_bb_data (bb)->pavin_cands);
988 df_simple_dataflow
989 (DF_FORWARD, NULL, cand_av_con_fun_0, cand_av_con_fun_n,
990 cand_av_trans_fun, &all_blocks,
991 df_get_postorder (DF_FORWARD), df_get_n_blocks (DF_FORWARD));
992}
993
994\f
995
996/* Setup sp offset attribute to SP_OFFSET for all INSNS. */
997static void
a4686d0a 998change_sp_offset (rtx_insn *insns, poly_int64 sp_offset)
497ba60f 999{
1000 for (rtx_insn *insn = insns; insn != NULL; insn = NEXT_INSN (insn))
1001 eliminate_regs_in_insn (insn, false, false, sp_offset);
1002}
1003
1004/* Return start hard register of REG (can be a hard or a pseudo reg)
1005 or -1 (if it is a spilled pseudo). Return number of hard registers
1006 occupied by REG through parameter NREGS if the start hard reg is
1007 not negative. */
1008static int
1009get_hard_regs (struct lra_insn_reg *reg, int &nregs)
1010{
1011 int regno = reg->regno;
1012 int hard_regno = regno < FIRST_PSEUDO_REGISTER ? regno : reg_renumber[regno];
1013
1014 if (hard_regno >= 0)
92d2aec3 1015 nregs = hard_regno_nregs (hard_regno, reg->biggest_mode);
497ba60f 1016 return hard_regno;
1017}
1018
fb87313e 1019/* Make copy of and register scratch pseudos in rematerialized insn
1020 REMAT_INSN. */
1021static void
1022update_scratch_ops (rtx_insn *remat_insn)
1023{
1024 lra_insn_recog_data_t id = lra_get_insn_recog_data (remat_insn);
1025 struct lra_static_insn_data *static_id = id->insn_static_data;
1026 for (int i = 0; i < static_id->n_operands; i++)
1027 {
1028 rtx *loc = id->operand_loc[i];
1029 if (! REG_P (*loc))
1030 continue;
1031 int regno = REGNO (*loc);
1032 if (! lra_former_scratch_p (regno))
1033 continue;
1034 *loc = lra_create_new_reg (GET_MODE (*loc), *loc,
1035 lra_get_allocno_class (regno),
1036 "scratch pseudo copy");
95f61091 1037 lra_register_new_scratch_op (remat_insn, i, id->icode);
fb87313e 1038 }
1039
1040}
1041
497ba60f 1042/* Insert rematerialization insns using the data-flow data calculated
1043 earlier. */
1044static bool
1045do_remat (void)
1046{
0105a54e 1047 unsigned regno;
497ba60f 1048 rtx_insn *insn;
1049 basic_block bb;
497ba60f 1050 bool changed_p = false;
1051 /* Living hard regs and hard registers of living pseudos. */
1052 HARD_REG_SET live_hard_regs;
0105a54e 1053 bitmap_iterator bi;
497ba60f 1054
f6708c36 1055 auto_bitmap avail_cands (&reg_obstack);
1056 auto_bitmap active_cands (&reg_obstack);
497ba60f 1057 FOR_EACH_BB_FN (bb, cfun)
1058 {
0105a54e 1059 CLEAR_HARD_REG_SET (live_hard_regs);
1060 EXECUTE_IF_SET_IN_BITMAP (df_get_live_in (bb), 0, regno, bi)
1061 {
1062 int hard_regno = regno < FIRST_PSEUDO_REGISTER
1063 ? regno
1064 : reg_renumber[regno];
1065 if (hard_regno >= 0)
1066 SET_HARD_REG_BIT (live_hard_regs, hard_regno);
1067 }
f6708c36 1068 bitmap_and (avail_cands, &get_remat_bb_data (bb)->avin_cands,
497ba60f 1069 &get_remat_bb_data (bb)->livein_cands);
da259f51 1070 /* Activating insns are always in the same block as their corresponding
1071 remat insn, so at the start of a block the two bitsets are equal. */
f6708c36 1072 bitmap_copy (active_cands, avail_cands);
497ba60f 1073 FOR_BB_INSNS (bb, insn)
1074 {
1075 if (!NONDEBUG_INSN_P (insn))
1076 continue;
1077
1078 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
04472658 1079 struct lra_static_insn_data *static_id = id->insn_static_data;
497ba60f 1080 struct lra_insn_reg *reg;
1081 cand_t cand;
1082 unsigned int cid;
1083 bitmap_iterator bi;
1084 rtx set;
8b9740d5 1085 int iter;
497ba60f 1086 int src_regno = -1, dst_regno = -1;
1087
1088 if ((set = single_set (insn)) != NULL
1089 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)))
1090 {
1091 src_regno = REGNO (SET_SRC (set));
1092 dst_regno = REGNO (SET_DEST (set));
1093 }
1094
1095 cand = NULL;
1096 /* Check possibility of rematerialization (hard reg or
1097 unpsilled pseudo <- spilled pseudo): */
1098 if (dst_regno >= 0 && src_regno >= FIRST_PSEUDO_REGISTER
1099 && reg_renumber[src_regno] < 0
1100 && (dst_regno < FIRST_PSEUDO_REGISTER
1101 || reg_renumber[dst_regno] >= 0))
1102 {
1103 for (cand = regno_cands[src_regno];
1104 cand != NULL;
1105 cand = cand->next_regno_cand)
f6708c36 1106 if (bitmap_bit_p (avail_cands, cand->index)
1107 && bitmap_bit_p (active_cands, cand->index))
497ba60f 1108 break;
1109 }
1110 int i, hard_regno, nregs;
c42d7ef7 1111 int dst_hard_regno, dst_nregs;
497ba60f 1112 rtx_insn *remat_insn = NULL;
a4686d0a 1113 poly_int64 cand_sp_offset = 0;
497ba60f 1114 if (cand != NULL)
1115 {
04472658 1116 lra_insn_recog_data_t cand_id
1117 = lra_get_insn_recog_data (cand->insn);
1118 struct lra_static_insn_data *static_cand_id
1119 = cand_id->insn_static_data;
497ba60f 1120 rtx saved_op = *cand_id->operand_loc[cand->nop];
1121
1122 /* Check clobbers do not kill something living. */
1123 gcc_assert (REG_P (saved_op));
1124 int ignore_regno = REGNO (saved_op);
1125
c42d7ef7 1126 dst_hard_regno = dst_regno < FIRST_PSEUDO_REGISTER
1127 ? dst_regno : reg_renumber[dst_regno];
1128 gcc_assert (dst_hard_regno >= 0);
1129 machine_mode mode = GET_MODE (SET_DEST (set));
92d2aec3 1130 dst_nregs = hard_regno_nregs (dst_hard_regno, mode);
c42d7ef7 1131
497ba60f 1132 for (reg = cand_id->regs; reg != NULL; reg = reg->next)
1133 if (reg->type != OP_IN && reg->regno != ignore_regno)
1134 {
1135 hard_regno = get_hard_regs (reg, nregs);
1136 gcc_assert (hard_regno >= 0);
1137 for (i = 0; i < nregs; i++)
1138 if (TEST_HARD_REG_BIT (live_hard_regs, hard_regno + i))
1139 break;
1140 if (i < nregs)
1141 break;
c42d7ef7 1142 /* Ensure the clobber also doesn't overlap dst_regno. */
1143 if (hard_regno + nregs > dst_hard_regno
1144 && hard_regno < dst_hard_regno + dst_nregs)
1145 break;
497ba60f 1146 }
1147
04472658 1148 if (reg == NULL)
1149 {
1150 for (reg = static_cand_id->hard_regs;
1151 reg != NULL;
1152 reg = reg->next)
c42d7ef7 1153 if (reg->type != OP_IN)
1154 {
1155 if (TEST_HARD_REG_BIT (live_hard_regs, reg->regno))
1156 break;
1157 if (reg->regno >= dst_hard_regno
1158 && reg->regno < dst_hard_regno + dst_nregs)
1159 break;
1160 }
04472658 1161 }
1162
497ba60f 1163 if (reg == NULL)
1164 {
1165 *cand_id->operand_loc[cand->nop] = SET_DEST (set);
1166 lra_update_insn_regno_info (cand->insn);
1167 bool ok_p = lra_constrain_insn (cand->insn);
1168 if (ok_p)
1169 {
1170 rtx remat_pat = copy_insn (PATTERN (cand->insn));
1171
1172 start_sequence ();
1173 emit_insn (remat_pat);
1174 remat_insn = get_insns ();
1175 end_sequence ();
1176 if (recog_memoized (remat_insn) < 0)
1177 remat_insn = NULL;
1178 cand_sp_offset = cand_id->sp_offset;
1179 }
1180 *cand_id->operand_loc[cand->nop] = saved_op;
1181 lra_update_insn_regno_info (cand->insn);
1182 }
1183 }
1184
04472658 1185 bitmap_clear (&temp_bitmap);
497ba60f 1186 /* Update avail_cands (see analogous code for
1187 calculate_gen_cands). */
8b9740d5 1188 for (iter = 0; iter < 2; iter++)
1189 for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
1190 reg != NULL;
1191 reg = reg->next)
1192 if (reg->type != OP_IN
1193 || find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
f6708c36 1194 EXECUTE_IF_SET_IN_BITMAP (avail_cands, 0, cid, bi)
8b9740d5 1195 {
1196 cand = all_cands[cid];
1197
1198 /* Ignore the reload insn. */
1199 if (src_regno == cand->reload_regno
1200 && dst_regno == cand->regno)
1201 continue;
1202 if (cand->regno == reg->regno
27b2c1c4 1203 || reg_overlap_for_remat_p (reg, cand->insn))
8b9740d5 1204 bitmap_set_bit (&temp_bitmap, cand->index);
1205 }
497ba60f 1206
1207 if (CALL_P (insn))
f6708c36 1208 EXECUTE_IF_SET_IN_BITMAP (avail_cands, 0, cid, bi)
497ba60f 1209 {
1210 cand = all_cands[cid];
1211
1212 if (call_used_input_regno_present_p (cand->insn))
04472658 1213 bitmap_set_bit (&temp_bitmap, cand->index);
497ba60f 1214 }
1215
f6708c36 1216 bitmap_and_compl_into (avail_cands, &temp_bitmap);
da259f51 1217
1218 /* Now see whether a candidate is made active or available
1219 by this insn. */
1220 cand = insn_to_cand_activation[INSN_UID (insn)];
1221 if (cand)
f6708c36 1222 bitmap_set_bit (active_cands, cand->index);
da259f51 1223
1224 cand = insn_to_cand[INSN_UID (insn)];
1225 if (cand != NULL)
1226 {
f6708c36 1227 bitmap_set_bit (avail_cands, cand->index);
da259f51 1228 if (cand->reload_regno == -1)
f6708c36 1229 bitmap_set_bit (active_cands, cand->index);
da259f51 1230 else
f6708c36 1231 bitmap_clear_bit (active_cands, cand->index);
da259f51 1232 }
1233
497ba60f 1234 if (remat_insn != NULL)
1235 {
a4686d0a 1236 poly_int64 sp_offset_change = cand_sp_offset - id->sp_offset;
1237 if (maybe_ne (sp_offset_change, 0))
497ba60f 1238 change_sp_offset (remat_insn, sp_offset_change);
fb87313e 1239 update_scratch_ops (remat_insn);
497ba60f 1240 lra_process_new_insns (insn, remat_insn, NULL,
1241 "Inserting rematerialization insn");
1242 lra_set_insn_deleted (insn);
1243 changed_p = true;
1244 continue;
1245 }
1246
1247 /* Update live hard regs: */
1248 for (reg = id->regs; reg != NULL; reg = reg->next)
1249 if (reg->type == OP_IN
1250 && find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
1251 {
1252 if ((hard_regno = get_hard_regs (reg, nregs)) < 0)
1253 continue;
1254 for (i = 0; i < nregs; i++)
1255 CLEAR_HARD_REG_BIT (live_hard_regs, hard_regno + i);
1256 }
0c832c1c 1257 /* Process also hard regs (e.g. CC register) which are part
1258 of insn definition. */
1259 for (reg = static_id->hard_regs; reg != NULL; reg = reg->next)
1260 if (reg->type == OP_IN
1261 && find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
1262 CLEAR_HARD_REG_BIT (live_hard_regs, reg->regno);
1263 /* Inputs have been processed, now process outputs. */
1264 for (reg = id->regs; reg != NULL; reg = reg->next)
1265 if (reg->type != OP_IN
1266 && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
497ba60f 1267 {
1268 if ((hard_regno = get_hard_regs (reg, nregs)) < 0)
1269 continue;
1270 for (i = 0; i < nregs; i++)
1271 SET_HARD_REG_BIT (live_hard_regs, hard_regno + i);
1272 }
04472658 1273 for (reg = static_id->hard_regs; reg != NULL; reg = reg->next)
0c832c1c 1274 if (reg->type != OP_IN
1275 && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
04472658 1276 SET_HARD_REG_BIT (live_hard_regs, reg->regno);
497ba60f 1277 }
1278 }
497ba60f 1279 return changed_p;
1280}
1281
1282\f
1283
fa4f0b4e 1284/* Current number of rematerialization iteration. */
1285int lra_rematerialization_iter;
1286
497ba60f 1287/* Entry point of the rematerialization sub-pass. Return true if we
1288 did any rematerialization. */
1289bool
1290lra_remat (void)
1291{
1292 basic_block bb;
1293 bool result;
1294 int max_regno = max_reg_num ();
1295
1296 if (! flag_lra_remat)
1297 return false;
fa4f0b4e 1298 lra_rematerialization_iter++;
1299 if (lra_rematerialization_iter > LRA_MAX_REMATERIALIZATION_PASSES)
1300 return false;
1301 if (lra_dump_file != NULL)
1302 fprintf (lra_dump_file,
1303 "\n******** Rematerialization #%d: ********\n\n",
1304 lra_rematerialization_iter);
497ba60f 1305 timevar_push (TV_LRA_REMAT);
1306 insn_to_cand = XCNEWVEC (cand_t, get_max_uid ());
da259f51 1307 insn_to_cand_activation = XCNEWVEC (cand_t, get_max_uid ());
497ba60f 1308 regno_cands = XCNEWVEC (cand_t, max_regno);
1309 all_cands.create (8000);
1310 call_used_regs_arr_len = 0;
1311 for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1312 if (call_used_regs[i])
1313 call_used_regs_arr[call_used_regs_arr_len++] = i;
1314 initiate_cand_table ();
497ba60f 1315 create_remat_bb_data ();
1316 bitmap_initialize (&temp_bitmap, &reg_obstack);
fa6e6b15 1317 bitmap_initialize (&subreg_regs, &reg_obstack);
497ba60f 1318 calculate_local_reg_remat_bb_data ();
fa6e6b15 1319 create_cands ();
497ba60f 1320 calculate_livein_cands ();
1321 calculate_gen_cands ();
1322 bitmap_initialize (&all_blocks, &reg_obstack);
1323 FOR_ALL_BB_FN (bb, cfun)
1324 bitmap_set_bit (&all_blocks, bb->index);
1325 calculate_global_remat_bb_data ();
1326 dump_candidates_and_remat_bb_data ();
1327 result = do_remat ();
1328 all_cands.release ();
1329 bitmap_clear (&temp_bitmap);
fa6e6b15 1330 bitmap_clear (&subreg_regs);
497ba60f 1331 finish_remat_bb_data ();
1332 finish_cand_table ();
1333 bitmap_clear (&all_blocks);
1334 free (regno_cands);
1335 free (insn_to_cand);
da259f51 1336 free (insn_to_cand_activation);
497ba60f 1337 timevar_pop (TV_LRA_REMAT);
1338 return result;
1339}