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610d2478 | 1 | /* CPU mode switching |
6fb5fa3c | 2 | Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007 |
610d2478 SB |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING. If not, write to the Free | |
366ccddb KC |
19 | Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
610d2478 SB |
21 | |
22 | #include "config.h" | |
23 | #include "system.h" | |
24 | #include "coretypes.h" | |
25 | #include "tm.h" | |
26 | #include "rtl.h" | |
27 | #include "regs.h" | |
28 | #include "hard-reg-set.h" | |
29 | #include "flags.h" | |
30 | #include "real.h" | |
31 | #include "insn-config.h" | |
32 | #include "recog.h" | |
33 | #include "basic-block.h" | |
34 | #include "output.h" | |
35 | #include "tm_p.h" | |
36 | #include "function.h" | |
ef330312 PB |
37 | #include "tree-pass.h" |
38 | #include "timevar.h" | |
6fb5fa3c | 39 | #include "df.h" |
610d2478 SB |
40 | |
41 | /* We want target macros for the mode switching code to be able to refer | |
42 | to instruction attribute values. */ | |
43 | #include "insn-attr.h" | |
44 | ||
45 | #ifdef OPTIMIZE_MODE_SWITCHING | |
46 | ||
47 | /* The algorithm for setting the modes consists of scanning the insn list | |
48 | and finding all the insns which require a specific mode. Each insn gets | |
49 | a unique struct seginfo element. These structures are inserted into a list | |
50 | for each basic block. For each entity, there is an array of bb_info over | |
51 | the flow graph basic blocks (local var 'bb_info'), and contains a list | |
52 | of all insns within that basic block, in the order they are encountered. | |
53 | ||
54 | For each entity, any basic block WITHOUT any insns requiring a specific | |
55 | mode are given a single entry, without a mode. (Each basic block | |
56 | in the flow graph must have at least one entry in the segment table.) | |
57 | ||
58 | The LCM algorithm is then run over the flow graph to determine where to | |
59 | place the sets to the highest-priority value in respect of first the first | |
60 | insn in any one block. Any adjustments required to the transparency | |
61 | vectors are made, then the next iteration starts for the next-lower | |
62 | priority mode, till for each entity all modes are exhausted. | |
63 | ||
64 | More details are located in the code for optimize_mode_switching(). */ | |
65 | \f | |
66 | /* This structure contains the information for each insn which requires | |
67 | either single or double mode to be set. | |
68 | MODE is the mode this insn must be executed in. | |
69 | INSN_PTR is the insn to be executed (may be the note that marks the | |
70 | beginning of a basic block). | |
71 | BBNUM is the flow graph basic block this insn occurs in. | |
72 | NEXT is the next insn in the same basic block. */ | |
73 | struct seginfo | |
74 | { | |
75 | int mode; | |
76 | rtx insn_ptr; | |
77 | int bbnum; | |
78 | struct seginfo *next; | |
79 | HARD_REG_SET regs_live; | |
80 | }; | |
81 | ||
82 | struct bb_info | |
83 | { | |
84 | struct seginfo *seginfo; | |
85 | int computing; | |
86 | }; | |
87 | ||
88 | /* These bitmaps are used for the LCM algorithm. */ | |
89 | ||
90 | static sbitmap *antic; | |
91 | static sbitmap *transp; | |
92 | static sbitmap *comp; | |
93 | ||
94 | static struct seginfo * new_seginfo (int, rtx, int, HARD_REG_SET); | |
95 | static void add_seginfo (struct bb_info *, struct seginfo *); | |
408bed3c | 96 | static void reg_dies (rtx, HARD_REG_SET *); |
610d2478 SB |
97 | static void reg_becomes_live (rtx, rtx, void *); |
98 | static void make_preds_opaque (basic_block, int); | |
99 | \f | |
100 | ||
101 | /* This function will allocate a new BBINFO structure, initialized | |
102 | with the MODE, INSN, and basic block BB parameters. */ | |
103 | ||
104 | static struct seginfo * | |
105 | new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live) | |
106 | { | |
107 | struct seginfo *ptr; | |
5ed6ace5 | 108 | ptr = XNEW (struct seginfo); |
610d2478 SB |
109 | ptr->mode = mode; |
110 | ptr->insn_ptr = insn; | |
111 | ptr->bbnum = bb; | |
112 | ptr->next = NULL; | |
113 | COPY_HARD_REG_SET (ptr->regs_live, regs_live); | |
114 | return ptr; | |
115 | } | |
116 | ||
117 | /* Add a seginfo element to the end of a list. | |
118 | HEAD is a pointer to the list beginning. | |
119 | INFO is the structure to be linked in. */ | |
120 | ||
121 | static void | |
122 | add_seginfo (struct bb_info *head, struct seginfo *info) | |
123 | { | |
124 | struct seginfo *ptr; | |
125 | ||
126 | if (head->seginfo == NULL) | |
127 | head->seginfo = info; | |
128 | else | |
129 | { | |
130 | ptr = head->seginfo; | |
131 | while (ptr->next != NULL) | |
132 | ptr = ptr->next; | |
133 | ptr->next = info; | |
134 | } | |
135 | } | |
136 | ||
137 | /* Make all predecessors of basic block B opaque, recursively, till we hit | |
138 | some that are already non-transparent, or an edge where aux is set; that | |
139 | denotes that a mode set is to be done on that edge. | |
140 | J is the bit number in the bitmaps that corresponds to the entity that | |
141 | we are currently handling mode-switching for. */ | |
142 | ||
143 | static void | |
144 | make_preds_opaque (basic_block b, int j) | |
145 | { | |
146 | edge e; | |
147 | edge_iterator ei; | |
148 | ||
149 | FOR_EACH_EDGE (e, ei, b->preds) | |
150 | { | |
151 | basic_block pb = e->src; | |
152 | ||
153 | if (e->aux || ! TEST_BIT (transp[pb->index], j)) | |
154 | continue; | |
155 | ||
156 | RESET_BIT (transp[pb->index], j); | |
157 | make_preds_opaque (pb, j); | |
158 | } | |
159 | } | |
160 | ||
161 | /* Record in LIVE that register REG died. */ | |
162 | ||
163 | static void | |
408bed3c | 164 | reg_dies (rtx reg, HARD_REG_SET *live) |
610d2478 | 165 | { |
09e18274 | 166 | int regno; |
610d2478 SB |
167 | |
168 | if (!REG_P (reg)) | |
169 | return; | |
170 | ||
171 | regno = REGNO (reg); | |
172 | if (regno < FIRST_PSEUDO_REGISTER) | |
09e18274 | 173 | remove_from_hard_reg_set (live, GET_MODE (reg), regno); |
610d2478 SB |
174 | } |
175 | ||
176 | /* Record in LIVE that register REG became live. | |
177 | This is called via note_stores. */ | |
178 | ||
179 | static void | |
180 | reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *live) | |
181 | { | |
09e18274 | 182 | int regno; |
610d2478 SB |
183 | |
184 | if (GET_CODE (reg) == SUBREG) | |
185 | reg = SUBREG_REG (reg); | |
186 | ||
187 | if (!REG_P (reg)) | |
188 | return; | |
189 | ||
190 | regno = REGNO (reg); | |
191 | if (regno < FIRST_PSEUDO_REGISTER) | |
09e18274 | 192 | add_to_hard_reg_set ((HARD_REG_SET *) live, GET_MODE (reg), regno); |
610d2478 SB |
193 | } |
194 | ||
195 | /* Make sure if MODE_ENTRY is defined the MODE_EXIT is defined | |
196 | and vice versa. */ | |
197 | #if defined (MODE_ENTRY) != defined (MODE_EXIT) | |
198 | #error "Both MODE_ENTRY and MODE_EXIT must be defined" | |
199 | #endif | |
200 | ||
201 | #if defined (MODE_ENTRY) && defined (MODE_EXIT) | |
202 | /* Split the fallthrough edge to the exit block, so that we can note | |
203 | that there NORMAL_MODE is required. Return the new block if it's | |
204 | inserted before the exit block. Otherwise return null. */ | |
205 | ||
206 | static basic_block | |
207 | create_pre_exit (int n_entities, int *entity_map, const int *num_modes) | |
208 | { | |
209 | edge eg; | |
210 | edge_iterator ei; | |
211 | basic_block pre_exit; | |
212 | ||
213 | /* The only non-call predecessor at this stage is a block with a | |
214 | fallthrough edge; there can be at most one, but there could be | |
215 | none at all, e.g. when exit is called. */ | |
216 | pre_exit = 0; | |
217 | FOR_EACH_EDGE (eg, ei, EXIT_BLOCK_PTR->preds) | |
218 | if (eg->flags & EDGE_FALLTHRU) | |
219 | { | |
220 | basic_block src_bb = eg->src; | |
610d2478 SB |
221 | rtx last_insn, ret_reg; |
222 | ||
223 | gcc_assert (!pre_exit); | |
224 | /* If this function returns a value at the end, we have to | |
225 | insert the final mode switch before the return value copy | |
226 | to its hard register. */ | |
227 | if (EDGE_COUNT (EXIT_BLOCK_PTR->preds) == 1 | |
228 | && NONJUMP_INSN_P ((last_insn = BB_END (src_bb))) | |
229 | && GET_CODE (PATTERN (last_insn)) == USE | |
230 | && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG) | |
231 | { | |
232 | int ret_start = REGNO (ret_reg); | |
233 | int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)]; | |
234 | int ret_end = ret_start + nregs; | |
235 | int short_block = 0; | |
236 | int maybe_builtin_apply = 0; | |
237 | int forced_late_switch = 0; | |
238 | rtx before_return_copy; | |
239 | ||
240 | do | |
241 | { | |
242 | rtx return_copy = PREV_INSN (last_insn); | |
243 | rtx return_copy_pat, copy_reg; | |
244 | int copy_start, copy_num; | |
245 | int j; | |
246 | ||
247 | if (INSN_P (return_copy)) | |
248 | { | |
89ab4659 KK |
249 | return_copy_pat = PATTERN (return_copy); |
250 | switch (GET_CODE (return_copy_pat)) | |
07288ab0 | 251 | { |
89ab4659 KK |
252 | case USE: |
253 | /* Skip __builtin_apply pattern. */ | |
254 | if (GET_CODE (XEXP (return_copy_pat, 0)) == REG | |
255 | && (FUNCTION_VALUE_REGNO_P | |
256 | (REGNO (XEXP (return_copy_pat, 0))))) | |
257 | { | |
258 | maybe_builtin_apply = 1; | |
259 | last_insn = return_copy; | |
260 | continue; | |
261 | } | |
262 | break; | |
263 | ||
264 | case ASM_OPERANDS: | |
265 | /* Skip barrier insns. */ | |
266 | if (!MEM_VOLATILE_P (return_copy_pat)) | |
267 | break; | |
268 | ||
269 | /* Fall through. */ | |
270 | ||
271 | case ASM_INPUT: | |
272 | case UNSPEC_VOLATILE: | |
07288ab0 KK |
273 | last_insn = return_copy; |
274 | continue; | |
89ab4659 KK |
275 | |
276 | default: | |
277 | break; | |
07288ab0 | 278 | } |
89ab4659 | 279 | |
610d2478 SB |
280 | /* If the return register is not (in its entirety) |
281 | likely spilled, the return copy might be | |
282 | partially or completely optimized away. */ | |
283 | return_copy_pat = single_set (return_copy); | |
284 | if (!return_copy_pat) | |
285 | { | |
286 | return_copy_pat = PATTERN (return_copy); | |
287 | if (GET_CODE (return_copy_pat) != CLOBBER) | |
288 | break; | |
6fb5fa3c DB |
289 | else if (!optimize) |
290 | { | |
291 | /* This might be (clobber (reg [<result>])) | |
292 | when not optimizing. Then check if | |
293 | the previous insn is the clobber for | |
294 | the return register. */ | |
295 | copy_reg = SET_DEST (return_copy_pat); | |
296 | if (GET_CODE (copy_reg) == REG | |
297 | && !HARD_REGISTER_NUM_P (REGNO (copy_reg))) | |
298 | { | |
299 | if (INSN_P (PREV_INSN (return_copy))) | |
300 | { | |
301 | return_copy = PREV_INSN (return_copy); | |
302 | return_copy_pat = PATTERN (return_copy); | |
303 | if (GET_CODE (return_copy_pat) != CLOBBER) | |
304 | break; | |
305 | } | |
306 | } | |
307 | } | |
610d2478 SB |
308 | } |
309 | copy_reg = SET_DEST (return_copy_pat); | |
310 | if (GET_CODE (copy_reg) == REG) | |
311 | copy_start = REGNO (copy_reg); | |
312 | else if (GET_CODE (copy_reg) == SUBREG | |
313 | && GET_CODE (SUBREG_REG (copy_reg)) == REG) | |
314 | copy_start = REGNO (SUBREG_REG (copy_reg)); | |
315 | else | |
316 | break; | |
317 | if (copy_start >= FIRST_PSEUDO_REGISTER) | |
318 | break; | |
319 | copy_num | |
320 | = hard_regno_nregs[copy_start][GET_MODE (copy_reg)]; | |
321 | ||
322 | /* If the return register is not likely spilled, - as is | |
323 | the case for floating point on SH4 - then it might | |
324 | be set by an arithmetic operation that needs a | |
325 | different mode than the exit block. */ | |
326 | for (j = n_entities - 1; j >= 0; j--) | |
327 | { | |
328 | int e = entity_map[j]; | |
329 | int mode = MODE_NEEDED (e, return_copy); | |
330 | ||
331 | if (mode != num_modes[e] && mode != MODE_EXIT (e)) | |
332 | break; | |
333 | } | |
334 | if (j >= 0) | |
335 | { | |
336 | /* For the SH4, floating point loads depend on fpscr, | |
337 | thus we might need to put the final mode switch | |
338 | after the return value copy. That is still OK, | |
339 | because a floating point return value does not | |
340 | conflict with address reloads. */ | |
341 | if (copy_start >= ret_start | |
342 | && copy_start + copy_num <= ret_end | |
343 | && OBJECT_P (SET_SRC (return_copy_pat))) | |
344 | forced_late_switch = 1; | |
345 | break; | |
346 | } | |
347 | ||
348 | if (copy_start >= ret_start | |
349 | && copy_start + copy_num <= ret_end) | |
350 | nregs -= copy_num; | |
351 | else if (!maybe_builtin_apply | |
352 | || !FUNCTION_VALUE_REGNO_P (copy_start)) | |
353 | break; | |
354 | last_insn = return_copy; | |
355 | } | |
356 | /* ??? Exception handling can lead to the return value | |
357 | copy being already separated from the return value use, | |
358 | as in unwind-dw2.c . | |
359 | Similarly, conditionally returning without a value, | |
360 | and conditionally using builtin_return can lead to an | |
361 | isolated use. */ | |
362 | if (return_copy == BB_HEAD (src_bb)) | |
363 | { | |
364 | short_block = 1; | |
365 | break; | |
366 | } | |
367 | last_insn = return_copy; | |
368 | } | |
369 | while (nregs); | |
370 | ||
371 | /* If we didn't see a full return value copy, verify that there | |
372 | is a plausible reason for this. If some, but not all of the | |
373 | return register is likely spilled, we can expect that there | |
374 | is a copy for the likely spilled part. */ | |
375 | gcc_assert (!nregs | |
376 | || forced_late_switch | |
377 | || short_block | |
378 | || !(CLASS_LIKELY_SPILLED_P | |
379 | (REGNO_REG_CLASS (ret_start))) | |
380 | || (nregs | |
381 | != hard_regno_nregs[ret_start][GET_MODE (ret_reg)]) | |
382 | /* For multi-hard-register floating point | |
383 | values, sometimes the likely-spilled part | |
384 | is ordinarily copied first, then the other | |
385 | part is set with an arithmetic operation. | |
386 | This doesn't actually cause reload | |
387 | failures, so let it pass. */ | |
388 | || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT | |
389 | && nregs != 1)); | |
390 | ||
391 | if (INSN_P (last_insn)) | |
392 | { | |
393 | before_return_copy | |
394 | = emit_note_before (NOTE_INSN_DELETED, last_insn); | |
395 | /* Instructions preceding LAST_INSN in the same block might | |
396 | require a different mode than MODE_EXIT, so if we might | |
397 | have such instructions, keep them in a separate block | |
398 | from pre_exit. */ | |
399 | if (last_insn != BB_HEAD (src_bb)) | |
400 | src_bb = split_block (src_bb, | |
401 | PREV_INSN (before_return_copy))->dest; | |
402 | } | |
403 | else | |
404 | before_return_copy = last_insn; | |
405 | pre_exit = split_block (src_bb, before_return_copy)->src; | |
406 | } | |
407 | else | |
408 | { | |
409 | pre_exit = split_edge (eg); | |
610d2478 SB |
410 | } |
411 | } | |
412 | ||
413 | return pre_exit; | |
414 | } | |
415 | #endif | |
416 | ||
417 | /* Find all insns that need a particular mode setting, and insert the | |
418 | necessary mode switches. Return true if we did work. */ | |
419 | ||
7399bcb0 | 420 | static int |
10d22567 | 421 | optimize_mode_switching (void) |
610d2478 SB |
422 | { |
423 | rtx insn; | |
424 | int e; | |
425 | basic_block bb; | |
426 | int need_commit = 0; | |
427 | sbitmap *kill; | |
428 | struct edge_list *edge_list; | |
429 | static const int num_modes[] = NUM_MODES_FOR_MODE_SWITCHING; | |
430 | #define N_ENTITIES ARRAY_SIZE (num_modes) | |
431 | int entity_map[N_ENTITIES]; | |
432 | struct bb_info *bb_info[N_ENTITIES]; | |
433 | int i, j; | |
434 | int n_entities; | |
435 | int max_num_modes = 0; | |
436 | bool emited = false; | |
437 | basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED; | |
438 | ||
610d2478 SB |
439 | for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--) |
440 | if (OPTIMIZE_MODE_SWITCHING (e)) | |
441 | { | |
442 | int entry_exit_extra = 0; | |
443 | ||
444 | /* Create the list of segments within each basic block. | |
445 | If NORMAL_MODE is defined, allow for two extra | |
446 | blocks split from the entry and exit block. */ | |
447 | #if defined (MODE_ENTRY) && defined (MODE_EXIT) | |
448 | entry_exit_extra = 3; | |
449 | #endif | |
450 | bb_info[n_entities] | |
60ec1aa4 | 451 | = XCNEWVEC (struct bb_info, last_basic_block + entry_exit_extra); |
610d2478 SB |
452 | entity_map[n_entities++] = e; |
453 | if (num_modes[e] > max_num_modes) | |
454 | max_num_modes = num_modes[e]; | |
455 | } | |
456 | ||
457 | if (! n_entities) | |
458 | return 0; | |
459 | ||
460 | #if defined (MODE_ENTRY) && defined (MODE_EXIT) | |
461 | /* Split the edge from the entry block, so that we can note that | |
462 | there NORMAL_MODE is supplied. */ | |
463 | post_entry = split_edge (single_succ_edge (ENTRY_BLOCK_PTR)); | |
464 | pre_exit = create_pre_exit (n_entities, entity_map, num_modes); | |
465 | #endif | |
466 | ||
6fb5fa3c DB |
467 | df_analyze (); |
468 | ||
610d2478 SB |
469 | /* Create the bitmap vectors. */ |
470 | ||
471 | antic = sbitmap_vector_alloc (last_basic_block, n_entities); | |
472 | transp = sbitmap_vector_alloc (last_basic_block, n_entities); | |
473 | comp = sbitmap_vector_alloc (last_basic_block, n_entities); | |
474 | ||
475 | sbitmap_vector_ones (transp, last_basic_block); | |
476 | ||
477 | for (j = n_entities - 1; j >= 0; j--) | |
478 | { | |
479 | int e = entity_map[j]; | |
480 | int no_mode = num_modes[e]; | |
481 | struct bb_info *info = bb_info[j]; | |
482 | ||
483 | /* Determine what the first use (if any) need for a mode of entity E is. | |
484 | This will be the mode that is anticipatable for this block. | |
485 | Also compute the initial transparency settings. */ | |
486 | FOR_EACH_BB (bb) | |
487 | { | |
488 | struct seginfo *ptr; | |
489 | int last_mode = no_mode; | |
490 | HARD_REG_SET live_now; | |
491 | ||
6fb5fa3c | 492 | REG_SET_TO_HARD_REG_SET (live_now, df_get_live_in (bb)); |
24c2fde2 RH |
493 | |
494 | /* Pretend the mode is clobbered across abnormal edges. */ | |
495 | { | |
496 | edge_iterator ei; | |
497 | edge e; | |
498 | FOR_EACH_EDGE (e, ei, bb->preds) | |
499 | if (e->flags & EDGE_COMPLEX) | |
500 | break; | |
501 | if (e) | |
650a59ef R |
502 | { |
503 | ptr = new_seginfo (no_mode, BB_HEAD (bb), bb->index, live_now); | |
504 | add_seginfo (info + bb->index, ptr); | |
505 | RESET_BIT (transp[bb->index], j); | |
506 | } | |
24c2fde2 RH |
507 | } |
508 | ||
610d2478 SB |
509 | for (insn = BB_HEAD (bb); |
510 | insn != NULL && insn != NEXT_INSN (BB_END (bb)); | |
511 | insn = NEXT_INSN (insn)) | |
512 | { | |
513 | if (INSN_P (insn)) | |
514 | { | |
515 | int mode = MODE_NEEDED (e, insn); | |
516 | rtx link; | |
517 | ||
518 | if (mode != no_mode && mode != last_mode) | |
519 | { | |
520 | last_mode = mode; | |
521 | ptr = new_seginfo (mode, insn, bb->index, live_now); | |
522 | add_seginfo (info + bb->index, ptr); | |
523 | RESET_BIT (transp[bb->index], j); | |
524 | } | |
525 | #ifdef MODE_AFTER | |
526 | last_mode = MODE_AFTER (last_mode, insn); | |
527 | #endif | |
528 | /* Update LIVE_NOW. */ | |
529 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
530 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
408bed3c | 531 | reg_dies (XEXP (link, 0), &live_now); |
610d2478 SB |
532 | |
533 | note_stores (PATTERN (insn), reg_becomes_live, &live_now); | |
534 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
535 | if (REG_NOTE_KIND (link) == REG_UNUSED) | |
408bed3c | 536 | reg_dies (XEXP (link, 0), &live_now); |
610d2478 SB |
537 | } |
538 | } | |
539 | ||
540 | info[bb->index].computing = last_mode; | |
541 | /* Check for blocks without ANY mode requirements. */ | |
542 | if (last_mode == no_mode) | |
543 | { | |
544 | ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now); | |
545 | add_seginfo (info + bb->index, ptr); | |
546 | } | |
547 | } | |
548 | #if defined (MODE_ENTRY) && defined (MODE_EXIT) | |
549 | { | |
550 | int mode = MODE_ENTRY (e); | |
551 | ||
552 | if (mode != no_mode) | |
553 | { | |
554 | bb = post_entry; | |
555 | ||
556 | /* By always making this nontransparent, we save | |
557 | an extra check in make_preds_opaque. We also | |
558 | need this to avoid confusing pre_edge_lcm when | |
559 | antic is cleared but transp and comp are set. */ | |
560 | RESET_BIT (transp[bb->index], j); | |
561 | ||
562 | /* Insert a fake computing definition of MODE into entry | |
563 | blocks which compute no mode. This represents the mode on | |
564 | entry. */ | |
565 | info[bb->index].computing = mode; | |
566 | ||
567 | if (pre_exit) | |
568 | info[pre_exit->index].seginfo->mode = MODE_EXIT (e); | |
569 | } | |
570 | } | |
571 | #endif /* NORMAL_MODE */ | |
572 | } | |
573 | ||
574 | kill = sbitmap_vector_alloc (last_basic_block, n_entities); | |
575 | for (i = 0; i < max_num_modes; i++) | |
576 | { | |
577 | int current_mode[N_ENTITIES]; | |
578 | sbitmap *delete; | |
579 | sbitmap *insert; | |
580 | ||
581 | /* Set the anticipatable and computing arrays. */ | |
582 | sbitmap_vector_zero (antic, last_basic_block); | |
583 | sbitmap_vector_zero (comp, last_basic_block); | |
584 | for (j = n_entities - 1; j >= 0; j--) | |
585 | { | |
586 | int m = current_mode[j] = MODE_PRIORITY_TO_MODE (entity_map[j], i); | |
587 | struct bb_info *info = bb_info[j]; | |
588 | ||
589 | FOR_EACH_BB (bb) | |
590 | { | |
591 | if (info[bb->index].seginfo->mode == m) | |
592 | SET_BIT (antic[bb->index], j); | |
593 | ||
594 | if (info[bb->index].computing == m) | |
595 | SET_BIT (comp[bb->index], j); | |
596 | } | |
597 | } | |
598 | ||
599 | /* Calculate the optimal locations for the | |
600 | placement mode switches to modes with priority I. */ | |
601 | ||
602 | FOR_EACH_BB (bb) | |
603 | sbitmap_not (kill[bb->index], transp[bb->index]); | |
10d22567 | 604 | edge_list = pre_edge_lcm (n_entities, transp, comp, antic, |
610d2478 SB |
605 | kill, &insert, &delete); |
606 | ||
607 | for (j = n_entities - 1; j >= 0; j--) | |
608 | { | |
609 | /* Insert all mode sets that have been inserted by lcm. */ | |
610 | int no_mode = num_modes[entity_map[j]]; | |
611 | ||
612 | /* Wherever we have moved a mode setting upwards in the flow graph, | |
613 | the blocks between the new setting site and the now redundant | |
614 | computation ceases to be transparent for any lower-priority | |
615 | mode of the same entity. First set the aux field of each | |
616 | insertion site edge non-transparent, then propagate the new | |
617 | non-transparency from the redundant computation upwards till | |
618 | we hit an insertion site or an already non-transparent block. */ | |
619 | for (e = NUM_EDGES (edge_list) - 1; e >= 0; e--) | |
620 | { | |
621 | edge eg = INDEX_EDGE (edge_list, e); | |
622 | int mode; | |
623 | basic_block src_bb; | |
624 | HARD_REG_SET live_at_edge; | |
625 | rtx mode_set; | |
626 | ||
627 | eg->aux = 0; | |
628 | ||
629 | if (! TEST_BIT (insert[e], j)) | |
630 | continue; | |
631 | ||
632 | eg->aux = (void *)1; | |
633 | ||
634 | mode = current_mode[j]; | |
635 | src_bb = eg->src; | |
636 | ||
6fb5fa3c | 637 | REG_SET_TO_HARD_REG_SET (live_at_edge, df_get_live_out (src_bb)); |
610d2478 SB |
638 | |
639 | start_sequence (); | |
640 | EMIT_MODE_SET (entity_map[j], mode, live_at_edge); | |
641 | mode_set = get_insns (); | |
642 | end_sequence (); | |
643 | ||
644 | /* Do not bother to insert empty sequence. */ | |
645 | if (mode_set == NULL_RTX) | |
646 | continue; | |
647 | ||
650a59ef R |
648 | /* We should not get an abnormal edge here. */ |
649 | gcc_assert (! (eg->flags & EDGE_ABNORMAL)); | |
650 | ||
651 | need_commit = 1; | |
652 | insert_insn_on_edge (mode_set, eg); | |
610d2478 SB |
653 | } |
654 | ||
655 | FOR_EACH_BB_REVERSE (bb) | |
656 | if (TEST_BIT (delete[bb->index], j)) | |
657 | { | |
658 | make_preds_opaque (bb, j); | |
659 | /* Cancel the 'deleted' mode set. */ | |
660 | bb_info[j][bb->index].seginfo->mode = no_mode; | |
661 | } | |
662 | } | |
663 | ||
664 | sbitmap_vector_free (delete); | |
665 | sbitmap_vector_free (insert); | |
666 | clear_aux_for_edges (); | |
667 | free_edge_list (edge_list); | |
668 | } | |
669 | ||
670 | /* Now output the remaining mode sets in all the segments. */ | |
671 | for (j = n_entities - 1; j >= 0; j--) | |
672 | { | |
673 | int no_mode = num_modes[entity_map[j]]; | |
674 | ||
675 | FOR_EACH_BB_REVERSE (bb) | |
676 | { | |
677 | struct seginfo *ptr, *next; | |
678 | for (ptr = bb_info[j][bb->index].seginfo; ptr; ptr = next) | |
679 | { | |
680 | next = ptr->next; | |
681 | if (ptr->mode != no_mode) | |
682 | { | |
683 | rtx mode_set; | |
684 | ||
685 | start_sequence (); | |
686 | EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live); | |
687 | mode_set = get_insns (); | |
688 | end_sequence (); | |
689 | ||
690 | /* Insert MODE_SET only if it is nonempty. */ | |
691 | if (mode_set != NULL_RTX) | |
692 | { | |
693 | emited = true; | |
a38e7aa5 | 694 | if (NOTE_INSN_BASIC_BLOCK_P (ptr->insn_ptr)) |
610d2478 SB |
695 | emit_insn_after (mode_set, ptr->insn_ptr); |
696 | else | |
697 | emit_insn_before (mode_set, ptr->insn_ptr); | |
698 | } | |
699 | } | |
700 | ||
701 | free (ptr); | |
702 | } | |
703 | } | |
704 | ||
705 | free (bb_info[j]); | |
706 | } | |
707 | ||
708 | /* Finished. Free up all the things we've allocated. */ | |
610d2478 SB |
709 | sbitmap_vector_free (kill); |
710 | sbitmap_vector_free (antic); | |
711 | sbitmap_vector_free (transp); | |
712 | sbitmap_vector_free (comp); | |
713 | ||
714 | if (need_commit) | |
715 | commit_edge_insertions (); | |
716 | ||
717 | #if defined (MODE_ENTRY) && defined (MODE_EXIT) | |
718 | cleanup_cfg (CLEANUP_NO_INSN_DEL); | |
719 | #else | |
720 | if (!need_commit && !emited) | |
721 | return 0; | |
722 | #endif | |
723 | ||
610d2478 SB |
724 | return 1; |
725 | } | |
ef330312 | 726 | |
610d2478 | 727 | #endif /* OPTIMIZE_MODE_SWITCHING */ |
ef330312 PB |
728 | \f |
729 | static bool | |
730 | gate_mode_switching (void) | |
731 | { | |
732 | #ifdef OPTIMIZE_MODE_SWITCHING | |
733 | return true; | |
734 | #else | |
735 | return false; | |
736 | #endif | |
737 | } | |
738 | ||
c2924966 | 739 | static unsigned int |
ef330312 PB |
740 | rest_of_handle_mode_switching (void) |
741 | { | |
742 | #ifdef OPTIMIZE_MODE_SWITCHING | |
10d22567 | 743 | optimize_mode_switching (); |
ef330312 | 744 | #endif /* OPTIMIZE_MODE_SWITCHING */ |
c2924966 | 745 | return 0; |
ef330312 PB |
746 | } |
747 | ||
748 | ||
749 | struct tree_opt_pass pass_mode_switching = | |
750 | { | |
defb77dc | 751 | "mode-sw", /* name */ |
ef330312 PB |
752 | gate_mode_switching, /* gate */ |
753 | rest_of_handle_mode_switching, /* execute */ | |
754 | NULL, /* sub */ | |
755 | NULL, /* next */ | |
756 | 0, /* static_pass_number */ | |
757 | TV_MODE_SWITCH, /* tv_id */ | |
758 | 0, /* properties_required */ | |
759 | 0, /* properties_provided */ | |
760 | 0, /* properties_destroyed */ | |
761 | 0, /* todo_flags_start */ | |
6fb5fa3c | 762 | TODO_df_finish | |
defb77dc | 763 | TODO_dump_func, /* todo_flags_finish */ |
ef330312 PB |
764 | 0 /* letter */ |
765 | }; |