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5b6269ed | 1 | /* Swing Modulo Scheduling implementation. |
56134a9f | 2 | Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
5b6269ed | 3 | Free Software Foundation, Inc. |
4 | Contributed by Ayal Zaks and Mustafa Hagog <zaks,mustafa@il.ibm.com> | |
5 | ||
6 | This file is part of GCC. | |
7 | ||
8 | GCC is free software; you can redistribute it and/or modify it under | |
9 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 10 | Software Foundation; either version 3, or (at your option) any later |
5b6269ed | 11 | version. |
12 | ||
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 19 | along with GCC; see the file COPYING3. If not see |
20 | <http://www.gnu.org/licenses/>. */ | |
5b6269ed | 21 | |
22 | ||
23 | #include "config.h" | |
24 | #include "system.h" | |
25 | #include "coretypes.h" | |
26 | #include "tm.h" | |
0b205f4c | 27 | #include "diagnostic-core.h" |
5b6269ed | 28 | #include "rtl.h" |
29 | #include "tm_p.h" | |
30 | #include "hard-reg-set.h" | |
5b6269ed | 31 | #include "regs.h" |
32 | #include "function.h" | |
33 | #include "flags.h" | |
34 | #include "insn-config.h" | |
35 | #include "insn-attr.h" | |
36 | #include "except.h" | |
5b6269ed | 37 | #include "recog.h" |
38 | #include "sched-int.h" | |
39 | #include "target.h" | |
5b6269ed | 40 | #include "cfgloop.h" |
5b6269ed | 41 | #include "expr.h" |
42 | #include "params.h" | |
43 | #include "gcov-io.h" | |
5b6269ed | 44 | #include "ddg.h" |
77fce4cd | 45 | #include "tree-pass.h" |
76aaf9f0 | 46 | #include "dbgcnt.h" |
0f71a633 | 47 | #include "df.h" |
5b6269ed | 48 | |
07cba988 | 49 | #ifdef INSN_SCHEDULING |
5b6269ed | 50 | |
51 | /* This file contains the implementation of the Swing Modulo Scheduler, | |
52 | described in the following references: | |
53 | [1] J. Llosa, A. Gonzalez, E. Ayguade, M. Valero., and J. Eckhardt. | |
54 | Lifetime--sensitive modulo scheduling in a production environment. | |
55 | IEEE Trans. on Comps., 50(3), March 2001 | |
56 | [2] J. Llosa, A. Gonzalez, E. Ayguade, and M. Valero. | |
57 | Swing Modulo Scheduling: A Lifetime Sensitive Approach. | |
365db11e | 58 | PACT '96 , pages 80-87, October 1996 (Boston - Massachusetts - USA). |
5b6269ed | 59 | |
60 | The basic structure is: | |
61 | 1. Build a data-dependence graph (DDG) for each loop. | |
62 | 2. Use the DDG to order the insns of a loop (not in topological order | |
63 | necessarily, but rather) trying to place each insn after all its | |
64 | predecessors _or_ after all its successors. | |
65 | 3. Compute MII: a lower bound on the number of cycles to schedule the loop. | |
66 | 4. Use the ordering to perform list-scheduling of the loop: | |
67 | 1. Set II = MII. We will try to schedule the loop within II cycles. | |
68 | 2. Try to schedule the insns one by one according to the ordering. | |
69 | For each insn compute an interval of cycles by considering already- | |
70 | scheduled preds and succs (and associated latencies); try to place | |
71 | the insn in the cycles of this window checking for potential | |
72 | resource conflicts (using the DFA interface). | |
73 | Note: this is different from the cycle-scheduling of schedule_insns; | |
74 | here the insns are not scheduled monotonically top-down (nor bottom- | |
75 | up). | |
76 | 3. If failed in scheduling all insns - bump II++ and try again, unless | |
0870fd6e | 77 | II reaches an upper bound MaxII, in which case report failure. |
5b6269ed | 78 | 5. If we succeeded in scheduling the loop within II cycles, we now |
79 | generate prolog and epilog, decrease the counter of the loop, and | |
80 | perform modulo variable expansion for live ranges that span more than | |
81 | II cycles (i.e. use register copies to prevent a def from overwriting | |
82 | itself before reaching the use). | |
5b6269ed | 83 | |
abbfd803 | 84 | SMS works with countable loops (1) whose control part can be easily |
85 | decoupled from the rest of the loop and (2) whose loop count can | |
86 | be easily adjusted. This is because we peel a constant number of | |
87 | iterations into a prologue and epilogue for which we want to avoid | |
88 | emitting the control part, and a kernel which is to iterate that | |
89 | constant number of iterations less than the original loop. So the | |
90 | control part should be a set of insns clearly identified and having | |
91 | its own iv, not otherwise used in the loop (at-least for now), which | |
7bfc9b7c | 92 | initializes a register before the loop to the number of iterations. |
93 | Currently SMS relies on the do-loop pattern to recognize such loops, | |
94 | where (1) the control part comprises of all insns defining and/or | |
95 | using a certain 'count' register and (2) the loop count can be | |
48e1416a | 96 | adjusted by modifying this register prior to the loop. |
7bfc9b7c | 97 | TODO: Rely on cfgloop analysis instead. */ |
5b6269ed | 98 | \f |
99 | /* This page defines partial-schedule structures and functions for | |
100 | modulo scheduling. */ | |
101 | ||
102 | typedef struct partial_schedule *partial_schedule_ptr; | |
103 | typedef struct ps_insn *ps_insn_ptr; | |
104 | ||
105 | /* The minimum (absolute) cycle that a node of ps was scheduled in. */ | |
106 | #define PS_MIN_CYCLE(ps) (((partial_schedule_ptr)(ps))->min_cycle) | |
107 | ||
108 | /* The maximum (absolute) cycle that a node of ps was scheduled in. */ | |
109 | #define PS_MAX_CYCLE(ps) (((partial_schedule_ptr)(ps))->max_cycle) | |
110 | ||
111 | /* Perform signed modulo, always returning a non-negative value. */ | |
112 | #define SMODULO(x,y) ((x) % (y) < 0 ? ((x) % (y) + (y)) : (x) % (y)) | |
113 | ||
114 | /* The number of different iterations the nodes in ps span, assuming | |
115 | the stage boundaries are placed efficiently. */ | |
6f7f081f | 116 | #define CALC_STAGE_COUNT(max_cycle,min_cycle,ii) ((max_cycle - min_cycle \ |
117 | + 1 + ii - 1) / ii) | |
118 | /* The stage count of ps. */ | |
119 | #define PS_STAGE_COUNT(ps) (((partial_schedule_ptr)(ps))->stage_count) | |
5b6269ed | 120 | |
5b6269ed | 121 | /* A single instruction in the partial schedule. */ |
122 | struct ps_insn | |
123 | { | |
0b79ae60 | 124 | /* Identifies the instruction to be scheduled. Values smaller than |
125 | the ddg's num_nodes refer directly to ddg nodes. A value of | |
126 | X - num_nodes refers to register move X. */ | |
7282ef12 | 127 | int id; |
5b6269ed | 128 | |
129 | /* The (absolute) cycle in which the PS instruction is scheduled. | |
130 | Same as SCHED_TIME (node). */ | |
131 | int cycle; | |
132 | ||
133 | /* The next/prev PS_INSN in the same row. */ | |
134 | ps_insn_ptr next_in_row, | |
135 | prev_in_row; | |
136 | ||
5b6269ed | 137 | }; |
138 | ||
0b79ae60 | 139 | /* Information about a register move that has been added to a partial |
140 | schedule. */ | |
141 | struct ps_reg_move_info | |
142 | { | |
143 | /* The source of the move is defined by the ps_insn with id DEF. | |
144 | The destination is used by the ps_insns with the ids in USES. */ | |
145 | int def; | |
146 | sbitmap uses; | |
147 | ||
148 | /* The original form of USES' instructions used OLD_REG, but they | |
149 | should now use NEW_REG. */ | |
150 | rtx old_reg; | |
151 | rtx new_reg; | |
152 | ||
e9df34d5 | 153 | /* The number of consecutive stages that the move occupies. */ |
154 | int num_consecutive_stages; | |
155 | ||
0b79ae60 | 156 | /* An instruction that sets NEW_REG to the correct value. The first |
157 | move associated with DEF will have an rhs of OLD_REG; later moves | |
158 | use the result of the previous move. */ | |
159 | rtx insn; | |
160 | }; | |
161 | ||
162 | typedef struct ps_reg_move_info ps_reg_move_info; | |
163 | DEF_VEC_O (ps_reg_move_info); | |
164 | DEF_VEC_ALLOC_O (ps_reg_move_info, heap); | |
165 | ||
5b6269ed | 166 | /* Holds the partial schedule as an array of II rows. Each entry of the |
167 | array points to a linked list of PS_INSNs, which represents the | |
168 | instructions that are scheduled for that row. */ | |
169 | struct partial_schedule | |
170 | { | |
171 | int ii; /* Number of rows in the partial schedule. */ | |
172 | int history; /* Threshold for conflict checking using DFA. */ | |
173 | ||
174 | /* rows[i] points to linked list of insns scheduled in row i (0<=i<ii). */ | |
175 | ps_insn_ptr *rows; | |
176 | ||
0b79ae60 | 177 | /* All the moves added for this partial schedule. Index X has |
178 | a ps_insn id of X + g->num_nodes. */ | |
179 | VEC (ps_reg_move_info, heap) *reg_moves; | |
180 | ||
4815ed0c | 181 | /* rows_length[i] holds the number of instructions in the row. |
182 | It is used only (as an optimization) to back off quickly from | |
183 | trying to schedule a node in a full row; that is, to avoid running | |
184 | through futile DFA state transitions. */ | |
185 | int *rows_length; | |
186 | ||
5b6269ed | 187 | /* The earliest absolute cycle of an insn in the partial schedule. */ |
188 | int min_cycle; | |
189 | ||
190 | /* The latest absolute cycle of an insn in the partial schedule. */ | |
191 | int max_cycle; | |
192 | ||
193 | ddg_ptr g; /* The DDG of the insns in the partial schedule. */ | |
6f7f081f | 194 | |
195 | int stage_count; /* The stage count of the partial schedule. */ | |
5b6269ed | 196 | }; |
197 | ||
48e1416a | 198 | |
1bed606a | 199 | static partial_schedule_ptr create_partial_schedule (int ii, ddg_ptr, int history); |
200 | static void free_partial_schedule (partial_schedule_ptr); | |
201 | static void reset_partial_schedule (partial_schedule_ptr, int new_ii); | |
5b6269ed | 202 | void print_partial_schedule (partial_schedule_ptr, FILE *); |
76387907 | 203 | static void verify_partial_schedule (partial_schedule_ptr, sbitmap); |
daca8c86 | 204 | static ps_insn_ptr ps_add_node_check_conflicts (partial_schedule_ptr, |
7282ef12 | 205 | int, int, sbitmap, sbitmap); |
daca8c86 | 206 | static void rotate_partial_schedule (partial_schedule_ptr, int); |
b6a75366 | 207 | void set_row_column_for_ps (partial_schedule_ptr); |
76387907 | 208 | static void ps_insert_empty_row (partial_schedule_ptr, int, sbitmap); |
209 | static int compute_split_row (sbitmap, int, int, int, ddg_node_ptr); | |
b6a75366 | 210 | |
5b6269ed | 211 | \f |
365db11e | 212 | /* This page defines constants and structures for the modulo scheduling |
5b6269ed | 213 | driver. */ |
214 | ||
c0fb94bd | 215 | static int sms_order_nodes (ddg_ptr, int, int *, int *); |
5b6269ed | 216 | static void set_node_sched_params (ddg_ptr); |
3f5be5f4 | 217 | static partial_schedule_ptr sms_schedule_by_order (ddg_ptr, int, int, int *); |
c0fb94bd | 218 | static void permute_partial_schedule (partial_schedule_ptr, rtx); |
219 | static void generate_prolog_epilog (partial_schedule_ptr, struct loop *, | |
7bfc9b7c | 220 | rtx, rtx); |
a5ea7ace | 221 | static int calculate_stage_count (partial_schedule_ptr, int); |
222 | static void calculate_must_precede_follow (ddg_node_ptr, int, int, | |
223 | int, int, sbitmap, sbitmap, sbitmap); | |
224 | static int get_sched_window (partial_schedule_ptr, ddg_node_ptr, | |
225 | sbitmap, int, int *, int *, int *); | |
7282ef12 | 226 | static bool try_scheduling_node_in_cycle (partial_schedule_ptr, int, int, |
227 | sbitmap, int *, sbitmap, sbitmap); | |
9bf2b489 | 228 | static void remove_node_from_ps (partial_schedule_ptr, ps_insn_ptr); |
a5ea7ace | 229 | |
7282ef12 | 230 | #define NODE_ASAP(node) ((node)->aux.count) |
231 | ||
2b15d2ba | 232 | #define SCHED_PARAMS(x) (&VEC_index (node_sched_params, node_sched_param_vec, x)) |
7282ef12 | 233 | #define SCHED_TIME(x) (SCHED_PARAMS (x)->time) |
7282ef12 | 234 | #define SCHED_ROW(x) (SCHED_PARAMS (x)->row) |
235 | #define SCHED_STAGE(x) (SCHED_PARAMS (x)->stage) | |
236 | #define SCHED_COLUMN(x) (SCHED_PARAMS (x)->column) | |
5b6269ed | 237 | |
238 | /* The scheduling parameters held for each node. */ | |
239 | typedef struct node_sched_params | |
240 | { | |
7282ef12 | 241 | int time; /* The absolute scheduling cycle. */ |
5b6269ed | 242 | |
5b6269ed | 243 | int row; /* Holds time % ii. */ |
244 | int stage; /* Holds time / ii. */ | |
245 | ||
246 | /* The column of a node inside the ps. If nodes u, v are on the same row, | |
365db11e | 247 | u will precede v if column (u) < column (v). */ |
5b6269ed | 248 | int column; |
249 | } *node_sched_params_ptr; | |
250 | ||
0b79ae60 | 251 | typedef struct node_sched_params node_sched_params; |
252 | DEF_VEC_O (node_sched_params); | |
253 | DEF_VEC_ALLOC_O (node_sched_params, heap); | |
5b6269ed | 254 | \f |
255 | /* The following three functions are copied from the current scheduler | |
2c763ed4 | 256 | code in order to use sched_analyze() for computing the dependencies. |
5b6269ed | 257 | They are used when initializing the sched_info structure. */ |
258 | static const char * | |
e1ab7874 | 259 | sms_print_insn (const_rtx insn, int aligned ATTRIBUTE_UNUSED) |
5b6269ed | 260 | { |
261 | static char tmp[80]; | |
262 | ||
263 | sprintf (tmp, "i%4d", INSN_UID (insn)); | |
264 | return tmp; | |
265 | } | |
266 | ||
5b6269ed | 267 | static void |
268 | compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED, | |
6aed13f1 | 269 | regset used ATTRIBUTE_UNUSED) |
5b6269ed | 270 | { |
271 | } | |
272 | ||
e1ab7874 | 273 | static struct common_sched_info_def sms_common_sched_info; |
274 | ||
275 | static struct sched_deps_info_def sms_sched_deps_info = | |
276 | { | |
277 | compute_jump_reg_dependencies, | |
278 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
279 | NULL, | |
280 | 0, 0, 0 | |
281 | }; | |
282 | ||
283 | static struct haifa_sched_info sms_sched_info = | |
5b6269ed | 284 | { |
285 | NULL, | |
286 | NULL, | |
287 | NULL, | |
288 | NULL, | |
289 | NULL, | |
290 | sms_print_insn, | |
6a1cdb4d | 291 | NULL, |
4db82bc9 | 292 | NULL, /* insn_finishes_block_p */ |
5b6269ed | 293 | NULL, NULL, |
294 | NULL, NULL, | |
e1ab7874 | 295 | 0, 0, |
4d64d9a4 | 296 | |
d2412f57 | 297 | NULL, NULL, NULL, NULL, |
e2f4a6ff | 298 | NULL, NULL, |
4d64d9a4 | 299 | 0 |
5b6269ed | 300 | }; |
301 | ||
0b79ae60 | 302 | /* Partial schedule instruction ID in PS is a register move. Return |
303 | information about it. */ | |
304 | static struct ps_reg_move_info * | |
305 | ps_reg_move (partial_schedule_ptr ps, int id) | |
306 | { | |
307 | gcc_checking_assert (id >= ps->g->num_nodes); | |
2b15d2ba | 308 | return &VEC_index (ps_reg_move_info, ps->reg_moves, id - ps->g->num_nodes); |
0b79ae60 | 309 | } |
310 | ||
7282ef12 | 311 | /* Return the rtl instruction that is being scheduled by partial schedule |
312 | instruction ID, which belongs to schedule PS. */ | |
313 | static rtx | |
314 | ps_rtl_insn (partial_schedule_ptr ps, int id) | |
315 | { | |
0b79ae60 | 316 | if (id < ps->g->num_nodes) |
317 | return ps->g->nodes[id].insn; | |
318 | else | |
319 | return ps_reg_move (ps, id)->insn; | |
7282ef12 | 320 | } |
321 | ||
9d75589a | 322 | /* Partial schedule instruction ID, which belongs to PS, occurred in |
0b79ae60 | 323 | the original (unscheduled) loop. Return the first instruction |
324 | in the loop that was associated with ps_rtl_insn (PS, ID). | |
325 | If the instruction had some notes before it, this is the first | |
326 | of those notes. */ | |
7282ef12 | 327 | static rtx |
328 | ps_first_note (partial_schedule_ptr ps, int id) | |
329 | { | |
0b79ae60 | 330 | gcc_assert (id < ps->g->num_nodes); |
7282ef12 | 331 | return ps->g->nodes[id].first_note; |
332 | } | |
333 | ||
e9df34d5 | 334 | /* Return the number of consecutive stages that are occupied by |
335 | partial schedule instruction ID in PS. */ | |
336 | static int | |
337 | ps_num_consecutive_stages (partial_schedule_ptr ps, int id) | |
338 | { | |
339 | if (id < ps->g->num_nodes) | |
340 | return 1; | |
341 | else | |
342 | return ps_reg_move (ps, id)->num_consecutive_stages; | |
343 | } | |
344 | ||
7bfc9b7c | 345 | /* Given HEAD and TAIL which are the first and last insns in a loop; |
346 | return the register which controls the loop. Return zero if it has | |
347 | more than one occurrence in the loop besides the control part or the | |
348 | do-loop pattern is not of the form we expect. */ | |
5b6269ed | 349 | static rtx |
7bfc9b7c | 350 | doloop_register_get (rtx head ATTRIBUTE_UNUSED, rtx tail ATTRIBUTE_UNUSED) |
5b6269ed | 351 | { |
6bcf94f5 | 352 | #ifdef HAVE_doloop_end |
11dd7ac1 | 353 | rtx reg, condition, insn, first_insn_not_to_check; |
5b6269ed | 354 | |
7bfc9b7c | 355 | if (!JUMP_P (tail)) |
5b6269ed | 356 | return NULL_RTX; |
357 | ||
7bfc9b7c | 358 | /* TODO: Free SMS's dependence on doloop_condition_get. */ |
359 | condition = doloop_condition_get (tail); | |
fc2abfd3 | 360 | if (! condition) |
5b6269ed | 361 | return NULL_RTX; |
362 | ||
fc2abfd3 | 363 | if (REG_P (XEXP (condition, 0))) |
364 | reg = XEXP (condition, 0); | |
365 | else if (GET_CODE (XEXP (condition, 0)) == PLUS | |
366 | && REG_P (XEXP (XEXP (condition, 0), 0))) | |
367 | reg = XEXP (XEXP (condition, 0), 0); | |
368 | else | |
369 | gcc_unreachable (); | |
5b6269ed | 370 | |
7bfc9b7c | 371 | /* Check that the COUNT_REG has no other occurrences in the loop |
372 | until the decrement. We assume the control part consists of | |
373 | either a single (parallel) branch-on-count or a (non-parallel) | |
374 | branch immediately preceded by a single (decrement) insn. */ | |
11dd7ac1 | 375 | first_insn_not_to_check = (GET_CODE (PATTERN (tail)) == PARALLEL ? tail |
cf961a94 | 376 | : prev_nondebug_insn (tail)); |
11dd7ac1 | 377 | |
378 | for (insn = head; insn != first_insn_not_to_check; insn = NEXT_INSN (insn)) | |
9973add0 | 379 | if (!DEBUG_INSN_P (insn) && reg_mentioned_p (reg, insn)) |
7bfc9b7c | 380 | { |
381 | if (dump_file) | |
11dd7ac1 | 382 | { |
383 | fprintf (dump_file, "SMS count_reg found "); | |
384 | print_rtl_single (dump_file, reg); | |
385 | fprintf (dump_file, " outside control in insn:\n"); | |
386 | print_rtl_single (dump_file, insn); | |
387 | } | |
7bfc9b7c | 388 | |
389 | return NULL_RTX; | |
390 | } | |
11dd7ac1 | 391 | |
fc2abfd3 | 392 | return reg; |
6bcf94f5 | 393 | #else |
394 | return NULL_RTX; | |
395 | #endif | |
5b6269ed | 396 | } |
397 | ||
398 | /* Check if COUNT_REG is set to a constant in the PRE_HEADER block, so | |
399 | that the number of iterations is a compile-time constant. If so, | |
400 | return the rtx that sets COUNT_REG to a constant, and set COUNT to | |
401 | this constant. Otherwise return 0. */ | |
402 | static rtx | |
403 | const_iteration_count (rtx count_reg, basic_block pre_header, | |
404 | HOST_WIDEST_INT * count) | |
405 | { | |
406 | rtx insn; | |
407 | rtx head, tail; | |
a337a404 | 408 | |
409 | if (! pre_header) | |
410 | return NULL_RTX; | |
411 | ||
6a1cdb4d | 412 | get_ebb_head_tail (pre_header, pre_header, &head, &tail); |
5b6269ed | 413 | |
414 | for (insn = tail; insn != PREV_INSN (head); insn = PREV_INSN (insn)) | |
9845d120 | 415 | if (NONDEBUG_INSN_P (insn) && single_set (insn) && |
5b6269ed | 416 | rtx_equal_p (count_reg, SET_DEST (single_set (insn)))) |
417 | { | |
418 | rtx pat = single_set (insn); | |
419 | ||
971ba038 | 420 | if (CONST_INT_P (SET_SRC (pat))) |
5b6269ed | 421 | { |
422 | *count = INTVAL (SET_SRC (pat)); | |
423 | return insn; | |
424 | } | |
425 | ||
426 | return NULL_RTX; | |
427 | } | |
428 | ||
429 | return NULL_RTX; | |
430 | } | |
431 | ||
432 | /* A very simple resource-based lower bound on the initiation interval. | |
433 | ??? Improve the accuracy of this bound by considering the | |
434 | utilization of various units. */ | |
435 | static int | |
436 | res_MII (ddg_ptr g) | |
437 | { | |
d52fd16a | 438 | if (targetm.sched.sms_res_mii) |
48e1416a | 439 | return targetm.sched.sms_res_mii (g); |
440 | ||
9845d120 | 441 | return ((g->num_nodes - g->num_debug) / issue_rate); |
5b6269ed | 442 | } |
443 | ||
444 | ||
0b79ae60 | 445 | /* A vector that contains the sched data for each ps_insn. */ |
446 | static VEC (node_sched_params, heap) *node_sched_param_vec; | |
5b6269ed | 447 | |
7282ef12 | 448 | /* Allocate sched_params for each node and initialize it. */ |
5b6269ed | 449 | static void |
450 | set_node_sched_params (ddg_ptr g) | |
451 | { | |
0b79ae60 | 452 | VEC_truncate (node_sched_params, node_sched_param_vec, 0); |
453 | VEC_safe_grow_cleared (node_sched_params, heap, | |
454 | node_sched_param_vec, g->num_nodes); | |
5b6269ed | 455 | } |
456 | ||
e9df34d5 | 457 | /* Make sure that node_sched_param_vec has an entry for every move in PS. */ |
458 | static void | |
459 | extend_node_sched_params (partial_schedule_ptr ps) | |
460 | { | |
461 | VEC_safe_grow_cleared (node_sched_params, heap, node_sched_param_vec, | |
462 | ps->g->num_nodes + VEC_length (ps_reg_move_info, | |
463 | ps->reg_moves)); | |
464 | } | |
465 | ||
466 | /* Update the sched_params (time, row and stage) for node U using the II, | |
467 | the CYCLE of U and MIN_CYCLE. | |
468 | We're not simply taking the following | |
469 | SCHED_STAGE (u) = CALC_STAGE_COUNT (SCHED_TIME (u), min_cycle, ii); | |
470 | because the stages may not be aligned on cycle 0. */ | |
471 | static void | |
472 | update_node_sched_params (int u, int ii, int cycle, int min_cycle) | |
473 | { | |
474 | int sc_until_cycle_zero; | |
475 | int stage; | |
476 | ||
477 | SCHED_TIME (u) = cycle; | |
478 | SCHED_ROW (u) = SMODULO (cycle, ii); | |
479 | ||
480 | /* The calculation of stage count is done adding the number | |
481 | of stages before cycle zero and after cycle zero. */ | |
482 | sc_until_cycle_zero = CALC_STAGE_COUNT (-1, min_cycle, ii); | |
483 | ||
484 | if (SCHED_TIME (u) < 0) | |
485 | { | |
486 | stage = CALC_STAGE_COUNT (-1, SCHED_TIME (u), ii); | |
487 | SCHED_STAGE (u) = sc_until_cycle_zero - stage; | |
488 | } | |
489 | else | |
490 | { | |
491 | stage = CALC_STAGE_COUNT (SCHED_TIME (u), 0, ii); | |
492 | SCHED_STAGE (u) = sc_until_cycle_zero + stage - 1; | |
493 | } | |
494 | } | |
495 | ||
5b6269ed | 496 | static void |
0b79ae60 | 497 | print_node_sched_params (FILE *file, int num_nodes, partial_schedule_ptr ps) |
5b6269ed | 498 | { |
499 | int i; | |
500 | ||
3f5be5f4 | 501 | if (! file) |
a337a404 | 502 | return; |
5b6269ed | 503 | for (i = 0; i < num_nodes; i++) |
504 | { | |
7282ef12 | 505 | node_sched_params_ptr nsp = SCHED_PARAMS (i); |
5b6269ed | 506 | |
896dbaed | 507 | fprintf (file, "Node = %d; INSN = %d\n", i, |
0b79ae60 | 508 | INSN_UID (ps_rtl_insn (ps, i))); |
509 | fprintf (file, " asap = %d:\n", NODE_ASAP (&ps->g->nodes[i])); | |
3f5be5f4 | 510 | fprintf (file, " time = %d:\n", nsp->time); |
e9df34d5 | 511 | fprintf (file, " stage = %d:\n", nsp->stage); |
512 | } | |
513 | } | |
514 | ||
515 | /* Set SCHED_COLUMN for each instruction in row ROW of PS. */ | |
516 | static void | |
517 | set_columns_for_row (partial_schedule_ptr ps, int row) | |
518 | { | |
519 | ps_insn_ptr cur_insn; | |
520 | int column; | |
521 | ||
522 | column = 0; | |
523 | for (cur_insn = ps->rows[row]; cur_insn; cur_insn = cur_insn->next_in_row) | |
524 | SCHED_COLUMN (cur_insn->id) = column++; | |
525 | } | |
526 | ||
527 | /* Set SCHED_COLUMN for each instruction in PS. */ | |
528 | static void | |
529 | set_columns_for_ps (partial_schedule_ptr ps) | |
530 | { | |
531 | int row; | |
532 | ||
533 | for (row = 0; row < ps->ii; row++) | |
534 | set_columns_for_row (ps, row); | |
535 | } | |
0b79ae60 | 536 | |
e9df34d5 | 537 | /* Try to schedule the move with ps_insn identifier I_REG_MOVE in PS. |
538 | Its single predecessor has already been scheduled, as has its | |
539 | ddg node successors. (The move may have also another move as its | |
540 | successor, in which case that successor will be scheduled later.) | |
541 | ||
542 | The move is part of a chain that satisfies register dependencies | |
543 | between a producing ddg node and various consuming ddg nodes. | |
544 | If some of these dependencies have a distance of 1 (meaning that | |
469e33a0 | 545 | the use is upward-exposed) then DISTANCE1_USES is nonnull and |
e9df34d5 | 546 | contains the set of uses with distance-1 dependencies. |
547 | DISTANCE1_USES is null otherwise. | |
548 | ||
549 | MUST_FOLLOW is a scratch bitmap that is big enough to hold | |
550 | all current ps_insn ids. | |
551 | ||
552 | Return true on success. */ | |
553 | static bool | |
554 | schedule_reg_move (partial_schedule_ptr ps, int i_reg_move, | |
555 | sbitmap distance1_uses, sbitmap must_follow) | |
556 | { | |
557 | unsigned int u; | |
558 | int this_time, this_distance, this_start, this_end, this_latency; | |
559 | int start, end, c, ii; | |
560 | sbitmap_iterator sbi; | |
561 | ps_reg_move_info *move; | |
562 | rtx this_insn; | |
563 | ps_insn_ptr psi; | |
564 | ||
565 | move = ps_reg_move (ps, i_reg_move); | |
566 | ii = ps->ii; | |
567 | if (dump_file) | |
568 | { | |
569 | fprintf (dump_file, "Scheduling register move INSN %d; ii = %d" | |
570 | ", min cycle = %d\n\n", INSN_UID (move->insn), ii, | |
571 | PS_MIN_CYCLE (ps)); | |
572 | print_rtl_single (dump_file, move->insn); | |
573 | fprintf (dump_file, "\n%11s %11s %5s\n", "start", "end", "time"); | |
574 | fprintf (dump_file, "=========== =========== =====\n"); | |
575 | } | |
576 | ||
577 | start = INT_MIN; | |
578 | end = INT_MAX; | |
579 | ||
580 | /* For dependencies of distance 1 between a producer ddg node A | |
581 | and consumer ddg node B, we have a chain of dependencies: | |
582 | ||
583 | A --(T,L1,1)--> M1 --(T,L2,0)--> M2 ... --(T,Ln,0)--> B | |
584 | ||
585 | where Mi is the ith move. For dependencies of distance 0 between | |
586 | a producer ddg node A and consumer ddg node C, we have a chain of | |
587 | dependencies: | |
588 | ||
589 | A --(T,L1',0)--> M1' --(T,L2',0)--> M2' ... --(T,Ln',0)--> C | |
590 | ||
591 | where Mi' occupies the same position as Mi but occurs a stage later. | |
592 | We can only schedule each move once, so if we have both types of | |
593 | chain, we model the second as: | |
594 | ||
595 | A --(T,L1',1)--> M1 --(T,L2',0)--> M2 ... --(T,Ln',-1)--> C | |
596 | ||
597 | First handle the dependencies between the previously-scheduled | |
598 | predecessor and the move. */ | |
599 | this_insn = ps_rtl_insn (ps, move->def); | |
600 | this_latency = insn_latency (this_insn, move->insn); | |
601 | this_distance = distance1_uses && move->def < ps->g->num_nodes ? 1 : 0; | |
602 | this_time = SCHED_TIME (move->def) - this_distance * ii; | |
603 | this_start = this_time + this_latency; | |
604 | this_end = this_time + ii; | |
605 | if (dump_file) | |
606 | fprintf (dump_file, "%11d %11d %5d %d --(T,%d,%d)--> %d\n", | |
607 | this_start, this_end, SCHED_TIME (move->def), | |
608 | INSN_UID (this_insn), this_latency, this_distance, | |
609 | INSN_UID (move->insn)); | |
610 | ||
611 | if (start < this_start) | |
612 | start = this_start; | |
613 | if (end > this_end) | |
614 | end = this_end; | |
615 | ||
616 | /* Handle the dependencies between the move and previously-scheduled | |
617 | successors. */ | |
618 | EXECUTE_IF_SET_IN_SBITMAP (move->uses, 0, u, sbi) | |
619 | { | |
620 | this_insn = ps_rtl_insn (ps, u); | |
621 | this_latency = insn_latency (move->insn, this_insn); | |
622 | if (distance1_uses && !TEST_BIT (distance1_uses, u)) | |
623 | this_distance = -1; | |
624 | else | |
625 | this_distance = 0; | |
626 | this_time = SCHED_TIME (u) + this_distance * ii; | |
627 | this_start = this_time - ii; | |
628 | this_end = this_time - this_latency; | |
629 | if (dump_file) | |
630 | fprintf (dump_file, "%11d %11d %5d %d --(T,%d,%d)--> %d\n", | |
631 | this_start, this_end, SCHED_TIME (u), INSN_UID (move->insn), | |
632 | this_latency, this_distance, INSN_UID (this_insn)); | |
633 | ||
634 | if (start < this_start) | |
635 | start = this_start; | |
636 | if (end > this_end) | |
637 | end = this_end; | |
638 | } | |
639 | ||
640 | if (dump_file) | |
641 | { | |
642 | fprintf (dump_file, "----------- ----------- -----\n"); | |
643 | fprintf (dump_file, "%11d %11d %5s %s\n", start, end, "", "(max, min)"); | |
644 | } | |
645 | ||
53c5d9d4 | 646 | bitmap_clear (must_follow); |
e9df34d5 | 647 | SET_BIT (must_follow, move->def); |
648 | ||
649 | start = MAX (start, end - (ii - 1)); | |
650 | for (c = end; c >= start; c--) | |
651 | { | |
652 | psi = ps_add_node_check_conflicts (ps, i_reg_move, c, | |
653 | move->uses, must_follow); | |
654 | if (psi) | |
655 | { | |
656 | update_node_sched_params (i_reg_move, ii, c, PS_MIN_CYCLE (ps)); | |
657 | if (dump_file) | |
658 | fprintf (dump_file, "\nScheduled register move INSN %d at" | |
659 | " time %d, row %d\n\n", INSN_UID (move->insn), c, | |
660 | SCHED_ROW (i_reg_move)); | |
661 | return true; | |
5b6269ed | 662 | } |
663 | } | |
e9df34d5 | 664 | |
665 | if (dump_file) | |
666 | fprintf (dump_file, "\nNo available slot\n\n"); | |
667 | ||
668 | return false; | |
5b6269ed | 669 | } |
670 | ||
a337a404 | 671 | /* |
672 | Breaking intra-loop register anti-dependences: | |
673 | Each intra-loop register anti-dependence implies a cross-iteration true | |
674 | dependence of distance 1. Therefore, we can remove such false dependencies | |
675 | and figure out if the partial schedule broke them by checking if (for a | |
676 | true-dependence of distance 1): SCHED_TIME (def) < SCHED_TIME (use) and | |
677 | if so generate a register move. The number of such moves is equal to: | |
678 | SCHED_TIME (use) - SCHED_TIME (def) { 0 broken | |
06b27565 | 679 | nreg_moves = ----------------------------------- + 1 - { dependence. |
a337a404 | 680 | ii { 1 if not. |
681 | */ | |
0b79ae60 | 682 | static bool |
683 | schedule_reg_moves (partial_schedule_ptr ps) | |
5b6269ed | 684 | { |
685 | ddg_ptr g = ps->g; | |
686 | int ii = ps->ii; | |
687 | int i; | |
688 | ||
689 | for (i = 0; i < g->num_nodes; i++) | |
690 | { | |
691 | ddg_node_ptr u = &g->nodes[i]; | |
692 | ddg_edge_ptr e; | |
693 | int nreg_moves = 0, i_reg_move; | |
5b6269ed | 694 | rtx prev_reg, old_reg; |
0b79ae60 | 695 | int first_move; |
e9df34d5 | 696 | int distances[2]; |
697 | sbitmap must_follow; | |
698 | sbitmap distance1_uses; | |
d1cae43e | 699 | rtx set = single_set (u->insn); |
700 | ||
701 | /* Skip instructions that do not set a register. */ | |
702 | if ((set && !REG_P (SET_DEST (set)))) | |
703 | continue; | |
704 | ||
5b6269ed | 705 | /* Compute the number of reg_moves needed for u, by looking at life |
706 | ranges started at u (excluding self-loops). */ | |
e9df34d5 | 707 | distances[0] = distances[1] = false; |
5b6269ed | 708 | for (e = u->out; e; e = e->next_out) |
709 | if (e->type == TRUE_DEP && e->dest != e->src) | |
710 | { | |
7282ef12 | 711 | int nreg_moves4e = (SCHED_TIME (e->dest->cuid) |
712 | - SCHED_TIME (e->src->cuid)) / ii; | |
5b6269ed | 713 | |
a337a404 | 714 | if (e->distance == 1) |
7282ef12 | 715 | nreg_moves4e = (SCHED_TIME (e->dest->cuid) |
716 | - SCHED_TIME (e->src->cuid) + ii) / ii; | |
a337a404 | 717 | |
365db11e | 718 | /* If dest precedes src in the schedule of the kernel, then dest |
5b6269ed | 719 | will read before src writes and we can save one reg_copy. */ |
7282ef12 | 720 | if (SCHED_ROW (e->dest->cuid) == SCHED_ROW (e->src->cuid) |
721 | && SCHED_COLUMN (e->dest->cuid) < SCHED_COLUMN (e->src->cuid)) | |
5b6269ed | 722 | nreg_moves4e--; |
723 | ||
d1cae43e | 724 | if (nreg_moves4e >= 1) |
725 | { | |
726 | /* !single_set instructions are not supported yet and | |
727 | thus we do not except to encounter them in the loop | |
728 | except from the doloop part. For the latter case | |
729 | we assume no regmoves are generated as the doloop | |
730 | instructions are tied to the branch with an edge. */ | |
731 | gcc_assert (set); | |
2917ecd3 | 732 | /* If the instruction contains auto-inc register then |
733 | validate that the regmov is being generated for the | |
734 | target regsiter rather then the inc'ed register. */ | |
735 | gcc_assert (!autoinc_var_is_used_p (u->insn, e->dest->insn)); | |
d1cae43e | 736 | } |
737 | ||
e9df34d5 | 738 | if (nreg_moves4e) |
739 | { | |
740 | gcc_assert (e->distance < 2); | |
741 | distances[e->distance] = true; | |
742 | } | |
5b6269ed | 743 | nreg_moves = MAX (nreg_moves, nreg_moves4e); |
744 | } | |
745 | ||
746 | if (nreg_moves == 0) | |
747 | continue; | |
748 | ||
0b79ae60 | 749 | /* Create NREG_MOVES register moves. */ |
750 | first_move = VEC_length (ps_reg_move_info, ps->reg_moves); | |
751 | VEC_safe_grow_cleared (ps_reg_move_info, heap, ps->reg_moves, | |
752 | first_move + nreg_moves); | |
e9df34d5 | 753 | extend_node_sched_params (ps); |
0b79ae60 | 754 | |
755 | /* Record the moves associated with this node. */ | |
756 | first_move += ps->g->num_nodes; | |
0b79ae60 | 757 | |
758 | /* Generate each move. */ | |
759 | old_reg = prev_reg = SET_DEST (single_set (u->insn)); | |
760 | for (i_reg_move = 0; i_reg_move < nreg_moves; i_reg_move++) | |
761 | { | |
762 | ps_reg_move_info *move = ps_reg_move (ps, first_move + i_reg_move); | |
763 | ||
764 | move->def = i_reg_move > 0 ? first_move + i_reg_move - 1 : i; | |
e9df34d5 | 765 | move->uses = sbitmap_alloc (first_move + nreg_moves); |
0b79ae60 | 766 | move->old_reg = old_reg; |
767 | move->new_reg = gen_reg_rtx (GET_MODE (prev_reg)); | |
e9df34d5 | 768 | move->num_consecutive_stages = distances[0] && distances[1] ? 2 : 1; |
0b79ae60 | 769 | move->insn = gen_move_insn (move->new_reg, copy_rtx (prev_reg)); |
53c5d9d4 | 770 | bitmap_clear (move->uses); |
0b79ae60 | 771 | |
772 | prev_reg = move->new_reg; | |
773 | } | |
774 | ||
e9df34d5 | 775 | distance1_uses = distances[1] ? sbitmap_alloc (g->num_nodes) : NULL; |
776 | ||
5b6269ed | 777 | /* Every use of the register defined by node may require a different |
778 | copy of this register, depending on the time the use is scheduled. | |
0b79ae60 | 779 | Record which uses require which move results. */ |
5b6269ed | 780 | for (e = u->out; e; e = e->next_out) |
781 | if (e->type == TRUE_DEP && e->dest != e->src) | |
782 | { | |
7282ef12 | 783 | int dest_copy = (SCHED_TIME (e->dest->cuid) |
784 | - SCHED_TIME (e->src->cuid)) / ii; | |
5b6269ed | 785 | |
a337a404 | 786 | if (e->distance == 1) |
7282ef12 | 787 | dest_copy = (SCHED_TIME (e->dest->cuid) |
788 | - SCHED_TIME (e->src->cuid) + ii) / ii; | |
a337a404 | 789 | |
7282ef12 | 790 | if (SCHED_ROW (e->dest->cuid) == SCHED_ROW (e->src->cuid) |
791 | && SCHED_COLUMN (e->dest->cuid) < SCHED_COLUMN (e->src->cuid)) | |
5b6269ed | 792 | dest_copy--; |
793 | ||
794 | if (dest_copy) | |
0b79ae60 | 795 | { |
796 | ps_reg_move_info *move; | |
5b6269ed | 797 | |
0b79ae60 | 798 | move = ps_reg_move (ps, first_move + dest_copy - 1); |
799 | SET_BIT (move->uses, e->dest->cuid); | |
e9df34d5 | 800 | if (e->distance == 1) |
801 | SET_BIT (distance1_uses, e->dest->cuid); | |
0b79ae60 | 802 | } |
803 | } | |
e9df34d5 | 804 | |
805 | must_follow = sbitmap_alloc (first_move + nreg_moves); | |
806 | for (i_reg_move = 0; i_reg_move < nreg_moves; i_reg_move++) | |
807 | if (!schedule_reg_move (ps, first_move + i_reg_move, | |
808 | distance1_uses, must_follow)) | |
809 | break; | |
810 | sbitmap_free (must_follow); | |
811 | if (distance1_uses) | |
812 | sbitmap_free (distance1_uses); | |
813 | if (i_reg_move < nreg_moves) | |
814 | return false; | |
0b79ae60 | 815 | } |
816 | return true; | |
817 | } | |
5b6269ed | 818 | |
0b79ae60 | 819 | /* Emit the moves associatied with PS. Apply the substitutions |
820 | associated with them. */ | |
821 | static void | |
822 | apply_reg_moves (partial_schedule_ptr ps) | |
823 | { | |
824 | ps_reg_move_info *move; | |
825 | int i; | |
5b6269ed | 826 | |
0b79ae60 | 827 | FOR_EACH_VEC_ELT (ps_reg_move_info, ps->reg_moves, i, move) |
828 | { | |
829 | unsigned int i_use; | |
830 | sbitmap_iterator sbi; | |
5b6269ed | 831 | |
0b79ae60 | 832 | EXECUTE_IF_SET_IN_SBITMAP (move->uses, 0, i_use, sbi) |
833 | { | |
834 | replace_rtx (ps->g->nodes[i_use].insn, move->old_reg, move->new_reg); | |
835 | df_insn_rescan (ps->g->nodes[i_use].insn); | |
5b6269ed | 836 | } |
837 | } | |
a5ea7ace | 838 | } |
839 | ||
6f7f081f | 840 | /* Bump the SCHED_TIMEs of all nodes by AMOUNT. Set the values of |
841 | SCHED_ROW and SCHED_STAGE. Instruction scheduled on cycle AMOUNT | |
842 | will move to cycle zero. */ | |
5b6269ed | 843 | static void |
6f7f081f | 844 | reset_sched_times (partial_schedule_ptr ps, int amount) |
5b6269ed | 845 | { |
76387907 | 846 | int row; |
5b6269ed | 847 | int ii = ps->ii; |
76387907 | 848 | ps_insn_ptr crr_insn; |
5b6269ed | 849 | |
76387907 | 850 | for (row = 0; row < ii; row++) |
851 | for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) | |
852 | { | |
7282ef12 | 853 | int u = crr_insn->id; |
76387907 | 854 | int normalized_time = SCHED_TIME (u) - amount; |
6f7f081f | 855 | int new_min_cycle = PS_MIN_CYCLE (ps) - amount; |
76387907 | 856 | |
6f7f081f | 857 | if (dump_file) |
858 | { | |
859 | /* Print the scheduling times after the rotation. */ | |
7282ef12 | 860 | rtx insn = ps_rtl_insn (ps, u); |
861 | ||
6f7f081f | 862 | fprintf (dump_file, "crr_insn->node=%d (insn id %d), " |
7282ef12 | 863 | "crr_insn->cycle=%d, min_cycle=%d", u, |
864 | INSN_UID (insn), normalized_time, new_min_cycle); | |
865 | if (JUMP_P (insn)) | |
6f7f081f | 866 | fprintf (dump_file, " (branch)"); |
867 | fprintf (dump_file, "\n"); | |
868 | } | |
869 | ||
76387907 | 870 | gcc_assert (SCHED_TIME (u) >= ps->min_cycle); |
871 | gcc_assert (SCHED_TIME (u) <= ps->max_cycle); | |
a5ea7ace | 872 | |
873 | crr_insn->cycle = normalized_time; | |
874 | update_node_sched_params (u, ii, normalized_time, new_min_cycle); | |
76387907 | 875 | } |
5b6269ed | 876 | } |
6f7f081f | 877 | |
5b6269ed | 878 | /* Permute the insns according to their order in PS, from row 0 to |
879 | row ii-1, and position them right before LAST. This schedules | |
880 | the insns of the loop kernel. */ | |
881 | static void | |
882 | permute_partial_schedule (partial_schedule_ptr ps, rtx last) | |
883 | { | |
884 | int ii = ps->ii; | |
885 | int row; | |
886 | ps_insn_ptr ps_ij; | |
887 | ||
888 | for (row = 0; row < ii ; row++) | |
889 | for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row) | |
7282ef12 | 890 | { |
891 | rtx insn = ps_rtl_insn (ps, ps_ij->id); | |
892 | ||
893 | if (PREV_INSN (last) != insn) | |
e9df34d5 | 894 | { |
895 | if (ps_ij->id < ps->g->num_nodes) | |
896 | reorder_insns_nobb (ps_first_note (ps, ps_ij->id), insn, | |
897 | PREV_INSN (last)); | |
898 | else | |
899 | add_insn_before (insn, last, NULL); | |
900 | } | |
7282ef12 | 901 | } |
5b6269ed | 902 | } |
903 | ||
a5ea7ace | 904 | /* Set bitmaps TMP_FOLLOW and TMP_PRECEDE to MUST_FOLLOW and MUST_PRECEDE |
905 | respectively only if cycle C falls on the border of the scheduling | |
906 | window boundaries marked by START and END cycles. STEP is the | |
907 | direction of the window. */ | |
908 | static inline void | |
909 | set_must_precede_follow (sbitmap *tmp_follow, sbitmap must_follow, | |
910 | sbitmap *tmp_precede, sbitmap must_precede, int c, | |
911 | int start, int end, int step) | |
912 | { | |
913 | *tmp_precede = NULL; | |
914 | *tmp_follow = NULL; | |
915 | ||
916 | if (c == start) | |
917 | { | |
918 | if (step == 1) | |
919 | *tmp_precede = must_precede; | |
920 | else /* step == -1. */ | |
921 | *tmp_follow = must_follow; | |
922 | } | |
923 | if (c == end - step) | |
924 | { | |
925 | if (step == 1) | |
926 | *tmp_follow = must_follow; | |
927 | else /* step == -1. */ | |
928 | *tmp_precede = must_precede; | |
929 | } | |
930 | ||
931 | } | |
932 | ||
933 | /* Return True if the branch can be moved to row ii-1 while | |
934 | normalizing the partial schedule PS to start from cycle zero and thus | |
935 | optimize the SC. Otherwise return False. */ | |
936 | static bool | |
937 | optimize_sc (partial_schedule_ptr ps, ddg_ptr g) | |
938 | { | |
939 | int amount = PS_MIN_CYCLE (ps); | |
940 | sbitmap sched_nodes = sbitmap_alloc (g->num_nodes); | |
941 | int start, end, step; | |
942 | int ii = ps->ii; | |
943 | bool ok = false; | |
944 | int stage_count, stage_count_curr; | |
945 | ||
946 | /* Compare the SC after normalization and SC after bringing the branch | |
947 | to row ii-1. If they are equal just bail out. */ | |
948 | stage_count = calculate_stage_count (ps, amount); | |
949 | stage_count_curr = | |
7282ef12 | 950 | calculate_stage_count (ps, SCHED_TIME (g->closing_branch->cuid) - (ii - 1)); |
a5ea7ace | 951 | |
952 | if (stage_count == stage_count_curr) | |
953 | { | |
954 | if (dump_file) | |
955 | fprintf (dump_file, "SMS SC already optimized.\n"); | |
956 | ||
957 | ok = false; | |
958 | goto clear; | |
959 | } | |
960 | ||
961 | if (dump_file) | |
962 | { | |
963 | fprintf (dump_file, "SMS Trying to optimize branch location\n"); | |
964 | fprintf (dump_file, "SMS partial schedule before trial:\n"); | |
965 | print_partial_schedule (ps, dump_file); | |
966 | } | |
967 | ||
968 | /* First, normalize the partial scheduling. */ | |
969 | reset_sched_times (ps, amount); | |
970 | rotate_partial_schedule (ps, amount); | |
971 | if (dump_file) | |
972 | { | |
973 | fprintf (dump_file, | |
974 | "SMS partial schedule after normalization (ii, %d, SC %d):\n", | |
975 | ii, stage_count); | |
976 | print_partial_schedule (ps, dump_file); | |
977 | } | |
978 | ||
7282ef12 | 979 | if (SMODULO (SCHED_TIME (g->closing_branch->cuid), ii) == ii - 1) |
a5ea7ace | 980 | { |
981 | ok = true; | |
982 | goto clear; | |
983 | } | |
984 | ||
53c5d9d4 | 985 | bitmap_ones (sched_nodes); |
a5ea7ace | 986 | |
987 | /* Calculate the new placement of the branch. It should be in row | |
988 | ii-1 and fall into it's scheduling window. */ | |
989 | if (get_sched_window (ps, g->closing_branch, sched_nodes, ii, &start, | |
990 | &step, &end) == 0) | |
991 | { | |
992 | bool success; | |
993 | ps_insn_ptr next_ps_i; | |
7282ef12 | 994 | int branch_cycle = SCHED_TIME (g->closing_branch->cuid); |
a5ea7ace | 995 | int row = SMODULO (branch_cycle, ps->ii); |
996 | int num_splits = 0; | |
997 | sbitmap must_precede, must_follow, tmp_precede, tmp_follow; | |
998 | int c; | |
999 | ||
1000 | if (dump_file) | |
1001 | fprintf (dump_file, "\nTrying to schedule node %d " | |
1002 | "INSN = %d in (%d .. %d) step %d\n", | |
1003 | g->closing_branch->cuid, | |
1004 | (INSN_UID (g->closing_branch->insn)), start, end, step); | |
1005 | ||
1006 | gcc_assert ((step > 0 && start < end) || (step < 0 && start > end)); | |
1007 | if (step == 1) | |
1008 | { | |
1009 | c = start + ii - SMODULO (start, ii) - 1; | |
1010 | gcc_assert (c >= start); | |
1011 | if (c >= end) | |
1012 | { | |
1013 | ok = false; | |
1014 | if (dump_file) | |
1015 | fprintf (dump_file, | |
1016 | "SMS failed to schedule branch at cycle: %d\n", c); | |
1017 | goto clear; | |
1018 | } | |
1019 | } | |
1020 | else | |
1021 | { | |
1022 | c = start - SMODULO (start, ii) - 1; | |
1023 | gcc_assert (c <= start); | |
1024 | ||
1025 | if (c <= end) | |
1026 | { | |
1027 | if (dump_file) | |
1028 | fprintf (dump_file, | |
1029 | "SMS failed to schedule branch at cycle: %d\n", c); | |
1030 | ok = false; | |
1031 | goto clear; | |
1032 | } | |
1033 | } | |
1034 | ||
1035 | must_precede = sbitmap_alloc (g->num_nodes); | |
1036 | must_follow = sbitmap_alloc (g->num_nodes); | |
1037 | ||
1038 | /* Try to schedule the branch is it's new cycle. */ | |
1039 | calculate_must_precede_follow (g->closing_branch, start, end, | |
1040 | step, ii, sched_nodes, | |
1041 | must_precede, must_follow); | |
1042 | ||
1043 | set_must_precede_follow (&tmp_follow, must_follow, &tmp_precede, | |
1044 | must_precede, c, start, end, step); | |
1045 | ||
1046 | /* Find the element in the partial schedule related to the closing | |
1047 | branch so we can remove it from it's current cycle. */ | |
1048 | for (next_ps_i = ps->rows[row]; | |
1049 | next_ps_i; next_ps_i = next_ps_i->next_in_row) | |
7282ef12 | 1050 | if (next_ps_i->id == g->closing_branch->cuid) |
a5ea7ace | 1051 | break; |
1052 | ||
9bf2b489 | 1053 | remove_node_from_ps (ps, next_ps_i); |
a5ea7ace | 1054 | success = |
7282ef12 | 1055 | try_scheduling_node_in_cycle (ps, g->closing_branch->cuid, c, |
a5ea7ace | 1056 | sched_nodes, &num_splits, |
1057 | tmp_precede, tmp_follow); | |
1058 | gcc_assert (num_splits == 0); | |
1059 | if (!success) | |
1060 | { | |
1061 | if (dump_file) | |
1062 | fprintf (dump_file, | |
1063 | "SMS failed to schedule branch at cycle: %d, " | |
1064 | "bringing it back to cycle %d\n", c, branch_cycle); | |
1065 | ||
1066 | /* The branch was failed to be placed in row ii - 1. | |
1067 | Put it back in it's original place in the partial | |
1068 | schedualing. */ | |
1069 | set_must_precede_follow (&tmp_follow, must_follow, &tmp_precede, | |
1070 | must_precede, branch_cycle, start, end, | |
1071 | step); | |
1072 | success = | |
7282ef12 | 1073 | try_scheduling_node_in_cycle (ps, g->closing_branch->cuid, |
a5ea7ace | 1074 | branch_cycle, sched_nodes, |
1075 | &num_splits, tmp_precede, | |
1076 | tmp_follow); | |
1077 | gcc_assert (success && (num_splits == 0)); | |
1078 | ok = false; | |
1079 | } | |
1080 | else | |
1081 | { | |
1082 | /* The branch is placed in row ii - 1. */ | |
1083 | if (dump_file) | |
1084 | fprintf (dump_file, | |
1085 | "SMS success in moving branch to cycle %d\n", c); | |
1086 | ||
7282ef12 | 1087 | update_node_sched_params (g->closing_branch->cuid, ii, c, |
a5ea7ace | 1088 | PS_MIN_CYCLE (ps)); |
1089 | ok = true; | |
1090 | } | |
1091 | ||
1092 | free (must_precede); | |
1093 | free (must_follow); | |
1094 | } | |
1095 | ||
1096 | clear: | |
1097 | free (sched_nodes); | |
1098 | return ok; | |
1099 | } | |
1100 | ||
5b6269ed | 1101 | static void |
1102 | duplicate_insns_of_cycles (partial_schedule_ptr ps, int from_stage, | |
e9df34d5 | 1103 | int to_stage, rtx count_reg) |
5b6269ed | 1104 | { |
1105 | int row; | |
1106 | ps_insn_ptr ps_ij; | |
1107 | ||
1108 | for (row = 0; row < ps->ii; row++) | |
1109 | for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row) | |
1110 | { | |
7282ef12 | 1111 | int u = ps_ij->id; |
e9df34d5 | 1112 | int first_u, last_u; |
7282ef12 | 1113 | rtx u_insn; |
5b6269ed | 1114 | |
7bfc9b7c | 1115 | /* Do not duplicate any insn which refers to count_reg as it |
1116 | belongs to the control part. | |
6f7f081f | 1117 | The closing branch is scheduled as well and thus should |
1118 | be ignored. | |
7bfc9b7c | 1119 | TODO: This should be done by analyzing the control part of |
1120 | the loop. */ | |
7282ef12 | 1121 | u_insn = ps_rtl_insn (ps, u); |
1122 | if (reg_mentioned_p (count_reg, u_insn) | |
1123 | || JUMP_P (u_insn)) | |
7bfc9b7c | 1124 | continue; |
1125 | ||
e9df34d5 | 1126 | first_u = SCHED_STAGE (u); |
1127 | last_u = first_u + ps_num_consecutive_stages (ps, u) - 1; | |
1128 | if (from_stage <= last_u && to_stage >= first_u) | |
5b6269ed | 1129 | { |
e9df34d5 | 1130 | if (u < ps->g->num_nodes) |
1131 | duplicate_insn_chain (ps_first_note (ps, u), u_insn); | |
1132 | else | |
1133 | emit_insn (copy_rtx (PATTERN (u_insn))); | |
5b6269ed | 1134 | } |
5b6269ed | 1135 | } |
1136 | } | |
1137 | ||
1138 | ||
1139 | /* Generate the instructions (including reg_moves) for prolog & epilog. */ | |
1140 | static void | |
7bfc9b7c | 1141 | generate_prolog_epilog (partial_schedule_ptr ps, struct loop *loop, |
1142 | rtx count_reg, rtx count_init) | |
5b6269ed | 1143 | { |
1144 | int i; | |
1145 | int last_stage = PS_STAGE_COUNT (ps) - 1; | |
1146 | edge e; | |
48e1416a | 1147 | |
5b6269ed | 1148 | /* Generate the prolog, inserting its insns on the loop-entry edge. */ |
1149 | start_sequence (); | |
1150 | ||
7bfc9b7c | 1151 | if (!count_init) |
1152 | { | |
1153 | /* Generate instructions at the beginning of the prolog to | |
1154 | adjust the loop count by STAGE_COUNT. If loop count is constant | |
1155 | (count_init), this constant is adjusted by STAGE_COUNT in | |
1156 | generate_prolog_epilog function. */ | |
1157 | rtx sub_reg = NULL_RTX; | |
1158 | ||
1159 | sub_reg = expand_simple_binop (GET_MODE (count_reg), MINUS, | |
1160 | count_reg, GEN_INT (last_stage), | |
1161 | count_reg, 1, OPTAB_DIRECT); | |
1162 | gcc_assert (REG_P (sub_reg)); | |
1163 | if (REGNO (sub_reg) != REGNO (count_reg)) | |
1164 | emit_move_insn (count_reg, sub_reg); | |
1165 | } | |
5b6269ed | 1166 | |
1167 | for (i = 0; i < last_stage; i++) | |
e9df34d5 | 1168 | duplicate_insns_of_cycles (ps, 0, i, count_reg); |
48e1416a | 1169 | |
88e6f696 | 1170 | /* Put the prolog on the entry edge. */ |
b6a75366 | 1171 | e = loop_preheader_edge (loop); |
d4473c84 | 1172 | split_edge_and_insert (e, get_insns ()); |
6c3ff102 | 1173 | if (!flag_resched_modulo_sched) |
1174 | e->dest->flags |= BB_DISABLE_SCHEDULE; | |
b6a75366 | 1175 | |
5b6269ed | 1176 | end_sequence (); |
1177 | ||
1178 | /* Generate the epilog, inserting its insns on the loop-exit edge. */ | |
1179 | start_sequence (); | |
1180 | ||
1181 | for (i = 0; i < last_stage; i++) | |
e9df34d5 | 1182 | duplicate_insns_of_cycles (ps, i + 1, last_stage, count_reg); |
48e1416a | 1183 | |
88e6f696 | 1184 | /* Put the epilogue on the exit edge. */ |
d9e7e1a2 | 1185 | gcc_assert (single_exit (loop)); |
1186 | e = single_exit (loop); | |
d4473c84 | 1187 | split_edge_and_insert (e, get_insns ()); |
6c3ff102 | 1188 | if (!flag_resched_modulo_sched) |
1189 | e->dest->flags |= BB_DISABLE_SCHEDULE; | |
1190 | ||
b6a75366 | 1191 | end_sequence (); |
1192 | } | |
1193 | ||
6c3ff102 | 1194 | /* Mark LOOP as software pipelined so the later |
1195 | scheduling passes don't touch it. */ | |
1196 | static void | |
1197 | mark_loop_unsched (struct loop *loop) | |
1198 | { | |
1199 | unsigned i; | |
1200 | basic_block *bbs = get_loop_body (loop); | |
1201 | ||
1202 | for (i = 0; i < loop->num_nodes; i++) | |
1203 | bbs[i]->flags |= BB_DISABLE_SCHEDULE; | |
eb05e398 | 1204 | |
1205 | free (bbs); | |
6c3ff102 | 1206 | } |
1207 | ||
b6a75366 | 1208 | /* Return true if all the BBs of the loop are empty except the |
1209 | loop header. */ | |
1210 | static bool | |
1211 | loop_single_full_bb_p (struct loop *loop) | |
1212 | { | |
1213 | unsigned i; | |
1214 | basic_block *bbs = get_loop_body (loop); | |
1215 | ||
1216 | for (i = 0; i < loop->num_nodes ; i++) | |
5b6269ed | 1217 | { |
b6a75366 | 1218 | rtx head, tail; |
1219 | bool empty_bb = true; | |
1220 | ||
1221 | if (bbs[i] == loop->header) | |
1222 | continue; | |
1223 | ||
1224 | /* Make sure that basic blocks other than the header | |
1225 | have only notes labels or jumps. */ | |
6a1cdb4d | 1226 | get_ebb_head_tail (bbs[i], bbs[i], &head, &tail); |
b6a75366 | 1227 | for (; head != NEXT_INSN (tail); head = NEXT_INSN (head)) |
1228 | { | |
1229 | if (NOTE_P (head) || LABEL_P (head) | |
9845d120 | 1230 | || (INSN_P (head) && (DEBUG_INSN_P (head) || JUMP_P (head)))) |
b6a75366 | 1231 | continue; |
1232 | empty_bb = false; | |
1233 | break; | |
1234 | } | |
1235 | ||
1236 | if (! empty_bb) | |
1237 | { | |
1238 | free (bbs); | |
1239 | return false; | |
1240 | } | |
1241 | } | |
1242 | free (bbs); | |
1243 | return true; | |
1244 | } | |
5b6269ed | 1245 | |
56134a9f | 1246 | /* Dump file:line from INSN's location info to dump_file. */ |
1247 | ||
1248 | static void | |
5169661d | 1249 | dump_insn_location (rtx insn) |
56134a9f | 1250 | { |
5169661d | 1251 | if (dump_file && INSN_LOCATION (insn)) |
56134a9f | 1252 | { |
1253 | const char *file = insn_file (insn); | |
1254 | if (file) | |
1255 | fprintf (dump_file, " %s:%i", file, insn_line (insn)); | |
1256 | } | |
1257 | } | |
1258 | ||
b6a75366 | 1259 | /* A simple loop from SMS point of view; it is a loop that is composed of |
1260 | either a single basic block or two BBs - a header and a latch. */ | |
1261 | #define SIMPLE_SMS_LOOP_P(loop) ((loop->num_nodes < 3 ) \ | |
1262 | && (EDGE_COUNT (loop->latch->preds) == 1) \ | |
1263 | && (EDGE_COUNT (loop->latch->succs) == 1)) | |
5b6269ed | 1264 | |
b6a75366 | 1265 | /* Return true if the loop is in its canonical form and false if not. |
1266 | i.e. SIMPLE_SMS_LOOP_P and have one preheader block, and single exit. */ | |
1267 | static bool | |
3f5be5f4 | 1268 | loop_canon_p (struct loop *loop) |
b6a75366 | 1269 | { |
5b6269ed | 1270 | |
9e3536f4 | 1271 | if (loop->inner || !loop_outer (loop)) |
7707ba40 | 1272 | { |
1273 | if (dump_file) | |
1274 | fprintf (dump_file, "SMS loop inner or !loop_outer\n"); | |
b6a75366 | 1275 | return false; |
7707ba40 | 1276 | } |
5b6269ed | 1277 | |
d9e7e1a2 | 1278 | if (!single_exit (loop)) |
b6a75366 | 1279 | { |
1280 | if (dump_file) | |
1281 | { | |
3953ee1c | 1282 | rtx insn = BB_END (loop->header); |
48e1416a | 1283 | |
56134a9f | 1284 | fprintf (dump_file, "SMS loop many exits"); |
5169661d | 1285 | dump_insn_location (insn); |
56134a9f | 1286 | fprintf (dump_file, "\n"); |
b6a75366 | 1287 | } |
1288 | return false; | |
1289 | } | |
5b6269ed | 1290 | |
b6a75366 | 1291 | if (! SIMPLE_SMS_LOOP_P (loop) && ! loop_single_full_bb_p (loop)) |
1292 | { | |
1293 | if (dump_file) | |
1294 | { | |
3953ee1c | 1295 | rtx insn = BB_END (loop->header); |
48e1416a | 1296 | |
56134a9f | 1297 | fprintf (dump_file, "SMS loop many BBs."); |
5169661d | 1298 | dump_insn_location (insn); |
56134a9f | 1299 | fprintf (dump_file, "\n"); |
b6a75366 | 1300 | } |
1301 | return false; | |
5b6269ed | 1302 | } |
1303 | ||
b6a75366 | 1304 | return true; |
1305 | } | |
5b6269ed | 1306 | |
b6a75366 | 1307 | /* If there are more than one entry for the loop, |
1308 | make it one by splitting the first entry edge and | |
1309 | redirecting the others to the new BB. */ | |
1310 | static void | |
1311 | canon_loop (struct loop *loop) | |
1312 | { | |
1313 | edge e; | |
1314 | edge_iterator i; | |
5b6269ed | 1315 | |
b6a75366 | 1316 | /* Avoid annoying special cases of edges going to exit |
1317 | block. */ | |
1318 | FOR_EACH_EDGE (e, i, EXIT_BLOCK_PTR->preds) | |
1319 | if ((e->flags & EDGE_FALLTHRU) && (EDGE_COUNT (e->src->succs) > 1)) | |
88e6f696 | 1320 | split_edge (e); |
5b6269ed | 1321 | |
b6a75366 | 1322 | if (loop->latch == loop->header |
1323 | || EDGE_COUNT (loop->latch->succs) > 1) | |
5b6269ed | 1324 | { |
b6a75366 | 1325 | FOR_EACH_EDGE (e, i, loop->header->preds) |
1326 | if (e->src == loop->latch) | |
1327 | break; | |
88e6f696 | 1328 | split_edge (e); |
5b6269ed | 1329 | } |
1330 | } | |
1331 | ||
e1ab7874 | 1332 | /* Setup infos. */ |
1333 | static void | |
1334 | setup_sched_infos (void) | |
1335 | { | |
1336 | memcpy (&sms_common_sched_info, &haifa_common_sched_info, | |
1337 | sizeof (sms_common_sched_info)); | |
1338 | sms_common_sched_info.sched_pass_id = SCHED_SMS_PASS; | |
1339 | common_sched_info = &sms_common_sched_info; | |
1340 | ||
1341 | sched_deps_info = &sms_sched_deps_info; | |
1342 | current_sched_info = &sms_sched_info; | |
1343 | } | |
1344 | ||
7cef6c97 | 1345 | /* Probability in % that the sms-ed loop rolls enough so that optimized |
1346 | version may be entered. Just a guess. */ | |
1347 | #define PROB_SMS_ENOUGH_ITERATIONS 80 | |
1348 | ||
896dbaed | 1349 | /* Used to calculate the upper bound of ii. */ |
1350 | #define MAXII_FACTOR 2 | |
1351 | ||
5b6269ed | 1352 | /* Main entry point, perform SMS scheduling on the loops of the function |
1353 | that consist of single basic blocks. */ | |
73b62548 | 1354 | static void |
3f5be5f4 | 1355 | sms_schedule (void) |
5b6269ed | 1356 | { |
5b6269ed | 1357 | rtx insn; |
1358 | ddg_ptr *g_arr, g; | |
5b6269ed | 1359 | int * node_order; |
c0fb94bd | 1360 | int maxii, max_asap; |
17519ba0 | 1361 | loop_iterator li; |
5b6269ed | 1362 | partial_schedule_ptr ps; |
b6a75366 | 1363 | basic_block bb = NULL; |
7cef6c97 | 1364 | struct loop *loop; |
b6a75366 | 1365 | basic_block condition_bb = NULL; |
1366 | edge latch_edge; | |
1367 | gcov_type trip_count = 0; | |
1368 | ||
88e6f696 | 1369 | loop_optimizer_init (LOOPS_HAVE_PREHEADERS |
dce58e66 | 1370 | | LOOPS_HAVE_RECORDED_EXITS); |
7a3bf727 | 1371 | if (number_of_loops () <= 1) |
1372 | { | |
1373 | loop_optimizer_finalize (); | |
1374 | return; /* There are no loops to schedule. */ | |
1375 | } | |
b6a75366 | 1376 | |
5b6269ed | 1377 | /* Initialize issue_rate. */ |
1378 | if (targetm.sched.issue_rate) | |
1379 | { | |
1380 | int temp = reload_completed; | |
1381 | ||
1382 | reload_completed = 1; | |
ffa47ae0 | 1383 | issue_rate = targetm.sched.issue_rate (); |
5b6269ed | 1384 | reload_completed = temp; |
1385 | } | |
1386 | else | |
1387 | issue_rate = 1; | |
1388 | ||
2c763ed4 | 1389 | /* Initialize the scheduler. */ |
e1ab7874 | 1390 | setup_sched_infos (); |
1391 | haifa_sched_init (); | |
02a8ad7e | 1392 | |
b6a75366 | 1393 | /* Allocate memory to hold the DDG array one entry for each loop. |
1394 | We use loop->num as index into this array. */ | |
17519ba0 | 1395 | g_arr = XCNEWVEC (ddg_ptr, number_of_loops ()); |
5b6269ed | 1396 | |
7707ba40 | 1397 | if (dump_file) |
1398 | { | |
1399 | fprintf (dump_file, "\n\nSMS analysis phase\n"); | |
1400 | fprintf (dump_file, "===================\n\n"); | |
1401 | } | |
1402 | ||
5b6269ed | 1403 | /* Build DDGs for all the relevant loops and hold them in G_ARR |
b6a75366 | 1404 | indexed by the loop index. */ |
17519ba0 | 1405 | FOR_EACH_LOOP (li, loop, 0) |
5b6269ed | 1406 | { |
1407 | rtx head, tail; | |
fc2abfd3 | 1408 | rtx count_reg; |
5b6269ed | 1409 | |
b6a75366 | 1410 | /* For debugging. */ |
76aaf9f0 | 1411 | if (dbg_cnt (sms_sched_loop) == false) |
b6a75366 | 1412 | { |
1413 | if (dump_file) | |
76aaf9f0 | 1414 | fprintf (dump_file, "SMS reached max limit... \n"); |
5b6269ed | 1415 | |
83b709f2 | 1416 | FOR_EACH_LOOP_BREAK (li); |
b6a75366 | 1417 | } |
5b6269ed | 1418 | |
7707ba40 | 1419 | if (dump_file) |
56134a9f | 1420 | { |
1421 | rtx insn = BB_END (loop->header); | |
7707ba40 | 1422 | |
56134a9f | 1423 | fprintf (dump_file, "SMS loop num: %d", loop->num); |
5169661d | 1424 | dump_insn_location (insn); |
56134a9f | 1425 | fprintf (dump_file, "\n"); |
1426 | } | |
7707ba40 | 1427 | |
3f5be5f4 | 1428 | if (! loop_canon_p (loop)) |
b6a75366 | 1429 | continue; |
5b6269ed | 1430 | |
b6a75366 | 1431 | if (! loop_single_full_bb_p (loop)) |
7707ba40 | 1432 | { |
1433 | if (dump_file) | |
1434 | fprintf (dump_file, "SMS not loop_single_full_bb_p\n"); | |
5b6269ed | 1435 | continue; |
7707ba40 | 1436 | } |
5b6269ed | 1437 | |
b6a75366 | 1438 | bb = loop->header; |
5b6269ed | 1439 | |
6a1cdb4d | 1440 | get_ebb_head_tail (bb, bb, &head, &tail); |
b6a75366 | 1441 | latch_edge = loop_latch_edge (loop); |
d9e7e1a2 | 1442 | gcc_assert (single_exit (loop)); |
1443 | if (single_exit (loop)->count) | |
1444 | trip_count = latch_edge->count / single_exit (loop)->count; | |
5b6269ed | 1445 | |
f0b5f617 | 1446 | /* Perform SMS only on loops that their average count is above threshold. */ |
b6a75366 | 1447 | |
1448 | if ( latch_edge->count | |
d9e7e1a2 | 1449 | && (latch_edge->count < single_exit (loop)->count * SMS_LOOP_AVERAGE_COUNT_THRESHOLD)) |
b6a75366 | 1450 | { |
3f5be5f4 | 1451 | if (dump_file) |
5b6269ed | 1452 | { |
5169661d | 1453 | dump_insn_location (tail); |
56134a9f | 1454 | fprintf (dump_file, "\nSMS single-bb-loop\n"); |
5b6269ed | 1455 | if (profile_info && flag_branch_probabilities) |
1456 | { | |
3f5be5f4 | 1457 | fprintf (dump_file, "SMS loop-count "); |
1458 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1459 | (HOST_WIDEST_INT) bb->count); |
3f5be5f4 | 1460 | fprintf (dump_file, "\n"); |
1461 | fprintf (dump_file, "SMS trip-count "); | |
1462 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
b6a75366 | 1463 | (HOST_WIDEST_INT) trip_count); |
3f5be5f4 | 1464 | fprintf (dump_file, "\n"); |
1465 | fprintf (dump_file, "SMS profile-sum-max "); | |
1466 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1467 | (HOST_WIDEST_INT) profile_info->sum_max); |
3f5be5f4 | 1468 | fprintf (dump_file, "\n"); |
5b6269ed | 1469 | } |
1470 | } | |
1471 | continue; | |
1472 | } | |
1473 | ||
1474 | /* Make sure this is a doloop. */ | |
7bfc9b7c | 1475 | if ( !(count_reg = doloop_register_get (head, tail))) |
7707ba40 | 1476 | { |
1477 | if (dump_file) | |
1478 | fprintf (dump_file, "SMS doloop_register_get failed\n"); | |
5b6269ed | 1479 | continue; |
7707ba40 | 1480 | } |
5b6269ed | 1481 | |
2917ecd3 | 1482 | /* Don't handle BBs with calls or barriers |
90c2bcf0 | 1483 | or !single_set with the exception of instructions that include |
1484 | count_reg---these instructions are part of the control part | |
1485 | that do-loop recognizes. | |
7bfc9b7c | 1486 | ??? Should handle insns defining subregs. */ |
1487 | for (insn = head; insn != NEXT_INSN (tail); insn = NEXT_INSN (insn)) | |
1488 | { | |
1489 | rtx set; | |
1490 | ||
1491 | if (CALL_P (insn) | |
1492 | || BARRIER_P (insn) | |
9845d120 | 1493 | || (NONDEBUG_INSN_P (insn) && !JUMP_P (insn) |
90c2bcf0 | 1494 | && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE |
1495 | && !reg_mentioned_p (count_reg, insn)) | |
7bfc9b7c | 1496 | || (INSN_P (insn) && (set = single_set (insn)) |
1497 | && GET_CODE (SET_DEST (set)) == SUBREG)) | |
1498 | break; | |
1499 | } | |
5b6269ed | 1500 | |
1501 | if (insn != NEXT_INSN (tail)) | |
1502 | { | |
3f5be5f4 | 1503 | if (dump_file) |
5b6269ed | 1504 | { |
6d7dc5b9 | 1505 | if (CALL_P (insn)) |
3f5be5f4 | 1506 | fprintf (dump_file, "SMS loop-with-call\n"); |
6d7dc5b9 | 1507 | else if (BARRIER_P (insn)) |
3f5be5f4 | 1508 | fprintf (dump_file, "SMS loop-with-barrier\n"); |
9845d120 | 1509 | else if ((NONDEBUG_INSN_P (insn) && !JUMP_P (insn) |
7bfc9b7c | 1510 | && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE)) |
1511 | fprintf (dump_file, "SMS loop-with-not-single-set\n"); | |
1512 | else | |
1513 | fprintf (dump_file, "SMS loop with subreg in lhs\n"); | |
3f5be5f4 | 1514 | print_rtl_single (dump_file, insn); |
5b6269ed | 1515 | } |
1516 | ||
1517 | continue; | |
1518 | } | |
1519 | ||
6f7f081f | 1520 | /* Always schedule the closing branch with the rest of the |
1521 | instructions. The branch is rotated to be in row ii-1 at the | |
1522 | end of the scheduling procedure to make sure it's the last | |
1523 | instruction in the iteration. */ | |
1524 | if (! (g = create_ddg (bb, 1))) | |
5b6269ed | 1525 | { |
3f5be5f4 | 1526 | if (dump_file) |
34c7f568 | 1527 | fprintf (dump_file, "SMS create_ddg failed\n"); |
5b6269ed | 1528 | continue; |
1529 | } | |
1530 | ||
17519ba0 | 1531 | g_arr[loop->num] = g; |
7707ba40 | 1532 | if (dump_file) |
1533 | fprintf (dump_file, "...OK\n"); | |
1534 | ||
5b6269ed | 1535 | } |
7707ba40 | 1536 | if (dump_file) |
1537 | { | |
1538 | fprintf (dump_file, "\nSMS transformation phase\n"); | |
1539 | fprintf (dump_file, "=========================\n\n"); | |
1540 | } | |
5b6269ed | 1541 | |
b6a75366 | 1542 | /* We don't want to perform SMS on new loops - created by versioning. */ |
3bbbcdff | 1543 | FOR_EACH_LOOP (li, loop, 0) |
5b6269ed | 1544 | { |
1545 | rtx head, tail; | |
fc2abfd3 | 1546 | rtx count_reg, count_init; |
e9df34d5 | 1547 | int mii, rec_mii, stage_count, min_cycle; |
5b6269ed | 1548 | HOST_WIDEST_INT loop_count = 0; |
0b79ae60 | 1549 | bool opt_sc_p; |
5b6269ed | 1550 | |
17519ba0 | 1551 | if (! (g = g_arr[loop->num])) |
5b6269ed | 1552 | continue; |
1553 | ||
1554 | if (dump_file) | |
56134a9f | 1555 | { |
1556 | rtx insn = BB_END (loop->header); | |
7707ba40 | 1557 | |
56134a9f | 1558 | fprintf (dump_file, "SMS loop num: %d", loop->num); |
5169661d | 1559 | dump_insn_location (insn); |
56134a9f | 1560 | fprintf (dump_file, "\n"); |
7707ba40 | 1561 | |
56134a9f | 1562 | print_ddg (dump_file, g); |
1563 | } | |
5b6269ed | 1564 | |
6a1cdb4d | 1565 | get_ebb_head_tail (loop->header, loop->header, &head, &tail); |
5b6269ed | 1566 | |
b6a75366 | 1567 | latch_edge = loop_latch_edge (loop); |
d9e7e1a2 | 1568 | gcc_assert (single_exit (loop)); |
1569 | if (single_exit (loop)->count) | |
1570 | trip_count = latch_edge->count / single_exit (loop)->count; | |
5b6269ed | 1571 | |
3f5be5f4 | 1572 | if (dump_file) |
5b6269ed | 1573 | { |
5169661d | 1574 | dump_insn_location (tail); |
56134a9f | 1575 | fprintf (dump_file, "\nSMS single-bb-loop\n"); |
5b6269ed | 1576 | if (profile_info && flag_branch_probabilities) |
1577 | { | |
3f5be5f4 | 1578 | fprintf (dump_file, "SMS loop-count "); |
1579 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1580 | (HOST_WIDEST_INT) bb->count); |
3f5be5f4 | 1581 | fprintf (dump_file, "\n"); |
1582 | fprintf (dump_file, "SMS profile-sum-max "); | |
1583 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1584 | (HOST_WIDEST_INT) profile_info->sum_max); |
3f5be5f4 | 1585 | fprintf (dump_file, "\n"); |
5b6269ed | 1586 | } |
3f5be5f4 | 1587 | fprintf (dump_file, "SMS doloop\n"); |
1588 | fprintf (dump_file, "SMS built-ddg %d\n", g->num_nodes); | |
1589 | fprintf (dump_file, "SMS num-loads %d\n", g->num_loads); | |
1590 | fprintf (dump_file, "SMS num-stores %d\n", g->num_stores); | |
5b6269ed | 1591 | } |
1592 | ||
5b6269ed | 1593 | |
b6a75366 | 1594 | /* In case of th loop have doloop register it gets special |
1595 | handling. */ | |
1596 | count_init = NULL_RTX; | |
7bfc9b7c | 1597 | if ((count_reg = doloop_register_get (head, tail))) |
b6a75366 | 1598 | { |
1599 | basic_block pre_header; | |
1600 | ||
1601 | pre_header = loop_preheader_edge (loop)->src; | |
1602 | count_init = const_iteration_count (count_reg, pre_header, | |
1603 | &loop_count); | |
1604 | } | |
1605 | gcc_assert (count_reg); | |
5b6269ed | 1606 | |
3f5be5f4 | 1607 | if (dump_file && count_init) |
5b6269ed | 1608 | { |
3f5be5f4 | 1609 | fprintf (dump_file, "SMS const-doloop "); |
1610 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
b6a75366 | 1611 | loop_count); |
3f5be5f4 | 1612 | fprintf (dump_file, "\n"); |
5b6269ed | 1613 | } |
1614 | ||
4c36ffe6 | 1615 | node_order = XNEWVEC (int, g->num_nodes); |
5b6269ed | 1616 | |
1617 | mii = 1; /* Need to pass some estimate of mii. */ | |
c0fb94bd | 1618 | rec_mii = sms_order_nodes (g, mii, node_order, &max_asap); |
5b6269ed | 1619 | mii = MAX (res_MII (g), rec_mii); |
c0fb94bd | 1620 | maxii = MAX (max_asap, MAXII_FACTOR * mii); |
5b6269ed | 1621 | |
3f5be5f4 | 1622 | if (dump_file) |
1623 | fprintf (dump_file, "SMS iis %d %d %d (rec_mii, mii, maxii)\n", | |
5b6269ed | 1624 | rec_mii, mii, maxii); |
1625 | ||
0b79ae60 | 1626 | for (;;) |
a5ea7ace | 1627 | { |
0b79ae60 | 1628 | set_node_sched_params (g); |
1629 | ||
1630 | stage_count = 0; | |
1631 | opt_sc_p = false; | |
1632 | ps = sms_schedule_by_order (g, mii, maxii, node_order); | |
1633 | ||
1634 | if (ps) | |
a5ea7ace | 1635 | { |
0b79ae60 | 1636 | /* Try to achieve optimized SC by normalizing the partial |
1637 | schedule (having the cycles start from cycle zero). | |
1638 | The branch location must be placed in row ii-1 in the | |
1639 | final scheduling. If failed, shift all instructions to | |
1640 | position the branch in row ii-1. */ | |
1641 | opt_sc_p = optimize_sc (ps, g); | |
1642 | if (opt_sc_p) | |
1643 | stage_count = calculate_stage_count (ps, 0); | |
1644 | else | |
1645 | { | |
1646 | /* Bring the branch to cycle ii-1. */ | |
1647 | int amount = (SCHED_TIME (g->closing_branch->cuid) | |
1648 | - (ps->ii - 1)); | |
1649 | ||
1650 | if (dump_file) | |
1651 | fprintf (dump_file, "SMS schedule branch at cycle ii-1\n"); | |
1652 | ||
1653 | stage_count = calculate_stage_count (ps, amount); | |
1654 | } | |
1655 | ||
1656 | gcc_assert (stage_count >= 1); | |
a5ea7ace | 1657 | } |
0b79ae60 | 1658 | |
1659 | /* The default value of PARAM_SMS_MIN_SC is 2 as stage count of | |
1660 | 1 means that there is no interleaving between iterations thus | |
1661 | we let the scheduling passes do the job in this case. */ | |
e9df34d5 | 1662 | if (stage_count < PARAM_VALUE (PARAM_SMS_MIN_SC) |
0b79ae60 | 1663 | || (count_init && (loop_count <= stage_count)) |
1664 | || (flag_branch_probabilities && (trip_count <= stage_count))) | |
b6a75366 | 1665 | { |
0b79ae60 | 1666 | if (dump_file) |
1667 | { | |
1668 | fprintf (dump_file, "SMS failed... \n"); | |
1669 | fprintf (dump_file, "SMS sched-failed (stage-count=%d," | |
1670 | " loop-count=", stage_count); | |
1671 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, loop_count); | |
1672 | fprintf (dump_file, ", trip-count="); | |
1673 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, trip_count); | |
1674 | fprintf (dump_file, ")\n"); | |
1675 | } | |
1676 | break; | |
b6a75366 | 1677 | } |
0b79ae60 | 1678 | |
a5ea7ace | 1679 | if (!opt_sc_p) |
1680 | { | |
1681 | /* Rotate the partial schedule to have the branch in row ii-1. */ | |
7282ef12 | 1682 | int amount = SCHED_TIME (g->closing_branch->cuid) - (ps->ii - 1); |
a5ea7ace | 1683 | |
1684 | reset_sched_times (ps, amount); | |
1685 | rotate_partial_schedule (ps, amount); | |
1686 | } | |
6f7f081f | 1687 | |
6f7f081f | 1688 | set_columns_for_ps (ps); |
5b6269ed | 1689 | |
e9df34d5 | 1690 | min_cycle = PS_MIN_CYCLE (ps) - SMODULO (PS_MIN_CYCLE (ps), ps->ii); |
0b79ae60 | 1691 | if (!schedule_reg_moves (ps)) |
1692 | { | |
1693 | mii = ps->ii + 1; | |
1694 | free_partial_schedule (ps); | |
1695 | continue; | |
1696 | } | |
1697 | ||
e9df34d5 | 1698 | /* Moves that handle incoming values might have been added |
1699 | to a new first stage. Bump the stage count if so. | |
1700 | ||
1701 | ??? Perhaps we could consider rotating the schedule here | |
1702 | instead? */ | |
1703 | if (PS_MIN_CYCLE (ps) < min_cycle) | |
1704 | { | |
1705 | reset_sched_times (ps, 0); | |
1706 | stage_count++; | |
1707 | } | |
1708 | ||
1709 | /* The stage count should now be correct without rotation. */ | |
1710 | gcc_checking_assert (stage_count == calculate_stage_count (ps, 0)); | |
1711 | PS_STAGE_COUNT (ps) = stage_count; | |
1712 | ||
6f7f081f | 1713 | canon_loop (loop); |
1714 | ||
1715 | if (dump_file) | |
1716 | { | |
5169661d | 1717 | dump_insn_location (tail); |
56134a9f | 1718 | fprintf (dump_file, " SMS succeeded %d %d (with ii, sc)\n", |
1719 | ps->ii, stage_count); | |
3f5be5f4 | 1720 | print_partial_schedule (ps, dump_file); |
5b6269ed | 1721 | } |
6f7f081f | 1722 | |
896dbaed | 1723 | /* case the BCT count is not known , Do loop-versioning */ |
1724 | if (count_reg && ! count_init) | |
1725 | { | |
1726 | rtx comp_rtx = gen_rtx_fmt_ee (GT, VOIDmode, count_reg, | |
1727 | GEN_INT(stage_count)); | |
1728 | unsigned prob = (PROB_SMS_ENOUGH_ITERATIONS | |
1729 | * REG_BR_PROB_BASE) / 100; | |
1730 | ||
1731 | loop_version (loop, comp_rtx, &condition_bb, | |
1732 | prob, prob, REG_BR_PROB_BASE - prob, | |
1733 | true); | |
1734 | } | |
1735 | ||
1736 | /* Set new iteration count of loop kernel. */ | |
1737 | if (count_reg && count_init) | |
1738 | SET_SRC (single_set (count_init)) = GEN_INT (loop_count | |
1739 | - stage_count + 1); | |
1740 | ||
1741 | /* Now apply the scheduled kernel to the RTL of the loop. */ | |
5b6269ed | 1742 | permute_partial_schedule (ps, g->closing_branch->first_note); |
f045d41d | 1743 | |
896dbaed | 1744 | /* Mark this loop as software pipelined so the later |
6c3ff102 | 1745 | scheduling passes don't touch it. */ |
896dbaed | 1746 | if (! flag_resched_modulo_sched) |
6c3ff102 | 1747 | mark_loop_unsched (loop); |
1748 | ||
896dbaed | 1749 | /* The life-info is not valid any more. */ |
1750 | df_set_bb_dirty (g->bb); | |
f045d41d | 1751 | |
0b79ae60 | 1752 | apply_reg_moves (ps); |
896dbaed | 1753 | if (dump_file) |
0b79ae60 | 1754 | print_node_sched_params (dump_file, g->num_nodes, ps); |
896dbaed | 1755 | /* Generate prolog and epilog. */ |
7bfc9b7c | 1756 | generate_prolog_epilog (ps, loop, count_reg, count_init); |
0b79ae60 | 1757 | break; |
5b6269ed | 1758 | } |
b6a75366 | 1759 | |
5b6269ed | 1760 | free_partial_schedule (ps); |
0b79ae60 | 1761 | VEC_free (node_sched_params, heap, node_sched_param_vec); |
5b6269ed | 1762 | free (node_order); |
1763 | free_ddg (g); | |
1764 | } | |
1765 | ||
3fa19cbb | 1766 | free (g_arr); |
1767 | ||
5b6269ed | 1768 | /* Release scheduler data, needed until now because of DFA. */ |
e1ab7874 | 1769 | haifa_sched_finish (); |
88e6f696 | 1770 | loop_optimizer_finalize (); |
5b6269ed | 1771 | } |
1772 | ||
1773 | /* The SMS scheduling algorithm itself | |
1774 | ----------------------------------- | |
1775 | Input: 'O' an ordered list of insns of a loop. | |
1776 | Output: A scheduling of the loop - kernel, prolog, and epilogue. | |
1777 | ||
1778 | 'Q' is the empty Set | |
1779 | 'PS' is the partial schedule; it holds the currently scheduled nodes with | |
1780 | their cycle/slot. | |
1781 | 'PSP' previously scheduled predecessors. | |
1782 | 'PSS' previously scheduled successors. | |
1783 | 't(u)' the cycle where u is scheduled. | |
1784 | 'l(u)' is the latency of u. | |
1785 | 'd(v,u)' is the dependence distance from v to u. | |
1786 | 'ASAP(u)' the earliest time at which u could be scheduled as computed in | |
1787 | the node ordering phase. | |
1788 | 'check_hardware_resources_conflicts(u, PS, c)' | |
1789 | run a trace around cycle/slot through DFA model | |
1790 | to check resource conflicts involving instruction u | |
1791 | at cycle c given the partial schedule PS. | |
1792 | 'add_to_partial_schedule_at_time(u, PS, c)' | |
1793 | Add the node/instruction u to the partial schedule | |
1794 | PS at time c. | |
1795 | 'calculate_register_pressure(PS)' | |
1796 | Given a schedule of instructions, calculate the register | |
1797 | pressure it implies. One implementation could be the | |
1798 | maximum number of overlapping live ranges. | |
1799 | 'maxRP' The maximum allowed register pressure, it is usually derived from the number | |
1800 | registers available in the hardware. | |
1801 | ||
1802 | 1. II = MII. | |
1803 | 2. PS = empty list | |
1804 | 3. for each node u in O in pre-computed order | |
1805 | 4. if (PSP(u) != Q && PSS(u) == Q) then | |
1806 | 5. Early_start(u) = max ( t(v) + l(v) - d(v,u)*II ) over all every v in PSP(u). | |
1807 | 6. start = Early_start; end = Early_start + II - 1; step = 1 | |
1808 | 11. else if (PSP(u) == Q && PSS(u) != Q) then | |
1809 | 12. Late_start(u) = min ( t(v) - l(v) + d(v,u)*II ) over all every v in PSS(u). | |
1810 | 13. start = Late_start; end = Late_start - II + 1; step = -1 | |
1811 | 14. else if (PSP(u) != Q && PSS(u) != Q) then | |
1812 | 15. Early_start(u) = max ( t(v) + l(v) - d(v,u)*II ) over all every v in PSP(u). | |
1813 | 16. Late_start(u) = min ( t(v) - l(v) + d(v,u)*II ) over all every v in PSS(u). | |
1814 | 17. start = Early_start; | |
1815 | 18. end = min(Early_start + II - 1 , Late_start); | |
1816 | 19. step = 1 | |
1817 | 20. else "if (PSP(u) == Q && PSS(u) == Q)" | |
1818 | 21. start = ASAP(u); end = start + II - 1; step = 1 | |
1819 | 22. endif | |
1820 | ||
1821 | 23. success = false | |
1822 | 24. for (c = start ; c != end ; c += step) | |
1823 | 25. if check_hardware_resources_conflicts(u, PS, c) then | |
1824 | 26. add_to_partial_schedule_at_time(u, PS, c) | |
1825 | 27. success = true | |
1826 | 28. break | |
1827 | 29. endif | |
1828 | 30. endfor | |
1829 | 31. if (success == false) then | |
1830 | 32. II = II + 1 | |
1831 | 33. if (II > maxII) then | |
1832 | 34. finish - failed to schedule | |
1833 | 35. endif | |
1834 | 36. goto 2. | |
1835 | 37. endif | |
1836 | 38. endfor | |
1837 | 39. if (calculate_register_pressure(PS) > maxRP) then | |
1838 | 40. goto 32. | |
1839 | 41. endif | |
1840 | 42. compute epilogue & prologue | |
1841 | 43. finish - succeeded to schedule | |
469e33a0 | 1842 | |
1843 | ??? The algorithm restricts the scheduling window to II cycles. | |
1844 | In rare cases, it may be better to allow windows of II+1 cycles. | |
1845 | The window would then start and end on the same row, but with | |
1846 | different "must precede" and "must follow" requirements. */ | |
5b6269ed | 1847 | |
1848 | /* A limit on the number of cycles that resource conflicts can span. ??? Should | |
1849 | be provided by DFA, and be dependent on the type of insn scheduled. Currently | |
1850 | set to 0 to save compile time. */ | |
1851 | #define DFA_HISTORY SMS_DFA_HISTORY | |
1852 | ||
76387907 | 1853 | /* A threshold for the number of repeated unsuccessful attempts to insert |
1854 | an empty row, before we flush the partial schedule and start over. */ | |
1855 | #define MAX_SPLIT_NUM 10 | |
b6a75366 | 1856 | /* Given the partial schedule PS, this function calculates and returns the |
d90dbd3e | 1857 | cycles in which we can schedule the node with the given index I. |
b6a75366 | 1858 | NOTE: Here we do the backtracking in SMS, in some special cases. We have |
1859 | noticed that there are several cases in which we fail to SMS the loop | |
1860 | because the sched window of a node is empty due to tight data-deps. In | |
d90dbd3e | 1861 | such cases we want to unschedule some of the predecessors/successors |
b6a75366 | 1862 | until we get non-empty scheduling window. It returns -1 if the |
1863 | scheduling window is empty and zero otherwise. */ | |
1864 | ||
1865 | static int | |
a5ea7ace | 1866 | get_sched_window (partial_schedule_ptr ps, ddg_node_ptr u_node, |
0f7b323c | 1867 | sbitmap sched_nodes, int ii, int *start_p, int *step_p, |
1868 | int *end_p) | |
b6a75366 | 1869 | { |
1870 | int start, step, end; | |
0f7b323c | 1871 | int early_start, late_start; |
b6a75366 | 1872 | ddg_edge_ptr e; |
b6a75366 | 1873 | sbitmap psp = sbitmap_alloc (ps->g->num_nodes); |
1874 | sbitmap pss = sbitmap_alloc (ps->g->num_nodes); | |
1875 | sbitmap u_node_preds = NODE_PREDECESSORS (u_node); | |
1876 | sbitmap u_node_succs = NODE_SUCCESSORS (u_node); | |
1877 | int psp_not_empty; | |
1878 | int pss_not_empty; | |
0f7b323c | 1879 | int count_preds; |
1880 | int count_succs; | |
b6a75366 | 1881 | |
1882 | /* 1. compute sched window for u (start, end, step). */ | |
53c5d9d4 | 1883 | bitmap_clear (psp); |
1884 | bitmap_clear (pss); | |
1885 | psp_not_empty = bitmap_and (psp, u_node_preds, sched_nodes); | |
1886 | pss_not_empty = bitmap_and (pss, u_node_succs, sched_nodes); | |
b6a75366 | 1887 | |
0f7b323c | 1888 | /* We first compute a forward range (start <= end), then decide whether |
1889 | to reverse it. */ | |
1890 | early_start = INT_MIN; | |
1891 | late_start = INT_MAX; | |
1892 | start = INT_MIN; | |
1893 | end = INT_MAX; | |
1894 | step = 1; | |
b6a75366 | 1895 | |
0f7b323c | 1896 | count_preds = 0; |
1897 | count_succs = 0; | |
a9ac8caa | 1898 | |
2beb48b8 | 1899 | if (dump_file && (psp_not_empty || pss_not_empty)) |
1900 | { | |
1901 | fprintf (dump_file, "\nAnalyzing dependencies for node %d (INSN %d)" | |
1902 | "; ii = %d\n\n", u_node->cuid, INSN_UID (u_node->insn), ii); | |
1903 | fprintf (dump_file, "%11s %11s %11s %11s %5s\n", | |
1904 | "start", "early start", "late start", "end", "time"); | |
1905 | fprintf (dump_file, "=========== =========== =========== ===========" | |
1906 | " =====\n"); | |
1907 | } | |
0f7b323c | 1908 | /* Calculate early_start and limit end. Both bounds are inclusive. */ |
1909 | if (psp_not_empty) | |
1910 | for (e = u_node->in; e != 0; e = e->next_in) | |
1911 | { | |
7282ef12 | 1912 | int v = e->src->cuid; |
76387907 | 1913 | |
7282ef12 | 1914 | if (TEST_BIT (sched_nodes, v)) |
0f7b323c | 1915 | { |
7282ef12 | 1916 | int p_st = SCHED_TIME (v); |
2beb48b8 | 1917 | int earliest = p_st + e->latency - (e->distance * ii); |
1918 | int latest = (e->data_type == MEM_DEP ? p_st + ii - 1 : INT_MAX); | |
76387907 | 1919 | |
2beb48b8 | 1920 | if (dump_file) |
1921 | { | |
1922 | fprintf (dump_file, "%11s %11d %11s %11d %5d", | |
1923 | "", earliest, "", latest, p_st); | |
1924 | print_ddg_edge (dump_file, e); | |
1925 | fprintf (dump_file, "\n"); | |
1926 | } | |
76387907 | 1927 | |
2beb48b8 | 1928 | early_start = MAX (early_start, earliest); |
1929 | end = MIN (end, latest); | |
b6a75366 | 1930 | |
0f7b323c | 1931 | if (e->type == TRUE_DEP && e->data_type == REG_DEP) |
1932 | count_preds++; | |
0f7b323c | 1933 | } |
0f7b323c | 1934 | } |
fe861e75 | 1935 | |
0f7b323c | 1936 | /* Calculate late_start and limit start. Both bounds are inclusive. */ |
1937 | if (pss_not_empty) | |
1938 | for (e = u_node->out; e != 0; e = e->next_out) | |
1939 | { | |
7282ef12 | 1940 | int v = e->dest->cuid; |
a9ac8caa | 1941 | |
7282ef12 | 1942 | if (TEST_BIT (sched_nodes, v)) |
0f7b323c | 1943 | { |
7282ef12 | 1944 | int s_st = SCHED_TIME (v); |
2beb48b8 | 1945 | int earliest = (e->data_type == MEM_DEP ? s_st - ii + 1 : INT_MIN); |
1946 | int latest = s_st - e->latency + (e->distance * ii); | |
b6a75366 | 1947 | |
2beb48b8 | 1948 | if (dump_file) |
1949 | { | |
1950 | fprintf (dump_file, "%11d %11s %11d %11s %5d", | |
1951 | earliest, "", latest, "", s_st); | |
1952 | print_ddg_edge (dump_file, e); | |
1953 | fprintf (dump_file, "\n"); | |
1954 | } | |
76387907 | 1955 | |
2beb48b8 | 1956 | start = MAX (start, earliest); |
1957 | late_start = MIN (late_start, latest); | |
a9ac8caa | 1958 | |
0f7b323c | 1959 | if (e->type == TRUE_DEP && e->data_type == REG_DEP) |
1960 | count_succs++; | |
0f7b323c | 1961 | } |
0f7b323c | 1962 | } |
a9ac8caa | 1963 | |
2beb48b8 | 1964 | if (dump_file && (psp_not_empty || pss_not_empty)) |
1965 | { | |
1966 | fprintf (dump_file, "----------- ----------- ----------- -----------" | |
1967 | " -----\n"); | |
1968 | fprintf (dump_file, "%11d %11d %11d %11d %5s %s\n", | |
1969 | start, early_start, late_start, end, "", | |
1970 | "(max, max, min, min)"); | |
1971 | } | |
1972 | ||
0f7b323c | 1973 | /* Get a target scheduling window no bigger than ii. */ |
1974 | if (early_start == INT_MIN && late_start == INT_MAX) | |
7282ef12 | 1975 | early_start = NODE_ASAP (u_node); |
0f7b323c | 1976 | else if (early_start == INT_MIN) |
1977 | early_start = late_start - (ii - 1); | |
1978 | late_start = MIN (late_start, early_start + (ii - 1)); | |
a9ac8caa | 1979 | |
0f7b323c | 1980 | /* Apply memory dependence limits. */ |
1981 | start = MAX (start, early_start); | |
1982 | end = MIN (end, late_start); | |
fe861e75 | 1983 | |
2beb48b8 | 1984 | if (dump_file && (psp_not_empty || pss_not_empty)) |
1985 | fprintf (dump_file, "%11s %11d %11d %11s %5s final window\n", | |
1986 | "", start, end, "", ""); | |
1987 | ||
0f7b323c | 1988 | /* If there are at least as many successors as predecessors, schedule the |
1989 | node close to its successors. */ | |
1990 | if (pss_not_empty && count_succs >= count_preds) | |
b6a75366 | 1991 | { |
0f7b323c | 1992 | int tmp = end; |
1993 | end = start; | |
1994 | start = tmp; | |
1995 | step = -1; | |
b6a75366 | 1996 | } |
1997 | ||
0f7b323c | 1998 | /* Now that we've finalized the window, make END an exclusive rather |
1999 | than an inclusive bound. */ | |
2000 | end += step; | |
2001 | ||
b6a75366 | 2002 | *start_p = start; |
2003 | *step_p = step; | |
2004 | *end_p = end; | |
2005 | sbitmap_free (psp); | |
2006 | sbitmap_free (pss); | |
2007 | ||
2008 | if ((start >= end && step == 1) || (start <= end && step == -1)) | |
76387907 | 2009 | { |
2010 | if (dump_file) | |
2011 | fprintf (dump_file, "\nEmpty window: start=%d, end=%d, step=%d\n", | |
2012 | start, end, step); | |
0f7b323c | 2013 | return -1; |
76387907 | 2014 | } |
2015 | ||
0f7b323c | 2016 | return 0; |
b6a75366 | 2017 | } |
2018 | ||
fe861e75 | 2019 | /* Calculate MUST_PRECEDE/MUST_FOLLOW bitmaps of U_NODE; which is the |
2020 | node currently been scheduled. At the end of the calculation | |
84004523 | 2021 | MUST_PRECEDE/MUST_FOLLOW contains all predecessors/successors of |
2022 | U_NODE which are (1) already scheduled in the first/last row of | |
2023 | U_NODE's scheduling window, (2) whose dependence inequality with U | |
2024 | becomes an equality when U is scheduled in this same row, and (3) | |
2025 | whose dependence latency is zero. | |
2026 | ||
c15d54d8 | 2027 | The first and last rows are calculated using the following parameters: |
fe861e75 | 2028 | START/END rows - The cycles that begins/ends the traversal on the window; |
2029 | searching for an empty cycle to schedule U_NODE. | |
2030 | STEP - The direction in which we traverse the window. | |
84004523 | 2031 | II - The initiation interval. */ |
fe861e75 | 2032 | |
2033 | static void | |
2034 | calculate_must_precede_follow (ddg_node_ptr u_node, int start, int end, | |
2035 | int step, int ii, sbitmap sched_nodes, | |
2036 | sbitmap must_precede, sbitmap must_follow) | |
2037 | { | |
2038 | ddg_edge_ptr e; | |
2039 | int first_cycle_in_window, last_cycle_in_window; | |
fe861e75 | 2040 | |
2041 | gcc_assert (must_precede && must_follow); | |
2042 | ||
2043 | /* Consider the following scheduling window: | |
2044 | {first_cycle_in_window, first_cycle_in_window+1, ..., | |
2045 | last_cycle_in_window}. If step is 1 then the following will be | |
2046 | the order we traverse the window: {start=first_cycle_in_window, | |
2047 | first_cycle_in_window+1, ..., end=last_cycle_in_window+1}, | |
2048 | or {start=last_cycle_in_window, last_cycle_in_window-1, ..., | |
2049 | end=first_cycle_in_window-1} if step is -1. */ | |
2050 | first_cycle_in_window = (step == 1) ? start : end - step; | |
2051 | last_cycle_in_window = (step == 1) ? end - step : start; | |
2052 | ||
53c5d9d4 | 2053 | bitmap_clear (must_precede); |
2054 | bitmap_clear (must_follow); | |
fe861e75 | 2055 | |
2056 | if (dump_file) | |
2057 | fprintf (dump_file, "\nmust_precede: "); | |
2058 | ||
84004523 | 2059 | /* Instead of checking if: |
2060 | (SMODULO (SCHED_TIME (e->src), ii) == first_row_in_window) | |
2061 | && ((SCHED_TIME (e->src) + e->latency - (e->distance * ii)) == | |
2062 | first_cycle_in_window) | |
2063 | && e->latency == 0 | |
2064 | we use the fact that latency is non-negative: | |
2065 | SCHED_TIME (e->src) - (e->distance * ii) <= | |
2066 | SCHED_TIME (e->src) + e->latency - (e->distance * ii)) <= | |
2067 | first_cycle_in_window | |
2068 | and check only if | |
2069 | SCHED_TIME (e->src) - (e->distance * ii) == first_cycle_in_window */ | |
fe861e75 | 2070 | for (e = u_node->in; e != 0; e = e->next_in) |
2071 | if (TEST_BIT (sched_nodes, e->src->cuid) | |
7282ef12 | 2072 | && ((SCHED_TIME (e->src->cuid) - (e->distance * ii)) == |
84004523 | 2073 | first_cycle_in_window)) |
fe861e75 | 2074 | { |
2075 | if (dump_file) | |
2076 | fprintf (dump_file, "%d ", e->src->cuid); | |
2077 | ||
2078 | SET_BIT (must_precede, e->src->cuid); | |
2079 | } | |
2080 | ||
2081 | if (dump_file) | |
2082 | fprintf (dump_file, "\nmust_follow: "); | |
2083 | ||
84004523 | 2084 | /* Instead of checking if: |
2085 | (SMODULO (SCHED_TIME (e->dest), ii) == last_row_in_window) | |
2086 | && ((SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) == | |
2087 | last_cycle_in_window) | |
2088 | && e->latency == 0 | |
2089 | we use the fact that latency is non-negative: | |
2090 | SCHED_TIME (e->dest) + (e->distance * ii) >= | |
48e1416a | 2091 | SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) >= |
84004523 | 2092 | last_cycle_in_window |
2093 | and check only if | |
2094 | SCHED_TIME (e->dest) + (e->distance * ii) == last_cycle_in_window */ | |
fe861e75 | 2095 | for (e = u_node->out; e != 0; e = e->next_out) |
2096 | if (TEST_BIT (sched_nodes, e->dest->cuid) | |
7282ef12 | 2097 | && ((SCHED_TIME (e->dest->cuid) + (e->distance * ii)) == |
84004523 | 2098 | last_cycle_in_window)) |
fe861e75 | 2099 | { |
2100 | if (dump_file) | |
2101 | fprintf (dump_file, "%d ", e->dest->cuid); | |
2102 | ||
2103 | SET_BIT (must_follow, e->dest->cuid); | |
2104 | } | |
2105 | ||
2106 | if (dump_file) | |
2107 | fprintf (dump_file, "\n"); | |
2108 | } | |
2109 | ||
2110 | /* Return 1 if U_NODE can be scheduled in CYCLE. Use the following | |
2111 | parameters to decide if that's possible: | |
2112 | PS - The partial schedule. | |
2113 | U - The serial number of U_NODE. | |
f0b5f617 | 2114 | NUM_SPLITS - The number of row splits made so far. |
fe861e75 | 2115 | MUST_PRECEDE - The nodes that must precede U_NODE. (only valid at |
2116 | the first row of the scheduling window) | |
2117 | MUST_FOLLOW - The nodes that must follow U_NODE. (only valid at the | |
2118 | last row of the scheduling window) */ | |
2119 | ||
2120 | static bool | |
7282ef12 | 2121 | try_scheduling_node_in_cycle (partial_schedule_ptr ps, |
34c7f568 | 2122 | int u, int cycle, sbitmap sched_nodes, |
fe861e75 | 2123 | int *num_splits, sbitmap must_precede, |
2124 | sbitmap must_follow) | |
2125 | { | |
2126 | ps_insn_ptr psi; | |
2127 | bool success = 0; | |
2128 | ||
2129 | verify_partial_schedule (ps, sched_nodes); | |
7282ef12 | 2130 | psi = ps_add_node_check_conflicts (ps, u, cycle, must_precede, must_follow); |
fe861e75 | 2131 | if (psi) |
2132 | { | |
7282ef12 | 2133 | SCHED_TIME (u) = cycle; |
fe861e75 | 2134 | SET_BIT (sched_nodes, u); |
2135 | success = 1; | |
2136 | *num_splits = 0; | |
2137 | if (dump_file) | |
34c7f568 | 2138 | fprintf (dump_file, "Scheduled w/o split in %d\n", cycle); |
fe861e75 | 2139 | |
2140 | } | |
2141 | ||
2142 | return success; | |
2143 | } | |
2144 | ||
b6a75366 | 2145 | /* This function implements the scheduling algorithm for SMS according to the |
2146 | above algorithm. */ | |
5b6269ed | 2147 | static partial_schedule_ptr |
3f5be5f4 | 2148 | sms_schedule_by_order (ddg_ptr g, int mii, int maxii, int *nodes_order) |
5b6269ed | 2149 | { |
2150 | int ii = mii; | |
76387907 | 2151 | int i, c, success, num_splits = 0; |
2152 | int flush_and_start_over = true; | |
5b6269ed | 2153 | int num_nodes = g->num_nodes; |
5b6269ed | 2154 | int start, end, step; /* Place together into one struct? */ |
2155 | sbitmap sched_nodes = sbitmap_alloc (num_nodes); | |
f045d41d | 2156 | sbitmap must_precede = sbitmap_alloc (num_nodes); |
2157 | sbitmap must_follow = sbitmap_alloc (num_nodes); | |
b6a75366 | 2158 | sbitmap tobe_scheduled = sbitmap_alloc (num_nodes); |
f045d41d | 2159 | |
5b6269ed | 2160 | partial_schedule_ptr ps = create_partial_schedule (ii, g, DFA_HISTORY); |
2161 | ||
53c5d9d4 | 2162 | bitmap_ones (tobe_scheduled); |
2163 | bitmap_clear (sched_nodes); | |
b6a75366 | 2164 | |
76387907 | 2165 | while (flush_and_start_over && (ii < maxii)) |
5b6269ed | 2166 | { |
b6a75366 | 2167 | |
5b6269ed | 2168 | if (dump_file) |
d4473c84 | 2169 | fprintf (dump_file, "Starting with ii=%d\n", ii); |
76387907 | 2170 | flush_and_start_over = false; |
53c5d9d4 | 2171 | bitmap_clear (sched_nodes); |
5b6269ed | 2172 | |
2173 | for (i = 0; i < num_nodes; i++) | |
2174 | { | |
2175 | int u = nodes_order[i]; | |
b6a75366 | 2176 | ddg_node_ptr u_node = &ps->g->nodes[u]; |
5b6269ed | 2177 | rtx insn = u_node->insn; |
2178 | ||
9845d120 | 2179 | if (!NONDEBUG_INSN_P (insn)) |
5b6269ed | 2180 | { |
b6a75366 | 2181 | RESET_BIT (tobe_scheduled, u); |
2182 | continue; | |
5b6269ed | 2183 | } |
2184 | ||
b6a75366 | 2185 | if (TEST_BIT (sched_nodes, u)) |
2186 | continue; | |
5b6269ed | 2187 | |
b6a75366 | 2188 | /* Try to get non-empty scheduling window. */ |
76387907 | 2189 | success = 0; |
a5ea7ace | 2190 | if (get_sched_window (ps, u_node, sched_nodes, ii, &start, |
76387907 | 2191 | &step, &end) == 0) |
2192 | { | |
2193 | if (dump_file) | |
2beb48b8 | 2194 | fprintf (dump_file, "\nTrying to schedule node %d " |
2195 | "INSN = %d in (%d .. %d) step %d\n", u, (INSN_UID | |
76387907 | 2196 | (g->nodes[u].insn)), start, end, step); |
76387907 | 2197 | |
2198 | gcc_assert ((step > 0 && start < end) | |
2199 | || (step < 0 && start > end)); | |
2200 | ||
fe861e75 | 2201 | calculate_must_precede_follow (u_node, start, end, step, ii, |
2202 | sched_nodes, must_precede, | |
2203 | must_follow); | |
2204 | ||
76387907 | 2205 | for (c = start; c != end; c += step) |
2206 | { | |
a5ea7ace | 2207 | sbitmap tmp_precede, tmp_follow; |
fe861e75 | 2208 | |
a5ea7ace | 2209 | set_must_precede_follow (&tmp_follow, must_follow, |
2210 | &tmp_precede, must_precede, | |
2211 | c, start, end, step); | |
fe861e75 | 2212 | success = |
7282ef12 | 2213 | try_scheduling_node_in_cycle (ps, u, c, |
fe861e75 | 2214 | sched_nodes, |
2215 | &num_splits, tmp_precede, | |
2216 | tmp_follow); | |
2217 | if (success) | |
2218 | break; | |
76387907 | 2219 | } |
fe861e75 | 2220 | |
76387907 | 2221 | verify_partial_schedule (ps, sched_nodes); |
2222 | } | |
2223 | if (!success) | |
2224 | { | |
2225 | int split_row; | |
2226 | ||
2227 | if (ii++ == maxii) | |
2228 | break; | |
2229 | ||
2230 | if (num_splits >= MAX_SPLIT_NUM) | |
2231 | { | |
2232 | num_splits = 0; | |
2233 | flush_and_start_over = true; | |
2234 | verify_partial_schedule (ps, sched_nodes); | |
2235 | reset_partial_schedule (ps, ii); | |
2236 | verify_partial_schedule (ps, sched_nodes); | |
2237 | break; | |
2238 | } | |
2239 | ||
2240 | num_splits++; | |
7af239b5 | 2241 | /* The scheduling window is exclusive of 'end' |
2242 | whereas compute_split_window() expects an inclusive, | |
2243 | ordered range. */ | |
76387907 | 2244 | if (step == 1) |
7af239b5 | 2245 | split_row = compute_split_row (sched_nodes, start, end - 1, |
76387907 | 2246 | ps->ii, u_node); |
2247 | else | |
7af239b5 | 2248 | split_row = compute_split_row (sched_nodes, end + 1, start, |
76387907 | 2249 | ps->ii, u_node); |
b6a75366 | 2250 | |
76387907 | 2251 | ps_insert_empty_row (ps, split_row, sched_nodes); |
2252 | i--; /* Go back and retry node i. */ | |
5b6269ed | 2253 | |
76387907 | 2254 | if (dump_file) |
2255 | fprintf (dump_file, "num_splits=%d\n", num_splits); | |
2256 | } | |
5b6269ed | 2257 | |
76387907 | 2258 | /* ??? If (success), check register pressure estimates. */ |
2259 | } /* Continue with next node. */ | |
2260 | } /* While flush_and_start_over. */ | |
5b6269ed | 2261 | if (ii >= maxii) |
2262 | { | |
2263 | free_partial_schedule (ps); | |
2264 | ps = NULL; | |
2265 | } | |
76387907 | 2266 | else |
53c5d9d4 | 2267 | gcc_assert (bitmap_equal_p (tobe_scheduled, sched_nodes)); |
76387907 | 2268 | |
2269 | sbitmap_free (sched_nodes); | |
2270 | sbitmap_free (must_precede); | |
2271 | sbitmap_free (must_follow); | |
2272 | sbitmap_free (tobe_scheduled); | |
2273 | ||
5b6269ed | 2274 | return ps; |
2275 | } | |
2276 | ||
76387907 | 2277 | /* This function inserts a new empty row into PS at the position |
2278 | according to SPLITROW, keeping all already scheduled instructions | |
2279 | intact and updating their SCHED_TIME and cycle accordingly. */ | |
2280 | static void | |
2281 | ps_insert_empty_row (partial_schedule_ptr ps, int split_row, | |
2282 | sbitmap sched_nodes) | |
2283 | { | |
2284 | ps_insn_ptr crr_insn; | |
2285 | ps_insn_ptr *rows_new; | |
2286 | int ii = ps->ii; | |
2287 | int new_ii = ii + 1; | |
2288 | int row; | |
4815ed0c | 2289 | int *rows_length_new; |
76387907 | 2290 | |
2291 | verify_partial_schedule (ps, sched_nodes); | |
2292 | ||
2293 | /* We normalize sched_time and rotate ps to have only non-negative sched | |
2294 | times, for simplicity of updating cycles after inserting new row. */ | |
2295 | split_row -= ps->min_cycle; | |
2296 | split_row = SMODULO (split_row, ii); | |
2297 | if (dump_file) | |
2298 | fprintf (dump_file, "split_row=%d\n", split_row); | |
2299 | ||
6f7f081f | 2300 | reset_sched_times (ps, PS_MIN_CYCLE (ps)); |
2301 | rotate_partial_schedule (ps, PS_MIN_CYCLE (ps)); | |
76387907 | 2302 | |
2303 | rows_new = (ps_insn_ptr *) xcalloc (new_ii, sizeof (ps_insn_ptr)); | |
4815ed0c | 2304 | rows_length_new = (int *) xcalloc (new_ii, sizeof (int)); |
76387907 | 2305 | for (row = 0; row < split_row; row++) |
2306 | { | |
2307 | rows_new[row] = ps->rows[row]; | |
4815ed0c | 2308 | rows_length_new[row] = ps->rows_length[row]; |
76387907 | 2309 | ps->rows[row] = NULL; |
2310 | for (crr_insn = rows_new[row]; | |
2311 | crr_insn; crr_insn = crr_insn->next_in_row) | |
2312 | { | |
7282ef12 | 2313 | int u = crr_insn->id; |
76387907 | 2314 | int new_time = SCHED_TIME (u) + (SCHED_TIME (u) / ii); |
2315 | ||
2316 | SCHED_TIME (u) = new_time; | |
2317 | crr_insn->cycle = new_time; | |
2318 | SCHED_ROW (u) = new_time % new_ii; | |
2319 | SCHED_STAGE (u) = new_time / new_ii; | |
2320 | } | |
2321 | ||
2322 | } | |
2323 | ||
2324 | rows_new[split_row] = NULL; | |
2325 | ||
2326 | for (row = split_row; row < ii; row++) | |
2327 | { | |
2328 | rows_new[row + 1] = ps->rows[row]; | |
4815ed0c | 2329 | rows_length_new[row + 1] = ps->rows_length[row]; |
76387907 | 2330 | ps->rows[row] = NULL; |
2331 | for (crr_insn = rows_new[row + 1]; | |
2332 | crr_insn; crr_insn = crr_insn->next_in_row) | |
2333 | { | |
7282ef12 | 2334 | int u = crr_insn->id; |
76387907 | 2335 | int new_time = SCHED_TIME (u) + (SCHED_TIME (u) / ii) + 1; |
2336 | ||
2337 | SCHED_TIME (u) = new_time; | |
2338 | crr_insn->cycle = new_time; | |
2339 | SCHED_ROW (u) = new_time % new_ii; | |
2340 | SCHED_STAGE (u) = new_time / new_ii; | |
2341 | } | |
2342 | } | |
2343 | ||
2344 | /* Updating ps. */ | |
2345 | ps->min_cycle = ps->min_cycle + ps->min_cycle / ii | |
2346 | + (SMODULO (ps->min_cycle, ii) >= split_row ? 1 : 0); | |
2347 | ps->max_cycle = ps->max_cycle + ps->max_cycle / ii | |
2348 | + (SMODULO (ps->max_cycle, ii) >= split_row ? 1 : 0); | |
2349 | free (ps->rows); | |
2350 | ps->rows = rows_new; | |
4815ed0c | 2351 | free (ps->rows_length); |
2352 | ps->rows_length = rows_length_new; | |
76387907 | 2353 | ps->ii = new_ii; |
2354 | gcc_assert (ps->min_cycle >= 0); | |
2355 | ||
2356 | verify_partial_schedule (ps, sched_nodes); | |
2357 | ||
2358 | if (dump_file) | |
2359 | fprintf (dump_file, "min_cycle=%d, max_cycle=%d\n", ps->min_cycle, | |
2360 | ps->max_cycle); | |
2361 | } | |
2362 | ||
2363 | /* Given U_NODE which is the node that failed to be scheduled; LOW and | |
2364 | UP which are the boundaries of it's scheduling window; compute using | |
c7684b8e | 2365 | SCHED_NODES and II a row in the partial schedule that can be split |
76387907 | 2366 | which will separate a critical predecessor from a critical successor |
2367 | thereby expanding the window, and return it. */ | |
2368 | static int | |
2369 | compute_split_row (sbitmap sched_nodes, int low, int up, int ii, | |
2370 | ddg_node_ptr u_node) | |
2371 | { | |
2372 | ddg_edge_ptr e; | |
2373 | int lower = INT_MIN, upper = INT_MAX; | |
7282ef12 | 2374 | int crit_pred = -1; |
2375 | int crit_succ = -1; | |
76387907 | 2376 | int crit_cycle; |
2377 | ||
2378 | for (e = u_node->in; e != 0; e = e->next_in) | |
2379 | { | |
7282ef12 | 2380 | int v = e->src->cuid; |
76387907 | 2381 | |
7282ef12 | 2382 | if (TEST_BIT (sched_nodes, v) |
2383 | && (low == SCHED_TIME (v) + e->latency - (e->distance * ii))) | |
2384 | if (SCHED_TIME (v) > lower) | |
76387907 | 2385 | { |
7282ef12 | 2386 | crit_pred = v; |
2387 | lower = SCHED_TIME (v); | |
76387907 | 2388 | } |
2389 | } | |
2390 | ||
7282ef12 | 2391 | if (crit_pred >= 0) |
76387907 | 2392 | { |
2393 | crit_cycle = SCHED_TIME (crit_pred) + 1; | |
2394 | return SMODULO (crit_cycle, ii); | |
2395 | } | |
2396 | ||
2397 | for (e = u_node->out; e != 0; e = e->next_out) | |
2398 | { | |
7282ef12 | 2399 | int v = e->dest->cuid; |
2400 | ||
2401 | if (TEST_BIT (sched_nodes, v) | |
2402 | && (up == SCHED_TIME (v) - e->latency + (e->distance * ii))) | |
2403 | if (SCHED_TIME (v) < upper) | |
76387907 | 2404 | { |
7282ef12 | 2405 | crit_succ = v; |
2406 | upper = SCHED_TIME (v); | |
76387907 | 2407 | } |
2408 | } | |
2409 | ||
7282ef12 | 2410 | if (crit_succ >= 0) |
76387907 | 2411 | { |
2412 | crit_cycle = SCHED_TIME (crit_succ); | |
2413 | return SMODULO (crit_cycle, ii); | |
2414 | } | |
2415 | ||
2416 | if (dump_file) | |
2417 | fprintf (dump_file, "Both crit_pred and crit_succ are NULL\n"); | |
2418 | ||
2419 | return SMODULO ((low + up + 1) / 2, ii); | |
2420 | } | |
2421 | ||
2422 | static void | |
2423 | verify_partial_schedule (partial_schedule_ptr ps, sbitmap sched_nodes) | |
2424 | { | |
2425 | int row; | |
2426 | ps_insn_ptr crr_insn; | |
2427 | ||
2428 | for (row = 0; row < ps->ii; row++) | |
4815ed0c | 2429 | { |
2430 | int length = 0; | |
2431 | ||
2432 | for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) | |
2433 | { | |
7282ef12 | 2434 | int u = crr_insn->id; |
4815ed0c | 2435 | |
2436 | length++; | |
7282ef12 | 2437 | gcc_assert (TEST_BIT (sched_nodes, u)); |
4815ed0c | 2438 | /* ??? Test also that all nodes of sched_nodes are in ps, perhaps by |
2439 | popcount (sched_nodes) == number of insns in ps. */ | |
2440 | gcc_assert (SCHED_TIME (u) >= ps->min_cycle); | |
2441 | gcc_assert (SCHED_TIME (u) <= ps->max_cycle); | |
2442 | } | |
2443 | ||
2444 | gcc_assert (ps->rows_length[row] == length); | |
2445 | } | |
76387907 | 2446 | } |
2447 | ||
5b6269ed | 2448 | \f |
2449 | /* This page implements the algorithm for ordering the nodes of a DDG | |
2450 | for modulo scheduling, activated through the | |
2451 | "int sms_order_nodes (ddg_ptr, int mii, int * result)" API. */ | |
2452 | ||
2453 | #define ORDER_PARAMS(x) ((struct node_order_params *) (x)->aux.info) | |
2454 | #define ASAP(x) (ORDER_PARAMS ((x))->asap) | |
2455 | #define ALAP(x) (ORDER_PARAMS ((x))->alap) | |
2456 | #define HEIGHT(x) (ORDER_PARAMS ((x))->height) | |
2457 | #define MOB(x) (ALAP ((x)) - ASAP ((x))) | |
2458 | #define DEPTH(x) (ASAP ((x))) | |
2459 | ||
2460 | typedef struct node_order_params * nopa; | |
2461 | ||
2462 | static void order_nodes_of_sccs (ddg_all_sccs_ptr, int * result); | |
2463 | static int order_nodes_in_scc (ddg_ptr, sbitmap, sbitmap, int*, int); | |
c0fb94bd | 2464 | static nopa calculate_order_params (ddg_ptr, int, int *); |
5b6269ed | 2465 | static int find_max_asap (ddg_ptr, sbitmap); |
2466 | static int find_max_hv_min_mob (ddg_ptr, sbitmap); | |
2467 | static int find_max_dv_min_mob (ddg_ptr, sbitmap); | |
2468 | ||
2469 | enum sms_direction {BOTTOMUP, TOPDOWN}; | |
2470 | ||
2471 | struct node_order_params | |
2472 | { | |
2473 | int asap; | |
2474 | int alap; | |
2475 | int height; | |
2476 | }; | |
2477 | ||
2478 | /* Check if NODE_ORDER contains a permutation of 0 .. NUM_NODES-1. */ | |
2479 | static void | |
2480 | check_nodes_order (int *node_order, int num_nodes) | |
2481 | { | |
2482 | int i; | |
2483 | sbitmap tmp = sbitmap_alloc (num_nodes); | |
2484 | ||
53c5d9d4 | 2485 | bitmap_clear (tmp); |
5b6269ed | 2486 | |
a9ac8caa | 2487 | if (dump_file) |
2488 | fprintf (dump_file, "SMS final nodes order: \n"); | |
2489 | ||
5b6269ed | 2490 | for (i = 0; i < num_nodes; i++) |
2491 | { | |
2492 | int u = node_order[i]; | |
2493 | ||
a9ac8caa | 2494 | if (dump_file) |
2495 | fprintf (dump_file, "%d ", u); | |
a53ff4c1 | 2496 | gcc_assert (u < num_nodes && u >= 0 && !TEST_BIT (tmp, u)); |
5b6269ed | 2497 | |
2498 | SET_BIT (tmp, u); | |
2499 | } | |
48e1416a | 2500 | |
a9ac8caa | 2501 | if (dump_file) |
2502 | fprintf (dump_file, "\n"); | |
48e1416a | 2503 | |
5b6269ed | 2504 | sbitmap_free (tmp); |
2505 | } | |
2506 | ||
2507 | /* Order the nodes of G for scheduling and pass the result in | |
2508 | NODE_ORDER. Also set aux.count of each node to ASAP. | |
c0fb94bd | 2509 | Put maximal ASAP to PMAX_ASAP. Return the recMII for the given DDG. */ |
5b6269ed | 2510 | static int |
c0fb94bd | 2511 | sms_order_nodes (ddg_ptr g, int mii, int * node_order, int *pmax_asap) |
5b6269ed | 2512 | { |
2513 | int i; | |
2514 | int rec_mii = 0; | |
2515 | ddg_all_sccs_ptr sccs = create_ddg_all_sccs (g); | |
2516 | ||
c0fb94bd | 2517 | nopa nops = calculate_order_params (g, mii, pmax_asap); |
5b6269ed | 2518 | |
65ef61df | 2519 | if (dump_file) |
2520 | print_sccs (dump_file, sccs, g); | |
2521 | ||
5b6269ed | 2522 | order_nodes_of_sccs (sccs, node_order); |
2523 | ||
2524 | if (sccs->num_sccs > 0) | |
2525 | /* First SCC has the largest recurrence_length. */ | |
2526 | rec_mii = sccs->sccs[0]->recurrence_length; | |
2527 | ||
2528 | /* Save ASAP before destroying node_order_params. */ | |
2529 | for (i = 0; i < g->num_nodes; i++) | |
2530 | { | |
2531 | ddg_node_ptr v = &g->nodes[i]; | |
2532 | v->aux.count = ASAP (v); | |
2533 | } | |
2534 | ||
2535 | free (nops); | |
2536 | free_ddg_all_sccs (sccs); | |
2537 | check_nodes_order (node_order, g->num_nodes); | |
2538 | ||
2539 | return rec_mii; | |
2540 | } | |
2541 | ||
2542 | static void | |
2543 | order_nodes_of_sccs (ddg_all_sccs_ptr all_sccs, int * node_order) | |
2544 | { | |
2545 | int i, pos = 0; | |
2546 | ddg_ptr g = all_sccs->ddg; | |
2547 | int num_nodes = g->num_nodes; | |
2548 | sbitmap prev_sccs = sbitmap_alloc (num_nodes); | |
2549 | sbitmap on_path = sbitmap_alloc (num_nodes); | |
2550 | sbitmap tmp = sbitmap_alloc (num_nodes); | |
2551 | sbitmap ones = sbitmap_alloc (num_nodes); | |
2552 | ||
53c5d9d4 | 2553 | bitmap_clear (prev_sccs); |
2554 | bitmap_ones (ones); | |
5b6269ed | 2555 | |
f0b5f617 | 2556 | /* Perform the node ordering starting from the SCC with the highest recMII. |
5b6269ed | 2557 | For each SCC order the nodes according to their ASAP/ALAP/HEIGHT etc. */ |
2558 | for (i = 0; i < all_sccs->num_sccs; i++) | |
2559 | { | |
2560 | ddg_scc_ptr scc = all_sccs->sccs[i]; | |
2561 | ||
2562 | /* Add nodes on paths from previous SCCs to the current SCC. */ | |
2563 | find_nodes_on_paths (on_path, g, prev_sccs, scc->nodes); | |
53c5d9d4 | 2564 | bitmap_ior (tmp, scc->nodes, on_path); |
5b6269ed | 2565 | |
2566 | /* Add nodes on paths from the current SCC to previous SCCs. */ | |
2567 | find_nodes_on_paths (on_path, g, scc->nodes, prev_sccs); | |
53c5d9d4 | 2568 | bitmap_ior (tmp, tmp, on_path); |
5b6269ed | 2569 | |
2570 | /* Remove nodes of previous SCCs from current extended SCC. */ | |
53c5d9d4 | 2571 | bitmap_and_compl (tmp, tmp, prev_sccs); |
5b6269ed | 2572 | |
2573 | pos = order_nodes_in_scc (g, prev_sccs, tmp, node_order, pos); | |
2574 | /* Above call to order_nodes_in_scc updated prev_sccs |= tmp. */ | |
2575 | } | |
2576 | ||
2577 | /* Handle the remaining nodes that do not belong to any scc. Each call | |
2578 | to order_nodes_in_scc handles a single connected component. */ | |
2579 | while (pos < g->num_nodes) | |
2580 | { | |
53c5d9d4 | 2581 | bitmap_and_compl (tmp, ones, prev_sccs); |
5b6269ed | 2582 | pos = order_nodes_in_scc (g, prev_sccs, tmp, node_order, pos); |
2583 | } | |
2584 | sbitmap_free (prev_sccs); | |
2585 | sbitmap_free (on_path); | |
2586 | sbitmap_free (tmp); | |
2587 | sbitmap_free (ones); | |
2588 | } | |
2589 | ||
2590 | /* MII is needed if we consider backarcs (that do not close recursive cycles). */ | |
2591 | static struct node_order_params * | |
c0fb94bd | 2592 | calculate_order_params (ddg_ptr g, int mii ATTRIBUTE_UNUSED, int *pmax_asap) |
5b6269ed | 2593 | { |
2594 | int u; | |
2595 | int max_asap; | |
2596 | int num_nodes = g->num_nodes; | |
2597 | ddg_edge_ptr e; | |
2598 | /* Allocate a place to hold ordering params for each node in the DDG. */ | |
2599 | nopa node_order_params_arr; | |
2600 | ||
2601 | /* Initialize of ASAP/ALAP/HEIGHT to zero. */ | |
2602 | node_order_params_arr = (nopa) xcalloc (num_nodes, | |
2603 | sizeof (struct node_order_params)); | |
2604 | ||
2c763ed4 | 2605 | /* Set the aux pointer of each node to point to its order_params structure. */ |
5b6269ed | 2606 | for (u = 0; u < num_nodes; u++) |
2607 | g->nodes[u].aux.info = &node_order_params_arr[u]; | |
2608 | ||
2609 | /* Disregarding a backarc from each recursive cycle to obtain a DAG, | |
2610 | calculate ASAP, ALAP, mobility, distance, and height for each node | |
2611 | in the dependence (direct acyclic) graph. */ | |
2612 | ||
2613 | /* We assume that the nodes in the array are in topological order. */ | |
2614 | ||
2615 | max_asap = 0; | |
2616 | for (u = 0; u < num_nodes; u++) | |
2617 | { | |
2618 | ddg_node_ptr u_node = &g->nodes[u]; | |
2619 | ||
2620 | ASAP (u_node) = 0; | |
2621 | for (e = u_node->in; e; e = e->next_in) | |
2622 | if (e->distance == 0) | |
2623 | ASAP (u_node) = MAX (ASAP (u_node), | |
2624 | ASAP (e->src) + e->latency); | |
2625 | max_asap = MAX (max_asap, ASAP (u_node)); | |
2626 | } | |
2627 | ||
2628 | for (u = num_nodes - 1; u > -1; u--) | |
2629 | { | |
2630 | ddg_node_ptr u_node = &g->nodes[u]; | |
2631 | ||
2632 | ALAP (u_node) = max_asap; | |
2633 | HEIGHT (u_node) = 0; | |
2634 | for (e = u_node->out; e; e = e->next_out) | |
2635 | if (e->distance == 0) | |
2636 | { | |
2637 | ALAP (u_node) = MIN (ALAP (u_node), | |
2638 | ALAP (e->dest) - e->latency); | |
2639 | HEIGHT (u_node) = MAX (HEIGHT (u_node), | |
2640 | HEIGHT (e->dest) + e->latency); | |
2641 | } | |
2642 | } | |
a9ac8caa | 2643 | if (dump_file) |
2644 | { | |
2645 | fprintf (dump_file, "\nOrder params\n"); | |
2646 | for (u = 0; u < num_nodes; u++) | |
2647 | { | |
2648 | ddg_node_ptr u_node = &g->nodes[u]; | |
2649 | ||
2650 | fprintf (dump_file, "node %d, ASAP: %d, ALAP: %d, HEIGHT: %d\n", u, | |
2651 | ASAP (u_node), ALAP (u_node), HEIGHT (u_node)); | |
2652 | } | |
2653 | } | |
5b6269ed | 2654 | |
c0fb94bd | 2655 | *pmax_asap = max_asap; |
5b6269ed | 2656 | return node_order_params_arr; |
2657 | } | |
2658 | ||
2659 | static int | |
2660 | find_max_asap (ddg_ptr g, sbitmap nodes) | |
2661 | { | |
86c1585a | 2662 | unsigned int u = 0; |
5b6269ed | 2663 | int max_asap = -1; |
2664 | int result = -1; | |
3e790786 | 2665 | sbitmap_iterator sbi; |
5b6269ed | 2666 | |
3e790786 | 2667 | EXECUTE_IF_SET_IN_SBITMAP (nodes, 0, u, sbi) |
5b6269ed | 2668 | { |
2669 | ddg_node_ptr u_node = &g->nodes[u]; | |
2670 | ||
2671 | if (max_asap < ASAP (u_node)) | |
2672 | { | |
2673 | max_asap = ASAP (u_node); | |
2674 | result = u; | |
2675 | } | |
3e790786 | 2676 | } |
5b6269ed | 2677 | return result; |
2678 | } | |
2679 | ||
2680 | static int | |
2681 | find_max_hv_min_mob (ddg_ptr g, sbitmap nodes) | |
2682 | { | |
86c1585a | 2683 | unsigned int u = 0; |
5b6269ed | 2684 | int max_hv = -1; |
2685 | int min_mob = INT_MAX; | |
2686 | int result = -1; | |
3e790786 | 2687 | sbitmap_iterator sbi; |
5b6269ed | 2688 | |
3e790786 | 2689 | EXECUTE_IF_SET_IN_SBITMAP (nodes, 0, u, sbi) |
5b6269ed | 2690 | { |
2691 | ddg_node_ptr u_node = &g->nodes[u]; | |
2692 | ||
2693 | if (max_hv < HEIGHT (u_node)) | |
2694 | { | |
2695 | max_hv = HEIGHT (u_node); | |
2696 | min_mob = MOB (u_node); | |
2697 | result = u; | |
2698 | } | |
2699 | else if ((max_hv == HEIGHT (u_node)) | |
2700 | && (min_mob > MOB (u_node))) | |
2701 | { | |
2702 | min_mob = MOB (u_node); | |
2703 | result = u; | |
2704 | } | |
3e790786 | 2705 | } |
5b6269ed | 2706 | return result; |
2707 | } | |
2708 | ||
2709 | static int | |
2710 | find_max_dv_min_mob (ddg_ptr g, sbitmap nodes) | |
2711 | { | |
86c1585a | 2712 | unsigned int u = 0; |
5b6269ed | 2713 | int max_dv = -1; |
2714 | int min_mob = INT_MAX; | |
2715 | int result = -1; | |
3e790786 | 2716 | sbitmap_iterator sbi; |
5b6269ed | 2717 | |
3e790786 | 2718 | EXECUTE_IF_SET_IN_SBITMAP (nodes, 0, u, sbi) |
5b6269ed | 2719 | { |
2720 | ddg_node_ptr u_node = &g->nodes[u]; | |
2721 | ||
2722 | if (max_dv < DEPTH (u_node)) | |
2723 | { | |
2724 | max_dv = DEPTH (u_node); | |
2725 | min_mob = MOB (u_node); | |
2726 | result = u; | |
2727 | } | |
2728 | else if ((max_dv == DEPTH (u_node)) | |
2729 | && (min_mob > MOB (u_node))) | |
2730 | { | |
2731 | min_mob = MOB (u_node); | |
2732 | result = u; | |
2733 | } | |
3e790786 | 2734 | } |
5b6269ed | 2735 | return result; |
2736 | } | |
2737 | ||
2738 | /* Places the nodes of SCC into the NODE_ORDER array starting | |
2739 | at position POS, according to the SMS ordering algorithm. | |
2740 | NODES_ORDERED (in&out parameter) holds the bitset of all nodes in | |
2741 | the NODE_ORDER array, starting from position zero. */ | |
2742 | static int | |
2743 | order_nodes_in_scc (ddg_ptr g, sbitmap nodes_ordered, sbitmap scc, | |
2744 | int * node_order, int pos) | |
2745 | { | |
2746 | enum sms_direction dir; | |
2747 | int num_nodes = g->num_nodes; | |
2748 | sbitmap workset = sbitmap_alloc (num_nodes); | |
2749 | sbitmap tmp = sbitmap_alloc (num_nodes); | |
2750 | sbitmap zero_bitmap = sbitmap_alloc (num_nodes); | |
2751 | sbitmap predecessors = sbitmap_alloc (num_nodes); | |
2752 | sbitmap successors = sbitmap_alloc (num_nodes); | |
2753 | ||
53c5d9d4 | 2754 | bitmap_clear (predecessors); |
5b6269ed | 2755 | find_predecessors (predecessors, g, nodes_ordered); |
2756 | ||
53c5d9d4 | 2757 | bitmap_clear (successors); |
5b6269ed | 2758 | find_successors (successors, g, nodes_ordered); |
2759 | ||
53c5d9d4 | 2760 | bitmap_clear (tmp); |
2761 | if (bitmap_and (tmp, predecessors, scc)) | |
5b6269ed | 2762 | { |
53c5d9d4 | 2763 | bitmap_copy (workset, tmp); |
5b6269ed | 2764 | dir = BOTTOMUP; |
2765 | } | |
53c5d9d4 | 2766 | else if (bitmap_and (tmp, successors, scc)) |
5b6269ed | 2767 | { |
53c5d9d4 | 2768 | bitmap_copy (workset, tmp); |
5b6269ed | 2769 | dir = TOPDOWN; |
2770 | } | |
2771 | else | |
2772 | { | |
2773 | int u; | |
2774 | ||
53c5d9d4 | 2775 | bitmap_clear (workset); |
5b6269ed | 2776 | if ((u = find_max_asap (g, scc)) >= 0) |
2777 | SET_BIT (workset, u); | |
2778 | dir = BOTTOMUP; | |
2779 | } | |
2780 | ||
53c5d9d4 | 2781 | bitmap_clear (zero_bitmap); |
2782 | while (!bitmap_equal_p (workset, zero_bitmap)) | |
5b6269ed | 2783 | { |
2784 | int v; | |
2785 | ddg_node_ptr v_node; | |
2786 | sbitmap v_node_preds; | |
2787 | sbitmap v_node_succs; | |
2788 | ||
2789 | if (dir == TOPDOWN) | |
2790 | { | |
53c5d9d4 | 2791 | while (!bitmap_equal_p (workset, zero_bitmap)) |
5b6269ed | 2792 | { |
2793 | v = find_max_hv_min_mob (g, workset); | |
2794 | v_node = &g->nodes[v]; | |
2795 | node_order[pos++] = v; | |
2796 | v_node_succs = NODE_SUCCESSORS (v_node); | |
53c5d9d4 | 2797 | bitmap_and (tmp, v_node_succs, scc); |
5b6269ed | 2798 | |
2799 | /* Don't consider the already ordered successors again. */ | |
53c5d9d4 | 2800 | bitmap_and_compl (tmp, tmp, nodes_ordered); |
2801 | bitmap_ior (workset, workset, tmp); | |
5b6269ed | 2802 | RESET_BIT (workset, v); |
2803 | SET_BIT (nodes_ordered, v); | |
2804 | } | |
2805 | dir = BOTTOMUP; | |
53c5d9d4 | 2806 | bitmap_clear (predecessors); |
5b6269ed | 2807 | find_predecessors (predecessors, g, nodes_ordered); |
53c5d9d4 | 2808 | bitmap_and (workset, predecessors, scc); |
5b6269ed | 2809 | } |
2810 | else | |
2811 | { | |
53c5d9d4 | 2812 | while (!bitmap_equal_p (workset, zero_bitmap)) |
5b6269ed | 2813 | { |
2814 | v = find_max_dv_min_mob (g, workset); | |
2815 | v_node = &g->nodes[v]; | |
2816 | node_order[pos++] = v; | |
2817 | v_node_preds = NODE_PREDECESSORS (v_node); | |
53c5d9d4 | 2818 | bitmap_and (tmp, v_node_preds, scc); |
5b6269ed | 2819 | |
2820 | /* Don't consider the already ordered predecessors again. */ | |
53c5d9d4 | 2821 | bitmap_and_compl (tmp, tmp, nodes_ordered); |
2822 | bitmap_ior (workset, workset, tmp); | |
5b6269ed | 2823 | RESET_BIT (workset, v); |
2824 | SET_BIT (nodes_ordered, v); | |
2825 | } | |
2826 | dir = TOPDOWN; | |
53c5d9d4 | 2827 | bitmap_clear (successors); |
5b6269ed | 2828 | find_successors (successors, g, nodes_ordered); |
53c5d9d4 | 2829 | bitmap_and (workset, successors, scc); |
5b6269ed | 2830 | } |
2831 | } | |
2832 | sbitmap_free (tmp); | |
2833 | sbitmap_free (workset); | |
2834 | sbitmap_free (zero_bitmap); | |
2835 | sbitmap_free (predecessors); | |
2836 | sbitmap_free (successors); | |
2837 | return pos; | |
2838 | } | |
2839 | ||
2840 | \f | |
2841 | /* This page contains functions for manipulating partial-schedules during | |
2842 | modulo scheduling. */ | |
2843 | ||
2844 | /* Create a partial schedule and allocate a memory to hold II rows. */ | |
1bed606a | 2845 | |
2846 | static partial_schedule_ptr | |
5b6269ed | 2847 | create_partial_schedule (int ii, ddg_ptr g, int history) |
2848 | { | |
4c36ffe6 | 2849 | partial_schedule_ptr ps = XNEW (struct partial_schedule); |
5b6269ed | 2850 | ps->rows = (ps_insn_ptr *) xcalloc (ii, sizeof (ps_insn_ptr)); |
4815ed0c | 2851 | ps->rows_length = (int *) xcalloc (ii, sizeof (int)); |
0b79ae60 | 2852 | ps->reg_moves = NULL; |
5b6269ed | 2853 | ps->ii = ii; |
2854 | ps->history = history; | |
2855 | ps->min_cycle = INT_MAX; | |
2856 | ps->max_cycle = INT_MIN; | |
2857 | ps->g = g; | |
2858 | ||
2859 | return ps; | |
2860 | } | |
2861 | ||
2862 | /* Free the PS_INSNs in rows array of the given partial schedule. | |
2863 | ??? Consider caching the PS_INSN's. */ | |
2864 | static void | |
2865 | free_ps_insns (partial_schedule_ptr ps) | |
2866 | { | |
2867 | int i; | |
2868 | ||
2869 | for (i = 0; i < ps->ii; i++) | |
2870 | { | |
2871 | while (ps->rows[i]) | |
2872 | { | |
2873 | ps_insn_ptr ps_insn = ps->rows[i]->next_in_row; | |
2874 | ||
2875 | free (ps->rows[i]); | |
2876 | ps->rows[i] = ps_insn; | |
2877 | } | |
2878 | ps->rows[i] = NULL; | |
2879 | } | |
2880 | } | |
2881 | ||
2882 | /* Free all the memory allocated to the partial schedule. */ | |
1bed606a | 2883 | |
2884 | static void | |
5b6269ed | 2885 | free_partial_schedule (partial_schedule_ptr ps) |
2886 | { | |
0b79ae60 | 2887 | ps_reg_move_info *move; |
2888 | unsigned int i; | |
2889 | ||
5b6269ed | 2890 | if (!ps) |
2891 | return; | |
0b79ae60 | 2892 | |
2893 | FOR_EACH_VEC_ELT (ps_reg_move_info, ps->reg_moves, i, move) | |
2894 | sbitmap_free (move->uses); | |
2895 | VEC_free (ps_reg_move_info, heap, ps->reg_moves); | |
2896 | ||
5b6269ed | 2897 | free_ps_insns (ps); |
2898 | free (ps->rows); | |
4815ed0c | 2899 | free (ps->rows_length); |
5b6269ed | 2900 | free (ps); |
2901 | } | |
2902 | ||
2903 | /* Clear the rows array with its PS_INSNs, and create a new one with | |
2904 | NEW_II rows. */ | |
1bed606a | 2905 | |
2906 | static void | |
5b6269ed | 2907 | reset_partial_schedule (partial_schedule_ptr ps, int new_ii) |
2908 | { | |
2909 | if (!ps) | |
2910 | return; | |
2911 | free_ps_insns (ps); | |
2912 | if (new_ii == ps->ii) | |
2913 | return; | |
2914 | ps->rows = (ps_insn_ptr *) xrealloc (ps->rows, new_ii | |
2915 | * sizeof (ps_insn_ptr)); | |
2916 | memset (ps->rows, 0, new_ii * sizeof (ps_insn_ptr)); | |
4815ed0c | 2917 | ps->rows_length = (int *) xrealloc (ps->rows_length, new_ii * sizeof (int)); |
2918 | memset (ps->rows_length, 0, new_ii * sizeof (int)); | |
5b6269ed | 2919 | ps->ii = new_ii; |
2920 | ps->min_cycle = INT_MAX; | |
2921 | ps->max_cycle = INT_MIN; | |
2922 | } | |
2923 | ||
2924 | /* Prints the partial schedule as an ii rows array, for each rows | |
2925 | print the ids of the insns in it. */ | |
2926 | void | |
2927 | print_partial_schedule (partial_schedule_ptr ps, FILE *dump) | |
2928 | { | |
2929 | int i; | |
2930 | ||
2931 | for (i = 0; i < ps->ii; i++) | |
2932 | { | |
2933 | ps_insn_ptr ps_i = ps->rows[i]; | |
2934 | ||
34c7f568 | 2935 | fprintf (dump, "\n[ROW %d ]: ", i); |
5b6269ed | 2936 | while (ps_i) |
2937 | { | |
7282ef12 | 2938 | rtx insn = ps_rtl_insn (ps, ps_i->id); |
2939 | ||
2940 | if (JUMP_P (insn)) | |
2941 | fprintf (dump, "%d (branch), ", INSN_UID (insn)); | |
abbfd803 | 2942 | else |
7282ef12 | 2943 | fprintf (dump, "%d, ", INSN_UID (insn)); |
abbfd803 | 2944 | |
5b6269ed | 2945 | ps_i = ps_i->next_in_row; |
2946 | } | |
2947 | } | |
2948 | } | |
2949 | ||
2950 | /* Creates an object of PS_INSN and initializes it to the given parameters. */ | |
2951 | static ps_insn_ptr | |
7282ef12 | 2952 | create_ps_insn (int id, int cycle) |
5b6269ed | 2953 | { |
4c36ffe6 | 2954 | ps_insn_ptr ps_i = XNEW (struct ps_insn); |
5b6269ed | 2955 | |
7282ef12 | 2956 | ps_i->id = id; |
5b6269ed | 2957 | ps_i->next_in_row = NULL; |
2958 | ps_i->prev_in_row = NULL; | |
5b6269ed | 2959 | ps_i->cycle = cycle; |
2960 | ||
2961 | return ps_i; | |
2962 | } | |
2963 | ||
2964 | ||
9bf2b489 | 2965 | /* Removes the given PS_INSN from the partial schedule. */ |
2966 | static void | |
5b6269ed | 2967 | remove_node_from_ps (partial_schedule_ptr ps, ps_insn_ptr ps_i) |
2968 | { | |
2969 | int row; | |
2970 | ||
9bf2b489 | 2971 | gcc_assert (ps && ps_i); |
2972 | ||
5b6269ed | 2973 | row = SMODULO (ps_i->cycle, ps->ii); |
2974 | if (! ps_i->prev_in_row) | |
2975 | { | |
9bf2b489 | 2976 | gcc_assert (ps_i == ps->rows[row]); |
5b6269ed | 2977 | ps->rows[row] = ps_i->next_in_row; |
2978 | if (ps->rows[row]) | |
2979 | ps->rows[row]->prev_in_row = NULL; | |
2980 | } | |
2981 | else | |
2982 | { | |
2983 | ps_i->prev_in_row->next_in_row = ps_i->next_in_row; | |
2984 | if (ps_i->next_in_row) | |
2985 | ps_i->next_in_row->prev_in_row = ps_i->prev_in_row; | |
2986 | } | |
4815ed0c | 2987 | |
2988 | ps->rows_length[row] -= 1; | |
5b6269ed | 2989 | free (ps_i); |
9bf2b489 | 2990 | return; |
5b6269ed | 2991 | } |
2992 | ||
f045d41d | 2993 | /* Unlike what literature describes for modulo scheduling (which focuses |
2994 | on VLIW machines) the order of the instructions inside a cycle is | |
2995 | important. Given the bitmaps MUST_FOLLOW and MUST_PRECEDE we know | |
2996 | where the current instruction should go relative to the already | |
2997 | scheduled instructions in the given cycle. Go over these | |
2998 | instructions and find the first possible column to put it in. */ | |
2999 | static bool | |
3000 | ps_insn_find_column (partial_schedule_ptr ps, ps_insn_ptr ps_i, | |
3001 | sbitmap must_precede, sbitmap must_follow) | |
3002 | { | |
3003 | ps_insn_ptr next_ps_i; | |
3004 | ps_insn_ptr first_must_follow = NULL; | |
3005 | ps_insn_ptr last_must_precede = NULL; | |
6f7f081f | 3006 | ps_insn_ptr last_in_row = NULL; |
f045d41d | 3007 | int row; |
3008 | ||
3009 | if (! ps_i) | |
3010 | return false; | |
3011 | ||
3012 | row = SMODULO (ps_i->cycle, ps->ii); | |
3013 | ||
3014 | /* Find the first must follow and the last must precede | |
91275768 | 3015 | and insert the node immediately after the must precede |
dac49aa5 | 3016 | but make sure that it there is no must follow after it. */ |
f045d41d | 3017 | for (next_ps_i = ps->rows[row]; |
3018 | next_ps_i; | |
3019 | next_ps_i = next_ps_i->next_in_row) | |
3020 | { | |
7282ef12 | 3021 | if (must_follow |
3022 | && TEST_BIT (must_follow, next_ps_i->id) | |
f045d41d | 3023 | && ! first_must_follow) |
3024 | first_must_follow = next_ps_i; | |
7282ef12 | 3025 | if (must_precede && TEST_BIT (must_precede, next_ps_i->id)) |
f045d41d | 3026 | { |
3027 | /* If we have already met a node that must follow, then | |
3028 | there is no possible column. */ | |
3029 | if (first_must_follow) | |
3030 | return false; | |
3031 | else | |
3032 | last_must_precede = next_ps_i; | |
3033 | } | |
6f7f081f | 3034 | /* The closing branch must be the last in the row. */ |
3035 | if (must_precede | |
7282ef12 | 3036 | && TEST_BIT (must_precede, next_ps_i->id) |
3037 | && JUMP_P (ps_rtl_insn (ps, next_ps_i->id))) | |
6f7f081f | 3038 | return false; |
3039 | ||
3040 | last_in_row = next_ps_i; | |
f045d41d | 3041 | } |
3042 | ||
6f7f081f | 3043 | /* The closing branch is scheduled as well. Make sure there is no |
3044 | dependent instruction after it as the branch should be the last | |
3045 | instruction in the row. */ | |
7282ef12 | 3046 | if (JUMP_P (ps_rtl_insn (ps, ps_i->id))) |
6f7f081f | 3047 | { |
3048 | if (first_must_follow) | |
3049 | return false; | |
3050 | if (last_in_row) | |
3051 | { | |
3052 | /* Make the branch the last in the row. New instructions | |
3053 | will be inserted at the beginning of the row or after the | |
3054 | last must_precede instruction thus the branch is guaranteed | |
3055 | to remain the last instruction in the row. */ | |
3056 | last_in_row->next_in_row = ps_i; | |
3057 | ps_i->prev_in_row = last_in_row; | |
3058 | ps_i->next_in_row = NULL; | |
3059 | } | |
3060 | else | |
3061 | ps->rows[row] = ps_i; | |
3062 | return true; | |
3063 | } | |
3064 | ||
f045d41d | 3065 | /* Now insert the node after INSERT_AFTER_PSI. */ |
3066 | ||
3067 | if (! last_must_precede) | |
3068 | { | |
3069 | ps_i->next_in_row = ps->rows[row]; | |
3070 | ps_i->prev_in_row = NULL; | |
3071 | if (ps_i->next_in_row) | |
3072 | ps_i->next_in_row->prev_in_row = ps_i; | |
3073 | ps->rows[row] = ps_i; | |
3074 | } | |
3075 | else | |
3076 | { | |
3077 | ps_i->next_in_row = last_must_precede->next_in_row; | |
3078 | last_must_precede->next_in_row = ps_i; | |
3079 | ps_i->prev_in_row = last_must_precede; | |
3080 | if (ps_i->next_in_row) | |
3081 | ps_i->next_in_row->prev_in_row = ps_i; | |
3082 | } | |
3083 | ||
3084 | return true; | |
3085 | } | |
3086 | ||
5b6269ed | 3087 | /* Advances the PS_INSN one column in its current row; returns false |
48e1416a | 3088 | in failure and true in success. Bit N is set in MUST_FOLLOW if |
3089 | the node with cuid N must be come after the node pointed to by | |
f045d41d | 3090 | PS_I when scheduled in the same cycle. */ |
5b6269ed | 3091 | static int |
f045d41d | 3092 | ps_insn_advance_column (partial_schedule_ptr ps, ps_insn_ptr ps_i, |
3093 | sbitmap must_follow) | |
5b6269ed | 3094 | { |
3095 | ps_insn_ptr prev, next; | |
3096 | int row; | |
3097 | ||
3098 | if (!ps || !ps_i) | |
3099 | return false; | |
3100 | ||
3101 | row = SMODULO (ps_i->cycle, ps->ii); | |
3102 | ||
3103 | if (! ps_i->next_in_row) | |
3104 | return false; | |
3105 | ||
3106 | /* Check if next_in_row is dependent on ps_i, both having same sched | |
3107 | times (typically ANTI_DEP). If so, ps_i cannot skip over it. */ | |
7282ef12 | 3108 | if (must_follow && TEST_BIT (must_follow, ps_i->next_in_row->id)) |
f045d41d | 3109 | return false; |
5b6269ed | 3110 | |
91275768 | 3111 | /* Advance PS_I over its next_in_row in the doubly linked list. */ |
5b6269ed | 3112 | prev = ps_i->prev_in_row; |
3113 | next = ps_i->next_in_row; | |
3114 | ||
3115 | if (ps_i == ps->rows[row]) | |
3116 | ps->rows[row] = next; | |
3117 | ||
3118 | ps_i->next_in_row = next->next_in_row; | |
3119 | ||
3120 | if (next->next_in_row) | |
3121 | next->next_in_row->prev_in_row = ps_i; | |
3122 | ||
3123 | next->next_in_row = ps_i; | |
3124 | ps_i->prev_in_row = next; | |
3125 | ||
3126 | next->prev_in_row = prev; | |
3127 | if (prev) | |
3128 | prev->next_in_row = next; | |
3129 | ||
3130 | return true; | |
3131 | } | |
3132 | ||
3133 | /* Inserts a DDG_NODE to the given partial schedule at the given cycle. | |
48e1416a | 3134 | Returns 0 if this is not possible and a PS_INSN otherwise. Bit N is |
3135 | set in MUST_PRECEDE/MUST_FOLLOW if the node with cuid N must be come | |
3136 | before/after (respectively) the node pointed to by PS_I when scheduled | |
f045d41d | 3137 | in the same cycle. */ |
5b6269ed | 3138 | static ps_insn_ptr |
7282ef12 | 3139 | add_node_to_ps (partial_schedule_ptr ps, int id, int cycle, |
f045d41d | 3140 | sbitmap must_precede, sbitmap must_follow) |
5b6269ed | 3141 | { |
f045d41d | 3142 | ps_insn_ptr ps_i; |
5b6269ed | 3143 | int row = SMODULO (cycle, ps->ii); |
5b6269ed | 3144 | |
4815ed0c | 3145 | if (ps->rows_length[row] >= issue_rate) |
5b6269ed | 3146 | return NULL; |
3147 | ||
7282ef12 | 3148 | ps_i = create_ps_insn (id, cycle); |
f045d41d | 3149 | |
3150 | /* Finds and inserts PS_I according to MUST_FOLLOW and | |
3151 | MUST_PRECEDE. */ | |
3152 | if (! ps_insn_find_column (ps, ps_i, must_precede, must_follow)) | |
3153 | { | |
3154 | free (ps_i); | |
3155 | return NULL; | |
3156 | } | |
5b6269ed | 3157 | |
4815ed0c | 3158 | ps->rows_length[row] += 1; |
5b6269ed | 3159 | return ps_i; |
3160 | } | |
3161 | ||
3162 | /* Advance time one cycle. Assumes DFA is being used. */ | |
3163 | static void | |
3164 | advance_one_cycle (void) | |
3165 | { | |
67900a4f | 3166 | if (targetm.sched.dfa_pre_cycle_insn) |
3167 | state_transition (curr_state, | |
ffa47ae0 | 3168 | targetm.sched.dfa_pre_cycle_insn ()); |
5b6269ed | 3169 | |
67900a4f | 3170 | state_transition (curr_state, NULL); |
5b6269ed | 3171 | |
67900a4f | 3172 | if (targetm.sched.dfa_post_cycle_insn) |
3173 | state_transition (curr_state, | |
ffa47ae0 | 3174 | targetm.sched.dfa_post_cycle_insn ()); |
5b6269ed | 3175 | } |
3176 | ||
b6a75366 | 3177 | |
b6a75366 | 3178 | |
5b6269ed | 3179 | /* Checks if PS has resource conflicts according to DFA, starting from |
3180 | FROM cycle to TO cycle; returns true if there are conflicts and false | |
3181 | if there are no conflicts. Assumes DFA is being used. */ | |
3182 | static int | |
3183 | ps_has_conflicts (partial_schedule_ptr ps, int from, int to) | |
3184 | { | |
3185 | int cycle; | |
3186 | ||
5b6269ed | 3187 | state_reset (curr_state); |
3188 | ||
3189 | for (cycle = from; cycle <= to; cycle++) | |
3190 | { | |
3191 | ps_insn_ptr crr_insn; | |
3192 | /* Holds the remaining issue slots in the current row. */ | |
3193 | int can_issue_more = issue_rate; | |
3194 | ||
3195 | /* Walk through the DFA for the current row. */ | |
3196 | for (crr_insn = ps->rows[SMODULO (cycle, ps->ii)]; | |
3197 | crr_insn; | |
3198 | crr_insn = crr_insn->next_in_row) | |
3199 | { | |
7282ef12 | 3200 | rtx insn = ps_rtl_insn (ps, crr_insn->id); |
5b6269ed | 3201 | |
9845d120 | 3202 | if (!NONDEBUG_INSN_P (insn)) |
5b6269ed | 3203 | continue; |
3204 | ||
3205 | /* Check if there is room for the current insn. */ | |
3206 | if (!can_issue_more || state_dead_lock_p (curr_state)) | |
3207 | return true; | |
3208 | ||
3209 | /* Update the DFA state and return with failure if the DFA found | |
f0b5f617 | 3210 | resource conflicts. */ |
5b6269ed | 3211 | if (state_transition (curr_state, insn) >= 0) |
3212 | return true; | |
3213 | ||
3214 | if (targetm.sched.variable_issue) | |
3215 | can_issue_more = | |
ffa47ae0 | 3216 | targetm.sched.variable_issue (sched_dump, sched_verbose, |
3217 | insn, can_issue_more); | |
5b6269ed | 3218 | /* A naked CLOBBER or USE generates no instruction, so don't |
3219 | let them consume issue slots. */ | |
3220 | else if (GET_CODE (PATTERN (insn)) != USE | |
3221 | && GET_CODE (PATTERN (insn)) != CLOBBER) | |
3222 | can_issue_more--; | |
3223 | } | |
3224 | ||
3225 | /* Advance the DFA to the next cycle. */ | |
3226 | advance_one_cycle (); | |
3227 | } | |
3228 | return false; | |
3229 | } | |
3230 | ||
3231 | /* Checks if the given node causes resource conflicts when added to PS at | |
3232 | cycle C. If not the node is added to PS and returned; otherwise zero | |
48e1416a | 3233 | is returned. Bit N is set in MUST_PRECEDE/MUST_FOLLOW if the node with |
3234 | cuid N must be come before/after (respectively) the node pointed to by | |
f045d41d | 3235 | PS_I when scheduled in the same cycle. */ |
b6a75366 | 3236 | ps_insn_ptr |
7282ef12 | 3237 | ps_add_node_check_conflicts (partial_schedule_ptr ps, int n, |
f045d41d | 3238 | int c, sbitmap must_precede, |
3239 | sbitmap must_follow) | |
5b6269ed | 3240 | { |
3241 | int has_conflicts = 0; | |
3242 | ps_insn_ptr ps_i; | |
3243 | ||
f045d41d | 3244 | /* First add the node to the PS, if this succeeds check for |
3245 | conflicts, trying different issue slots in the same row. */ | |
3246 | if (! (ps_i = add_node_to_ps (ps, n, c, must_precede, must_follow))) | |
5b6269ed | 3247 | return NULL; /* Failed to insert the node at the given cycle. */ |
3248 | ||
3249 | has_conflicts = ps_has_conflicts (ps, c, c) | |
3250 | || (ps->history > 0 | |
3251 | && ps_has_conflicts (ps, | |
3252 | c - ps->history, | |
3253 | c + ps->history)); | |
3254 | ||
3255 | /* Try different issue slots to find one that the given node can be | |
3256 | scheduled in without conflicts. */ | |
3257 | while (has_conflicts) | |
3258 | { | |
f045d41d | 3259 | if (! ps_insn_advance_column (ps, ps_i, must_follow)) |
5b6269ed | 3260 | break; |
3261 | has_conflicts = ps_has_conflicts (ps, c, c) | |
3262 | || (ps->history > 0 | |
3263 | && ps_has_conflicts (ps, | |
3264 | c - ps->history, | |
3265 | c + ps->history)); | |
3266 | } | |
3267 | ||
3268 | if (has_conflicts) | |
3269 | { | |
3270 | remove_node_from_ps (ps, ps_i); | |
3271 | return NULL; | |
3272 | } | |
3273 | ||
3274 | ps->min_cycle = MIN (ps->min_cycle, c); | |
3275 | ps->max_cycle = MAX (ps->max_cycle, c); | |
3276 | return ps_i; | |
3277 | } | |
3278 | ||
6f7f081f | 3279 | /* Calculate the stage count of the partial schedule PS. The calculation |
a5ea7ace | 3280 | takes into account the rotation amount passed in ROTATION_AMOUNT. */ |
6f7f081f | 3281 | int |
a5ea7ace | 3282 | calculate_stage_count (partial_schedule_ptr ps, int rotation_amount) |
6f7f081f | 3283 | { |
6f7f081f | 3284 | int new_min_cycle = PS_MIN_CYCLE (ps) - rotation_amount; |
3285 | int new_max_cycle = PS_MAX_CYCLE (ps) - rotation_amount; | |
3286 | int stage_count = CALC_STAGE_COUNT (-1, new_min_cycle, ps->ii); | |
3287 | ||
3288 | /* The calculation of stage count is done adding the number of stages | |
3289 | before cycle zero and after cycle zero. */ | |
3290 | stage_count += CALC_STAGE_COUNT (new_max_cycle, 0, ps->ii); | |
3291 | ||
3292 | return stage_count; | |
3293 | } | |
3294 | ||
5b6269ed | 3295 | /* Rotate the rows of PS such that insns scheduled at time |
3296 | START_CYCLE will appear in row 0. Updates max/min_cycles. */ | |
b6a75366 | 3297 | void |
5b6269ed | 3298 | rotate_partial_schedule (partial_schedule_ptr ps, int start_cycle) |
3299 | { | |
3300 | int i, row, backward_rotates; | |
3301 | int last_row = ps->ii - 1; | |
3302 | ||
3303 | if (start_cycle == 0) | |
3304 | return; | |
3305 | ||
3306 | backward_rotates = SMODULO (start_cycle, ps->ii); | |
3307 | ||
3308 | /* Revisit later and optimize this into a single loop. */ | |
3309 | for (i = 0; i < backward_rotates; i++) | |
3310 | { | |
3311 | ps_insn_ptr first_row = ps->rows[0]; | |
4815ed0c | 3312 | int first_row_length = ps->rows_length[0]; |
5b6269ed | 3313 | |
3314 | for (row = 0; row < last_row; row++) | |
4815ed0c | 3315 | { |
3316 | ps->rows[row] = ps->rows[row + 1]; | |
3317 | ps->rows_length[row] = ps->rows_length[row + 1]; | |
3318 | } | |
5b6269ed | 3319 | |
3320 | ps->rows[last_row] = first_row; | |
4815ed0c | 3321 | ps->rows_length[last_row] = first_row_length; |
5b6269ed | 3322 | } |
3323 | ||
3324 | ps->max_cycle -= start_cycle; | |
3325 | ps->min_cycle -= start_cycle; | |
3326 | } | |
07cba988 | 3327 | |
77fce4cd | 3328 | #endif /* INSN_SCHEDULING */ |
3329 | \f | |
3330 | static bool | |
3331 | gate_handle_sms (void) | |
3332 | { | |
3333 | return (optimize > 0 && flag_modulo_sched); | |
3334 | } | |
3335 | ||
3336 | ||
3337 | /* Run instruction scheduler. */ | |
3338 | /* Perform SMS module scheduling. */ | |
2a1990e9 | 3339 | static unsigned int |
77fce4cd | 3340 | rest_of_handle_sms (void) |
3341 | { | |
3342 | #ifdef INSN_SCHEDULING | |
3343 | basic_block bb; | |
77fce4cd | 3344 | |
77fce4cd | 3345 | /* Collect loop information to be used in SMS. */ |
3072d30e | 3346 | cfg_layout_initialize (0); |
3f5be5f4 | 3347 | sms_schedule (); |
77fce4cd | 3348 | |
3349 | /* Update the life information, because we add pseudos. */ | |
3350 | max_regno = max_reg_num (); | |
77fce4cd | 3351 | |
3352 | /* Finalize layout changes. */ | |
3353 | FOR_EACH_BB (bb) | |
3354 | if (bb->next_bb != EXIT_BLOCK_PTR) | |
3355 | bb->aux = bb->next_bb; | |
77fce4cd | 3356 | free_dominance_info (CDI_DOMINATORS); |
73d0c05c | 3357 | cfg_layout_finalize (); |
77fce4cd | 3358 | #endif /* INSN_SCHEDULING */ |
2a1990e9 | 3359 | return 0; |
77fce4cd | 3360 | } |
3361 | ||
20099e35 | 3362 | struct rtl_opt_pass pass_sms = |
77fce4cd | 3363 | { |
20099e35 | 3364 | { |
3365 | RTL_PASS, | |
77fce4cd | 3366 | "sms", /* name */ |
c7875731 | 3367 | OPTGROUP_NONE, /* optinfo_flags */ |
77fce4cd | 3368 | gate_handle_sms, /* gate */ |
3369 | rest_of_handle_sms, /* execute */ | |
3370 | NULL, /* sub */ | |
3371 | NULL, /* next */ | |
3372 | 0, /* static_pass_number */ | |
3373 | TV_SMS, /* tv_id */ | |
3374 | 0, /* properties_required */ | |
3375 | 0, /* properties_provided */ | |
3376 | 0, /* properties_destroyed */ | |
771e2890 | 3377 | 0, /* todo_flags_start */ |
a2676c4f | 3378 | TODO_df_finish |
3379 | | TODO_verify_flow | |
3380 | | TODO_verify_rtl_sharing | |
a2676c4f | 3381 | | TODO_ggc_collect /* todo_flags_finish */ |
20099e35 | 3382 | } |
77fce4cd | 3383 | }; |