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5b6269ed | 1 | /* Swing Modulo Scheduling implementation. |
711789cc | 2 | Copyright (C) 2004-2013 Free Software Foundation, Inc. |
5b6269ed | 3 | Contributed by Ayal Zaks and Mustafa Hagog <zaks,mustafa@il.ibm.com> |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it under | |
8 | the terms of the GNU General Public License as published by the Free | |
8c4c00c1 | 9 | Software Foundation; either version 3, or (at your option) any later |
5b6269ed | 10 | version. |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
8c4c00c1 | 18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
5b6269ed | 20 | |
21 | ||
22 | #include "config.h" | |
23 | #include "system.h" | |
24 | #include "coretypes.h" | |
25 | #include "tm.h" | |
0b205f4c | 26 | #include "diagnostic-core.h" |
5b6269ed | 27 | #include "rtl.h" |
28 | #include "tm_p.h" | |
29 | #include "hard-reg-set.h" | |
5b6269ed | 30 | #include "regs.h" |
31 | #include "function.h" | |
32 | #include "flags.h" | |
33 | #include "insn-config.h" | |
34 | #include "insn-attr.h" | |
35 | #include "except.h" | |
5b6269ed | 36 | #include "recog.h" |
37 | #include "sched-int.h" | |
38 | #include "target.h" | |
5b6269ed | 39 | #include "cfgloop.h" |
5b6269ed | 40 | #include "expr.h" |
41 | #include "params.h" | |
42 | #include "gcov-io.h" | |
5b6269ed | 43 | #include "ddg.h" |
77fce4cd | 44 | #include "tree-pass.h" |
76aaf9f0 | 45 | #include "dbgcnt.h" |
0f71a633 | 46 | #include "df.h" |
5b6269ed | 47 | |
07cba988 | 48 | #ifdef INSN_SCHEDULING |
5b6269ed | 49 | |
50 | /* This file contains the implementation of the Swing Modulo Scheduler, | |
51 | described in the following references: | |
52 | [1] J. Llosa, A. Gonzalez, E. Ayguade, M. Valero., and J. Eckhardt. | |
53 | Lifetime--sensitive modulo scheduling in a production environment. | |
54 | IEEE Trans. on Comps., 50(3), March 2001 | |
55 | [2] J. Llosa, A. Gonzalez, E. Ayguade, and M. Valero. | |
56 | Swing Modulo Scheduling: A Lifetime Sensitive Approach. | |
365db11e | 57 | PACT '96 , pages 80-87, October 1996 (Boston - Massachusetts - USA). |
5b6269ed | 58 | |
59 | The basic structure is: | |
60 | 1. Build a data-dependence graph (DDG) for each loop. | |
61 | 2. Use the DDG to order the insns of a loop (not in topological order | |
62 | necessarily, but rather) trying to place each insn after all its | |
63 | predecessors _or_ after all its successors. | |
64 | 3. Compute MII: a lower bound on the number of cycles to schedule the loop. | |
65 | 4. Use the ordering to perform list-scheduling of the loop: | |
66 | 1. Set II = MII. We will try to schedule the loop within II cycles. | |
67 | 2. Try to schedule the insns one by one according to the ordering. | |
68 | For each insn compute an interval of cycles by considering already- | |
69 | scheduled preds and succs (and associated latencies); try to place | |
70 | the insn in the cycles of this window checking for potential | |
71 | resource conflicts (using the DFA interface). | |
72 | Note: this is different from the cycle-scheduling of schedule_insns; | |
73 | here the insns are not scheduled monotonically top-down (nor bottom- | |
74 | up). | |
75 | 3. If failed in scheduling all insns - bump II++ and try again, unless | |
0870fd6e | 76 | II reaches an upper bound MaxII, in which case report failure. |
5b6269ed | 77 | 5. If we succeeded in scheduling the loop within II cycles, we now |
78 | generate prolog and epilog, decrease the counter of the loop, and | |
79 | perform modulo variable expansion for live ranges that span more than | |
80 | II cycles (i.e. use register copies to prevent a def from overwriting | |
81 | itself before reaching the use). | |
5b6269ed | 82 | |
abbfd803 | 83 | SMS works with countable loops (1) whose control part can be easily |
84 | decoupled from the rest of the loop and (2) whose loop count can | |
85 | be easily adjusted. This is because we peel a constant number of | |
86 | iterations into a prologue and epilogue for which we want to avoid | |
87 | emitting the control part, and a kernel which is to iterate that | |
88 | constant number of iterations less than the original loop. So the | |
89 | control part should be a set of insns clearly identified and having | |
90 | its own iv, not otherwise used in the loop (at-least for now), which | |
7bfc9b7c | 91 | initializes a register before the loop to the number of iterations. |
92 | Currently SMS relies on the do-loop pattern to recognize such loops, | |
93 | where (1) the control part comprises of all insns defining and/or | |
94 | using a certain 'count' register and (2) the loop count can be | |
48e1416a | 95 | adjusted by modifying this register prior to the loop. |
7bfc9b7c | 96 | TODO: Rely on cfgloop analysis instead. */ |
5b6269ed | 97 | \f |
98 | /* This page defines partial-schedule structures and functions for | |
99 | modulo scheduling. */ | |
100 | ||
101 | typedef struct partial_schedule *partial_schedule_ptr; | |
102 | typedef struct ps_insn *ps_insn_ptr; | |
103 | ||
104 | /* The minimum (absolute) cycle that a node of ps was scheduled in. */ | |
105 | #define PS_MIN_CYCLE(ps) (((partial_schedule_ptr)(ps))->min_cycle) | |
106 | ||
107 | /* The maximum (absolute) cycle that a node of ps was scheduled in. */ | |
108 | #define PS_MAX_CYCLE(ps) (((partial_schedule_ptr)(ps))->max_cycle) | |
109 | ||
110 | /* Perform signed modulo, always returning a non-negative value. */ | |
111 | #define SMODULO(x,y) ((x) % (y) < 0 ? ((x) % (y) + (y)) : (x) % (y)) | |
112 | ||
113 | /* The number of different iterations the nodes in ps span, assuming | |
114 | the stage boundaries are placed efficiently. */ | |
6f7f081f | 115 | #define CALC_STAGE_COUNT(max_cycle,min_cycle,ii) ((max_cycle - min_cycle \ |
116 | + 1 + ii - 1) / ii) | |
117 | /* The stage count of ps. */ | |
118 | #define PS_STAGE_COUNT(ps) (((partial_schedule_ptr)(ps))->stage_count) | |
5b6269ed | 119 | |
5b6269ed | 120 | /* A single instruction in the partial schedule. */ |
121 | struct ps_insn | |
122 | { | |
0b79ae60 | 123 | /* Identifies the instruction to be scheduled. Values smaller than |
124 | the ddg's num_nodes refer directly to ddg nodes. A value of | |
125 | X - num_nodes refers to register move X. */ | |
7282ef12 | 126 | int id; |
5b6269ed | 127 | |
128 | /* The (absolute) cycle in which the PS instruction is scheduled. | |
129 | Same as SCHED_TIME (node). */ | |
130 | int cycle; | |
131 | ||
132 | /* The next/prev PS_INSN in the same row. */ | |
133 | ps_insn_ptr next_in_row, | |
134 | prev_in_row; | |
135 | ||
5b6269ed | 136 | }; |
137 | ||
0b79ae60 | 138 | /* Information about a register move that has been added to a partial |
139 | schedule. */ | |
140 | struct ps_reg_move_info | |
141 | { | |
142 | /* The source of the move is defined by the ps_insn with id DEF. | |
143 | The destination is used by the ps_insns with the ids in USES. */ | |
144 | int def; | |
145 | sbitmap uses; | |
146 | ||
147 | /* The original form of USES' instructions used OLD_REG, but they | |
148 | should now use NEW_REG. */ | |
149 | rtx old_reg; | |
150 | rtx new_reg; | |
151 | ||
e9df34d5 | 152 | /* The number of consecutive stages that the move occupies. */ |
153 | int num_consecutive_stages; | |
154 | ||
0b79ae60 | 155 | /* An instruction that sets NEW_REG to the correct value. The first |
156 | move associated with DEF will have an rhs of OLD_REG; later moves | |
157 | use the result of the previous move. */ | |
158 | rtx insn; | |
159 | }; | |
160 | ||
161 | typedef struct ps_reg_move_info ps_reg_move_info; | |
0b79ae60 | 162 | |
5b6269ed | 163 | /* Holds the partial schedule as an array of II rows. Each entry of the |
164 | array points to a linked list of PS_INSNs, which represents the | |
165 | instructions that are scheduled for that row. */ | |
166 | struct partial_schedule | |
167 | { | |
168 | int ii; /* Number of rows in the partial schedule. */ | |
169 | int history; /* Threshold for conflict checking using DFA. */ | |
170 | ||
171 | /* rows[i] points to linked list of insns scheduled in row i (0<=i<ii). */ | |
172 | ps_insn_ptr *rows; | |
173 | ||
0b79ae60 | 174 | /* All the moves added for this partial schedule. Index X has |
175 | a ps_insn id of X + g->num_nodes. */ | |
f1f41a6c | 176 | vec<ps_reg_move_info> reg_moves; |
0b79ae60 | 177 | |
4815ed0c | 178 | /* rows_length[i] holds the number of instructions in the row. |
179 | It is used only (as an optimization) to back off quickly from | |
180 | trying to schedule a node in a full row; that is, to avoid running | |
181 | through futile DFA state transitions. */ | |
182 | int *rows_length; | |
183 | ||
5b6269ed | 184 | /* The earliest absolute cycle of an insn in the partial schedule. */ |
185 | int min_cycle; | |
186 | ||
187 | /* The latest absolute cycle of an insn in the partial schedule. */ | |
188 | int max_cycle; | |
189 | ||
190 | ddg_ptr g; /* The DDG of the insns in the partial schedule. */ | |
6f7f081f | 191 | |
192 | int stage_count; /* The stage count of the partial schedule. */ | |
5b6269ed | 193 | }; |
194 | ||
48e1416a | 195 | |
1bed606a | 196 | static partial_schedule_ptr create_partial_schedule (int ii, ddg_ptr, int history); |
197 | static void free_partial_schedule (partial_schedule_ptr); | |
198 | static void reset_partial_schedule (partial_schedule_ptr, int new_ii); | |
5b6269ed | 199 | void print_partial_schedule (partial_schedule_ptr, FILE *); |
76387907 | 200 | static void verify_partial_schedule (partial_schedule_ptr, sbitmap); |
daca8c86 | 201 | static ps_insn_ptr ps_add_node_check_conflicts (partial_schedule_ptr, |
7282ef12 | 202 | int, int, sbitmap, sbitmap); |
daca8c86 | 203 | static void rotate_partial_schedule (partial_schedule_ptr, int); |
b6a75366 | 204 | void set_row_column_for_ps (partial_schedule_ptr); |
76387907 | 205 | static void ps_insert_empty_row (partial_schedule_ptr, int, sbitmap); |
206 | static int compute_split_row (sbitmap, int, int, int, ddg_node_ptr); | |
b6a75366 | 207 | |
5b6269ed | 208 | \f |
365db11e | 209 | /* This page defines constants and structures for the modulo scheduling |
5b6269ed | 210 | driver. */ |
211 | ||
c0fb94bd | 212 | static int sms_order_nodes (ddg_ptr, int, int *, int *); |
5b6269ed | 213 | static void set_node_sched_params (ddg_ptr); |
3f5be5f4 | 214 | static partial_schedule_ptr sms_schedule_by_order (ddg_ptr, int, int, int *); |
c0fb94bd | 215 | static void permute_partial_schedule (partial_schedule_ptr, rtx); |
216 | static void generate_prolog_epilog (partial_schedule_ptr, struct loop *, | |
7bfc9b7c | 217 | rtx, rtx); |
a5ea7ace | 218 | static int calculate_stage_count (partial_schedule_ptr, int); |
219 | static void calculate_must_precede_follow (ddg_node_ptr, int, int, | |
220 | int, int, sbitmap, sbitmap, sbitmap); | |
221 | static int get_sched_window (partial_schedule_ptr, ddg_node_ptr, | |
222 | sbitmap, int, int *, int *, int *); | |
7282ef12 | 223 | static bool try_scheduling_node_in_cycle (partial_schedule_ptr, int, int, |
224 | sbitmap, int *, sbitmap, sbitmap); | |
9bf2b489 | 225 | static void remove_node_from_ps (partial_schedule_ptr, ps_insn_ptr); |
a5ea7ace | 226 | |
7282ef12 | 227 | #define NODE_ASAP(node) ((node)->aux.count) |
228 | ||
f1f41a6c | 229 | #define SCHED_PARAMS(x) (&node_sched_param_vec[x]) |
7282ef12 | 230 | #define SCHED_TIME(x) (SCHED_PARAMS (x)->time) |
7282ef12 | 231 | #define SCHED_ROW(x) (SCHED_PARAMS (x)->row) |
232 | #define SCHED_STAGE(x) (SCHED_PARAMS (x)->stage) | |
233 | #define SCHED_COLUMN(x) (SCHED_PARAMS (x)->column) | |
5b6269ed | 234 | |
235 | /* The scheduling parameters held for each node. */ | |
236 | typedef struct node_sched_params | |
237 | { | |
7282ef12 | 238 | int time; /* The absolute scheduling cycle. */ |
5b6269ed | 239 | |
5b6269ed | 240 | int row; /* Holds time % ii. */ |
241 | int stage; /* Holds time / ii. */ | |
242 | ||
243 | /* The column of a node inside the ps. If nodes u, v are on the same row, | |
365db11e | 244 | u will precede v if column (u) < column (v). */ |
5b6269ed | 245 | int column; |
246 | } *node_sched_params_ptr; | |
247 | ||
0b79ae60 | 248 | typedef struct node_sched_params node_sched_params; |
5b6269ed | 249 | \f |
250 | /* The following three functions are copied from the current scheduler | |
2c763ed4 | 251 | code in order to use sched_analyze() for computing the dependencies. |
5b6269ed | 252 | They are used when initializing the sched_info structure. */ |
253 | static const char * | |
e1ab7874 | 254 | sms_print_insn (const_rtx insn, int aligned ATTRIBUTE_UNUSED) |
5b6269ed | 255 | { |
256 | static char tmp[80]; | |
257 | ||
258 | sprintf (tmp, "i%4d", INSN_UID (insn)); | |
259 | return tmp; | |
260 | } | |
261 | ||
5b6269ed | 262 | static void |
263 | compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED, | |
6aed13f1 | 264 | regset used ATTRIBUTE_UNUSED) |
5b6269ed | 265 | { |
266 | } | |
267 | ||
e1ab7874 | 268 | static struct common_sched_info_def sms_common_sched_info; |
269 | ||
270 | static struct sched_deps_info_def sms_sched_deps_info = | |
271 | { | |
272 | compute_jump_reg_dependencies, | |
273 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
274 | NULL, | |
275 | 0, 0, 0 | |
276 | }; | |
277 | ||
278 | static struct haifa_sched_info sms_sched_info = | |
5b6269ed | 279 | { |
280 | NULL, | |
281 | NULL, | |
282 | NULL, | |
283 | NULL, | |
284 | NULL, | |
285 | sms_print_insn, | |
6a1cdb4d | 286 | NULL, |
4db82bc9 | 287 | NULL, /* insn_finishes_block_p */ |
5b6269ed | 288 | NULL, NULL, |
289 | NULL, NULL, | |
e1ab7874 | 290 | 0, 0, |
4d64d9a4 | 291 | |
d2412f57 | 292 | NULL, NULL, NULL, NULL, |
e2f4a6ff | 293 | NULL, NULL, |
4d64d9a4 | 294 | 0 |
5b6269ed | 295 | }; |
296 | ||
0b79ae60 | 297 | /* Partial schedule instruction ID in PS is a register move. Return |
298 | information about it. */ | |
299 | static struct ps_reg_move_info * | |
300 | ps_reg_move (partial_schedule_ptr ps, int id) | |
301 | { | |
302 | gcc_checking_assert (id >= ps->g->num_nodes); | |
f1f41a6c | 303 | return &ps->reg_moves[id - ps->g->num_nodes]; |
0b79ae60 | 304 | } |
305 | ||
7282ef12 | 306 | /* Return the rtl instruction that is being scheduled by partial schedule |
307 | instruction ID, which belongs to schedule PS. */ | |
308 | static rtx | |
309 | ps_rtl_insn (partial_schedule_ptr ps, int id) | |
310 | { | |
0b79ae60 | 311 | if (id < ps->g->num_nodes) |
312 | return ps->g->nodes[id].insn; | |
313 | else | |
314 | return ps_reg_move (ps, id)->insn; | |
7282ef12 | 315 | } |
316 | ||
9d75589a | 317 | /* Partial schedule instruction ID, which belongs to PS, occurred in |
0b79ae60 | 318 | the original (unscheduled) loop. Return the first instruction |
319 | in the loop that was associated with ps_rtl_insn (PS, ID). | |
320 | If the instruction had some notes before it, this is the first | |
321 | of those notes. */ | |
7282ef12 | 322 | static rtx |
323 | ps_first_note (partial_schedule_ptr ps, int id) | |
324 | { | |
0b79ae60 | 325 | gcc_assert (id < ps->g->num_nodes); |
7282ef12 | 326 | return ps->g->nodes[id].first_note; |
327 | } | |
328 | ||
e9df34d5 | 329 | /* Return the number of consecutive stages that are occupied by |
330 | partial schedule instruction ID in PS. */ | |
331 | static int | |
332 | ps_num_consecutive_stages (partial_schedule_ptr ps, int id) | |
333 | { | |
334 | if (id < ps->g->num_nodes) | |
335 | return 1; | |
336 | else | |
337 | return ps_reg_move (ps, id)->num_consecutive_stages; | |
338 | } | |
339 | ||
7bfc9b7c | 340 | /* Given HEAD and TAIL which are the first and last insns in a loop; |
341 | return the register which controls the loop. Return zero if it has | |
342 | more than one occurrence in the loop besides the control part or the | |
343 | do-loop pattern is not of the form we expect. */ | |
5b6269ed | 344 | static rtx |
7bfc9b7c | 345 | doloop_register_get (rtx head ATTRIBUTE_UNUSED, rtx tail ATTRIBUTE_UNUSED) |
5b6269ed | 346 | { |
6bcf94f5 | 347 | #ifdef HAVE_doloop_end |
11dd7ac1 | 348 | rtx reg, condition, insn, first_insn_not_to_check; |
5b6269ed | 349 | |
7bfc9b7c | 350 | if (!JUMP_P (tail)) |
5b6269ed | 351 | return NULL_RTX; |
352 | ||
7bfc9b7c | 353 | /* TODO: Free SMS's dependence on doloop_condition_get. */ |
354 | condition = doloop_condition_get (tail); | |
fc2abfd3 | 355 | if (! condition) |
5b6269ed | 356 | return NULL_RTX; |
357 | ||
fc2abfd3 | 358 | if (REG_P (XEXP (condition, 0))) |
359 | reg = XEXP (condition, 0); | |
360 | else if (GET_CODE (XEXP (condition, 0)) == PLUS | |
361 | && REG_P (XEXP (XEXP (condition, 0), 0))) | |
362 | reg = XEXP (XEXP (condition, 0), 0); | |
363 | else | |
364 | gcc_unreachable (); | |
5b6269ed | 365 | |
7bfc9b7c | 366 | /* Check that the COUNT_REG has no other occurrences in the loop |
367 | until the decrement. We assume the control part consists of | |
368 | either a single (parallel) branch-on-count or a (non-parallel) | |
369 | branch immediately preceded by a single (decrement) insn. */ | |
11dd7ac1 | 370 | first_insn_not_to_check = (GET_CODE (PATTERN (tail)) == PARALLEL ? tail |
cf961a94 | 371 | : prev_nondebug_insn (tail)); |
11dd7ac1 | 372 | |
373 | for (insn = head; insn != first_insn_not_to_check; insn = NEXT_INSN (insn)) | |
9973add0 | 374 | if (!DEBUG_INSN_P (insn) && reg_mentioned_p (reg, insn)) |
7bfc9b7c | 375 | { |
376 | if (dump_file) | |
11dd7ac1 | 377 | { |
378 | fprintf (dump_file, "SMS count_reg found "); | |
379 | print_rtl_single (dump_file, reg); | |
380 | fprintf (dump_file, " outside control in insn:\n"); | |
381 | print_rtl_single (dump_file, insn); | |
382 | } | |
7bfc9b7c | 383 | |
384 | return NULL_RTX; | |
385 | } | |
11dd7ac1 | 386 | |
fc2abfd3 | 387 | return reg; |
6bcf94f5 | 388 | #else |
389 | return NULL_RTX; | |
390 | #endif | |
5b6269ed | 391 | } |
392 | ||
393 | /* Check if COUNT_REG is set to a constant in the PRE_HEADER block, so | |
394 | that the number of iterations is a compile-time constant. If so, | |
395 | return the rtx that sets COUNT_REG to a constant, and set COUNT to | |
396 | this constant. Otherwise return 0. */ | |
397 | static rtx | |
398 | const_iteration_count (rtx count_reg, basic_block pre_header, | |
399 | HOST_WIDEST_INT * count) | |
400 | { | |
401 | rtx insn; | |
402 | rtx head, tail; | |
a337a404 | 403 | |
404 | if (! pre_header) | |
405 | return NULL_RTX; | |
406 | ||
6a1cdb4d | 407 | get_ebb_head_tail (pre_header, pre_header, &head, &tail); |
5b6269ed | 408 | |
409 | for (insn = tail; insn != PREV_INSN (head); insn = PREV_INSN (insn)) | |
9845d120 | 410 | if (NONDEBUG_INSN_P (insn) && single_set (insn) && |
5b6269ed | 411 | rtx_equal_p (count_reg, SET_DEST (single_set (insn)))) |
412 | { | |
413 | rtx pat = single_set (insn); | |
414 | ||
971ba038 | 415 | if (CONST_INT_P (SET_SRC (pat))) |
5b6269ed | 416 | { |
417 | *count = INTVAL (SET_SRC (pat)); | |
418 | return insn; | |
419 | } | |
420 | ||
421 | return NULL_RTX; | |
422 | } | |
423 | ||
424 | return NULL_RTX; | |
425 | } | |
426 | ||
427 | /* A very simple resource-based lower bound on the initiation interval. | |
428 | ??? Improve the accuracy of this bound by considering the | |
429 | utilization of various units. */ | |
430 | static int | |
431 | res_MII (ddg_ptr g) | |
432 | { | |
d52fd16a | 433 | if (targetm.sched.sms_res_mii) |
48e1416a | 434 | return targetm.sched.sms_res_mii (g); |
435 | ||
9845d120 | 436 | return ((g->num_nodes - g->num_debug) / issue_rate); |
5b6269ed | 437 | } |
438 | ||
439 | ||
0b79ae60 | 440 | /* A vector that contains the sched data for each ps_insn. */ |
f1f41a6c | 441 | static vec<node_sched_params> node_sched_param_vec; |
5b6269ed | 442 | |
7282ef12 | 443 | /* Allocate sched_params for each node and initialize it. */ |
5b6269ed | 444 | static void |
445 | set_node_sched_params (ddg_ptr g) | |
446 | { | |
f1f41a6c | 447 | node_sched_param_vec.truncate (0); |
448 | node_sched_param_vec.safe_grow_cleared (g->num_nodes); | |
5b6269ed | 449 | } |
450 | ||
e9df34d5 | 451 | /* Make sure that node_sched_param_vec has an entry for every move in PS. */ |
452 | static void | |
453 | extend_node_sched_params (partial_schedule_ptr ps) | |
454 | { | |
f1f41a6c | 455 | node_sched_param_vec.safe_grow_cleared (ps->g->num_nodes |
456 | + ps->reg_moves.length ()); | |
e9df34d5 | 457 | } |
458 | ||
459 | /* Update the sched_params (time, row and stage) for node U using the II, | |
460 | the CYCLE of U and MIN_CYCLE. | |
461 | We're not simply taking the following | |
462 | SCHED_STAGE (u) = CALC_STAGE_COUNT (SCHED_TIME (u), min_cycle, ii); | |
463 | because the stages may not be aligned on cycle 0. */ | |
464 | static void | |
465 | update_node_sched_params (int u, int ii, int cycle, int min_cycle) | |
466 | { | |
467 | int sc_until_cycle_zero; | |
468 | int stage; | |
469 | ||
470 | SCHED_TIME (u) = cycle; | |
471 | SCHED_ROW (u) = SMODULO (cycle, ii); | |
472 | ||
473 | /* The calculation of stage count is done adding the number | |
474 | of stages before cycle zero and after cycle zero. */ | |
475 | sc_until_cycle_zero = CALC_STAGE_COUNT (-1, min_cycle, ii); | |
476 | ||
477 | if (SCHED_TIME (u) < 0) | |
478 | { | |
479 | stage = CALC_STAGE_COUNT (-1, SCHED_TIME (u), ii); | |
480 | SCHED_STAGE (u) = sc_until_cycle_zero - stage; | |
481 | } | |
482 | else | |
483 | { | |
484 | stage = CALC_STAGE_COUNT (SCHED_TIME (u), 0, ii); | |
485 | SCHED_STAGE (u) = sc_until_cycle_zero + stage - 1; | |
486 | } | |
487 | } | |
488 | ||
5b6269ed | 489 | static void |
0b79ae60 | 490 | print_node_sched_params (FILE *file, int num_nodes, partial_schedule_ptr ps) |
5b6269ed | 491 | { |
492 | int i; | |
493 | ||
3f5be5f4 | 494 | if (! file) |
a337a404 | 495 | return; |
5b6269ed | 496 | for (i = 0; i < num_nodes; i++) |
497 | { | |
7282ef12 | 498 | node_sched_params_ptr nsp = SCHED_PARAMS (i); |
5b6269ed | 499 | |
896dbaed | 500 | fprintf (file, "Node = %d; INSN = %d\n", i, |
0b79ae60 | 501 | INSN_UID (ps_rtl_insn (ps, i))); |
502 | fprintf (file, " asap = %d:\n", NODE_ASAP (&ps->g->nodes[i])); | |
3f5be5f4 | 503 | fprintf (file, " time = %d:\n", nsp->time); |
e9df34d5 | 504 | fprintf (file, " stage = %d:\n", nsp->stage); |
505 | } | |
506 | } | |
507 | ||
508 | /* Set SCHED_COLUMN for each instruction in row ROW of PS. */ | |
509 | static void | |
510 | set_columns_for_row (partial_schedule_ptr ps, int row) | |
511 | { | |
512 | ps_insn_ptr cur_insn; | |
513 | int column; | |
514 | ||
515 | column = 0; | |
516 | for (cur_insn = ps->rows[row]; cur_insn; cur_insn = cur_insn->next_in_row) | |
517 | SCHED_COLUMN (cur_insn->id) = column++; | |
518 | } | |
519 | ||
520 | /* Set SCHED_COLUMN for each instruction in PS. */ | |
521 | static void | |
522 | set_columns_for_ps (partial_schedule_ptr ps) | |
523 | { | |
524 | int row; | |
525 | ||
526 | for (row = 0; row < ps->ii; row++) | |
527 | set_columns_for_row (ps, row); | |
528 | } | |
0b79ae60 | 529 | |
e9df34d5 | 530 | /* Try to schedule the move with ps_insn identifier I_REG_MOVE in PS. |
531 | Its single predecessor has already been scheduled, as has its | |
532 | ddg node successors. (The move may have also another move as its | |
533 | successor, in which case that successor will be scheduled later.) | |
534 | ||
535 | The move is part of a chain that satisfies register dependencies | |
536 | between a producing ddg node and various consuming ddg nodes. | |
537 | If some of these dependencies have a distance of 1 (meaning that | |
469e33a0 | 538 | the use is upward-exposed) then DISTANCE1_USES is nonnull and |
e9df34d5 | 539 | contains the set of uses with distance-1 dependencies. |
540 | DISTANCE1_USES is null otherwise. | |
541 | ||
542 | MUST_FOLLOW is a scratch bitmap that is big enough to hold | |
543 | all current ps_insn ids. | |
544 | ||
545 | Return true on success. */ | |
546 | static bool | |
547 | schedule_reg_move (partial_schedule_ptr ps, int i_reg_move, | |
548 | sbitmap distance1_uses, sbitmap must_follow) | |
549 | { | |
550 | unsigned int u; | |
551 | int this_time, this_distance, this_start, this_end, this_latency; | |
552 | int start, end, c, ii; | |
553 | sbitmap_iterator sbi; | |
554 | ps_reg_move_info *move; | |
555 | rtx this_insn; | |
556 | ps_insn_ptr psi; | |
557 | ||
558 | move = ps_reg_move (ps, i_reg_move); | |
559 | ii = ps->ii; | |
560 | if (dump_file) | |
561 | { | |
562 | fprintf (dump_file, "Scheduling register move INSN %d; ii = %d" | |
563 | ", min cycle = %d\n\n", INSN_UID (move->insn), ii, | |
564 | PS_MIN_CYCLE (ps)); | |
565 | print_rtl_single (dump_file, move->insn); | |
566 | fprintf (dump_file, "\n%11s %11s %5s\n", "start", "end", "time"); | |
567 | fprintf (dump_file, "=========== =========== =====\n"); | |
568 | } | |
569 | ||
570 | start = INT_MIN; | |
571 | end = INT_MAX; | |
572 | ||
573 | /* For dependencies of distance 1 between a producer ddg node A | |
574 | and consumer ddg node B, we have a chain of dependencies: | |
575 | ||
576 | A --(T,L1,1)--> M1 --(T,L2,0)--> M2 ... --(T,Ln,0)--> B | |
577 | ||
578 | where Mi is the ith move. For dependencies of distance 0 between | |
579 | a producer ddg node A and consumer ddg node C, we have a chain of | |
580 | dependencies: | |
581 | ||
582 | A --(T,L1',0)--> M1' --(T,L2',0)--> M2' ... --(T,Ln',0)--> C | |
583 | ||
584 | where Mi' occupies the same position as Mi but occurs a stage later. | |
585 | We can only schedule each move once, so if we have both types of | |
586 | chain, we model the second as: | |
587 | ||
588 | A --(T,L1',1)--> M1 --(T,L2',0)--> M2 ... --(T,Ln',-1)--> C | |
589 | ||
590 | First handle the dependencies between the previously-scheduled | |
591 | predecessor and the move. */ | |
592 | this_insn = ps_rtl_insn (ps, move->def); | |
593 | this_latency = insn_latency (this_insn, move->insn); | |
594 | this_distance = distance1_uses && move->def < ps->g->num_nodes ? 1 : 0; | |
595 | this_time = SCHED_TIME (move->def) - this_distance * ii; | |
596 | this_start = this_time + this_latency; | |
597 | this_end = this_time + ii; | |
598 | if (dump_file) | |
599 | fprintf (dump_file, "%11d %11d %5d %d --(T,%d,%d)--> %d\n", | |
600 | this_start, this_end, SCHED_TIME (move->def), | |
601 | INSN_UID (this_insn), this_latency, this_distance, | |
602 | INSN_UID (move->insn)); | |
603 | ||
604 | if (start < this_start) | |
605 | start = this_start; | |
606 | if (end > this_end) | |
607 | end = this_end; | |
608 | ||
609 | /* Handle the dependencies between the move and previously-scheduled | |
610 | successors. */ | |
0d211963 | 611 | EXECUTE_IF_SET_IN_BITMAP (move->uses, 0, u, sbi) |
e9df34d5 | 612 | { |
613 | this_insn = ps_rtl_insn (ps, u); | |
614 | this_latency = insn_latency (move->insn, this_insn); | |
08b7917c | 615 | if (distance1_uses && !bitmap_bit_p (distance1_uses, u)) |
e9df34d5 | 616 | this_distance = -1; |
617 | else | |
618 | this_distance = 0; | |
619 | this_time = SCHED_TIME (u) + this_distance * ii; | |
620 | this_start = this_time - ii; | |
621 | this_end = this_time - this_latency; | |
622 | if (dump_file) | |
623 | fprintf (dump_file, "%11d %11d %5d %d --(T,%d,%d)--> %d\n", | |
624 | this_start, this_end, SCHED_TIME (u), INSN_UID (move->insn), | |
625 | this_latency, this_distance, INSN_UID (this_insn)); | |
626 | ||
627 | if (start < this_start) | |
628 | start = this_start; | |
629 | if (end > this_end) | |
630 | end = this_end; | |
631 | } | |
632 | ||
633 | if (dump_file) | |
634 | { | |
635 | fprintf (dump_file, "----------- ----------- -----\n"); | |
636 | fprintf (dump_file, "%11d %11d %5s %s\n", start, end, "", "(max, min)"); | |
637 | } | |
638 | ||
53c5d9d4 | 639 | bitmap_clear (must_follow); |
08b7917c | 640 | bitmap_set_bit (must_follow, move->def); |
e9df34d5 | 641 | |
642 | start = MAX (start, end - (ii - 1)); | |
643 | for (c = end; c >= start; c--) | |
644 | { | |
645 | psi = ps_add_node_check_conflicts (ps, i_reg_move, c, | |
646 | move->uses, must_follow); | |
647 | if (psi) | |
648 | { | |
649 | update_node_sched_params (i_reg_move, ii, c, PS_MIN_CYCLE (ps)); | |
650 | if (dump_file) | |
651 | fprintf (dump_file, "\nScheduled register move INSN %d at" | |
652 | " time %d, row %d\n\n", INSN_UID (move->insn), c, | |
653 | SCHED_ROW (i_reg_move)); | |
654 | return true; | |
5b6269ed | 655 | } |
656 | } | |
e9df34d5 | 657 | |
658 | if (dump_file) | |
659 | fprintf (dump_file, "\nNo available slot\n\n"); | |
660 | ||
661 | return false; | |
5b6269ed | 662 | } |
663 | ||
a337a404 | 664 | /* |
665 | Breaking intra-loop register anti-dependences: | |
666 | Each intra-loop register anti-dependence implies a cross-iteration true | |
667 | dependence of distance 1. Therefore, we can remove such false dependencies | |
668 | and figure out if the partial schedule broke them by checking if (for a | |
669 | true-dependence of distance 1): SCHED_TIME (def) < SCHED_TIME (use) and | |
670 | if so generate a register move. The number of such moves is equal to: | |
671 | SCHED_TIME (use) - SCHED_TIME (def) { 0 broken | |
06b27565 | 672 | nreg_moves = ----------------------------------- + 1 - { dependence. |
a337a404 | 673 | ii { 1 if not. |
674 | */ | |
0b79ae60 | 675 | static bool |
676 | schedule_reg_moves (partial_schedule_ptr ps) | |
5b6269ed | 677 | { |
678 | ddg_ptr g = ps->g; | |
679 | int ii = ps->ii; | |
680 | int i; | |
681 | ||
682 | for (i = 0; i < g->num_nodes; i++) | |
683 | { | |
684 | ddg_node_ptr u = &g->nodes[i]; | |
685 | ddg_edge_ptr e; | |
686 | int nreg_moves = 0, i_reg_move; | |
5b6269ed | 687 | rtx prev_reg, old_reg; |
0b79ae60 | 688 | int first_move; |
e9df34d5 | 689 | int distances[2]; |
690 | sbitmap must_follow; | |
691 | sbitmap distance1_uses; | |
d1cae43e | 692 | rtx set = single_set (u->insn); |
693 | ||
694 | /* Skip instructions that do not set a register. */ | |
695 | if ((set && !REG_P (SET_DEST (set)))) | |
696 | continue; | |
697 | ||
5b6269ed | 698 | /* Compute the number of reg_moves needed for u, by looking at life |
699 | ranges started at u (excluding self-loops). */ | |
e9df34d5 | 700 | distances[0] = distances[1] = false; |
5b6269ed | 701 | for (e = u->out; e; e = e->next_out) |
702 | if (e->type == TRUE_DEP && e->dest != e->src) | |
703 | { | |
7282ef12 | 704 | int nreg_moves4e = (SCHED_TIME (e->dest->cuid) |
705 | - SCHED_TIME (e->src->cuid)) / ii; | |
5b6269ed | 706 | |
a337a404 | 707 | if (e->distance == 1) |
7282ef12 | 708 | nreg_moves4e = (SCHED_TIME (e->dest->cuid) |
709 | - SCHED_TIME (e->src->cuid) + ii) / ii; | |
a337a404 | 710 | |
365db11e | 711 | /* If dest precedes src in the schedule of the kernel, then dest |
5b6269ed | 712 | will read before src writes and we can save one reg_copy. */ |
7282ef12 | 713 | if (SCHED_ROW (e->dest->cuid) == SCHED_ROW (e->src->cuid) |
714 | && SCHED_COLUMN (e->dest->cuid) < SCHED_COLUMN (e->src->cuid)) | |
5b6269ed | 715 | nreg_moves4e--; |
716 | ||
d1cae43e | 717 | if (nreg_moves4e >= 1) |
718 | { | |
719 | /* !single_set instructions are not supported yet and | |
720 | thus we do not except to encounter them in the loop | |
721 | except from the doloop part. For the latter case | |
722 | we assume no regmoves are generated as the doloop | |
723 | instructions are tied to the branch with an edge. */ | |
724 | gcc_assert (set); | |
2917ecd3 | 725 | /* If the instruction contains auto-inc register then |
726 | validate that the regmov is being generated for the | |
727 | target regsiter rather then the inc'ed register. */ | |
728 | gcc_assert (!autoinc_var_is_used_p (u->insn, e->dest->insn)); | |
d1cae43e | 729 | } |
730 | ||
e9df34d5 | 731 | if (nreg_moves4e) |
732 | { | |
733 | gcc_assert (e->distance < 2); | |
734 | distances[e->distance] = true; | |
735 | } | |
5b6269ed | 736 | nreg_moves = MAX (nreg_moves, nreg_moves4e); |
737 | } | |
738 | ||
739 | if (nreg_moves == 0) | |
740 | continue; | |
741 | ||
0b79ae60 | 742 | /* Create NREG_MOVES register moves. */ |
f1f41a6c | 743 | first_move = ps->reg_moves.length (); |
744 | ps->reg_moves.safe_grow_cleared (first_move + nreg_moves); | |
e9df34d5 | 745 | extend_node_sched_params (ps); |
0b79ae60 | 746 | |
747 | /* Record the moves associated with this node. */ | |
748 | first_move += ps->g->num_nodes; | |
0b79ae60 | 749 | |
750 | /* Generate each move. */ | |
751 | old_reg = prev_reg = SET_DEST (single_set (u->insn)); | |
752 | for (i_reg_move = 0; i_reg_move < nreg_moves; i_reg_move++) | |
753 | { | |
754 | ps_reg_move_info *move = ps_reg_move (ps, first_move + i_reg_move); | |
755 | ||
756 | move->def = i_reg_move > 0 ? first_move + i_reg_move - 1 : i; | |
e9df34d5 | 757 | move->uses = sbitmap_alloc (first_move + nreg_moves); |
0b79ae60 | 758 | move->old_reg = old_reg; |
759 | move->new_reg = gen_reg_rtx (GET_MODE (prev_reg)); | |
e9df34d5 | 760 | move->num_consecutive_stages = distances[0] && distances[1] ? 2 : 1; |
0b79ae60 | 761 | move->insn = gen_move_insn (move->new_reg, copy_rtx (prev_reg)); |
53c5d9d4 | 762 | bitmap_clear (move->uses); |
0b79ae60 | 763 | |
764 | prev_reg = move->new_reg; | |
765 | } | |
766 | ||
e9df34d5 | 767 | distance1_uses = distances[1] ? sbitmap_alloc (g->num_nodes) : NULL; |
768 | ||
5b6269ed | 769 | /* Every use of the register defined by node may require a different |
770 | copy of this register, depending on the time the use is scheduled. | |
0b79ae60 | 771 | Record which uses require which move results. */ |
5b6269ed | 772 | for (e = u->out; e; e = e->next_out) |
773 | if (e->type == TRUE_DEP && e->dest != e->src) | |
774 | { | |
7282ef12 | 775 | int dest_copy = (SCHED_TIME (e->dest->cuid) |
776 | - SCHED_TIME (e->src->cuid)) / ii; | |
5b6269ed | 777 | |
a337a404 | 778 | if (e->distance == 1) |
7282ef12 | 779 | dest_copy = (SCHED_TIME (e->dest->cuid) |
780 | - SCHED_TIME (e->src->cuid) + ii) / ii; | |
a337a404 | 781 | |
7282ef12 | 782 | if (SCHED_ROW (e->dest->cuid) == SCHED_ROW (e->src->cuid) |
783 | && SCHED_COLUMN (e->dest->cuid) < SCHED_COLUMN (e->src->cuid)) | |
5b6269ed | 784 | dest_copy--; |
785 | ||
786 | if (dest_copy) | |
0b79ae60 | 787 | { |
788 | ps_reg_move_info *move; | |
5b6269ed | 789 | |
0b79ae60 | 790 | move = ps_reg_move (ps, first_move + dest_copy - 1); |
08b7917c | 791 | bitmap_set_bit (move->uses, e->dest->cuid); |
e9df34d5 | 792 | if (e->distance == 1) |
08b7917c | 793 | bitmap_set_bit (distance1_uses, e->dest->cuid); |
0b79ae60 | 794 | } |
795 | } | |
e9df34d5 | 796 | |
797 | must_follow = sbitmap_alloc (first_move + nreg_moves); | |
798 | for (i_reg_move = 0; i_reg_move < nreg_moves; i_reg_move++) | |
799 | if (!schedule_reg_move (ps, first_move + i_reg_move, | |
800 | distance1_uses, must_follow)) | |
801 | break; | |
802 | sbitmap_free (must_follow); | |
803 | if (distance1_uses) | |
804 | sbitmap_free (distance1_uses); | |
805 | if (i_reg_move < nreg_moves) | |
806 | return false; | |
0b79ae60 | 807 | } |
808 | return true; | |
809 | } | |
5b6269ed | 810 | |
0b79ae60 | 811 | /* Emit the moves associatied with PS. Apply the substitutions |
812 | associated with them. */ | |
813 | static void | |
814 | apply_reg_moves (partial_schedule_ptr ps) | |
815 | { | |
816 | ps_reg_move_info *move; | |
817 | int i; | |
5b6269ed | 818 | |
f1f41a6c | 819 | FOR_EACH_VEC_ELT (ps->reg_moves, i, move) |
0b79ae60 | 820 | { |
821 | unsigned int i_use; | |
822 | sbitmap_iterator sbi; | |
5b6269ed | 823 | |
0d211963 | 824 | EXECUTE_IF_SET_IN_BITMAP (move->uses, 0, i_use, sbi) |
0b79ae60 | 825 | { |
826 | replace_rtx (ps->g->nodes[i_use].insn, move->old_reg, move->new_reg); | |
827 | df_insn_rescan (ps->g->nodes[i_use].insn); | |
5b6269ed | 828 | } |
829 | } | |
a5ea7ace | 830 | } |
831 | ||
6f7f081f | 832 | /* Bump the SCHED_TIMEs of all nodes by AMOUNT. Set the values of |
833 | SCHED_ROW and SCHED_STAGE. Instruction scheduled on cycle AMOUNT | |
834 | will move to cycle zero. */ | |
5b6269ed | 835 | static void |
6f7f081f | 836 | reset_sched_times (partial_schedule_ptr ps, int amount) |
5b6269ed | 837 | { |
76387907 | 838 | int row; |
5b6269ed | 839 | int ii = ps->ii; |
76387907 | 840 | ps_insn_ptr crr_insn; |
5b6269ed | 841 | |
76387907 | 842 | for (row = 0; row < ii; row++) |
843 | for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) | |
844 | { | |
7282ef12 | 845 | int u = crr_insn->id; |
76387907 | 846 | int normalized_time = SCHED_TIME (u) - amount; |
6f7f081f | 847 | int new_min_cycle = PS_MIN_CYCLE (ps) - amount; |
76387907 | 848 | |
6f7f081f | 849 | if (dump_file) |
850 | { | |
851 | /* Print the scheduling times after the rotation. */ | |
7282ef12 | 852 | rtx insn = ps_rtl_insn (ps, u); |
853 | ||
6f7f081f | 854 | fprintf (dump_file, "crr_insn->node=%d (insn id %d), " |
7282ef12 | 855 | "crr_insn->cycle=%d, min_cycle=%d", u, |
856 | INSN_UID (insn), normalized_time, new_min_cycle); | |
857 | if (JUMP_P (insn)) | |
6f7f081f | 858 | fprintf (dump_file, " (branch)"); |
859 | fprintf (dump_file, "\n"); | |
860 | } | |
861 | ||
76387907 | 862 | gcc_assert (SCHED_TIME (u) >= ps->min_cycle); |
863 | gcc_assert (SCHED_TIME (u) <= ps->max_cycle); | |
a5ea7ace | 864 | |
865 | crr_insn->cycle = normalized_time; | |
866 | update_node_sched_params (u, ii, normalized_time, new_min_cycle); | |
76387907 | 867 | } |
5b6269ed | 868 | } |
6f7f081f | 869 | |
5b6269ed | 870 | /* Permute the insns according to their order in PS, from row 0 to |
871 | row ii-1, and position them right before LAST. This schedules | |
872 | the insns of the loop kernel. */ | |
873 | static void | |
874 | permute_partial_schedule (partial_schedule_ptr ps, rtx last) | |
875 | { | |
876 | int ii = ps->ii; | |
877 | int row; | |
878 | ps_insn_ptr ps_ij; | |
879 | ||
880 | for (row = 0; row < ii ; row++) | |
881 | for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row) | |
7282ef12 | 882 | { |
883 | rtx insn = ps_rtl_insn (ps, ps_ij->id); | |
884 | ||
885 | if (PREV_INSN (last) != insn) | |
e9df34d5 | 886 | { |
887 | if (ps_ij->id < ps->g->num_nodes) | |
888 | reorder_insns_nobb (ps_first_note (ps, ps_ij->id), insn, | |
889 | PREV_INSN (last)); | |
890 | else | |
891 | add_insn_before (insn, last, NULL); | |
892 | } | |
7282ef12 | 893 | } |
5b6269ed | 894 | } |
895 | ||
a5ea7ace | 896 | /* Set bitmaps TMP_FOLLOW and TMP_PRECEDE to MUST_FOLLOW and MUST_PRECEDE |
897 | respectively only if cycle C falls on the border of the scheduling | |
898 | window boundaries marked by START and END cycles. STEP is the | |
899 | direction of the window. */ | |
900 | static inline void | |
901 | set_must_precede_follow (sbitmap *tmp_follow, sbitmap must_follow, | |
902 | sbitmap *tmp_precede, sbitmap must_precede, int c, | |
903 | int start, int end, int step) | |
904 | { | |
905 | *tmp_precede = NULL; | |
906 | *tmp_follow = NULL; | |
907 | ||
908 | if (c == start) | |
909 | { | |
910 | if (step == 1) | |
911 | *tmp_precede = must_precede; | |
912 | else /* step == -1. */ | |
913 | *tmp_follow = must_follow; | |
914 | } | |
915 | if (c == end - step) | |
916 | { | |
917 | if (step == 1) | |
918 | *tmp_follow = must_follow; | |
919 | else /* step == -1. */ | |
920 | *tmp_precede = must_precede; | |
921 | } | |
922 | ||
923 | } | |
924 | ||
925 | /* Return True if the branch can be moved to row ii-1 while | |
926 | normalizing the partial schedule PS to start from cycle zero and thus | |
927 | optimize the SC. Otherwise return False. */ | |
928 | static bool | |
929 | optimize_sc (partial_schedule_ptr ps, ddg_ptr g) | |
930 | { | |
931 | int amount = PS_MIN_CYCLE (ps); | |
932 | sbitmap sched_nodes = sbitmap_alloc (g->num_nodes); | |
933 | int start, end, step; | |
934 | int ii = ps->ii; | |
935 | bool ok = false; | |
936 | int stage_count, stage_count_curr; | |
937 | ||
938 | /* Compare the SC after normalization and SC after bringing the branch | |
939 | to row ii-1. If they are equal just bail out. */ | |
940 | stage_count = calculate_stage_count (ps, amount); | |
941 | stage_count_curr = | |
7282ef12 | 942 | calculate_stage_count (ps, SCHED_TIME (g->closing_branch->cuid) - (ii - 1)); |
a5ea7ace | 943 | |
944 | if (stage_count == stage_count_curr) | |
945 | { | |
946 | if (dump_file) | |
947 | fprintf (dump_file, "SMS SC already optimized.\n"); | |
948 | ||
949 | ok = false; | |
950 | goto clear; | |
951 | } | |
952 | ||
953 | if (dump_file) | |
954 | { | |
955 | fprintf (dump_file, "SMS Trying to optimize branch location\n"); | |
956 | fprintf (dump_file, "SMS partial schedule before trial:\n"); | |
957 | print_partial_schedule (ps, dump_file); | |
958 | } | |
959 | ||
960 | /* First, normalize the partial scheduling. */ | |
961 | reset_sched_times (ps, amount); | |
962 | rotate_partial_schedule (ps, amount); | |
963 | if (dump_file) | |
964 | { | |
965 | fprintf (dump_file, | |
966 | "SMS partial schedule after normalization (ii, %d, SC %d):\n", | |
967 | ii, stage_count); | |
968 | print_partial_schedule (ps, dump_file); | |
969 | } | |
970 | ||
7282ef12 | 971 | if (SMODULO (SCHED_TIME (g->closing_branch->cuid), ii) == ii - 1) |
a5ea7ace | 972 | { |
973 | ok = true; | |
974 | goto clear; | |
975 | } | |
976 | ||
53c5d9d4 | 977 | bitmap_ones (sched_nodes); |
a5ea7ace | 978 | |
979 | /* Calculate the new placement of the branch. It should be in row | |
980 | ii-1 and fall into it's scheduling window. */ | |
981 | if (get_sched_window (ps, g->closing_branch, sched_nodes, ii, &start, | |
982 | &step, &end) == 0) | |
983 | { | |
984 | bool success; | |
985 | ps_insn_ptr next_ps_i; | |
7282ef12 | 986 | int branch_cycle = SCHED_TIME (g->closing_branch->cuid); |
a5ea7ace | 987 | int row = SMODULO (branch_cycle, ps->ii); |
988 | int num_splits = 0; | |
989 | sbitmap must_precede, must_follow, tmp_precede, tmp_follow; | |
990 | int c; | |
991 | ||
992 | if (dump_file) | |
993 | fprintf (dump_file, "\nTrying to schedule node %d " | |
994 | "INSN = %d in (%d .. %d) step %d\n", | |
995 | g->closing_branch->cuid, | |
996 | (INSN_UID (g->closing_branch->insn)), start, end, step); | |
997 | ||
998 | gcc_assert ((step > 0 && start < end) || (step < 0 && start > end)); | |
999 | if (step == 1) | |
1000 | { | |
1001 | c = start + ii - SMODULO (start, ii) - 1; | |
1002 | gcc_assert (c >= start); | |
1003 | if (c >= end) | |
1004 | { | |
1005 | ok = false; | |
1006 | if (dump_file) | |
1007 | fprintf (dump_file, | |
1008 | "SMS failed to schedule branch at cycle: %d\n", c); | |
1009 | goto clear; | |
1010 | } | |
1011 | } | |
1012 | else | |
1013 | { | |
1014 | c = start - SMODULO (start, ii) - 1; | |
1015 | gcc_assert (c <= start); | |
1016 | ||
1017 | if (c <= end) | |
1018 | { | |
1019 | if (dump_file) | |
1020 | fprintf (dump_file, | |
1021 | "SMS failed to schedule branch at cycle: %d\n", c); | |
1022 | ok = false; | |
1023 | goto clear; | |
1024 | } | |
1025 | } | |
1026 | ||
1027 | must_precede = sbitmap_alloc (g->num_nodes); | |
1028 | must_follow = sbitmap_alloc (g->num_nodes); | |
1029 | ||
1030 | /* Try to schedule the branch is it's new cycle. */ | |
1031 | calculate_must_precede_follow (g->closing_branch, start, end, | |
1032 | step, ii, sched_nodes, | |
1033 | must_precede, must_follow); | |
1034 | ||
1035 | set_must_precede_follow (&tmp_follow, must_follow, &tmp_precede, | |
1036 | must_precede, c, start, end, step); | |
1037 | ||
1038 | /* Find the element in the partial schedule related to the closing | |
1039 | branch so we can remove it from it's current cycle. */ | |
1040 | for (next_ps_i = ps->rows[row]; | |
1041 | next_ps_i; next_ps_i = next_ps_i->next_in_row) | |
7282ef12 | 1042 | if (next_ps_i->id == g->closing_branch->cuid) |
a5ea7ace | 1043 | break; |
1044 | ||
9bf2b489 | 1045 | remove_node_from_ps (ps, next_ps_i); |
a5ea7ace | 1046 | success = |
7282ef12 | 1047 | try_scheduling_node_in_cycle (ps, g->closing_branch->cuid, c, |
a5ea7ace | 1048 | sched_nodes, &num_splits, |
1049 | tmp_precede, tmp_follow); | |
1050 | gcc_assert (num_splits == 0); | |
1051 | if (!success) | |
1052 | { | |
1053 | if (dump_file) | |
1054 | fprintf (dump_file, | |
1055 | "SMS failed to schedule branch at cycle: %d, " | |
1056 | "bringing it back to cycle %d\n", c, branch_cycle); | |
1057 | ||
1058 | /* The branch was failed to be placed in row ii - 1. | |
1059 | Put it back in it's original place in the partial | |
1060 | schedualing. */ | |
1061 | set_must_precede_follow (&tmp_follow, must_follow, &tmp_precede, | |
1062 | must_precede, branch_cycle, start, end, | |
1063 | step); | |
1064 | success = | |
7282ef12 | 1065 | try_scheduling_node_in_cycle (ps, g->closing_branch->cuid, |
a5ea7ace | 1066 | branch_cycle, sched_nodes, |
1067 | &num_splits, tmp_precede, | |
1068 | tmp_follow); | |
1069 | gcc_assert (success && (num_splits == 0)); | |
1070 | ok = false; | |
1071 | } | |
1072 | else | |
1073 | { | |
1074 | /* The branch is placed in row ii - 1. */ | |
1075 | if (dump_file) | |
1076 | fprintf (dump_file, | |
1077 | "SMS success in moving branch to cycle %d\n", c); | |
1078 | ||
7282ef12 | 1079 | update_node_sched_params (g->closing_branch->cuid, ii, c, |
a5ea7ace | 1080 | PS_MIN_CYCLE (ps)); |
1081 | ok = true; | |
1082 | } | |
1083 | ||
1084 | free (must_precede); | |
1085 | free (must_follow); | |
1086 | } | |
1087 | ||
1088 | clear: | |
1089 | free (sched_nodes); | |
1090 | return ok; | |
1091 | } | |
1092 | ||
5b6269ed | 1093 | static void |
1094 | duplicate_insns_of_cycles (partial_schedule_ptr ps, int from_stage, | |
e9df34d5 | 1095 | int to_stage, rtx count_reg) |
5b6269ed | 1096 | { |
1097 | int row; | |
1098 | ps_insn_ptr ps_ij; | |
1099 | ||
1100 | for (row = 0; row < ps->ii; row++) | |
1101 | for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row) | |
1102 | { | |
7282ef12 | 1103 | int u = ps_ij->id; |
e9df34d5 | 1104 | int first_u, last_u; |
7282ef12 | 1105 | rtx u_insn; |
5b6269ed | 1106 | |
7bfc9b7c | 1107 | /* Do not duplicate any insn which refers to count_reg as it |
1108 | belongs to the control part. | |
6f7f081f | 1109 | The closing branch is scheduled as well and thus should |
1110 | be ignored. | |
7bfc9b7c | 1111 | TODO: This should be done by analyzing the control part of |
1112 | the loop. */ | |
7282ef12 | 1113 | u_insn = ps_rtl_insn (ps, u); |
1114 | if (reg_mentioned_p (count_reg, u_insn) | |
1115 | || JUMP_P (u_insn)) | |
7bfc9b7c | 1116 | continue; |
1117 | ||
e9df34d5 | 1118 | first_u = SCHED_STAGE (u); |
1119 | last_u = first_u + ps_num_consecutive_stages (ps, u) - 1; | |
1120 | if (from_stage <= last_u && to_stage >= first_u) | |
5b6269ed | 1121 | { |
e9df34d5 | 1122 | if (u < ps->g->num_nodes) |
1123 | duplicate_insn_chain (ps_first_note (ps, u), u_insn); | |
1124 | else | |
1125 | emit_insn (copy_rtx (PATTERN (u_insn))); | |
5b6269ed | 1126 | } |
5b6269ed | 1127 | } |
1128 | } | |
1129 | ||
1130 | ||
1131 | /* Generate the instructions (including reg_moves) for prolog & epilog. */ | |
1132 | static void | |
7bfc9b7c | 1133 | generate_prolog_epilog (partial_schedule_ptr ps, struct loop *loop, |
1134 | rtx count_reg, rtx count_init) | |
5b6269ed | 1135 | { |
1136 | int i; | |
1137 | int last_stage = PS_STAGE_COUNT (ps) - 1; | |
1138 | edge e; | |
48e1416a | 1139 | |
5b6269ed | 1140 | /* Generate the prolog, inserting its insns on the loop-entry edge. */ |
1141 | start_sequence (); | |
1142 | ||
7bfc9b7c | 1143 | if (!count_init) |
1144 | { | |
1145 | /* Generate instructions at the beginning of the prolog to | |
1146 | adjust the loop count by STAGE_COUNT. If loop count is constant | |
1147 | (count_init), this constant is adjusted by STAGE_COUNT in | |
1148 | generate_prolog_epilog function. */ | |
1149 | rtx sub_reg = NULL_RTX; | |
1150 | ||
0359f9f5 | 1151 | sub_reg = expand_simple_binop (GET_MODE (count_reg), MINUS, count_reg, |
1152 | gen_int_mode (last_stage, | |
1153 | GET_MODE (count_reg)), | |
7bfc9b7c | 1154 | count_reg, 1, OPTAB_DIRECT); |
1155 | gcc_assert (REG_P (sub_reg)); | |
1156 | if (REGNO (sub_reg) != REGNO (count_reg)) | |
1157 | emit_move_insn (count_reg, sub_reg); | |
1158 | } | |
5b6269ed | 1159 | |
1160 | for (i = 0; i < last_stage; i++) | |
e9df34d5 | 1161 | duplicate_insns_of_cycles (ps, 0, i, count_reg); |
48e1416a | 1162 | |
88e6f696 | 1163 | /* Put the prolog on the entry edge. */ |
b6a75366 | 1164 | e = loop_preheader_edge (loop); |
d4473c84 | 1165 | split_edge_and_insert (e, get_insns ()); |
6c3ff102 | 1166 | if (!flag_resched_modulo_sched) |
1167 | e->dest->flags |= BB_DISABLE_SCHEDULE; | |
b6a75366 | 1168 | |
5b6269ed | 1169 | end_sequence (); |
1170 | ||
1171 | /* Generate the epilog, inserting its insns on the loop-exit edge. */ | |
1172 | start_sequence (); | |
1173 | ||
1174 | for (i = 0; i < last_stage; i++) | |
e9df34d5 | 1175 | duplicate_insns_of_cycles (ps, i + 1, last_stage, count_reg); |
48e1416a | 1176 | |
88e6f696 | 1177 | /* Put the epilogue on the exit edge. */ |
d9e7e1a2 | 1178 | gcc_assert (single_exit (loop)); |
1179 | e = single_exit (loop); | |
d4473c84 | 1180 | split_edge_and_insert (e, get_insns ()); |
6c3ff102 | 1181 | if (!flag_resched_modulo_sched) |
1182 | e->dest->flags |= BB_DISABLE_SCHEDULE; | |
1183 | ||
b6a75366 | 1184 | end_sequence (); |
1185 | } | |
1186 | ||
6c3ff102 | 1187 | /* Mark LOOP as software pipelined so the later |
1188 | scheduling passes don't touch it. */ | |
1189 | static void | |
1190 | mark_loop_unsched (struct loop *loop) | |
1191 | { | |
1192 | unsigned i; | |
1193 | basic_block *bbs = get_loop_body (loop); | |
1194 | ||
1195 | for (i = 0; i < loop->num_nodes; i++) | |
1196 | bbs[i]->flags |= BB_DISABLE_SCHEDULE; | |
eb05e398 | 1197 | |
1198 | free (bbs); | |
6c3ff102 | 1199 | } |
1200 | ||
b6a75366 | 1201 | /* Return true if all the BBs of the loop are empty except the |
1202 | loop header. */ | |
1203 | static bool | |
1204 | loop_single_full_bb_p (struct loop *loop) | |
1205 | { | |
1206 | unsigned i; | |
1207 | basic_block *bbs = get_loop_body (loop); | |
1208 | ||
1209 | for (i = 0; i < loop->num_nodes ; i++) | |
5b6269ed | 1210 | { |
b6a75366 | 1211 | rtx head, tail; |
1212 | bool empty_bb = true; | |
1213 | ||
1214 | if (bbs[i] == loop->header) | |
1215 | continue; | |
1216 | ||
1217 | /* Make sure that basic blocks other than the header | |
1218 | have only notes labels or jumps. */ | |
6a1cdb4d | 1219 | get_ebb_head_tail (bbs[i], bbs[i], &head, &tail); |
b6a75366 | 1220 | for (; head != NEXT_INSN (tail); head = NEXT_INSN (head)) |
1221 | { | |
1222 | if (NOTE_P (head) || LABEL_P (head) | |
9845d120 | 1223 | || (INSN_P (head) && (DEBUG_INSN_P (head) || JUMP_P (head)))) |
b6a75366 | 1224 | continue; |
1225 | empty_bb = false; | |
1226 | break; | |
1227 | } | |
1228 | ||
1229 | if (! empty_bb) | |
1230 | { | |
1231 | free (bbs); | |
1232 | return false; | |
1233 | } | |
1234 | } | |
1235 | free (bbs); | |
1236 | return true; | |
1237 | } | |
5b6269ed | 1238 | |
56134a9f | 1239 | /* Dump file:line from INSN's location info to dump_file. */ |
1240 | ||
1241 | static void | |
5169661d | 1242 | dump_insn_location (rtx insn) |
56134a9f | 1243 | { |
5169661d | 1244 | if (dump_file && INSN_LOCATION (insn)) |
56134a9f | 1245 | { |
1246 | const char *file = insn_file (insn); | |
1247 | if (file) | |
1248 | fprintf (dump_file, " %s:%i", file, insn_line (insn)); | |
1249 | } | |
1250 | } | |
1251 | ||
b6a75366 | 1252 | /* A simple loop from SMS point of view; it is a loop that is composed of |
1253 | either a single basic block or two BBs - a header and a latch. */ | |
1254 | #define SIMPLE_SMS_LOOP_P(loop) ((loop->num_nodes < 3 ) \ | |
1255 | && (EDGE_COUNT (loop->latch->preds) == 1) \ | |
1256 | && (EDGE_COUNT (loop->latch->succs) == 1)) | |
5b6269ed | 1257 | |
b6a75366 | 1258 | /* Return true if the loop is in its canonical form and false if not. |
1259 | i.e. SIMPLE_SMS_LOOP_P and have one preheader block, and single exit. */ | |
1260 | static bool | |
3f5be5f4 | 1261 | loop_canon_p (struct loop *loop) |
b6a75366 | 1262 | { |
5b6269ed | 1263 | |
9e3536f4 | 1264 | if (loop->inner || !loop_outer (loop)) |
7707ba40 | 1265 | { |
1266 | if (dump_file) | |
1267 | fprintf (dump_file, "SMS loop inner or !loop_outer\n"); | |
b6a75366 | 1268 | return false; |
7707ba40 | 1269 | } |
5b6269ed | 1270 | |
d9e7e1a2 | 1271 | if (!single_exit (loop)) |
b6a75366 | 1272 | { |
1273 | if (dump_file) | |
1274 | { | |
3953ee1c | 1275 | rtx insn = BB_END (loop->header); |
48e1416a | 1276 | |
56134a9f | 1277 | fprintf (dump_file, "SMS loop many exits"); |
5169661d | 1278 | dump_insn_location (insn); |
56134a9f | 1279 | fprintf (dump_file, "\n"); |
b6a75366 | 1280 | } |
1281 | return false; | |
1282 | } | |
5b6269ed | 1283 | |
b6a75366 | 1284 | if (! SIMPLE_SMS_LOOP_P (loop) && ! loop_single_full_bb_p (loop)) |
1285 | { | |
1286 | if (dump_file) | |
1287 | { | |
3953ee1c | 1288 | rtx insn = BB_END (loop->header); |
48e1416a | 1289 | |
56134a9f | 1290 | fprintf (dump_file, "SMS loop many BBs."); |
5169661d | 1291 | dump_insn_location (insn); |
56134a9f | 1292 | fprintf (dump_file, "\n"); |
b6a75366 | 1293 | } |
1294 | return false; | |
5b6269ed | 1295 | } |
1296 | ||
b6a75366 | 1297 | return true; |
1298 | } | |
5b6269ed | 1299 | |
b6a75366 | 1300 | /* If there are more than one entry for the loop, |
1301 | make it one by splitting the first entry edge and | |
1302 | redirecting the others to the new BB. */ | |
1303 | static void | |
1304 | canon_loop (struct loop *loop) | |
1305 | { | |
1306 | edge e; | |
1307 | edge_iterator i; | |
5b6269ed | 1308 | |
b6a75366 | 1309 | /* Avoid annoying special cases of edges going to exit |
1310 | block. */ | |
1311 | FOR_EACH_EDGE (e, i, EXIT_BLOCK_PTR->preds) | |
1312 | if ((e->flags & EDGE_FALLTHRU) && (EDGE_COUNT (e->src->succs) > 1)) | |
88e6f696 | 1313 | split_edge (e); |
5b6269ed | 1314 | |
b6a75366 | 1315 | if (loop->latch == loop->header |
1316 | || EDGE_COUNT (loop->latch->succs) > 1) | |
5b6269ed | 1317 | { |
b6a75366 | 1318 | FOR_EACH_EDGE (e, i, loop->header->preds) |
1319 | if (e->src == loop->latch) | |
1320 | break; | |
88e6f696 | 1321 | split_edge (e); |
5b6269ed | 1322 | } |
1323 | } | |
1324 | ||
e1ab7874 | 1325 | /* Setup infos. */ |
1326 | static void | |
1327 | setup_sched_infos (void) | |
1328 | { | |
1329 | memcpy (&sms_common_sched_info, &haifa_common_sched_info, | |
1330 | sizeof (sms_common_sched_info)); | |
1331 | sms_common_sched_info.sched_pass_id = SCHED_SMS_PASS; | |
1332 | common_sched_info = &sms_common_sched_info; | |
1333 | ||
1334 | sched_deps_info = &sms_sched_deps_info; | |
1335 | current_sched_info = &sms_sched_info; | |
1336 | } | |
1337 | ||
7cef6c97 | 1338 | /* Probability in % that the sms-ed loop rolls enough so that optimized |
1339 | version may be entered. Just a guess. */ | |
1340 | #define PROB_SMS_ENOUGH_ITERATIONS 80 | |
1341 | ||
896dbaed | 1342 | /* Used to calculate the upper bound of ii. */ |
1343 | #define MAXII_FACTOR 2 | |
1344 | ||
5b6269ed | 1345 | /* Main entry point, perform SMS scheduling on the loops of the function |
1346 | that consist of single basic blocks. */ | |
73b62548 | 1347 | static void |
3f5be5f4 | 1348 | sms_schedule (void) |
5b6269ed | 1349 | { |
5b6269ed | 1350 | rtx insn; |
1351 | ddg_ptr *g_arr, g; | |
5b6269ed | 1352 | int * node_order; |
c0fb94bd | 1353 | int maxii, max_asap; |
5b6269ed | 1354 | partial_schedule_ptr ps; |
b6a75366 | 1355 | basic_block bb = NULL; |
7cef6c97 | 1356 | struct loop *loop; |
b6a75366 | 1357 | basic_block condition_bb = NULL; |
1358 | edge latch_edge; | |
1359 | gcov_type trip_count = 0; | |
1360 | ||
88e6f696 | 1361 | loop_optimizer_init (LOOPS_HAVE_PREHEADERS |
dce58e66 | 1362 | | LOOPS_HAVE_RECORDED_EXITS); |
41f75a99 | 1363 | if (number_of_loops (cfun) <= 1) |
7a3bf727 | 1364 | { |
1365 | loop_optimizer_finalize (); | |
1366 | return; /* There are no loops to schedule. */ | |
1367 | } | |
b6a75366 | 1368 | |
5b6269ed | 1369 | /* Initialize issue_rate. */ |
1370 | if (targetm.sched.issue_rate) | |
1371 | { | |
1372 | int temp = reload_completed; | |
1373 | ||
1374 | reload_completed = 1; | |
ffa47ae0 | 1375 | issue_rate = targetm.sched.issue_rate (); |
5b6269ed | 1376 | reload_completed = temp; |
1377 | } | |
1378 | else | |
1379 | issue_rate = 1; | |
1380 | ||
2c763ed4 | 1381 | /* Initialize the scheduler. */ |
e1ab7874 | 1382 | setup_sched_infos (); |
1383 | haifa_sched_init (); | |
02a8ad7e | 1384 | |
b6a75366 | 1385 | /* Allocate memory to hold the DDG array one entry for each loop. |
1386 | We use loop->num as index into this array. */ | |
41f75a99 | 1387 | g_arr = XCNEWVEC (ddg_ptr, number_of_loops (cfun)); |
5b6269ed | 1388 | |
7707ba40 | 1389 | if (dump_file) |
1390 | { | |
1391 | fprintf (dump_file, "\n\nSMS analysis phase\n"); | |
1392 | fprintf (dump_file, "===================\n\n"); | |
1393 | } | |
1394 | ||
5b6269ed | 1395 | /* Build DDGs for all the relevant loops and hold them in G_ARR |
b6a75366 | 1396 | indexed by the loop index. */ |
f21d4d00 | 1397 | FOR_EACH_LOOP (loop, 0) |
5b6269ed | 1398 | { |
1399 | rtx head, tail; | |
fc2abfd3 | 1400 | rtx count_reg; |
5b6269ed | 1401 | |
b6a75366 | 1402 | /* For debugging. */ |
76aaf9f0 | 1403 | if (dbg_cnt (sms_sched_loop) == false) |
b6a75366 | 1404 | { |
1405 | if (dump_file) | |
76aaf9f0 | 1406 | fprintf (dump_file, "SMS reached max limit... \n"); |
5b6269ed | 1407 | |
f21d4d00 | 1408 | break; |
b6a75366 | 1409 | } |
5b6269ed | 1410 | |
7707ba40 | 1411 | if (dump_file) |
56134a9f | 1412 | { |
1413 | rtx insn = BB_END (loop->header); | |
7707ba40 | 1414 | |
56134a9f | 1415 | fprintf (dump_file, "SMS loop num: %d", loop->num); |
5169661d | 1416 | dump_insn_location (insn); |
56134a9f | 1417 | fprintf (dump_file, "\n"); |
1418 | } | |
7707ba40 | 1419 | |
3f5be5f4 | 1420 | if (! loop_canon_p (loop)) |
b6a75366 | 1421 | continue; |
5b6269ed | 1422 | |
b6a75366 | 1423 | if (! loop_single_full_bb_p (loop)) |
7707ba40 | 1424 | { |
1425 | if (dump_file) | |
1426 | fprintf (dump_file, "SMS not loop_single_full_bb_p\n"); | |
5b6269ed | 1427 | continue; |
7707ba40 | 1428 | } |
5b6269ed | 1429 | |
b6a75366 | 1430 | bb = loop->header; |
5b6269ed | 1431 | |
6a1cdb4d | 1432 | get_ebb_head_tail (bb, bb, &head, &tail); |
b6a75366 | 1433 | latch_edge = loop_latch_edge (loop); |
d9e7e1a2 | 1434 | gcc_assert (single_exit (loop)); |
1435 | if (single_exit (loop)->count) | |
1436 | trip_count = latch_edge->count / single_exit (loop)->count; | |
5b6269ed | 1437 | |
f0b5f617 | 1438 | /* Perform SMS only on loops that their average count is above threshold. */ |
b6a75366 | 1439 | |
1440 | if ( latch_edge->count | |
d9e7e1a2 | 1441 | && (latch_edge->count < single_exit (loop)->count * SMS_LOOP_AVERAGE_COUNT_THRESHOLD)) |
b6a75366 | 1442 | { |
3f5be5f4 | 1443 | if (dump_file) |
5b6269ed | 1444 | { |
5169661d | 1445 | dump_insn_location (tail); |
56134a9f | 1446 | fprintf (dump_file, "\nSMS single-bb-loop\n"); |
5b6269ed | 1447 | if (profile_info && flag_branch_probabilities) |
1448 | { | |
3f5be5f4 | 1449 | fprintf (dump_file, "SMS loop-count "); |
1450 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1451 | (HOST_WIDEST_INT) bb->count); |
3f5be5f4 | 1452 | fprintf (dump_file, "\n"); |
1453 | fprintf (dump_file, "SMS trip-count "); | |
1454 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
b6a75366 | 1455 | (HOST_WIDEST_INT) trip_count); |
3f5be5f4 | 1456 | fprintf (dump_file, "\n"); |
1457 | fprintf (dump_file, "SMS profile-sum-max "); | |
1458 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1459 | (HOST_WIDEST_INT) profile_info->sum_max); |
3f5be5f4 | 1460 | fprintf (dump_file, "\n"); |
5b6269ed | 1461 | } |
1462 | } | |
1463 | continue; | |
1464 | } | |
1465 | ||
1466 | /* Make sure this is a doloop. */ | |
7bfc9b7c | 1467 | if ( !(count_reg = doloop_register_get (head, tail))) |
7707ba40 | 1468 | { |
1469 | if (dump_file) | |
1470 | fprintf (dump_file, "SMS doloop_register_get failed\n"); | |
5b6269ed | 1471 | continue; |
7707ba40 | 1472 | } |
5b6269ed | 1473 | |
2917ecd3 | 1474 | /* Don't handle BBs with calls or barriers |
90c2bcf0 | 1475 | or !single_set with the exception of instructions that include |
1476 | count_reg---these instructions are part of the control part | |
1477 | that do-loop recognizes. | |
7bfc9b7c | 1478 | ??? Should handle insns defining subregs. */ |
1479 | for (insn = head; insn != NEXT_INSN (tail); insn = NEXT_INSN (insn)) | |
1480 | { | |
1481 | rtx set; | |
1482 | ||
1483 | if (CALL_P (insn) | |
1484 | || BARRIER_P (insn) | |
9845d120 | 1485 | || (NONDEBUG_INSN_P (insn) && !JUMP_P (insn) |
90c2bcf0 | 1486 | && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE |
1487 | && !reg_mentioned_p (count_reg, insn)) | |
7bfc9b7c | 1488 | || (INSN_P (insn) && (set = single_set (insn)) |
1489 | && GET_CODE (SET_DEST (set)) == SUBREG)) | |
1490 | break; | |
1491 | } | |
5b6269ed | 1492 | |
1493 | if (insn != NEXT_INSN (tail)) | |
1494 | { | |
3f5be5f4 | 1495 | if (dump_file) |
5b6269ed | 1496 | { |
6d7dc5b9 | 1497 | if (CALL_P (insn)) |
3f5be5f4 | 1498 | fprintf (dump_file, "SMS loop-with-call\n"); |
6d7dc5b9 | 1499 | else if (BARRIER_P (insn)) |
3f5be5f4 | 1500 | fprintf (dump_file, "SMS loop-with-barrier\n"); |
9845d120 | 1501 | else if ((NONDEBUG_INSN_P (insn) && !JUMP_P (insn) |
7bfc9b7c | 1502 | && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE)) |
1503 | fprintf (dump_file, "SMS loop-with-not-single-set\n"); | |
1504 | else | |
1505 | fprintf (dump_file, "SMS loop with subreg in lhs\n"); | |
3f5be5f4 | 1506 | print_rtl_single (dump_file, insn); |
5b6269ed | 1507 | } |
1508 | ||
1509 | continue; | |
1510 | } | |
1511 | ||
6f7f081f | 1512 | /* Always schedule the closing branch with the rest of the |
1513 | instructions. The branch is rotated to be in row ii-1 at the | |
1514 | end of the scheduling procedure to make sure it's the last | |
1515 | instruction in the iteration. */ | |
1516 | if (! (g = create_ddg (bb, 1))) | |
5b6269ed | 1517 | { |
3f5be5f4 | 1518 | if (dump_file) |
34c7f568 | 1519 | fprintf (dump_file, "SMS create_ddg failed\n"); |
5b6269ed | 1520 | continue; |
1521 | } | |
1522 | ||
17519ba0 | 1523 | g_arr[loop->num] = g; |
7707ba40 | 1524 | if (dump_file) |
1525 | fprintf (dump_file, "...OK\n"); | |
1526 | ||
5b6269ed | 1527 | } |
7707ba40 | 1528 | if (dump_file) |
1529 | { | |
1530 | fprintf (dump_file, "\nSMS transformation phase\n"); | |
1531 | fprintf (dump_file, "=========================\n\n"); | |
1532 | } | |
5b6269ed | 1533 | |
b6a75366 | 1534 | /* We don't want to perform SMS on new loops - created by versioning. */ |
f21d4d00 | 1535 | FOR_EACH_LOOP (loop, 0) |
5b6269ed | 1536 | { |
1537 | rtx head, tail; | |
fc2abfd3 | 1538 | rtx count_reg, count_init; |
e9df34d5 | 1539 | int mii, rec_mii, stage_count, min_cycle; |
5b6269ed | 1540 | HOST_WIDEST_INT loop_count = 0; |
0b79ae60 | 1541 | bool opt_sc_p; |
5b6269ed | 1542 | |
17519ba0 | 1543 | if (! (g = g_arr[loop->num])) |
5b6269ed | 1544 | continue; |
1545 | ||
1546 | if (dump_file) | |
56134a9f | 1547 | { |
1548 | rtx insn = BB_END (loop->header); | |
7707ba40 | 1549 | |
56134a9f | 1550 | fprintf (dump_file, "SMS loop num: %d", loop->num); |
5169661d | 1551 | dump_insn_location (insn); |
56134a9f | 1552 | fprintf (dump_file, "\n"); |
7707ba40 | 1553 | |
56134a9f | 1554 | print_ddg (dump_file, g); |
1555 | } | |
5b6269ed | 1556 | |
6a1cdb4d | 1557 | get_ebb_head_tail (loop->header, loop->header, &head, &tail); |
5b6269ed | 1558 | |
b6a75366 | 1559 | latch_edge = loop_latch_edge (loop); |
d9e7e1a2 | 1560 | gcc_assert (single_exit (loop)); |
1561 | if (single_exit (loop)->count) | |
1562 | trip_count = latch_edge->count / single_exit (loop)->count; | |
5b6269ed | 1563 | |
3f5be5f4 | 1564 | if (dump_file) |
5b6269ed | 1565 | { |
5169661d | 1566 | dump_insn_location (tail); |
56134a9f | 1567 | fprintf (dump_file, "\nSMS single-bb-loop\n"); |
5b6269ed | 1568 | if (profile_info && flag_branch_probabilities) |
1569 | { | |
3f5be5f4 | 1570 | fprintf (dump_file, "SMS loop-count "); |
1571 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1572 | (HOST_WIDEST_INT) bb->count); |
3f5be5f4 | 1573 | fprintf (dump_file, "\n"); |
1574 | fprintf (dump_file, "SMS profile-sum-max "); | |
1575 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
5b6269ed | 1576 | (HOST_WIDEST_INT) profile_info->sum_max); |
3f5be5f4 | 1577 | fprintf (dump_file, "\n"); |
5b6269ed | 1578 | } |
3f5be5f4 | 1579 | fprintf (dump_file, "SMS doloop\n"); |
1580 | fprintf (dump_file, "SMS built-ddg %d\n", g->num_nodes); | |
1581 | fprintf (dump_file, "SMS num-loads %d\n", g->num_loads); | |
1582 | fprintf (dump_file, "SMS num-stores %d\n", g->num_stores); | |
5b6269ed | 1583 | } |
1584 | ||
5b6269ed | 1585 | |
b6a75366 | 1586 | /* In case of th loop have doloop register it gets special |
1587 | handling. */ | |
1588 | count_init = NULL_RTX; | |
7bfc9b7c | 1589 | if ((count_reg = doloop_register_get (head, tail))) |
b6a75366 | 1590 | { |
1591 | basic_block pre_header; | |
1592 | ||
1593 | pre_header = loop_preheader_edge (loop)->src; | |
1594 | count_init = const_iteration_count (count_reg, pre_header, | |
1595 | &loop_count); | |
1596 | } | |
1597 | gcc_assert (count_reg); | |
5b6269ed | 1598 | |
3f5be5f4 | 1599 | if (dump_file && count_init) |
5b6269ed | 1600 | { |
3f5be5f4 | 1601 | fprintf (dump_file, "SMS const-doloop "); |
1602 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, | |
b6a75366 | 1603 | loop_count); |
3f5be5f4 | 1604 | fprintf (dump_file, "\n"); |
5b6269ed | 1605 | } |
1606 | ||
4c36ffe6 | 1607 | node_order = XNEWVEC (int, g->num_nodes); |
5b6269ed | 1608 | |
1609 | mii = 1; /* Need to pass some estimate of mii. */ | |
c0fb94bd | 1610 | rec_mii = sms_order_nodes (g, mii, node_order, &max_asap); |
5b6269ed | 1611 | mii = MAX (res_MII (g), rec_mii); |
c0fb94bd | 1612 | maxii = MAX (max_asap, MAXII_FACTOR * mii); |
5b6269ed | 1613 | |
3f5be5f4 | 1614 | if (dump_file) |
1615 | fprintf (dump_file, "SMS iis %d %d %d (rec_mii, mii, maxii)\n", | |
5b6269ed | 1616 | rec_mii, mii, maxii); |
1617 | ||
0b79ae60 | 1618 | for (;;) |
a5ea7ace | 1619 | { |
0b79ae60 | 1620 | set_node_sched_params (g); |
1621 | ||
1622 | stage_count = 0; | |
1623 | opt_sc_p = false; | |
1624 | ps = sms_schedule_by_order (g, mii, maxii, node_order); | |
1625 | ||
1626 | if (ps) | |
a5ea7ace | 1627 | { |
0b79ae60 | 1628 | /* Try to achieve optimized SC by normalizing the partial |
1629 | schedule (having the cycles start from cycle zero). | |
1630 | The branch location must be placed in row ii-1 in the | |
1631 | final scheduling. If failed, shift all instructions to | |
1632 | position the branch in row ii-1. */ | |
1633 | opt_sc_p = optimize_sc (ps, g); | |
1634 | if (opt_sc_p) | |
1635 | stage_count = calculate_stage_count (ps, 0); | |
1636 | else | |
1637 | { | |
1638 | /* Bring the branch to cycle ii-1. */ | |
1639 | int amount = (SCHED_TIME (g->closing_branch->cuid) | |
1640 | - (ps->ii - 1)); | |
1641 | ||
1642 | if (dump_file) | |
1643 | fprintf (dump_file, "SMS schedule branch at cycle ii-1\n"); | |
1644 | ||
1645 | stage_count = calculate_stage_count (ps, amount); | |
1646 | } | |
1647 | ||
1648 | gcc_assert (stage_count >= 1); | |
a5ea7ace | 1649 | } |
0b79ae60 | 1650 | |
1651 | /* The default value of PARAM_SMS_MIN_SC is 2 as stage count of | |
1652 | 1 means that there is no interleaving between iterations thus | |
1653 | we let the scheduling passes do the job in this case. */ | |
e9df34d5 | 1654 | if (stage_count < PARAM_VALUE (PARAM_SMS_MIN_SC) |
0b79ae60 | 1655 | || (count_init && (loop_count <= stage_count)) |
1656 | || (flag_branch_probabilities && (trip_count <= stage_count))) | |
b6a75366 | 1657 | { |
0b79ae60 | 1658 | if (dump_file) |
1659 | { | |
1660 | fprintf (dump_file, "SMS failed... \n"); | |
1661 | fprintf (dump_file, "SMS sched-failed (stage-count=%d," | |
1662 | " loop-count=", stage_count); | |
1663 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, loop_count); | |
1664 | fprintf (dump_file, ", trip-count="); | |
1665 | fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, trip_count); | |
1666 | fprintf (dump_file, ")\n"); | |
1667 | } | |
1668 | break; | |
b6a75366 | 1669 | } |
0b79ae60 | 1670 | |
a5ea7ace | 1671 | if (!opt_sc_p) |
1672 | { | |
1673 | /* Rotate the partial schedule to have the branch in row ii-1. */ | |
7282ef12 | 1674 | int amount = SCHED_TIME (g->closing_branch->cuid) - (ps->ii - 1); |
a5ea7ace | 1675 | |
1676 | reset_sched_times (ps, amount); | |
1677 | rotate_partial_schedule (ps, amount); | |
1678 | } | |
6f7f081f | 1679 | |
6f7f081f | 1680 | set_columns_for_ps (ps); |
5b6269ed | 1681 | |
e9df34d5 | 1682 | min_cycle = PS_MIN_CYCLE (ps) - SMODULO (PS_MIN_CYCLE (ps), ps->ii); |
0b79ae60 | 1683 | if (!schedule_reg_moves (ps)) |
1684 | { | |
1685 | mii = ps->ii + 1; | |
1686 | free_partial_schedule (ps); | |
1687 | continue; | |
1688 | } | |
1689 | ||
e9df34d5 | 1690 | /* Moves that handle incoming values might have been added |
1691 | to a new first stage. Bump the stage count if so. | |
1692 | ||
1693 | ??? Perhaps we could consider rotating the schedule here | |
1694 | instead? */ | |
1695 | if (PS_MIN_CYCLE (ps) < min_cycle) | |
1696 | { | |
1697 | reset_sched_times (ps, 0); | |
1698 | stage_count++; | |
1699 | } | |
1700 | ||
1701 | /* The stage count should now be correct without rotation. */ | |
1702 | gcc_checking_assert (stage_count == calculate_stage_count (ps, 0)); | |
1703 | PS_STAGE_COUNT (ps) = stage_count; | |
1704 | ||
6f7f081f | 1705 | canon_loop (loop); |
1706 | ||
1707 | if (dump_file) | |
1708 | { | |
5169661d | 1709 | dump_insn_location (tail); |
56134a9f | 1710 | fprintf (dump_file, " SMS succeeded %d %d (with ii, sc)\n", |
1711 | ps->ii, stage_count); | |
3f5be5f4 | 1712 | print_partial_schedule (ps, dump_file); |
5b6269ed | 1713 | } |
6f7f081f | 1714 | |
896dbaed | 1715 | /* case the BCT count is not known , Do loop-versioning */ |
1716 | if (count_reg && ! count_init) | |
1717 | { | |
c338f2e3 | 1718 | rtx comp_rtx = gen_rtx_GT (VOIDmode, count_reg, |
1719 | gen_int_mode (stage_count, | |
1720 | GET_MODE (count_reg))); | |
896dbaed | 1721 | unsigned prob = (PROB_SMS_ENOUGH_ITERATIONS |
1722 | * REG_BR_PROB_BASE) / 100; | |
1723 | ||
1724 | loop_version (loop, comp_rtx, &condition_bb, | |
1725 | prob, prob, REG_BR_PROB_BASE - prob, | |
1726 | true); | |
1727 | } | |
1728 | ||
1729 | /* Set new iteration count of loop kernel. */ | |
1730 | if (count_reg && count_init) | |
1731 | SET_SRC (single_set (count_init)) = GEN_INT (loop_count | |
1732 | - stage_count + 1); | |
1733 | ||
1734 | /* Now apply the scheduled kernel to the RTL of the loop. */ | |
5b6269ed | 1735 | permute_partial_schedule (ps, g->closing_branch->first_note); |
f045d41d | 1736 | |
896dbaed | 1737 | /* Mark this loop as software pipelined so the later |
6c3ff102 | 1738 | scheduling passes don't touch it. */ |
896dbaed | 1739 | if (! flag_resched_modulo_sched) |
6c3ff102 | 1740 | mark_loop_unsched (loop); |
1741 | ||
896dbaed | 1742 | /* The life-info is not valid any more. */ |
1743 | df_set_bb_dirty (g->bb); | |
f045d41d | 1744 | |
0b79ae60 | 1745 | apply_reg_moves (ps); |
896dbaed | 1746 | if (dump_file) |
0b79ae60 | 1747 | print_node_sched_params (dump_file, g->num_nodes, ps); |
896dbaed | 1748 | /* Generate prolog and epilog. */ |
7bfc9b7c | 1749 | generate_prolog_epilog (ps, loop, count_reg, count_init); |
0b79ae60 | 1750 | break; |
5b6269ed | 1751 | } |
b6a75366 | 1752 | |
5b6269ed | 1753 | free_partial_schedule (ps); |
f1f41a6c | 1754 | node_sched_param_vec.release (); |
5b6269ed | 1755 | free (node_order); |
1756 | free_ddg (g); | |
1757 | } | |
1758 | ||
3fa19cbb | 1759 | free (g_arr); |
1760 | ||
5b6269ed | 1761 | /* Release scheduler data, needed until now because of DFA. */ |
e1ab7874 | 1762 | haifa_sched_finish (); |
88e6f696 | 1763 | loop_optimizer_finalize (); |
5b6269ed | 1764 | } |
1765 | ||
1766 | /* The SMS scheduling algorithm itself | |
1767 | ----------------------------------- | |
1768 | Input: 'O' an ordered list of insns of a loop. | |
1769 | Output: A scheduling of the loop - kernel, prolog, and epilogue. | |
1770 | ||
1771 | 'Q' is the empty Set | |
1772 | 'PS' is the partial schedule; it holds the currently scheduled nodes with | |
1773 | their cycle/slot. | |
1774 | 'PSP' previously scheduled predecessors. | |
1775 | 'PSS' previously scheduled successors. | |
1776 | 't(u)' the cycle where u is scheduled. | |
1777 | 'l(u)' is the latency of u. | |
1778 | 'd(v,u)' is the dependence distance from v to u. | |
1779 | 'ASAP(u)' the earliest time at which u could be scheduled as computed in | |
1780 | the node ordering phase. | |
1781 | 'check_hardware_resources_conflicts(u, PS, c)' | |
1782 | run a trace around cycle/slot through DFA model | |
1783 | to check resource conflicts involving instruction u | |
1784 | at cycle c given the partial schedule PS. | |
1785 | 'add_to_partial_schedule_at_time(u, PS, c)' | |
1786 | Add the node/instruction u to the partial schedule | |
1787 | PS at time c. | |
1788 | 'calculate_register_pressure(PS)' | |
1789 | Given a schedule of instructions, calculate the register | |
1790 | pressure it implies. One implementation could be the | |
1791 | maximum number of overlapping live ranges. | |
1792 | 'maxRP' The maximum allowed register pressure, it is usually derived from the number | |
1793 | registers available in the hardware. | |
1794 | ||
1795 | 1. II = MII. | |
1796 | 2. PS = empty list | |
1797 | 3. for each node u in O in pre-computed order | |
1798 | 4. if (PSP(u) != Q && PSS(u) == Q) then | |
1799 | 5. Early_start(u) = max ( t(v) + l(v) - d(v,u)*II ) over all every v in PSP(u). | |
1800 | 6. start = Early_start; end = Early_start + II - 1; step = 1 | |
1801 | 11. else if (PSP(u) == Q && PSS(u) != Q) then | |
1802 | 12. Late_start(u) = min ( t(v) - l(v) + d(v,u)*II ) over all every v in PSS(u). | |
1803 | 13. start = Late_start; end = Late_start - II + 1; step = -1 | |
1804 | 14. else if (PSP(u) != Q && PSS(u) != Q) then | |
1805 | 15. Early_start(u) = max ( t(v) + l(v) - d(v,u)*II ) over all every v in PSP(u). | |
1806 | 16. Late_start(u) = min ( t(v) - l(v) + d(v,u)*II ) over all every v in PSS(u). | |
1807 | 17. start = Early_start; | |
1808 | 18. end = min(Early_start + II - 1 , Late_start); | |
1809 | 19. step = 1 | |
1810 | 20. else "if (PSP(u) == Q && PSS(u) == Q)" | |
1811 | 21. start = ASAP(u); end = start + II - 1; step = 1 | |
1812 | 22. endif | |
1813 | ||
1814 | 23. success = false | |
1815 | 24. for (c = start ; c != end ; c += step) | |
1816 | 25. if check_hardware_resources_conflicts(u, PS, c) then | |
1817 | 26. add_to_partial_schedule_at_time(u, PS, c) | |
1818 | 27. success = true | |
1819 | 28. break | |
1820 | 29. endif | |
1821 | 30. endfor | |
1822 | 31. if (success == false) then | |
1823 | 32. II = II + 1 | |
1824 | 33. if (II > maxII) then | |
1825 | 34. finish - failed to schedule | |
1826 | 35. endif | |
1827 | 36. goto 2. | |
1828 | 37. endif | |
1829 | 38. endfor | |
1830 | 39. if (calculate_register_pressure(PS) > maxRP) then | |
1831 | 40. goto 32. | |
1832 | 41. endif | |
1833 | 42. compute epilogue & prologue | |
1834 | 43. finish - succeeded to schedule | |
469e33a0 | 1835 | |
1836 | ??? The algorithm restricts the scheduling window to II cycles. | |
1837 | In rare cases, it may be better to allow windows of II+1 cycles. | |
1838 | The window would then start and end on the same row, but with | |
1839 | different "must precede" and "must follow" requirements. */ | |
5b6269ed | 1840 | |
1841 | /* A limit on the number of cycles that resource conflicts can span. ??? Should | |
1842 | be provided by DFA, and be dependent on the type of insn scheduled. Currently | |
1843 | set to 0 to save compile time. */ | |
1844 | #define DFA_HISTORY SMS_DFA_HISTORY | |
1845 | ||
76387907 | 1846 | /* A threshold for the number of repeated unsuccessful attempts to insert |
1847 | an empty row, before we flush the partial schedule and start over. */ | |
1848 | #define MAX_SPLIT_NUM 10 | |
b6a75366 | 1849 | /* Given the partial schedule PS, this function calculates and returns the |
d90dbd3e | 1850 | cycles in which we can schedule the node with the given index I. |
b6a75366 | 1851 | NOTE: Here we do the backtracking in SMS, in some special cases. We have |
1852 | noticed that there are several cases in which we fail to SMS the loop | |
1853 | because the sched window of a node is empty due to tight data-deps. In | |
d90dbd3e | 1854 | such cases we want to unschedule some of the predecessors/successors |
b6a75366 | 1855 | until we get non-empty scheduling window. It returns -1 if the |
1856 | scheduling window is empty and zero otherwise. */ | |
1857 | ||
1858 | static int | |
a5ea7ace | 1859 | get_sched_window (partial_schedule_ptr ps, ddg_node_ptr u_node, |
0f7b323c | 1860 | sbitmap sched_nodes, int ii, int *start_p, int *step_p, |
1861 | int *end_p) | |
b6a75366 | 1862 | { |
1863 | int start, step, end; | |
0f7b323c | 1864 | int early_start, late_start; |
b6a75366 | 1865 | ddg_edge_ptr e; |
b6a75366 | 1866 | sbitmap psp = sbitmap_alloc (ps->g->num_nodes); |
1867 | sbitmap pss = sbitmap_alloc (ps->g->num_nodes); | |
1868 | sbitmap u_node_preds = NODE_PREDECESSORS (u_node); | |
1869 | sbitmap u_node_succs = NODE_SUCCESSORS (u_node); | |
1870 | int psp_not_empty; | |
1871 | int pss_not_empty; | |
0f7b323c | 1872 | int count_preds; |
1873 | int count_succs; | |
b6a75366 | 1874 | |
1875 | /* 1. compute sched window for u (start, end, step). */ | |
53c5d9d4 | 1876 | bitmap_clear (psp); |
1877 | bitmap_clear (pss); | |
1878 | psp_not_empty = bitmap_and (psp, u_node_preds, sched_nodes); | |
1879 | pss_not_empty = bitmap_and (pss, u_node_succs, sched_nodes); | |
b6a75366 | 1880 | |
0f7b323c | 1881 | /* We first compute a forward range (start <= end), then decide whether |
1882 | to reverse it. */ | |
1883 | early_start = INT_MIN; | |
1884 | late_start = INT_MAX; | |
1885 | start = INT_MIN; | |
1886 | end = INT_MAX; | |
1887 | step = 1; | |
b6a75366 | 1888 | |
0f7b323c | 1889 | count_preds = 0; |
1890 | count_succs = 0; | |
a9ac8caa | 1891 | |
2beb48b8 | 1892 | if (dump_file && (psp_not_empty || pss_not_empty)) |
1893 | { | |
1894 | fprintf (dump_file, "\nAnalyzing dependencies for node %d (INSN %d)" | |
1895 | "; ii = %d\n\n", u_node->cuid, INSN_UID (u_node->insn), ii); | |
1896 | fprintf (dump_file, "%11s %11s %11s %11s %5s\n", | |
1897 | "start", "early start", "late start", "end", "time"); | |
1898 | fprintf (dump_file, "=========== =========== =========== ===========" | |
1899 | " =====\n"); | |
1900 | } | |
0f7b323c | 1901 | /* Calculate early_start and limit end. Both bounds are inclusive. */ |
1902 | if (psp_not_empty) | |
1903 | for (e = u_node->in; e != 0; e = e->next_in) | |
1904 | { | |
7282ef12 | 1905 | int v = e->src->cuid; |
76387907 | 1906 | |
08b7917c | 1907 | if (bitmap_bit_p (sched_nodes, v)) |
0f7b323c | 1908 | { |
7282ef12 | 1909 | int p_st = SCHED_TIME (v); |
2beb48b8 | 1910 | int earliest = p_st + e->latency - (e->distance * ii); |
1911 | int latest = (e->data_type == MEM_DEP ? p_st + ii - 1 : INT_MAX); | |
76387907 | 1912 | |
2beb48b8 | 1913 | if (dump_file) |
1914 | { | |
1915 | fprintf (dump_file, "%11s %11d %11s %11d %5d", | |
1916 | "", earliest, "", latest, p_st); | |
1917 | print_ddg_edge (dump_file, e); | |
1918 | fprintf (dump_file, "\n"); | |
1919 | } | |
76387907 | 1920 | |
2beb48b8 | 1921 | early_start = MAX (early_start, earliest); |
1922 | end = MIN (end, latest); | |
b6a75366 | 1923 | |
0f7b323c | 1924 | if (e->type == TRUE_DEP && e->data_type == REG_DEP) |
1925 | count_preds++; | |
0f7b323c | 1926 | } |
0f7b323c | 1927 | } |
fe861e75 | 1928 | |
0f7b323c | 1929 | /* Calculate late_start and limit start. Both bounds are inclusive. */ |
1930 | if (pss_not_empty) | |
1931 | for (e = u_node->out; e != 0; e = e->next_out) | |
1932 | { | |
7282ef12 | 1933 | int v = e->dest->cuid; |
a9ac8caa | 1934 | |
08b7917c | 1935 | if (bitmap_bit_p (sched_nodes, v)) |
0f7b323c | 1936 | { |
7282ef12 | 1937 | int s_st = SCHED_TIME (v); |
2beb48b8 | 1938 | int earliest = (e->data_type == MEM_DEP ? s_st - ii + 1 : INT_MIN); |
1939 | int latest = s_st - e->latency + (e->distance * ii); | |
b6a75366 | 1940 | |
2beb48b8 | 1941 | if (dump_file) |
1942 | { | |
1943 | fprintf (dump_file, "%11d %11s %11d %11s %5d", | |
1944 | earliest, "", latest, "", s_st); | |
1945 | print_ddg_edge (dump_file, e); | |
1946 | fprintf (dump_file, "\n"); | |
1947 | } | |
76387907 | 1948 | |
2beb48b8 | 1949 | start = MAX (start, earliest); |
1950 | late_start = MIN (late_start, latest); | |
a9ac8caa | 1951 | |
0f7b323c | 1952 | if (e->type == TRUE_DEP && e->data_type == REG_DEP) |
1953 | count_succs++; | |
0f7b323c | 1954 | } |
0f7b323c | 1955 | } |
a9ac8caa | 1956 | |
2beb48b8 | 1957 | if (dump_file && (psp_not_empty || pss_not_empty)) |
1958 | { | |
1959 | fprintf (dump_file, "----------- ----------- ----------- -----------" | |
1960 | " -----\n"); | |
1961 | fprintf (dump_file, "%11d %11d %11d %11d %5s %s\n", | |
1962 | start, early_start, late_start, end, "", | |
1963 | "(max, max, min, min)"); | |
1964 | } | |
1965 | ||
0f7b323c | 1966 | /* Get a target scheduling window no bigger than ii. */ |
1967 | if (early_start == INT_MIN && late_start == INT_MAX) | |
7282ef12 | 1968 | early_start = NODE_ASAP (u_node); |
0f7b323c | 1969 | else if (early_start == INT_MIN) |
1970 | early_start = late_start - (ii - 1); | |
1971 | late_start = MIN (late_start, early_start + (ii - 1)); | |
a9ac8caa | 1972 | |
0f7b323c | 1973 | /* Apply memory dependence limits. */ |
1974 | start = MAX (start, early_start); | |
1975 | end = MIN (end, late_start); | |
fe861e75 | 1976 | |
2beb48b8 | 1977 | if (dump_file && (psp_not_empty || pss_not_empty)) |
1978 | fprintf (dump_file, "%11s %11d %11d %11s %5s final window\n", | |
1979 | "", start, end, "", ""); | |
1980 | ||
0f7b323c | 1981 | /* If there are at least as many successors as predecessors, schedule the |
1982 | node close to its successors. */ | |
1983 | if (pss_not_empty && count_succs >= count_preds) | |
b6a75366 | 1984 | { |
0f7b323c | 1985 | int tmp = end; |
1986 | end = start; | |
1987 | start = tmp; | |
1988 | step = -1; | |
b6a75366 | 1989 | } |
1990 | ||
0f7b323c | 1991 | /* Now that we've finalized the window, make END an exclusive rather |
1992 | than an inclusive bound. */ | |
1993 | end += step; | |
1994 | ||
b6a75366 | 1995 | *start_p = start; |
1996 | *step_p = step; | |
1997 | *end_p = end; | |
1998 | sbitmap_free (psp); | |
1999 | sbitmap_free (pss); | |
2000 | ||
2001 | if ((start >= end && step == 1) || (start <= end && step == -1)) | |
76387907 | 2002 | { |
2003 | if (dump_file) | |
2004 | fprintf (dump_file, "\nEmpty window: start=%d, end=%d, step=%d\n", | |
2005 | start, end, step); | |
0f7b323c | 2006 | return -1; |
76387907 | 2007 | } |
2008 | ||
0f7b323c | 2009 | return 0; |
b6a75366 | 2010 | } |
2011 | ||
fe861e75 | 2012 | /* Calculate MUST_PRECEDE/MUST_FOLLOW bitmaps of U_NODE; which is the |
2013 | node currently been scheduled. At the end of the calculation | |
84004523 | 2014 | MUST_PRECEDE/MUST_FOLLOW contains all predecessors/successors of |
2015 | U_NODE which are (1) already scheduled in the first/last row of | |
2016 | U_NODE's scheduling window, (2) whose dependence inequality with U | |
2017 | becomes an equality when U is scheduled in this same row, and (3) | |
2018 | whose dependence latency is zero. | |
2019 | ||
c15d54d8 | 2020 | The first and last rows are calculated using the following parameters: |
fe861e75 | 2021 | START/END rows - The cycles that begins/ends the traversal on the window; |
2022 | searching for an empty cycle to schedule U_NODE. | |
2023 | STEP - The direction in which we traverse the window. | |
84004523 | 2024 | II - The initiation interval. */ |
fe861e75 | 2025 | |
2026 | static void | |
2027 | calculate_must_precede_follow (ddg_node_ptr u_node, int start, int end, | |
2028 | int step, int ii, sbitmap sched_nodes, | |
2029 | sbitmap must_precede, sbitmap must_follow) | |
2030 | { | |
2031 | ddg_edge_ptr e; | |
2032 | int first_cycle_in_window, last_cycle_in_window; | |
fe861e75 | 2033 | |
2034 | gcc_assert (must_precede && must_follow); | |
2035 | ||
2036 | /* Consider the following scheduling window: | |
2037 | {first_cycle_in_window, first_cycle_in_window+1, ..., | |
2038 | last_cycle_in_window}. If step is 1 then the following will be | |
2039 | the order we traverse the window: {start=first_cycle_in_window, | |
2040 | first_cycle_in_window+1, ..., end=last_cycle_in_window+1}, | |
2041 | or {start=last_cycle_in_window, last_cycle_in_window-1, ..., | |
2042 | end=first_cycle_in_window-1} if step is -1. */ | |
2043 | first_cycle_in_window = (step == 1) ? start : end - step; | |
2044 | last_cycle_in_window = (step == 1) ? end - step : start; | |
2045 | ||
53c5d9d4 | 2046 | bitmap_clear (must_precede); |
2047 | bitmap_clear (must_follow); | |
fe861e75 | 2048 | |
2049 | if (dump_file) | |
2050 | fprintf (dump_file, "\nmust_precede: "); | |
2051 | ||
84004523 | 2052 | /* Instead of checking if: |
2053 | (SMODULO (SCHED_TIME (e->src), ii) == first_row_in_window) | |
2054 | && ((SCHED_TIME (e->src) + e->latency - (e->distance * ii)) == | |
2055 | first_cycle_in_window) | |
2056 | && e->latency == 0 | |
2057 | we use the fact that latency is non-negative: | |
2058 | SCHED_TIME (e->src) - (e->distance * ii) <= | |
2059 | SCHED_TIME (e->src) + e->latency - (e->distance * ii)) <= | |
2060 | first_cycle_in_window | |
2061 | and check only if | |
2062 | SCHED_TIME (e->src) - (e->distance * ii) == first_cycle_in_window */ | |
fe861e75 | 2063 | for (e = u_node->in; e != 0; e = e->next_in) |
08b7917c | 2064 | if (bitmap_bit_p (sched_nodes, e->src->cuid) |
7282ef12 | 2065 | && ((SCHED_TIME (e->src->cuid) - (e->distance * ii)) == |
84004523 | 2066 | first_cycle_in_window)) |
fe861e75 | 2067 | { |
2068 | if (dump_file) | |
2069 | fprintf (dump_file, "%d ", e->src->cuid); | |
2070 | ||
08b7917c | 2071 | bitmap_set_bit (must_precede, e->src->cuid); |
fe861e75 | 2072 | } |
2073 | ||
2074 | if (dump_file) | |
2075 | fprintf (dump_file, "\nmust_follow: "); | |
2076 | ||
84004523 | 2077 | /* Instead of checking if: |
2078 | (SMODULO (SCHED_TIME (e->dest), ii) == last_row_in_window) | |
2079 | && ((SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) == | |
2080 | last_cycle_in_window) | |
2081 | && e->latency == 0 | |
2082 | we use the fact that latency is non-negative: | |
2083 | SCHED_TIME (e->dest) + (e->distance * ii) >= | |
48e1416a | 2084 | SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) >= |
84004523 | 2085 | last_cycle_in_window |
2086 | and check only if | |
2087 | SCHED_TIME (e->dest) + (e->distance * ii) == last_cycle_in_window */ | |
fe861e75 | 2088 | for (e = u_node->out; e != 0; e = e->next_out) |
08b7917c | 2089 | if (bitmap_bit_p (sched_nodes, e->dest->cuid) |
7282ef12 | 2090 | && ((SCHED_TIME (e->dest->cuid) + (e->distance * ii)) == |
84004523 | 2091 | last_cycle_in_window)) |
fe861e75 | 2092 | { |
2093 | if (dump_file) | |
2094 | fprintf (dump_file, "%d ", e->dest->cuid); | |
2095 | ||
08b7917c | 2096 | bitmap_set_bit (must_follow, e->dest->cuid); |
fe861e75 | 2097 | } |
2098 | ||
2099 | if (dump_file) | |
2100 | fprintf (dump_file, "\n"); | |
2101 | } | |
2102 | ||
2103 | /* Return 1 if U_NODE can be scheduled in CYCLE. Use the following | |
2104 | parameters to decide if that's possible: | |
2105 | PS - The partial schedule. | |
2106 | U - The serial number of U_NODE. | |
f0b5f617 | 2107 | NUM_SPLITS - The number of row splits made so far. |
fe861e75 | 2108 | MUST_PRECEDE - The nodes that must precede U_NODE. (only valid at |
2109 | the first row of the scheduling window) | |
2110 | MUST_FOLLOW - The nodes that must follow U_NODE. (only valid at the | |
2111 | last row of the scheduling window) */ | |
2112 | ||
2113 | static bool | |
7282ef12 | 2114 | try_scheduling_node_in_cycle (partial_schedule_ptr ps, |
34c7f568 | 2115 | int u, int cycle, sbitmap sched_nodes, |
fe861e75 | 2116 | int *num_splits, sbitmap must_precede, |
2117 | sbitmap must_follow) | |
2118 | { | |
2119 | ps_insn_ptr psi; | |
2120 | bool success = 0; | |
2121 | ||
2122 | verify_partial_schedule (ps, sched_nodes); | |
7282ef12 | 2123 | psi = ps_add_node_check_conflicts (ps, u, cycle, must_precede, must_follow); |
fe861e75 | 2124 | if (psi) |
2125 | { | |
7282ef12 | 2126 | SCHED_TIME (u) = cycle; |
08b7917c | 2127 | bitmap_set_bit (sched_nodes, u); |
fe861e75 | 2128 | success = 1; |
2129 | *num_splits = 0; | |
2130 | if (dump_file) | |
34c7f568 | 2131 | fprintf (dump_file, "Scheduled w/o split in %d\n", cycle); |
fe861e75 | 2132 | |
2133 | } | |
2134 | ||
2135 | return success; | |
2136 | } | |
2137 | ||
b6a75366 | 2138 | /* This function implements the scheduling algorithm for SMS according to the |
2139 | above algorithm. */ | |
5b6269ed | 2140 | static partial_schedule_ptr |
3f5be5f4 | 2141 | sms_schedule_by_order (ddg_ptr g, int mii, int maxii, int *nodes_order) |
5b6269ed | 2142 | { |
2143 | int ii = mii; | |
76387907 | 2144 | int i, c, success, num_splits = 0; |
2145 | int flush_and_start_over = true; | |
5b6269ed | 2146 | int num_nodes = g->num_nodes; |
5b6269ed | 2147 | int start, end, step; /* Place together into one struct? */ |
2148 | sbitmap sched_nodes = sbitmap_alloc (num_nodes); | |
f045d41d | 2149 | sbitmap must_precede = sbitmap_alloc (num_nodes); |
2150 | sbitmap must_follow = sbitmap_alloc (num_nodes); | |
b6a75366 | 2151 | sbitmap tobe_scheduled = sbitmap_alloc (num_nodes); |
f045d41d | 2152 | |
5b6269ed | 2153 | partial_schedule_ptr ps = create_partial_schedule (ii, g, DFA_HISTORY); |
2154 | ||
53c5d9d4 | 2155 | bitmap_ones (tobe_scheduled); |
2156 | bitmap_clear (sched_nodes); | |
b6a75366 | 2157 | |
76387907 | 2158 | while (flush_and_start_over && (ii < maxii)) |
5b6269ed | 2159 | { |
b6a75366 | 2160 | |
5b6269ed | 2161 | if (dump_file) |
d4473c84 | 2162 | fprintf (dump_file, "Starting with ii=%d\n", ii); |
76387907 | 2163 | flush_and_start_over = false; |
53c5d9d4 | 2164 | bitmap_clear (sched_nodes); |
5b6269ed | 2165 | |
2166 | for (i = 0; i < num_nodes; i++) | |
2167 | { | |
2168 | int u = nodes_order[i]; | |
b6a75366 | 2169 | ddg_node_ptr u_node = &ps->g->nodes[u]; |
5b6269ed | 2170 | rtx insn = u_node->insn; |
2171 | ||
9845d120 | 2172 | if (!NONDEBUG_INSN_P (insn)) |
5b6269ed | 2173 | { |
08b7917c | 2174 | bitmap_clear_bit (tobe_scheduled, u); |
b6a75366 | 2175 | continue; |
5b6269ed | 2176 | } |
2177 | ||
08b7917c | 2178 | if (bitmap_bit_p (sched_nodes, u)) |
b6a75366 | 2179 | continue; |
5b6269ed | 2180 | |
b6a75366 | 2181 | /* Try to get non-empty scheduling window. */ |
76387907 | 2182 | success = 0; |
a5ea7ace | 2183 | if (get_sched_window (ps, u_node, sched_nodes, ii, &start, |
76387907 | 2184 | &step, &end) == 0) |
2185 | { | |
2186 | if (dump_file) | |
2beb48b8 | 2187 | fprintf (dump_file, "\nTrying to schedule node %d " |
2188 | "INSN = %d in (%d .. %d) step %d\n", u, (INSN_UID | |
76387907 | 2189 | (g->nodes[u].insn)), start, end, step); |
76387907 | 2190 | |
2191 | gcc_assert ((step > 0 && start < end) | |
2192 | || (step < 0 && start > end)); | |
2193 | ||
fe861e75 | 2194 | calculate_must_precede_follow (u_node, start, end, step, ii, |
2195 | sched_nodes, must_precede, | |
2196 | must_follow); | |
2197 | ||
76387907 | 2198 | for (c = start; c != end; c += step) |
2199 | { | |
a5ea7ace | 2200 | sbitmap tmp_precede, tmp_follow; |
fe861e75 | 2201 | |
a5ea7ace | 2202 | set_must_precede_follow (&tmp_follow, must_follow, |
2203 | &tmp_precede, must_precede, | |
2204 | c, start, end, step); | |
fe861e75 | 2205 | success = |
7282ef12 | 2206 | try_scheduling_node_in_cycle (ps, u, c, |
fe861e75 | 2207 | sched_nodes, |
2208 | &num_splits, tmp_precede, | |
2209 | tmp_follow); | |
2210 | if (success) | |
2211 | break; | |
76387907 | 2212 | } |
fe861e75 | 2213 | |
76387907 | 2214 | verify_partial_schedule (ps, sched_nodes); |
2215 | } | |
2216 | if (!success) | |
2217 | { | |
2218 | int split_row; | |
2219 | ||
2220 | if (ii++ == maxii) | |
2221 | break; | |
2222 | ||
2223 | if (num_splits >= MAX_SPLIT_NUM) | |
2224 | { | |
2225 | num_splits = 0; | |
2226 | flush_and_start_over = true; | |
2227 | verify_partial_schedule (ps, sched_nodes); | |
2228 | reset_partial_schedule (ps, ii); | |
2229 | verify_partial_schedule (ps, sched_nodes); | |
2230 | break; | |
2231 | } | |
2232 | ||
2233 | num_splits++; | |
7af239b5 | 2234 | /* The scheduling window is exclusive of 'end' |
2235 | whereas compute_split_window() expects an inclusive, | |
2236 | ordered range. */ | |
76387907 | 2237 | if (step == 1) |
7af239b5 | 2238 | split_row = compute_split_row (sched_nodes, start, end - 1, |
76387907 | 2239 | ps->ii, u_node); |
2240 | else | |
7af239b5 | 2241 | split_row = compute_split_row (sched_nodes, end + 1, start, |
76387907 | 2242 | ps->ii, u_node); |
b6a75366 | 2243 | |
76387907 | 2244 | ps_insert_empty_row (ps, split_row, sched_nodes); |
2245 | i--; /* Go back and retry node i. */ | |
5b6269ed | 2246 | |
76387907 | 2247 | if (dump_file) |
2248 | fprintf (dump_file, "num_splits=%d\n", num_splits); | |
2249 | } | |
5b6269ed | 2250 | |
76387907 | 2251 | /* ??? If (success), check register pressure estimates. */ |
2252 | } /* Continue with next node. */ | |
2253 | } /* While flush_and_start_over. */ | |
5b6269ed | 2254 | if (ii >= maxii) |
2255 | { | |
2256 | free_partial_schedule (ps); | |
2257 | ps = NULL; | |
2258 | } | |
76387907 | 2259 | else |
53c5d9d4 | 2260 | gcc_assert (bitmap_equal_p (tobe_scheduled, sched_nodes)); |
76387907 | 2261 | |
2262 | sbitmap_free (sched_nodes); | |
2263 | sbitmap_free (must_precede); | |
2264 | sbitmap_free (must_follow); | |
2265 | sbitmap_free (tobe_scheduled); | |
2266 | ||
5b6269ed | 2267 | return ps; |
2268 | } | |
2269 | ||
76387907 | 2270 | /* This function inserts a new empty row into PS at the position |
2271 | according to SPLITROW, keeping all already scheduled instructions | |
2272 | intact and updating their SCHED_TIME and cycle accordingly. */ | |
2273 | static void | |
2274 | ps_insert_empty_row (partial_schedule_ptr ps, int split_row, | |
2275 | sbitmap sched_nodes) | |
2276 | { | |
2277 | ps_insn_ptr crr_insn; | |
2278 | ps_insn_ptr *rows_new; | |
2279 | int ii = ps->ii; | |
2280 | int new_ii = ii + 1; | |
2281 | int row; | |
4815ed0c | 2282 | int *rows_length_new; |
76387907 | 2283 | |
2284 | verify_partial_schedule (ps, sched_nodes); | |
2285 | ||
2286 | /* We normalize sched_time and rotate ps to have only non-negative sched | |
2287 | times, for simplicity of updating cycles after inserting new row. */ | |
2288 | split_row -= ps->min_cycle; | |
2289 | split_row = SMODULO (split_row, ii); | |
2290 | if (dump_file) | |
2291 | fprintf (dump_file, "split_row=%d\n", split_row); | |
2292 | ||
6f7f081f | 2293 | reset_sched_times (ps, PS_MIN_CYCLE (ps)); |
2294 | rotate_partial_schedule (ps, PS_MIN_CYCLE (ps)); | |
76387907 | 2295 | |
2296 | rows_new = (ps_insn_ptr *) xcalloc (new_ii, sizeof (ps_insn_ptr)); | |
4815ed0c | 2297 | rows_length_new = (int *) xcalloc (new_ii, sizeof (int)); |
76387907 | 2298 | for (row = 0; row < split_row; row++) |
2299 | { | |
2300 | rows_new[row] = ps->rows[row]; | |
4815ed0c | 2301 | rows_length_new[row] = ps->rows_length[row]; |
76387907 | 2302 | ps->rows[row] = NULL; |
2303 | for (crr_insn = rows_new[row]; | |
2304 | crr_insn; crr_insn = crr_insn->next_in_row) | |
2305 | { | |
7282ef12 | 2306 | int u = crr_insn->id; |
76387907 | 2307 | int new_time = SCHED_TIME (u) + (SCHED_TIME (u) / ii); |
2308 | ||
2309 | SCHED_TIME (u) = new_time; | |
2310 | crr_insn->cycle = new_time; | |
2311 | SCHED_ROW (u) = new_time % new_ii; | |
2312 | SCHED_STAGE (u) = new_time / new_ii; | |
2313 | } | |
2314 | ||
2315 | } | |
2316 | ||
2317 | rows_new[split_row] = NULL; | |
2318 | ||
2319 | for (row = split_row; row < ii; row++) | |
2320 | { | |
2321 | rows_new[row + 1] = ps->rows[row]; | |
4815ed0c | 2322 | rows_length_new[row + 1] = ps->rows_length[row]; |
76387907 | 2323 | ps->rows[row] = NULL; |
2324 | for (crr_insn = rows_new[row + 1]; | |
2325 | crr_insn; crr_insn = crr_insn->next_in_row) | |
2326 | { | |
7282ef12 | 2327 | int u = crr_insn->id; |
76387907 | 2328 | int new_time = SCHED_TIME (u) + (SCHED_TIME (u) / ii) + 1; |
2329 | ||
2330 | SCHED_TIME (u) = new_time; | |
2331 | crr_insn->cycle = new_time; | |
2332 | SCHED_ROW (u) = new_time % new_ii; | |
2333 | SCHED_STAGE (u) = new_time / new_ii; | |
2334 | } | |
2335 | } | |
2336 | ||
2337 | /* Updating ps. */ | |
2338 | ps->min_cycle = ps->min_cycle + ps->min_cycle / ii | |
2339 | + (SMODULO (ps->min_cycle, ii) >= split_row ? 1 : 0); | |
2340 | ps->max_cycle = ps->max_cycle + ps->max_cycle / ii | |
2341 | + (SMODULO (ps->max_cycle, ii) >= split_row ? 1 : 0); | |
2342 | free (ps->rows); | |
2343 | ps->rows = rows_new; | |
4815ed0c | 2344 | free (ps->rows_length); |
2345 | ps->rows_length = rows_length_new; | |
76387907 | 2346 | ps->ii = new_ii; |
2347 | gcc_assert (ps->min_cycle >= 0); | |
2348 | ||
2349 | verify_partial_schedule (ps, sched_nodes); | |
2350 | ||
2351 | if (dump_file) | |
2352 | fprintf (dump_file, "min_cycle=%d, max_cycle=%d\n", ps->min_cycle, | |
2353 | ps->max_cycle); | |
2354 | } | |
2355 | ||
2356 | /* Given U_NODE which is the node that failed to be scheduled; LOW and | |
2357 | UP which are the boundaries of it's scheduling window; compute using | |
c7684b8e | 2358 | SCHED_NODES and II a row in the partial schedule that can be split |
76387907 | 2359 | which will separate a critical predecessor from a critical successor |
2360 | thereby expanding the window, and return it. */ | |
2361 | static int | |
2362 | compute_split_row (sbitmap sched_nodes, int low, int up, int ii, | |
2363 | ddg_node_ptr u_node) | |
2364 | { | |
2365 | ddg_edge_ptr e; | |
2366 | int lower = INT_MIN, upper = INT_MAX; | |
7282ef12 | 2367 | int crit_pred = -1; |
2368 | int crit_succ = -1; | |
76387907 | 2369 | int crit_cycle; |
2370 | ||
2371 | for (e = u_node->in; e != 0; e = e->next_in) | |
2372 | { | |
7282ef12 | 2373 | int v = e->src->cuid; |
76387907 | 2374 | |
08b7917c | 2375 | if (bitmap_bit_p (sched_nodes, v) |
7282ef12 | 2376 | && (low == SCHED_TIME (v) + e->latency - (e->distance * ii))) |
2377 | if (SCHED_TIME (v) > lower) | |
76387907 | 2378 | { |
7282ef12 | 2379 | crit_pred = v; |
2380 | lower = SCHED_TIME (v); | |
76387907 | 2381 | } |
2382 | } | |
2383 | ||
7282ef12 | 2384 | if (crit_pred >= 0) |
76387907 | 2385 | { |
2386 | crit_cycle = SCHED_TIME (crit_pred) + 1; | |
2387 | return SMODULO (crit_cycle, ii); | |
2388 | } | |
2389 | ||
2390 | for (e = u_node->out; e != 0; e = e->next_out) | |
2391 | { | |
7282ef12 | 2392 | int v = e->dest->cuid; |
2393 | ||
08b7917c | 2394 | if (bitmap_bit_p (sched_nodes, v) |
7282ef12 | 2395 | && (up == SCHED_TIME (v) - e->latency + (e->distance * ii))) |
2396 | if (SCHED_TIME (v) < upper) | |
76387907 | 2397 | { |
7282ef12 | 2398 | crit_succ = v; |
2399 | upper = SCHED_TIME (v); | |
76387907 | 2400 | } |
2401 | } | |
2402 | ||
7282ef12 | 2403 | if (crit_succ >= 0) |
76387907 | 2404 | { |
2405 | crit_cycle = SCHED_TIME (crit_succ); | |
2406 | return SMODULO (crit_cycle, ii); | |
2407 | } | |
2408 | ||
2409 | if (dump_file) | |
2410 | fprintf (dump_file, "Both crit_pred and crit_succ are NULL\n"); | |
2411 | ||
2412 | return SMODULO ((low + up + 1) / 2, ii); | |
2413 | } | |
2414 | ||
2415 | static void | |
2416 | verify_partial_schedule (partial_schedule_ptr ps, sbitmap sched_nodes) | |
2417 | { | |
2418 | int row; | |
2419 | ps_insn_ptr crr_insn; | |
2420 | ||
2421 | for (row = 0; row < ps->ii; row++) | |
4815ed0c | 2422 | { |
2423 | int length = 0; | |
2424 | ||
2425 | for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) | |
2426 | { | |
7282ef12 | 2427 | int u = crr_insn->id; |
4815ed0c | 2428 | |
2429 | length++; | |
08b7917c | 2430 | gcc_assert (bitmap_bit_p (sched_nodes, u)); |
4815ed0c | 2431 | /* ??? Test also that all nodes of sched_nodes are in ps, perhaps by |
2432 | popcount (sched_nodes) == number of insns in ps. */ | |
2433 | gcc_assert (SCHED_TIME (u) >= ps->min_cycle); | |
2434 | gcc_assert (SCHED_TIME (u) <= ps->max_cycle); | |
2435 | } | |
2436 | ||
2437 | gcc_assert (ps->rows_length[row] == length); | |
2438 | } | |
76387907 | 2439 | } |
2440 | ||
5b6269ed | 2441 | \f |
2442 | /* This page implements the algorithm for ordering the nodes of a DDG | |
2443 | for modulo scheduling, activated through the | |
2444 | "int sms_order_nodes (ddg_ptr, int mii, int * result)" API. */ | |
2445 | ||
2446 | #define ORDER_PARAMS(x) ((struct node_order_params *) (x)->aux.info) | |
2447 | #define ASAP(x) (ORDER_PARAMS ((x))->asap) | |
2448 | #define ALAP(x) (ORDER_PARAMS ((x))->alap) | |
2449 | #define HEIGHT(x) (ORDER_PARAMS ((x))->height) | |
2450 | #define MOB(x) (ALAP ((x)) - ASAP ((x))) | |
2451 | #define DEPTH(x) (ASAP ((x))) | |
2452 | ||
2453 | typedef struct node_order_params * nopa; | |
2454 | ||
2455 | static void order_nodes_of_sccs (ddg_all_sccs_ptr, int * result); | |
2456 | static int order_nodes_in_scc (ddg_ptr, sbitmap, sbitmap, int*, int); | |
c0fb94bd | 2457 | static nopa calculate_order_params (ddg_ptr, int, int *); |
5b6269ed | 2458 | static int find_max_asap (ddg_ptr, sbitmap); |
2459 | static int find_max_hv_min_mob (ddg_ptr, sbitmap); | |
2460 | static int find_max_dv_min_mob (ddg_ptr, sbitmap); | |
2461 | ||
2462 | enum sms_direction {BOTTOMUP, TOPDOWN}; | |
2463 | ||
2464 | struct node_order_params | |
2465 | { | |
2466 | int asap; | |
2467 | int alap; | |
2468 | int height; | |
2469 | }; | |
2470 | ||
2471 | /* Check if NODE_ORDER contains a permutation of 0 .. NUM_NODES-1. */ | |
2472 | static void | |
2473 | check_nodes_order (int *node_order, int num_nodes) | |
2474 | { | |
2475 | int i; | |
2476 | sbitmap tmp = sbitmap_alloc (num_nodes); | |
2477 | ||
53c5d9d4 | 2478 | bitmap_clear (tmp); |
5b6269ed | 2479 | |
a9ac8caa | 2480 | if (dump_file) |
2481 | fprintf (dump_file, "SMS final nodes order: \n"); | |
2482 | ||
5b6269ed | 2483 | for (i = 0; i < num_nodes; i++) |
2484 | { | |
2485 | int u = node_order[i]; | |
2486 | ||
a9ac8caa | 2487 | if (dump_file) |
2488 | fprintf (dump_file, "%d ", u); | |
08b7917c | 2489 | gcc_assert (u < num_nodes && u >= 0 && !bitmap_bit_p (tmp, u)); |
5b6269ed | 2490 | |
08b7917c | 2491 | bitmap_set_bit (tmp, u); |
5b6269ed | 2492 | } |
48e1416a | 2493 | |
a9ac8caa | 2494 | if (dump_file) |
2495 | fprintf (dump_file, "\n"); | |
48e1416a | 2496 | |
5b6269ed | 2497 | sbitmap_free (tmp); |
2498 | } | |
2499 | ||
2500 | /* Order the nodes of G for scheduling and pass the result in | |
2501 | NODE_ORDER. Also set aux.count of each node to ASAP. | |
c0fb94bd | 2502 | Put maximal ASAP to PMAX_ASAP. Return the recMII for the given DDG. */ |
5b6269ed | 2503 | static int |
c0fb94bd | 2504 | sms_order_nodes (ddg_ptr g, int mii, int * node_order, int *pmax_asap) |
5b6269ed | 2505 | { |
2506 | int i; | |
2507 | int rec_mii = 0; | |
2508 | ddg_all_sccs_ptr sccs = create_ddg_all_sccs (g); | |
2509 | ||
c0fb94bd | 2510 | nopa nops = calculate_order_params (g, mii, pmax_asap); |
5b6269ed | 2511 | |
65ef61df | 2512 | if (dump_file) |
2513 | print_sccs (dump_file, sccs, g); | |
2514 | ||
5b6269ed | 2515 | order_nodes_of_sccs (sccs, node_order); |
2516 | ||
2517 | if (sccs->num_sccs > 0) | |
2518 | /* First SCC has the largest recurrence_length. */ | |
2519 | rec_mii = sccs->sccs[0]->recurrence_length; | |
2520 | ||
2521 | /* Save ASAP before destroying node_order_params. */ | |
2522 | for (i = 0; i < g->num_nodes; i++) | |
2523 | { | |
2524 | ddg_node_ptr v = &g->nodes[i]; | |
2525 | v->aux.count = ASAP (v); | |
2526 | } | |
2527 | ||
2528 | free (nops); | |
2529 | free_ddg_all_sccs (sccs); | |
2530 | check_nodes_order (node_order, g->num_nodes); | |
2531 | ||
2532 | return rec_mii; | |
2533 | } | |
2534 | ||
2535 | static void | |
2536 | order_nodes_of_sccs (ddg_all_sccs_ptr all_sccs, int * node_order) | |
2537 | { | |
2538 | int i, pos = 0; | |
2539 | ddg_ptr g = all_sccs->ddg; | |
2540 | int num_nodes = g->num_nodes; | |
2541 | sbitmap prev_sccs = sbitmap_alloc (num_nodes); | |
2542 | sbitmap on_path = sbitmap_alloc (num_nodes); | |
2543 | sbitmap tmp = sbitmap_alloc (num_nodes); | |
2544 | sbitmap ones = sbitmap_alloc (num_nodes); | |
2545 | ||
53c5d9d4 | 2546 | bitmap_clear (prev_sccs); |
2547 | bitmap_ones (ones); | |
5b6269ed | 2548 | |
f0b5f617 | 2549 | /* Perform the node ordering starting from the SCC with the highest recMII. |
5b6269ed | 2550 | For each SCC order the nodes according to their ASAP/ALAP/HEIGHT etc. */ |
2551 | for (i = 0; i < all_sccs->num_sccs; i++) | |
2552 | { | |
2553 | ddg_scc_ptr scc = all_sccs->sccs[i]; | |
2554 | ||
2555 | /* Add nodes on paths from previous SCCs to the current SCC. */ | |
2556 | find_nodes_on_paths (on_path, g, prev_sccs, scc->nodes); | |
53c5d9d4 | 2557 | bitmap_ior (tmp, scc->nodes, on_path); |
5b6269ed | 2558 | |
2559 | /* Add nodes on paths from the current SCC to previous SCCs. */ | |
2560 | find_nodes_on_paths (on_path, g, scc->nodes, prev_sccs); | |
53c5d9d4 | 2561 | bitmap_ior (tmp, tmp, on_path); |
5b6269ed | 2562 | |
2563 | /* Remove nodes of previous SCCs from current extended SCC. */ | |
53c5d9d4 | 2564 | bitmap_and_compl (tmp, tmp, prev_sccs); |
5b6269ed | 2565 | |
2566 | pos = order_nodes_in_scc (g, prev_sccs, tmp, node_order, pos); | |
2567 | /* Above call to order_nodes_in_scc updated prev_sccs |= tmp. */ | |
2568 | } | |
2569 | ||
2570 | /* Handle the remaining nodes that do not belong to any scc. Each call | |
2571 | to order_nodes_in_scc handles a single connected component. */ | |
2572 | while (pos < g->num_nodes) | |
2573 | { | |
53c5d9d4 | 2574 | bitmap_and_compl (tmp, ones, prev_sccs); |
5b6269ed | 2575 | pos = order_nodes_in_scc (g, prev_sccs, tmp, node_order, pos); |
2576 | } | |
2577 | sbitmap_free (prev_sccs); | |
2578 | sbitmap_free (on_path); | |
2579 | sbitmap_free (tmp); | |
2580 | sbitmap_free (ones); | |
2581 | } | |
2582 | ||
2583 | /* MII is needed if we consider backarcs (that do not close recursive cycles). */ | |
2584 | static struct node_order_params * | |
c0fb94bd | 2585 | calculate_order_params (ddg_ptr g, int mii ATTRIBUTE_UNUSED, int *pmax_asap) |
5b6269ed | 2586 | { |
2587 | int u; | |
2588 | int max_asap; | |
2589 | int num_nodes = g->num_nodes; | |
2590 | ddg_edge_ptr e; | |
2591 | /* Allocate a place to hold ordering params for each node in the DDG. */ | |
2592 | nopa node_order_params_arr; | |
2593 | ||
2594 | /* Initialize of ASAP/ALAP/HEIGHT to zero. */ | |
2595 | node_order_params_arr = (nopa) xcalloc (num_nodes, | |
2596 | sizeof (struct node_order_params)); | |
2597 | ||
2c763ed4 | 2598 | /* Set the aux pointer of each node to point to its order_params structure. */ |
5b6269ed | 2599 | for (u = 0; u < num_nodes; u++) |
2600 | g->nodes[u].aux.info = &node_order_params_arr[u]; | |
2601 | ||
2602 | /* Disregarding a backarc from each recursive cycle to obtain a DAG, | |
2603 | calculate ASAP, ALAP, mobility, distance, and height for each node | |
2604 | in the dependence (direct acyclic) graph. */ | |
2605 | ||
2606 | /* We assume that the nodes in the array are in topological order. */ | |
2607 | ||
2608 | max_asap = 0; | |
2609 | for (u = 0; u < num_nodes; u++) | |
2610 | { | |
2611 | ddg_node_ptr u_node = &g->nodes[u]; | |
2612 | ||
2613 | ASAP (u_node) = 0; | |
2614 | for (e = u_node->in; e; e = e->next_in) | |
2615 | if (e->distance == 0) | |
2616 | ASAP (u_node) = MAX (ASAP (u_node), | |
2617 | ASAP (e->src) + e->latency); | |
2618 | max_asap = MAX (max_asap, ASAP (u_node)); | |
2619 | } | |
2620 | ||
2621 | for (u = num_nodes - 1; u > -1; u--) | |
2622 | { | |
2623 | ddg_node_ptr u_node = &g->nodes[u]; | |
2624 | ||
2625 | ALAP (u_node) = max_asap; | |
2626 | HEIGHT (u_node) = 0; | |
2627 | for (e = u_node->out; e; e = e->next_out) | |
2628 | if (e->distance == 0) | |
2629 | { | |
2630 | ALAP (u_node) = MIN (ALAP (u_node), | |
2631 | ALAP (e->dest) - e->latency); | |
2632 | HEIGHT (u_node) = MAX (HEIGHT (u_node), | |
2633 | HEIGHT (e->dest) + e->latency); | |
2634 | } | |
2635 | } | |
a9ac8caa | 2636 | if (dump_file) |
2637 | { | |
2638 | fprintf (dump_file, "\nOrder params\n"); | |
2639 | for (u = 0; u < num_nodes; u++) | |
2640 | { | |
2641 | ddg_node_ptr u_node = &g->nodes[u]; | |
2642 | ||
2643 | fprintf (dump_file, "node %d, ASAP: %d, ALAP: %d, HEIGHT: %d\n", u, | |
2644 | ASAP (u_node), ALAP (u_node), HEIGHT (u_node)); | |
2645 | } | |
2646 | } | |
5b6269ed | 2647 | |
c0fb94bd | 2648 | *pmax_asap = max_asap; |
5b6269ed | 2649 | return node_order_params_arr; |
2650 | } | |
2651 | ||
2652 | static int | |
2653 | find_max_asap (ddg_ptr g, sbitmap nodes) | |
2654 | { | |
86c1585a | 2655 | unsigned int u = 0; |
5b6269ed | 2656 | int max_asap = -1; |
2657 | int result = -1; | |
3e790786 | 2658 | sbitmap_iterator sbi; |
5b6269ed | 2659 | |
0d211963 | 2660 | EXECUTE_IF_SET_IN_BITMAP (nodes, 0, u, sbi) |
5b6269ed | 2661 | { |
2662 | ddg_node_ptr u_node = &g->nodes[u]; | |
2663 | ||
2664 | if (max_asap < ASAP (u_node)) | |
2665 | { | |
2666 | max_asap = ASAP (u_node); | |
2667 | result = u; | |
2668 | } | |
3e790786 | 2669 | } |
5b6269ed | 2670 | return result; |
2671 | } | |
2672 | ||
2673 | static int | |
2674 | find_max_hv_min_mob (ddg_ptr g, sbitmap nodes) | |
2675 | { | |
86c1585a | 2676 | unsigned int u = 0; |
5b6269ed | 2677 | int max_hv = -1; |
2678 | int min_mob = INT_MAX; | |
2679 | int result = -1; | |
3e790786 | 2680 | sbitmap_iterator sbi; |
5b6269ed | 2681 | |
0d211963 | 2682 | EXECUTE_IF_SET_IN_BITMAP (nodes, 0, u, sbi) |
5b6269ed | 2683 | { |
2684 | ddg_node_ptr u_node = &g->nodes[u]; | |
2685 | ||
2686 | if (max_hv < HEIGHT (u_node)) | |
2687 | { | |
2688 | max_hv = HEIGHT (u_node); | |
2689 | min_mob = MOB (u_node); | |
2690 | result = u; | |
2691 | } | |
2692 | else if ((max_hv == HEIGHT (u_node)) | |
2693 | && (min_mob > MOB (u_node))) | |
2694 | { | |
2695 | min_mob = MOB (u_node); | |
2696 | result = u; | |
2697 | } | |
3e790786 | 2698 | } |
5b6269ed | 2699 | return result; |
2700 | } | |
2701 | ||
2702 | static int | |
2703 | find_max_dv_min_mob (ddg_ptr g, sbitmap nodes) | |
2704 | { | |
86c1585a | 2705 | unsigned int u = 0; |
5b6269ed | 2706 | int max_dv = -1; |
2707 | int min_mob = INT_MAX; | |
2708 | int result = -1; | |
3e790786 | 2709 | sbitmap_iterator sbi; |
5b6269ed | 2710 | |
0d211963 | 2711 | EXECUTE_IF_SET_IN_BITMAP (nodes, 0, u, sbi) |
5b6269ed | 2712 | { |
2713 | ddg_node_ptr u_node = &g->nodes[u]; | |
2714 | ||
2715 | if (max_dv < DEPTH (u_node)) | |
2716 | { | |
2717 | max_dv = DEPTH (u_node); | |
2718 | min_mob = MOB (u_node); | |
2719 | result = u; | |
2720 | } | |
2721 | else if ((max_dv == DEPTH (u_node)) | |
2722 | && (min_mob > MOB (u_node))) | |
2723 | { | |
2724 | min_mob = MOB (u_node); | |
2725 | result = u; | |
2726 | } | |
3e790786 | 2727 | } |
5b6269ed | 2728 | return result; |
2729 | } | |
2730 | ||
2731 | /* Places the nodes of SCC into the NODE_ORDER array starting | |
2732 | at position POS, according to the SMS ordering algorithm. | |
2733 | NODES_ORDERED (in&out parameter) holds the bitset of all nodes in | |
2734 | the NODE_ORDER array, starting from position zero. */ | |
2735 | static int | |
2736 | order_nodes_in_scc (ddg_ptr g, sbitmap nodes_ordered, sbitmap scc, | |
2737 | int * node_order, int pos) | |
2738 | { | |
2739 | enum sms_direction dir; | |
2740 | int num_nodes = g->num_nodes; | |
2741 | sbitmap workset = sbitmap_alloc (num_nodes); | |
2742 | sbitmap tmp = sbitmap_alloc (num_nodes); | |
2743 | sbitmap zero_bitmap = sbitmap_alloc (num_nodes); | |
2744 | sbitmap predecessors = sbitmap_alloc (num_nodes); | |
2745 | sbitmap successors = sbitmap_alloc (num_nodes); | |
2746 | ||
53c5d9d4 | 2747 | bitmap_clear (predecessors); |
5b6269ed | 2748 | find_predecessors (predecessors, g, nodes_ordered); |
2749 | ||
53c5d9d4 | 2750 | bitmap_clear (successors); |
5b6269ed | 2751 | find_successors (successors, g, nodes_ordered); |
2752 | ||
53c5d9d4 | 2753 | bitmap_clear (tmp); |
2754 | if (bitmap_and (tmp, predecessors, scc)) | |
5b6269ed | 2755 | { |
53c5d9d4 | 2756 | bitmap_copy (workset, tmp); |
5b6269ed | 2757 | dir = BOTTOMUP; |
2758 | } | |
53c5d9d4 | 2759 | else if (bitmap_and (tmp, successors, scc)) |
5b6269ed | 2760 | { |
53c5d9d4 | 2761 | bitmap_copy (workset, tmp); |
5b6269ed | 2762 | dir = TOPDOWN; |
2763 | } | |
2764 | else | |
2765 | { | |
2766 | int u; | |
2767 | ||
53c5d9d4 | 2768 | bitmap_clear (workset); |
5b6269ed | 2769 | if ((u = find_max_asap (g, scc)) >= 0) |
08b7917c | 2770 | bitmap_set_bit (workset, u); |
5b6269ed | 2771 | dir = BOTTOMUP; |
2772 | } | |
2773 | ||
53c5d9d4 | 2774 | bitmap_clear (zero_bitmap); |
2775 | while (!bitmap_equal_p (workset, zero_bitmap)) | |
5b6269ed | 2776 | { |
2777 | int v; | |
2778 | ddg_node_ptr v_node; | |
2779 | sbitmap v_node_preds; | |
2780 | sbitmap v_node_succs; | |
2781 | ||
2782 | if (dir == TOPDOWN) | |
2783 | { | |
53c5d9d4 | 2784 | while (!bitmap_equal_p (workset, zero_bitmap)) |
5b6269ed | 2785 | { |
2786 | v = find_max_hv_min_mob (g, workset); | |
2787 | v_node = &g->nodes[v]; | |
2788 | node_order[pos++] = v; | |
2789 | v_node_succs = NODE_SUCCESSORS (v_node); | |
53c5d9d4 | 2790 | bitmap_and (tmp, v_node_succs, scc); |
5b6269ed | 2791 | |
2792 | /* Don't consider the already ordered successors again. */ | |
53c5d9d4 | 2793 | bitmap_and_compl (tmp, tmp, nodes_ordered); |
2794 | bitmap_ior (workset, workset, tmp); | |
08b7917c | 2795 | bitmap_clear_bit (workset, v); |
2796 | bitmap_set_bit (nodes_ordered, v); | |
5b6269ed | 2797 | } |
2798 | dir = BOTTOMUP; | |
53c5d9d4 | 2799 | bitmap_clear (predecessors); |
5b6269ed | 2800 | find_predecessors (predecessors, g, nodes_ordered); |
53c5d9d4 | 2801 | bitmap_and (workset, predecessors, scc); |
5b6269ed | 2802 | } |
2803 | else | |
2804 | { | |
53c5d9d4 | 2805 | while (!bitmap_equal_p (workset, zero_bitmap)) |
5b6269ed | 2806 | { |
2807 | v = find_max_dv_min_mob (g, workset); | |
2808 | v_node = &g->nodes[v]; | |
2809 | node_order[pos++] = v; | |
2810 | v_node_preds = NODE_PREDECESSORS (v_node); | |
53c5d9d4 | 2811 | bitmap_and (tmp, v_node_preds, scc); |
5b6269ed | 2812 | |
2813 | /* Don't consider the already ordered predecessors again. */ | |
53c5d9d4 | 2814 | bitmap_and_compl (tmp, tmp, nodes_ordered); |
2815 | bitmap_ior (workset, workset, tmp); | |
08b7917c | 2816 | bitmap_clear_bit (workset, v); |
2817 | bitmap_set_bit (nodes_ordered, v); | |
5b6269ed | 2818 | } |
2819 | dir = TOPDOWN; | |
53c5d9d4 | 2820 | bitmap_clear (successors); |
5b6269ed | 2821 | find_successors (successors, g, nodes_ordered); |
53c5d9d4 | 2822 | bitmap_and (workset, successors, scc); |
5b6269ed | 2823 | } |
2824 | } | |
2825 | sbitmap_free (tmp); | |
2826 | sbitmap_free (workset); | |
2827 | sbitmap_free (zero_bitmap); | |
2828 | sbitmap_free (predecessors); | |
2829 | sbitmap_free (successors); | |
2830 | return pos; | |
2831 | } | |
2832 | ||
2833 | \f | |
2834 | /* This page contains functions for manipulating partial-schedules during | |
2835 | modulo scheduling. */ | |
2836 | ||
2837 | /* Create a partial schedule and allocate a memory to hold II rows. */ | |
1bed606a | 2838 | |
2839 | static partial_schedule_ptr | |
5b6269ed | 2840 | create_partial_schedule (int ii, ddg_ptr g, int history) |
2841 | { | |
4c36ffe6 | 2842 | partial_schedule_ptr ps = XNEW (struct partial_schedule); |
5b6269ed | 2843 | ps->rows = (ps_insn_ptr *) xcalloc (ii, sizeof (ps_insn_ptr)); |
4815ed0c | 2844 | ps->rows_length = (int *) xcalloc (ii, sizeof (int)); |
f1f41a6c | 2845 | ps->reg_moves.create (0); |
5b6269ed | 2846 | ps->ii = ii; |
2847 | ps->history = history; | |
2848 | ps->min_cycle = INT_MAX; | |
2849 | ps->max_cycle = INT_MIN; | |
2850 | ps->g = g; | |
2851 | ||
2852 | return ps; | |
2853 | } | |
2854 | ||
2855 | /* Free the PS_INSNs in rows array of the given partial schedule. | |
2856 | ??? Consider caching the PS_INSN's. */ | |
2857 | static void | |
2858 | free_ps_insns (partial_schedule_ptr ps) | |
2859 | { | |
2860 | int i; | |
2861 | ||
2862 | for (i = 0; i < ps->ii; i++) | |
2863 | { | |
2864 | while (ps->rows[i]) | |
2865 | { | |
2866 | ps_insn_ptr ps_insn = ps->rows[i]->next_in_row; | |
2867 | ||
2868 | free (ps->rows[i]); | |
2869 | ps->rows[i] = ps_insn; | |
2870 | } | |
2871 | ps->rows[i] = NULL; | |
2872 | } | |
2873 | } | |
2874 | ||
2875 | /* Free all the memory allocated to the partial schedule. */ | |
1bed606a | 2876 | |
2877 | static void | |
5b6269ed | 2878 | free_partial_schedule (partial_schedule_ptr ps) |
2879 | { | |
0b79ae60 | 2880 | ps_reg_move_info *move; |
2881 | unsigned int i; | |
2882 | ||
5b6269ed | 2883 | if (!ps) |
2884 | return; | |
0b79ae60 | 2885 | |
f1f41a6c | 2886 | FOR_EACH_VEC_ELT (ps->reg_moves, i, move) |
0b79ae60 | 2887 | sbitmap_free (move->uses); |
f1f41a6c | 2888 | ps->reg_moves.release (); |
0b79ae60 | 2889 | |
5b6269ed | 2890 | free_ps_insns (ps); |
2891 | free (ps->rows); | |
4815ed0c | 2892 | free (ps->rows_length); |
5b6269ed | 2893 | free (ps); |
2894 | } | |
2895 | ||
2896 | /* Clear the rows array with its PS_INSNs, and create a new one with | |
2897 | NEW_II rows. */ | |
1bed606a | 2898 | |
2899 | static void | |
5b6269ed | 2900 | reset_partial_schedule (partial_schedule_ptr ps, int new_ii) |
2901 | { | |
2902 | if (!ps) | |
2903 | return; | |
2904 | free_ps_insns (ps); | |
2905 | if (new_ii == ps->ii) | |
2906 | return; | |
2907 | ps->rows = (ps_insn_ptr *) xrealloc (ps->rows, new_ii | |
2908 | * sizeof (ps_insn_ptr)); | |
2909 | memset (ps->rows, 0, new_ii * sizeof (ps_insn_ptr)); | |
4815ed0c | 2910 | ps->rows_length = (int *) xrealloc (ps->rows_length, new_ii * sizeof (int)); |
2911 | memset (ps->rows_length, 0, new_ii * sizeof (int)); | |
5b6269ed | 2912 | ps->ii = new_ii; |
2913 | ps->min_cycle = INT_MAX; | |
2914 | ps->max_cycle = INT_MIN; | |
2915 | } | |
2916 | ||
2917 | /* Prints the partial schedule as an ii rows array, for each rows | |
2918 | print the ids of the insns in it. */ | |
2919 | void | |
2920 | print_partial_schedule (partial_schedule_ptr ps, FILE *dump) | |
2921 | { | |
2922 | int i; | |
2923 | ||
2924 | for (i = 0; i < ps->ii; i++) | |
2925 | { | |
2926 | ps_insn_ptr ps_i = ps->rows[i]; | |
2927 | ||
34c7f568 | 2928 | fprintf (dump, "\n[ROW %d ]: ", i); |
5b6269ed | 2929 | while (ps_i) |
2930 | { | |
7282ef12 | 2931 | rtx insn = ps_rtl_insn (ps, ps_i->id); |
2932 | ||
2933 | if (JUMP_P (insn)) | |
2934 | fprintf (dump, "%d (branch), ", INSN_UID (insn)); | |
abbfd803 | 2935 | else |
7282ef12 | 2936 | fprintf (dump, "%d, ", INSN_UID (insn)); |
abbfd803 | 2937 | |
5b6269ed | 2938 | ps_i = ps_i->next_in_row; |
2939 | } | |
2940 | } | |
2941 | } | |
2942 | ||
2943 | /* Creates an object of PS_INSN and initializes it to the given parameters. */ | |
2944 | static ps_insn_ptr | |
7282ef12 | 2945 | create_ps_insn (int id, int cycle) |
5b6269ed | 2946 | { |
4c36ffe6 | 2947 | ps_insn_ptr ps_i = XNEW (struct ps_insn); |
5b6269ed | 2948 | |
7282ef12 | 2949 | ps_i->id = id; |
5b6269ed | 2950 | ps_i->next_in_row = NULL; |
2951 | ps_i->prev_in_row = NULL; | |
5b6269ed | 2952 | ps_i->cycle = cycle; |
2953 | ||
2954 | return ps_i; | |
2955 | } | |
2956 | ||
2957 | ||
9bf2b489 | 2958 | /* Removes the given PS_INSN from the partial schedule. */ |
2959 | static void | |
5b6269ed | 2960 | remove_node_from_ps (partial_schedule_ptr ps, ps_insn_ptr ps_i) |
2961 | { | |
2962 | int row; | |
2963 | ||
9bf2b489 | 2964 | gcc_assert (ps && ps_i); |
2965 | ||
5b6269ed | 2966 | row = SMODULO (ps_i->cycle, ps->ii); |
2967 | if (! ps_i->prev_in_row) | |
2968 | { | |
9bf2b489 | 2969 | gcc_assert (ps_i == ps->rows[row]); |
5b6269ed | 2970 | ps->rows[row] = ps_i->next_in_row; |
2971 | if (ps->rows[row]) | |
2972 | ps->rows[row]->prev_in_row = NULL; | |
2973 | } | |
2974 | else | |
2975 | { | |
2976 | ps_i->prev_in_row->next_in_row = ps_i->next_in_row; | |
2977 | if (ps_i->next_in_row) | |
2978 | ps_i->next_in_row->prev_in_row = ps_i->prev_in_row; | |
2979 | } | |
4815ed0c | 2980 | |
2981 | ps->rows_length[row] -= 1; | |
5b6269ed | 2982 | free (ps_i); |
9bf2b489 | 2983 | return; |
5b6269ed | 2984 | } |
2985 | ||
f045d41d | 2986 | /* Unlike what literature describes for modulo scheduling (which focuses |
2987 | on VLIW machines) the order of the instructions inside a cycle is | |
2988 | important. Given the bitmaps MUST_FOLLOW and MUST_PRECEDE we know | |
2989 | where the current instruction should go relative to the already | |
2990 | scheduled instructions in the given cycle. Go over these | |
2991 | instructions and find the first possible column to put it in. */ | |
2992 | static bool | |
2993 | ps_insn_find_column (partial_schedule_ptr ps, ps_insn_ptr ps_i, | |
2994 | sbitmap must_precede, sbitmap must_follow) | |
2995 | { | |
2996 | ps_insn_ptr next_ps_i; | |
2997 | ps_insn_ptr first_must_follow = NULL; | |
2998 | ps_insn_ptr last_must_precede = NULL; | |
6f7f081f | 2999 | ps_insn_ptr last_in_row = NULL; |
f045d41d | 3000 | int row; |
3001 | ||
3002 | if (! ps_i) | |
3003 | return false; | |
3004 | ||
3005 | row = SMODULO (ps_i->cycle, ps->ii); | |
3006 | ||
3007 | /* Find the first must follow and the last must precede | |
91275768 | 3008 | and insert the node immediately after the must precede |
dac49aa5 | 3009 | but make sure that it there is no must follow after it. */ |
f045d41d | 3010 | for (next_ps_i = ps->rows[row]; |
3011 | next_ps_i; | |
3012 | next_ps_i = next_ps_i->next_in_row) | |
3013 | { | |
7282ef12 | 3014 | if (must_follow |
08b7917c | 3015 | && bitmap_bit_p (must_follow, next_ps_i->id) |
f045d41d | 3016 | && ! first_must_follow) |
3017 | first_must_follow = next_ps_i; | |
08b7917c | 3018 | if (must_precede && bitmap_bit_p (must_precede, next_ps_i->id)) |
f045d41d | 3019 | { |
3020 | /* If we have already met a node that must follow, then | |
3021 | there is no possible column. */ | |
3022 | if (first_must_follow) | |
3023 | return false; | |
3024 | else | |
3025 | last_must_precede = next_ps_i; | |
3026 | } | |
6f7f081f | 3027 | /* The closing branch must be the last in the row. */ |
3028 | if (must_precede | |
08b7917c | 3029 | && bitmap_bit_p (must_precede, next_ps_i->id) |
7282ef12 | 3030 | && JUMP_P (ps_rtl_insn (ps, next_ps_i->id))) |
6f7f081f | 3031 | return false; |
3032 | ||
3033 | last_in_row = next_ps_i; | |
f045d41d | 3034 | } |
3035 | ||
6f7f081f | 3036 | /* The closing branch is scheduled as well. Make sure there is no |
3037 | dependent instruction after it as the branch should be the last | |
3038 | instruction in the row. */ | |
7282ef12 | 3039 | if (JUMP_P (ps_rtl_insn (ps, ps_i->id))) |
6f7f081f | 3040 | { |
3041 | if (first_must_follow) | |
3042 | return false; | |
3043 | if (last_in_row) | |
3044 | { | |
3045 | /* Make the branch the last in the row. New instructions | |
3046 | will be inserted at the beginning of the row or after the | |
3047 | last must_precede instruction thus the branch is guaranteed | |
3048 | to remain the last instruction in the row. */ | |
3049 | last_in_row->next_in_row = ps_i; | |
3050 | ps_i->prev_in_row = last_in_row; | |
3051 | ps_i->next_in_row = NULL; | |
3052 | } | |
3053 | else | |
3054 | ps->rows[row] = ps_i; | |
3055 | return true; | |
3056 | } | |
3057 | ||
f045d41d | 3058 | /* Now insert the node after INSERT_AFTER_PSI. */ |
3059 | ||
3060 | if (! last_must_precede) | |
3061 | { | |
3062 | ps_i->next_in_row = ps->rows[row]; | |
3063 | ps_i->prev_in_row = NULL; | |
3064 | if (ps_i->next_in_row) | |
3065 | ps_i->next_in_row->prev_in_row = ps_i; | |
3066 | ps->rows[row] = ps_i; | |
3067 | } | |
3068 | else | |
3069 | { | |
3070 | ps_i->next_in_row = last_must_precede->next_in_row; | |
3071 | last_must_precede->next_in_row = ps_i; | |
3072 | ps_i->prev_in_row = last_must_precede; | |
3073 | if (ps_i->next_in_row) | |
3074 | ps_i->next_in_row->prev_in_row = ps_i; | |
3075 | } | |
3076 | ||
3077 | return true; | |
3078 | } | |
3079 | ||
5b6269ed | 3080 | /* Advances the PS_INSN one column in its current row; returns false |
48e1416a | 3081 | in failure and true in success. Bit N is set in MUST_FOLLOW if |
3082 | the node with cuid N must be come after the node pointed to by | |
f045d41d | 3083 | PS_I when scheduled in the same cycle. */ |
5b6269ed | 3084 | static int |
f045d41d | 3085 | ps_insn_advance_column (partial_schedule_ptr ps, ps_insn_ptr ps_i, |
3086 | sbitmap must_follow) | |
5b6269ed | 3087 | { |
3088 | ps_insn_ptr prev, next; | |
3089 | int row; | |
3090 | ||
3091 | if (!ps || !ps_i) | |
3092 | return false; | |
3093 | ||
3094 | row = SMODULO (ps_i->cycle, ps->ii); | |
3095 | ||
3096 | if (! ps_i->next_in_row) | |
3097 | return false; | |
3098 | ||
3099 | /* Check if next_in_row is dependent on ps_i, both having same sched | |
3100 | times (typically ANTI_DEP). If so, ps_i cannot skip over it. */ | |
08b7917c | 3101 | if (must_follow && bitmap_bit_p (must_follow, ps_i->next_in_row->id)) |
f045d41d | 3102 | return false; |
5b6269ed | 3103 | |
91275768 | 3104 | /* Advance PS_I over its next_in_row in the doubly linked list. */ |
5b6269ed | 3105 | prev = ps_i->prev_in_row; |
3106 | next = ps_i->next_in_row; | |
3107 | ||
3108 | if (ps_i == ps->rows[row]) | |
3109 | ps->rows[row] = next; | |
3110 | ||
3111 | ps_i->next_in_row = next->next_in_row; | |
3112 | ||
3113 | if (next->next_in_row) | |
3114 | next->next_in_row->prev_in_row = ps_i; | |
3115 | ||
3116 | next->next_in_row = ps_i; | |
3117 | ps_i->prev_in_row = next; | |
3118 | ||
3119 | next->prev_in_row = prev; | |
3120 | if (prev) | |
3121 | prev->next_in_row = next; | |
3122 | ||
3123 | return true; | |
3124 | } | |
3125 | ||
3126 | /* Inserts a DDG_NODE to the given partial schedule at the given cycle. | |
48e1416a | 3127 | Returns 0 if this is not possible and a PS_INSN otherwise. Bit N is |
3128 | set in MUST_PRECEDE/MUST_FOLLOW if the node with cuid N must be come | |
3129 | before/after (respectively) the node pointed to by PS_I when scheduled | |
f045d41d | 3130 | in the same cycle. */ |
5b6269ed | 3131 | static ps_insn_ptr |
7282ef12 | 3132 | add_node_to_ps (partial_schedule_ptr ps, int id, int cycle, |
f045d41d | 3133 | sbitmap must_precede, sbitmap must_follow) |
5b6269ed | 3134 | { |
f045d41d | 3135 | ps_insn_ptr ps_i; |
5b6269ed | 3136 | int row = SMODULO (cycle, ps->ii); |
5b6269ed | 3137 | |
4815ed0c | 3138 | if (ps->rows_length[row] >= issue_rate) |
5b6269ed | 3139 | return NULL; |
3140 | ||
7282ef12 | 3141 | ps_i = create_ps_insn (id, cycle); |
f045d41d | 3142 | |
3143 | /* Finds and inserts PS_I according to MUST_FOLLOW and | |
3144 | MUST_PRECEDE. */ | |
3145 | if (! ps_insn_find_column (ps, ps_i, must_precede, must_follow)) | |
3146 | { | |
3147 | free (ps_i); | |
3148 | return NULL; | |
3149 | } | |
5b6269ed | 3150 | |
4815ed0c | 3151 | ps->rows_length[row] += 1; |
5b6269ed | 3152 | return ps_i; |
3153 | } | |
3154 | ||
3155 | /* Advance time one cycle. Assumes DFA is being used. */ | |
3156 | static void | |
3157 | advance_one_cycle (void) | |
3158 | { | |
67900a4f | 3159 | if (targetm.sched.dfa_pre_cycle_insn) |
3160 | state_transition (curr_state, | |
ffa47ae0 | 3161 | targetm.sched.dfa_pre_cycle_insn ()); |
5b6269ed | 3162 | |
67900a4f | 3163 | state_transition (curr_state, NULL); |
5b6269ed | 3164 | |
67900a4f | 3165 | if (targetm.sched.dfa_post_cycle_insn) |
3166 | state_transition (curr_state, | |
ffa47ae0 | 3167 | targetm.sched.dfa_post_cycle_insn ()); |
5b6269ed | 3168 | } |
3169 | ||
b6a75366 | 3170 | |
b6a75366 | 3171 | |
5b6269ed | 3172 | /* Checks if PS has resource conflicts according to DFA, starting from |
3173 | FROM cycle to TO cycle; returns true if there are conflicts and false | |
3174 | if there are no conflicts. Assumes DFA is being used. */ | |
3175 | static int | |
3176 | ps_has_conflicts (partial_schedule_ptr ps, int from, int to) | |
3177 | { | |
3178 | int cycle; | |
3179 | ||
5b6269ed | 3180 | state_reset (curr_state); |
3181 | ||
3182 | for (cycle = from; cycle <= to; cycle++) | |
3183 | { | |
3184 | ps_insn_ptr crr_insn; | |
3185 | /* Holds the remaining issue slots in the current row. */ | |
3186 | int can_issue_more = issue_rate; | |
3187 | ||
3188 | /* Walk through the DFA for the current row. */ | |
3189 | for (crr_insn = ps->rows[SMODULO (cycle, ps->ii)]; | |
3190 | crr_insn; | |
3191 | crr_insn = crr_insn->next_in_row) | |
3192 | { | |
7282ef12 | 3193 | rtx insn = ps_rtl_insn (ps, crr_insn->id); |
5b6269ed | 3194 | |
9845d120 | 3195 | if (!NONDEBUG_INSN_P (insn)) |
5b6269ed | 3196 | continue; |
3197 | ||
3198 | /* Check if there is room for the current insn. */ | |
3199 | if (!can_issue_more || state_dead_lock_p (curr_state)) | |
3200 | return true; | |
3201 | ||
3202 | /* Update the DFA state and return with failure if the DFA found | |
f0b5f617 | 3203 | resource conflicts. */ |
5b6269ed | 3204 | if (state_transition (curr_state, insn) >= 0) |
3205 | return true; | |
3206 | ||
3207 | if (targetm.sched.variable_issue) | |
3208 | can_issue_more = | |
ffa47ae0 | 3209 | targetm.sched.variable_issue (sched_dump, sched_verbose, |
3210 | insn, can_issue_more); | |
5b6269ed | 3211 | /* A naked CLOBBER or USE generates no instruction, so don't |
3212 | let them consume issue slots. */ | |
3213 | else if (GET_CODE (PATTERN (insn)) != USE | |
3214 | && GET_CODE (PATTERN (insn)) != CLOBBER) | |
3215 | can_issue_more--; | |
3216 | } | |
3217 | ||
3218 | /* Advance the DFA to the next cycle. */ | |
3219 | advance_one_cycle (); | |
3220 | } | |
3221 | return false; | |
3222 | } | |
3223 | ||
3224 | /* Checks if the given node causes resource conflicts when added to PS at | |
3225 | cycle C. If not the node is added to PS and returned; otherwise zero | |
48e1416a | 3226 | is returned. Bit N is set in MUST_PRECEDE/MUST_FOLLOW if the node with |
3227 | cuid N must be come before/after (respectively) the node pointed to by | |
f045d41d | 3228 | PS_I when scheduled in the same cycle. */ |
b6a75366 | 3229 | ps_insn_ptr |
7282ef12 | 3230 | ps_add_node_check_conflicts (partial_schedule_ptr ps, int n, |
f045d41d | 3231 | int c, sbitmap must_precede, |
3232 | sbitmap must_follow) | |
5b6269ed | 3233 | { |
3234 | int has_conflicts = 0; | |
3235 | ps_insn_ptr ps_i; | |
3236 | ||
f045d41d | 3237 | /* First add the node to the PS, if this succeeds check for |
3238 | conflicts, trying different issue slots in the same row. */ | |
3239 | if (! (ps_i = add_node_to_ps (ps, n, c, must_precede, must_follow))) | |
5b6269ed | 3240 | return NULL; /* Failed to insert the node at the given cycle. */ |
3241 | ||
3242 | has_conflicts = ps_has_conflicts (ps, c, c) | |
3243 | || (ps->history > 0 | |
3244 | && ps_has_conflicts (ps, | |
3245 | c - ps->history, | |
3246 | c + ps->history)); | |
3247 | ||
3248 | /* Try different issue slots to find one that the given node can be | |
3249 | scheduled in without conflicts. */ | |
3250 | while (has_conflicts) | |
3251 | { | |
f045d41d | 3252 | if (! ps_insn_advance_column (ps, ps_i, must_follow)) |
5b6269ed | 3253 | break; |
3254 | has_conflicts = ps_has_conflicts (ps, c, c) | |
3255 | || (ps->history > 0 | |
3256 | && ps_has_conflicts (ps, | |
3257 | c - ps->history, | |
3258 | c + ps->history)); | |
3259 | } | |
3260 | ||
3261 | if (has_conflicts) | |
3262 | { | |
3263 | remove_node_from_ps (ps, ps_i); | |
3264 | return NULL; | |
3265 | } | |
3266 | ||
3267 | ps->min_cycle = MIN (ps->min_cycle, c); | |
3268 | ps->max_cycle = MAX (ps->max_cycle, c); | |
3269 | return ps_i; | |
3270 | } | |
3271 | ||
6f7f081f | 3272 | /* Calculate the stage count of the partial schedule PS. The calculation |
a5ea7ace | 3273 | takes into account the rotation amount passed in ROTATION_AMOUNT. */ |
6f7f081f | 3274 | int |
a5ea7ace | 3275 | calculate_stage_count (partial_schedule_ptr ps, int rotation_amount) |
6f7f081f | 3276 | { |
6f7f081f | 3277 | int new_min_cycle = PS_MIN_CYCLE (ps) - rotation_amount; |
3278 | int new_max_cycle = PS_MAX_CYCLE (ps) - rotation_amount; | |
3279 | int stage_count = CALC_STAGE_COUNT (-1, new_min_cycle, ps->ii); | |
3280 | ||
3281 | /* The calculation of stage count is done adding the number of stages | |
3282 | before cycle zero and after cycle zero. */ | |
3283 | stage_count += CALC_STAGE_COUNT (new_max_cycle, 0, ps->ii); | |
3284 | ||
3285 | return stage_count; | |
3286 | } | |
3287 | ||
5b6269ed | 3288 | /* Rotate the rows of PS such that insns scheduled at time |
3289 | START_CYCLE will appear in row 0. Updates max/min_cycles. */ | |
b6a75366 | 3290 | void |
5b6269ed | 3291 | rotate_partial_schedule (partial_schedule_ptr ps, int start_cycle) |
3292 | { | |
3293 | int i, row, backward_rotates; | |
3294 | int last_row = ps->ii - 1; | |
3295 | ||
3296 | if (start_cycle == 0) | |
3297 | return; | |
3298 | ||
3299 | backward_rotates = SMODULO (start_cycle, ps->ii); | |
3300 | ||
3301 | /* Revisit later and optimize this into a single loop. */ | |
3302 | for (i = 0; i < backward_rotates; i++) | |
3303 | { | |
3304 | ps_insn_ptr first_row = ps->rows[0]; | |
4815ed0c | 3305 | int first_row_length = ps->rows_length[0]; |
5b6269ed | 3306 | |
3307 | for (row = 0; row < last_row; row++) | |
4815ed0c | 3308 | { |
3309 | ps->rows[row] = ps->rows[row + 1]; | |
3310 | ps->rows_length[row] = ps->rows_length[row + 1]; | |
3311 | } | |
5b6269ed | 3312 | |
3313 | ps->rows[last_row] = first_row; | |
4815ed0c | 3314 | ps->rows_length[last_row] = first_row_length; |
5b6269ed | 3315 | } |
3316 | ||
3317 | ps->max_cycle -= start_cycle; | |
3318 | ps->min_cycle -= start_cycle; | |
3319 | } | |
07cba988 | 3320 | |
77fce4cd | 3321 | #endif /* INSN_SCHEDULING */ |
3322 | \f | |
3323 | static bool | |
3324 | gate_handle_sms (void) | |
3325 | { | |
3326 | return (optimize > 0 && flag_modulo_sched); | |
3327 | } | |
3328 | ||
3329 | ||
3330 | /* Run instruction scheduler. */ | |
3331 | /* Perform SMS module scheduling. */ | |
2a1990e9 | 3332 | static unsigned int |
77fce4cd | 3333 | rest_of_handle_sms (void) |
3334 | { | |
3335 | #ifdef INSN_SCHEDULING | |
3336 | basic_block bb; | |
77fce4cd | 3337 | |
77fce4cd | 3338 | /* Collect loop information to be used in SMS. */ |
3072d30e | 3339 | cfg_layout_initialize (0); |
3f5be5f4 | 3340 | sms_schedule (); |
77fce4cd | 3341 | |
3342 | /* Update the life information, because we add pseudos. */ | |
3343 | max_regno = max_reg_num (); | |
77fce4cd | 3344 | |
3345 | /* Finalize layout changes. */ | |
3346 | FOR_EACH_BB (bb) | |
3347 | if (bb->next_bb != EXIT_BLOCK_PTR) | |
3348 | bb->aux = bb->next_bb; | |
77fce4cd | 3349 | free_dominance_info (CDI_DOMINATORS); |
73d0c05c | 3350 | cfg_layout_finalize (); |
77fce4cd | 3351 | #endif /* INSN_SCHEDULING */ |
2a1990e9 | 3352 | return 0; |
77fce4cd | 3353 | } |
3354 | ||
cbe8bda8 | 3355 | namespace { |
3356 | ||
3357 | const pass_data pass_data_sms = | |
3358 | { | |
3359 | RTL_PASS, /* type */ | |
3360 | "sms", /* name */ | |
3361 | OPTGROUP_NONE, /* optinfo_flags */ | |
3362 | true, /* has_gate */ | |
3363 | true, /* has_execute */ | |
3364 | TV_SMS, /* tv_id */ | |
3365 | 0, /* properties_required */ | |
3366 | 0, /* properties_provided */ | |
3367 | 0, /* properties_destroyed */ | |
3368 | 0, /* todo_flags_start */ | |
3369 | ( TODO_df_finish | TODO_verify_flow | |
3370 | | TODO_verify_rtl_sharing ), /* todo_flags_finish */ | |
77fce4cd | 3371 | }; |
cbe8bda8 | 3372 | |
3373 | class pass_sms : public rtl_opt_pass | |
3374 | { | |
3375 | public: | |
9af5ce0c | 3376 | pass_sms (gcc::context *ctxt) |
3377 | : rtl_opt_pass (pass_data_sms, ctxt) | |
cbe8bda8 | 3378 | {} |
3379 | ||
3380 | /* opt_pass methods: */ | |
3381 | bool gate () { return gate_handle_sms (); } | |
3382 | unsigned int execute () { return rest_of_handle_sms (); } | |
3383 | ||
3384 | }; // class pass_sms | |
3385 | ||
3386 | } // anon namespace | |
3387 | ||
3388 | rtl_opt_pass * | |
3389 | make_pass_sms (gcc::context *ctxt) | |
3390 | { | |
3391 | return new pass_sms (ctxt); | |
3392 | } |