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48227150 | 1 | /* Register to Stack convert for GNU compiler. |
1fb54135 | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
d9221e01 | 3 | 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. |
48227150 | 4 | |
1322177d | 5 | This file is part of GCC. |
48227150 | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it |
8 | under the terms of the GNU General Public License as published by | |
a05924f9 JH |
9 | the Free Software Foundation; either version 2, or (at your option) |
10 | any later version. | |
48227150 | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
48227150 | 16 | |
a05924f9 | 17 | You should have received a copy of the GNU General Public License |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
48227150 JVA |
21 | |
22 | /* This pass converts stack-like registers from the "flat register | |
23 | file" model that gcc uses, to a stack convention that the 387 uses. | |
24 | ||
25 | * The form of the input: | |
26 | ||
27 | On input, the function consists of insn that have had their | |
28 | registers fully allocated to a set of "virtual" registers. Note that | |
29 | the word "virtual" is used differently here than elsewhere in gcc: for | |
30 | each virtual stack reg, there is a hard reg, but the mapping between | |
31 | them is not known until this pass is run. On output, hard register | |
32 | numbers have been substituted, and various pop and exchange insns have | |
33 | been emitted. The hard register numbers and the virtual register | |
34 | numbers completely overlap - before this pass, all stack register | |
114cbee6 | 35 | numbers are virtual, and afterward they are all hard. |
48227150 JVA |
36 | |
37 | The virtual registers can be manipulated normally by gcc, and their | |
38 | semantics are the same as for normal registers. After the hard | |
39 | register numbers are substituted, the semantics of an insn containing | |
40 | stack-like regs are not the same as for an insn with normal regs: for | |
41 | instance, it is not safe to delete an insn that appears to be a no-op | |
42 | move. In general, no insn containing hard regs should be changed | |
43 | after this pass is done. | |
44 | ||
45 | * The form of the output: | |
46 | ||
47 | After this pass, hard register numbers represent the distance from | |
48 | the current top of stack to the desired register. A reference to | |
49 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
50 | represents the register just below that, and so forth. Also, REG_DEAD | |
51 | notes indicate whether or not a stack register should be popped. | |
52 | ||
53 | A "swap" insn looks like a parallel of two patterns, where each | |
54 | pattern is a SET: one sets A to B, the other B to A. | |
55 | ||
56 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
57 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
58 | will replace the existing stack top, not push a new value. | |
59 | ||
60 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
61 | SET_SRC is REG or MEM. | |
62 | ||
3f5cfed6 | 63 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
48227150 JVA |
64 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
65 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
66 | ||
67 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
68 | the top of the register stack. If there is no REG_DEAD note, then the | |
69 | insn represents a "dup" or a push of the current top of stack onto the | |
70 | stack. | |
71 | ||
72 | * Methodology: | |
73 | ||
74 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
75 | deleted and recreated from scratch. REG_DEAD is never created for a | |
76 | SET_DEST, only REG_UNUSED. | |
77 | ||
114cbee6 | 78 | * asm_operands: |
48227150 | 79 | |
114cbee6 RS |
80 | There are several rules on the usage of stack-like regs in |
81 | asm_operands insns. These rules apply only to the operands that are | |
82 | stack-like regs: | |
83 | ||
84 | 1. Given a set of input regs that die in an asm_operands, it is | |
85 | necessary to know which are implicitly popped by the asm, and | |
86 | which must be explicitly popped by gcc. | |
87 | ||
88 | An input reg that is implicitly popped by the asm must be | |
89 | explicitly clobbered, unless it is constrained to match an | |
90 | output operand. | |
91 | ||
92 | 2. For any input reg that is implicitly popped by an asm, it is | |
93 | necessary to know how to adjust the stack to compensate for the pop. | |
94 | If any non-popped input is closer to the top of the reg-stack than | |
95 | the implicitly popped reg, it would not be possible to know what the | |
96 | stack looked like - it's not clear how the rest of the stack "slides | |
97 | up". | |
98 | ||
99 | All implicitly popped input regs must be closer to the top of | |
100 | the reg-stack than any input that is not implicitly popped. | |
101 | ||
102 | 3. It is possible that if an input dies in an insn, reload might | |
103 | use the input reg for an output reload. Consider this example: | |
104 | ||
105 | asm ("foo" : "=t" (a) : "f" (b)); | |
106 | ||
107 | This asm says that input B is not popped by the asm, and that | |
108 | the asm pushes a result onto the reg-stack, ie, the stack is one | |
109 | deeper after the asm than it was before. But, it is possible that | |
110 | reload will think that it can use the same reg for both the input and | |
111 | the output, if input B dies in this insn. | |
112 | ||
113 | If any input operand uses the "f" constraint, all output reg | |
114 | constraints must use the "&" earlyclobber. | |
115 | ||
116 | The asm above would be written as | |
117 | ||
118 | asm ("foo" : "=&t" (a) : "f" (b)); | |
119 | ||
120 | 4. Some operands need to be in particular places on the stack. All | |
121 | output operands fall in this category - there is no other way to | |
122 | know which regs the outputs appear in unless the user indicates | |
123 | this in the constraints. | |
124 | ||
125 | Output operands must specifically indicate which reg an output | |
126 | appears in after an asm. "=f" is not allowed: the operand | |
127 | constraints must select a class with a single reg. | |
128 | ||
129 | 5. Output operands may not be "inserted" between existing stack regs. | |
130 | Since no 387 opcode uses a read/write operand, all output operands | |
131 | are dead before the asm_operands, and are pushed by the asm_operands. | |
132 | It makes no sense to push anywhere but the top of the reg-stack. | |
133 | ||
134 | Output operands must start at the top of the reg-stack: output | |
135 | operands may not "skip" a reg. | |
136 | ||
137 | 6. Some asm statements may need extra stack space for internal | |
138 | calculations. This can be guaranteed by clobbering stack registers | |
139 | unrelated to the inputs and outputs. | |
140 | ||
141 | Here are a couple of reasonable asms to want to write. This asm | |
142 | takes one input, which is internally popped, and produces two outputs. | |
143 | ||
144 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
145 | ||
146 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
147 | and replaces them with one output. The user must code the "st(1)" | |
148 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
149 | ||
150 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
151 | ||
a05924f9 | 152 | */ |
48227150 | 153 | \f |
48227150 | 154 | #include "config.h" |
670ee920 | 155 | #include "system.h" |
4977bab6 ZW |
156 | #include "coretypes.h" |
157 | #include "tm.h" | |
48227150 JVA |
158 | #include "tree.h" |
159 | #include "rtl.h" | |
6baf1cc8 | 160 | #include "tm_p.h" |
49ad7cfa | 161 | #include "function.h" |
114cbee6 | 162 | #include "insn-config.h" |
48227150 JVA |
163 | #include "regs.h" |
164 | #include "hard-reg-set.h" | |
165 | #include "flags.h" | |
10f0ad3d | 166 | #include "toplev.h" |
e075ae69 | 167 | #include "recog.h" |
a05924f9 JH |
168 | #include "output.h" |
169 | #include "basic-block.h" | |
21b2cd73 | 170 | #include "varray.h" |
2840aebf | 171 | #include "reload.h" |
e2500fed GK |
172 | #include "ggc.h" |
173 | ||
174 | /* We use this array to cache info about insns, because otherwise we | |
175 | spend too much time in stack_regs_mentioned_p. | |
176 | ||
177 | Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
178 | the insn uses stack registers, two indicates the insn does not use | |
179 | stack registers. */ | |
180 | static GTY(()) varray_type stack_regs_mentioned_data; | |
48227150 JVA |
181 | |
182 | #ifdef STACK_REGS | |
183 | ||
184 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
185 | ||
48227150 JVA |
186 | /* This is the basic stack record. TOP is an index into REG[] such |
187 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
188 | ||
eca31501 JVA |
189 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
190 | consists of placing each live reg in array `reg' and setting `top' | |
191 | appropriately. | |
192 | ||
193 | REG_SET indicates which registers are live. */ | |
48227150 JVA |
194 | |
195 | typedef struct stack_def | |
196 | { | |
197 | int top; /* index to top stack element */ | |
198 | HARD_REG_SET reg_set; /* set of live registers */ | |
b00b2cc2 | 199 | unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ |
48227150 JVA |
200 | } *stack; |
201 | ||
a6a2274a | 202 | /* This is used to carry information about basic blocks. It is |
a05924f9 | 203 | attached to the AUX field of the standard CFG block. */ |
48227150 | 204 | |
a05924f9 JH |
205 | typedef struct block_info_def |
206 | { | |
207 | struct stack_def stack_in; /* Input stack configuration. */ | |
0ecf09f9 | 208 | struct stack_def stack_out; /* Output stack configuration. */ |
a05924f9 JH |
209 | HARD_REG_SET out_reg_set; /* Stack regs live on output. */ |
210 | int done; /* True if block already converted. */ | |
754d9299 | 211 | int predecessors; /* Number of predecessors that needs |
0ecf09f9 | 212 | to be visited. */ |
a05924f9 | 213 | } *block_info; |
48227150 | 214 | |
a05924f9 | 215 | #define BLOCK_INFO(B) ((block_info) (B)->aux) |
48227150 | 216 | |
a05924f9 JH |
217 | /* Passed to change_stack to indicate where to emit insns. */ |
218 | enum emit_where | |
219 | { | |
220 | EMIT_AFTER, | |
221 | EMIT_BEFORE | |
222 | }; | |
48227150 | 223 | |
a05924f9 JH |
224 | /* The block we're currently working on. */ |
225 | static basic_block current_block; | |
226 | ||
3eae4643 | 227 | /* This is the register file for all register after conversion. */ |
99a59310 RK |
228 | static rtx |
229 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
230 | ||
231 | #define FP_MODE_REG(regno,mode) \ | |
f4f4d0f8 | 232 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) |
48227150 | 233 | |
a05924f9 | 234 | /* Used to initialize uninitialized registers. */ |
d2032ad8 | 235 | static rtx not_a_num; |
48227150 | 236 | |
48227150 JVA |
237 | /* Forward declarations */ |
238 | ||
0c20a65f AJ |
239 | static int stack_regs_mentioned_p (rtx pat); |
240 | static void straighten_stack (rtx, stack); | |
241 | static void pop_stack (stack, int); | |
242 | static rtx *get_true_reg (rtx *); | |
243 | ||
244 | static int check_asm_stack_operands (rtx); | |
245 | static int get_asm_operand_n_inputs (rtx); | |
246 | static rtx stack_result (tree); | |
247 | static void replace_reg (rtx *, int); | |
248 | static void remove_regno_note (rtx, enum reg_note, unsigned int); | |
249 | static int get_hard_regnum (stack, rtx); | |
250 | static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); | |
251 | static void emit_swap_insn (rtx, stack, rtx); | |
f964bd29 | 252 | static void swap_to_top(rtx, stack, rtx, rtx); |
ecb63641 | 253 | static bool move_for_stack_reg (rtx, stack, rtx); |
0c20a65f AJ |
254 | static int swap_rtx_condition_1 (rtx); |
255 | static int swap_rtx_condition (rtx); | |
256 | static void compare_for_stack_reg (rtx, stack, rtx); | |
ecb63641 | 257 | static bool subst_stack_regs_pat (rtx, stack, rtx); |
0c20a65f | 258 | static void subst_asm_stack_regs (rtx, stack); |
ecb63641 | 259 | static bool subst_stack_regs (rtx, stack); |
0c20a65f AJ |
260 | static void change_stack (rtx, stack, stack, enum emit_where); |
261 | static int convert_regs_entry (void); | |
262 | static void convert_regs_exit (void); | |
263 | static int convert_regs_1 (FILE *, basic_block); | |
264 | static int convert_regs_2 (FILE *, basic_block); | |
265 | static int convert_regs (FILE *); | |
266 | static void print_stack (FILE *, stack); | |
267 | static rtx next_flags_user (rtx); | |
268 | static void record_label_references (rtx, rtx); | |
269 | static bool compensate_edge (edge, FILE *); | |
21b2cd73 | 270 | \f |
40f03658 | 271 | /* Return nonzero if any stack register is mentioned somewhere within PAT. */ |
21b2cd73 JH |
272 | |
273 | static int | |
0c20a65f | 274 | stack_regs_mentioned_p (rtx pat) |
21b2cd73 | 275 | { |
b3694847 SS |
276 | const char *fmt; |
277 | int i; | |
e075ae69 RH |
278 | |
279 | if (STACK_REG_P (pat)) | |
280 | return 1; | |
281 | ||
282 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
283 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
21b2cd73 | 284 | { |
e075ae69 RH |
285 | if (fmt[i] == 'E') |
286 | { | |
b3694847 | 287 | int j; |
e075ae69 RH |
288 | |
289 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
290 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
291 | return 1; | |
292 | } | |
293 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
294 | return 1; | |
21b2cd73 | 295 | } |
e075ae69 | 296 | |
21b2cd73 JH |
297 | return 0; |
298 | } | |
299 | ||
e075ae69 | 300 | /* Return nonzero if INSN mentions stacked registers, else return zero. */ |
21b2cd73 JH |
301 | |
302 | int | |
0c20a65f | 303 | stack_regs_mentioned (rtx insn) |
21b2cd73 | 304 | { |
e075ae69 RH |
305 | unsigned int uid, max; |
306 | int test; | |
307 | ||
4793dca1 | 308 | if (! INSN_P (insn) || !stack_regs_mentioned_data) |
21b2cd73 | 309 | return 0; |
e075ae69 | 310 | |
21b2cd73 | 311 | uid = INSN_UID (insn); |
e075ae69 RH |
312 | max = VARRAY_SIZE (stack_regs_mentioned_data); |
313 | if (uid >= max) | |
314 | { | |
315 | /* Allocate some extra size to avoid too many reallocs, but | |
316 | do not grow too quickly. */ | |
317 | max = uid + uid / 20; | |
318 | VARRAY_GROW (stack_regs_mentioned_data, max); | |
319 | } | |
320 | ||
321 | test = VARRAY_CHAR (stack_regs_mentioned_data, uid); | |
322 | if (test == 0) | |
323 | { | |
324 | /* This insn has yet to be examined. Do so now. */ | |
325 | test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
326 | VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; | |
327 | } | |
328 | ||
329 | return test == 1; | |
21b2cd73 | 330 | } |
e075ae69 RH |
331 | \f |
332 | static rtx ix86_flags_rtx; | |
21b2cd73 | 333 | |
e075ae69 | 334 | static rtx |
0c20a65f | 335 | next_flags_user (rtx insn) |
e075ae69 | 336 | { |
a6a2274a | 337 | /* Search forward looking for the first use of this value. |
e075ae69 | 338 | Stop at block boundaries. */ |
e075ae69 | 339 | |
a813c111 | 340 | while (insn != BB_END (current_block)) |
e075ae69 RH |
341 | { |
342 | insn = NEXT_INSN (insn); | |
e075ae69 | 343 | |
2c3c49de | 344 | if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) |
a6a2274a | 345 | return insn; |
e075ae69 | 346 | |
4b4bf941 | 347 | if (CALL_P (insn)) |
e075ae69 RH |
348 | return NULL_RTX; |
349 | } | |
0eac0e81 | 350 | return NULL_RTX; |
e075ae69 | 351 | } |
48227150 | 352 | \f |
05713b80 | 353 | /* Reorganize the stack into ascending numbers, |
99a59310 RK |
354 | after this insn. */ |
355 | ||
356 | static void | |
0c20a65f | 357 | straighten_stack (rtx insn, stack regstack) |
99a59310 RK |
358 | { |
359 | struct stack_def temp_stack; | |
360 | int top; | |
361 | ||
8feb7351 JL |
362 | /* If there is only a single register on the stack, then the stack is |
363 | already in increasing order and no reorganization is needed. | |
364 | ||
365 | Similarly if the stack is empty. */ | |
366 | if (regstack->top <= 0) | |
367 | return; | |
368 | ||
d25cf633 | 369 | COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); |
99a59310 RK |
370 | |
371 | for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
e075ae69 | 372 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; |
a6a2274a | 373 | |
a05924f9 | 374 | change_stack (insn, regstack, &temp_stack, EMIT_AFTER); |
99a59310 | 375 | } |
7aa74e4c | 376 | |
3eae4643 | 377 | /* Pop a register from the stack. */ |
7aa74e4c SC |
378 | |
379 | static void | |
0c20a65f | 380 | pop_stack (stack regstack, int regno) |
7aa74e4c SC |
381 | { |
382 | int top = regstack->top; | |
383 | ||
384 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
385 | regstack->top--; | |
3eae4643 | 386 | /* If regno was not at the top of stack then adjust stack. */ |
7aa74e4c SC |
387 | if (regstack->reg [top] != regno) |
388 | { | |
389 | int i; | |
390 | for (i = regstack->top; i >= 0; i--) | |
391 | if (regstack->reg [i] == regno) | |
392 | { | |
393 | int j; | |
394 | for (j = i; j < top; j++) | |
395 | regstack->reg [j] = regstack->reg [j + 1]; | |
396 | break; | |
397 | } | |
398 | } | |
399 | } | |
99a59310 | 400 | \f |
48227150 | 401 | /* Convert register usage from "flat" register file usage to a "stack |
827c06b6 | 402 | register file. FILE is the dump file, if used. |
48227150 | 403 | |
e218fc41 | 404 | Construct a CFG and run life analysis. Then convert each insn one |
0045d504 | 405 | by one. Run a last cleanup_cfg pass, if optimizing, to eliminate |
a05924f9 JH |
406 | code duplication created when the converter inserts pop insns on |
407 | the edges. */ | |
48227150 | 408 | |
b9422b69 | 409 | bool |
827c06b6 | 410 | reg_to_stack (FILE *file) |
48227150 | 411 | { |
e0082a72 | 412 | basic_block bb; |
0b17ab2f RH |
413 | int i; |
414 | int max_uid; | |
a05924f9 | 415 | |
4793dca1 | 416 | /* Clean up previous run. */ |
e2500fed | 417 | stack_regs_mentioned_data = 0; |
4793dca1 | 418 | |
a05924f9 JH |
419 | /* See if there is something to do. Flow analysis is quite |
420 | expensive so we might save some compilation time. */ | |
421 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
422 | if (regs_ever_live[i]) | |
423 | break; | |
424 | if (i > LAST_STACK_REG) | |
b9422b69 | 425 | return false; |
99a59310 | 426 | |
a6a2274a | 427 | /* Ok, floating point instructions exist. If not optimizing, |
0c20a65f | 428 | build the CFG and run life analysis. |
b9422b69 JH |
429 | Also need to rebuild life when superblock scheduling is done |
430 | as it don't update liveness yet. */ | |
431 | if (!optimize | |
432 | || (flag_sched2_use_superblocks | |
433 | && flag_schedule_insns_after_reload)) | |
73991d6a | 434 | { |
73991d6a | 435 | count_or_remove_death_notes (NULL, 1); |
827c06b6 | 436 | life_analysis (file, PROP_DEATH_NOTES); |
73991d6a | 437 | } |
0ecf09f9 | 438 | mark_dfs_back_edges (); |
48227150 | 439 | |
a05924f9 | 440 | /* Set up block info for each basic block. */ |
ca6c03ca | 441 | alloc_aux_for_blocks (sizeof (struct block_info_def)); |
e0082a72 | 442 | FOR_EACH_BB_REVERSE (bb) |
0ecf09f9 JH |
443 | { |
444 | edge e; | |
6a87d634 | 445 | for (e = bb->pred; e; e = e->pred_next) |
0ecf09f9 JH |
446 | if (!(e->flags & EDGE_DFS_BACK) |
447 | && e->src != ENTRY_BLOCK_PTR) | |
754d9299 | 448 | BLOCK_INFO (bb)->predecessors++; |
0ecf09f9 | 449 | } |
48227150 | 450 | |
a05924f9 JH |
451 | /* Create the replacement registers up front. */ |
452 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
21b2cd73 | 453 | { |
a05924f9 JH |
454 | enum machine_mode mode; |
455 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); | |
456 | mode != VOIDmode; | |
457 | mode = GET_MODE_WIDER_MODE (mode)) | |
458 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
459 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); | |
460 | mode != VOIDmode; | |
461 | mode = GET_MODE_WIDER_MODE (mode)) | |
462 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
21b2cd73 | 463 | } |
48227150 | 464 | |
a05924f9 | 465 | ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); |
48227150 | 466 | |
a6a2274a | 467 | /* A QNaN for initializing uninitialized variables. |
48227150 | 468 | |
a05924f9 | 469 | ??? We can't load from constant memory in PIC mode, because |
d55d8fc7 | 470 | we're inserting these instructions before the prologue and |
a05924f9 JH |
471 | the PIC register hasn't been set up. In that case, fall back |
472 | on zero, which we can get from `ldz'. */ | |
48227150 | 473 | |
a05924f9 | 474 | if (flag_pic) |
d2032ad8 | 475 | not_a_num = CONST0_RTX (SFmode); |
a05924f9 JH |
476 | else |
477 | { | |
d2032ad8 AP |
478 | not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); |
479 | not_a_num = force_const_mem (SFmode, not_a_num); | |
a05924f9 | 480 | } |
48227150 | 481 | |
a05924f9 JH |
482 | /* Allocate a cache for stack_regs_mentioned. */ |
483 | max_uid = get_max_uid (); | |
484 | VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, | |
485 | "stack_regs_mentioned cache"); | |
48227150 | 486 | |
4793dca1 | 487 | convert_regs (file); |
21b2cd73 | 488 | |
ca6c03ca | 489 | free_aux_for_blocks (); |
b9422b69 | 490 | return true; |
48227150 JVA |
491 | } |
492 | \f | |
493 | /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the | |
494 | label's chain of references, and note which insn contains each | |
0f41302f | 495 | reference. */ |
48227150 JVA |
496 | |
497 | static void | |
0c20a65f | 498 | record_label_references (rtx insn, rtx pat) |
48227150 | 499 | { |
b3694847 SS |
500 | enum rtx_code code = GET_CODE (pat); |
501 | int i; | |
502 | const char *fmt; | |
48227150 JVA |
503 | |
504 | if (code == LABEL_REF) | |
505 | { | |
b3694847 SS |
506 | rtx label = XEXP (pat, 0); |
507 | rtx ref; | |
48227150 | 508 | |
4b4bf941 | 509 | if (!LABEL_P (label)) |
48227150 JVA |
510 | abort (); |
511 | ||
0f41302f MS |
512 | /* If this is an undefined label, LABEL_REFS (label) contains |
513 | garbage. */ | |
13684373 RK |
514 | if (INSN_UID (label) == 0) |
515 | return; | |
516 | ||
0f41302f | 517 | /* Don't make a duplicate in the code_label's chain. */ |
48227150 | 518 | |
9f5cad05 JVA |
519 | for (ref = LABEL_REFS (label); |
520 | ref && ref != label; | |
521 | ref = LABEL_NEXTREF (ref)) | |
48227150 JVA |
522 | if (CONTAINING_INSN (ref) == insn) |
523 | return; | |
524 | ||
525 | CONTAINING_INSN (pat) = insn; | |
526 | LABEL_NEXTREF (pat) = LABEL_REFS (label); | |
527 | LABEL_REFS (label) = pat; | |
528 | ||
529 | return; | |
530 | } | |
531 | ||
532 | fmt = GET_RTX_FORMAT (code); | |
533 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
534 | { | |
535 | if (fmt[i] == 'e') | |
536 | record_label_references (insn, XEXP (pat, i)); | |
537 | if (fmt[i] == 'E') | |
538 | { | |
b3694847 | 539 | int j; |
48227150 JVA |
540 | for (j = 0; j < XVECLEN (pat, i); j++) |
541 | record_label_references (insn, XVECEXP (pat, i, j)); | |
542 | } | |
543 | } | |
544 | } | |
545 | \f | |
546 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
547 | REG, possible enclosed by a conversion rtx, return the inner part of | |
0f41302f | 548 | PAT that stopped the search. */ |
48227150 JVA |
549 | |
550 | static rtx * | |
0c20a65f | 551 | get_true_reg (rtx *pat) |
48227150 | 552 | { |
99a59310 | 553 | for (;;) |
e075ae69 | 554 | switch (GET_CODE (*pat)) |
99a59310 | 555 | { |
e075ae69 | 556 | case SUBREG: |
8d9afc4e | 557 | /* Eliminate FP subregister accesses in favor of the |
e075ae69 RH |
558 | actual FP register in use. */ |
559 | { | |
560 | rtx subreg; | |
561 | if (FP_REG_P (subreg = SUBREG_REG (*pat))) | |
99a59310 | 562 | { |
ddef6bc7 JJ |
563 | int regno_off = subreg_regno_offset (REGNO (subreg), |
564 | GET_MODE (subreg), | |
565 | SUBREG_BYTE (*pat), | |
566 | GET_MODE (*pat)); | |
567 | *pat = FP_MODE_REG (REGNO (subreg) + regno_off, | |
99a59310 | 568 | GET_MODE (subreg)); |
e075ae69 | 569 | default: |
99a59310 RK |
570 | return pat; |
571 | } | |
e075ae69 RH |
572 | } |
573 | case FLOAT: | |
574 | case FIX: | |
575 | case FLOAT_EXTEND: | |
576 | pat = & XEXP (*pat, 0); | |
0c5faf29 RS |
577 | break; |
578 | ||
579 | case FLOAT_TRUNCATE: | |
580 | if (!flag_unsafe_math_optimizations) | |
581 | return pat; | |
582 | pat = & XEXP (*pat, 0); | |
583 | break; | |
99a59310 | 584 | } |
48227150 | 585 | } |
48227150 | 586 | \f |
d6fc0492 RH |
587 | /* Set if we find any malformed asms in a block. */ |
588 | static bool any_malformed_asm; | |
589 | ||
a05924f9 | 590 | /* There are many rules that an asm statement for stack-like regs must |
114cbee6 | 591 | follow. Those rules are explained at the top of this file: the rule |
0f41302f | 592 | numbers below refer to that explanation. */ |
114cbee6 | 593 | |
a05924f9 | 594 | static int |
0c20a65f | 595 | check_asm_stack_operands (rtx insn) |
114cbee6 RS |
596 | { |
597 | int i; | |
114cbee6 RS |
598 | int n_clobbers; |
599 | int malformed_asm = 0; | |
600 | rtx body = PATTERN (insn); | |
601 | ||
a05924f9 JH |
602 | char reg_used_as_output[FIRST_PSEUDO_REGISTER]; |
603 | char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
f62a15e3 | 604 | int alt; |
114cbee6 | 605 | |
a544cfd2 | 606 | rtx *clobber_reg = 0; |
f62a15e3 | 607 | int n_inputs, n_outputs; |
114cbee6 | 608 | |
0e7d0eb9 | 609 | /* Find out what the constraints require. If no constraint |
854dfdff | 610 | alternative matches, this asm is malformed. */ |
f62a15e3 BS |
611 | extract_insn (insn); |
612 | constrain_operands (1); | |
613 | alt = which_alternative; | |
614 | ||
615 | preprocess_constraints (); | |
616 | ||
617 | n_inputs = get_asm_operand_n_inputs (body); | |
1ccbefce | 618 | n_outputs = recog_data.n_operands - n_inputs; |
f62a15e3 BS |
619 | |
620 | if (alt < 0) | |
621 | { | |
622 | malformed_asm = 1; | |
623 | /* Avoid further trouble with this insn. */ | |
624 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
a05924f9 | 625 | return 0; |
f62a15e3 | 626 | } |
114cbee6 | 627 | |
0f41302f | 628 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
629 | for (i = 0; i < recog_data.n_operands; i++) |
630 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
f8cfc6aa | 631 | && REG_P (SUBREG_REG (recog_data.operand[i]))) |
1ccbefce | 632 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); |
114cbee6 RS |
633 | |
634 | /* Set up CLOBBER_REG. */ | |
635 | ||
636 | n_clobbers = 0; | |
114cbee6 RS |
637 | |
638 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 639 | { |
703ad42b | 640 | clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); |
114cbee6 | 641 | |
3f5cfed6 JVA |
642 | for (i = 0; i < XVECLEN (body, 0); i++) |
643 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
644 | { | |
645 | rtx clobber = XVECEXP (body, 0, i); | |
646 | rtx reg = XEXP (clobber, 0); | |
114cbee6 | 647 | |
f8cfc6aa | 648 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
3f5cfed6 JVA |
649 | reg = SUBREG_REG (reg); |
650 | ||
651 | if (STACK_REG_P (reg)) | |
652 | { | |
653 | clobber_reg[n_clobbers] = reg; | |
654 | n_clobbers++; | |
655 | } | |
656 | } | |
657 | } | |
114cbee6 RS |
658 | |
659 | /* Enforce rule #4: Output operands must specifically indicate which | |
660 | reg an output appears in after an asm. "=f" is not allowed: the | |
661 | operand constraints must select a class with a single reg. | |
662 | ||
663 | Also enforce rule #5: Output operands must start at the top of | |
0f41302f | 664 | the reg-stack: output operands may not "skip" a reg. */ |
114cbee6 | 665 | |
a05924f9 | 666 | memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); |
114cbee6 | 667 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 668 | if (STACK_REG_P (recog_data.operand[i])) |
9c318306 | 669 | { |
f62a15e3 | 670 | if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) |
9c318306 | 671 | { |
1f978f5f | 672 | error_for_asm (insn, "output constraint %d must specify a single register", i); |
9c318306 MH |
673 | malformed_asm = 1; |
674 | } | |
a6a2274a | 675 | else |
d40cd80a JJ |
676 | { |
677 | int j; | |
678 | ||
679 | for (j = 0; j < n_clobbers; j++) | |
680 | if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) | |
681 | { | |
1f978f5f | 682 | error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", |
d40cd80a JJ |
683 | i, reg_names [REGNO (clobber_reg[j])]); |
684 | malformed_asm = 1; | |
685 | break; | |
686 | } | |
687 | if (j == n_clobbers) | |
688 | reg_used_as_output[REGNO (recog_data.operand[i])] = 1; | |
689 | } | |
9c318306 | 690 | } |
114cbee6 RS |
691 | |
692 | ||
693 | /* Search for first non-popped reg. */ | |
694 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
695 | if (! reg_used_as_output[i]) | |
696 | break; | |
697 | ||
698 | /* If there are any other popped regs, that's an error. */ | |
699 | for (; i < LAST_STACK_REG + 1; i++) | |
700 | if (reg_used_as_output[i]) | |
701 | break; | |
702 | ||
703 | if (i != LAST_STACK_REG + 1) | |
704 | { | |
1f978f5f | 705 | error_for_asm (insn, "output regs must be grouped at top of stack"); |
114cbee6 RS |
706 | malformed_asm = 1; |
707 | } | |
708 | ||
709 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
710 | to the top of the reg-stack than any input that is not implicitly | |
0f41302f | 711 | popped. */ |
114cbee6 | 712 | |
a05924f9 | 713 | memset (implicitly_dies, 0, sizeof (implicitly_dies)); |
f62a15e3 | 714 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 715 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
716 | { |
717 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 718 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
719 | int j; |
720 | ||
721 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 722 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
723 | break; |
724 | ||
f62a15e3 | 725 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
1ccbefce | 726 | implicitly_dies[REGNO (recog_data.operand[i])] = 1; |
114cbee6 RS |
727 | } |
728 | ||
729 | /* Search for first non-popped reg. */ | |
730 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
731 | if (! implicitly_dies[i]) | |
732 | break; | |
733 | ||
734 | /* If there are any other popped regs, that's an error. */ | |
735 | for (; i < LAST_STACK_REG + 1; i++) | |
736 | if (implicitly_dies[i]) | |
737 | break; | |
738 | ||
739 | if (i != LAST_STACK_REG + 1) | |
740 | { | |
741 | error_for_asm (insn, | |
1f978f5f | 742 | "implicitly popped regs must be grouped at top of stack"); |
114cbee6 RS |
743 | malformed_asm = 1; |
744 | } | |
745 | ||
06d42c22 | 746 | /* Enforce rule #3: If any input operand uses the "f" constraint, all |
114cbee6 RS |
747 | output constraints must use the "&" earlyclobber. |
748 | ||
a05924f9 | 749 | ??? Detect this more deterministically by having constrain_asm_operands |
0f41302f | 750 | record any earlyclobber. */ |
114cbee6 | 751 | |
f62a15e3 BS |
752 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
753 | if (recog_op_alt[i][alt].matches == -1) | |
114cbee6 RS |
754 | { |
755 | int j; | |
756 | ||
757 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 758 | if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) |
114cbee6 RS |
759 | { |
760 | error_for_asm (insn, | |
1f978f5f | 761 | "output operand %d must use `&' constraint", j); |
114cbee6 RS |
762 | malformed_asm = 1; |
763 | } | |
764 | } | |
765 | ||
766 | if (malformed_asm) | |
767 | { | |
768 | /* Avoid further trouble with this insn. */ | |
38a448ca | 769 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); |
d6fc0492 | 770 | any_malformed_asm = true; |
a05924f9 | 771 | return 0; |
0e7d0eb9 | 772 | } |
48227150 | 773 | |
a05924f9 | 774 | return 1; |
48227150 JVA |
775 | } |
776 | \f | |
114cbee6 RS |
777 | /* Calculate the number of inputs and outputs in BODY, an |
778 | asm_operands. N_OPERANDS is the total number of operands, and | |
779 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
0f41302f | 780 | placed. */ |
114cbee6 | 781 | |
f62a15e3 | 782 | static int |
0c20a65f | 783 | get_asm_operand_n_inputs (rtx body) |
114cbee6 RS |
784 | { |
785 | if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) | |
f62a15e3 | 786 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); |
114cbee6 RS |
787 | |
788 | else if (GET_CODE (body) == ASM_OPERANDS) | |
f62a15e3 | 789 | return ASM_OPERANDS_INPUT_LENGTH (body); |
114cbee6 RS |
790 | |
791 | else if (GET_CODE (body) == PARALLEL | |
792 | && GET_CODE (XVECEXP (body, 0, 0)) == SET) | |
f62a15e3 | 793 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); |
114cbee6 RS |
794 | |
795 | else if (GET_CODE (body) == PARALLEL | |
796 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) | |
f62a15e3 | 797 | return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); |
114cbee6 | 798 | |
f62a15e3 | 799 | abort (); |
114cbee6 | 800 | } |
0ab759e4 | 801 | |
96237362 | 802 | /* If current function returns its result in an fp stack register, |
9f9ed50a | 803 | return the REG. Otherwise, return 0. */ |
96237362 | 804 | |
99a59310 | 805 | static rtx |
0c20a65f | 806 | stack_result (tree decl) |
96237362 | 807 | { |
f099b1c9 | 808 | rtx result; |
96237362 | 809 | |
f099b1c9 JL |
810 | /* If the value is supposed to be returned in memory, then clearly |
811 | it is not returned in a stack register. */ | |
61f71b34 | 812 | if (aggregate_value_p (DECL_RESULT (decl), decl)) |
f099b1c9 JL |
813 | return 0; |
814 | ||
19e7881c | 815 | result = DECL_RTL_IF_SET (DECL_RESULT (decl)); |
9cf218a3 | 816 | if (result != 0) |
96237362 RS |
817 | { |
818 | #ifdef FUNCTION_OUTGOING_VALUE | |
819 | result | |
a6a2274a | 820 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); |
96237362 RS |
821 | #else |
822 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
823 | #endif | |
824 | } | |
825 | ||
9f9ed50a | 826 | return result != 0 && STACK_REG_P (result) ? result : 0; |
96237362 | 827 | } |
48227150 | 828 | \f |
48227150 | 829 | |
e075ae69 RH |
830 | /* |
831 | * This section deals with stack register substitution, and forms the second | |
832 | * pass over the RTL. | |
833 | */ | |
48227150 JVA |
834 | |
835 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
0f41302f | 836 | the desired hard REGNO. */ |
48227150 JVA |
837 | |
838 | static void | |
0c20a65f | 839 | replace_reg (rtx *reg, int regno) |
48227150 JVA |
840 | { |
841 | if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG | |
842 | || ! STACK_REG_P (*reg)) | |
843 | abort (); | |
844 | ||
99a59310 | 845 | switch (GET_MODE_CLASS (GET_MODE (*reg))) |
e075ae69 RH |
846 | { |
847 | default: abort (); | |
848 | case MODE_FLOAT: | |
849 | case MODE_COMPLEX_FLOAT:; | |
850 | } | |
7d0e3dd4 | 851 | |
99a59310 | 852 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
48227150 JVA |
853 | } |
854 | ||
855 | /* Remove a note of type NOTE, which must be found, for register | |
0f41302f | 856 | number REGNO from INSN. Remove only one such note. */ |
48227150 JVA |
857 | |
858 | static void | |
0c20a65f | 859 | remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) |
48227150 | 860 | { |
b3694847 | 861 | rtx *note_link, this; |
48227150 | 862 | |
8e2e89f7 | 863 | note_link = ®_NOTES (insn); |
48227150 JVA |
864 | for (this = *note_link; this; this = XEXP (this, 1)) |
865 | if (REG_NOTE_KIND (this) == note | |
866 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) | |
867 | { | |
868 | *note_link = XEXP (this, 1); | |
869 | return; | |
870 | } | |
871 | else | |
872 | note_link = &XEXP (this, 1); | |
873 | ||
874 | abort (); | |
875 | } | |
876 | ||
877 | /* Find the hard register number of virtual register REG in REGSTACK. | |
878 | The hard register number is relative to the top of the stack. -1 is | |
0f41302f | 879 | returned if the register is not found. */ |
48227150 JVA |
880 | |
881 | static int | |
0c20a65f | 882 | get_hard_regnum (stack regstack, rtx reg) |
48227150 JVA |
883 | { |
884 | int i; | |
885 | ||
886 | if (! STACK_REG_P (reg)) | |
887 | abort (); | |
888 | ||
889 | for (i = regstack->top; i >= 0; i--) | |
890 | if (regstack->reg[i] == REGNO (reg)) | |
891 | break; | |
892 | ||
893 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
894 | } | |
48227150 JVA |
895 | \f |
896 | /* Emit an insn to pop virtual register REG before or after INSN. | |
897 | REGSTACK is the stack state after INSN and is updated to reflect this | |
e075ae69 RH |
898 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn |
899 | is represented as a SET whose destination is the register to be popped | |
900 | and source is the top of stack. A death note for the top of stack | |
0f41302f | 901 | cases the movdf pattern to pop. */ |
48227150 JVA |
902 | |
903 | static rtx | |
0c20a65f | 904 | emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) |
48227150 JVA |
905 | { |
906 | rtx pop_insn, pop_rtx; | |
907 | int hard_regno; | |
908 | ||
037f20f1 JH |
909 | /* For complex types take care to pop both halves. These may survive in |
910 | CLOBBER and USE expressions. */ | |
911 | if (COMPLEX_MODE_P (GET_MODE (reg))) | |
912 | { | |
913 | rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); | |
914 | rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); | |
915 | ||
916 | pop_insn = NULL_RTX; | |
917 | if (get_hard_regnum (regstack, reg1) >= 0) | |
a6a2274a | 918 | pop_insn = emit_pop_insn (insn, regstack, reg1, where); |
037f20f1 | 919 | if (get_hard_regnum (regstack, reg2) >= 0) |
a6a2274a | 920 | pop_insn = emit_pop_insn (insn, regstack, reg2, where); |
037f20f1 JH |
921 | if (!pop_insn) |
922 | abort (); | |
923 | return pop_insn; | |
924 | } | |
925 | ||
48227150 JVA |
926 | hard_regno = get_hard_regnum (regstack, reg); |
927 | ||
928 | if (hard_regno < FIRST_STACK_REG) | |
929 | abort (); | |
930 | ||
e075ae69 RH |
931 | pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), |
932 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
48227150 | 933 | |
a05924f9 | 934 | if (where == EMIT_AFTER) |
3c030e88 | 935 | pop_insn = emit_insn_after (pop_rtx, insn); |
a05924f9 | 936 | else |
3c030e88 | 937 | pop_insn = emit_insn_before (pop_rtx, insn); |
48227150 | 938 | |
c5c76735 JL |
939 | REG_NOTES (pop_insn) |
940 | = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), | |
941 | REG_NOTES (pop_insn)); | |
48227150 JVA |
942 | |
943 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
944 | = regstack->reg[regstack->top]; | |
945 | regstack->top -= 1; | |
946 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
947 | ||
948 | return pop_insn; | |
949 | } | |
950 | \f | |
a05924f9 JH |
951 | /* Emit an insn before or after INSN to swap virtual register REG with |
952 | the top of stack. REGSTACK is the stack state before the swap, and | |
953 | is updated to reflect the swap. A swap insn is represented as a | |
954 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
48227150 | 955 | |
0f41302f | 956 | If REG is already at the top of the stack, no insn is emitted. */ |
48227150 JVA |
957 | |
958 | static void | |
0c20a65f | 959 | emit_swap_insn (rtx insn, stack regstack, rtx reg) |
48227150 | 960 | { |
eca31501 | 961 | int hard_regno; |
a05924f9 | 962 | rtx swap_rtx; |
eca31501 JVA |
963 | int tmp, other_reg; /* swap regno temps */ |
964 | rtx i1; /* the stack-reg insn prior to INSN */ | |
965 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
48227150 | 966 | |
eca31501 JVA |
967 | hard_regno = get_hard_regnum (regstack, reg); |
968 | ||
969 | if (hard_regno < FIRST_STACK_REG) | |
970 | abort (); | |
48227150 JVA |
971 | if (hard_regno == FIRST_STACK_REG) |
972 | return; | |
973 | ||
eca31501 | 974 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
48227150 | 975 | |
eca31501 JVA |
976 | tmp = regstack->reg[other_reg]; |
977 | regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
48227150 | 978 | regstack->reg[regstack->top] = tmp; |
48227150 | 979 | |
a05924f9 JH |
980 | /* Find the previous insn involving stack regs, but don't pass a |
981 | block boundary. */ | |
982 | i1 = NULL; | |
a813c111 | 983 | if (current_block && insn != BB_HEAD (current_block)) |
eca31501 | 984 | { |
a05924f9 | 985 | rtx tmp = PREV_INSN (insn); |
a813c111 | 986 | rtx limit = PREV_INSN (BB_HEAD (current_block)); |
3a6cc978 | 987 | while (tmp != limit) |
a05924f9 | 988 | { |
4b4bf941 JQ |
989 | if (LABEL_P (tmp) |
990 | || CALL_P (tmp) | |
589ca5cb | 991 | || NOTE_INSN_BASIC_BLOCK_P (tmp) |
4b4bf941 | 992 | || (NONJUMP_INSN_P (tmp) |
a05924f9 JH |
993 | && stack_regs_mentioned (tmp))) |
994 | { | |
995 | i1 = tmp; | |
996 | break; | |
997 | } | |
998 | tmp = PREV_INSN (tmp); | |
999 | } | |
1000 | } | |
1001 | ||
1002 | if (i1 != NULL_RTX | |
1003 | && (i1set = single_set (i1)) != NULL_RTX) | |
1004 | { | |
1005 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
eca31501 | 1006 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); |
48227150 | 1007 | |
eca31501 | 1008 | /* If the previous register stack push was from the reg we are to |
0f41302f | 1009 | swap with, omit the swap. */ |
eca31501 | 1010 | |
f8cfc6aa JQ |
1011 | if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG |
1012 | && REG_P (i1src) | |
ae0ed63a | 1013 | && REGNO (i1src) == (unsigned) hard_regno - 1 |
eca31501 JVA |
1014 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
1015 | return; | |
1016 | ||
1017 | /* If the previous insn wrote to the reg we are to swap with, | |
1018 | omit the swap. */ | |
1019 | ||
f8cfc6aa JQ |
1020 | if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno |
1021 | && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG | |
eca31501 JVA |
1022 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
1023 | return; | |
1024 | } | |
1025 | ||
e075ae69 RH |
1026 | swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), |
1027 | FP_MODE_REG (FIRST_STACK_REG, XFmode)); | |
a05924f9 JH |
1028 | |
1029 | if (i1) | |
3c030e88 | 1030 | emit_insn_after (swap_rtx, i1); |
a05924f9 | 1031 | else if (current_block) |
a813c111 | 1032 | emit_insn_before (swap_rtx, BB_HEAD (current_block)); |
a05924f9 JH |
1033 | else |
1034 | emit_insn_before (swap_rtx, insn); | |
48227150 JVA |
1035 | } |
1036 | \f | |
f964bd29 UB |
1037 | /* Emit an insns before INSN to swap virtual register SRC1 with |
1038 | the top of stack and virtual register SRC2 with second stack | |
1039 | slot. REGSTACK is the stack state before the swaps, and | |
1040 | is updated to reflect the swaps. A swap insn is represented as a | |
1041 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
1042 | ||
1043 | If SRC1 and/or SRC2 are already at the right place, no swap insn | |
1044 | is emitted. */ | |
1045 | ||
1046 | static void | |
1047 | swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) | |
1048 | { | |
1049 | struct stack_def temp_stack; | |
1050 | int regno, j, k, temp; | |
1051 | ||
1052 | temp_stack = *regstack; | |
1053 | ||
1054 | /* Place operand 1 at the top of stack. */ | |
1055 | regno = get_hard_regnum (&temp_stack, src1); | |
1056 | if (regno < 0) | |
1057 | abort (); | |
1058 | if (regno != FIRST_STACK_REG) | |
1059 | { | |
1060 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
1061 | j = temp_stack.top; | |
1062 | ||
1063 | temp = temp_stack.reg[k]; | |
1064 | temp_stack.reg[k] = temp_stack.reg[j]; | |
1065 | temp_stack.reg[j] = temp; | |
1066 | } | |
1067 | ||
1068 | /* Place operand 2 next on the stack. */ | |
1069 | regno = get_hard_regnum (&temp_stack, src2); | |
1070 | if (regno < 0) | |
1071 | abort (); | |
1072 | if (regno != FIRST_STACK_REG + 1) | |
1073 | { | |
1074 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
1075 | j = temp_stack.top - 1; | |
1076 | ||
1077 | temp = temp_stack.reg[k]; | |
1078 | temp_stack.reg[k] = temp_stack.reg[j]; | |
1079 | temp_stack.reg[j] = temp; | |
1080 | } | |
1081 | ||
1082 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
1083 | } | |
1084 | \f | |
48227150 | 1085 | /* Handle a move to or from a stack register in PAT, which is in INSN. |
ecb63641 EB |
1086 | REGSTACK is the current stack. Return whether a control flow insn |
1087 | was deleted in the process. */ | |
48227150 | 1088 | |
ecb63641 | 1089 | static bool |
0c20a65f | 1090 | move_for_stack_reg (rtx insn, stack regstack, rtx pat) |
48227150 | 1091 | { |
99a59310 RK |
1092 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
1093 | rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
1094 | rtx src, dest; | |
48227150 | 1095 | rtx note; |
ecb63641 | 1096 | bool control_flow_insn_deleted = false; |
48227150 | 1097 | |
99a59310 RK |
1098 | src = *psrc; dest = *pdest; |
1099 | ||
1100 | if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
48227150 JVA |
1101 | { |
1102 | /* Write from one stack reg to another. If SRC dies here, then | |
0f41302f | 1103 | just change the register mapping and delete the insn. */ |
48227150 | 1104 | |
99a59310 | 1105 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1106 | if (note) |
1107 | { | |
1108 | int i; | |
1109 | ||
0f41302f | 1110 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
99a59310 | 1111 | if (REGNO (src) == REGNO (dest)) |
48227150 JVA |
1112 | abort (); |
1113 | ||
1114 | for (i = regstack->top; i >= 0; i--) | |
99a59310 | 1115 | if (regstack->reg[i] == REGNO (src)) |
48227150 JVA |
1116 | break; |
1117 | ||
0f41302f | 1118 | /* The source must be live, and the dest must be dead. */ |
99a59310 | 1119 | if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1120 | abort (); |
1121 | ||
1122 | /* It is possible that the dest is unused after this insn. | |
0f41302f | 1123 | If so, just pop the src. */ |
48227150 | 1124 | |
99a59310 | 1125 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
ecb63641 EB |
1126 | emit_pop_insn (insn, regstack, src, EMIT_AFTER); |
1127 | else | |
48227150 | 1128 | { |
ecb63641 EB |
1129 | regstack->reg[i] = REGNO (dest); |
1130 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1131 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
48227150 JVA |
1132 | } |
1133 | ||
ecb63641 | 1134 | control_flow_insn_deleted |= control_flow_insn_p (insn); |
53c17031 | 1135 | delete_insn (insn); |
ecb63641 | 1136 | return control_flow_insn_deleted; |
48227150 JVA |
1137 | } |
1138 | ||
0f41302f | 1139 | /* The source reg does not die. */ |
48227150 JVA |
1140 | |
1141 | /* If this appears to be a no-op move, delete it, or else it | |
1142 | will confuse the machine description output patterns. But if | |
1143 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
0f41302f | 1144 | for REG_UNUSED will not work for deleted insns. */ |
48227150 | 1145 | |
99a59310 | 1146 | if (REGNO (src) == REGNO (dest)) |
48227150 | 1147 | { |
99a59310 | 1148 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
a05924f9 | 1149 | emit_pop_insn (insn, regstack, dest, EMIT_AFTER); |
48227150 | 1150 | |
ecb63641 | 1151 | control_flow_insn_deleted |= control_flow_insn_p (insn); |
53c17031 | 1152 | delete_insn (insn); |
ecb63641 | 1153 | return control_flow_insn_deleted; |
48227150 JVA |
1154 | } |
1155 | ||
3eae4643 | 1156 | /* The destination ought to be dead. */ |
99a59310 | 1157 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1158 | abort (); |
1159 | ||
99a59310 | 1160 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
48227150 | 1161 | |
99a59310 RK |
1162 | regstack->reg[++regstack->top] = REGNO (dest); |
1163 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1164 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 | 1165 | } |
99a59310 | 1166 | else if (STACK_REG_P (src)) |
48227150 JVA |
1167 | { |
1168 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1169 | only top of stack may be saved, emit an exchange first if | |
0f41302f | 1170 | needs be. */ |
48227150 | 1171 | |
99a59310 | 1172 | emit_swap_insn (insn, regstack, src); |
48227150 | 1173 | |
99a59310 | 1174 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1175 | if (note) |
1176 | { | |
1177 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1178 | regstack->top--; | |
99a59310 | 1179 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
48227150 | 1180 | } |
f8a1ebc6 | 1181 | else if ((GET_MODE (src) == XFmode) |
cadcffb3 | 1182 | && regstack->top < REG_STACK_SIZE - 1) |
b40b8b06 JVA |
1183 | { |
1184 | /* A 387 cannot write an XFmode value to a MEM without | |
1185 | clobbering the source reg. The output code can handle | |
1186 | this by reading back the value from the MEM. | |
1187 | But it is more efficient to use a temp register if one is | |
1188 | available. Push the source value here if the register | |
1189 | stack is not full, and then write the value to memory via | |
1190 | a pop. */ | |
1191 | rtx push_rtx, push_insn; | |
037f20f1 | 1192 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); |
b40b8b06 | 1193 | |
f8a1ebc6 | 1194 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); |
b40b8b06 | 1195 | push_insn = emit_insn_before (push_rtx, insn); |
38a448ca RH |
1196 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, |
1197 | REG_NOTES (insn)); | |
b40b8b06 | 1198 | } |
48227150 | 1199 | |
99a59310 | 1200 | replace_reg (psrc, FIRST_STACK_REG); |
48227150 | 1201 | } |
99a59310 | 1202 | else if (STACK_REG_P (dest)) |
48227150 JVA |
1203 | { |
1204 | /* Load from MEM, or possibly integer REG or constant, into the | |
1205 | stack regs. The actual target is always the top of the | |
1206 | stack. The stack mapping is changed to reflect that DEST is | |
1207 | now at top of stack. */ | |
1208 | ||
3eae4643 | 1209 | /* The destination ought to be dead. */ |
99a59310 | 1210 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1211 | abort (); |
1212 | ||
1213 | if (regstack->top >= REG_STACK_SIZE) | |
1214 | abort (); | |
1215 | ||
99a59310 RK |
1216 | regstack->reg[++regstack->top] = REGNO (dest); |
1217 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1218 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 JVA |
1219 | } |
1220 | else | |
1221 | abort (); | |
ecb63641 EB |
1222 | |
1223 | return control_flow_insn_deleted; | |
48227150 JVA |
1224 | } |
1225 | \f | |
e075ae69 RH |
1226 | /* Swap the condition on a branch, if there is one. Return true if we |
1227 | found a condition to swap. False if the condition was not used as | |
dc297297 | 1228 | such. */ |
e075ae69 RH |
1229 | |
1230 | static int | |
0c20a65f | 1231 | swap_rtx_condition_1 (rtx pat) |
eca31501 | 1232 | { |
b3694847 SS |
1233 | const char *fmt; |
1234 | int i, r = 0; | |
eca31501 | 1235 | |
ec8e098d | 1236 | if (COMPARISON_P (pat)) |
eca31501 JVA |
1237 | { |
1238 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
e075ae69 | 1239 | r = 1; |
eca31501 | 1240 | } |
e075ae69 | 1241 | else |
eca31501 | 1242 | { |
e075ae69 RH |
1243 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
1244 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
eca31501 | 1245 | { |
e075ae69 RH |
1246 | if (fmt[i] == 'E') |
1247 | { | |
b3694847 | 1248 | int j; |
eca31501 | 1249 | |
e075ae69 RH |
1250 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
1251 | r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
1252 | } | |
1253 | else if (fmt[i] == 'e') | |
1254 | r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
eca31501 | 1255 | } |
eca31501 | 1256 | } |
e075ae69 RH |
1257 | |
1258 | return r; | |
1259 | } | |
1260 | ||
1261 | static int | |
0c20a65f | 1262 | swap_rtx_condition (rtx insn) |
e075ae69 RH |
1263 | { |
1264 | rtx pat = PATTERN (insn); | |
1265 | ||
1266 | /* We're looking for a single set to cc0 or an HImode temporary. */ | |
1267 | ||
1268 | if (GET_CODE (pat) == SET | |
f8cfc6aa | 1269 | && REG_P (SET_DEST (pat)) |
e075ae69 RH |
1270 | && REGNO (SET_DEST (pat)) == FLAGS_REG) |
1271 | { | |
1272 | insn = next_flags_user (insn); | |
1273 | if (insn == NULL_RTX) | |
1274 | return 0; | |
1275 | pat = PATTERN (insn); | |
1276 | } | |
1277 | ||
1278 | /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're | |
1279 | not doing anything with the cc value right now. We may be able to | |
1280 | search for one though. */ | |
1281 | ||
1282 | if (GET_CODE (pat) == SET | |
1283 | && GET_CODE (SET_SRC (pat)) == UNSPEC | |
35a76aac | 1284 | && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) |
e075ae69 RH |
1285 | { |
1286 | rtx dest = SET_DEST (pat); | |
1287 | ||
a6a2274a | 1288 | /* Search forward looking for the first use of this value. |
e075ae69 | 1289 | Stop at block boundaries. */ |
a813c111 | 1290 | while (insn != BB_END (current_block)) |
e075ae69 RH |
1291 | { |
1292 | insn = NEXT_INSN (insn); | |
2c3c49de | 1293 | if (INSN_P (insn) && reg_mentioned_p (dest, insn)) |
e075ae69 | 1294 | break; |
4b4bf941 | 1295 | if (CALL_P (insn)) |
e075ae69 RH |
1296 | return 0; |
1297 | } | |
1298 | ||
1299 | /* So we've found the insn using this value. If it is anything | |
1300 | other than sahf, aka unspec 10, or the value does not die | |
1301 | (meaning we'd have to search further), then we must give up. */ | |
1302 | pat = PATTERN (insn); | |
1303 | if (GET_CODE (pat) != SET | |
1304 | || GET_CODE (SET_SRC (pat)) != UNSPEC | |
35a76aac | 1305 | || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF |
e075ae69 RH |
1306 | || ! dead_or_set_p (insn, dest)) |
1307 | return 0; | |
1308 | ||
1309 | /* Now we are prepared to handle this as a normal cc0 setter. */ | |
1310 | insn = next_flags_user (insn); | |
1311 | if (insn == NULL_RTX) | |
1312 | return 0; | |
1313 | pat = PATTERN (insn); | |
1314 | } | |
1315 | ||
90a74703 JH |
1316 | if (swap_rtx_condition_1 (pat)) |
1317 | { | |
0eac0e81 | 1318 | int fail = 0; |
90a74703 JH |
1319 | INSN_CODE (insn) = -1; |
1320 | if (recog_memoized (insn) == -1) | |
0eac0e81 JH |
1321 | fail = 1; |
1322 | /* In case the flags don't die here, recurse to try fix | |
1323 | following user too. */ | |
1324 | else if (! dead_or_set_p (insn, ix86_flags_rtx)) | |
1325 | { | |
1326 | insn = next_flags_user (insn); | |
1327 | if (!insn || !swap_rtx_condition (insn)) | |
1328 | fail = 1; | |
1329 | } | |
1330 | if (fail) | |
90a74703 JH |
1331 | { |
1332 | swap_rtx_condition_1 (pat); | |
1333 | return 0; | |
1334 | } | |
1335 | return 1; | |
1336 | } | |
1337 | return 0; | |
eca31501 JVA |
1338 | } |
1339 | ||
48227150 JVA |
1340 | /* Handle a comparison. Special care needs to be taken to avoid |
1341 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
1342 | ||
e075ae69 | 1343 | Also, a pop insn may need to be emitted. The 387 does have an |
48227150 JVA |
1344 | `fcompp' insn that can pop two regs, but it is sometimes too expensive |
1345 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
e075ae69 | 1346 | set up. */ |
48227150 JVA |
1347 | |
1348 | static void | |
0c20a65f | 1349 | compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) |
48227150 JVA |
1350 | { |
1351 | rtx *src1, *src2; | |
1352 | rtx src1_note, src2_note; | |
e075ae69 | 1353 | rtx flags_user; |
914ec131 | 1354 | |
e075ae69 RH |
1355 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1356 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1357 | flags_user = next_flags_user (insn); | |
48227150 | 1358 | |
eca31501 | 1359 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
0f41302f | 1360 | registers that die in this insn - move those to stack top first. */ |
e075ae69 RH |
1361 | if ((! STACK_REG_P (*src1) |
1362 | || (STACK_REG_P (*src2) | |
1363 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
1364 | && swap_rtx_condition (insn)) | |
eca31501 | 1365 | { |
e075ae69 RH |
1366 | rtx temp; |
1367 | temp = XEXP (pat_src, 0); | |
1368 | XEXP (pat_src, 0) = XEXP (pat_src, 1); | |
1369 | XEXP (pat_src, 1) = temp; | |
48227150 | 1370 | |
e075ae69 RH |
1371 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1372 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
dc78213e | 1373 | |
b9342cdf | 1374 | INSN_CODE (insn) = -1; |
eca31501 | 1375 | } |
48227150 | 1376 | |
0f41302f | 1377 | /* We will fix any death note later. */ |
48227150 JVA |
1378 | |
1379 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1380 | ||
1381 | if (STACK_REG_P (*src2)) | |
1382 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1383 | else | |
eca31501 | 1384 | src2_note = NULL_RTX; |
48227150 | 1385 | |
e075ae69 | 1386 | emit_swap_insn (insn, regstack, *src1); |
48227150 JVA |
1387 | |
1388 | replace_reg (src1, FIRST_STACK_REG); | |
1389 | ||
1390 | if (STACK_REG_P (*src2)) | |
e075ae69 | 1391 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
48227150 JVA |
1392 | |
1393 | if (src1_note) | |
1394 | { | |
7aa74e4c | 1395 | pop_stack (regstack, REGNO (XEXP (src1_note, 0))); |
48227150 | 1396 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
48227150 JVA |
1397 | } |
1398 | ||
1399 | /* If the second operand dies, handle that. But if the operands are | |
1400 | the same stack register, don't bother, because only one death is | |
0f41302f | 1401 | needed, and it was just handled. */ |
48227150 JVA |
1402 | |
1403 | if (src2_note | |
eca31501 | 1404 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
48227150 JVA |
1405 | && REGNO (*src1) == REGNO (*src2))) |
1406 | { | |
1407 | /* As a special case, two regs may die in this insn if src2 is | |
1408 | next to top of stack and the top of stack also dies. Since | |
1409 | we have already popped src1, "next to top of stack" is really | |
0f41302f | 1410 | at top (FIRST_STACK_REG) now. */ |
48227150 JVA |
1411 | |
1412 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
1413 | && src1_note) | |
1414 | { | |
7aa74e4c | 1415 | pop_stack (regstack, REGNO (XEXP (src2_note, 0))); |
48227150 | 1416 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
48227150 JVA |
1417 | } |
1418 | else | |
1419 | { | |
e075ae69 RH |
1420 | /* The 386 can only represent death of the first operand in |
1421 | the case handled above. In all other cases, emit a separate | |
1422 | pop and remove the death note from here. */ | |
1423 | ||
1424 | /* link_cc0_insns (insn); */ | |
1425 | ||
1426 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
48227150 | 1427 | |
e075ae69 | 1428 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), |
a05924f9 | 1429 | EMIT_AFTER); |
48227150 JVA |
1430 | } |
1431 | } | |
1432 | } | |
1433 | \f | |
1434 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK | |
ecb63641 EB |
1435 | is the current register layout. Return whether a control flow insn |
1436 | was deleted in the process. */ | |
48227150 | 1437 | |
ecb63641 | 1438 | static bool |
0c20a65f | 1439 | subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) |
48227150 JVA |
1440 | { |
1441 | rtx *dest, *src; | |
ecb63641 | 1442 | bool control_flow_insn_deleted = false; |
48227150 | 1443 | |
a05924f9 JH |
1444 | switch (GET_CODE (pat)) |
1445 | { | |
1446 | case USE: | |
1447 | /* Deaths in USE insns can happen in non optimizing compilation. | |
1448 | Handle them by popping the dying register. */ | |
1449 | src = get_true_reg (&XEXP (pat, 0)); | |
a6a2274a KH |
1450 | if (STACK_REG_P (*src) |
1451 | && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
1452 | { | |
1453 | emit_pop_insn (insn, regstack, *src, EMIT_AFTER); | |
ecb63641 | 1454 | return control_flow_insn_deleted; |
a6a2274a | 1455 | } |
eedf2f55 | 1456 | /* ??? Uninitialized USE should not happen. */ |
a05924f9 | 1457 | else if (get_hard_regnum (regstack, *src) == -1) |
f4f4d0f8 | 1458 | abort (); |
a05924f9 | 1459 | break; |
48227150 | 1460 | |
a05924f9 JH |
1461 | case CLOBBER: |
1462 | { | |
1463 | rtx note; | |
48227150 | 1464 | |
a05924f9 JH |
1465 | dest = get_true_reg (&XEXP (pat, 0)); |
1466 | if (STACK_REG_P (*dest)) | |
1467 | { | |
1468 | note = find_reg_note (insn, REG_DEAD, *dest); | |
bd695e1e RH |
1469 | |
1470 | if (pat != PATTERN (insn)) | |
1471 | { | |
1472 | /* The fix_truncdi_1 pattern wants to be able to allocate | |
1473 | it's own scratch register. It does this by clobbering | |
1474 | an fp reg so that it is assured of an empty reg-stack | |
a6a2274a | 1475 | register. If the register is live, kill it now. |
bd695e1e RH |
1476 | Remove the DEAD/UNUSED note so we don't try to kill it |
1477 | later too. */ | |
1478 | ||
1479 | if (note) | |
1480 | emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
1481 | else | |
1482 | { | |
1483 | note = find_reg_note (insn, REG_UNUSED, *dest); | |
1484 | if (!note) | |
1485 | abort (); | |
1486 | } | |
1487 | remove_note (insn, note); | |
cb0bc263 | 1488 | replace_reg (dest, FIRST_STACK_REG + 1); |
bd695e1e | 1489 | } |
a05924f9 JH |
1490 | else |
1491 | { | |
bd695e1e RH |
1492 | /* A top-level clobber with no REG_DEAD, and no hard-regnum |
1493 | indicates an uninitialized value. Because reload removed | |
a6a2274a | 1494 | all other clobbers, this must be due to a function |
bd695e1e RH |
1495 | returning without a value. Load up a NaN. */ |
1496 | ||
1497 | if (! note | |
1498 | && get_hard_regnum (regstack, *dest) == -1) | |
1499 | { | |
1500 | pat = gen_rtx_SET (VOIDmode, | |
1501 | FP_MODE_REG (REGNO (*dest), SFmode), | |
d2032ad8 | 1502 | not_a_num); |
bd695e1e | 1503 | PATTERN (insn) = pat; |
ecb63641 | 1504 | control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); |
bd695e1e | 1505 | } |
037f20f1 JH |
1506 | if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) |
1507 | && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) | |
1508 | { | |
1509 | pat = gen_rtx_SET (VOIDmode, | |
1510 | FP_MODE_REG (REGNO (*dest) + 1, SFmode), | |
d2032ad8 | 1511 | not_a_num); |
037f20f1 | 1512 | PATTERN (insn) = pat; |
ecb63641 | 1513 | control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); |
037f20f1 | 1514 | } |
a05924f9 | 1515 | } |
a05924f9 | 1516 | } |
48227150 | 1517 | break; |
a05924f9 | 1518 | } |
48227150 | 1519 | |
a05924f9 JH |
1520 | case SET: |
1521 | { | |
6496a589 | 1522 | rtx *src1 = (rtx *) 0, *src2; |
a05924f9 JH |
1523 | rtx src1_note, src2_note; |
1524 | rtx pat_src; | |
1525 | ||
1526 | dest = get_true_reg (&SET_DEST (pat)); | |
1527 | src = get_true_reg (&SET_SRC (pat)); | |
1528 | pat_src = SET_SRC (pat); | |
1529 | ||
1530 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
1531 | if (STACK_REG_P (*src) | |
1532 | || (STACK_REG_P (*dest) | |
3c0cb5de | 1533 | && (REG_P (*src) || MEM_P (*src) |
a05924f9 JH |
1534 | || GET_CODE (*src) == CONST_DOUBLE))) |
1535 | { | |
ecb63641 | 1536 | control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); |
a05924f9 JH |
1537 | break; |
1538 | } | |
48227150 | 1539 | |
a05924f9 JH |
1540 | switch (GET_CODE (pat_src)) |
1541 | { | |
1542 | case COMPARE: | |
1543 | compare_for_stack_reg (insn, regstack, pat_src); | |
1544 | break; | |
48227150 | 1545 | |
a05924f9 JH |
1546 | case CALL: |
1547 | { | |
1548 | int count; | |
66fd46b6 | 1549 | for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; |
a05924f9 JH |
1550 | --count >= 0;) |
1551 | { | |
1552 | regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
1553 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
1554 | } | |
1555 | } | |
1556 | replace_reg (dest, FIRST_STACK_REG); | |
1557 | break; | |
48227150 | 1558 | |
a05924f9 JH |
1559 | case REG: |
1560 | /* This is a `tstM2' case. */ | |
1561 | if (*dest != cc0_rtx) | |
1562 | abort (); | |
1563 | src1 = src; | |
48227150 | 1564 | |
a05924f9 | 1565 | /* Fall through. */ |
48227150 | 1566 | |
a05924f9 JH |
1567 | case FLOAT_TRUNCATE: |
1568 | case SQRT: | |
1569 | case ABS: | |
1570 | case NEG: | |
1571 | /* These insns only operate on the top of the stack. DEST might | |
1572 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
1573 | possible that the tstM case results in a REG_DEAD note on the | |
1574 | source. */ | |
48227150 | 1575 | |
a05924f9 JH |
1576 | if (src1 == 0) |
1577 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
48227150 | 1578 | |
a05924f9 | 1579 | emit_swap_insn (insn, regstack, *src1); |
48227150 | 1580 | |
a05924f9 | 1581 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
48227150 | 1582 | |
a05924f9 JH |
1583 | if (STACK_REG_P (*dest)) |
1584 | replace_reg (dest, FIRST_STACK_REG); | |
48227150 | 1585 | |
a05924f9 JH |
1586 | if (src1_note) |
1587 | { | |
1588 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1589 | regstack->top--; | |
1590 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1591 | } | |
48227150 | 1592 | |
a05924f9 JH |
1593 | replace_reg (src1, FIRST_STACK_REG); |
1594 | break; | |
48227150 | 1595 | |
a05924f9 JH |
1596 | case MINUS: |
1597 | case DIV: | |
1598 | /* On i386, reversed forms of subM3 and divM3 exist for | |
1599 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
1600 | can be used. */ | |
1601 | case MULT: | |
1602 | case PLUS: | |
1603 | /* These insns can accept the top of stack as a destination | |
1604 | from a stack reg or mem, or can use the top of stack as a | |
1605 | source and some other stack register (possibly top of stack) | |
1606 | as a destination. */ | |
1607 | ||
1608 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
1609 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1610 | ||
1611 | /* We will fix any death note later. */ | |
1612 | ||
1613 | if (STACK_REG_P (*src1)) | |
1614 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1615 | else | |
1616 | src1_note = NULL_RTX; | |
1617 | if (STACK_REG_P (*src2)) | |
1618 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1619 | else | |
1620 | src2_note = NULL_RTX; | |
48227150 | 1621 | |
a05924f9 JH |
1622 | /* If either operand is not a stack register, then the dest |
1623 | must be top of stack. */ | |
48227150 | 1624 | |
a05924f9 | 1625 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) |
eca31501 | 1626 | emit_swap_insn (insn, regstack, *dest); |
a05924f9 JH |
1627 | else |
1628 | { | |
1629 | /* Both operands are REG. If neither operand is already | |
1630 | at the top of stack, choose to make the one that is the dest | |
1631 | the new top of stack. */ | |
48227150 | 1632 | |
a05924f9 | 1633 | int src1_hard_regnum, src2_hard_regnum; |
48227150 | 1634 | |
a05924f9 JH |
1635 | src1_hard_regnum = get_hard_regnum (regstack, *src1); |
1636 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
1637 | if (src1_hard_regnum == -1 || src2_hard_regnum == -1) | |
1638 | abort (); | |
48227150 | 1639 | |
a05924f9 JH |
1640 | if (src1_hard_regnum != FIRST_STACK_REG |
1641 | && src2_hard_regnum != FIRST_STACK_REG) | |
1642 | emit_swap_insn (insn, regstack, *dest); | |
48227150 | 1643 | } |
a05924f9 JH |
1644 | |
1645 | if (STACK_REG_P (*src1)) | |
1646 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1647 | if (STACK_REG_P (*src2)) | |
1648 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
1649 | ||
1650 | if (src1_note) | |
48227150 | 1651 | { |
a05924f9 | 1652 | rtx src1_reg = XEXP (src1_note, 0); |
48227150 | 1653 | |
a05924f9 JH |
1654 | /* If the register that dies is at the top of stack, then |
1655 | the destination is somewhere else - merely substitute it. | |
1656 | But if the reg that dies is not at top of stack, then | |
1657 | move the top of stack to the dead reg, as though we had | |
1658 | done the insn and then a store-with-pop. */ | |
48227150 | 1659 | |
a05924f9 JH |
1660 | if (REGNO (src1_reg) == regstack->reg[regstack->top]) |
1661 | { | |
1662 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1663 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1664 | } | |
1665 | else | |
1666 | { | |
1667 | int regno = get_hard_regnum (regstack, src1_reg); | |
48227150 | 1668 | |
a05924f9 JH |
1669 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1670 | replace_reg (dest, regno); | |
1671 | ||
1672 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1673 | = regstack->reg[regstack->top]; | |
1674 | } | |
1675 | ||
1676 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1677 | REGNO (XEXP (src1_note, 0))); | |
1678 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1679 | regstack->top--; | |
1680 | } | |
1681 | else if (src2_note) | |
48227150 | 1682 | { |
a05924f9 JH |
1683 | rtx src2_reg = XEXP (src2_note, 0); |
1684 | if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
1685 | { | |
1686 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1687 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1688 | } | |
1689 | else | |
1690 | { | |
1691 | int regno = get_hard_regnum (regstack, src2_reg); | |
1692 | ||
1693 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1694 | replace_reg (dest, regno); | |
1695 | ||
1696 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1697 | = regstack->reg[regstack->top]; | |
1698 | } | |
1699 | ||
1700 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1701 | REGNO (XEXP (src2_note, 0))); | |
1702 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
1703 | regstack->top--; | |
48227150 JVA |
1704 | } |
1705 | else | |
1706 | { | |
48227150 | 1707 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
a05924f9 | 1708 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
48227150 | 1709 | } |
caa6ec8d | 1710 | |
d55d8fc7 | 1711 | /* Keep operand 1 matching with destination. */ |
ec8e098d | 1712 | if (COMMUTATIVE_ARITH_P (pat_src) |
caa6ec8d JH |
1713 | && REG_P (*src1) && REG_P (*src2) |
1714 | && REGNO (*src1) != REGNO (*dest)) | |
1715 | { | |
0b9aaeee JH |
1716 | int tmp = REGNO (*src1); |
1717 | replace_reg (src1, REGNO (*src2)); | |
1718 | replace_reg (src2, tmp); | |
caa6ec8d | 1719 | } |
a05924f9 | 1720 | break; |
48227150 | 1721 | |
a05924f9 JH |
1722 | case UNSPEC: |
1723 | switch (XINT (pat_src, 1)) | |
1724 | { | |
35a76aac RH |
1725 | case UNSPEC_SIN: |
1726 | case UNSPEC_COS: | |
9d5b9dae RS |
1727 | case UNSPEC_FRNDINT: |
1728 | case UNSPEC_F2XM1: | |
a05924f9 | 1729 | /* These insns only operate on the top of the stack. */ |
0e7d0eb9 | 1730 | |
a05924f9 | 1731 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
0e7d0eb9 | 1732 | |
a05924f9 | 1733 | emit_swap_insn (insn, regstack, *src1); |
0e7d0eb9 | 1734 | |
6862f97f UB |
1735 | /* Input should never die, it is |
1736 | replaced with output. */ | |
a05924f9 | 1737 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
6862f97f UB |
1738 | if (src1_note) |
1739 | abort(); | |
0e7d0eb9 | 1740 | |
a05924f9 JH |
1741 | if (STACK_REG_P (*dest)) |
1742 | replace_reg (dest, FIRST_STACK_REG); | |
0e7d0eb9 | 1743 | |
a05924f9 JH |
1744 | replace_reg (src1, FIRST_STACK_REG); |
1745 | break; | |
0e7d0eb9 | 1746 | |
1fb54135 | 1747 | case UNSPEC_FPATAN: |
358997e2 | 1748 | case UNSPEC_FYL2X: |
c2fcfa4f | 1749 | case UNSPEC_FYL2XP1: |
1fb54135 RS |
1750 | /* These insns operate on the top two stack slots. */ |
1751 | ||
1752 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1753 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1754 | ||
1755 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1756 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1757 | ||
f964bd29 | 1758 | swap_to_top (insn, regstack, *src1, *src2); |
1fb54135 RS |
1759 | |
1760 | replace_reg (src1, FIRST_STACK_REG); | |
1761 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1762 | ||
1763 | if (src1_note) | |
1764 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1765 | if (src2_note) | |
1766 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
1767 | ||
1768 | /* Pop both input operands from the stack. */ | |
1769 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1770 | regstack->reg[regstack->top]); | |
1771 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1772 | regstack->reg[regstack->top - 1]); | |
1773 | regstack->top -= 2; | |
1774 | ||
1775 | /* Push the result back onto the stack. */ | |
1776 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1777 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1778 | replace_reg (dest, FIRST_STACK_REG); | |
1779 | break; | |
1780 | ||
f964bd29 | 1781 | case UNSPEC_FSCALE_FRACT: |
5ae27cfa UB |
1782 | case UNSPEC_FPREM_F: |
1783 | case UNSPEC_FPREM1_F: | |
f964bd29 UB |
1784 | /* These insns operate on the top two stack slots. |
1785 | first part of double input, double output insn. */ | |
1786 | ||
1787 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1788 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1789 | ||
1790 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1791 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1792 | ||
1793 | /* Inputs should never die, they are | |
1794 | replaced with outputs. */ | |
1795 | if ((src1_note) || (src2_note)) | |
1796 | abort(); | |
1797 | ||
1798 | swap_to_top (insn, regstack, *src1, *src2); | |
1799 | ||
1800 | /* Push the result back onto stack. Empty stack slot | |
9cf737f8 | 1801 | will be filled in second part of insn. */ |
f964bd29 UB |
1802 | if (STACK_REG_P (*dest)) { |
1803 | regstack->reg[regstack->top] = REGNO (*dest); | |
1804 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1805 | replace_reg (dest, FIRST_STACK_REG); | |
1806 | } | |
1807 | ||
1808 | replace_reg (src1, FIRST_STACK_REG); | |
1809 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1810 | break; | |
1811 | ||
1812 | case UNSPEC_FSCALE_EXP: | |
5ae27cfa UB |
1813 | case UNSPEC_FPREM_U: |
1814 | case UNSPEC_FPREM1_U: | |
f964bd29 UB |
1815 | /* These insns operate on the top two stack slots./ |
1816 | second part of double input, double output insn. */ | |
1817 | ||
1818 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1819 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1820 | ||
1821 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1822 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1823 | ||
1824 | /* Inputs should never die, they are | |
1825 | replaced with outputs. */ | |
1826 | if ((src1_note) || (src2_note)) | |
1827 | abort(); | |
1828 | ||
1829 | swap_to_top (insn, regstack, *src1, *src2); | |
1830 | ||
1831 | /* Push the result back onto stack. Fill empty slot from | |
1832 | first part of insn and fix top of stack pointer. */ | |
1833 | if (STACK_REG_P (*dest)) { | |
1834 | regstack->reg[regstack->top - 1] = REGNO (*dest); | |
1835 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1836 | replace_reg (dest, FIRST_STACK_REG + 1); | |
1837 | } | |
1838 | ||
1839 | replace_reg (src1, FIRST_STACK_REG); | |
1840 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1841 | break; | |
1842 | ||
6c7cf1f0 | 1843 | case UNSPEC_SINCOS_COS: |
a072d43b | 1844 | case UNSPEC_TAN_ONE: |
88b28a31 | 1845 | case UNSPEC_XTRACT_FRACT: |
6c7cf1f0 UB |
1846 | /* These insns operate on the top two stack slots, |
1847 | first part of one input, double output insn. */ | |
1848 | ||
1849 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1850 | ||
1851 | emit_swap_insn (insn, regstack, *src1); | |
1852 | ||
6862f97f UB |
1853 | /* Input should never die, it is |
1854 | replaced with output. */ | |
6c7cf1f0 | 1855 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
6862f97f UB |
1856 | if (src1_note) |
1857 | abort(); | |
6c7cf1f0 UB |
1858 | |
1859 | /* Push the result back onto stack. Empty stack slot | |
9cf737f8 | 1860 | will be filled in second part of insn. */ |
6c7cf1f0 UB |
1861 | if (STACK_REG_P (*dest)) { |
1862 | regstack->reg[regstack->top + 1] = REGNO (*dest); | |
1863 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1864 | replace_reg (dest, FIRST_STACK_REG); | |
1865 | } | |
1866 | ||
6c7cf1f0 UB |
1867 | replace_reg (src1, FIRST_STACK_REG); |
1868 | break; | |
1869 | ||
1870 | case UNSPEC_SINCOS_SIN: | |
a072d43b | 1871 | case UNSPEC_TAN_TAN: |
88b28a31 | 1872 | case UNSPEC_XTRACT_EXP: |
a072d43b UB |
1873 | /* These insns operate on the top two stack slots, |
1874 | second part of one input, double output insn. */ | |
1875 | ||
6c7cf1f0 UB |
1876 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
1877 | ||
1878 | emit_swap_insn (insn, regstack, *src1); | |
1879 | ||
6862f97f UB |
1880 | /* Input should never die, it is |
1881 | replaced with output. */ | |
6c7cf1f0 | 1882 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
6862f97f UB |
1883 | if (src1_note) |
1884 | abort(); | |
6c7cf1f0 UB |
1885 | |
1886 | /* Push the result back onto stack. Fill empty slot from | |
1887 | first part of insn and fix top of stack pointer. */ | |
1888 | if (STACK_REG_P (*dest)) { | |
1889 | regstack->reg[regstack->top] = REGNO (*dest); | |
1890 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1891 | replace_reg (dest, FIRST_STACK_REG + 1); | |
1892 | ||
1893 | regstack->top++; | |
1894 | } | |
1895 | ||
6c7cf1f0 UB |
1896 | replace_reg (src1, FIRST_STACK_REG); |
1897 | break; | |
1898 | ||
35a76aac RH |
1899 | case UNSPEC_SAHF: |
1900 | /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) | |
1901 | The combination matches the PPRO fcomi instruction. */ | |
0e7d0eb9 | 1902 | |
a05924f9 JH |
1903 | pat_src = XVECEXP (pat_src, 0, 0); |
1904 | if (GET_CODE (pat_src) != UNSPEC | |
35a76aac | 1905 | || XINT (pat_src, 1) != UNSPEC_FNSTSW) |
a05924f9 | 1906 | abort (); |
5d3cc252 | 1907 | /* Fall through. */ |
e075ae69 | 1908 | |
35a76aac | 1909 | case UNSPEC_FNSTSW: |
a05924f9 JH |
1910 | /* Combined fcomp+fnstsw generated for doing well with |
1911 | CSE. When optimizing this would have been broken | |
1912 | up before now. */ | |
e075ae69 | 1913 | |
a05924f9 JH |
1914 | pat_src = XVECEXP (pat_src, 0, 0); |
1915 | if (GET_CODE (pat_src) != COMPARE) | |
1916 | abort (); | |
e075ae69 | 1917 | |
a05924f9 JH |
1918 | compare_for_stack_reg (insn, regstack, pat_src); |
1919 | break; | |
e075ae69 | 1920 | |
a05924f9 JH |
1921 | default: |
1922 | abort (); | |
1923 | } | |
e075ae69 RH |
1924 | break; |
1925 | ||
a05924f9 | 1926 | case IF_THEN_ELSE: |
dc297297 | 1927 | /* This insn requires the top of stack to be the destination. */ |
0e7d0eb9 | 1928 | |
2ab0437e JH |
1929 | src1 = get_true_reg (&XEXP (pat_src, 1)); |
1930 | src2 = get_true_reg (&XEXP (pat_src, 2)); | |
1931 | ||
1932 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1933 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1934 | ||
a05924f9 JH |
1935 | /* If the comparison operator is an FP comparison operator, |
1936 | it is handled correctly by compare_for_stack_reg () who | |
1937 | will move the destination to the top of stack. But if the | |
1938 | comparison operator is not an FP comparison operator, we | |
dc297297 | 1939 | have to handle it here. */ |
a05924f9 JH |
1940 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG |
1941 | && REGNO (*dest) != regstack->reg[regstack->top]) | |
2ab0437e JH |
1942 | { |
1943 | /* In case one of operands is the top of stack and the operands | |
35a76aac RH |
1944 | dies, it is safe to make it the destination operand by |
1945 | reversing the direction of cmove and avoid fxch. */ | |
2ab0437e JH |
1946 | if ((REGNO (*src1) == regstack->reg[regstack->top] |
1947 | && src1_note) | |
1948 | || (REGNO (*src2) == regstack->reg[regstack->top] | |
1949 | && src2_note)) | |
1950 | { | |
b74cf1ce JH |
1951 | int idx1 = (get_hard_regnum (regstack, *src1) |
1952 | - FIRST_STACK_REG); | |
1953 | int idx2 = (get_hard_regnum (regstack, *src2) | |
1954 | - FIRST_STACK_REG); | |
1955 | ||
1956 | /* Make reg-stack believe that the operands are already | |
1957 | swapped on the stack */ | |
1958 | regstack->reg[regstack->top - idx1] = REGNO (*src2); | |
1959 | regstack->reg[regstack->top - idx2] = REGNO (*src1); | |
1960 | ||
1961 | /* Reverse condition to compensate the operand swap. | |
1962 | i386 do have comparison always reversible. */ | |
2ab0437e JH |
1963 | PUT_CODE (XEXP (pat_src, 0), |
1964 | reversed_comparison_code (XEXP (pat_src, 0), insn)); | |
1965 | } | |
1966 | else | |
a6a2274a | 1967 | emit_swap_insn (insn, regstack, *dest); |
2ab0437e | 1968 | } |
4e97601f | 1969 | |
a05924f9 JH |
1970 | { |
1971 | rtx src_note [3]; | |
1972 | int i; | |
4e97601f | 1973 | |
a05924f9 JH |
1974 | src_note[0] = 0; |
1975 | src_note[1] = src1_note; | |
1976 | src_note[2] = src2_note; | |
54552651 | 1977 | |
a05924f9 JH |
1978 | if (STACK_REG_P (*src1)) |
1979 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1980 | if (STACK_REG_P (*src2)) | |
1981 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
4e97601f | 1982 | |
a05924f9 JH |
1983 | for (i = 1; i <= 2; i++) |
1984 | if (src_note [i]) | |
4e97601f | 1985 | { |
a05924f9 JH |
1986 | int regno = REGNO (XEXP (src_note[i], 0)); |
1987 | ||
1988 | /* If the register that dies is not at the top of | |
1989 | stack, then move the top of stack to the dead reg */ | |
1990 | if (regno != regstack->reg[regstack->top]) | |
1991 | { | |
1992 | remove_regno_note (insn, REG_DEAD, regno); | |
1993 | emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
1994 | EMIT_AFTER); | |
1995 | } | |
1996 | else | |
b74cf1ce JH |
1997 | /* Top of stack never dies, as it is the |
1998 | destination. */ | |
1999 | abort (); | |
4e97601f | 2000 | } |
a05924f9 | 2001 | } |
4e97601f | 2002 | |
a05924f9 | 2003 | /* Make dest the top of stack. Add dest to regstack if |
dc297297 | 2004 | not present. */ |
a05924f9 | 2005 | if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) |
a6a2274a | 2006 | regstack->reg[++regstack->top] = REGNO (*dest); |
a05924f9 JH |
2007 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
2008 | replace_reg (dest, FIRST_STACK_REG); | |
2009 | break; | |
914ec131 | 2010 | |
a05924f9 JH |
2011 | default: |
2012 | abort (); | |
2013 | } | |
4e97601f | 2014 | break; |
48227150 | 2015 | } |
a05924f9 JH |
2016 | |
2017 | default: | |
2018 | break; | |
2019 | } | |
ecb63641 EB |
2020 | |
2021 | return control_flow_insn_deleted; | |
48227150 JVA |
2022 | } |
2023 | \f | |
114cbee6 RS |
2024 | /* Substitute hard regnums for any stack regs in INSN, which has |
2025 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
f62a15e3 | 2026 | before the insn, and is updated with changes made here. |
114cbee6 RS |
2027 | |
2028 | There are several requirements and assumptions about the use of | |
2029 | stack-like regs in asm statements. These rules are enforced by | |
2030 | record_asm_stack_regs; see comments there for details. Any | |
2031 | asm_operands left in the RTL at this point may be assume to meet the | |
561cf7b1 | 2032 | requirements, since record_asm_stack_regs removes any problem asm. */ |
114cbee6 | 2033 | |
561cf7b1 | 2034 | static void |
0c20a65f | 2035 | subst_asm_stack_regs (rtx insn, stack regstack) |
114cbee6 | 2036 | { |
114cbee6 | 2037 | rtx body = PATTERN (insn); |
f62a15e3 | 2038 | int alt; |
114cbee6 RS |
2039 | |
2040 | rtx *note_reg; /* Array of note contents */ | |
2041 | rtx **note_loc; /* Address of REG field of each note */ | |
2042 | enum reg_note *note_kind; /* The type of each note */ | |
2043 | ||
a544cfd2 KG |
2044 | rtx *clobber_reg = 0; |
2045 | rtx **clobber_loc = 0; | |
114cbee6 RS |
2046 | |
2047 | struct stack_def temp_stack; | |
2048 | int n_notes; | |
2049 | int n_clobbers; | |
2050 | rtx note; | |
2051 | int i; | |
f62a15e3 | 2052 | int n_inputs, n_outputs; |
114cbee6 | 2053 | |
a05924f9 JH |
2054 | if (! check_asm_stack_operands (insn)) |
2055 | return; | |
2056 | ||
114cbee6 RS |
2057 | /* Find out what the constraints required. If no constraint |
2058 | alternative matches, that is a compiler bug: we should have caught | |
a05924f9 | 2059 | such an insn in check_asm_stack_operands. */ |
f62a15e3 BS |
2060 | extract_insn (insn); |
2061 | constrain_operands (1); | |
2062 | alt = which_alternative; | |
2063 | ||
2064 | preprocess_constraints (); | |
114cbee6 | 2065 | |
f62a15e3 | 2066 | n_inputs = get_asm_operand_n_inputs (body); |
1ccbefce | 2067 | n_outputs = recog_data.n_operands - n_inputs; |
a6a2274a | 2068 | |
f62a15e3 | 2069 | if (alt < 0) |
114cbee6 RS |
2070 | abort (); |
2071 | ||
0f41302f | 2072 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
2073 | for (i = 0; i < recog_data.n_operands; i++) |
2074 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
f8cfc6aa | 2075 | && REG_P (SUBREG_REG (recog_data.operand[i]))) |
114cbee6 | 2076 | { |
1ccbefce RH |
2077 | recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); |
2078 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
114cbee6 RS |
2079 | } |
2080 | ||
2081 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
2082 | ||
2083 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2084 | i++; | |
2085 | ||
703ad42b KG |
2086 | note_reg = alloca (i * sizeof (rtx)); |
2087 | note_loc = alloca (i * sizeof (rtx *)); | |
2088 | note_kind = alloca (i * sizeof (enum reg_note)); | |
114cbee6 RS |
2089 | |
2090 | n_notes = 0; | |
2091 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2092 | { | |
2093 | rtx reg = XEXP (note, 0); | |
2094 | rtx *loc = & XEXP (note, 0); | |
2095 | ||
f8cfc6aa | 2096 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
114cbee6 RS |
2097 | { |
2098 | loc = & SUBREG_REG (reg); | |
2099 | reg = SUBREG_REG (reg); | |
2100 | } | |
2101 | ||
2102 | if (STACK_REG_P (reg) | |
2103 | && (REG_NOTE_KIND (note) == REG_DEAD | |
2104 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
2105 | { | |
2106 | note_reg[n_notes] = reg; | |
2107 | note_loc[n_notes] = loc; | |
2108 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
2109 | n_notes++; | |
2110 | } | |
2111 | } | |
2112 | ||
2113 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
2114 | ||
2115 | n_clobbers = 0; | |
114cbee6 RS |
2116 | |
2117 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 2118 | { |
703ad42b KG |
2119 | clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); |
2120 | clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
114cbee6 | 2121 | |
3f5cfed6 JVA |
2122 | for (i = 0; i < XVECLEN (body, 0); i++) |
2123 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
2124 | { | |
2125 | rtx clobber = XVECEXP (body, 0, i); | |
2126 | rtx reg = XEXP (clobber, 0); | |
2127 | rtx *loc = & XEXP (clobber, 0); | |
114cbee6 | 2128 | |
f8cfc6aa | 2129 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
3f5cfed6 JVA |
2130 | { |
2131 | loc = & SUBREG_REG (reg); | |
2132 | reg = SUBREG_REG (reg); | |
2133 | } | |
2134 | ||
2135 | if (STACK_REG_P (reg)) | |
2136 | { | |
2137 | clobber_reg[n_clobbers] = reg; | |
2138 | clobber_loc[n_clobbers] = loc; | |
2139 | n_clobbers++; | |
2140 | } | |
2141 | } | |
2142 | } | |
114cbee6 | 2143 | |
a05924f9 | 2144 | temp_stack = *regstack; |
114cbee6 RS |
2145 | |
2146 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
2147 | ||
f62a15e3 | 2148 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2149 | if (STACK_REG_P (recog_data.operand[i]) |
f62a15e3 BS |
2150 | && reg_class_subset_p (recog_op_alt[i][alt].class, |
2151 | FLOAT_REGS) | |
2152 | && recog_op_alt[i][alt].class != FLOAT_REGS) | |
114cbee6 RS |
2153 | { |
2154 | /* If an operand needs to be in a particular reg in | |
2155 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
1ccbefce RH |
2156 | these constraints are for single register classes, and |
2157 | reload guaranteed that operand[i] is already in that class, | |
2158 | we can just use REGNO (recog_data.operand[i]) to know which | |
2159 | actual reg this operand needs to be in. */ | |
114cbee6 | 2160 | |
1ccbefce | 2161 | int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); |
114cbee6 RS |
2162 | |
2163 | if (regno < 0) | |
2164 | abort (); | |
2165 | ||
ae0ed63a | 2166 | if ((unsigned int) regno != REGNO (recog_data.operand[i])) |
114cbee6 | 2167 | { |
1ccbefce RH |
2168 | /* recog_data.operand[i] is not in the right place. Find |
2169 | it and swap it with whatever is already in I's place. | |
2170 | K is where recog_data.operand[i] is now. J is where it | |
2171 | should be. */ | |
114cbee6 RS |
2172 | int j, k, temp; |
2173 | ||
2174 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
2175 | j = (temp_stack.top | |
1ccbefce | 2176 | - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); |
114cbee6 RS |
2177 | |
2178 | temp = temp_stack.reg[k]; | |
2179 | temp_stack.reg[k] = temp_stack.reg[j]; | |
2180 | temp_stack.reg[j] = temp; | |
2181 | } | |
2182 | } | |
2183 | ||
a05924f9 | 2184 | /* Emit insns before INSN to make sure the reg-stack is in the right |
114cbee6 RS |
2185 | order. */ |
2186 | ||
a05924f9 | 2187 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); |
114cbee6 RS |
2188 | |
2189 | /* Make the needed input register substitutions. Do death notes and | |
0f41302f | 2190 | clobbers too, because these are for inputs, not outputs. */ |
114cbee6 | 2191 | |
f62a15e3 | 2192 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2193 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 | 2194 | { |
1ccbefce | 2195 | int regnum = get_hard_regnum (regstack, recog_data.operand[i]); |
114cbee6 RS |
2196 | |
2197 | if (regnum < 0) | |
2198 | abort (); | |
2199 | ||
1ccbefce | 2200 | replace_reg (recog_data.operand_loc[i], regnum); |
114cbee6 RS |
2201 | } |
2202 | ||
2203 | for (i = 0; i < n_notes; i++) | |
2204 | if (note_kind[i] == REG_DEAD) | |
2205 | { | |
2206 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
2207 | ||
2208 | if (regnum < 0) | |
2209 | abort (); | |
2210 | ||
2211 | replace_reg (note_loc[i], regnum); | |
2212 | } | |
2213 | ||
2214 | for (i = 0; i < n_clobbers; i++) | |
2215 | { | |
2216 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
2217 | Don't try to replace it in that case. */ | |
2218 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
2219 | ||
2220 | if (regnum >= 0) | |
2221 | { | |
2222 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
2223 | that these regs can't be MODE_INT and will abort. Just put | |
2224 | the right reg there without calling replace_reg. */ | |
2225 | ||
99a59310 | 2226 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
114cbee6 RS |
2227 | } |
2228 | } | |
2229 | ||
0f41302f | 2230 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
114cbee6 | 2231 | |
f62a15e3 | 2232 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2233 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2234 | { |
2235 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 2236 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
2237 | int j; |
2238 | ||
2239 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 2240 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
2241 | break; |
2242 | ||
f62a15e3 | 2243 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
114cbee6 | 2244 | { |
1ccbefce RH |
2245 | /* recog_data.operand[i] might not be at the top of stack. |
2246 | But that's OK, because all we need to do is pop the | |
2247 | right number of regs off of the top of the reg-stack. | |
2248 | record_asm_stack_regs guaranteed that all implicitly | |
2249 | popped regs were grouped at the top of the reg-stack. */ | |
114cbee6 RS |
2250 | |
2251 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2252 | regstack->reg[regstack->top]); | |
2253 | regstack->top--; | |
2254 | } | |
2255 | } | |
2256 | ||
2257 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2258 | Note that there isn't any need to substitute register numbers. | |
0f41302f | 2259 | ??? Explain why this is true. */ |
114cbee6 RS |
2260 | |
2261 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2262 | { | |
2263 | /* See if there is an output for this hard reg. */ | |
2264 | int j; | |
2265 | ||
2266 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 2267 | if (STACK_REG_P (recog_data.operand[j]) |
ae0ed63a | 2268 | && REGNO (recog_data.operand[j]) == (unsigned) i) |
114cbee6 RS |
2269 | { |
2270 | regstack->reg[++regstack->top] = i; | |
2271 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2272 | break; | |
2273 | } | |
2274 | } | |
2275 | ||
2276 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2277 | input that the asm didn't implicitly pop. If the asm didn't | |
3f5cfed6 | 2278 | implicitly pop an input reg, that reg will still be live. |
114cbee6 RS |
2279 | |
2280 | Note that we can't use find_regno_note here: the register numbers | |
2281 | in the death notes have already been substituted. */ | |
2282 | ||
3f5cfed6 | 2283 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 2284 | if (STACK_REG_P (recog_data.operand[i])) |
3f5cfed6 JVA |
2285 | { |
2286 | int j; | |
2287 | ||
2288 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2289 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 JVA |
2290 | && note_kind[j] == REG_UNUSED) |
2291 | { | |
1ccbefce | 2292 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2293 | EMIT_AFTER); |
3f5cfed6 JVA |
2294 | break; |
2295 | } | |
2296 | } | |
2297 | ||
f62a15e3 | 2298 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2299 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2300 | { |
2301 | int j; | |
2302 | ||
2303 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2304 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 | 2305 | && note_kind[j] == REG_DEAD |
f62a15e3 | 2306 | && TEST_HARD_REG_BIT (regstack->reg_set, |
1ccbefce | 2307 | REGNO (recog_data.operand[i]))) |
114cbee6 | 2308 | { |
1ccbefce | 2309 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2310 | EMIT_AFTER); |
114cbee6 RS |
2311 | break; |
2312 | } | |
2313 | } | |
2314 | } | |
2315 | \f | |
48227150 JVA |
2316 | /* Substitute stack hard reg numbers for stack virtual registers in |
2317 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2318 | current stack content. Insns may be emitted as needed to arrange the | |
ecb63641 EB |
2319 | stack for the 387 based on the contents of the insn. Return whether |
2320 | a control flow insn was deleted in the process. */ | |
f37eb5cb | 2321 | |
ecb63641 | 2322 | static bool |
0c20a65f | 2323 | subst_stack_regs (rtx insn, stack regstack) |
48227150 | 2324 | { |
b3694847 | 2325 | rtx *note_link, note; |
ecb63641 | 2326 | bool control_flow_insn_deleted = false; |
b3694847 | 2327 | int i; |
48227150 | 2328 | |
4b4bf941 | 2329 | if (CALL_P (insn)) |
e075ae69 RH |
2330 | { |
2331 | int top = regstack->top; | |
48227150 | 2332 | |
e075ae69 RH |
2333 | /* If there are any floating point parameters to be passed in |
2334 | registers for this call, make sure they are in the right | |
2335 | order. */ | |
48227150 | 2336 | |
e075ae69 RH |
2337 | if (top >= 0) |
2338 | { | |
2339 | straighten_stack (PREV_INSN (insn), regstack); | |
99a59310 | 2340 | |
e075ae69 | 2341 | /* Now mark the arguments as dead after the call. */ |
99a59310 | 2342 | |
e075ae69 RH |
2343 | while (regstack->top >= 0) |
2344 | { | |
2345 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
2346 | regstack->top--; | |
2347 | } | |
2348 | } | |
2349 | } | |
48227150 JVA |
2350 | |
2351 | /* Do the actual substitution if any stack regs are mentioned. | |
2352 | Since we only record whether entire insn mentions stack regs, and | |
2353 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2354 | we must check each pattern in a parallel here. A call_value_pop could | |
0f41302f | 2355 | fail otherwise. */ |
48227150 | 2356 | |
21b2cd73 | 2357 | if (stack_regs_mentioned (insn)) |
48227150 | 2358 | { |
f62a15e3 | 2359 | int n_operands = asm_noperands (PATTERN (insn)); |
114cbee6 RS |
2360 | if (n_operands >= 0) |
2361 | { | |
2362 | /* This insn is an `asm' with operands. Decode the operands, | |
2363 | decide how many are inputs, and do register substitution. | |
0f41302f | 2364 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
114cbee6 | 2365 | |
f62a15e3 | 2366 | subst_asm_stack_regs (insn, regstack); |
ecb63641 | 2367 | return control_flow_insn_deleted; |
114cbee6 RS |
2368 | } |
2369 | ||
48227150 | 2370 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
c166a311 | 2371 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
48227150 JVA |
2372 | { |
2373 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
736b64dd JH |
2374 | { |
2375 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
2376 | XVECEXP (PATTERN (insn), 0, i) | |
2377 | = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); | |
2378 | control_flow_insn_deleted | |
2379 | |= subst_stack_regs_pat (insn, regstack, | |
2380 | XVECEXP (PATTERN (insn), 0, i)); | |
2381 | } | |
48227150 JVA |
2382 | } |
2383 | else | |
ecb63641 EB |
2384 | control_flow_insn_deleted |
2385 | |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
48227150 JVA |
2386 | } |
2387 | ||
2388 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
0f41302f | 2389 | REG_UNUSED will already have been dealt with, so just return. */ |
48227150 | 2390 | |
4b4bf941 | 2391 | if (NOTE_P (insn) || INSN_DELETED_P (insn)) |
ecb63641 | 2392 | return control_flow_insn_deleted; |
48227150 JVA |
2393 | |
2394 | /* If there is a REG_UNUSED note on a stack register on this insn, | |
2395 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2396 | since the form of the newly emitted pop insn references the reg, | |
0f41302f | 2397 | making it no longer `unset'. */ |
48227150 | 2398 | |
8e2e89f7 | 2399 | note_link = ®_NOTES (insn); |
48227150 JVA |
2400 | for (note = *note_link; note; note = XEXP (note, 1)) |
2401 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2402 | { | |
2403 | *note_link = XEXP (note, 1); | |
a05924f9 | 2404 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); |
48227150 JVA |
2405 | } |
2406 | else | |
2407 | note_link = &XEXP (note, 1); | |
ecb63641 EB |
2408 | |
2409 | return control_flow_insn_deleted; | |
48227150 JVA |
2410 | } |
2411 | \f | |
2412 | /* Change the organization of the stack so that it fits a new basic | |
2413 | block. Some registers might have to be popped, but there can never be | |
2414 | a register live in the new block that is not now live. | |
2415 | ||
a05924f9 JH |
2416 | Insert any needed insns before or after INSN, as indicated by |
2417 | WHERE. OLD is the original stack layout, and NEW is the desired | |
2418 | form. OLD is updated to reflect the code emitted, ie, it will be | |
2419 | the same as NEW upon return. | |
48227150 JVA |
2420 | |
2421 | This function will not preserve block_end[]. But that information | |
0f41302f | 2422 | is no longer needed once this has executed. */ |
48227150 JVA |
2423 | |
2424 | static void | |
0c20a65f | 2425 | change_stack (rtx insn, stack old, stack new, enum emit_where where) |
48227150 JVA |
2426 | { |
2427 | int reg; | |
a05924f9 | 2428 | int update_end = 0; |
48227150 | 2429 | |
a05924f9 JH |
2430 | /* We will be inserting new insns "backwards". If we are to insert |
2431 | after INSN, find the next insn, and insert before it. */ | |
48227150 | 2432 | |
a05924f9 JH |
2433 | if (where == EMIT_AFTER) |
2434 | { | |
a813c111 | 2435 | if (current_block && BB_END (current_block) == insn) |
a05924f9 JH |
2436 | update_end = 1; |
2437 | insn = NEXT_INSN (insn); | |
2438 | } | |
48227150 | 2439 | |
0f41302f | 2440 | /* Pop any registers that are not needed in the new block. */ |
48227150 JVA |
2441 | |
2442 | for (reg = old->top; reg >= 0; reg--) | |
2443 | if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
99a59310 | 2444 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), |
a05924f9 | 2445 | EMIT_BEFORE); |
48227150 JVA |
2446 | |
2447 | if (new->top == -2) | |
2448 | { | |
2449 | /* If the new block has never been processed, then it can inherit | |
0f41302f | 2450 | the old stack order. */ |
48227150 JVA |
2451 | |
2452 | new->top = old->top; | |
a05924f9 | 2453 | memcpy (new->reg, old->reg, sizeof (new->reg)); |
48227150 JVA |
2454 | } |
2455 | else | |
2456 | { | |
2457 | /* This block has been entered before, and we must match the | |
0f41302f | 2458 | previously selected stack order. */ |
48227150 JVA |
2459 | |
2460 | /* By now, the only difference should be the order of the stack, | |
0f41302f | 2461 | not their depth or liveliness. */ |
48227150 JVA |
2462 | |
2463 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); | |
48227150 | 2464 | abort (); |
48227150 | 2465 | win: |
48227150 JVA |
2466 | if (old->top != new->top) |
2467 | abort (); | |
2468 | ||
80832cf2 | 2469 | /* If the stack is not empty (new->top != -1), loop here emitting |
a6a2274a | 2470 | swaps until the stack is correct. |
80832cf2 HB |
2471 | |
2472 | The worst case number of swaps emitted is N + 2, where N is the | |
48227150 JVA |
2473 | depth of the stack. In some cases, the reg at the top of |
2474 | stack may be correct, but swapped anyway in order to fix | |
2475 | other regs. But since we never swap any other reg away from | |
0f41302f | 2476 | its correct slot, this algorithm will converge. */ |
48227150 | 2477 | |
80832cf2 HB |
2478 | if (new->top != -1) |
2479 | do | |
2480 | { | |
2481 | /* Swap the reg at top of stack into the position it is | |
2482 | supposed to be in, until the correct top of stack appears. */ | |
48227150 | 2483 | |
80832cf2 HB |
2484 | while (old->reg[old->top] != new->reg[new->top]) |
2485 | { | |
2486 | for (reg = new->top; reg >= 0; reg--) | |
2487 | if (new->reg[reg] == old->reg[old->top]) | |
2488 | break; | |
48227150 | 2489 | |
80832cf2 HB |
2490 | if (reg == -1) |
2491 | abort (); | |
48227150 | 2492 | |
80832cf2 HB |
2493 | emit_swap_insn (insn, old, |
2494 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2495 | } | |
48227150 | 2496 | |
80832cf2 | 2497 | /* See if any regs remain incorrect. If so, bring an |
48227150 | 2498 | incorrect reg to the top of stack, and let the while loop |
0f41302f | 2499 | above fix it. */ |
48227150 | 2500 | |
80832cf2 HB |
2501 | for (reg = new->top; reg >= 0; reg--) |
2502 | if (new->reg[reg] != old->reg[reg]) | |
2503 | { | |
2504 | emit_swap_insn (insn, old, | |
2505 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2506 | break; | |
2507 | } | |
2508 | } while (reg >= 0); | |
48227150 | 2509 | |
0f41302f | 2510 | /* At this point there must be no differences. */ |
48227150 JVA |
2511 | |
2512 | for (reg = old->top; reg >= 0; reg--) | |
2513 | if (old->reg[reg] != new->reg[reg]) | |
2514 | abort (); | |
2515 | } | |
a05924f9 JH |
2516 | |
2517 | if (update_end) | |
a813c111 | 2518 | BB_END (current_block) = PREV_INSN (insn); |
48227150 JVA |
2519 | } |
2520 | \f | |
a05924f9 | 2521 | /* Print stack configuration. */ |
48227150 JVA |
2522 | |
2523 | static void | |
0c20a65f | 2524 | print_stack (FILE *file, stack s) |
48227150 | 2525 | { |
a05924f9 JH |
2526 | if (! file) |
2527 | return; | |
48227150 | 2528 | |
a05924f9 JH |
2529 | if (s->top == -2) |
2530 | fprintf (file, "uninitialized\n"); | |
2531 | else if (s->top == -1) | |
2532 | fprintf (file, "empty\n"); | |
2533 | else | |
e075ae69 | 2534 | { |
a05924f9 JH |
2535 | int i; |
2536 | fputs ("[ ", file); | |
2537 | for (i = 0; i <= s->top; ++i) | |
2538 | fprintf (file, "%d ", s->reg[i]); | |
2539 | fputs ("]\n", file); | |
e075ae69 | 2540 | } |
a05924f9 JH |
2541 | } |
2542 | \f | |
2543 | /* This function was doing life analysis. We now let the regular live | |
a6a2274a | 2544 | code do it's job, so we only need to check some extra invariants |
a05924f9 JH |
2545 | that reg-stack expects. Primary among these being that all registers |
2546 | are initialized before use. | |
48227150 | 2547 | |
a05924f9 JH |
2548 | The function returns true when code was emitted to CFG edges and |
2549 | commit_edge_insertions needs to be called. */ | |
48227150 | 2550 | |
a05924f9 | 2551 | static int |
0c20a65f | 2552 | convert_regs_entry (void) |
a05924f9 | 2553 | { |
e0082a72 | 2554 | int inserted = 0; |
a05924f9 | 2555 | edge e; |
e0082a72 | 2556 | basic_block block; |
48227150 | 2557 | |
e0082a72 | 2558 | FOR_EACH_BB_REVERSE (block) |
48227150 | 2559 | { |
a05924f9 JH |
2560 | block_info bi = BLOCK_INFO (block); |
2561 | int reg; | |
a6a2274a | 2562 | |
a05924f9 JH |
2563 | /* Set current register status at last instruction `uninitialized'. */ |
2564 | bi->stack_in.top = -2; | |
a6a2274a | 2565 | |
a05924f9 JH |
2566 | /* Copy live_at_end and live_at_start into temporaries. */ |
2567 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
48227150 | 2568 | { |
a05924f9 JH |
2569 | if (REGNO_REG_SET_P (block->global_live_at_end, reg)) |
2570 | SET_HARD_REG_BIT (bi->out_reg_set, reg); | |
2571 | if (REGNO_REG_SET_P (block->global_live_at_start, reg)) | |
2572 | SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); | |
48227150 JVA |
2573 | } |
2574 | } | |
48227150 | 2575 | |
a6a2274a | 2576 | /* Load something into each stack register live at function entry. |
a05924f9 | 2577 | Such live registers can be caused by uninitialized variables or |
a6a2274a | 2578 | functions not returning values on all paths. In order to keep |
a05924f9 | 2579 | the push/pop code happy, and to not scrog the register stack, we |
a6a2274a | 2580 | must put something in these registers. Use a QNaN. |
48227150 | 2581 | |
d55d8fc7 | 2582 | Note that we are inserting converted code here. This code is |
a05924f9 | 2583 | never seen by the convert_regs pass. */ |
48227150 | 2584 | |
a05924f9 JH |
2585 | for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) |
2586 | { | |
2587 | basic_block block = e->dest; | |
2588 | block_info bi = BLOCK_INFO (block); | |
2589 | int reg, top = -1; | |
48227150 | 2590 | |
a05924f9 JH |
2591 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) |
2592 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2593 | { | |
2594 | rtx init; | |
48227150 | 2595 | |
a05924f9 | 2596 | bi->stack_in.reg[++top] = reg; |
48227150 | 2597 | |
a05924f9 JH |
2598 | init = gen_rtx_SET (VOIDmode, |
2599 | FP_MODE_REG (FIRST_STACK_REG, SFmode), | |
d2032ad8 | 2600 | not_a_num); |
a05924f9 JH |
2601 | insert_insn_on_edge (init, e); |
2602 | inserted = 1; | |
2603 | } | |
48227150 | 2604 | |
a05924f9 JH |
2605 | bi->stack_in.top = top; |
2606 | } | |
48227150 | 2607 | |
a05924f9 JH |
2608 | return inserted; |
2609 | } | |
48227150 | 2610 | |
a05924f9 JH |
2611 | /* Construct the desired stack for function exit. This will either |
2612 | be `empty', or the function return value at top-of-stack. */ | |
48227150 | 2613 | |
a05924f9 | 2614 | static void |
0c20a65f | 2615 | convert_regs_exit (void) |
a05924f9 JH |
2616 | { |
2617 | int value_reg_low, value_reg_high; | |
2618 | stack output_stack; | |
2619 | rtx retvalue; | |
48227150 | 2620 | |
a05924f9 JH |
2621 | retvalue = stack_result (current_function_decl); |
2622 | value_reg_low = value_reg_high = -1; | |
2623 | if (retvalue) | |
2624 | { | |
2625 | value_reg_low = REGNO (retvalue); | |
2626 | value_reg_high = value_reg_low | |
66fd46b6 | 2627 | + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1; |
a05924f9 | 2628 | } |
48227150 | 2629 | |
a05924f9 JH |
2630 | output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; |
2631 | if (value_reg_low == -1) | |
2632 | output_stack->top = -1; | |
2633 | else | |
2634 | { | |
2635 | int reg; | |
48227150 | 2636 | |
a05924f9 JH |
2637 | output_stack->top = value_reg_high - value_reg_low; |
2638 | for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
2639 | { | |
bc9c2952 | 2640 | output_stack->reg[value_reg_high - reg] = reg; |
a05924f9 JH |
2641 | SET_HARD_REG_BIT (output_stack->reg_set, reg); |
2642 | } | |
2643 | } | |
48227150 | 2644 | } |
48227150 | 2645 | |
0ecf09f9 JH |
2646 | /* Adjust the stack of this block on exit to match the stack of the |
2647 | target block, or copy stack info into the stack of the successor | |
2648 | of the successor hasn't been processed yet. */ | |
2649 | static bool | |
0c20a65f | 2650 | compensate_edge (edge e, FILE *file) |
0ecf09f9 JH |
2651 | { |
2652 | basic_block block = e->src, target = e->dest; | |
2653 | block_info bi = BLOCK_INFO (block); | |
2654 | struct stack_def regstack, tmpstack; | |
2655 | stack target_stack = &BLOCK_INFO (target)->stack_in; | |
2656 | int reg; | |
2657 | ||
2658 | current_block = block; | |
2659 | regstack = bi->stack_out; | |
2660 | if (file) | |
0b17ab2f | 2661 | fprintf (file, "Edge %d->%d: ", block->index, target->index); |
0ecf09f9 JH |
2662 | |
2663 | if (target_stack->top == -2) | |
2664 | { | |
2665 | /* The target block hasn't had a stack order selected. | |
2666 | We need merely ensure that no pops are needed. */ | |
2667 | for (reg = regstack.top; reg >= 0; --reg) | |
2668 | if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) | |
2669 | break; | |
2670 | ||
2671 | if (reg == -1) | |
2672 | { | |
2673 | if (file) | |
2674 | fprintf (file, "new block; copying stack position\n"); | |
2675 | ||
2676 | /* change_stack kills values in regstack. */ | |
2677 | tmpstack = regstack; | |
2678 | ||
a813c111 | 2679 | change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER); |
a6a2274a | 2680 | return false; |
0ecf09f9 JH |
2681 | } |
2682 | ||
2683 | if (file) | |
2684 | fprintf (file, "new block; pops needed\n"); | |
2685 | } | |
2686 | else | |
2687 | { | |
2688 | if (target_stack->top == regstack.top) | |
2689 | { | |
2690 | for (reg = target_stack->top; reg >= 0; --reg) | |
2691 | if (target_stack->reg[reg] != regstack.reg[reg]) | |
2692 | break; | |
2693 | ||
2694 | if (reg == -1) | |
2695 | { | |
2696 | if (file) | |
2697 | fprintf (file, "no changes needed\n"); | |
2698 | return false; | |
2699 | } | |
2700 | } | |
2701 | ||
2702 | if (file) | |
2703 | { | |
2704 | fprintf (file, "correcting stack to "); | |
2705 | print_stack (file, target_stack); | |
2706 | } | |
2707 | } | |
2708 | ||
2709 | /* Care for non-call EH edges specially. The normal return path have | |
2710 | values in registers. These will be popped en masse by the unwind | |
2711 | library. */ | |
2712 | if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) | |
2713 | target_stack->top = -1; | |
2714 | ||
2715 | /* Other calls may appear to have values live in st(0), but the | |
2716 | abnormal return path will not have actually loaded the values. */ | |
2717 | else if (e->flags & EDGE_ABNORMAL_CALL) | |
2718 | { | |
2719 | /* Assert that the lifetimes are as we expect -- one value | |
2720 | live at st(0) on the end of the source block, and no | |
2721 | values live at the beginning of the destination block. */ | |
2722 | HARD_REG_SET tmp; | |
2723 | ||
2724 | CLEAR_HARD_REG_SET (tmp); | |
2725 | GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); | |
2726 | abort (); | |
2727 | eh1: | |
2728 | ||
04989d15 JH |
2729 | /* We are sure that there is st(0) live, otherwise we won't compensate. |
2730 | For complex return values, we may have st(1) live as well. */ | |
0ecf09f9 | 2731 | SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); |
04989d15 JH |
2732 | if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1)) |
2733 | SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1); | |
0ecf09f9 JH |
2734 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); |
2735 | abort (); | |
2736 | eh2: | |
2737 | ||
2738 | target_stack->top = -1; | |
2739 | } | |
2740 | ||
2741 | /* It is better to output directly to the end of the block | |
2742 | instead of to the edge, because emit_swap can do minimal | |
2743 | insn scheduling. We can do this when there is only one | |
2744 | edge out, and it is not abnormal. */ | |
2745 | else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) | |
2746 | { | |
2747 | /* change_stack kills values in regstack. */ | |
2748 | tmpstack = regstack; | |
2749 | ||
a813c111 | 2750 | change_stack (BB_END (block), &tmpstack, target_stack, |
4b4bf941 | 2751 | (JUMP_P (BB_END (block)) |
0ecf09f9 JH |
2752 | ? EMIT_BEFORE : EMIT_AFTER)); |
2753 | } | |
2754 | else | |
2755 | { | |
2756 | rtx seq, after; | |
2757 | ||
2758 | /* We don't support abnormal edges. Global takes care to | |
2759 | avoid any live register across them, so we should never | |
2760 | have to insert instructions on such edges. */ | |
2761 | if (e->flags & EDGE_ABNORMAL) | |
2762 | abort (); | |
2763 | ||
2764 | current_block = NULL; | |
2765 | start_sequence (); | |
2766 | ||
2f937369 | 2767 | /* ??? change_stack needs some point to emit insns after. */ |
2e040219 | 2768 | after = emit_note (NOTE_INSN_DELETED); |
0ecf09f9 JH |
2769 | |
2770 | tmpstack = regstack; | |
2771 | change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); | |
2772 | ||
2f937369 | 2773 | seq = get_insns (); |
0ecf09f9 JH |
2774 | end_sequence (); |
2775 | ||
2776 | insert_insn_on_edge (seq, e); | |
2777 | return true; | |
2778 | } | |
2779 | return false; | |
2780 | } | |
2781 | ||
a05924f9 JH |
2782 | /* Convert stack register references in one block. */ |
2783 | ||
2784 | static int | |
0c20a65f | 2785 | convert_regs_1 (FILE *file, basic_block block) |
48227150 | 2786 | { |
0ecf09f9 | 2787 | struct stack_def regstack; |
a05924f9 | 2788 | block_info bi = BLOCK_INFO (block); |
de582cfb | 2789 | int deleted, inserted, reg; |
a05924f9 | 2790 | rtx insn, next; |
0ecf09f9 | 2791 | edge e, beste = NULL; |
ecb63641 | 2792 | bool control_flow_insn_deleted = false; |
48227150 | 2793 | |
0ecf09f9 | 2794 | inserted = 0; |
de582cfb | 2795 | deleted = 0; |
d6fc0492 | 2796 | any_malformed_asm = false; |
0ecf09f9 JH |
2797 | |
2798 | /* Find the edge we will copy stack from. It should be the most frequent | |
2799 | one as it will get cheapest after compensation code is generated, | |
ff7cc307 | 2800 | if multiple such exists, take one with largest count, prefer critical |
0ecf09f9 JH |
2801 | one (as splitting critical edges is more expensive), or one with lowest |
2802 | index, to avoid random changes with different orders of the edges. */ | |
2803 | for (e = block->pred; e ; e = e->pred_next) | |
2804 | { | |
2805 | if (e->flags & EDGE_DFS_BACK) | |
2806 | ; | |
2807 | else if (! beste) | |
2808 | beste = e; | |
2809 | else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) | |
2810 | beste = e; | |
3e42ccd2 JH |
2811 | else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) |
2812 | ; | |
0ecf09f9 JH |
2813 | else if (beste->count < e->count) |
2814 | beste = e; | |
2815 | else if (beste->count > e->count) | |
2816 | ; | |
4262e623 JH |
2817 | else if ((EDGE_CRITICAL_P (e) != 0) |
2818 | != (EDGE_CRITICAL_P (beste) != 0)) | |
0ecf09f9 | 2819 | { |
4262e623 | 2820 | if (EDGE_CRITICAL_P (e)) |
0ecf09f9 JH |
2821 | beste = e; |
2822 | } | |
0b17ab2f | 2823 | else if (e->src->index < beste->src->index) |
0ecf09f9 JH |
2824 | beste = e; |
2825 | } | |
2826 | ||
b3cd99cd | 2827 | /* Initialize stack at block entry. */ |
0ecf09f9 | 2828 | if (bi->stack_in.top == -2) |
b3cd99cd EB |
2829 | { |
2830 | if (beste) | |
2831 | inserted |= compensate_edge (beste, file); | |
2832 | else | |
2833 | { | |
2834 | /* No predecessors. Create an arbitrary input stack. */ | |
2835 | int reg; | |
2836 | ||
2837 | bi->stack_in.top = -1; | |
2838 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
2839 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2840 | bi->stack_in.reg[++bi->stack_in.top] = reg; | |
2841 | } | |
2842 | } | |
0ecf09f9 | 2843 | else |
b3cd99cd | 2844 | /* Entry blocks do have stack already initialized. */ |
0ecf09f9 | 2845 | beste = NULL; |
a6a2274a | 2846 | |
0ecf09f9 JH |
2847 | current_block = block; |
2848 | ||
a05924f9 | 2849 | if (file) |
48227150 | 2850 | { |
0b17ab2f | 2851 | fprintf (file, "\nBasic block %d\nInput stack: ", block->index); |
a05924f9 JH |
2852 | print_stack (file, &bi->stack_in); |
2853 | } | |
48227150 | 2854 | |
a05924f9 JH |
2855 | /* Process all insns in this block. Keep track of NEXT so that we |
2856 | don't process insns emitted while substituting in INSN. */ | |
a813c111 | 2857 | next = BB_HEAD (block); |
a05924f9 JH |
2858 | regstack = bi->stack_in; |
2859 | do | |
2860 | { | |
2861 | insn = next; | |
2862 | next = NEXT_INSN (insn); | |
48227150 | 2863 | |
a05924f9 JH |
2864 | /* Ensure we have not missed a block boundary. */ |
2865 | if (next == NULL) | |
2866 | abort (); | |
a813c111 | 2867 | if (insn == BB_END (block)) |
a05924f9 JH |
2868 | next = NULL; |
2869 | ||
2870 | /* Don't bother processing unless there is a stack reg | |
2871 | mentioned or if it's a CALL_INSN. */ | |
2872 | if (stack_regs_mentioned (insn) | |
4b4bf941 | 2873 | || CALL_P (insn)) |
a05924f9 JH |
2874 | { |
2875 | if (file) | |
2876 | { | |
2877 | fprintf (file, " insn %d input stack: ", | |
2878 | INSN_UID (insn)); | |
2879 | print_stack (file, ®stack); | |
2880 | } | |
ecb63641 | 2881 | control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); |
48227150 | 2882 | } |
a05924f9 JH |
2883 | } |
2884 | while (next); | |
48227150 | 2885 | |
a05924f9 JH |
2886 | if (file) |
2887 | { | |
2888 | fprintf (file, "Expected live registers ["); | |
2889 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2890 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
2891 | fprintf (file, " %d", reg); | |
2892 | fprintf (file, " ]\nOutput stack: "); | |
2893 | print_stack (file, ®stack); | |
2894 | } | |
48227150 | 2895 | |
a813c111 | 2896 | insn = BB_END (block); |
4b4bf941 | 2897 | if (JUMP_P (insn)) |
a05924f9 JH |
2898 | insn = PREV_INSN (insn); |
2899 | ||
2900 | /* If the function is declared to return a value, but it returns one | |
2901 | in only some cases, some registers might come live here. Emit | |
2902 | necessary moves for them. */ | |
2903 | ||
2904 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2905 | { | |
2906 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
2907 | && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
48227150 | 2908 | { |
a05924f9 | 2909 | rtx set; |
48227150 | 2910 | |
a05924f9 JH |
2911 | if (file) |
2912 | { | |
2913 | fprintf (file, "Emitting insn initializing reg %d\n", | |
2914 | reg); | |
2915 | } | |
48227150 | 2916 | |
a05924f9 | 2917 | set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), |
d2032ad8 | 2918 | not_a_num); |
3c030e88 | 2919 | insn = emit_insn_after (set, insn); |
ecb63641 | 2920 | control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); |
a05924f9 JH |
2921 | } |
2922 | } | |
de582cfb EB |
2923 | |
2924 | /* Amongst the insns possibly deleted during the substitution process above, | |
2925 | might have been the only trapping insn in the block. We purge the now | |
2926 | possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, | |
2927 | called at the end of convert_regs. The order in which we process the | |
2928 | blocks ensures that we never delete an already processed edge. | |
2929 | ||
ecb63641 EB |
2930 | Note that, at this point, the CFG may have been damaged by the emission |
2931 | of instructions after an abnormal call, which moves the basic block end | |
2932 | (and is the reason why we call fixup_abnormal_edges later). So we must | |
2933 | be sure that the trapping insn has been deleted before trying to purge | |
2934 | dead edges, otherwise we risk purging valid edges. | |
2935 | ||
de582cfb EB |
2936 | ??? We are normally supposed not to delete trapping insns, so we pretend |
2937 | that the insns deleted above don't actually trap. It would have been | |
2938 | better to detect this earlier and avoid creating the EH edge in the first | |
2939 | place, still, but we don't have enough information at that time. */ | |
2940 | ||
ecb63641 | 2941 | if (control_flow_insn_deleted) |
de582cfb | 2942 | purge_dead_edges (block); |
48227150 | 2943 | |
d6fc0492 RH |
2944 | /* Something failed if the stack lives don't match. If we had malformed |
2945 | asms, we zapped the instruction itself, but that didn't produce the | |
2946 | same pattern of register kills as before. */ | |
a05924f9 | 2947 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); |
d6fc0492 RH |
2948 | if (!any_malformed_asm) |
2949 | abort (); | |
a05924f9 | 2950 | win: |
0ecf09f9 | 2951 | bi->stack_out = regstack; |
48227150 | 2952 | |
0ecf09f9 | 2953 | /* Compensate the back edges, as those wasn't visited yet. */ |
a05924f9 JH |
2954 | for (e = block->succ; e ; e = e->succ_next) |
2955 | { | |
0ecf09f9 JH |
2956 | if (e->flags & EDGE_DFS_BACK |
2957 | || (e->dest == EXIT_BLOCK_PTR)) | |
a05924f9 | 2958 | { |
0ecf09f9 JH |
2959 | if (!BLOCK_INFO (e->dest)->done |
2960 | && e->dest != block) | |
2961 | abort (); | |
a6a2274a | 2962 | inserted |= compensate_edge (e, file); |
e075ae69 | 2963 | } |
0ecf09f9 JH |
2964 | } |
2965 | for (e = block->pred; e ; e = e->pred_next) | |
2966 | { | |
2967 | if (e != beste && !(e->flags & EDGE_DFS_BACK) | |
2968 | && e->src != ENTRY_BLOCK_PTR) | |
a05924f9 | 2969 | { |
0ecf09f9 | 2970 | if (!BLOCK_INFO (e->src)->done) |
a05924f9 | 2971 | abort (); |
a6a2274a | 2972 | inserted |= compensate_edge (e, file); |
a05924f9 | 2973 | } |
e075ae69 | 2974 | } |
a05924f9 JH |
2975 | |
2976 | return inserted; | |
48227150 | 2977 | } |
48227150 | 2978 | |
a05924f9 JH |
2979 | /* Convert registers in all blocks reachable from BLOCK. */ |
2980 | ||
2981 | static int | |
0c20a65f | 2982 | convert_regs_2 (FILE *file, basic_block block) |
48227150 | 2983 | { |
a05924f9 JH |
2984 | basic_block *stack, *sp; |
2985 | int inserted; | |
48227150 | 2986 | |
de582cfb EB |
2987 | /* We process the blocks in a top-down manner, in a way such that one block |
2988 | is only processed after all its predecessors. The number of predecessors | |
2989 | of every block has already been computed. */ | |
2990 | ||
703ad42b | 2991 | stack = xmalloc (sizeof (*stack) * n_basic_blocks); |
a05924f9 | 2992 | sp = stack; |
48227150 | 2993 | |
a05924f9 | 2994 | *sp++ = block; |
48227150 | 2995 | |
a05924f9 JH |
2996 | inserted = 0; |
2997 | do | |
2998 | { | |
2999 | edge e; | |
48227150 | 3000 | |
a05924f9 | 3001 | block = *--sp; |
48227150 | 3002 | |
b3cd99cd EB |
3003 | /* Processing BLOCK is achieved by convert_regs_1, which may purge |
3004 | some dead EH outgoing edge after the deletion of the trapping | |
3005 | insn inside the block. Since the number of predecessors of | |
3006 | BLOCK's successors was computed based on the initial edge set, | |
3007 | we check the necessity to process some of these successors | |
3008 | before such an edge deletion may happen. However, there is | |
3009 | a pitfall: if BLOCK is the only predecessor of a successor and | |
3010 | the edge between them happens to be deleted, the successor | |
3011 | becomes unreachable and should not be processed. The problem | |
3012 | is that there is no way to preventively detect this case so we | |
3013 | stack the successor in all cases and hand over the task of | |
3014 | fixing up the discrepancy to convert_regs_1. */ | |
3015 | ||
a05924f9 | 3016 | for (e = block->succ; e ; e = e->succ_next) |
0ecf09f9 | 3017 | if (! (e->flags & EDGE_DFS_BACK)) |
a05924f9 | 3018 | { |
754d9299 JM |
3019 | BLOCK_INFO (e->dest)->predecessors--; |
3020 | if (!BLOCK_INFO (e->dest)->predecessors) | |
0ecf09f9 | 3021 | *sp++ = e->dest; |
a05924f9 | 3022 | } |
de582cfb EB |
3023 | |
3024 | inserted |= convert_regs_1 (file, block); | |
3025 | BLOCK_INFO (block)->done = 1; | |
48227150 | 3026 | } |
a05924f9 JH |
3027 | while (sp != stack); |
3028 | ||
3029 | return inserted; | |
48227150 | 3030 | } |
841fc5a1 | 3031 | |
a05924f9 JH |
3032 | /* Traverse all basic blocks in a function, converting the register |
3033 | references in each insn from the "flat" register file that gcc uses, | |
3034 | to the stack-like registers the 387 uses. */ | |
3035 | ||
3036 | static int | |
0c20a65f | 3037 | convert_regs (FILE *file) |
48227150 | 3038 | { |
e0082a72 ZD |
3039 | int inserted; |
3040 | basic_block b; | |
a05924f9 | 3041 | edge e; |
48227150 | 3042 | |
a05924f9 JH |
3043 | /* Initialize uninitialized registers on function entry. */ |
3044 | inserted = convert_regs_entry (); | |
48227150 | 3045 | |
a05924f9 JH |
3046 | /* Construct the desired stack for function exit. */ |
3047 | convert_regs_exit (); | |
3048 | BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; | |
48227150 | 3049 | |
a05924f9 JH |
3050 | /* ??? Future: process inner loops first, and give them arbitrary |
3051 | initial stacks which emit_swap_insn can modify. This ought to | |
1ae58c30 | 3052 | prevent double fxch that often appears at the head of a loop. */ |
48227150 | 3053 | |
a05924f9 JH |
3054 | /* Process all blocks reachable from all entry points. */ |
3055 | for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) | |
3056 | inserted |= convert_regs_2 (file, e->dest); | |
a6a2274a KH |
3057 | |
3058 | /* ??? Process all unreachable blocks. Though there's no excuse | |
a05924f9 | 3059 | for keeping these even when not optimizing. */ |
e0082a72 | 3060 | FOR_EACH_BB (b) |
a05924f9 | 3061 | { |
a05924f9 | 3062 | block_info bi = BLOCK_INFO (b); |
48227150 | 3063 | |
a05924f9 | 3064 | if (! bi->done) |
b3cd99cd | 3065 | inserted |= convert_regs_2 (file, b); |
a05924f9 | 3066 | } |
9dca2ad5 | 3067 | clear_aux_for_blocks (); |
48227150 | 3068 | |
068473ec | 3069 | fixup_abnormal_edges (); |
a05924f9 JH |
3070 | if (inserted) |
3071 | commit_edge_insertions (); | |
48227150 | 3072 | |
a05924f9 JH |
3073 | if (file) |
3074 | fputc ('\n', file); | |
48227150 | 3075 | |
a05924f9 | 3076 | return inserted; |
48227150 | 3077 | } |
48227150 | 3078 | #endif /* STACK_REGS */ |
e2500fed GK |
3079 | |
3080 | #include "gt-reg-stack.h" |