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535825e6 | 1 | /* Register to Stack convert for GNU compiler. |
d353bf18 | 2 | Copyright (C) 1992-2015 Free Software Foundation, Inc. |
535825e6 | 3 | |
f12b58b3 | 4 | This file is part of GCC. |
535825e6 | 5 | |
f12b58b3 | 6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by | |
8c4c00c1 | 8 | the Free Software Foundation; either version 3, or (at your option) |
f3d96a58 | 9 | any later version. |
535825e6 | 10 | |
f12b58b3 | 11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
535825e6 | 15 | |
f3d96a58 | 16 | You should have received a copy of the GNU General Public License |
8c4c00c1 | 17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
535825e6 | 19 | |
20 | /* This pass converts stack-like registers from the "flat register | |
21 | file" model that gcc uses, to a stack convention that the 387 uses. | |
22 | ||
23 | * The form of the input: | |
24 | ||
25 | On input, the function consists of insn that have had their | |
26 | registers fully allocated to a set of "virtual" registers. Note that | |
27 | the word "virtual" is used differently here than elsewhere in gcc: for | |
28 | each virtual stack reg, there is a hard reg, but the mapping between | |
29 | them is not known until this pass is run. On output, hard register | |
30 | numbers have been substituted, and various pop and exchange insns have | |
31 | been emitted. The hard register numbers and the virtual register | |
32 | numbers completely overlap - before this pass, all stack register | |
bed3e6b4 | 33 | numbers are virtual, and afterward they are all hard. |
535825e6 | 34 | |
35 | The virtual registers can be manipulated normally by gcc, and their | |
36 | semantics are the same as for normal registers. After the hard | |
37 | register numbers are substituted, the semantics of an insn containing | |
38 | stack-like regs are not the same as for an insn with normal regs: for | |
39 | instance, it is not safe to delete an insn that appears to be a no-op | |
40 | move. In general, no insn containing hard regs should be changed | |
41 | after this pass is done. | |
42 | ||
43 | * The form of the output: | |
44 | ||
45 | After this pass, hard register numbers represent the distance from | |
46 | the current top of stack to the desired register. A reference to | |
47 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
48 | represents the register just below that, and so forth. Also, REG_DEAD | |
49 | notes indicate whether or not a stack register should be popped. | |
50 | ||
51 | A "swap" insn looks like a parallel of two patterns, where each | |
52 | pattern is a SET: one sets A to B, the other B to A. | |
53 | ||
54 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
55 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
56 | will replace the existing stack top, not push a new value. | |
57 | ||
58 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
59 | SET_SRC is REG or MEM. | |
60 | ||
fc738e1d | 61 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
535825e6 | 62 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
63 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
64 | ||
65 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
66 | the top of the register stack. If there is no REG_DEAD note, then the | |
67 | insn represents a "dup" or a push of the current top of stack onto the | |
68 | stack. | |
69 | ||
70 | * Methodology: | |
71 | ||
72 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
73 | deleted and recreated from scratch. REG_DEAD is never created for a | |
74 | SET_DEST, only REG_UNUSED. | |
75 | ||
bed3e6b4 | 76 | * asm_operands: |
535825e6 | 77 | |
bed3e6b4 | 78 | There are several rules on the usage of stack-like regs in |
79 | asm_operands insns. These rules apply only to the operands that are | |
80 | stack-like regs: | |
81 | ||
82 | 1. Given a set of input regs that die in an asm_operands, it is | |
83 | necessary to know which are implicitly popped by the asm, and | |
84 | which must be explicitly popped by gcc. | |
85 | ||
86 | An input reg that is implicitly popped by the asm must be | |
87 | explicitly clobbered, unless it is constrained to match an | |
88 | output operand. | |
89 | ||
90 | 2. For any input reg that is implicitly popped by an asm, it is | |
91 | necessary to know how to adjust the stack to compensate for the pop. | |
92 | If any non-popped input is closer to the top of the reg-stack than | |
93 | the implicitly popped reg, it would not be possible to know what the | |
94 | stack looked like - it's not clear how the rest of the stack "slides | |
95 | up". | |
96 | ||
97 | All implicitly popped input regs must be closer to the top of | |
98 | the reg-stack than any input that is not implicitly popped. | |
99 | ||
100 | 3. It is possible that if an input dies in an insn, reload might | |
101 | use the input reg for an output reload. Consider this example: | |
102 | ||
103 | asm ("foo" : "=t" (a) : "f" (b)); | |
104 | ||
105 | This asm says that input B is not popped by the asm, and that | |
0c6d8c36 | 106 | the asm pushes a result onto the reg-stack, i.e., the stack is one |
bed3e6b4 | 107 | deeper after the asm than it was before. But, it is possible that |
108 | reload will think that it can use the same reg for both the input and | |
109 | the output, if input B dies in this insn. | |
110 | ||
111 | If any input operand uses the "f" constraint, all output reg | |
112 | constraints must use the "&" earlyclobber. | |
113 | ||
114 | The asm above would be written as | |
115 | ||
116 | asm ("foo" : "=&t" (a) : "f" (b)); | |
117 | ||
118 | 4. Some operands need to be in particular places on the stack. All | |
119 | output operands fall in this category - there is no other way to | |
120 | know which regs the outputs appear in unless the user indicates | |
121 | this in the constraints. | |
122 | ||
123 | Output operands must specifically indicate which reg an output | |
124 | appears in after an asm. "=f" is not allowed: the operand | |
125 | constraints must select a class with a single reg. | |
126 | ||
127 | 5. Output operands may not be "inserted" between existing stack regs. | |
128 | Since no 387 opcode uses a read/write operand, all output operands | |
129 | are dead before the asm_operands, and are pushed by the asm_operands. | |
130 | It makes no sense to push anywhere but the top of the reg-stack. | |
131 | ||
132 | Output operands must start at the top of the reg-stack: output | |
133 | operands may not "skip" a reg. | |
134 | ||
135 | 6. Some asm statements may need extra stack space for internal | |
136 | calculations. This can be guaranteed by clobbering stack registers | |
137 | unrelated to the inputs and outputs. | |
138 | ||
139 | Here are a couple of reasonable asms to want to write. This asm | |
140 | takes one input, which is internally popped, and produces two outputs. | |
141 | ||
142 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
143 | ||
144 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
145 | and replaces them with one output. The user must code the "st(1)" | |
146 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
147 | ||
148 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
149 | ||
f3d96a58 | 150 | */ |
535825e6 | 151 | \f |
535825e6 | 152 | #include "config.h" |
405711de | 153 | #include "system.h" |
805e22b2 | 154 | #include "coretypes.h" |
9ef16211 | 155 | #include "backend.h" |
7c29e30e | 156 | #include "target.h" |
9ef16211 | 157 | #include "rtl.h" |
7c29e30e | 158 | #include "tree.h" |
9ef16211 | 159 | #include "df.h" |
7953c610 | 160 | #include "tm_p.h" |
bed3e6b4 | 161 | #include "insn-config.h" |
535825e6 | 162 | #include "regs.h" |
7c29e30e | 163 | #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ |
ce71a9e6 | 164 | #include "recog.h" |
7c29e30e | 165 | #include "alias.h" |
166 | #include "varasm.h" | |
167 | #include "rtl-error.h" | |
168 | #include "flags.h" | |
94ea8568 | 169 | #include "cfgrtl.h" |
170 | #include "cfganal.h" | |
171 | #include "cfgbuild.h" | |
172 | #include "cfgcleanup.h" | |
f388bf5f | 173 | #include "reload.h" |
77fce4cd | 174 | #include "tree-pass.h" |
db1b48f5 | 175 | #include "rtl-iter.h" |
9500df50 | 176 | |
a50d6416 | 177 | #ifdef STACK_REGS |
178 | ||
1f3233d1 | 179 | /* We use this array to cache info about insns, because otherwise we |
180 | spend too much time in stack_regs_mentioned_p. | |
181 | ||
182 | Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
183 | the insn uses stack registers, two indicates the insn does not use | |
184 | stack registers. */ | |
f1f41a6c | 185 | static vec<char> stack_regs_mentioned_data; |
535825e6 | 186 | |
535825e6 | 187 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) |
188 | ||
3e6933a8 | 189 | int regstack_completed = 0; |
190 | ||
535825e6 | 191 | /* This is the basic stack record. TOP is an index into REG[] such |
192 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
193 | ||
5e7a3068 | 194 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
195 | consists of placing each live reg in array `reg' and setting `top' | |
196 | appropriately. | |
197 | ||
198 | REG_SET indicates which registers are live. */ | |
535825e6 | 199 | |
200 | typedef struct stack_def | |
201 | { | |
202 | int top; /* index to top stack element */ | |
203 | HARD_REG_SET reg_set; /* set of live registers */ | |
32478e31 | 204 | unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ |
2b15d2ba | 205 | } *stack_ptr; |
535825e6 | 206 | |
2617fe26 | 207 | /* This is used to carry information about basic blocks. It is |
f3d96a58 | 208 | attached to the AUX field of the standard CFG block. */ |
535825e6 | 209 | |
f3d96a58 | 210 | typedef struct block_info_def |
211 | { | |
212 | struct stack_def stack_in; /* Input stack configuration. */ | |
ecb7b891 | 213 | struct stack_def stack_out; /* Output stack configuration. */ |
f3d96a58 | 214 | HARD_REG_SET out_reg_set; /* Stack regs live on output. */ |
215 | int done; /* True if block already converted. */ | |
d1b17fc8 | 216 | int predecessors; /* Number of predecessors that need |
ecb7b891 | 217 | to be visited. */ |
f3d96a58 | 218 | } *block_info; |
535825e6 | 219 | |
f3d96a58 | 220 | #define BLOCK_INFO(B) ((block_info) (B)->aux) |
535825e6 | 221 | |
f3d96a58 | 222 | /* Passed to change_stack to indicate where to emit insns. */ |
223 | enum emit_where | |
224 | { | |
225 | EMIT_AFTER, | |
226 | EMIT_BEFORE | |
227 | }; | |
535825e6 | 228 | |
f3d96a58 | 229 | /* The block we're currently working on. */ |
230 | static basic_block current_block; | |
231 | ||
9d97464a | 232 | /* In the current_block, whether we're processing the first register |
e4da226b | 233 | stack or call instruction, i.e. the regstack is currently the |
9d97464a | 234 | same as BLOCK_INFO(current_block)->stack_in. */ |
235 | static bool starting_stack_p; | |
236 | ||
45498ea1 | 237 | /* This is the register file for all register after conversion. */ |
a5dff55e | 238 | static rtx |
239 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
240 | ||
241 | #define FP_MODE_REG(regno,mode) \ | |
33181afc | 242 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) |
535825e6 | 243 | |
f3d96a58 | 244 | /* Used to initialize uninitialized registers. */ |
62ec6441 | 245 | static rtx not_a_num; |
535825e6 | 246 | |
535825e6 | 247 | /* Forward declarations */ |
248 | ||
5493cb9a | 249 | static int stack_regs_mentioned_p (const_rtx pat); |
2b15d2ba | 250 | static void pop_stack (stack_ptr, int); |
3ad4992f | 251 | static rtx *get_true_reg (rtx *); |
252 | ||
8fe8e576 | 253 | static int check_asm_stack_operands (rtx_insn *); |
78f55ca8 | 254 | static void get_asm_operands_in_out (rtx, int *, int *); |
3ad4992f | 255 | static rtx stack_result (tree); |
256 | static void replace_reg (rtx *, int); | |
8fe8e576 | 257 | static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); |
2b15d2ba | 258 | static int get_hard_regnum (stack_ptr, rtx); |
8fe8e576 | 259 | static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); |
260 | static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); | |
261 | static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); | |
262 | static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); | |
3ad4992f | 263 | static int swap_rtx_condition_1 (rtx); |
8fe8e576 | 264 | static int swap_rtx_condition (rtx_insn *); |
265 | static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx); | |
266 | static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); | |
267 | static void subst_asm_stack_regs (rtx_insn *, stack_ptr); | |
268 | static bool subst_stack_regs (rtx_insn *, stack_ptr); | |
269 | static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); | |
2b15d2ba | 270 | static void print_stack (FILE *, stack_ptr); |
8fe8e576 | 271 | static rtx_insn *next_flags_user (rtx_insn *); |
b67ec609 | 272 | \f |
7fd957fe | 273 | /* Return nonzero if any stack register is mentioned somewhere within PAT. */ |
b67ec609 | 274 | |
275 | static int | |
5493cb9a | 276 | stack_regs_mentioned_p (const_rtx pat) |
b67ec609 | 277 | { |
19cb6b50 | 278 | const char *fmt; |
279 | int i; | |
ce71a9e6 | 280 | |
281 | if (STACK_REG_P (pat)) | |
282 | return 1; | |
283 | ||
284 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
285 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
b67ec609 | 286 | { |
ce71a9e6 | 287 | if (fmt[i] == 'E') |
288 | { | |
19cb6b50 | 289 | int j; |
ce71a9e6 | 290 | |
291 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
292 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
293 | return 1; | |
294 | } | |
295 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
296 | return 1; | |
b67ec609 | 297 | } |
ce71a9e6 | 298 | |
b67ec609 | 299 | return 0; |
300 | } | |
301 | ||
ce71a9e6 | 302 | /* Return nonzero if INSN mentions stacked registers, else return zero. */ |
b67ec609 | 303 | |
304 | int | |
5493cb9a | 305 | stack_regs_mentioned (const_rtx insn) |
b67ec609 | 306 | { |
ce71a9e6 | 307 | unsigned int uid, max; |
308 | int test; | |
309 | ||
f1f41a6c | 310 | if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) |
b67ec609 | 311 | return 0; |
ce71a9e6 | 312 | |
b67ec609 | 313 | uid = INSN_UID (insn); |
f1f41a6c | 314 | max = stack_regs_mentioned_data.length (); |
ce71a9e6 | 315 | if (uid >= max) |
316 | { | |
317 | /* Allocate some extra size to avoid too many reallocs, but | |
318 | do not grow too quickly. */ | |
9500df50 | 319 | max = uid + uid / 20 + 1; |
f1f41a6c | 320 | stack_regs_mentioned_data.safe_grow_cleared (max); |
ce71a9e6 | 321 | } |
322 | ||
f1f41a6c | 323 | test = stack_regs_mentioned_data[uid]; |
ce71a9e6 | 324 | if (test == 0) |
325 | { | |
326 | /* This insn has yet to be examined. Do so now. */ | |
327 | test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
f1f41a6c | 328 | stack_regs_mentioned_data[uid] = test; |
ce71a9e6 | 329 | } |
330 | ||
331 | return test == 1; | |
b67ec609 | 332 | } |
ce71a9e6 | 333 | \f |
334 | static rtx ix86_flags_rtx; | |
b67ec609 | 335 | |
8fe8e576 | 336 | static rtx_insn * |
337 | next_flags_user (rtx_insn *insn) | |
ce71a9e6 | 338 | { |
2617fe26 | 339 | /* Search forward looking for the first use of this value. |
ce71a9e6 | 340 | Stop at block boundaries. */ |
ce71a9e6 | 341 | |
5496dbfc | 342 | while (insn != BB_END (current_block)) |
ce71a9e6 | 343 | { |
344 | insn = NEXT_INSN (insn); | |
ce71a9e6 | 345 | |
9204e736 | 346 | if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) |
2617fe26 | 347 | return insn; |
ce71a9e6 | 348 | |
6d7dc5b9 | 349 | if (CALL_P (insn)) |
8fe8e576 | 350 | return NULL; |
ce71a9e6 | 351 | } |
8fe8e576 | 352 | return NULL; |
ce71a9e6 | 353 | } |
535825e6 | 354 | \f |
9d97464a | 355 | /* Reorganize the stack into ascending numbers, before this insn. */ |
a5dff55e | 356 | |
357 | static void | |
8fe8e576 | 358 | straighten_stack (rtx_insn *insn, stack_ptr regstack) |
a5dff55e | 359 | { |
360 | struct stack_def temp_stack; | |
361 | int top; | |
362 | ||
f43291cf | 363 | /* If there is only a single register on the stack, then the stack is |
364 | already in increasing order and no reorganization is needed. | |
365 | ||
366 | Similarly if the stack is empty. */ | |
367 | if (regstack->top <= 0) | |
368 | return; | |
369 | ||
58bf3e9d | 370 | COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); |
a5dff55e | 371 | |
372 | for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
ce71a9e6 | 373 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; |
2617fe26 | 374 | |
9d97464a | 375 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); |
a5dff55e | 376 | } |
a97edd5b | 377 | |
45498ea1 | 378 | /* Pop a register from the stack. */ |
a97edd5b | 379 | |
380 | static void | |
2b15d2ba | 381 | pop_stack (stack_ptr regstack, int regno) |
a97edd5b | 382 | { |
383 | int top = regstack->top; | |
384 | ||
385 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
386 | regstack->top--; | |
45498ea1 | 387 | /* If regno was not at the top of stack then adjust stack. */ |
a97edd5b | 388 | if (regstack->reg [top] != regno) |
389 | { | |
390 | int i; | |
391 | for (i = regstack->top; i >= 0; i--) | |
392 | if (regstack->reg [i] == regno) | |
393 | { | |
394 | int j; | |
395 | for (j = i; j < top; j++) | |
396 | regstack->reg [j] = regstack->reg [j + 1]; | |
397 | break; | |
398 | } | |
399 | } | |
400 | } | |
535825e6 | 401 | \f |
402 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
403 | REG, possible enclosed by a conversion rtx, return the inner part of | |
a92771b8 | 404 | PAT that stopped the search. */ |
535825e6 | 405 | |
406 | static rtx * | |
3ad4992f | 407 | get_true_reg (rtx *pat) |
535825e6 | 408 | { |
a5dff55e | 409 | for (;;) |
ce71a9e6 | 410 | switch (GET_CODE (*pat)) |
a5dff55e | 411 | { |
ce71a9e6 | 412 | case SUBREG: |
974e2c0c | 413 | /* Eliminate FP subregister accesses in favor of the |
ce71a9e6 | 414 | actual FP register in use. */ |
415 | { | |
416 | rtx subreg; | |
c2dd480c | 417 | if (STACK_REG_P (subreg = SUBREG_REG (*pat))) |
a5dff55e | 418 | { |
701e46d0 | 419 | int regno_off = subreg_regno_offset (REGNO (subreg), |
420 | GET_MODE (subreg), | |
421 | SUBREG_BYTE (*pat), | |
422 | GET_MODE (*pat)); | |
423 | *pat = FP_MODE_REG (REGNO (subreg) + regno_off, | |
a5dff55e | 424 | GET_MODE (subreg)); |
a5dff55e | 425 | return pat; |
426 | } | |
ce71a9e6 | 427 | } |
428 | case FLOAT: | |
429 | case FIX: | |
430 | case FLOAT_EXTEND: | |
431 | pat = & XEXP (*pat, 0); | |
994db390 | 432 | break; |
433 | ||
fafa4a36 | 434 | case UNSPEC: |
05986501 | 435 | if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP |
cb5d0a18 | 436 | || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) |
738a6975 | 437 | pat = & XVECEXP (*pat, 0, 0); |
438 | return pat; | |
fafa4a36 | 439 | |
994db390 | 440 | case FLOAT_TRUNCATE: |
441 | if (!flag_unsafe_math_optimizations) | |
442 | return pat; | |
443 | pat = & XEXP (*pat, 0); | |
444 | break; | |
2d0ff363 | 445 | |
446 | default: | |
447 | return pat; | |
a5dff55e | 448 | } |
535825e6 | 449 | } |
535825e6 | 450 | \f |
299a3cdd | 451 | /* Set if we find any malformed asms in a block. */ |
452 | static bool any_malformed_asm; | |
453 | ||
f3d96a58 | 454 | /* There are many rules that an asm statement for stack-like regs must |
bed3e6b4 | 455 | follow. Those rules are explained at the top of this file: the rule |
a92771b8 | 456 | numbers below refer to that explanation. */ |
bed3e6b4 | 457 | |
f3d96a58 | 458 | static int |
8fe8e576 | 459 | check_asm_stack_operands (rtx_insn *insn) |
bed3e6b4 | 460 | { |
461 | int i; | |
bed3e6b4 | 462 | int n_clobbers; |
463 | int malformed_asm = 0; | |
464 | rtx body = PATTERN (insn); | |
465 | ||
f3d96a58 | 466 | char reg_used_as_output[FIRST_PSEUDO_REGISTER]; |
467 | char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
bed3e6b4 | 468 | |
ef2c4a29 | 469 | rtx *clobber_reg = 0; |
78e49515 | 470 | int n_inputs, n_outputs; |
bed3e6b4 | 471 | |
d315aa96 | 472 | /* Find out what the constraints require. If no constraint |
71ed03a4 | 473 | alternative matches, this asm is malformed. */ |
835b8178 | 474 | extract_constrain_insn (insn); |
78e49515 | 475 | |
8eaaac4d | 476 | preprocess_constraints (insn); |
78e49515 | 477 | |
78f55ca8 | 478 | get_asm_operands_in_out (body, &n_outputs, &n_inputs); |
78e49515 | 479 | |
757fefec | 480 | if (which_alternative < 0) |
78e49515 | 481 | { |
482 | malformed_asm = 1; | |
483 | /* Avoid further trouble with this insn. */ | |
484 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
f3d96a58 | 485 | return 0; |
78e49515 | 486 | } |
89a7a6a5 | 487 | const operand_alternative *op_alt = which_op_alt (); |
bed3e6b4 | 488 | |
a92771b8 | 489 | /* Strip SUBREGs here to make the following code simpler. */ |
ed420a25 | 490 | for (i = 0; i < recog_data.n_operands; i++) |
491 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
8ad4c111 | 492 | && REG_P (SUBREG_REG (recog_data.operand[i]))) |
ed420a25 | 493 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); |
bed3e6b4 | 494 | |
495 | /* Set up CLOBBER_REG. */ | |
496 | ||
497 | n_clobbers = 0; | |
bed3e6b4 | 498 | |
499 | if (GET_CODE (body) == PARALLEL) | |
fc738e1d | 500 | { |
f7f3687c | 501 | clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); |
bed3e6b4 | 502 | |
fc738e1d | 503 | for (i = 0; i < XVECLEN (body, 0); i++) |
504 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
505 | { | |
506 | rtx clobber = XVECEXP (body, 0, i); | |
507 | rtx reg = XEXP (clobber, 0); | |
bed3e6b4 | 508 | |
8ad4c111 | 509 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
fc738e1d | 510 | reg = SUBREG_REG (reg); |
511 | ||
512 | if (STACK_REG_P (reg)) | |
513 | { | |
514 | clobber_reg[n_clobbers] = reg; | |
515 | n_clobbers++; | |
516 | } | |
517 | } | |
518 | } | |
bed3e6b4 | 519 | |
520 | /* Enforce rule #4: Output operands must specifically indicate which | |
521 | reg an output appears in after an asm. "=f" is not allowed: the | |
522 | operand constraints must select a class with a single reg. | |
523 | ||
524 | Also enforce rule #5: Output operands must start at the top of | |
a92771b8 | 525 | the reg-stack: output operands may not "skip" a reg. */ |
bed3e6b4 | 526 | |
f3d96a58 | 527 | memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); |
bed3e6b4 | 528 | for (i = 0; i < n_outputs; i++) |
ed420a25 | 529 | if (STACK_REG_P (recog_data.operand[i])) |
8ac2b0ed | 530 | { |
757fefec | 531 | if (reg_class_size[(int) op_alt[i].cl] != 1) |
8ac2b0ed | 532 | { |
cb8bacb6 | 533 | error_for_asm (insn, "output constraint %d must specify a single register", i); |
8ac2b0ed | 534 | malformed_asm = 1; |
535 | } | |
2617fe26 | 536 | else |
8be6418a | 537 | { |
538 | int j; | |
539 | ||
540 | for (j = 0; j < n_clobbers; j++) | |
541 | if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) | |
542 | { | |
cb8bacb6 | 543 | error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", |
8be6418a | 544 | i, reg_names [REGNO (clobber_reg[j])]); |
545 | malformed_asm = 1; | |
546 | break; | |
547 | } | |
548 | if (j == n_clobbers) | |
549 | reg_used_as_output[REGNO (recog_data.operand[i])] = 1; | |
550 | } | |
8ac2b0ed | 551 | } |
bed3e6b4 | 552 | |
553 | ||
554 | /* Search for first non-popped reg. */ | |
555 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
556 | if (! reg_used_as_output[i]) | |
557 | break; | |
558 | ||
559 | /* If there are any other popped regs, that's an error. */ | |
560 | for (; i < LAST_STACK_REG + 1; i++) | |
561 | if (reg_used_as_output[i]) | |
562 | break; | |
563 | ||
564 | if (i != LAST_STACK_REG + 1) | |
565 | { | |
cb8bacb6 | 566 | error_for_asm (insn, "output regs must be grouped at top of stack"); |
bed3e6b4 | 567 | malformed_asm = 1; |
568 | } | |
569 | ||
570 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
571 | to the top of the reg-stack than any input that is not implicitly | |
a92771b8 | 572 | popped. */ |
bed3e6b4 | 573 | |
f3d96a58 | 574 | memset (implicitly_dies, 0, sizeof (implicitly_dies)); |
78e49515 | 575 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
ed420a25 | 576 | if (STACK_REG_P (recog_data.operand[i])) |
bed3e6b4 | 577 | { |
578 | /* An input reg is implicitly popped if it is tied to an | |
a92771b8 | 579 | output, or if there is a CLOBBER for it. */ |
bed3e6b4 | 580 | int j; |
581 | ||
582 | for (j = 0; j < n_clobbers; j++) | |
ed420a25 | 583 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
bed3e6b4 | 584 | break; |
585 | ||
757fefec | 586 | if (j < n_clobbers || op_alt[i].matches >= 0) |
ed420a25 | 587 | implicitly_dies[REGNO (recog_data.operand[i])] = 1; |
bed3e6b4 | 588 | } |
589 | ||
590 | /* Search for first non-popped reg. */ | |
591 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
592 | if (! implicitly_dies[i]) | |
593 | break; | |
594 | ||
595 | /* If there are any other popped regs, that's an error. */ | |
596 | for (; i < LAST_STACK_REG + 1; i++) | |
597 | if (implicitly_dies[i]) | |
598 | break; | |
599 | ||
600 | if (i != LAST_STACK_REG + 1) | |
601 | { | |
602 | error_for_asm (insn, | |
cb8bacb6 | 603 | "implicitly popped regs must be grouped at top of stack"); |
bed3e6b4 | 604 | malformed_asm = 1; |
605 | } | |
606 | ||
d6e0e053 | 607 | /* Enforce rule #3: If any input operand uses the "f" constraint, all |
bed3e6b4 | 608 | output constraints must use the "&" earlyclobber. |
609 | ||
f3d96a58 | 610 | ??? Detect this more deterministically by having constrain_asm_operands |
a92771b8 | 611 | record any earlyclobber. */ |
bed3e6b4 | 612 | |
78e49515 | 613 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
757fefec | 614 | if (op_alt[i].matches == -1) |
bed3e6b4 | 615 | { |
616 | int j; | |
617 | ||
618 | for (j = 0; j < n_outputs; j++) | |
ed420a25 | 619 | if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) |
bed3e6b4 | 620 | { |
621 | error_for_asm (insn, | |
1e5fcbe2 | 622 | "output operand %d must use %<&%> constraint", j); |
bed3e6b4 | 623 | malformed_asm = 1; |
624 | } | |
625 | } | |
626 | ||
627 | if (malformed_asm) | |
628 | { | |
629 | /* Avoid further trouble with this insn. */ | |
941522d6 | 630 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); |
299a3cdd | 631 | any_malformed_asm = true; |
f3d96a58 | 632 | return 0; |
d315aa96 | 633 | } |
535825e6 | 634 | |
f3d96a58 | 635 | return 1; |
535825e6 | 636 | } |
637 | \f | |
bed3e6b4 | 638 | /* Calculate the number of inputs and outputs in BODY, an |
639 | asm_operands. N_OPERANDS is the total number of operands, and | |
640 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
a92771b8 | 641 | placed. */ |
bed3e6b4 | 642 | |
78f55ca8 | 643 | static void |
644 | get_asm_operands_in_out (rtx body, int *pout, int *pin) | |
bed3e6b4 | 645 | { |
78f55ca8 | 646 | rtx asmop = extract_asm_operands (body); |
647 | ||
648 | *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); | |
649 | *pout = (recog_data.n_operands | |
650 | - ASM_OPERANDS_INPUT_LENGTH (asmop) | |
651 | - ASM_OPERANDS_LABEL_LENGTH (asmop)); | |
bed3e6b4 | 652 | } |
869072dd | 653 | |
24084825 | 654 | /* If current function returns its result in an fp stack register, |
1166733c | 655 | return the REG. Otherwise, return 0. */ |
24084825 | 656 | |
a5dff55e | 657 | static rtx |
3ad4992f | 658 | stack_result (tree decl) |
24084825 | 659 | { |
f4b5ce94 | 660 | rtx result; |
24084825 | 661 | |
f4b5ce94 | 662 | /* If the value is supposed to be returned in memory, then clearly |
663 | it is not returned in a stack register. */ | |
45550790 | 664 | if (aggregate_value_p (DECL_RESULT (decl), decl)) |
f4b5ce94 | 665 | return 0; |
666 | ||
0e8e37b2 | 667 | result = DECL_RTL_IF_SET (DECL_RESULT (decl)); |
6e5b5ba9 | 668 | if (result != 0) |
46b3ff29 | 669 | result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), |
670 | decl, true); | |
24084825 | 671 | |
1166733c | 672 | return result != 0 && STACK_REG_P (result) ? result : 0; |
24084825 | 673 | } |
535825e6 | 674 | \f |
535825e6 | 675 | |
ce71a9e6 | 676 | /* |
677 | * This section deals with stack register substitution, and forms the second | |
678 | * pass over the RTL. | |
679 | */ | |
535825e6 | 680 | |
681 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
a92771b8 | 682 | the desired hard REGNO. */ |
535825e6 | 683 | |
684 | static void | |
3ad4992f | 685 | replace_reg (rtx *reg, int regno) |
535825e6 | 686 | { |
4e9abdcc | 687 | gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); |
04e579b6 | 688 | gcc_assert (STACK_REG_P (*reg)); |
535825e6 | 689 | |
cee7491d | 690 | gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) |
04e579b6 | 691 | || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); |
5d574ad0 | 692 | |
a5dff55e | 693 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
535825e6 | 694 | } |
695 | ||
696 | /* Remove a note of type NOTE, which must be found, for register | |
a92771b8 | 697 | number REGNO from INSN. Remove only one such note. */ |
535825e6 | 698 | |
699 | static void | |
8fe8e576 | 700 | remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) |
535825e6 | 701 | { |
6659485c | 702 | rtx *note_link, this_rtx; |
535825e6 | 703 | |
337d789b | 704 | note_link = ®_NOTES (insn); |
6659485c | 705 | for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) |
706 | if (REG_NOTE_KIND (this_rtx) == note | |
707 | && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) | |
535825e6 | 708 | { |
6659485c | 709 | *note_link = XEXP (this_rtx, 1); |
535825e6 | 710 | return; |
711 | } | |
712 | else | |
6659485c | 713 | note_link = &XEXP (this_rtx, 1); |
535825e6 | 714 | |
04e579b6 | 715 | gcc_unreachable (); |
535825e6 | 716 | } |
717 | ||
718 | /* Find the hard register number of virtual register REG in REGSTACK. | |
719 | The hard register number is relative to the top of the stack. -1 is | |
a92771b8 | 720 | returned if the register is not found. */ |
535825e6 | 721 | |
722 | static int | |
2b15d2ba | 723 | get_hard_regnum (stack_ptr regstack, rtx reg) |
535825e6 | 724 | { |
725 | int i; | |
726 | ||
04e579b6 | 727 | gcc_assert (STACK_REG_P (reg)); |
535825e6 | 728 | |
729 | for (i = regstack->top; i >= 0; i--) | |
730 | if (regstack->reg[i] == REGNO (reg)) | |
731 | break; | |
732 | ||
733 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
734 | } | |
535825e6 | 735 | \f |
736 | /* Emit an insn to pop virtual register REG before or after INSN. | |
737 | REGSTACK is the stack state after INSN and is updated to reflect this | |
ce71a9e6 | 738 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn |
739 | is represented as a SET whose destination is the register to be popped | |
740 | and source is the top of stack. A death note for the top of stack | |
a92771b8 | 741 | cases the movdf pattern to pop. */ |
535825e6 | 742 | |
8fe8e576 | 743 | static rtx_insn * |
744 | emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where) | |
535825e6 | 745 | { |
8fe8e576 | 746 | rtx_insn *pop_insn; |
747 | rtx pop_rtx; | |
535825e6 | 748 | int hard_regno; |
749 | ||
5545a6c8 | 750 | /* For complex types take care to pop both halves. These may survive in |
751 | CLOBBER and USE expressions. */ | |
752 | if (COMPLEX_MODE_P (GET_MODE (reg))) | |
753 | { | |
754 | rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); | |
755 | rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); | |
756 | ||
8fe8e576 | 757 | pop_insn = NULL; |
5545a6c8 | 758 | if (get_hard_regnum (regstack, reg1) >= 0) |
2617fe26 | 759 | pop_insn = emit_pop_insn (insn, regstack, reg1, where); |
5545a6c8 | 760 | if (get_hard_regnum (regstack, reg2) >= 0) |
2617fe26 | 761 | pop_insn = emit_pop_insn (insn, regstack, reg2, where); |
04e579b6 | 762 | gcc_assert (pop_insn); |
5545a6c8 | 763 | return pop_insn; |
764 | } | |
765 | ||
535825e6 | 766 | hard_regno = get_hard_regnum (regstack, reg); |
767 | ||
04e579b6 | 768 | gcc_assert (hard_regno >= FIRST_STACK_REG); |
535825e6 | 769 | |
d1f9b275 | 770 | pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode), |
ce71a9e6 | 771 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); |
535825e6 | 772 | |
f3d96a58 | 773 | if (where == EMIT_AFTER) |
9dda7915 | 774 | pop_insn = emit_insn_after (pop_rtx, insn); |
f3d96a58 | 775 | else |
9dda7915 | 776 | pop_insn = emit_insn_before (pop_rtx, insn); |
535825e6 | 777 | |
a1ddb869 | 778 | add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); |
535825e6 | 779 | |
780 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
781 | = regstack->reg[regstack->top]; | |
782 | regstack->top -= 1; | |
783 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
784 | ||
785 | return pop_insn; | |
786 | } | |
787 | \f | |
f3d96a58 | 788 | /* Emit an insn before or after INSN to swap virtual register REG with |
789 | the top of stack. REGSTACK is the stack state before the swap, and | |
790 | is updated to reflect the swap. A swap insn is represented as a | |
791 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
535825e6 | 792 | |
a92771b8 | 793 | If REG is already at the top of the stack, no insn is emitted. */ |
535825e6 | 794 | |
795 | static void | |
8fe8e576 | 796 | emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) |
535825e6 | 797 | { |
5e7a3068 | 798 | int hard_regno; |
f3d96a58 | 799 | rtx swap_rtx; |
dfcf26a5 | 800 | int other_reg; /* swap regno temps */ |
8fe8e576 | 801 | rtx_insn *i1; /* the stack-reg insn prior to INSN */ |
5e7a3068 | 802 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ |
535825e6 | 803 | |
5e7a3068 | 804 | hard_regno = get_hard_regnum (regstack, reg); |
805 | ||
535825e6 | 806 | if (hard_regno == FIRST_STACK_REG) |
807 | return; | |
b8c362b7 | 808 | if (hard_regno == -1) |
809 | { | |
810 | /* Something failed if the register wasn't on the stack. If we had | |
811 | malformed asms, we zapped the instruction itself, but that didn't | |
812 | produce the same pattern of register sets as before. To prevent | |
813 | further failure, adjust REGSTACK to include REG at TOP. */ | |
814 | gcc_assert (any_malformed_asm); | |
815 | regstack->reg[++regstack->top] = REGNO (reg); | |
816 | return; | |
817 | } | |
818 | gcc_assert (hard_regno >= FIRST_STACK_REG); | |
535825e6 | 819 | |
5e7a3068 | 820 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
dfcf26a5 | 821 | std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]); |
535825e6 | 822 | |
f3d96a58 | 823 | /* Find the previous insn involving stack regs, but don't pass a |
824 | block boundary. */ | |
825 | i1 = NULL; | |
5496dbfc | 826 | if (current_block && insn != BB_HEAD (current_block)) |
5e7a3068 | 827 | { |
8fe8e576 | 828 | rtx_insn *tmp = PREV_INSN (insn); |
829 | rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); | |
281d2538 | 830 | while (tmp != limit) |
f3d96a58 | 831 | { |
6d7dc5b9 | 832 | if (LABEL_P (tmp) |
833 | || CALL_P (tmp) | |
83458610 | 834 | || NOTE_INSN_BASIC_BLOCK_P (tmp) |
6d7dc5b9 | 835 | || (NONJUMP_INSN_P (tmp) |
f3d96a58 | 836 | && stack_regs_mentioned (tmp))) |
837 | { | |
838 | i1 = tmp; | |
839 | break; | |
840 | } | |
841 | tmp = PREV_INSN (tmp); | |
842 | } | |
843 | } | |
844 | ||
845 | if (i1 != NULL_RTX | |
846 | && (i1set = single_set (i1)) != NULL_RTX) | |
847 | { | |
848 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
5e7a3068 | 849 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); |
535825e6 | 850 | |
5e7a3068 | 851 | /* If the previous register stack push was from the reg we are to |
a92771b8 | 852 | swap with, omit the swap. */ |
5e7a3068 | 853 | |
8ad4c111 | 854 | if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG |
855 | && REG_P (i1src) | |
97b330ca | 856 | && REGNO (i1src) == (unsigned) hard_regno - 1 |
5e7a3068 | 857 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
858 | return; | |
859 | ||
860 | /* If the previous insn wrote to the reg we are to swap with, | |
861 | omit the swap. */ | |
862 | ||
8ad4c111 | 863 | if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno |
864 | && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG | |
5e7a3068 | 865 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
866 | return; | |
867 | } | |
868 | ||
9d97464a | 869 | /* Avoid emitting the swap if this is the first register stack insn |
870 | of the current_block. Instead update the current_block's stack_in | |
871 | and let compensate edges take care of this for us. */ | |
872 | if (current_block && starting_stack_p) | |
873 | { | |
874 | BLOCK_INFO (current_block)->stack_in = *regstack; | |
875 | starting_stack_p = false; | |
876 | return; | |
877 | } | |
878 | ||
ce71a9e6 | 879 | swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), |
880 | FP_MODE_REG (FIRST_STACK_REG, XFmode)); | |
f3d96a58 | 881 | |
882 | if (i1) | |
9dda7915 | 883 | emit_insn_after (swap_rtx, i1); |
f3d96a58 | 884 | else if (current_block) |
5496dbfc | 885 | emit_insn_before (swap_rtx, BB_HEAD (current_block)); |
f3d96a58 | 886 | else |
887 | emit_insn_before (swap_rtx, insn); | |
535825e6 | 888 | } |
889 | \f | |
0bfbd311 | 890 | /* Emit an insns before INSN to swap virtual register SRC1 with |
891 | the top of stack and virtual register SRC2 with second stack | |
892 | slot. REGSTACK is the stack state before the swaps, and | |
893 | is updated to reflect the swaps. A swap insn is represented as a | |
894 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
895 | ||
896 | If SRC1 and/or SRC2 are already at the right place, no swap insn | |
897 | is emitted. */ | |
898 | ||
899 | static void | |
8fe8e576 | 900 | swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) |
0bfbd311 | 901 | { |
902 | struct stack_def temp_stack; | |
dfcf26a5 | 903 | int regno, j, k; |
0bfbd311 | 904 | |
905 | temp_stack = *regstack; | |
906 | ||
907 | /* Place operand 1 at the top of stack. */ | |
908 | regno = get_hard_regnum (&temp_stack, src1); | |
04e579b6 | 909 | gcc_assert (regno >= 0); |
0bfbd311 | 910 | if (regno != FIRST_STACK_REG) |
911 | { | |
912 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
913 | j = temp_stack.top; | |
914 | ||
dfcf26a5 | 915 | std::swap (temp_stack.reg[j], temp_stack.reg[k]); |
0bfbd311 | 916 | } |
917 | ||
918 | /* Place operand 2 next on the stack. */ | |
919 | regno = get_hard_regnum (&temp_stack, src2); | |
04e579b6 | 920 | gcc_assert (regno >= 0); |
0bfbd311 | 921 | if (regno != FIRST_STACK_REG + 1) |
922 | { | |
923 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
924 | j = temp_stack.top - 1; | |
925 | ||
dfcf26a5 | 926 | std::swap (temp_stack.reg[j], temp_stack.reg[k]); |
0bfbd311 | 927 | } |
928 | ||
929 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
930 | } | |
931 | \f | |
535825e6 | 932 | /* Handle a move to or from a stack register in PAT, which is in INSN. |
393522df | 933 | REGSTACK is the current stack. Return whether a control flow insn |
934 | was deleted in the process. */ | |
535825e6 | 935 | |
393522df | 936 | static bool |
8fe8e576 | 937 | move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) |
535825e6 | 938 | { |
a5dff55e | 939 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
940 | rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
941 | rtx src, dest; | |
535825e6 | 942 | rtx note; |
393522df | 943 | bool control_flow_insn_deleted = false; |
535825e6 | 944 | |
a5dff55e | 945 | src = *psrc; dest = *pdest; |
946 | ||
947 | if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
535825e6 | 948 | { |
949 | /* Write from one stack reg to another. If SRC dies here, then | |
a92771b8 | 950 | just change the register mapping and delete the insn. */ |
535825e6 | 951 | |
a5dff55e | 952 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
535825e6 | 953 | if (note) |
954 | { | |
955 | int i; | |
956 | ||
a92771b8 | 957 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
04e579b6 | 958 | gcc_assert (REGNO (src) != REGNO (dest)); |
535825e6 | 959 | |
960 | for (i = regstack->top; i >= 0; i--) | |
a5dff55e | 961 | if (regstack->reg[i] == REGNO (src)) |
535825e6 | 962 | break; |
963 | ||
99f4aa93 | 964 | /* The destination must be dead, or life analysis is borked. */ |
04e579b6 | 965 | gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); |
535825e6 | 966 | |
99f4aa93 | 967 | /* If the source is not live, this is yet another case of |
968 | uninitialized variables. Load up a NaN instead. */ | |
969 | if (i < 0) | |
970 | return move_nan_for_stack_reg (insn, regstack, dest); | |
971 | ||
535825e6 | 972 | /* It is possible that the dest is unused after this insn. |
a92771b8 | 973 | If so, just pop the src. */ |
535825e6 | 974 | |
a5dff55e | 975 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
393522df | 976 | emit_pop_insn (insn, regstack, src, EMIT_AFTER); |
977 | else | |
535825e6 | 978 | { |
393522df | 979 | regstack->reg[i] = REGNO (dest); |
980 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
981 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
535825e6 | 982 | } |
983 | ||
393522df | 984 | control_flow_insn_deleted |= control_flow_insn_p (insn); |
e4bf866d | 985 | delete_insn (insn); |
393522df | 986 | return control_flow_insn_deleted; |
535825e6 | 987 | } |
988 | ||
a92771b8 | 989 | /* The source reg does not die. */ |
535825e6 | 990 | |
991 | /* If this appears to be a no-op move, delete it, or else it | |
992 | will confuse the machine description output patterns. But if | |
993 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
a92771b8 | 994 | for REG_UNUSED will not work for deleted insns. */ |
535825e6 | 995 | |
a5dff55e | 996 | if (REGNO (src) == REGNO (dest)) |
535825e6 | 997 | { |
a5dff55e | 998 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
f3d96a58 | 999 | emit_pop_insn (insn, regstack, dest, EMIT_AFTER); |
535825e6 | 1000 | |
393522df | 1001 | control_flow_insn_deleted |= control_flow_insn_p (insn); |
e4bf866d | 1002 | delete_insn (insn); |
393522df | 1003 | return control_flow_insn_deleted; |
535825e6 | 1004 | } |
1005 | ||
45498ea1 | 1006 | /* The destination ought to be dead. */ |
04e579b6 | 1007 | gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); |
535825e6 | 1008 | |
a5dff55e | 1009 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
535825e6 | 1010 | |
a5dff55e | 1011 | regstack->reg[++regstack->top] = REGNO (dest); |
1012 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1013 | replace_reg (pdest, FIRST_STACK_REG); | |
535825e6 | 1014 | } |
a5dff55e | 1015 | else if (STACK_REG_P (src)) |
535825e6 | 1016 | { |
1017 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1018 | only top of stack may be saved, emit an exchange first if | |
a92771b8 | 1019 | needs be. */ |
535825e6 | 1020 | |
a5dff55e | 1021 | emit_swap_insn (insn, regstack, src); |
535825e6 | 1022 | |
a5dff55e | 1023 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
535825e6 | 1024 | if (note) |
1025 | { | |
1026 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1027 | regstack->top--; | |
a5dff55e | 1028 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
535825e6 | 1029 | } |
e07e720e | 1030 | else if ((GET_MODE (src) == XFmode) |
75ab846a | 1031 | && regstack->top < REG_STACK_SIZE - 1) |
b6e49ac0 | 1032 | { |
1033 | /* A 387 cannot write an XFmode value to a MEM without | |
1034 | clobbering the source reg. The output code can handle | |
1035 | this by reading back the value from the MEM. | |
1036 | But it is more efficient to use a temp register if one is | |
1037 | available. Push the source value here if the register | |
1038 | stack is not full, and then write the value to memory via | |
1039 | a pop. */ | |
d10ecf6f | 1040 | rtx push_rtx; |
5545a6c8 | 1041 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); |
b6e49ac0 | 1042 | |
e07e720e | 1043 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); |
d10ecf6f | 1044 | emit_insn_before (push_rtx, insn); |
a1ddb869 | 1045 | add_reg_note (insn, REG_DEAD, top_stack_reg); |
b6e49ac0 | 1046 | } |
535825e6 | 1047 | |
a5dff55e | 1048 | replace_reg (psrc, FIRST_STACK_REG); |
535825e6 | 1049 | } |
04e579b6 | 1050 | else |
535825e6 | 1051 | { |
64d0b996 | 1052 | rtx pat = PATTERN (insn); |
1053 | ||
04e579b6 | 1054 | gcc_assert (STACK_REG_P (dest)); |
1055 | ||
535825e6 | 1056 | /* Load from MEM, or possibly integer REG or constant, into the |
1057 | stack regs. The actual target is always the top of the | |
1058 | stack. The stack mapping is changed to reflect that DEST is | |
1059 | now at top of stack. */ | |
1060 | ||
64d0b996 | 1061 | /* The destination ought to be dead. However, there is a |
1062 | special case with i387 UNSPEC_TAN, where destination is live | |
1063 | (an argument to fptan) but inherent load of 1.0 is modelled | |
1064 | as a load from a constant. */ | |
c4ed2246 | 1065 | if (GET_CODE (pat) == PARALLEL |
1066 | && XVECLEN (pat, 0) == 2 | |
1067 | && GET_CODE (XVECEXP (pat, 0, 1)) == SET | |
1068 | && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC | |
1069 | && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) | |
1070 | emit_swap_insn (insn, regstack, dest); | |
1071 | else | |
64d0b996 | 1072 | gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); |
535825e6 | 1073 | |
04e579b6 | 1074 | gcc_assert (regstack->top < REG_STACK_SIZE); |
535825e6 | 1075 | |
a5dff55e | 1076 | regstack->reg[++regstack->top] = REGNO (dest); |
1077 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1078 | replace_reg (pdest, FIRST_STACK_REG); | |
535825e6 | 1079 | } |
393522df | 1080 | |
1081 | return control_flow_insn_deleted; | |
535825e6 | 1082 | } |
99f4aa93 | 1083 | |
1084 | /* A helper function which replaces INSN with a pattern that loads up | |
1085 | a NaN into DEST, then invokes move_for_stack_reg. */ | |
1086 | ||
1087 | static bool | |
8fe8e576 | 1088 | move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) |
99f4aa93 | 1089 | { |
1090 | rtx pat; | |
1091 | ||
1092 | dest = FP_MODE_REG (REGNO (dest), SFmode); | |
d1f9b275 | 1093 | pat = gen_rtx_SET (dest, not_a_num); |
99f4aa93 | 1094 | PATTERN (insn) = pat; |
1095 | INSN_CODE (insn) = -1; | |
1096 | ||
1097 | return move_for_stack_reg (insn, regstack, pat); | |
1098 | } | |
535825e6 | 1099 | \f |
ce71a9e6 | 1100 | /* Swap the condition on a branch, if there is one. Return true if we |
1101 | found a condition to swap. False if the condition was not used as | |
aa40f561 | 1102 | such. */ |
ce71a9e6 | 1103 | |
1104 | static int | |
3ad4992f | 1105 | swap_rtx_condition_1 (rtx pat) |
5e7a3068 | 1106 | { |
19cb6b50 | 1107 | const char *fmt; |
1108 | int i, r = 0; | |
5e7a3068 | 1109 | |
6720e96c | 1110 | if (COMPARISON_P (pat)) |
5e7a3068 | 1111 | { |
1112 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
ce71a9e6 | 1113 | r = 1; |
5e7a3068 | 1114 | } |
ce71a9e6 | 1115 | else |
5e7a3068 | 1116 | { |
ce71a9e6 | 1117 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
1118 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
5e7a3068 | 1119 | { |
ce71a9e6 | 1120 | if (fmt[i] == 'E') |
1121 | { | |
19cb6b50 | 1122 | int j; |
5e7a3068 | 1123 | |
ce71a9e6 | 1124 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
1125 | r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
1126 | } | |
1127 | else if (fmt[i] == 'e') | |
1128 | r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
5e7a3068 | 1129 | } |
5e7a3068 | 1130 | } |
ce71a9e6 | 1131 | |
1132 | return r; | |
1133 | } | |
1134 | ||
1135 | static int | |
8fe8e576 | 1136 | swap_rtx_condition (rtx_insn *insn) |
ce71a9e6 | 1137 | { |
1138 | rtx pat = PATTERN (insn); | |
1139 | ||
1140 | /* We're looking for a single set to cc0 or an HImode temporary. */ | |
1141 | ||
1142 | if (GET_CODE (pat) == SET | |
8ad4c111 | 1143 | && REG_P (SET_DEST (pat)) |
ce71a9e6 | 1144 | && REGNO (SET_DEST (pat)) == FLAGS_REG) |
1145 | { | |
1146 | insn = next_flags_user (insn); | |
1147 | if (insn == NULL_RTX) | |
1148 | return 0; | |
1149 | pat = PATTERN (insn); | |
1150 | } | |
1151 | ||
e0793548 | 1152 | /* See if this is, or ends in, a fnstsw. If so, we're not doing anything |
1153 | with the cc value right now. We may be able to search for one | |
1154 | though. */ | |
ce71a9e6 | 1155 | |
1156 | if (GET_CODE (pat) == SET | |
1157 | && GET_CODE (SET_SRC (pat)) == UNSPEC | |
372310d2 | 1158 | && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) |
ce71a9e6 | 1159 | { |
1160 | rtx dest = SET_DEST (pat); | |
1161 | ||
2617fe26 | 1162 | /* Search forward looking for the first use of this value. |
ce71a9e6 | 1163 | Stop at block boundaries. */ |
5496dbfc | 1164 | while (insn != BB_END (current_block)) |
ce71a9e6 | 1165 | { |
1166 | insn = NEXT_INSN (insn); | |
9204e736 | 1167 | if (INSN_P (insn) && reg_mentioned_p (dest, insn)) |
ce71a9e6 | 1168 | break; |
6d7dc5b9 | 1169 | if (CALL_P (insn)) |
ce71a9e6 | 1170 | return 0; |
1171 | } | |
1172 | ||
e0793548 | 1173 | /* We haven't found it. */ |
1174 | if (insn == BB_END (current_block)) | |
1175 | return 0; | |
1176 | ||
ce71a9e6 | 1177 | /* So we've found the insn using this value. If it is anything |
e0793548 | 1178 | other than sahf or the value does not die (meaning we'd have |
1179 | to search further), then we must give up. */ | |
ce71a9e6 | 1180 | pat = PATTERN (insn); |
1181 | if (GET_CODE (pat) != SET | |
1182 | || GET_CODE (SET_SRC (pat)) != UNSPEC | |
372310d2 | 1183 | || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF |
ce71a9e6 | 1184 | || ! dead_or_set_p (insn, dest)) |
1185 | return 0; | |
1186 | ||
1187 | /* Now we are prepared to handle this as a normal cc0 setter. */ | |
1188 | insn = next_flags_user (insn); | |
1189 | if (insn == NULL_RTX) | |
1190 | return 0; | |
1191 | pat = PATTERN (insn); | |
1192 | } | |
1193 | ||
5377f687 | 1194 | if (swap_rtx_condition_1 (pat)) |
1195 | { | |
7ce6501c | 1196 | int fail = 0; |
5377f687 | 1197 | INSN_CODE (insn) = -1; |
1198 | if (recog_memoized (insn) == -1) | |
7ce6501c | 1199 | fail = 1; |
1200 | /* In case the flags don't die here, recurse to try fix | |
1201 | following user too. */ | |
1202 | else if (! dead_or_set_p (insn, ix86_flags_rtx)) | |
1203 | { | |
1204 | insn = next_flags_user (insn); | |
1205 | if (!insn || !swap_rtx_condition (insn)) | |
1206 | fail = 1; | |
1207 | } | |
1208 | if (fail) | |
5377f687 | 1209 | { |
1210 | swap_rtx_condition_1 (pat); | |
1211 | return 0; | |
1212 | } | |
1213 | return 1; | |
1214 | } | |
1215 | return 0; | |
5e7a3068 | 1216 | } |
1217 | ||
535825e6 | 1218 | /* Handle a comparison. Special care needs to be taken to avoid |
1219 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
1220 | ||
ce71a9e6 | 1221 | Also, a pop insn may need to be emitted. The 387 does have an |
535825e6 | 1222 | `fcompp' insn that can pop two regs, but it is sometimes too expensive |
1223 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
ce71a9e6 | 1224 | set up. */ |
535825e6 | 1225 | |
1226 | static void | |
8fe8e576 | 1227 | compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src) |
535825e6 | 1228 | { |
1229 | rtx *src1, *src2; | |
1230 | rtx src1_note, src2_note; | |
3c8249d9 | 1231 | |
ce71a9e6 | 1232 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1233 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
535825e6 | 1234 | |
5e7a3068 | 1235 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
a92771b8 | 1236 | registers that die in this insn - move those to stack top first. */ |
ce71a9e6 | 1237 | if ((! STACK_REG_P (*src1) |
1238 | || (STACK_REG_P (*src2) | |
1239 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
1240 | && swap_rtx_condition (insn)) | |
5e7a3068 | 1241 | { |
dfcf26a5 | 1242 | std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1)); |
535825e6 | 1243 | |
ce71a9e6 | 1244 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1245 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
3f89e86c | 1246 | |
2f4ca440 | 1247 | INSN_CODE (insn) = -1; |
5e7a3068 | 1248 | } |
535825e6 | 1249 | |
a92771b8 | 1250 | /* We will fix any death note later. */ |
535825e6 | 1251 | |
1252 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1253 | ||
1254 | if (STACK_REG_P (*src2)) | |
1255 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1256 | else | |
5e7a3068 | 1257 | src2_note = NULL_RTX; |
535825e6 | 1258 | |
ce71a9e6 | 1259 | emit_swap_insn (insn, regstack, *src1); |
535825e6 | 1260 | |
1261 | replace_reg (src1, FIRST_STACK_REG); | |
1262 | ||
1263 | if (STACK_REG_P (*src2)) | |
ce71a9e6 | 1264 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
535825e6 | 1265 | |
1266 | if (src1_note) | |
1267 | { | |
a97edd5b | 1268 | pop_stack (regstack, REGNO (XEXP (src1_note, 0))); |
535825e6 | 1269 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
535825e6 | 1270 | } |
1271 | ||
1272 | /* If the second operand dies, handle that. But if the operands are | |
1273 | the same stack register, don't bother, because only one death is | |
a92771b8 | 1274 | needed, and it was just handled. */ |
535825e6 | 1275 | |
1276 | if (src2_note | |
5e7a3068 | 1277 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
535825e6 | 1278 | && REGNO (*src1) == REGNO (*src2))) |
1279 | { | |
1280 | /* As a special case, two regs may die in this insn if src2 is | |
1281 | next to top of stack and the top of stack also dies. Since | |
1282 | we have already popped src1, "next to top of stack" is really | |
a92771b8 | 1283 | at top (FIRST_STACK_REG) now. */ |
535825e6 | 1284 | |
1285 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
1286 | && src1_note) | |
1287 | { | |
a97edd5b | 1288 | pop_stack (regstack, REGNO (XEXP (src2_note, 0))); |
535825e6 | 1289 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
535825e6 | 1290 | } |
1291 | else | |
1292 | { | |
ce71a9e6 | 1293 | /* The 386 can only represent death of the first operand in |
1294 | the case handled above. In all other cases, emit a separate | |
1295 | pop and remove the death note from here. */ | |
ce71a9e6 | 1296 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); |
ce71a9e6 | 1297 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), |
f3d96a58 | 1298 | EMIT_AFTER); |
535825e6 | 1299 | } |
1300 | } | |
1301 | } | |
1302 | \f | |
a6aa49aa | 1303 | /* Substitute hardware stack regs in debug insn INSN, using stack |
1304 | layout REGSTACK. If we can't find a hardware stack reg for any of | |
1305 | the REGs in it, reset the debug insn. */ | |
1306 | ||
1307 | static void | |
8fe8e576 | 1308 | subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) |
a6aa49aa | 1309 | { |
db1b48f5 | 1310 | subrtx_ptr_iterator::array_type array; |
1311 | FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) | |
1312 | { | |
1313 | rtx *loc = *iter; | |
1314 | rtx x = *loc; | |
1315 | if (STACK_REG_P (x)) | |
1316 | { | |
1317 | int hard_regno = get_hard_regnum (regstack, x); | |
a6aa49aa | 1318 | |
db1b48f5 | 1319 | /* If we can't find an active register, reset this debug insn. */ |
1320 | if (hard_regno == -1) | |
1321 | { | |
1322 | INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); | |
1323 | return; | |
1324 | } | |
1325 | ||
1326 | gcc_assert (hard_regno >= FIRST_STACK_REG); | |
1327 | replace_reg (loc, hard_regno); | |
1328 | iter.skip_subrtxes (); | |
1329 | } | |
1330 | } | |
a6aa49aa | 1331 | } |
1332 | ||
535825e6 | 1333 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK |
393522df | 1334 | is the current register layout. Return whether a control flow insn |
1335 | was deleted in the process. */ | |
535825e6 | 1336 | |
393522df | 1337 | static bool |
8fe8e576 | 1338 | subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) |
535825e6 | 1339 | { |
1340 | rtx *dest, *src; | |
393522df | 1341 | bool control_flow_insn_deleted = false; |
535825e6 | 1342 | |
f3d96a58 | 1343 | switch (GET_CODE (pat)) |
1344 | { | |
1345 | case USE: | |
1346 | /* Deaths in USE insns can happen in non optimizing compilation. | |
1347 | Handle them by popping the dying register. */ | |
1348 | src = get_true_reg (&XEXP (pat, 0)); | |
2617fe26 | 1349 | if (STACK_REG_P (*src) |
1350 | && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
1351 | { | |
3072d30e | 1352 | /* USEs are ignored for liveness information so USEs of dead |
1353 | register might happen. */ | |
1354 | if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) | |
1355 | emit_pop_insn (insn, regstack, *src, EMIT_AFTER); | |
393522df | 1356 | return control_flow_insn_deleted; |
2617fe26 | 1357 | } |
3072d30e | 1358 | /* Uninitialized USE might happen for functions returning uninitialized |
1359 | value. We will properly initialize the USE on the edge to EXIT_BLOCK, | |
4a7e4fcc | 1360 | so it is safe to ignore the use here. This is consistent with behavior |
48e1416a | 1361 | of dataflow analyzer that ignores USE too. (This also imply that |
4a7e4fcc | 1362 | forcibly initializing the register to NaN here would lead to ICE later, |
3072d30e | 1363 | since the REG_DEAD notes are not issued.) */ |
f3d96a58 | 1364 | break; |
535825e6 | 1365 | |
9845d120 | 1366 | case VAR_LOCATION: |
1367 | gcc_unreachable (); | |
1368 | ||
f3d96a58 | 1369 | case CLOBBER: |
1370 | { | |
1371 | rtx note; | |
535825e6 | 1372 | |
f3d96a58 | 1373 | dest = get_true_reg (&XEXP (pat, 0)); |
1374 | if (STACK_REG_P (*dest)) | |
1375 | { | |
1376 | note = find_reg_note (insn, REG_DEAD, *dest); | |
631ef7ce | 1377 | |
1378 | if (pat != PATTERN (insn)) | |
1379 | { | |
59082b2e | 1380 | /* The fix_truncdi_1 pattern wants to be able to |
1381 | allocate its own scratch register. It does this by | |
1382 | clobbering an fp reg so that it is assured of an | |
1383 | empty reg-stack register. If the register is live, | |
1384 | kill it now. Remove the DEAD/UNUSED note so we | |
1385 | don't try to kill it later too. | |
1386 | ||
1387 | In reality the UNUSED note can be absent in some | |
1388 | complicated cases when the register is reused for | |
1389 | partially set variable. */ | |
631ef7ce | 1390 | |
1391 | if (note) | |
1392 | emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
1393 | else | |
59082b2e | 1394 | note = find_reg_note (insn, REG_UNUSED, *dest); |
1395 | if (note) | |
1396 | remove_note (insn, note); | |
0834f16c | 1397 | replace_reg (dest, FIRST_STACK_REG + 1); |
631ef7ce | 1398 | } |
f3d96a58 | 1399 | else |
1400 | { | |
631ef7ce | 1401 | /* A top-level clobber with no REG_DEAD, and no hard-regnum |
1402 | indicates an uninitialized value. Because reload removed | |
2617fe26 | 1403 | all other clobbers, this must be due to a function |
631ef7ce | 1404 | returning without a value. Load up a NaN. */ |
1405 | ||
99f4aa93 | 1406 | if (!note) |
5545a6c8 | 1407 | { |
99f4aa93 | 1408 | rtx t = *dest; |
99f4aa93 | 1409 | if (COMPLEX_MODE_P (GET_MODE (t))) |
1410 | { | |
389d0d04 | 1411 | rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); |
1412 | if (get_hard_regnum (regstack, u) == -1) | |
1413 | { | |
1414 | rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); | |
8fe8e576 | 1415 | rtx_insn *insn2 = emit_insn_before (pat2, insn); |
389d0d04 | 1416 | control_flow_insn_deleted |
1417 | |= move_nan_for_stack_reg (insn2, regstack, u); | |
1418 | } | |
99f4aa93 | 1419 | } |
389d0d04 | 1420 | if (get_hard_regnum (regstack, t) == -1) |
1421 | control_flow_insn_deleted | |
1422 | |= move_nan_for_stack_reg (insn, regstack, t); | |
5545a6c8 | 1423 | } |
f3d96a58 | 1424 | } |
f3d96a58 | 1425 | } |
535825e6 | 1426 | break; |
f3d96a58 | 1427 | } |
535825e6 | 1428 | |
f3d96a58 | 1429 | case SET: |
1430 | { | |
d946ea19 | 1431 | rtx *src1 = (rtx *) 0, *src2; |
f3d96a58 | 1432 | rtx src1_note, src2_note; |
1433 | rtx pat_src; | |
1434 | ||
1435 | dest = get_true_reg (&SET_DEST (pat)); | |
1436 | src = get_true_reg (&SET_SRC (pat)); | |
1437 | pat_src = SET_SRC (pat); | |
1438 | ||
1439 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
1440 | if (STACK_REG_P (*src) | |
1441 | || (STACK_REG_P (*dest) | |
e16ceb8e | 1442 | && (REG_P (*src) || MEM_P (*src) |
78f1962f | 1443 | || CONST_DOUBLE_P (*src)))) |
f3d96a58 | 1444 | { |
393522df | 1445 | control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); |
f3d96a58 | 1446 | break; |
1447 | } | |
535825e6 | 1448 | |
f3d96a58 | 1449 | switch (GET_CODE (pat_src)) |
1450 | { | |
1451 | case COMPARE: | |
1452 | compare_for_stack_reg (insn, regstack, pat_src); | |
1453 | break; | |
535825e6 | 1454 | |
f3d96a58 | 1455 | case CALL: |
1456 | { | |
1457 | int count; | |
0933f1d9 | 1458 | for (count = REG_NREGS (*dest); --count >= 0;) |
f3d96a58 | 1459 | { |
1460 | regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
1461 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
1462 | } | |
1463 | } | |
1464 | replace_reg (dest, FIRST_STACK_REG); | |
1465 | break; | |
535825e6 | 1466 | |
f3d96a58 | 1467 | case REG: |
1468 | /* This is a `tstM2' case. */ | |
04e579b6 | 1469 | gcc_assert (*dest == cc0_rtx); |
f3d96a58 | 1470 | src1 = src; |
535825e6 | 1471 | |
f3d96a58 | 1472 | /* Fall through. */ |
535825e6 | 1473 | |
f3d96a58 | 1474 | case FLOAT_TRUNCATE: |
1475 | case SQRT: | |
1476 | case ABS: | |
1477 | case NEG: | |
1478 | /* These insns only operate on the top of the stack. DEST might | |
1479 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
1480 | possible that the tstM case results in a REG_DEAD note on the | |
1481 | source. */ | |
535825e6 | 1482 | |
f3d96a58 | 1483 | if (src1 == 0) |
1484 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
535825e6 | 1485 | |
f3d96a58 | 1486 | emit_swap_insn (insn, regstack, *src1); |
535825e6 | 1487 | |
f3d96a58 | 1488 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
535825e6 | 1489 | |
f3d96a58 | 1490 | if (STACK_REG_P (*dest)) |
1491 | replace_reg (dest, FIRST_STACK_REG); | |
535825e6 | 1492 | |
f3d96a58 | 1493 | if (src1_note) |
1494 | { | |
1495 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1496 | regstack->top--; | |
1497 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1498 | } | |
535825e6 | 1499 | |
f3d96a58 | 1500 | replace_reg (src1, FIRST_STACK_REG); |
1501 | break; | |
535825e6 | 1502 | |
f3d96a58 | 1503 | case MINUS: |
1504 | case DIV: | |
1505 | /* On i386, reversed forms of subM3 and divM3 exist for | |
1506 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
1507 | can be used. */ | |
1508 | case MULT: | |
1509 | case PLUS: | |
1510 | /* These insns can accept the top of stack as a destination | |
1511 | from a stack reg or mem, or can use the top of stack as a | |
1512 | source and some other stack register (possibly top of stack) | |
1513 | as a destination. */ | |
1514 | ||
1515 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
1516 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1517 | ||
1518 | /* We will fix any death note later. */ | |
1519 | ||
1520 | if (STACK_REG_P (*src1)) | |
1521 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1522 | else | |
1523 | src1_note = NULL_RTX; | |
1524 | if (STACK_REG_P (*src2)) | |
1525 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1526 | else | |
1527 | src2_note = NULL_RTX; | |
535825e6 | 1528 | |
f3d96a58 | 1529 | /* If either operand is not a stack register, then the dest |
1530 | must be top of stack. */ | |
535825e6 | 1531 | |
f3d96a58 | 1532 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) |
5e7a3068 | 1533 | emit_swap_insn (insn, regstack, *dest); |
f3d96a58 | 1534 | else |
1535 | { | |
1536 | /* Both operands are REG. If neither operand is already | |
1e8379be | 1537 | at the top of stack, choose to make the one that is the |
1538 | dest the new top of stack. */ | |
535825e6 | 1539 | |
f3d96a58 | 1540 | int src1_hard_regnum, src2_hard_regnum; |
535825e6 | 1541 | |
f3d96a58 | 1542 | src1_hard_regnum = get_hard_regnum (regstack, *src1); |
1543 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
1e8379be | 1544 | |
1545 | /* If the source is not live, this is yet another case of | |
1546 | uninitialized variables. Load up a NaN instead. */ | |
1547 | if (src1_hard_regnum == -1) | |
1548 | { | |
1549 | rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); | |
8fe8e576 | 1550 | rtx_insn *insn2 = emit_insn_before (pat2, insn); |
1e8379be | 1551 | control_flow_insn_deleted |
1552 | |= move_nan_for_stack_reg (insn2, regstack, *src1); | |
1553 | } | |
1554 | if (src2_hard_regnum == -1) | |
1555 | { | |
1556 | rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); | |
8fe8e576 | 1557 | rtx_insn *insn2 = emit_insn_before (pat2, insn); |
1e8379be | 1558 | control_flow_insn_deleted |
1559 | |= move_nan_for_stack_reg (insn2, regstack, *src2); | |
1560 | } | |
535825e6 | 1561 | |
f3d96a58 | 1562 | if (src1_hard_regnum != FIRST_STACK_REG |
1563 | && src2_hard_regnum != FIRST_STACK_REG) | |
1564 | emit_swap_insn (insn, regstack, *dest); | |
535825e6 | 1565 | } |
f3d96a58 | 1566 | |
1567 | if (STACK_REG_P (*src1)) | |
1568 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1569 | if (STACK_REG_P (*src2)) | |
1570 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
1571 | ||
1572 | if (src1_note) | |
535825e6 | 1573 | { |
f3d96a58 | 1574 | rtx src1_reg = XEXP (src1_note, 0); |
535825e6 | 1575 | |
f3d96a58 | 1576 | /* If the register that dies is at the top of stack, then |
1577 | the destination is somewhere else - merely substitute it. | |
1578 | But if the reg that dies is not at top of stack, then | |
1579 | move the top of stack to the dead reg, as though we had | |
1580 | done the insn and then a store-with-pop. */ | |
535825e6 | 1581 | |
f3d96a58 | 1582 | if (REGNO (src1_reg) == regstack->reg[regstack->top]) |
1583 | { | |
1584 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1585 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1586 | } | |
1587 | else | |
1588 | { | |
1589 | int regno = get_hard_regnum (regstack, src1_reg); | |
535825e6 | 1590 | |
f3d96a58 | 1591 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1592 | replace_reg (dest, regno); | |
1593 | ||
1594 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1595 | = regstack->reg[regstack->top]; | |
1596 | } | |
1597 | ||
1598 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1599 | REGNO (XEXP (src1_note, 0))); | |
1600 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1601 | regstack->top--; | |
1602 | } | |
1603 | else if (src2_note) | |
535825e6 | 1604 | { |
f3d96a58 | 1605 | rtx src2_reg = XEXP (src2_note, 0); |
1606 | if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
1607 | { | |
1608 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1609 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1610 | } | |
1611 | else | |
1612 | { | |
1613 | int regno = get_hard_regnum (regstack, src2_reg); | |
1614 | ||
1615 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1616 | replace_reg (dest, regno); | |
1617 | ||
1618 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1619 | = regstack->reg[regstack->top]; | |
1620 | } | |
1621 | ||
1622 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1623 | REGNO (XEXP (src2_note, 0))); | |
1624 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
1625 | regstack->top--; | |
535825e6 | 1626 | } |
1627 | else | |
1628 | { | |
535825e6 | 1629 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
f3d96a58 | 1630 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
535825e6 | 1631 | } |
2fa792d7 | 1632 | |
41a6f238 | 1633 | /* Keep operand 1 matching with destination. */ |
6720e96c | 1634 | if (COMMUTATIVE_ARITH_P (pat_src) |
2fa792d7 | 1635 | && REG_P (*src1) && REG_P (*src2) |
1636 | && REGNO (*src1) != REGNO (*dest)) | |
1637 | { | |
73ca2d39 | 1638 | int tmp = REGNO (*src1); |
1639 | replace_reg (src1, REGNO (*src2)); | |
1640 | replace_reg (src2, tmp); | |
2fa792d7 | 1641 | } |
f3d96a58 | 1642 | break; |
535825e6 | 1643 | |
f3d96a58 | 1644 | case UNSPEC: |
1645 | switch (XINT (pat_src, 1)) | |
1646 | { | |
3cd431f4 | 1647 | case UNSPEC_FIST: |
cb5d0a18 | 1648 | case UNSPEC_FIST_ATOMIC: |
162669a8 | 1649 | |
1650 | case UNSPEC_FIST_FLOOR: | |
1651 | case UNSPEC_FIST_CEIL: | |
1652 | ||
3cd431f4 | 1653 | /* These insns only operate on the top of the stack. */ |
1654 | ||
1655 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1656 | emit_swap_insn (insn, regstack, *src1); | |
1657 | ||
1658 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1659 | ||
1660 | if (STACK_REG_P (*dest)) | |
1661 | replace_reg (dest, FIRST_STACK_REG); | |
1662 | ||
1663 | if (src1_note) | |
1664 | { | |
1665 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1666 | regstack->top--; | |
1667 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1668 | } | |
1669 | ||
1670 | replace_reg (src1, FIRST_STACK_REG); | |
1671 | break; | |
1672 | ||
69b779ea | 1673 | case UNSPEC_FXAM: |
1674 | ||
1675 | /* This insn only operate on the top of the stack. */ | |
1676 | ||
1677 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1678 | emit_swap_insn (insn, regstack, *src1); | |
1679 | ||
1680 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1681 | ||
1682 | replace_reg (src1, FIRST_STACK_REG); | |
1683 | ||
1684 | if (src1_note) | |
1685 | { | |
1686 | remove_regno_note (insn, REG_DEAD, | |
1687 | REGNO (XEXP (src1_note, 0))); | |
1688 | emit_pop_insn (insn, regstack, XEXP (src1_note, 0), | |
1689 | EMIT_AFTER); | |
1690 | } | |
1691 | ||
1692 | break; | |
1693 | ||
372310d2 | 1694 | case UNSPEC_SIN: |
1695 | case UNSPEC_COS: | |
839151ad | 1696 | case UNSPEC_FRNDINT: |
1697 | case UNSPEC_F2XM1: | |
aef94a0f | 1698 | |
1699 | case UNSPEC_FRNDINT_FLOOR: | |
1700 | case UNSPEC_FRNDINT_CEIL: | |
1701 | case UNSPEC_FRNDINT_TRUNC: | |
1702 | case UNSPEC_FRNDINT_MASK_PM: | |
1703 | ||
64d0b996 | 1704 | /* Above insns operate on the top of the stack. */ |
1705 | ||
1706 | case UNSPEC_SINCOS_COS: | |
1707 | case UNSPEC_XTRACT_FRACT: | |
1708 | ||
1709 | /* Above insns operate on the top two stack slots, | |
1710 | first part of one input, double output insn. */ | |
d315aa96 | 1711 | |
f3d96a58 | 1712 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
d315aa96 | 1713 | |
f3d96a58 | 1714 | emit_swap_insn (insn, regstack, *src1); |
d315aa96 | 1715 | |
64d0b996 | 1716 | /* Input should never die, it is replaced with output. */ |
f3d96a58 | 1717 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
04e579b6 | 1718 | gcc_assert (!src1_note); |
d315aa96 | 1719 | |
f3d96a58 | 1720 | if (STACK_REG_P (*dest)) |
1721 | replace_reg (dest, FIRST_STACK_REG); | |
d315aa96 | 1722 | |
f3d96a58 | 1723 | replace_reg (src1, FIRST_STACK_REG); |
1724 | break; | |
d315aa96 | 1725 | |
64d0b996 | 1726 | case UNSPEC_SINCOS_SIN: |
1727 | case UNSPEC_XTRACT_EXP: | |
1728 | ||
1729 | /* These insns operate on the top two stack slots, | |
1730 | second part of one input, double output insn. */ | |
1731 | ||
1732 | regstack->top++; | |
1733 | /* FALLTHRU */ | |
1734 | ||
1735 | case UNSPEC_TAN: | |
1736 | ||
1737 | /* For UNSPEC_TAN, regstack->top is already increased | |
1738 | by inherent load of constant 1.0. */ | |
1739 | ||
1740 | /* Output value is generated in the second stack slot. | |
1741 | Move current value from second slot to the top. */ | |
1742 | regstack->reg[regstack->top] | |
1743 | = regstack->reg[regstack->top - 1]; | |
1744 | ||
1745 | gcc_assert (STACK_REG_P (*dest)); | |
1746 | ||
1747 | regstack->reg[regstack->top - 1] = REGNO (*dest); | |
1748 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1749 | replace_reg (dest, FIRST_STACK_REG + 1); | |
1750 | ||
1751 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1752 | ||
1753 | replace_reg (src1, FIRST_STACK_REG); | |
1754 | break; | |
1755 | ||
b60cce8a | 1756 | case UNSPEC_FPATAN: |
26398ccb | 1757 | case UNSPEC_FYL2X: |
f474cd93 | 1758 | case UNSPEC_FYL2XP1: |
b60cce8a | 1759 | /* These insns operate on the top two stack slots. */ |
1760 | ||
1761 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1762 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1763 | ||
1764 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1765 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1766 | ||
0bfbd311 | 1767 | swap_to_top (insn, regstack, *src1, *src2); |
b60cce8a | 1768 | |
1769 | replace_reg (src1, FIRST_STACK_REG); | |
1770 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1771 | ||
1772 | if (src1_note) | |
1773 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1774 | if (src2_note) | |
1775 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
1776 | ||
1777 | /* Pop both input operands from the stack. */ | |
1778 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1779 | regstack->reg[regstack->top]); | |
1780 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1781 | regstack->reg[regstack->top - 1]); | |
1782 | regstack->top -= 2; | |
1783 | ||
1784 | /* Push the result back onto the stack. */ | |
1785 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1786 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1787 | replace_reg (dest, FIRST_STACK_REG); | |
1788 | break; | |
1789 | ||
0bfbd311 | 1790 | case UNSPEC_FSCALE_FRACT: |
80ed5c06 | 1791 | case UNSPEC_FPREM_F: |
1792 | case UNSPEC_FPREM1_F: | |
5c2d2d32 | 1793 | /* These insns operate on the top two stack slots, |
0bfbd311 | 1794 | first part of double input, double output insn. */ |
1795 | ||
1796 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1797 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1798 | ||
1799 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1800 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1801 | ||
1802 | /* Inputs should never die, they are | |
1803 | replaced with outputs. */ | |
04e579b6 | 1804 | gcc_assert (!src1_note); |
1805 | gcc_assert (!src2_note); | |
0bfbd311 | 1806 | |
1807 | swap_to_top (insn, regstack, *src1, *src2); | |
1808 | ||
1809 | /* Push the result back onto stack. Empty stack slot | |
0bed3869 | 1810 | will be filled in second part of insn. */ |
7d4c98bc | 1811 | if (STACK_REG_P (*dest)) |
1812 | { | |
1813 | regstack->reg[regstack->top] = REGNO (*dest); | |
1814 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1815 | replace_reg (dest, FIRST_STACK_REG); | |
1816 | } | |
0bfbd311 | 1817 | |
1818 | replace_reg (src1, FIRST_STACK_REG); | |
1819 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1820 | break; | |
1821 | ||
1822 | case UNSPEC_FSCALE_EXP: | |
80ed5c06 | 1823 | case UNSPEC_FPREM_U: |
1824 | case UNSPEC_FPREM1_U: | |
5c2d2d32 | 1825 | /* These insns operate on the top two stack slots, |
0bfbd311 | 1826 | second part of double input, double output insn. */ |
1827 | ||
1828 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1829 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1830 | ||
0bfbd311 | 1831 | /* Push the result back onto stack. Fill empty slot from |
1832 | first part of insn and fix top of stack pointer. */ | |
7d4c98bc | 1833 | if (STACK_REG_P (*dest)) |
1834 | { | |
1835 | regstack->reg[regstack->top - 1] = REGNO (*dest); | |
1836 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1837 | replace_reg (dest, FIRST_STACK_REG + 1); | |
1838 | } | |
0bfbd311 | 1839 | |
1840 | replace_reg (src1, FIRST_STACK_REG); | |
1841 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1842 | break; | |
1843 | ||
5c2d2d32 | 1844 | case UNSPEC_C2_FLAG: |
1845 | /* This insn operates on the top two stack slots, | |
1846 | third part of C2 setting double input insn. */ | |
1847 | ||
1848 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1849 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1850 | ||
1851 | replace_reg (src1, FIRST_STACK_REG); | |
1852 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1853 | break; | |
1854 | ||
372310d2 | 1855 | case UNSPEC_SAHF: |
1856 | /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) | |
1857 | The combination matches the PPRO fcomi instruction. */ | |
d315aa96 | 1858 | |
f3d96a58 | 1859 | pat_src = XVECEXP (pat_src, 0, 0); |
04e579b6 | 1860 | gcc_assert (GET_CODE (pat_src) == UNSPEC); |
1861 | gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); | |
d632b59a | 1862 | /* Fall through. */ |
ce71a9e6 | 1863 | |
372310d2 | 1864 | case UNSPEC_FNSTSW: |
f3d96a58 | 1865 | /* Combined fcomp+fnstsw generated for doing well with |
1866 | CSE. When optimizing this would have been broken | |
1867 | up before now. */ | |
ce71a9e6 | 1868 | |
f3d96a58 | 1869 | pat_src = XVECEXP (pat_src, 0, 0); |
04e579b6 | 1870 | gcc_assert (GET_CODE (pat_src) == COMPARE); |
ce71a9e6 | 1871 | |
f3d96a58 | 1872 | compare_for_stack_reg (insn, regstack, pat_src); |
1873 | break; | |
ce71a9e6 | 1874 | |
f3d96a58 | 1875 | default: |
04e579b6 | 1876 | gcc_unreachable (); |
f3d96a58 | 1877 | } |
ce71a9e6 | 1878 | break; |
1879 | ||
f3d96a58 | 1880 | case IF_THEN_ELSE: |
aa40f561 | 1881 | /* This insn requires the top of stack to be the destination. */ |
d315aa96 | 1882 | |
ba126de4 | 1883 | src1 = get_true_reg (&XEXP (pat_src, 1)); |
1884 | src2 = get_true_reg (&XEXP (pat_src, 2)); | |
1885 | ||
1886 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1887 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1888 | ||
f3d96a58 | 1889 | /* If the comparison operator is an FP comparison operator, |
1890 | it is handled correctly by compare_for_stack_reg () who | |
1891 | will move the destination to the top of stack. But if the | |
1892 | comparison operator is not an FP comparison operator, we | |
aa40f561 | 1893 | have to handle it here. */ |
f3d96a58 | 1894 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG |
1895 | && REGNO (*dest) != regstack->reg[regstack->top]) | |
ba126de4 | 1896 | { |
1897 | /* In case one of operands is the top of stack and the operands | |
372310d2 | 1898 | dies, it is safe to make it the destination operand by |
1899 | reversing the direction of cmove and avoid fxch. */ | |
ba126de4 | 1900 | if ((REGNO (*src1) == regstack->reg[regstack->top] |
1901 | && src1_note) | |
1902 | || (REGNO (*src2) == regstack->reg[regstack->top] | |
1903 | && src2_note)) | |
1904 | { | |
33e1caad | 1905 | int idx1 = (get_hard_regnum (regstack, *src1) |
1906 | - FIRST_STACK_REG); | |
1907 | int idx2 = (get_hard_regnum (regstack, *src2) | |
1908 | - FIRST_STACK_REG); | |
1909 | ||
1910 | /* Make reg-stack believe that the operands are already | |
1911 | swapped on the stack */ | |
1912 | regstack->reg[regstack->top - idx1] = REGNO (*src2); | |
1913 | regstack->reg[regstack->top - idx2] = REGNO (*src1); | |
1914 | ||
1915 | /* Reverse condition to compensate the operand swap. | |
1916 | i386 do have comparison always reversible. */ | |
ba126de4 | 1917 | PUT_CODE (XEXP (pat_src, 0), |
1918 | reversed_comparison_code (XEXP (pat_src, 0), insn)); | |
1919 | } | |
1920 | else | |
2617fe26 | 1921 | emit_swap_insn (insn, regstack, *dest); |
ba126de4 | 1922 | } |
632c6b15 | 1923 | |
f3d96a58 | 1924 | { |
1925 | rtx src_note [3]; | |
1926 | int i; | |
632c6b15 | 1927 | |
f3d96a58 | 1928 | src_note[0] = 0; |
1929 | src_note[1] = src1_note; | |
1930 | src_note[2] = src2_note; | |
2ff2cb3c | 1931 | |
f3d96a58 | 1932 | if (STACK_REG_P (*src1)) |
1933 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1934 | if (STACK_REG_P (*src2)) | |
1935 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
632c6b15 | 1936 | |
f3d96a58 | 1937 | for (i = 1; i <= 2; i++) |
1938 | if (src_note [i]) | |
632c6b15 | 1939 | { |
f3d96a58 | 1940 | int regno = REGNO (XEXP (src_note[i], 0)); |
1941 | ||
1942 | /* If the register that dies is not at the top of | |
04e579b6 | 1943 | stack, then move the top of stack to the dead reg. |
1944 | Top of stack should never die, as it is the | |
1945 | destination. */ | |
1946 | gcc_assert (regno != regstack->reg[regstack->top]); | |
1947 | remove_regno_note (insn, REG_DEAD, regno); | |
1948 | emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
1949 | EMIT_AFTER); | |
632c6b15 | 1950 | } |
f3d96a58 | 1951 | } |
632c6b15 | 1952 | |
f3d96a58 | 1953 | /* Make dest the top of stack. Add dest to regstack if |
aa40f561 | 1954 | not present. */ |
f3d96a58 | 1955 | if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) |
2617fe26 | 1956 | regstack->reg[++regstack->top] = REGNO (*dest); |
f3d96a58 | 1957 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1958 | replace_reg (dest, FIRST_STACK_REG); | |
1959 | break; | |
3c8249d9 | 1960 | |
f3d96a58 | 1961 | default: |
04e579b6 | 1962 | gcc_unreachable (); |
f3d96a58 | 1963 | } |
632c6b15 | 1964 | break; |
535825e6 | 1965 | } |
f3d96a58 | 1966 | |
1967 | default: | |
1968 | break; | |
1969 | } | |
393522df | 1970 | |
1971 | return control_flow_insn_deleted; | |
535825e6 | 1972 | } |
1973 | \f | |
bed3e6b4 | 1974 | /* Substitute hard regnums for any stack regs in INSN, which has |
1975 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
78e49515 | 1976 | before the insn, and is updated with changes made here. |
bed3e6b4 | 1977 | |
1978 | There are several requirements and assumptions about the use of | |
1979 | stack-like regs in asm statements. These rules are enforced by | |
1980 | record_asm_stack_regs; see comments there for details. Any | |
1981 | asm_operands left in the RTL at this point may be assume to meet the | |
667a0198 | 1982 | requirements, since record_asm_stack_regs removes any problem asm. */ |
bed3e6b4 | 1983 | |
667a0198 | 1984 | static void |
8fe8e576 | 1985 | subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) |
bed3e6b4 | 1986 | { |
bed3e6b4 | 1987 | rtx body = PATTERN (insn); |
bed3e6b4 | 1988 | |
1989 | rtx *note_reg; /* Array of note contents */ | |
1990 | rtx **note_loc; /* Address of REG field of each note */ | |
1991 | enum reg_note *note_kind; /* The type of each note */ | |
1992 | ||
ef2c4a29 | 1993 | rtx *clobber_reg = 0; |
1994 | rtx **clobber_loc = 0; | |
bed3e6b4 | 1995 | |
1996 | struct stack_def temp_stack; | |
1997 | int n_notes; | |
1998 | int n_clobbers; | |
1999 | rtx note; | |
2000 | int i; | |
78e49515 | 2001 | int n_inputs, n_outputs; |
bed3e6b4 | 2002 | |
f3d96a58 | 2003 | if (! check_asm_stack_operands (insn)) |
2004 | return; | |
2005 | ||
bed3e6b4 | 2006 | /* Find out what the constraints required. If no constraint |
2007 | alternative matches, that is a compiler bug: we should have caught | |
f3d96a58 | 2008 | such an insn in check_asm_stack_operands. */ |
835b8178 | 2009 | extract_constrain_insn (insn); |
78e49515 | 2010 | |
8eaaac4d | 2011 | preprocess_constraints (insn); |
89a7a6a5 | 2012 | const operand_alternative *op_alt = which_op_alt (); |
bed3e6b4 | 2013 | |
78f55ca8 | 2014 | get_asm_operands_in_out (body, &n_outputs, &n_inputs); |
2617fe26 | 2015 | |
a92771b8 | 2016 | /* Strip SUBREGs here to make the following code simpler. */ |
ed420a25 | 2017 | for (i = 0; i < recog_data.n_operands; i++) |
2018 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
8ad4c111 | 2019 | && REG_P (SUBREG_REG (recog_data.operand[i]))) |
bed3e6b4 | 2020 | { |
ed420a25 | 2021 | recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); |
2022 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
bed3e6b4 | 2023 | } |
2024 | ||
2025 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
2026 | ||
2027 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2028 | i++; | |
2029 | ||
f7f3687c | 2030 | note_reg = XALLOCAVEC (rtx, i); |
2031 | note_loc = XALLOCAVEC (rtx *, i); | |
2032 | note_kind = XALLOCAVEC (enum reg_note, i); | |
bed3e6b4 | 2033 | |
2034 | n_notes = 0; | |
2035 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2036 | { | |
9eb946de | 2037 | if (GET_CODE (note) != EXPR_LIST) |
2038 | continue; | |
bed3e6b4 | 2039 | rtx reg = XEXP (note, 0); |
2040 | rtx *loc = & XEXP (note, 0); | |
2041 | ||
8ad4c111 | 2042 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
bed3e6b4 | 2043 | { |
2044 | loc = & SUBREG_REG (reg); | |
2045 | reg = SUBREG_REG (reg); | |
2046 | } | |
2047 | ||
2048 | if (STACK_REG_P (reg) | |
2049 | && (REG_NOTE_KIND (note) == REG_DEAD | |
2050 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
2051 | { | |
2052 | note_reg[n_notes] = reg; | |
2053 | note_loc[n_notes] = loc; | |
2054 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
2055 | n_notes++; | |
2056 | } | |
2057 | } | |
2058 | ||
2059 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
2060 | ||
2061 | n_clobbers = 0; | |
bed3e6b4 | 2062 | |
2063 | if (GET_CODE (body) == PARALLEL) | |
fc738e1d | 2064 | { |
f7f3687c | 2065 | clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); |
2066 | clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); | |
bed3e6b4 | 2067 | |
fc738e1d | 2068 | for (i = 0; i < XVECLEN (body, 0); i++) |
2069 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
2070 | { | |
2071 | rtx clobber = XVECEXP (body, 0, i); | |
2072 | rtx reg = XEXP (clobber, 0); | |
2073 | rtx *loc = & XEXP (clobber, 0); | |
bed3e6b4 | 2074 | |
8ad4c111 | 2075 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
fc738e1d | 2076 | { |
2077 | loc = & SUBREG_REG (reg); | |
2078 | reg = SUBREG_REG (reg); | |
2079 | } | |
2080 | ||
2081 | if (STACK_REG_P (reg)) | |
2082 | { | |
2083 | clobber_reg[n_clobbers] = reg; | |
2084 | clobber_loc[n_clobbers] = loc; | |
2085 | n_clobbers++; | |
2086 | } | |
2087 | } | |
2088 | } | |
bed3e6b4 | 2089 | |
f3d96a58 | 2090 | temp_stack = *regstack; |
bed3e6b4 | 2091 | |
2092 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
2093 | ||
78e49515 | 2094 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
ed420a25 | 2095 | if (STACK_REG_P (recog_data.operand[i]) |
757fefec | 2096 | && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) |
2097 | && op_alt[i].cl != FLOAT_REGS) | |
bed3e6b4 | 2098 | { |
2099 | /* If an operand needs to be in a particular reg in | |
2100 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
ed420a25 | 2101 | these constraints are for single register classes, and |
2102 | reload guaranteed that operand[i] is already in that class, | |
2103 | we can just use REGNO (recog_data.operand[i]) to know which | |
2104 | actual reg this operand needs to be in. */ | |
bed3e6b4 | 2105 | |
ed420a25 | 2106 | int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); |
bed3e6b4 | 2107 | |
04e579b6 | 2108 | gcc_assert (regno >= 0); |
bed3e6b4 | 2109 | |
97b330ca | 2110 | if ((unsigned int) regno != REGNO (recog_data.operand[i])) |
bed3e6b4 | 2111 | { |
ed420a25 | 2112 | /* recog_data.operand[i] is not in the right place. Find |
2113 | it and swap it with whatever is already in I's place. | |
2114 | K is where recog_data.operand[i] is now. J is where it | |
2115 | should be. */ | |
dfcf26a5 | 2116 | int j, k; |
bed3e6b4 | 2117 | |
2118 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
2119 | j = (temp_stack.top | |
ed420a25 | 2120 | - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); |
bed3e6b4 | 2121 | |
dfcf26a5 | 2122 | std::swap (temp_stack.reg[j], temp_stack.reg[k]); |
bed3e6b4 | 2123 | } |
2124 | } | |
2125 | ||
f3d96a58 | 2126 | /* Emit insns before INSN to make sure the reg-stack is in the right |
bed3e6b4 | 2127 | order. */ |
2128 | ||
f3d96a58 | 2129 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); |
bed3e6b4 | 2130 | |
2131 | /* Make the needed input register substitutions. Do death notes and | |
a92771b8 | 2132 | clobbers too, because these are for inputs, not outputs. */ |
bed3e6b4 | 2133 | |
78e49515 | 2134 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
ed420a25 | 2135 | if (STACK_REG_P (recog_data.operand[i])) |
bed3e6b4 | 2136 | { |
ed420a25 | 2137 | int regnum = get_hard_regnum (regstack, recog_data.operand[i]); |
bed3e6b4 | 2138 | |
04e579b6 | 2139 | gcc_assert (regnum >= 0); |
bed3e6b4 | 2140 | |
ed420a25 | 2141 | replace_reg (recog_data.operand_loc[i], regnum); |
bed3e6b4 | 2142 | } |
2143 | ||
2144 | for (i = 0; i < n_notes; i++) | |
2145 | if (note_kind[i] == REG_DEAD) | |
2146 | { | |
2147 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
2148 | ||
04e579b6 | 2149 | gcc_assert (regnum >= 0); |
bed3e6b4 | 2150 | |
2151 | replace_reg (note_loc[i], regnum); | |
2152 | } | |
2153 | ||
2154 | for (i = 0; i < n_clobbers; i++) | |
2155 | { | |
2156 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
2157 | Don't try to replace it in that case. */ | |
2158 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
2159 | ||
2160 | if (regnum >= 0) | |
2161 | { | |
2162 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
04e579b6 | 2163 | that these regs can't be MODE_INT and will assert. Just put |
bed3e6b4 | 2164 | the right reg there without calling replace_reg. */ |
2165 | ||
a5dff55e | 2166 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
bed3e6b4 | 2167 | } |
2168 | } | |
2169 | ||
a92771b8 | 2170 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
bed3e6b4 | 2171 | |
78e49515 | 2172 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
ed420a25 | 2173 | if (STACK_REG_P (recog_data.operand[i])) |
bed3e6b4 | 2174 | { |
2175 | /* An input reg is implicitly popped if it is tied to an | |
a92771b8 | 2176 | output, or if there is a CLOBBER for it. */ |
bed3e6b4 | 2177 | int j; |
2178 | ||
2179 | for (j = 0; j < n_clobbers; j++) | |
ed420a25 | 2180 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
bed3e6b4 | 2181 | break; |
2182 | ||
757fefec | 2183 | if (j < n_clobbers || op_alt[i].matches >= 0) |
bed3e6b4 | 2184 | { |
ed420a25 | 2185 | /* recog_data.operand[i] might not be at the top of stack. |
2186 | But that's OK, because all we need to do is pop the | |
2187 | right number of regs off of the top of the reg-stack. | |
2188 | record_asm_stack_regs guaranteed that all implicitly | |
2189 | popped regs were grouped at the top of the reg-stack. */ | |
bed3e6b4 | 2190 | |
2191 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2192 | regstack->reg[regstack->top]); | |
2193 | regstack->top--; | |
2194 | } | |
2195 | } | |
2196 | ||
2197 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2198 | Note that there isn't any need to substitute register numbers. | |
a92771b8 | 2199 | ??? Explain why this is true. */ |
bed3e6b4 | 2200 | |
2201 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2202 | { | |
2203 | /* See if there is an output for this hard reg. */ | |
2204 | int j; | |
2205 | ||
2206 | for (j = 0; j < n_outputs; j++) | |
ed420a25 | 2207 | if (STACK_REG_P (recog_data.operand[j]) |
97b330ca | 2208 | && REGNO (recog_data.operand[j]) == (unsigned) i) |
bed3e6b4 | 2209 | { |
2210 | regstack->reg[++regstack->top] = i; | |
2211 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2212 | break; | |
2213 | } | |
2214 | } | |
2215 | ||
2216 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2217 | input that the asm didn't implicitly pop. If the asm didn't | |
fc738e1d | 2218 | implicitly pop an input reg, that reg will still be live. |
bed3e6b4 | 2219 | |
2220 | Note that we can't use find_regno_note here: the register numbers | |
2221 | in the death notes have already been substituted. */ | |
2222 | ||
fc738e1d | 2223 | for (i = 0; i < n_outputs; i++) |
ed420a25 | 2224 | if (STACK_REG_P (recog_data.operand[i])) |
fc738e1d | 2225 | { |
2226 | int j; | |
2227 | ||
2228 | for (j = 0; j < n_notes; j++) | |
ed420a25 | 2229 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
fc738e1d | 2230 | && note_kind[j] == REG_UNUSED) |
2231 | { | |
ed420a25 | 2232 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
f3d96a58 | 2233 | EMIT_AFTER); |
fc738e1d | 2234 | break; |
2235 | } | |
2236 | } | |
2237 | ||
78e49515 | 2238 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
ed420a25 | 2239 | if (STACK_REG_P (recog_data.operand[i])) |
bed3e6b4 | 2240 | { |
2241 | int j; | |
2242 | ||
2243 | for (j = 0; j < n_notes; j++) | |
ed420a25 | 2244 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
fc738e1d | 2245 | && note_kind[j] == REG_DEAD |
78e49515 | 2246 | && TEST_HARD_REG_BIT (regstack->reg_set, |
ed420a25 | 2247 | REGNO (recog_data.operand[i]))) |
bed3e6b4 | 2248 | { |
ed420a25 | 2249 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
f3d96a58 | 2250 | EMIT_AFTER); |
bed3e6b4 | 2251 | break; |
2252 | } | |
2253 | } | |
2254 | } | |
2255 | \f | |
535825e6 | 2256 | /* Substitute stack hard reg numbers for stack virtual registers in |
2257 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2258 | current stack content. Insns may be emitted as needed to arrange the | |
393522df | 2259 | stack for the 387 based on the contents of the insn. Return whether |
2260 | a control flow insn was deleted in the process. */ | |
6f3ee61d | 2261 | |
393522df | 2262 | static bool |
8fe8e576 | 2263 | subst_stack_regs (rtx_insn *insn, stack_ptr regstack) |
535825e6 | 2264 | { |
19cb6b50 | 2265 | rtx *note_link, note; |
393522df | 2266 | bool control_flow_insn_deleted = false; |
19cb6b50 | 2267 | int i; |
535825e6 | 2268 | |
6d7dc5b9 | 2269 | if (CALL_P (insn)) |
ce71a9e6 | 2270 | { |
2271 | int top = regstack->top; | |
535825e6 | 2272 | |
ce71a9e6 | 2273 | /* If there are any floating point parameters to be passed in |
2274 | registers for this call, make sure they are in the right | |
2275 | order. */ | |
535825e6 | 2276 | |
ce71a9e6 | 2277 | if (top >= 0) |
2278 | { | |
9d97464a | 2279 | straighten_stack (insn, regstack); |
a5dff55e | 2280 | |
ce71a9e6 | 2281 | /* Now mark the arguments as dead after the call. */ |
a5dff55e | 2282 | |
ce71a9e6 | 2283 | while (regstack->top >= 0) |
2284 | { | |
2285 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
2286 | regstack->top--; | |
2287 | } | |
2288 | } | |
2289 | } | |
535825e6 | 2290 | |
2291 | /* Do the actual substitution if any stack regs are mentioned. | |
2292 | Since we only record whether entire insn mentions stack regs, and | |
2293 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2294 | we must check each pattern in a parallel here. A call_value_pop could | |
a92771b8 | 2295 | fail otherwise. */ |
535825e6 | 2296 | |
b67ec609 | 2297 | if (stack_regs_mentioned (insn)) |
535825e6 | 2298 | { |
78e49515 | 2299 | int n_operands = asm_noperands (PATTERN (insn)); |
bed3e6b4 | 2300 | if (n_operands >= 0) |
2301 | { | |
2302 | /* This insn is an `asm' with operands. Decode the operands, | |
2303 | decide how many are inputs, and do register substitution. | |
a92771b8 | 2304 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
bed3e6b4 | 2305 | |
78e49515 | 2306 | subst_asm_stack_regs (insn, regstack); |
393522df | 2307 | return control_flow_insn_deleted; |
bed3e6b4 | 2308 | } |
2309 | ||
535825e6 | 2310 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
d3115c90 | 2311 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
535825e6 | 2312 | { |
2313 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
f2a3e89e | 2314 | { |
2315 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
2316 | XVECEXP (PATTERN (insn), 0, i) | |
2317 | = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); | |
2318 | control_flow_insn_deleted | |
2319 | |= subst_stack_regs_pat (insn, regstack, | |
2320 | XVECEXP (PATTERN (insn), 0, i)); | |
2321 | } | |
535825e6 | 2322 | } |
2323 | else | |
393522df | 2324 | control_flow_insn_deleted |
2325 | |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
535825e6 | 2326 | } |
2327 | ||
2328 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
a92771b8 | 2329 | REG_UNUSED will already have been dealt with, so just return. */ |
535825e6 | 2330 | |
dd1286fb | 2331 | if (NOTE_P (insn) || insn->deleted ()) |
393522df | 2332 | return control_flow_insn_deleted; |
535825e6 | 2333 | |
50e6dbf3 | 2334 | /* If this a noreturn call, we can't insert pop insns after it. |
2335 | Instead, reset the stack state to empty. */ | |
2336 | if (CALL_P (insn) | |
2337 | && find_reg_note (insn, REG_NORETURN, NULL)) | |
2338 | { | |
2339 | regstack->top = -1; | |
2340 | CLEAR_HARD_REG_SET (regstack->reg_set); | |
2341 | return control_flow_insn_deleted; | |
2342 | } | |
2343 | ||
535825e6 | 2344 | /* If there is a REG_UNUSED note on a stack register on this insn, |
2345 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2346 | since the form of the newly emitted pop insn references the reg, | |
a92771b8 | 2347 | making it no longer `unset'. */ |
535825e6 | 2348 | |
337d789b | 2349 | note_link = ®_NOTES (insn); |
535825e6 | 2350 | for (note = *note_link; note; note = XEXP (note, 1)) |
2351 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2352 | { | |
2353 | *note_link = XEXP (note, 1); | |
f3d96a58 | 2354 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); |
535825e6 | 2355 | } |
2356 | else | |
2357 | note_link = &XEXP (note, 1); | |
393522df | 2358 | |
2359 | return control_flow_insn_deleted; | |
535825e6 | 2360 | } |
2361 | \f | |
2362 | /* Change the organization of the stack so that it fits a new basic | |
2363 | block. Some registers might have to be popped, but there can never be | |
2364 | a register live in the new block that is not now live. | |
2365 | ||
f3d96a58 | 2366 | Insert any needed insns before or after INSN, as indicated by |
2367 | WHERE. OLD is the original stack layout, and NEW is the desired | |
0c6d8c36 | 2368 | form. OLD is updated to reflect the code emitted, i.e., it will be |
f3d96a58 | 2369 | the same as NEW upon return. |
535825e6 | 2370 | |
2371 | This function will not preserve block_end[]. But that information | |
a92771b8 | 2372 | is no longer needed once this has executed. */ |
535825e6 | 2373 | |
2374 | static void | |
8fe8e576 | 2375 | change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, |
2376 | enum emit_where where) | |
535825e6 | 2377 | { |
2378 | int reg; | |
f3d96a58 | 2379 | int update_end = 0; |
3072d30e | 2380 | int i; |
535825e6 | 2381 | |
9d97464a | 2382 | /* Stack adjustments for the first insn in a block update the |
2383 | current_block's stack_in instead of inserting insns directly. | |
2384 | compensate_edges will add the necessary code later. */ | |
2385 | if (current_block | |
2386 | && starting_stack_p | |
2387 | && where == EMIT_BEFORE) | |
2388 | { | |
6659485c | 2389 | BLOCK_INFO (current_block)->stack_in = *new_stack; |
9d97464a | 2390 | starting_stack_p = false; |
6659485c | 2391 | *old = *new_stack; |
9d97464a | 2392 | return; |
2393 | } | |
2394 | ||
f3d96a58 | 2395 | /* We will be inserting new insns "backwards". If we are to insert |
2396 | after INSN, find the next insn, and insert before it. */ | |
535825e6 | 2397 | |
f3d96a58 | 2398 | if (where == EMIT_AFTER) |
2399 | { | |
5496dbfc | 2400 | if (current_block && BB_END (current_block) == insn) |
f3d96a58 | 2401 | update_end = 1; |
2402 | insn = NEXT_INSN (insn); | |
2403 | } | |
535825e6 | 2404 | |
3072d30e | 2405 | /* Initialize partially dead variables. */ |
2406 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
6659485c | 2407 | if (TEST_HARD_REG_BIT (new_stack->reg_set, i) |
3072d30e | 2408 | && !TEST_HARD_REG_BIT (old->reg_set, i)) |
2409 | { | |
2410 | old->reg[++old->top] = i; | |
2411 | SET_HARD_REG_BIT (old->reg_set, i); | |
d1f9b275 | 2412 | emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num), |
2413 | insn); | |
3072d30e | 2414 | } |
2415 | ||
a92771b8 | 2416 | /* Pop any registers that are not needed in the new block. */ |
535825e6 | 2417 | |
7e542714 | 2418 | /* If the destination block's stack already has a specified layout |
2419 | and contains two or more registers, use a more intelligent algorithm | |
47ae02b7 | 2420 | to pop registers that minimizes the number of fxchs below. */ |
6659485c | 2421 | if (new_stack->top > 0) |
7e542714 | 2422 | { |
2423 | bool slots[REG_STACK_SIZE]; | |
2424 | int pops[REG_STACK_SIZE]; | |
73f51753 | 2425 | int next, dest, topsrc; |
7e542714 | 2426 | |
2427 | /* First pass to determine the free slots. */ | |
6659485c | 2428 | for (reg = 0; reg <= new_stack->top; reg++) |
2429 | slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); | |
7e542714 | 2430 | |
2431 | /* Second pass to allocate preferred slots. */ | |
73f51753 | 2432 | topsrc = -1; |
6659485c | 2433 | for (reg = old->top; reg > new_stack->top; reg--) |
2434 | if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) | |
7e542714 | 2435 | { |
2436 | dest = -1; | |
6659485c | 2437 | for (next = 0; next <= new_stack->top; next++) |
2438 | if (!slots[next] && new_stack->reg[next] == old->reg[reg]) | |
7e542714 | 2439 | { |
73f51753 | 2440 | /* If this is a preference for the new top of stack, record |
2441 | the fact by remembering it's old->reg in topsrc. */ | |
6659485c | 2442 | if (next == new_stack->top) |
73f51753 | 2443 | topsrc = reg; |
7e542714 | 2444 | slots[next] = true; |
2445 | dest = next; | |
2446 | break; | |
2447 | } | |
2448 | pops[reg] = dest; | |
2449 | } | |
2450 | else | |
2451 | pops[reg] = reg; | |
2452 | ||
73f51753 | 2453 | /* Intentionally, avoid placing the top of stack in it's correct |
2454 | location, if we still need to permute the stack below and we | |
2455 | can usefully place it somewhere else. This is the case if any | |
2456 | slot is still unallocated, in which case we should place the | |
2457 | top of stack there. */ | |
2458 | if (topsrc != -1) | |
6659485c | 2459 | for (reg = 0; reg < new_stack->top; reg++) |
73f51753 | 2460 | if (!slots[reg]) |
2461 | { | |
2462 | pops[topsrc] = reg; | |
6659485c | 2463 | slots[new_stack->top] = false; |
73f51753 | 2464 | slots[reg] = true; |
2465 | break; | |
2466 | } | |
2467 | ||
7e542714 | 2468 | /* Third pass allocates remaining slots and emits pop insns. */ |
6659485c | 2469 | next = new_stack->top; |
2470 | for (reg = old->top; reg > new_stack->top; reg--) | |
7e542714 | 2471 | { |
2472 | dest = pops[reg]; | |
2473 | if (dest == -1) | |
2474 | { | |
2475 | /* Find next free slot. */ | |
2476 | while (slots[next]) | |
73f51753 | 2477 | next--; |
2478 | dest = next--; | |
7e542714 | 2479 | } |
2480 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), | |
2481 | EMIT_BEFORE); | |
2482 | } | |
2483 | } | |
2484 | else | |
73f51753 | 2485 | { |
2486 | /* The following loop attempts to maximize the number of times we | |
2487 | pop the top of the stack, as this permits the use of the faster | |
2488 | ffreep instruction on platforms that support it. */ | |
2489 | int live, next; | |
2490 | ||
2491 | live = 0; | |
2492 | for (reg = 0; reg <= old->top; reg++) | |
6659485c | 2493 | if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) |
73f51753 | 2494 | live++; |
2495 | ||
2496 | next = live; | |
2497 | while (old->top >= live) | |
6659485c | 2498 | if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) |
73f51753 | 2499 | { |
6659485c | 2500 | while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) |
73f51753 | 2501 | next--; |
2502 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), | |
7e542714 | 2503 | EMIT_BEFORE); |
73f51753 | 2504 | } |
2505 | else | |
2506 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), | |
7e542714 | 2507 | EMIT_BEFORE); |
73f51753 | 2508 | } |
535825e6 | 2509 | |
6659485c | 2510 | if (new_stack->top == -2) |
535825e6 | 2511 | { |
2512 | /* If the new block has never been processed, then it can inherit | |
a92771b8 | 2513 | the old stack order. */ |
535825e6 | 2514 | |
6659485c | 2515 | new_stack->top = old->top; |
2516 | memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); | |
535825e6 | 2517 | } |
2518 | else | |
2519 | { | |
2520 | /* This block has been entered before, and we must match the | |
a92771b8 | 2521 | previously selected stack order. */ |
535825e6 | 2522 | |
2523 | /* By now, the only difference should be the order of the stack, | |
a92771b8 | 2524 | not their depth or liveliness. */ |
535825e6 | 2525 | |
6659485c | 2526 | gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); |
2527 | gcc_assert (old->top == new_stack->top); | |
535825e6 | 2528 | |
6659485c | 2529 | /* If the stack is not empty (new_stack->top != -1), loop here emitting |
2617fe26 | 2530 | swaps until the stack is correct. |
ce531cb7 | 2531 | |
2532 | The worst case number of swaps emitted is N + 2, where N is the | |
535825e6 | 2533 | depth of the stack. In some cases, the reg at the top of |
2534 | stack may be correct, but swapped anyway in order to fix | |
2535 | other regs. But since we never swap any other reg away from | |
a92771b8 | 2536 | its correct slot, this algorithm will converge. */ |
535825e6 | 2537 | |
6659485c | 2538 | if (new_stack->top != -1) |
ce531cb7 | 2539 | do |
2540 | { | |
2541 | /* Swap the reg at top of stack into the position it is | |
2542 | supposed to be in, until the correct top of stack appears. */ | |
535825e6 | 2543 | |
6659485c | 2544 | while (old->reg[old->top] != new_stack->reg[new_stack->top]) |
ce531cb7 | 2545 | { |
6659485c | 2546 | for (reg = new_stack->top; reg >= 0; reg--) |
2547 | if (new_stack->reg[reg] == old->reg[old->top]) | |
ce531cb7 | 2548 | break; |
535825e6 | 2549 | |
04e579b6 | 2550 | gcc_assert (reg != -1); |
535825e6 | 2551 | |
ce531cb7 | 2552 | emit_swap_insn (insn, old, |
2553 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2554 | } | |
535825e6 | 2555 | |
ce531cb7 | 2556 | /* See if any regs remain incorrect. If so, bring an |
535825e6 | 2557 | incorrect reg to the top of stack, and let the while loop |
a92771b8 | 2558 | above fix it. */ |
535825e6 | 2559 | |
6659485c | 2560 | for (reg = new_stack->top; reg >= 0; reg--) |
2561 | if (new_stack->reg[reg] != old->reg[reg]) | |
ce531cb7 | 2562 | { |
2563 | emit_swap_insn (insn, old, | |
2564 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2565 | break; | |
2566 | } | |
2567 | } while (reg >= 0); | |
535825e6 | 2568 | |
a92771b8 | 2569 | /* At this point there must be no differences. */ |
535825e6 | 2570 | |
2571 | for (reg = old->top; reg >= 0; reg--) | |
6659485c | 2572 | gcc_assert (old->reg[reg] == new_stack->reg[reg]); |
535825e6 | 2573 | } |
f3d96a58 | 2574 | |
2575 | if (update_end) | |
26bb3cb2 | 2576 | BB_END (current_block) = PREV_INSN (insn); |
535825e6 | 2577 | } |
2578 | \f | |
f3d96a58 | 2579 | /* Print stack configuration. */ |
535825e6 | 2580 | |
2581 | static void | |
2b15d2ba | 2582 | print_stack (FILE *file, stack_ptr s) |
535825e6 | 2583 | { |
f3d96a58 | 2584 | if (! file) |
2585 | return; | |
535825e6 | 2586 | |
f3d96a58 | 2587 | if (s->top == -2) |
2588 | fprintf (file, "uninitialized\n"); | |
2589 | else if (s->top == -1) | |
2590 | fprintf (file, "empty\n"); | |
2591 | else | |
ce71a9e6 | 2592 | { |
f3d96a58 | 2593 | int i; |
2594 | fputs ("[ ", file); | |
2595 | for (i = 0; i <= s->top; ++i) | |
2596 | fprintf (file, "%d ", s->reg[i]); | |
2597 | fputs ("]\n", file); | |
ce71a9e6 | 2598 | } |
f3d96a58 | 2599 | } |
2600 | \f | |
2601 | /* This function was doing life analysis. We now let the regular live | |
2617fe26 | 2602 | code do it's job, so we only need to check some extra invariants |
f3d96a58 | 2603 | that reg-stack expects. Primary among these being that all registers |
2604 | are initialized before use. | |
535825e6 | 2605 | |
f3d96a58 | 2606 | The function returns true when code was emitted to CFG edges and |
2607 | commit_edge_insertions needs to be called. */ | |
535825e6 | 2608 | |
f3d96a58 | 2609 | static int |
3ad4992f | 2610 | convert_regs_entry (void) |
f3d96a58 | 2611 | { |
4c26117a | 2612 | int inserted = 0; |
f3d96a58 | 2613 | edge e; |
cd665a06 | 2614 | edge_iterator ei; |
535825e6 | 2615 | |
bae5345b | 2616 | /* Load something into each stack register live at function entry. |
f3d96a58 | 2617 | Such live registers can be caused by uninitialized variables or |
2617fe26 | 2618 | functions not returning values on all paths. In order to keep |
f3d96a58 | 2619 | the push/pop code happy, and to not scrog the register stack, we |
2617fe26 | 2620 | must put something in these registers. Use a QNaN. |
535825e6 | 2621 | |
41a6f238 | 2622 | Note that we are inserting converted code here. This code is |
f3d96a58 | 2623 | never seen by the convert_regs pass. */ |
535825e6 | 2624 | |
34154e27 | 2625 | FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) |
f3d96a58 | 2626 | { |
2627 | basic_block block = e->dest; | |
2628 | block_info bi = BLOCK_INFO (block); | |
2629 | int reg, top = -1; | |
535825e6 | 2630 | |
f3d96a58 | 2631 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) |
bae5345b | 2632 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) |
f3d96a58 | 2633 | { |
2634 | rtx init; | |
535825e6 | 2635 | |
f3d96a58 | 2636 | bi->stack_in.reg[++top] = reg; |
535825e6 | 2637 | |
d1f9b275 | 2638 | init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode), |
62ec6441 | 2639 | not_a_num); |
f3d96a58 | 2640 | insert_insn_on_edge (init, e); |
2641 | inserted = 1; | |
2642 | } | |
535825e6 | 2643 | |
f3d96a58 | 2644 | bi->stack_in.top = top; |
2645 | } | |
535825e6 | 2646 | |
f3d96a58 | 2647 | return inserted; |
2648 | } | |
535825e6 | 2649 | |
f3d96a58 | 2650 | /* Construct the desired stack for function exit. This will either |
2651 | be `empty', or the function return value at top-of-stack. */ | |
535825e6 | 2652 | |
f3d96a58 | 2653 | static void |
3ad4992f | 2654 | convert_regs_exit (void) |
f3d96a58 | 2655 | { |
2656 | int value_reg_low, value_reg_high; | |
2b15d2ba | 2657 | stack_ptr output_stack; |
f3d96a58 | 2658 | rtx retvalue; |
535825e6 | 2659 | |
f3d96a58 | 2660 | retvalue = stack_result (current_function_decl); |
2661 | value_reg_low = value_reg_high = -1; | |
2662 | if (retvalue) | |
2663 | { | |
2664 | value_reg_low = REGNO (retvalue); | |
788bed51 | 2665 | value_reg_high = END_REGNO (retvalue) - 1; |
f3d96a58 | 2666 | } |
535825e6 | 2667 | |
34154e27 | 2668 | output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; |
f3d96a58 | 2669 | if (value_reg_low == -1) |
2670 | output_stack->top = -1; | |
2671 | else | |
2672 | { | |
2673 | int reg; | |
535825e6 | 2674 | |
f3d96a58 | 2675 | output_stack->top = value_reg_high - value_reg_low; |
2676 | for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
2677 | { | |
f4e62fcf | 2678 | output_stack->reg[value_reg_high - reg] = reg; |
f3d96a58 | 2679 | SET_HARD_REG_BIT (output_stack->reg_set, reg); |
2680 | } | |
2681 | } | |
535825e6 | 2682 | } |
535825e6 | 2683 | |
e8f7380b | 2684 | /* Copy the stack info from the end of edge E's source block to the |
2685 | start of E's destination block. */ | |
ea06f797 | 2686 | |
2687 | static void | |
2688 | propagate_stack (edge e) | |
2689 | { | |
2b15d2ba | 2690 | stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; |
2691 | stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; | |
e8f7380b | 2692 | int reg; |
ea06f797 | 2693 | |
e8f7380b | 2694 | /* Preserve the order of the original stack, but check whether |
2695 | any pops are needed. */ | |
2696 | dest_stack->top = -1; | |
2697 | for (reg = 0; reg <= src_stack->top; ++reg) | |
2698 | if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) | |
2699 | dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; | |
3072d30e | 2700 | |
2701 | /* Push in any partially dead values. */ | |
2702 | for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) | |
2703 | if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) | |
2704 | && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) | |
2705 | dest_stack->reg[++dest_stack->top] = reg; | |
ea06f797 | 2706 | } |
2707 | ||
2708 | ||
2709 | /* Adjust the stack of edge E's source block on exit to match the stack | |
2710 | of it's target block upon input. The stack layouts of both blocks | |
2711 | should have been defined by now. */ | |
2712 | ||
ecb7b891 | 2713 | static bool |
3f5be5f4 | 2714 | compensate_edge (edge e) |
ecb7b891 | 2715 | { |
d1b17fc8 | 2716 | basic_block source = e->src, target = e->dest; |
2b15d2ba | 2717 | stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; |
2718 | stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; | |
d1b17fc8 | 2719 | struct stack_def regstack; |
ecb7b891 | 2720 | int reg; |
2721 | ||
3f5be5f4 | 2722 | if (dump_file) |
2723 | fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); | |
ecb7b891 | 2724 | |
ea06f797 | 2725 | gcc_assert (target_stack->top != -2); |
2726 | ||
2727 | /* Check whether stacks are identical. */ | |
d1b17fc8 | 2728 | if (target_stack->top == source_stack->top) |
ecb7b891 | 2729 | { |
ea06f797 | 2730 | for (reg = target_stack->top; reg >= 0; --reg) |
d1b17fc8 | 2731 | if (target_stack->reg[reg] != source_stack->reg[reg]) |
ecb7b891 | 2732 | break; |
2733 | ||
2734 | if (reg == -1) | |
2735 | { | |
3f5be5f4 | 2736 | if (dump_file) |
2737 | fprintf (dump_file, "no changes needed\n"); | |
2617fe26 | 2738 | return false; |
ecb7b891 | 2739 | } |
ecb7b891 | 2740 | } |
ecb7b891 | 2741 | |
3f5be5f4 | 2742 | if (dump_file) |
ea06f797 | 2743 | { |
3f5be5f4 | 2744 | fprintf (dump_file, "correcting stack to "); |
2745 | print_stack (dump_file, target_stack); | |
ecb7b891 | 2746 | } |
2747 | ||
d1b17fc8 | 2748 | /* Abnormal calls may appear to have values live in st(0), but the |
ecb7b891 | 2749 | abnormal return path will not have actually loaded the values. */ |
d1b17fc8 | 2750 | if (e->flags & EDGE_ABNORMAL_CALL) |
ecb7b891 | 2751 | { |
2752 | /* Assert that the lifetimes are as we expect -- one value | |
2753 | live at st(0) on the end of the source block, and no | |
ff432028 | 2754 | values live at the beginning of the destination block. |
2755 | For complex return values, we may have st(1) live as well. */ | |
2756 | gcc_assert (source_stack->top == 0 || source_stack->top == 1); | |
d1b17fc8 | 2757 | gcc_assert (target_stack->top == -1); |
2758 | return false; | |
2759 | } | |
ecb7b891 | 2760 | |
d1b17fc8 | 2761 | /* Handle non-call EH edges specially. The normal return path have |
2762 | values in registers. These will be popped en masse by the unwind | |
2763 | library. */ | |
2764 | if (e->flags & EDGE_EH) | |
2765 | { | |
2766 | gcc_assert (target_stack->top == -1); | |
2767 | return false; | |
ecb7b891 | 2768 | } |
2769 | ||
d1b17fc8 | 2770 | /* We don't support abnormal edges. Global takes care to |
2771 | avoid any live register across them, so we should never | |
2772 | have to insert instructions on such edges. */ | |
2773 | gcc_assert (! (e->flags & EDGE_ABNORMAL)); | |
2774 | ||
2775 | /* Make a copy of source_stack as change_stack is destructive. */ | |
2776 | regstack = *source_stack; | |
2777 | ||
ecb7b891 | 2778 | /* It is better to output directly to the end of the block |
2779 | instead of to the edge, because emit_swap can do minimal | |
2780 | insn scheduling. We can do this when there is only one | |
2781 | edge out, and it is not abnormal. */ | |
d1b17fc8 | 2782 | if (EDGE_COUNT (source->succs) == 1) |
ecb7b891 | 2783 | { |
d1b17fc8 | 2784 | current_block = source; |
2785 | change_stack (BB_END (source), ®stack, target_stack, | |
2786 | (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); | |
ecb7b891 | 2787 | } |
2788 | else | |
2789 | { | |
cef3d8ad | 2790 | rtx_insn *seq; |
2791 | rtx_note *after; | |
ecb7b891 | 2792 | |
ecb7b891 | 2793 | current_block = NULL; |
2794 | start_sequence (); | |
2795 | ||
31d3e01c | 2796 | /* ??? change_stack needs some point to emit insns after. */ |
31b97e8f | 2797 | after = emit_note (NOTE_INSN_DELETED); |
ecb7b891 | 2798 | |
d1b17fc8 | 2799 | change_stack (after, ®stack, target_stack, EMIT_BEFORE); |
ecb7b891 | 2800 | |
31d3e01c | 2801 | seq = get_insns (); |
ecb7b891 | 2802 | end_sequence (); |
2803 | ||
2804 | insert_insn_on_edge (seq, e); | |
2805 | return true; | |
2806 | } | |
2807 | return false; | |
2808 | } | |
2809 | ||
ea06f797 | 2810 | /* Traverse all non-entry edges in the CFG, and emit the necessary |
2811 | edge compensation code to change the stack from stack_out of the | |
2812 | source block to the stack_in of the destination block. */ | |
2813 | ||
2814 | static bool | |
3f5be5f4 | 2815 | compensate_edges (void) |
ea06f797 | 2816 | { |
2817 | bool inserted = false; | |
2818 | basic_block bb; | |
2819 | ||
9d97464a | 2820 | starting_stack_p = false; |
2821 | ||
fc00614f | 2822 | FOR_EACH_BB_FN (bb, cfun) |
34154e27 | 2823 | if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) |
ea06f797 | 2824 | { |
2825 | edge e; | |
2826 | edge_iterator ei; | |
2827 | ||
2828 | FOR_EACH_EDGE (e, ei, bb->succs) | |
3f5be5f4 | 2829 | inserted |= compensate_edge (e); |
ea06f797 | 2830 | } |
2831 | return inserted; | |
2832 | } | |
2833 | ||
e8f7380b | 2834 | /* Select the better of two edges E1 and E2 to use to determine the |
2835 | stack layout for their shared destination basic block. This is | |
2836 | typically the more frequently executed. The edge E1 may be NULL | |
2837 | (in which case E2 is returned), but E2 is always non-NULL. */ | |
2838 | ||
2839 | static edge | |
2840 | better_edge (edge e1, edge e2) | |
2841 | { | |
2842 | if (!e1) | |
2843 | return e2; | |
2844 | ||
2845 | if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) | |
2846 | return e1; | |
2847 | if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) | |
2848 | return e2; | |
2849 | ||
2850 | if (e1->count > e2->count) | |
2851 | return e1; | |
2852 | if (e1->count < e2->count) | |
2853 | return e2; | |
2854 | ||
2855 | /* Prefer critical edges to minimize inserting compensation code on | |
2856 | critical edges. */ | |
2857 | ||
2858 | if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) | |
2859 | return EDGE_CRITICAL_P (e1) ? e1 : e2; | |
2860 | ||
3ce7ff97 | 2861 | /* Avoid non-deterministic behavior. */ |
e8f7380b | 2862 | return (e1->src->index < e2->src->index) ? e1 : e2; |
2863 | } | |
2864 | ||
6a3002a6 | 2865 | /* Convert stack register references in one block. Return true if the CFG |
2866 | has been modified in the process. */ | |
f3d96a58 | 2867 | |
6a3002a6 | 2868 | static bool |
3f5be5f4 | 2869 | convert_regs_1 (basic_block block) |
535825e6 | 2870 | { |
ecb7b891 | 2871 | struct stack_def regstack; |
f3d96a58 | 2872 | block_info bi = BLOCK_INFO (block); |
ea06f797 | 2873 | int reg; |
8fe8e576 | 2874 | rtx_insn *insn, *next; |
393522df | 2875 | bool control_flow_insn_deleted = false; |
6a3002a6 | 2876 | bool cfg_altered = false; |
9845d120 | 2877 | int debug_insns_with_starting_stack = 0; |
535825e6 | 2878 | |
299a3cdd | 2879 | any_malformed_asm = false; |
ecb7b891 | 2880 | |
e8f7380b | 2881 | /* Choose an initial stack layout, if one hasn't already been chosen. */ |
ecb7b891 | 2882 | if (bi->stack_in.top == -2) |
054e1120 | 2883 | { |
e8f7380b | 2884 | edge e, beste = NULL; |
2885 | edge_iterator ei; | |
2886 | ||
2887 | /* Select the best incoming edge (typically the most frequent) to | |
2888 | use as a template for this basic block. */ | |
2889 | FOR_EACH_EDGE (e, ei, block->preds) | |
2890 | if (BLOCK_INFO (e->src)->done) | |
2891 | beste = better_edge (beste, e); | |
2892 | ||
054e1120 | 2893 | if (beste) |
ea06f797 | 2894 | propagate_stack (beste); |
054e1120 | 2895 | else |
2896 | { | |
2897 | /* No predecessors. Create an arbitrary input stack. */ | |
054e1120 | 2898 | bi->stack_in.top = -1; |
2899 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
2900 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2901 | bi->stack_in.reg[++bi->stack_in.top] = reg; | |
2902 | } | |
2903 | } | |
2617fe26 | 2904 | |
3f5be5f4 | 2905 | if (dump_file) |
535825e6 | 2906 | { |
3f5be5f4 | 2907 | fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); |
2908 | print_stack (dump_file, &bi->stack_in); | |
f3d96a58 | 2909 | } |
535825e6 | 2910 | |
f3d96a58 | 2911 | /* Process all insns in this block. Keep track of NEXT so that we |
2912 | don't process insns emitted while substituting in INSN. */ | |
9d97464a | 2913 | current_block = block; |
5496dbfc | 2914 | next = BB_HEAD (block); |
f3d96a58 | 2915 | regstack = bi->stack_in; |
9d97464a | 2916 | starting_stack_p = true; |
2917 | ||
f3d96a58 | 2918 | do |
2919 | { | |
2920 | insn = next; | |
2921 | next = NEXT_INSN (insn); | |
535825e6 | 2922 | |
f3d96a58 | 2923 | /* Ensure we have not missed a block boundary. */ |
04e579b6 | 2924 | gcc_assert (next); |
5496dbfc | 2925 | if (insn == BB_END (block)) |
f3d96a58 | 2926 | next = NULL; |
2927 | ||
2928 | /* Don't bother processing unless there is a stack reg | |
2929 | mentioned or if it's a CALL_INSN. */ | |
9845d120 | 2930 | if (DEBUG_INSN_P (insn)) |
2931 | { | |
2932 | if (starting_stack_p) | |
2933 | debug_insns_with_starting_stack++; | |
2934 | else | |
2935 | { | |
a6aa49aa | 2936 | subst_all_stack_regs_in_debug_insn (insn, ®stack); |
9845d120 | 2937 | |
2938 | /* Nothing must ever die at a debug insn. If something | |
2939 | is referenced in it that becomes dead, it should have | |
2940 | died before and the reference in the debug insn | |
2941 | should have been removed so as to avoid changing code | |
2942 | generation. */ | |
2943 | gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); | |
2944 | } | |
2945 | } | |
2946 | else if (stack_regs_mentioned (insn) | |
2947 | || CALL_P (insn)) | |
f3d96a58 | 2948 | { |
3f5be5f4 | 2949 | if (dump_file) |
f3d96a58 | 2950 | { |
3f5be5f4 | 2951 | fprintf (dump_file, " insn %d input stack: ", |
f3d96a58 | 2952 | INSN_UID (insn)); |
3f5be5f4 | 2953 | print_stack (dump_file, ®stack); |
f3d96a58 | 2954 | } |
393522df | 2955 | control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); |
9d97464a | 2956 | starting_stack_p = false; |
535825e6 | 2957 | } |
f3d96a58 | 2958 | } |
2959 | while (next); | |
535825e6 | 2960 | |
9845d120 | 2961 | if (debug_insns_with_starting_stack) |
2962 | { | |
2963 | /* Since it's the first non-debug instruction that determines | |
2964 | the stack requirements of the current basic block, we refrain | |
2965 | from updating debug insns before it in the loop above, and | |
2966 | fix them up here. */ | |
2967 | for (insn = BB_HEAD (block); debug_insns_with_starting_stack; | |
2968 | insn = NEXT_INSN (insn)) | |
2969 | { | |
2970 | if (!DEBUG_INSN_P (insn)) | |
2971 | continue; | |
2972 | ||
2973 | debug_insns_with_starting_stack--; | |
a6aa49aa | 2974 | subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); |
9845d120 | 2975 | } |
2976 | } | |
2977 | ||
3f5be5f4 | 2978 | if (dump_file) |
f3d96a58 | 2979 | { |
3f5be5f4 | 2980 | fprintf (dump_file, "Expected live registers ["); |
f3d96a58 | 2981 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) |
2982 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
3f5be5f4 | 2983 | fprintf (dump_file, " %d", reg); |
2984 | fprintf (dump_file, " ]\nOutput stack: "); | |
2985 | print_stack (dump_file, ®stack); | |
f3d96a58 | 2986 | } |
535825e6 | 2987 | |
5496dbfc | 2988 | insn = BB_END (block); |
6d7dc5b9 | 2989 | if (JUMP_P (insn)) |
f3d96a58 | 2990 | insn = PREV_INSN (insn); |
2991 | ||
2992 | /* If the function is declared to return a value, but it returns one | |
2993 | in only some cases, some registers might come live here. Emit | |
2994 | necessary moves for them. */ | |
2995 | ||
2996 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2997 | { | |
2998 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
2999 | && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
535825e6 | 3000 | { |
f3d96a58 | 3001 | rtx set; |
535825e6 | 3002 | |
3f5be5f4 | 3003 | if (dump_file) |
3004 | fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); | |
535825e6 | 3005 | |
d1f9b275 | 3006 | set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num); |
9dda7915 | 3007 | insn = emit_insn_after (set, insn); |
393522df | 3008 | control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); |
f3d96a58 | 3009 | } |
3010 | } | |
48e1416a | 3011 | |
92770800 | 3012 | /* Amongst the insns possibly deleted during the substitution process above, |
3013 | might have been the only trapping insn in the block. We purge the now | |
3014 | possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, | |
3015 | called at the end of convert_regs. The order in which we process the | |
3016 | blocks ensures that we never delete an already processed edge. | |
3017 | ||
393522df | 3018 | Note that, at this point, the CFG may have been damaged by the emission |
3019 | of instructions after an abnormal call, which moves the basic block end | |
3020 | (and is the reason why we call fixup_abnormal_edges later). So we must | |
3021 | be sure that the trapping insn has been deleted before trying to purge | |
3022 | dead edges, otherwise we risk purging valid edges. | |
3023 | ||
92770800 | 3024 | ??? We are normally supposed not to delete trapping insns, so we pretend |
3025 | that the insns deleted above don't actually trap. It would have been | |
3026 | better to detect this earlier and avoid creating the EH edge in the first | |
3027 | place, still, but we don't have enough information at that time. */ | |
3028 | ||
393522df | 3029 | if (control_flow_insn_deleted) |
6a3002a6 | 3030 | cfg_altered |= purge_dead_edges (block); |
535825e6 | 3031 | |
299a3cdd | 3032 | /* Something failed if the stack lives don't match. If we had malformed |
3033 | asms, we zapped the instruction itself, but that didn't produce the | |
3034 | same pattern of register kills as before. */ | |
48e1416a | 3035 | |
ddc556d1 | 3036 | gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) |
3037 | || any_malformed_asm); | |
ecb7b891 | 3038 | bi->stack_out = regstack; |
d1b17fc8 | 3039 | bi->done = true; |
6a3002a6 | 3040 | |
3041 | return cfg_altered; | |
535825e6 | 3042 | } |
535825e6 | 3043 | |
6a3002a6 | 3044 | /* Convert registers in all blocks reachable from BLOCK. Return true if the |
3045 | CFG has been modified in the process. */ | |
f3d96a58 | 3046 | |
6a3002a6 | 3047 | static bool |
3f5be5f4 | 3048 | convert_regs_2 (basic_block block) |
535825e6 | 3049 | { |
f3d96a58 | 3050 | basic_block *stack, *sp; |
6a3002a6 | 3051 | bool cfg_altered = false; |
535825e6 | 3052 | |
92770800 | 3053 | /* We process the blocks in a top-down manner, in a way such that one block |
3054 | is only processed after all its predecessors. The number of predecessors | |
48e1416a | 3055 | of every block has already been computed. */ |
92770800 | 3056 | |
a28770e1 | 3057 | stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); |
f3d96a58 | 3058 | sp = stack; |
535825e6 | 3059 | |
f3d96a58 | 3060 | *sp++ = block; |
535825e6 | 3061 | |
f3d96a58 | 3062 | do |
3063 | { | |
3064 | edge e; | |
cd665a06 | 3065 | edge_iterator ei; |
535825e6 | 3066 | |
f3d96a58 | 3067 | block = *--sp; |
535825e6 | 3068 | |
054e1120 | 3069 | /* Processing BLOCK is achieved by convert_regs_1, which may purge |
3070 | some dead EH outgoing edge after the deletion of the trapping | |
3071 | insn inside the block. Since the number of predecessors of | |
3072 | BLOCK's successors was computed based on the initial edge set, | |
3073 | we check the necessity to process some of these successors | |
3074 | before such an edge deletion may happen. However, there is | |
3075 | a pitfall: if BLOCK is the only predecessor of a successor and | |
3076 | the edge between them happens to be deleted, the successor | |
3077 | becomes unreachable and should not be processed. The problem | |
3078 | is that there is no way to preventively detect this case so we | |
3079 | stack the successor in all cases and hand over the task of | |
3080 | fixing up the discrepancy to convert_regs_1. */ | |
3081 | ||
cd665a06 | 3082 | FOR_EACH_EDGE (e, ei, block->succs) |
ecb7b891 | 3083 | if (! (e->flags & EDGE_DFS_BACK)) |
f3d96a58 | 3084 | { |
4ad72a03 | 3085 | BLOCK_INFO (e->dest)->predecessors--; |
3086 | if (!BLOCK_INFO (e->dest)->predecessors) | |
cd665a06 | 3087 | *sp++ = e->dest; |
f3d96a58 | 3088 | } |
92770800 | 3089 | |
6a3002a6 | 3090 | cfg_altered |= convert_regs_1 (block); |
535825e6 | 3091 | } |
f3d96a58 | 3092 | while (sp != stack); |
3093 | ||
1a727bd2 | 3094 | free (stack); |
6a3002a6 | 3095 | |
3096 | return cfg_altered; | |
535825e6 | 3097 | } |
c5b9f902 | 3098 | |
f3d96a58 | 3099 | /* Traverse all basic blocks in a function, converting the register |
3100 | references in each insn from the "flat" register file that gcc uses, | |
3101 | to the stack-like registers the 387 uses. */ | |
3102 | ||
30bb6ef3 | 3103 | static void |
3f5be5f4 | 3104 | convert_regs (void) |
535825e6 | 3105 | { |
6a3002a6 | 3106 | bool cfg_altered = false; |
4c26117a | 3107 | int inserted; |
3108 | basic_block b; | |
f3d96a58 | 3109 | edge e; |
cd665a06 | 3110 | edge_iterator ei; |
535825e6 | 3111 | |
f3d96a58 | 3112 | /* Initialize uninitialized registers on function entry. */ |
3113 | inserted = convert_regs_entry (); | |
535825e6 | 3114 | |
f3d96a58 | 3115 | /* Construct the desired stack for function exit. */ |
3116 | convert_regs_exit (); | |
34154e27 | 3117 | BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; |
535825e6 | 3118 | |
f3d96a58 | 3119 | /* ??? Future: process inner loops first, and give them arbitrary |
3120 | initial stacks which emit_swap_insn can modify. This ought to | |
7bd28bba | 3121 | prevent double fxch that often appears at the head of a loop. */ |
535825e6 | 3122 | |
f3d96a58 | 3123 | /* Process all blocks reachable from all entry points. */ |
34154e27 | 3124 | FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) |
6a3002a6 | 3125 | cfg_altered |= convert_regs_2 (e->dest); |
2617fe26 | 3126 | |
3127 | /* ??? Process all unreachable blocks. Though there's no excuse | |
f3d96a58 | 3128 | for keeping these even when not optimizing. */ |
fc00614f | 3129 | FOR_EACH_BB_FN (b, cfun) |
f3d96a58 | 3130 | { |
f3d96a58 | 3131 | block_info bi = BLOCK_INFO (b); |
535825e6 | 3132 | |
f3d96a58 | 3133 | if (! bi->done) |
6a3002a6 | 3134 | cfg_altered |= convert_regs_2 (b); |
f3d96a58 | 3135 | } |
ea06f797 | 3136 | |
54f21e20 | 3137 | /* We must fix up abnormal edges before inserting compensation code |
3138 | because both mechanisms insert insns on edges. */ | |
3139 | inserted |= fixup_abnormal_edges (); | |
3140 | ||
3f5be5f4 | 3141 | inserted |= compensate_edges (); |
ea06f797 | 3142 | |
43585301 | 3143 | clear_aux_for_blocks (); |
535825e6 | 3144 | |
f3d96a58 | 3145 | if (inserted) |
3146 | commit_edge_insertions (); | |
535825e6 | 3147 | |
6a3002a6 | 3148 | if (cfg_altered) |
3149 | cleanup_cfg (0); | |
3150 | ||
3f5be5f4 | 3151 | if (dump_file) |
3152 | fputc ('\n', dump_file); | |
30bb6ef3 | 3153 | } |
3154 | \f | |
3155 | /* Convert register usage from "flat" register file usage to a "stack | |
3156 | register file. FILE is the dump file, if used. | |
535825e6 | 3157 | |
30bb6ef3 | 3158 | Construct a CFG and run life analysis. Then convert each insn one |
3159 | by one. Run a last cleanup_cfg pass, if optimizing, to eliminate | |
3160 | code duplication created when the converter inserts pop insns on | |
3161 | the edges. */ | |
3162 | ||
c2d7bf84 | 3163 | static bool |
3f5be5f4 | 3164 | reg_to_stack (void) |
30bb6ef3 | 3165 | { |
3166 | basic_block bb; | |
3167 | int i; | |
3168 | int max_uid; | |
3169 | ||
3170 | /* Clean up previous run. */ | |
f1f41a6c | 3171 | stack_regs_mentioned_data.release (); |
30bb6ef3 | 3172 | |
3173 | /* See if there is something to do. Flow analysis is quite | |
3174 | expensive so we might save some compilation time. */ | |
3175 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
3072d30e | 3176 | if (df_regs_ever_live_p (i)) |
30bb6ef3 | 3177 | break; |
3178 | if (i > LAST_STACK_REG) | |
3179 | return false; | |
3180 | ||
3072d30e | 3181 | df_note_add_problem (); |
3182 | df_analyze (); | |
3183 | ||
30bb6ef3 | 3184 | mark_dfs_back_edges (); |
3185 | ||
3186 | /* Set up block info for each basic block. */ | |
3187 | alloc_aux_for_blocks (sizeof (struct block_info_def)); | |
fc00614f | 3188 | FOR_EACH_BB_FN (bb, cfun) |
30bb6ef3 | 3189 | { |
3190 | block_info bi = BLOCK_INFO (bb); | |
3191 | edge_iterator ei; | |
3192 | edge e; | |
3193 | int reg; | |
3194 | ||
3195 | FOR_EACH_EDGE (e, ei, bb->preds) | |
3196 | if (!(e->flags & EDGE_DFS_BACK) | |
34154e27 | 3197 | && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) |
30bb6ef3 | 3198 | bi->predecessors++; |
3199 | ||
3200 | /* Set current register status at last instruction `uninitialized'. */ | |
3201 | bi->stack_in.top = -2; | |
3202 | ||
3203 | /* Copy live_at_end and live_at_start into temporaries. */ | |
3204 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
3205 | { | |
3072d30e | 3206 | if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) |
30bb6ef3 | 3207 | SET_HARD_REG_BIT (bi->out_reg_set, reg); |
3072d30e | 3208 | if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) |
30bb6ef3 | 3209 | SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); |
3210 | } | |
3211 | } | |
3212 | ||
3213 | /* Create the replacement registers up front. */ | |
3214 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
3215 | { | |
3754d046 | 3216 | machine_mode mode; |
30bb6ef3 | 3217 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); |
3218 | mode != VOIDmode; | |
3219 | mode = GET_MODE_WIDER_MODE (mode)) | |
3220 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
3221 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); | |
3222 | mode != VOIDmode; | |
3223 | mode = GET_MODE_WIDER_MODE (mode)) | |
3224 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
3225 | } | |
3226 | ||
3227 | ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); | |
3228 | ||
3229 | /* A QNaN for initializing uninitialized variables. | |
3230 | ||
3231 | ??? We can't load from constant memory in PIC mode, because | |
3232 | we're inserting these instructions before the prologue and | |
3233 | the PIC register hasn't been set up. In that case, fall back | |
458dbf04 | 3234 | on zero, which we can get from `fldz'. */ |
30bb6ef3 | 3235 | |
5fe80ef0 | 3236 | if ((flag_pic && !TARGET_64BIT) |
3237 | || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) | |
30bb6ef3 | 3238 | not_a_num = CONST0_RTX (SFmode); |
3239 | else | |
3240 | { | |
458dbf04 | 3241 | REAL_VALUE_TYPE r; |
3242 | ||
3243 | real_nan (&r, "", 1, SFmode); | |
d5f9611d | 3244 | not_a_num = const_double_from_real_value (r, SFmode); |
30bb6ef3 | 3245 | not_a_num = force_const_mem (SFmode, not_a_num); |
3246 | } | |
3247 | ||
3248 | /* Allocate a cache for stack_regs_mentioned. */ | |
3249 | max_uid = get_max_uid (); | |
f1f41a6c | 3250 | stack_regs_mentioned_data.create (max_uid + 1); |
3251 | memset (stack_regs_mentioned_data.address (), | |
0ff9e65d | 3252 | 0, sizeof (char) * (max_uid + 1)); |
30bb6ef3 | 3253 | |
3f5be5f4 | 3254 | convert_regs (); |
30bb6ef3 | 3255 | |
3256 | free_aux_for_blocks (); | |
3257 | return true; | |
535825e6 | 3258 | } |
535825e6 | 3259 | #endif /* STACK_REGS */ |
77fce4cd | 3260 | \f |
cbe8bda8 | 3261 | namespace { |
3262 | ||
3263 | const pass_data pass_data_stack_regs = | |
3072d30e | 3264 | { |
cbe8bda8 | 3265 | RTL_PASS, /* type */ |
3266 | "*stack_regs", /* name */ | |
3267 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 3268 | TV_REG_STACK, /* tv_id */ |
3269 | 0, /* properties_required */ | |
3270 | 0, /* properties_provided */ | |
3271 | 0, /* properties_destroyed */ | |
3272 | 0, /* todo_flags_start */ | |
3273 | 0, /* todo_flags_finish */ | |
3072d30e | 3274 | }; |
3275 | ||
cbe8bda8 | 3276 | class pass_stack_regs : public rtl_opt_pass |
3277 | { | |
3278 | public: | |
9af5ce0c | 3279 | pass_stack_regs (gcc::context *ctxt) |
3280 | : rtl_opt_pass (pass_data_stack_regs, ctxt) | |
cbe8bda8 | 3281 | {} |
3282 | ||
3283 | /* opt_pass methods: */ | |
31315c24 | 3284 | virtual bool gate (function *) |
3285 | { | |
3286 | #ifdef STACK_REGS | |
3287 | return true; | |
3288 | #else | |
3289 | return false; | |
3290 | #endif | |
3291 | } | |
cbe8bda8 | 3292 | |
3293 | }; // class pass_stack_regs | |
3294 | ||
3295 | } // anon namespace | |
3296 | ||
3297 | rtl_opt_pass * | |
3298 | make_pass_stack_regs (gcc::context *ctxt) | |
3299 | { | |
3300 | return new pass_stack_regs (ctxt); | |
3301 | } | |
3302 | ||
77fce4cd | 3303 | /* Convert register usage from flat register file usage to a stack |
3304 | register file. */ | |
2a1990e9 | 3305 | static unsigned int |
77fce4cd | 3306 | rest_of_handle_stack_regs (void) |
3307 | { | |
3308 | #ifdef STACK_REGS | |
3072d30e | 3309 | reg_to_stack (); |
3310 | regstack_completed = 1; | |
77fce4cd | 3311 | #endif |
2a1990e9 | 3312 | return 0; |
77fce4cd | 3313 | } |
3314 | ||
cbe8bda8 | 3315 | namespace { |
3316 | ||
3317 | const pass_data pass_data_stack_regs_run = | |
77fce4cd | 3318 | { |
cbe8bda8 | 3319 | RTL_PASS, /* type */ |
3320 | "stack", /* name */ | |
3321 | OPTGROUP_NONE, /* optinfo_flags */ | |
cbe8bda8 | 3322 | TV_REG_STACK, /* tv_id */ |
3323 | 0, /* properties_required */ | |
3324 | 0, /* properties_provided */ | |
3325 | 0, /* properties_destroyed */ | |
3326 | 0, /* todo_flags_start */ | |
8b88439e | 3327 | TODO_df_finish, /* todo_flags_finish */ |
77fce4cd | 3328 | }; |
cbe8bda8 | 3329 | |
3330 | class pass_stack_regs_run : public rtl_opt_pass | |
3331 | { | |
3332 | public: | |
9af5ce0c | 3333 | pass_stack_regs_run (gcc::context *ctxt) |
3334 | : rtl_opt_pass (pass_data_stack_regs_run, ctxt) | |
cbe8bda8 | 3335 | {} |
3336 | ||
3337 | /* opt_pass methods: */ | |
65b0537f | 3338 | virtual unsigned int execute (function *) |
3339 | { | |
3340 | return rest_of_handle_stack_regs (); | |
3341 | } | |
cbe8bda8 | 3342 | |
3343 | }; // class pass_stack_regs_run | |
3344 | ||
3345 | } // anon namespace | |
3346 | ||
3347 | rtl_opt_pass * | |
3348 | make_pass_stack_regs_run (gcc::context *ctxt) | |
3349 | { | |
3350 | return new pass_stack_regs_run (ctxt); | |
3351 | } |