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48227150 | 1 | /* Register to Stack convert for GNU compiler. |
1fb54135 | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
d4ff96d5 | 3 | 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
48227150 | 4 | |
1322177d | 5 | This file is part of GCC. |
48227150 | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it |
8 | under the terms of the GNU General Public License as published by | |
a05924f9 JH |
9 | the Free Software Foundation; either version 2, or (at your option) |
10 | any later version. | |
48227150 | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
48227150 | 16 | |
a05924f9 | 17 | You should have received a copy of the GNU General Public License |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
48227150 JVA |
21 | |
22 | /* This pass converts stack-like registers from the "flat register | |
23 | file" model that gcc uses, to a stack convention that the 387 uses. | |
24 | ||
25 | * The form of the input: | |
26 | ||
27 | On input, the function consists of insn that have had their | |
28 | registers fully allocated to a set of "virtual" registers. Note that | |
29 | the word "virtual" is used differently here than elsewhere in gcc: for | |
30 | each virtual stack reg, there is a hard reg, but the mapping between | |
31 | them is not known until this pass is run. On output, hard register | |
32 | numbers have been substituted, and various pop and exchange insns have | |
33 | been emitted. The hard register numbers and the virtual register | |
34 | numbers completely overlap - before this pass, all stack register | |
114cbee6 | 35 | numbers are virtual, and afterward they are all hard. |
48227150 JVA |
36 | |
37 | The virtual registers can be manipulated normally by gcc, and their | |
38 | semantics are the same as for normal registers. After the hard | |
39 | register numbers are substituted, the semantics of an insn containing | |
40 | stack-like regs are not the same as for an insn with normal regs: for | |
41 | instance, it is not safe to delete an insn that appears to be a no-op | |
42 | move. In general, no insn containing hard regs should be changed | |
43 | after this pass is done. | |
44 | ||
45 | * The form of the output: | |
46 | ||
47 | After this pass, hard register numbers represent the distance from | |
48 | the current top of stack to the desired register. A reference to | |
49 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
50 | represents the register just below that, and so forth. Also, REG_DEAD | |
51 | notes indicate whether or not a stack register should be popped. | |
52 | ||
53 | A "swap" insn looks like a parallel of two patterns, where each | |
54 | pattern is a SET: one sets A to B, the other B to A. | |
55 | ||
56 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
57 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
58 | will replace the existing stack top, not push a new value. | |
59 | ||
60 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
61 | SET_SRC is REG or MEM. | |
62 | ||
3f5cfed6 | 63 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
48227150 JVA |
64 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
65 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
66 | ||
67 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
68 | the top of the register stack. If there is no REG_DEAD note, then the | |
69 | insn represents a "dup" or a push of the current top of stack onto the | |
70 | stack. | |
71 | ||
72 | * Methodology: | |
73 | ||
74 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
75 | deleted and recreated from scratch. REG_DEAD is never created for a | |
76 | SET_DEST, only REG_UNUSED. | |
77 | ||
114cbee6 | 78 | * asm_operands: |
48227150 | 79 | |
114cbee6 RS |
80 | There are several rules on the usage of stack-like regs in |
81 | asm_operands insns. These rules apply only to the operands that are | |
82 | stack-like regs: | |
83 | ||
84 | 1. Given a set of input regs that die in an asm_operands, it is | |
85 | necessary to know which are implicitly popped by the asm, and | |
86 | which must be explicitly popped by gcc. | |
87 | ||
88 | An input reg that is implicitly popped by the asm must be | |
89 | explicitly clobbered, unless it is constrained to match an | |
90 | output operand. | |
91 | ||
92 | 2. For any input reg that is implicitly popped by an asm, it is | |
93 | necessary to know how to adjust the stack to compensate for the pop. | |
94 | If any non-popped input is closer to the top of the reg-stack than | |
95 | the implicitly popped reg, it would not be possible to know what the | |
96 | stack looked like - it's not clear how the rest of the stack "slides | |
97 | up". | |
98 | ||
99 | All implicitly popped input regs must be closer to the top of | |
100 | the reg-stack than any input that is not implicitly popped. | |
101 | ||
102 | 3. It is possible that if an input dies in an insn, reload might | |
103 | use the input reg for an output reload. Consider this example: | |
104 | ||
105 | asm ("foo" : "=t" (a) : "f" (b)); | |
106 | ||
107 | This asm says that input B is not popped by the asm, and that | |
454ff5cb | 108 | the asm pushes a result onto the reg-stack, i.e., the stack is one |
114cbee6 RS |
109 | deeper after the asm than it was before. But, it is possible that |
110 | reload will think that it can use the same reg for both the input and | |
111 | the output, if input B dies in this insn. | |
112 | ||
113 | If any input operand uses the "f" constraint, all output reg | |
114 | constraints must use the "&" earlyclobber. | |
115 | ||
116 | The asm above would be written as | |
117 | ||
118 | asm ("foo" : "=&t" (a) : "f" (b)); | |
119 | ||
120 | 4. Some operands need to be in particular places on the stack. All | |
121 | output operands fall in this category - there is no other way to | |
122 | know which regs the outputs appear in unless the user indicates | |
123 | this in the constraints. | |
124 | ||
125 | Output operands must specifically indicate which reg an output | |
126 | appears in after an asm. "=f" is not allowed: the operand | |
127 | constraints must select a class with a single reg. | |
128 | ||
129 | 5. Output operands may not be "inserted" between existing stack regs. | |
130 | Since no 387 opcode uses a read/write operand, all output operands | |
131 | are dead before the asm_operands, and are pushed by the asm_operands. | |
132 | It makes no sense to push anywhere but the top of the reg-stack. | |
133 | ||
134 | Output operands must start at the top of the reg-stack: output | |
135 | operands may not "skip" a reg. | |
136 | ||
137 | 6. Some asm statements may need extra stack space for internal | |
138 | calculations. This can be guaranteed by clobbering stack registers | |
139 | unrelated to the inputs and outputs. | |
140 | ||
141 | Here are a couple of reasonable asms to want to write. This asm | |
142 | takes one input, which is internally popped, and produces two outputs. | |
143 | ||
144 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
145 | ||
146 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
147 | and replaces them with one output. The user must code the "st(1)" | |
148 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
149 | ||
150 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
151 | ||
a05924f9 | 152 | */ |
48227150 | 153 | \f |
48227150 | 154 | #include "config.h" |
670ee920 | 155 | #include "system.h" |
4977bab6 ZW |
156 | #include "coretypes.h" |
157 | #include "tm.h" | |
48227150 JVA |
158 | #include "tree.h" |
159 | #include "rtl.h" | |
6baf1cc8 | 160 | #include "tm_p.h" |
49ad7cfa | 161 | #include "function.h" |
114cbee6 | 162 | #include "insn-config.h" |
48227150 JVA |
163 | #include "regs.h" |
164 | #include "hard-reg-set.h" | |
165 | #include "flags.h" | |
10f0ad3d | 166 | #include "toplev.h" |
e075ae69 | 167 | #include "recog.h" |
a05924f9 JH |
168 | #include "output.h" |
169 | #include "basic-block.h" | |
21b2cd73 | 170 | #include "varray.h" |
2840aebf | 171 | #include "reload.h" |
e2500fed GK |
172 | #include "ggc.h" |
173 | ||
174 | /* We use this array to cache info about insns, because otherwise we | |
175 | spend too much time in stack_regs_mentioned_p. | |
176 | ||
177 | Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
178 | the insn uses stack registers, two indicates the insn does not use | |
179 | stack registers. */ | |
180 | static GTY(()) varray_type stack_regs_mentioned_data; | |
48227150 JVA |
181 | |
182 | #ifdef STACK_REGS | |
183 | ||
184 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
185 | ||
48227150 JVA |
186 | /* This is the basic stack record. TOP is an index into REG[] such |
187 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
188 | ||
eca31501 JVA |
189 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
190 | consists of placing each live reg in array `reg' and setting `top' | |
191 | appropriately. | |
192 | ||
193 | REG_SET indicates which registers are live. */ | |
48227150 JVA |
194 | |
195 | typedef struct stack_def | |
196 | { | |
197 | int top; /* index to top stack element */ | |
198 | HARD_REG_SET reg_set; /* set of live registers */ | |
b00b2cc2 | 199 | unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ |
48227150 JVA |
200 | } *stack; |
201 | ||
a6a2274a | 202 | /* This is used to carry information about basic blocks. It is |
a05924f9 | 203 | attached to the AUX field of the standard CFG block. */ |
48227150 | 204 | |
a05924f9 JH |
205 | typedef struct block_info_def |
206 | { | |
207 | struct stack_def stack_in; /* Input stack configuration. */ | |
0ecf09f9 | 208 | struct stack_def stack_out; /* Output stack configuration. */ |
a05924f9 JH |
209 | HARD_REG_SET out_reg_set; /* Stack regs live on output. */ |
210 | int done; /* True if block already converted. */ | |
754d9299 | 211 | int predecessors; /* Number of predecessors that needs |
0ecf09f9 | 212 | to be visited. */ |
a05924f9 | 213 | } *block_info; |
48227150 | 214 | |
a05924f9 | 215 | #define BLOCK_INFO(B) ((block_info) (B)->aux) |
48227150 | 216 | |
a05924f9 JH |
217 | /* Passed to change_stack to indicate where to emit insns. */ |
218 | enum emit_where | |
219 | { | |
220 | EMIT_AFTER, | |
221 | EMIT_BEFORE | |
222 | }; | |
48227150 | 223 | |
a05924f9 JH |
224 | /* The block we're currently working on. */ |
225 | static basic_block current_block; | |
226 | ||
3eae4643 | 227 | /* This is the register file for all register after conversion. */ |
99a59310 RK |
228 | static rtx |
229 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
230 | ||
231 | #define FP_MODE_REG(regno,mode) \ | |
f4f4d0f8 | 232 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) |
48227150 | 233 | |
a05924f9 | 234 | /* Used to initialize uninitialized registers. */ |
d2032ad8 | 235 | static rtx not_a_num; |
48227150 | 236 | |
48227150 JVA |
237 | /* Forward declarations */ |
238 | ||
0c20a65f AJ |
239 | static int stack_regs_mentioned_p (rtx pat); |
240 | static void straighten_stack (rtx, stack); | |
241 | static void pop_stack (stack, int); | |
242 | static rtx *get_true_reg (rtx *); | |
243 | ||
244 | static int check_asm_stack_operands (rtx); | |
245 | static int get_asm_operand_n_inputs (rtx); | |
246 | static rtx stack_result (tree); | |
247 | static void replace_reg (rtx *, int); | |
248 | static void remove_regno_note (rtx, enum reg_note, unsigned int); | |
249 | static int get_hard_regnum (stack, rtx); | |
250 | static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); | |
251 | static void emit_swap_insn (rtx, stack, rtx); | |
f964bd29 | 252 | static void swap_to_top(rtx, stack, rtx, rtx); |
ecb63641 | 253 | static bool move_for_stack_reg (rtx, stack, rtx); |
5ad85f7d | 254 | static bool move_nan_for_stack_reg (rtx, stack, rtx); |
0c20a65f AJ |
255 | static int swap_rtx_condition_1 (rtx); |
256 | static int swap_rtx_condition (rtx); | |
257 | static void compare_for_stack_reg (rtx, stack, rtx); | |
ecb63641 | 258 | static bool subst_stack_regs_pat (rtx, stack, rtx); |
0c20a65f | 259 | static void subst_asm_stack_regs (rtx, stack); |
ecb63641 | 260 | static bool subst_stack_regs (rtx, stack); |
0c20a65f AJ |
261 | static void change_stack (rtx, stack, stack, enum emit_where); |
262 | static int convert_regs_entry (void); | |
263 | static void convert_regs_exit (void); | |
264 | static int convert_regs_1 (FILE *, basic_block); | |
265 | static int convert_regs_2 (FILE *, basic_block); | |
266 | static int convert_regs (FILE *); | |
267 | static void print_stack (FILE *, stack); | |
268 | static rtx next_flags_user (rtx); | |
0c20a65f | 269 | static bool compensate_edge (edge, FILE *); |
21b2cd73 | 270 | \f |
40f03658 | 271 | /* Return nonzero if any stack register is mentioned somewhere within PAT. */ |
21b2cd73 JH |
272 | |
273 | static int | |
0c20a65f | 274 | stack_regs_mentioned_p (rtx pat) |
21b2cd73 | 275 | { |
b3694847 SS |
276 | const char *fmt; |
277 | int i; | |
e075ae69 RH |
278 | |
279 | if (STACK_REG_P (pat)) | |
280 | return 1; | |
281 | ||
282 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
283 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
21b2cd73 | 284 | { |
e075ae69 RH |
285 | if (fmt[i] == 'E') |
286 | { | |
b3694847 | 287 | int j; |
e075ae69 RH |
288 | |
289 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
290 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
291 | return 1; | |
292 | } | |
293 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
294 | return 1; | |
21b2cd73 | 295 | } |
e075ae69 | 296 | |
21b2cd73 JH |
297 | return 0; |
298 | } | |
299 | ||
e075ae69 | 300 | /* Return nonzero if INSN mentions stacked registers, else return zero. */ |
21b2cd73 JH |
301 | |
302 | int | |
0c20a65f | 303 | stack_regs_mentioned (rtx insn) |
21b2cd73 | 304 | { |
e075ae69 RH |
305 | unsigned int uid, max; |
306 | int test; | |
307 | ||
4793dca1 | 308 | if (! INSN_P (insn) || !stack_regs_mentioned_data) |
21b2cd73 | 309 | return 0; |
e075ae69 | 310 | |
21b2cd73 | 311 | uid = INSN_UID (insn); |
e075ae69 RH |
312 | max = VARRAY_SIZE (stack_regs_mentioned_data); |
313 | if (uid >= max) | |
314 | { | |
315 | /* Allocate some extra size to avoid too many reallocs, but | |
316 | do not grow too quickly. */ | |
317 | max = uid + uid / 20; | |
318 | VARRAY_GROW (stack_regs_mentioned_data, max); | |
319 | } | |
320 | ||
321 | test = VARRAY_CHAR (stack_regs_mentioned_data, uid); | |
322 | if (test == 0) | |
323 | { | |
324 | /* This insn has yet to be examined. Do so now. */ | |
325 | test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
326 | VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; | |
327 | } | |
328 | ||
329 | return test == 1; | |
21b2cd73 | 330 | } |
e075ae69 RH |
331 | \f |
332 | static rtx ix86_flags_rtx; | |
21b2cd73 | 333 | |
e075ae69 | 334 | static rtx |
0c20a65f | 335 | next_flags_user (rtx insn) |
e075ae69 | 336 | { |
a6a2274a | 337 | /* Search forward looking for the first use of this value. |
e075ae69 | 338 | Stop at block boundaries. */ |
e075ae69 | 339 | |
a813c111 | 340 | while (insn != BB_END (current_block)) |
e075ae69 RH |
341 | { |
342 | insn = NEXT_INSN (insn); | |
e075ae69 | 343 | |
2c3c49de | 344 | if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) |
a6a2274a | 345 | return insn; |
e075ae69 | 346 | |
4b4bf941 | 347 | if (CALL_P (insn)) |
e075ae69 RH |
348 | return NULL_RTX; |
349 | } | |
0eac0e81 | 350 | return NULL_RTX; |
e075ae69 | 351 | } |
48227150 | 352 | \f |
05713b80 | 353 | /* Reorganize the stack into ascending numbers, |
99a59310 RK |
354 | after this insn. */ |
355 | ||
356 | static void | |
0c20a65f | 357 | straighten_stack (rtx insn, stack regstack) |
99a59310 RK |
358 | { |
359 | struct stack_def temp_stack; | |
360 | int top; | |
361 | ||
8feb7351 JL |
362 | /* If there is only a single register on the stack, then the stack is |
363 | already in increasing order and no reorganization is needed. | |
364 | ||
365 | Similarly if the stack is empty. */ | |
366 | if (regstack->top <= 0) | |
367 | return; | |
368 | ||
d25cf633 | 369 | COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); |
99a59310 RK |
370 | |
371 | for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
e075ae69 | 372 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; |
a6a2274a | 373 | |
a05924f9 | 374 | change_stack (insn, regstack, &temp_stack, EMIT_AFTER); |
99a59310 | 375 | } |
7aa74e4c | 376 | |
3eae4643 | 377 | /* Pop a register from the stack. */ |
7aa74e4c SC |
378 | |
379 | static void | |
0c20a65f | 380 | pop_stack (stack regstack, int regno) |
7aa74e4c SC |
381 | { |
382 | int top = regstack->top; | |
383 | ||
384 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
385 | regstack->top--; | |
3eae4643 | 386 | /* If regno was not at the top of stack then adjust stack. */ |
7aa74e4c SC |
387 | if (regstack->reg [top] != regno) |
388 | { | |
389 | int i; | |
390 | for (i = regstack->top; i >= 0; i--) | |
391 | if (regstack->reg [i] == regno) | |
392 | { | |
393 | int j; | |
394 | for (j = i; j < top; j++) | |
395 | regstack->reg [j] = regstack->reg [j + 1]; | |
396 | break; | |
397 | } | |
398 | } | |
399 | } | |
99a59310 | 400 | \f |
48227150 | 401 | /* Convert register usage from "flat" register file usage to a "stack |
827c06b6 | 402 | register file. FILE is the dump file, if used. |
48227150 | 403 | |
e218fc41 | 404 | Construct a CFG and run life analysis. Then convert each insn one |
0045d504 | 405 | by one. Run a last cleanup_cfg pass, if optimizing, to eliminate |
a05924f9 JH |
406 | code duplication created when the converter inserts pop insns on |
407 | the edges. */ | |
48227150 | 408 | |
b9422b69 | 409 | bool |
827c06b6 | 410 | reg_to_stack (FILE *file) |
48227150 | 411 | { |
e0082a72 | 412 | basic_block bb; |
0b17ab2f RH |
413 | int i; |
414 | int max_uid; | |
a05924f9 | 415 | |
4793dca1 | 416 | /* Clean up previous run. */ |
e2500fed | 417 | stack_regs_mentioned_data = 0; |
4793dca1 | 418 | |
a05924f9 JH |
419 | /* See if there is something to do. Flow analysis is quite |
420 | expensive so we might save some compilation time. */ | |
421 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
422 | if (regs_ever_live[i]) | |
423 | break; | |
424 | if (i > LAST_STACK_REG) | |
b9422b69 | 425 | return false; |
99a59310 | 426 | |
a6a2274a | 427 | /* Ok, floating point instructions exist. If not optimizing, |
0c20a65f | 428 | build the CFG and run life analysis. |
b9422b69 JH |
429 | Also need to rebuild life when superblock scheduling is done |
430 | as it don't update liveness yet. */ | |
431 | if (!optimize | |
432 | || (flag_sched2_use_superblocks | |
433 | && flag_schedule_insns_after_reload)) | |
73991d6a | 434 | { |
73991d6a | 435 | count_or_remove_death_notes (NULL, 1); |
827c06b6 | 436 | life_analysis (file, PROP_DEATH_NOTES); |
73991d6a | 437 | } |
0ecf09f9 | 438 | mark_dfs_back_edges (); |
48227150 | 439 | |
a05924f9 | 440 | /* Set up block info for each basic block. */ |
ca6c03ca | 441 | alloc_aux_for_blocks (sizeof (struct block_info_def)); |
e0082a72 | 442 | FOR_EACH_BB_REVERSE (bb) |
0ecf09f9 JH |
443 | { |
444 | edge e; | |
628f6a4e BE |
445 | edge_iterator ei; |
446 | ||
447 | FOR_EACH_EDGE (e, ei, bb->preds) | |
0ecf09f9 JH |
448 | if (!(e->flags & EDGE_DFS_BACK) |
449 | && e->src != ENTRY_BLOCK_PTR) | |
754d9299 | 450 | BLOCK_INFO (bb)->predecessors++; |
0ecf09f9 | 451 | } |
48227150 | 452 | |
a05924f9 JH |
453 | /* Create the replacement registers up front. */ |
454 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
21b2cd73 | 455 | { |
a05924f9 JH |
456 | enum machine_mode mode; |
457 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); | |
458 | mode != VOIDmode; | |
459 | mode = GET_MODE_WIDER_MODE (mode)) | |
460 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
461 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); | |
462 | mode != VOIDmode; | |
463 | mode = GET_MODE_WIDER_MODE (mode)) | |
464 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
21b2cd73 | 465 | } |
48227150 | 466 | |
a05924f9 | 467 | ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); |
48227150 | 468 | |
a6a2274a | 469 | /* A QNaN for initializing uninitialized variables. |
48227150 | 470 | |
a05924f9 | 471 | ??? We can't load from constant memory in PIC mode, because |
d55d8fc7 | 472 | we're inserting these instructions before the prologue and |
a05924f9 JH |
473 | the PIC register hasn't been set up. In that case, fall back |
474 | on zero, which we can get from `ldz'. */ | |
48227150 | 475 | |
a05924f9 | 476 | if (flag_pic) |
d2032ad8 | 477 | not_a_num = CONST0_RTX (SFmode); |
a05924f9 JH |
478 | else |
479 | { | |
d2032ad8 AP |
480 | not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); |
481 | not_a_num = force_const_mem (SFmode, not_a_num); | |
a05924f9 | 482 | } |
48227150 | 483 | |
a05924f9 JH |
484 | /* Allocate a cache for stack_regs_mentioned. */ |
485 | max_uid = get_max_uid (); | |
486 | VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, | |
487 | "stack_regs_mentioned cache"); | |
48227150 | 488 | |
4793dca1 | 489 | convert_regs (file); |
21b2cd73 | 490 | |
ca6c03ca | 491 | free_aux_for_blocks (); |
b9422b69 | 492 | return true; |
48227150 | 493 | } |
48227150 | 494 | |
48227150 JVA |
495 | \f |
496 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
497 | REG, possible enclosed by a conversion rtx, return the inner part of | |
0f41302f | 498 | PAT that stopped the search. */ |
48227150 JVA |
499 | |
500 | static rtx * | |
0c20a65f | 501 | get_true_reg (rtx *pat) |
48227150 | 502 | { |
99a59310 | 503 | for (;;) |
e075ae69 | 504 | switch (GET_CODE (*pat)) |
99a59310 | 505 | { |
e075ae69 | 506 | case SUBREG: |
8d9afc4e | 507 | /* Eliminate FP subregister accesses in favor of the |
e075ae69 RH |
508 | actual FP register in use. */ |
509 | { | |
510 | rtx subreg; | |
511 | if (FP_REG_P (subreg = SUBREG_REG (*pat))) | |
99a59310 | 512 | { |
ddef6bc7 JJ |
513 | int regno_off = subreg_regno_offset (REGNO (subreg), |
514 | GET_MODE (subreg), | |
515 | SUBREG_BYTE (*pat), | |
516 | GET_MODE (*pat)); | |
517 | *pat = FP_MODE_REG (REGNO (subreg) + regno_off, | |
99a59310 | 518 | GET_MODE (subreg)); |
e075ae69 | 519 | default: |
99a59310 RK |
520 | return pat; |
521 | } | |
e075ae69 RH |
522 | } |
523 | case FLOAT: | |
524 | case FIX: | |
525 | case FLOAT_EXTEND: | |
526 | pat = & XEXP (*pat, 0); | |
0c5faf29 RS |
527 | break; |
528 | ||
529 | case FLOAT_TRUNCATE: | |
530 | if (!flag_unsafe_math_optimizations) | |
531 | return pat; | |
532 | pat = & XEXP (*pat, 0); | |
533 | break; | |
99a59310 | 534 | } |
48227150 | 535 | } |
48227150 | 536 | \f |
d6fc0492 RH |
537 | /* Set if we find any malformed asms in a block. */ |
538 | static bool any_malformed_asm; | |
539 | ||
a05924f9 | 540 | /* There are many rules that an asm statement for stack-like regs must |
114cbee6 | 541 | follow. Those rules are explained at the top of this file: the rule |
0f41302f | 542 | numbers below refer to that explanation. */ |
114cbee6 | 543 | |
a05924f9 | 544 | static int |
0c20a65f | 545 | check_asm_stack_operands (rtx insn) |
114cbee6 RS |
546 | { |
547 | int i; | |
114cbee6 RS |
548 | int n_clobbers; |
549 | int malformed_asm = 0; | |
550 | rtx body = PATTERN (insn); | |
551 | ||
a05924f9 JH |
552 | char reg_used_as_output[FIRST_PSEUDO_REGISTER]; |
553 | char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
f62a15e3 | 554 | int alt; |
114cbee6 | 555 | |
a544cfd2 | 556 | rtx *clobber_reg = 0; |
f62a15e3 | 557 | int n_inputs, n_outputs; |
114cbee6 | 558 | |
0e7d0eb9 | 559 | /* Find out what the constraints require. If no constraint |
854dfdff | 560 | alternative matches, this asm is malformed. */ |
f62a15e3 BS |
561 | extract_insn (insn); |
562 | constrain_operands (1); | |
563 | alt = which_alternative; | |
564 | ||
565 | preprocess_constraints (); | |
566 | ||
567 | n_inputs = get_asm_operand_n_inputs (body); | |
1ccbefce | 568 | n_outputs = recog_data.n_operands - n_inputs; |
f62a15e3 BS |
569 | |
570 | if (alt < 0) | |
571 | { | |
572 | malformed_asm = 1; | |
573 | /* Avoid further trouble with this insn. */ | |
574 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
a05924f9 | 575 | return 0; |
f62a15e3 | 576 | } |
114cbee6 | 577 | |
0f41302f | 578 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
579 | for (i = 0; i < recog_data.n_operands; i++) |
580 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
f8cfc6aa | 581 | && REG_P (SUBREG_REG (recog_data.operand[i]))) |
1ccbefce | 582 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); |
114cbee6 RS |
583 | |
584 | /* Set up CLOBBER_REG. */ | |
585 | ||
586 | n_clobbers = 0; | |
114cbee6 RS |
587 | |
588 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 589 | { |
703ad42b | 590 | clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); |
114cbee6 | 591 | |
3f5cfed6 JVA |
592 | for (i = 0; i < XVECLEN (body, 0); i++) |
593 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
594 | { | |
595 | rtx clobber = XVECEXP (body, 0, i); | |
596 | rtx reg = XEXP (clobber, 0); | |
114cbee6 | 597 | |
f8cfc6aa | 598 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
3f5cfed6 JVA |
599 | reg = SUBREG_REG (reg); |
600 | ||
601 | if (STACK_REG_P (reg)) | |
602 | { | |
603 | clobber_reg[n_clobbers] = reg; | |
604 | n_clobbers++; | |
605 | } | |
606 | } | |
607 | } | |
114cbee6 RS |
608 | |
609 | /* Enforce rule #4: Output operands must specifically indicate which | |
610 | reg an output appears in after an asm. "=f" is not allowed: the | |
611 | operand constraints must select a class with a single reg. | |
612 | ||
613 | Also enforce rule #5: Output operands must start at the top of | |
0f41302f | 614 | the reg-stack: output operands may not "skip" a reg. */ |
114cbee6 | 615 | |
a05924f9 | 616 | memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); |
114cbee6 | 617 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 618 | if (STACK_REG_P (recog_data.operand[i])) |
9c318306 | 619 | { |
e3a64162 | 620 | if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) |
9c318306 | 621 | { |
1f978f5f | 622 | error_for_asm (insn, "output constraint %d must specify a single register", i); |
9c318306 MH |
623 | malformed_asm = 1; |
624 | } | |
a6a2274a | 625 | else |
d40cd80a JJ |
626 | { |
627 | int j; | |
628 | ||
629 | for (j = 0; j < n_clobbers; j++) | |
630 | if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) | |
631 | { | |
1f978f5f | 632 | error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", |
d40cd80a JJ |
633 | i, reg_names [REGNO (clobber_reg[j])]); |
634 | malformed_asm = 1; | |
635 | break; | |
636 | } | |
637 | if (j == n_clobbers) | |
638 | reg_used_as_output[REGNO (recog_data.operand[i])] = 1; | |
639 | } | |
9c318306 | 640 | } |
114cbee6 RS |
641 | |
642 | ||
643 | /* Search for first non-popped reg. */ | |
644 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
645 | if (! reg_used_as_output[i]) | |
646 | break; | |
647 | ||
648 | /* If there are any other popped regs, that's an error. */ | |
649 | for (; i < LAST_STACK_REG + 1; i++) | |
650 | if (reg_used_as_output[i]) | |
651 | break; | |
652 | ||
653 | if (i != LAST_STACK_REG + 1) | |
654 | { | |
1f978f5f | 655 | error_for_asm (insn, "output regs must be grouped at top of stack"); |
114cbee6 RS |
656 | malformed_asm = 1; |
657 | } | |
658 | ||
659 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
660 | to the top of the reg-stack than any input that is not implicitly | |
0f41302f | 661 | popped. */ |
114cbee6 | 662 | |
a05924f9 | 663 | memset (implicitly_dies, 0, sizeof (implicitly_dies)); |
f62a15e3 | 664 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 665 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
666 | { |
667 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 668 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
669 | int j; |
670 | ||
671 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 672 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
673 | break; |
674 | ||
f62a15e3 | 675 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
1ccbefce | 676 | implicitly_dies[REGNO (recog_data.operand[i])] = 1; |
114cbee6 RS |
677 | } |
678 | ||
679 | /* Search for first non-popped reg. */ | |
680 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
681 | if (! implicitly_dies[i]) | |
682 | break; | |
683 | ||
684 | /* If there are any other popped regs, that's an error. */ | |
685 | for (; i < LAST_STACK_REG + 1; i++) | |
686 | if (implicitly_dies[i]) | |
687 | break; | |
688 | ||
689 | if (i != LAST_STACK_REG + 1) | |
690 | { | |
691 | error_for_asm (insn, | |
1f978f5f | 692 | "implicitly popped regs must be grouped at top of stack"); |
114cbee6 RS |
693 | malformed_asm = 1; |
694 | } | |
695 | ||
06d42c22 | 696 | /* Enforce rule #3: If any input operand uses the "f" constraint, all |
114cbee6 RS |
697 | output constraints must use the "&" earlyclobber. |
698 | ||
a05924f9 | 699 | ??? Detect this more deterministically by having constrain_asm_operands |
0f41302f | 700 | record any earlyclobber. */ |
114cbee6 | 701 | |
f62a15e3 BS |
702 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
703 | if (recog_op_alt[i][alt].matches == -1) | |
114cbee6 RS |
704 | { |
705 | int j; | |
706 | ||
707 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 708 | if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) |
114cbee6 RS |
709 | { |
710 | error_for_asm (insn, | |
9e637a26 | 711 | "output operand %d must use %<&%> constraint", j); |
114cbee6 RS |
712 | malformed_asm = 1; |
713 | } | |
714 | } | |
715 | ||
716 | if (malformed_asm) | |
717 | { | |
718 | /* Avoid further trouble with this insn. */ | |
38a448ca | 719 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); |
d6fc0492 | 720 | any_malformed_asm = true; |
a05924f9 | 721 | return 0; |
0e7d0eb9 | 722 | } |
48227150 | 723 | |
a05924f9 | 724 | return 1; |
48227150 JVA |
725 | } |
726 | \f | |
114cbee6 RS |
727 | /* Calculate the number of inputs and outputs in BODY, an |
728 | asm_operands. N_OPERANDS is the total number of operands, and | |
729 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
0f41302f | 730 | placed. */ |
114cbee6 | 731 | |
f62a15e3 | 732 | static int |
0c20a65f | 733 | get_asm_operand_n_inputs (rtx body) |
114cbee6 | 734 | { |
41374e13 NS |
735 | switch (GET_CODE (body)) |
736 | { | |
737 | case SET: | |
738 | gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS); | |
739 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); | |
740 | ||
741 | case ASM_OPERANDS: | |
742 | return ASM_OPERANDS_INPUT_LENGTH (body); | |
743 | ||
744 | case PARALLEL: | |
745 | return get_asm_operand_n_inputs (XVECEXP (body, 0, 0)); | |
746 | ||
747 | default: | |
748 | gcc_unreachable (); | |
749 | } | |
114cbee6 | 750 | } |
0ab759e4 | 751 | |
96237362 | 752 | /* If current function returns its result in an fp stack register, |
9f9ed50a | 753 | return the REG. Otherwise, return 0. */ |
96237362 | 754 | |
99a59310 | 755 | static rtx |
0c20a65f | 756 | stack_result (tree decl) |
96237362 | 757 | { |
f099b1c9 | 758 | rtx result; |
96237362 | 759 | |
f099b1c9 JL |
760 | /* If the value is supposed to be returned in memory, then clearly |
761 | it is not returned in a stack register. */ | |
61f71b34 | 762 | if (aggregate_value_p (DECL_RESULT (decl), decl)) |
f099b1c9 JL |
763 | return 0; |
764 | ||
19e7881c | 765 | result = DECL_RTL_IF_SET (DECL_RESULT (decl)); |
9cf218a3 | 766 | if (result != 0) |
96237362 RS |
767 | { |
768 | #ifdef FUNCTION_OUTGOING_VALUE | |
769 | result | |
a6a2274a | 770 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); |
96237362 RS |
771 | #else |
772 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
773 | #endif | |
774 | } | |
775 | ||
9f9ed50a | 776 | return result != 0 && STACK_REG_P (result) ? result : 0; |
96237362 | 777 | } |
48227150 | 778 | \f |
48227150 | 779 | |
e075ae69 RH |
780 | /* |
781 | * This section deals with stack register substitution, and forms the second | |
782 | * pass over the RTL. | |
783 | */ | |
48227150 JVA |
784 | |
785 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
0f41302f | 786 | the desired hard REGNO. */ |
48227150 JVA |
787 | |
788 | static void | |
0c20a65f | 789 | replace_reg (rtx *reg, int regno) |
48227150 | 790 | { |
41374e13 NS |
791 | gcc_assert (regno >= FIRST_STACK_REG); |
792 | gcc_assert (regno <= LAST_STACK_REG); | |
793 | gcc_assert (STACK_REG_P (*reg)); | |
48227150 | 794 | |
41374e13 NS |
795 | gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT |
796 | || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); | |
7d0e3dd4 | 797 | |
99a59310 | 798 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
48227150 JVA |
799 | } |
800 | ||
801 | /* Remove a note of type NOTE, which must be found, for register | |
0f41302f | 802 | number REGNO from INSN. Remove only one such note. */ |
48227150 JVA |
803 | |
804 | static void | |
0c20a65f | 805 | remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) |
48227150 | 806 | { |
b3694847 | 807 | rtx *note_link, this; |
48227150 | 808 | |
8e2e89f7 | 809 | note_link = ®_NOTES (insn); |
48227150 JVA |
810 | for (this = *note_link; this; this = XEXP (this, 1)) |
811 | if (REG_NOTE_KIND (this) == note | |
812 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) | |
813 | { | |
814 | *note_link = XEXP (this, 1); | |
815 | return; | |
816 | } | |
817 | else | |
818 | note_link = &XEXP (this, 1); | |
819 | ||
41374e13 | 820 | gcc_unreachable (); |
48227150 JVA |
821 | } |
822 | ||
823 | /* Find the hard register number of virtual register REG in REGSTACK. | |
824 | The hard register number is relative to the top of the stack. -1 is | |
0f41302f | 825 | returned if the register is not found. */ |
48227150 JVA |
826 | |
827 | static int | |
0c20a65f | 828 | get_hard_regnum (stack regstack, rtx reg) |
48227150 JVA |
829 | { |
830 | int i; | |
831 | ||
41374e13 | 832 | gcc_assert (STACK_REG_P (reg)); |
48227150 JVA |
833 | |
834 | for (i = regstack->top; i >= 0; i--) | |
835 | if (regstack->reg[i] == REGNO (reg)) | |
836 | break; | |
837 | ||
838 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
839 | } | |
48227150 JVA |
840 | \f |
841 | /* Emit an insn to pop virtual register REG before or after INSN. | |
842 | REGSTACK is the stack state after INSN and is updated to reflect this | |
e075ae69 RH |
843 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn |
844 | is represented as a SET whose destination is the register to be popped | |
845 | and source is the top of stack. A death note for the top of stack | |
0f41302f | 846 | cases the movdf pattern to pop. */ |
48227150 JVA |
847 | |
848 | static rtx | |
0c20a65f | 849 | emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) |
48227150 JVA |
850 | { |
851 | rtx pop_insn, pop_rtx; | |
852 | int hard_regno; | |
853 | ||
037f20f1 JH |
854 | /* For complex types take care to pop both halves. These may survive in |
855 | CLOBBER and USE expressions. */ | |
856 | if (COMPLEX_MODE_P (GET_MODE (reg))) | |
857 | { | |
858 | rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); | |
859 | rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); | |
860 | ||
861 | pop_insn = NULL_RTX; | |
862 | if (get_hard_regnum (regstack, reg1) >= 0) | |
a6a2274a | 863 | pop_insn = emit_pop_insn (insn, regstack, reg1, where); |
037f20f1 | 864 | if (get_hard_regnum (regstack, reg2) >= 0) |
a6a2274a | 865 | pop_insn = emit_pop_insn (insn, regstack, reg2, where); |
41374e13 | 866 | gcc_assert (pop_insn); |
037f20f1 JH |
867 | return pop_insn; |
868 | } | |
869 | ||
48227150 JVA |
870 | hard_regno = get_hard_regnum (regstack, reg); |
871 | ||
41374e13 | 872 | gcc_assert (hard_regno >= FIRST_STACK_REG); |
48227150 | 873 | |
e075ae69 RH |
874 | pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), |
875 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
48227150 | 876 | |
a05924f9 | 877 | if (where == EMIT_AFTER) |
3c030e88 | 878 | pop_insn = emit_insn_after (pop_rtx, insn); |
a05924f9 | 879 | else |
3c030e88 | 880 | pop_insn = emit_insn_before (pop_rtx, insn); |
48227150 | 881 | |
c5c76735 JL |
882 | REG_NOTES (pop_insn) |
883 | = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), | |
884 | REG_NOTES (pop_insn)); | |
48227150 JVA |
885 | |
886 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
887 | = regstack->reg[regstack->top]; | |
888 | regstack->top -= 1; | |
889 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
890 | ||
891 | return pop_insn; | |
892 | } | |
893 | \f | |
a05924f9 JH |
894 | /* Emit an insn before or after INSN to swap virtual register REG with |
895 | the top of stack. REGSTACK is the stack state before the swap, and | |
896 | is updated to reflect the swap. A swap insn is represented as a | |
897 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
48227150 | 898 | |
0f41302f | 899 | If REG is already at the top of the stack, no insn is emitted. */ |
48227150 JVA |
900 | |
901 | static void | |
0c20a65f | 902 | emit_swap_insn (rtx insn, stack regstack, rtx reg) |
48227150 | 903 | { |
eca31501 | 904 | int hard_regno; |
a05924f9 | 905 | rtx swap_rtx; |
eca31501 JVA |
906 | int tmp, other_reg; /* swap regno temps */ |
907 | rtx i1; /* the stack-reg insn prior to INSN */ | |
908 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
48227150 | 909 | |
eca31501 JVA |
910 | hard_regno = get_hard_regnum (regstack, reg); |
911 | ||
41374e13 | 912 | gcc_assert (hard_regno >= FIRST_STACK_REG); |
48227150 JVA |
913 | if (hard_regno == FIRST_STACK_REG) |
914 | return; | |
915 | ||
eca31501 | 916 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
48227150 | 917 | |
eca31501 JVA |
918 | tmp = regstack->reg[other_reg]; |
919 | regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
48227150 | 920 | regstack->reg[regstack->top] = tmp; |
48227150 | 921 | |
a05924f9 JH |
922 | /* Find the previous insn involving stack regs, but don't pass a |
923 | block boundary. */ | |
924 | i1 = NULL; | |
a813c111 | 925 | if (current_block && insn != BB_HEAD (current_block)) |
eca31501 | 926 | { |
a05924f9 | 927 | rtx tmp = PREV_INSN (insn); |
a813c111 | 928 | rtx limit = PREV_INSN (BB_HEAD (current_block)); |
3a6cc978 | 929 | while (tmp != limit) |
a05924f9 | 930 | { |
4b4bf941 JQ |
931 | if (LABEL_P (tmp) |
932 | || CALL_P (tmp) | |
589ca5cb | 933 | || NOTE_INSN_BASIC_BLOCK_P (tmp) |
9fb32434 CT |
934 | || (NOTE_P (tmp) |
935 | && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE) | |
4b4bf941 | 936 | || (NONJUMP_INSN_P (tmp) |
a05924f9 JH |
937 | && stack_regs_mentioned (tmp))) |
938 | { | |
939 | i1 = tmp; | |
940 | break; | |
941 | } | |
942 | tmp = PREV_INSN (tmp); | |
943 | } | |
944 | } | |
945 | ||
946 | if (i1 != NULL_RTX | |
947 | && (i1set = single_set (i1)) != NULL_RTX) | |
948 | { | |
949 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
eca31501 | 950 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); |
48227150 | 951 | |
eca31501 | 952 | /* If the previous register stack push was from the reg we are to |
0f41302f | 953 | swap with, omit the swap. */ |
eca31501 | 954 | |
f8cfc6aa JQ |
955 | if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG |
956 | && REG_P (i1src) | |
ae0ed63a | 957 | && REGNO (i1src) == (unsigned) hard_regno - 1 |
eca31501 JVA |
958 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
959 | return; | |
960 | ||
961 | /* If the previous insn wrote to the reg we are to swap with, | |
962 | omit the swap. */ | |
963 | ||
f8cfc6aa JQ |
964 | if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno |
965 | && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG | |
eca31501 JVA |
966 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
967 | return; | |
968 | } | |
969 | ||
e075ae69 RH |
970 | swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), |
971 | FP_MODE_REG (FIRST_STACK_REG, XFmode)); | |
a05924f9 JH |
972 | |
973 | if (i1) | |
3c030e88 | 974 | emit_insn_after (swap_rtx, i1); |
a05924f9 | 975 | else if (current_block) |
a813c111 | 976 | emit_insn_before (swap_rtx, BB_HEAD (current_block)); |
a05924f9 JH |
977 | else |
978 | emit_insn_before (swap_rtx, insn); | |
48227150 JVA |
979 | } |
980 | \f | |
f964bd29 UB |
981 | /* Emit an insns before INSN to swap virtual register SRC1 with |
982 | the top of stack and virtual register SRC2 with second stack | |
983 | slot. REGSTACK is the stack state before the swaps, and | |
984 | is updated to reflect the swaps. A swap insn is represented as a | |
985 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
986 | ||
987 | If SRC1 and/or SRC2 are already at the right place, no swap insn | |
988 | is emitted. */ | |
989 | ||
990 | static void | |
991 | swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) | |
992 | { | |
993 | struct stack_def temp_stack; | |
994 | int regno, j, k, temp; | |
995 | ||
996 | temp_stack = *regstack; | |
997 | ||
998 | /* Place operand 1 at the top of stack. */ | |
999 | regno = get_hard_regnum (&temp_stack, src1); | |
41374e13 | 1000 | gcc_assert (regno >= 0); |
f964bd29 UB |
1001 | if (regno != FIRST_STACK_REG) |
1002 | { | |
1003 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
1004 | j = temp_stack.top; | |
1005 | ||
1006 | temp = temp_stack.reg[k]; | |
1007 | temp_stack.reg[k] = temp_stack.reg[j]; | |
1008 | temp_stack.reg[j] = temp; | |
1009 | } | |
1010 | ||
1011 | /* Place operand 2 next on the stack. */ | |
1012 | regno = get_hard_regnum (&temp_stack, src2); | |
41374e13 | 1013 | gcc_assert (regno >= 0); |
f964bd29 UB |
1014 | if (regno != FIRST_STACK_REG + 1) |
1015 | { | |
1016 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
1017 | j = temp_stack.top - 1; | |
1018 | ||
1019 | temp = temp_stack.reg[k]; | |
1020 | temp_stack.reg[k] = temp_stack.reg[j]; | |
1021 | temp_stack.reg[j] = temp; | |
1022 | } | |
1023 | ||
1024 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
1025 | } | |
1026 | \f | |
48227150 | 1027 | /* Handle a move to or from a stack register in PAT, which is in INSN. |
ecb63641 EB |
1028 | REGSTACK is the current stack. Return whether a control flow insn |
1029 | was deleted in the process. */ | |
48227150 | 1030 | |
ecb63641 | 1031 | static bool |
0c20a65f | 1032 | move_for_stack_reg (rtx insn, stack regstack, rtx pat) |
48227150 | 1033 | { |
99a59310 RK |
1034 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
1035 | rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
1036 | rtx src, dest; | |
48227150 | 1037 | rtx note; |
ecb63641 | 1038 | bool control_flow_insn_deleted = false; |
48227150 | 1039 | |
99a59310 RK |
1040 | src = *psrc; dest = *pdest; |
1041 | ||
1042 | if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
48227150 JVA |
1043 | { |
1044 | /* Write from one stack reg to another. If SRC dies here, then | |
0f41302f | 1045 | just change the register mapping and delete the insn. */ |
48227150 | 1046 | |
99a59310 | 1047 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1048 | if (note) |
1049 | { | |
1050 | int i; | |
1051 | ||
0f41302f | 1052 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
41374e13 | 1053 | gcc_assert (REGNO (src) != REGNO (dest)); |
48227150 JVA |
1054 | |
1055 | for (i = regstack->top; i >= 0; i--) | |
99a59310 | 1056 | if (regstack->reg[i] == REGNO (src)) |
48227150 JVA |
1057 | break; |
1058 | ||
5ad85f7d | 1059 | /* The destination must be dead, or life analysis is borked. */ |
41374e13 | 1060 | gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); |
48227150 | 1061 | |
5ad85f7d RH |
1062 | /* If the source is not live, this is yet another case of |
1063 | uninitialized variables. Load up a NaN instead. */ | |
1064 | if (i < 0) | |
1065 | return move_nan_for_stack_reg (insn, regstack, dest); | |
1066 | ||
48227150 | 1067 | /* It is possible that the dest is unused after this insn. |
0f41302f | 1068 | If so, just pop the src. */ |
48227150 | 1069 | |
99a59310 | 1070 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
ecb63641 EB |
1071 | emit_pop_insn (insn, regstack, src, EMIT_AFTER); |
1072 | else | |
48227150 | 1073 | { |
ecb63641 EB |
1074 | regstack->reg[i] = REGNO (dest); |
1075 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1076 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
48227150 JVA |
1077 | } |
1078 | ||
ecb63641 | 1079 | control_flow_insn_deleted |= control_flow_insn_p (insn); |
53c17031 | 1080 | delete_insn (insn); |
ecb63641 | 1081 | return control_flow_insn_deleted; |
48227150 JVA |
1082 | } |
1083 | ||
0f41302f | 1084 | /* The source reg does not die. */ |
48227150 JVA |
1085 | |
1086 | /* If this appears to be a no-op move, delete it, or else it | |
1087 | will confuse the machine description output patterns. But if | |
1088 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
0f41302f | 1089 | for REG_UNUSED will not work for deleted insns. */ |
48227150 | 1090 | |
99a59310 | 1091 | if (REGNO (src) == REGNO (dest)) |
48227150 | 1092 | { |
99a59310 | 1093 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
a05924f9 | 1094 | emit_pop_insn (insn, regstack, dest, EMIT_AFTER); |
48227150 | 1095 | |
ecb63641 | 1096 | control_flow_insn_deleted |= control_flow_insn_p (insn); |
53c17031 | 1097 | delete_insn (insn); |
ecb63641 | 1098 | return control_flow_insn_deleted; |
48227150 JVA |
1099 | } |
1100 | ||
3eae4643 | 1101 | /* The destination ought to be dead. */ |
41374e13 | 1102 | gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); |
48227150 | 1103 | |
99a59310 | 1104 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
48227150 | 1105 | |
99a59310 RK |
1106 | regstack->reg[++regstack->top] = REGNO (dest); |
1107 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1108 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 | 1109 | } |
99a59310 | 1110 | else if (STACK_REG_P (src)) |
48227150 JVA |
1111 | { |
1112 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1113 | only top of stack may be saved, emit an exchange first if | |
0f41302f | 1114 | needs be. */ |
48227150 | 1115 | |
99a59310 | 1116 | emit_swap_insn (insn, regstack, src); |
48227150 | 1117 | |
99a59310 | 1118 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1119 | if (note) |
1120 | { | |
1121 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1122 | regstack->top--; | |
99a59310 | 1123 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
48227150 | 1124 | } |
f8a1ebc6 | 1125 | else if ((GET_MODE (src) == XFmode) |
cadcffb3 | 1126 | && regstack->top < REG_STACK_SIZE - 1) |
b40b8b06 JVA |
1127 | { |
1128 | /* A 387 cannot write an XFmode value to a MEM without | |
1129 | clobbering the source reg. The output code can handle | |
1130 | this by reading back the value from the MEM. | |
1131 | But it is more efficient to use a temp register if one is | |
1132 | available. Push the source value here if the register | |
1133 | stack is not full, and then write the value to memory via | |
1134 | a pop. */ | |
f7448d50 | 1135 | rtx push_rtx; |
037f20f1 | 1136 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); |
b40b8b06 | 1137 | |
f8a1ebc6 | 1138 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); |
f7448d50 | 1139 | emit_insn_before (push_rtx, insn); |
38a448ca RH |
1140 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, |
1141 | REG_NOTES (insn)); | |
b40b8b06 | 1142 | } |
48227150 | 1143 | |
99a59310 | 1144 | replace_reg (psrc, FIRST_STACK_REG); |
48227150 | 1145 | } |
41374e13 | 1146 | else |
48227150 | 1147 | { |
41374e13 NS |
1148 | gcc_assert (STACK_REG_P (dest)); |
1149 | ||
48227150 JVA |
1150 | /* Load from MEM, or possibly integer REG or constant, into the |
1151 | stack regs. The actual target is always the top of the | |
1152 | stack. The stack mapping is changed to reflect that DEST is | |
1153 | now at top of stack. */ | |
1154 | ||
3eae4643 | 1155 | /* The destination ought to be dead. */ |
41374e13 | 1156 | gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); |
48227150 | 1157 | |
41374e13 | 1158 | gcc_assert (regstack->top < REG_STACK_SIZE); |
48227150 | 1159 | |
99a59310 RK |
1160 | regstack->reg[++regstack->top] = REGNO (dest); |
1161 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1162 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 | 1163 | } |
ecb63641 EB |
1164 | |
1165 | return control_flow_insn_deleted; | |
48227150 | 1166 | } |
5ad85f7d RH |
1167 | |
1168 | /* A helper function which replaces INSN with a pattern that loads up | |
1169 | a NaN into DEST, then invokes move_for_stack_reg. */ | |
1170 | ||
1171 | static bool | |
1172 | move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest) | |
1173 | { | |
1174 | rtx pat; | |
1175 | ||
1176 | dest = FP_MODE_REG (REGNO (dest), SFmode); | |
1177 | pat = gen_rtx_SET (VOIDmode, dest, not_a_num); | |
1178 | PATTERN (insn) = pat; | |
1179 | INSN_CODE (insn) = -1; | |
1180 | ||
1181 | return move_for_stack_reg (insn, regstack, pat); | |
1182 | } | |
48227150 | 1183 | \f |
e075ae69 RH |
1184 | /* Swap the condition on a branch, if there is one. Return true if we |
1185 | found a condition to swap. False if the condition was not used as | |
dc297297 | 1186 | such. */ |
e075ae69 RH |
1187 | |
1188 | static int | |
0c20a65f | 1189 | swap_rtx_condition_1 (rtx pat) |
eca31501 | 1190 | { |
b3694847 SS |
1191 | const char *fmt; |
1192 | int i, r = 0; | |
eca31501 | 1193 | |
ec8e098d | 1194 | if (COMPARISON_P (pat)) |
eca31501 JVA |
1195 | { |
1196 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
e075ae69 | 1197 | r = 1; |
eca31501 | 1198 | } |
e075ae69 | 1199 | else |
eca31501 | 1200 | { |
e075ae69 RH |
1201 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
1202 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
eca31501 | 1203 | { |
e075ae69 RH |
1204 | if (fmt[i] == 'E') |
1205 | { | |
b3694847 | 1206 | int j; |
eca31501 | 1207 | |
e075ae69 RH |
1208 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
1209 | r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
1210 | } | |
1211 | else if (fmt[i] == 'e') | |
1212 | r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
eca31501 | 1213 | } |
eca31501 | 1214 | } |
e075ae69 RH |
1215 | |
1216 | return r; | |
1217 | } | |
1218 | ||
1219 | static int | |
0c20a65f | 1220 | swap_rtx_condition (rtx insn) |
e075ae69 RH |
1221 | { |
1222 | rtx pat = PATTERN (insn); | |
1223 | ||
1224 | /* We're looking for a single set to cc0 or an HImode temporary. */ | |
1225 | ||
1226 | if (GET_CODE (pat) == SET | |
f8cfc6aa | 1227 | && REG_P (SET_DEST (pat)) |
e075ae69 RH |
1228 | && REGNO (SET_DEST (pat)) == FLAGS_REG) |
1229 | { | |
1230 | insn = next_flags_user (insn); | |
1231 | if (insn == NULL_RTX) | |
1232 | return 0; | |
1233 | pat = PATTERN (insn); | |
1234 | } | |
1235 | ||
1236 | /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're | |
1237 | not doing anything with the cc value right now. We may be able to | |
1238 | search for one though. */ | |
1239 | ||
1240 | if (GET_CODE (pat) == SET | |
1241 | && GET_CODE (SET_SRC (pat)) == UNSPEC | |
35a76aac | 1242 | && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) |
e075ae69 RH |
1243 | { |
1244 | rtx dest = SET_DEST (pat); | |
1245 | ||
a6a2274a | 1246 | /* Search forward looking for the first use of this value. |
e075ae69 | 1247 | Stop at block boundaries. */ |
a813c111 | 1248 | while (insn != BB_END (current_block)) |
e075ae69 RH |
1249 | { |
1250 | insn = NEXT_INSN (insn); | |
2c3c49de | 1251 | if (INSN_P (insn) && reg_mentioned_p (dest, insn)) |
e075ae69 | 1252 | break; |
4b4bf941 | 1253 | if (CALL_P (insn)) |
e075ae69 RH |
1254 | return 0; |
1255 | } | |
1256 | ||
1257 | /* So we've found the insn using this value. If it is anything | |
1258 | other than sahf, aka unspec 10, or the value does not die | |
1259 | (meaning we'd have to search further), then we must give up. */ | |
1260 | pat = PATTERN (insn); | |
1261 | if (GET_CODE (pat) != SET | |
1262 | || GET_CODE (SET_SRC (pat)) != UNSPEC | |
35a76aac | 1263 | || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF |
e075ae69 RH |
1264 | || ! dead_or_set_p (insn, dest)) |
1265 | return 0; | |
1266 | ||
1267 | /* Now we are prepared to handle this as a normal cc0 setter. */ | |
1268 | insn = next_flags_user (insn); | |
1269 | if (insn == NULL_RTX) | |
1270 | return 0; | |
1271 | pat = PATTERN (insn); | |
1272 | } | |
1273 | ||
90a74703 JH |
1274 | if (swap_rtx_condition_1 (pat)) |
1275 | { | |
0eac0e81 | 1276 | int fail = 0; |
90a74703 JH |
1277 | INSN_CODE (insn) = -1; |
1278 | if (recog_memoized (insn) == -1) | |
0eac0e81 JH |
1279 | fail = 1; |
1280 | /* In case the flags don't die here, recurse to try fix | |
1281 | following user too. */ | |
1282 | else if (! dead_or_set_p (insn, ix86_flags_rtx)) | |
1283 | { | |
1284 | insn = next_flags_user (insn); | |
1285 | if (!insn || !swap_rtx_condition (insn)) | |
1286 | fail = 1; | |
1287 | } | |
1288 | if (fail) | |
90a74703 JH |
1289 | { |
1290 | swap_rtx_condition_1 (pat); | |
1291 | return 0; | |
1292 | } | |
1293 | return 1; | |
1294 | } | |
1295 | return 0; | |
eca31501 JVA |
1296 | } |
1297 | ||
48227150 JVA |
1298 | /* Handle a comparison. Special care needs to be taken to avoid |
1299 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
1300 | ||
e075ae69 | 1301 | Also, a pop insn may need to be emitted. The 387 does have an |
48227150 JVA |
1302 | `fcompp' insn that can pop two regs, but it is sometimes too expensive |
1303 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
e075ae69 | 1304 | set up. */ |
48227150 JVA |
1305 | |
1306 | static void | |
0c20a65f | 1307 | compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) |
48227150 JVA |
1308 | { |
1309 | rtx *src1, *src2; | |
1310 | rtx src1_note, src2_note; | |
914ec131 | 1311 | |
e075ae69 RH |
1312 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1313 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
48227150 | 1314 | |
eca31501 | 1315 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
0f41302f | 1316 | registers that die in this insn - move those to stack top first. */ |
e075ae69 RH |
1317 | if ((! STACK_REG_P (*src1) |
1318 | || (STACK_REG_P (*src2) | |
1319 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
1320 | && swap_rtx_condition (insn)) | |
eca31501 | 1321 | { |
e075ae69 RH |
1322 | rtx temp; |
1323 | temp = XEXP (pat_src, 0); | |
1324 | XEXP (pat_src, 0) = XEXP (pat_src, 1); | |
1325 | XEXP (pat_src, 1) = temp; | |
48227150 | 1326 | |
e075ae69 RH |
1327 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1328 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
dc78213e | 1329 | |
b9342cdf | 1330 | INSN_CODE (insn) = -1; |
eca31501 | 1331 | } |
48227150 | 1332 | |
0f41302f | 1333 | /* We will fix any death note later. */ |
48227150 JVA |
1334 | |
1335 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1336 | ||
1337 | if (STACK_REG_P (*src2)) | |
1338 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1339 | else | |
eca31501 | 1340 | src2_note = NULL_RTX; |
48227150 | 1341 | |
e075ae69 | 1342 | emit_swap_insn (insn, regstack, *src1); |
48227150 JVA |
1343 | |
1344 | replace_reg (src1, FIRST_STACK_REG); | |
1345 | ||
1346 | if (STACK_REG_P (*src2)) | |
e075ae69 | 1347 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
48227150 JVA |
1348 | |
1349 | if (src1_note) | |
1350 | { | |
7aa74e4c | 1351 | pop_stack (regstack, REGNO (XEXP (src1_note, 0))); |
48227150 | 1352 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
48227150 JVA |
1353 | } |
1354 | ||
1355 | /* If the second operand dies, handle that. But if the operands are | |
1356 | the same stack register, don't bother, because only one death is | |
0f41302f | 1357 | needed, and it was just handled. */ |
48227150 JVA |
1358 | |
1359 | if (src2_note | |
eca31501 | 1360 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
48227150 JVA |
1361 | && REGNO (*src1) == REGNO (*src2))) |
1362 | { | |
1363 | /* As a special case, two regs may die in this insn if src2 is | |
1364 | next to top of stack and the top of stack also dies. Since | |
1365 | we have already popped src1, "next to top of stack" is really | |
0f41302f | 1366 | at top (FIRST_STACK_REG) now. */ |
48227150 JVA |
1367 | |
1368 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
1369 | && src1_note) | |
1370 | { | |
7aa74e4c | 1371 | pop_stack (regstack, REGNO (XEXP (src2_note, 0))); |
48227150 | 1372 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
48227150 JVA |
1373 | } |
1374 | else | |
1375 | { | |
e075ae69 RH |
1376 | /* The 386 can only represent death of the first operand in |
1377 | the case handled above. In all other cases, emit a separate | |
1378 | pop and remove the death note from here. */ | |
1379 | ||
1380 | /* link_cc0_insns (insn); */ | |
1381 | ||
1382 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
48227150 | 1383 | |
e075ae69 | 1384 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), |
a05924f9 | 1385 | EMIT_AFTER); |
48227150 JVA |
1386 | } |
1387 | } | |
1388 | } | |
1389 | \f | |
1390 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK | |
ecb63641 EB |
1391 | is the current register layout. Return whether a control flow insn |
1392 | was deleted in the process. */ | |
48227150 | 1393 | |
ecb63641 | 1394 | static bool |
0c20a65f | 1395 | subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) |
48227150 JVA |
1396 | { |
1397 | rtx *dest, *src; | |
ecb63641 | 1398 | bool control_flow_insn_deleted = false; |
48227150 | 1399 | |
a05924f9 JH |
1400 | switch (GET_CODE (pat)) |
1401 | { | |
1402 | case USE: | |
1403 | /* Deaths in USE insns can happen in non optimizing compilation. | |
1404 | Handle them by popping the dying register. */ | |
1405 | src = get_true_reg (&XEXP (pat, 0)); | |
a6a2274a KH |
1406 | if (STACK_REG_P (*src) |
1407 | && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
1408 | { | |
1409 | emit_pop_insn (insn, regstack, *src, EMIT_AFTER); | |
ecb63641 | 1410 | return control_flow_insn_deleted; |
a6a2274a | 1411 | } |
eedf2f55 | 1412 | /* ??? Uninitialized USE should not happen. */ |
41374e13 NS |
1413 | else |
1414 | gcc_assert (get_hard_regnum (regstack, *src) != -1); | |
a05924f9 | 1415 | break; |
48227150 | 1416 | |
a05924f9 JH |
1417 | case CLOBBER: |
1418 | { | |
1419 | rtx note; | |
48227150 | 1420 | |
a05924f9 JH |
1421 | dest = get_true_reg (&XEXP (pat, 0)); |
1422 | if (STACK_REG_P (*dest)) | |
1423 | { | |
1424 | note = find_reg_note (insn, REG_DEAD, *dest); | |
bd695e1e RH |
1425 | |
1426 | if (pat != PATTERN (insn)) | |
1427 | { | |
1428 | /* The fix_truncdi_1 pattern wants to be able to allocate | |
1429 | it's own scratch register. It does this by clobbering | |
1430 | an fp reg so that it is assured of an empty reg-stack | |
a6a2274a | 1431 | register. If the register is live, kill it now. |
bd695e1e RH |
1432 | Remove the DEAD/UNUSED note so we don't try to kill it |
1433 | later too. */ | |
1434 | ||
1435 | if (note) | |
1436 | emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
1437 | else | |
1438 | { | |
1439 | note = find_reg_note (insn, REG_UNUSED, *dest); | |
41374e13 | 1440 | gcc_assert (note); |
bd695e1e RH |
1441 | } |
1442 | remove_note (insn, note); | |
cb0bc263 | 1443 | replace_reg (dest, FIRST_STACK_REG + 1); |
bd695e1e | 1444 | } |
a05924f9 JH |
1445 | else |
1446 | { | |
bd695e1e RH |
1447 | /* A top-level clobber with no REG_DEAD, and no hard-regnum |
1448 | indicates an uninitialized value. Because reload removed | |
a6a2274a | 1449 | all other clobbers, this must be due to a function |
bd695e1e RH |
1450 | returning without a value. Load up a NaN. */ |
1451 | ||
5ad85f7d | 1452 | if (!note) |
037f20f1 | 1453 | { |
5ad85f7d RH |
1454 | rtx t = *dest; |
1455 | if (get_hard_regnum (regstack, t) == -1) | |
1456 | control_flow_insn_deleted | |
1457 | |= move_nan_for_stack_reg (insn, regstack, t); | |
1458 | if (COMPLEX_MODE_P (GET_MODE (t))) | |
1459 | { | |
1460 | t = FP_MODE_REG (REGNO (t) + 1, DFmode); | |
1461 | if (get_hard_regnum (regstack, t) == -1) | |
1462 | control_flow_insn_deleted | |
1463 | |= move_nan_for_stack_reg (insn, regstack, t); | |
1464 | } | |
037f20f1 | 1465 | } |
a05924f9 | 1466 | } |
a05924f9 | 1467 | } |
48227150 | 1468 | break; |
a05924f9 | 1469 | } |
48227150 | 1470 | |
a05924f9 JH |
1471 | case SET: |
1472 | { | |
6496a589 | 1473 | rtx *src1 = (rtx *) 0, *src2; |
a05924f9 JH |
1474 | rtx src1_note, src2_note; |
1475 | rtx pat_src; | |
1476 | ||
1477 | dest = get_true_reg (&SET_DEST (pat)); | |
1478 | src = get_true_reg (&SET_SRC (pat)); | |
1479 | pat_src = SET_SRC (pat); | |
1480 | ||
1481 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
1482 | if (STACK_REG_P (*src) | |
1483 | || (STACK_REG_P (*dest) | |
3c0cb5de | 1484 | && (REG_P (*src) || MEM_P (*src) |
a05924f9 JH |
1485 | || GET_CODE (*src) == CONST_DOUBLE))) |
1486 | { | |
ecb63641 | 1487 | control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); |
a05924f9 JH |
1488 | break; |
1489 | } | |
48227150 | 1490 | |
a05924f9 JH |
1491 | switch (GET_CODE (pat_src)) |
1492 | { | |
1493 | case COMPARE: | |
1494 | compare_for_stack_reg (insn, regstack, pat_src); | |
1495 | break; | |
48227150 | 1496 | |
a05924f9 JH |
1497 | case CALL: |
1498 | { | |
1499 | int count; | |
66fd46b6 | 1500 | for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; |
a05924f9 JH |
1501 | --count >= 0;) |
1502 | { | |
1503 | regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
1504 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
1505 | } | |
1506 | } | |
1507 | replace_reg (dest, FIRST_STACK_REG); | |
1508 | break; | |
48227150 | 1509 | |
a05924f9 JH |
1510 | case REG: |
1511 | /* This is a `tstM2' case. */ | |
41374e13 | 1512 | gcc_assert (*dest == cc0_rtx); |
a05924f9 | 1513 | src1 = src; |
48227150 | 1514 | |
a05924f9 | 1515 | /* Fall through. */ |
48227150 | 1516 | |
a05924f9 JH |
1517 | case FLOAT_TRUNCATE: |
1518 | case SQRT: | |
1519 | case ABS: | |
1520 | case NEG: | |
1521 | /* These insns only operate on the top of the stack. DEST might | |
1522 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
1523 | possible that the tstM case results in a REG_DEAD note on the | |
1524 | source. */ | |
48227150 | 1525 | |
a05924f9 JH |
1526 | if (src1 == 0) |
1527 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
48227150 | 1528 | |
a05924f9 | 1529 | emit_swap_insn (insn, regstack, *src1); |
48227150 | 1530 | |
a05924f9 | 1531 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
48227150 | 1532 | |
a05924f9 JH |
1533 | if (STACK_REG_P (*dest)) |
1534 | replace_reg (dest, FIRST_STACK_REG); | |
48227150 | 1535 | |
a05924f9 JH |
1536 | if (src1_note) |
1537 | { | |
1538 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1539 | regstack->top--; | |
1540 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1541 | } | |
48227150 | 1542 | |
a05924f9 JH |
1543 | replace_reg (src1, FIRST_STACK_REG); |
1544 | break; | |
48227150 | 1545 | |
a05924f9 JH |
1546 | case MINUS: |
1547 | case DIV: | |
1548 | /* On i386, reversed forms of subM3 and divM3 exist for | |
1549 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
1550 | can be used. */ | |
1551 | case MULT: | |
1552 | case PLUS: | |
1553 | /* These insns can accept the top of stack as a destination | |
1554 | from a stack reg or mem, or can use the top of stack as a | |
1555 | source and some other stack register (possibly top of stack) | |
1556 | as a destination. */ | |
1557 | ||
1558 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
1559 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1560 | ||
1561 | /* We will fix any death note later. */ | |
1562 | ||
1563 | if (STACK_REG_P (*src1)) | |
1564 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1565 | else | |
1566 | src1_note = NULL_RTX; | |
1567 | if (STACK_REG_P (*src2)) | |
1568 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1569 | else | |
1570 | src2_note = NULL_RTX; | |
48227150 | 1571 | |
a05924f9 JH |
1572 | /* If either operand is not a stack register, then the dest |
1573 | must be top of stack. */ | |
48227150 | 1574 | |
a05924f9 | 1575 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) |
eca31501 | 1576 | emit_swap_insn (insn, regstack, *dest); |
a05924f9 JH |
1577 | else |
1578 | { | |
1579 | /* Both operands are REG. If neither operand is already | |
1580 | at the top of stack, choose to make the one that is the dest | |
1581 | the new top of stack. */ | |
48227150 | 1582 | |
a05924f9 | 1583 | int src1_hard_regnum, src2_hard_regnum; |
48227150 | 1584 | |
a05924f9 JH |
1585 | src1_hard_regnum = get_hard_regnum (regstack, *src1); |
1586 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
41374e13 NS |
1587 | gcc_assert (src1_hard_regnum != -1); |
1588 | gcc_assert (src2_hard_regnum != -1); | |
48227150 | 1589 | |
a05924f9 JH |
1590 | if (src1_hard_regnum != FIRST_STACK_REG |
1591 | && src2_hard_regnum != FIRST_STACK_REG) | |
1592 | emit_swap_insn (insn, regstack, *dest); | |
48227150 | 1593 | } |
a05924f9 JH |
1594 | |
1595 | if (STACK_REG_P (*src1)) | |
1596 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1597 | if (STACK_REG_P (*src2)) | |
1598 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
1599 | ||
1600 | if (src1_note) | |
48227150 | 1601 | { |
a05924f9 | 1602 | rtx src1_reg = XEXP (src1_note, 0); |
48227150 | 1603 | |
a05924f9 JH |
1604 | /* If the register that dies is at the top of stack, then |
1605 | the destination is somewhere else - merely substitute it. | |
1606 | But if the reg that dies is not at top of stack, then | |
1607 | move the top of stack to the dead reg, as though we had | |
1608 | done the insn and then a store-with-pop. */ | |
48227150 | 1609 | |
a05924f9 JH |
1610 | if (REGNO (src1_reg) == regstack->reg[regstack->top]) |
1611 | { | |
1612 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1613 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1614 | } | |
1615 | else | |
1616 | { | |
1617 | int regno = get_hard_regnum (regstack, src1_reg); | |
48227150 | 1618 | |
a05924f9 JH |
1619 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1620 | replace_reg (dest, regno); | |
1621 | ||
1622 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1623 | = regstack->reg[regstack->top]; | |
1624 | } | |
1625 | ||
1626 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1627 | REGNO (XEXP (src1_note, 0))); | |
1628 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1629 | regstack->top--; | |
1630 | } | |
1631 | else if (src2_note) | |
48227150 | 1632 | { |
a05924f9 JH |
1633 | rtx src2_reg = XEXP (src2_note, 0); |
1634 | if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
1635 | { | |
1636 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1637 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1638 | } | |
1639 | else | |
1640 | { | |
1641 | int regno = get_hard_regnum (regstack, src2_reg); | |
1642 | ||
1643 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1644 | replace_reg (dest, regno); | |
1645 | ||
1646 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1647 | = regstack->reg[regstack->top]; | |
1648 | } | |
1649 | ||
1650 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1651 | REGNO (XEXP (src2_note, 0))); | |
1652 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
1653 | regstack->top--; | |
48227150 JVA |
1654 | } |
1655 | else | |
1656 | { | |
48227150 | 1657 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
a05924f9 | 1658 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
48227150 | 1659 | } |
caa6ec8d | 1660 | |
d55d8fc7 | 1661 | /* Keep operand 1 matching with destination. */ |
ec8e098d | 1662 | if (COMMUTATIVE_ARITH_P (pat_src) |
caa6ec8d JH |
1663 | && REG_P (*src1) && REG_P (*src2) |
1664 | && REGNO (*src1) != REGNO (*dest)) | |
1665 | { | |
0b9aaeee JH |
1666 | int tmp = REGNO (*src1); |
1667 | replace_reg (src1, REGNO (*src2)); | |
1668 | replace_reg (src2, tmp); | |
caa6ec8d | 1669 | } |
a05924f9 | 1670 | break; |
48227150 | 1671 | |
a05924f9 JH |
1672 | case UNSPEC: |
1673 | switch (XINT (pat_src, 1)) | |
1674 | { | |
35a76aac RH |
1675 | case UNSPEC_SIN: |
1676 | case UNSPEC_COS: | |
9d5b9dae RS |
1677 | case UNSPEC_FRNDINT: |
1678 | case UNSPEC_F2XM1: | |
edeacc14 UB |
1679 | |
1680 | case UNSPEC_FRNDINT_FLOOR: | |
1681 | case UNSPEC_FRNDINT_CEIL: | |
1682 | case UNSPEC_FRNDINT_TRUNC: | |
1683 | case UNSPEC_FRNDINT_MASK_PM: | |
1684 | ||
a05924f9 | 1685 | /* These insns only operate on the top of the stack. */ |
0e7d0eb9 | 1686 | |
a05924f9 | 1687 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
0e7d0eb9 | 1688 | |
a05924f9 | 1689 | emit_swap_insn (insn, regstack, *src1); |
0e7d0eb9 | 1690 | |
6862f97f UB |
1691 | /* Input should never die, it is |
1692 | replaced with output. */ | |
a05924f9 | 1693 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
41374e13 | 1694 | gcc_assert (!src1_note); |
0e7d0eb9 | 1695 | |
a05924f9 JH |
1696 | if (STACK_REG_P (*dest)) |
1697 | replace_reg (dest, FIRST_STACK_REG); | |
0e7d0eb9 | 1698 | |
a05924f9 JH |
1699 | replace_reg (src1, FIRST_STACK_REG); |
1700 | break; | |
0e7d0eb9 | 1701 | |
1fb54135 | 1702 | case UNSPEC_FPATAN: |
358997e2 | 1703 | case UNSPEC_FYL2X: |
c2fcfa4f | 1704 | case UNSPEC_FYL2XP1: |
1fb54135 RS |
1705 | /* These insns operate on the top two stack slots. */ |
1706 | ||
1707 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1708 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1709 | ||
1710 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1711 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1712 | ||
f964bd29 | 1713 | swap_to_top (insn, regstack, *src1, *src2); |
1fb54135 RS |
1714 | |
1715 | replace_reg (src1, FIRST_STACK_REG); | |
1716 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1717 | ||
1718 | if (src1_note) | |
1719 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1720 | if (src2_note) | |
1721 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
1722 | ||
1723 | /* Pop both input operands from the stack. */ | |
1724 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1725 | regstack->reg[regstack->top]); | |
1726 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1727 | regstack->reg[regstack->top - 1]); | |
1728 | regstack->top -= 2; | |
1729 | ||
1730 | /* Push the result back onto the stack. */ | |
1731 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1732 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1733 | replace_reg (dest, FIRST_STACK_REG); | |
1734 | break; | |
1735 | ||
f964bd29 | 1736 | case UNSPEC_FSCALE_FRACT: |
5ae27cfa UB |
1737 | case UNSPEC_FPREM_F: |
1738 | case UNSPEC_FPREM1_F: | |
f964bd29 UB |
1739 | /* These insns operate on the top two stack slots. |
1740 | first part of double input, double output insn. */ | |
1741 | ||
1742 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1743 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1744 | ||
1745 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1746 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1747 | ||
1748 | /* Inputs should never die, they are | |
1749 | replaced with outputs. */ | |
41374e13 NS |
1750 | gcc_assert (!src1_note); |
1751 | gcc_assert (!src2_note); | |
f964bd29 UB |
1752 | |
1753 | swap_to_top (insn, regstack, *src1, *src2); | |
1754 | ||
1755 | /* Push the result back onto stack. Empty stack slot | |
9cf737f8 | 1756 | will be filled in second part of insn. */ |
f964bd29 UB |
1757 | if (STACK_REG_P (*dest)) { |
1758 | regstack->reg[regstack->top] = REGNO (*dest); | |
1759 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1760 | replace_reg (dest, FIRST_STACK_REG); | |
1761 | } | |
1762 | ||
1763 | replace_reg (src1, FIRST_STACK_REG); | |
1764 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1765 | break; | |
1766 | ||
1767 | case UNSPEC_FSCALE_EXP: | |
5ae27cfa UB |
1768 | case UNSPEC_FPREM_U: |
1769 | case UNSPEC_FPREM1_U: | |
f964bd29 UB |
1770 | /* These insns operate on the top two stack slots./ |
1771 | second part of double input, double output insn. */ | |
1772 | ||
1773 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1774 | src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
1775 | ||
1776 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1777 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1778 | ||
1779 | /* Inputs should never die, they are | |
1780 | replaced with outputs. */ | |
41374e13 NS |
1781 | gcc_assert (!src1_note); |
1782 | gcc_assert (!src2_note); | |
f964bd29 UB |
1783 | |
1784 | swap_to_top (insn, regstack, *src1, *src2); | |
1785 | ||
1786 | /* Push the result back onto stack. Fill empty slot from | |
1787 | first part of insn and fix top of stack pointer. */ | |
1788 | if (STACK_REG_P (*dest)) { | |
1789 | regstack->reg[regstack->top - 1] = REGNO (*dest); | |
1790 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1791 | replace_reg (dest, FIRST_STACK_REG + 1); | |
1792 | } | |
1793 | ||
1794 | replace_reg (src1, FIRST_STACK_REG); | |
1795 | replace_reg (src2, FIRST_STACK_REG + 1); | |
1796 | break; | |
1797 | ||
6c7cf1f0 | 1798 | case UNSPEC_SINCOS_COS: |
a072d43b | 1799 | case UNSPEC_TAN_ONE: |
88b28a31 | 1800 | case UNSPEC_XTRACT_FRACT: |
6c7cf1f0 UB |
1801 | /* These insns operate on the top two stack slots, |
1802 | first part of one input, double output insn. */ | |
1803 | ||
1804 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
1805 | ||
1806 | emit_swap_insn (insn, regstack, *src1); | |
1807 | ||
6862f97f UB |
1808 | /* Input should never die, it is |
1809 | replaced with output. */ | |
6c7cf1f0 | 1810 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
41374e13 | 1811 | gcc_assert (!src1_note); |
6c7cf1f0 UB |
1812 | |
1813 | /* Push the result back onto stack. Empty stack slot | |
9cf737f8 | 1814 | will be filled in second part of insn. */ |
6c7cf1f0 UB |
1815 | if (STACK_REG_P (*dest)) { |
1816 | regstack->reg[regstack->top + 1] = REGNO (*dest); | |
1817 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1818 | replace_reg (dest, FIRST_STACK_REG); | |
1819 | } | |
1820 | ||
6c7cf1f0 UB |
1821 | replace_reg (src1, FIRST_STACK_REG); |
1822 | break; | |
1823 | ||
1824 | case UNSPEC_SINCOS_SIN: | |
a072d43b | 1825 | case UNSPEC_TAN_TAN: |
88b28a31 | 1826 | case UNSPEC_XTRACT_EXP: |
a072d43b UB |
1827 | /* These insns operate on the top two stack slots, |
1828 | second part of one input, double output insn. */ | |
1829 | ||
6c7cf1f0 UB |
1830 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
1831 | ||
1832 | emit_swap_insn (insn, regstack, *src1); | |
1833 | ||
6862f97f UB |
1834 | /* Input should never die, it is |
1835 | replaced with output. */ | |
6c7cf1f0 | 1836 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
41374e13 | 1837 | gcc_assert (!src1_note); |
6c7cf1f0 UB |
1838 | |
1839 | /* Push the result back onto stack. Fill empty slot from | |
1840 | first part of insn and fix top of stack pointer. */ | |
1841 | if (STACK_REG_P (*dest)) { | |
1842 | regstack->reg[regstack->top] = REGNO (*dest); | |
1843 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1844 | replace_reg (dest, FIRST_STACK_REG + 1); | |
1845 | ||
1846 | regstack->top++; | |
1847 | } | |
1848 | ||
6c7cf1f0 UB |
1849 | replace_reg (src1, FIRST_STACK_REG); |
1850 | break; | |
1851 | ||
35a76aac RH |
1852 | case UNSPEC_SAHF: |
1853 | /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) | |
1854 | The combination matches the PPRO fcomi instruction. */ | |
0e7d0eb9 | 1855 | |
a05924f9 | 1856 | pat_src = XVECEXP (pat_src, 0, 0); |
41374e13 NS |
1857 | gcc_assert (GET_CODE (pat_src) == UNSPEC); |
1858 | gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); | |
5d3cc252 | 1859 | /* Fall through. */ |
e075ae69 | 1860 | |
35a76aac | 1861 | case UNSPEC_FNSTSW: |
a05924f9 JH |
1862 | /* Combined fcomp+fnstsw generated for doing well with |
1863 | CSE. When optimizing this would have been broken | |
1864 | up before now. */ | |
e075ae69 | 1865 | |
a05924f9 | 1866 | pat_src = XVECEXP (pat_src, 0, 0); |
41374e13 | 1867 | gcc_assert (GET_CODE (pat_src) == COMPARE); |
e075ae69 | 1868 | |
a05924f9 JH |
1869 | compare_for_stack_reg (insn, regstack, pat_src); |
1870 | break; | |
e075ae69 | 1871 | |
a05924f9 | 1872 | default: |
41374e13 | 1873 | gcc_unreachable (); |
a05924f9 | 1874 | } |
e075ae69 RH |
1875 | break; |
1876 | ||
a05924f9 | 1877 | case IF_THEN_ELSE: |
dc297297 | 1878 | /* This insn requires the top of stack to be the destination. */ |
0e7d0eb9 | 1879 | |
2ab0437e JH |
1880 | src1 = get_true_reg (&XEXP (pat_src, 1)); |
1881 | src2 = get_true_reg (&XEXP (pat_src, 2)); | |
1882 | ||
1883 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1884 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1885 | ||
a05924f9 JH |
1886 | /* If the comparison operator is an FP comparison operator, |
1887 | it is handled correctly by compare_for_stack_reg () who | |
1888 | will move the destination to the top of stack. But if the | |
1889 | comparison operator is not an FP comparison operator, we | |
dc297297 | 1890 | have to handle it here. */ |
a05924f9 JH |
1891 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG |
1892 | && REGNO (*dest) != regstack->reg[regstack->top]) | |
2ab0437e JH |
1893 | { |
1894 | /* In case one of operands is the top of stack and the operands | |
35a76aac RH |
1895 | dies, it is safe to make it the destination operand by |
1896 | reversing the direction of cmove and avoid fxch. */ | |
2ab0437e JH |
1897 | if ((REGNO (*src1) == regstack->reg[regstack->top] |
1898 | && src1_note) | |
1899 | || (REGNO (*src2) == regstack->reg[regstack->top] | |
1900 | && src2_note)) | |
1901 | { | |
b74cf1ce JH |
1902 | int idx1 = (get_hard_regnum (regstack, *src1) |
1903 | - FIRST_STACK_REG); | |
1904 | int idx2 = (get_hard_regnum (regstack, *src2) | |
1905 | - FIRST_STACK_REG); | |
1906 | ||
1907 | /* Make reg-stack believe that the operands are already | |
1908 | swapped on the stack */ | |
1909 | regstack->reg[regstack->top - idx1] = REGNO (*src2); | |
1910 | regstack->reg[regstack->top - idx2] = REGNO (*src1); | |
1911 | ||
1912 | /* Reverse condition to compensate the operand swap. | |
1913 | i386 do have comparison always reversible. */ | |
2ab0437e JH |
1914 | PUT_CODE (XEXP (pat_src, 0), |
1915 | reversed_comparison_code (XEXP (pat_src, 0), insn)); | |
1916 | } | |
1917 | else | |
a6a2274a | 1918 | emit_swap_insn (insn, regstack, *dest); |
2ab0437e | 1919 | } |
4e97601f | 1920 | |
a05924f9 JH |
1921 | { |
1922 | rtx src_note [3]; | |
1923 | int i; | |
4e97601f | 1924 | |
a05924f9 JH |
1925 | src_note[0] = 0; |
1926 | src_note[1] = src1_note; | |
1927 | src_note[2] = src2_note; | |
54552651 | 1928 | |
a05924f9 JH |
1929 | if (STACK_REG_P (*src1)) |
1930 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1931 | if (STACK_REG_P (*src2)) | |
1932 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
4e97601f | 1933 | |
a05924f9 JH |
1934 | for (i = 1; i <= 2; i++) |
1935 | if (src_note [i]) | |
4e97601f | 1936 | { |
a05924f9 JH |
1937 | int regno = REGNO (XEXP (src_note[i], 0)); |
1938 | ||
1939 | /* If the register that dies is not at the top of | |
41374e13 NS |
1940 | stack, then move the top of stack to the dead reg. |
1941 | Top of stack should never die, as it is the | |
1942 | destination. */ | |
1943 | gcc_assert (regno != regstack->reg[regstack->top]); | |
1944 | remove_regno_note (insn, REG_DEAD, regno); | |
1945 | emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
1946 | EMIT_AFTER); | |
4e97601f | 1947 | } |
a05924f9 | 1948 | } |
4e97601f | 1949 | |
a05924f9 | 1950 | /* Make dest the top of stack. Add dest to regstack if |
dc297297 | 1951 | not present. */ |
a05924f9 | 1952 | if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) |
a6a2274a | 1953 | regstack->reg[++regstack->top] = REGNO (*dest); |
a05924f9 JH |
1954 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1955 | replace_reg (dest, FIRST_STACK_REG); | |
1956 | break; | |
914ec131 | 1957 | |
a05924f9 | 1958 | default: |
41374e13 | 1959 | gcc_unreachable (); |
a05924f9 | 1960 | } |
4e97601f | 1961 | break; |
48227150 | 1962 | } |
a05924f9 JH |
1963 | |
1964 | default: | |
1965 | break; | |
1966 | } | |
ecb63641 EB |
1967 | |
1968 | return control_flow_insn_deleted; | |
48227150 JVA |
1969 | } |
1970 | \f | |
114cbee6 RS |
1971 | /* Substitute hard regnums for any stack regs in INSN, which has |
1972 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
f62a15e3 | 1973 | before the insn, and is updated with changes made here. |
114cbee6 RS |
1974 | |
1975 | There are several requirements and assumptions about the use of | |
1976 | stack-like regs in asm statements. These rules are enforced by | |
1977 | record_asm_stack_regs; see comments there for details. Any | |
1978 | asm_operands left in the RTL at this point may be assume to meet the | |
561cf7b1 | 1979 | requirements, since record_asm_stack_regs removes any problem asm. */ |
114cbee6 | 1980 | |
561cf7b1 | 1981 | static void |
0c20a65f | 1982 | subst_asm_stack_regs (rtx insn, stack regstack) |
114cbee6 | 1983 | { |
114cbee6 | 1984 | rtx body = PATTERN (insn); |
f62a15e3 | 1985 | int alt; |
114cbee6 RS |
1986 | |
1987 | rtx *note_reg; /* Array of note contents */ | |
1988 | rtx **note_loc; /* Address of REG field of each note */ | |
1989 | enum reg_note *note_kind; /* The type of each note */ | |
1990 | ||
a544cfd2 KG |
1991 | rtx *clobber_reg = 0; |
1992 | rtx **clobber_loc = 0; | |
114cbee6 RS |
1993 | |
1994 | struct stack_def temp_stack; | |
1995 | int n_notes; | |
1996 | int n_clobbers; | |
1997 | rtx note; | |
1998 | int i; | |
f62a15e3 | 1999 | int n_inputs, n_outputs; |
114cbee6 | 2000 | |
a05924f9 JH |
2001 | if (! check_asm_stack_operands (insn)) |
2002 | return; | |
2003 | ||
114cbee6 RS |
2004 | /* Find out what the constraints required. If no constraint |
2005 | alternative matches, that is a compiler bug: we should have caught | |
a05924f9 | 2006 | such an insn in check_asm_stack_operands. */ |
f62a15e3 BS |
2007 | extract_insn (insn); |
2008 | constrain_operands (1); | |
2009 | alt = which_alternative; | |
2010 | ||
2011 | preprocess_constraints (); | |
114cbee6 | 2012 | |
f62a15e3 | 2013 | n_inputs = get_asm_operand_n_inputs (body); |
1ccbefce | 2014 | n_outputs = recog_data.n_operands - n_inputs; |
a6a2274a | 2015 | |
41374e13 | 2016 | gcc_assert (alt >= 0); |
114cbee6 | 2017 | |
0f41302f | 2018 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
2019 | for (i = 0; i < recog_data.n_operands; i++) |
2020 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
f8cfc6aa | 2021 | && REG_P (SUBREG_REG (recog_data.operand[i]))) |
114cbee6 | 2022 | { |
1ccbefce RH |
2023 | recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); |
2024 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
114cbee6 RS |
2025 | } |
2026 | ||
2027 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
2028 | ||
2029 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2030 | i++; | |
2031 | ||
703ad42b KG |
2032 | note_reg = alloca (i * sizeof (rtx)); |
2033 | note_loc = alloca (i * sizeof (rtx *)); | |
2034 | note_kind = alloca (i * sizeof (enum reg_note)); | |
114cbee6 RS |
2035 | |
2036 | n_notes = 0; | |
2037 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2038 | { | |
2039 | rtx reg = XEXP (note, 0); | |
2040 | rtx *loc = & XEXP (note, 0); | |
2041 | ||
f8cfc6aa | 2042 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
114cbee6 RS |
2043 | { |
2044 | loc = & SUBREG_REG (reg); | |
2045 | reg = SUBREG_REG (reg); | |
2046 | } | |
2047 | ||
2048 | if (STACK_REG_P (reg) | |
2049 | && (REG_NOTE_KIND (note) == REG_DEAD | |
2050 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
2051 | { | |
2052 | note_reg[n_notes] = reg; | |
2053 | note_loc[n_notes] = loc; | |
2054 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
2055 | n_notes++; | |
2056 | } | |
2057 | } | |
2058 | ||
2059 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
2060 | ||
2061 | n_clobbers = 0; | |
114cbee6 RS |
2062 | |
2063 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 2064 | { |
703ad42b KG |
2065 | clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); |
2066 | clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
114cbee6 | 2067 | |
3f5cfed6 JVA |
2068 | for (i = 0; i < XVECLEN (body, 0); i++) |
2069 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
2070 | { | |
2071 | rtx clobber = XVECEXP (body, 0, i); | |
2072 | rtx reg = XEXP (clobber, 0); | |
2073 | rtx *loc = & XEXP (clobber, 0); | |
114cbee6 | 2074 | |
f8cfc6aa | 2075 | if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) |
3f5cfed6 JVA |
2076 | { |
2077 | loc = & SUBREG_REG (reg); | |
2078 | reg = SUBREG_REG (reg); | |
2079 | } | |
2080 | ||
2081 | if (STACK_REG_P (reg)) | |
2082 | { | |
2083 | clobber_reg[n_clobbers] = reg; | |
2084 | clobber_loc[n_clobbers] = loc; | |
2085 | n_clobbers++; | |
2086 | } | |
2087 | } | |
2088 | } | |
114cbee6 | 2089 | |
a05924f9 | 2090 | temp_stack = *regstack; |
114cbee6 RS |
2091 | |
2092 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
2093 | ||
f62a15e3 | 2094 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2095 | if (STACK_REG_P (recog_data.operand[i]) |
e3a64162 | 2096 | && reg_class_subset_p (recog_op_alt[i][alt].cl, |
f62a15e3 | 2097 | FLOAT_REGS) |
e3a64162 | 2098 | && recog_op_alt[i][alt].cl != FLOAT_REGS) |
114cbee6 RS |
2099 | { |
2100 | /* If an operand needs to be in a particular reg in | |
2101 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
1ccbefce RH |
2102 | these constraints are for single register classes, and |
2103 | reload guaranteed that operand[i] is already in that class, | |
2104 | we can just use REGNO (recog_data.operand[i]) to know which | |
2105 | actual reg this operand needs to be in. */ | |
114cbee6 | 2106 | |
1ccbefce | 2107 | int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); |
114cbee6 | 2108 | |
41374e13 | 2109 | gcc_assert (regno >= 0); |
114cbee6 | 2110 | |
ae0ed63a | 2111 | if ((unsigned int) regno != REGNO (recog_data.operand[i])) |
114cbee6 | 2112 | { |
1ccbefce RH |
2113 | /* recog_data.operand[i] is not in the right place. Find |
2114 | it and swap it with whatever is already in I's place. | |
2115 | K is where recog_data.operand[i] is now. J is where it | |
2116 | should be. */ | |
114cbee6 RS |
2117 | int j, k, temp; |
2118 | ||
2119 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
2120 | j = (temp_stack.top | |
1ccbefce | 2121 | - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); |
114cbee6 RS |
2122 | |
2123 | temp = temp_stack.reg[k]; | |
2124 | temp_stack.reg[k] = temp_stack.reg[j]; | |
2125 | temp_stack.reg[j] = temp; | |
2126 | } | |
2127 | } | |
2128 | ||
a05924f9 | 2129 | /* Emit insns before INSN to make sure the reg-stack is in the right |
114cbee6 RS |
2130 | order. */ |
2131 | ||
a05924f9 | 2132 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); |
114cbee6 RS |
2133 | |
2134 | /* Make the needed input register substitutions. Do death notes and | |
0f41302f | 2135 | clobbers too, because these are for inputs, not outputs. */ |
114cbee6 | 2136 | |
f62a15e3 | 2137 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2138 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 | 2139 | { |
1ccbefce | 2140 | int regnum = get_hard_regnum (regstack, recog_data.operand[i]); |
114cbee6 | 2141 | |
41374e13 | 2142 | gcc_assert (regnum >= 0); |
114cbee6 | 2143 | |
1ccbefce | 2144 | replace_reg (recog_data.operand_loc[i], regnum); |
114cbee6 RS |
2145 | } |
2146 | ||
2147 | for (i = 0; i < n_notes; i++) | |
2148 | if (note_kind[i] == REG_DEAD) | |
2149 | { | |
2150 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
2151 | ||
41374e13 | 2152 | gcc_assert (regnum >= 0); |
114cbee6 RS |
2153 | |
2154 | replace_reg (note_loc[i], regnum); | |
2155 | } | |
2156 | ||
2157 | for (i = 0; i < n_clobbers; i++) | |
2158 | { | |
2159 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
2160 | Don't try to replace it in that case. */ | |
2161 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
2162 | ||
2163 | if (regnum >= 0) | |
2164 | { | |
2165 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
41374e13 | 2166 | that these regs can't be MODE_INT and will assert. Just put |
114cbee6 RS |
2167 | the right reg there without calling replace_reg. */ |
2168 | ||
99a59310 | 2169 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
114cbee6 RS |
2170 | } |
2171 | } | |
2172 | ||
0f41302f | 2173 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
114cbee6 | 2174 | |
f62a15e3 | 2175 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2176 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2177 | { |
2178 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 2179 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
2180 | int j; |
2181 | ||
2182 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 2183 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
2184 | break; |
2185 | ||
f62a15e3 | 2186 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
114cbee6 | 2187 | { |
1ccbefce RH |
2188 | /* recog_data.operand[i] might not be at the top of stack. |
2189 | But that's OK, because all we need to do is pop the | |
2190 | right number of regs off of the top of the reg-stack. | |
2191 | record_asm_stack_regs guaranteed that all implicitly | |
2192 | popped regs were grouped at the top of the reg-stack. */ | |
114cbee6 RS |
2193 | |
2194 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2195 | regstack->reg[regstack->top]); | |
2196 | regstack->top--; | |
2197 | } | |
2198 | } | |
2199 | ||
2200 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2201 | Note that there isn't any need to substitute register numbers. | |
0f41302f | 2202 | ??? Explain why this is true. */ |
114cbee6 RS |
2203 | |
2204 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2205 | { | |
2206 | /* See if there is an output for this hard reg. */ | |
2207 | int j; | |
2208 | ||
2209 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 2210 | if (STACK_REG_P (recog_data.operand[j]) |
ae0ed63a | 2211 | && REGNO (recog_data.operand[j]) == (unsigned) i) |
114cbee6 RS |
2212 | { |
2213 | regstack->reg[++regstack->top] = i; | |
2214 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2215 | break; | |
2216 | } | |
2217 | } | |
2218 | ||
2219 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2220 | input that the asm didn't implicitly pop. If the asm didn't | |
3f5cfed6 | 2221 | implicitly pop an input reg, that reg will still be live. |
114cbee6 RS |
2222 | |
2223 | Note that we can't use find_regno_note here: the register numbers | |
2224 | in the death notes have already been substituted. */ | |
2225 | ||
3f5cfed6 | 2226 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 2227 | if (STACK_REG_P (recog_data.operand[i])) |
3f5cfed6 JVA |
2228 | { |
2229 | int j; | |
2230 | ||
2231 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2232 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 JVA |
2233 | && note_kind[j] == REG_UNUSED) |
2234 | { | |
1ccbefce | 2235 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2236 | EMIT_AFTER); |
3f5cfed6 JVA |
2237 | break; |
2238 | } | |
2239 | } | |
2240 | ||
f62a15e3 | 2241 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2242 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2243 | { |
2244 | int j; | |
2245 | ||
2246 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2247 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 | 2248 | && note_kind[j] == REG_DEAD |
f62a15e3 | 2249 | && TEST_HARD_REG_BIT (regstack->reg_set, |
1ccbefce | 2250 | REGNO (recog_data.operand[i]))) |
114cbee6 | 2251 | { |
1ccbefce | 2252 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2253 | EMIT_AFTER); |
114cbee6 RS |
2254 | break; |
2255 | } | |
2256 | } | |
2257 | } | |
2258 | \f | |
48227150 JVA |
2259 | /* Substitute stack hard reg numbers for stack virtual registers in |
2260 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2261 | current stack content. Insns may be emitted as needed to arrange the | |
ecb63641 EB |
2262 | stack for the 387 based on the contents of the insn. Return whether |
2263 | a control flow insn was deleted in the process. */ | |
f37eb5cb | 2264 | |
ecb63641 | 2265 | static bool |
0c20a65f | 2266 | subst_stack_regs (rtx insn, stack regstack) |
48227150 | 2267 | { |
b3694847 | 2268 | rtx *note_link, note; |
ecb63641 | 2269 | bool control_flow_insn_deleted = false; |
b3694847 | 2270 | int i; |
48227150 | 2271 | |
4b4bf941 | 2272 | if (CALL_P (insn)) |
e075ae69 RH |
2273 | { |
2274 | int top = regstack->top; | |
48227150 | 2275 | |
e075ae69 RH |
2276 | /* If there are any floating point parameters to be passed in |
2277 | registers for this call, make sure they are in the right | |
2278 | order. */ | |
48227150 | 2279 | |
e075ae69 RH |
2280 | if (top >= 0) |
2281 | { | |
2282 | straighten_stack (PREV_INSN (insn), regstack); | |
99a59310 | 2283 | |
e075ae69 | 2284 | /* Now mark the arguments as dead after the call. */ |
99a59310 | 2285 | |
e075ae69 RH |
2286 | while (regstack->top >= 0) |
2287 | { | |
2288 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
2289 | regstack->top--; | |
2290 | } | |
2291 | } | |
2292 | } | |
48227150 JVA |
2293 | |
2294 | /* Do the actual substitution if any stack regs are mentioned. | |
2295 | Since we only record whether entire insn mentions stack regs, and | |
2296 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2297 | we must check each pattern in a parallel here. A call_value_pop could | |
0f41302f | 2298 | fail otherwise. */ |
48227150 | 2299 | |
21b2cd73 | 2300 | if (stack_regs_mentioned (insn)) |
48227150 | 2301 | { |
f62a15e3 | 2302 | int n_operands = asm_noperands (PATTERN (insn)); |
114cbee6 RS |
2303 | if (n_operands >= 0) |
2304 | { | |
2305 | /* This insn is an `asm' with operands. Decode the operands, | |
2306 | decide how many are inputs, and do register substitution. | |
0f41302f | 2307 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
114cbee6 | 2308 | |
f62a15e3 | 2309 | subst_asm_stack_regs (insn, regstack); |
ecb63641 | 2310 | return control_flow_insn_deleted; |
114cbee6 RS |
2311 | } |
2312 | ||
48227150 | 2313 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
c166a311 | 2314 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
48227150 JVA |
2315 | { |
2316 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
736b64dd JH |
2317 | { |
2318 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
2319 | XVECEXP (PATTERN (insn), 0, i) | |
2320 | = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); | |
2321 | control_flow_insn_deleted | |
2322 | |= subst_stack_regs_pat (insn, regstack, | |
2323 | XVECEXP (PATTERN (insn), 0, i)); | |
2324 | } | |
48227150 JVA |
2325 | } |
2326 | else | |
ecb63641 EB |
2327 | control_flow_insn_deleted |
2328 | |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
48227150 JVA |
2329 | } |
2330 | ||
2331 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
0f41302f | 2332 | REG_UNUSED will already have been dealt with, so just return. */ |
48227150 | 2333 | |
4b4bf941 | 2334 | if (NOTE_P (insn) || INSN_DELETED_P (insn)) |
ecb63641 | 2335 | return control_flow_insn_deleted; |
48227150 JVA |
2336 | |
2337 | /* If there is a REG_UNUSED note on a stack register on this insn, | |
2338 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2339 | since the form of the newly emitted pop insn references the reg, | |
0f41302f | 2340 | making it no longer `unset'. */ |
48227150 | 2341 | |
8e2e89f7 | 2342 | note_link = ®_NOTES (insn); |
48227150 JVA |
2343 | for (note = *note_link; note; note = XEXP (note, 1)) |
2344 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2345 | { | |
2346 | *note_link = XEXP (note, 1); | |
a05924f9 | 2347 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); |
48227150 JVA |
2348 | } |
2349 | else | |
2350 | note_link = &XEXP (note, 1); | |
ecb63641 EB |
2351 | |
2352 | return control_flow_insn_deleted; | |
48227150 JVA |
2353 | } |
2354 | \f | |
2355 | /* Change the organization of the stack so that it fits a new basic | |
2356 | block. Some registers might have to be popped, but there can never be | |
2357 | a register live in the new block that is not now live. | |
2358 | ||
a05924f9 JH |
2359 | Insert any needed insns before or after INSN, as indicated by |
2360 | WHERE. OLD is the original stack layout, and NEW is the desired | |
454ff5cb | 2361 | form. OLD is updated to reflect the code emitted, i.e., it will be |
a05924f9 | 2362 | the same as NEW upon return. |
48227150 JVA |
2363 | |
2364 | This function will not preserve block_end[]. But that information | |
0f41302f | 2365 | is no longer needed once this has executed. */ |
48227150 JVA |
2366 | |
2367 | static void | |
0c20a65f | 2368 | change_stack (rtx insn, stack old, stack new, enum emit_where where) |
48227150 JVA |
2369 | { |
2370 | int reg; | |
a05924f9 | 2371 | int update_end = 0; |
48227150 | 2372 | |
a05924f9 JH |
2373 | /* We will be inserting new insns "backwards". If we are to insert |
2374 | after INSN, find the next insn, and insert before it. */ | |
48227150 | 2375 | |
a05924f9 JH |
2376 | if (where == EMIT_AFTER) |
2377 | { | |
a813c111 | 2378 | if (current_block && BB_END (current_block) == insn) |
a05924f9 JH |
2379 | update_end = 1; |
2380 | insn = NEXT_INSN (insn); | |
2381 | } | |
48227150 | 2382 | |
0f41302f | 2383 | /* Pop any registers that are not needed in the new block. */ |
48227150 | 2384 | |
0cc5dec1 RS |
2385 | /* If the destination block's stack already has a specified layout |
2386 | and contains two or more registers, use a more intelligent algorithm | |
2387 | to pop registers that minimizes the number number of fxchs below. */ | |
2388 | if (new->top > 0) | |
2389 | { | |
2390 | bool slots[REG_STACK_SIZE]; | |
2391 | int pops[REG_STACK_SIZE]; | |
00fc055e | 2392 | int next, dest, topsrc; |
0cc5dec1 RS |
2393 | |
2394 | /* First pass to determine the free slots. */ | |
2395 | for (reg = 0; reg <= new->top; reg++) | |
2396 | slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]); | |
2397 | ||
2398 | /* Second pass to allocate preferred slots. */ | |
00fc055e | 2399 | topsrc = -1; |
0cc5dec1 RS |
2400 | for (reg = old->top; reg > new->top; reg--) |
2401 | if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
2402 | { | |
2403 | dest = -1; | |
2404 | for (next = 0; next <= new->top; next++) | |
2405 | if (!slots[next] && new->reg[next] == old->reg[reg]) | |
2406 | { | |
00fc055e RS |
2407 | /* If this is a preference for the new top of stack, record |
2408 | the fact by remembering it's old->reg in topsrc. */ | |
2409 | if (next == new->top) | |
2410 | topsrc = reg; | |
0cc5dec1 RS |
2411 | slots[next] = true; |
2412 | dest = next; | |
2413 | break; | |
2414 | } | |
2415 | pops[reg] = dest; | |
2416 | } | |
2417 | else | |
2418 | pops[reg] = reg; | |
2419 | ||
00fc055e RS |
2420 | /* Intentionally, avoid placing the top of stack in it's correct |
2421 | location, if we still need to permute the stack below and we | |
2422 | can usefully place it somewhere else. This is the case if any | |
2423 | slot is still unallocated, in which case we should place the | |
2424 | top of stack there. */ | |
2425 | if (topsrc != -1) | |
2426 | for (reg = 0; reg < new->top; reg++) | |
2427 | if (!slots[reg]) | |
2428 | { | |
2429 | pops[topsrc] = reg; | |
2430 | slots[new->top] = false; | |
2431 | slots[reg] = true; | |
2432 | break; | |
2433 | } | |
2434 | ||
0cc5dec1 | 2435 | /* Third pass allocates remaining slots and emits pop insns. */ |
00fc055e | 2436 | next = new->top; |
0cc5dec1 RS |
2437 | for (reg = old->top; reg > new->top; reg--) |
2438 | { | |
2439 | dest = pops[reg]; | |
2440 | if (dest == -1) | |
2441 | { | |
2442 | /* Find next free slot. */ | |
2443 | while (slots[next]) | |
00fc055e RS |
2444 | next--; |
2445 | dest = next--; | |
0cc5dec1 RS |
2446 | } |
2447 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), | |
2448 | EMIT_BEFORE); | |
2449 | } | |
2450 | } | |
2451 | else | |
00fc055e RS |
2452 | { |
2453 | /* The following loop attempts to maximize the number of times we | |
2454 | pop the top of the stack, as this permits the use of the faster | |
2455 | ffreep instruction on platforms that support it. */ | |
2456 | int live, next; | |
2457 | ||
2458 | live = 0; | |
2459 | for (reg = 0; reg <= old->top; reg++) | |
2460 | if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
2461 | live++; | |
2462 | ||
2463 | next = live; | |
2464 | while (old->top >= live) | |
2465 | if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top])) | |
2466 | { | |
2467 | while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next])) | |
2468 | next--; | |
2469 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), | |
0cc5dec1 | 2470 | EMIT_BEFORE); |
00fc055e RS |
2471 | } |
2472 | else | |
2473 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), | |
0cc5dec1 | 2474 | EMIT_BEFORE); |
00fc055e | 2475 | } |
48227150 JVA |
2476 | |
2477 | if (new->top == -2) | |
2478 | { | |
2479 | /* If the new block has never been processed, then it can inherit | |
0f41302f | 2480 | the old stack order. */ |
48227150 JVA |
2481 | |
2482 | new->top = old->top; | |
a05924f9 | 2483 | memcpy (new->reg, old->reg, sizeof (new->reg)); |
48227150 JVA |
2484 | } |
2485 | else | |
2486 | { | |
2487 | /* This block has been entered before, and we must match the | |
0f41302f | 2488 | previously selected stack order. */ |
48227150 JVA |
2489 | |
2490 | /* By now, the only difference should be the order of the stack, | |
0f41302f | 2491 | not their depth or liveliness. */ |
48227150 JVA |
2492 | |
2493 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); | |
41374e13 | 2494 | gcc_unreachable (); |
48227150 | 2495 | win: |
41374e13 | 2496 | gcc_assert (old->top == new->top); |
48227150 | 2497 | |
80832cf2 | 2498 | /* If the stack is not empty (new->top != -1), loop here emitting |
a6a2274a | 2499 | swaps until the stack is correct. |
80832cf2 HB |
2500 | |
2501 | The worst case number of swaps emitted is N + 2, where N is the | |
48227150 JVA |
2502 | depth of the stack. In some cases, the reg at the top of |
2503 | stack may be correct, but swapped anyway in order to fix | |
2504 | other regs. But since we never swap any other reg away from | |
0f41302f | 2505 | its correct slot, this algorithm will converge. */ |
48227150 | 2506 | |
80832cf2 HB |
2507 | if (new->top != -1) |
2508 | do | |
2509 | { | |
2510 | /* Swap the reg at top of stack into the position it is | |
2511 | supposed to be in, until the correct top of stack appears. */ | |
48227150 | 2512 | |
80832cf2 HB |
2513 | while (old->reg[old->top] != new->reg[new->top]) |
2514 | { | |
2515 | for (reg = new->top; reg >= 0; reg--) | |
2516 | if (new->reg[reg] == old->reg[old->top]) | |
2517 | break; | |
48227150 | 2518 | |
41374e13 | 2519 | gcc_assert (reg != -1); |
48227150 | 2520 | |
80832cf2 HB |
2521 | emit_swap_insn (insn, old, |
2522 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2523 | } | |
48227150 | 2524 | |
80832cf2 | 2525 | /* See if any regs remain incorrect. If so, bring an |
48227150 | 2526 | incorrect reg to the top of stack, and let the while loop |
0f41302f | 2527 | above fix it. */ |
48227150 | 2528 | |
80832cf2 HB |
2529 | for (reg = new->top; reg >= 0; reg--) |
2530 | if (new->reg[reg] != old->reg[reg]) | |
2531 | { | |
2532 | emit_swap_insn (insn, old, | |
2533 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2534 | break; | |
2535 | } | |
2536 | } while (reg >= 0); | |
48227150 | 2537 | |
0f41302f | 2538 | /* At this point there must be no differences. */ |
48227150 JVA |
2539 | |
2540 | for (reg = old->top; reg >= 0; reg--) | |
41374e13 | 2541 | gcc_assert (old->reg[reg] == new->reg[reg]); |
48227150 | 2542 | } |
a05924f9 JH |
2543 | |
2544 | if (update_end) | |
a813c111 | 2545 | BB_END (current_block) = PREV_INSN (insn); |
48227150 JVA |
2546 | } |
2547 | \f | |
a05924f9 | 2548 | /* Print stack configuration. */ |
48227150 JVA |
2549 | |
2550 | static void | |
0c20a65f | 2551 | print_stack (FILE *file, stack s) |
48227150 | 2552 | { |
a05924f9 JH |
2553 | if (! file) |
2554 | return; | |
48227150 | 2555 | |
a05924f9 JH |
2556 | if (s->top == -2) |
2557 | fprintf (file, "uninitialized\n"); | |
2558 | else if (s->top == -1) | |
2559 | fprintf (file, "empty\n"); | |
2560 | else | |
e075ae69 | 2561 | { |
a05924f9 JH |
2562 | int i; |
2563 | fputs ("[ ", file); | |
2564 | for (i = 0; i <= s->top; ++i) | |
2565 | fprintf (file, "%d ", s->reg[i]); | |
2566 | fputs ("]\n", file); | |
e075ae69 | 2567 | } |
a05924f9 JH |
2568 | } |
2569 | \f | |
2570 | /* This function was doing life analysis. We now let the regular live | |
a6a2274a | 2571 | code do it's job, so we only need to check some extra invariants |
a05924f9 JH |
2572 | that reg-stack expects. Primary among these being that all registers |
2573 | are initialized before use. | |
48227150 | 2574 | |
a05924f9 JH |
2575 | The function returns true when code was emitted to CFG edges and |
2576 | commit_edge_insertions needs to be called. */ | |
48227150 | 2577 | |
a05924f9 | 2578 | static int |
0c20a65f | 2579 | convert_regs_entry (void) |
a05924f9 | 2580 | { |
e0082a72 | 2581 | int inserted = 0; |
a05924f9 | 2582 | edge e; |
628f6a4e | 2583 | edge_iterator ei; |
e0082a72 | 2584 | basic_block block; |
48227150 | 2585 | |
e0082a72 | 2586 | FOR_EACH_BB_REVERSE (block) |
48227150 | 2587 | { |
a05924f9 JH |
2588 | block_info bi = BLOCK_INFO (block); |
2589 | int reg; | |
a6a2274a | 2590 | |
a05924f9 JH |
2591 | /* Set current register status at last instruction `uninitialized'. */ |
2592 | bi->stack_in.top = -2; | |
a6a2274a | 2593 | |
a05924f9 JH |
2594 | /* Copy live_at_end and live_at_start into temporaries. */ |
2595 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
48227150 | 2596 | { |
a05924f9 JH |
2597 | if (REGNO_REG_SET_P (block->global_live_at_end, reg)) |
2598 | SET_HARD_REG_BIT (bi->out_reg_set, reg); | |
2599 | if (REGNO_REG_SET_P (block->global_live_at_start, reg)) | |
2600 | SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); | |
48227150 JVA |
2601 | } |
2602 | } | |
48227150 | 2603 | |
a6a2274a | 2604 | /* Load something into each stack register live at function entry. |
a05924f9 | 2605 | Such live registers can be caused by uninitialized variables or |
a6a2274a | 2606 | functions not returning values on all paths. In order to keep |
a05924f9 | 2607 | the push/pop code happy, and to not scrog the register stack, we |
a6a2274a | 2608 | must put something in these registers. Use a QNaN. |
48227150 | 2609 | |
d55d8fc7 | 2610 | Note that we are inserting converted code here. This code is |
a05924f9 | 2611 | never seen by the convert_regs pass. */ |
48227150 | 2612 | |
628f6a4e | 2613 | FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) |
a05924f9 JH |
2614 | { |
2615 | basic_block block = e->dest; | |
2616 | block_info bi = BLOCK_INFO (block); | |
2617 | int reg, top = -1; | |
48227150 | 2618 | |
a05924f9 JH |
2619 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) |
2620 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2621 | { | |
2622 | rtx init; | |
48227150 | 2623 | |
a05924f9 | 2624 | bi->stack_in.reg[++top] = reg; |
48227150 | 2625 | |
a05924f9 JH |
2626 | init = gen_rtx_SET (VOIDmode, |
2627 | FP_MODE_REG (FIRST_STACK_REG, SFmode), | |
d2032ad8 | 2628 | not_a_num); |
a05924f9 JH |
2629 | insert_insn_on_edge (init, e); |
2630 | inserted = 1; | |
2631 | } | |
48227150 | 2632 | |
a05924f9 JH |
2633 | bi->stack_in.top = top; |
2634 | } | |
48227150 | 2635 | |
a05924f9 JH |
2636 | return inserted; |
2637 | } | |
48227150 | 2638 | |
a05924f9 JH |
2639 | /* Construct the desired stack for function exit. This will either |
2640 | be `empty', or the function return value at top-of-stack. */ | |
48227150 | 2641 | |
a05924f9 | 2642 | static void |
0c20a65f | 2643 | convert_regs_exit (void) |
a05924f9 JH |
2644 | { |
2645 | int value_reg_low, value_reg_high; | |
2646 | stack output_stack; | |
2647 | rtx retvalue; | |
48227150 | 2648 | |
a05924f9 JH |
2649 | retvalue = stack_result (current_function_decl); |
2650 | value_reg_low = value_reg_high = -1; | |
2651 | if (retvalue) | |
2652 | { | |
2653 | value_reg_low = REGNO (retvalue); | |
2654 | value_reg_high = value_reg_low | |
66fd46b6 | 2655 | + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1; |
a05924f9 | 2656 | } |
48227150 | 2657 | |
a05924f9 JH |
2658 | output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; |
2659 | if (value_reg_low == -1) | |
2660 | output_stack->top = -1; | |
2661 | else | |
2662 | { | |
2663 | int reg; | |
48227150 | 2664 | |
a05924f9 JH |
2665 | output_stack->top = value_reg_high - value_reg_low; |
2666 | for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
2667 | { | |
bc9c2952 | 2668 | output_stack->reg[value_reg_high - reg] = reg; |
a05924f9 JH |
2669 | SET_HARD_REG_BIT (output_stack->reg_set, reg); |
2670 | } | |
2671 | } | |
48227150 | 2672 | } |
48227150 | 2673 | |
0ecf09f9 JH |
2674 | /* Adjust the stack of this block on exit to match the stack of the |
2675 | target block, or copy stack info into the stack of the successor | |
2676 | of the successor hasn't been processed yet. */ | |
2677 | static bool | |
0c20a65f | 2678 | compensate_edge (edge e, FILE *file) |
0ecf09f9 JH |
2679 | { |
2680 | basic_block block = e->src, target = e->dest; | |
2681 | block_info bi = BLOCK_INFO (block); | |
2682 | struct stack_def regstack, tmpstack; | |
2683 | stack target_stack = &BLOCK_INFO (target)->stack_in; | |
2684 | int reg; | |
2685 | ||
2686 | current_block = block; | |
2687 | regstack = bi->stack_out; | |
2688 | if (file) | |
0b17ab2f | 2689 | fprintf (file, "Edge %d->%d: ", block->index, target->index); |
0ecf09f9 JH |
2690 | |
2691 | if (target_stack->top == -2) | |
2692 | { | |
2693 | /* The target block hasn't had a stack order selected. | |
2694 | We need merely ensure that no pops are needed. */ | |
2695 | for (reg = regstack.top; reg >= 0; --reg) | |
2696 | if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) | |
2697 | break; | |
2698 | ||
2699 | if (reg == -1) | |
2700 | { | |
2701 | if (file) | |
2702 | fprintf (file, "new block; copying stack position\n"); | |
2703 | ||
2704 | /* change_stack kills values in regstack. */ | |
2705 | tmpstack = regstack; | |
2706 | ||
a813c111 | 2707 | change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER); |
a6a2274a | 2708 | return false; |
0ecf09f9 JH |
2709 | } |
2710 | ||
2711 | if (file) | |
2712 | fprintf (file, "new block; pops needed\n"); | |
2713 | } | |
2714 | else | |
2715 | { | |
2716 | if (target_stack->top == regstack.top) | |
2717 | { | |
2718 | for (reg = target_stack->top; reg >= 0; --reg) | |
2719 | if (target_stack->reg[reg] != regstack.reg[reg]) | |
2720 | break; | |
2721 | ||
2722 | if (reg == -1) | |
2723 | { | |
2724 | if (file) | |
2725 | fprintf (file, "no changes needed\n"); | |
2726 | return false; | |
2727 | } | |
2728 | } | |
2729 | ||
2730 | if (file) | |
2731 | { | |
2732 | fprintf (file, "correcting stack to "); | |
2733 | print_stack (file, target_stack); | |
2734 | } | |
2735 | } | |
2736 | ||
2737 | /* Care for non-call EH edges specially. The normal return path have | |
2738 | values in registers. These will be popped en masse by the unwind | |
2739 | library. */ | |
2740 | if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) | |
2741 | target_stack->top = -1; | |
2742 | ||
2743 | /* Other calls may appear to have values live in st(0), but the | |
2744 | abnormal return path will not have actually loaded the values. */ | |
2745 | else if (e->flags & EDGE_ABNORMAL_CALL) | |
2746 | { | |
2747 | /* Assert that the lifetimes are as we expect -- one value | |
2748 | live at st(0) on the end of the source block, and no | |
2749 | values live at the beginning of the destination block. */ | |
2750 | HARD_REG_SET tmp; | |
2751 | ||
2752 | CLEAR_HARD_REG_SET (tmp); | |
2753 | GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); | |
41374e13 | 2754 | gcc_unreachable (); |
0ecf09f9 JH |
2755 | eh1: |
2756 | ||
04989d15 JH |
2757 | /* We are sure that there is st(0) live, otherwise we won't compensate. |
2758 | For complex return values, we may have st(1) live as well. */ | |
0ecf09f9 | 2759 | SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); |
04989d15 JH |
2760 | if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1)) |
2761 | SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1); | |
0ecf09f9 | 2762 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); |
41374e13 | 2763 | gcc_unreachable (); |
0ecf09f9 JH |
2764 | eh2: |
2765 | ||
2766 | target_stack->top = -1; | |
2767 | } | |
2768 | ||
2769 | /* It is better to output directly to the end of the block | |
2770 | instead of to the edge, because emit_swap can do minimal | |
2771 | insn scheduling. We can do this when there is only one | |
2772 | edge out, and it is not abnormal. */ | |
628f6a4e | 2773 | else if (EDGE_COUNT (block->succs) == 1 && !(e->flags & EDGE_ABNORMAL)) |
0ecf09f9 JH |
2774 | { |
2775 | /* change_stack kills values in regstack. */ | |
2776 | tmpstack = regstack; | |
2777 | ||
a813c111 | 2778 | change_stack (BB_END (block), &tmpstack, target_stack, |
4b4bf941 | 2779 | (JUMP_P (BB_END (block)) |
0ecf09f9 JH |
2780 | ? EMIT_BEFORE : EMIT_AFTER)); |
2781 | } | |
2782 | else | |
2783 | { | |
2784 | rtx seq, after; | |
2785 | ||
2786 | /* We don't support abnormal edges. Global takes care to | |
2787 | avoid any live register across them, so we should never | |
2788 | have to insert instructions on such edges. */ | |
41374e13 | 2789 | gcc_assert (!(e->flags & EDGE_ABNORMAL)); |
0ecf09f9 JH |
2790 | |
2791 | current_block = NULL; | |
2792 | start_sequence (); | |
2793 | ||
2f937369 | 2794 | /* ??? change_stack needs some point to emit insns after. */ |
2e040219 | 2795 | after = emit_note (NOTE_INSN_DELETED); |
0ecf09f9 JH |
2796 | |
2797 | tmpstack = regstack; | |
2798 | change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); | |
2799 | ||
2f937369 | 2800 | seq = get_insns (); |
0ecf09f9 JH |
2801 | end_sequence (); |
2802 | ||
2803 | insert_insn_on_edge (seq, e); | |
2804 | return true; | |
2805 | } | |
2806 | return false; | |
2807 | } | |
2808 | ||
a05924f9 JH |
2809 | /* Convert stack register references in one block. */ |
2810 | ||
2811 | static int | |
0c20a65f | 2812 | convert_regs_1 (FILE *file, basic_block block) |
48227150 | 2813 | { |
0ecf09f9 | 2814 | struct stack_def regstack; |
a05924f9 | 2815 | block_info bi = BLOCK_INFO (block); |
f7448d50 | 2816 | int inserted, reg; |
a05924f9 | 2817 | rtx insn, next; |
0ecf09f9 | 2818 | edge e, beste = NULL; |
ecb63641 | 2819 | bool control_flow_insn_deleted = false; |
628f6a4e | 2820 | edge_iterator ei; |
48227150 | 2821 | |
0ecf09f9 | 2822 | inserted = 0; |
d6fc0492 | 2823 | any_malformed_asm = false; |
0ecf09f9 JH |
2824 | |
2825 | /* Find the edge we will copy stack from. It should be the most frequent | |
2826 | one as it will get cheapest after compensation code is generated, | |
ff7cc307 | 2827 | if multiple such exists, take one with largest count, prefer critical |
0ecf09f9 JH |
2828 | one (as splitting critical edges is more expensive), or one with lowest |
2829 | index, to avoid random changes with different orders of the edges. */ | |
628f6a4e | 2830 | FOR_EACH_EDGE (e, ei, block->preds) |
0ecf09f9 JH |
2831 | { |
2832 | if (e->flags & EDGE_DFS_BACK) | |
2833 | ; | |
2834 | else if (! beste) | |
2835 | beste = e; | |
2836 | else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) | |
2837 | beste = e; | |
3e42ccd2 JH |
2838 | else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) |
2839 | ; | |
0ecf09f9 JH |
2840 | else if (beste->count < e->count) |
2841 | beste = e; | |
2842 | else if (beste->count > e->count) | |
2843 | ; | |
4262e623 JH |
2844 | else if ((EDGE_CRITICAL_P (e) != 0) |
2845 | != (EDGE_CRITICAL_P (beste) != 0)) | |
0ecf09f9 | 2846 | { |
4262e623 | 2847 | if (EDGE_CRITICAL_P (e)) |
0ecf09f9 JH |
2848 | beste = e; |
2849 | } | |
0b17ab2f | 2850 | else if (e->src->index < beste->src->index) |
0ecf09f9 JH |
2851 | beste = e; |
2852 | } | |
2853 | ||
b3cd99cd | 2854 | /* Initialize stack at block entry. */ |
0ecf09f9 | 2855 | if (bi->stack_in.top == -2) |
b3cd99cd EB |
2856 | { |
2857 | if (beste) | |
2858 | inserted |= compensate_edge (beste, file); | |
2859 | else | |
2860 | { | |
2861 | /* No predecessors. Create an arbitrary input stack. */ | |
2862 | int reg; | |
2863 | ||
2864 | bi->stack_in.top = -1; | |
2865 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
2866 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2867 | bi->stack_in.reg[++bi->stack_in.top] = reg; | |
2868 | } | |
2869 | } | |
0ecf09f9 | 2870 | else |
b3cd99cd | 2871 | /* Entry blocks do have stack already initialized. */ |
0ecf09f9 | 2872 | beste = NULL; |
a6a2274a | 2873 | |
0ecf09f9 JH |
2874 | current_block = block; |
2875 | ||
a05924f9 | 2876 | if (file) |
48227150 | 2877 | { |
0b17ab2f | 2878 | fprintf (file, "\nBasic block %d\nInput stack: ", block->index); |
a05924f9 JH |
2879 | print_stack (file, &bi->stack_in); |
2880 | } | |
48227150 | 2881 | |
a05924f9 JH |
2882 | /* Process all insns in this block. Keep track of NEXT so that we |
2883 | don't process insns emitted while substituting in INSN. */ | |
a813c111 | 2884 | next = BB_HEAD (block); |
a05924f9 JH |
2885 | regstack = bi->stack_in; |
2886 | do | |
2887 | { | |
2888 | insn = next; | |
2889 | next = NEXT_INSN (insn); | |
48227150 | 2890 | |
a05924f9 | 2891 | /* Ensure we have not missed a block boundary. */ |
41374e13 | 2892 | gcc_assert (next); |
a813c111 | 2893 | if (insn == BB_END (block)) |
a05924f9 JH |
2894 | next = NULL; |
2895 | ||
2896 | /* Don't bother processing unless there is a stack reg | |
2897 | mentioned or if it's a CALL_INSN. */ | |
2898 | if (stack_regs_mentioned (insn) | |
4b4bf941 | 2899 | || CALL_P (insn)) |
a05924f9 JH |
2900 | { |
2901 | if (file) | |
2902 | { | |
2903 | fprintf (file, " insn %d input stack: ", | |
2904 | INSN_UID (insn)); | |
2905 | print_stack (file, ®stack); | |
2906 | } | |
ecb63641 | 2907 | control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); |
48227150 | 2908 | } |
a05924f9 JH |
2909 | } |
2910 | while (next); | |
48227150 | 2911 | |
a05924f9 JH |
2912 | if (file) |
2913 | { | |
2914 | fprintf (file, "Expected live registers ["); | |
2915 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2916 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
2917 | fprintf (file, " %d", reg); | |
2918 | fprintf (file, " ]\nOutput stack: "); | |
2919 | print_stack (file, ®stack); | |
2920 | } | |
48227150 | 2921 | |
a813c111 | 2922 | insn = BB_END (block); |
4b4bf941 | 2923 | if (JUMP_P (insn)) |
a05924f9 JH |
2924 | insn = PREV_INSN (insn); |
2925 | ||
2926 | /* If the function is declared to return a value, but it returns one | |
2927 | in only some cases, some registers might come live here. Emit | |
2928 | necessary moves for them. */ | |
2929 | ||
2930 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2931 | { | |
2932 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
2933 | && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
48227150 | 2934 | { |
a05924f9 | 2935 | rtx set; |
48227150 | 2936 | |
a05924f9 | 2937 | if (file) |
5ad85f7d | 2938 | fprintf (file, "Emitting insn initializing reg %d\n", reg); |
48227150 | 2939 | |
5ad85f7d | 2940 | set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); |
3c030e88 | 2941 | insn = emit_insn_after (set, insn); |
ecb63641 | 2942 | control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); |
a05924f9 JH |
2943 | } |
2944 | } | |
de582cfb EB |
2945 | |
2946 | /* Amongst the insns possibly deleted during the substitution process above, | |
2947 | might have been the only trapping insn in the block. We purge the now | |
2948 | possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, | |
2949 | called at the end of convert_regs. The order in which we process the | |
2950 | blocks ensures that we never delete an already processed edge. | |
2951 | ||
ecb63641 EB |
2952 | Note that, at this point, the CFG may have been damaged by the emission |
2953 | of instructions after an abnormal call, which moves the basic block end | |
2954 | (and is the reason why we call fixup_abnormal_edges later). So we must | |
2955 | be sure that the trapping insn has been deleted before trying to purge | |
2956 | dead edges, otherwise we risk purging valid edges. | |
2957 | ||
de582cfb EB |
2958 | ??? We are normally supposed not to delete trapping insns, so we pretend |
2959 | that the insns deleted above don't actually trap. It would have been | |
2960 | better to detect this earlier and avoid creating the EH edge in the first | |
2961 | place, still, but we don't have enough information at that time. */ | |
2962 | ||
ecb63641 | 2963 | if (control_flow_insn_deleted) |
de582cfb | 2964 | purge_dead_edges (block); |
48227150 | 2965 | |
d6fc0492 RH |
2966 | /* Something failed if the stack lives don't match. If we had malformed |
2967 | asms, we zapped the instruction itself, but that didn't produce the | |
2968 | same pattern of register kills as before. */ | |
a05924f9 | 2969 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); |
41374e13 | 2970 | gcc_assert (any_malformed_asm); |
a05924f9 | 2971 | win: |
0ecf09f9 | 2972 | bi->stack_out = regstack; |
48227150 | 2973 | |
0ecf09f9 | 2974 | /* Compensate the back edges, as those wasn't visited yet. */ |
628f6a4e | 2975 | FOR_EACH_EDGE (e, ei, block->succs) |
a05924f9 | 2976 | { |
0ecf09f9 JH |
2977 | if (e->flags & EDGE_DFS_BACK |
2978 | || (e->dest == EXIT_BLOCK_PTR)) | |
a05924f9 | 2979 | { |
41374e13 NS |
2980 | gcc_assert (BLOCK_INFO (e->dest)->done |
2981 | || e->dest == block); | |
a6a2274a | 2982 | inserted |= compensate_edge (e, file); |
e075ae69 | 2983 | } |
0ecf09f9 | 2984 | } |
628f6a4e | 2985 | FOR_EACH_EDGE (e, ei, block->preds) |
0ecf09f9 JH |
2986 | { |
2987 | if (e != beste && !(e->flags & EDGE_DFS_BACK) | |
2988 | && e->src != ENTRY_BLOCK_PTR) | |
a05924f9 | 2989 | { |
41374e13 | 2990 | gcc_assert (BLOCK_INFO (e->src)->done); |
a6a2274a | 2991 | inserted |= compensate_edge (e, file); |
a05924f9 | 2992 | } |
e075ae69 | 2993 | } |
a05924f9 JH |
2994 | |
2995 | return inserted; | |
48227150 | 2996 | } |
48227150 | 2997 | |
a05924f9 JH |
2998 | /* Convert registers in all blocks reachable from BLOCK. */ |
2999 | ||
3000 | static int | |
0c20a65f | 3001 | convert_regs_2 (FILE *file, basic_block block) |
48227150 | 3002 | { |
a05924f9 JH |
3003 | basic_block *stack, *sp; |
3004 | int inserted; | |
48227150 | 3005 | |
de582cfb EB |
3006 | /* We process the blocks in a top-down manner, in a way such that one block |
3007 | is only processed after all its predecessors. The number of predecessors | |
3008 | of every block has already been computed. */ | |
3009 | ||
703ad42b | 3010 | stack = xmalloc (sizeof (*stack) * n_basic_blocks); |
a05924f9 | 3011 | sp = stack; |
48227150 | 3012 | |
a05924f9 | 3013 | *sp++ = block; |
48227150 | 3014 | |
a05924f9 JH |
3015 | inserted = 0; |
3016 | do | |
3017 | { | |
3018 | edge e; | |
628f6a4e | 3019 | edge_iterator ei; |
48227150 | 3020 | |
a05924f9 | 3021 | block = *--sp; |
48227150 | 3022 | |
b3cd99cd EB |
3023 | /* Processing BLOCK is achieved by convert_regs_1, which may purge |
3024 | some dead EH outgoing edge after the deletion of the trapping | |
3025 | insn inside the block. Since the number of predecessors of | |
3026 | BLOCK's successors was computed based on the initial edge set, | |
3027 | we check the necessity to process some of these successors | |
3028 | before such an edge deletion may happen. However, there is | |
3029 | a pitfall: if BLOCK is the only predecessor of a successor and | |
3030 | the edge between them happens to be deleted, the successor | |
3031 | becomes unreachable and should not be processed. The problem | |
3032 | is that there is no way to preventively detect this case so we | |
3033 | stack the successor in all cases and hand over the task of | |
3034 | fixing up the discrepancy to convert_regs_1. */ | |
3035 | ||
628f6a4e | 3036 | FOR_EACH_EDGE (e, ei, block->succs) |
0ecf09f9 | 3037 | if (! (e->flags & EDGE_DFS_BACK)) |
a05924f9 | 3038 | { |
754d9299 JM |
3039 | BLOCK_INFO (e->dest)->predecessors--; |
3040 | if (!BLOCK_INFO (e->dest)->predecessors) | |
628f6a4e | 3041 | *sp++ = e->dest; |
a05924f9 | 3042 | } |
de582cfb EB |
3043 | |
3044 | inserted |= convert_regs_1 (file, block); | |
3045 | BLOCK_INFO (block)->done = 1; | |
48227150 | 3046 | } |
a05924f9 JH |
3047 | while (sp != stack); |
3048 | ||
3d5eef4c KH |
3049 | free (stack); |
3050 | ||
a05924f9 | 3051 | return inserted; |
48227150 | 3052 | } |
841fc5a1 | 3053 | |
a05924f9 JH |
3054 | /* Traverse all basic blocks in a function, converting the register |
3055 | references in each insn from the "flat" register file that gcc uses, | |
3056 | to the stack-like registers the 387 uses. */ | |
3057 | ||
3058 | static int | |
0c20a65f | 3059 | convert_regs (FILE *file) |
48227150 | 3060 | { |
e0082a72 ZD |
3061 | int inserted; |
3062 | basic_block b; | |
a05924f9 | 3063 | edge e; |
628f6a4e | 3064 | edge_iterator ei; |
48227150 | 3065 | |
a05924f9 JH |
3066 | /* Initialize uninitialized registers on function entry. */ |
3067 | inserted = convert_regs_entry (); | |
48227150 | 3068 | |
a05924f9 JH |
3069 | /* Construct the desired stack for function exit. */ |
3070 | convert_regs_exit (); | |
3071 | BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; | |
48227150 | 3072 | |
a05924f9 JH |
3073 | /* ??? Future: process inner loops first, and give them arbitrary |
3074 | initial stacks which emit_swap_insn can modify. This ought to | |
1ae58c30 | 3075 | prevent double fxch that often appears at the head of a loop. */ |
48227150 | 3076 | |
a05924f9 | 3077 | /* Process all blocks reachable from all entry points. */ |
628f6a4e | 3078 | FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) |
a05924f9 | 3079 | inserted |= convert_regs_2 (file, e->dest); |
a6a2274a KH |
3080 | |
3081 | /* ??? Process all unreachable blocks. Though there's no excuse | |
a05924f9 | 3082 | for keeping these even when not optimizing. */ |
e0082a72 | 3083 | FOR_EACH_BB (b) |
a05924f9 | 3084 | { |
a05924f9 | 3085 | block_info bi = BLOCK_INFO (b); |
48227150 | 3086 | |
a05924f9 | 3087 | if (! bi->done) |
b3cd99cd | 3088 | inserted |= convert_regs_2 (file, b); |
a05924f9 | 3089 | } |
9dca2ad5 | 3090 | clear_aux_for_blocks (); |
48227150 | 3091 | |
068473ec | 3092 | fixup_abnormal_edges (); |
a05924f9 JH |
3093 | if (inserted) |
3094 | commit_edge_insertions (); | |
48227150 | 3095 | |
a05924f9 JH |
3096 | if (file) |
3097 | fputc ('\n', file); | |
48227150 | 3098 | |
a05924f9 | 3099 | return inserted; |
48227150 | 3100 | } |
48227150 | 3101 | #endif /* STACK_REGS */ |
e2500fed GK |
3102 | |
3103 | #include "gt-reg-stack.h" |