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2d4749b6 1/* Copy propagation on hard registers for the GNU compiler.
d353bf18 2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
2d4749b6 3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
9ef16211 23#include "backend.h"
2d4749b6 24#include "rtl.h"
9ef16211 25#include "df.h"
2d4749b6 26#include "tm_p.h"
27#include "insn-config.h"
28#include "regs.h"
29#include "addresses.h"
94ea8568 30#include "reload.h"
2d4749b6 31#include "recog.h"
32#include "flags.h"
0b205f4c 33#include "diagnostic-core.h"
2d4749b6 34#include "tree-pass.h"
29f9ec8f 35#include "rtl-iter.h"
73bde8df 36#include "emit-rtl.h"
2d4749b6 37
38/* The following code does forward propagation of hard register copies.
39 The object is to eliminate as many dependencies as possible, so that
40 we have the most scheduling freedom. As a side effect, we also clean
41 up some silly register allocation decisions made by reload. This
42 code may be obsoleted by a new register allocator. */
43
2058ec71 44/* DEBUG_INSNs aren't changed right away, as doing so might extend the
45 lifetime of a register and get the DEBUG_INSN subsequently reset.
46 So they are queued instead, and updated only when the register is
47 used in some subsequent real insn before it is set. */
48struct queued_debug_insn_change
49{
50 struct queued_debug_insn_change *next;
0991de81 51 rtx_insn *insn;
2058ec71 52 rtx *loc;
53 rtx new_rtx;
54};
55
2d4749b6 56/* For each register, we have a list of registers that contain the same
57 value. The OLDEST_REGNO field points to the head of the list, and
58 the NEXT_REGNO field runs through the list. The MODE field indicates
59 what mode the data is known to be in; this field is VOIDmode when the
60 register is not known to contain valid data. */
61
62struct value_data_entry
63{
3754d046 64 machine_mode mode;
2d4749b6 65 unsigned int oldest_regno;
66 unsigned int next_regno;
2058ec71 67 struct queued_debug_insn_change *debug_insn_changes;
2d4749b6 68};
69
70struct value_data
71{
72 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
73 unsigned int max_value_regs;
2058ec71 74 unsigned int n_debug_insn_changes;
2d4749b6 75};
76
e16712b1 77static object_allocator<queued_debug_insn_change> queued_debug_insn_change_pool
1dc6c44d 78 ("debug insn changes pool");
fe4549c4 79
59483f68 80static bool skip_debug_insn_p;
2058ec71 81
2d4749b6 82static void kill_value_one_regno (unsigned, struct value_data *);
83static void kill_value_regno (unsigned, unsigned, struct value_data *);
29f9ec8f 84static void kill_value (const_rtx, struct value_data *);
3754d046 85static void set_value_regno (unsigned, machine_mode, struct value_data *);
2d4749b6 86static void init_value_data (struct value_data *);
87static void kill_clobbered_value (rtx, const_rtx, void *);
88static void kill_set_value (rtx, const_rtx, void *);
2d4749b6 89static void copy_value (rtx, rtx, struct value_data *);
3754d046 90static bool mode_change_ok (machine_mode, machine_mode,
2d4749b6 91 unsigned int);
3754d046 92static rtx maybe_mode_change (machine_mode, machine_mode,
93 machine_mode, unsigned int, unsigned int);
2d4749b6 94static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
0991de81 95static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
2d4749b6 96 struct value_data *);
97static bool replace_oldest_value_addr (rtx *, enum reg_class,
3754d046 98 machine_mode, addr_space_t,
0991de81 99 rtx_insn *, struct value_data *);
100static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
2d4749b6 101static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
102extern void debug_value_data (struct value_data *);
2d4749b6 103static void validate_value_data (struct value_data *);
2d4749b6 104
2058ec71 105/* Free all queued updates for DEBUG_INSNs that change some reg to
106 register REGNO. */
107
108static void
109free_debug_insn_changes (struct value_data *vd, unsigned int regno)
110{
111 struct queued_debug_insn_change *cur, *next;
112 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
113 {
114 next = cur->next;
115 --vd->n_debug_insn_changes;
e16712b1 116 queued_debug_insn_change_pool.remove (cur);
2058ec71 117 }
118 vd->e[regno].debug_insn_changes = NULL;
119}
120
2d4749b6 121/* Kill register REGNO. This involves removing it from any value
122 lists, and resetting the value mode to VOIDmode. This is only a
123 helper function; it does not handle any hard registers overlapping
124 with REGNO. */
125
126static void
127kill_value_one_regno (unsigned int regno, struct value_data *vd)
128{
129 unsigned int i, next;
130
131 if (vd->e[regno].oldest_regno != regno)
132 {
133 for (i = vd->e[regno].oldest_regno;
134 vd->e[i].next_regno != regno;
135 i = vd->e[i].next_regno)
136 continue;
137 vd->e[i].next_regno = vd->e[regno].next_regno;
138 }
139 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
140 {
141 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
142 vd->e[i].oldest_regno = next;
143 }
144
145 vd->e[regno].mode = VOIDmode;
146 vd->e[regno].oldest_regno = regno;
147 vd->e[regno].next_regno = INVALID_REGNUM;
2058ec71 148 if (vd->e[regno].debug_insn_changes)
149 free_debug_insn_changes (vd, regno);
2d4749b6 150
382ecba7 151 if (flag_checking)
152 validate_value_data (vd);
2d4749b6 153}
154
155/* Kill the value in register REGNO for NREGS, and any other registers
156 whose values overlap. */
157
158static void
159kill_value_regno (unsigned int regno, unsigned int nregs,
160 struct value_data *vd)
161{
162 unsigned int j;
163
164 /* Kill the value we're told to kill. */
165 for (j = 0; j < nregs; ++j)
166 kill_value_one_regno (regno + j, vd);
167
168 /* Kill everything that overlapped what we're told to kill. */
169 if (regno < vd->max_value_regs)
170 j = 0;
171 else
172 j = regno - vd->max_value_regs;
173 for (; j < regno; ++j)
174 {
175 unsigned int i, n;
176 if (vd->e[j].mode == VOIDmode)
177 continue;
178 n = hard_regno_nregs[j][vd->e[j].mode];
179 if (j + n > regno)
180 for (i = 0; i < n; ++i)
181 kill_value_one_regno (j + i, vd);
182 }
183}
184
185/* Kill X. This is a convenience function wrapping kill_value_regno
186 so that we mind the mode the register is in. */
187
188static void
29f9ec8f 189kill_value (const_rtx x, struct value_data *vd)
2d4749b6 190{
2d4749b6 191 if (GET_CODE (x) == SUBREG)
192 {
29f9ec8f 193 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
194 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
195 x = tmp ? tmp : SUBREG_REG (x);
2d4749b6 196 }
197 if (REG_P (x))
0933f1d9 198 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
2d4749b6 199}
200
201/* Remember that REGNO is valid in MODE. */
202
203static void
3754d046 204set_value_regno (unsigned int regno, machine_mode mode,
2d4749b6 205 struct value_data *vd)
206{
207 unsigned int nregs;
208
209 vd->e[regno].mode = mode;
210
211 nregs = hard_regno_nregs[regno][mode];
212 if (nregs > vd->max_value_regs)
213 vd->max_value_regs = nregs;
214}
215
216/* Initialize VD such that there are no known relationships between regs. */
217
218static void
219init_value_data (struct value_data *vd)
220{
221 int i;
222 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
223 {
224 vd->e[i].mode = VOIDmode;
225 vd->e[i].oldest_regno = i;
226 vd->e[i].next_regno = INVALID_REGNUM;
2058ec71 227 vd->e[i].debug_insn_changes = NULL;
2d4749b6 228 }
229 vd->max_value_regs = 0;
2058ec71 230 vd->n_debug_insn_changes = 0;
2d4749b6 231}
232
233/* Called through note_stores. If X is clobbered, kill its value. */
234
235static void
236kill_clobbered_value (rtx x, const_rtx set, void *data)
237{
238 struct value_data *const vd = (struct value_data *) data;
239 if (GET_CODE (set) == CLOBBER)
240 kill_value (x, vd);
241}
242
c8010b80 243/* A structure passed as data to kill_set_value through note_stores. */
244struct kill_set_value_data
245{
246 struct value_data *vd;
247 rtx ignore_set_reg;
248};
249
2d4749b6 250/* Called through note_stores. If X is set, not clobbered, kill its
251 current value and install it as the root of its own value list. */
252
253static void
254kill_set_value (rtx x, const_rtx set, void *data)
255{
c8010b80 256 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
257 if (rtx_equal_p (x, ksvd->ignore_set_reg))
258 return;
2d4749b6 259 if (GET_CODE (set) != CLOBBER)
260 {
c8010b80 261 kill_value (x, ksvd->vd);
2d4749b6 262 if (REG_P (x))
c8010b80 263 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
2d4749b6 264 }
265}
266
29f9ec8f 267/* Kill any register used in X as the base of an auto-increment expression,
268 and install that register as the root of its own value list. */
2d4749b6 269
29f9ec8f 270static void
8108f3f0 271kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
2d4749b6 272{
29f9ec8f 273 subrtx_iterator::array_type array;
274 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
2d4749b6 275 {
29f9ec8f 276 const_rtx x = *iter;
277 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
278 {
279 x = XEXP (x, 0);
280 kill_value (x, vd);
281 set_value_regno (REGNO (x), GET_MODE (x), vd);
282 iter.skip_subrtxes ();
283 }
2d4749b6 284 }
2d4749b6 285}
286
287/* Assert that SRC has been copied to DEST. Adjust the data structures
288 to reflect that SRC contains an older copy of the shared value. */
289
290static void
291copy_value (rtx dest, rtx src, struct value_data *vd)
292{
293 unsigned int dr = REGNO (dest);
294 unsigned int sr = REGNO (src);
295 unsigned int dn, sn;
296 unsigned int i;
297
298 /* ??? At present, it's possible to see noop sets. It'd be nice if
299 this were cleaned up beforehand... */
300 if (sr == dr)
301 return;
302
303 /* Do not propagate copies to the stack pointer, as that can leave
304 memory accesses with no scheduling dependency on the stack update. */
305 if (dr == STACK_POINTER_REGNUM)
306 return;
307
308 /* Likewise with the frame pointer, if we're using one. */
309 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
310 return;
311
312 /* Do not propagate copies to fixed or global registers, patterns
313 can be relying to see particular fixed register or users can
314 expect the chosen global register in asm. */
315 if (fixed_regs[dr] || global_regs[dr])
316 return;
317
318 /* If SRC and DEST overlap, don't record anything. */
0933f1d9 319 dn = REG_NREGS (dest);
320 sn = REG_NREGS (src);
2d4749b6 321 if ((dr > sr && dr < sr + sn)
322 || (sr > dr && sr < dr + dn))
323 return;
324
325 /* If SRC had no assigned mode (i.e. we didn't know it was live)
326 assign it now and assume the value came from an input argument
327 or somesuch. */
328 if (vd->e[sr].mode == VOIDmode)
329 set_value_regno (sr, vd->e[dr].mode, vd);
330
331 /* If we are narrowing the input to a smaller number of hard regs,
332 and it is in big endian, we are really extracting a high part.
333 Since we generally associate a low part of a value with the value itself,
334 we must not do the same for the high part.
335 Note we can still get low parts for the same mode combination through
336 a two-step copy involving differently sized hard regs.
47ae02b7 337 Assume hard regs fr* are 32 bits each, while r* are 64 bits each:
2d4749b6 338 (set (reg:DI r0) (reg:DI fr0))
339 (set (reg:SI fr2) (reg:SI r0))
340 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
341 (set (reg:SI fr2) (reg:SI fr0))
342 loads the high part of (reg:DI fr0) into fr2.
343
344 We can't properly represent the latter case in our tables, so don't
345 record anything then. */
346 else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]
347 && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD
348 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
349 return;
350
351 /* If SRC had been assigned a mode narrower than the copy, we can't
352 link DEST into the chain, because not all of the pieces of the
353 copy came from oldest_regno. */
354 else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode])
355 return;
356
357 /* Link DR at the end of the value chain used by SR. */
358
359 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
360
361 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
362 continue;
363 vd->e[i].next_regno = dr;
364
382ecba7 365 if (flag_checking)
366 validate_value_data (vd);
2d4749b6 367}
368
369/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
370
371static bool
3754d046 372mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
2d4749b6 373 unsigned int regno ATTRIBUTE_UNUSED)
374{
375 if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode))
376 return false;
377
378#ifdef CANNOT_CHANGE_MODE_CLASS
379 return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode);
380#endif
381
382 return true;
383}
384
385/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
386 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
387 in NEW_MODE.
388 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
389
390static rtx
3754d046 391maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
392 machine_mode new_mode, unsigned int regno,
2d4749b6 393 unsigned int copy_regno ATTRIBUTE_UNUSED)
394{
395 if (GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (orig_mode)
396 && GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (new_mode))
397 return NULL_RTX;
398
399 if (orig_mode == new_mode)
15183fd2 400 return gen_raw_REG (new_mode, regno);
2d4749b6 401 else if (mode_change_ok (orig_mode, new_mode, regno))
402 {
403 int copy_nregs = hard_regno_nregs[copy_regno][copy_mode];
404 int use_nregs = hard_regno_nregs[copy_regno][new_mode];
405 int copy_offset
406 = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs);
407 int offset
408 = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset;
409 int byteoffset = offset % UNITS_PER_WORD;
410 int wordoffset = offset - byteoffset;
411
412 offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0)
413 + (BYTES_BIG_ENDIAN ? byteoffset : 0));
3a45e441 414 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
415 if (HARD_REGNO_MODE_OK (regno, new_mode))
15183fd2 416 return gen_raw_REG (new_mode, regno);
2d4749b6 417 }
418 return NULL_RTX;
419}
420
421/* Find the oldest copy of the value contained in REGNO that is in
422 register class CL and has mode MODE. If found, return an rtx
423 of that oldest register, otherwise return NULL. */
424
425static rtx
426find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
427{
428 unsigned int regno = REGNO (reg);
3754d046 429 machine_mode mode = GET_MODE (reg);
2d4749b6 430 unsigned int i;
431
432 /* If we are accessing REG in some mode other that what we set it in,
433 make sure that the replacement is valid. In particular, consider
434 (set (reg:DI r11) (...))
435 (set (reg:SI r9) (reg:SI r11))
436 (set (reg:SI r10) (...))
437 (set (...) (reg:DI r9))
438 Replacing r9 with r11 is invalid. */
439 if (mode != vd->e[regno].mode)
440 {
441 if (hard_regno_nregs[regno][mode]
442 > hard_regno_nregs[regno][vd->e[regno].mode])
443 return NULL_RTX;
444 }
445
446 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
447 {
3754d046 448 machine_mode oldmode = vd->e[i].mode;
2d4749b6 449 rtx new_rtx;
450
451 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
75219367 452 continue;
2d4749b6 453
454 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
455 if (new_rtx)
456 {
457 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
458 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
459 REG_POINTER (new_rtx) = REG_POINTER (reg);
460 return new_rtx;
461 }
462 }
463
464 return NULL_RTX;
465}
466
467/* If possible, replace the register at *LOC with the oldest register
468 in register class CL. Return true if successfully replaced. */
469
470static bool
0991de81 471replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
2d4749b6 472 struct value_data *vd)
473{
474 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
59483f68 475 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
2d4749b6 476 {
2058ec71 477 if (DEBUG_INSN_P (insn))
478 {
479 struct queued_debug_insn_change *change;
480
481 if (dump_file)
482 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
483 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
484
e16712b1 485 change = queued_debug_insn_change_pool.allocate ();
2058ec71 486 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
487 change->insn = insn;
488 change->loc = loc;
489 change->new_rtx = new_rtx;
490 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
491 ++vd->n_debug_insn_changes;
492 return true;
493 }
2d4749b6 494 if (dump_file)
495 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
496 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
497
498 validate_change (insn, loc, new_rtx, 1);
499 return true;
500 }
501 return false;
502}
503
504/* Similar to replace_oldest_value_reg, but *LOC contains an address.
505 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
506 BASE_REG_CLASS depending on how the register is being considered. */
507
508static bool
509replace_oldest_value_addr (rtx *loc, enum reg_class cl,
3754d046 510 machine_mode mode, addr_space_t as,
0991de81 511 rtx_insn *insn, struct value_data *vd)
2d4749b6 512{
513 rtx x = *loc;
514 RTX_CODE code = GET_CODE (x);
515 const char *fmt;
516 int i, j;
517 bool changed = false;
518
519 switch (code)
520 {
521 case PLUS:
9845d120 522 if (DEBUG_INSN_P (insn))
523 break;
524
2d4749b6 525 {
526 rtx orig_op0 = XEXP (x, 0);
527 rtx orig_op1 = XEXP (x, 1);
528 RTX_CODE code0 = GET_CODE (orig_op0);
529 RTX_CODE code1 = GET_CODE (orig_op1);
530 rtx op0 = orig_op0;
531 rtx op1 = orig_op1;
532 rtx *locI = NULL;
533 rtx *locB = NULL;
534 enum rtx_code index_code = SCRATCH;
535
536 if (GET_CODE (op0) == SUBREG)
537 {
538 op0 = SUBREG_REG (op0);
539 code0 = GET_CODE (op0);
540 }
541
542 if (GET_CODE (op1) == SUBREG)
543 {
544 op1 = SUBREG_REG (op1);
545 code1 = GET_CODE (op1);
546 }
547
548 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
549 || code0 == ZERO_EXTEND || code1 == MEM)
550 {
551 locI = &XEXP (x, 0);
552 locB = &XEXP (x, 1);
553 index_code = GET_CODE (*locI);
554 }
555 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
556 || code1 == ZERO_EXTEND || code0 == MEM)
557 {
558 locI = &XEXP (x, 1);
559 locB = &XEXP (x, 0);
560 index_code = GET_CODE (*locI);
561 }
562 else if (code0 == CONST_INT || code0 == CONST
563 || code0 == SYMBOL_REF || code0 == LABEL_REF)
564 {
565 locB = &XEXP (x, 1);
566 index_code = GET_CODE (XEXP (x, 0));
567 }
568 else if (code1 == CONST_INT || code1 == CONST
569 || code1 == SYMBOL_REF || code1 == LABEL_REF)
570 {
571 locB = &XEXP (x, 0);
572 index_code = GET_CODE (XEXP (x, 1));
573 }
574 else if (code0 == REG && code1 == REG)
575 {
576 int index_op;
577 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
578
579 if (REGNO_OK_FOR_INDEX_P (regno1)
f8a8fc7b 580 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
2d4749b6 581 index_op = 1;
582 else if (REGNO_OK_FOR_INDEX_P (regno0)
f8a8fc7b 583 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
2d4749b6 584 index_op = 0;
f8a8fc7b 585 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
2d4749b6 586 || REGNO_OK_FOR_INDEX_P (regno1))
587 index_op = 1;
f8a8fc7b 588 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
2d4749b6 589 index_op = 0;
590 else
591 index_op = 1;
592
593 locI = &XEXP (x, index_op);
594 locB = &XEXP (x, !index_op);
595 index_code = GET_CODE (*locI);
596 }
597 else if (code0 == REG)
598 {
599 locI = &XEXP (x, 0);
600 locB = &XEXP (x, 1);
601 index_code = GET_CODE (*locI);
602 }
603 else if (code1 == REG)
604 {
605 locI = &XEXP (x, 1);
606 locB = &XEXP (x, 0);
607 index_code = GET_CODE (*locI);
608 }
609
610 if (locI)
f8a8fc7b 611 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
612 mode, as, insn, vd);
2d4749b6 613 if (locB)
614 changed |= replace_oldest_value_addr (locB,
f8a8fc7b 615 base_reg_class (mode, as, PLUS,
2d4749b6 616 index_code),
f8a8fc7b 617 mode, as, insn, vd);
2d4749b6 618 return changed;
619 }
620
621 case POST_INC:
622 case POST_DEC:
623 case POST_MODIFY:
624 case PRE_INC:
625 case PRE_DEC:
626 case PRE_MODIFY:
627 return false;
628
629 case MEM:
630 return replace_oldest_value_mem (x, insn, vd);
631
632 case REG:
633 return replace_oldest_value_reg (loc, cl, insn, vd);
634
635 default:
636 break;
637 }
638
639 fmt = GET_RTX_FORMAT (code);
640 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
641 {
642 if (fmt[i] == 'e')
f8a8fc7b 643 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
2d4749b6 644 insn, vd);
645 else if (fmt[i] == 'E')
646 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
647 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
f8a8fc7b 648 mode, as, insn, vd);
2d4749b6 649 }
650
651 return changed;
652}
653
654/* Similar to replace_oldest_value_reg, but X contains a memory. */
655
656static bool
0991de81 657replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
2d4749b6 658{
9845d120 659 enum reg_class cl;
660
661 if (DEBUG_INSN_P (insn))
662 cl = ALL_REGS;
663 else
f8a8fc7b 664 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
9845d120 665
666 return replace_oldest_value_addr (&XEXP (x, 0), cl,
f8a8fc7b 667 GET_MODE (x), MEM_ADDR_SPACE (x),
668 insn, vd);
2d4749b6 669}
670
2058ec71 671/* Apply all queued updates for DEBUG_INSNs that change some reg to
672 register REGNO. */
673
674static void
675apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
676{
677 struct queued_debug_insn_change *change;
0991de81 678 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
2058ec71 679
680 for (change = vd->e[regno].debug_insn_changes;
681 change;
682 change = change->next)
683 {
684 if (last_insn != change->insn)
685 {
686 apply_change_group ();
687 last_insn = change->insn;
688 }
689 validate_change (change->insn, change->loc, change->new_rtx, 1);
690 }
691 apply_change_group ();
692}
693
2058ec71 694/* Called via note_uses, for all used registers in a real insn
695 apply DEBUG_INSN changes that change registers to the used
696 registers. */
697
698static void
6243e03f 699cprop_find_used_regs (rtx *loc, void *data)
2058ec71 700{
6243e03f 701 struct value_data *const vd = (struct value_data *) data;
702 subrtx_iterator::array_type array;
703 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
704 {
705 const_rtx x = *iter;
706 if (REG_P (x))
707 {
708 unsigned int regno = REGNO (x);
709 if (vd->e[regno].debug_insn_changes)
710 {
711 apply_debug_insn_changes (vd, regno);
712 free_debug_insn_changes (vd, regno);
713 }
714 }
715 }
2058ec71 716}
717
9c4a0128 718/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
719
720static void
721kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
722{
723 note_stores (PATTERN (insn), kill_clobbered_value, vd);
724
725 if (CALL_P (insn))
726 {
727 rtx exp;
728
729 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
730 {
731 rtx x = XEXP (exp, 0);
732 if (GET_CODE (x) == CLOBBER)
733 kill_value (SET_DEST (x), vd);
734 }
735 }
736}
737
2d4749b6 738/* Perform the forward copy propagation on basic block BB. */
739
740static bool
741copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
742{
9845d120 743 bool anything_changed = false;
0991de81 744 rtx_insn *insn;
2d4749b6 745
746 for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
747 {
757fefec 748 int n_ops, i, predicated;
2d4749b6 749 bool is_asm, any_replacements;
750 rtx set;
ff5a75fc 751 rtx link;
2d4749b6 752 bool replaced[MAX_RECOG_OPERANDS];
9845d120 753 bool changed = false;
c8010b80 754 struct kill_set_value_data ksvd;
2d4749b6 755
9845d120 756 if (!NONDEBUG_INSN_P (insn))
2d4749b6 757 {
9845d120 758 if (DEBUG_INSN_P (insn))
759 {
760 rtx loc = INSN_VAR_LOCATION_LOC (insn);
2058ec71 761 if (!VAR_LOC_UNKNOWN_P (loc))
762 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
763 ALL_REGS, GET_MODE (loc),
f8a8fc7b 764 ADDR_SPACE_GENERIC, insn, vd);
9845d120 765 }
766
2d4749b6 767 if (insn == BB_END (bb))
768 break;
769 else
770 continue;
771 }
772
773 set = single_set (insn);
835b8178 774 extract_constrain_insn (insn);
8eaaac4d 775 preprocess_constraints (insn);
89a7a6a5 776 const operand_alternative *op_alt = which_op_alt ();
2d4749b6 777 n_ops = recog_data.n_operands;
778 is_asm = asm_noperands (PATTERN (insn)) >= 0;
779
89a7a6a5 780 /* Simplify the code below by promoting OP_OUT to OP_INOUT
2d4749b6 781 in predicated instructions. */
782
783 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
784 for (i = 0; i < n_ops; ++i)
785 {
757fefec 786 int matches = op_alt[i].matches;
757fefec 787 if (matches >= 0 || op_alt[i].matched >= 0
2d4749b6 788 || (predicated && recog_data.operand_type[i] == OP_OUT))
789 recog_data.operand_type[i] = OP_INOUT;
790 }
791
2058ec71 792 /* Apply changes to earlier DEBUG_INSNs if possible. */
793 if (vd->n_debug_insn_changes)
794 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
795
2d4749b6 796 /* For each earlyclobber operand, zap the value data. */
797 for (i = 0; i < n_ops; i++)
757fefec 798 if (op_alt[i].earlyclobber)
2d4749b6 799 kill_value (recog_data.operand[i], vd);
800
801 /* Within asms, a clobber cannot overlap inputs or outputs.
802 I wouldn't think this were true for regular insns, but
803 scan_rtx treats them like that... */
9c4a0128 804 kill_clobbered_values (insn, vd);
2d4749b6 805
806 /* Kill all auto-incremented values. */
807 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
29f9ec8f 808 kill_autoinc_value (insn, vd);
2d4749b6 809
810 /* Kill all early-clobbered operands. */
811 for (i = 0; i < n_ops; i++)
757fefec 812 if (op_alt[i].earlyclobber)
2d4749b6 813 kill_value (recog_data.operand[i], vd);
814
ff5a75fc 815 /* If we have dead sets in the insn, then we need to note these as we
816 would clobbers. */
817 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
818 {
819 if (REG_NOTE_KIND (link) == REG_UNUSED)
820 {
821 kill_value (XEXP (link, 0), vd);
822 /* Furthermore, if the insn looked like a single-set,
823 but the dead store kills the source value of that
824 set, then we can no-longer use the plain move
825 special case below. */
826 if (set
827 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
828 set = NULL;
829 }
830 }
831
2d4749b6 832 /* Special-case plain move instructions, since we may well
833 be able to do the move from a different register class. */
834 if (set && REG_P (SET_SRC (set)))
835 {
836 rtx src = SET_SRC (set);
837 unsigned int regno = REGNO (src);
3754d046 838 machine_mode mode = GET_MODE (src);
2d4749b6 839 unsigned int i;
840 rtx new_rtx;
841
842 /* If we are accessing SRC in some mode other that what we
843 set it in, make sure that the replacement is valid. */
844 if (mode != vd->e[regno].mode)
845 {
846 if (hard_regno_nregs[regno][mode]
847 > hard_regno_nregs[regno][vd->e[regno].mode])
848 goto no_move_special_case;
417491d1 849
850 /* And likewise, if we are narrowing on big endian the transformation
851 is also invalid. */
852 if (hard_regno_nregs[regno][mode]
853 < hard_regno_nregs[regno][vd->e[regno].mode]
854 && (GET_MODE_SIZE (vd->e[regno].mode) > UNITS_PER_WORD
855 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
856 goto no_move_special_case;
2d4749b6 857 }
858
859 /* If the destination is also a register, try to find a source
860 register in the same class. */
861 if (REG_P (SET_DEST (set)))
862 {
863 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd);
864 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
865 {
866 if (dump_file)
867 fprintf (dump_file,
868 "insn %u: replaced reg %u with %u\n",
869 INSN_UID (insn), regno, REGNO (new_rtx));
870 changed = true;
871 goto did_replacement;
872 }
cc7416ff 873 /* We need to re-extract as validate_change clobbers
874 recog_data. */
835b8178 875 extract_constrain_insn (insn);
8eaaac4d 876 preprocess_constraints (insn);
2d4749b6 877 }
878
879 /* Otherwise, try all valid registers and see if its valid. */
880 for (i = vd->e[regno].oldest_regno; i != regno;
881 i = vd->e[i].next_regno)
882 {
883 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
884 mode, i, regno);
885 if (new_rtx != NULL_RTX)
886 {
887 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
888 {
889 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
890 REG_ATTRS (new_rtx) = REG_ATTRS (src);
891 REG_POINTER (new_rtx) = REG_POINTER (src);
892 if (dump_file)
893 fprintf (dump_file,
894 "insn %u: replaced reg %u with %u\n",
895 INSN_UID (insn), regno, REGNO (new_rtx));
896 changed = true;
897 goto did_replacement;
898 }
cc7416ff 899 /* We need to re-extract as validate_change clobbers
900 recog_data. */
835b8178 901 extract_constrain_insn (insn);
8eaaac4d 902 preprocess_constraints (insn);
2d4749b6 903 }
904 }
905 }
906 no_move_special_case:
907
908 any_replacements = false;
909
910 /* For each input operand, replace a hard register with the
911 eldest live copy that's in an appropriate register class. */
912 for (i = 0; i < n_ops; i++)
913 {
914 replaced[i] = false;
915
916 /* Don't scan match_operand here, since we've no reg class
917 information to pass down. Any operands that we could
918 substitute in will be represented elsewhere. */
919 if (recog_data.constraints[i][0] == '\0')
920 continue;
921
922 /* Don't replace in asms intentionally referencing hard regs. */
923 if (is_asm && REG_P (recog_data.operand[i])
924 && (REGNO (recog_data.operand[i])
925 == ORIGINAL_REGNO (recog_data.operand[i])))
926 continue;
927
928 if (recog_data.operand_type[i] == OP_IN)
929 {
757fefec 930 if (op_alt[i].is_address)
2d4749b6 931 replaced[i]
932 = replace_oldest_value_addr (recog_data.operand_loc[i],
89a7a6a5 933 alternative_class (op_alt, i),
934 VOIDmode, ADDR_SPACE_GENERIC,
935 insn, vd);
2d4749b6 936 else if (REG_P (recog_data.operand[i]))
937 replaced[i]
938 = replace_oldest_value_reg (recog_data.operand_loc[i],
89a7a6a5 939 alternative_class (op_alt, i),
940 insn, vd);
2d4749b6 941 else if (MEM_P (recog_data.operand[i]))
942 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
943 insn, vd);
944 }
945 else if (MEM_P (recog_data.operand[i]))
946 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
947 insn, vd);
948
949 /* If we performed any replacement, update match_dups. */
950 if (replaced[i])
951 {
952 int j;
953 rtx new_rtx;
954
955 new_rtx = *recog_data.operand_loc[i];
956 recog_data.operand[i] = new_rtx;
957 for (j = 0; j < recog_data.n_dups; j++)
958 if (recog_data.dup_num[j] == i)
959 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
960
961 any_replacements = true;
962 }
963 }
964
965 if (any_replacements)
966 {
967 if (! apply_change_group ())
968 {
969 for (i = 0; i < n_ops; i++)
970 if (replaced[i])
971 {
972 rtx old = *recog_data.operand_loc[i];
973 recog_data.operand[i] = old;
974 }
975
976 if (dump_file)
977 fprintf (dump_file,
978 "insn %u: reg replacements not verified\n",
979 INSN_UID (insn));
980 }
981 else
982 changed = true;
983 }
984
985 did_replacement:
9845d120 986 if (changed)
c7458ee3 987 {
988 anything_changed = true;
989
990 /* If something changed, perhaps further changes to earlier
991 DEBUG_INSNs can be applied. */
992 if (vd->n_debug_insn_changes)
993 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
994 }
9845d120 995
c8010b80 996 ksvd.vd = vd;
997 ksvd.ignore_set_reg = NULL_RTX;
998
2d4749b6 999 /* Clobber call-clobbered registers. */
1000 if (CALL_P (insn))
c8010b80 1001 {
24ec6636 1002 unsigned int set_regno = INVALID_REGNUM;
1003 unsigned int set_nregs = 0;
1004 unsigned int regno;
c8010b80 1005 rtx exp;
7f73851f 1006 HARD_REG_SET regs_invalidated_by_this_call;
24ec6636 1007
c8010b80 1008 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1009 {
1010 rtx x = XEXP (exp, 0);
1011 if (GET_CODE (x) == SET)
1012 {
1013 rtx dest = SET_DEST (x);
1014 kill_value (dest, vd);
1015 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1016 copy_value (dest, SET_SRC (x), vd);
1017 ksvd.ignore_set_reg = dest;
1018 set_regno = REGNO (dest);
0933f1d9 1019 set_nregs = REG_NREGS (dest);
c8010b80 1020 break;
1021 }
1022 }
24ec6636 1023
7f73851f 1024 get_call_reg_set_usage (insn,
1025 &regs_invalidated_by_this_call,
1026 regs_invalidated_by_call);
1aafbb7e 1027 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
7f73851f 1028 if ((TEST_HARD_REG_BIT (regs_invalidated_by_this_call, regno)
1aafbb7e 1029 || HARD_REGNO_CALL_PART_CLOBBERED (regno, vd->e[regno].mode))
1030 && (regno < set_regno || regno >= set_regno + set_nregs))
24ec6636 1031 kill_value_regno (regno, 1, vd);
ca719585 1032
1033 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
1034 of the SET isn't in regs_invalidated_by_call hard reg set,
1035 but instead among CLOBBERs on the CALL_INSN, we could wrongly
1036 assume the value in it is still live. */
1037 if (ksvd.ignore_set_reg)
9c4a0128 1038 kill_clobbered_values (insn, vd);
c8010b80 1039 }
2d4749b6 1040
d4878205 1041 bool copy_p = (set
1042 && REG_P (SET_DEST (set))
1043 && REG_P (SET_SRC (set)));
1044 bool noop_p = (copy_p
1045 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
2d4749b6 1046
d4878205 1047 if (!noop_p)
1048 {
1049 /* Notice stores. */
1050 note_stores (PATTERN (insn), kill_set_value, &ksvd);
1051
1052 /* Notice copies. */
1053 if (copy_p)
1054 copy_value (SET_DEST (set), SET_SRC (set), vd);
1055 }
2d4749b6 1056
1057 if (insn == BB_END (bb))
1058 break;
1059 }
1060
9845d120 1061 return anything_changed;
2d4749b6 1062}
1063
2d4749b6 1064/* Dump the value chain data to stderr. */
1065
4b987fac 1066DEBUG_FUNCTION void
2d4749b6 1067debug_value_data (struct value_data *vd)
1068{
1069 HARD_REG_SET set;
1070 unsigned int i, j;
1071
1072 CLEAR_HARD_REG_SET (set);
1073
1074 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1075 if (vd->e[i].oldest_regno == i)
1076 {
1077 if (vd->e[i].mode == VOIDmode)
1078 {
1079 if (vd->e[i].next_regno != INVALID_REGNUM)
1080 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1081 i, vd->e[i].next_regno);
1082 continue;
1083 }
1084
1085 SET_HARD_REG_BIT (set, i);
1086 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1087
1088 for (j = vd->e[i].next_regno;
1089 j != INVALID_REGNUM;
1090 j = vd->e[j].next_regno)
1091 {
1092 if (TEST_HARD_REG_BIT (set, j))
1093 {
1094 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1095 return;
1096 }
1097
1098 if (vd->e[j].oldest_regno != i)
1099 {
1100 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1101 j, vd->e[j].oldest_regno);
1102 return;
1103 }
1104 SET_HARD_REG_BIT (set, j);
1105 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1106 }
1107 fputc ('\n', stderr);
1108 }
1109
1110 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1111 if (! TEST_HARD_REG_BIT (set, i)
1112 && (vd->e[i].mode != VOIDmode
1113 || vd->e[i].oldest_regno != i
1114 || vd->e[i].next_regno != INVALID_REGNUM))
1115 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1116 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1117 vd->e[i].next_regno);
1118}
1119
59483f68 1120/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1121 DEBUG_INSN is skipped since we do not want to involve DF related
1122 staff as how it is handled in function pass_cprop_hardreg::execute.
1123
1124 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1125 to handle DEBUG_INSN for other uses. */
1126
1127void
1128copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1129{
1130 struct value_data *vd;
1131 vd = XNEWVEC (struct value_data, 1);
1132 init_value_data (vd);
1133
1134 skip_debug_insn_p = true;
1135 copyprop_hardreg_forward_1 (bb, vd);
1136 free (vd);
1137 skip_debug_insn_p = false;
1138}
1139
2d4749b6 1140static void
1141validate_value_data (struct value_data *vd)
1142{
1143 HARD_REG_SET set;
1144 unsigned int i, j;
1145
1146 CLEAR_HARD_REG_SET (set);
1147
1148 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1149 if (vd->e[i].oldest_regno == i)
1150 {
1151 if (vd->e[i].mode == VOIDmode)
1152 {
1153 if (vd->e[i].next_regno != INVALID_REGNUM)
1154 internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)",
1155 i, vd->e[i].next_regno);
1156 continue;
1157 }
1158
1159 SET_HARD_REG_BIT (set, i);
1160
1161 for (j = vd->e[i].next_regno;
1162 j != INVALID_REGNUM;
1163 j = vd->e[j].next_regno)
1164 {
1165 if (TEST_HARD_REG_BIT (set, j))
1166 internal_error ("validate_value_data: Loop in regno chain (%u)",
1167 j);
1168 if (vd->e[j].oldest_regno != i)
1169 internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)",
1170 j, vd->e[j].oldest_regno);
1171
1172 SET_HARD_REG_BIT (set, j);
1173 }
1174 }
1175
1176 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1177 if (! TEST_HARD_REG_BIT (set, i)
1178 && (vd->e[i].mode != VOIDmode
1179 || vd->e[i].oldest_regno != i
1180 || vd->e[i].next_regno != INVALID_REGNUM))
1181 internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)",
1182 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1183 vd->e[i].next_regno);
1184}
382ecba7 1185
2d4749b6 1186\f
cbe8bda8 1187namespace {
1188
1189const pass_data pass_data_cprop_hardreg =
2d4749b6 1190{
cbe8bda8 1191 RTL_PASS, /* type */
1192 "cprop_hardreg", /* name */
1193 OPTGROUP_NONE, /* optinfo_flags */
cbe8bda8 1194 TV_CPROP_REGISTERS, /* tv_id */
1195 0, /* properties_required */
1196 0, /* properties_provided */
1197 0, /* properties_destroyed */
1198 0, /* todo_flags_start */
8b88439e 1199 TODO_df_finish, /* todo_flags_finish */
2d4749b6 1200};
cbe8bda8 1201
1202class pass_cprop_hardreg : public rtl_opt_pass
1203{
1204public:
9af5ce0c 1205 pass_cprop_hardreg (gcc::context *ctxt)
1206 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
cbe8bda8 1207 {}
1208
1209 /* opt_pass methods: */
31315c24 1210 virtual bool gate (function *)
1211 {
1212 return (optimize > 0 && (flag_cprop_registers));
1213 }
1214
65b0537f 1215 virtual unsigned int execute (function *);
cbe8bda8 1216
1217}; // class pass_cprop_hardreg
1218
65b0537f 1219unsigned int
1220pass_cprop_hardreg::execute (function *fun)
1221{
1222 struct value_data *all_vd;
1223 basic_block bb;
1224 sbitmap visited;
1225 bool analyze_called = false;
1226
1227 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1228
1229 visited = sbitmap_alloc (last_basic_block_for_fn (fun));
1230 bitmap_clear (visited);
1231
65b0537f 1232 FOR_EACH_BB_FN (bb, fun)
1233 {
1234 bitmap_set_bit (visited, bb->index);
1235
1236 /* If a block has a single predecessor, that we've already
1237 processed, begin with the value data that was live at
1238 the end of the predecessor block. */
1239 /* ??? Ought to use more intelligent queuing of blocks. */
1240 if (single_pred_p (bb)
1241 && bitmap_bit_p (visited, single_pred (bb)->index)
1242 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1243 {
1244 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1245 if (all_vd[bb->index].n_debug_insn_changes)
1246 {
1247 unsigned int regno;
1248
1249 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1250 {
1251 if (all_vd[bb->index].e[regno].debug_insn_changes)
1252 {
1253 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1254 if (--all_vd[bb->index].n_debug_insn_changes == 0)
1255 break;
1256 }
1257 }
1258 }
1259 }
1260 else
1261 init_value_data (all_vd + bb->index);
1262
1263 copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1264 }
1265
1266 if (MAY_HAVE_DEBUG_INSNS)
1267 {
1268 FOR_EACH_BB_FN (bb, fun)
1269 if (bitmap_bit_p (visited, bb->index)
1270 && all_vd[bb->index].n_debug_insn_changes)
1271 {
1272 unsigned int regno;
1273 bitmap live;
1274
1275 if (!analyze_called)
1276 {
1277 df_analyze ();
1278 analyze_called = true;
1279 }
1280 live = df_get_live_out (bb);
1281 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1282 if (all_vd[bb->index].e[regno].debug_insn_changes)
1283 {
1284 if (REGNO_REG_SET_P (live, regno))
1285 apply_debug_insn_changes (all_vd + bb->index, regno);
1286 if (all_vd[bb->index].n_debug_insn_changes == 0)
1287 break;
1288 }
1289 }
1290
e16712b1 1291 queued_debug_insn_change_pool.release ();
65b0537f 1292 }
1293
1294 sbitmap_free (visited);
1295 free (all_vd);
1296 return 0;
1297}
1298
cbe8bda8 1299} // anon namespace
1300
1301rtl_opt_pass *
1302make_pass_cprop_hardreg (gcc::context *ctxt)
1303{
1304 return new pass_cprop_hardreg (ctxt);
1305}
Mirror of https://gcc.gnu.org/git/gcc.git