]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/regcprop.c
2013-09-28 Sandra Loosemore <sandra@codesourcery.com>
[thirdparty/gcc.git] / gcc / regcprop.c
CommitLineData
2d4749b6 1/* Copy propagation on hard registers for the GNU compiler.
711789cc 2 Copyright (C) 2000-2013 Free Software Foundation, Inc.
2d4749b6 3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
23#include "tm.h"
24#include "rtl.h"
25#include "tm_p.h"
26#include "insn-config.h"
27#include "regs.h"
28#include "addresses.h"
29#include "hard-reg-set.h"
30#include "basic-block.h"
31#include "reload.h"
2d4749b6 32#include "function.h"
33#include "recog.h"
34#include "flags.h"
0b205f4c 35#include "diagnostic-core.h"
2d4749b6 36#include "obstack.h"
2d4749b6 37#include "tree-pass.h"
38#include "df.h"
39
40/* The following code does forward propagation of hard register copies.
41 The object is to eliminate as many dependencies as possible, so that
42 we have the most scheduling freedom. As a side effect, we also clean
43 up some silly register allocation decisions made by reload. This
44 code may be obsoleted by a new register allocator. */
45
2058ec71 46/* DEBUG_INSNs aren't changed right away, as doing so might extend the
47 lifetime of a register and get the DEBUG_INSN subsequently reset.
48 So they are queued instead, and updated only when the register is
49 used in some subsequent real insn before it is set. */
50struct queued_debug_insn_change
51{
52 struct queued_debug_insn_change *next;
53 rtx insn;
54 rtx *loc;
55 rtx new_rtx;
56};
57
2d4749b6 58/* For each register, we have a list of registers that contain the same
59 value. The OLDEST_REGNO field points to the head of the list, and
60 the NEXT_REGNO field runs through the list. The MODE field indicates
61 what mode the data is known to be in; this field is VOIDmode when the
62 register is not known to contain valid data. */
63
64struct value_data_entry
65{
66 enum machine_mode mode;
67 unsigned int oldest_regno;
68 unsigned int next_regno;
2058ec71 69 struct queued_debug_insn_change *debug_insn_changes;
2d4749b6 70};
71
72struct value_data
73{
74 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
75 unsigned int max_value_regs;
2058ec71 76 unsigned int n_debug_insn_changes;
2d4749b6 77};
78
2058ec71 79static alloc_pool debug_insn_changes_pool;
80
2d4749b6 81static void kill_value_one_regno (unsigned, struct value_data *);
82static void kill_value_regno (unsigned, unsigned, struct value_data *);
83static void kill_value (rtx, struct value_data *);
84static void set_value_regno (unsigned, enum machine_mode, struct value_data *);
85static void init_value_data (struct value_data *);
86static void kill_clobbered_value (rtx, const_rtx, void *);
87static void kill_set_value (rtx, const_rtx, void *);
88static int kill_autoinc_value (rtx *, void *);
89static void copy_value (rtx, rtx, struct value_data *);
90static bool mode_change_ok (enum machine_mode, enum machine_mode,
91 unsigned int);
92static rtx maybe_mode_change (enum machine_mode, enum machine_mode,
93 enum machine_mode, unsigned int, unsigned int);
94static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
95static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx,
96 struct value_data *);
97static bool replace_oldest_value_addr (rtx *, enum reg_class,
f8a8fc7b 98 enum machine_mode, addr_space_t, rtx,
2d4749b6 99 struct value_data *);
100static bool replace_oldest_value_mem (rtx, rtx, struct value_data *);
101static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
102extern void debug_value_data (struct value_data *);
103#ifdef ENABLE_CHECKING
104static void validate_value_data (struct value_data *);
105#endif
106
2058ec71 107/* Free all queued updates for DEBUG_INSNs that change some reg to
108 register REGNO. */
109
110static void
111free_debug_insn_changes (struct value_data *vd, unsigned int regno)
112{
113 struct queued_debug_insn_change *cur, *next;
114 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
115 {
116 next = cur->next;
117 --vd->n_debug_insn_changes;
118 pool_free (debug_insn_changes_pool, cur);
119 }
120 vd->e[regno].debug_insn_changes = NULL;
121}
122
2d4749b6 123/* Kill register REGNO. This involves removing it from any value
124 lists, and resetting the value mode to VOIDmode. This is only a
125 helper function; it does not handle any hard registers overlapping
126 with REGNO. */
127
128static void
129kill_value_one_regno (unsigned int regno, struct value_data *vd)
130{
131 unsigned int i, next;
132
133 if (vd->e[regno].oldest_regno != regno)
134 {
135 for (i = vd->e[regno].oldest_regno;
136 vd->e[i].next_regno != regno;
137 i = vd->e[i].next_regno)
138 continue;
139 vd->e[i].next_regno = vd->e[regno].next_regno;
140 }
141 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
142 {
143 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
144 vd->e[i].oldest_regno = next;
145 }
146
147 vd->e[regno].mode = VOIDmode;
148 vd->e[regno].oldest_regno = regno;
149 vd->e[regno].next_regno = INVALID_REGNUM;
2058ec71 150 if (vd->e[regno].debug_insn_changes)
151 free_debug_insn_changes (vd, regno);
2d4749b6 152
153#ifdef ENABLE_CHECKING
154 validate_value_data (vd);
155#endif
156}
157
158/* Kill the value in register REGNO for NREGS, and any other registers
159 whose values overlap. */
160
161static void
162kill_value_regno (unsigned int regno, unsigned int nregs,
163 struct value_data *vd)
164{
165 unsigned int j;
166
167 /* Kill the value we're told to kill. */
168 for (j = 0; j < nregs; ++j)
169 kill_value_one_regno (regno + j, vd);
170
171 /* Kill everything that overlapped what we're told to kill. */
172 if (regno < vd->max_value_regs)
173 j = 0;
174 else
175 j = regno - vd->max_value_regs;
176 for (; j < regno; ++j)
177 {
178 unsigned int i, n;
179 if (vd->e[j].mode == VOIDmode)
180 continue;
181 n = hard_regno_nregs[j][vd->e[j].mode];
182 if (j + n > regno)
183 for (i = 0; i < n; ++i)
184 kill_value_one_regno (j + i, vd);
185 }
186}
187
188/* Kill X. This is a convenience function wrapping kill_value_regno
189 so that we mind the mode the register is in. */
190
191static void
192kill_value (rtx x, struct value_data *vd)
193{
194 rtx orig_rtx = x;
195
196 if (GET_CODE (x) == SUBREG)
197 {
198 x = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
199 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
200 if (x == NULL_RTX)
201 x = SUBREG_REG (orig_rtx);
202 }
203 if (REG_P (x))
204 {
205 unsigned int regno = REGNO (x);
206 unsigned int n = hard_regno_nregs[regno][GET_MODE (x)];
207
208 kill_value_regno (regno, n, vd);
209 }
210}
211
212/* Remember that REGNO is valid in MODE. */
213
214static void
215set_value_regno (unsigned int regno, enum machine_mode mode,
216 struct value_data *vd)
217{
218 unsigned int nregs;
219
220 vd->e[regno].mode = mode;
221
222 nregs = hard_regno_nregs[regno][mode];
223 if (nregs > vd->max_value_regs)
224 vd->max_value_regs = nregs;
225}
226
227/* Initialize VD such that there are no known relationships between regs. */
228
229static void
230init_value_data (struct value_data *vd)
231{
232 int i;
233 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
234 {
235 vd->e[i].mode = VOIDmode;
236 vd->e[i].oldest_regno = i;
237 vd->e[i].next_regno = INVALID_REGNUM;
2058ec71 238 vd->e[i].debug_insn_changes = NULL;
2d4749b6 239 }
240 vd->max_value_regs = 0;
2058ec71 241 vd->n_debug_insn_changes = 0;
2d4749b6 242}
243
244/* Called through note_stores. If X is clobbered, kill its value. */
245
246static void
247kill_clobbered_value (rtx x, const_rtx set, void *data)
248{
249 struct value_data *const vd = (struct value_data *) data;
250 if (GET_CODE (set) == CLOBBER)
251 kill_value (x, vd);
252}
253
c8010b80 254/* A structure passed as data to kill_set_value through note_stores. */
255struct kill_set_value_data
256{
257 struct value_data *vd;
258 rtx ignore_set_reg;
259};
260
2d4749b6 261/* Called through note_stores. If X is set, not clobbered, kill its
262 current value and install it as the root of its own value list. */
263
264static void
265kill_set_value (rtx x, const_rtx set, void *data)
266{
c8010b80 267 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
268 if (rtx_equal_p (x, ksvd->ignore_set_reg))
269 return;
2d4749b6 270 if (GET_CODE (set) != CLOBBER)
271 {
c8010b80 272 kill_value (x, ksvd->vd);
2d4749b6 273 if (REG_P (x))
c8010b80 274 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
2d4749b6 275 }
276}
277
278/* Called through for_each_rtx. Kill any register used as the base of an
279 auto-increment expression, and install that register as the root of its
280 own value list. */
281
282static int
283kill_autoinc_value (rtx *px, void *data)
284{
285 rtx x = *px;
286 struct value_data *const vd = (struct value_data *) data;
287
288 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
289 {
290 x = XEXP (x, 0);
291 kill_value (x, vd);
98155838 292 set_value_regno (REGNO (x), GET_MODE (x), vd);
2d4749b6 293 return -1;
294 }
295
296 return 0;
297}
298
299/* Assert that SRC has been copied to DEST. Adjust the data structures
300 to reflect that SRC contains an older copy of the shared value. */
301
302static void
303copy_value (rtx dest, rtx src, struct value_data *vd)
304{
305 unsigned int dr = REGNO (dest);
306 unsigned int sr = REGNO (src);
307 unsigned int dn, sn;
308 unsigned int i;
309
310 /* ??? At present, it's possible to see noop sets. It'd be nice if
311 this were cleaned up beforehand... */
312 if (sr == dr)
313 return;
314
315 /* Do not propagate copies to the stack pointer, as that can leave
316 memory accesses with no scheduling dependency on the stack update. */
317 if (dr == STACK_POINTER_REGNUM)
318 return;
319
320 /* Likewise with the frame pointer, if we're using one. */
321 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
322 return;
323
324 /* Do not propagate copies to fixed or global registers, patterns
325 can be relying to see particular fixed register or users can
326 expect the chosen global register in asm. */
327 if (fixed_regs[dr] || global_regs[dr])
328 return;
329
330 /* If SRC and DEST overlap, don't record anything. */
331 dn = hard_regno_nregs[dr][GET_MODE (dest)];
332 sn = hard_regno_nregs[sr][GET_MODE (dest)];
333 if ((dr > sr && dr < sr + sn)
334 || (sr > dr && sr < dr + dn))
335 return;
336
337 /* If SRC had no assigned mode (i.e. we didn't know it was live)
338 assign it now and assume the value came from an input argument
339 or somesuch. */
340 if (vd->e[sr].mode == VOIDmode)
341 set_value_regno (sr, vd->e[dr].mode, vd);
342
343 /* If we are narrowing the input to a smaller number of hard regs,
344 and it is in big endian, we are really extracting a high part.
345 Since we generally associate a low part of a value with the value itself,
346 we must not do the same for the high part.
347 Note we can still get low parts for the same mode combination through
348 a two-step copy involving differently sized hard regs.
349 Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each:
350 (set (reg:DI r0) (reg:DI fr0))
351 (set (reg:SI fr2) (reg:SI r0))
352 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
353 (set (reg:SI fr2) (reg:SI fr0))
354 loads the high part of (reg:DI fr0) into fr2.
355
356 We can't properly represent the latter case in our tables, so don't
357 record anything then. */
358 else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]
359 && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD
360 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
361 return;
362
363 /* If SRC had been assigned a mode narrower than the copy, we can't
364 link DEST into the chain, because not all of the pieces of the
365 copy came from oldest_regno. */
366 else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode])
367 return;
368
369 /* Link DR at the end of the value chain used by SR. */
370
371 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
372
373 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
374 continue;
375 vd->e[i].next_regno = dr;
376
377#ifdef ENABLE_CHECKING
378 validate_value_data (vd);
379#endif
380}
381
382/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
383
384static bool
385mode_change_ok (enum machine_mode orig_mode, enum machine_mode new_mode,
386 unsigned int regno ATTRIBUTE_UNUSED)
387{
388 if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode))
389 return false;
390
391#ifdef CANNOT_CHANGE_MODE_CLASS
392 return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode);
393#endif
394
395 return true;
396}
397
398/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
399 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
400 in NEW_MODE.
401 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
402
403static rtx
404maybe_mode_change (enum machine_mode orig_mode, enum machine_mode copy_mode,
405 enum machine_mode new_mode, unsigned int regno,
406 unsigned int copy_regno ATTRIBUTE_UNUSED)
407{
408 if (GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (orig_mode)
409 && GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (new_mode))
410 return NULL_RTX;
411
412 if (orig_mode == new_mode)
413 return gen_rtx_raw_REG (new_mode, regno);
414 else if (mode_change_ok (orig_mode, new_mode, regno))
415 {
416 int copy_nregs = hard_regno_nregs[copy_regno][copy_mode];
417 int use_nregs = hard_regno_nregs[copy_regno][new_mode];
418 int copy_offset
419 = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs);
420 int offset
421 = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset;
422 int byteoffset = offset % UNITS_PER_WORD;
423 int wordoffset = offset - byteoffset;
424
425 offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0)
426 + (BYTES_BIG_ENDIAN ? byteoffset : 0));
3a45e441 427 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
428 if (HARD_REGNO_MODE_OK (regno, new_mode))
429 return gen_rtx_raw_REG (new_mode, regno);
2d4749b6 430 }
431 return NULL_RTX;
432}
433
434/* Find the oldest copy of the value contained in REGNO that is in
435 register class CL and has mode MODE. If found, return an rtx
436 of that oldest register, otherwise return NULL. */
437
438static rtx
439find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
440{
441 unsigned int regno = REGNO (reg);
442 enum machine_mode mode = GET_MODE (reg);
443 unsigned int i;
444
445 /* If we are accessing REG in some mode other that what we set it in,
446 make sure that the replacement is valid. In particular, consider
447 (set (reg:DI r11) (...))
448 (set (reg:SI r9) (reg:SI r11))
449 (set (reg:SI r10) (...))
450 (set (...) (reg:DI r9))
451 Replacing r9 with r11 is invalid. */
452 if (mode != vd->e[regno].mode)
453 {
454 if (hard_regno_nregs[regno][mode]
455 > hard_regno_nregs[regno][vd->e[regno].mode])
456 return NULL_RTX;
457 }
458
459 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
460 {
461 enum machine_mode oldmode = vd->e[i].mode;
462 rtx new_rtx;
463
464 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
75219367 465 continue;
2d4749b6 466
467 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
468 if (new_rtx)
469 {
470 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
471 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
472 REG_POINTER (new_rtx) = REG_POINTER (reg);
473 return new_rtx;
474 }
475 }
476
477 return NULL_RTX;
478}
479
480/* If possible, replace the register at *LOC with the oldest register
481 in register class CL. Return true if successfully replaced. */
482
483static bool
484replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn,
485 struct value_data *vd)
486{
487 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
488 if (new_rtx)
489 {
2058ec71 490 if (DEBUG_INSN_P (insn))
491 {
492 struct queued_debug_insn_change *change;
493
494 if (dump_file)
495 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
496 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
497
498 change = (struct queued_debug_insn_change *)
499 pool_alloc (debug_insn_changes_pool);
500 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
501 change->insn = insn;
502 change->loc = loc;
503 change->new_rtx = new_rtx;
504 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
505 ++vd->n_debug_insn_changes;
506 return true;
507 }
2d4749b6 508 if (dump_file)
509 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
510 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
511
512 validate_change (insn, loc, new_rtx, 1);
513 return true;
514 }
515 return false;
516}
517
518/* Similar to replace_oldest_value_reg, but *LOC contains an address.
519 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
520 BASE_REG_CLASS depending on how the register is being considered. */
521
522static bool
523replace_oldest_value_addr (rtx *loc, enum reg_class cl,
f8a8fc7b 524 enum machine_mode mode, addr_space_t as,
525 rtx insn, struct value_data *vd)
2d4749b6 526{
527 rtx x = *loc;
528 RTX_CODE code = GET_CODE (x);
529 const char *fmt;
530 int i, j;
531 bool changed = false;
532
533 switch (code)
534 {
535 case PLUS:
9845d120 536 if (DEBUG_INSN_P (insn))
537 break;
538
2d4749b6 539 {
540 rtx orig_op0 = XEXP (x, 0);
541 rtx orig_op1 = XEXP (x, 1);
542 RTX_CODE code0 = GET_CODE (orig_op0);
543 RTX_CODE code1 = GET_CODE (orig_op1);
544 rtx op0 = orig_op0;
545 rtx op1 = orig_op1;
546 rtx *locI = NULL;
547 rtx *locB = NULL;
548 enum rtx_code index_code = SCRATCH;
549
550 if (GET_CODE (op0) == SUBREG)
551 {
552 op0 = SUBREG_REG (op0);
553 code0 = GET_CODE (op0);
554 }
555
556 if (GET_CODE (op1) == SUBREG)
557 {
558 op1 = SUBREG_REG (op1);
559 code1 = GET_CODE (op1);
560 }
561
562 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
563 || code0 == ZERO_EXTEND || code1 == MEM)
564 {
565 locI = &XEXP (x, 0);
566 locB = &XEXP (x, 1);
567 index_code = GET_CODE (*locI);
568 }
569 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
570 || code1 == ZERO_EXTEND || code0 == MEM)
571 {
572 locI = &XEXP (x, 1);
573 locB = &XEXP (x, 0);
574 index_code = GET_CODE (*locI);
575 }
576 else if (code0 == CONST_INT || code0 == CONST
577 || code0 == SYMBOL_REF || code0 == LABEL_REF)
578 {
579 locB = &XEXP (x, 1);
580 index_code = GET_CODE (XEXP (x, 0));
581 }
582 else if (code1 == CONST_INT || code1 == CONST
583 || code1 == SYMBOL_REF || code1 == LABEL_REF)
584 {
585 locB = &XEXP (x, 0);
586 index_code = GET_CODE (XEXP (x, 1));
587 }
588 else if (code0 == REG && code1 == REG)
589 {
590 int index_op;
591 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
592
593 if (REGNO_OK_FOR_INDEX_P (regno1)
f8a8fc7b 594 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
2d4749b6 595 index_op = 1;
596 else if (REGNO_OK_FOR_INDEX_P (regno0)
f8a8fc7b 597 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
2d4749b6 598 index_op = 0;
f8a8fc7b 599 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
2d4749b6 600 || REGNO_OK_FOR_INDEX_P (regno1))
601 index_op = 1;
f8a8fc7b 602 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
2d4749b6 603 index_op = 0;
604 else
605 index_op = 1;
606
607 locI = &XEXP (x, index_op);
608 locB = &XEXP (x, !index_op);
609 index_code = GET_CODE (*locI);
610 }
611 else if (code0 == REG)
612 {
613 locI = &XEXP (x, 0);
614 locB = &XEXP (x, 1);
615 index_code = GET_CODE (*locI);
616 }
617 else if (code1 == REG)
618 {
619 locI = &XEXP (x, 1);
620 locB = &XEXP (x, 0);
621 index_code = GET_CODE (*locI);
622 }
623
624 if (locI)
f8a8fc7b 625 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
626 mode, as, insn, vd);
2d4749b6 627 if (locB)
628 changed |= replace_oldest_value_addr (locB,
f8a8fc7b 629 base_reg_class (mode, as, PLUS,
2d4749b6 630 index_code),
f8a8fc7b 631 mode, as, insn, vd);
2d4749b6 632 return changed;
633 }
634
635 case POST_INC:
636 case POST_DEC:
637 case POST_MODIFY:
638 case PRE_INC:
639 case PRE_DEC:
640 case PRE_MODIFY:
641 return false;
642
643 case MEM:
644 return replace_oldest_value_mem (x, insn, vd);
645
646 case REG:
647 return replace_oldest_value_reg (loc, cl, insn, vd);
648
649 default:
650 break;
651 }
652
653 fmt = GET_RTX_FORMAT (code);
654 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
655 {
656 if (fmt[i] == 'e')
f8a8fc7b 657 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
2d4749b6 658 insn, vd);
659 else if (fmt[i] == 'E')
660 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
661 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
f8a8fc7b 662 mode, as, insn, vd);
2d4749b6 663 }
664
665 return changed;
666}
667
668/* Similar to replace_oldest_value_reg, but X contains a memory. */
669
670static bool
671replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd)
672{
9845d120 673 enum reg_class cl;
674
675 if (DEBUG_INSN_P (insn))
676 cl = ALL_REGS;
677 else
f8a8fc7b 678 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
9845d120 679
680 return replace_oldest_value_addr (&XEXP (x, 0), cl,
f8a8fc7b 681 GET_MODE (x), MEM_ADDR_SPACE (x),
682 insn, vd);
2d4749b6 683}
684
2058ec71 685/* Apply all queued updates for DEBUG_INSNs that change some reg to
686 register REGNO. */
687
688static void
689apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
690{
691 struct queued_debug_insn_change *change;
692 rtx last_insn = vd->e[regno].debug_insn_changes->insn;
693
694 for (change = vd->e[regno].debug_insn_changes;
695 change;
696 change = change->next)
697 {
698 if (last_insn != change->insn)
699 {
700 apply_change_group ();
701 last_insn = change->insn;
702 }
703 validate_change (change->insn, change->loc, change->new_rtx, 1);
704 }
705 apply_change_group ();
706}
707
708/* Called via for_each_rtx, for all used registers in a real
709 insn apply DEBUG_INSN changes that change registers to the
710 used register. */
711
712static int
713cprop_find_used_regs_1 (rtx *loc, void *data)
714{
715 if (REG_P (*loc))
716 {
717 struct value_data *vd = (struct value_data *) data;
718 if (vd->e[REGNO (*loc)].debug_insn_changes)
719 {
720 apply_debug_insn_changes (vd, REGNO (*loc));
721 free_debug_insn_changes (vd, REGNO (*loc));
722 }
723 }
724 return 0;
725}
726
727/* Called via note_uses, for all used registers in a real insn
728 apply DEBUG_INSN changes that change registers to the used
729 registers. */
730
731static void
732cprop_find_used_regs (rtx *loc, void *vd)
733{
734 for_each_rtx (loc, cprop_find_used_regs_1, vd);
735}
736
2d4749b6 737/* Perform the forward copy propagation on basic block BB. */
738
739static bool
740copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
741{
9845d120 742 bool anything_changed = false;
2d4749b6 743 rtx insn;
744
745 for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
746 {
747 int n_ops, i, alt, predicated;
748 bool is_asm, any_replacements;
749 rtx set;
750 bool replaced[MAX_RECOG_OPERANDS];
9845d120 751 bool changed = false;
c8010b80 752 struct kill_set_value_data ksvd;
2d4749b6 753
9845d120 754 if (!NONDEBUG_INSN_P (insn))
2d4749b6 755 {
9845d120 756 if (DEBUG_INSN_P (insn))
757 {
758 rtx loc = INSN_VAR_LOCATION_LOC (insn);
2058ec71 759 if (!VAR_LOC_UNKNOWN_P (loc))
760 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
761 ALL_REGS, GET_MODE (loc),
f8a8fc7b 762 ADDR_SPACE_GENERIC, insn, vd);
9845d120 763 }
764
2d4749b6 765 if (insn == BB_END (bb))
766 break;
767 else
768 continue;
769 }
770
771 set = single_set (insn);
772 extract_insn (insn);
773 if (! constrain_operands (1))
774 fatal_insn_not_found (insn);
775 preprocess_constraints ();
776 alt = which_alternative;
777 n_ops = recog_data.n_operands;
778 is_asm = asm_noperands (PATTERN (insn)) >= 0;
779
780 /* Simplify the code below by rewriting things to reflect
781 matching constraints. Also promote OP_OUT to OP_INOUT
782 in predicated instructions. */
783
784 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
785 for (i = 0; i < n_ops; ++i)
786 {
787 int matches = recog_op_alt[i][alt].matches;
788 if (matches >= 0)
789 recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl;
790 if (matches >= 0 || recog_op_alt[i][alt].matched >= 0
791 || (predicated && recog_data.operand_type[i] == OP_OUT))
792 recog_data.operand_type[i] = OP_INOUT;
793 }
794
2058ec71 795 /* Apply changes to earlier DEBUG_INSNs if possible. */
796 if (vd->n_debug_insn_changes)
797 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
798
2d4749b6 799 /* For each earlyclobber operand, zap the value data. */
800 for (i = 0; i < n_ops; i++)
801 if (recog_op_alt[i][alt].earlyclobber)
802 kill_value (recog_data.operand[i], vd);
803
804 /* Within asms, a clobber cannot overlap inputs or outputs.
805 I wouldn't think this were true for regular insns, but
806 scan_rtx treats them like that... */
807 note_stores (PATTERN (insn), kill_clobbered_value, vd);
808
809 /* Kill all auto-incremented values. */
810 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
811 for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd);
812
813 /* Kill all early-clobbered operands. */
814 for (i = 0; i < n_ops; i++)
815 if (recog_op_alt[i][alt].earlyclobber)
816 kill_value (recog_data.operand[i], vd);
817
818 /* Special-case plain move instructions, since we may well
819 be able to do the move from a different register class. */
820 if (set && REG_P (SET_SRC (set)))
821 {
822 rtx src = SET_SRC (set);
823 unsigned int regno = REGNO (src);
824 enum machine_mode mode = GET_MODE (src);
825 unsigned int i;
826 rtx new_rtx;
827
828 /* If we are accessing SRC in some mode other that what we
829 set it in, make sure that the replacement is valid. */
830 if (mode != vd->e[regno].mode)
831 {
832 if (hard_regno_nregs[regno][mode]
833 > hard_regno_nregs[regno][vd->e[regno].mode])
834 goto no_move_special_case;
417491d1 835
836 /* And likewise, if we are narrowing on big endian the transformation
837 is also invalid. */
838 if (hard_regno_nregs[regno][mode]
839 < hard_regno_nregs[regno][vd->e[regno].mode]
840 && (GET_MODE_SIZE (vd->e[regno].mode) > UNITS_PER_WORD
841 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
842 goto no_move_special_case;
2d4749b6 843 }
844
845 /* If the destination is also a register, try to find a source
846 register in the same class. */
847 if (REG_P (SET_DEST (set)))
848 {
849 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd);
850 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
851 {
852 if (dump_file)
853 fprintf (dump_file,
854 "insn %u: replaced reg %u with %u\n",
855 INSN_UID (insn), regno, REGNO (new_rtx));
856 changed = true;
857 goto did_replacement;
858 }
cc7416ff 859 /* We need to re-extract as validate_change clobbers
860 recog_data. */
861 extract_insn (insn);
862 if (! constrain_operands (1))
863 fatal_insn_not_found (insn);
864 preprocess_constraints ();
2d4749b6 865 }
866
867 /* Otherwise, try all valid registers and see if its valid. */
868 for (i = vd->e[regno].oldest_regno; i != regno;
869 i = vd->e[i].next_regno)
870 {
871 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
872 mode, i, regno);
873 if (new_rtx != NULL_RTX)
874 {
875 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
876 {
877 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
878 REG_ATTRS (new_rtx) = REG_ATTRS (src);
879 REG_POINTER (new_rtx) = REG_POINTER (src);
880 if (dump_file)
881 fprintf (dump_file,
882 "insn %u: replaced reg %u with %u\n",
883 INSN_UID (insn), regno, REGNO (new_rtx));
884 changed = true;
885 goto did_replacement;
886 }
cc7416ff 887 /* We need to re-extract as validate_change clobbers
888 recog_data. */
889 extract_insn (insn);
890 if (! constrain_operands (1))
891 fatal_insn_not_found (insn);
892 preprocess_constraints ();
2d4749b6 893 }
894 }
895 }
896 no_move_special_case:
897
898 any_replacements = false;
899
900 /* For each input operand, replace a hard register with the
901 eldest live copy that's in an appropriate register class. */
902 for (i = 0; i < n_ops; i++)
903 {
904 replaced[i] = false;
905
906 /* Don't scan match_operand here, since we've no reg class
907 information to pass down. Any operands that we could
908 substitute in will be represented elsewhere. */
909 if (recog_data.constraints[i][0] == '\0')
910 continue;
911
912 /* Don't replace in asms intentionally referencing hard regs. */
913 if (is_asm && REG_P (recog_data.operand[i])
914 && (REGNO (recog_data.operand[i])
915 == ORIGINAL_REGNO (recog_data.operand[i])))
916 continue;
917
918 if (recog_data.operand_type[i] == OP_IN)
919 {
920 if (recog_op_alt[i][alt].is_address)
921 replaced[i]
922 = replace_oldest_value_addr (recog_data.operand_loc[i],
923 recog_op_alt[i][alt].cl,
f8a8fc7b 924 VOIDmode, ADDR_SPACE_GENERIC,
925 insn, vd);
2d4749b6 926 else if (REG_P (recog_data.operand[i]))
927 replaced[i]
928 = replace_oldest_value_reg (recog_data.operand_loc[i],
929 recog_op_alt[i][alt].cl,
930 insn, vd);
931 else if (MEM_P (recog_data.operand[i]))
932 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
933 insn, vd);
934 }
935 else if (MEM_P (recog_data.operand[i]))
936 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
937 insn, vd);
938
939 /* If we performed any replacement, update match_dups. */
940 if (replaced[i])
941 {
942 int j;
943 rtx new_rtx;
944
945 new_rtx = *recog_data.operand_loc[i];
946 recog_data.operand[i] = new_rtx;
947 for (j = 0; j < recog_data.n_dups; j++)
948 if (recog_data.dup_num[j] == i)
949 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
950
951 any_replacements = true;
952 }
953 }
954
955 if (any_replacements)
956 {
957 if (! apply_change_group ())
958 {
959 for (i = 0; i < n_ops; i++)
960 if (replaced[i])
961 {
962 rtx old = *recog_data.operand_loc[i];
963 recog_data.operand[i] = old;
964 }
965
966 if (dump_file)
967 fprintf (dump_file,
968 "insn %u: reg replacements not verified\n",
969 INSN_UID (insn));
970 }
971 else
972 changed = true;
973 }
974
975 did_replacement:
9845d120 976 if (changed)
c7458ee3 977 {
978 anything_changed = true;
979
980 /* If something changed, perhaps further changes to earlier
981 DEBUG_INSNs can be applied. */
982 if (vd->n_debug_insn_changes)
983 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
984 }
9845d120 985
c8010b80 986 ksvd.vd = vd;
987 ksvd.ignore_set_reg = NULL_RTX;
988
2d4749b6 989 /* Clobber call-clobbered registers. */
990 if (CALL_P (insn))
c8010b80 991 {
24ec6636 992 unsigned int set_regno = INVALID_REGNUM;
993 unsigned int set_nregs = 0;
994 unsigned int regno;
c8010b80 995 rtx exp;
24ec6636 996 hard_reg_set_iterator hrsi;
997
c8010b80 998 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
999 {
1000 rtx x = XEXP (exp, 0);
1001 if (GET_CODE (x) == SET)
1002 {
1003 rtx dest = SET_DEST (x);
1004 kill_value (dest, vd);
1005 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1006 copy_value (dest, SET_SRC (x), vd);
1007 ksvd.ignore_set_reg = dest;
1008 set_regno = REGNO (dest);
1009 set_nregs
1010 = hard_regno_nregs[set_regno][GET_MODE (dest)];
1011 break;
1012 }
1013 }
24ec6636 1014
1015 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, 0, regno, hrsi)
1016 if (regno < set_regno || regno >= set_regno + set_nregs)
1017 kill_value_regno (regno, 1, vd);
ca719585 1018
1019 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
1020 of the SET isn't in regs_invalidated_by_call hard reg set,
1021 but instead among CLOBBERs on the CALL_INSN, we could wrongly
1022 assume the value in it is still live. */
1023 if (ksvd.ignore_set_reg)
1024 note_stores (PATTERN (insn), kill_clobbered_value, vd);
c8010b80 1025 }
2d4749b6 1026
1027 /* Notice stores. */
c8010b80 1028 note_stores (PATTERN (insn), kill_set_value, &ksvd);
2d4749b6 1029
1030 /* Notice copies. */
1031 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
1032 copy_value (SET_DEST (set), SET_SRC (set), vd);
1033
1034 if (insn == BB_END (bb))
1035 break;
1036 }
1037
9845d120 1038 return anything_changed;
2d4749b6 1039}
1040
1041/* Main entry point for the forward copy propagation optimization. */
1042
1043static unsigned int
1044copyprop_hardreg_forward (void)
1045{
1046 struct value_data *all_vd;
1047 basic_block bb;
1048 sbitmap visited;
2058ec71 1049 bool analyze_called = false;
2d4749b6 1050
1051 all_vd = XNEWVEC (struct value_data, last_basic_block);
1052
1053 visited = sbitmap_alloc (last_basic_block);
53c5d9d4 1054 bitmap_clear (visited);
2d4749b6 1055
6d31b223 1056 if (MAY_HAVE_DEBUG_INSNS)
2058ec71 1057 debug_insn_changes_pool
1058 = create_alloc_pool ("debug insn changes pool",
1059 sizeof (struct queued_debug_insn_change), 256);
1060
2d4749b6 1061 FOR_EACH_BB (bb)
1062 {
08b7917c 1063 bitmap_set_bit (visited, bb->index);
2d4749b6 1064
1065 /* If a block has a single predecessor, that we've already
1066 processed, begin with the value data that was live at
1067 the end of the predecessor block. */
1068 /* ??? Ought to use more intelligent queuing of blocks. */
48e1416a 1069 if (single_pred_p (bb)
08b7917c 1070 && bitmap_bit_p (visited, single_pred (bb)->index)
2d4749b6 1071 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
2058ec71 1072 {
1073 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1074 if (all_vd[bb->index].n_debug_insn_changes)
1075 {
1076 unsigned int regno;
1077
1078 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1079 {
1080 if (all_vd[bb->index].e[regno].debug_insn_changes)
1081 {
1082 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1083 if (--all_vd[bb->index].n_debug_insn_changes == 0)
1084 break;
1085 }
1086 }
1087 }
1088 }
2d4749b6 1089 else
1090 init_value_data (all_vd + bb->index);
1091
1092 copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1093 }
1094
6d31b223 1095 if (MAY_HAVE_DEBUG_INSNS)
2058ec71 1096 {
1097 FOR_EACH_BB (bb)
08b7917c 1098 if (bitmap_bit_p (visited, bb->index)
2058ec71 1099 && all_vd[bb->index].n_debug_insn_changes)
1100 {
1101 unsigned int regno;
1102 bitmap live;
1103
1104 if (!analyze_called)
1105 {
1106 df_analyze ();
1107 analyze_called = true;
1108 }
1109 live = df_get_live_out (bb);
1110 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1111 if (all_vd[bb->index].e[regno].debug_insn_changes)
1112 {
1113 if (REGNO_REG_SET_P (live, regno))
1114 apply_debug_insn_changes (all_vd + bb->index, regno);
1115 if (all_vd[bb->index].n_debug_insn_changes == 0)
1116 break;
1117 }
1118 }
1119
1120 free_alloc_pool (debug_insn_changes_pool);
1121 }
1122
48e1416a 1123 sbitmap_free (visited);
2d4749b6 1124 free (all_vd);
1125 return 0;
1126}
1127
1128/* Dump the value chain data to stderr. */
1129
4b987fac 1130DEBUG_FUNCTION void
2d4749b6 1131debug_value_data (struct value_data *vd)
1132{
1133 HARD_REG_SET set;
1134 unsigned int i, j;
1135
1136 CLEAR_HARD_REG_SET (set);
1137
1138 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1139 if (vd->e[i].oldest_regno == i)
1140 {
1141 if (vd->e[i].mode == VOIDmode)
1142 {
1143 if (vd->e[i].next_regno != INVALID_REGNUM)
1144 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1145 i, vd->e[i].next_regno);
1146 continue;
1147 }
1148
1149 SET_HARD_REG_BIT (set, i);
1150 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1151
1152 for (j = vd->e[i].next_regno;
1153 j != INVALID_REGNUM;
1154 j = vd->e[j].next_regno)
1155 {
1156 if (TEST_HARD_REG_BIT (set, j))
1157 {
1158 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1159 return;
1160 }
1161
1162 if (vd->e[j].oldest_regno != i)
1163 {
1164 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1165 j, vd->e[j].oldest_regno);
1166 return;
1167 }
1168 SET_HARD_REG_BIT (set, j);
1169 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1170 }
1171 fputc ('\n', stderr);
1172 }
1173
1174 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1175 if (! TEST_HARD_REG_BIT (set, i)
1176 && (vd->e[i].mode != VOIDmode
1177 || vd->e[i].oldest_regno != i
1178 || vd->e[i].next_regno != INVALID_REGNUM))
1179 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1180 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1181 vd->e[i].next_regno);
1182}
1183
1184#ifdef ENABLE_CHECKING
1185static void
1186validate_value_data (struct value_data *vd)
1187{
1188 HARD_REG_SET set;
1189 unsigned int i, j;
1190
1191 CLEAR_HARD_REG_SET (set);
1192
1193 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1194 if (vd->e[i].oldest_regno == i)
1195 {
1196 if (vd->e[i].mode == VOIDmode)
1197 {
1198 if (vd->e[i].next_regno != INVALID_REGNUM)
1199 internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)",
1200 i, vd->e[i].next_regno);
1201 continue;
1202 }
1203
1204 SET_HARD_REG_BIT (set, i);
1205
1206 for (j = vd->e[i].next_regno;
1207 j != INVALID_REGNUM;
1208 j = vd->e[j].next_regno)
1209 {
1210 if (TEST_HARD_REG_BIT (set, j))
1211 internal_error ("validate_value_data: Loop in regno chain (%u)",
1212 j);
1213 if (vd->e[j].oldest_regno != i)
1214 internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)",
1215 j, vd->e[j].oldest_regno);
1216
1217 SET_HARD_REG_BIT (set, j);
1218 }
1219 }
1220
1221 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1222 if (! TEST_HARD_REG_BIT (set, i)
1223 && (vd->e[i].mode != VOIDmode
1224 || vd->e[i].oldest_regno != i
1225 || vd->e[i].next_regno != INVALID_REGNUM))
1226 internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)",
1227 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1228 vd->e[i].next_regno);
1229}
1230#endif
1231\f
1232static bool
1233gate_handle_cprop (void)
1234{
1235 return (optimize > 0 && (flag_cprop_registers));
1236}
1237
1238
cbe8bda8 1239namespace {
1240
1241const pass_data pass_data_cprop_hardreg =
2d4749b6 1242{
cbe8bda8 1243 RTL_PASS, /* type */
1244 "cprop_hardreg", /* name */
1245 OPTGROUP_NONE, /* optinfo_flags */
1246 true, /* has_gate */
1247 true, /* has_execute */
1248 TV_CPROP_REGISTERS, /* tv_id */
1249 0, /* properties_required */
1250 0, /* properties_provided */
1251 0, /* properties_destroyed */
1252 0, /* todo_flags_start */
1253 ( TODO_df_finish | TODO_verify_rtl_sharing ), /* todo_flags_finish */
2d4749b6 1254};
cbe8bda8 1255
1256class pass_cprop_hardreg : public rtl_opt_pass
1257{
1258public:
1259 pass_cprop_hardreg(gcc::context *ctxt)
1260 : rtl_opt_pass(pass_data_cprop_hardreg, ctxt)
1261 {}
1262
1263 /* opt_pass methods: */
1264 bool gate () { return gate_handle_cprop (); }
1265 unsigned int execute () { return copyprop_hardreg_forward (); }
1266
1267}; // class pass_cprop_hardreg
1268
1269} // anon namespace
1270
1271rtl_opt_pass *
1272make_pass_cprop_hardreg (gcc::context *ctxt)
1273{
1274 return new pass_cprop_hardreg (ctxt);
1275}