]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/regcprop.c
Daily bump.
[thirdparty/gcc.git] / gcc / regcprop.c
CommitLineData
fac41238 1/* Copy propagation on hard registers for the GNU compiler.
99dee823 2 Copyright (C) 2000-2021 Free Software Foundation, Inc.
fac41238
PB
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
c7131fb2 23#include "backend.h"
fac41238 24#include "rtl.h"
c7131fb2 25#include "df.h"
4d0cdd0c 26#include "memmodel.h"
fac41238
PB
27#include "tm_p.h"
28#include "insn-config.h"
29#include "regs.h"
957060b5
AM
30#include "emit-rtl.h"
31#include "recog.h"
32#include "diagnostic-core.h"
fac41238 33#include "addresses.h"
fac41238 34#include "tree-pass.h"
4ca738b3 35#include "rtl-iter.h"
c049b107 36#include "cfgrtl.h"
80ec73f4 37#include "target.h"
5a5a3bc5 38#include "function-abi.h"
fac41238
PB
39
40/* The following code does forward propagation of hard register copies.
41 The object is to eliminate as many dependencies as possible, so that
42 we have the most scheduling freedom. As a side effect, we also clean
43 up some silly register allocation decisions made by reload. This
44 code may be obsoleted by a new register allocator. */
45
e7140c8d
JJ
46/* DEBUG_INSNs aren't changed right away, as doing so might extend the
47 lifetime of a register and get the DEBUG_INSN subsequently reset.
48 So they are queued instead, and updated only when the register is
49 used in some subsequent real insn before it is set. */
50struct queued_debug_insn_change
51{
52 struct queued_debug_insn_change *next;
ea8175a4 53 rtx_insn *insn;
e7140c8d
JJ
54 rtx *loc;
55 rtx new_rtx;
56};
57
fac41238
PB
58/* For each register, we have a list of registers that contain the same
59 value. The OLDEST_REGNO field points to the head of the list, and
60 the NEXT_REGNO field runs through the list. The MODE field indicates
61 what mode the data is known to be in; this field is VOIDmode when the
62 register is not known to contain valid data. */
63
64struct value_data_entry
65{
ef4bddc2 66 machine_mode mode;
fac41238
PB
67 unsigned int oldest_regno;
68 unsigned int next_regno;
e7140c8d 69 struct queued_debug_insn_change *debug_insn_changes;
fac41238
PB
70};
71
72struct value_data
73{
74 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
75 unsigned int max_value_regs;
e7140c8d 76 unsigned int n_debug_insn_changes;
fac41238
PB
77};
78
fb0b2914 79static object_allocator<queued_debug_insn_change> queued_debug_insn_change_pool
fcb87c50 80 ("debug insn changes pool");
5c7337c5 81
a2e6c10c 82static bool skip_debug_insn_p;
e7140c8d 83
fac41238
PB
84static void kill_value_one_regno (unsigned, struct value_data *);
85static void kill_value_regno (unsigned, unsigned, struct value_data *);
4ca738b3 86static void kill_value (const_rtx, struct value_data *);
ef4bddc2 87static void set_value_regno (unsigned, machine_mode, struct value_data *);
fac41238
PB
88static void init_value_data (struct value_data *);
89static void kill_clobbered_value (rtx, const_rtx, void *);
90static void kill_set_value (rtx, const_rtx, void *);
fac41238 91static void copy_value (rtx, rtx, struct value_data *);
ef4bddc2 92static bool mode_change_ok (machine_mode, machine_mode,
fac41238 93 unsigned int);
ef4bddc2
RS
94static rtx maybe_mode_change (machine_mode, machine_mode,
95 machine_mode, unsigned int, unsigned int);
fac41238 96static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
ea8175a4 97static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
fac41238
PB
98 struct value_data *);
99static bool replace_oldest_value_addr (rtx *, enum reg_class,
ef4bddc2 100 machine_mode, addr_space_t,
ea8175a4
DM
101 rtx_insn *, struct value_data *);
102static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
fac41238
PB
103static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
104extern void debug_value_data (struct value_data *);
fac41238 105static void validate_value_data (struct value_data *);
fac41238 106
e7140c8d
JJ
107/* Free all queued updates for DEBUG_INSNs that change some reg to
108 register REGNO. */
109
110static void
111free_debug_insn_changes (struct value_data *vd, unsigned int regno)
112{
113 struct queued_debug_insn_change *cur, *next;
114 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
115 {
116 next = cur->next;
117 --vd->n_debug_insn_changes;
fb0b2914 118 queued_debug_insn_change_pool.remove (cur);
e7140c8d
JJ
119 }
120 vd->e[regno].debug_insn_changes = NULL;
121}
122
fac41238
PB
123/* Kill register REGNO. This involves removing it from any value
124 lists, and resetting the value mode to VOIDmode. This is only a
125 helper function; it does not handle any hard registers overlapping
126 with REGNO. */
127
128static void
129kill_value_one_regno (unsigned int regno, struct value_data *vd)
130{
131 unsigned int i, next;
132
133 if (vd->e[regno].oldest_regno != regno)
134 {
135 for (i = vd->e[regno].oldest_regno;
136 vd->e[i].next_regno != regno;
137 i = vd->e[i].next_regno)
138 continue;
139 vd->e[i].next_regno = vd->e[regno].next_regno;
140 }
141 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
142 {
143 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
144 vd->e[i].oldest_regno = next;
145 }
146
147 vd->e[regno].mode = VOIDmode;
148 vd->e[regno].oldest_regno = regno;
149 vd->e[regno].next_regno = INVALID_REGNUM;
e7140c8d
JJ
150 if (vd->e[regno].debug_insn_changes)
151 free_debug_insn_changes (vd, regno);
fac41238 152
b2b29377
MM
153 if (flag_checking)
154 validate_value_data (vd);
fac41238
PB
155}
156
157/* Kill the value in register REGNO for NREGS, and any other registers
158 whose values overlap. */
159
160static void
161kill_value_regno (unsigned int regno, unsigned int nregs,
162 struct value_data *vd)
163{
164 unsigned int j;
165
166 /* Kill the value we're told to kill. */
167 for (j = 0; j < nregs; ++j)
168 kill_value_one_regno (regno + j, vd);
169
170 /* Kill everything that overlapped what we're told to kill. */
171 if (regno < vd->max_value_regs)
172 j = 0;
173 else
174 j = regno - vd->max_value_regs;
175 for (; j < regno; ++j)
176 {
177 unsigned int i, n;
178 if (vd->e[j].mode == VOIDmode)
179 continue;
ad474626 180 n = hard_regno_nregs (j, vd->e[j].mode);
fac41238
PB
181 if (j + n > regno)
182 for (i = 0; i < n; ++i)
183 kill_value_one_regno (j + i, vd);
184 }
185}
186
187/* Kill X. This is a convenience function wrapping kill_value_regno
188 so that we mind the mode the register is in. */
189
190static void
4ca738b3 191kill_value (const_rtx x, struct value_data *vd)
fac41238 192{
fac41238
PB
193 if (GET_CODE (x) == SUBREG)
194 {
4ca738b3
RS
195 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
196 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
197 x = tmp ? tmp : SUBREG_REG (x);
fac41238
PB
198 }
199 if (REG_P (x))
dc8afb70 200 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
fac41238
PB
201}
202
203/* Remember that REGNO is valid in MODE. */
204
205static void
ef4bddc2 206set_value_regno (unsigned int regno, machine_mode mode,
fac41238
PB
207 struct value_data *vd)
208{
209 unsigned int nregs;
210
211 vd->e[regno].mode = mode;
212
ad474626 213 nregs = hard_regno_nregs (regno, mode);
fac41238
PB
214 if (nregs > vd->max_value_regs)
215 vd->max_value_regs = nregs;
216}
217
218/* Initialize VD such that there are no known relationships between regs. */
219
220static void
221init_value_data (struct value_data *vd)
222{
223 int i;
224 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
225 {
226 vd->e[i].mode = VOIDmode;
227 vd->e[i].oldest_regno = i;
228 vd->e[i].next_regno = INVALID_REGNUM;
e7140c8d 229 vd->e[i].debug_insn_changes = NULL;
fac41238
PB
230 }
231 vd->max_value_regs = 0;
e7140c8d 232 vd->n_debug_insn_changes = 0;
fac41238
PB
233}
234
235/* Called through note_stores. If X is clobbered, kill its value. */
236
237static void
238kill_clobbered_value (rtx x, const_rtx set, void *data)
239{
240 struct value_data *const vd = (struct value_data *) data;
8df47bdf 241
17d184e5 242 if (GET_CODE (set) == CLOBBER)
fac41238
PB
243 kill_value (x, vd);
244}
245
e384e6b5
BS
246/* A structure passed as data to kill_set_value through note_stores. */
247struct kill_set_value_data
248{
249 struct value_data *vd;
250 rtx ignore_set_reg;
251};
252
fac41238
PB
253/* Called through note_stores. If X is set, not clobbered, kill its
254 current value and install it as the root of its own value list. */
255
256static void
257kill_set_value (rtx x, const_rtx set, void *data)
258{
e384e6b5
BS
259 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
260 if (rtx_equal_p (x, ksvd->ignore_set_reg))
261 return;
8df47bdf 262
17d184e5 263 if (GET_CODE (set) != CLOBBER)
fac41238 264 {
e384e6b5 265 kill_value (x, ksvd->vd);
fac41238 266 if (REG_P (x))
e384e6b5 267 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
fac41238
PB
268 }
269}
270
4ca738b3
RS
271/* Kill any register used in X as the base of an auto-increment expression,
272 and install that register as the root of its own value list. */
fac41238 273
4ca738b3 274static void
15cd50fb 275kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
fac41238 276{
4ca738b3
RS
277 subrtx_iterator::array_type array;
278 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
fac41238 279 {
4ca738b3
RS
280 const_rtx x = *iter;
281 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
282 {
283 x = XEXP (x, 0);
284 kill_value (x, vd);
285 set_value_regno (REGNO (x), GET_MODE (x), vd);
286 iter.skip_subrtxes ();
287 }
fac41238 288 }
fac41238
PB
289}
290
291/* Assert that SRC has been copied to DEST. Adjust the data structures
292 to reflect that SRC contains an older copy of the shared value. */
293
294static void
295copy_value (rtx dest, rtx src, struct value_data *vd)
296{
297 unsigned int dr = REGNO (dest);
298 unsigned int sr = REGNO (src);
299 unsigned int dn, sn;
300 unsigned int i;
301
302 /* ??? At present, it's possible to see noop sets. It'd be nice if
303 this were cleaned up beforehand... */
304 if (sr == dr)
305 return;
306
307 /* Do not propagate copies to the stack pointer, as that can leave
308 memory accesses with no scheduling dependency on the stack update. */
309 if (dr == STACK_POINTER_REGNUM)
310 return;
311
312 /* Likewise with the frame pointer, if we're using one. */
313 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
314 return;
315
316 /* Do not propagate copies to fixed or global registers, patterns
317 can be relying to see particular fixed register or users can
318 expect the chosen global register in asm. */
319 if (fixed_regs[dr] || global_regs[dr])
320 return;
321
322 /* If SRC and DEST overlap, don't record anything. */
dc8afb70
RS
323 dn = REG_NREGS (dest);
324 sn = REG_NREGS (src);
fac41238
PB
325 if ((dr > sr && dr < sr + sn)
326 || (sr > dr && sr < dr + dn))
327 return;
328
329 /* If SRC had no assigned mode (i.e. we didn't know it was live)
330 assign it now and assume the value came from an input argument
331 or somesuch. */
332 if (vd->e[sr].mode == VOIDmode)
333 set_value_regno (sr, vd->e[dr].mode, vd);
334
335 /* If we are narrowing the input to a smaller number of hard regs,
336 and it is in big endian, we are really extracting a high part.
337 Since we generally associate a low part of a value with the value itself,
338 we must not do the same for the high part.
339 Note we can still get low parts for the same mode combination through
340 a two-step copy involving differently sized hard regs.
026c3cfd 341 Assume hard regs fr* are 32 bits each, while r* are 64 bits each:
fac41238
PB
342 (set (reg:DI r0) (reg:DI fr0))
343 (set (reg:SI fr2) (reg:SI r0))
344 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
345 (set (reg:SI fr2) (reg:SI fr0))
346 loads the high part of (reg:DI fr0) into fr2.
347
348 We can't properly represent the latter case in our tables, so don't
349 record anything then. */
ad474626 350 else if (sn < hard_regno_nregs (sr, vd->e[sr].mode)
91914e56
RS
351 && maybe_ne (subreg_lowpart_offset (GET_MODE (dest),
352 vd->e[sr].mode), 0U))
fac41238
PB
353 return;
354
355 /* If SRC had been assigned a mode narrower than the copy, we can't
356 link DEST into the chain, because not all of the pieces of the
357 copy came from oldest_regno. */
ad474626 358 else if (sn > hard_regno_nregs (sr, vd->e[sr].mode))
fac41238
PB
359 return;
360
e711b67a 361 /* It is not safe to link DEST into the chain if SRC was defined in some
362 narrower mode M and if M is also narrower than the mode of the first
363 register in the chain. For example:
364 (set (reg:DI r1) (reg:DI r0))
365 (set (reg:HI r2) (reg:HI r1))
366 (set (reg:SI r3) (reg:SI r2)) //Should be a new chain start at r3
367 (set (reg:SI r4) (reg:SI r1))
368 (set (reg:SI r5) (reg:SI r4))
369
370 the upper part of r3 is undefined. If we added it to the chain,
371 it may be used to replace r5, which has defined upper bits.
372 See PR98694 for details.
373
374 [A] partial_subreg_p (vd->e[sr].mode, GET_MODE (src))
375 [B] partial_subreg_p (vd->e[sr].mode, vd->e[vd->e[sr].oldest_regno].mode)
376 Condition B is added to to catch optimization opportunities of
377
378 (set (reg:HI R1) (reg:HI R0))
379 (set (reg:SI R2) (reg:SI R1)) // [A]
380 (set (reg:DI R3) (reg:DI R2)) // [A]
381 (set (reg:SI R4) (reg:SI R[0-3]))
382 (set (reg:HI R5) (reg:HI R[0-4]))
383
384 in which all registers have only 16 defined bits. */
385 else if (partial_subreg_p (vd->e[sr].mode, GET_MODE (src))
386 && partial_subreg_p (vd->e[sr].mode,
387 vd->e[vd->e[sr].oldest_regno].mode))
388 return;
389
fac41238
PB
390 /* Link DR at the end of the value chain used by SR. */
391
392 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
393
394 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
395 continue;
396 vd->e[i].next_regno = dr;
397
b2b29377
MM
398 if (flag_checking)
399 validate_value_data (vd);
fac41238
PB
400}
401
402/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
403
404static bool
ef4bddc2 405mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
fac41238
PB
406 unsigned int regno ATTRIBUTE_UNUSED)
407{
bd4288c0 408 if (partial_subreg_p (orig_mode, new_mode))
fac41238
PB
409 return false;
410
0d803030 411 return REG_CAN_CHANGE_MODE_P (regno, orig_mode, new_mode);
fac41238
PB
412}
413
414/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
415 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
416 in NEW_MODE.
417 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
418
419static rtx
ef4bddc2
RS
420maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
421 machine_mode new_mode, unsigned int regno,
fac41238
PB
422 unsigned int copy_regno ATTRIBUTE_UNUSED)
423{
bd4288c0
RS
424 if (partial_subreg_p (copy_mode, orig_mode)
425 && partial_subreg_p (copy_mode, new_mode))
fac41238
PB
426 return NULL_RTX;
427
d1446456
JL
428 /* Avoid creating multiple copies of the stack pointer. Some ports
429 assume there is one and only one stack pointer.
430
431 It's unclear if we need to do the same for other special registers. */
432 if (regno == STACK_POINTER_REGNUM)
433 return NULL_RTX;
434
fac41238 435 if (orig_mode == new_mode)
9fccb335 436 return gen_raw_REG (new_mode, regno);
fac41238
PB
437 else if (mode_change_ok (orig_mode, new_mode, regno))
438 {
ad474626
RS
439 int copy_nregs = hard_regno_nregs (copy_regno, copy_mode);
440 int use_nregs = hard_regno_nregs (copy_regno, new_mode);
cf098191
RS
441 poly_uint64 bytes_per_reg;
442 if (!can_div_trunc_p (GET_MODE_SIZE (copy_mode),
443 copy_nregs, &bytes_per_reg))
444 return NULL_RTX;
445 poly_uint64 copy_offset = bytes_per_reg * (copy_nregs - use_nregs);
91914e56 446 poly_uint64 offset
e10326ff
RS
447 = subreg_size_lowpart_offset (GET_MODE_SIZE (new_mode) + copy_offset,
448 GET_MODE_SIZE (orig_mode));
d6f23738 449 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
f939c3e6 450 if (targetm.hard_regno_mode_ok (regno, new_mode))
9fccb335 451 return gen_raw_REG (new_mode, regno);
fac41238
PB
452 }
453 return NULL_RTX;
454}
455
456/* Find the oldest copy of the value contained in REGNO that is in
457 register class CL and has mode MODE. If found, return an rtx
458 of that oldest register, otherwise return NULL. */
459
460static rtx
461find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
462{
463 unsigned int regno = REGNO (reg);
ef4bddc2 464 machine_mode mode = GET_MODE (reg);
fac41238
PB
465 unsigned int i;
466
65f4b875
AO
467 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
468
fac41238
PB
469 /* If we are accessing REG in some mode other that what we set it in,
470 make sure that the replacement is valid. In particular, consider
471 (set (reg:DI r11) (...))
472 (set (reg:SI r9) (reg:SI r11))
473 (set (reg:SI r10) (...))
474 (set (...) (reg:DI r9))
475 Replacing r9 with r11 is invalid. */
462a99aa 476 if (mode != vd->e[regno].mode
a28cc94a
SSF
477 && (REG_NREGS (reg) > hard_regno_nregs (regno, vd->e[regno].mode)
478 || !REG_CAN_CHANGE_MODE_P (regno, mode, vd->e[regno].mode)))
462a99aa 479 return NULL_RTX;
fac41238
PB
480
481 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
482 {
ef4bddc2 483 machine_mode oldmode = vd->e[i].mode;
fac41238
PB
484 rtx new_rtx;
485
486 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
f90333eb 487 continue;
fac41238
PB
488
489 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
490 if (new_rtx)
491 {
492 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
493 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
494 REG_POINTER (new_rtx) = REG_POINTER (reg);
495 return new_rtx;
496 }
497 }
498
499 return NULL_RTX;
500}
501
502/* If possible, replace the register at *LOC with the oldest register
503 in register class CL. Return true if successfully replaced. */
504
505static bool
ea8175a4 506replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
fac41238
PB
507 struct value_data *vd)
508{
509 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
a2e6c10c 510 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
fac41238 511 {
e7140c8d
JJ
512 if (DEBUG_INSN_P (insn))
513 {
514 struct queued_debug_insn_change *change;
515
516 if (dump_file)
517 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
518 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
519
fb0b2914 520 change = queued_debug_insn_change_pool.allocate ();
e7140c8d
JJ
521 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
522 change->insn = insn;
523 change->loc = loc;
524 change->new_rtx = new_rtx;
525 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
526 ++vd->n_debug_insn_changes;
527 return true;
528 }
fac41238
PB
529 if (dump_file)
530 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
531 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
532
533 validate_change (insn, loc, new_rtx, 1);
534 return true;
535 }
536 return false;
537}
538
539/* Similar to replace_oldest_value_reg, but *LOC contains an address.
540 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
541 BASE_REG_CLASS depending on how the register is being considered. */
542
543static bool
544replace_oldest_value_addr (rtx *loc, enum reg_class cl,
ef4bddc2 545 machine_mode mode, addr_space_t as,
ea8175a4 546 rtx_insn *insn, struct value_data *vd)
fac41238
PB
547{
548 rtx x = *loc;
549 RTX_CODE code = GET_CODE (x);
550 const char *fmt;
551 int i, j;
552 bool changed = false;
553
554 switch (code)
555 {
556 case PLUS:
b5b8b0ac
AO
557 if (DEBUG_INSN_P (insn))
558 break;
559
fac41238
PB
560 {
561 rtx orig_op0 = XEXP (x, 0);
562 rtx orig_op1 = XEXP (x, 1);
563 RTX_CODE code0 = GET_CODE (orig_op0);
564 RTX_CODE code1 = GET_CODE (orig_op1);
565 rtx op0 = orig_op0;
566 rtx op1 = orig_op1;
567 rtx *locI = NULL;
568 rtx *locB = NULL;
569 enum rtx_code index_code = SCRATCH;
570
571 if (GET_CODE (op0) == SUBREG)
572 {
573 op0 = SUBREG_REG (op0);
574 code0 = GET_CODE (op0);
575 }
576
577 if (GET_CODE (op1) == SUBREG)
578 {
579 op1 = SUBREG_REG (op1);
580 code1 = GET_CODE (op1);
581 }
582
583 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
584 || code0 == ZERO_EXTEND || code1 == MEM)
585 {
586 locI = &XEXP (x, 0);
587 locB = &XEXP (x, 1);
588 index_code = GET_CODE (*locI);
589 }
590 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
591 || code1 == ZERO_EXTEND || code0 == MEM)
592 {
593 locI = &XEXP (x, 1);
594 locB = &XEXP (x, 0);
595 index_code = GET_CODE (*locI);
596 }
597 else if (code0 == CONST_INT || code0 == CONST
598 || code0 == SYMBOL_REF || code0 == LABEL_REF)
599 {
600 locB = &XEXP (x, 1);
601 index_code = GET_CODE (XEXP (x, 0));
602 }
603 else if (code1 == CONST_INT || code1 == CONST
604 || code1 == SYMBOL_REF || code1 == LABEL_REF)
605 {
606 locB = &XEXP (x, 0);
607 index_code = GET_CODE (XEXP (x, 1));
608 }
609 else if (code0 == REG && code1 == REG)
610 {
611 int index_op;
612 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
613
614 if (REGNO_OK_FOR_INDEX_P (regno1)
86fc3d06 615 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
fac41238
PB
616 index_op = 1;
617 else if (REGNO_OK_FOR_INDEX_P (regno0)
86fc3d06 618 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238 619 index_op = 0;
86fc3d06 620 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
fac41238
PB
621 || REGNO_OK_FOR_INDEX_P (regno1))
622 index_op = 1;
86fc3d06 623 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238
PB
624 index_op = 0;
625 else
626 index_op = 1;
627
628 locI = &XEXP (x, index_op);
629 locB = &XEXP (x, !index_op);
630 index_code = GET_CODE (*locI);
631 }
632 else if (code0 == REG)
633 {
634 locI = &XEXP (x, 0);
635 locB = &XEXP (x, 1);
636 index_code = GET_CODE (*locI);
637 }
638 else if (code1 == REG)
639 {
640 locI = &XEXP (x, 1);
641 locB = &XEXP (x, 0);
642 index_code = GET_CODE (*locI);
643 }
644
645 if (locI)
86fc3d06
UW
646 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
647 mode, as, insn, vd);
fac41238
PB
648 if (locB)
649 changed |= replace_oldest_value_addr (locB,
86fc3d06 650 base_reg_class (mode, as, PLUS,
fac41238 651 index_code),
86fc3d06 652 mode, as, insn, vd);
fac41238
PB
653 return changed;
654 }
655
656 case POST_INC:
657 case POST_DEC:
658 case POST_MODIFY:
659 case PRE_INC:
660 case PRE_DEC:
661 case PRE_MODIFY:
662 return false;
663
664 case MEM:
665 return replace_oldest_value_mem (x, insn, vd);
666
667 case REG:
668 return replace_oldest_value_reg (loc, cl, insn, vd);
669
670 default:
671 break;
672 }
673
674 fmt = GET_RTX_FORMAT (code);
675 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
676 {
677 if (fmt[i] == 'e')
86fc3d06 678 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
fac41238
PB
679 insn, vd);
680 else if (fmt[i] == 'E')
681 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
682 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
86fc3d06 683 mode, as, insn, vd);
fac41238
PB
684 }
685
686 return changed;
687}
688
689/* Similar to replace_oldest_value_reg, but X contains a memory. */
690
691static bool
ea8175a4 692replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
fac41238 693{
b5b8b0ac
AO
694 enum reg_class cl;
695
696 if (DEBUG_INSN_P (insn))
697 cl = ALL_REGS;
698 else
86fc3d06 699 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
b5b8b0ac
AO
700
701 return replace_oldest_value_addr (&XEXP (x, 0), cl,
86fc3d06
UW
702 GET_MODE (x), MEM_ADDR_SPACE (x),
703 insn, vd);
fac41238
PB
704}
705
e7140c8d
JJ
706/* Apply all queued updates for DEBUG_INSNs that change some reg to
707 register REGNO. */
708
709static void
710apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
711{
712 struct queued_debug_insn_change *change;
ea8175a4 713 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
e7140c8d
JJ
714
715 for (change = vd->e[regno].debug_insn_changes;
716 change;
717 change = change->next)
718 {
719 if (last_insn != change->insn)
720 {
721 apply_change_group ();
722 last_insn = change->insn;
723 }
724 validate_change (change->insn, change->loc, change->new_rtx, 1);
725 }
726 apply_change_group ();
727}
728
e7140c8d
JJ
729/* Called via note_uses, for all used registers in a real insn
730 apply DEBUG_INSN changes that change registers to the used
731 registers. */
732
733static void
0d2e76b8 734cprop_find_used_regs (rtx *loc, void *data)
e7140c8d 735{
0d2e76b8
RS
736 struct value_data *const vd = (struct value_data *) data;
737 subrtx_iterator::array_type array;
738 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
739 {
740 const_rtx x = *iter;
741 if (REG_P (x))
742 {
743 unsigned int regno = REGNO (x);
744 if (vd->e[regno].debug_insn_changes)
745 {
746 apply_debug_insn_changes (vd, regno);
747 free_debug_insn_changes (vd, regno);
748 }
749 }
750 }
e7140c8d
JJ
751}
752
486b97f2
TV
753/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
754
755static void
756kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
757{
e8448ba5 758 note_stores (insn, kill_clobbered_value, vd);
486b97f2
TV
759}
760
fac41238
PB
761/* Perform the forward copy propagation on basic block BB. */
762
763static bool
764copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
765{
b5b8b0ac 766 bool anything_changed = false;
c049b107 767 rtx_insn *insn, *next;
fac41238 768
c049b107 769 for (insn = BB_HEAD (bb); ; insn = next)
fac41238 770 {
29d70a0f 771 int n_ops, i, predicated;
fac41238
PB
772 bool is_asm, any_replacements;
773 rtx set;
c34fb198 774 rtx link;
b5b8b0ac 775 bool changed = false;
e384e6b5 776 struct kill_set_value_data ksvd;
fac41238 777
c049b107 778 next = NEXT_INSN (insn);
b5b8b0ac 779 if (!NONDEBUG_INSN_P (insn))
fac41238 780 {
36f52e8f 781 if (DEBUG_BIND_INSN_P (insn))
b5b8b0ac
AO
782 {
783 rtx loc = INSN_VAR_LOCATION_LOC (insn);
e7140c8d
JJ
784 if (!VAR_LOC_UNKNOWN_P (loc))
785 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
786 ALL_REGS, GET_MODE (loc),
86fc3d06 787 ADDR_SPACE_GENERIC, insn, vd);
b5b8b0ac
AO
788 }
789
fac41238
PB
790 if (insn == BB_END (bb))
791 break;
792 else
793 continue;
794 }
795
796 set = single_set (insn);
d6da226a
JH
797
798 /* Detect noop sets and remove them before processing side effects. */
799 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
800 {
801 unsigned int regno = REGNO (SET_SRC (set));
802 rtx r1 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
803 SET_DEST (set), vd);
804 rtx r2 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
805 SET_SRC (set), vd);
806 if (rtx_equal_p (r1 ? r1 : SET_DEST (set), r2 ? r2 : SET_SRC (set)))
807 {
808 bool last = insn == BB_END (bb);
d6da226a
JH
809 delete_insn (insn);
810 if (last)
811 break;
812 continue;
813 }
814 }
815
f73675e3
JL
816 /* Detect obviously dead sets (via REG_UNUSED notes) and remove them. */
817 if (set
4dd11305 818 && !RTX_FRAME_RELATED_P (insn)
52295c2d 819 && !may_trap_p (set)
f73675e3
JL
820 && find_reg_note (insn, REG_UNUSED, SET_DEST (set))
821 && !side_effects_p (SET_SRC (set))
822 && !side_effects_p (SET_DEST (set)))
823 {
824 bool last = insn == BB_END (bb);
825 delete_insn (insn);
826 if (last)
827 break;
828 continue;
829 }
830
831
75d25a02 832 extract_constrain_insn (insn);
1145837d 833 preprocess_constraints (insn);
5efe5dec 834 const operand_alternative *op_alt = which_op_alt ();
fac41238
PB
835 n_ops = recog_data.n_operands;
836 is_asm = asm_noperands (PATTERN (insn)) >= 0;
837
5efe5dec 838 /* Simplify the code below by promoting OP_OUT to OP_INOUT
fac41238
PB
839 in predicated instructions. */
840
841 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
842 for (i = 0; i < n_ops; ++i)
843 {
29d70a0f 844 int matches = op_alt[i].matches;
29d70a0f 845 if (matches >= 0 || op_alt[i].matched >= 0
fac41238
PB
846 || (predicated && recog_data.operand_type[i] == OP_OUT))
847 recog_data.operand_type[i] = OP_INOUT;
848 }
849
e7140c8d
JJ
850 /* Apply changes to earlier DEBUG_INSNs if possible. */
851 if (vd->n_debug_insn_changes)
852 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
853
fac41238
PB
854 /* For each earlyclobber operand, zap the value data. */
855 for (i = 0; i < n_ops; i++)
29d70a0f 856 if (op_alt[i].earlyclobber)
fac41238
PB
857 kill_value (recog_data.operand[i], vd);
858
859 /* Within asms, a clobber cannot overlap inputs or outputs.
860 I wouldn't think this were true for regular insns, but
861 scan_rtx treats them like that... */
486b97f2 862 kill_clobbered_values (insn, vd);
fac41238
PB
863
864 /* Kill all auto-incremented values. */
865 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
4ca738b3 866 kill_autoinc_value (insn, vd);
fac41238
PB
867
868 /* Kill all early-clobbered operands. */
869 for (i = 0; i < n_ops; i++)
29d70a0f 870 if (op_alt[i].earlyclobber)
fac41238
PB
871 kill_value (recog_data.operand[i], vd);
872
c34fb198
RE
873 /* If we have dead sets in the insn, then we need to note these as we
874 would clobbers. */
875 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
876 {
877 if (REG_NOTE_KIND (link) == REG_UNUSED)
878 {
879 kill_value (XEXP (link, 0), vd);
880 /* Furthermore, if the insn looked like a single-set,
881 but the dead store kills the source value of that
882 set, then we can no-longer use the plain move
883 special case below. */
884 if (set
885 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
886 set = NULL;
887 }
c35533d7
SB
888
889 /* We need to keep CFI info correct, and the same on all paths,
890 so we cannot normally replace the registers REG_CFA_REGISTER
891 refers to. Bail. */
892 if (REG_NOTE_KIND (link) == REG_CFA_REGISTER)
893 goto did_replacement;
c34fb198
RE
894 }
895
fac41238
PB
896 /* Special-case plain move instructions, since we may well
897 be able to do the move from a different register class. */
898 if (set && REG_P (SET_SRC (set)))
899 {
900 rtx src = SET_SRC (set);
901 unsigned int regno = REGNO (src);
ef4bddc2 902 machine_mode mode = GET_MODE (src);
fac41238
PB
903 unsigned int i;
904 rtx new_rtx;
905
906 /* If we are accessing SRC in some mode other that what we
907 set it in, make sure that the replacement is valid. */
908 if (mode != vd->e[regno].mode)
909 {
462a99aa 910 if (REG_NREGS (src)
ad474626 911 > hard_regno_nregs (regno, vd->e[regno].mode))
fac41238 912 goto no_move_special_case;
26689420
DM
913
914 /* And likewise, if we are narrowing on big endian the transformation
915 is also invalid. */
ad474626 916 if (REG_NREGS (src) < hard_regno_nregs (regno, vd->e[regno].mode)
91914e56
RS
917 && maybe_ne (subreg_lowpart_offset (mode,
918 vd->e[regno].mode), 0U))
26689420 919 goto no_move_special_case;
fac41238
PB
920 }
921
922 /* If the destination is also a register, try to find a source
923 register in the same class. */
924 if (REG_P (SET_DEST (set)))
925 {
d6da226a
JH
926 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno),
927 src, vd);
928
fac41238
PB
929 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
930 {
931 if (dump_file)
932 fprintf (dump_file,
933 "insn %u: replaced reg %u with %u\n",
934 INSN_UID (insn), regno, REGNO (new_rtx));
935 changed = true;
936 goto did_replacement;
937 }
3147591f
MS
938 /* We need to re-extract as validate_change clobbers
939 recog_data. */
75d25a02 940 extract_constrain_insn (insn);
1145837d 941 preprocess_constraints (insn);
fac41238
PB
942 }
943
944 /* Otherwise, try all valid registers and see if its valid. */
945 for (i = vd->e[regno].oldest_regno; i != regno;
946 i = vd->e[i].next_regno)
947 {
948 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
949 mode, i, regno);
950 if (new_rtx != NULL_RTX)
951 {
952 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
953 {
954 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
955 REG_ATTRS (new_rtx) = REG_ATTRS (src);
956 REG_POINTER (new_rtx) = REG_POINTER (src);
957 if (dump_file)
958 fprintf (dump_file,
959 "insn %u: replaced reg %u with %u\n",
960 INSN_UID (insn), regno, REGNO (new_rtx));
961 changed = true;
962 goto did_replacement;
963 }
3147591f
MS
964 /* We need to re-extract as validate_change clobbers
965 recog_data. */
75d25a02 966 extract_constrain_insn (insn);
1145837d 967 preprocess_constraints (insn);
fac41238
PB
968 }
969 }
970 }
971 no_move_special_case:
972
973 any_replacements = false;
974
975 /* For each input operand, replace a hard register with the
976 eldest live copy that's in an appropriate register class. */
977 for (i = 0; i < n_ops; i++)
978 {
868865f4 979 bool replaced = false;
fac41238
PB
980
981 /* Don't scan match_operand here, since we've no reg class
982 information to pass down. Any operands that we could
983 substitute in will be represented elsewhere. */
984 if (recog_data.constraints[i][0] == '\0')
985 continue;
986
987 /* Don't replace in asms intentionally referencing hard regs. */
988 if (is_asm && REG_P (recog_data.operand[i])
989 && (REGNO (recog_data.operand[i])
990 == ORIGINAL_REGNO (recog_data.operand[i])))
991 continue;
992
993 if (recog_data.operand_type[i] == OP_IN)
994 {
29d70a0f 995 if (op_alt[i].is_address)
868865f4 996 replaced
fac41238 997 = replace_oldest_value_addr (recog_data.operand_loc[i],
5efe5dec
RS
998 alternative_class (op_alt, i),
999 VOIDmode, ADDR_SPACE_GENERIC,
1000 insn, vd);
fac41238 1001 else if (REG_P (recog_data.operand[i]))
868865f4 1002 replaced
fac41238 1003 = replace_oldest_value_reg (recog_data.operand_loc[i],
5efe5dec
RS
1004 alternative_class (op_alt, i),
1005 insn, vd);
fac41238 1006 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1007 replaced = replace_oldest_value_mem (recog_data.operand[i],
1008 insn, vd);
fac41238
PB
1009 }
1010 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1011 replaced = replace_oldest_value_mem (recog_data.operand[i],
1012 insn, vd);
fac41238
PB
1013
1014 /* If we performed any replacement, update match_dups. */
868865f4 1015 if (replaced)
fac41238
PB
1016 {
1017 int j;
1018 rtx new_rtx;
1019
1020 new_rtx = *recog_data.operand_loc[i];
1021 recog_data.operand[i] = new_rtx;
1022 for (j = 0; j < recog_data.n_dups; j++)
1023 if (recog_data.dup_num[j] == i)
1024 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
1025
1026 any_replacements = true;
1027 }
1028 }
1029
1030 if (any_replacements)
1031 {
1032 if (! apply_change_group ())
1033 {
fac41238
PB
1034 if (dump_file)
1035 fprintf (dump_file,
1036 "insn %u: reg replacements not verified\n",
1037 INSN_UID (insn));
1038 }
1039 else
1040 changed = true;
1041 }
1042
1043 did_replacement:
b5b8b0ac 1044 if (changed)
828f2c8b
JJ
1045 {
1046 anything_changed = true;
1047
1048 /* If something changed, perhaps further changes to earlier
1049 DEBUG_INSNs can be applied. */
1050 if (vd->n_debug_insn_changes)
1051 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
4dd11305 1052 df_insn_rescan (insn);
828f2c8b 1053 }
b5b8b0ac 1054
e384e6b5
BS
1055 ksvd.vd = vd;
1056 ksvd.ignore_set_reg = NULL_RTX;
1057
fac41238
PB
1058 /* Clobber call-clobbered registers. */
1059 if (CALL_P (insn))
e384e6b5 1060 {
c7fb4c7a
SB
1061 unsigned int set_regno = INVALID_REGNUM;
1062 unsigned int set_nregs = 0;
1063 unsigned int regno;
e384e6b5 1064 rtx exp;
c7fb4c7a 1065
e384e6b5
BS
1066 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1067 {
1068 rtx x = XEXP (exp, 0);
1069 if (GET_CODE (x) == SET)
1070 {
1071 rtx dest = SET_DEST (x);
1072 kill_value (dest, vd);
1073 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1074 copy_value (dest, SET_SRC (x), vd);
1075 ksvd.ignore_set_reg = dest;
1076 set_regno = REGNO (dest);
dc8afb70 1077 set_nregs = REG_NREGS (dest);
e384e6b5
BS
1078 break;
1079 }
1080 }
c7fb4c7a 1081
5a5a3bc5 1082 function_abi callee_abi = insn_callee_abi (insn);
9ccac701 1083 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
30503f4e
RS
1084 if (vd->e[regno].mode != VOIDmode
1085 && callee_abi.clobbers_reg_p (vd->e[regno].mode, regno)
9ccac701 1086 && (regno < set_regno || regno >= set_regno + set_nregs))
c7fb4c7a 1087 kill_value_regno (regno, 1, vd);
c5a44004
JJ
1088
1089 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
30503f4e
RS
1090 of the SET isn't clobbered by CALLEE_ABI, but instead among
1091 CLOBBERs on the CALL_INSN, we could wrongly assume the
1092 value in it is still live. */
c5a44004 1093 if (ksvd.ignore_set_reg)
486b97f2 1094 kill_clobbered_values (insn, vd);
e384e6b5 1095 }
fac41238 1096
8c8fe663
TV
1097 bool copy_p = (set
1098 && REG_P (SET_DEST (set))
1099 && REG_P (SET_SRC (set)));
1100 bool noop_p = (copy_p
1101 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
fac41238 1102
c049b107
JJ
1103 /* If a noop move is using narrower mode than we have recorded,
1104 we need to either remove the noop move, or kill_set_value. */
1105 if (noop_p
bd4288c0
RS
1106 && partial_subreg_p (GET_MODE (SET_DEST (set)),
1107 vd->e[REGNO (SET_DEST (set))].mode))
c049b107
JJ
1108 {
1109 if (noop_move_p (insn))
1110 {
1111 bool last = insn == BB_END (bb);
1112 delete_insn (insn);
1113 if (last)
1114 break;
1115 }
1116 else
1117 noop_p = false;
1118 }
1119
8c8fe663
TV
1120 if (!noop_p)
1121 {
1122 /* Notice stores. */
e8448ba5 1123 note_stores (insn, kill_set_value, &ksvd);
8c8fe663
TV
1124
1125 /* Notice copies. */
1126 if (copy_p)
4dd11305
JL
1127 {
1128 df_insn_rescan (insn);
1129 copy_value (SET_DEST (set), SET_SRC (set), vd);
1130 }
8c8fe663 1131 }
fac41238
PB
1132
1133 if (insn == BB_END (bb))
1134 break;
1135 }
1136
b5b8b0ac 1137 return anything_changed;
fac41238
PB
1138}
1139
fac41238
PB
1140/* Dump the value chain data to stderr. */
1141
24e47c76 1142DEBUG_FUNCTION void
fac41238
PB
1143debug_value_data (struct value_data *vd)
1144{
1145 HARD_REG_SET set;
1146 unsigned int i, j;
1147
1148 CLEAR_HARD_REG_SET (set);
1149
1150 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1151 if (vd->e[i].oldest_regno == i)
1152 {
1153 if (vd->e[i].mode == VOIDmode)
1154 {
1155 if (vd->e[i].next_regno != INVALID_REGNUM)
1156 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1157 i, vd->e[i].next_regno);
1158 continue;
1159 }
1160
1161 SET_HARD_REG_BIT (set, i);
1162 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1163
1164 for (j = vd->e[i].next_regno;
1165 j != INVALID_REGNUM;
1166 j = vd->e[j].next_regno)
1167 {
1168 if (TEST_HARD_REG_BIT (set, j))
1169 {
1170 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1171 return;
1172 }
1173
1174 if (vd->e[j].oldest_regno != i)
1175 {
1176 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1177 j, vd->e[j].oldest_regno);
1178 return;
1179 }
1180 SET_HARD_REG_BIT (set, j);
1181 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1182 }
1183 fputc ('\n', stderr);
1184 }
1185
1186 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1187 if (! TEST_HARD_REG_BIT (set, i)
1188 && (vd->e[i].mode != VOIDmode
1189 || vd->e[i].oldest_regno != i
1190 || vd->e[i].next_regno != INVALID_REGNUM))
1191 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1192 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1193 vd->e[i].next_regno);
1194}
1195
a2e6c10c
ZC
1196/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1197 DEBUG_INSN is skipped since we do not want to involve DF related
1198 staff as how it is handled in function pass_cprop_hardreg::execute.
1199
1200 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1201 to handle DEBUG_INSN for other uses. */
1202
1203void
1204copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1205{
1206 struct value_data *vd;
1207 vd = XNEWVEC (struct value_data, 1);
1208 init_value_data (vd);
1209
1210 skip_debug_insn_p = true;
1211 copyprop_hardreg_forward_1 (bb, vd);
1212 free (vd);
1213 skip_debug_insn_p = false;
1214}
1215
fac41238
PB
1216static void
1217validate_value_data (struct value_data *vd)
1218{
1219 HARD_REG_SET set;
1220 unsigned int i, j;
1221
1222 CLEAR_HARD_REG_SET (set);
1223
1224 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1225 if (vd->e[i].oldest_regno == i)
1226 {
1227 if (vd->e[i].mode == VOIDmode)
1228 {
1229 if (vd->e[i].next_regno != INVALID_REGNUM)
a9c697b8
MS
1230 internal_error ("%qs: [%u] bad %<next_regno%> for empty chain (%u)",
1231 __func__, i, vd->e[i].next_regno);
fac41238
PB
1232 continue;
1233 }
1234
1235 SET_HARD_REG_BIT (set, i);
1236
1237 for (j = vd->e[i].next_regno;
1238 j != INVALID_REGNUM;
1239 j = vd->e[j].next_regno)
1240 {
1241 if (TEST_HARD_REG_BIT (set, j))
a9c697b8
MS
1242 internal_error ("%qs: loop in %<next_regno%> chain (%u)",
1243 __func__, j);
fac41238 1244 if (vd->e[j].oldest_regno != i)
a9c697b8
MS
1245 internal_error ("%qs: [%u] bad %<oldest_regno%> (%u)",
1246 __func__, j, vd->e[j].oldest_regno);
fac41238
PB
1247
1248 SET_HARD_REG_BIT (set, j);
1249 }
1250 }
1251
1252 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1253 if (! TEST_HARD_REG_BIT (set, i)
1254 && (vd->e[i].mode != VOIDmode
1255 || vd->e[i].oldest_regno != i
1256 || vd->e[i].next_regno != INVALID_REGNUM))
a9c697b8
MS
1257 internal_error ("%qs: [%u] non-empty register in chain (%s %u %i)",
1258 __func__, i,
1259 GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
fac41238
PB
1260 vd->e[i].next_regno);
1261}
b2b29377 1262
fac41238 1263\f
27a4cd48
DM
1264namespace {
1265
1266const pass_data pass_data_cprop_hardreg =
fac41238 1267{
27a4cd48
DM
1268 RTL_PASS, /* type */
1269 "cprop_hardreg", /* name */
1270 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1271 TV_CPROP_REGISTERS, /* tv_id */
1272 0, /* properties_required */
1273 0, /* properties_provided */
1274 0, /* properties_destroyed */
1275 0, /* todo_flags_start */
3bea341f 1276 TODO_df_finish, /* todo_flags_finish */
fac41238 1277};
27a4cd48
DM
1278
1279class pass_cprop_hardreg : public rtl_opt_pass
1280{
1281public:
c3284718
RS
1282 pass_cprop_hardreg (gcc::context *ctxt)
1283 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
27a4cd48
DM
1284 {}
1285
1286 /* opt_pass methods: */
1a3d085c
TS
1287 virtual bool gate (function *)
1288 {
1289 return (optimize > 0 && (flag_cprop_registers));
1290 }
1291
be55bfe6 1292 virtual unsigned int execute (function *);
27a4cd48
DM
1293
1294}; // class pass_cprop_hardreg
1295
cdd82c1e
JJ
1296static bool
1297cprop_hardreg_bb (basic_block bb, struct value_data *all_vd, sbitmap visited)
1298{
1299 bitmap_set_bit (visited, bb->index);
1300
1301 /* If a block has a single predecessor, that we've already
1302 processed, begin with the value data that was live at
1303 the end of the predecessor block. */
1304 /* ??? Ought to use more intelligent queuing of blocks. */
1305 if (single_pred_p (bb)
1306 && bitmap_bit_p (visited, single_pred (bb)->index)
1307 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1308 {
1309 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1310 if (all_vd[bb->index].n_debug_insn_changes)
1311 {
1312 unsigned int regno;
1313
1314 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1315 {
1316 if (all_vd[bb->index].e[regno].debug_insn_changes)
1317 {
1318 struct queued_debug_insn_change *cur;
1319 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1320 cur; cur = cur->next)
1321 --all_vd[bb->index].n_debug_insn_changes;
1322 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1323 if (all_vd[bb->index].n_debug_insn_changes == 0)
1324 break;
1325 }
1326 }
1327 }
1328 }
1329 else
1330 init_value_data (all_vd + bb->index);
1331
1332 return copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1333}
1334
1335static void
1336cprop_hardreg_debug (function *fun, struct value_data *all_vd)
1337{
1338 basic_block bb;
1339
1340 FOR_EACH_BB_FN (bb, fun)
1341 if (all_vd[bb->index].n_debug_insn_changes)
1342 {
1343 unsigned int regno;
1344 bitmap live;
1345
1346 live = df_get_live_out (bb);
1347 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1348 if (all_vd[bb->index].e[regno].debug_insn_changes)
1349 {
1350 if (REGNO_REG_SET_P (live, regno))
1351 apply_debug_insn_changes (all_vd + bb->index, regno);
1352
1353 struct queued_debug_insn_change *cur;
1354 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1355 cur; cur = cur->next)
1356 --all_vd[bb->index].n_debug_insn_changes;
1357 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1358 if (all_vd[bb->index].n_debug_insn_changes == 0)
1359 break;
1360 }
1361 }
1362
1363 queued_debug_insn_change_pool.release ();
1364}
1365
be55bfe6
TS
1366unsigned int
1367pass_cprop_hardreg::execute (function *fun)
1368{
1369 struct value_data *all_vd;
1370 basic_block bb;
be55bfe6
TS
1371
1372 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1373
7ba9e72d 1374 auto_sbitmap visited (last_basic_block_for_fn (fun));
be55bfe6
TS
1375 bitmap_clear (visited);
1376
cdd82c1e
JJ
1377 auto_vec<int> worklist;
1378 bool any_debug_changes = false;
1379
52295c2d
JL
1380 /* We need accurate notes. Earlier passes such as if-conversion may
1381 leave notes in an inconsistent state. */
4dd11305 1382 df_note_add_problem ();
52295c2d 1383 df_analyze ();
4dd11305
JL
1384
1385 /* It is tempting to set DF_LR_RUN_DCE, but DCE may choose to delete
1386 an insn and this pass would not have visibility into the removal.
1387 This pass would then potentially use the source of that
1388 INSN for propagation purposes, generating invalid code.
1389
1390 So we just ask for updated notes and handle trivial deletions
1391 within this pass where we can update this passes internal
1392 data structures appropriately. */
1393 df_set_flags (DF_DEFER_INSN_RESCAN);
1394
be55bfe6
TS
1395 FOR_EACH_BB_FN (bb, fun)
1396 {
cdd82c1e
JJ
1397 if (cprop_hardreg_bb (bb, all_vd, visited))
1398 worklist.safe_push (bb->index);
1399 if (all_vd[bb->index].n_debug_insn_changes)
1400 any_debug_changes = true;
be55bfe6
TS
1401 }
1402
4dd11305
JL
1403 /* We must call df_analyze here unconditionally to ensure that the
1404 REG_UNUSED and REG_DEAD notes are consistent with and without -g. */
1405 df_analyze ();
1406
cdd82c1e
JJ
1407 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1408 cprop_hardreg_debug (fun, all_vd);
1409
1410 /* Second pass if we've changed anything, only for the bbs where we have
1411 changed anything though. */
1412 if (!worklist.is_empty ())
be55bfe6 1413 {
cdd82c1e
JJ
1414 unsigned int i;
1415 int index;
be55bfe6 1416
cdd82c1e
JJ
1417 any_debug_changes = false;
1418 bitmap_clear (visited);
1419 FOR_EACH_VEC_ELT (worklist, i, index)
1420 {
1421 bb = BASIC_BLOCK_FOR_FN (fun, index);
1422 cprop_hardreg_bb (bb, all_vd, visited);
1423 if (all_vd[bb->index].n_debug_insn_changes)
1424 any_debug_changes = true;
1425 }
be55bfe6 1426
cdd82c1e
JJ
1427 df_analyze ();
1428 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1429 cprop_hardreg_debug (fun, all_vd);
be55bfe6
TS
1430 }
1431
be55bfe6
TS
1432 free (all_vd);
1433 return 0;
1434}
1435
27a4cd48
DM
1436} // anon namespace
1437
1438rtl_opt_pass *
1439make_pass_cprop_hardreg (gcc::context *ctxt)
1440{
1441 return new pass_cprop_hardreg (ctxt);
1442}