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fac41238 1/* Copy propagation on hard registers for the GNU compiler.
cbe34bb5 2 Copyright (C) 2000-2017 Free Software Foundation, Inc.
fac41238
PB
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
c7131fb2 23#include "backend.h"
fac41238 24#include "rtl.h"
c7131fb2 25#include "df.h"
4d0cdd0c 26#include "memmodel.h"
fac41238
PB
27#include "tm_p.h"
28#include "insn-config.h"
29#include "regs.h"
957060b5
AM
30#include "emit-rtl.h"
31#include "recog.h"
32#include "diagnostic-core.h"
fac41238 33#include "addresses.h"
fac41238 34#include "tree-pass.h"
4ca738b3 35#include "rtl-iter.h"
c049b107 36#include "cfgrtl.h"
fac41238
PB
37
38/* The following code does forward propagation of hard register copies.
39 The object is to eliminate as many dependencies as possible, so that
40 we have the most scheduling freedom. As a side effect, we also clean
41 up some silly register allocation decisions made by reload. This
42 code may be obsoleted by a new register allocator. */
43
e7140c8d
JJ
44/* DEBUG_INSNs aren't changed right away, as doing so might extend the
45 lifetime of a register and get the DEBUG_INSN subsequently reset.
46 So they are queued instead, and updated only when the register is
47 used in some subsequent real insn before it is set. */
48struct queued_debug_insn_change
49{
50 struct queued_debug_insn_change *next;
ea8175a4 51 rtx_insn *insn;
e7140c8d
JJ
52 rtx *loc;
53 rtx new_rtx;
54};
55
fac41238
PB
56/* For each register, we have a list of registers that contain the same
57 value. The OLDEST_REGNO field points to the head of the list, and
58 the NEXT_REGNO field runs through the list. The MODE field indicates
59 what mode the data is known to be in; this field is VOIDmode when the
60 register is not known to contain valid data. */
61
62struct value_data_entry
63{
ef4bddc2 64 machine_mode mode;
fac41238
PB
65 unsigned int oldest_regno;
66 unsigned int next_regno;
e7140c8d 67 struct queued_debug_insn_change *debug_insn_changes;
fac41238
PB
68};
69
70struct value_data
71{
72 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
73 unsigned int max_value_regs;
e7140c8d 74 unsigned int n_debug_insn_changes;
fac41238
PB
75};
76
fb0b2914 77static object_allocator<queued_debug_insn_change> queued_debug_insn_change_pool
fcb87c50 78 ("debug insn changes pool");
5c7337c5 79
a2e6c10c 80static bool skip_debug_insn_p;
e7140c8d 81
fac41238
PB
82static void kill_value_one_regno (unsigned, struct value_data *);
83static void kill_value_regno (unsigned, unsigned, struct value_data *);
4ca738b3 84static void kill_value (const_rtx, struct value_data *);
ef4bddc2 85static void set_value_regno (unsigned, machine_mode, struct value_data *);
fac41238
PB
86static void init_value_data (struct value_data *);
87static void kill_clobbered_value (rtx, const_rtx, void *);
88static void kill_set_value (rtx, const_rtx, void *);
fac41238 89static void copy_value (rtx, rtx, struct value_data *);
ef4bddc2 90static bool mode_change_ok (machine_mode, machine_mode,
fac41238 91 unsigned int);
ef4bddc2
RS
92static rtx maybe_mode_change (machine_mode, machine_mode,
93 machine_mode, unsigned int, unsigned int);
fac41238 94static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
ea8175a4 95static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
fac41238
PB
96 struct value_data *);
97static bool replace_oldest_value_addr (rtx *, enum reg_class,
ef4bddc2 98 machine_mode, addr_space_t,
ea8175a4
DM
99 rtx_insn *, struct value_data *);
100static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
fac41238
PB
101static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
102extern void debug_value_data (struct value_data *);
fac41238 103static void validate_value_data (struct value_data *);
fac41238 104
e7140c8d
JJ
105/* Free all queued updates for DEBUG_INSNs that change some reg to
106 register REGNO. */
107
108static void
109free_debug_insn_changes (struct value_data *vd, unsigned int regno)
110{
111 struct queued_debug_insn_change *cur, *next;
112 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
113 {
114 next = cur->next;
115 --vd->n_debug_insn_changes;
fb0b2914 116 queued_debug_insn_change_pool.remove (cur);
e7140c8d
JJ
117 }
118 vd->e[regno].debug_insn_changes = NULL;
119}
120
fac41238
PB
121/* Kill register REGNO. This involves removing it from any value
122 lists, and resetting the value mode to VOIDmode. This is only a
123 helper function; it does not handle any hard registers overlapping
124 with REGNO. */
125
126static void
127kill_value_one_regno (unsigned int regno, struct value_data *vd)
128{
129 unsigned int i, next;
130
131 if (vd->e[regno].oldest_regno != regno)
132 {
133 for (i = vd->e[regno].oldest_regno;
134 vd->e[i].next_regno != regno;
135 i = vd->e[i].next_regno)
136 continue;
137 vd->e[i].next_regno = vd->e[regno].next_regno;
138 }
139 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
140 {
141 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
142 vd->e[i].oldest_regno = next;
143 }
144
145 vd->e[regno].mode = VOIDmode;
146 vd->e[regno].oldest_regno = regno;
147 vd->e[regno].next_regno = INVALID_REGNUM;
e7140c8d
JJ
148 if (vd->e[regno].debug_insn_changes)
149 free_debug_insn_changes (vd, regno);
fac41238 150
b2b29377
MM
151 if (flag_checking)
152 validate_value_data (vd);
fac41238
PB
153}
154
155/* Kill the value in register REGNO for NREGS, and any other registers
156 whose values overlap. */
157
158static void
159kill_value_regno (unsigned int regno, unsigned int nregs,
160 struct value_data *vd)
161{
162 unsigned int j;
163
164 /* Kill the value we're told to kill. */
165 for (j = 0; j < nregs; ++j)
166 kill_value_one_regno (regno + j, vd);
167
168 /* Kill everything that overlapped what we're told to kill. */
169 if (regno < vd->max_value_regs)
170 j = 0;
171 else
172 j = regno - vd->max_value_regs;
173 for (; j < regno; ++j)
174 {
175 unsigned int i, n;
176 if (vd->e[j].mode == VOIDmode)
177 continue;
178 n = hard_regno_nregs[j][vd->e[j].mode];
179 if (j + n > regno)
180 for (i = 0; i < n; ++i)
181 kill_value_one_regno (j + i, vd);
182 }
183}
184
185/* Kill X. This is a convenience function wrapping kill_value_regno
186 so that we mind the mode the register is in. */
187
188static void
4ca738b3 189kill_value (const_rtx x, struct value_data *vd)
fac41238 190{
fac41238
PB
191 if (GET_CODE (x) == SUBREG)
192 {
4ca738b3
RS
193 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
194 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
195 x = tmp ? tmp : SUBREG_REG (x);
fac41238
PB
196 }
197 if (REG_P (x))
dc8afb70 198 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
fac41238
PB
199}
200
201/* Remember that REGNO is valid in MODE. */
202
203static void
ef4bddc2 204set_value_regno (unsigned int regno, machine_mode mode,
fac41238
PB
205 struct value_data *vd)
206{
207 unsigned int nregs;
208
209 vd->e[regno].mode = mode;
210
211 nregs = hard_regno_nregs[regno][mode];
212 if (nregs > vd->max_value_regs)
213 vd->max_value_regs = nregs;
214}
215
216/* Initialize VD such that there are no known relationships between regs. */
217
218static void
219init_value_data (struct value_data *vd)
220{
221 int i;
222 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
223 {
224 vd->e[i].mode = VOIDmode;
225 vd->e[i].oldest_regno = i;
226 vd->e[i].next_regno = INVALID_REGNUM;
e7140c8d 227 vd->e[i].debug_insn_changes = NULL;
fac41238
PB
228 }
229 vd->max_value_regs = 0;
e7140c8d 230 vd->n_debug_insn_changes = 0;
fac41238
PB
231}
232
233/* Called through note_stores. If X is clobbered, kill its value. */
234
235static void
236kill_clobbered_value (rtx x, const_rtx set, void *data)
237{
238 struct value_data *const vd = (struct value_data *) data;
239 if (GET_CODE (set) == CLOBBER)
240 kill_value (x, vd);
241}
242
e384e6b5
BS
243/* A structure passed as data to kill_set_value through note_stores. */
244struct kill_set_value_data
245{
246 struct value_data *vd;
247 rtx ignore_set_reg;
248};
249
fac41238
PB
250/* Called through note_stores. If X is set, not clobbered, kill its
251 current value and install it as the root of its own value list. */
252
253static void
254kill_set_value (rtx x, const_rtx set, void *data)
255{
e384e6b5
BS
256 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
257 if (rtx_equal_p (x, ksvd->ignore_set_reg))
258 return;
fac41238
PB
259 if (GET_CODE (set) != CLOBBER)
260 {
e384e6b5 261 kill_value (x, ksvd->vd);
fac41238 262 if (REG_P (x))
e384e6b5 263 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
fac41238
PB
264 }
265}
266
4ca738b3
RS
267/* Kill any register used in X as the base of an auto-increment expression,
268 and install that register as the root of its own value list. */
fac41238 269
4ca738b3 270static void
15cd50fb 271kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
fac41238 272{
4ca738b3
RS
273 subrtx_iterator::array_type array;
274 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
fac41238 275 {
4ca738b3
RS
276 const_rtx x = *iter;
277 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
278 {
279 x = XEXP (x, 0);
280 kill_value (x, vd);
281 set_value_regno (REGNO (x), GET_MODE (x), vd);
282 iter.skip_subrtxes ();
283 }
fac41238 284 }
fac41238
PB
285}
286
287/* Assert that SRC has been copied to DEST. Adjust the data structures
288 to reflect that SRC contains an older copy of the shared value. */
289
290static void
291copy_value (rtx dest, rtx src, struct value_data *vd)
292{
293 unsigned int dr = REGNO (dest);
294 unsigned int sr = REGNO (src);
295 unsigned int dn, sn;
296 unsigned int i;
297
298 /* ??? At present, it's possible to see noop sets. It'd be nice if
299 this were cleaned up beforehand... */
300 if (sr == dr)
301 return;
302
303 /* Do not propagate copies to the stack pointer, as that can leave
304 memory accesses with no scheduling dependency on the stack update. */
305 if (dr == STACK_POINTER_REGNUM)
306 return;
307
308 /* Likewise with the frame pointer, if we're using one. */
309 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
310 return;
311
312 /* Do not propagate copies to fixed or global registers, patterns
313 can be relying to see particular fixed register or users can
314 expect the chosen global register in asm. */
315 if (fixed_regs[dr] || global_regs[dr])
316 return;
317
318 /* If SRC and DEST overlap, don't record anything. */
dc8afb70
RS
319 dn = REG_NREGS (dest);
320 sn = REG_NREGS (src);
fac41238
PB
321 if ((dr > sr && dr < sr + sn)
322 || (sr > dr && sr < dr + dn))
323 return;
324
325 /* If SRC had no assigned mode (i.e. we didn't know it was live)
326 assign it now and assume the value came from an input argument
327 or somesuch. */
328 if (vd->e[sr].mode == VOIDmode)
329 set_value_regno (sr, vd->e[dr].mode, vd);
330
331 /* If we are narrowing the input to a smaller number of hard regs,
332 and it is in big endian, we are really extracting a high part.
333 Since we generally associate a low part of a value with the value itself,
334 we must not do the same for the high part.
335 Note we can still get low parts for the same mode combination through
336 a two-step copy involving differently sized hard regs.
026c3cfd 337 Assume hard regs fr* are 32 bits each, while r* are 64 bits each:
fac41238
PB
338 (set (reg:DI r0) (reg:DI fr0))
339 (set (reg:SI fr2) (reg:SI r0))
340 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
341 (set (reg:SI fr2) (reg:SI fr0))
342 loads the high part of (reg:DI fr0) into fr2.
343
344 We can't properly represent the latter case in our tables, so don't
345 record anything then. */
346 else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]
347 && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD
348 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
349 return;
350
351 /* If SRC had been assigned a mode narrower than the copy, we can't
352 link DEST into the chain, because not all of the pieces of the
353 copy came from oldest_regno. */
354 else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode])
355 return;
356
357 /* Link DR at the end of the value chain used by SR. */
358
359 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
360
361 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
362 continue;
363 vd->e[i].next_regno = dr;
364
b2b29377
MM
365 if (flag_checking)
366 validate_value_data (vd);
fac41238
PB
367}
368
369/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
370
371static bool
ef4bddc2 372mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
fac41238
PB
373 unsigned int regno ATTRIBUTE_UNUSED)
374{
375 if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode))
376 return false;
377
378#ifdef CANNOT_CHANGE_MODE_CLASS
379 return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode);
380#endif
381
382 return true;
383}
384
385/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
386 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
387 in NEW_MODE.
388 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
389
390static rtx
ef4bddc2
RS
391maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
392 machine_mode new_mode, unsigned int regno,
fac41238
PB
393 unsigned int copy_regno ATTRIBUTE_UNUSED)
394{
395 if (GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (orig_mode)
396 && GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (new_mode))
397 return NULL_RTX;
398
399 if (orig_mode == new_mode)
9fccb335 400 return gen_raw_REG (new_mode, regno);
fac41238
PB
401 else if (mode_change_ok (orig_mode, new_mode, regno))
402 {
403 int copy_nregs = hard_regno_nregs[copy_regno][copy_mode];
404 int use_nregs = hard_regno_nregs[copy_regno][new_mode];
405 int copy_offset
406 = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs);
407 int offset
408 = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset;
409 int byteoffset = offset % UNITS_PER_WORD;
410 int wordoffset = offset - byteoffset;
411
412 offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0)
413 + (BYTES_BIG_ENDIAN ? byteoffset : 0));
d6f23738
RS
414 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
415 if (HARD_REGNO_MODE_OK (regno, new_mode))
9fccb335 416 return gen_raw_REG (new_mode, regno);
fac41238
PB
417 }
418 return NULL_RTX;
419}
420
421/* Find the oldest copy of the value contained in REGNO that is in
422 register class CL and has mode MODE. If found, return an rtx
423 of that oldest register, otherwise return NULL. */
424
425static rtx
426find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
427{
428 unsigned int regno = REGNO (reg);
ef4bddc2 429 machine_mode mode = GET_MODE (reg);
fac41238
PB
430 unsigned int i;
431
432 /* If we are accessing REG in some mode other that what we set it in,
433 make sure that the replacement is valid. In particular, consider
434 (set (reg:DI r11) (...))
435 (set (reg:SI r9) (reg:SI r11))
436 (set (reg:SI r10) (...))
437 (set (...) (reg:DI r9))
438 Replacing r9 with r11 is invalid. */
439 if (mode != vd->e[regno].mode)
440 {
441 if (hard_regno_nregs[regno][mode]
442 > hard_regno_nregs[regno][vd->e[regno].mode])
443 return NULL_RTX;
444 }
445
446 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
447 {
ef4bddc2 448 machine_mode oldmode = vd->e[i].mode;
fac41238
PB
449 rtx new_rtx;
450
451 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
f90333eb 452 continue;
fac41238
PB
453
454 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
455 if (new_rtx)
456 {
457 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
458 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
459 REG_POINTER (new_rtx) = REG_POINTER (reg);
460 return new_rtx;
461 }
462 }
463
464 return NULL_RTX;
465}
466
467/* If possible, replace the register at *LOC with the oldest register
468 in register class CL. Return true if successfully replaced. */
469
470static bool
ea8175a4 471replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
fac41238
PB
472 struct value_data *vd)
473{
474 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
a2e6c10c 475 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
fac41238 476 {
e7140c8d
JJ
477 if (DEBUG_INSN_P (insn))
478 {
479 struct queued_debug_insn_change *change;
480
481 if (dump_file)
482 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
483 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
484
fb0b2914 485 change = queued_debug_insn_change_pool.allocate ();
e7140c8d
JJ
486 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
487 change->insn = insn;
488 change->loc = loc;
489 change->new_rtx = new_rtx;
490 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
491 ++vd->n_debug_insn_changes;
492 return true;
493 }
fac41238
PB
494 if (dump_file)
495 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
496 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
497
498 validate_change (insn, loc, new_rtx, 1);
499 return true;
500 }
501 return false;
502}
503
504/* Similar to replace_oldest_value_reg, but *LOC contains an address.
505 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
506 BASE_REG_CLASS depending on how the register is being considered. */
507
508static bool
509replace_oldest_value_addr (rtx *loc, enum reg_class cl,
ef4bddc2 510 machine_mode mode, addr_space_t as,
ea8175a4 511 rtx_insn *insn, struct value_data *vd)
fac41238
PB
512{
513 rtx x = *loc;
514 RTX_CODE code = GET_CODE (x);
515 const char *fmt;
516 int i, j;
517 bool changed = false;
518
519 switch (code)
520 {
521 case PLUS:
b5b8b0ac
AO
522 if (DEBUG_INSN_P (insn))
523 break;
524
fac41238
PB
525 {
526 rtx orig_op0 = XEXP (x, 0);
527 rtx orig_op1 = XEXP (x, 1);
528 RTX_CODE code0 = GET_CODE (orig_op0);
529 RTX_CODE code1 = GET_CODE (orig_op1);
530 rtx op0 = orig_op0;
531 rtx op1 = orig_op1;
532 rtx *locI = NULL;
533 rtx *locB = NULL;
534 enum rtx_code index_code = SCRATCH;
535
536 if (GET_CODE (op0) == SUBREG)
537 {
538 op0 = SUBREG_REG (op0);
539 code0 = GET_CODE (op0);
540 }
541
542 if (GET_CODE (op1) == SUBREG)
543 {
544 op1 = SUBREG_REG (op1);
545 code1 = GET_CODE (op1);
546 }
547
548 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
549 || code0 == ZERO_EXTEND || code1 == MEM)
550 {
551 locI = &XEXP (x, 0);
552 locB = &XEXP (x, 1);
553 index_code = GET_CODE (*locI);
554 }
555 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
556 || code1 == ZERO_EXTEND || code0 == MEM)
557 {
558 locI = &XEXP (x, 1);
559 locB = &XEXP (x, 0);
560 index_code = GET_CODE (*locI);
561 }
562 else if (code0 == CONST_INT || code0 == CONST
563 || code0 == SYMBOL_REF || code0 == LABEL_REF)
564 {
565 locB = &XEXP (x, 1);
566 index_code = GET_CODE (XEXP (x, 0));
567 }
568 else if (code1 == CONST_INT || code1 == CONST
569 || code1 == SYMBOL_REF || code1 == LABEL_REF)
570 {
571 locB = &XEXP (x, 0);
572 index_code = GET_CODE (XEXP (x, 1));
573 }
574 else if (code0 == REG && code1 == REG)
575 {
576 int index_op;
577 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
578
579 if (REGNO_OK_FOR_INDEX_P (regno1)
86fc3d06 580 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
fac41238
PB
581 index_op = 1;
582 else if (REGNO_OK_FOR_INDEX_P (regno0)
86fc3d06 583 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238 584 index_op = 0;
86fc3d06 585 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
fac41238
PB
586 || REGNO_OK_FOR_INDEX_P (regno1))
587 index_op = 1;
86fc3d06 588 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238
PB
589 index_op = 0;
590 else
591 index_op = 1;
592
593 locI = &XEXP (x, index_op);
594 locB = &XEXP (x, !index_op);
595 index_code = GET_CODE (*locI);
596 }
597 else if (code0 == REG)
598 {
599 locI = &XEXP (x, 0);
600 locB = &XEXP (x, 1);
601 index_code = GET_CODE (*locI);
602 }
603 else if (code1 == REG)
604 {
605 locI = &XEXP (x, 1);
606 locB = &XEXP (x, 0);
607 index_code = GET_CODE (*locI);
608 }
609
610 if (locI)
86fc3d06
UW
611 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
612 mode, as, insn, vd);
fac41238
PB
613 if (locB)
614 changed |= replace_oldest_value_addr (locB,
86fc3d06 615 base_reg_class (mode, as, PLUS,
fac41238 616 index_code),
86fc3d06 617 mode, as, insn, vd);
fac41238
PB
618 return changed;
619 }
620
621 case POST_INC:
622 case POST_DEC:
623 case POST_MODIFY:
624 case PRE_INC:
625 case PRE_DEC:
626 case PRE_MODIFY:
627 return false;
628
629 case MEM:
630 return replace_oldest_value_mem (x, insn, vd);
631
632 case REG:
633 return replace_oldest_value_reg (loc, cl, insn, vd);
634
635 default:
636 break;
637 }
638
639 fmt = GET_RTX_FORMAT (code);
640 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
641 {
642 if (fmt[i] == 'e')
86fc3d06 643 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
fac41238
PB
644 insn, vd);
645 else if (fmt[i] == 'E')
646 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
647 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
86fc3d06 648 mode, as, insn, vd);
fac41238
PB
649 }
650
651 return changed;
652}
653
654/* Similar to replace_oldest_value_reg, but X contains a memory. */
655
656static bool
ea8175a4 657replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
fac41238 658{
b5b8b0ac
AO
659 enum reg_class cl;
660
661 if (DEBUG_INSN_P (insn))
662 cl = ALL_REGS;
663 else
86fc3d06 664 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
b5b8b0ac
AO
665
666 return replace_oldest_value_addr (&XEXP (x, 0), cl,
86fc3d06
UW
667 GET_MODE (x), MEM_ADDR_SPACE (x),
668 insn, vd);
fac41238
PB
669}
670
e7140c8d
JJ
671/* Apply all queued updates for DEBUG_INSNs that change some reg to
672 register REGNO. */
673
674static void
675apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
676{
677 struct queued_debug_insn_change *change;
ea8175a4 678 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
e7140c8d
JJ
679
680 for (change = vd->e[regno].debug_insn_changes;
681 change;
682 change = change->next)
683 {
684 if (last_insn != change->insn)
685 {
686 apply_change_group ();
687 last_insn = change->insn;
688 }
689 validate_change (change->insn, change->loc, change->new_rtx, 1);
690 }
691 apply_change_group ();
692}
693
e7140c8d
JJ
694/* Called via note_uses, for all used registers in a real insn
695 apply DEBUG_INSN changes that change registers to the used
696 registers. */
697
698static void
0d2e76b8 699cprop_find_used_regs (rtx *loc, void *data)
e7140c8d 700{
0d2e76b8
RS
701 struct value_data *const vd = (struct value_data *) data;
702 subrtx_iterator::array_type array;
703 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
704 {
705 const_rtx x = *iter;
706 if (REG_P (x))
707 {
708 unsigned int regno = REGNO (x);
709 if (vd->e[regno].debug_insn_changes)
710 {
711 apply_debug_insn_changes (vd, regno);
712 free_debug_insn_changes (vd, regno);
713 }
714 }
715 }
e7140c8d
JJ
716}
717
486b97f2
TV
718/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
719
720static void
721kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
722{
723 note_stores (PATTERN (insn), kill_clobbered_value, vd);
724
725 if (CALL_P (insn))
726 {
727 rtx exp;
728
729 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
730 {
731 rtx x = XEXP (exp, 0);
732 if (GET_CODE (x) == CLOBBER)
733 kill_value (SET_DEST (x), vd);
734 }
735 }
736}
737
fac41238
PB
738/* Perform the forward copy propagation on basic block BB. */
739
740static bool
741copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
742{
b5b8b0ac 743 bool anything_changed = false;
c049b107 744 rtx_insn *insn, *next;
fac41238 745
c049b107 746 for (insn = BB_HEAD (bb); ; insn = next)
fac41238 747 {
29d70a0f 748 int n_ops, i, predicated;
fac41238
PB
749 bool is_asm, any_replacements;
750 rtx set;
c34fb198 751 rtx link;
fac41238 752 bool replaced[MAX_RECOG_OPERANDS];
b5b8b0ac 753 bool changed = false;
e384e6b5 754 struct kill_set_value_data ksvd;
fac41238 755
c049b107 756 next = NEXT_INSN (insn);
b5b8b0ac 757 if (!NONDEBUG_INSN_P (insn))
fac41238 758 {
b5b8b0ac
AO
759 if (DEBUG_INSN_P (insn))
760 {
761 rtx loc = INSN_VAR_LOCATION_LOC (insn);
e7140c8d
JJ
762 if (!VAR_LOC_UNKNOWN_P (loc))
763 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
764 ALL_REGS, GET_MODE (loc),
86fc3d06 765 ADDR_SPACE_GENERIC, insn, vd);
b5b8b0ac
AO
766 }
767
fac41238
PB
768 if (insn == BB_END (bb))
769 break;
770 else
771 continue;
772 }
773
774 set = single_set (insn);
d6da226a
JH
775
776 /* Detect noop sets and remove them before processing side effects. */
777 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
778 {
779 unsigned int regno = REGNO (SET_SRC (set));
780 rtx r1 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
781 SET_DEST (set), vd);
782 rtx r2 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
783 SET_SRC (set), vd);
784 if (rtx_equal_p (r1 ? r1 : SET_DEST (set), r2 ? r2 : SET_SRC (set)))
785 {
786 bool last = insn == BB_END (bb);
d6da226a
JH
787 delete_insn (insn);
788 if (last)
789 break;
790 continue;
791 }
792 }
793
75d25a02 794 extract_constrain_insn (insn);
1145837d 795 preprocess_constraints (insn);
5efe5dec 796 const operand_alternative *op_alt = which_op_alt ();
fac41238
PB
797 n_ops = recog_data.n_operands;
798 is_asm = asm_noperands (PATTERN (insn)) >= 0;
799
5efe5dec 800 /* Simplify the code below by promoting OP_OUT to OP_INOUT
fac41238
PB
801 in predicated instructions. */
802
803 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
804 for (i = 0; i < n_ops; ++i)
805 {
29d70a0f 806 int matches = op_alt[i].matches;
29d70a0f 807 if (matches >= 0 || op_alt[i].matched >= 0
fac41238
PB
808 || (predicated && recog_data.operand_type[i] == OP_OUT))
809 recog_data.operand_type[i] = OP_INOUT;
810 }
811
e7140c8d
JJ
812 /* Apply changes to earlier DEBUG_INSNs if possible. */
813 if (vd->n_debug_insn_changes)
814 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
815
fac41238
PB
816 /* For each earlyclobber operand, zap the value data. */
817 for (i = 0; i < n_ops; i++)
29d70a0f 818 if (op_alt[i].earlyclobber)
fac41238
PB
819 kill_value (recog_data.operand[i], vd);
820
821 /* Within asms, a clobber cannot overlap inputs or outputs.
822 I wouldn't think this were true for regular insns, but
823 scan_rtx treats them like that... */
486b97f2 824 kill_clobbered_values (insn, vd);
fac41238
PB
825
826 /* Kill all auto-incremented values. */
827 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
4ca738b3 828 kill_autoinc_value (insn, vd);
fac41238
PB
829
830 /* Kill all early-clobbered operands. */
831 for (i = 0; i < n_ops; i++)
29d70a0f 832 if (op_alt[i].earlyclobber)
fac41238
PB
833 kill_value (recog_data.operand[i], vd);
834
c34fb198
RE
835 /* If we have dead sets in the insn, then we need to note these as we
836 would clobbers. */
837 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
838 {
839 if (REG_NOTE_KIND (link) == REG_UNUSED)
840 {
841 kill_value (XEXP (link, 0), vd);
842 /* Furthermore, if the insn looked like a single-set,
843 but the dead store kills the source value of that
844 set, then we can no-longer use the plain move
845 special case below. */
846 if (set
847 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
848 set = NULL;
849 }
850 }
851
fac41238
PB
852 /* Special-case plain move instructions, since we may well
853 be able to do the move from a different register class. */
854 if (set && REG_P (SET_SRC (set)))
855 {
856 rtx src = SET_SRC (set);
857 unsigned int regno = REGNO (src);
ef4bddc2 858 machine_mode mode = GET_MODE (src);
fac41238
PB
859 unsigned int i;
860 rtx new_rtx;
861
862 /* If we are accessing SRC in some mode other that what we
863 set it in, make sure that the replacement is valid. */
864 if (mode != vd->e[regno].mode)
865 {
866 if (hard_regno_nregs[regno][mode]
867 > hard_regno_nregs[regno][vd->e[regno].mode])
868 goto no_move_special_case;
26689420
DM
869
870 /* And likewise, if we are narrowing on big endian the transformation
871 is also invalid. */
872 if (hard_regno_nregs[regno][mode]
873 < hard_regno_nregs[regno][vd->e[regno].mode]
874 && (GET_MODE_SIZE (vd->e[regno].mode) > UNITS_PER_WORD
875 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
876 goto no_move_special_case;
fac41238
PB
877 }
878
879 /* If the destination is also a register, try to find a source
880 register in the same class. */
881 if (REG_P (SET_DEST (set)))
882 {
d6da226a
JH
883 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno),
884 src, vd);
885
fac41238
PB
886 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
887 {
888 if (dump_file)
889 fprintf (dump_file,
890 "insn %u: replaced reg %u with %u\n",
891 INSN_UID (insn), regno, REGNO (new_rtx));
892 changed = true;
893 goto did_replacement;
894 }
3147591f
MS
895 /* We need to re-extract as validate_change clobbers
896 recog_data. */
75d25a02 897 extract_constrain_insn (insn);
1145837d 898 preprocess_constraints (insn);
fac41238
PB
899 }
900
901 /* Otherwise, try all valid registers and see if its valid. */
902 for (i = vd->e[regno].oldest_regno; i != regno;
903 i = vd->e[i].next_regno)
904 {
905 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
906 mode, i, regno);
907 if (new_rtx != NULL_RTX)
908 {
909 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
910 {
911 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
912 REG_ATTRS (new_rtx) = REG_ATTRS (src);
913 REG_POINTER (new_rtx) = REG_POINTER (src);
914 if (dump_file)
915 fprintf (dump_file,
916 "insn %u: replaced reg %u with %u\n",
917 INSN_UID (insn), regno, REGNO (new_rtx));
918 changed = true;
919 goto did_replacement;
920 }
3147591f
MS
921 /* We need to re-extract as validate_change clobbers
922 recog_data. */
75d25a02 923 extract_constrain_insn (insn);
1145837d 924 preprocess_constraints (insn);
fac41238
PB
925 }
926 }
927 }
928 no_move_special_case:
929
930 any_replacements = false;
931
932 /* For each input operand, replace a hard register with the
933 eldest live copy that's in an appropriate register class. */
934 for (i = 0; i < n_ops; i++)
935 {
936 replaced[i] = false;
937
938 /* Don't scan match_operand here, since we've no reg class
939 information to pass down. Any operands that we could
940 substitute in will be represented elsewhere. */
941 if (recog_data.constraints[i][0] == '\0')
942 continue;
943
944 /* Don't replace in asms intentionally referencing hard regs. */
945 if (is_asm && REG_P (recog_data.operand[i])
946 && (REGNO (recog_data.operand[i])
947 == ORIGINAL_REGNO (recog_data.operand[i])))
948 continue;
949
950 if (recog_data.operand_type[i] == OP_IN)
951 {
29d70a0f 952 if (op_alt[i].is_address)
fac41238
PB
953 replaced[i]
954 = replace_oldest_value_addr (recog_data.operand_loc[i],
5efe5dec
RS
955 alternative_class (op_alt, i),
956 VOIDmode, ADDR_SPACE_GENERIC,
957 insn, vd);
fac41238
PB
958 else if (REG_P (recog_data.operand[i]))
959 replaced[i]
960 = replace_oldest_value_reg (recog_data.operand_loc[i],
5efe5dec
RS
961 alternative_class (op_alt, i),
962 insn, vd);
fac41238
PB
963 else if (MEM_P (recog_data.operand[i]))
964 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
965 insn, vd);
966 }
967 else if (MEM_P (recog_data.operand[i]))
968 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
969 insn, vd);
970
971 /* If we performed any replacement, update match_dups. */
972 if (replaced[i])
973 {
974 int j;
975 rtx new_rtx;
976
977 new_rtx = *recog_data.operand_loc[i];
978 recog_data.operand[i] = new_rtx;
979 for (j = 0; j < recog_data.n_dups; j++)
980 if (recog_data.dup_num[j] == i)
981 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
982
983 any_replacements = true;
984 }
985 }
986
987 if (any_replacements)
988 {
989 if (! apply_change_group ())
990 {
991 for (i = 0; i < n_ops; i++)
992 if (replaced[i])
993 {
994 rtx old = *recog_data.operand_loc[i];
995 recog_data.operand[i] = old;
996 }
997
998 if (dump_file)
999 fprintf (dump_file,
1000 "insn %u: reg replacements not verified\n",
1001 INSN_UID (insn));
1002 }
1003 else
1004 changed = true;
1005 }
1006
1007 did_replacement:
b5b8b0ac 1008 if (changed)
828f2c8b
JJ
1009 {
1010 anything_changed = true;
1011
1012 /* If something changed, perhaps further changes to earlier
1013 DEBUG_INSNs can be applied. */
1014 if (vd->n_debug_insn_changes)
1015 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
1016 }
b5b8b0ac 1017
e384e6b5
BS
1018 ksvd.vd = vd;
1019 ksvd.ignore_set_reg = NULL_RTX;
1020
fac41238
PB
1021 /* Clobber call-clobbered registers. */
1022 if (CALL_P (insn))
e384e6b5 1023 {
c7fb4c7a
SB
1024 unsigned int set_regno = INVALID_REGNUM;
1025 unsigned int set_nregs = 0;
1026 unsigned int regno;
e384e6b5 1027 rtx exp;
8d696651 1028 HARD_REG_SET regs_invalidated_by_this_call;
c7fb4c7a 1029
e384e6b5
BS
1030 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1031 {
1032 rtx x = XEXP (exp, 0);
1033 if (GET_CODE (x) == SET)
1034 {
1035 rtx dest = SET_DEST (x);
1036 kill_value (dest, vd);
1037 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1038 copy_value (dest, SET_SRC (x), vd);
1039 ksvd.ignore_set_reg = dest;
1040 set_regno = REGNO (dest);
dc8afb70 1041 set_nregs = REG_NREGS (dest);
e384e6b5
BS
1042 break;
1043 }
1044 }
c7fb4c7a 1045
8d696651
TV
1046 get_call_reg_set_usage (insn,
1047 &regs_invalidated_by_this_call,
1048 regs_invalidated_by_call);
9ccac701 1049 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
8d696651 1050 if ((TEST_HARD_REG_BIT (regs_invalidated_by_this_call, regno)
9ccac701
MF
1051 || HARD_REGNO_CALL_PART_CLOBBERED (regno, vd->e[regno].mode))
1052 && (regno < set_regno || regno >= set_regno + set_nregs))
c7fb4c7a 1053 kill_value_regno (regno, 1, vd);
c5a44004
JJ
1054
1055 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
1056 of the SET isn't in regs_invalidated_by_call hard reg set,
1057 but instead among CLOBBERs on the CALL_INSN, we could wrongly
1058 assume the value in it is still live. */
1059 if (ksvd.ignore_set_reg)
486b97f2 1060 kill_clobbered_values (insn, vd);
e384e6b5 1061 }
fac41238 1062
8c8fe663
TV
1063 bool copy_p = (set
1064 && REG_P (SET_DEST (set))
1065 && REG_P (SET_SRC (set)));
1066 bool noop_p = (copy_p
1067 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
fac41238 1068
c049b107
JJ
1069 /* If a noop move is using narrower mode than we have recorded,
1070 we need to either remove the noop move, or kill_set_value. */
1071 if (noop_p
1072 && (GET_MODE_BITSIZE (GET_MODE (SET_DEST (set)))
1073 < GET_MODE_BITSIZE (vd->e[REGNO (SET_DEST (set))].mode)))
1074 {
1075 if (noop_move_p (insn))
1076 {
1077 bool last = insn == BB_END (bb);
1078 delete_insn (insn);
1079 if (last)
1080 break;
1081 }
1082 else
1083 noop_p = false;
1084 }
1085
8c8fe663
TV
1086 if (!noop_p)
1087 {
1088 /* Notice stores. */
1089 note_stores (PATTERN (insn), kill_set_value, &ksvd);
1090
1091 /* Notice copies. */
1092 if (copy_p)
1093 copy_value (SET_DEST (set), SET_SRC (set), vd);
1094 }
fac41238
PB
1095
1096 if (insn == BB_END (bb))
1097 break;
1098 }
1099
b5b8b0ac 1100 return anything_changed;
fac41238
PB
1101}
1102
fac41238
PB
1103/* Dump the value chain data to stderr. */
1104
24e47c76 1105DEBUG_FUNCTION void
fac41238
PB
1106debug_value_data (struct value_data *vd)
1107{
1108 HARD_REG_SET set;
1109 unsigned int i, j;
1110
1111 CLEAR_HARD_REG_SET (set);
1112
1113 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1114 if (vd->e[i].oldest_regno == i)
1115 {
1116 if (vd->e[i].mode == VOIDmode)
1117 {
1118 if (vd->e[i].next_regno != INVALID_REGNUM)
1119 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1120 i, vd->e[i].next_regno);
1121 continue;
1122 }
1123
1124 SET_HARD_REG_BIT (set, i);
1125 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1126
1127 for (j = vd->e[i].next_regno;
1128 j != INVALID_REGNUM;
1129 j = vd->e[j].next_regno)
1130 {
1131 if (TEST_HARD_REG_BIT (set, j))
1132 {
1133 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1134 return;
1135 }
1136
1137 if (vd->e[j].oldest_regno != i)
1138 {
1139 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1140 j, vd->e[j].oldest_regno);
1141 return;
1142 }
1143 SET_HARD_REG_BIT (set, j);
1144 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1145 }
1146 fputc ('\n', stderr);
1147 }
1148
1149 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1150 if (! TEST_HARD_REG_BIT (set, i)
1151 && (vd->e[i].mode != VOIDmode
1152 || vd->e[i].oldest_regno != i
1153 || vd->e[i].next_regno != INVALID_REGNUM))
1154 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1155 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1156 vd->e[i].next_regno);
1157}
1158
a2e6c10c
ZC
1159/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1160 DEBUG_INSN is skipped since we do not want to involve DF related
1161 staff as how it is handled in function pass_cprop_hardreg::execute.
1162
1163 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1164 to handle DEBUG_INSN for other uses. */
1165
1166void
1167copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1168{
1169 struct value_data *vd;
1170 vd = XNEWVEC (struct value_data, 1);
1171 init_value_data (vd);
1172
1173 skip_debug_insn_p = true;
1174 copyprop_hardreg_forward_1 (bb, vd);
1175 free (vd);
1176 skip_debug_insn_p = false;
1177}
1178
fac41238
PB
1179static void
1180validate_value_data (struct value_data *vd)
1181{
1182 HARD_REG_SET set;
1183 unsigned int i, j;
1184
1185 CLEAR_HARD_REG_SET (set);
1186
1187 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1188 if (vd->e[i].oldest_regno == i)
1189 {
1190 if (vd->e[i].mode == VOIDmode)
1191 {
1192 if (vd->e[i].next_regno != INVALID_REGNUM)
1193 internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)",
1194 i, vd->e[i].next_regno);
1195 continue;
1196 }
1197
1198 SET_HARD_REG_BIT (set, i);
1199
1200 for (j = vd->e[i].next_regno;
1201 j != INVALID_REGNUM;
1202 j = vd->e[j].next_regno)
1203 {
1204 if (TEST_HARD_REG_BIT (set, j))
1205 internal_error ("validate_value_data: Loop in regno chain (%u)",
1206 j);
1207 if (vd->e[j].oldest_regno != i)
1208 internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)",
1209 j, vd->e[j].oldest_regno);
1210
1211 SET_HARD_REG_BIT (set, j);
1212 }
1213 }
1214
1215 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1216 if (! TEST_HARD_REG_BIT (set, i)
1217 && (vd->e[i].mode != VOIDmode
1218 || vd->e[i].oldest_regno != i
1219 || vd->e[i].next_regno != INVALID_REGNUM))
1220 internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)",
1221 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1222 vd->e[i].next_regno);
1223}
b2b29377 1224
fac41238 1225\f
27a4cd48
DM
1226namespace {
1227
1228const pass_data pass_data_cprop_hardreg =
fac41238 1229{
27a4cd48
DM
1230 RTL_PASS, /* type */
1231 "cprop_hardreg", /* name */
1232 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1233 TV_CPROP_REGISTERS, /* tv_id */
1234 0, /* properties_required */
1235 0, /* properties_provided */
1236 0, /* properties_destroyed */
1237 0, /* todo_flags_start */
3bea341f 1238 TODO_df_finish, /* todo_flags_finish */
fac41238 1239};
27a4cd48
DM
1240
1241class pass_cprop_hardreg : public rtl_opt_pass
1242{
1243public:
c3284718
RS
1244 pass_cprop_hardreg (gcc::context *ctxt)
1245 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
27a4cd48
DM
1246 {}
1247
1248 /* opt_pass methods: */
1a3d085c
TS
1249 virtual bool gate (function *)
1250 {
1251 return (optimize > 0 && (flag_cprop_registers));
1252 }
1253
be55bfe6 1254 virtual unsigned int execute (function *);
27a4cd48
DM
1255
1256}; // class pass_cprop_hardreg
1257
be55bfe6
TS
1258unsigned int
1259pass_cprop_hardreg::execute (function *fun)
1260{
1261 struct value_data *all_vd;
1262 basic_block bb;
be55bfe6
TS
1263 bool analyze_called = false;
1264
1265 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1266
7ba9e72d 1267 auto_sbitmap visited (last_basic_block_for_fn (fun));
be55bfe6
TS
1268 bitmap_clear (visited);
1269
be55bfe6
TS
1270 FOR_EACH_BB_FN (bb, fun)
1271 {
1272 bitmap_set_bit (visited, bb->index);
1273
1274 /* If a block has a single predecessor, that we've already
1275 processed, begin with the value data that was live at
1276 the end of the predecessor block. */
1277 /* ??? Ought to use more intelligent queuing of blocks. */
1278 if (single_pred_p (bb)
1279 && bitmap_bit_p (visited, single_pred (bb)->index)
1280 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1281 {
1282 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1283 if (all_vd[bb->index].n_debug_insn_changes)
1284 {
1285 unsigned int regno;
1286
1287 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1288 {
1289 if (all_vd[bb->index].e[regno].debug_insn_changes)
1290 {
1291 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1292 if (--all_vd[bb->index].n_debug_insn_changes == 0)
1293 break;
1294 }
1295 }
1296 }
1297 }
1298 else
1299 init_value_data (all_vd + bb->index);
1300
1301 copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1302 }
1303
1304 if (MAY_HAVE_DEBUG_INSNS)
1305 {
1306 FOR_EACH_BB_FN (bb, fun)
1307 if (bitmap_bit_p (visited, bb->index)
1308 && all_vd[bb->index].n_debug_insn_changes)
1309 {
1310 unsigned int regno;
1311 bitmap live;
1312
1313 if (!analyze_called)
1314 {
1315 df_analyze ();
1316 analyze_called = true;
1317 }
1318 live = df_get_live_out (bb);
1319 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1320 if (all_vd[bb->index].e[regno].debug_insn_changes)
1321 {
1322 if (REGNO_REG_SET_P (live, regno))
1323 apply_debug_insn_changes (all_vd + bb->index, regno);
1324 if (all_vd[bb->index].n_debug_insn_changes == 0)
1325 break;
1326 }
1327 }
1328
fb0b2914 1329 queued_debug_insn_change_pool.release ();
be55bfe6
TS
1330 }
1331
be55bfe6
TS
1332 free (all_vd);
1333 return 0;
1334}
1335
27a4cd48
DM
1336} // anon namespace
1337
1338rtl_opt_pass *
1339make_pass_cprop_hardreg (gcc::context *ctxt)
1340{
1341 return new pass_cprop_hardreg (ctxt);
1342}