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Change use to type-based pool allocator in ira-build.c.
[thirdparty/gcc.git] / gcc / regcprop.c
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2d4749b6 1/* Copy propagation on hard registers for the GNU compiler.
d353bf18 2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
2d4749b6 3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
23#include "tm.h"
24#include "rtl.h"
25#include "tm_p.h"
26#include "insn-config.h"
27#include "regs.h"
28#include "addresses.h"
29#include "hard-reg-set.h"
94ea8568 30#include "predict.h"
31#include "vec.h"
a3020f2f 32#include "hashtab.h"
33#include "hash-set.h"
a3020f2f 34#include "machmode.h"
35#include "input.h"
2d4749b6 36#include "function.h"
94ea8568 37#include "dominance.h"
38#include "cfg.h"
39#include "basic-block.h"
40#include "reload.h"
2d4749b6 41#include "recog.h"
42#include "flags.h"
0b205f4c 43#include "diagnostic-core.h"
2d4749b6 44#include "obstack.h"
2d4749b6 45#include "tree-pass.h"
46#include "df.h"
29f9ec8f 47#include "rtl-iter.h"
2d4749b6 48
49/* The following code does forward propagation of hard register copies.
50 The object is to eliminate as many dependencies as possible, so that
51 we have the most scheduling freedom. As a side effect, we also clean
52 up some silly register allocation decisions made by reload. This
53 code may be obsoleted by a new register allocator. */
54
2058ec71 55/* DEBUG_INSNs aren't changed right away, as doing so might extend the
56 lifetime of a register and get the DEBUG_INSN subsequently reset.
57 So they are queued instead, and updated only when the register is
58 used in some subsequent real insn before it is set. */
59struct queued_debug_insn_change
60{
61 struct queued_debug_insn_change *next;
0991de81 62 rtx_insn *insn;
2058ec71 63 rtx *loc;
64 rtx new_rtx;
65};
66
2d4749b6 67/* For each register, we have a list of registers that contain the same
68 value. The OLDEST_REGNO field points to the head of the list, and
69 the NEXT_REGNO field runs through the list. The MODE field indicates
70 what mode the data is known to be in; this field is VOIDmode when the
71 register is not known to contain valid data. */
72
73struct value_data_entry
74{
3754d046 75 machine_mode mode;
2d4749b6 76 unsigned int oldest_regno;
77 unsigned int next_regno;
2058ec71 78 struct queued_debug_insn_change *debug_insn_changes;
2d4749b6 79};
80
81struct value_data
82{
83 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
84 unsigned int max_value_regs;
2058ec71 85 unsigned int n_debug_insn_changes;
2d4749b6 86};
87
2058ec71 88static alloc_pool debug_insn_changes_pool;
59483f68 89static bool skip_debug_insn_p;
2058ec71 90
2d4749b6 91static void kill_value_one_regno (unsigned, struct value_data *);
92static void kill_value_regno (unsigned, unsigned, struct value_data *);
29f9ec8f 93static void kill_value (const_rtx, struct value_data *);
3754d046 94static void set_value_regno (unsigned, machine_mode, struct value_data *);
2d4749b6 95static void init_value_data (struct value_data *);
96static void kill_clobbered_value (rtx, const_rtx, void *);
97static void kill_set_value (rtx, const_rtx, void *);
2d4749b6 98static void copy_value (rtx, rtx, struct value_data *);
3754d046 99static bool mode_change_ok (machine_mode, machine_mode,
2d4749b6 100 unsigned int);
3754d046 101static rtx maybe_mode_change (machine_mode, machine_mode,
102 machine_mode, unsigned int, unsigned int);
2d4749b6 103static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
0991de81 104static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
2d4749b6 105 struct value_data *);
106static bool replace_oldest_value_addr (rtx *, enum reg_class,
3754d046 107 machine_mode, addr_space_t,
0991de81 108 rtx_insn *, struct value_data *);
109static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
2d4749b6 110static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
111extern void debug_value_data (struct value_data *);
112#ifdef ENABLE_CHECKING
113static void validate_value_data (struct value_data *);
114#endif
115
2058ec71 116/* Free all queued updates for DEBUG_INSNs that change some reg to
117 register REGNO. */
118
119static void
120free_debug_insn_changes (struct value_data *vd, unsigned int regno)
121{
122 struct queued_debug_insn_change *cur, *next;
123 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
124 {
125 next = cur->next;
126 --vd->n_debug_insn_changes;
127 pool_free (debug_insn_changes_pool, cur);
128 }
129 vd->e[regno].debug_insn_changes = NULL;
130}
131
2d4749b6 132/* Kill register REGNO. This involves removing it from any value
133 lists, and resetting the value mode to VOIDmode. This is only a
134 helper function; it does not handle any hard registers overlapping
135 with REGNO. */
136
137static void
138kill_value_one_regno (unsigned int regno, struct value_data *vd)
139{
140 unsigned int i, next;
141
142 if (vd->e[regno].oldest_regno != regno)
143 {
144 for (i = vd->e[regno].oldest_regno;
145 vd->e[i].next_regno != regno;
146 i = vd->e[i].next_regno)
147 continue;
148 vd->e[i].next_regno = vd->e[regno].next_regno;
149 }
150 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
151 {
152 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
153 vd->e[i].oldest_regno = next;
154 }
155
156 vd->e[regno].mode = VOIDmode;
157 vd->e[regno].oldest_regno = regno;
158 vd->e[regno].next_regno = INVALID_REGNUM;
2058ec71 159 if (vd->e[regno].debug_insn_changes)
160 free_debug_insn_changes (vd, regno);
2d4749b6 161
162#ifdef ENABLE_CHECKING
163 validate_value_data (vd);
164#endif
165}
166
167/* Kill the value in register REGNO for NREGS, and any other registers
168 whose values overlap. */
169
170static void
171kill_value_regno (unsigned int regno, unsigned int nregs,
172 struct value_data *vd)
173{
174 unsigned int j;
175
176 /* Kill the value we're told to kill. */
177 for (j = 0; j < nregs; ++j)
178 kill_value_one_regno (regno + j, vd);
179
180 /* Kill everything that overlapped what we're told to kill. */
181 if (regno < vd->max_value_regs)
182 j = 0;
183 else
184 j = regno - vd->max_value_regs;
185 for (; j < regno; ++j)
186 {
187 unsigned int i, n;
188 if (vd->e[j].mode == VOIDmode)
189 continue;
190 n = hard_regno_nregs[j][vd->e[j].mode];
191 if (j + n > regno)
192 for (i = 0; i < n; ++i)
193 kill_value_one_regno (j + i, vd);
194 }
195}
196
197/* Kill X. This is a convenience function wrapping kill_value_regno
198 so that we mind the mode the register is in. */
199
200static void
29f9ec8f 201kill_value (const_rtx x, struct value_data *vd)
2d4749b6 202{
2d4749b6 203 if (GET_CODE (x) == SUBREG)
204 {
29f9ec8f 205 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
206 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
207 x = tmp ? tmp : SUBREG_REG (x);
2d4749b6 208 }
209 if (REG_P (x))
0933f1d9 210 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
2d4749b6 211}
212
213/* Remember that REGNO is valid in MODE. */
214
215static void
3754d046 216set_value_regno (unsigned int regno, machine_mode mode,
2d4749b6 217 struct value_data *vd)
218{
219 unsigned int nregs;
220
221 vd->e[regno].mode = mode;
222
223 nregs = hard_regno_nregs[regno][mode];
224 if (nregs > vd->max_value_regs)
225 vd->max_value_regs = nregs;
226}
227
228/* Initialize VD such that there are no known relationships between regs. */
229
230static void
231init_value_data (struct value_data *vd)
232{
233 int i;
234 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
235 {
236 vd->e[i].mode = VOIDmode;
237 vd->e[i].oldest_regno = i;
238 vd->e[i].next_regno = INVALID_REGNUM;
2058ec71 239 vd->e[i].debug_insn_changes = NULL;
2d4749b6 240 }
241 vd->max_value_regs = 0;
2058ec71 242 vd->n_debug_insn_changes = 0;
2d4749b6 243}
244
245/* Called through note_stores. If X is clobbered, kill its value. */
246
247static void
248kill_clobbered_value (rtx x, const_rtx set, void *data)
249{
250 struct value_data *const vd = (struct value_data *) data;
251 if (GET_CODE (set) == CLOBBER)
252 kill_value (x, vd);
253}
254
c8010b80 255/* A structure passed as data to kill_set_value through note_stores. */
256struct kill_set_value_data
257{
258 struct value_data *vd;
259 rtx ignore_set_reg;
260};
261
2d4749b6 262/* Called through note_stores. If X is set, not clobbered, kill its
263 current value and install it as the root of its own value list. */
264
265static void
266kill_set_value (rtx x, const_rtx set, void *data)
267{
c8010b80 268 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
269 if (rtx_equal_p (x, ksvd->ignore_set_reg))
270 return;
2d4749b6 271 if (GET_CODE (set) != CLOBBER)
272 {
c8010b80 273 kill_value (x, ksvd->vd);
2d4749b6 274 if (REG_P (x))
c8010b80 275 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
2d4749b6 276 }
277}
278
29f9ec8f 279/* Kill any register used in X as the base of an auto-increment expression,
280 and install that register as the root of its own value list. */
2d4749b6 281
29f9ec8f 282static void
8108f3f0 283kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
2d4749b6 284{
29f9ec8f 285 subrtx_iterator::array_type array;
286 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
2d4749b6 287 {
29f9ec8f 288 const_rtx x = *iter;
289 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
290 {
291 x = XEXP (x, 0);
292 kill_value (x, vd);
293 set_value_regno (REGNO (x), GET_MODE (x), vd);
294 iter.skip_subrtxes ();
295 }
2d4749b6 296 }
2d4749b6 297}
298
299/* Assert that SRC has been copied to DEST. Adjust the data structures
300 to reflect that SRC contains an older copy of the shared value. */
301
302static void
303copy_value (rtx dest, rtx src, struct value_data *vd)
304{
305 unsigned int dr = REGNO (dest);
306 unsigned int sr = REGNO (src);
307 unsigned int dn, sn;
308 unsigned int i;
309
310 /* ??? At present, it's possible to see noop sets. It'd be nice if
311 this were cleaned up beforehand... */
312 if (sr == dr)
313 return;
314
315 /* Do not propagate copies to the stack pointer, as that can leave
316 memory accesses with no scheduling dependency on the stack update. */
317 if (dr == STACK_POINTER_REGNUM)
318 return;
319
320 /* Likewise with the frame pointer, if we're using one. */
321 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
322 return;
323
324 /* Do not propagate copies to fixed or global registers, patterns
325 can be relying to see particular fixed register or users can
326 expect the chosen global register in asm. */
327 if (fixed_regs[dr] || global_regs[dr])
328 return;
329
330 /* If SRC and DEST overlap, don't record anything. */
0933f1d9 331 dn = REG_NREGS (dest);
332 sn = REG_NREGS (src);
2d4749b6 333 if ((dr > sr && dr < sr + sn)
334 || (sr > dr && sr < dr + dn))
335 return;
336
337 /* If SRC had no assigned mode (i.e. we didn't know it was live)
338 assign it now and assume the value came from an input argument
339 or somesuch. */
340 if (vd->e[sr].mode == VOIDmode)
341 set_value_regno (sr, vd->e[dr].mode, vd);
342
343 /* If we are narrowing the input to a smaller number of hard regs,
344 and it is in big endian, we are really extracting a high part.
345 Since we generally associate a low part of a value with the value itself,
346 we must not do the same for the high part.
347 Note we can still get low parts for the same mode combination through
348 a two-step copy involving differently sized hard regs.
349 Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each:
350 (set (reg:DI r0) (reg:DI fr0))
351 (set (reg:SI fr2) (reg:SI r0))
352 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
353 (set (reg:SI fr2) (reg:SI fr0))
354 loads the high part of (reg:DI fr0) into fr2.
355
356 We can't properly represent the latter case in our tables, so don't
357 record anything then. */
358 else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]
359 && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD
360 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
361 return;
362
363 /* If SRC had been assigned a mode narrower than the copy, we can't
364 link DEST into the chain, because not all of the pieces of the
365 copy came from oldest_regno. */
366 else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode])
367 return;
368
369 /* Link DR at the end of the value chain used by SR. */
370
371 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
372
373 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
374 continue;
375 vd->e[i].next_regno = dr;
376
377#ifdef ENABLE_CHECKING
378 validate_value_data (vd);
379#endif
380}
381
382/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
383
384static bool
3754d046 385mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
2d4749b6 386 unsigned int regno ATTRIBUTE_UNUSED)
387{
388 if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode))
389 return false;
390
391#ifdef CANNOT_CHANGE_MODE_CLASS
392 return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode);
393#endif
394
395 return true;
396}
397
398/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
399 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
400 in NEW_MODE.
401 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
402
403static rtx
3754d046 404maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
405 machine_mode new_mode, unsigned int regno,
2d4749b6 406 unsigned int copy_regno ATTRIBUTE_UNUSED)
407{
408 if (GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (orig_mode)
409 && GET_MODE_SIZE (copy_mode) < GET_MODE_SIZE (new_mode))
410 return NULL_RTX;
411
412 if (orig_mode == new_mode)
15183fd2 413 return gen_raw_REG (new_mode, regno);
2d4749b6 414 else if (mode_change_ok (orig_mode, new_mode, regno))
415 {
416 int copy_nregs = hard_regno_nregs[copy_regno][copy_mode];
417 int use_nregs = hard_regno_nregs[copy_regno][new_mode];
418 int copy_offset
419 = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs);
420 int offset
421 = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset;
422 int byteoffset = offset % UNITS_PER_WORD;
423 int wordoffset = offset - byteoffset;
424
425 offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0)
426 + (BYTES_BIG_ENDIAN ? byteoffset : 0));
3a45e441 427 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
428 if (HARD_REGNO_MODE_OK (regno, new_mode))
15183fd2 429 return gen_raw_REG (new_mode, regno);
2d4749b6 430 }
431 return NULL_RTX;
432}
433
434/* Find the oldest copy of the value contained in REGNO that is in
435 register class CL and has mode MODE. If found, return an rtx
436 of that oldest register, otherwise return NULL. */
437
438static rtx
439find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
440{
441 unsigned int regno = REGNO (reg);
3754d046 442 machine_mode mode = GET_MODE (reg);
2d4749b6 443 unsigned int i;
444
445 /* If we are accessing REG in some mode other that what we set it in,
446 make sure that the replacement is valid. In particular, consider
447 (set (reg:DI r11) (...))
448 (set (reg:SI r9) (reg:SI r11))
449 (set (reg:SI r10) (...))
450 (set (...) (reg:DI r9))
451 Replacing r9 with r11 is invalid. */
452 if (mode != vd->e[regno].mode)
453 {
454 if (hard_regno_nregs[regno][mode]
455 > hard_regno_nregs[regno][vd->e[regno].mode])
456 return NULL_RTX;
457 }
458
459 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
460 {
3754d046 461 machine_mode oldmode = vd->e[i].mode;
2d4749b6 462 rtx new_rtx;
463
464 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
75219367 465 continue;
2d4749b6 466
467 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
468 if (new_rtx)
469 {
470 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
471 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
472 REG_POINTER (new_rtx) = REG_POINTER (reg);
473 return new_rtx;
474 }
475 }
476
477 return NULL_RTX;
478}
479
480/* If possible, replace the register at *LOC with the oldest register
481 in register class CL. Return true if successfully replaced. */
482
483static bool
0991de81 484replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
2d4749b6 485 struct value_data *vd)
486{
487 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
59483f68 488 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
2d4749b6 489 {
2058ec71 490 if (DEBUG_INSN_P (insn))
491 {
492 struct queued_debug_insn_change *change;
493
494 if (dump_file)
495 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
496 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
497
498 change = (struct queued_debug_insn_change *)
499 pool_alloc (debug_insn_changes_pool);
500 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
501 change->insn = insn;
502 change->loc = loc;
503 change->new_rtx = new_rtx;
504 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
505 ++vd->n_debug_insn_changes;
506 return true;
507 }
2d4749b6 508 if (dump_file)
509 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
510 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
511
512 validate_change (insn, loc, new_rtx, 1);
513 return true;
514 }
515 return false;
516}
517
518/* Similar to replace_oldest_value_reg, but *LOC contains an address.
519 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
520 BASE_REG_CLASS depending on how the register is being considered. */
521
522static bool
523replace_oldest_value_addr (rtx *loc, enum reg_class cl,
3754d046 524 machine_mode mode, addr_space_t as,
0991de81 525 rtx_insn *insn, struct value_data *vd)
2d4749b6 526{
527 rtx x = *loc;
528 RTX_CODE code = GET_CODE (x);
529 const char *fmt;
530 int i, j;
531 bool changed = false;
532
533 switch (code)
534 {
535 case PLUS:
9845d120 536 if (DEBUG_INSN_P (insn))
537 break;
538
2d4749b6 539 {
540 rtx orig_op0 = XEXP (x, 0);
541 rtx orig_op1 = XEXP (x, 1);
542 RTX_CODE code0 = GET_CODE (orig_op0);
543 RTX_CODE code1 = GET_CODE (orig_op1);
544 rtx op0 = orig_op0;
545 rtx op1 = orig_op1;
546 rtx *locI = NULL;
547 rtx *locB = NULL;
548 enum rtx_code index_code = SCRATCH;
549
550 if (GET_CODE (op0) == SUBREG)
551 {
552 op0 = SUBREG_REG (op0);
553 code0 = GET_CODE (op0);
554 }
555
556 if (GET_CODE (op1) == SUBREG)
557 {
558 op1 = SUBREG_REG (op1);
559 code1 = GET_CODE (op1);
560 }
561
562 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
563 || code0 == ZERO_EXTEND || code1 == MEM)
564 {
565 locI = &XEXP (x, 0);
566 locB = &XEXP (x, 1);
567 index_code = GET_CODE (*locI);
568 }
569 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
570 || code1 == ZERO_EXTEND || code0 == MEM)
571 {
572 locI = &XEXP (x, 1);
573 locB = &XEXP (x, 0);
574 index_code = GET_CODE (*locI);
575 }
576 else if (code0 == CONST_INT || code0 == CONST
577 || code0 == SYMBOL_REF || code0 == LABEL_REF)
578 {
579 locB = &XEXP (x, 1);
580 index_code = GET_CODE (XEXP (x, 0));
581 }
582 else if (code1 == CONST_INT || code1 == CONST
583 || code1 == SYMBOL_REF || code1 == LABEL_REF)
584 {
585 locB = &XEXP (x, 0);
586 index_code = GET_CODE (XEXP (x, 1));
587 }
588 else if (code0 == REG && code1 == REG)
589 {
590 int index_op;
591 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
592
593 if (REGNO_OK_FOR_INDEX_P (regno1)
f8a8fc7b 594 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
2d4749b6 595 index_op = 1;
596 else if (REGNO_OK_FOR_INDEX_P (regno0)
f8a8fc7b 597 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
2d4749b6 598 index_op = 0;
f8a8fc7b 599 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
2d4749b6 600 || REGNO_OK_FOR_INDEX_P (regno1))
601 index_op = 1;
f8a8fc7b 602 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
2d4749b6 603 index_op = 0;
604 else
605 index_op = 1;
606
607 locI = &XEXP (x, index_op);
608 locB = &XEXP (x, !index_op);
609 index_code = GET_CODE (*locI);
610 }
611 else if (code0 == REG)
612 {
613 locI = &XEXP (x, 0);
614 locB = &XEXP (x, 1);
615 index_code = GET_CODE (*locI);
616 }
617 else if (code1 == REG)
618 {
619 locI = &XEXP (x, 1);
620 locB = &XEXP (x, 0);
621 index_code = GET_CODE (*locI);
622 }
623
624 if (locI)
f8a8fc7b 625 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
626 mode, as, insn, vd);
2d4749b6 627 if (locB)
628 changed |= replace_oldest_value_addr (locB,
f8a8fc7b 629 base_reg_class (mode, as, PLUS,
2d4749b6 630 index_code),
f8a8fc7b 631 mode, as, insn, vd);
2d4749b6 632 return changed;
633 }
634
635 case POST_INC:
636 case POST_DEC:
637 case POST_MODIFY:
638 case PRE_INC:
639 case PRE_DEC:
640 case PRE_MODIFY:
641 return false;
642
643 case MEM:
644 return replace_oldest_value_mem (x, insn, vd);
645
646 case REG:
647 return replace_oldest_value_reg (loc, cl, insn, vd);
648
649 default:
650 break;
651 }
652
653 fmt = GET_RTX_FORMAT (code);
654 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
655 {
656 if (fmt[i] == 'e')
f8a8fc7b 657 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
2d4749b6 658 insn, vd);
659 else if (fmt[i] == 'E')
660 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
661 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
f8a8fc7b 662 mode, as, insn, vd);
2d4749b6 663 }
664
665 return changed;
666}
667
668/* Similar to replace_oldest_value_reg, but X contains a memory. */
669
670static bool
0991de81 671replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
2d4749b6 672{
9845d120 673 enum reg_class cl;
674
675 if (DEBUG_INSN_P (insn))
676 cl = ALL_REGS;
677 else
f8a8fc7b 678 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
9845d120 679
680 return replace_oldest_value_addr (&XEXP (x, 0), cl,
f8a8fc7b 681 GET_MODE (x), MEM_ADDR_SPACE (x),
682 insn, vd);
2d4749b6 683}
684
2058ec71 685/* Apply all queued updates for DEBUG_INSNs that change some reg to
686 register REGNO. */
687
688static void
689apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
690{
691 struct queued_debug_insn_change *change;
0991de81 692 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
2058ec71 693
694 for (change = vd->e[regno].debug_insn_changes;
695 change;
696 change = change->next)
697 {
698 if (last_insn != change->insn)
699 {
700 apply_change_group ();
701 last_insn = change->insn;
702 }
703 validate_change (change->insn, change->loc, change->new_rtx, 1);
704 }
705 apply_change_group ();
706}
707
2058ec71 708/* Called via note_uses, for all used registers in a real insn
709 apply DEBUG_INSN changes that change registers to the used
710 registers. */
711
712static void
6243e03f 713cprop_find_used_regs (rtx *loc, void *data)
2058ec71 714{
6243e03f 715 struct value_data *const vd = (struct value_data *) data;
716 subrtx_iterator::array_type array;
717 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
718 {
719 const_rtx x = *iter;
720 if (REG_P (x))
721 {
722 unsigned int regno = REGNO (x);
723 if (vd->e[regno].debug_insn_changes)
724 {
725 apply_debug_insn_changes (vd, regno);
726 free_debug_insn_changes (vd, regno);
727 }
728 }
729 }
2058ec71 730}
731
9c4a0128 732/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
733
734static void
735kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
736{
737 note_stores (PATTERN (insn), kill_clobbered_value, vd);
738
739 if (CALL_P (insn))
740 {
741 rtx exp;
742
743 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
744 {
745 rtx x = XEXP (exp, 0);
746 if (GET_CODE (x) == CLOBBER)
747 kill_value (SET_DEST (x), vd);
748 }
749 }
750}
751
2d4749b6 752/* Perform the forward copy propagation on basic block BB. */
753
754static bool
755copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
756{
9845d120 757 bool anything_changed = false;
0991de81 758 rtx_insn *insn;
2d4749b6 759
760 for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
761 {
757fefec 762 int n_ops, i, predicated;
2d4749b6 763 bool is_asm, any_replacements;
764 rtx set;
ff5a75fc 765 rtx link;
2d4749b6 766 bool replaced[MAX_RECOG_OPERANDS];
9845d120 767 bool changed = false;
c8010b80 768 struct kill_set_value_data ksvd;
2d4749b6 769
9845d120 770 if (!NONDEBUG_INSN_P (insn))
2d4749b6 771 {
9845d120 772 if (DEBUG_INSN_P (insn))
773 {
774 rtx loc = INSN_VAR_LOCATION_LOC (insn);
2058ec71 775 if (!VAR_LOC_UNKNOWN_P (loc))
776 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
777 ALL_REGS, GET_MODE (loc),
f8a8fc7b 778 ADDR_SPACE_GENERIC, insn, vd);
9845d120 779 }
780
2d4749b6 781 if (insn == BB_END (bb))
782 break;
783 else
784 continue;
785 }
786
787 set = single_set (insn);
835b8178 788 extract_constrain_insn (insn);
8eaaac4d 789 preprocess_constraints (insn);
89a7a6a5 790 const operand_alternative *op_alt = which_op_alt ();
2d4749b6 791 n_ops = recog_data.n_operands;
792 is_asm = asm_noperands (PATTERN (insn)) >= 0;
793
89a7a6a5 794 /* Simplify the code below by promoting OP_OUT to OP_INOUT
2d4749b6 795 in predicated instructions. */
796
797 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
798 for (i = 0; i < n_ops; ++i)
799 {
757fefec 800 int matches = op_alt[i].matches;
757fefec 801 if (matches >= 0 || op_alt[i].matched >= 0
2d4749b6 802 || (predicated && recog_data.operand_type[i] == OP_OUT))
803 recog_data.operand_type[i] = OP_INOUT;
804 }
805
2058ec71 806 /* Apply changes to earlier DEBUG_INSNs if possible. */
807 if (vd->n_debug_insn_changes)
808 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
809
2d4749b6 810 /* For each earlyclobber operand, zap the value data. */
811 for (i = 0; i < n_ops; i++)
757fefec 812 if (op_alt[i].earlyclobber)
2d4749b6 813 kill_value (recog_data.operand[i], vd);
814
815 /* Within asms, a clobber cannot overlap inputs or outputs.
816 I wouldn't think this were true for regular insns, but
817 scan_rtx treats them like that... */
9c4a0128 818 kill_clobbered_values (insn, vd);
2d4749b6 819
820 /* Kill all auto-incremented values. */
821 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
29f9ec8f 822 kill_autoinc_value (insn, vd);
2d4749b6 823
824 /* Kill all early-clobbered operands. */
825 for (i = 0; i < n_ops; i++)
757fefec 826 if (op_alt[i].earlyclobber)
2d4749b6 827 kill_value (recog_data.operand[i], vd);
828
ff5a75fc 829 /* If we have dead sets in the insn, then we need to note these as we
830 would clobbers. */
831 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
832 {
833 if (REG_NOTE_KIND (link) == REG_UNUSED)
834 {
835 kill_value (XEXP (link, 0), vd);
836 /* Furthermore, if the insn looked like a single-set,
837 but the dead store kills the source value of that
838 set, then we can no-longer use the plain move
839 special case below. */
840 if (set
841 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
842 set = NULL;
843 }
844 }
845
2d4749b6 846 /* Special-case plain move instructions, since we may well
847 be able to do the move from a different register class. */
848 if (set && REG_P (SET_SRC (set)))
849 {
850 rtx src = SET_SRC (set);
851 unsigned int regno = REGNO (src);
3754d046 852 machine_mode mode = GET_MODE (src);
2d4749b6 853 unsigned int i;
854 rtx new_rtx;
855
856 /* If we are accessing SRC in some mode other that what we
857 set it in, make sure that the replacement is valid. */
858 if (mode != vd->e[regno].mode)
859 {
860 if (hard_regno_nregs[regno][mode]
861 > hard_regno_nregs[regno][vd->e[regno].mode])
862 goto no_move_special_case;
417491d1 863
864 /* And likewise, if we are narrowing on big endian the transformation
865 is also invalid. */
866 if (hard_regno_nregs[regno][mode]
867 < hard_regno_nregs[regno][vd->e[regno].mode]
868 && (GET_MODE_SIZE (vd->e[regno].mode) > UNITS_PER_WORD
869 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
870 goto no_move_special_case;
2d4749b6 871 }
872
873 /* If the destination is also a register, try to find a source
874 register in the same class. */
875 if (REG_P (SET_DEST (set)))
876 {
877 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd);
878 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
879 {
880 if (dump_file)
881 fprintf (dump_file,
882 "insn %u: replaced reg %u with %u\n",
883 INSN_UID (insn), regno, REGNO (new_rtx));
884 changed = true;
885 goto did_replacement;
886 }
cc7416ff 887 /* We need to re-extract as validate_change clobbers
888 recog_data. */
835b8178 889 extract_constrain_insn (insn);
8eaaac4d 890 preprocess_constraints (insn);
2d4749b6 891 }
892
893 /* Otherwise, try all valid registers and see if its valid. */
894 for (i = vd->e[regno].oldest_regno; i != regno;
895 i = vd->e[i].next_regno)
896 {
897 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
898 mode, i, regno);
899 if (new_rtx != NULL_RTX)
900 {
901 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
902 {
903 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
904 REG_ATTRS (new_rtx) = REG_ATTRS (src);
905 REG_POINTER (new_rtx) = REG_POINTER (src);
906 if (dump_file)
907 fprintf (dump_file,
908 "insn %u: replaced reg %u with %u\n",
909 INSN_UID (insn), regno, REGNO (new_rtx));
910 changed = true;
911 goto did_replacement;
912 }
cc7416ff 913 /* We need to re-extract as validate_change clobbers
914 recog_data. */
835b8178 915 extract_constrain_insn (insn);
8eaaac4d 916 preprocess_constraints (insn);
2d4749b6 917 }
918 }
919 }
920 no_move_special_case:
921
922 any_replacements = false;
923
924 /* For each input operand, replace a hard register with the
925 eldest live copy that's in an appropriate register class. */
926 for (i = 0; i < n_ops; i++)
927 {
928 replaced[i] = false;
929
930 /* Don't scan match_operand here, since we've no reg class
931 information to pass down. Any operands that we could
932 substitute in will be represented elsewhere. */
933 if (recog_data.constraints[i][0] == '\0')
934 continue;
935
936 /* Don't replace in asms intentionally referencing hard regs. */
937 if (is_asm && REG_P (recog_data.operand[i])
938 && (REGNO (recog_data.operand[i])
939 == ORIGINAL_REGNO (recog_data.operand[i])))
940 continue;
941
942 if (recog_data.operand_type[i] == OP_IN)
943 {
757fefec 944 if (op_alt[i].is_address)
2d4749b6 945 replaced[i]
946 = replace_oldest_value_addr (recog_data.operand_loc[i],
89a7a6a5 947 alternative_class (op_alt, i),
948 VOIDmode, ADDR_SPACE_GENERIC,
949 insn, vd);
2d4749b6 950 else if (REG_P (recog_data.operand[i]))
951 replaced[i]
952 = replace_oldest_value_reg (recog_data.operand_loc[i],
89a7a6a5 953 alternative_class (op_alt, i),
954 insn, vd);
2d4749b6 955 else if (MEM_P (recog_data.operand[i]))
956 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
957 insn, vd);
958 }
959 else if (MEM_P (recog_data.operand[i]))
960 replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
961 insn, vd);
962
963 /* If we performed any replacement, update match_dups. */
964 if (replaced[i])
965 {
966 int j;
967 rtx new_rtx;
968
969 new_rtx = *recog_data.operand_loc[i];
970 recog_data.operand[i] = new_rtx;
971 for (j = 0; j < recog_data.n_dups; j++)
972 if (recog_data.dup_num[j] == i)
973 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
974
975 any_replacements = true;
976 }
977 }
978
979 if (any_replacements)
980 {
981 if (! apply_change_group ())
982 {
983 for (i = 0; i < n_ops; i++)
984 if (replaced[i])
985 {
986 rtx old = *recog_data.operand_loc[i];
987 recog_data.operand[i] = old;
988 }
989
990 if (dump_file)
991 fprintf (dump_file,
992 "insn %u: reg replacements not verified\n",
993 INSN_UID (insn));
994 }
995 else
996 changed = true;
997 }
998
999 did_replacement:
9845d120 1000 if (changed)
c7458ee3 1001 {
1002 anything_changed = true;
1003
1004 /* If something changed, perhaps further changes to earlier
1005 DEBUG_INSNs can be applied. */
1006 if (vd->n_debug_insn_changes)
1007 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
1008 }
9845d120 1009
c8010b80 1010 ksvd.vd = vd;
1011 ksvd.ignore_set_reg = NULL_RTX;
1012
2d4749b6 1013 /* Clobber call-clobbered registers. */
1014 if (CALL_P (insn))
c8010b80 1015 {
24ec6636 1016 unsigned int set_regno = INVALID_REGNUM;
1017 unsigned int set_nregs = 0;
1018 unsigned int regno;
c8010b80 1019 rtx exp;
7f73851f 1020 HARD_REG_SET regs_invalidated_by_this_call;
24ec6636 1021
c8010b80 1022 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1023 {
1024 rtx x = XEXP (exp, 0);
1025 if (GET_CODE (x) == SET)
1026 {
1027 rtx dest = SET_DEST (x);
1028 kill_value (dest, vd);
1029 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1030 copy_value (dest, SET_SRC (x), vd);
1031 ksvd.ignore_set_reg = dest;
1032 set_regno = REGNO (dest);
0933f1d9 1033 set_nregs = REG_NREGS (dest);
c8010b80 1034 break;
1035 }
1036 }
24ec6636 1037
7f73851f 1038 get_call_reg_set_usage (insn,
1039 &regs_invalidated_by_this_call,
1040 regs_invalidated_by_call);
1aafbb7e 1041 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
7f73851f 1042 if ((TEST_HARD_REG_BIT (regs_invalidated_by_this_call, regno)
1aafbb7e 1043 || HARD_REGNO_CALL_PART_CLOBBERED (regno, vd->e[regno].mode))
1044 && (regno < set_regno || regno >= set_regno + set_nregs))
24ec6636 1045 kill_value_regno (regno, 1, vd);
ca719585 1046
1047 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
1048 of the SET isn't in regs_invalidated_by_call hard reg set,
1049 but instead among CLOBBERs on the CALL_INSN, we could wrongly
1050 assume the value in it is still live. */
1051 if (ksvd.ignore_set_reg)
9c4a0128 1052 kill_clobbered_values (insn, vd);
c8010b80 1053 }
2d4749b6 1054
d4878205 1055 bool copy_p = (set
1056 && REG_P (SET_DEST (set))
1057 && REG_P (SET_SRC (set)));
1058 bool noop_p = (copy_p
1059 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
2d4749b6 1060
d4878205 1061 if (!noop_p)
1062 {
1063 /* Notice stores. */
1064 note_stores (PATTERN (insn), kill_set_value, &ksvd);
1065
1066 /* Notice copies. */
1067 if (copy_p)
1068 copy_value (SET_DEST (set), SET_SRC (set), vd);
1069 }
2d4749b6 1070
1071 if (insn == BB_END (bb))
1072 break;
1073 }
1074
9845d120 1075 return anything_changed;
2d4749b6 1076}
1077
2d4749b6 1078/* Dump the value chain data to stderr. */
1079
4b987fac 1080DEBUG_FUNCTION void
2d4749b6 1081debug_value_data (struct value_data *vd)
1082{
1083 HARD_REG_SET set;
1084 unsigned int i, j;
1085
1086 CLEAR_HARD_REG_SET (set);
1087
1088 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1089 if (vd->e[i].oldest_regno == i)
1090 {
1091 if (vd->e[i].mode == VOIDmode)
1092 {
1093 if (vd->e[i].next_regno != INVALID_REGNUM)
1094 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1095 i, vd->e[i].next_regno);
1096 continue;
1097 }
1098
1099 SET_HARD_REG_BIT (set, i);
1100 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1101
1102 for (j = vd->e[i].next_regno;
1103 j != INVALID_REGNUM;
1104 j = vd->e[j].next_regno)
1105 {
1106 if (TEST_HARD_REG_BIT (set, j))
1107 {
1108 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1109 return;
1110 }
1111
1112 if (vd->e[j].oldest_regno != i)
1113 {
1114 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1115 j, vd->e[j].oldest_regno);
1116 return;
1117 }
1118 SET_HARD_REG_BIT (set, j);
1119 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1120 }
1121 fputc ('\n', stderr);
1122 }
1123
1124 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1125 if (! TEST_HARD_REG_BIT (set, i)
1126 && (vd->e[i].mode != VOIDmode
1127 || vd->e[i].oldest_regno != i
1128 || vd->e[i].next_regno != INVALID_REGNUM))
1129 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1130 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1131 vd->e[i].next_regno);
1132}
1133
59483f68 1134/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1135 DEBUG_INSN is skipped since we do not want to involve DF related
1136 staff as how it is handled in function pass_cprop_hardreg::execute.
1137
1138 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1139 to handle DEBUG_INSN for other uses. */
1140
1141void
1142copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1143{
1144 struct value_data *vd;
1145 vd = XNEWVEC (struct value_data, 1);
1146 init_value_data (vd);
1147
1148 skip_debug_insn_p = true;
1149 copyprop_hardreg_forward_1 (bb, vd);
1150 free (vd);
1151 skip_debug_insn_p = false;
1152}
1153
2d4749b6 1154#ifdef ENABLE_CHECKING
1155static void
1156validate_value_data (struct value_data *vd)
1157{
1158 HARD_REG_SET set;
1159 unsigned int i, j;
1160
1161 CLEAR_HARD_REG_SET (set);
1162
1163 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1164 if (vd->e[i].oldest_regno == i)
1165 {
1166 if (vd->e[i].mode == VOIDmode)
1167 {
1168 if (vd->e[i].next_regno != INVALID_REGNUM)
1169 internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)",
1170 i, vd->e[i].next_regno);
1171 continue;
1172 }
1173
1174 SET_HARD_REG_BIT (set, i);
1175
1176 for (j = vd->e[i].next_regno;
1177 j != INVALID_REGNUM;
1178 j = vd->e[j].next_regno)
1179 {
1180 if (TEST_HARD_REG_BIT (set, j))
1181 internal_error ("validate_value_data: Loop in regno chain (%u)",
1182 j);
1183 if (vd->e[j].oldest_regno != i)
1184 internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)",
1185 j, vd->e[j].oldest_regno);
1186
1187 SET_HARD_REG_BIT (set, j);
1188 }
1189 }
1190
1191 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1192 if (! TEST_HARD_REG_BIT (set, i)
1193 && (vd->e[i].mode != VOIDmode
1194 || vd->e[i].oldest_regno != i
1195 || vd->e[i].next_regno != INVALID_REGNUM))
1196 internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)",
1197 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1198 vd->e[i].next_regno);
1199}
1200#endif
1201\f
cbe8bda8 1202namespace {
1203
1204const pass_data pass_data_cprop_hardreg =
2d4749b6 1205{
cbe8bda8 1206 RTL_PASS, /* type */
1207 "cprop_hardreg", /* name */
1208 OPTGROUP_NONE, /* optinfo_flags */
cbe8bda8 1209 TV_CPROP_REGISTERS, /* tv_id */
1210 0, /* properties_required */
1211 0, /* properties_provided */
1212 0, /* properties_destroyed */
1213 0, /* todo_flags_start */
8b88439e 1214 TODO_df_finish, /* todo_flags_finish */
2d4749b6 1215};
cbe8bda8 1216
1217class pass_cprop_hardreg : public rtl_opt_pass
1218{
1219public:
9af5ce0c 1220 pass_cprop_hardreg (gcc::context *ctxt)
1221 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
cbe8bda8 1222 {}
1223
1224 /* opt_pass methods: */
31315c24 1225 virtual bool gate (function *)
1226 {
1227 return (optimize > 0 && (flag_cprop_registers));
1228 }
1229
65b0537f 1230 virtual unsigned int execute (function *);
cbe8bda8 1231
1232}; // class pass_cprop_hardreg
1233
65b0537f 1234unsigned int
1235pass_cprop_hardreg::execute (function *fun)
1236{
1237 struct value_data *all_vd;
1238 basic_block bb;
1239 sbitmap visited;
1240 bool analyze_called = false;
1241
1242 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1243
1244 visited = sbitmap_alloc (last_basic_block_for_fn (fun));
1245 bitmap_clear (visited);
1246
1247 if (MAY_HAVE_DEBUG_INSNS)
1248 debug_insn_changes_pool
1249 = create_alloc_pool ("debug insn changes pool",
1250 sizeof (struct queued_debug_insn_change), 256);
1251
1252 FOR_EACH_BB_FN (bb, fun)
1253 {
1254 bitmap_set_bit (visited, bb->index);
1255
1256 /* If a block has a single predecessor, that we've already
1257 processed, begin with the value data that was live at
1258 the end of the predecessor block. */
1259 /* ??? Ought to use more intelligent queuing of blocks. */
1260 if (single_pred_p (bb)
1261 && bitmap_bit_p (visited, single_pred (bb)->index)
1262 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1263 {
1264 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1265 if (all_vd[bb->index].n_debug_insn_changes)
1266 {
1267 unsigned int regno;
1268
1269 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1270 {
1271 if (all_vd[bb->index].e[regno].debug_insn_changes)
1272 {
1273 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1274 if (--all_vd[bb->index].n_debug_insn_changes == 0)
1275 break;
1276 }
1277 }
1278 }
1279 }
1280 else
1281 init_value_data (all_vd + bb->index);
1282
1283 copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1284 }
1285
1286 if (MAY_HAVE_DEBUG_INSNS)
1287 {
1288 FOR_EACH_BB_FN (bb, fun)
1289 if (bitmap_bit_p (visited, bb->index)
1290 && all_vd[bb->index].n_debug_insn_changes)
1291 {
1292 unsigned int regno;
1293 bitmap live;
1294
1295 if (!analyze_called)
1296 {
1297 df_analyze ();
1298 analyze_called = true;
1299 }
1300 live = df_get_live_out (bb);
1301 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1302 if (all_vd[bb->index].e[regno].debug_insn_changes)
1303 {
1304 if (REGNO_REG_SET_P (live, regno))
1305 apply_debug_insn_changes (all_vd + bb->index, regno);
1306 if (all_vd[bb->index].n_debug_insn_changes == 0)
1307 break;
1308 }
1309 }
1310
1311 free_alloc_pool (debug_insn_changes_pool);
1312 }
1313
1314 sbitmap_free (visited);
1315 free (all_vd);
1316 return 0;
1317}
1318
cbe8bda8 1319} // anon namespace
1320
1321rtl_opt_pass *
1322make_pass_cprop_hardreg (gcc::context *ctxt)
1323{
1324 return new pass_cprop_hardreg (ctxt);
1325}
Mirror of https://gcc.gnu.org/git/gcc.git