]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/regcprop.cc
fold-const: do not fold NaN result from non-NaN operands [PR95115]
[thirdparty/gcc.git] / gcc / regcprop.cc
CommitLineData
fac41238 1/* Copy propagation on hard registers for the GNU compiler.
7adcbafe 2 Copyright (C) 2000-2022 Free Software Foundation, Inc.
fac41238
PB
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
c7131fb2 23#include "backend.h"
fac41238 24#include "rtl.h"
c7131fb2 25#include "df.h"
4d0cdd0c 26#include "memmodel.h"
fac41238
PB
27#include "tm_p.h"
28#include "insn-config.h"
29#include "regs.h"
957060b5
AM
30#include "emit-rtl.h"
31#include "recog.h"
32#include "diagnostic-core.h"
fac41238 33#include "addresses.h"
fac41238 34#include "tree-pass.h"
4ca738b3 35#include "rtl-iter.h"
c049b107 36#include "cfgrtl.h"
80ec73f4 37#include "target.h"
5a5a3bc5 38#include "function-abi.h"
fac41238
PB
39
40/* The following code does forward propagation of hard register copies.
41 The object is to eliminate as many dependencies as possible, so that
42 we have the most scheduling freedom. As a side effect, we also clean
43 up some silly register allocation decisions made by reload. This
44 code may be obsoleted by a new register allocator. */
45
e7140c8d
JJ
46/* DEBUG_INSNs aren't changed right away, as doing so might extend the
47 lifetime of a register and get the DEBUG_INSN subsequently reset.
48 So they are queued instead, and updated only when the register is
49 used in some subsequent real insn before it is set. */
50struct queued_debug_insn_change
51{
52 struct queued_debug_insn_change *next;
ea8175a4 53 rtx_insn *insn;
e7140c8d
JJ
54 rtx *loc;
55 rtx new_rtx;
56};
57
fac41238
PB
58/* For each register, we have a list of registers that contain the same
59 value. The OLDEST_REGNO field points to the head of the list, and
60 the NEXT_REGNO field runs through the list. The MODE field indicates
61 what mode the data is known to be in; this field is VOIDmode when the
62 register is not known to contain valid data. */
63
64struct value_data_entry
65{
ef4bddc2 66 machine_mode mode;
fac41238
PB
67 unsigned int oldest_regno;
68 unsigned int next_regno;
e7140c8d 69 struct queued_debug_insn_change *debug_insn_changes;
fac41238
PB
70};
71
72struct value_data
73{
74 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
75 unsigned int max_value_regs;
e7140c8d 76 unsigned int n_debug_insn_changes;
fac41238
PB
77};
78
fb0b2914 79static object_allocator<queued_debug_insn_change> queued_debug_insn_change_pool
fcb87c50 80 ("debug insn changes pool");
5c7337c5 81
a2e6c10c 82static bool skip_debug_insn_p;
e7140c8d 83
fac41238
PB
84static void kill_value_one_regno (unsigned, struct value_data *);
85static void kill_value_regno (unsigned, unsigned, struct value_data *);
4ca738b3 86static void kill_value (const_rtx, struct value_data *);
ef4bddc2 87static void set_value_regno (unsigned, machine_mode, struct value_data *);
fac41238
PB
88static void init_value_data (struct value_data *);
89static void kill_clobbered_value (rtx, const_rtx, void *);
90static void kill_set_value (rtx, const_rtx, void *);
fac41238 91static void copy_value (rtx, rtx, struct value_data *);
ef4bddc2 92static bool mode_change_ok (machine_mode, machine_mode,
fac41238 93 unsigned int);
ef4bddc2
RS
94static rtx maybe_mode_change (machine_mode, machine_mode,
95 machine_mode, unsigned int, unsigned int);
fac41238 96static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
ea8175a4 97static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
fac41238
PB
98 struct value_data *);
99static bool replace_oldest_value_addr (rtx *, enum reg_class,
ef4bddc2 100 machine_mode, addr_space_t,
ea8175a4
DM
101 rtx_insn *, struct value_data *);
102static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
fac41238
PB
103static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
104extern void debug_value_data (struct value_data *);
fac41238 105static void validate_value_data (struct value_data *);
fac41238 106
e7140c8d
JJ
107/* Free all queued updates for DEBUG_INSNs that change some reg to
108 register REGNO. */
109
110static void
111free_debug_insn_changes (struct value_data *vd, unsigned int regno)
112{
113 struct queued_debug_insn_change *cur, *next;
114 for (cur = vd->e[regno].debug_insn_changes; cur; cur = next)
115 {
116 next = cur->next;
117 --vd->n_debug_insn_changes;
fb0b2914 118 queued_debug_insn_change_pool.remove (cur);
e7140c8d
JJ
119 }
120 vd->e[regno].debug_insn_changes = NULL;
121}
122
fac41238
PB
123/* Kill register REGNO. This involves removing it from any value
124 lists, and resetting the value mode to VOIDmode. This is only a
125 helper function; it does not handle any hard registers overlapping
126 with REGNO. */
127
128static void
129kill_value_one_regno (unsigned int regno, struct value_data *vd)
130{
131 unsigned int i, next;
132
133 if (vd->e[regno].oldest_regno != regno)
134 {
135 for (i = vd->e[regno].oldest_regno;
136 vd->e[i].next_regno != regno;
137 i = vd->e[i].next_regno)
138 continue;
139 vd->e[i].next_regno = vd->e[regno].next_regno;
140 }
141 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
142 {
143 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
144 vd->e[i].oldest_regno = next;
145 }
146
147 vd->e[regno].mode = VOIDmode;
148 vd->e[regno].oldest_regno = regno;
149 vd->e[regno].next_regno = INVALID_REGNUM;
e7140c8d
JJ
150 if (vd->e[regno].debug_insn_changes)
151 free_debug_insn_changes (vd, regno);
fac41238 152
b2b29377
MM
153 if (flag_checking)
154 validate_value_data (vd);
fac41238
PB
155}
156
157/* Kill the value in register REGNO for NREGS, and any other registers
158 whose values overlap. */
159
160static void
161kill_value_regno (unsigned int regno, unsigned int nregs,
162 struct value_data *vd)
163{
164 unsigned int j;
165
166 /* Kill the value we're told to kill. */
167 for (j = 0; j < nregs; ++j)
168 kill_value_one_regno (regno + j, vd);
169
170 /* Kill everything that overlapped what we're told to kill. */
171 if (regno < vd->max_value_regs)
172 j = 0;
173 else
174 j = regno - vd->max_value_regs;
175 for (; j < regno; ++j)
176 {
177 unsigned int i, n;
178 if (vd->e[j].mode == VOIDmode)
179 continue;
ad474626 180 n = hard_regno_nregs (j, vd->e[j].mode);
fac41238
PB
181 if (j + n > regno)
182 for (i = 0; i < n; ++i)
183 kill_value_one_regno (j + i, vd);
184 }
185}
186
187/* Kill X. This is a convenience function wrapping kill_value_regno
188 so that we mind the mode the register is in. */
189
190static void
4ca738b3 191kill_value (const_rtx x, struct value_data *vd)
fac41238 192{
fac41238
PB
193 if (GET_CODE (x) == SUBREG)
194 {
4ca738b3
RS
195 rtx tmp = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
196 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
197 x = tmp ? tmp : SUBREG_REG (x);
fac41238
PB
198 }
199 if (REG_P (x))
dc8afb70 200 kill_value_regno (REGNO (x), REG_NREGS (x), vd);
fac41238
PB
201}
202
203/* Remember that REGNO is valid in MODE. */
204
205static void
ef4bddc2 206set_value_regno (unsigned int regno, machine_mode mode,
fac41238
PB
207 struct value_data *vd)
208{
209 unsigned int nregs;
210
211 vd->e[regno].mode = mode;
212
ad474626 213 nregs = hard_regno_nregs (regno, mode);
fac41238
PB
214 if (nregs > vd->max_value_regs)
215 vd->max_value_regs = nregs;
216}
217
218/* Initialize VD such that there are no known relationships between regs. */
219
220static void
221init_value_data (struct value_data *vd)
222{
223 int i;
224 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
225 {
226 vd->e[i].mode = VOIDmode;
227 vd->e[i].oldest_regno = i;
228 vd->e[i].next_regno = INVALID_REGNUM;
e7140c8d 229 vd->e[i].debug_insn_changes = NULL;
fac41238
PB
230 }
231 vd->max_value_regs = 0;
e7140c8d 232 vd->n_debug_insn_changes = 0;
fac41238
PB
233}
234
235/* Called through note_stores. If X is clobbered, kill its value. */
236
237static void
238kill_clobbered_value (rtx x, const_rtx set, void *data)
239{
240 struct value_data *const vd = (struct value_data *) data;
8df47bdf 241
17d184e5 242 if (GET_CODE (set) == CLOBBER)
fac41238
PB
243 kill_value (x, vd);
244}
245
e384e6b5
BS
246/* A structure passed as data to kill_set_value through note_stores. */
247struct kill_set_value_data
248{
249 struct value_data *vd;
250 rtx ignore_set_reg;
251};
252
fac41238
PB
253/* Called through note_stores. If X is set, not clobbered, kill its
254 current value and install it as the root of its own value list. */
255
256static void
257kill_set_value (rtx x, const_rtx set, void *data)
258{
e384e6b5
BS
259 struct kill_set_value_data *ksvd = (struct kill_set_value_data *) data;
260 if (rtx_equal_p (x, ksvd->ignore_set_reg))
261 return;
8df47bdf 262
17d184e5 263 if (GET_CODE (set) != CLOBBER)
fac41238 264 {
e384e6b5 265 kill_value (x, ksvd->vd);
fac41238 266 if (REG_P (x))
e384e6b5 267 set_value_regno (REGNO (x), GET_MODE (x), ksvd->vd);
fac41238
PB
268 }
269}
270
4ca738b3
RS
271/* Kill any register used in X as the base of an auto-increment expression,
272 and install that register as the root of its own value list. */
fac41238 273
4ca738b3 274static void
15cd50fb 275kill_autoinc_value (rtx_insn *insn, struct value_data *vd)
fac41238 276{
4ca738b3
RS
277 subrtx_iterator::array_type array;
278 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
fac41238 279 {
4ca738b3
RS
280 const_rtx x = *iter;
281 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
282 {
283 x = XEXP (x, 0);
284 kill_value (x, vd);
285 set_value_regno (REGNO (x), GET_MODE (x), vd);
286 iter.skip_subrtxes ();
287 }
fac41238 288 }
fac41238
PB
289}
290
291/* Assert that SRC has been copied to DEST. Adjust the data structures
292 to reflect that SRC contains an older copy of the shared value. */
293
294static void
295copy_value (rtx dest, rtx src, struct value_data *vd)
296{
297 unsigned int dr = REGNO (dest);
298 unsigned int sr = REGNO (src);
299 unsigned int dn, sn;
300 unsigned int i;
301
302 /* ??? At present, it's possible to see noop sets. It'd be nice if
303 this were cleaned up beforehand... */
304 if (sr == dr)
305 return;
306
307 /* Do not propagate copies to the stack pointer, as that can leave
308 memory accesses with no scheduling dependency on the stack update. */
309 if (dr == STACK_POINTER_REGNUM)
310 return;
311
312 /* Likewise with the frame pointer, if we're using one. */
313 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
314 return;
315
316 /* Do not propagate copies to fixed or global registers, patterns
317 can be relying to see particular fixed register or users can
318 expect the chosen global register in asm. */
319 if (fixed_regs[dr] || global_regs[dr])
320 return;
321
322 /* If SRC and DEST overlap, don't record anything. */
dc8afb70
RS
323 dn = REG_NREGS (dest);
324 sn = REG_NREGS (src);
fac41238
PB
325 if ((dr > sr && dr < sr + sn)
326 || (sr > dr && sr < dr + dn))
327 return;
328
329 /* If SRC had no assigned mode (i.e. we didn't know it was live)
330 assign it now and assume the value came from an input argument
331 or somesuch. */
332 if (vd->e[sr].mode == VOIDmode)
333 set_value_regno (sr, vd->e[dr].mode, vd);
334
335 /* If we are narrowing the input to a smaller number of hard regs,
336 and it is in big endian, we are really extracting a high part.
337 Since we generally associate a low part of a value with the value itself,
338 we must not do the same for the high part.
339 Note we can still get low parts for the same mode combination through
340 a two-step copy involving differently sized hard regs.
026c3cfd 341 Assume hard regs fr* are 32 bits each, while r* are 64 bits each:
fac41238
PB
342 (set (reg:DI r0) (reg:DI fr0))
343 (set (reg:SI fr2) (reg:SI r0))
344 loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while:
345 (set (reg:SI fr2) (reg:SI fr0))
346 loads the high part of (reg:DI fr0) into fr2.
347
348 We can't properly represent the latter case in our tables, so don't
349 record anything then. */
ad474626 350 else if (sn < hard_regno_nregs (sr, vd->e[sr].mode)
91914e56
RS
351 && maybe_ne (subreg_lowpart_offset (GET_MODE (dest),
352 vd->e[sr].mode), 0U))
fac41238
PB
353 return;
354
355 /* If SRC had been assigned a mode narrower than the copy, we can't
356 link DEST into the chain, because not all of the pieces of the
357 copy came from oldest_regno. */
ad474626 358 else if (sn > hard_regno_nregs (sr, vd->e[sr].mode))
fac41238
PB
359 return;
360
425ad87d
JJ
361 /* If a narrower value is copied using wider mode, the upper bits
362 are undefined (could be e.g. a former paradoxical subreg). Signal
363 in that case we've only copied value using the narrower mode.
364 Consider:
365 (set (reg:DI r14) (mem:DI ...))
366 (set (reg:QI si) (reg:QI r14))
367 (set (reg:DI bp) (reg:DI r14))
368 (set (reg:DI r14) (const_int ...))
369 (set (reg:DI dx) (reg:DI si))
370 (set (reg:DI si) (const_int ...))
371 (set (reg:DI dx) (reg:DI bp))
372 The last set is not redundant, while the low 8 bits of dx are already
373 equal to low 8 bits of bp, the other bits are undefined. */
374 else if (partial_subreg_p (vd->e[sr].mode, GET_MODE (src)))
375 {
376 if (!REG_CAN_CHANGE_MODE_P (sr, GET_MODE (src), vd->e[sr].mode)
377 || !REG_CAN_CHANGE_MODE_P (dr, vd->e[sr].mode, GET_MODE (dest)))
378 return;
379 set_value_regno (dr, vd->e[sr].mode, vd);
380 }
e711b67a 381
fac41238
PB
382 /* Link DR at the end of the value chain used by SR. */
383
384 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
385
386 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
387 continue;
388 vd->e[i].next_regno = dr;
389
b2b29377
MM
390 if (flag_checking)
391 validate_value_data (vd);
fac41238
PB
392}
393
394/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
395
396static bool
ef4bddc2 397mode_change_ok (machine_mode orig_mode, machine_mode new_mode,
fac41238
PB
398 unsigned int regno ATTRIBUTE_UNUSED)
399{
bd4288c0 400 if (partial_subreg_p (orig_mode, new_mode))
fac41238
PB
401 return false;
402
0d803030 403 return REG_CAN_CHANGE_MODE_P (regno, orig_mode, new_mode);
fac41238
PB
404}
405
406/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it -
407 was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed
408 in NEW_MODE.
409 Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */
410
411static rtx
ef4bddc2
RS
412maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
413 machine_mode new_mode, unsigned int regno,
fac41238
PB
414 unsigned int copy_regno ATTRIBUTE_UNUSED)
415{
bd4288c0
RS
416 if (partial_subreg_p (copy_mode, orig_mode)
417 && partial_subreg_p (copy_mode, new_mode))
fac41238
PB
418 return NULL_RTX;
419
d1446456
JL
420 /* Avoid creating multiple copies of the stack pointer. Some ports
421 assume there is one and only one stack pointer.
422
423 It's unclear if we need to do the same for other special registers. */
424 if (regno == STACK_POINTER_REGNUM)
425 return NULL_RTX;
426
fac41238 427 if (orig_mode == new_mode)
9fccb335 428 return gen_raw_REG (new_mode, regno);
fac41238
PB
429 else if (mode_change_ok (orig_mode, new_mode, regno))
430 {
ad474626
RS
431 int copy_nregs = hard_regno_nregs (copy_regno, copy_mode);
432 int use_nregs = hard_regno_nregs (copy_regno, new_mode);
cf098191
RS
433 poly_uint64 bytes_per_reg;
434 if (!can_div_trunc_p (GET_MODE_SIZE (copy_mode),
435 copy_nregs, &bytes_per_reg))
436 return NULL_RTX;
437 poly_uint64 copy_offset = bytes_per_reg * (copy_nregs - use_nregs);
91914e56 438 poly_uint64 offset
e10326ff
RS
439 = subreg_size_lowpart_offset (GET_MODE_SIZE (new_mode) + copy_offset,
440 GET_MODE_SIZE (orig_mode));
d6f23738 441 regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
f939c3e6 442 if (targetm.hard_regno_mode_ok (regno, new_mode))
9fccb335 443 return gen_raw_REG (new_mode, regno);
fac41238
PB
444 }
445 return NULL_RTX;
446}
447
448/* Find the oldest copy of the value contained in REGNO that is in
449 register class CL and has mode MODE. If found, return an rtx
450 of that oldest register, otherwise return NULL. */
451
452static rtx
453find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
454{
455 unsigned int regno = REGNO (reg);
ef4bddc2 456 machine_mode mode = GET_MODE (reg);
fac41238
PB
457 unsigned int i;
458
65f4b875
AO
459 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
460
fac41238
PB
461 /* If we are accessing REG in some mode other that what we set it in,
462 make sure that the replacement is valid. In particular, consider
463 (set (reg:DI r11) (...))
464 (set (reg:SI r9) (reg:SI r11))
465 (set (reg:SI r10) (...))
466 (set (...) (reg:DI r9))
467 Replacing r9 with r11 is invalid. */
462a99aa 468 if (mode != vd->e[regno].mode
a28cc94a
SSF
469 && (REG_NREGS (reg) > hard_regno_nregs (regno, vd->e[regno].mode)
470 || !REG_CAN_CHANGE_MODE_P (regno, mode, vd->e[regno].mode)))
462a99aa 471 return NULL_RTX;
fac41238
PB
472
473 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
474 {
ef4bddc2 475 machine_mode oldmode = vd->e[i].mode;
fac41238
PB
476 rtx new_rtx;
477
478 if (!in_hard_reg_set_p (reg_class_contents[cl], mode, i))
f90333eb 479 continue;
fac41238
PB
480
481 new_rtx = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno);
482 if (new_rtx)
483 {
484 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (reg);
485 REG_ATTRS (new_rtx) = REG_ATTRS (reg);
486 REG_POINTER (new_rtx) = REG_POINTER (reg);
487 return new_rtx;
488 }
489 }
490
491 return NULL_RTX;
492}
493
494/* If possible, replace the register at *LOC with the oldest register
495 in register class CL. Return true if successfully replaced. */
496
497static bool
ea8175a4 498replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
fac41238
PB
499 struct value_data *vd)
500{
501 rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
a2e6c10c 502 if (new_rtx && (!DEBUG_INSN_P (insn) || !skip_debug_insn_p))
fac41238 503 {
e7140c8d
JJ
504 if (DEBUG_INSN_P (insn))
505 {
506 struct queued_debug_insn_change *change;
507
508 if (dump_file)
509 fprintf (dump_file, "debug_insn %u: queued replacing reg %u with %u\n",
510 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
511
fb0b2914 512 change = queued_debug_insn_change_pool.allocate ();
e7140c8d
JJ
513 change->next = vd->e[REGNO (new_rtx)].debug_insn_changes;
514 change->insn = insn;
515 change->loc = loc;
516 change->new_rtx = new_rtx;
517 vd->e[REGNO (new_rtx)].debug_insn_changes = change;
518 ++vd->n_debug_insn_changes;
519 return true;
520 }
fac41238
PB
521 if (dump_file)
522 fprintf (dump_file, "insn %u: replaced reg %u with %u\n",
523 INSN_UID (insn), REGNO (*loc), REGNO (new_rtx));
524
525 validate_change (insn, loc, new_rtx, 1);
526 return true;
527 }
528 return false;
529}
530
531/* Similar to replace_oldest_value_reg, but *LOC contains an address.
532 Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or
533 BASE_REG_CLASS depending on how the register is being considered. */
534
535static bool
536replace_oldest_value_addr (rtx *loc, enum reg_class cl,
ef4bddc2 537 machine_mode mode, addr_space_t as,
ea8175a4 538 rtx_insn *insn, struct value_data *vd)
fac41238
PB
539{
540 rtx x = *loc;
541 RTX_CODE code = GET_CODE (x);
542 const char *fmt;
543 int i, j;
544 bool changed = false;
545
546 switch (code)
547 {
548 case PLUS:
b5b8b0ac
AO
549 if (DEBUG_INSN_P (insn))
550 break;
551
fac41238
PB
552 {
553 rtx orig_op0 = XEXP (x, 0);
554 rtx orig_op1 = XEXP (x, 1);
555 RTX_CODE code0 = GET_CODE (orig_op0);
556 RTX_CODE code1 = GET_CODE (orig_op1);
557 rtx op0 = orig_op0;
558 rtx op1 = orig_op1;
559 rtx *locI = NULL;
560 rtx *locB = NULL;
561 enum rtx_code index_code = SCRATCH;
562
563 if (GET_CODE (op0) == SUBREG)
564 {
565 op0 = SUBREG_REG (op0);
566 code0 = GET_CODE (op0);
567 }
568
569 if (GET_CODE (op1) == SUBREG)
570 {
571 op1 = SUBREG_REG (op1);
572 code1 = GET_CODE (op1);
573 }
574
575 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
576 || code0 == ZERO_EXTEND || code1 == MEM)
577 {
578 locI = &XEXP (x, 0);
579 locB = &XEXP (x, 1);
580 index_code = GET_CODE (*locI);
581 }
582 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
583 || code1 == ZERO_EXTEND || code0 == MEM)
584 {
585 locI = &XEXP (x, 1);
586 locB = &XEXP (x, 0);
587 index_code = GET_CODE (*locI);
588 }
589 else if (code0 == CONST_INT || code0 == CONST
590 || code0 == SYMBOL_REF || code0 == LABEL_REF)
591 {
592 locB = &XEXP (x, 1);
593 index_code = GET_CODE (XEXP (x, 0));
594 }
595 else if (code1 == CONST_INT || code1 == CONST
596 || code1 == SYMBOL_REF || code1 == LABEL_REF)
597 {
598 locB = &XEXP (x, 0);
599 index_code = GET_CODE (XEXP (x, 1));
600 }
601 else if (code0 == REG && code1 == REG)
602 {
603 int index_op;
604 unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
605
606 if (REGNO_OK_FOR_INDEX_P (regno1)
86fc3d06 607 && regno_ok_for_base_p (regno0, mode, as, PLUS, REG))
fac41238
PB
608 index_op = 1;
609 else if (REGNO_OK_FOR_INDEX_P (regno0)
86fc3d06 610 && regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238 611 index_op = 0;
86fc3d06 612 else if (regno_ok_for_base_p (regno0, mode, as, PLUS, REG)
fac41238
PB
613 || REGNO_OK_FOR_INDEX_P (regno1))
614 index_op = 1;
86fc3d06 615 else if (regno_ok_for_base_p (regno1, mode, as, PLUS, REG))
fac41238
PB
616 index_op = 0;
617 else
618 index_op = 1;
619
620 locI = &XEXP (x, index_op);
621 locB = &XEXP (x, !index_op);
622 index_code = GET_CODE (*locI);
623 }
624 else if (code0 == REG)
625 {
626 locI = &XEXP (x, 0);
627 locB = &XEXP (x, 1);
628 index_code = GET_CODE (*locI);
629 }
630 else if (code1 == REG)
631 {
632 locI = &XEXP (x, 1);
633 locB = &XEXP (x, 0);
634 index_code = GET_CODE (*locI);
635 }
636
637 if (locI)
86fc3d06
UW
638 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS,
639 mode, as, insn, vd);
fac41238
PB
640 if (locB)
641 changed |= replace_oldest_value_addr (locB,
86fc3d06 642 base_reg_class (mode, as, PLUS,
fac41238 643 index_code),
86fc3d06 644 mode, as, insn, vd);
fac41238
PB
645 return changed;
646 }
647
648 case POST_INC:
649 case POST_DEC:
650 case POST_MODIFY:
651 case PRE_INC:
652 case PRE_DEC:
653 case PRE_MODIFY:
654 return false;
655
656 case MEM:
657 return replace_oldest_value_mem (x, insn, vd);
658
659 case REG:
660 return replace_oldest_value_reg (loc, cl, insn, vd);
661
662 default:
663 break;
664 }
665
666 fmt = GET_RTX_FORMAT (code);
667 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
668 {
669 if (fmt[i] == 'e')
86fc3d06 670 changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, as,
fac41238
PB
671 insn, vd);
672 else if (fmt[i] == 'E')
673 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
674 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl,
86fc3d06 675 mode, as, insn, vd);
fac41238
PB
676 }
677
678 return changed;
679}
680
681/* Similar to replace_oldest_value_reg, but X contains a memory. */
682
683static bool
ea8175a4 684replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
fac41238 685{
b5b8b0ac
AO
686 enum reg_class cl;
687
688 if (DEBUG_INSN_P (insn))
689 cl = ALL_REGS;
690 else
86fc3d06 691 cl = base_reg_class (GET_MODE (x), MEM_ADDR_SPACE (x), MEM, SCRATCH);
b5b8b0ac
AO
692
693 return replace_oldest_value_addr (&XEXP (x, 0), cl,
86fc3d06
UW
694 GET_MODE (x), MEM_ADDR_SPACE (x),
695 insn, vd);
fac41238
PB
696}
697
e7140c8d
JJ
698/* Apply all queued updates for DEBUG_INSNs that change some reg to
699 register REGNO. */
700
701static void
702apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
703{
704 struct queued_debug_insn_change *change;
ea8175a4 705 rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
e7140c8d
JJ
706
707 for (change = vd->e[regno].debug_insn_changes;
708 change;
709 change = change->next)
710 {
711 if (last_insn != change->insn)
712 {
713 apply_change_group ();
714 last_insn = change->insn;
715 }
716 validate_change (change->insn, change->loc, change->new_rtx, 1);
717 }
718 apply_change_group ();
719}
720
e7140c8d
JJ
721/* Called via note_uses, for all used registers in a real insn
722 apply DEBUG_INSN changes that change registers to the used
723 registers. */
724
725static void
0d2e76b8 726cprop_find_used_regs (rtx *loc, void *data)
e7140c8d 727{
0d2e76b8
RS
728 struct value_data *const vd = (struct value_data *) data;
729 subrtx_iterator::array_type array;
730 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
731 {
732 const_rtx x = *iter;
733 if (REG_P (x))
734 {
735 unsigned int regno = REGNO (x);
736 if (vd->e[regno].debug_insn_changes)
737 {
738 apply_debug_insn_changes (vd, regno);
739 free_debug_insn_changes (vd, regno);
740 }
741 }
742 }
e7140c8d
JJ
743}
744
486b97f2
TV
745/* Apply clobbers of INSN in PATTERN and C_I_F_U to value_data VD. */
746
747static void
748kill_clobbered_values (rtx_insn *insn, struct value_data *vd)
749{
e8448ba5 750 note_stores (insn, kill_clobbered_value, vd);
486b97f2
TV
751}
752
fac41238
PB
753/* Perform the forward copy propagation on basic block BB. */
754
755static bool
756copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
757{
b5b8b0ac 758 bool anything_changed = false;
c049b107 759 rtx_insn *insn, *next;
fac41238 760
c049b107 761 for (insn = BB_HEAD (bb); ; insn = next)
fac41238 762 {
29d70a0f 763 int n_ops, i, predicated;
fac41238
PB
764 bool is_asm, any_replacements;
765 rtx set;
c34fb198 766 rtx link;
b5b8b0ac 767 bool changed = false;
e384e6b5 768 struct kill_set_value_data ksvd;
fac41238 769
c049b107 770 next = NEXT_INSN (insn);
b5b8b0ac 771 if (!NONDEBUG_INSN_P (insn))
fac41238 772 {
36f52e8f 773 if (DEBUG_BIND_INSN_P (insn))
b5b8b0ac
AO
774 {
775 rtx loc = INSN_VAR_LOCATION_LOC (insn);
e7140c8d
JJ
776 if (!VAR_LOC_UNKNOWN_P (loc))
777 replace_oldest_value_addr (&INSN_VAR_LOCATION_LOC (insn),
778 ALL_REGS, GET_MODE (loc),
86fc3d06 779 ADDR_SPACE_GENERIC, insn, vd);
b5b8b0ac
AO
780 }
781
fac41238
PB
782 if (insn == BB_END (bb))
783 break;
784 else
785 continue;
786 }
787
788 set = single_set (insn);
d6da226a
JH
789
790 /* Detect noop sets and remove them before processing side effects. */
791 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
792 {
793 unsigned int regno = REGNO (SET_SRC (set));
794 rtx r1 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
795 SET_DEST (set), vd);
796 rtx r2 = find_oldest_value_reg (REGNO_REG_CLASS (regno),
797 SET_SRC (set), vd);
798 if (rtx_equal_p (r1 ? r1 : SET_DEST (set), r2 ? r2 : SET_SRC (set)))
799 {
800 bool last = insn == BB_END (bb);
d6da226a
JH
801 delete_insn (insn);
802 if (last)
803 break;
804 continue;
805 }
806 }
807
f73675e3
JL
808 /* Detect obviously dead sets (via REG_UNUSED notes) and remove them. */
809 if (set
4dd11305 810 && !RTX_FRAME_RELATED_P (insn)
c81704b3 811 && NONJUMP_INSN_P (insn)
52295c2d 812 && !may_trap_p (set)
f73675e3
JL
813 && find_reg_note (insn, REG_UNUSED, SET_DEST (set))
814 && !side_effects_p (SET_SRC (set))
815 && !side_effects_p (SET_DEST (set)))
816 {
817 bool last = insn == BB_END (bb);
818 delete_insn (insn);
819 if (last)
820 break;
821 continue;
822 }
823
824
75d25a02 825 extract_constrain_insn (insn);
1145837d 826 preprocess_constraints (insn);
5efe5dec 827 const operand_alternative *op_alt = which_op_alt ();
fac41238
PB
828 n_ops = recog_data.n_operands;
829 is_asm = asm_noperands (PATTERN (insn)) >= 0;
830
5efe5dec 831 /* Simplify the code below by promoting OP_OUT to OP_INOUT
fac41238
PB
832 in predicated instructions. */
833
834 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
835 for (i = 0; i < n_ops; ++i)
836 {
29d70a0f 837 int matches = op_alt[i].matches;
29d70a0f 838 if (matches >= 0 || op_alt[i].matched >= 0
fac41238
PB
839 || (predicated && recog_data.operand_type[i] == OP_OUT))
840 recog_data.operand_type[i] = OP_INOUT;
841 }
842
e7140c8d
JJ
843 /* Apply changes to earlier DEBUG_INSNs if possible. */
844 if (vd->n_debug_insn_changes)
845 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
846
fac41238
PB
847 /* For each earlyclobber operand, zap the value data. */
848 for (i = 0; i < n_ops; i++)
29d70a0f 849 if (op_alt[i].earlyclobber)
fac41238
PB
850 kill_value (recog_data.operand[i], vd);
851
852 /* Within asms, a clobber cannot overlap inputs or outputs.
853 I wouldn't think this were true for regular insns, but
854 scan_rtx treats them like that... */
486b97f2 855 kill_clobbered_values (insn, vd);
fac41238
PB
856
857 /* Kill all auto-incremented values. */
858 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
4ca738b3 859 kill_autoinc_value (insn, vd);
fac41238
PB
860
861 /* Kill all early-clobbered operands. */
862 for (i = 0; i < n_ops; i++)
29d70a0f 863 if (op_alt[i].earlyclobber)
fac41238
PB
864 kill_value (recog_data.operand[i], vd);
865
c34fb198
RE
866 /* If we have dead sets in the insn, then we need to note these as we
867 would clobbers. */
868 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
869 {
870 if (REG_NOTE_KIND (link) == REG_UNUSED)
871 {
872 kill_value (XEXP (link, 0), vd);
873 /* Furthermore, if the insn looked like a single-set,
874 but the dead store kills the source value of that
875 set, then we can no-longer use the plain move
876 special case below. */
877 if (set
878 && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set)))
879 set = NULL;
880 }
c35533d7
SB
881
882 /* We need to keep CFI info correct, and the same on all paths,
883 so we cannot normally replace the registers REG_CFA_REGISTER
884 refers to. Bail. */
885 if (REG_NOTE_KIND (link) == REG_CFA_REGISTER)
886 goto did_replacement;
c34fb198
RE
887 }
888
fac41238
PB
889 /* Special-case plain move instructions, since we may well
890 be able to do the move from a different register class. */
891 if (set && REG_P (SET_SRC (set)))
892 {
893 rtx src = SET_SRC (set);
894 unsigned int regno = REGNO (src);
ef4bddc2 895 machine_mode mode = GET_MODE (src);
fac41238
PB
896 unsigned int i;
897 rtx new_rtx;
898
899 /* If we are accessing SRC in some mode other that what we
900 set it in, make sure that the replacement is valid. */
901 if (mode != vd->e[regno].mode)
902 {
462a99aa 903 if (REG_NREGS (src)
ad474626 904 > hard_regno_nregs (regno, vd->e[regno].mode))
fac41238 905 goto no_move_special_case;
26689420
DM
906
907 /* And likewise, if we are narrowing on big endian the transformation
908 is also invalid. */
ad474626 909 if (REG_NREGS (src) < hard_regno_nregs (regno, vd->e[regno].mode)
91914e56
RS
910 && maybe_ne (subreg_lowpart_offset (mode,
911 vd->e[regno].mode), 0U))
26689420 912 goto no_move_special_case;
fac41238
PB
913 }
914
915 /* If the destination is also a register, try to find a source
916 register in the same class. */
917 if (REG_P (SET_DEST (set)))
918 {
d6da226a
JH
919 new_rtx = find_oldest_value_reg (REGNO_REG_CLASS (regno),
920 src, vd);
921
fac41238
PB
922 if (new_rtx && validate_change (insn, &SET_SRC (set), new_rtx, 0))
923 {
924 if (dump_file)
925 fprintf (dump_file,
926 "insn %u: replaced reg %u with %u\n",
927 INSN_UID (insn), regno, REGNO (new_rtx));
928 changed = true;
929 goto did_replacement;
930 }
3147591f
MS
931 /* We need to re-extract as validate_change clobbers
932 recog_data. */
75d25a02 933 extract_constrain_insn (insn);
1145837d 934 preprocess_constraints (insn);
fac41238
PB
935 }
936
937 /* Otherwise, try all valid registers and see if its valid. */
938 for (i = vd->e[regno].oldest_regno; i != regno;
939 i = vd->e[i].next_regno)
940 {
941 new_rtx = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode,
942 mode, i, regno);
943 if (new_rtx != NULL_RTX)
944 {
945 if (validate_change (insn, &SET_SRC (set), new_rtx, 0))
946 {
947 ORIGINAL_REGNO (new_rtx) = ORIGINAL_REGNO (src);
948 REG_ATTRS (new_rtx) = REG_ATTRS (src);
949 REG_POINTER (new_rtx) = REG_POINTER (src);
950 if (dump_file)
951 fprintf (dump_file,
952 "insn %u: replaced reg %u with %u\n",
953 INSN_UID (insn), regno, REGNO (new_rtx));
954 changed = true;
955 goto did_replacement;
956 }
3147591f
MS
957 /* We need to re-extract as validate_change clobbers
958 recog_data. */
75d25a02 959 extract_constrain_insn (insn);
1145837d 960 preprocess_constraints (insn);
fac41238
PB
961 }
962 }
963 }
964 no_move_special_case:
965
966 any_replacements = false;
967
968 /* For each input operand, replace a hard register with the
969 eldest live copy that's in an appropriate register class. */
970 for (i = 0; i < n_ops; i++)
971 {
868865f4 972 bool replaced = false;
fac41238
PB
973
974 /* Don't scan match_operand here, since we've no reg class
975 information to pass down. Any operands that we could
976 substitute in will be represented elsewhere. */
977 if (recog_data.constraints[i][0] == '\0')
978 continue;
979
980 /* Don't replace in asms intentionally referencing hard regs. */
981 if (is_asm && REG_P (recog_data.operand[i])
982 && (REGNO (recog_data.operand[i])
983 == ORIGINAL_REGNO (recog_data.operand[i])))
984 continue;
985
986 if (recog_data.operand_type[i] == OP_IN)
987 {
29d70a0f 988 if (op_alt[i].is_address)
868865f4 989 replaced
fac41238 990 = replace_oldest_value_addr (recog_data.operand_loc[i],
5efe5dec
RS
991 alternative_class (op_alt, i),
992 VOIDmode, ADDR_SPACE_GENERIC,
993 insn, vd);
fac41238 994 else if (REG_P (recog_data.operand[i]))
868865f4 995 replaced
fac41238 996 = replace_oldest_value_reg (recog_data.operand_loc[i],
5efe5dec
RS
997 alternative_class (op_alt, i),
998 insn, vd);
fac41238 999 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1000 replaced = replace_oldest_value_mem (recog_data.operand[i],
1001 insn, vd);
fac41238
PB
1002 }
1003 else if (MEM_P (recog_data.operand[i]))
868865f4
JJ
1004 replaced = replace_oldest_value_mem (recog_data.operand[i],
1005 insn, vd);
fac41238
PB
1006
1007 /* If we performed any replacement, update match_dups. */
868865f4 1008 if (replaced)
fac41238
PB
1009 {
1010 int j;
1011 rtx new_rtx;
1012
1013 new_rtx = *recog_data.operand_loc[i];
1014 recog_data.operand[i] = new_rtx;
1015 for (j = 0; j < recog_data.n_dups; j++)
1016 if (recog_data.dup_num[j] == i)
1017 validate_unshare_change (insn, recog_data.dup_loc[j], new_rtx, 1);
1018
1019 any_replacements = true;
1020 }
1021 }
1022
1023 if (any_replacements)
1024 {
1025 if (! apply_change_group ())
1026 {
fac41238
PB
1027 if (dump_file)
1028 fprintf (dump_file,
1029 "insn %u: reg replacements not verified\n",
1030 INSN_UID (insn));
1031 }
1032 else
1033 changed = true;
1034 }
1035
1036 did_replacement:
b5b8b0ac 1037 if (changed)
828f2c8b
JJ
1038 {
1039 anything_changed = true;
1040
1041 /* If something changed, perhaps further changes to earlier
1042 DEBUG_INSNs can be applied. */
1043 if (vd->n_debug_insn_changes)
1044 note_uses (&PATTERN (insn), cprop_find_used_regs, vd);
4dd11305 1045 df_insn_rescan (insn);
828f2c8b 1046 }
b5b8b0ac 1047
e384e6b5
BS
1048 ksvd.vd = vd;
1049 ksvd.ignore_set_reg = NULL_RTX;
1050
fac41238
PB
1051 /* Clobber call-clobbered registers. */
1052 if (CALL_P (insn))
e384e6b5 1053 {
c7fb4c7a
SB
1054 unsigned int set_regno = INVALID_REGNUM;
1055 unsigned int set_nregs = 0;
1056 unsigned int regno;
e384e6b5 1057 rtx exp;
c7fb4c7a 1058
e384e6b5
BS
1059 for (exp = CALL_INSN_FUNCTION_USAGE (insn); exp; exp = XEXP (exp, 1))
1060 {
1061 rtx x = XEXP (exp, 0);
1062 if (GET_CODE (x) == SET)
1063 {
1064 rtx dest = SET_DEST (x);
1065 kill_value (dest, vd);
1066 set_value_regno (REGNO (dest), GET_MODE (dest), vd);
1067 copy_value (dest, SET_SRC (x), vd);
1068 ksvd.ignore_set_reg = dest;
1069 set_regno = REGNO (dest);
dc8afb70 1070 set_nregs = REG_NREGS (dest);
e384e6b5
BS
1071 break;
1072 }
1073 }
c7fb4c7a 1074
5a5a3bc5 1075 function_abi callee_abi = insn_callee_abi (insn);
9ccac701 1076 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
30503f4e
RS
1077 if (vd->e[regno].mode != VOIDmode
1078 && callee_abi.clobbers_reg_p (vd->e[regno].mode, regno)
9ccac701 1079 && (regno < set_regno || regno >= set_regno + set_nregs))
c7fb4c7a 1080 kill_value_regno (regno, 1, vd);
c5a44004
JJ
1081
1082 /* If SET was seen in CALL_INSN_FUNCTION_USAGE, and SET_SRC
30503f4e
RS
1083 of the SET isn't clobbered by CALLEE_ABI, but instead among
1084 CLOBBERs on the CALL_INSN, we could wrongly assume the
1085 value in it is still live. */
c5a44004 1086 if (ksvd.ignore_set_reg)
486b97f2 1087 kill_clobbered_values (insn, vd);
e384e6b5 1088 }
fac41238 1089
8c8fe663
TV
1090 bool copy_p = (set
1091 && REG_P (SET_DEST (set))
1092 && REG_P (SET_SRC (set)));
1093 bool noop_p = (copy_p
1094 && rtx_equal_p (SET_DEST (set), SET_SRC (set)));
fac41238 1095
c049b107
JJ
1096 /* If a noop move is using narrower mode than we have recorded,
1097 we need to either remove the noop move, or kill_set_value. */
1098 if (noop_p
bd4288c0
RS
1099 && partial_subreg_p (GET_MODE (SET_DEST (set)),
1100 vd->e[REGNO (SET_DEST (set))].mode))
c049b107
JJ
1101 {
1102 if (noop_move_p (insn))
1103 {
1104 bool last = insn == BB_END (bb);
1105 delete_insn (insn);
1106 if (last)
1107 break;
1108 }
1109 else
1110 noop_p = false;
1111 }
1112
8c8fe663
TV
1113 if (!noop_p)
1114 {
1115 /* Notice stores. */
e8448ba5 1116 note_stores (insn, kill_set_value, &ksvd);
8c8fe663
TV
1117
1118 /* Notice copies. */
1119 if (copy_p)
4dd11305
JL
1120 {
1121 df_insn_rescan (insn);
1122 copy_value (SET_DEST (set), SET_SRC (set), vd);
1123 }
8c8fe663 1124 }
fac41238
PB
1125
1126 if (insn == BB_END (bb))
1127 break;
1128 }
1129
b5b8b0ac 1130 return anything_changed;
fac41238
PB
1131}
1132
fac41238
PB
1133/* Dump the value chain data to stderr. */
1134
24e47c76 1135DEBUG_FUNCTION void
fac41238
PB
1136debug_value_data (struct value_data *vd)
1137{
1138 HARD_REG_SET set;
1139 unsigned int i, j;
1140
1141 CLEAR_HARD_REG_SET (set);
1142
1143 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1144 if (vd->e[i].oldest_regno == i)
1145 {
1146 if (vd->e[i].mode == VOIDmode)
1147 {
1148 if (vd->e[i].next_regno != INVALID_REGNUM)
1149 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1150 i, vd->e[i].next_regno);
1151 continue;
1152 }
1153
1154 SET_HARD_REG_BIT (set, i);
1155 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1156
1157 for (j = vd->e[i].next_regno;
1158 j != INVALID_REGNUM;
1159 j = vd->e[j].next_regno)
1160 {
1161 if (TEST_HARD_REG_BIT (set, j))
1162 {
1163 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1164 return;
1165 }
1166
1167 if (vd->e[j].oldest_regno != i)
1168 {
1169 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1170 j, vd->e[j].oldest_regno);
1171 return;
1172 }
1173 SET_HARD_REG_BIT (set, j);
1174 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1175 }
1176 fputc ('\n', stderr);
1177 }
1178
1179 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1180 if (! TEST_HARD_REG_BIT (set, i)
1181 && (vd->e[i].mode != VOIDmode
1182 || vd->e[i].oldest_regno != i
1183 || vd->e[i].next_regno != INVALID_REGNUM))
1184 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1185 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1186 vd->e[i].next_regno);
1187}
1188
a2e6c10c
ZC
1189/* Do copyprop_hardreg_forward_1 for a single basic block BB.
1190 DEBUG_INSN is skipped since we do not want to involve DF related
1191 staff as how it is handled in function pass_cprop_hardreg::execute.
1192
1193 NOTE: Currently it is only used for shrink-wrap. Maybe extend it
1194 to handle DEBUG_INSN for other uses. */
1195
1196void
1197copyprop_hardreg_forward_bb_without_debug_insn (basic_block bb)
1198{
1199 struct value_data *vd;
1200 vd = XNEWVEC (struct value_data, 1);
1201 init_value_data (vd);
1202
1203 skip_debug_insn_p = true;
1204 copyprop_hardreg_forward_1 (bb, vd);
1205 free (vd);
1206 skip_debug_insn_p = false;
1207}
1208
fac41238
PB
1209static void
1210validate_value_data (struct value_data *vd)
1211{
1212 HARD_REG_SET set;
1213 unsigned int i, j;
1214
1215 CLEAR_HARD_REG_SET (set);
1216
1217 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1218 if (vd->e[i].oldest_regno == i)
1219 {
1220 if (vd->e[i].mode == VOIDmode)
1221 {
1222 if (vd->e[i].next_regno != INVALID_REGNUM)
a9c697b8
MS
1223 internal_error ("%qs: [%u] bad %<next_regno%> for empty chain (%u)",
1224 __func__, i, vd->e[i].next_regno);
fac41238
PB
1225 continue;
1226 }
1227
1228 SET_HARD_REG_BIT (set, i);
1229
1230 for (j = vd->e[i].next_regno;
1231 j != INVALID_REGNUM;
1232 j = vd->e[j].next_regno)
1233 {
1234 if (TEST_HARD_REG_BIT (set, j))
a9c697b8
MS
1235 internal_error ("%qs: loop in %<next_regno%> chain (%u)",
1236 __func__, j);
fac41238 1237 if (vd->e[j].oldest_regno != i)
a9c697b8
MS
1238 internal_error ("%qs: [%u] bad %<oldest_regno%> (%u)",
1239 __func__, j, vd->e[j].oldest_regno);
fac41238
PB
1240
1241 SET_HARD_REG_BIT (set, j);
1242 }
1243 }
1244
1245 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1246 if (! TEST_HARD_REG_BIT (set, i)
1247 && (vd->e[i].mode != VOIDmode
1248 || vd->e[i].oldest_regno != i
1249 || vd->e[i].next_regno != INVALID_REGNUM))
a9c697b8
MS
1250 internal_error ("%qs: [%u] non-empty register in chain (%s %u %i)",
1251 __func__, i,
1252 GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
fac41238
PB
1253 vd->e[i].next_regno);
1254}
b2b29377 1255
fac41238 1256\f
27a4cd48
DM
1257namespace {
1258
1259const pass_data pass_data_cprop_hardreg =
fac41238 1260{
27a4cd48
DM
1261 RTL_PASS, /* type */
1262 "cprop_hardreg", /* name */
1263 OPTGROUP_NONE, /* optinfo_flags */
27a4cd48
DM
1264 TV_CPROP_REGISTERS, /* tv_id */
1265 0, /* properties_required */
1266 0, /* properties_provided */
1267 0, /* properties_destroyed */
1268 0, /* todo_flags_start */
3bea341f 1269 TODO_df_finish, /* todo_flags_finish */
fac41238 1270};
27a4cd48
DM
1271
1272class pass_cprop_hardreg : public rtl_opt_pass
1273{
1274public:
c3284718
RS
1275 pass_cprop_hardreg (gcc::context *ctxt)
1276 : rtl_opt_pass (pass_data_cprop_hardreg, ctxt)
27a4cd48
DM
1277 {}
1278
1279 /* opt_pass methods: */
1a3d085c
TS
1280 virtual bool gate (function *)
1281 {
1282 return (optimize > 0 && (flag_cprop_registers));
1283 }
1284
be55bfe6 1285 virtual unsigned int execute (function *);
27a4cd48
DM
1286
1287}; // class pass_cprop_hardreg
1288
cdd82c1e
JJ
1289static bool
1290cprop_hardreg_bb (basic_block bb, struct value_data *all_vd, sbitmap visited)
1291{
1292 bitmap_set_bit (visited, bb->index);
1293
1294 /* If a block has a single predecessor, that we've already
1295 processed, begin with the value data that was live at
1296 the end of the predecessor block. */
1297 /* ??? Ought to use more intelligent queuing of blocks. */
1298 if (single_pred_p (bb)
1299 && bitmap_bit_p (visited, single_pred (bb)->index)
1300 && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
1301 {
1302 all_vd[bb->index] = all_vd[single_pred (bb)->index];
1303 if (all_vd[bb->index].n_debug_insn_changes)
1304 {
1305 unsigned int regno;
1306
1307 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1308 {
1309 if (all_vd[bb->index].e[regno].debug_insn_changes)
1310 {
1311 struct queued_debug_insn_change *cur;
1312 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1313 cur; cur = cur->next)
1314 --all_vd[bb->index].n_debug_insn_changes;
1315 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1316 if (all_vd[bb->index].n_debug_insn_changes == 0)
1317 break;
1318 }
1319 }
1320 }
1321 }
1322 else
1323 init_value_data (all_vd + bb->index);
1324
1325 return copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
1326}
1327
1328static void
1329cprop_hardreg_debug (function *fun, struct value_data *all_vd)
1330{
1331 basic_block bb;
1332
1333 FOR_EACH_BB_FN (bb, fun)
1334 if (all_vd[bb->index].n_debug_insn_changes)
1335 {
1336 unsigned int regno;
1337 bitmap live;
1338
1339 live = df_get_live_out (bb);
1340 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1341 if (all_vd[bb->index].e[regno].debug_insn_changes)
1342 {
1343 if (REGNO_REG_SET_P (live, regno))
1344 apply_debug_insn_changes (all_vd + bb->index, regno);
1345
1346 struct queued_debug_insn_change *cur;
1347 for (cur = all_vd[bb->index].e[regno].debug_insn_changes;
1348 cur; cur = cur->next)
1349 --all_vd[bb->index].n_debug_insn_changes;
1350 all_vd[bb->index].e[regno].debug_insn_changes = NULL;
1351 if (all_vd[bb->index].n_debug_insn_changes == 0)
1352 break;
1353 }
1354 }
1355
1356 queued_debug_insn_change_pool.release ();
1357}
1358
be55bfe6
TS
1359unsigned int
1360pass_cprop_hardreg::execute (function *fun)
1361{
1362 struct value_data *all_vd;
1363 basic_block bb;
be55bfe6
TS
1364
1365 all_vd = XNEWVEC (struct value_data, last_basic_block_for_fn (fun));
1366
7ba9e72d 1367 auto_sbitmap visited (last_basic_block_for_fn (fun));
be55bfe6
TS
1368 bitmap_clear (visited);
1369
cdd82c1e
JJ
1370 auto_vec<int> worklist;
1371 bool any_debug_changes = false;
1372
52295c2d
JL
1373 /* We need accurate notes. Earlier passes such as if-conversion may
1374 leave notes in an inconsistent state. */
4dd11305 1375 df_note_add_problem ();
52295c2d 1376 df_analyze ();
4dd11305
JL
1377
1378 /* It is tempting to set DF_LR_RUN_DCE, but DCE may choose to delete
1379 an insn and this pass would not have visibility into the removal.
1380 This pass would then potentially use the source of that
1381 INSN for propagation purposes, generating invalid code.
1382
1383 So we just ask for updated notes and handle trivial deletions
1384 within this pass where we can update this passes internal
1385 data structures appropriately. */
1386 df_set_flags (DF_DEFER_INSN_RESCAN);
1387
be55bfe6
TS
1388 FOR_EACH_BB_FN (bb, fun)
1389 {
cdd82c1e
JJ
1390 if (cprop_hardreg_bb (bb, all_vd, visited))
1391 worklist.safe_push (bb->index);
1392 if (all_vd[bb->index].n_debug_insn_changes)
1393 any_debug_changes = true;
be55bfe6
TS
1394 }
1395
4dd11305
JL
1396 /* We must call df_analyze here unconditionally to ensure that the
1397 REG_UNUSED and REG_DEAD notes are consistent with and without -g. */
1398 df_analyze ();
1399
cdd82c1e
JJ
1400 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1401 cprop_hardreg_debug (fun, all_vd);
1402
1403 /* Second pass if we've changed anything, only for the bbs where we have
1404 changed anything though. */
1405 if (!worklist.is_empty ())
be55bfe6 1406 {
cdd82c1e
JJ
1407 any_debug_changes = false;
1408 bitmap_clear (visited);
3f207ab3 1409 for (int index : worklist)
cdd82c1e
JJ
1410 {
1411 bb = BASIC_BLOCK_FOR_FN (fun, index);
1412 cprop_hardreg_bb (bb, all_vd, visited);
1413 if (all_vd[bb->index].n_debug_insn_changes)
1414 any_debug_changes = true;
1415 }
be55bfe6 1416
cdd82c1e
JJ
1417 df_analyze ();
1418 if (MAY_HAVE_DEBUG_BIND_INSNS && any_debug_changes)
1419 cprop_hardreg_debug (fun, all_vd);
be55bfe6
TS
1420 }
1421
be55bfe6
TS
1422 free (all_vd);
1423 return 0;
1424}
1425
27a4cd48
DM
1426} // anon namespace
1427
1428rtl_opt_pass *
1429make_pass_cprop_hardreg (gcc::context *ctxt)
1430{
1431 return new pass_cprop_hardreg (ctxt);
1432}