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Commit | Line | Data |
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7b82b5da | 1 | /* Register renaming for the GNU compiler. |
66647d44 | 2 | Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 |
778f72f2 | 3 | Free Software Foundation, Inc. |
7b82b5da | 4 | |
1322177d | 5 | This file is part of GCC. |
7b82b5da | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it |
8 | under the terms of the GNU General Public License as published by | |
9dcd6f09 | 9 | the Free Software Foundation; either version 3, or (at your option) |
7b82b5da SC |
10 | any later version. |
11 | ||
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
7b82b5da SC |
16 | |
17 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
7b82b5da SC |
20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
4977bab6 ZW |
23 | #include "coretypes.h" |
24 | #include "tm.h" | |
7b82b5da | 25 | #include "rtl.h" |
541f7d56 | 26 | #include "tm_p.h" |
7b82b5da SC |
27 | #include "insn-config.h" |
28 | #include "regs.h" | |
c4963a0a | 29 | #include "addresses.h" |
541f7d56 BS |
30 | #include "hard-reg-set.h" |
31 | #include "basic-block.h" | |
32 | #include "reload.h" | |
7b82b5da SC |
33 | #include "output.h" |
34 | #include "function.h" | |
35 | #include "recog.h" | |
541f7d56 | 36 | #include "flags.h" |
8582c27b | 37 | #include "toplev.h" |
541f7d56 | 38 | #include "obstack.h" |
ef330312 PB |
39 | #include "timevar.h" |
40 | #include "tree-pass.h" | |
6fb5fa3c | 41 | #include "df.h" |
541f7d56 | 42 | |
9d324dde BS |
43 | /* We keep linked lists of DU_HEAD structures, each of which describes |
44 | a chain of occurrences of a reg. */ | |
45 | struct du_head | |
46 | { | |
47 | /* The next chain. */ | |
48 | struct du_head *next_chain; | |
49 | /* The first and last elements of this chain. */ | |
50 | struct du_chain *first, *last; | |
51 | /* Describes the register being tracked. */ | |
52 | unsigned regno, nregs; | |
a96caf80 BS |
53 | |
54 | /* A unique id to be used as an index into the conflicts bitmaps. */ | |
55 | unsigned id; | |
56 | /* A bitmap to record conflicts with other chains. */ | |
57 | bitmap_head conflicts; | |
58 | /* Conflicts with untracked hard registers. */ | |
59 | HARD_REG_SET hard_conflicts; | |
60 | ||
61 | /* Nonzero if the chain is finished; zero if it is still open. */ | |
62 | unsigned int terminated:1; | |
9d324dde BS |
63 | /* Nonzero if the chain crosses a call. */ |
64 | unsigned int need_caller_save_reg:1; | |
a96caf80 BS |
65 | /* Nonzero if the register is used in a way that prevents renaming, |
66 | such as the SET_DEST of a CALL_INSN or an asm operand that used | |
67 | to be a hard register. */ | |
68 | unsigned int cannot_rename:1; | |
9d324dde BS |
69 | }; |
70 | ||
71 | /* This struct describes a single occurrence of a register. */ | |
541f7d56 | 72 | struct du_chain |
7b82b5da | 73 | { |
9d324dde | 74 | /* Links to the next occurrence of the register. */ |
541f7d56 | 75 | struct du_chain *next_use; |
7b82b5da | 76 | |
9d324dde | 77 | /* The insn where the register appears. */ |
541f7d56 | 78 | rtx insn; |
9d324dde | 79 | /* The location inside the insn. */ |
541f7d56 | 80 | rtx *loc; |
9d324dde | 81 | /* The register class required by the insn at this location. */ |
e3a64162 | 82 | ENUM_BITFIELD(reg_class) cl : 16; |
541f7d56 | 83 | }; |
7b82b5da | 84 | |
541f7d56 BS |
85 | enum scan_actions |
86 | { | |
541f7d56 BS |
87 | terminate_write, |
88 | terminate_dead, | |
a96caf80 | 89 | mark_all_read, |
541f7d56 | 90 | mark_read, |
cb110f3d AM |
91 | mark_write, |
92 | /* mark_access is for marking the destination regs in | |
93 | REG_FRAME_RELATED_EXPR notes (as if they were read) so that the | |
94 | note is updated properly. */ | |
95 | mark_access | |
541f7d56 BS |
96 | }; |
97 | ||
98 | static const char * const scan_actions_name[] = | |
99 | { | |
541f7d56 BS |
100 | "terminate_write", |
101 | "terminate_dead", | |
a96caf80 | 102 | "mark_all_read", |
541f7d56 | 103 | "mark_read", |
cb110f3d AM |
104 | "mark_write", |
105 | "mark_access" | |
541f7d56 BS |
106 | }; |
107 | ||
108 | static struct obstack rename_obstack; | |
109 | ||
9d324dde | 110 | static void do_replace (struct du_head *, int); |
0c20a65f | 111 | static void scan_rtx_reg (rtx, rtx *, enum reg_class, |
6bda9bdf | 112 | enum scan_actions, enum op_type); |
0c20a65f AJ |
113 | static void scan_rtx_address (rtx, rtx *, enum reg_class, |
114 | enum scan_actions, enum machine_mode); | |
115 | static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions, | |
6bda9bdf | 116 | enum op_type); |
9d324dde BS |
117 | static struct du_head *build_def_use (basic_block); |
118 | static void dump_def_use_chain (struct du_head *); | |
fe08a886 | 119 | |
a96caf80 BS |
120 | typedef struct du_head *du_head_p; |
121 | DEF_VEC_P (du_head_p); | |
122 | DEF_VEC_ALLOC_P (du_head_p, heap); | |
123 | static VEC(du_head_p, heap) *id_to_chain; | |
fe08a886 BS |
124 | |
125 | static void | |
a96caf80 | 126 | free_chain_data (void) |
fe08a886 | 127 | { |
a96caf80 BS |
128 | int i; |
129 | du_head_p ptr; | |
130 | for (i = 0; VEC_iterate(du_head_p, id_to_chain, i, ptr); i++) | |
131 | bitmap_clear (&ptr->conflicts); | |
226c62c7 | 132 | |
a96caf80 | 133 | VEC_free (du_head_p, heap, id_to_chain); |
fe08a886 BS |
134 | } |
135 | ||
a96caf80 BS |
136 | /* For a def-use chain HEAD, find which registers overlap its lifetime and |
137 | set the corresponding bits in *PSET. */ | |
fe08a886 BS |
138 | |
139 | static void | |
a96caf80 | 140 | merge_overlapping_regs (HARD_REG_SET *pset, struct du_head *head) |
fe08a886 | 141 | { |
a96caf80 BS |
142 | bitmap_iterator bi; |
143 | unsigned i; | |
144 | IOR_HARD_REG_SET (*pset, head->hard_conflicts); | |
145 | EXECUTE_IF_SET_IN_BITMAP (&head->conflicts, 0, i, bi) | |
32fc3abf | 146 | { |
a96caf80 BS |
147 | du_head_p other = VEC_index (du_head_p, id_to_chain, i); |
148 | unsigned j = other->nregs; | |
149 | while (j-- > 0) | |
150 | SET_HARD_REG_BIT (*pset, other->regno + j); | |
fe08a886 BS |
151 | } |
152 | } | |
153 | ||
154 | /* Perform register renaming on the current function. */ | |
7b82b5da | 155 | |
fac41238 | 156 | static unsigned int |
0c20a65f | 157 | regrename_optimize (void) |
541f7d56 | 158 | { |
fe08a886 BS |
159 | int tick[FIRST_PSEUDO_REGISTER]; |
160 | int this_tick = 0; | |
e0082a72 | 161 | basic_block bb; |
541f7d56 | 162 | char *first_obj; |
7b82b5da | 163 | |
6fb5fa3c DB |
164 | df_set_flags (DF_LR_RUN_DCE); |
165 | df_note_add_problem (); | |
166 | df_analyze (); | |
8e4bf5c7 KZ |
167 | df_set_flags (DF_DEFER_INSN_RESCAN); |
168 | ||
fe08a886 BS |
169 | memset (tick, 0, sizeof tick); |
170 | ||
541f7d56 | 171 | gcc_obstack_init (&rename_obstack); |
1634b18f | 172 | first_obj = XOBNEWVAR (&rename_obstack, char, 0); |
7b82b5da | 173 | |
e0082a72 | 174 | FOR_EACH_BB (bb) |
541f7d56 | 175 | { |
9d324dde | 176 | struct du_head *all_chains = 0; |
541f7d56 | 177 | HARD_REG_SET unavailable; |
0f900dfa | 178 | #if 0 |
541f7d56 | 179 | HARD_REG_SET regs_seen; |
0f900dfa JJ |
180 | CLEAR_HARD_REG_SET (regs_seen); |
181 | #endif | |
7b82b5da | 182 | |
a96caf80 BS |
183 | id_to_chain = VEC_alloc (du_head_p, heap, 0); |
184 | ||
541f7d56 | 185 | CLEAR_HARD_REG_SET (unavailable); |
7b82b5da | 186 | |
c263766c RH |
187 | if (dump_file) |
188 | fprintf (dump_file, "\nBasic block %d:\n", bb->index); | |
7b82b5da | 189 | |
fe08a886 | 190 | all_chains = build_def_use (bb); |
7b82b5da | 191 | |
c263766c | 192 | if (dump_file) |
541f7d56 | 193 | dump_def_use_chain (all_chains); |
7b82b5da | 194 | |
fe08a886 | 195 | CLEAR_HARD_REG_SET (unavailable); |
541f7d56 BS |
196 | /* Don't clobber traceback for noreturn functions. */ |
197 | if (frame_pointer_needed) | |
198 | { | |
09e18274 | 199 | add_to_hard_reg_set (&unavailable, Pmode, FRAME_POINTER_REGNUM); |
541f7d56 | 200 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
09e18274 | 201 | add_to_hard_reg_set (&unavailable, Pmode, HARD_FRAME_POINTER_REGNUM); |
541f7d56 BS |
202 | #endif |
203 | } | |
7b82b5da | 204 | |
541f7d56 BS |
205 | while (all_chains) |
206 | { | |
a96caf80 | 207 | int new_reg, best_new_reg, best_nregs; |
541f7d56 | 208 | int n_uses; |
9d324dde | 209 | struct du_head *this_head = all_chains; |
b5b8b0ac | 210 | struct du_chain *tmp; |
541f7d56 | 211 | HARD_REG_SET this_unavailable; |
9d324dde | 212 | int reg = this_head->regno; |
85941a0a | 213 | int i; |
7b82b5da | 214 | |
9d324dde | 215 | all_chains = this_head->next_chain; |
3b03c671 | 216 | |
a96caf80 BS |
217 | if (this_head->cannot_rename) |
218 | continue; | |
219 | ||
62551c66 | 220 | best_new_reg = reg; |
a96caf80 | 221 | best_nregs = this_head->nregs; |
62551c66 | 222 | |
fe08a886 | 223 | #if 0 /* This just disables optimization opportunities. */ |
541f7d56 BS |
224 | /* Only rename once we've seen the reg more than once. */ |
225 | if (! TEST_HARD_REG_BIT (regs_seen, reg)) | |
1a43c33f | 226 | { |
541f7d56 BS |
227 | SET_HARD_REG_BIT (regs_seen, reg); |
228 | continue; | |
229 | } | |
fe08a886 | 230 | #endif |
1a43c33f | 231 | |
f4d578da BS |
232 | if (fixed_regs[reg] || global_regs[reg] |
233 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
234 | || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) | |
235 | #else | |
236 | || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) | |
237 | #endif | |
238 | ) | |
541f7d56 | 239 | continue; |
1a43c33f | 240 | |
541f7d56 | 241 | COPY_HARD_REG_SET (this_unavailable, unavailable); |
1a43c33f | 242 | |
b5b8b0ac | 243 | /* Count number of uses, and narrow the set of registers we can |
541f7d56 BS |
244 | use for renaming. */ |
245 | n_uses = 0; | |
9d324dde | 246 | for (tmp = this_head->first; tmp; tmp = tmp->next_use) |
541f7d56 | 247 | { |
b5b8b0ac AO |
248 | if (DEBUG_INSN_P (tmp->insn)) |
249 | continue; | |
541f7d56 BS |
250 | n_uses++; |
251 | IOR_COMPL_HARD_REG_SET (this_unavailable, | |
b5b8b0ac | 252 | reg_class_contents[tmp->cl]); |
1a43c33f | 253 | } |
7b82b5da | 254 | |
b5b8b0ac AO |
255 | if (n_uses < 2) |
256 | continue; | |
7b82b5da | 257 | |
9d324dde | 258 | if (this_head->need_caller_save_reg) |
541f7d56 BS |
259 | IOR_HARD_REG_SET (this_unavailable, call_used_reg_set); |
260 | ||
a96caf80 | 261 | merge_overlapping_regs (&this_unavailable, this_head); |
fe08a886 | 262 | |
541f7d56 BS |
263 | /* Now potential_regs is a reasonable approximation, let's |
264 | have a closer look at each register still in there. */ | |
4e812700 | 265 | for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) |
1a43c33f | 266 | { |
9d324dde BS |
267 | enum machine_mode mode = GET_MODE (*this_head->first->loc); |
268 | int nregs = hard_regno_nregs[new_reg][mode]; | |
4e812700 | 269 | |
85941a0a | 270 | for (i = nregs - 1; i >= 0; --i) |
fe08a886 BS |
271 | if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) |
272 | || fixed_regs[new_reg + i] | |
273 | || global_regs[new_reg + i] | |
85941a0a | 274 | /* Can't use regs which aren't saved by the prologue. */ |
6fb5fa3c | 275 | || (! df_regs_ever_live_p (new_reg + i) |
fe08a886 | 276 | && ! call_used_regs[new_reg + i]) |
b2a8b026 | 277 | #ifdef LEAF_REGISTERS |
3b03c671 | 278 | /* We can't use a non-leaf register if we're in a |
b2a8b026 | 279 | leaf function. */ |
3b03c671 | 280 | || (current_function_is_leaf |
b2a8b026 MM |
281 | && !LEAF_REGISTERS[new_reg + i]) |
282 | #endif | |
541f7d56 | 283 | #ifdef HARD_REGNO_RENAME_OK |
fe08a886 | 284 | || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) |
541f7d56 | 285 | #endif |
85941a0a RH |
286 | ) |
287 | break; | |
288 | if (i >= 0) | |
541f7d56 | 289 | continue; |
1a43c33f | 290 | |
85941a0a RH |
291 | /* See whether it accepts all modes that occur in |
292 | definition and uses. */ | |
9d324dde | 293 | for (tmp = this_head->first; tmp; tmp = tmp->next_use) |
b5b8b0ac AO |
294 | if ((! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) |
295 | && ! DEBUG_INSN_P (tmp->insn)) | |
9d324dde | 296 | || (this_head->need_caller_save_reg |
66df7a98 AO |
297 | && ! (HARD_REGNO_CALL_PART_CLOBBERED |
298 | (reg, GET_MODE (*tmp->loc))) | |
299 | && (HARD_REGNO_CALL_PART_CLOBBERED | |
300 | (new_reg, GET_MODE (*tmp->loc))))) | |
541f7d56 BS |
301 | break; |
302 | if (! tmp) | |
fe08a886 | 303 | { |
62551c66 | 304 | if (tick[best_new_reg] > tick[new_reg]) |
a96caf80 BS |
305 | { |
306 | best_new_reg = new_reg; | |
307 | best_nregs = nregs; | |
308 | } | |
fe08a886 | 309 | } |
1a43c33f | 310 | } |
7b82b5da | 311 | |
c263766c | 312 | if (dump_file) |
541f7d56 | 313 | { |
c263766c | 314 | fprintf (dump_file, "Register %s in insn %d", |
9d324dde BS |
315 | reg_names[reg], INSN_UID (this_head->first->insn)); |
316 | if (this_head->need_caller_save_reg) | |
c263766c | 317 | fprintf (dump_file, " crosses a call"); |
3b03c671 | 318 | } |
1a43c33f | 319 | |
62551c66 | 320 | if (best_new_reg == reg) |
541f7d56 | 321 | { |
62551c66 | 322 | tick[reg] = ++this_tick; |
c263766c RH |
323 | if (dump_file) |
324 | fprintf (dump_file, "; no available better choice\n"); | |
7b82b5da | 325 | continue; |
541f7d56 | 326 | } |
7b82b5da | 327 | |
b21b850e SB |
328 | if (dump_file) |
329 | fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]); | |
330 | ||
9d324dde | 331 | do_replace (this_head, best_new_reg); |
a96caf80 BS |
332 | this_head->regno = best_new_reg; |
333 | this_head->nregs = best_nregs; | |
62551c66 | 334 | tick[best_new_reg] = ++this_tick; |
6fb5fa3c | 335 | df_set_regs_ever_live (best_new_reg, true); |
541f7d56 | 336 | } |
1a43c33f | 337 | |
a96caf80 | 338 | free_chain_data (); |
541f7d56 BS |
339 | obstack_free (&rename_obstack, first_obj); |
340 | } | |
1a43c33f | 341 | |
541f7d56 | 342 | obstack_free (&rename_obstack, NULL); |
7b82b5da | 343 | |
c263766c RH |
344 | if (dump_file) |
345 | fputc ('\n', dump_file); | |
fac41238 PB |
346 | |
347 | return 0; | |
7b82b5da SC |
348 | } |
349 | ||
7b82b5da | 350 | static void |
9d324dde | 351 | do_replace (struct du_head *head, int reg) |
7b82b5da | 352 | { |
9d324dde BS |
353 | struct du_chain *chain; |
354 | unsigned int base_regno = head->regno; | |
a96caf80 | 355 | bool found_note = false; |
b5b8b0ac | 356 | |
9d324dde | 357 | gcc_assert (! DEBUG_INSN_P (head->first->insn)); |
b5b8b0ac | 358 | |
9d324dde | 359 | for (chain = head->first; chain; chain = chain->next_use) |
7b82b5da | 360 | { |
08394eef | 361 | unsigned int regno = ORIGINAL_REGNO (*chain->loc); |
9d324dde | 362 | struct reg_attrs *attr = REG_ATTRS (*chain->loc); |
b41310e2 | 363 | int reg_ptr = REG_POINTER (*chain->loc); |
d1d3c9a6 | 364 | |
b5b8b0ac AO |
365 | if (DEBUG_INSN_P (chain->insn) && REGNO (*chain->loc) != base_regno) |
366 | INSN_VAR_LOCATION_LOC (chain->insn) = gen_rtx_UNKNOWN_VAR_LOC (); | |
367 | else | |
368 | { | |
af94453d CB |
369 | rtx note; |
370 | ||
b5b8b0ac AO |
371 | *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); |
372 | if (regno >= FIRST_PSEUDO_REGISTER) | |
373 | ORIGINAL_REGNO (*chain->loc) = regno; | |
374 | REG_ATTRS (*chain->loc) = attr; | |
375 | REG_POINTER (*chain->loc) = reg_ptr; | |
af94453d CB |
376 | |
377 | for (note = REG_NOTES (chain->insn); note; note = XEXP (note, 1)) | |
378 | { | |
a96caf80 BS |
379 | enum reg_note kind = REG_NOTE_KIND (note); |
380 | if (kind == REG_DEAD || kind == REG_UNUSED) | |
af94453d CB |
381 | { |
382 | rtx reg = XEXP (note, 0); | |
383 | gcc_assert (HARD_REGISTER_P (reg)); | |
b8698a0f L |
384 | |
385 | if (REGNO (reg) == base_regno) | |
a96caf80 BS |
386 | { |
387 | found_note = true; | |
388 | if (kind == REG_DEAD | |
389 | && reg_set_p (*chain->loc, chain->insn)) | |
390 | remove_note (chain->insn, note); | |
391 | else | |
392 | XEXP (note, 0) = *chain->loc; | |
393 | break; | |
394 | } | |
af94453d CB |
395 | } |
396 | } | |
b5b8b0ac AO |
397 | } |
398 | ||
8e4bf5c7 | 399 | df_insn_rescan (chain->insn); |
7b82b5da | 400 | } |
a96caf80 BS |
401 | if (!found_note) |
402 | { | |
403 | /* If the chain's first insn is the same as the last, we should have | |
404 | found a REG_UNUSED note. */ | |
405 | gcc_assert (head->first->insn != head->last->insn); | |
406 | if (!reg_set_p (*head->last->loc, head->last->insn)) | |
407 | add_reg_note (head->last->insn, REG_DEAD, *head->last->loc); | |
408 | } | |
7b82b5da SC |
409 | } |
410 | ||
7b82b5da | 411 | |
a96caf80 BS |
412 | /* Walk all chains starting with CHAINS and record that they conflict with |
413 | another chain whose id is ID. */ | |
414 | ||
415 | static void | |
416 | mark_conflict (struct du_head *chains, unsigned id) | |
417 | { | |
418 | while (chains) | |
419 | { | |
420 | bitmap_set_bit (&chains->conflicts, id); | |
421 | chains = chains->next_chain; | |
422 | } | |
423 | } | |
424 | ||
425 | /* True if we found a register with a size mismatch, which means that we | |
426 | can't track its lifetime accurately. If so, we abort the current block | |
427 | without renaming. */ | |
428 | static bool fail_current_block; | |
429 | ||
430 | /* The id to be given to the next opened chain. */ | |
431 | static unsigned current_id; | |
432 | ||
433 | /* List of currently open chains, and closed chains that can be renamed. */ | |
9d324dde BS |
434 | static struct du_head *open_chains; |
435 | static struct du_head *closed_chains; | |
541f7d56 | 436 | |
a96caf80 BS |
437 | /* Conflict bitmaps, tracking the live chains and the live hard registers. |
438 | The bits set in open_chains_set always match the list found in | |
439 | open_chains. */ | |
440 | static bitmap_head open_chains_set; | |
441 | static HARD_REG_SET live_hard_regs; | |
442 | ||
443 | /* Called through note_stores. DATA points to a rtx_code, either SET or | |
444 | CLOBBER, which tells us which kind of rtx to look at. If we have a | |
445 | match, record the set register in live_hard_regs and in the hard_conflicts | |
446 | bitmap of open chains. */ | |
447 | ||
448 | static void | |
449 | note_sets_clobbers (rtx x, const_rtx set, void *data) | |
450 | { | |
451 | enum rtx_code code = *(enum rtx_code *)data; | |
452 | struct du_head *chain; | |
453 | ||
454 | if (GET_CODE (x) == SUBREG) | |
455 | x = SUBREG_REG (x); | |
456 | if (!REG_P (x) || GET_CODE (set) != code) | |
457 | return; | |
458 | /* There must not be pseudos at this point. */ | |
459 | gcc_assert (HARD_REGISTER_P (x)); | |
460 | add_to_hard_reg_set (&live_hard_regs, GET_MODE (x), REGNO (x)); | |
461 | for (chain = open_chains; chain; chain = chain->next_chain) | |
462 | add_to_hard_reg_set (&chain->hard_conflicts, GET_MODE (x), REGNO (x)); | |
463 | } | |
464 | ||
541f7d56 | 465 | static void |
6bda9bdf BS |
466 | scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action, |
467 | enum op_type type) | |
7b82b5da | 468 | { |
9d324dde | 469 | struct du_head **p; |
541f7d56 BS |
470 | rtx x = *loc; |
471 | enum machine_mode mode = GET_MODE (x); | |
9d324dde BS |
472 | unsigned this_regno = REGNO (x); |
473 | unsigned this_nregs = hard_regno_nregs[this_regno][mode]; | |
541f7d56 | 474 | |
541f7d56 | 475 | if (action == mark_write) |
7b82b5da | 476 | { |
541f7d56 | 477 | if (type == OP_OUT) |
7b82b5da | 478 | { |
9d324dde | 479 | struct du_head *head = XOBNEW (&rename_obstack, struct du_head); |
d858f359 | 480 | struct du_chain *this_du = XOBNEW (&rename_obstack, struct du_chain); |
a96caf80 BS |
481 | int nregs; |
482 | ||
9d324dde BS |
483 | head->next_chain = open_chains; |
484 | open_chains = head; | |
485 | head->first = head->last = this_du; | |
486 | head->regno = this_regno; | |
487 | head->nregs = this_nregs; | |
488 | head->need_caller_save_reg = 0; | |
a96caf80 | 489 | head->cannot_rename = 0; |
9d324dde BS |
490 | head->terminated = 0; |
491 | ||
a96caf80 BS |
492 | VEC_safe_push (du_head_p, heap, id_to_chain, head); |
493 | head->id = current_id++; | |
494 | ||
495 | bitmap_initialize (&head->conflicts, &bitmap_default_obstack); | |
496 | bitmap_copy (&head->conflicts, &open_chains_set); | |
497 | mark_conflict (open_chains, head->id); | |
498 | ||
499 | /* Since we're tracking this as a chain now, remove it from the | |
500 | list of conflicting live hard registers. */ | |
501 | nregs = head->nregs; | |
502 | while (nregs-- > 0) | |
503 | CLEAR_HARD_REG_BIT (live_hard_regs, head->regno + nregs); | |
504 | ||
505 | COPY_HARD_REG_SET (head->hard_conflicts, live_hard_regs); | |
506 | bitmap_set_bit (&open_chains_set, head->id); | |
507 | ||
508 | open_chains = head; | |
509 | ||
d858f359 | 510 | this_du->next_use = 0; |
d858f359 KG |
511 | this_du->loc = loc; |
512 | this_du->insn = insn; | |
513 | this_du->cl = cl; | |
a96caf80 BS |
514 | |
515 | if (dump_file) | |
516 | fprintf (dump_file, | |
517 | "Creating chain %s (%d) at insn %d (%s)\n", | |
518 | reg_names[head->regno], head->id, INSN_UID (insn), | |
519 | scan_actions_name[(int) action]); | |
7b82b5da | 520 | } |
541f7d56 | 521 | return; |
7b82b5da | 522 | } |
1a43c33f | 523 | |
cb110f3d | 524 | if ((type == OP_OUT) != (action == terminate_write || action == mark_access)) |
541f7d56 | 525 | return; |
5fa41e13 | 526 | |
541f7d56 | 527 | for (p = &open_chains; *p;) |
5fa41e13 | 528 | { |
9d324dde | 529 | struct du_head *head = *p; |
a96caf80 BS |
530 | struct du_head *next = head->next_chain; |
531 | int exact_match = (head->regno == this_regno | |
532 | && head->nregs == this_nregs); | |
533 | int superset = (this_regno <= head->regno | |
534 | && this_regno + this_nregs >= head->regno + head->nregs); | |
535 | ||
536 | if (head->terminated | |
537 | || head->regno + head->nregs <= this_regno | |
538 | || this_regno + this_nregs <= head->regno) | |
539 | { | |
540 | p = &head->next_chain; | |
541 | continue; | |
542 | } | |
541f7d56 | 543 | |
a96caf80 | 544 | if (action == mark_read || action == mark_access) |
3b03c671 | 545 | { |
a96caf80 BS |
546 | /* ??? Class NO_REGS can happen if the md file makes use of |
547 | EXTRA_CONSTRAINTS to match registers. Which is arguably | |
548 | wrong, but there we are. */ | |
695e4773 | 549 | |
a96caf80 | 550 | if (cl == NO_REGS || (!exact_match && !DEBUG_INSN_P (insn))) |
a125d855 | 551 | { |
a96caf80 BS |
552 | if (dump_file) |
553 | fprintf (dump_file, | |
554 | "Cannot rename chain %s (%d) at insn %d (%s)\n", | |
555 | reg_names[head->regno], head->id, INSN_UID (insn), | |
556 | scan_actions_name[(int) action]); | |
557 | head->cannot_rename = 1; | |
a125d855 | 558 | } |
a96caf80 | 559 | else |
541f7d56 | 560 | { |
a96caf80 BS |
561 | struct du_chain *this_du; |
562 | this_du = XOBNEW (&rename_obstack, struct du_chain); | |
563 | this_du->next_use = 0; | |
564 | this_du->loc = loc; | |
565 | this_du->insn = insn; | |
566 | this_du->cl = cl; | |
567 | head->last->next_use = this_du; | |
568 | head->last = this_du; | |
695e4773 | 569 | |
541f7d56 | 570 | } |
a96caf80 BS |
571 | /* Avoid adding the same location in a DEBUG_INSN multiple times, |
572 | which could happen with non-exact overlap. */ | |
573 | if (DEBUG_INSN_P (insn)) | |
574 | return; | |
575 | /* Otherwise, find any other chains that do not match exactly; | |
576 | ensure they all get marked unrenamable. */ | |
577 | p = &head->next_chain; | |
578 | continue; | |
579 | } | |
a125d855 | 580 | |
a96caf80 BS |
581 | /* Whether the terminated chain can be used for renaming |
582 | depends on the action and this being an exact match. | |
583 | In either case, we remove this element from open_chains. */ | |
695e4773 | 584 | |
a96caf80 BS |
585 | if ((action == terminate_dead || action == terminate_write) |
586 | && superset) | |
587 | { | |
588 | head->terminated = 1; | |
589 | head->next_chain = closed_chains; | |
590 | closed_chains = head; | |
591 | bitmap_clear_bit (&open_chains_set, head->id); | |
592 | *p = next; | |
593 | if (dump_file) | |
594 | fprintf (dump_file, | |
595 | "Closing chain %s (%d) at insn %d (%s)\n", | |
596 | reg_names[head->regno], head->id, INSN_UID (insn), | |
597 | scan_actions_name[(int) action]); | |
598 | } | |
599 | else if (action == terminate_dead || action == terminate_write) | |
600 | { | |
601 | /* In this case, tracking liveness gets too hard. Fail the | |
602 | entire basic block. */ | |
603 | if (dump_file) | |
604 | fprintf (dump_file, | |
605 | "Failing basic block due to unhandled overlap\n"); | |
606 | fail_current_block = true; | |
607 | return; | |
608 | } | |
609 | else | |
610 | { | |
611 | head->cannot_rename = 1; | |
612 | if (dump_file) | |
613 | fprintf (dump_file, | |
614 | "Cannot rename chain %s (%d) at insn %d (%s)\n", | |
615 | reg_names[head->regno], head->id, INSN_UID (insn), | |
616 | scan_actions_name[(int) action]); | |
617 | p = &head->next_chain; | |
541f7d56 | 618 | } |
541f7d56 | 619 | } |
7b82b5da SC |
620 | } |
621 | ||
e3a64162 | 622 | /* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
541f7d56 | 623 | BASE_REG_CLASS depending on how the register is being considered. */ |
7b82b5da | 624 | |
4ca0f257 | 625 | static void |
e3a64162 | 626 | scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 627 | enum scan_actions action, enum machine_mode mode) |
7b82b5da | 628 | { |
541f7d56 BS |
629 | rtx x = *loc; |
630 | RTX_CODE code = GET_CODE (x); | |
631 | const char *fmt; | |
632 | int i, j; | |
7b82b5da | 633 | |
cb110f3d | 634 | if (action == mark_write || action == mark_access) |
541f7d56 | 635 | return; |
7b82b5da | 636 | |
541f7d56 | 637 | switch (code) |
7b82b5da | 638 | { |
541f7d56 BS |
639 | case PLUS: |
640 | { | |
641 | rtx orig_op0 = XEXP (x, 0); | |
642 | rtx orig_op1 = XEXP (x, 1); | |
643 | RTX_CODE code0 = GET_CODE (orig_op0); | |
644 | RTX_CODE code1 = GET_CODE (orig_op1); | |
645 | rtx op0 = orig_op0; | |
646 | rtx op1 = orig_op1; | |
647 | rtx *locI = NULL; | |
648 | rtx *locB = NULL; | |
84c9cb12 | 649 | enum rtx_code index_code = SCRATCH; |
541f7d56 BS |
650 | |
651 | if (GET_CODE (op0) == SUBREG) | |
652 | { | |
653 | op0 = SUBREG_REG (op0); | |
654 | code0 = GET_CODE (op0); | |
655 | } | |
7b82b5da | 656 | |
541f7d56 BS |
657 | if (GET_CODE (op1) == SUBREG) |
658 | { | |
659 | op1 = SUBREG_REG (op1); | |
660 | code1 = GET_CODE (op1); | |
661 | } | |
7b82b5da | 662 | |
541f7d56 BS |
663 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE |
664 | || code0 == ZERO_EXTEND || code1 == MEM) | |
665 | { | |
666 | locI = &XEXP (x, 0); | |
667 | locB = &XEXP (x, 1); | |
c4963a0a | 668 | index_code = GET_CODE (*locI); |
541f7d56 BS |
669 | } |
670 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
671 | || code1 == ZERO_EXTEND || code0 == MEM) | |
672 | { | |
673 | locI = &XEXP (x, 1); | |
674 | locB = &XEXP (x, 0); | |
c4963a0a | 675 | index_code = GET_CODE (*locI); |
541f7d56 BS |
676 | } |
677 | else if (code0 == CONST_INT || code0 == CONST | |
678 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
c4963a0a BS |
679 | { |
680 | locB = &XEXP (x, 1); | |
681 | index_code = GET_CODE (XEXP (x, 0)); | |
682 | } | |
541f7d56 BS |
683 | else if (code1 == CONST_INT || code1 == CONST |
684 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
c4963a0a BS |
685 | { |
686 | locB = &XEXP (x, 0); | |
687 | index_code = GET_CODE (XEXP (x, 1)); | |
688 | } | |
541f7d56 BS |
689 | else if (code0 == REG && code1 == REG) |
690 | { | |
691 | int index_op; | |
c4963a0a | 692 | unsigned regno0 = REGNO (op0), regno1 = REGNO (op1); |
541f7d56 | 693 | |
bd379f73 PH |
694 | if (REGNO_OK_FOR_INDEX_P (regno1) |
695 | && regno_ok_for_base_p (regno0, mode, PLUS, REG)) | |
696 | index_op = 1; | |
697 | else if (REGNO_OK_FOR_INDEX_P (regno0) | |
698 | && regno_ok_for_base_p (regno1, mode, PLUS, REG)) | |
541f7d56 | 699 | index_op = 0; |
bd379f73 PH |
700 | else if (regno_ok_for_base_p (regno0, mode, PLUS, REG) |
701 | || REGNO_OK_FOR_INDEX_P (regno1)) | |
541f7d56 | 702 | index_op = 1; |
c4963a0a | 703 | else if (regno_ok_for_base_p (regno1, mode, PLUS, REG)) |
541f7d56 | 704 | index_op = 0; |
541f7d56 | 705 | else |
bd379f73 | 706 | index_op = 1; |
541f7d56 BS |
707 | |
708 | locI = &XEXP (x, index_op); | |
c4963a0a BS |
709 | locB = &XEXP (x, !index_op); |
710 | index_code = GET_CODE (*locI); | |
541f7d56 BS |
711 | } |
712 | else if (code0 == REG) | |
713 | { | |
714 | locI = &XEXP (x, 0); | |
715 | locB = &XEXP (x, 1); | |
c4963a0a | 716 | index_code = GET_CODE (*locI); |
541f7d56 BS |
717 | } |
718 | else if (code1 == REG) | |
719 | { | |
720 | locI = &XEXP (x, 1); | |
721 | locB = &XEXP (x, 0); | |
c4963a0a | 722 | index_code = GET_CODE (*locI); |
541f7d56 | 723 | } |
7b82b5da | 724 | |
541f7d56 | 725 | if (locI) |
85941a0a | 726 | scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode); |
541f7d56 | 727 | if (locB) |
c4963a0a | 728 | scan_rtx_address (insn, locB, base_reg_class (mode, PLUS, index_code), |
888d2cd6 | 729 | action, mode); |
c4963a0a | 730 | |
541f7d56 BS |
731 | return; |
732 | } | |
7b82b5da | 733 | |
541f7d56 BS |
734 | case POST_INC: |
735 | case POST_DEC: | |
736 | case POST_MODIFY: | |
737 | case PRE_INC: | |
738 | case PRE_DEC: | |
739 | case PRE_MODIFY: | |
740 | #ifndef AUTO_INC_DEC | |
ce73761f RH |
741 | /* If the target doesn't claim to handle autoinc, this must be |
742 | something special, like a stack push. Kill this chain. */ | |
a96caf80 | 743 | action = mark_all_read; |
541f7d56 BS |
744 | #endif |
745 | break; | |
7b82b5da | 746 | |
541f7d56 | 747 | case MEM: |
3dcc68a4 | 748 | scan_rtx_address (insn, &XEXP (x, 0), |
c4963a0a | 749 | base_reg_class (GET_MODE (x), MEM, SCRATCH), action, |
85941a0a | 750 | GET_MODE (x)); |
541f7d56 | 751 | return; |
1a43c33f | 752 | |
541f7d56 | 753 | case REG: |
6bda9bdf | 754 | scan_rtx_reg (insn, loc, cl, action, OP_IN); |
4ca0f257 | 755 | return; |
1a43c33f | 756 | |
541f7d56 BS |
757 | default: |
758 | break; | |
4ca0f257 | 759 | } |
541f7d56 BS |
760 | |
761 | fmt = GET_RTX_FORMAT (code); | |
762 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
4ca0f257 | 763 | { |
541f7d56 | 764 | if (fmt[i] == 'e') |
e3a64162 | 765 | scan_rtx_address (insn, &XEXP (x, i), cl, action, mode); |
541f7d56 BS |
766 | else if (fmt[i] == 'E') |
767 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 768 | scan_rtx_address (insn, &XVECEXP (x, i, j), cl, action, mode); |
4ca0f257 | 769 | } |
7b82b5da SC |
770 | } |
771 | ||
541f7d56 | 772 | static void |
6bda9bdf BS |
773 | scan_rtx (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action, |
774 | enum op_type type) | |
7b82b5da | 775 | { |
541f7d56 BS |
776 | const char *fmt; |
777 | rtx x = *loc; | |
778 | enum rtx_code code = GET_CODE (x); | |
779 | int i, j; | |
7b82b5da | 780 | |
541f7d56 BS |
781 | code = GET_CODE (x); |
782 | switch (code) | |
7b82b5da | 783 | { |
541f7d56 BS |
784 | case CONST: |
785 | case CONST_INT: | |
786 | case CONST_DOUBLE: | |
091a3ac7 | 787 | case CONST_FIXED: |
69ef87e2 | 788 | case CONST_VECTOR: |
541f7d56 BS |
789 | case SYMBOL_REF: |
790 | case LABEL_REF: | |
791 | case CC0: | |
792 | case PC: | |
793 | return; | |
055be976 | 794 | |
541f7d56 | 795 | case REG: |
6bda9bdf | 796 | scan_rtx_reg (insn, loc, cl, action, type); |
541f7d56 | 797 | return; |
7b82b5da | 798 | |
541f7d56 | 799 | case MEM: |
3dcc68a4 | 800 | scan_rtx_address (insn, &XEXP (x, 0), |
c4963a0a | 801 | base_reg_class (GET_MODE (x), MEM, SCRATCH), action, |
85941a0a | 802 | GET_MODE (x)); |
541f7d56 | 803 | return; |
7b82b5da | 804 | |
541f7d56 | 805 | case SET: |
6bda9bdf | 806 | scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN); |
4e5813dd | 807 | scan_rtx (insn, &SET_DEST (x), cl, action, |
6bda9bdf | 808 | GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT); |
541f7d56 | 809 | return; |
7b82b5da | 810 | |
541f7d56 | 811 | case STRICT_LOW_PART: |
6bda9bdf | 812 | scan_rtx (insn, &XEXP (x, 0), cl, action, OP_INOUT); |
541f7d56 | 813 | return; |
7b82b5da | 814 | |
541f7d56 | 815 | case ZERO_EXTRACT: |
3b03c671 | 816 | case SIGN_EXTRACT: |
e3a64162 | 817 | scan_rtx (insn, &XEXP (x, 0), cl, action, |
6bda9bdf BS |
818 | type == OP_IN ? OP_IN : OP_INOUT); |
819 | scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN); | |
820 | scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN); | |
541f7d56 | 821 | return; |
7b82b5da | 822 | |
541f7d56 BS |
823 | case POST_INC: |
824 | case PRE_INC: | |
825 | case POST_DEC: | |
826 | case PRE_DEC: | |
827 | case POST_MODIFY: | |
828 | case PRE_MODIFY: | |
829 | /* Should only happen inside MEM. */ | |
41374e13 | 830 | gcc_unreachable (); |
541f7d56 BS |
831 | |
832 | case CLOBBER: | |
4e5813dd | 833 | scan_rtx (insn, &SET_DEST (x), cl, action, |
6bda9bdf | 834 | GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT); |
541f7d56 | 835 | return; |
7b82b5da | 836 | |
541f7d56 | 837 | case EXPR_LIST: |
6bda9bdf | 838 | scan_rtx (insn, &XEXP (x, 0), cl, action, type); |
541f7d56 | 839 | if (XEXP (x, 1)) |
6bda9bdf | 840 | scan_rtx (insn, &XEXP (x, 1), cl, action, type); |
541f7d56 | 841 | return; |
7b82b5da | 842 | |
541f7d56 BS |
843 | default: |
844 | break; | |
845 | } | |
7b82b5da | 846 | |
541f7d56 BS |
847 | fmt = GET_RTX_FORMAT (code); |
848 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7b82b5da SC |
849 | { |
850 | if (fmt[i] == 'e') | |
6bda9bdf | 851 | scan_rtx (insn, &XEXP (x, i), cl, action, type); |
7b82b5da SC |
852 | else if (fmt[i] == 'E') |
853 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
6bda9bdf BS |
854 | scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type); |
855 | } | |
856 | } | |
857 | ||
858 | /* Hide operands of the current insn (of which there are N_OPS) by | |
859 | substituting cc0 for them. | |
860 | Previous values are stored in the OLD_OPERANDS and OLD_DUPS. | |
a96caf80 BS |
861 | If INOUT_AND_EC_ONLY is set, we only do this for OP_INOUT type operands |
862 | and earlyclobbers. */ | |
6bda9bdf BS |
863 | |
864 | static void | |
865 | hide_operands (int n_ops, rtx *old_operands, rtx *old_dups, | |
a96caf80 | 866 | bool inout_and_ec_only) |
6bda9bdf BS |
867 | { |
868 | int i; | |
a96caf80 | 869 | int alt = which_alternative; |
6bda9bdf BS |
870 | for (i = 0; i < n_ops; i++) |
871 | { | |
872 | old_operands[i] = recog_data.operand[i]; | |
873 | /* Don't squash match_operator or match_parallel here, since | |
874 | we don't know that all of the contained registers are | |
875 | reachable by proper operands. */ | |
876 | if (recog_data.constraints[i][0] == '\0') | |
877 | continue; | |
a96caf80 BS |
878 | if (!inout_and_ec_only || recog_data.operand_type[i] == OP_INOUT |
879 | || recog_op_alt[i][alt].earlyclobber) | |
6bda9bdf BS |
880 | *recog_data.operand_loc[i] = cc0_rtx; |
881 | } | |
882 | for (i = 0; i < recog_data.n_dups; i++) | |
883 | { | |
884 | int opn = recog_data.dup_num[i]; | |
885 | old_dups[i] = *recog_data.dup_loc[i]; | |
a96caf80 BS |
886 | if (!inout_and_ec_only || recog_data.operand_type[opn] == OP_INOUT |
887 | || recog_op_alt[opn][alt].earlyclobber) | |
6bda9bdf BS |
888 | *recog_data.dup_loc[i] = cc0_rtx; |
889 | } | |
890 | } | |
891 | ||
892 | /* Undo the substitution performed by hide_operands. INSN is the insn we | |
893 | are processing; the arguments are the same as in hide_operands. */ | |
894 | ||
895 | static void | |
896 | restore_operands (rtx insn, int n_ops, rtx *old_operands, rtx *old_dups) | |
897 | { | |
898 | int i; | |
899 | for (i = 0; i < recog_data.n_dups; i++) | |
900 | *recog_data.dup_loc[i] = old_dups[i]; | |
901 | for (i = 0; i < n_ops; i++) | |
902 | *recog_data.operand_loc[i] = old_operands[i]; | |
903 | if (recog_data.n_dups) | |
904 | df_insn_rescan (insn); | |
905 | } | |
906 | ||
907 | /* For each output operand of INSN, call scan_rtx to create a new | |
a96caf80 BS |
908 | open chain. Do this only for normal or earlyclobber outputs, |
909 | depending on EARLYCLOBBER. */ | |
6bda9bdf BS |
910 | |
911 | static void | |
a96caf80 | 912 | record_out_operands (rtx insn, bool earlyclobber) |
6bda9bdf BS |
913 | { |
914 | int n_ops = recog_data.n_operands; | |
915 | int alt = which_alternative; | |
916 | ||
917 | int i; | |
918 | ||
919 | for (i = 0; i < n_ops + recog_data.n_dups; i++) | |
920 | { | |
921 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
922 | rtx *loc = (i < n_ops | |
923 | ? recog_data.operand_loc[opn] | |
924 | : recog_data.dup_loc[i - n_ops]); | |
925 | rtx op = *loc; | |
926 | enum reg_class cl = recog_op_alt[opn][alt].cl; | |
927 | ||
928 | struct du_head *prev_open; | |
929 | ||
a96caf80 BS |
930 | if (recog_data.operand_type[opn] != OP_OUT |
931 | || recog_op_alt[opn][alt].earlyclobber != earlyclobber) | |
6bda9bdf BS |
932 | continue; |
933 | ||
934 | prev_open = open_chains; | |
935 | scan_rtx (insn, loc, cl, mark_write, OP_OUT); | |
936 | ||
937 | /* ??? Many targets have output constraints on the SET_DEST | |
938 | of a call insn, which is stupid, since these are certainly | |
939 | ABI defined hard registers. For these, and for asm operands | |
940 | that originally referenced hard registers, we must record that | |
941 | the chain cannot be renamed. */ | |
942 | if (CALL_P (insn) | |
943 | || (asm_noperands (PATTERN (insn)) > 0 | |
944 | && REG_P (op) | |
945 | && REGNO (op) == ORIGINAL_REGNO (op))) | |
946 | { | |
947 | if (prev_open != open_chains) | |
a96caf80 | 948 | open_chains->cannot_rename = 1; |
6bda9bdf | 949 | } |
7b82b5da | 950 | } |
7b82b5da SC |
951 | } |
952 | ||
3eae4643 | 953 | /* Build def/use chain. */ |
7b82b5da | 954 | |
9d324dde | 955 | static struct du_head * |
0c20a65f | 956 | build_def_use (basic_block bb) |
7b82b5da | 957 | { |
541f7d56 | 958 | rtx insn; |
a96caf80 | 959 | df_ref *def_rec; |
1a43c33f | 960 | |
541f7d56 | 961 | open_chains = closed_chains = NULL; |
1a43c33f | 962 | |
a96caf80 BS |
963 | fail_current_block = false; |
964 | ||
965 | current_id = 0; | |
966 | bitmap_initialize (&open_chains_set, &bitmap_default_obstack); | |
967 | REG_SET_TO_HARD_REG_SET (live_hard_regs, df_get_live_in (bb)); | |
968 | for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++) | |
969 | { | |
970 | df_ref def = *def_rec; | |
971 | if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) | |
972 | SET_HARD_REG_BIT (live_hard_regs, DF_REF_REGNO (def)); | |
973 | } | |
974 | ||
a813c111 | 975 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
541f7d56 | 976 | { |
b5b8b0ac | 977 | if (NONDEBUG_INSN_P (insn)) |
541f7d56 BS |
978 | { |
979 | int n_ops; | |
980 | rtx note; | |
981 | rtx old_operands[MAX_RECOG_OPERANDS]; | |
982 | rtx old_dups[MAX_DUP_OPERANDS]; | |
0f900dfa | 983 | int i; |
541f7d56 BS |
984 | int alt; |
985 | int predicated; | |
a96caf80 BS |
986 | enum rtx_code set_code = SET; |
987 | enum rtx_code clobber_code = CLOBBER; | |
541f7d56 | 988 | |
541f7d56 | 989 | /* Process the insn, determining its effect on the def-use |
a96caf80 BS |
990 | chains and live hard registers. We perform the following |
991 | steps with the register references in the insn, simulating | |
992 | its effect: | |
993 | (1) Deal with earlyclobber operands and CLOBBERs of non-operands | |
994 | by creating chains and marking hard regs live. | |
541f7d56 | 995 | (2) Any read outside an operand causes any chain it overlaps |
a96caf80 | 996 | with to be marked unrenamable. |
541f7d56 BS |
997 | (3) Any read inside an operand is added if there's already |
998 | an open chain for it. | |
999 | (4) For any REG_DEAD note we find, close open chains that | |
1000 | overlap it. | |
a96caf80 BS |
1001 | (5) For any non-earlyclobber write we find, close open chains |
1002 | that overlap it. | |
1003 | (6) For any non-earlyclobber write we find in an operand, make | |
1004 | a new chain or mark the hard register as live. | |
1005 | (7) For any REG_UNUSED, close any chains we just opened. | |
1006 | ||
1007 | We cannot deal with situations where we track a reg in one mode | |
1008 | and see a reference in another mode; these will cause the chain | |
1009 | to be marked unrenamable or even cause us to abort the entire | |
1010 | basic block. */ | |
541f7d56 BS |
1011 | |
1012 | extract_insn (insn); | |
4be9e9cb | 1013 | if (! constrain_operands (1)) |
3b03c671 | 1014 | fatal_insn_not_found (insn); |
541f7d56 BS |
1015 | preprocess_constraints (); |
1016 | alt = which_alternative; | |
1017 | n_ops = recog_data.n_operands; | |
1018 | ||
1019 | /* Simplify the code below by rewriting things to reflect | |
1020 | matching constraints. Also promote OP_OUT to OP_INOUT | |
1021 | in predicated instructions. */ | |
1022 | ||
1023 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
1024 | for (i = 0; i < n_ops; ++i) | |
7b82b5da | 1025 | { |
541f7d56 BS |
1026 | int matches = recog_op_alt[i][alt].matches; |
1027 | if (matches >= 0) | |
e3a64162 | 1028 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
541f7d56 BS |
1029 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
1030 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
a96caf80 BS |
1031 | { |
1032 | recog_data.operand_type[i] = OP_INOUT; | |
1033 | if (matches >= 0 | |
1034 | && (GET_MODE_SIZE (recog_data.operand_mode[i]) | |
1035 | != GET_MODE_SIZE (recog_data.operand_mode[matches]))) | |
1036 | fail_current_block = true; | |
1037 | } | |
7b82b5da | 1038 | } |
1a43c33f | 1039 | |
a96caf80 BS |
1040 | if (fail_current_block) |
1041 | break; | |
1042 | ||
1043 | /* Step 1a: Mark hard registers that are clobbered in this insn, | |
1044 | outside an operand, as live. */ | |
1045 | hide_operands (n_ops, old_operands, old_dups, false); | |
1046 | note_stores (PATTERN (insn), note_sets_clobbers, &clobber_code); | |
1047 | restore_operands (insn, n_ops, old_operands, old_dups); | |
1048 | ||
1049 | /* Step 1b: Begin new chains for earlyclobbered writes inside | |
1050 | operands. */ | |
1051 | record_out_operands (insn, true); | |
1a43c33f | 1052 | |
a96caf80 BS |
1053 | /* Step 2: Mark chains for which we have reads outside operands |
1054 | as unrenamable. | |
3b03c671 | 1055 | We do this by munging all operands into CC0, and closing |
541f7d56 | 1056 | everything remaining. */ |
7b82b5da | 1057 | |
6bda9bdf | 1058 | hide_operands (n_ops, old_operands, old_dups, false); |
a96caf80 | 1059 | scan_rtx (insn, &PATTERN (insn), NO_REGS, mark_all_read, OP_IN); |
6bda9bdf | 1060 | restore_operands (insn, n_ops, old_operands, old_dups); |
7b82b5da | 1061 | |
541f7d56 | 1062 | /* Step 2B: Can't rename function call argument registers. */ |
4b4bf941 | 1063 | if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn)) |
541f7d56 | 1064 | scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn), |
a96caf80 | 1065 | NO_REGS, mark_all_read, OP_IN); |
7b82b5da | 1066 | |
3ada20ee RH |
1067 | /* Step 2C: Can't rename asm operands that were originally |
1068 | hard registers. */ | |
1069 | if (asm_noperands (PATTERN (insn)) > 0) | |
1070 | for (i = 0; i < n_ops; i++) | |
1071 | { | |
1072 | rtx *loc = recog_data.operand_loc[i]; | |
1073 | rtx op = *loc; | |
1074 | ||
f8cfc6aa | 1075 | if (REG_P (op) |
3ada20ee RH |
1076 | && REGNO (op) == ORIGINAL_REGNO (op) |
1077 | && (recog_data.operand_type[i] == OP_IN | |
1078 | || recog_data.operand_type[i] == OP_INOUT)) | |
a96caf80 | 1079 | scan_rtx (insn, loc, NO_REGS, mark_all_read, OP_IN); |
3ada20ee RH |
1080 | } |
1081 | ||
541f7d56 BS |
1082 | /* Step 3: Append to chains for reads inside operands. */ |
1083 | for (i = 0; i < n_ops + recog_data.n_dups; i++) | |
1084 | { | |
1085 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
1086 | rtx *loc = (i < n_ops | |
1087 | ? recog_data.operand_loc[opn] | |
1088 | : recog_data.dup_loc[i - n_ops]); | |
e3a64162 | 1089 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
541f7d56 BS |
1090 | enum op_type type = recog_data.operand_type[opn]; |
1091 | ||
1092 | /* Don't scan match_operand here, since we've no reg class | |
1093 | information to pass down. Any operands that we could | |
1094 | substitute in will be represented elsewhere. */ | |
1095 | if (recog_data.constraints[opn][0] == '\0') | |
1096 | continue; | |
7b82b5da | 1097 | |
541f7d56 | 1098 | if (recog_op_alt[opn][alt].is_address) |
e3a64162 | 1099 | scan_rtx_address (insn, loc, cl, mark_read, VOIDmode); |
541f7d56 | 1100 | else |
6bda9bdf | 1101 | scan_rtx (insn, loc, cl, mark_read, type); |
541f7d56 | 1102 | } |
7b82b5da | 1103 | |
cb110f3d AM |
1104 | /* Step 3B: Record updates for regs in REG_INC notes, and |
1105 | source regs in REG_FRAME_RELATED_EXPR notes. */ | |
541f7d56 | 1106 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
cb110f3d AM |
1107 | if (REG_NOTE_KIND (note) == REG_INC |
1108 | || REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) | |
1109 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, | |
6bda9bdf | 1110 | OP_INOUT); |
cb110f3d AM |
1111 | |
1112 | /* Step 4: Close chains for registers that die here. */ | |
1113 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1114 | if (REG_NOTE_KIND (note) == REG_DEAD) | |
a96caf80 BS |
1115 | { |
1116 | remove_from_hard_reg_set (&live_hard_regs, | |
1117 | GET_MODE (XEXP (note, 0)), | |
1118 | REGNO (XEXP (note, 0))); | |
1119 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, | |
1120 | OP_IN); | |
1121 | } | |
1a43c33f | 1122 | |
541f7d56 BS |
1123 | /* Step 4B: If this is a call, any chain live at this point |
1124 | requires a caller-saved reg. */ | |
4b4bf941 | 1125 | if (CALL_P (insn)) |
541f7d56 | 1126 | { |
9d324dde | 1127 | struct du_head *p; |
541f7d56 | 1128 | for (p = open_chains; p; p = p->next_chain) |
fe08a886 | 1129 | p->need_caller_save_reg = 1; |
541f7d56 | 1130 | } |
7b82b5da | 1131 | |
541f7d56 BS |
1132 | /* Step 5: Close open chains that overlap writes. Similar to |
1133 | step 2, we hide in-out operands, since we do not want to | |
a96caf80 BS |
1134 | close these chains. We also hide earlyclobber operands, |
1135 | since we've opened chains for them in step 1, and earlier | |
1136 | chains they would overlap with must have been closed at | |
1137 | the previous insn at the latest, as such operands cannot | |
1138 | possibly overlap with any input operands. */ | |
7b82b5da | 1139 | |
6bda9bdf BS |
1140 | hide_operands (n_ops, old_operands, old_dups, true); |
1141 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN); | |
1142 | restore_operands (insn, n_ops, old_operands, old_dups); | |
7b82b5da | 1143 | |
a96caf80 BS |
1144 | /* Step 6a: Mark hard registers that are set in this insn, |
1145 | outside an operand, as live. */ | |
1146 | hide_operands (n_ops, old_operands, old_dups, false); | |
1147 | note_stores (PATTERN (insn), note_sets_clobbers, &set_code); | |
1148 | restore_operands (insn, n_ops, old_operands, old_dups); | |
7b82b5da | 1149 | |
a96caf80 BS |
1150 | /* Step 6b: Begin new chains for writes inside operands. */ |
1151 | record_out_operands (insn, false); | |
1152 | ||
1153 | /* Step 6c: Record destination regs in REG_FRAME_RELATED_EXPR | |
cb110f3d AM |
1154 | notes for update. */ |
1155 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1156 | if (REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) | |
1157 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_access, | |
6bda9bdf | 1158 | OP_INOUT); |
cb110f3d | 1159 | |
541f7d56 BS |
1160 | /* Step 7: Close chains for registers that were never |
1161 | really used here. */ | |
1162 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1163 | if (REG_NOTE_KIND (note) == REG_UNUSED) | |
a96caf80 BS |
1164 | { |
1165 | remove_from_hard_reg_set (&live_hard_regs, | |
1166 | GET_MODE (XEXP (note, 0)), | |
1167 | REGNO (XEXP (note, 0))); | |
1168 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, | |
1169 | OP_IN); | |
1170 | } | |
541f7d56 | 1171 | } |
b5b8b0ac AO |
1172 | else if (DEBUG_INSN_P (insn) |
1173 | && !VAR_LOC_UNKNOWN_P (INSN_VAR_LOCATION_LOC (insn))) | |
1174 | { | |
1175 | scan_rtx (insn, &INSN_VAR_LOCATION_LOC (insn), | |
6bda9bdf | 1176 | ALL_REGS, mark_read, OP_IN); |
b5b8b0ac | 1177 | } |
a813c111 | 1178 | if (insn == BB_END (bb)) |
541f7d56 BS |
1179 | break; |
1180 | } | |
7b82b5da | 1181 | |
a96caf80 BS |
1182 | bitmap_clear (&open_chains_set); |
1183 | ||
1184 | if (fail_current_block) | |
1185 | return NULL; | |
1186 | ||
541f7d56 BS |
1187 | /* Since we close every chain when we find a REG_DEAD note, anything that |
1188 | is still open lives past the basic block, so it can't be renamed. */ | |
1189 | return closed_chains; | |
1190 | } | |
7b82b5da | 1191 | |
c263766c | 1192 | /* Dump all def/use chains in CHAINS to DUMP_FILE. They are |
541f7d56 | 1193 | printed in reverse order as that's how we build them. */ |
7b82b5da | 1194 | |
541f7d56 | 1195 | static void |
9d324dde | 1196 | dump_def_use_chain (struct du_head *head) |
541f7d56 | 1197 | { |
9d324dde | 1198 | while (head) |
1a43c33f | 1199 | { |
9d324dde BS |
1200 | struct du_chain *this_du = head->first; |
1201 | fprintf (dump_file, "Register %s (%d):", | |
1202 | reg_names[head->regno], head->nregs); | |
d858f359 | 1203 | while (this_du) |
541f7d56 | 1204 | { |
d858f359 KG |
1205 | fprintf (dump_file, " %d [%s]", INSN_UID (this_du->insn), |
1206 | reg_class_names[this_du->cl]); | |
1207 | this_du = this_du->next_use; | |
541f7d56 | 1208 | } |
c263766c | 1209 | fprintf (dump_file, "\n"); |
9d324dde | 1210 | head = head->next_chain; |
1a43c33f | 1211 | } |
7b82b5da | 1212 | } |
752ae914 | 1213 | |
ef330312 PB |
1214 | \f |
1215 | static bool | |
1216 | gate_handle_regrename (void) | |
1217 | { | |
6fb5fa3c | 1218 | return (optimize > 0 && (flag_rename_registers)); |
ef330312 PB |
1219 | } |
1220 | ||
8ddbbcae | 1221 | struct rtl_opt_pass pass_regrename = |
ef330312 | 1222 | { |
8ddbbcae JH |
1223 | { |
1224 | RTL_PASS, | |
ef330312 PB |
1225 | "rnreg", /* name */ |
1226 | gate_handle_regrename, /* gate */ | |
fac41238 | 1227 | regrename_optimize, /* execute */ |
ef330312 PB |
1228 | NULL, /* sub */ |
1229 | NULL, /* next */ | |
1230 | 0, /* static_pass_number */ | |
1231 | TV_RENAME_REGISTERS, /* tv_id */ | |
1232 | 0, /* properties_required */ | |
1233 | 0, /* properties_provided */ | |
1234 | 0, /* properties_destroyed */ | |
1235 | 0, /* todo_flags_start */ | |
a36b8a1e | 1236 | TODO_df_finish | TODO_verify_rtl_sharing | |
8ddbbcae JH |
1237 | TODO_dump_func /* todo_flags_finish */ |
1238 | } | |
6fb5fa3c DB |
1239 | }; |
1240 |